From 095f1b17d07c13ee832dc9dcf325e194929cbf8d Mon Sep 17 00:00:00 2001 From: _xeroxz Date: Wed, 9 Jun 2021 19:04:51 -0700 Subject: [PATCH] init commit --- .NOTE | 10 + .appveyor.yml | 33 + .github/workflows/python-publish.yml | 80 + .gitignore | 29 + .travis.yml | 67 + AUTHORS.TXT | 1 + CMakeLists.txt | 123 + CMakeUninstall.in | 21 + COPYING | 339 + CREDITS.TXT | 54 + ChangeLog | 96 + EXCEPTIONS-CLIENT | 132 + LICENSE-COM.TXT | 8 + README.md | 63 + RELEASE_NOTES | 6 + SPONSORS.TXT | 8 + bindings/Makefile | 87 + bindings/README | 23 + bindings/const_generator.py | 430 + bindings/csharp/.gitattributes | 63 + bindings/csharp/.gitignore | 246 + .../Keystone.Net.Tests.csproj | 20 + bindings/csharp/Keystone.Net.Tests/Tests.cs | 78 + bindings/csharp/Keystone.Net.sln | 50 + .../Keystone.Net/Constants/ARM64Constants.cs | 10 + .../Keystone.Net/Constants/ARMConstants.cs | 10 + .../Constants/HexagonConstants.cs | 10 + .../Constants/KeystoneConstants.cs | 107 + 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14 + .../Release/fuzz_asm_arm_thumbbe.log | 13 + .../Release/fuzz_asm_arm_thumbbe.obj | Bin 0 -> 5637 bytes .../Release/onefile.obj | Bin 0 -> 2584 bytes msvc/suite/fuzz/fuzz_asm_arm_thumbbe.vcxproj | 334 + .../fuzz/fuzz_asm_arm_thumbbe.vcxproj.filters | 19 + .../fuzz_asm.99392347.tlog/CL.command.1.tlog | Bin 0 -> 1882 bytes .../fuzz_asm.99392347.tlog/CL.read.1.tlog | Bin 0 -> 6068 bytes .../fuzz_asm.99392347.tlog/CL.write.1.tlog | Bin 0 -> 486 bytes .../CustomBuild.command.1.tlog | 10 + .../CustomBuild.read.1.tlog | 1 + .../CustomBuild.write.1.tlog | 2 + .../fuzz_asm_arm_thumbv8.lastbuildstate | 2 + .../link.command.1.tlog | Bin 0 -> 1610 bytes .../fuzz_asm.99392347.tlog/link.read.1.tlog | Bin 0 -> 3246 bytes .../fuzz_asm.99392347.tlog/link.write.1.tlog | Bin 0 -> 448 bytes .../Release/fuzz_asm_arm_thumbv8.exe.recipe | 14 + .../Release/fuzz_asm_arm_thumbv8.log | 13 + .../Release/fuzz_asm_arm_thumbv8.obj | Bin 0 -> 5637 bytes .../Release/onefile.obj | Bin 0 -> 2584 bytes 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1858 bytes .../fuzz_asm.D087ED0F.tlog/CL.read.1.tlog | Bin 0 -> 6064 bytes .../fuzz_asm.D087ED0F.tlog/CL.write.1.tlog | Bin 0 -> 470 bytes .../CustomBuild.command.1.tlog | 10 + .../CustomBuild.read.1.tlog | 1 + .../CustomBuild.write.1.tlog | 2 + .../fuzz_asm_armv8_arm.lastbuildstate | 2 + .../link.command.1.tlog | Bin 0 -> 1574 bytes .../fuzz_asm.D087ED0F.tlog/link.read.1.tlog | Bin 0 -> 3222 bytes .../fuzz_asm.D087ED0F.tlog/link.write.1.tlog | Bin 0 -> 432 bytes .../Release/fuzz_asm_armv8_arm.exe.recipe | 14 + .../Release/fuzz_asm_armv8_arm.log | 13 + .../Release/fuzz_asm_armv8_arm.obj | Bin 0 -> 5633 bytes .../Release/onefile.obj | Bin 0 -> 2580 bytes msvc/suite/fuzz/fuzz_asm_armv8_arm.vcxproj | 334 + .../fuzz/fuzz_asm_armv8_arm.vcxproj.filters | 19 + .../Release/fuzz_asm_evm.exe.recipe | 14 + .../fuzz_asm_evm.dir/Release/fuzz_asm_evm.log | 13 + .../fuzz_asm_evm.dir/Release/fuzz_asm_evm.obj | Bin 0 -> 5621 bytes .../fuzz_asm_evm.tlog/CL.command.1.tlog | Bin 0 -> 1786 bytes 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msvc/suite/fuzz/fuzz_asm_mips64be.vcxproj | 334 + .../fuzz/fuzz_asm_mips64be.vcxproj.filters | 19 + .../Release/fuzz_asm_mipsbe.exe.recipe | 14 + .../Release/fuzz_asm_mipsbe.log | 13 + .../Release/fuzz_asm_mipsbe.obj | Bin 0 -> 5625 bytes .../fuzz_asm_mipsbe.tlog/CL.command.1.tlog | Bin 0 -> 1822 bytes .../fuzz_asm_mipsbe.tlog/CL.read.1.tlog | Bin 0 -> 6058 bytes .../fuzz_asm_mipsbe.tlog/CL.write.1.tlog | Bin 0 -> 446 bytes .../CustomBuild.command.1.tlog | 10 + .../CustomBuild.read.1.tlog | 1 + .../CustomBuild.write.1.tlog | 2 + .../fuzz_asm_mipsbe.lastbuildstate | 2 + .../fuzz_asm_mipsbe.tlog/link.command.1.tlog | Bin 0 -> 1520 bytes .../fuzz_asm_mipsbe.tlog/link.read.1.tlog | Bin 0 -> 3186 bytes .../fuzz_asm_mipsbe.tlog/link.write.1.tlog | Bin 0 -> 408 bytes .../fuzz_asm_mipsbe.dir/Release/onefile.obj | Bin 0 -> 2576 bytes msvc/suite/fuzz/fuzz_asm_mipsbe.vcxproj | 334 + .../fuzz/fuzz_asm_mipsbe.vcxproj.filters | 19 + .../Release/fuzz_asm_ppc32be.exe.recipe | 14 + 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1502 bytes .../fuzz_asm_sparc.tlog/link.read.1.tlog | Bin 0 -> 3174 bytes .../fuzz_asm_sparc.tlog/link.write.1.tlog | Bin 0 -> 400 bytes .../fuzz_asm_sparc.dir/Release/onefile.obj | Bin 0 -> 2576 bytes msvc/suite/fuzz/fuzz_asm_sparc.vcxproj | 334 + .../suite/fuzz/fuzz_asm_sparc.vcxproj.filters | 19 + .../fuzz_asm.96116F73.tlog/CL.command.1.tlog | Bin 0 -> 1858 bytes .../fuzz_asm.96116F73.tlog/CL.read.1.tlog | Bin 0 -> 6064 bytes .../fuzz_asm.96116F73.tlog/CL.write.1.tlog | Bin 0 -> 470 bytes .../CustomBuild.command.1.tlog | 10 + .../CustomBuild.read.1.tlog | 1 + .../CustomBuild.write.1.tlog | 2 + .../fuzz_asm_sparc64be.lastbuildstate | 2 + .../link.command.1.tlog | Bin 0 -> 1574 bytes .../fuzz_asm.96116F73.tlog/link.read.1.tlog | Bin 0 -> 3222 bytes .../fuzz_asm.96116F73.tlog/link.write.1.tlog | Bin 0 -> 432 bytes .../Release/fuzz_asm_sparc64be.exe.recipe | 14 + .../Release/fuzz_asm_sparc64be.log | 13 + .../Release/fuzz_asm_sparc64be.obj | Bin 0 -> 5633 bytes .../Release/onefile.obj | Bin 0 -> 2580 bytes msvc/suite/fuzz/fuzz_asm_sparc64be.vcxproj | 334 + .../fuzz/fuzz_asm_sparc64be.vcxproj.filters | 19 + .../Release/fuzz_asm_sparcbe.exe.recipe | 14 + .../Release/fuzz_asm_sparcbe.log | 13 + .../Release/fuzz_asm_sparcbe.obj | Bin 0 -> 5629 bytes .../fuzz_asm_sparcbe.tlog/CL.command.1.tlog | Bin 0 -> 1834 bytes .../fuzz_asm_sparcbe.tlog/CL.read.1.tlog | Bin 0 -> 6060 bytes .../fuzz_asm_sparcbe.tlog/CL.write.1.tlog | Bin 0 -> 454 bytes .../CustomBuild.command.1.tlog | 10 + .../CustomBuild.read.1.tlog | 1 + .../CustomBuild.write.1.tlog | 2 + .../fuzz_asm_sparcbe.lastbuildstate | 2 + .../fuzz_asm_sparcbe.tlog/link.command.1.tlog | Bin 0 -> 1538 bytes .../fuzz_asm_sparcbe.tlog/link.read.1.tlog | Bin 0 -> 3198 bytes .../fuzz_asm_sparcbe.tlog/link.write.1.tlog | Bin 0 -> 416 bytes .../fuzz_asm_sparcbe.dir/Release/onefile.obj | Bin 0 -> 2580 bytes msvc/suite/fuzz/fuzz_asm_sparcbe.vcxproj | 334 + .../fuzz/fuzz_asm_sparcbe.vcxproj.filters | 19 + .../Release/fuzz_asm_systemz.exe.recipe | 14 + .../Release/fuzz_asm_systemz.log | 13 + .../Release/fuzz_asm_systemz.obj | Bin 0 -> 5629 bytes .../fuzz_asm_systemz.tlog/CL.command.1.tlog | Bin 0 -> 1834 bytes .../fuzz_asm_systemz.tlog/CL.read.1.tlog | Bin 0 -> 6060 bytes .../fuzz_asm_systemz.tlog/CL.write.1.tlog | Bin 0 -> 454 bytes .../CustomBuild.command.1.tlog | 10 + .../CustomBuild.read.1.tlog | 1 + .../CustomBuild.write.1.tlog | 2 + .../fuzz_asm_systemz.lastbuildstate | 2 + .../fuzz_asm_systemz.tlog/link.command.1.tlog | Bin 0 -> 1538 bytes .../fuzz_asm_systemz.tlog/link.read.1.tlog | Bin 0 -> 3198 bytes .../fuzz_asm_systemz.tlog/link.write.1.tlog | Bin 0 -> 416 bytes .../fuzz_asm_systemz.dir/Release/onefile.obj | Bin 0 -> 2580 bytes msvc/suite/fuzz/fuzz_asm_systemz.vcxproj | 334 + .../fuzz/fuzz_asm_systemz.vcxproj.filters | 19 + .../Release/fuzz_asm_x86_16.exe.recipe | 14 + .../Release/fuzz_asm_x86_16.log | 13 + .../Release/fuzz_asm_x86_16.obj | Bin 0 -> 5625 bytes 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suite/regress/x86_special_insn.py create mode 100644 suite/regress/x86_ss_default.py create mode 100644 suite/test-all.sh create mode 100644 suite/test_diag_printer.py create mode 100644 suite/test_diag_printer.sh create mode 100644 suite/test_roundtrips.py create mode 100644 suite/test_xedparse.py diff --git a/.NOTE b/.NOTE new file mode 100644 index 0000000..ecd0b39 --- /dev/null +++ b/.NOTE @@ -0,0 +1,10 @@ +Checklist for a new release: + +- update ChangeLog +- cd bindings; make +- update API version in keystone.h +- update API version in CMakeLists.txt +- change version + dev status in bindings/python/setup.py +- push all local commits +- tag + push -- tags -> check for new Pypi package + diff --git a/.appveyor.yml b/.appveyor.yml new file mode 100644 index 0000000..0651719 --- /dev/null +++ b/.appveyor.yml @@ -0,0 +1,33 @@ +version: 1.0-{build} + +os: + - Visual Studio 2015 + +before_build: + - call "C:\Program Files (x86)\Microsoft Visual Studio 14.0\VC\vcvarsall.bat" amd64 + +build_script: + - mkdir build + - cd build + - ..\nmake-dll.bat + - ..\nmake-lib.bat + +after_build: + - mkdir keystone-windows-latest + - copy llvm\bin\keystone.dll keystone-windows-latest + - copy llvm\lib\keystone.lib keystone-windows-latest + - copy kstool\kstool.exe keystone-windows-latest + - 7z a keystone-windows-latest.zip keystone-windows-latest\* + +artifacts: + - path: build\keystone-windows-latest.zip + name: All Windows binaries + + - path: build\llvm\bin\keystone.dll + name: keystone.dll + + - path: build\llvm\lib\keystone.lib + name: keystone.lib + + - path: build\kstool\kstool.exe + name: kstool.exe diff --git a/.github/workflows/python-publish.yml b/.github/workflows/python-publish.yml new file mode 100644 index 0000000..6f5e855 --- /dev/null +++ b/.github/workflows/python-publish.yml @@ -0,0 +1,80 @@ +name: PyPI 📦 Distribution + +on: [push] + +jobs: + build: + runs-on: ${{ matrix.os }} + strategy: + fail-fast: false + matrix: + os: [macos-latest, ubuntu-latest, windows-latest] + platform: [x32, x64] + steps: + - uses: actions/checkout@v2 + + - name: Set up Python + uses: actions/setup-python@v2 + with: + python-version: '3.x' + + - name: Set up MSVC x86 + if: matrix.os == 'windows-latest' && matrix.platform == 'x32' + uses: ilammy/msvc-dev-cmd@v1 + with: + arch: x86 + + - name: Set up MSVC x64 + if: matrix.os == 'windows-latest' && matrix.platform == 'x64' + uses: ilammy/msvc-dev-cmd@v1 + + - name: Install dependencies + run: | + pip install setuptools wheel + + - name: Build distribution 📦 + shell: bash + run: | + if [ ${{ matrix.platform }} == 'x32' ] && [ ${{ matrix.os }} == 'windows-latest' ]; then + cd bindings/python && python setup.py build -p win32 bdist_wheel -p win32 + elif [ ${{ matrix.platform }} == 'x32' ] && [ ${{ matrix.os }} == 'ubuntu-latest' ]; then + docker run --rm -v `pwd`/:/work dockcross/manylinux1-x86 > ./dockcross + chmod +x ./dockcross + ./dockcross bindings/python/build_wheel.sh + elif [ ${{ matrix.platform }} == 'x64' ] && [ ${{ matrix.os }} == 'ubuntu-latest' ]; then + docker run --rm -v `pwd`/:/work dockcross/manylinux1-x64 > ./dockcross + chmod +x ./dockcross + ./dockcross bindings/python/build_wheel.sh + elif [ ${{ matrix.platform }} == 'x32' ] && [ ${{ matrix.os }} == 'macos-latest' ]; then + cd bindings/python && python setup.py sdist + else + cd bindings/python && python setup.py bdist_wheel + fi + + - uses: actions/upload-artifact@v2 + with: + path: ${{ github.workspace }}/bindings/python/dist/* + + publish: + needs: [build] + runs-on: ubuntu-latest + if: startsWith(github.ref, 'refs/tags') + steps: + - uses: actions/download-artifact@v2 + with: + name: artifact + path: dist + + - name: Publish distribution 📦 to test PyPI + uses: pypa/gh-action-pypi-publish@master + with: + user: __token__ + password: ${{ secrets.testpypi_pass }} + repository_url: https://test.pypi.org/legacy/ + + - name: Publish distribution 📦 to PyPI + if: ${{ success() }} + uses: pypa/gh-action-pypi-publish@master + with: + user: __token__ + password: ${{ secrets.pypi_pass }} diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..cee3080 --- /dev/null +++ b/.gitignore @@ -0,0 +1,29 @@ +.DS_Store +*.swp +*.d +*.o +*.a +*.dSYM +*.so +*.so.* +*.exe +*.dll +*.dylib +*.class +*.jar +*.pyc +*.egg-info +*.tgz +*.tar.gz +*.github.io +_*.diff + +build*/ +samples/sample +_sample*.txt +tmp +MANIFEST + +bindings/python/dist/ +bindings/python/src/ + diff --git a/.travis.yml b/.travis.yml new file mode 100644 index 0000000..0125a3e --- /dev/null +++ b/.travis.yml @@ -0,0 +1,67 @@ +language: cpp + +sudo: false + +script: + - mkdir build + - cd build + - cmake -DCMAKE_BUILD_TYPE=Release -DBUILD_SHARED_LIBS=OFF -DLLVM_TARGETS_TO_BUILD="all" -G "Unix Makefiles" .. + - make -j 8 + +compiler: + - clang + - gcc + +os: + - linux + - osx + +matrix: + fast_finish: true + include: + - if: branch = master + os: osx + osx_image: xcode10.1 + compiler: clang + before_cache: + - brew cleanup + - find /usr/local/Homebrew \! -regex ".+\.git.+" -delete; + cache: + directories: + - $HOME/Library/Caches/Homebrew + - /usr/local/Homebrew + before_install: + - cd /usr/local/Homebrew/Library/Taps/homebrew/homebrew-core && git stash && git clean -d -f + script: brew update && brew install --HEAD keystone + + - if: branch = master + os: osx + osx_image: xcode10.1 + compiler: gcc + before_cache: + - brew cleanup + - find /usr/local/Homebrew \! -regex ".+\.git.+" -delete; + cache: + directories: + - $HOME/Library/Caches/Homebrew + - /usr/local/Homebrew + before_install: + - cd /usr/local/Homebrew/Library/Taps/homebrew/homebrew-core && git stash && git clean -d -f + script: brew update && brew install --HEAD keystone + + - name: "Windows nmake 32bit" + os: windows + language: shell + script: + - mkdir build + - cd build + - cmd.exe //C 'C:\Program Files (x86)\Microsoft Visual Studio\2017\BuildTools\VC\Auxiliary\Build\vcvarsall.bat' x86 '&' cmd.exe //C '..\nmake-dll.bat' X86 '&' cmd.exe //c '..\nmake-lib.bat' X86 + + - name: "Windows nmake 64bit" + os: windows + language: shell + script: + - mkdir build + - cd build + - cmd.exe //C 'C:\Program Files (x86)\Microsoft Visual Studio\2017\BuildTools\VC\Auxiliary\Build\vcvarsall.bat' amd64 '&' cmd.exe //C '..\nmake-dll.bat' '&' cmd.exe //c '..\nmake-lib.bat' + diff --git a/AUTHORS.TXT b/AUTHORS.TXT new file mode 100644 index 0000000..bb638be --- /dev/null +++ b/AUTHORS.TXT @@ -0,0 +1 @@ +Nguyen Anh Quynh diff --git a/CMakeLists.txt b/CMakeLists.txt new file mode 100644 index 0000000..938d498 --- /dev/null +++ b/CMakeLists.txt @@ -0,0 +1,123 @@ +# Keystone Assembler Engine (www.keystone-engine.org) +# By Nguyen Anh Quynh, 2016 + +cmake_minimum_required(VERSION 2.8.7) +project(keystone) + +set(KEYSTONE_VERSION_MAJOR 0) +set(KEYSTONE_VERSION_MINOR 9) + +option(KEYSTONE_BUILD_STATIC_RUNTIME "Embed static runtime" ON) +option(BUILD_LIBS_ONLY "Only build keystone library" 0) + +if (NOT CMAKE_BUILD_TYPE AND NOT CMAKE_CONFIGURATION_TYPES) + message(STATUS "No build type selected, default to Debug") + set(CMAKE_BUILD_TYPE "Debug") +endif() + +if (POLICY CMP0022) + cmake_policy(SET CMP0022 NEW) # automatic when 2.8.12 is required +endif() + +if (POLICY CMP0051) + # CMake 3.1 and higher include generator expressions of the form + # $ in the SOURCES property. These need to be + # stripped everywhere that access the SOURCES property, so we just + # defer to the OLD behavior of not including generator expressions + # in the output for now. + cmake_policy(SET CMP0051 OLD) +endif() + +if (POLICY CMP0063) + set(CMAKE_POLICY_DEFAULT_CMP0063 NEW) # automatic when 3.3.2 is required +endif() + +if (CMAKE_VERSION VERSION_LESS 3.1.20141117) + set(cmake_3_2_USES_TERMINAL) +else() + set(cmake_3_2_USES_TERMINAL USES_TERMINAL) +endif() + +if (${CMAKE_CXX_COMPILER_ID} STREQUAL MSVC) + set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} /EHsc") + set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} /EHsc") + set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} /EHsc") + set(CMAKE_CXX_FLAGS_DEBUG "${CMAKE_CXX_FLAGS_DEBUG} /EHsc") +else() + set(CMAKE_C_VISIBILITY_PRESET hidden) + set(CMAKE_CXX_VISIBILITY_PRESET hidden) + + # Use GNUInstallDirs to set LLVM_LIBDIR_SUFFIX. This should automatically + # handle cases where the libdir should be lib/, lib64/, or lib// + # depending on the target system and cmake options. + include(GNUInstallDirs) + string(REGEX REPLACE "lib(.*)$" "\\1" LLVM_LIBDIR_SUFFIX "${CMAKE_INSTALL_LIBDIR}") + set(LLVM_LIBDIR_SUFFIX "${LLVM_LIBDIR_SUFFIX}" CACHE STRING "Define suffix of library directory name (32/64)") +endif() + +# Force static runtime libraries +if (KEYSTONE_BUILD_STATIC_RUNTIME) + FOREACH(flag + CMAKE_C_FLAGS_RELEASE CMAKE_C_FLAGS_RELWITHDEBINFO + CMAKE_C_FLAGS_DEBUG CMAKE_C_FLAGS_DEBUG_INIT + CMAKE_CXX_FLAGS_RELEASE CMAKE_CXX_FLAGS_RELWITHDEBINFO + CMAKE_CXX_FLAGS_DEBUG CMAKE_CXX_FLAGS_DEBUG_INIT) + if (MSVC) + STRING(REPLACE "/MD" "/MT" "${flag}" "${${flag}}") + SET("${flag}" "${${flag}} /EHsc") + endif (MSVC) + ENDFOREACH() +endif () + +add_subdirectory(llvm) + +# for Windows, do not build kstool if buiding DLL +# TODO: fix this +if (${CMAKE_CXX_COMPILER_ID} STREQUAL MSVC) +if (NOT BUILD_LIBS_ONLY AND NOT BUILD_SHARED_LIBS) + add_subdirectory(kstool) +endif() +else() +if (NOT BUILD_LIBS_ONLY) + add_subdirectory(kstool) +endif() +endif() + +# generate and install pkg-config.pc +FIND_PACKAGE(PkgConfig) +SET(PKG_CONFIG_FILE_PATH + "${CMAKE_CURRENT_BINARY_DIR}/${PROJECT_NAME}.pc" +) +SET(PKG_CONFIG_LIBDIR + "${CMAKE_INSTALL_PREFIX}/lib${LLVM_LIBDIR_SUFFIX}" +) +SET(PKG_CONFIG_INCLUDEDIR + "${CMAKE_INSTALL_PREFIX}/include" +) +SET(PKG_CONFIG_LIBS + "-L\${libdir} -lkeystone" +) +SET(PKG_CONFIG_CFLAGS + "-I\${includedir}" +) +CONFIGURE_FILE( + "${CMAKE_CURRENT_SOURCE_DIR}/pkg-config.pc.cmake" + "${PKG_CONFIG_FILE_PATH}" +) +INSTALL(FILES "${PKG_CONFIG_FILE_PATH}" + DESTINATION lib${LLVM_LIBDIR_SUFFIX}/pkgconfig) + +# uninstall target +configure_file( + "${CMAKE_CURRENT_SOURCE_DIR}/CMakeUninstall.in" + "${CMAKE_CURRENT_BINARY_DIR}/CMakeUninstall.cmake" + IMMEDIATE @ONLY) + +if(NOT BUILD_LIBS_ONLY) + add_custom_target(uninstall + COMMAND ${CMAKE_COMMAND} -P ${CMAKE_CURRENT_BINARY_DIR}/CMakeUninstall.cmake) +endif() + +if(NOT BUILD_LIBS_ONLY) + add_subdirectory(suite/fuzz) +endif() diff --git a/CMakeUninstall.in b/CMakeUninstall.in new file mode 100644 index 0000000..5f7acc0 --- /dev/null +++ b/CMakeUninstall.in @@ -0,0 +1,21 @@ +if (NOT EXISTS "@CMAKE_CURRENT_BINARY_DIR@/install_manifest.txt") + message(FATAL_ERROR "Cannot find install manifest: @CMAKE_CURRENT_BINARY_DIR@/install_manifest.txt") +endif(NOT EXISTS "@CMAKE_CURRENT_BINARY_DIR@/install_manifest.txt") + +file(READ "@CMAKE_CURRENT_BINARY_DIR@/install_manifest.txt" files) +string(REGEX REPLACE "\n" ";" files "${files}") +foreach(file ${files}) + message(STATUS "Uninstalling $ENV{DESTDIR}${file}") + if(IS_SYMLINK "$ENV{DESTDIR}${file}" OR EXISTS "$ENV{DESTDIR}${file}") + exec_program( + "@CMAKE_COMMAND@" ARGS "-E remove \"$ENV{DESTDIR}${file}\"" + OUTPUT_VARIABLE rm_out + RETURN_VALUE rm_retval + ) + if(NOT "${rm_retval}" STREQUAL 0) + message(FATAL_ERROR "Problem when removing $ENV{DESTDIR}${file}") + endif(NOT "${rm_retval}" STREQUAL 0) + else(IS_SYMLINK "$ENV{DESTDIR}${file}" OR EXISTS "$ENV{DESTDIR}${file}") + message(STATUS "File $ENV{DESTDIR}${file} does not exist.") + endif(IS_SYMLINK "$ENV{DESTDIR}${file}" OR EXISTS "$ENV{DESTDIR}${file}") +endforeach(file) diff --git a/COPYING b/COPYING new file mode 100644 index 0000000..d511905 --- /dev/null +++ b/COPYING @@ -0,0 +1,339 @@ + GNU GENERAL PUBLIC LICENSE + Version 2, June 1991 + + Copyright (C) 1989, 1991 Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. By contrast, the GNU General Public +License is intended to guarantee your freedom to share and change free +software--to make sure the software is free for all its users. This +General Public License applies to most of the Free Software +Foundation's software and to any other program whose authors commit to +using it. (Some other Free Software Foundation software is covered by +the GNU Lesser General Public License instead.) You can apply it to +your programs, too. + + When we speak of free software, we are referring to freedom, not +price. Our General Public Licenses are designed to make sure that you +have the freedom to distribute copies of free software (and charge for +this service if you wish), that you receive source code or can get it +if you want it, that you can change the software or use pieces of it +in new free programs; and that you know you can do these things. + + To protect your rights, we need to make restrictions that forbid +anyone to deny you these rights or to ask you to surrender the rights. +These restrictions translate to certain responsibilities for you if you +distribute copies of the software, or if you modify it. + + For example, if you distribute copies of such a program, whether +gratis or for a fee, you must give the recipients all the rights that +you have. You must make sure that they, too, receive or can get the +source code. And you must show them these terms so they know their +rights. + + We protect your rights with two steps: (1) copyright the software, and +(2) offer you this license which gives you legal permission to copy, +distribute and/or modify the software. + + Also, for each author's protection and ours, we want to make certain +that everyone understands that there is no warranty for this free +software. If the software is modified by someone else and passed on, we +want its recipients to know that what they have is not the original, so +that any problems introduced by others will not reflect on the original +authors' reputations. + + Finally, any free program is threatened constantly by software +patents. We wish to avoid the danger that redistributors of a free +program will individually obtain patent licenses, in effect making the +program proprietary. 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It is safest +to attach them to the start of each source file to most effectively +convey the exclusion of warranty; and each file should have at least +the "copyright" line and a pointer to where the full notice is found. + + + Copyright (C) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + +Also add information on how to contact you by electronic and paper mail. + +If the program is interactive, make it output a short notice like this +when it starts in an interactive mode: + + Gnomovision version 69, Copyright (C) year name of author + Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, the commands you use may +be called something other than `show w' and `show c'; they could even be +mouse-clicks or menu items--whatever suits your program. + +You should also get your employer (if you work as a programmer) or your +school, if any, to sign a "copyright disclaimer" for the program, if +necessary. Here is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the program + `Gnomovision' (which makes passes at compilers) written by James Hacker. + + , 1 April 1989 + Ty Coon, President of Vice + +This General Public License does not permit incorporating your program into +proprietary programs. If your program is a subroutine library, you may +consider it more useful to permit linking proprietary applications with the +library. If this is what you want to do, use the GNU Lesser General +Public License instead of this License. diff --git a/CREDITS.TXT b/CREDITS.TXT new file mode 100644 index 0000000..b3b25cb --- /dev/null +++ b/CREDITS.TXT @@ -0,0 +1,54 @@ +This file credits all the contributors of Keystone Engine (keystone-engine.org). + + +Beta testers (in no particular order) +===================================== +Mike Guidry +Eloi Vanderbeken +Tim "diff" Strazzere +Matt Graeber +Edgar Barbosa +Loi Anh Tuan +Sascha Schirra +hugsy +Alexander Tereshkin +Sébastien Duquette +Sergi Alvarez, aka pancake (author of radare) +Richo Healey +Remco Verhoef (honeytrap.io) +Duncan Ogilvie +Bruce Dang +Dan Caselden +Jaime Peñalba +Daniel Collin +Vitaly Osipov +Dang Hoang Vu +Paul Rascagneres +postmodern +Fotis Loukos +Peter Geissler +Ingmar Steen (CED) +Matteo Favaro +Julien Legras +Anton Kochkov +Francisco Alonso +rdmz +practicalswift +Jurriaan Bremer + + +Contributors (in no particular order) +===================================== +Ingmar Steen: NodeJS binding. +Sascha Schirra: Ruby binding. +Remco Verhoef: Go & Rust bindings. +Adrian Herrera: Haskell binding. +practicalswift: Various cool bugs found by fuzzing. +Aziem Chawdhary: OCaml binding. +Ruben Boonen: PowerShell binding. +Marco Fornaro: C# binding. +David Zimmer: VB6 binding. +Michael Mohr: Debian packaging. +Jämes Ménétrey (ZenLulz): Java binding. +Philippe Antoine (Catena cyber): fuzzing. +Kevin Foo (chfl4gs): PyPI packaging, Travis-CI, fixes for Python binding. diff --git a/ChangeLog b/ChangeLog new file mode 100644 index 0000000..3cddc42 --- /dev/null +++ b/ChangeLog @@ -0,0 +1,96 @@ +This file details the changelog of Keystone. + +------------------------------ +Version 0.9.2: June 21st, 2020 + +- Fix for Python binding (Pypi package) + +---------------------------------- +Version 0.9.2-rc1: June 13th, 2020 + +[ Core & tool ] + +- Default radix set to 16 +- kstool accepts -b option to print out encoding binary to output +- Do not build Universal binaries for Mac +- Better installer for Linux +- Add Ethereum VM architecture +- Better support for older compiler +- Add Masm binding +- Rename namespace llvm to llvm_ks +- Better cross compile with Android NDK +- Add KS_VERSION_{MAJOR, MINOR, EXTRA} +- Add new option KS_OPT_SYM_RESOLVER +- Fix memory leaks in ks_asm() + +[ X86 ] + +- Fix X86 prefix ordering + +[ Arm ] + +- Fix Thumb backward branch +- Fix Thumb2 ADR, B.W +- Fix BL, BLX in Thumb mode + +[ Arm64 ] + +- Fix ADRP +- Fix PC-relative offset for branch instructions + +[ Mips ] + +- Fix JAL IMM + +[ PowerPC ] + +- Remove bound check on branch instructions + +[ Python binding ] + +- Fix module loading issue +- Load library versioning +- Add as_bytes=True param to asm() + +[ Bindings ] + +- Multiple fixes for Python, Go, Rust, .NET +- Add Java, VB6, C#, Powershell, Perl bindings + +------------------------------ +Version 0.9.1: July 27th, 2016 + +[ Core & tool ] + +- Fix a segfault in kstool (on missing assembly input). +- kstool now allows to specify instruction address. +- Build Mac libraries in universal format by default. +- Add "lib32" option to cross-compile to 32-bit *nix (on 64-bit system). +- Add "lib_only" option to only build libraries (skip kstool). +- New bindings: Haskell & OCaml. + +[ X86 ] + +- Fix instructions: LJMP, LCALL, CDQE, SHR, SHL, SAR, SAL, LOOP, LOOPE, LOOPNE +- Better handling a lot of tricky input caught by assert() before. +- Better support for Nasm syntax. + +[ Arm ] + +- Fix BLX instruction. + +[ Python binding ] + +- Better Python3 support. +- Expose @stat_count in KsError class when ks_asm() returns with error. + See sample code in bindings/python/sample_asm_count.py + +[ Go binding ] + +- Fix Go binding for 32-bit + +--------------------------- +Version 0.9: May 31th, 2016 + +- Initial public release. + diff --git a/EXCEPTIONS-CLIENT b/EXCEPTIONS-CLIENT new file mode 100644 index 0000000..659a52a --- /dev/null +++ b/EXCEPTIONS-CLIENT @@ -0,0 +1,132 @@ + FOSS License Exception + +What is the FOSS License Exception? + + This is based on the Oracle's Free and Open Source Software ("FOSS") + License Exception. + + The Free and Open Source Software ("FOSS") License Exception allows + developers of FOSS applications to include Keystone Libraries with their + FOSS applications. This exception permits distribution of Keystone libraries + with a developer's FOSS applications licensed under the terms of another + FOSS license listed below, even though such other FOSS license may be + incompatible with the GPL. + + The following terms and conditions describe the circumstances under which + Oracle's FOSS License Exception applies. + +FOSS License Exception Terms and Conditions + + 1. Definitions. "Derivative Work" means a derivative work, as defined + under applicable copyright law, formed entirely from the Program and + one or more FOSS Applications. + + "FOSS Application" means a free and open source software application + distributed subject to a license listed in the section below titled + "FOSS License List." + + "FOSS Notice" means a notice put in a copy of Keystone Libraries + stating that such copy of Keystone Libraries may be distributed under + FOSS License Exception. + + "Independent Work" means portions of the Derivative Work that are not + derived from the Program and can reasonably be considered independent + and separate works. + + "Program" means a copy of Keystone Libraries that contains + a FOSS Notice. + + 2. A FOSS application developer ("you" or "your") may distribute a + Derivative Work provided that you and the Derivative Work meet all of + the following conditions: + + a. You obey the GPL in all respects for the Program and all portions + (including modifications) of the Program included in the + Derivative Work (provided that this condition does not apply to + Independent Works); + b. The Derivative Work does not include any work licensed under the + GPL other than the Program; + c. You distribute Independent Works subject to a license listed in + the section below titled "FOSS License List"; + d. You distribute Independent Works in object code or executable + form with the complete corresponding machine-readable source code + on the same medium and under the same FOSS license applying to + the object code or executable forms; + e. All works that are aggregated with the Program or the Derivative + Work on a medium or volume of storage are not derivative works of + the Program, Derivative Work or FOSS Application, and must + reasonably be considered independent and separate works. + + 3. Keystone's authors reserves all rights not expressly granted in these + terms and conditions. If all of the above conditions are not met, then + this FOSS License Exception does not apply to you/your Derivative Work. + +FOSS License List + ++------------------------------------------------------------------------+ +|License Name |Version(s)/Copyright Date| +|----------------------------------------------+-------------------------| +|Academic Free License |2.0 | +|----------------------------------------------+-------------------------| +|Apache Software License |1.0/1.1/2.0 | +|----------------------------------------------+-------------------------| +|Apple Public Source License |2.0 | +|----------------------------------------------+-------------------------| +|Artistic license |From Perl 5.8.0 | +|----------------------------------------------+-------------------------| +|BSD license |"July 22 1999" | +|----------------------------------------------+-------------------------| +|Common Development and Distribution License |1.0 | +|(CDDL) | | +|----------------------------------------------+-------------------------| +|Common Public License |1.0 | +|----------------------------------------------+-------------------------| +|Eclipse Public License |1.0 | +|----------------------------------------------+-------------------------| +|European Union Public License (EUPL)¹ |1.1 | +|----------------------------------------------+-------------------------| +|GNU Affero General Public License (AGPL) |3.0 | +|----------------------------------------------+-------------------------| +|GNU Library or "Lesser" General Public License|2.0/2.1/3.0 | +|(LGPL) | | +|----------------------------------------------+-------------------------| +|GNU General Public License (GPL) |3.0 | +|----------------------------------------------+-------------------------| +|IBM Public License |1.0 | +|----------------------------------------------+-------------------------| +|Jabber Open Source License |1.0 | +|----------------------------------------------+-------------------------| +|MIT License (As listed in file |- | +|MIT-License.txt) | | +|----------------------------------------------+-------------------------| +|Mozilla Public License (MPL) |1.0/1.1 | +|----------------------------------------------+-------------------------| +|Open Software License |2.0 | +|----------------------------------------------+-------------------------| +|OpenSSL license (with original SSLeay license)|"2003" ("1998") | +|----------------------------------------------+-------------------------| +|PHP License |3.0/3.01 | +|----------------------------------------------+-------------------------| +|Python license (CNRI Python License) |- | +|----------------------------------------------+-------------------------| +|Python Software Foundation License |2.1.1 | +|----------------------------------------------+-------------------------| +|Sleepycat License |"1999" | +|----------------------------------------------+-------------------------| +|University of Illinois/NCSA Open Source |- | +|License | | +|----------------------------------------------+-------------------------| +|W3C License |"2001" | +|----------------------------------------------+-------------------------| +|X11 License |"2001" | +|----------------------------------------------+-------------------------| +|Zlib/libpng License |- | +|----------------------------------------------+-------------------------| +|Zope Public License |2.0 | ++------------------------------------------------------------------------+ + +¹) When an Independent Work is licensed under a "Compatible License" +pursuant to the EUPL, the Compatible License rather than the EUPL is the +applicable license for purposes of these FOSS License Exception Terms and +Conditions. + diff --git a/LICENSE-COM.TXT b/LICENSE-COM.TXT new file mode 100644 index 0000000..e9bea34 --- /dev/null +++ b/LICENSE-COM.TXT @@ -0,0 +1,8 @@ +The commercial license of Keystone allows you to use Keystone libraries & tools +in commercial products. + +- The Keystone commercial license is perpetual and royalty-free. +- You have the right to distribute the binary and modifications of Keystone. +- No source code redistribution is allowed in any way. + +Contact keystone.engine@gmail.com for further information. diff --git a/README.md b/README.md new file mode 100644 index 0000000..c97c8b4 --- /dev/null +++ b/README.md @@ -0,0 +1,63 @@ +Keystone Engine +============== + +[![Build Status](https://travis-ci.org/keystone-engine/keystone.svg?branch=master)](https://travis-ci.org/keystone-engine/keystone) +[![Build Status](https://semaphoreci.com/api/v1/aquynh/keystone/branches/master/badge.svg)](https://semaphoreci.com/aquynh/keystone) +[![Build status](https://ci.appveyor.com/api/projects/status/c27slvyrijiejvqs?svg=true)](https://ci.appveyor.com/project/aquynh/keystone) + +Keystone is a lightweight multi-platform, multi-architecture assembler framework. +It offers some unparalleled features: + +- Multi-architecture, with support for Arm, Arm64 (AArch64/Armv8), Ethereum Virtual Machine, Hexagon, Mips, PowerPC, Sparc, SystemZ & X86 (include 16/32/64bit). +- Clean/simple/lightweight/intuitive architecture-neutral API. +- Implemented in C/C++ languages, with bindings for Java, Masm, C#, PowerShell, Perl, Python, NodeJS, Ruby, Go, Rust, Haskell, VB6 & OCaml available. +- Native support for Windows & \*nix (with Mac OSX, Linux, \*BSD & Solaris confirmed). +- Thread-safe by design. +- Open source - with a dual license. + +Keystone is based on LLVM, but it goes much further with [a lot more to offer](/docs/beyond_llvm.md). + +Further information is available at http://www.keystone-engine.org + + +License +------- + +Keystone is available under a dual license: + +- Version 2 of the GNU General Public License (GPLv2). (I.e. Without the "any later version" clause.). + License information can be found in the [COPYING file](COPYING) and the [EXCEPTIONS-CLIENT file](EXCEPTIONS-CLIENT). + + This combination allows almost all of open source projects to use Keystone without conflicts. + +- For commercial usage in production environments, contact the authors of Keystone to buy a royalty-free license. + + See [LICENSE-COM.TXT](LICENSE-COM.TXT) for more information. + + +Compilation & Docs +------------------ + +See [COMPILE.md](docs/COMPILE.md) file for how to compile and install Keystone. + +More documentation is available in [docs/README.md](docs/README.md). + + +Contact +------- + +[Contact us](http://www.keystone-engine.org/contact/) via mailing list, email or twitter for any questions. + + +Contribute +---------- + +Keystone is impossible without generous support from [our sponsors](/SPONSORS.TXT). We cannot thank them enough! + +[CREDITS.TXT](CREDITS.TXT) records other important contributors of our project. + +If you want to contribute, please pick up something from our [Github issues](https://github.com/keystone-engine/keystone/issues). + +We also maintain a list of more challenged problems in a [TODO list](https://github.com/keystone-engine/keystone/wiki/TODO). + + diff --git a/RELEASE_NOTES b/RELEASE_NOTES new file mode 100644 index 0000000..728dce9 --- /dev/null +++ b/RELEASE_NOTES @@ -0,0 +1,6 @@ +Version 0.9.2 works quite well for all architectures, but is known to not be able +to deal with some malformed craft input. In such a case, Keystone usually exits +with some error messages. Report if you experience this issue, so we can fix +that in the next release. + +See details of open bugs at https://github.com/keystone-engine/keystone/issues diff --git a/SPONSORS.TXT b/SPONSORS.TXT new file mode 100644 index 0000000..06fbeed --- /dev/null +++ b/SPONSORS.TXT @@ -0,0 +1,8 @@ +This file lists all the sponsors of Keystone Engine. +Thanks a lot for your great support! +---------------------------------------------------- + +Mike Guidry +Synacktiv Digital Security (www.synacktiv.com) +Tim "diff" Strazzere +Veris Group (www.verisgroup.com) diff --git a/bindings/Makefile b/bindings/Makefile new file mode 100644 index 0000000..85799b6 --- /dev/null +++ b/bindings/Makefile @@ -0,0 +1,87 @@ +# Keystone Engine +# By Nguyen Anh Quynh & Dang Hoang Vu, 2015 +TMPDIR = /tmp/keystone_sample + +DIFF = diff -u -w + +SAMPLE_ARM = $(TMPDIR)/sample_arm +SAMPLE_ARM64 = $(TMPDIR)/sample_arm64 +SAMPLE_MIPS = $(TMPDIR)/sample_mips +SAMPLE_M68K = $(TMPDIR)/sample_m68k +SAMPLE_SPARC = $(TMPDIR)/sample_sparc +SAMPLE_X86 = $(TMPDIR)/sample_x86 + +.PHONY: all expected python rust go nodejs ruby + +all: + cd python && $(MAKE) gen_const + cd nodejs && $(MAKE) gen_const + python const_generator.py rust + python const_generator.py go + cd ruby && $(MAKE) gen_const + python const_generator.py powershell + +samples: expected python + +sample_python: expected python + +expected: + cd ../samples && $(MAKE) + mkdir -p $(TMPDIR) + ../samples/sample_arm > $(SAMPLE_ARM)_e + ../samples/sample_arm64 > $(SAMPLE_ARM64)_e + ../samples/sample_mips > $(SAMPLE_MIPS)_e + ../samples/sample_sparc > $(SAMPLE_SPARC)_e + ../samples/sample_m68k > $(SAMPLE_M68K)_e + ../samples/sample_x86 > $(SAMPLE_X86)_e + +python: FORCE + cd python && $(MAKE) + python python/sample_arm.py > $(SAMPLE_ARM)_o + python python/sample_arm64.py > $(SAMPLE_ARM64)_o + python python/sample_mips.py > $(SAMPLE_MIPS)_o + python python/sample_sparc.py > $(SAMPLE_SPARC)_o + python python/sample_m68k.py > $(SAMPLE_M68K)_o + python python/sample_x86.py > $(SAMPLE_X86)_o + $(MAKE) sample_diff + +ruby: FORCE + cd ruby && $(MAKE) + +nodejs: FORCE + cd nodejs && $(MAKE) + +rust: FORCE + cd rust && $(MAKE) + +go: FORCE + cd go && $(MAKE) + +ocaml: FORCE + cd ocaml && $(MAKE) + +sample_diff: FORCE + $(DIFF) $(SAMPLE_ARM)_e $(SAMPLE_ARM)_o + $(DIFF) $(SAMPLE_ARM64)_e $(SAMPLE_ARM64)_o + $(DIFF) $(SAMPLE_MIPS)_e $(SAMPLE_MIPS)_o + $(DIFF) $(SAMPLE_SPARC)_e $(SAMPLE_SPARC)_o + $(DIFF) $(SAMPLE_M68K)_e $(SAMPLE_M68K)_o + $(DIFF) $(SAMPLE_X86)_e $(SAMPLE_X86)_o + +clean: + rm -rf $(TMPDIR) + cd python && $(MAKE) clean + cd rust && $(MAKE) clean + cd go && $(MAKE) clean + cd nodejs && $(MAKE) clean + cd ruby && $(MAKE) clean + cd ocaml && $(MAKE) clean + +check: + cd python && $(MAKE) check + cd rust && $(MAKE) check + cd go && $(MAKE) check + cd nodejs && $(MAKE) check + cd ruby && $(MAKE) check + +FORCE: diff --git a/bindings/README b/bindings/README new file mode 100644 index 0000000..db56513 --- /dev/null +++ b/bindings/README @@ -0,0 +1,23 @@ +This directory contains bindings for Keystone. +See /README* for how to install each binding. + +Except Python, all other bindings are contributed by community. + +- NodeJS binding: by Ingmar Steen +- Ruby binding: by Sascha Schirra +- Go binding: by Remco Verhoef +- Rust binding: by Remco Verhoef +- Haskell binding: by Adrian Herrera +- OCaml binding: by Aziem Chawdhary +- PowerShell binding: by Ruben Boonen +- C# binding: by Marco Fornaro +- VB6 binding: by David Zimmer +- Masm binding: by mrfearless +- Java binding: by Jämes Ménétrey (ZenLulz) + +Other bindings maintained externally by community: + +- Perl-Keystone: Perl binding made by @t00sh. + https://github.com/t00sh/perl-keystone +- keystone-rs: Rust binding by @tathanhdinh + https://github.com/tathanhdinh/keystone-rs diff --git a/bindings/const_generator.py b/bindings/const_generator.py new file mode 100644 index 0000000..575bb79 --- /dev/null +++ b/bindings/const_generator.py @@ -0,0 +1,430 @@ +# Keystone Engine +# Adapted from the code of Dang Hoang Vu for Capstone Engine, 2013 +from __future__ import print_function +import sys, re, os + +INCL_DIR = os.path.join('..', 'include', 'keystone') + +# NOTE: this reflects the value of KS_ERR_ASM_xxx in keystone.h +ks_err_val = { 'KS_ERR_ASM': '128', 'KS_ERR_ASM_ARCH': '512' } + +include = [ 'arm.h', 'arm64.h', 'mips.h', 'x86.h', 'sparc.h', 'ppc.h', 'systemz.h', 'hexagon.h', 'evm.h', 'keystone.h' ] + +def CamelCase(s): + # return re.sub(r'(\w)+\_?', lambda m:m.group(0).capitalize(), s) + return ''.join(''.join([w[0].upper(), w[1:].lower()]) for w in s.split('_')) + +template = { + 'powershell': { + 'header': "/// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [%s_h.cs]\n", + 'footer': "", + 'out_file': './powershell/Keystone/Const/%s_h.cs', + # prefixes for constant filenames of all archs - case sensitive + 'keystone.h': 'keystone', + 'comment_open': '///', + 'comment_close': '', + 'rules': [ + { + 'regex': r'.*', + 'line_format': 'KS_{0} = {1},\n', + 'fn': (lambda x: x), + }, + ] + }, + 'rust': { + 'header': "#![allow(non_camel_case_types)]\n// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [%s_const.rs]\nuse ::libc::*;\n", + 'footer': "", + # prefixes for constant filenames of all archs - case sensitive + 'arm.h': 'keystone', + 'arm64.h': 'keystone', + 'mips.h': 'keystone', + 'x86.h': 'keystone', + 'sparc.h': 'keystone', + 'systemz.h': 'keystone', + 'ppc.h': 'keystone', + 'hexagon.h': 'keystone', + 'evm.h': 'keystone', + 'keystone.h': 'keystone', + 'comment_open': '/*', + 'comment_close': '*/', + 'out_file': './rust/keystone-sys/src/%s_const.rs', + 'rules': [ + { + 'regex': r'(API)_.*', + 'pre': '\n', + 'line_format': 'pub const {0}: c_uint = {1};\n', + 'fn': (lambda x: x), + }, + { 'regex': r'MODE_.*', + 'pre': '\n' + + 'bitflags! {{\n' + + '#[repr(C)]\n' + + ' pub struct Mode: c_int {{\n', + 'line_format': ' const {0} = {1};\n', + 'fn': (lambda x: '_'.join(x.split('_')[1:]) if not re.match(r'MODE_\d+', x) else x), + 'post': ' }\n}', + }, + { + 'regex': r'ARCH_.*', + 'pre': '\n' + + '#[repr(C)]\n' + + '#[derive(Debug, PartialEq, Clone, Copy)]\n' + + 'pub enum Arch {{\n', + 'line_format': ' {0} = {1},\n', + 'fn': (lambda x: '_'.join(x.split('_')[1:])), + 'post': '}\n', + }, + { + 'regex': r'(OPT_([A-Z]+)|OPT_SYM_RESOLVER)$', + 'pre': '#[repr(C)]\n' + + '#[derive(Debug, PartialEq, Clone, Copy)]\n' + + 'pub enum OptionType {{\n', + 'line_format': ' {0} = {1},\n', + 'fn': (lambda x: '_'.join(x.split('_')[1:])), + 'post': '}\n', + }, + { + 'regex': r'OPT_(?!SYM)([A-Z]+\_)+[A-Z]+', + 'pre': 'bitflags! {{\n' + '#[repr(C)]\n' + + ' pub struct OptionValue: size_t {{\n', + 'line_format': ' const {0} = {1};\n', + 'fn': (lambda x: '_'.join(x.split('_')[1:])), + 'post': ' }\n}\n', + }, + { + 'regex': r'ERR_(.*)', + 'pre': 'bitflags! {{\n' + + '#[repr(C)]\n' + + ' pub struct Error: c_int {{\n', + 'line_format': ' const {0} = {1};\n', + 'fn': (lambda x: '_'.join(x.split('_')[1:])), + 'post': ' }\n}', + }, + ], + }, + 'go': { + 'header': "package keystone\n// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [%s_const.go]\n\n", + 'footer': "", + # prefixes for constant filenames of all archs - case sensitive + 'arm.h': 'arm', + 'arm64.h': 'arm64', + 'mips.h': 'mips', + 'x86.h': 'x86', + 'sparc.h': 'sparc', + 'systemz.h': 'systemz', + 'ppc.h': 'ppc', + 'hexagon.h': 'hexagon', + 'evm.h': 'evm', + 'keystone.h': 'keystone', + 'comment_open': '/*', + 'comment_close': '*/', + 'out_file': './go/keystone/%s_const.go', + 'rules': [ + { + 'regex': r'API_.*', + 'pre': 'const (\n', + 'line_format': '\t{0} = {1}\n', + 'fn': (lambda x: x), + 'post': ')\n', + }, + { 'regex': r'MODE_.*', + 'pre': 'const (\n', + 'line_format': '\t{0} Mode = {1}\n', + 'fn': (lambda x: x), + 'post': ')\n', + }, + { + 'regex': r'ARCH_.*', + 'pre': 'const (\n', + 'line_format': '\t{0} Architecture = {1}\n', + 'fn': (lambda x: x), + 'post': ')\n', + }, + { + 'regex': r'OPT_([A-Z]+)$', + 'pre': 'const (\n', + 'line_format': '\t{0} OptionType = {1}\n', + 'fn': (lambda x: x), + 'post': ')\n', + }, + { + 'regex': r'OPT_([A-Z]+\_)+[A-Z]+', + 'pre': 'const (\n', + 'line_format': '\t{0} OptionValue = {1}\n', + 'fn': (lambda x: x), + 'post': ')\n', + }, + { + 'regex': r'ERR_.*', + 'pre': 'const (\n', + 'line_format': '\t{0} Error = {1}\n', + 'fn': (lambda x: x), + 'post': ')\n', + }, + ] + }, + 'python': { + 'header': "# For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [%s_const.py]\n", + 'footer': "", + 'out_file': './python/keystone/%s_const.py', + # prefixes for constant filenames of all archs - case sensitive + 'arm.h': 'arm', + 'arm64.h': 'arm64', + 'mips.h': 'mips', + 'x86.h': 'x86', + 'sparc.h': 'sparc', + 'systemz.h': 'systemz', + 'ppc.h': 'ppc', + 'hexagon.h': 'hexagon', + 'evm.h': 'evm', + 'keystone.h': 'keystone', + 'comment_open': '#', + 'comment_close': '', + 'rules': [ + { + 'regex': r'.*', + 'line_format': 'KS_{0} = {1}\n', + 'fn': (lambda x: x), + }, + ] + }, + 'nodejs': { + 'header': "// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [%s_const.js]\n", + 'footer': "", + 'out_file': './nodejs/consts/%s.js', + # prefixes for constant filenames of all archs - case sensitive + 'arm.h': 'arm', + 'arm64.h': 'arm64', + 'mips.h': 'mips', + 'x86.h': 'x86', + 'sparc.h': 'sparc', + 'systemz.h': 'systemz', + 'ppc.h': 'ppc', + 'hexagon.h': 'hexagon', + 'evm.h': 'evm', + 'keystone.h': 'keystone', + 'comment_open': '//', + 'comment_close': '', + 'rules': [ + { + 'regex': r'.*', + 'line_format': 'module.exports.{0} = {1}\n', + 'fn': (lambda x: x), + }, + ] + }, + 'ruby': { + 'header': "# For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [%s_const.rb]\n\nmodule Keystone\n", + 'footer': "end", + 'out_file': './ruby/keystone_gem/lib/keystone/%s_const.rb', + # prefixes for constant filenames of all archs - case sensitive + 'arm.h': 'arm', + 'arm64.h': 'arm64', + 'mips.h': 'mips', + 'x86.h': 'x86', + 'sparc.h': 'sparc', + 'systemz.h': 'systemz', + 'ppc.h': 'ppc', + 'hexagon.h': 'hexagon', + 'evm.h': 'evm', + 'keystone.h': 'keystone', + 'comment_open': '#', + 'comment_close': '', + 'rules': [ + { + 'regex': r'.*', + 'line_format': '\tKS_{0} = {1}\n', + 'fn': (lambda x: x), + }, + ] + }, + 'csharp': { + 'header': "// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [%sConstants.cs]\nnamespace KeystoneNET\n{", + 'footer': "}", + 'out_file': './csharp/KeystoneNET/KeystoneNET/Constants/%sConstants.cs', + # prefixes for constant filenames of all archs - case sensitive + 'keystone.h': 'keystone', + 'arm.h': 'arm', + 'arm64.h': 'arm64', + 'mips.h': 'mips', + 'x86.h': 'x86', + 'sparc.h': 'sparc', + 'systemz.h': 'systemz', + 'ppc.h': 'ppc', + 'hexagon.h': 'hexagon', + 'evm.h': 'evm', + 'keystone.h': 'keystone', + 'comment_open': '//', + 'comment_close': '', + 'rules': [ + { + 'regex': r'(ARCH)_.*', + 'pre': '\n\tpublic enum KeystoneArchitecture : int\n\t{{\n', + 'post': '\t}', + 'line_format': '\t\tKS_{0} = {1},\n', + 'fn': (lambda x: x), + }, + { + 'regex': r'(MODE)_.*', + 'pre': '\n\tpublic enum KeystoneMode : uint\n\t{{\n', + 'post': '\t}', + 'line_format': '\t\tKS_{0} = {1},\n', + 'fn': (lambda x: x), + }, + { + 'regex': r'(ERR)_.*', + 'pre': '\n\tpublic enum {0}Error : short\n\t{{\n', + 'post': '\t}', + 'line_format': '\t\tKS_{0} = {1},\n', + 'fn': (lambda x: x), + }, + { + 'regex': r'((OPT_([A-Z]+))|(OPT_SYM_RESOLVER))$', + 'pre': '\n\tpublic enum KeystoneOptionType : short\n\t{{\n', + 'post': '\t}', + 'line_format': '\t\tKS_{0} = {1},\n', + 'fn': (lambda x: x), + }, + { + 'regex': r'OPT_(?!SYM)([A-Z]+\_)+[A-Z]+', + 'pre': '\n\tpublic enum KeystoneOptionValue : short\n\t{{\n', + 'post': '\t}', + 'line_format': '\t\tKS_{0} = {1},\n', + 'fn': (lambda x: x), + }, + ] + }, +} + +# markup for comments to be added to autogen files +MARKUP = '//>' + +def gen(lang): + global include, INCL_DIR + + consts = {} + + templ = template[lang] + for target in include: + if target not in templ: + continue + prefix = templ[target] + if target == 'keystone.h': + prefix = 'keystone' + lines = open(os.path.join(INCL_DIR, target)).readlines() + + consts[prefix] = [] + + previous = {} + count = 0 + for line in lines: + line = line.strip() + + if line.startswith(MARKUP): # markup for comments + outfile.write(("\n%s%s%s\n" %(templ['comment_open'], \ + line.replace(MARKUP, ''), templ['comment_close'])).encode("utf-8")) + continue + + if line == '' or line.startswith('//'): + continue + + tmp = line.strip().split(',') + for t in tmp: + t = t.strip() + if not t or t.startswith('//'): continue + f = re.split('\s+', t) + + # parse #define KS_TARGET (num) + define = False + if f[0] == '#define' and len(f) >= 3: + define = True + f.pop(0) + f.insert(1, '=') + + # if f[0].startswith("KS_" + prefix.upper()): + if f[0].startswith("KS_"): + if len(f) > 1 and f[1] not in ('//', '='): + print("WARNING: Unable to convert %s" % f) + print(" Line =", line) + continue + elif len(f) > 1 and f[1] == '=': + rhs = ''.join(f[2:]) + else: + rhs = str(count) + + lhs = f[0].strip() + # evaluate bitshifts in constants e.g. "KS_X86 = 1 << 1" + match = re.match(r'(?P\s*\d+\s*<<\s*\d+\s*)', rhs) + if match: + rhs = str(eval(match.group(1))) + else: + # evaluate references to other constants e.g. "KS_ARM_REG_X = KS_ARM_REG_SP" + match = re.match(r'^([^\d]\w+)$', rhs) + if match: + try: + rhs = previous[match.group(1)] + except: + rhs = match.group(1) + + if not rhs.isdigit(): + for k, v in previous.items(): + rhs = re.sub(r'\b%s\b' % k, v, rhs) + try: + rhs = str(eval(rhs)) + except: + rhs = ks_err_val[rhs] + + lhs_strip = re.sub(r'^KS_', '', lhs) + consts[prefix].append((lhs_strip, rhs)) + + count = int(rhs) + 1 + + previous[lhs] = str(rhs) + + + rules = templ['rules'] + + for prefix in consts.keys(): + outfile = open(templ['out_file'] % prefix, 'wb') # open as binary prevents windows newlines + outfile.write (templ['header'] % prefix) + + for rule in rules: + regex = rule['regex'] + + consts2 = [] + for const in consts.get(prefix): + if not (re.match(regex, const[0])): + continue + + consts2.append(const) + + if len(consts2) == 0: + continue + + if rule.get('pre'): + outfile.write(rule.get('pre').format(CamelCase(prefix))) + + for const in consts2: + lhs_strip = const[0] + rhs = const[1] + outfile.write(rule['line_format'].format(rule['fn'](lhs_strip), rhs, lhs_strip).encode("utf-8")) + + if rule.get('post'): + outfile.write (rule.get('post')) + outfile.write ('\n') + + outfile.write (templ['footer']) + outfile.close() + +def main(): + lang = sys.argv[1] + if not lang in template: + raise RuntimeError("Unsupported binding %s" % lang) + gen(sys.argv[1]) + +if __name__ == "__main__": + if len(sys.argv) < 2: + print("Usage:", sys.argv[0], " ") + sys.exit(1) + main() diff --git a/bindings/csharp/.gitattributes b/bindings/csharp/.gitattributes new file mode 100644 index 0000000..1ff0c42 --- /dev/null +++ b/bindings/csharp/.gitattributes @@ -0,0 +1,63 @@ +############################################################################### +# Set default behavior to automatically normalize line endings. +############################################################################### +* text=auto + +############################################################################### +# Set default behavior for command prompt diff. +# +# This is need for earlier builds of msysgit that does not have it on by +# default for csharp files. +# Note: This is only used by command line +############################################################################### +#*.cs diff=csharp + +############################################################################### +# Set the merge driver for project and solution files +# +# Merging from the command prompt will add diff markers to the files if there +# are conflicts (Merging from VS is not affected by the settings below, in VS +# the diff markers are never inserted). Diff markers may cause the following +# file extensions to fail to load in VS. An alternative would be to treat +# these files as binary and thus will always conflict and require user +# intervention with every merge. To do so, just uncomment the entries below +############################################################################### +#*.sln merge=binary +#*.csproj merge=binary +#*.vbproj merge=binary +#*.vcxproj merge=binary +#*.vcproj merge=binary +#*.dbproj merge=binary +#*.fsproj merge=binary +#*.lsproj merge=binary +#*.wixproj merge=binary +#*.modelproj merge=binary +#*.sqlproj merge=binary +#*.wwaproj merge=binary + +############################################################################### +# behavior for image files +# +# image files are treated as binary by default. +############################################################################### +#*.jpg binary +#*.png binary +#*.gif binary + +############################################################################### +# diff behavior for common document formats +# +# Convert binary document formats to text before diffing them. This feature +# is only available from the command line. Turn it on by uncommenting the +# entries below. +############################################################################### +#*.doc diff=astextplain +#*.DOC diff=astextplain +#*.docx diff=astextplain +#*.DOCX diff=astextplain +#*.dot diff=astextplain +#*.DOT diff=astextplain +#*.pdf diff=astextplain +#*.PDF diff=astextplain +#*.rtf diff=astextplain +#*.RTF diff=astextplain diff --git a/bindings/csharp/.gitignore b/bindings/csharp/.gitignore new file mode 100644 index 0000000..dd5d9ca --- /dev/null +++ b/bindings/csharp/.gitignore @@ -0,0 +1,246 @@ +## Ignore Visual Studio temporary files, build results, and +## files generated by popular Visual Studio add-ons. + +# User-specific files +*.suo +*.user +*.userosscache +*.sln.docstates + +# User-specific files (MonoDevelop/Xamarin Studio) +*.userprefs + +# Build results +[Dd]ebug/ +[Dd]ebugPublic/ +[Rr]elease/ +[Rr]eleases/ +[Xx]64/ +[Xx]86/ +[Bb]uild/ +bld/ +[Bb]in/ +[Oo]bj/ + +# Visual Studio 2015 cache/options directory +.vs/ +# Uncomment if you have tasks that create the project's static files in wwwroot +#wwwroot/ + +# MSTest test Results +[Tt]est[Rr]esult*/ +[Bb]uild[Ll]og.* + +# NUNIT +*.VisualState.xml +TestResult.xml + +# Build Results of an ATL Project +[Dd]ebugPS/ +[Rr]eleasePS/ +dlldata.c + +# DNX +project.lock.json +artifacts/ + +*_i.c +*_p.c +*_i.h +*.ilk +*.meta +*.obj +*.pch +*.pdb +*.pgc +*.pgd +*.rsp +*.sbr +*.tlb +*.tli +*.tlh +*.tmp +*.tmp_proj +*.log +*.vspscc +*.vssscc +.builds +*.pidb +*.svclog +*.scc + +# Chutzpah Test files +_Chutzpah* + +# Visual C++ cache files +ipch/ +*.aps +*.ncb +*.opendb +*.opensdf +*.sdf +*.cachefile +*.VC.db + +# Visual Studio profiler +*.psess +*.vsp +*.vspx +*.sap + +# TFS 2012 Local Workspace +$tf/ + +# Guidance Automation Toolkit +*.gpState + +# ReSharper is a .NET coding add-in +_ReSharper*/ +*.[Rr]e[Ss]harper +*.DotSettings.user + +# JustCode is a .NET coding add-in +.JustCode + +# TeamCity is a build add-in +_TeamCity* + +# DotCover is a Code Coverage Tool +*.dotCover + +# NCrunch +_NCrunch_* +.*crunch*.local.xml +nCrunchTemp_* + +# MightyMoose +*.mm.* +AutoTest.Net/ + +# Web workbench (sass) +.sass-cache/ + +# Installshield output folder +[Ee]xpress/ + +# DocProject is a documentation generator add-in +DocProject/buildhelp/ +DocProject/Help/*.HxT +DocProject/Help/*.HxC +DocProject/Help/*.hhc +DocProject/Help/*.hhk +DocProject/Help/*.hhp +DocProject/Help/Html2 +DocProject/Help/html + +# Click-Once directory +publish/ + +# Publish Web Output +*.[Pp]ublish.xml +*.azurePubxml + +# TODO: Un-comment the next line if you do not want to checkin +# your web deploy settings because they may include unencrypted +# passwords +#*.pubxml +*.publishproj + +# NuGet Packages +*.nupkg +# The packages folder can be ignored because of Package Restore +**/packages/* +# except build/, which is used as an MSBuild target. +!**/packages/build/ +# Uncomment if necessary however generally it will be regenerated when needed +#!**/packages/repositories.config +# NuGet v3's project.json files produces more ignoreable files +*.nuget.props +*.nuget.targets + +# Microsoft Azure Build Output +csx/ +*.build.csdef + +# Microsoft Azure Emulator +ecf/ +rcf/ + +# Microsoft Azure ApplicationInsights config file +ApplicationInsights.config + +# Windows Store app package directory +AppPackages/ +BundleArtifacts/ + +# Visual Studio cache files +# files ending in .cache can be ignored +*.[Cc]ache +# but keep track of directories ending in .cache +!*.[Cc]ache/ + +# Others +ClientBin/ +[Ss]tyle[Cc]op.* +~$* +*~ +*.dbmdl +*.dbproj.schemaview +*.pfx +*.publishsettings +node_modules/ +orleans.codegen.cs + +# RIA/Silverlight projects +Generated_Code/ + +# Backup & report files from converting an old project file +# to a newer Visual Studio version. Backup files are not needed, +# because we have git ;-) +_UpgradeReport_Files/ +Backup*/ +UpgradeLog*.XML +UpgradeLog*.htm + +# SQL Server files +*.mdf +*.ldf + +# Business Intelligence projects +*.rdl.data +*.bim.layout +*.bim_*.settings + +# Microsoft Fakes +FakesAssemblies/ + +# GhostDoc plugin setting file +*.GhostDoc.xml + +# Node.js Tools for Visual Studio +.ntvs_analysis.dat + +# Visual Studio 6 build log +*.plg + +# Visual Studio 6 workspace options file +*.opt + +# Visual Studio LightSwitch build output +**/*.HTMLClient/GeneratedArtifacts +**/*.DesktopClient/GeneratedArtifacts +**/*.DesktopClient/ModelManifest.xml +**/*.Server/GeneratedArtifacts +**/*.Server/ModelManifest.xml +_Pvt_Extensions + +# LightSwitch generated files +GeneratedArtifacts/ +ModelManifest.xml + +# Paket dependency manager +.paket/paket.exe + +# FAKE - F# Make +.fake/ +/keystone/keystone.dll diff --git a/bindings/csharp/Keystone.Net.Tests/Keystone.Net.Tests.csproj b/bindings/csharp/Keystone.Net.Tests/Keystone.Net.Tests.csproj new file mode 100644 index 0000000..6dd30b6 --- /dev/null +++ b/bindings/csharp/Keystone.Net.Tests/Keystone.Net.Tests.csproj @@ -0,0 +1,20 @@ + + + + netcoreapp2.0 + Keystone.Tests + false + + + + + + + + + + + + + + diff --git a/bindings/csharp/Keystone.Net.Tests/Tests.cs b/bindings/csharp/Keystone.Net.Tests/Tests.cs new file mode 100644 index 0000000..a3abc65 --- /dev/null +++ b/bindings/csharp/Keystone.Net.Tests/Tests.cs @@ -0,0 +1,78 @@ +using System; +using NUnit.Framework; +using Shouldly; + +namespace Keystone.Tests +{ + [TestFixture] + public class ExecutionTests + { + [OneTimeSetUp] + public static void InitializeKeystone() + { + // Ensures the lib could be loaded + Engine.IsArchitectureSupported(Architecture.X86).ShouldBeTrue(); + } + + [Test] + public void ShouldEmitValidX86Data() + { + using (Engine engine = new Engine(Architecture.X86, Mode.X32) { ThrowOnError = true }) + { + engine.Assemble("nop", 0).Buffer.ShouldBe(new byte[] { 0x90 }); + engine.Assemble("add eax, eax", 0).Buffer.ShouldBe(new byte[] { 0x01, 0xC0 }); + } + } + + [Test] + public void ShouldEmitValidARMData() + { + using (Engine engine = new Engine(Architecture.ARM, Mode.ARM) { ThrowOnError = true }) + { + engine.Assemble("mul r1, r0, r0", 0).Buffer.ShouldBe(new byte[] { 0x90, 0x00, 0x01, 0xE0 }); + } + } + + [Test] + public void ShouldThrowOnError() + { + using (Engine engine = new Engine(Architecture.ARM, Mode.ARM) { ThrowOnError = false }) + { + engine.Assemble("push eax, 0x42", 0).ShouldBeNull(); + engine.Assemble("doesntexist", 0).ShouldBeNull(); + } + + using (Engine engine = new Engine(Architecture.ARM, Mode.ARM) { ThrowOnError = true }) + { + Should.Throw(() => engine.Assemble("push eax, 0x42", 0)); + Should.Throw(() => engine.Assemble("doestexist", 0)); + } + } + + [Test, Ignore("Feature requires Keystone built after October 7th 2016.")] + public void ShouldHaveValidExample() + { + using (Engine keystone = new Engine(Architecture.X86, Mode.X32) { ThrowOnError = true }) + { + ulong address = 0; + + keystone.ResolveSymbol += (string s, ref ulong w) => + { + if (s == "_j1") + { + w = 0x1234abcd; + return true; + } + + return false; + }; + + EncodedData enc = keystone.Assemble("xor eax, eax; jmp _j1", address); + + enc.Buffer.ShouldBe(new byte[] { 0x00 }); + enc.Address.ShouldBe(address); + enc.StatementCount.ShouldBe(3); + } + } + } +} diff --git a/bindings/csharp/Keystone.Net.sln b/bindings/csharp/Keystone.Net.sln new file mode 100644 index 0000000..16da386 --- /dev/null +++ b/bindings/csharp/Keystone.Net.sln @@ -0,0 +1,50 @@ +Microsoft Visual Studio Solution File, Format Version 12.00 +# Visual Studio 15 +VisualStudioVersion = 15.0.27130.2036 +MinimumVisualStudioVersion = 15.0.26124.0 +Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Keystone.Net", "Keystone.Net\Keystone.Net.csproj", "{E3579F77-600A-4146-9296-3834B81F16E2}" +EndProject +Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "Keystone.Net.Tests", "Keystone.Net.Tests\Keystone.Net.Tests.csproj", "{377B6FDC-156F-4B8B-B693-2A5C7B604A97}" +EndProject +Global + GlobalSection(SolutionConfigurationPlatforms) = preSolution + Debug|Any CPU = Debug|Any CPU + Debug|x64 = Debug|x64 + Debug|x86 = Debug|x86 + Release|Any CPU = Release|Any CPU + Release|x64 = Release|x64 + Release|x86 = Release|x86 + EndGlobalSection + GlobalSection(ProjectConfigurationPlatforms) = postSolution + {E3579F77-600A-4146-9296-3834B81F16E2}.Debug|Any CPU.ActiveCfg = Debug|Any CPU + {E3579F77-600A-4146-9296-3834B81F16E2}.Debug|Any CPU.Build.0 = Debug|Any CPU + {E3579F77-600A-4146-9296-3834B81F16E2}.Debug|x64.ActiveCfg = Debug|Any CPU + {E3579F77-600A-4146-9296-3834B81F16E2}.Debug|x64.Build.0 = Debug|Any CPU + {E3579F77-600A-4146-9296-3834B81F16E2}.Debug|x86.ActiveCfg = Debug|Any CPU + {E3579F77-600A-4146-9296-3834B81F16E2}.Debug|x86.Build.0 = Debug|Any CPU + {E3579F77-600A-4146-9296-3834B81F16E2}.Release|Any CPU.ActiveCfg = Release|Any CPU + {E3579F77-600A-4146-9296-3834B81F16E2}.Release|Any CPU.Build.0 = Release|Any CPU + {E3579F77-600A-4146-9296-3834B81F16E2}.Release|x64.ActiveCfg = Release|Any CPU + {E3579F77-600A-4146-9296-3834B81F16E2}.Release|x64.Build.0 = Release|Any CPU + {E3579F77-600A-4146-9296-3834B81F16E2}.Release|x86.ActiveCfg = Release|Any CPU + {E3579F77-600A-4146-9296-3834B81F16E2}.Release|x86.Build.0 = Release|Any CPU + {377B6FDC-156F-4B8B-B693-2A5C7B604A97}.Debug|Any CPU.ActiveCfg = Debug|Any CPU + {377B6FDC-156F-4B8B-B693-2A5C7B604A97}.Debug|Any CPU.Build.0 = Debug|Any CPU + {377B6FDC-156F-4B8B-B693-2A5C7B604A97}.Debug|x64.ActiveCfg = Debug|Any CPU + {377B6FDC-156F-4B8B-B693-2A5C7B604A97}.Debug|x64.Build.0 = Debug|Any CPU + {377B6FDC-156F-4B8B-B693-2A5C7B604A97}.Debug|x86.ActiveCfg = Debug|Any CPU + {377B6FDC-156F-4B8B-B693-2A5C7B604A97}.Debug|x86.Build.0 = Debug|Any CPU + {377B6FDC-156F-4B8B-B693-2A5C7B604A97}.Release|Any CPU.ActiveCfg = Release|Any CPU + {377B6FDC-156F-4B8B-B693-2A5C7B604A97}.Release|Any CPU.Build.0 = Release|Any CPU + {377B6FDC-156F-4B8B-B693-2A5C7B604A97}.Release|x64.ActiveCfg = Release|Any CPU + {377B6FDC-156F-4B8B-B693-2A5C7B604A97}.Release|x64.Build.0 = Release|Any CPU + {377B6FDC-156F-4B8B-B693-2A5C7B604A97}.Release|x86.ActiveCfg = Release|Any CPU + {377B6FDC-156F-4B8B-B693-2A5C7B604A97}.Release|x86.Build.0 = Release|Any CPU + EndGlobalSection + GlobalSection(SolutionProperties) = preSolution + HideSolutionNode = FALSE + EndGlobalSection + GlobalSection(ExtensibilityGlobals) = postSolution + SolutionGuid = {0DA5689F-C570-41D7-93A8-F33F20F4B618} + EndGlobalSection +EndGlobal diff --git a/bindings/csharp/Keystone.Net/Constants/ARM64Constants.cs b/bindings/csharp/Keystone.Net/Constants/ARM64Constants.cs new file mode 100644 index 0000000..33eb545 --- /dev/null +++ b/bindings/csharp/Keystone.Net/Constants/ARM64Constants.cs @@ -0,0 +1,10 @@ +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [arm64Constants.cs] +namespace Keystone +{ + public enum Arm64Error : short + { + KS_ERR_ASM_ARM64_INVALIDOPERAND = 512, + KS_ERR_ASM_ARM64_MISSINGFEATURE = 513, + KS_ERR_ASM_ARM64_MNEMONICFAIL = 514, + } +} \ No newline at end of file diff --git a/bindings/csharp/Keystone.Net/Constants/ARMConstants.cs b/bindings/csharp/Keystone.Net/Constants/ARMConstants.cs new file mode 100644 index 0000000..f8d0c27 --- /dev/null +++ b/bindings/csharp/Keystone.Net/Constants/ARMConstants.cs @@ -0,0 +1,10 @@ +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [armConstants.cs] +namespace Keystone +{ + public enum ArmError : short + { + KS_ERR_ASM_ARM_INVALIDOPERAND = 512, + KS_ERR_ASM_ARM_MISSINGFEATURE = 513, + KS_ERR_ASM_ARM_MNEMONICFAIL = 514, + } +} \ No newline at end of file diff --git a/bindings/csharp/Keystone.Net/Constants/HexagonConstants.cs b/bindings/csharp/Keystone.Net/Constants/HexagonConstants.cs new file mode 100644 index 0000000..bfb0da9 --- /dev/null +++ b/bindings/csharp/Keystone.Net/Constants/HexagonConstants.cs @@ -0,0 +1,10 @@ +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [hexagonConstants.cs] +namespace Keystone +{ + public enum HexagonError : short + { + KS_ERR_ASM_HEXAGON_INVALIDOPERAND = 512, + KS_ERR_ASM_HEXAGON_MISSINGFEATURE = 513, + KS_ERR_ASM_HEXAGON_MNEMONICFAIL = 514, + } +} \ No newline at end of file diff --git a/bindings/csharp/Keystone.Net/Constants/KeystoneConstants.cs b/bindings/csharp/Keystone.Net/Constants/KeystoneConstants.cs new file mode 100644 index 0000000..124e524 --- /dev/null +++ b/bindings/csharp/Keystone.Net/Constants/KeystoneConstants.cs @@ -0,0 +1,107 @@ +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [keystoneConstants.cs] +namespace Keystone +{ + public enum Architecture : int + { + ARM = 1, + ARM64 = 2, + MIPS = 3, + X86 = 4, + PPC = 5, + SPARC = 6, + SYSTEMZ = 7, + HEXAGON = 8, + MAX = 9, + } + + public enum Mode : uint + { + LITTLE_ENDIAN = 0, + BIG_ENDIAN = 1073741824, + ARM = 1, + THUMB = 16, + V8 = 64, + MICRO = 16, + MIPS3 = 32, + MIPS32R6 = 64, + MIPS32 = 4, + MIPS64 = 8, + X16 = 2, + X32 = 4, + X64 = 8, + PPC32 = 4, + PPC64 = 8, + QPX = 16, + SPARC32 = 4, + SPARC64 = 8, + V9 = 16, + } + + public enum KeystoneError : short + { + KS_ERR_ASM = 128, + KS_ERR_ASM_ARCH = 512, + KS_ERR_OK = 0, + KS_ERR_NOMEM = 1, + KS_ERR_ARCH = 2, + KS_ERR_HANDLE = 3, + KS_ERR_MODE = 4, + KS_ERR_VERSION = 5, + KS_ERR_OPT_INVALID = 6, + KS_ERR_ASM_EXPR_TOKEN = 128, + KS_ERR_ASM_DIRECTIVE_VALUE_RANGE = 129, + KS_ERR_ASM_DIRECTIVE_ID = 130, + KS_ERR_ASM_DIRECTIVE_TOKEN = 131, + KS_ERR_ASM_DIRECTIVE_STR = 132, + KS_ERR_ASM_DIRECTIVE_COMMA = 133, + KS_ERR_ASM_DIRECTIVE_RELOC_NAME = 134, + KS_ERR_ASM_DIRECTIVE_RELOC_TOKEN = 135, + KS_ERR_ASM_DIRECTIVE_FPOINT = 136, + KS_ERR_ASM_DIRECTIVE_UNKNOWN = 137, + KS_ERR_ASM_DIRECTIVE_EQU = 138, + KS_ERR_ASM_DIRECTIVE_INVALID = 139, + KS_ERR_ASM_VARIANT_INVALID = 140, + KS_ERR_ASM_EXPR_BRACKET = 141, + KS_ERR_ASM_SYMBOL_MODIFIER = 142, + KS_ERR_ASM_SYMBOL_REDEFINED = 143, + KS_ERR_ASM_SYMBOL_MISSING = 144, + KS_ERR_ASM_RPAREN = 145, + KS_ERR_ASM_STAT_TOKEN = 146, + KS_ERR_ASM_UNSUPPORTED = 147, + KS_ERR_ASM_MACRO_TOKEN = 148, + KS_ERR_ASM_MACRO_PAREN = 149, + KS_ERR_ASM_MACRO_EQU = 150, + KS_ERR_ASM_MACRO_ARGS = 151, + KS_ERR_ASM_MACRO_LEVELS_EXCEED = 152, + KS_ERR_ASM_MACRO_STR = 153, + KS_ERR_ASM_MACRO_INVALID = 154, + KS_ERR_ASM_ESC_BACKSLASH = 155, + KS_ERR_ASM_ESC_OCTAL = 156, + KS_ERR_ASM_ESC_SEQUENCE = 157, + KS_ERR_ASM_ESC_STR = 158, + KS_ERR_ASM_TOKEN_INVALID = 159, + KS_ERR_ASM_INSN_UNSUPPORTED = 160, + KS_ERR_ASM_FIXUP_INVALID = 161, + KS_ERR_ASM_LABEL_INVALID = 162, + KS_ERR_ASM_FRAGMENT_INVALID = 163, + KS_ERR_ASM_INVALIDOPERAND = 512, + KS_ERR_ASM_MISSINGFEATURE = 513, + KS_ERR_ASM_MNEMONICFAIL = 514 + } + + public enum OptionType : int + { + SYNTAX = 1, + SYM_RESOLVER = 2, + } + + public enum OptionValue : short + { + SYNTAX_INTEL = 1, + SYNTAX_ATT = 2, + SYNTAX_NASM = 4, + SYNTAX_MASM = 8, + SYNTAX_GAS = 16, + SYNTAX_RADIX16 = 32 + } +} \ No newline at end of file diff --git a/bindings/csharp/Keystone.Net/Constants/MipsConstants.cs b/bindings/csharp/Keystone.Net/Constants/MipsConstants.cs new file mode 100644 index 0000000..99be03d --- /dev/null +++ b/bindings/csharp/Keystone.Net/Constants/MipsConstants.cs @@ -0,0 +1,10 @@ +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [mipsConstants.cs] +namespace Keystone +{ + public enum MipsError : short + { + KS_ERR_ASM_MIPS_INVALIDOPERAND = 512, + KS_ERR_ASM_MIPS_MISSINGFEATURE = 513, + KS_ERR_ASM_MIPS_MNEMONICFAIL = 514, + } +} \ No newline at end of file diff --git a/bindings/csharp/Keystone.Net/Constants/PPCConstants.cs b/bindings/csharp/Keystone.Net/Constants/PPCConstants.cs new file mode 100644 index 0000000..601585a --- /dev/null +++ b/bindings/csharp/Keystone.Net/Constants/PPCConstants.cs @@ -0,0 +1,10 @@ +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [ppcConstants.cs] +namespace Keystone +{ + public enum PpcError : short + { + KS_ERR_ASM_PPC_INVALIDOPERAND = 512, + KS_ERR_ASM_PPC_MISSINGFEATURE = 513, + KS_ERR_ASM_PPC_MNEMONICFAIL = 514, + } +} \ No newline at end of file diff --git a/bindings/csharp/Keystone.Net/Constants/SPARCConstants.cs b/bindings/csharp/Keystone.Net/Constants/SPARCConstants.cs new file mode 100644 index 0000000..6de93d2 --- /dev/null +++ b/bindings/csharp/Keystone.Net/Constants/SPARCConstants.cs @@ -0,0 +1,10 @@ +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [sparcConstants.cs] +namespace Keystone +{ + public enum SparcError : short + { + KS_ERR_ASM_SPARC_INVALIDOPERAND = 512, + KS_ERR_ASM_SPARC_MISSINGFEATURE = 513, + KS_ERR_ASM_SPARC_MNEMONICFAIL = 514, + } +} \ No newline at end of file diff --git a/bindings/csharp/Keystone.Net/Constants/SystemZConstants.cs b/bindings/csharp/Keystone.Net/Constants/SystemZConstants.cs new file mode 100644 index 0000000..d2b6132 --- /dev/null +++ b/bindings/csharp/Keystone.Net/Constants/SystemZConstants.cs @@ -0,0 +1,10 @@ +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [systemzConstants.cs] +namespace Keystone +{ + public enum SystemzError : short + { + KS_ERR_ASM_SYSTEMZ_INVALIDOPERAND = 512, + KS_ERR_ASM_SYSTEMZ_MISSINGFEATURE = 513, + KS_ERR_ASM_SYSTEMZ_MNEMONICFAIL = 514, + } +} \ No newline at end of file diff --git a/bindings/csharp/Keystone.Net/Constants/X86Constants.cs b/bindings/csharp/Keystone.Net/Constants/X86Constants.cs new file mode 100644 index 0000000..79743f7 --- /dev/null +++ b/bindings/csharp/Keystone.Net/Constants/X86Constants.cs @@ -0,0 +1,10 @@ +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [x86Constants.cs] +namespace Keystone +{ + public enum X86Error : short + { + KS_ERR_ASM_X86_INVALIDOPERAND = 512, + KS_ERR_ASM_X86_MISSINGFEATURE = 513, + KS_ERR_ASM_X86_MNEMONICFAIL = 514, + } +} \ No newline at end of file diff --git a/bindings/csharp/Keystone.Net/EncodedData.cs b/bindings/csharp/Keystone.Net/EncodedData.cs new file mode 100644 index 0000000..675cb3a --- /dev/null +++ b/bindings/csharp/Keystone.Net/EncodedData.cs @@ -0,0 +1,33 @@ +namespace Keystone +{ + /// + /// Defines an encoded instruction or group of instructions. + /// + public sealed class EncodedData + { + /// + /// Constructs the encoded data. + /// + internal EncodedData(byte[] buffer, int statementCount, ulong address) + { + Buffer = buffer; + Address = address; + StatementCount = statementCount; + } + + /// + /// Gets the address of the first instruction for this operation. + /// + public ulong Address { get; } + + /// + /// Gets the result of an assembly operation. + /// + public byte[] Buffer { get; } + + /// + /// Gets the number of statements found. + /// + public int StatementCount { get; } + } +} diff --git a/bindings/csharp/Keystone.Net/Engine.cs b/bindings/csharp/Keystone.Net/Engine.cs new file mode 100644 index 0000000..86f2a04 --- /dev/null +++ b/bindings/csharp/Keystone.Net/Engine.cs @@ -0,0 +1,370 @@ +using System; +using System.Collections.Generic; +using System.IO; +using System.Runtime.InteropServices; +using System.Threading; + +namespace Keystone +{ + /// + /// Represents a Keystone engine. + /// + public sealed class Engine : IDisposable + { + private IntPtr engine = IntPtr.Zero; + private bool addedResolveSymbol; + + private readonly ResolverInternal internalImpl; + private readonly List resolvers = new List(); + + [UnmanagedFunctionPointer(CallingConvention.Cdecl)] + private delegate bool ResolverInternal(IntPtr symbol, ref ulong value); + + + /// + /// Gets or sets a value that represents whether a + /// should be thrown on error. + /// + public bool ThrowOnError { get; set; } + + /// + /// Delegate for defining symbol resolvers. + /// + /// Symbol to resolve. + /// Address of taid symbol, if found. + /// Whether the symbol was recognized. + public delegate bool Resolver(string symbol, ref ulong value); + + /// + /// Event raised when keystone is resolving a symbol. + /// + /// This event is only available on Keystone 0.9.2 or higher. + public event Resolver ResolveSymbol + { + add + { + if (!addedResolveSymbol) + { + KeystoneError err = NativeInterop.SetOption(engine, (int)OptionType.SYM_RESOLVER, Marshal.GetFunctionPointerForDelegate(internalImpl)); + + if (err == KeystoneError.KS_ERR_OK) + addedResolveSymbol = true; + else + throw new KeystoneException("Could not add symbol resolver", err); + } + + resolvers.Add(value); + } + + remove + { + if (addedResolveSymbol && resolvers.Count == 0) + { + KeystoneError err = NativeInterop.SetOption(engine, (int)OptionType.SYM_RESOLVER, IntPtr.Zero); + + if (err == KeystoneError.KS_ERR_OK) + addedResolveSymbol = false; + else + throw new KeystoneException("Could not remove symbol resolver", err); + } + + resolvers.Remove(value); + } + } + + /// + /// Method used for symbol resolving. + /// + /// Pointer to the name of the symbol. + /// Address of the symbol, if found. + /// Whether the symbol could be recognized. + private bool ResolveSymbolInternal(IntPtr symbolPtr, ref ulong value) + { + string symbol = Marshal.PtrToStringAnsi(symbolPtr); + + foreach (Resolver item in resolvers) + { + bool result = item(symbol, ref value); + if (result) + return true; + } + + return false; + } + + /// + /// Constructs the engine with a given architecture and a given mode. + /// + /// The target architecture. + /// The mode, i.e. endianness, word size etc. + /// + /// Some architectures are not supported. + /// Check with if the engine + /// supports the target architecture. + /// + public Engine(Architecture architecture, Mode mode) + { + internalImpl = ResolveSymbolInternal; + + var result = NativeInterop.Open(architecture, (int)mode, ref engine); + + if (result != KeystoneError.KS_ERR_OK) + throw new KeystoneException("Error while initializing keystone", result); + } + + /// + /// Sets an option in the engine. + /// + /// Type of the option. + /// Value it the option. + /// Whether the option was correctly set. + /// An error encountered when setting the option. + public bool SetOption(OptionType type, uint value) + { + var result = NativeInterop.SetOption(engine, (int)type, (IntPtr)value); + + if (result != KeystoneError.KS_ERR_OK) + { + if (ThrowOnError) + throw new KeystoneException("Error while setting option", result); + + return false; + } + + return true; + } + + /// + /// Encodes the given statement(s). + /// + /// String that contains the statements to encode. + /// Address of the first instruction to encode. + /// Size of the buffer produced by the operation. + /// Number of statements found and encoded. + /// Result of the operation, or null if it failed and is false. + /// A null argument was given. + /// An error encountered when encoding the instructions. + public byte[] Assemble(string toEncode, ulong address, out int size, out int statementCount) + { + if (toEncode == null) + throw new ArgumentNullException(nameof(toEncode)); + + int result = NativeInterop.Assemble(engine, + toEncode, + address, + out IntPtr encoding, + out uint size_, + out uint statementCount_); + + if (result != 0) + { + if (ThrowOnError) + throw new KeystoneException("Error while assembling instructions", GetLastKeystoneError()); + + size = statementCount = 0; + + return null; + } + + size = (int)size_; + statementCount = (int)statementCount_; + + byte[] buffer = new byte[size]; + + Marshal.Copy(encoding, buffer, 0, size); + NativeInterop.Free(encoding); + + return buffer; + } + + /// + /// Encodes the given statement(s). + /// + /// String that contains the statements to encode. + /// Address of the first instruction to encode. + /// Result of the operation, or null if it failed and is false. + /// A null argument was given. + /// An error encountered when encoding the instructions. + public EncodedData Assemble(string toEncode, ulong address) + { + byte[] buffer = Assemble(toEncode, address, out int size, out int statementCount); + + if (buffer == null) + return null; + + return new EncodedData(buffer, statementCount, address); + } + + /// + /// Encodes the given statement(s) into the given buffer. + /// + /// String that contains the statements to encode. + /// Address of the first instruction to encode. + /// Buffer into which the data shall be written. + /// Index into the buffer after which the data shall be written. + /// Number of statements found and encoded. + /// Size of the data writen by the operation., or 0 if it failed and is false. + /// A null argument was given. + /// The provided index is invalid. + /// An error encountered when encoding the instructions. + public int Assemble(string toEncode, ulong address, byte[] buffer, int index, out int statementCount) + { + if (toEncode == null) + throw new ArgumentNullException(nameof(toEncode)); + if (buffer == null) + throw new ArgumentNullException(nameof(buffer)); + if (index < 0 || index >= buffer.Length) + throw new ArgumentOutOfRangeException(nameof(buffer)); + + int result = NativeInterop.Assemble(engine, + toEncode, + address, + out IntPtr encoding, + out uint size_, + out uint statementCount_); + + int size = (int)size_; + + statementCount = (int)statementCount_; + + if (result != 0) + { + if (ThrowOnError) + throw new KeystoneException("Error while assembling instructions", GetLastKeystoneError()); + + return 0; + } + + Marshal.Copy(encoding, buffer, index, size); + NativeInterop.Free(encoding); + + return size; + } + + /// + /// Encodes the given statement(s) into the given buffer. + /// + /// String that contains the statements to encode. + /// Address of the first instruction to encode. + /// Buffer into which the data shall be written. + /// Index into the buffer after which the data shall be written. + /// Size of the data writen by the operation., or 0 if it failed and is false. + /// A null argument was given. + /// The provided index is invalid. + /// An error encountered when encoding the instructions. + public int Assemble(string toEncode, ulong address, byte[] buffer, int index) + { + return Assemble(toEncode, address, buffer, index, out _); + } + + /// + /// Encodes the given statement(s) into the given stream. + /// + /// String that contains the statements to encode. + /// Address of the first instruction to encode. + /// Buffer into which the data shall be written. + /// Size of the buffer produced by the operation. + /// Number of statements found and encoded. + /// true on success, or false if it failed and is false. + /// A null argument was given. + /// An error encountered when encoding the instructions. + public bool Assemble(string toEncode, ulong address, Stream stream, out int size, out int statementCount) + { + if (stream == null) + throw new ArgumentNullException(nameof(stream)); + + byte[] enc = Assemble(toEncode, address, out size, out statementCount); + + if (enc == null) + return false; + + stream.Write(enc, 0, size); + + return true; + } + + /// + /// Encodes the given statement(s) into the given stream. + /// + /// String that contains the statements to encode. + /// Address of the first instruction to encode. + /// Buffer into which the data shall be written. + /// Size of the buffer produced by the operation. + /// true on success, or false if it failed and is false. + /// A null argument was given. + /// An error encountered when encoding the instructions. + public bool Assemble(string toEncode, ulong address, Stream stream, out int size) + { + return Assemble(toEncode, address, stream, out size, out _); + } + + /// + /// Encodes the given statement(s) into the given stream. + /// + /// String that contains the statements to encode. + /// Address of the first instruction to encode. + /// Buffer into which the data shall be written. + /// true on success, or false if it failed and is false. + /// A null argument was given. + /// An error encountered when encoding the instructions. + public bool Assemble(string toEncode, ulong address, Stream stream) + { + return Assemble(toEncode, address, stream, out _, out _); + } + + /// + /// Gets the last error for this instance. + /// + /// The last error code. + /// + /// It might not retain its old error once accessed. + /// + public KeystoneError GetLastKeystoneError() + { + return NativeInterop.GetLastKeystoneError(engine); + } + + /// + /// Returns the string associated with a given error code. + /// + public static string ErrorToString(KeystoneError code) + { + IntPtr error = NativeInterop.ErrorToString(code); + + if (error != IntPtr.Zero) + return Marshal.PtrToStringAnsi(error); + + return string.Empty; + } + + /// + /// Checks if the given architecture is supported. + /// + public static bool IsArchitectureSupported(Architecture architecture) + { + return NativeInterop.IsArchitectureSupported(architecture); + } + + /// + /// Gets the version of the engine. + /// + /// Major version number. + /// Minor version number. + /// Unique identifier for this version. + public static uint GetKeystoneVersion(ref uint major, ref uint minor) + { + return NativeInterop.Version(ref major, ref minor); + } + + /// + /// Releases the engine. + /// + public void Dispose() + { + IntPtr currentEngine = Interlocked.Exchange(ref engine, IntPtr.Zero); + + if (currentEngine != IntPtr.Zero) + NativeInterop.Close(currentEngine); + } + } +} diff --git a/bindings/csharp/Keystone.Net/Keystone.Net.csproj b/bindings/csharp/Keystone.Net/Keystone.Net.csproj new file mode 100644 index 0000000..ab55366 --- /dev/null +++ b/bindings/csharp/Keystone.Net/Keystone.Net.csproj @@ -0,0 +1,28 @@ + + + + netstandard1.1 + Keystone + + 1.1.0 + $(Version) + $(Version).0 + + .NET bindings to the Keystone Engine. + Grégoire Geis + + Keystone.Net + $(Version) + False + - First release. + assembler x86 arm keystone + + https://github.com/keystone-engine/keystone + $(PackageProjectUrl)/blob/master/COPYING + http://www.keystone-engine.org/images/keystone.png + + $(PackageProjectUrl).git + git + + + diff --git a/bindings/csharp/Keystone.Net/KeystoneException.cs b/bindings/csharp/Keystone.Net/KeystoneException.cs new file mode 100644 index 0000000..4b16247 --- /dev/null +++ b/bindings/csharp/Keystone.Net/KeystoneException.cs @@ -0,0 +1,30 @@ +using System; +using System.Diagnostics; +using System.Runtime.InteropServices; + +namespace Keystone +{ + /// + /// Represents an error encountered while encoding one or more instructions. + /// + public sealed class KeystoneException : Exception + { + /// + /// Gets the value that represents the encountered error. + /// + public KeystoneError Error { get; } + + internal KeystoneException(string message, KeystoneError error) : base(message + '.') + { + Debug.Assert(error != KeystoneError.KS_ERR_OK); + + Error = error; + } + + /// + public override string ToString() + { + return $"{Message}: {Engine.ErrorToString(Error)}."; + } + } +} diff --git a/bindings/csharp/Keystone.Net/NativeInterop.cs b/bindings/csharp/Keystone.Net/NativeInterop.cs new file mode 100644 index 0000000..b910e2f --- /dev/null +++ b/bindings/csharp/Keystone.Net/NativeInterop.cs @@ -0,0 +1,66 @@ +using System; +using System.Runtime.InteropServices; + +namespace Keystone +{ + /// + /// Imported symbols for interop with keystone.dll. + /// + internal class NativeInterop + { + // This shouldn't be needed, even on Windows + // /// + // /// Taken from: http://stackoverflow.com/questions/10852634/using-a-32bit-or-64bit-dll-in-c-sharp-dllimport + // /// + // static NativeInterop() + // { + // var myPath = new Uri(typeof(NativeInterop).Assembly.CodeBase).LocalPath; + // var myFolder = Path.GetDirectoryName(myPath); + + // var is64 = IntPtr.Size == 8; + // var subfolder = is64 ? "\\win64\\" : "\\win32\\"; + + // string dllPosition = myFolder + subfolder + "keystone.dll"; + + // // If this file exist, load it. + // // Otherwise let the marshaller load the appropriate file. + // if (File.Exists(dllPosition)) + // LoadLibrary(dllPosition); + // } + + // [DllImport("kernel32.dll")] + // private static extern IntPtr LoadLibrary(string dllToLoad); + + [DllImport("keystone", CallingConvention = CallingConvention.Cdecl, EntryPoint = "ks_version" )] + internal static extern uint Version(ref uint major, ref uint minor); + + [DllImport("keystone", CallingConvention = CallingConvention.Cdecl, EntryPoint = "ks_open")] + internal static extern KeystoneError Open(Architecture arch, int mode, ref IntPtr ks); + + [DllImport("keystone", CallingConvention = CallingConvention.Cdecl, EntryPoint = "ks_close")] + internal static extern KeystoneError Close(IntPtr ks); + + [DllImport("keystone", CallingConvention = CallingConvention.Cdecl, EntryPoint = "ks_free")] + internal static extern void Free(IntPtr buffer); + + [DllImport("keystone", CallingConvention = CallingConvention.Cdecl, EntryPoint = "ks_strerror")] + internal static extern IntPtr ErrorToString(KeystoneError code); + + [DllImport("keystone", CallingConvention = CallingConvention.Cdecl, EntryPoint = "ks_errno")] + internal static extern KeystoneError GetLastKeystoneError(IntPtr ks); + + [DllImport("keystone", CallingConvention = CallingConvention.Cdecl, EntryPoint = "ks_arch_supported")] + internal static extern bool IsArchitectureSupported(Architecture arch); + + [DllImport("keystone", CallingConvention = CallingConvention.Cdecl, EntryPoint = "ks_option")] + internal static extern KeystoneError SetOption(IntPtr ks, int type, IntPtr value); + + [DllImport("keystone", CallingConvention = CallingConvention.Cdecl, EntryPoint = "ks_asm")] + internal static extern int Assemble(IntPtr ks, + [MarshalAs(UnmanagedType.LPStr)] string toEncode, + ulong baseAddress, + out IntPtr encoding, + out uint size, + out uint statements); + } +} diff --git a/bindings/csharp/MIGRATION.md b/bindings/csharp/MIGRATION.md new file mode 100644 index 0000000..3ef4c5f --- /dev/null +++ b/bindings/csharp/MIGRATION.md @@ -0,0 +1,83 @@ +# Changes + +### Names +- The `KeystoneNET` namespace was renamed to `Keystone`. +- The `Keystone` and `KeystoneEncoded` classes were respectively renamed to `Engine` and `EncodedData`. +- The `KeystoneArchitecture`, `KeystoneMode`, `KeystoneOptionType` and `KeystoneOptionValue` enums had their names changed, dropping the `Keystone` prefix (ie: `Architecture`, `Mode`, ...). Furthermore, their members were renamed, dropping the `KS_MODE_`, `KS_ARCH_`, and `KS_OPT_` prefixes. + +### The `Engine` class +- The `Engine` constructor no longer takes `bool throwOnError`. Instead, the public `ThrowOnError` property now has both a getter and a setter, making it possible to alter the error behavior after initialization. +- Errors are no longer reported as `InvalidOperationException`, but instead as `KeystoneException`, a custom class which stores the returned error code. +- An error encountered in the constructor or when setting `ResolveSymbol` will throw an exception, regardless of the value of `ThrowOnError`. +- `AppendAssemble` was renamed to `Assemble`, and no longer accepts `ICollection`. Instead it accepts a `byte[]` buffer and an `int` index, and writes much more efficiently into it. A new overload accepting a `Stream` has also been added. +- The `out uint statements` parameter has been replaced by an `out int statementCount` parameter. It will always be positive, but better integrates into the C# language. + +# Examples + +### Namespace +```csharp +using KeystoneNET; +``` +becomes +```csharp +using Keystone; +``` + +### Initialization +```csharp +using (var ks = new Keystone(KeystoneArchitecture.KS_ARCH_X86, + KeystoneMode.KS_MODE_32, + throwOnError: false)) +{ +} +``` +becomes +```csharp +using (var ks = new Engine(Architecture.X86, Mode.X32) + { ThrowOnError = true }) +{ +} +``` + +### Catching errors +```csharp +try +{ + ks.SymbolResolver += Callback; +} +catch (InvalidOperationException e) +{ + Console.WriteLine(e); +} +``` +becomes +```csharp +try +{ + ks.SymbolResolver += Callback; +} +catch (KeystoneException e) +{ + Console.WriteLine(e); +} +``` + +### Assembling data +```csharp +var data = new List(); + +ks.AppendAssemble("add eax, eax", data); +``` +becomes +```csharp +var data = new byte[1024]; + +ks.Assemble("add eax, eax", data); +``` +or +```csharp +using (var ms = new MemoryStream()) +{ + ks.Assemble("add eax, eax", ms); +} +``` diff --git a/bindings/csharp/README.md b/bindings/csharp/README.md new file mode 100644 index 0000000..7e7e768 --- /dev/null +++ b/bindings/csharp/README.md @@ -0,0 +1,32 @@ +# Keystone.Net +.NET Standard bindings for Keystone. + +## Usage +```csharp +using Keystone; + +using (Engine keystone = new Engine(Architecture.X86, Mode.X32) { ThrowOnError = true }) +{ + ulong address = 0; + + keystone.ResolveSymbol += (string s, ref ulong w) => + { + if (s == "_j1") + { + w = 0x1234abcd; + return true; + } + + return false; + }; + + EncodedData enc = keystone.Assemble("xor eax, eax; jmp _j1", address); + + enc.Buffer.ShouldBe(new byte[] { 0x00 }); + enc.Address.ShouldBe(address); + enc.StatementCount.ShouldBe(3); +} +``` + +For those who already used the bindings before their last update, many things have changed. +You can migrate your existing code easily using the [migration guide](./MIGRATON.md). diff --git a/bindings/go/Makefile b/bindings/go/Makefile new file mode 100644 index 0000000..468d7ec --- /dev/null +++ b/bindings/go/Makefile @@ -0,0 +1,21 @@ +# Go binding for Keystone engine. Remco Verhoef + +ifndef BUILDDIR +OBJDIR = ./build +else +OBJDIR = $(abspath $(BUILDDIR))/obj/bindings/go +endif + +.PHONY: gen_const install clean check + +gen_const: + cd .. && python const_generator.py go + go fmt + +install: + cd keystone && go build + +clean: + +check: + cd keystone && go test diff --git a/bindings/go/README.md b/bindings/go/README.md new file mode 100644 index 0000000..e3a6103 --- /dev/null +++ b/bindings/go/README.md @@ -0,0 +1,43 @@ +# keystone +Go bindings for the [keystone](http://www.keystone-engine.org/) engine. + +## Sample +```go +package main + +import ( + "fmt" + "os" + + "github.com/keystone-engine/keystone/bindings/go/keystone" +) + +func main() { + assembly := os.Args[1] + + ks, err := keystone.New(keystone.ARCH_X86, keystone.MODE_32) + if err != nil { + panic(err) + } + defer ks.Close() + + if err := ks.Option(keystone.OPT_SYNTAX, keystone.OPT_SYNTAX_INTEL); err != nil { + panic(fmt.Errorf("Could not set syntax option to intel")) + } + + if insn, _, ok := ks.Assemble(assembly, 0); !ok { + panic(fmt.Errorf("Could not assemble instruction")) + } else { + fmt.Printf("%s: [%x]", assembly, insn) + } +} +``` + +## Testing + +``` +go test +``` + +## Contributors +- Remco Verhoef (@remco_verhoef) diff --git a/bindings/go/keystone/arm64_const.go b/bindings/go/keystone/arm64_const.go new file mode 100644 index 0000000..971a3ff --- /dev/null +++ b/bindings/go/keystone/arm64_const.go @@ -0,0 +1,9 @@ +package keystone +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [arm64_const.go] + +const ( + ERR_ASM_ARM64_INVALIDOPERAND Error = 512 + ERR_ASM_ARM64_MISSINGFEATURE Error = 513 + ERR_ASM_ARM64_MNEMONICFAIL Error = 514 +) + diff --git a/bindings/go/keystone/arm_const.go b/bindings/go/keystone/arm_const.go new file mode 100644 index 0000000..154949d --- /dev/null +++ b/bindings/go/keystone/arm_const.go @@ -0,0 +1,9 @@ +package keystone +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [arm_const.go] + +const ( + ERR_ASM_ARM_INVALIDOPERAND Error = 512 + ERR_ASM_ARM_MISSINGFEATURE Error = 513 + ERR_ASM_ARM_MNEMONICFAIL Error = 514 +) + diff --git a/bindings/go/keystone/evm_const.go b/bindings/go/keystone/evm_const.go new file mode 100644 index 0000000..cfe7c9c --- /dev/null +++ b/bindings/go/keystone/evm_const.go @@ -0,0 +1,9 @@ +package keystone +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [evm_const.go] + +const ( + ERR_ASM_EVM_INVALIDOPERAND Error = 512 + ERR_ASM_EVM_MISSINGFEATURE Error = 513 + ERR_ASM_EVM_MNEMONICFAIL Error = 514 +) + diff --git a/bindings/go/keystone/hexagon_const.go b/bindings/go/keystone/hexagon_const.go new file mode 100644 index 0000000..a9e814e --- /dev/null +++ b/bindings/go/keystone/hexagon_const.go @@ -0,0 +1,9 @@ +package keystone +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [hexagon_const.go] + +const ( + ERR_ASM_HEXAGON_INVALIDOPERAND Error = 512 + ERR_ASM_HEXAGON_MISSINGFEATURE Error = 513 + ERR_ASM_HEXAGON_MNEMONICFAIL Error = 514 +) + diff --git a/bindings/go/keystone/keystone-binding.go b/bindings/go/keystone/keystone-binding.go new file mode 100644 index 0000000..ee92fc9 --- /dev/null +++ b/bindings/go/keystone/keystone-binding.go @@ -0,0 +1,65 @@ +/* Keystone Assembler Engine (www.keystone-engine.org) */ +/* By Nguyen Anh Quynh , 2016 */ +/* Golang bindings by Remco Verhoef , 2016 */ + +// +build darwin,linux,cgo +package keystone + +// #cgo LDFLAGS: -lkeystone -lstdc++ -lm +// #include +import "C" +import "unsafe" + +func ks_version() (uint, uint) { + major := C.uint(0) + minor := C.uint(0) + C.ks_version(&major, &minor) + return uint(major), uint(minor) +} + +func ks_arch_supported(a Architecture) bool { + return bool(C.ks_arch_supported((C.ks_arch)(a))) +} + +func ks_open(a Architecture, m Mode, engine **C.ks_engine) error { + if err := C.ks_open((C.ks_arch)(a), (C.int)(m), (**C.ks_engine)(unsafe.Pointer(engine))); err != 0 { + return Error(err) + } + + return nil +} + +func ks_option(engine *C.ks_engine, type_ OptionType, value OptionValue) error { + if err := C.ks_option(engine, C.ks_opt_type(type_), C.size_t(value)); err != 0 { + return Error(err) + } + return nil +} + +func ks_errno(engine *C.ks_engine) error { + if err := C.ks_errno(engine); err != 0 { + return Error(err) + } + return nil +} + +func ks_asm(engine *C.ks_engine, str string, address uint64, encoding *[]byte, stat_count *uint64) bool { + cstr := C.CString(str) + defer C.free(unsafe.Pointer(cstr)) + + var p_insn unsafe.Pointer + defer C.free(unsafe.Pointer(p_insn)) + + var count, l_insn C.size_t + err := C.ks_asm(engine, cstr, C.uint64_t(address), (**C.uchar)(unsafe.Pointer(&p_insn)), &l_insn, &count) + *encoding = C.GoBytes(p_insn, C.int(l_insn)) + *stat_count = uint64(count) + return err == 0 +} + +func ks_close(engine *C.ks_engine) error { + if err := C.ks_close(engine); err != 0 { + return Error(err) + } + return nil +} diff --git a/bindings/go/keystone/keystone.go b/bindings/go/keystone/keystone.go new file mode 100644 index 0000000..8bdf372 --- /dev/null +++ b/bindings/go/keystone/keystone.go @@ -0,0 +1,67 @@ +/* Keystone Assembler Engine (www.keystone-engine.org) */ +/* By Nguyen Anh Quynh , 2016 */ +/* Golang bindings by Remco Verhoef , 2016 */ + +package keystone + +// #include +import "C" + +type Architecture uint + +type Mode uint + +type OptionType uint + +type OptionValue uint + +type Error uint32 + +func (e Error) Error() string { + s := C.ks_strerror((C.ks_err)(e)) + return C.GoString(s) +} + +func (a Architecture) Supported() bool { + return ks_arch_supported(a) +} + +func Version() (uint, uint) { + return ks_version() +} + +type Keystone struct { + engine *C.ks_engine +} + +func New(a Architecture, m Mode) (*Keystone, error) { + ks := &Keystone{} + if err := ks_open(a, m, &ks.engine); err != nil { + return nil, err + } else { + return ks, nil + } +} + +func (ks *Keystone) LastError() error { + return ks_errno(ks.engine) +} + +func (ks *Keystone) Option(type_ OptionType, value OptionValue) error { + if err := ks_option(ks.engine, type_, value); err != nil { + return err + } + + return nil +} + +func (ks *Keystone) Assemble(str string, address uint64) ([]byte, uint64, bool) { + encoding := []byte{} + stat_count := uint64(0) + ok := ks_asm(ks.engine, str, address, &encoding, &stat_count) + return encoding, stat_count, ok +} + +func (ks *Keystone) Close() error { + return ks_close(ks.engine) +} diff --git a/bindings/go/keystone/keystone_const.go b/bindings/go/keystone/keystone_const.go new file mode 100644 index 0000000..f78837c --- /dev/null +++ b/bindings/go/keystone/keystone_const.go @@ -0,0 +1,108 @@ +package keystone +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [keystone_const.go] + +const ( + API_MAJOR = 0 + API_MINOR = 9 +) + +const ( + MODE_LITTLE_ENDIAN Mode = 0 + MODE_BIG_ENDIAN Mode = 1073741824 + MODE_ARM Mode = 1 + MODE_THUMB Mode = 16 + MODE_V8 Mode = 64 + MODE_MICRO Mode = 16 + MODE_MIPS3 Mode = 32 + MODE_MIPS32R6 Mode = 64 + MODE_MIPS32 Mode = 4 + MODE_MIPS64 Mode = 8 + MODE_16 Mode = 2 + MODE_32 Mode = 4 + MODE_64 Mode = 8 + MODE_PPC32 Mode = 4 + MODE_PPC64 Mode = 8 + MODE_QPX Mode = 16 + MODE_SPARC32 Mode = 4 + MODE_SPARC64 Mode = 8 + MODE_V9 Mode = 16 +) + +const ( + ARCH_ARM Architecture = 1 + ARCH_ARM64 Architecture = 2 + ARCH_MIPS Architecture = 3 + ARCH_X86 Architecture = 4 + ARCH_PPC Architecture = 5 + ARCH_SPARC Architecture = 6 + ARCH_SYSTEMZ Architecture = 7 + ARCH_HEXAGON Architecture = 8 + ARCH_EVM Architecture = 9 + ARCH_MAX Architecture = 10 +) + +const ( + OPT_SYNTAX OptionType = 1 +) + +const ( + OPT_SYM_RESOLVER OptionValue = 2 + OPT_SYNTAX_INTEL OptionValue = 1 + OPT_SYNTAX_ATT OptionValue = 2 + OPT_SYNTAX_NASM OptionValue = 4 + OPT_SYNTAX_MASM OptionValue = 8 + OPT_SYNTAX_GAS OptionValue = 16 + OPT_SYNTAX_RADIX16 OptionValue = 32 +) + +const ( + ERR_ASM Error = 128 + ERR_ASM_ARCH Error = 512 + ERR_OK Error = 0 + ERR_NOMEM Error = 1 + ERR_ARCH Error = 2 + ERR_HANDLE Error = 3 + ERR_MODE Error = 4 + ERR_VERSION Error = 5 + ERR_OPT_INVALID Error = 6 + ERR_ASM_EXPR_TOKEN Error = 128 + ERR_ASM_DIRECTIVE_VALUE_RANGE Error = 129 + ERR_ASM_DIRECTIVE_ID Error = 130 + ERR_ASM_DIRECTIVE_TOKEN Error = 131 + ERR_ASM_DIRECTIVE_STR Error = 132 + ERR_ASM_DIRECTIVE_COMMA Error = 133 + ERR_ASM_DIRECTIVE_RELOC_NAME Error = 134 + ERR_ASM_DIRECTIVE_RELOC_TOKEN Error = 135 + ERR_ASM_DIRECTIVE_FPOINT Error = 136 + ERR_ASM_DIRECTIVE_UNKNOWN Error = 137 + ERR_ASM_DIRECTIVE_EQU Error = 138 + ERR_ASM_DIRECTIVE_INVALID Error = 139 + ERR_ASM_VARIANT_INVALID Error = 140 + ERR_ASM_EXPR_BRACKET Error = 141 + ERR_ASM_SYMBOL_MODIFIER Error = 142 + ERR_ASM_SYMBOL_REDEFINED Error = 143 + ERR_ASM_SYMBOL_MISSING Error = 144 + ERR_ASM_RPAREN Error = 145 + ERR_ASM_STAT_TOKEN Error = 146 + ERR_ASM_UNSUPPORTED Error = 147 + ERR_ASM_MACRO_TOKEN Error = 148 + ERR_ASM_MACRO_PAREN Error = 149 + ERR_ASM_MACRO_EQU Error = 150 + ERR_ASM_MACRO_ARGS Error = 151 + ERR_ASM_MACRO_LEVELS_EXCEED Error = 152 + ERR_ASM_MACRO_STR Error = 153 + ERR_ASM_MACRO_INVALID Error = 154 + ERR_ASM_ESC_BACKSLASH Error = 155 + ERR_ASM_ESC_OCTAL Error = 156 + ERR_ASM_ESC_SEQUENCE Error = 157 + ERR_ASM_ESC_STR Error = 158 + ERR_ASM_TOKEN_INVALID Error = 159 + ERR_ASM_INSN_UNSUPPORTED Error = 160 + ERR_ASM_FIXUP_INVALID Error = 161 + ERR_ASM_LABEL_INVALID Error = 162 + ERR_ASM_FRAGMENT_INVALID Error = 163 + ERR_ASM_INVALIDOPERAND Error = 512 + ERR_ASM_MISSINGFEATURE Error = 513 + ERR_ASM_MNEMONICFAIL Error = 514 +) + diff --git a/bindings/go/keystone/keystone_test.go b/bindings/go/keystone/keystone_test.go new file mode 100644 index 0000000..0f18997 --- /dev/null +++ b/bindings/go/keystone/keystone_test.go @@ -0,0 +1,66 @@ +/* Keystone Assembler Engine (www.keystone-engine.org) */ +/* By Nguyen Anh Quynh , 2016 */ +/* Golang bindings by Remco Verhoef , 2016 */ + +package keystone + +import ( + "fmt" + "reflect" + "testing" +) + +func TestVersion(t *testing.T) { + major, minor := Version() + if major == API_MAJOR && minor == API_MINOR { + } else { + t.Error(fmt.Errorf("Unexpected version: got %d.%d expected %d.%d", major, minor, 1, 0)) + } +} + +func TestArchitectureSupported(t *testing.T) { + if !ARCH_ARM.Supported() { + t.Error(fmt.Errorf("ARM not supported")) + } +} + +type Test struct { + Architecture Architecture + Mode Mode + Address uint64 + Assembly string + ExpectedResult []byte +} + +type Syntax struct { + Syntax OptionValue + Tests []Test +} + +var tests = []Syntax{ + Syntax{ + OPT_SYNTAX_INTEL, []Test{ + Test{ARCH_X86, MODE_32 | MODE_LITTLE_ENDIAN, 0, "mov ah, al", []byte{0x88, 0xc4}}, + }, + }, +} + +func TestRun(t *testing.T) { + for _, st := range tests { + for _, tr := range st.Tests { + if ks, err := New(tr.Architecture, tr.Mode); err != nil { + t.Error(err) + } else { + defer ks.Close() + + if err := ks.Option(OPT_SYNTAX, st.Syntax); err != nil { + t.Error(fmt.Errorf("Could not set syntax option to intel")) + } else if insn, _, ok := ks.Assemble(tr.Assembly, tr.Address); !ok { + t.Error(fmt.Errorf("Could not assemble instruction")) + } else if !reflect.DeepEqual(insn, tr.ExpectedResult) { + t.Error(fmt.Errorf("Not expected result: expected %#v got %#v", tr.ExpectedResult, insn)) + } + } + } + } +} diff --git a/bindings/go/keystone/mips_const.go b/bindings/go/keystone/mips_const.go new file mode 100644 index 0000000..da42fd0 --- /dev/null +++ b/bindings/go/keystone/mips_const.go @@ -0,0 +1,9 @@ +package keystone +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [mips_const.go] + +const ( + ERR_ASM_MIPS_INVALIDOPERAND Error = 512 + ERR_ASM_MIPS_MISSINGFEATURE Error = 513 + ERR_ASM_MIPS_MNEMONICFAIL Error = 514 +) + diff --git a/bindings/go/keystone/ppc_const.go b/bindings/go/keystone/ppc_const.go new file mode 100644 index 0000000..fd4cd19 --- /dev/null +++ b/bindings/go/keystone/ppc_const.go @@ -0,0 +1,9 @@ +package keystone +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [ppc_const.go] + +const ( + ERR_ASM_PPC_INVALIDOPERAND Error = 512 + ERR_ASM_PPC_MISSINGFEATURE Error = 513 + ERR_ASM_PPC_MNEMONICFAIL Error = 514 +) + diff --git a/bindings/go/keystone/samples/main.go b/bindings/go/keystone/samples/main.go new file mode 100644 index 0000000..e814a0c --- /dev/null +++ b/bindings/go/keystone/samples/main.go @@ -0,0 +1,32 @@ +/* Keystone Assembler Engine (www.keystone-engine.org) */ +/* By Nguyen Anh Quynh , 2016 */ +/* Golang bindings by Remco Verhoef , 2016 */ + +package main + +import ( + "fmt" + "os" + + "github.com/keystone-engine/keystone/bindings/go/keystone" +) + +func main() { + assembly := os.Args[1] + + ks, err := keystone.New(keystone.ARCH_X86, keystone.MODE_32) + if err != nil { + panic(err) + } + defer ks.Close() + + if err := ks.Option(keystone.OPT_SYNTAX, keystone.OPT_SYNTAX_INTEL); err != nil { + panic(fmt.Errorf("Could not set syntax option to intel")) + } + + if insn, _, ok := ks.Assemble(assembly, 0); !ok { + panic(fmt.Errorf("Could not assemble instruction")) + } else { + fmt.Printf("%s: [%x]", assembly, insn) + } +} diff --git a/bindings/go/keystone/sparc_const.go b/bindings/go/keystone/sparc_const.go new file mode 100644 index 0000000..0360571 --- /dev/null +++ b/bindings/go/keystone/sparc_const.go @@ -0,0 +1,9 @@ +package keystone +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [sparc_const.go] + +const ( + ERR_ASM_SPARC_INVALIDOPERAND Error = 512 + ERR_ASM_SPARC_MISSINGFEATURE Error = 513 + ERR_ASM_SPARC_MNEMONICFAIL Error = 514 +) + diff --git a/bindings/go/keystone/systemz_const.go b/bindings/go/keystone/systemz_const.go new file mode 100644 index 0000000..57404ee --- /dev/null +++ b/bindings/go/keystone/systemz_const.go @@ -0,0 +1,9 @@ +package keystone +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [systemz_const.go] + +const ( + ERR_ASM_SYSTEMZ_INVALIDOPERAND Error = 512 + ERR_ASM_SYSTEMZ_MISSINGFEATURE Error = 513 + ERR_ASM_SYSTEMZ_MNEMONICFAIL Error = 514 +) + diff --git a/bindings/go/keystone/x86_const.go b/bindings/go/keystone/x86_const.go new file mode 100644 index 0000000..cc7fc89 --- /dev/null +++ b/bindings/go/keystone/x86_const.go @@ -0,0 +1,9 @@ +package keystone +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [x86_const.go] + +const ( + ERR_ASM_X86_INVALIDOPERAND Error = 512 + ERR_ASM_X86_MISSINGFEATURE Error = 513 + ERR_ASM_X86_MNEMONICFAIL Error = 514 +) + diff --git a/bindings/haskell/.gitignore b/bindings/haskell/.gitignore new file mode 100644 index 0000000..1a24440 --- /dev/null +++ b/bindings/haskell/.gitignore @@ -0,0 +1,17 @@ +dist +cabal-dev +*.o +*.hi +*.chi +*.chs.h +*.dyn_o +*.dyn_hi +.virtualenv +.hpc +.hsenv +.cabal-sandbox/ +cabal.sandbox.config +*.prof +*.aux +*.hp +Sample diff --git a/bindings/haskell/README.md b/bindings/haskell/README.md new file mode 100644 index 0000000..3768de5 --- /dev/null +++ b/bindings/haskell/README.md @@ -0,0 +1,27 @@ +This documentation explains how to install the Keystone Haskell bindings from +source. + +1. Install the core Keystone Assembler as a dependency: + + Follow docs/COMPILE.md in the root directory to compile & install the core. +2. Change into the Haskell bindings directory, build and install: + + ``` +$ cd bindings/haskell +$ cabal install +``` + +If you are installing into a sandbox, run `cabal sandbox init` before +installing Keystone's dependencies. + +If the build fails, install c2hs manually `cabal install c2hs` (note that this +will probably also require you to run `cabal install alex` and `cabal install +happy` as well). If you are NOT using a sandbox, ensure that `$HOME/.cabal/bin` +is on your PATH. + +To build a sample (after having built and installed the Haskell bindings): + +``` +$ cd bindings/haskell +$ ghc --make samples/Sample.hs +``` diff --git a/bindings/haskell/Setup.hs b/bindings/haskell/Setup.hs new file mode 100644 index 0000000..9a994af --- /dev/null +++ b/bindings/haskell/Setup.hs @@ -0,0 +1,2 @@ +import Distribution.Simple +main = defaultMain diff --git a/bindings/haskell/keystone.cabal b/bindings/haskell/keystone.cabal new file mode 100644 index 0000000..e8b1603 --- /dev/null +++ b/bindings/haskell/keystone.cabal @@ -0,0 +1,38 @@ +-- Initial keystone.cabal generated by cabal init. For further +-- documentation, see http://haskell.org/cabal/users-guide/ + +name: keystone +version: 0.1.0.0 +synopsis: Keystone lightweight multi-platform, multi-architecture assembler framework +description: Haskell bindings for the Keystone assembler +homepage: https://github.com/keystone-engine/keystone +license: GPL-2 +author: Adrian Herrera +category: System +build-type: Simple +cabal-version: >= 1.10 + +library + exposed-modules: Keystone.Internal.Core + Keystone.Internal.Keystone + Keystone.CPU.Arm64 + Keystone.CPU.Arm + Keystone.CPU.Hexagon + Keystone.CPU.Mips + Keystone.CPU.Ppc + Keystone.CPU.Sparc + Keystone.CPU.SystemZ + Keystone.CPU.X86 + Keystone + other-modules: Keystone.Internal.Util + build-depends: base >= 4 && < 5 + , bytestring >= 0.9.1 + , transformers < 0.6 + , either >= 4.4 + hs-source-dirs: src + c-sources: src/cbits/keystone_wrapper.c + include-dirs: src/include + build-tools: c2hs + pkgconfig-depends: keystone + default-language: Haskell2010 + ghc-options: -Wall diff --git a/bindings/haskell/samples/Sample.hs b/bindings/haskell/samples/Sample.hs new file mode 100644 index 0000000..dba62ce --- /dev/null +++ b/bindings/haskell/samples/Sample.hs @@ -0,0 +1,74 @@ +-- Sample code for Keystone Assembler Engine. + +import Keystone + +import qualified Data.ByteString as BS +import Data.List (intercalate) +import qualified Numeric as N (showHex) + +-- Pretty-print byte string as hex. +showHexBS :: BS.ByteString + -> String +showHexBS = + concatMap (flip N.showHex " ") . BS.unpack + +testKs :: Architecture + -> [Mode] + -> [String] + -> Maybe OptionValue + -> IO () +testKs arch mode assembly maybeSyntax = do + result <- runAssembler $ do + ks <- open arch mode + case maybeSyntax of + Just syntax -> option ks OptSyntax syntax + Nothing -> return () + (encode, count) <- assemble ks assembly Nothing + return (encode, count) + case result of + Right (encode, count) -> let size = BS.length encode in do + putStr $ intercalate ";" assembly ++ " = " + putStrLn $ showHexBS encode + putStrLn $ "Assembled: " ++ show size ++ " bytes, " ++ + show count ++ " statements\n" + Left err -> putStrLn $ "Failed with error: " ++ show err ++ " (" ++ + strerror err ++ ")" + +main :: IO () +main = do + -- X86 + testKs ArchX86 [Mode16] ["add eax, ecx"] Nothing + testKs ArchX86 [Mode32] ["add eax, ecx"] Nothing + testKs ArchX86 [Mode64] ["add rax, rcx"] Nothing + testKs ArchX86 [Mode32] ["add %ecx, %eax"] (Just SyntaxAtt) + testKs ArchX86 [Mode64] ["add %rcx, %rax"] (Just SyntaxAtt) + + -- ARM + testKs ArchArm [ModeArm] ["sub r1, r2, r5"] Nothing + testKs ArchArm [ModeArm, ModeBigEndian] ["sub r1, r2, r5"] Nothing + testKs ArchArm [ModeThumb] ["movs r4, #0xf0"] Nothing + testKs ArchArm [ModeThumb, ModeBigEndian] ["movs r4, #0xf0"] Nothing + + -- ARM64 + testKs ArchArm64 [ModeLittleEndian] ["ldr w1, [sp, #0x8]"] Nothing + + -- Hexagon + testKs ArchHexagon [ModeBigEndian] ["v23.w=vavg(v11.w,v2.w):rnd"] Nothing + + -- MIPS + testKs ArchMips [ModeMips32] ["and $9, $6, $7"] Nothing + testKs ArchMips [ModeMips32, ModeBigEndian] ["and $9, $6, $7"] Nothing + testKs ArchMips [ModeMips64] ["and $9, $6, $7"] Nothing + testKs ArchMips [ModeMips64, ModeBigEndian] ["and $9, $6, $7"] Nothing + + -- PowerPC + testKs ArchPpc [ModePpc32, ModeBigEndian] ["add 1, 2, 3"] Nothing + testKs ArchPpc [ModePpc64] ["add 1, 2, 3"] Nothing + testKs ArchPpc [ModePpc64, ModeBigEndian] ["add 1, 2, 3"] Nothing + + -- SPARC + testKs ArchSparc [ModeSparc32, ModeLittleEndian] ["add %g1, %g2, %g3"] Nothing + testKs ArchSparc [ModeSparc32, ModeBigEndian] ["add %g1, %g2, %g3"] Nothing + + -- SystemZ + testKs ArchSystemz [ModeBigEndian] ["a %r0, 4095(%r15,%r1)"] Nothing diff --git a/bindings/haskell/src/Keystone.hs b/bindings/haskell/src/Keystone.hs new file mode 100644 index 0000000..c8e838c --- /dev/null +++ b/bindings/haskell/src/Keystone.hs @@ -0,0 +1,128 @@ +{-| +Module : Keystone +Description : The Keystone assembler engine. +Copyright : (c) Adrian Herrera, 2016 +License : GPL-2 + +Keystone is a lightweight multi-platform, multi-architecture assembler +framework. + +Further information is available at . +-} +module Keystone + ( -- * Assembler control + Assembler + , Engine + , Architecture(..) + , Mode(..) + , OptionType(..) + , OptionValue(..) + , runAssembler + , open + , option + , assemble + + -- * Error handling + , Error(..) + , errno + , strerror + + -- * Misc. + , version + ) where + +import Control.Monad.Trans.Class (lift) +import Control.Monad.Trans.Either (left, right, runEitherT) +import Data.ByteString (ByteString, packCStringLen) +import Data.List (intercalate) +import Foreign + +import Keystone.Internal.Core +import Keystone.Internal.Keystone + +------------------------------------------------------------------------------- +-- Assembler control +------------------------------------------------------------------------------- + +-- | Run the Keystone assembler and return a result on success, or an 'Error' +-- on failure. +runAssembler :: Assembler a -- ^ The assembler code to execute + -> IO (Either Error a) -- ^ A result on success, or an 'Error' on + -- failure +runAssembler = + runEitherT + +-- | Create a new instance of the Keystone assembler. +open :: Architecture -- ^ CPU architecture + -> [Mode] -- ^ CPU hardware mode + -> Assembler Engine -- ^ A 'Keystone' engine on success, or an 'Error' + -- on failure +open arch mode = do + (err, ksPtr) <- lift $ ksOpen arch mode + if err == ErrOk then + -- Return a pointer to the Keystone engine if ksOpen completed + -- successfully + lift $ mkEngine ksPtr + else + -- Otherwise return an error + left err + +option :: Engine -- ^ 'Keystone' engine handle + -> OptionType -- ^ Type of option to set + -> OptionValue -- ^ Option value corresponding with the type + -> Assembler () -- ^ An 'Error' on failure +option ks optType optValue = do + err <- lift $ ksOption ks optType optValue + if err == ErrOk then + right () + else + left err + +-- | Assemble a list of statements. +assemble :: Engine -- ^ 'Keystone' engine handle + -> [String] -- ^ List of statements to assemble. + -> Maybe Word64 -- ^ Optional address of the first + -- assembly instruction + -> Assembler (ByteString, Int) -- ^ Returns the encoded input assembly + -- string and the number of statements + -- successfully processed. Returns an + -- 'Error' on failure +assemble ks stmts addr = do + let string = intercalate ";" stmts + (res, encPtr, encSize, statCount) <- lift $ ksAsm ks string (maybeZ addr) + if res == 0 then do + -- If ksAsm completed successfully, pack the encoded bytes into a + -- ByteString. Once the encoded bytes have been packed the original + -- encoded bytes can be freed. The ByteString is returned with the + -- statement count + bs <- lift $ packCStringLen (castPtr encPtr, encSize) + lift $ ksFree encPtr + right (bs, statCount) + else do + -- On failure, call errno for error code + err <- errno ks + left err + where maybeZ = maybe 0 id + +------------------------------------------------------------------------------- +-- Misc. +------------------------------------------------------------------------------- + +-- | Combined API version & major and minor version numbers. Returns a +-- hexadecimal number as (major << 8 | minor), which encodes both major and +-- minor versions. +version :: Int +version = + ksVersion nullPtr nullPtr + +-- | Report the 'Error' number when some API function failed. +errno :: Engine -- ^ 'Keystone' engine handle + -> Assembler Error -- ^ The last 'Error' code +errno = + lift . ksErrno + +-- | Return a string describing the given 'Error'. +strerror :: Error -- ^ The 'Error' code + -> String -- ^ Description of the error code +strerror = + ksStrerror diff --git a/bindings/haskell/src/Keystone/CPU/Arm.chs b/bindings/haskell/src/Keystone/CPU/Arm.chs new file mode 100644 index 0000000..5f189a4 --- /dev/null +++ b/bindings/haskell/src/Keystone/CPU/Arm.chs @@ -0,0 +1,25 @@ +{-# LANGUAGE ForeignFunctionInterface #-} + +{-| +Module : Keystone.CPU.Arm +Description : Definitions for the ARM architecture. +Copyright : (C) Adrian Herrera, 2016 +License : GPL-2 + +Definitions for the ARM architecture. +-} +module Keystone.CPU.Arm + ( + Error(..) + ) where + +{# context lib = "keystone" #} + +#include + +-- | ARM errors. +{# enum ks_err_asm_arm as Error + { underscoreToCase } + with prefix = "KS_ERR_ASM_ARM_" + deriving (Show, Eq, Bounded) +#} diff --git a/bindings/haskell/src/Keystone/CPU/Arm64.chs b/bindings/haskell/src/Keystone/CPU/Arm64.chs new file mode 100644 index 0000000..6268418 --- /dev/null +++ b/bindings/haskell/src/Keystone/CPU/Arm64.chs @@ -0,0 +1,25 @@ +{-# LANGUAGE ForeignFunctionInterface #-} + +{-| +Module : Keystone.CPU.Arm64 +Description : Definitions for the ARM64 architecture. +Copyright : (C) Adrian Herrera, 2016 +License : GPL-2 + +Definitions for the ARM64 architecture. +-} +module Keystone.CPU.Arm64 + ( + Error(..) + ) where + +{# context lib = "keystone" #} + +#include + +-- | ARM64 errors. +{# enum ks_err_asm_arm64 as Error + { underscoreToCase } + with prefix = "KS_ERR_ASM_ARM64_" + deriving (Show, Eq, Bounded) +#} diff --git a/bindings/haskell/src/Keystone/CPU/Hexagon.chs b/bindings/haskell/src/Keystone/CPU/Hexagon.chs new file mode 100644 index 0000000..f025e6e --- /dev/null +++ b/bindings/haskell/src/Keystone/CPU/Hexagon.chs @@ -0,0 +1,25 @@ +{-# LANGUAGE ForeignFunctionInterface #-} + +{-| +Module : Keystone.CPU.Hexagon +Description : Definitions for the Hexagon architecture. +Copyright : (C) Adrian Herrera, 2016 +License : GPL-2 + +Definitions for the Hexagon architecture. +-} +module Keystone.CPU.Hexagon + ( + Error(..) + ) where + +{# context lib = "keystone" #} + +#include + +-- | Hexagon errors. +{# enum ks_err_asm_hexagon as Error + { underscoreToCase } + with prefix = "KS_ERR_ASM_HEXAGON_" + deriving (Show, Eq, Bounded) +#} diff --git a/bindings/haskell/src/Keystone/CPU/Mips.chs b/bindings/haskell/src/Keystone/CPU/Mips.chs new file mode 100644 index 0000000..a62a2b6 --- /dev/null +++ b/bindings/haskell/src/Keystone/CPU/Mips.chs @@ -0,0 +1,25 @@ +{-# LANGUAGE ForeignFunctionInterface #-} + +{-| +Module : Keystone.CPU.Mips +Description : Definitions for the MIPS architecture. +Copyright : (C) Adrian Herrera, 2016 +License : GPL-2 + +Definitions for the MIPS architecture. +-} +module Keystone.CPU.Mips + ( + Error(..) + ) where + +{# context lib = "keystone" #} + +#include + +-- | MIPS errors. +{# enum ks_err_asm_mips as Error + { underscoreToCase } + with prefix = "KS_ERR_ASM_MIPS_" + deriving (Show, Eq, Bounded) +#} diff --git a/bindings/haskell/src/Keystone/CPU/Ppc.chs b/bindings/haskell/src/Keystone/CPU/Ppc.chs new file mode 100644 index 0000000..746c5e2 --- /dev/null +++ b/bindings/haskell/src/Keystone/CPU/Ppc.chs @@ -0,0 +1,25 @@ +{-# LANGUAGE ForeignFunctionInterface #-} + +{-| +Module : Keystone.CPU.Ppc +Description : Definitions for the PPC architecture. +Copyright : (C) Adrian Herrera, 2016 +License : GPL-2 + +Definitions for the PPC architecture. +-} +module Keystone.CPU.Ppc + ( + Error(..) + ) where + +{# context lib = "keystone" #} + +#include + +-- | PPC errors. +{# enum ks_err_asm_ppc as Error + { underscoreToCase } + with prefix = "KS_ERR_ASM_PPC_" + deriving (Show, Eq, Bounded) +#} diff --git a/bindings/haskell/src/Keystone/CPU/Sparc.chs b/bindings/haskell/src/Keystone/CPU/Sparc.chs new file mode 100644 index 0000000..7fa94fb --- /dev/null +++ b/bindings/haskell/src/Keystone/CPU/Sparc.chs @@ -0,0 +1,24 @@ +{-# LANGUAGE ForeignFunctionInterface #-} + +{-| +Module : Keystone.CPU.Sparc +Description : Definitions for the SPARC architecture. +Copyright : (C) Adrian Herrera, 2016 +License : GPL-2 + +Definitions for the SPARC architecture. +-} +module Keystone.CPU.Sparc + ( + Error(..) + ) where + +{# context lib = "keystone" #} + +#include + +-- | SPARC errors. +{# enum ks_err_asm_sparc as Error + { underscoreToCase } + with prefix = "KS_ERR_ASM_SPARC_" + deriving (Show, Eq, Bounded) #} diff --git a/bindings/haskell/src/Keystone/CPU/SystemZ.chs b/bindings/haskell/src/Keystone/CPU/SystemZ.chs new file mode 100644 index 0000000..1c54586 --- /dev/null +++ b/bindings/haskell/src/Keystone/CPU/SystemZ.chs @@ -0,0 +1,25 @@ +{-# LANGUAGE ForeignFunctionInterface #-} + +{-| +Module : Keystone.CPU.SystemZ +Description : Definitions for the SystemZ architecture. +Copyright : (C) Adrian Herrera, 2016 +License : GPL-2 + +Definitions for the SystemZ architecture. +-} +module Keystone.CPU.SystemZ + ( + Error(..) + ) where + +{# context lib = "keystone" #} + +#include + +-- | SystemZ errors. +{# enum ks_err_asm_systemz as Error + { underscoreToCase } + with prefix = "KS_ERR_ASM_SYSTEMZ_" + deriving (Show, Eq, Bounded) +#} diff --git a/bindings/haskell/src/Keystone/CPU/X86.chs b/bindings/haskell/src/Keystone/CPU/X86.chs new file mode 100644 index 0000000..d955dec --- /dev/null +++ b/bindings/haskell/src/Keystone/CPU/X86.chs @@ -0,0 +1,25 @@ +{-# LANGUAGE ForeignFunctionInterface #-} + +{-| +Module : Keystone.CPU.X86 +Description : Definitions for the X86 architecture. +Copyright : (C) Adrian Herrera, 2016 +License : GPL-2 + +Definitions for the X86 architecture. +-} +module Keystone.CPU.X86 + ( + Error(..) + ) where + +{# context lib = "keystone" #} + +#include + +-- | X86 errors. +{# enum ks_err_asm_x86 as Error + { underscoreToCase } + with prefix = "KS_ERR_ASM_X86_" + deriving (Show, Eq, Bounded) +#} diff --git a/bindings/haskell/src/Keystone/Internal/Core.chs b/bindings/haskell/src/Keystone/Internal/Core.chs new file mode 100644 index 0000000..1a541ab --- /dev/null +++ b/bindings/haskell/src/Keystone/Internal/Core.chs @@ -0,0 +1,51 @@ +{-# LANGUAGE ForeignFunctionInterface #-} + +{-| +Module +Description : Core Keystone components. +Copyright : (c) Adrian Herrera, 2016 +License : GPL-2 + +Defines core Keystone components. + +This module should not be directly imported; it is only exposed because of the +way cabal handles ordering of chs files. +-} +module Keystone.Internal.Core where + +import Control.Monad +import Control.Monad.Trans.Either (EitherT) +import Foreign + +{# context lib = "keystone" #} + +#include +#include "keystone_wrapper.h" + +-- | The Keystone engine. +{# pointer *ks_engine as Engine + foreign finalizer ks_close_wrapper as close + newtype +#} + +-- | A pointer to the Keystone engine. +{# pointer *ks_engine as EnginePtr -> Engine #} + +-- | Make a new Keystone engine out of an engine pointer. The returned Keystone +-- engine will automatically call 'ks_close_wrapper' when it goes out of scope. +mkEngine :: EnginePtr + -> IO Engine +mkEngine ptr = + liftM Engine (newForeignPtr close ptr) + +-- | Errors encountered by the Keystone API. These values are returned by +-- 'errno'. +{# enum ks_err as Error + { underscoreToCase } + with prefix = "KS_" + deriving (Show, Eq, Bounded) +#} + +-- | The assembler runs in the IO monad and allows for the handling of errors +-- "under the hood". +type Assembler a = EitherT Error IO a diff --git a/bindings/haskell/src/Keystone/Internal/Keystone.chs b/bindings/haskell/src/Keystone/Internal/Keystone.chs new file mode 100644 index 0000000..ba1cd11 --- /dev/null +++ b/bindings/haskell/src/Keystone/Internal/Keystone.chs @@ -0,0 +1,135 @@ +{-# LANGUAGE ForeignFunctionInterface #-} + +{-| +Module : Keystone.Internal.Keystone +Description : The Keystone assembler engine. +Copyright : (c) Adrian Herrera, 2016 +License : GPL-2 + +Low-level bindings for the Keystone assembler engine. + +This module should not be directly imported; it is only exposed because of the +way cabal handles ordering of chs files. +-} +module Keystone.Internal.Keystone + ( -- * Types + Architecture(..) + , Mode(..) + , OptionType(..) + , OptionValue(..) + + -- * Function bindings + , ksOpen + , ksOption + , ksFree + , ksAsm + , ksVersion + , ksErrno + , ksStrerror + ) where + +import Foreign +import Foreign.C + +import Keystone.Internal.Util + +{# import Keystone.Internal.Core #} + +{# context lib = "keystone" #} + +#include + +------------------------------------------------------------------------------- +-- Types +------------------------------------------------------------------------------- + +-- | CPU architecture. +{# enum ks_arch as Architecture + { underscoreToCase } + with prefix = "KS_" + deriving (Show, Eq, Bounded) +#} + +-- | CPU hardware mode. +{# enum ks_mode as Mode + { underscoreToCase } + with prefix = "KS_" + deriving (Show, Eq, Bounded) +#} + +-- | Runtime option types. +{# enum ks_opt_type as OptionType + { underscoreToCase } + with prefix = "KS_" + deriving (Show, Eq, Bounded) +#} + +-- | Runtime option values. +{# enum ks_opt_value as OptionValue + { underscoreToCase } + with prefix = "KS_OPT_" + deriving (Show, Eq, Bounded) +#} + +------------------------------------------------------------------------------- +-- Assembler control +------------------------------------------------------------------------------- + +{# fun ks_open as ^ + { `Architecture' + , combineEnums `[Mode]' + , alloca- `EnginePtr' peek* + } -> `Error' +#} + +{# fun ks_option as ^ + { `Engine' + , `OptionType' + , `OptionValue' + } -> `Error' +#} + +{# fun ks_asm as ^ + { `Engine' + , `String' + , `Word64' + , alloca- `Ptr CUChar' peek* + , alloca- `Int' peekToInt* + , alloca- `Int' peekToInt* + } -> `Int' +#} + +{# fun ks_free as ^ + { castPtr `Ptr CUChar' + } -> `()' +#} + +------------------------------------------------------------------------------- +-- Misc. +------------------------------------------------------------------------------- + +{# fun pure unsafe ks_version as ^ + { id `Ptr CUInt' + , id `Ptr CUInt' + } -> `Int' +#} + +{# fun unsafe ks_errno as ^ + { `Engine' + } -> `Error' +#} + +{# fun pure unsafe ks_strerror as ^ + { `Error' + } -> `String' +#} + +------------------------------------------------------------------------------- +-- Helper functions +------------------------------------------------------------------------------- + +peekToInt :: (Storable a, Integral a, Num b) + => Ptr a + -> IO b +peekToInt ptr = + peek ptr >>= (return . fromIntegral) diff --git a/bindings/haskell/src/Keystone/Internal/Util.hs b/bindings/haskell/src/Keystone/Internal/Util.hs new file mode 100644 index 0000000..6a541b7 --- /dev/null +++ b/bindings/haskell/src/Keystone/Internal/Util.hs @@ -0,0 +1,23 @@ +{-| +Module : Keystone.Internal.Util +Description : Utility (aka helper) functions for the Keystone assembler. +Copyright : (c) Adrian Herrera, 2016 +License : GPL-2 +-} +module Keystone.Internal.Util where + +import Data.Bits + +-- | Combine a list of Enums by performing a bitwise-OR. +combineEnums :: (Enum a, Num b, Bits b) + => [a] + -> b +combineEnums = + foldr ((.|.) <$> enumToNum) 0 + +-- | Convert an 'Eum' to a 'Num'. +enumToNum :: (Enum a, Num b) + => a + -> b +enumToNum = + fromIntegral . fromEnum diff --git a/bindings/haskell/src/cbits/keystone_wrapper.c b/bindings/haskell/src/cbits/keystone_wrapper.c new file mode 100644 index 0000000..c24ea41 --- /dev/null +++ b/bindings/haskell/src/cbits/keystone_wrapper.c @@ -0,0 +1,5 @@ +#include "keystone_wrapper.h" + +void ks_close_wrapper(ks_engine *ks) { + ks_close(ks); +} diff --git a/bindings/haskell/src/include/keystone_wrapper.h b/bindings/haskell/src/include/keystone_wrapper.h new file mode 100644 index 0000000..77f2552 --- /dev/null +++ b/bindings/haskell/src/include/keystone_wrapper.h @@ -0,0 +1,11 @@ +#ifndef KEYSTONE_WRAPPER_H +#define KEYSTONE_WRAPPER_H + +#include + +/* + * Wrap Keystone's ks_close function and ignore the returned error code. + */ +void ks_close_wrapper(ks_engine *ks); + +#endif diff --git a/bindings/java/.gitignore b/bindings/java/.gitignore new file mode 100644 index 0000000..7466b12 --- /dev/null +++ b/bindings/java/.gitignore @@ -0,0 +1,3 @@ +.idea +*.iml +target/ diff --git a/bindings/java/CHANGELOG.md b/bindings/java/CHANGELOG.md new file mode 100644 index 0000000..9de985c --- /dev/null +++ b/bindings/java/CHANGELOG.md @@ -0,0 +1,5 @@ +# Changelog of the Java bindings for Keystone + +**Version 0.9.1-0: July 16th, 2018**: + +- Initial public release. \ No newline at end of file diff --git a/bindings/java/LICENSE b/bindings/java/LICENSE new file mode 100644 index 0000000..0730f07 --- /dev/null +++ b/bindings/java/LICENSE @@ -0,0 +1,21 @@ +The MIT License + +Copyright (c) 2018 Jämes Ménétrey (aka ZenLulz) + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all +copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +SOFTWARE. \ No newline at end of file diff --git a/bindings/java/README.md b/bindings/java/README.md new file mode 100644 index 0000000..beda28f --- /dev/null +++ b/bindings/java/README.md @@ -0,0 +1,100 @@ +# Java bindings for Keystone + +Java bindings for the [Keystone](http://www.keystone-engine.org/) engine. Require JDK 10+. + +## Sample + +```java + import keystone.Keystone; + import keystone.KeystoneArchitecture; + import keystone.KeystoneMode; + import keystone.exceptions.AssembleFailedKeystoneException; + + public class App { + + public static void main(String[] args) { + try (Keystone keystone = new Keystone(KeystoneArchitecture.X86, KeystoneMode.Mode32)) { + try { + var result = keystone.assemble("INC ecx; DEC edx"); + + System.out.println("Number of statements encoded: " + result.getNumberOfStatements()); + System.out.println("Base address: " + String.format("0x%08X", result.getAddress())); + System.out.print("Encoded bytes: "); + + for (byte b: result.getMachineCode()) { + System.out.print(String.format("%X ", b)); + } + + } catch (AssembleFailedKeystoneException e) { + System.out.println(e.getMessage()); + } + } + } + } +``` + +Output: + +> Number of statements encoded: 2 +Base address: 0x00000000 +Encoded bytes: 41 4A + +Other samples are provided by the unit tests included with the library, which cover most of the code. + +## Getting Started + +1. Clone the repository locally. +2. Download or compile Keystone library and store it in the folder `src/main/resources/{os-prefix}/{keystone-lib}`, according [the specifications of JNA](https://java-native-access.github.io/jna/4.5.0/javadoc/index.html?com/sun/jna/NativeLibrary.html), or [the related unit test](https://github.com/java-native-access/jna/blob/7122be473e5f6179deb1c2b1c2fdeb77d8486fed/test/com/sun/jna/PlatformTest.java#L29). +3. Compile the Java bindings and issue the JAR using Maven `mvn package`. The unit tests are automatically while running the goal. +4. In your project, include `target/binding-java-{version}.jar` and [JNA](https://github.com/java-native-access/jna) using your favourite dependency manager, or include `target/binding-java-{version}-jar-with-dependencies.jar` that is packaged with JNA. + +### Exception handling + +Each operation that returns the native enumeration `ks_err` is wrapped in an instance of a subclass of `KeystoneException`, thrown when an error occurs. The Javadoc indicates the exceptions thrown by the Java bindings for Keystone. + +### Garbage collection + +Keystone library requires to open and close an handle, that must be collected once an instance of the class `Keystone` is disposed. For that purpose, the class implements the interface `AutoCloseable`. Nonetheless, the Java bindings also implement a cleaning mechanism that automatically collects the handle when the instance of the class is *phantom reachable*, meaning no memory leak can happen, even if the instance is not closed properly. + + +### Native function calls + +The Java bindings for Keystone rely on [JNA Direct Mapping](https://github.com/java-native-access/jna/blob/master/www/DirectMapping.md) to improve the performances of native calls, approaching that of custom JNI. + +## Found an issue or bug ? + +Feel free to open a GitHub issue on [the official repository of Keystone](https://github.com/keystone-engine/keystone/issues) and ping the contributors. + + +## Contributors + +Author: Jämes Ménétrey ([@ZenLulz](https://github.com/ZenLulz/)) + +Maintainers: + +- Need some people here :) Feel free to contribute ! + +### Want to contribute ? + +Hey you! Your help is more than welcome! Things to keep in mind when working on the Java bindings for Keystone: + +- Think about the backward compatibility; while code refactoring is a good practice, changing entirely the API *may* result in struggles. +- Elaborate the unit tests that prove your code is working. Test all the paths of the newly-added functions/classes (IntelliJ can show some metrics using Coverage). Keep the code coverage high! +- Please; write the required Javadoc, so every developer has the chance to understand your code. +- Update the changelog with a summary of your changes. + +#### Version notation + +The version of the Java bindings for Keystone is indicated in the file Maven configuration file (`pom.xml`). The major, minor and incremental versions (w.x.y) match the version of the library Keystone that the bindings is developed with. The build number (the -z in w.x.y-z) is incremented for each newer version of the Java bindings. Please, don't forget to increment this version when you submit a pull request. + +On the last commit for a pull request, please create a tag called `java-bindings-w.x.y-z`. + +#### Pull request submission + +Ping the contributors of the Java bindings when submitting a pull request, so your changes can be peer reviewed. + + +## License + +The Java bindings for Keystone is open-sourced software licensed under the MIT license. +The license of the library Keystone may be different and is available [at the root of the repository of Keystone](https://github.com/keystone-engine/keystone). \ No newline at end of file diff --git a/bindings/java/pom.xml b/bindings/java/pom.xml new file mode 100644 index 0000000..65949b2 --- /dev/null +++ b/bindings/java/pom.xml @@ -0,0 +1,112 @@ + + + + + 4.0.0 + + keystone + java-bindings + 0.9.1-0 + + Keystone Java bindings + Keystone assembler framework: Core (Arm, Arm64, Hexagon, Mips, PowerPC, Sparc, SystemZ and X86) orm. + https://github.com/keystone-engine/keystone/tree/master/bindings/java + + + UTF-8 + + 10 + 4.5.1 + 5.2.0 + 1.2.0 + + + + + james@menetrey.me + Jämes Ménétrey + https://github.com/ZenLulz + + Developer + + + + + + + net.java.dev.jna + jna-platform + ${jna.version} + + + + + org.junit.jupiter + junit-jupiter-api + ${junit.jupiter.version} + test + + + org.junit.jupiter + junit-jupiter-engine + ${junit.jupiter.version} + test + + + + + + + + maven-compiler-plugin + 3.7.0 + + ${java.version} + ${java.version} + + + + + + org.apache.maven.plugins + maven-assembly-plugin + 3.1.0 + + + jar-with-dependencies + + + + + + assemble-all + package + + single + + + + + + + + maven-surefire-plugin + 2.21.0 + + + org.junit.platform + junit-platform-surefire-provider + ${junit.platform.version} + + + + + + \ No newline at end of file diff --git a/bindings/java/src/main/java/keystone/Keystone.java b/bindings/java/src/main/java/keystone/Keystone.java new file mode 100644 index 0000000..34d7a75 --- /dev/null +++ b/bindings/java/src/main/java/keystone/Keystone.java @@ -0,0 +1,249 @@ +/* + * Copyright (c) 2018 Jämes Ménétrey + * + * This file is part of the Keystone Java bindings which is released under MIT. + * See file LICENSE in the Java bindings folder for full license details. + */ + +package keystone; + +import com.sun.jna.Pointer; +import com.sun.jna.ptr.IntByReference; +import com.sun.jna.ptr.PointerByReference; +import keystone.exceptions.AssembleFailedKeystoneException; +import keystone.exceptions.OpenFailedKeystoneException; +import keystone.exceptions.SetOptionFailedKeystoneException; +import keystone.natives.CleanerContainer; +import keystone.natives.DirectMappingKeystoneNative; +import keystone.natives.KeystoneCleanerContainer; +import keystone.utilities.Version; + +import java.util.concurrent.atomic.AtomicBoolean; + +/** + * The Keystone engine. + */ +public class Keystone implements AutoCloseable { + + /** + * The pointer to the Keystone native resource. + */ + private final Pointer ksEngine; + + /** + * The cleaner container that frees up the native resource if this object is not properly closed and is + * candidate for garbage collection. + */ + private final CleanerContainer ksEngineCleaner; + + /** + * Indicates whether the current instance of Keystone has been closed. + */ + private final AtomicBoolean hasBeenClosed; + + /** + * The memory retention of the symbol resolver callback, in order to prevent the garbage collector + * to free up the callback, that would result in a crash, as the native library still has a reference to it. + */ + private SymbolResolverCallback symbolResolverCallback; + + /** + * Initializes a new instance of the class {@link Keystone}. + *

+ * Some architectures are not supported. Use the static method {@link #isArchitectureSupported} to determine + * whether the engine support the architecture. + * + * @param architecture The architecture of the code generated by Keystone. + * @param mode The mode type. + * @throws OpenFailedKeystoneException if the Keystone library cannot be opened properly. + */ + public Keystone(KeystoneArchitecture architecture, KeystoneMode mode) { + ksEngine = initializeKeystoneEngine(architecture, mode); + ksEngineCleaner = initializeKeystoneCleanerContainer(); + hasBeenClosed = new AtomicBoolean(false); + } + + /** + * Determines whether the given architecture is supported by Keystone. + * + * @param architecture The architecture type to check. + * @return The return value is {@code true} if the architecture is supported, otherwise {@code false}. + */ + public static boolean isArchitectureSupported(KeystoneArchitecture architecture) { + return DirectMappingKeystoneNative.ks_arch_supported(architecture); + } + + /** + * Opens an handle of Keystone. + * + * @param architecture The architecture of the code generated by Keystone. + * @param mode The mode type. + * @return The return value is a pointer to the handle of Keystone. + * @throws OpenFailedKeystoneException if the Keystone library cannot be opened properly. + */ + private Pointer initializeKeystoneEngine(KeystoneArchitecture architecture, KeystoneMode mode) { + var pointerToEngine = new PointerByReference(); + var openResult = DirectMappingKeystoneNative.ks_open(architecture, mode, pointerToEngine); + + if (openResult != KeystoneError.Ok) { + throw new OpenFailedKeystoneException(openResult); + } + + return pointerToEngine.getValue(); + } + + /** + * Initializes the cleaner object, that is going to close the native handle of Keystone if + * the instance is garbage collected. + * + * @return The return value is a cleaner container. + */ + private CleanerContainer initializeKeystoneCleanerContainer() { + return new KeystoneCleanerContainer(ksEngine); + } + + /** + * Assembles a string that contains assembly code. + * + * @param assembly The assembly instructions. Use ; or \n to separate statements. + * @return The return value is the machine code of the assembly instructions. + * @throws AssembleFailedKeystoneException if the assembly code cannot be assembled properly. + */ + public KeystoneEncoded assemble(String assembly) { + return assemble(assembly, 0); + } + + /** + * Assembles a string that contains assembly code, located at a given address location. + * + * @param assembly The assembly instructions. Use ; or \n to separate statements. + * @param address The address of the first assembly instruction. + * @return The return value is the machine code of the assembly instructions. + * @throws AssembleFailedKeystoneException if the assembly code cannot be assembled properly. + */ + public KeystoneEncoded assemble(String assembly, int address) { + var pointerToMachineCodeBuffer = new PointerByReference(); + var pointerToMachineCodeSize = new IntByReference(); + var pointerToNumberOfStatements = new IntByReference(); + + var result = DirectMappingKeystoneNative.ks_asm(ksEngine, assembly, address, pointerToMachineCodeBuffer, + pointerToMachineCodeSize, pointerToNumberOfStatements); + + if (result != 0) { + var errorCode = DirectMappingKeystoneNative.ks_errno(ksEngine); + throw new AssembleFailedKeystoneException(errorCode, assembly); + } + + var machineCodeBuffer = pointerToMachineCodeBuffer.getValue(); + var machineCode = machineCodeBuffer.getByteArray(0, pointerToMachineCodeSize.getValue()); + + DirectMappingKeystoneNative.ks_free(machineCodeBuffer); + + return new KeystoneEncoded(machineCode, address, pointerToNumberOfStatements.getValue()); + } + + /** + * Assembles a string that contains assembly code. + * + * @param assembly A collection of assembly instructions. + * @return The return value is the machine code of the assembly instructions. + * @throws AssembleFailedKeystoneException if the assembly code cannot be assembled properly. + */ + public KeystoneEncoded assemble(Iterable assembly) { + return assemble(assembly, 0); + } + + /** + * Assembles a string that contains assembly code, located at a given address location. + * + * @param assembly A collection of assembly instructions. + * @param address The address of the first assembly instruction. + * @return The return value is the machine code of the assembly instructions. + * @throws AssembleFailedKeystoneException if the assembly code cannot be assembled properly. + */ + public KeystoneEncoded assemble(Iterable assembly, int address) { + return assemble(String.join(";", assembly), address); + } + + /** + * Gets the major and minor version numbers. + * + * @return The returned value is an instance of the class {@link Version}, containing the major and minor version numbers. + */ + public Version version() { + var major = new IntByReference(); + var minor = new IntByReference(); + + DirectMappingKeystoneNative.ks_version(major, minor); + + return new Version(major.getValue(), minor.getValue()); + } + + /** + * Sets the syntax of the assembly code used in this instance of Keystone. + * + * @param syntax The syntax of the assembly code. + * @throws SetOptionFailedKeystoneException if the syntax is not supported. + * @throws SetOptionFailedKeystoneException if the pair of type and value is not valid. + */ + public void setAssemblySyntax(KeystoneOptionValue.KeystoneOptionSyntax syntax) { + setOption(KeystoneOptionType.Syntax, syntax.value()); + } + + /** + * Sets an option for Keystone engine at runtime using a not-strongly typed option value. + *

+ * It is suggested to prefer the methods {@link #setAssemblySyntax(KeystoneOptionValue.KeystoneOptionSyntax)}, + * {@link #setSymbolResolver(SymbolResolverCallback)} or {@link #unsetSymbolResolver()}. + * + * @param type The type of the option. + * @param value The value of the option. + * @throws SetOptionFailedKeystoneException if the pair of type and value is not valid. + */ + public void setOption(KeystoneOptionType type, int value) { + var result = DirectMappingKeystoneNative.ks_option(ksEngine, type, value); + + if (result != KeystoneError.Ok) { + throw new SetOptionFailedKeystoneException(result, type, value); + } + } + + /** + * Sets a symbol resolver callback, to resolve unrecognized symbols encountered in the assembly code. + *

+ * If the method is called many times, only the last callback will be triggered. + * + * @param callback The symbol resolver callback. + * @throws SetOptionFailedKeystoneException if the pair of type and value is not valid. + */ + public void setSymbolResolver(SymbolResolverCallback callback) { + symbolResolverCallback = callback; + DirectMappingKeystoneNative.ks_option(ksEngine, KeystoneOptionType.SymbolResolver, callback); + } + + /** + * Unsets the current symbol resolver. The symbol resolver instance can be freely collected afterwards. + * + * @throws SetOptionFailedKeystoneException if the pair of type and value is not valid. + */ + public void unsetSymbolResolver() { + DirectMappingKeystoneNative.ks_option(ksEngine, KeystoneOptionType.SymbolResolver, 0); + symbolResolverCallback = null; + } + + /** + * Closes this resource, relinquishing any underlying resources. + * This method is invoked automatically on objects managed by the + * {@code try}-with-resources statement. + *

+ * The call to this method is thread-safe. + */ + @Override + public void close() { + var hasBeenAlreadyClosed = hasBeenClosed.getAndSet(true); + + if (!hasBeenAlreadyClosed) { + ksEngineCleaner.close(); + } + } +} diff --git a/bindings/java/src/main/java/keystone/KeystoneArchitecture.java b/bindings/java/src/main/java/keystone/KeystoneArchitecture.java new file mode 100644 index 0000000..fc30ca7 --- /dev/null +++ b/bindings/java/src/main/java/keystone/KeystoneArchitecture.java @@ -0,0 +1,112 @@ +/* + * Copyright (c) 2018 Jämes Ménétrey + * + * This file is part of the Keystone Java bindings which is released under MIT. + * See file LICENSE in the Java bindings folder for full license details. + */ + +package keystone; + +import keystone.jna.JnaEnum; + +import java.util.HashMap; +import java.util.Map; + +/** + * The supported architectures of Keystone. + */ +public enum KeystoneArchitecture implements JnaEnum { + /** + * ARM architecture (including Thumb, Thumb-2). + */ + Arm(1), + + /** + * ARM-64, also called AArch64. + */ + Arm64(2), + + /** + * Mips architecture. + */ + Mips(3), + + /** + * X86 architecture (including x86 & x86-64). + */ + X86(4), + + /** + * PowerPC architecture (currently unsupported). + */ + Ppc(5), + + /** + * Sparc architecture. + */ + Sparc(6), + + /** + * SystemZ architecture (S390X). + */ + SystemZ(7), + + /** + * Hexagon architecture + */ + Hexagon(8), + + /** + * Ethereum Virtual Machine architecture. + */ + Evm(9), + + Max(10); + + /** + * Mapping table to determine an enumeration value based on an integer with a complexity of θ(1). + */ + private static Map intToEnumMapping = new HashMap<>(); + + static { + // Initializes the mapping table. + for (KeystoneArchitecture architecture : KeystoneArchitecture.values()) { + intToEnumMapping.put(architecture.value(), architecture); + } + } + + /** + * Holds the integer value of the enumeration, that corresponds to the value used in the enumeration in C. + */ + private final int value; + + /** + * Constructor of the enumeration. + * + * @param value The integer value, that corresponds to the value used in the enumeration in C. + */ + KeystoneArchitecture(int value) { + this.value = value; + } + + /** + * Converts an integer value into its corresponding enumeration value. + *

+ * The complexity of the conversion is θ(1). + * + * @param value The integer value. + * @return The return value is a value of the enumeration. + */ + public static KeystoneArchitecture fromValue(Integer value) { + return intToEnumMapping.get(value); + } + + /** + * Retrieves the value of the enumeration, that corresponds to the value used in the enumeration in C. + * + * @return The return value is an integer value. + */ + public int value() { + return value; + } +} diff --git a/bindings/java/src/main/java/keystone/KeystoneEncoded.java b/bindings/java/src/main/java/keystone/KeystoneEncoded.java new file mode 100644 index 0000000..2294560 --- /dev/null +++ b/bindings/java/src/main/java/keystone/KeystoneEncoded.java @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2018 Jämes Ménétrey + * + * This file is part of the Keystone Java bindings which is released under MIT. + * See file LICENSE in the Java bindings folder for full license details. + */ + +package keystone; + +/** + * Wrap the result of an assemble using Keystone. + */ +public class KeystoneEncoded { + /** + * The machine code generated by Keystone. + */ + private final byte[] machineCode; + + /** + * The address of the first assembly instruction. + */ + private final int address; + + /** + * The number of statements successfully processed. + */ + private final int numberOfStatements; + + /** + * Creates a new instance of the class {@link KeystoneEncoded}. + * + * @param machineCode The machine code generated by Keystone. + * @param address The address of the first assembly instruction. + * @param numberOfStatements The number of statements successfully processed. + */ + public KeystoneEncoded(byte[] machineCode, int address, int numberOfStatements) { + this.machineCode = machineCode; + this.address = address; + this.numberOfStatements = numberOfStatements; + } + + /** + * Gets the machine code generated by Keystone. + */ + public byte[] getMachineCode() { + return machineCode; + } + + /** + * Gets the address of the first assembly instruction. + */ + public int getAddress() { + return address; + } + + /** + * Gets the number of statements successfully processed. + */ + public int getNumberOfStatements() { + return numberOfStatements; + } +} diff --git a/bindings/java/src/main/java/keystone/KeystoneError.java b/bindings/java/src/main/java/keystone/KeystoneError.java new file mode 100644 index 0000000..0df03bc --- /dev/null +++ b/bindings/java/src/main/java/keystone/KeystoneError.java @@ -0,0 +1,298 @@ +/* + * Copyright (c) 2018 Jämes Ménétrey + * + * This file is part of the Keystone Java bindings which is released under MIT. + * See file LICENSE in the Java bindings folder for full license details. + */ + +package keystone; + +import keystone.jna.JnaEnum; + +import java.util.HashMap; +import java.util.Map; + +/** + * All type of errors encountered by Keystone API. + */ +public enum KeystoneError implements JnaEnum { + + /** + * No error: everything was fine. + */ + Ok(0), + + /** + * Out-Of-Memory error: ks_open(), ks_emulate(). + */ + Nomem(1), + + /** + * Unsupported architecture: ks_open(). + */ + Arch(2), + + /** + * Invalid handle. + */ + Handle(3), + + /** + * Invalid/unsupported mode: ks_open(). + */ + Mode(4), + + /** + * Unsupported version (bindings). + */ + Version(5), + + /** + * Unsupported option. + */ + OptInvalid(6), + + // generic input assembly errors - parser specific + + /** + * Unknown token in expression. + */ + AsmExprToken(Base.asm), + + /** + * Literal value out of range for directive. + */ + AsmDirectiveValueRange(Base.asm + 1), + + /** + * Expected identifier in directive. + */ + AsmDirectiveId(Base.asm + 2), + + /** + * Unexpected token in directive. + */ + AsmDirectiveToken(Base.asm + 3), + + /** + * Expected string in directive. + */ + AsmDirectiveStr(Base.asm + 4), + + /** + * Expected comma in directive. + */ + AsmDirectiveComma(Base.asm + 5), + + /** + * Expected relocation name in directive. + */ + AsmDirectiveRelocName(Base.asm + 6), + + /** + * Unexpected token in .reloc directive. + */ + AsmDirectiveRelocToken(Base.asm + 7), + + /** + * Invalid floating point in directive. + */ + AsmDirectiveFpoint(Base.asm + 8), + + /** + * Unknown directive. + */ + AsmDirectiveUnknown(Base.asm + 9), + + /** + * Invalid equal directive. + */ + AsmDirectiveEqu(Base.asm + 10), + + /** + * (Generic) invalid directive. + */ + AsmDirectiveInvalid(Base.asm + 11), + + /** + * Invalid variant. + */ + AsmVariantInvalid(Base.asm + 12), + + /** + * Brackets expression not supported on this target. + */ + AsmExprBracket(Base.asm + 13), + + /** + * Unexpected symbol modifier following '@'. + */ + AsmSymbolModifier(Base.asm + 14), + + /** + * Invalid symbol redefinition. + */ + AsmSymbolRedefined(Base.asm + 15), + + /** + * Cannot find a symbol. + */ + AsmSymbolMissing(Base.asm + 16), + + /** + * Expected ')' in parentheses expression. + */ + AsmRparen(Base.asm + 17), + + /** + * Unexpected token at start of statement. + */ + AsmStatToken(Base.asm + 18), + + /** + * Unsupported token yet. + */ + AsmUnsupported(Base.asm + 19), + + /** + * Unexpected token in macro instantiation. + */ + AsmMacroToken(Base.asm + 20), + + /** + * Unbalanced parentheses in macro argument. + */ + AsmMacroParen(Base.asm + 21), + + /** + * Expected '=' after formal parameter identifier. + */ + AsmMacroEqu(Base.asm + 22), + + /** + * Too many positional arguments. + */ + AsmMacroArgs(Base.asm + 23), + + /** + * Macros cannot be nested more than 20 levels deep. + */ + AsmMacroLevelsExceed(Base.asm + 24), + + /** + * Invalid macro string. + */ + AsmMacroStr(Base.asm + 25), + + /** + * Invalid macro (generic error). + */ + AsmMacroInvalid(Base.asm + 26), + + /** + * Unexpected backslash at end of escaped string. + */ + AsmEscBackslash(Base.asm + 27), + + /** + * Invalid octal escape sequence (out of range). + */ + AsmEscOctal(Base.asm + 28), + + /** + * Invalid escape sequence (unrecognized character). + */ + AsmEscSequence(Base.asm + 29), + + /** + * Broken escape string. + */ + AsmEscStr(Base.asm + 30), + + /** + * Invalid token. + */ + AsmTokenInvalid(Base.asm + 31), + + /** + * This instruction is unsupported in this mode. + */ + AsmInsnUnsupported(Base.asm + 32), + + /** + * Invalid fixup. + */ + AsmFixupInvalid(Base.asm + 33), + + /** + * Invalid label. + */ + AsmLabelInvalid(Base.asm + 34), + + /** + * Invalid fragment. + */ + AsmFragmentInvalid(Base.asm + 35), + + // generic input assembly errors - architecture specific + + AsmInvalidOperand(Base.asmArch), + AsmMissingFeature(Base.asmArch + 1), + AsmMnemonicFail(Base.asmArch + 2); + + /** + * Mapping table to determine an enumeration value based on an integer with a complexity of θ(1). + */ + private static Map intToEnumMapping = new HashMap<>(); + + static { + // Initializes the mapping table. + for (KeystoneError error : KeystoneError.values()) { + intToEnumMapping.put(error.value(), error); + } + } + + /** + * Holds the integer value of the enumeration, that corresponds to the value used in the enumeration in C. + */ + private final int value; + + /** + * Constructor of the enumeration. + * + * @param value The integer value, that corresponds to the value used in the enumeration in C. + */ + KeystoneError(int value) { + + this.value = value; + } + + /** + * Converts an integer value into its corresponding enumeration value. + *

+ * The complexity of the conversion is θ(1). + * + * @param value The integer value. + * @return The return value is a value of the enumeration. + */ + public static KeystoneError fromValue(Integer value) { + return intToEnumMapping.get(value); + } + + /** + * Retrieves the value of the enumeration, that corresponds to the value used in the enumeration in C. + * + * @return The return value is an integer value. + */ + public int value() { + return value; + } + + /** + * Internal interface referencing the base error codes. + */ + interface Base { + int asm = 128; + int asmArch = 512; + } +} diff --git a/bindings/java/src/main/java/keystone/KeystoneMode.java b/bindings/java/src/main/java/keystone/KeystoneMode.java new file mode 100644 index 0000000..2e7e89a --- /dev/null +++ b/bindings/java/src/main/java/keystone/KeystoneMode.java @@ -0,0 +1,170 @@ +/* + * Copyright (c) 2018 Jämes Ménétrey + * + * This file is part of the Keystone Java bindings which is released under MIT. + * See file LICENSE in the Java bindings folder for full license details. + */ + +package keystone; + +import keystone.jna.JnaEnum; + +import java.util.HashMap; +import java.util.Map; + +/** + * The supported mode type by Keystone. + */ +public enum KeystoneMode implements JnaEnum { + /** + * Little-endian mode (default mode). + */ + LittleEndian(0), + + /** + * Big-endian mode. + */ + BigEndian(1 << 30), + + // arm / arm64 + + /** + * ARM mode. + */ + Arm(1), + + /** + * THUMB mode (including Thumb-2). + */ + ArmThumb(1 << 4), + + /** + * ARMv8 A32 encodings for ARM. + */ + ArmV8(1 << 6), + + // mips + + /** + * MicroMips mode. + */ + MipsMicro(1 << 4), + + /** + * Mips III ISA. + */ + Mips3(1 << 5), + + /** + * Mips32r6 ISA. + */ + Mips32r6(1 << 6), + + /** + * Mips32 ISA. + */ + Mips32(1 << 2), + + /** + * Mips64 ISA. + */ + Mips64(1 << 3), + + // x86 / x64 + + /** + * 16-bit mode. + */ + Mode16(1 << 1), + + /** + * 32-bit mode. + */ + Mode32(1 << 2), + + /** + * 64-bit mode. + */ + Mode64(1 << 3), + + // ppc + + /** + * 32-bit mode. + */ + Ppc32(1 << 2), + + /** + * 64-bit mode. + */ + Ppc64(1 << 3), + + /** + * Quad Processing eXtensions mode. + */ + PpcQpx(1 << 4), + + // sparc + + /** + * 32-bit mode. + */ + Sparc32(1 << 2), + + /** + * 64-bit mode. + */ + Sparc64(1 << 3), + + /** + * SparcV9 mode. + */ + SparcV9(1 << 4); + + /** + * Mapping table to determine an enumeration value based on an integer with a complexity of θ(1). + */ + private static Map intToEnumMapping = new HashMap<>(); + + static { + // Initializes the mapping table. + for (KeystoneMode mode : KeystoneMode.values()) { + intToEnumMapping.put(mode.value(), mode); + } + } + + /** + * Holds the integer value of the enumeration, that corresponds to the value used in the enumeration in C. + */ + private final int value; + + /** + * Constructor of the enumeration. + * + * @param value The integer value, that corresponds to the value used in the enumeration in C. + */ + KeystoneMode(int value) { + this.value = value; + } + + /** + * Converts an integer value into its corresponding enumeration value. + *

+ * The complexity of the conversion is θ(1). + * + * @param value The integer value. + * @return The return value is a value of the enumeration. + */ + public static KeystoneMode fromValue(Integer value) { + return intToEnumMapping.get(value); + } + + /** + * Retrieves the value of the enumeration, that corresponds to the value used in the enumeration in C. + * + * @return The return value is an integer value. + */ + public int value() { + return value; + } +} diff --git a/bindings/java/src/main/java/keystone/KeystoneOptionType.java b/bindings/java/src/main/java/keystone/KeystoneOptionType.java new file mode 100644 index 0000000..ebd7a27 --- /dev/null +++ b/bindings/java/src/main/java/keystone/KeystoneOptionType.java @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2018 Jämes Ménétrey + * + * This file is part of the Keystone Java bindings which is released under MIT. + * See file LICENSE in the Java bindings folder for full license details. + */ + +package keystone; + +import keystone.jna.JnaEnum; + +import java.util.HashMap; +import java.util.Map; + +public enum KeystoneOptionType implements JnaEnum { + /** + * Choose syntax for input assembly. + */ + Syntax(1), + + /** + * Set symbol resolver callback. + */ + SymbolResolver(2); + + /** + * Mapping table to determine an enumeration value based on an integer with a complexity of θ(1). + */ + private static Map intToEnumMapping = new HashMap<>(); + + static { + // Initializes the mapping table. + for (KeystoneOptionType type : KeystoneOptionType.values()) { + intToEnumMapping.put(type.value(), type); + } + } + + /** + * Holds the integer value of the enumeration, that corresponds to the value used in the enumeration in C. + */ + private final int value; + + /** + * Constructor of the enumeration. + * + * @param value The integer value, that corresponds to the value used in the enumeration in C. + */ + KeystoneOptionType(int value) { + this.value = value; + } + + /** + * Converts an integer value into its corresponding enumeration value. + *

+ * The complexity of the conversion is θ(1). + * + * @param value The integer value. + * @return The return value is a value of the enumeration. + */ + public static KeystoneOptionType fromValue(Integer value) { + return intToEnumMapping.get(value); + } + + /** + * Retrieves the value of the enumeration, that corresponds to the value used in the enumeration in C. + * + * @return The return value is an integer value. + */ + public int value() { + return value; + } +} diff --git a/bindings/java/src/main/java/keystone/KeystoneOptionValue.java b/bindings/java/src/main/java/keystone/KeystoneOptionValue.java new file mode 100644 index 0000000..005b48b --- /dev/null +++ b/bindings/java/src/main/java/keystone/KeystoneOptionValue.java @@ -0,0 +1,104 @@ +/* + * Copyright (c) 2018 Jämes Ménétrey + * + * This file is part of the Keystone Java bindings which is released under MIT. + * See file LICENSE in the Java bindings folder for full license details. + */ + +package keystone; + +import keystone.jna.JnaEnum; + +import java.util.HashMap; +import java.util.Map; + +/** + * Runtime option values (associated with {@link KeystoneOptionType}). + */ +public class KeystoneOptionValue { + + /** + * Runtime option values associated with the assembly syntax. + * + * @see KeystoneOptionType#Syntax + */ + public enum KeystoneOptionSyntax implements JnaEnum { + /** + * X86 Intel syntax - default on X86 (KS_OPT_SYNTAX). + */ + Intel(1), + + /** + * X86 ATT asm syntax (KS_OPT_SYNTAX). + */ + Att(1 << 1), + + /** + * X86 Nasm syntax (KS_OPT_SYNTAX). + */ + Nasm(1 << 2), + + /** + * X86 Masm syntax (KS_OPT_SYNTAX) - unsupported yet. + */ + Masm(1 << 3), + + /** + * X86 GNU GAS syntax (KS_OPT_SYNTAX). + */ + Gas(1 << 4), + + /** + * All immediates are in hex format (i.e 12 is 0x12). + */ + Radix16(1 << 5); + + /** + * Mapping table to determine an enumeration value based on an integer with a complexity of θ(1). + */ + private static Map intToEnumMapping = new HashMap<>(); + + static { + // Initializes the mapping table. + for (KeystoneOptionSyntax syntax : KeystoneOptionSyntax.values()) { + intToEnumMapping.put(syntax.value(), syntax); + } + } + + /** + * Holds the integer value of the enumeration, that corresponds to the value used in the enumeration in C. + */ + private final int value; + + /** + * Constructor of the enumeration. + * + * @param value The integer value, that corresponds to the value used in the enumeration in C. + */ + KeystoneOptionSyntax(int value) { + this.value = value; + } + + /** + * Converts an integer value into its corresponding enumeration value. + *

+ * The complexity of the conversion is θ(1). + * + * @param value The integer value. + * @return The return value is a value of the enumeration. + */ + public static KeystoneOptionSyntax fromValue(Integer value) { + return intToEnumMapping.get(value); + } + + /** + * Retrieves the value of an element in the enumeration. + * + * @return The return value is an integer number, that represents the value in the native library. + */ + @Override + public int value() { + return value; + } + } +} \ No newline at end of file diff --git a/bindings/java/src/main/java/keystone/SymbolResolverCallback.java b/bindings/java/src/main/java/keystone/SymbolResolverCallback.java new file mode 100644 index 0000000..10851c1 --- /dev/null +++ b/bindings/java/src/main/java/keystone/SymbolResolverCallback.java @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2018 Jämes Ménétrey + * + * This file is part of the Keystone Java bindings which is released under MIT. + * See file LICENSE in the Java bindings folder for full license details. + */ + +package keystone; + +import com.sun.jna.Callback; +import com.sun.jna.ptr.LongByReference; + +/** + * An interface that represents a callback to provide a value for a missing symbol. + */ +public interface SymbolResolverCallback extends Callback { + /** + * A callback triggered when a unrecognized symbol is found. + * + * @param symbol The symbol to resolve. + * @param value The value to modify if the symbol is resolved. + * @return The return value must be {@code true} if the symbol can be resolved; otherwise {@code false}. + */ + boolean onResolve(String symbol, LongByReference value); +} diff --git a/bindings/java/src/main/java/keystone/exceptions/AssembleFailedKeystoneException.java b/bindings/java/src/main/java/keystone/exceptions/AssembleFailedKeystoneException.java new file mode 100644 index 0000000..f5d4776 --- /dev/null +++ b/bindings/java/src/main/java/keystone/exceptions/AssembleFailedKeystoneException.java @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2018 Jämes Ménétrey + * + * This file is part of the Keystone Java bindings which is released under MIT. + * See file LICENSE in the Java bindings folder for full license details. + */ + +package keystone.exceptions; + +import keystone.KeystoneError; + +/** + * An exception that represents a failure while assembling code. + */ +public class AssembleFailedKeystoneException extends KeystoneException { + /** + * The assembly code that generates the error. + */ + private final String assembly; + + public AssembleFailedKeystoneException(KeystoneError keystoneError, String assembly) { + super(keystoneError, "Error while assembling `" + assembly + "`"); + + this.assembly = assembly; + } + + /** + * Gets the assembly code that generates the error. + */ + public String getAssembly() { + return assembly; + } +} diff --git a/bindings/java/src/main/java/keystone/exceptions/KeystoneException.java b/bindings/java/src/main/java/keystone/exceptions/KeystoneException.java new file mode 100644 index 0000000..95595c5 --- /dev/null +++ b/bindings/java/src/main/java/keystone/exceptions/KeystoneException.java @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2018 Jämes Ménétrey + * + * This file is part of the Keystone Java bindings which is released under MIT. + * See file LICENSE in the Java bindings folder for full license details. + */ + +package keystone.exceptions; + +import keystone.KeystoneError; +import keystone.natives.DirectMappingKeystoneNative; + +/** + * The base class for all the exceptions thrown by the library Keystone. + */ +public abstract class KeystoneException extends RuntimeException { + /** + * The error thrown by Keystone. + */ + private final KeystoneError keystoneError; + + /** + * Creates a new instance of {@link KeystoneException}. + * + * @param keystoneError The error code of Keystone. + * @param message A human-readable message of the error. + */ + KeystoneException(KeystoneError keystoneError, String message) { + super(message + " : " + DirectMappingKeystoneNative.ks_strerror(keystoneError)); + + this.keystoneError = keystoneError; + } + + /** + * Gets the error code of Keystone. + */ + public KeystoneError getKeystoneError() { + return keystoneError; + } +} diff --git a/bindings/java/src/main/java/keystone/exceptions/OpenFailedKeystoneException.java b/bindings/java/src/main/java/keystone/exceptions/OpenFailedKeystoneException.java new file mode 100644 index 0000000..e3937e5 --- /dev/null +++ b/bindings/java/src/main/java/keystone/exceptions/OpenFailedKeystoneException.java @@ -0,0 +1,19 @@ +/* + * Copyright (c) 2018 Jämes Ménétrey + * + * This file is part of the Keystone Java bindings which is released under MIT. + * See file LICENSE in the Java bindings folder for full license details. + */ + +package keystone.exceptions; + +import keystone.KeystoneError; + +/** + * An exception that represents a failure to open the library Keystone. + */ +public class OpenFailedKeystoneException extends KeystoneException { + public OpenFailedKeystoneException(KeystoneError keystoneError) { + super(keystoneError, "Keystone library could not be opened"); + } +} diff --git a/bindings/java/src/main/java/keystone/exceptions/SetOptionFailedKeystoneException.java b/bindings/java/src/main/java/keystone/exceptions/SetOptionFailedKeystoneException.java new file mode 100644 index 0000000..9f1f527 --- /dev/null +++ b/bindings/java/src/main/java/keystone/exceptions/SetOptionFailedKeystoneException.java @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2018 Jämes Ménétrey + * + * This file is part of the Keystone Java bindings which is released under MIT. + * See file LICENSE in the Java bindings folder for full license details. + */ + +package keystone.exceptions; + +import keystone.KeystoneError; +import keystone.KeystoneOptionType; + +/** + * An exception that represents an error while setting an option in the Keystone library. + */ +public class SetOptionFailedKeystoneException extends KeystoneException { + /** + * The type of the option that generated the exception. + */ + private final KeystoneOptionType optionType; + + /** + * The value of the option that generated the exception. + */ + private final int optionValue; + + public SetOptionFailedKeystoneException(KeystoneError keystoneError, KeystoneOptionType type, int value) { + super(keystoneError, createErrorMessage(type, value)); + this.optionType = type; + this.optionValue = value; + } + + private static String createErrorMessage(KeystoneOptionType type, int value) { + return "Error while setting the option `" + type + + "` with the value `" + value + "`"; + } + + /** + * Gets the type of the option that generated the exception. + */ + public KeystoneOptionType getOptionType() { + return optionType; + } + + /** + * Gets the value of the option that generated the exception. + */ + public int getOptionValue() { + return optionValue; + } +} diff --git a/bindings/java/src/main/java/keystone/jna/EnumTypeMapper.java b/bindings/java/src/main/java/keystone/jna/EnumTypeMapper.java new file mode 100644 index 0000000..cd7f6bf --- /dev/null +++ b/bindings/java/src/main/java/keystone/jna/EnumTypeMapper.java @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2018 Jämes Ménétrey + * + * This file is part of the Keystone Java bindings which is released under MIT. + * See file LICENSE in the Java bindings folder for full license details. + */ + +package keystone.jna; + +import com.sun.jna.DefaultTypeMapper; +import com.sun.jna.FromNativeContext; +import com.sun.jna.ToNativeContext; +import com.sun.jna.TypeConverter; + +import java.util.function.Function; + +/** + * Extends the default type mapper of JNA in order to provide custom bindings for enumerations. + */ +class EnumTypeMapper extends DefaultTypeMapper { + /** + * Add a {@link TypeConverter} to provide bidirectional mapping between + * a native and Java type. + * + * @param enumerationType The type of the enumeration to bind. + * @param fromNativeInteger A function that converts the native enumeration into the Java enumeration. + * @param The type of the Java enumeration. + */ + void addTypeConverter(Class enumerationType, Function fromNativeInteger) { + addTypeConverter(enumerationType, new TypeConverter() { + + /** + * Converts the native enumeration into the Java enumeration. + * + * @param nativeValue The native element. + * @param context The context for converting a native value into a Java type. + * @return The return value is a Java enumeration. + */ + @Override + public Object fromNative(Object nativeValue, FromNativeContext context) { + return fromNativeInteger.apply((int) nativeValue); + } + + /** + * Returns the native type of the conversion. The enumeration are of type {@link Integer}. + */ + @Override + public Class nativeType() { + return Integer.class; + } + + /** + * Converts a Java enumeration into a native enumeration. + * + * @param value The Java element. + * @param context The context of converting a Java type into a native value. + * @return The return value is a native value from an enumeration. + */ + @Override + public Object toNative(Object value, ToNativeContext context) { + return ((JnaEnum) value).value(); + } + }); + } +} diff --git a/bindings/java/src/main/java/keystone/jna/JnaEnum.java b/bindings/java/src/main/java/keystone/jna/JnaEnum.java new file mode 100644 index 0000000..6a26159 --- /dev/null +++ b/bindings/java/src/main/java/keystone/jna/JnaEnum.java @@ -0,0 +1,20 @@ +/* + * Copyright (c) 2018 Jämes Ménétrey + * + * This file is part of the Keystone Java bindings which is released under MIT. + * See file LICENSE in the Java bindings folder for full license details. + */ + +package keystone.jna; + +/** + * A contract that represents an JNA enumeration. + */ +public interface JnaEnum { + /** + * Retrieves the value of an element in the enumeration. + * + * @return The return value is an integer number, that represents the value in the native library. + */ + int value(); +} diff --git a/bindings/java/src/main/java/keystone/jna/KeystoneTypeMapper.java b/bindings/java/src/main/java/keystone/jna/KeystoneTypeMapper.java new file mode 100644 index 0000000..338c2ca --- /dev/null +++ b/bindings/java/src/main/java/keystone/jna/KeystoneTypeMapper.java @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2018 Jämes Ménétrey + * + * This file is part of the Keystone Java bindings which is released under MIT. + * See file LICENSE in the Java bindings folder for full license details. + */ + +package keystone.jna; + +import keystone.*; + +/** + * Extends the numeration type mapper in order to register the enumeration used by Keystone. + */ +public class KeystoneTypeMapper extends EnumTypeMapper { + public KeystoneTypeMapper() { + addTypeConverter(KeystoneError.class, KeystoneError::fromValue); + addTypeConverter(KeystoneArchitecture.class, KeystoneArchitecture::fromValue); + addTypeConverter(KeystoneMode.class, KeystoneMode::fromValue); + addTypeConverter(KeystoneOptionType.class, KeystoneOptionType::fromValue); + addTypeConverter(KeystoneOptionValue.KeystoneOptionSyntax.class, KeystoneOptionValue.KeystoneOptionSyntax::fromValue); + } +} diff --git a/bindings/java/src/main/java/keystone/natives/CleanerContainer.java b/bindings/java/src/main/java/keystone/natives/CleanerContainer.java new file mode 100644 index 0000000..ccc60fd --- /dev/null +++ b/bindings/java/src/main/java/keystone/natives/CleanerContainer.java @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2018 Jämes Ménétrey + * + * This file is part of the Keystone Java bindings which is released under MIT. + * See file LICENSE in the Java bindings folder for full license details. + */ + +package keystone.natives; + +import java.lang.ref.Cleaner; + +/** + * An abstract class that automatically runs the action passed by argument in the constructor once + * phantom reachable, thanks to {@link Cleaner}. + * + * @see Cleaner + * @see Java 9 Cleaner as an illustration of good encapsulation + */ +public abstract class CleanerContainer implements AutoCloseable { + /** + * Creates a single instance of the cleaner for all the native resources. + */ + private static final Cleaner cleaner = Cleaner.create(); + + /** + * The instance of {@link java.lang.ref.Cleaner.Cleanable} that refers to the native resource. + */ + private final Cleaner.Cleanable cleanable; + + /** + * Registers a cleaning action to run when the object becomes phantom reachable. + * + * @param action a {@code Runnable} to invoke when the object becomes phantom reachable. + */ + CleanerContainer(Runnable action) { + cleanable = cleaner.register(this, action); + } + + /** + * Closes this resource, relinquishing any underlying resources. + * This method is invoked automatically on objects managed by the + * {@code try}-with-resources statement. + */ + @Override + public void close() { + cleanable.clean(); + } +} diff --git a/bindings/java/src/main/java/keystone/natives/DirectMappingKeystoneNative.java b/bindings/java/src/main/java/keystone/natives/DirectMappingKeystoneNative.java new file mode 100644 index 0000000..9083a12 --- /dev/null +++ b/bindings/java/src/main/java/keystone/natives/DirectMappingKeystoneNative.java @@ -0,0 +1,179 @@ +/* + * Copyright (c) 2018 Jämes Ménétrey + * + * This file is part of the Keystone Java bindings which is released under MIT. + * See file LICENSE in the Java bindings folder for full license details. + */ + +package keystone.natives; + +import com.sun.jna.Library; +import com.sun.jna.Native; +import com.sun.jna.NativeLibrary; +import com.sun.jna.Pointer; +import com.sun.jna.ptr.IntByReference; +import com.sun.jna.ptr.PointerByReference; +import keystone.*; +import keystone.jna.KeystoneTypeMapper; + +import java.util.HashMap; +import java.util.Map; + +/** + * The class providing the native functions of Keystone using the Direct Mapping of JNA for best performance. + *

+ * The original function prototypes are declared in the header file keystone.h. + * + * @see JNA: Direct Mapping + */ +public final class DirectMappingKeystoneNative { + + static { + Map options = new HashMap<>(); + options.put(Library.OPTION_TYPE_MAPPER, new KeystoneTypeMapper()); + + // Direct Mapping using JNA + Native.register(NativeLibrary.getInstance("keystone", options)); + } + + /** + * Private constructor to prevent any instantiation of the class. + */ + private DirectMappingKeystoneNative() { + } + + /** + * Determine if the given architecture is supported by this library. + *

+ * Native function prototype: bool ks_arch_supported(ks_arch arch); + * + * @param architecture architecture type + * @return {@code true} if this library supports the given arch. + */ + public static native boolean ks_arch_supported(KeystoneArchitecture architecture); + + /** + * Assemble a string given its the buffer, size, start address and number + * of instructions to be decoded. + * This API dynamically allocate memory to contain assembled instruction. + * Resulted array of bytes containing the machine code is put into @machineCode. + *

+ * On failure, call {@link DirectMappingKeystoneNative#ks_errno} for error code. + *

+ * NOTE 1: this API will automatically determine memory needed to contain + * output bytes in *encoding. + *

+ * NOTE 2: caller must free the allocated memory itself to avoid memory leaking. + *

+ * Native function prototype: int ks_asm(ks_engine *ks, + * const char *string, + * uint64_t address, + * unsigned char **encoding, size_t *encoding_size, + * size_t *stat_count); + * + * @param engine handle returned by ks_open() + * @param assembly NULL-terminated assembly string. Use ; or \n to separate statements. + * @param address address of the first assembly instruction, or 0 to ignore. + * @param machineCodeBuffer array of bytes containing encoding of input assembly string. + * NOTE: *encoding will be allocated by this function, and should be freed + * with ks_free() function. + * @param machineCodeSize size of machineCode + * @param numberOfStatements number of statements successfully processed + * @return 0 on success, or -1 on failure. + */ + public static native int ks_asm(Pointer engine, String assembly, long address, PointerByReference machineCodeBuffer, + IntByReference machineCodeSize, IntByReference numberOfStatements); + + /** + * Close KS instance: MUST do to release the handle when it is not used anymore. + * NOTE: this must be called only when there is no longer usage of Keystone. + * The reason is this API releases some cached memory, thus access to any + * Keystone API after ks_close() might crash your application. + * After this, @engine is invalid, and no longer usable. + *

+ * Native function prototype: ks_err ks_close(ks_engine *ks); + * + * @param engine pointer to a handle returned by ks_open(). + * @return KS_ERR_OK on success, or other value on failure (refer to ks_err enum for detailed error). + */ + public static native KeystoneError ks_close(Pointer engine); + + /** + * Report the last error number when some API function fail. + * Like glibc's errno, ks_errno might not retain its old error once accessed. + *

+ * Native function prototype: ks_err ks_errno(ks_engine *ks) + * + * @param engine handle returned by ks_open() + * @return error code of ks_err enum type {@link KeystoneError} + */ + public static native KeystoneError ks_errno(Pointer engine); + + /** + * Free memory allocated by ks_asm(). + *

+ * Native function prototype: void ks_free(unsigned char *p) + * + * @param machineCodeBuffer memory allocated in @encoding argument of ks_asm() + */ + public static native void ks_free(Pointer machineCodeBuffer); + + /** + * Create new instance of Keystone engine. + *

+ * Native function prototype: ks_err ks_open(ks_arch arch, int mode, ks_engine **ks); + * + * @param architecture architecture type (KS_ARCH_*). + * @param mode hardware mode. This is combined of KS_MODE_*. + * @param engine pointer to ks_engine, which will be updated at return time. + * @return KS_ERR_OK on success, or other value on failure (refer to ks_err enum for detailed error). + */ + public static native KeystoneError ks_open(KeystoneArchitecture architecture, KeystoneMode mode, PointerByReference engine); + + /** + * Set option for Keystone engine at runtime. + *

+ * Native function prototype: err ks_option(ks_engine *ks, ks_opt_type type, size_t value); + * + * @param engine handle returned by ks_open() + * @param type type of option to be set. See {@link KeystoneOptionType} + * @param value option value corresponding with @type + * @return {@link KeystoneError#Ok} on success, or other value on failure. + * Refer to {@link KeystoneError} enum for detailed error. + */ + public static native KeystoneError ks_option(Pointer engine, KeystoneOptionType type, int value); + + /** + * Set option for Keystone engine at runtime + *

+ * Native function prototype: err ks_option(ks_engine *ks, ks_opt_type type, size_t value); + * + * @param engine handle returned by ks_open() + * @param type ype of option to be set. See {@link KeystoneOptionType} + * @param callback callback to resolve a unrecognized symbol. + * @return {@link KeystoneError#Ok} on success, or other value on failure. + * Refer to {@link KeystoneError} enum for detailed error. + */ + public static native KeystoneError ks_option(Pointer engine, KeystoneOptionType type, SymbolResolverCallback callback); + + /** + * Return a string describing given error code. + *

+ * Native function prototype: const char *ks_strerror(ks_err code); + * + * @param errorCode error code. + * @return returns a pointer to a string that describes the error code passed in the argument @errorCode. + */ + public static native String ks_strerror(KeystoneError errorCode); + + /** + * Returns combined API version & major and minor version numbers. + *

+ * Native function prototype: unsigned int ks_version(unsigned int *major, unsigned int *minor); + * + * @param major The major number of API version. + * @param minor The minor number of API version. + * @return An hexadecimal number as (major << 8 | minor), which encodes both major & minor versions. + */ + public static native int ks_version(IntByReference major, IntByReference minor); +} diff --git a/bindings/java/src/main/java/keystone/natives/KeystoneCleanerContainer.java b/bindings/java/src/main/java/keystone/natives/KeystoneCleanerContainer.java new file mode 100644 index 0000000..1338305 --- /dev/null +++ b/bindings/java/src/main/java/keystone/natives/KeystoneCleanerContainer.java @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2018 Jämes Ménétrey + * + * This file is part of the Keystone Java bindings which is released under MIT. + * See file LICENSE in the Java bindings folder for full license details. + */ + +package keystone.natives; + +import com.sun.jna.Pointer; + +/** + * The cleaner that automatically close the {@code Pointer} of Keystone once the managed object is phantom reachable. + */ +public class KeystoneCleanerContainer extends CleanerContainer { + + /** + * Registers an object and a cleaning action to run when the object becomes phantom reachable. + */ + public KeystoneCleanerContainer(Pointer pointerToEngine) { + super(new KeystoneState(pointerToEngine)); + } + + /** + * The internal state that contains the logic to free the native resource. + */ + static class KeystoneState implements Runnable { + + /** + * A pointer to the native resource. + */ + private final Pointer pointerToEngine; + + /** + * Create a new instance of {@link KeystoneState}. + * + * @param pointerToEngine The pointer to the Keystone native resource. + */ + KeystoneState(Pointer pointerToEngine) { + + this.pointerToEngine = pointerToEngine; + } + + /** + * Calls the logic to collect the native resource. + */ + @Override + public void run() { + DirectMappingKeystoneNative.ks_close(pointerToEngine); + } + } +} diff --git a/bindings/java/src/main/java/keystone/utilities/Version.java b/bindings/java/src/main/java/keystone/utilities/Version.java new file mode 100644 index 0000000..d2b0f24 --- /dev/null +++ b/bindings/java/src/main/java/keystone/utilities/Version.java @@ -0,0 +1,97 @@ +/* + * Copyright (c) 2018 Jämes Ménétrey + * + * This file is part of the Keystone Java bindings which is released under MIT. + * See file LICENSE in the Java bindings folder for full license details. + */ + +package keystone.utilities; + +/** + * Represents the version number of Keystone. This class cannot be inherited. + */ +public final class Version implements Comparable { + private final int major; + private final int minor; + + /** + * Initializes a new instance of the {@link Version} class using the specified major and minor values. + * + * @param major The major version number. + * @param minor The minor version number. + */ + public Version(int major, int minor) { + this.major = major; + this.minor = minor; + } + + /** + * Gets the value of the major component of the version number for the current {@link Version} object. + * + * @return The major version number. + */ + public int major() { + return major; + } + + /** + * Gets the value of the minor component of the version number for the current {@link Version} object. + * + * @return The minor version number. + */ + public int minor() { + return minor; + } + + /** + * Compares this object with the specified object for order. Returns a + * negative integer, zero, or a positive integer as this object is less + * than, equal to, or greater than the specified object. + * + *

The implementor must ensure sgn(x.compareTo(y)) == + * -sgn(y.compareTo(x)) for all x and y. (This + * implies that x.compareTo(y) must throw an exception iff + * y.compareTo(x) throws an exception.) + * + *

The implementor must also ensure that the relation is transitive: + * (x.compareTo(y)>0 && y.compareTo(z)>0) implies + * x.compareTo(z)>0. + * + *

Finally, the implementor must ensure that x.compareTo(y)==0 + * implies that sgn(x.compareTo(z)) == sgn(y.compareTo(z)), for + * all z. + * + *

It is strongly recommended, but not strictly required that + * (x.compareTo(y)==0) == (x.equals(y)). Generally speaking, any + * class that implements the Comparable interface and violates + * this condition should clearly indicate this fact. The recommended + * language is "Note: this class has a natural ordering that is + * inconsistent with equals." + * + *

In the foregoing description, the notation + * sgn(expression) designates the mathematical + * signum function, which is defined to return one of -1, + * 0, or 1 according to whether the value of + * expression is negative, zero or positive. + * + * @param o the object to be compared. + * @return a negative integer, zero, or a positive integer as this object + * is less than, equal to, or greater than the specified object. + * @throws NullPointerException if the specified object is null + * @throws ClassCastException if the specified object's type prevents it + * from being compared to this object. + */ + @Override + public int compareTo(Version o) { + if (o == null) return 1; + + if (major != o.major) { + if (major > o.major) { + return 1; + } + return -1; + } + + return Integer.compare(minor, o.minor); + } +} diff --git a/bindings/java/src/main/resources/darwin/.gitkeep b/bindings/java/src/main/resources/darwin/.gitkeep new file mode 100644 index 0000000..e69de29 diff --git a/bindings/java/src/main/resources/win32-x86-64/.gitkeep b/bindings/java/src/main/resources/win32-x86-64/.gitkeep new file mode 100644 index 0000000..e69de29 diff --git a/bindings/java/src/main/resources/win32-x86/.gitkeep b/bindings/java/src/main/resources/win32-x86/.gitkeep new file mode 100644 index 0000000..e69de29 diff --git a/bindings/java/src/test/java/keystone/KeystoneTest.java b/bindings/java/src/test/java/keystone/KeystoneTest.java new file mode 100644 index 0000000..dc8d9bb --- /dev/null +++ b/bindings/java/src/test/java/keystone/KeystoneTest.java @@ -0,0 +1,220 @@ +/* + * Copyright (c) 2018 Jämes Ménétrey + * + * This file is part of the Keystone Java bindings which is released under MIT. + * See file LICENSE in the Java bindings folder for full license details. + */ + +package keystone; + +import com.sun.jna.ptr.LongByReference; +import keystone.exceptions.AssembleFailedKeystoneException; +import keystone.exceptions.OpenFailedKeystoneException; +import keystone.exceptions.SetOptionFailedKeystoneException; +import keystone.utilities.Version; +import org.junit.jupiter.api.AfterEach; +import org.junit.jupiter.api.BeforeEach; +import org.junit.jupiter.api.Test; + +import java.util.LinkedList; + +import static org.junit.jupiter.api.Assertions.*; + +class KeystoneTest { + + private Keystone keystone; + + @BeforeEach + void setUp() { + keystone = new Keystone(KeystoneArchitecture.X86, KeystoneMode.Mode64); + } + + @AfterEach + void tearDown() { + } + + @Test + void ctor_ifInvalidArguments_shouldThrowAnException() { + try { + new Keystone(KeystoneArchitecture.Ppc, KeystoneMode.SparcV9); + fail("An exception must be thrown upon invalid arguments are used."); + } catch (OpenFailedKeystoneException e) { + assertEquals(KeystoneError.Mode, e.getKeystoneError()); + } + } + + @Test + void assemble_shouldAssembleIncDec() { + // Arrange + var assembly = "INC EAX;DEC EAX"; + var expectedMachineCode = new byte[]{(byte) 0xFF, (byte) 0xC0, (byte) 0xFF, (byte) 0xC8}; + var expectedNumberOfStatements = 2; + + // Act + var encoded = keystone.assemble(assembly); + + // Assert + assertArrayEquals(expectedMachineCode, encoded.getMachineCode()); + assertEquals(expectedNumberOfStatements, encoded.getNumberOfStatements()); + } + + @Test + void assemble_withAddress_shouldAssembleDoubleNop() { + // Arrange + var assembly = "NOP;NOP"; + var expectedMachineCode = new byte[]{(byte) 0x90, (byte) 0x90}; + var expectedNumberOfStatements = 2; + var expectedAddress = 0x200; + + // Act + var encoded = keystone.assemble(assembly, expectedAddress); + + // Assert + assertArrayEquals(expectedMachineCode, encoded.getMachineCode()); + assertEquals(expectedNumberOfStatements, encoded.getNumberOfStatements()); + assertEquals(expectedAddress, encoded.getAddress()); + } + + @Test + void assemble_ifAssemblyCodeInvalid_shouldThrowAnException() { + // Arrange + var assembly = "UNK"; + + // Act and Assert + try { + keystone.assemble(assembly, 0); + fail("The assembly instruction is invalid. It should not pass the unit test."); + } catch (AssembleFailedKeystoneException e) { + assertEquals(KeystoneError.AsmMnemonicFail, e.getKeystoneError()); + assertEquals(assembly, e.getAssembly()); + } + } + + @Test + void assemble_withCollectionAndAddress_shouldAssembleIncDec() { + // Arrange + var assembly = new LinkedList(); + var expectedMachineCode = new byte[]{(byte) 0xFF, (byte) 0xC0, (byte) 0xFF, (byte) 0xC8}; + var expectedNumberOfStatements = 2; + + // Act + assembly.add("INC EAX"); + assembly.add("DEC EAX"); + var encoded = keystone.assemble(assembly); + + // Assert + assertArrayEquals(expectedMachineCode, encoded.getMachineCode()); + assertEquals(expectedNumberOfStatements, encoded.getNumberOfStatements()); + } + + @Test + void assemble_withSymbolWithoutResolver_shouldFail() { + // Arrange + var assembly = "MOV EAX, TEST"; + + // Act and Assert + try { + keystone.assemble(assembly); + fail("The assembly instruction is composed of an undefined symbol. It should not pass the unit test"); + } catch (AssembleFailedKeystoneException e) { + assertEquals(KeystoneError.AsmSymbolMissing, e.getKeystoneError()); + } + } + + @Test + void setAssemblySyntax_withAttSyntax_shouldBeEqualToX86Syntax() { + // Act + var x86Result = keystone.assemble("INC ECX; DEC EDX"); + keystone.setAssemblySyntax(KeystoneOptionValue.KeystoneOptionSyntax.Att); + var attResult = keystone.assemble("INC %ecx; DEC %edx"); + + // Assert + assertArrayEquals(x86Result.getMachineCode(), attResult.getMachineCode()); + } + + @Test + void setOption_ifInvalidArguments_shouldTrowAnException() { + // Arrange + var expectedType = KeystoneOptionType.Syntax; + var invalidValue = -1; + + // Act and Assert + try { + keystone.setOption(expectedType, invalidValue); + } catch (SetOptionFailedKeystoneException e) { + assertEquals(KeystoneError.OptInvalid, e.getKeystoneError()); + assertEquals(expectedType, e.getOptionType()); + assertEquals(invalidValue, e.getOptionValue()); + } + } + + @Test + void setSymbolResolver_assembleCustomSymbol_shouldProduceValidAssemblyCode() { + // Arrange + var expectedSymbol = "TEST"; + var expectedValue = (byte) 0x66; + var movOpcode = (byte) 0xB8; + var assembly = "MOV EAX, " + expectedSymbol; + var symbolResolver = new SymbolResolverCallback() { + @Override + public boolean onResolve(String symbol, LongByReference value) { + assertEquals(expectedSymbol, symbol); + + value.setValue(expectedValue); + return true; + } + }; + + // Act + keystone.setSymbolResolver(symbolResolver); + var assemblyCode = keystone.assemble(assembly); + + // Assert + assertEquals(1, assemblyCode.getNumberOfStatements()); + assertEquals(movOpcode, assemblyCode.getMachineCode()[0]); + assertEquals(expectedValue, assemblyCode.getMachineCode()[1]); + } + + @Test + void unsetSymbolResolver_assembleCustomSymbol_shouldfailBecauseTheCallbackHasBeenUnset() { + // Arrange + var expectedSymbol = "TEST"; + var expectedValue = (byte) 0x66; + var assembly = "MOV EAX, " + expectedSymbol; + var symbolResolver = new SymbolResolverCallback() { + @Override + public boolean onResolve(String symbol, LongByReference value) { + assertEquals(expectedSymbol, symbol); + + value.setValue(expectedValue); + return true; + } + }; + + // Act and Assert + keystone.setSymbolResolver(symbolResolver); + keystone.unsetSymbolResolver(); + + try { + keystone.assemble(assembly); + fail("The assembly instruction is composed of an undefined symbol and no resolver should be available."); + } catch (AssembleFailedKeystoneException e) { + assertEquals(KeystoneError.AsmSymbolMissing, e.getKeystoneError()); + } + } + + @Test + void isArchitectureSupported_shouldSupportX86Everywhere() { + assertTrue(Keystone.isArchitectureSupported(KeystoneArchitecture.X86)); + } + + @Test + void version_shouldBeDifferentFromZero() { + assertEquals(1, keystone.version().compareTo(new Version(0, 0))); + } + + @Test + void close_shouldNotThrowAnyException() { + keystone.close(); + } +} \ No newline at end of file diff --git a/bindings/java/src/test/java/keystone/natives/CleanerContainerTest.java b/bindings/java/src/test/java/keystone/natives/CleanerContainerTest.java new file mode 100644 index 0000000..8147d82 --- /dev/null +++ b/bindings/java/src/test/java/keystone/natives/CleanerContainerTest.java @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2018 Jämes Ménétrey + * + * This file is part of the Keystone Java bindings which is released under MIT. + * See file LICENSE in the Java bindings folder for full license details. + */ + +package keystone.natives; + +import org.junit.jupiter.api.Test; + +import java.util.concurrent.atomic.AtomicBoolean; + +import static org.junit.jupiter.api.Assertions.assertTrue; + +class CleanerContainerTest { + @Test + void dtor_WhenGarbageCollected_ShouldTriggerThePhantomReachableAction() throws InterruptedException { + // Arrange + var atomicBoolean = new AtomicBoolean(false); + new MockCleanerContainer(atomicBoolean); + + // Act + System.gc(); + Thread.sleep(1); + + // Assert + assertTrue(atomicBoolean.get()); + } +} + +class MockCleanerContainer extends CleanerContainer { + + MockCleanerContainer(AtomicBoolean atomicBoolean) { + super(new MockState(atomicBoolean)); + } + + static class MockState implements Runnable { + + private final AtomicBoolean atomicBoolean; + + MockState(AtomicBoolean atomicBoolean) { + + this.atomicBoolean = atomicBoolean; + } + + @Override + public void run() { + atomicBoolean.set(true); + } + } +} \ No newline at end of file diff --git a/bindings/java/src/test/java/keystone/utilities/VersionTest.java b/bindings/java/src/test/java/keystone/utilities/VersionTest.java new file mode 100644 index 0000000..539753b --- /dev/null +++ b/bindings/java/src/test/java/keystone/utilities/VersionTest.java @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2018 Jämes Ménétrey + * + * This file is part of the Keystone Java bindings which is released under MIT. + * See file LICENSE in the Java bindings folder for full license details. + */ + +package keystone.utilities; + +import org.junit.jupiter.api.Test; + +import static org.junit.jupiter.api.Assertions.assertEquals; + +class VersionTest { + + private final int major = 3; + private final int minor = 1; + + @Test + void major_shouldReturnTheValueSpecifiedInTheConstructor() { + // Arrange + var v = new Version(major, minor); + + // Act + var m = v.major(); + + // Assert + assertEquals(major, m); + } + + @Test + void minor_shouldReturnTheValueSpecifiedInTheConstructor() { + // Arrange + var v = new Version(major, minor); + + // Act + var m = v.minor(); + + // Assert + assertEquals(minor, m); + } + + @Test + void compareTo_ifMajorIsNotEqual_shouldReturnDifferent() { + // Arrange + var v1 = new Version(major, minor); + var v2 = new Version(major + 1, minor); + + // Act + var lower = v1.compareTo(v2); + var higher = v2.compareTo(v1); + + // Assert + assertEquals(-1, lower); + assertEquals(1, higher); + } + + @Test + void compareTo_ifMinorIsNotEqual_shouldReturnDifferent() { + // Arrange + var v1 = new Version(major, minor + 1); + var v2 = new Version(major, minor); + + // Act + var lower = v2.compareTo(v1); + var higher = v1.compareTo(v2); + + // Assert + assertEquals(-1, lower); + assertEquals(1, higher); + } +} \ No newline at end of file diff --git a/bindings/masm/KSExample_x64/KSExample_x64.Asm b/bindings/masm/KSExample_x64/KSExample_x64.Asm new file mode 100644 index 0000000..0598139 --- /dev/null +++ b/bindings/masm/KSExample_x64/KSExample_x64.Asm @@ -0,0 +1,197 @@ +.686 +.MMX +.XMM +.x64 + +option casemap : none +option win64 : 11 +option frame : auto +option stackbase : rsp + +_WIN64 EQU 1 +WINVER equ 0501h + + +include KSExample_x64.inc + +.CODE + +WinMainCRTStartup proc FRAME + invoke GetModuleHandle, NULL + mov hInstance, rax + invoke GetCommandLine + mov CommandLine, rax + Invoke InitCommonControls + mov icc.dwSize, sizeof INITCOMMONCONTROLSEX + mov icc.dwICC, ICC_COOL_CLASSES or ICC_STANDARD_CLASSES or ICC_WIN95_CLASSES + Invoke InitCommonControlsEx, offset icc + invoke WinMain, hInstance, NULL, CommandLine, SW_SHOWDEFAULT + invoke ExitProcess, eax + ret +WinMainCRTStartup endp + +;------------------------------------------------------------------------------------- +; WinMain +;------------------------------------------------------------------------------------- +WinMain proc FRAME hInst:HINSTANCE, hPrev:HINSTANCE, CmdLine:LPSTR, iShow:DWORD + LOCAL msg:MSG + LOCAL wcex:WNDCLASSEX + + mov wcex.cbSize, sizeof WNDCLASSEX + mov wcex.style, CS_HREDRAW or CS_VREDRAW + lea rax, WndProc + mov wcex.lpfnWndProc, rax + mov wcex.cbClsExtra, 0 + mov wcex.cbWndExtra, DLGWINDOWEXTRA + mov rax, hInst + mov wcex.hInstance, rax + mov wcex.hbrBackground, COLOR_WINDOW+1 + mov wcex.lpszMenuName, NULL + lea rax, ClassName + mov wcex.lpszClassName, rax + ;invoke LoadIcon, NULL, IDI_APPLICATION + Invoke LoadIcon, hInst, ICO_MAIN ; resource icon for main application icon + mov hIcoMain, rax ; main application icon + mov wcex.hIcon, rax + mov wcex.hIconSm, rax + invoke LoadCursor, NULL, IDC_ARROW + mov wcex.hCursor, rax + invoke RegisterClassEx, addr wcex + + ;invoke CreateWindowEx, 0, addr ClassName, addr szAppName, WS_OVERLAPPEDWINDOW, CW_USEDEFAULT, CW_USEDEFAULT, CW_USEDEFAULT, CW_USEDEFAULT, NULL, NULL, hInstance, NULL + Invoke CreateDialogParam, hInstance, IDD_DIALOG, 0, Addr WndProc, 0 + mov hWnd, rax + + invoke ShowWindow, hWnd, SW_SHOWNORMAL + invoke UpdateWindow, hWnd + + .while (TRUE) + invoke GetMessage, addr msg, NULL, 0, 0 + .break .if (!rax) + + invoke TranslateMessage, addr msg + invoke DispatchMessage, addr msg + .endw + + mov rax, msg.wParam + ret +WinMain endp + +;------------------------------------------------------------------------------------- +; WndProc - Main Window Message Loop +;------------------------------------------------------------------------------------- +WndProc proc FRAME hWin:HWND, uMsg:UINT, wParam:WPARAM, lParam:LPARAM + + mov eax, uMsg + .IF eax == WM_INITDIALOG + ; Init Stuff Here + + Invoke GetSysColorBrush, COLOR_WINDOW + mov hWhiteBrush, eax + + Invoke GetDlgItem, hWin, IDC_TxtAsmToEncode + mov hTxtAsmToEncode, rax + + Invoke GetDlgItem, hWin, IDC_TxtEncodedBytes + mov hTxtEncodedBytes, rax + + Invoke SetWindowText, hTxtAsmToEncode, Addr szCODEInitial + + .ELSEIF eax == WM_COMMAND + mov rax, wParam + .IF rax == IDM_FILE_EXIT || rax == IDC_BtnExit + Invoke SendMessage, hWin, WM_CLOSE, 0, 0 + + .ELSEIF rax == IDM_HELP_ABOUT + Invoke ShellAbout, hWin, Addr AppName, Addr AboutMsg, NULL + + .ELSEIF rax == IDC_BtnEncode + Invoke DoEncode, hWin + + .ENDIF + + .ELSEIF eax == WM_CTLCOLORSTATIC + mov eax, hWhiteBrush + ret + + .ELSEIF eax == WM_CLOSE + Invoke DestroyWindow, hWin + + .ELSEIF eax == WM_DESTROY + Invoke PostQuitMessage, NULL + + .ELSE + invoke DefWindowProc, rcx, edx, r8, r9 + ret + .ENDIF + xor rax, rax + ret +WndProc endp + +;------------------------------------------------------------------------------------- +; DoEncode - Keystone encode assembler in text box to bytes +;------------------------------------------------------------------------------------- +DoEncode PROC FRAME USES RBX hWin:QWORD + LOCAL i:QWORD + + ; Fetch text user typed (or default code string) + Invoke GetWindowText, hTxtAsmToEncode, Addr szCODEBuffer, SIZEOF szCODEBuffer + .IF rax == 0 + Invoke MessageBox, 0, Addr szKSCodeEmpty, Addr szKSError, MB_OK + ret + .ENDIF + + ; Reset some stuff + Invoke RtlZeroMemory, Addr szFinalOutput, SIZEOF szFinalOutput + Invoke SetWindowText, hTxtEncodedBytes, Addr szNull + + ; Keystone stuff + Invoke ks_version, KS_VERSION_MAJOR, KS_VERSION_MINOR + ; rax contains version + + Invoke ks_arch_supported, KS_ARCH_X86 + ; rax contains TRUE if arch is supported by keystone library + + Invoke ks_open, KS_ARCH_X86, KS_MODE_32, Addr ks_engine + mov ks_err, rax + .IF rax != KS_ERR_OK + Invoke MessageBox, 0, Addr szKSOpenFail, Addr szKSError, MB_OK + ret + .ENDIF + + ; Encode assembler code to bytes + Invoke ks_asm, ks_engine, Addr szCODEBuffer, 0, Addr Encode, Addr EncodeSize, Addr Count + mov ks_err, rax + .IF rax != KS_ERR_OK + Invoke MessageBox, 0, Addr szKSAsmFail, Addr szKSError, MB_OK + ret + .ELSE + + ; loop through encoding, fetch each byte and add to our final output string + mov i, 0 + mov rax, 0 + .WHILE rax < EncodeSize + + mov rbx, Encode + add rbx, i + movzx rax, byte ptr [rbx] + + Invoke wsprintf, Addr szOutput, Addr szFmt, rax + Invoke lstrcat, Addr szFinalOutput, Addr szOutput + + inc i + mov rax, i + .ENDW + .ENDIF + + ; Clean up stuff + Invoke ks_free, Encode + Invoke ks_close, ks_engine + + ; Show encoded bytes to user + Invoke SetWindowText, hTxtEncodedBytes, Addr szFinalOutput + + ret +DoEncode endp + +end WinMainCRTStartup \ No newline at end of file diff --git a/bindings/masm/KSExample_x64/KSExample_x64.Inc b/bindings/masm/KSExample_x64/KSExample_x64.Inc new file mode 100644 index 0000000..f724b8e --- /dev/null +++ b/bindings/masm/KSExample_x64/KSExample_x64.Inc @@ -0,0 +1,83 @@ +include windows.inc +include CommCtrl.inc +include shellapi.inc + +includelib user32.lib +includelib kernel32.lib +includelib gdi32.lib +includelib comctl32.lib +includelib shell32.lib + + +include keystone_x64.inc +includelib keystone_x64.lib + +;----------------------------------------------------------------------------------------- +; KSExample_x64 Prototypes +;----------------------------------------------------------------------------------------- +DoEncode PROTO :QWORD + +.CONST +;----------------------------------------------------------------------------------------- +; KSExample_x64 Constants +;----------------------------------------------------------------------------------------- +ICO_MAIN equ 101 + +; Main Dialog +;KSExample_x64.dlg +IDD_DIALOG equ 1000 +IDC_TxtAsmToEncode equ 1001 +IDC_TxtEncodedBytes equ 1002 +IDC_LblAsmToEncode equ 1003 +IDC_LblEncodedBytes equ 1004 +IDC_BtnExit equ 1005 +IDC_BtnEncode equ 1006 + +; Main Menu +IDM_MENU EQU 10000 +IDM_FILE_EXIT EQU 10001 +IDM_HELP_ABOUT EQU 10101 + +.DATA +;----------------------------------------------------------------------------------------- +; KSExample_x64 Initialized Data +;----------------------------------------------------------------------------------------- +align 01 +szClass db 'Win64class', 0 +szAppName db 'First Window', 0 + +ClassName DB 'DLGCLASS',0 +AppName DB 'LTLI Dialog',0 +AboutMsg DB 'www.LetTheLight.in',13,10,'Copyright fearless 2017',0 + +szNull DB 0,0 +szFmt DB '%02X ',0 +szCODEBuffer DB 256 DUP (0) +szCODEInitial DB 'INC ecx; DEC edx',0 +szOutput DB 256 DUP (0) +szFinalOutput DB 256 DUP (0) + +ks_engine DQ 0 +Encode DQ 0 +EncodeSize DQ 0 +Count DQ 0 +ks_err DQ 0 + +szKSError DB 'Keystone Error',0 +szKSCodeEmpty DB 'Please enter some assembly code to encode.',0 +szKSOpenFail DB 'ERROR: failed on ks_open',0 +szKSAsmFail DB 'ERROR: ks_asm failed',0 + +.DATA? +;----------------------------------------------------------------------------------------- +; KSExample_x64 Uninitialized Data +;----------------------------------------------------------------------------------------- +align 08 +icc INITCOMMONCONTROLSEX <> +hInstance HINSTANCE ? +CommandLine LPSTR ? +hWnd HWND ? +hIcoMain DQ ? +hWhiteBrush DD ? +hTxtAsmToEncode DQ ? +hTxtEncodedBytes DQ ? \ No newline at end of file diff --git a/bindings/masm/KSExample_x64/KSExample_x64.Rc b/bindings/masm/KSExample_x64/KSExample_x64.Rc new file mode 100644 index 0000000..1dc7213 --- /dev/null +++ b/bindings/masm/KSExample_x64/KSExample_x64.Rc @@ -0,0 +1,4 @@ +#include "Res/KSExample_x64Mnu.rc" +#include "Res/KSExample_x64Ver.rc" +#include "Res/KSExample_x64Dlg.rc" +#include "Res/KSExample_x64Res.rc" \ No newline at end of file diff --git a/bindings/masm/KSExample_x64/KSExample_x64.dlg b/bindings/masm/KSExample_x64/KSExample_x64.dlg new file mode 100644 index 0000000000000000000000000000000000000000..1c92d150fdef7d4c1c9d4c8289d53966e609b662 GIT binary patch literal 2755 zcmYdeU|?VbVizBGXCKGlU?7t$5S*HxpQ;e*$&gxu1d}WqSS7~^0T9gv#lAoXGXk-9YGrXreqO4AYeiyiK~Abd zg_#Lh{YW5Q00Ys}#U>jR9=vJbe1I#^Q-H>f_&^7R&?`is zL&7`7sj?)sn5|un26_)r4j$+f)E$(#alrJ# O0v$xZLke_C!vO&N!-UQN literal 0 HcmV?d00001 diff --git a/bindings/masm/KSExample_x64/KSExample_x64.rap b/bindings/masm/KSExample_x64/KSExample_x64.rap new file mode 100644 index 0000000..420b29b --- /dev/null +++ b/bindings/masm/KSExample_x64/KSExample_x64.rap @@ -0,0 +1,142 @@ +[Project] +Assembler=UASM64 +Type=Win64 App +Description=KSExample_x64 +Backup=$P\Bak\ +Group=1 +GroupExpand=1 +Ver.rc=1 +Res.rc=1 +[Files] +1=KSExample_x64.Asm +2=KSExample_x64.Inc +3=KSExample_x64.Rc +4=KSExample_x64.dlg +5=KSExample_x64.mnu +[MakeFiles] +0=KSExample_x64.rap +1=KSExample_x64.rc +2=KSExample_x64.asm +3=KSExample_x64.obj +4=KSExample_x64.res +5=KSExample_x64.exe +6=KSExample_x64.def +7=KSExample_x64.dll +8=KSExample_x64.txt +9=KSExample_x64.lib +10=KSExample_x64.mak +11=KSExample_x64.hla +12=KSExample_x64.com +13= +14= +15= +16= +17= +18=KSExample_x64.pdb +[MakeDef] +Menu=1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0 +1=4,O,$B\RC.EXE /v,1 +2=3,O,$B\UASM64.exe /c -win64 -Zp8 /Zi /win64 /D_WIN64 /Cp /nologo /W2 /I"$I",2 +3=5,O,$B\LINK.EXE /SUBSYSTEM:WINDOWS /RELEASE /VERSION:4.0 /MACHINE:X64 /LIBPATH:"$L" /OUT:"$5",3,4 +4=0,0,,5 +5=rsrc.obj,O,$B\CVTRES.EXE,rsrc.res +6=*.obj,O,$B\UASM64.EXE /c -win64 -Zp8 /Zi /win64 /D_WIN64 /Cp /nologo /W2 /I"$I",*.asm +7=0,0,"$E\x64\x64dbg",5 +11=4,O,$B\RC.EXE /v,1 +12=3,O,$B\UASM64.EXE /c -win64 -Zp8 /Zi /win64 /D_WIN64 /Cp /nologo /W2 /Zi /Zd /nologo /I"$I",2 +13=5,O,$B\LINK.EXE /SUBSYSTEM:WINDOWS /DEBUG /DEBUGTYPE:CV /PDB:"$18" /VERSION:4.0 /MACHINE:X64 /LIBPATH:"$L" /OUT:"$5",3,4 +14=0,0,,5 +15=rsrc.obj,O,$B\CVTRES.EXE,rsrc.res +16=*.obj,O,$B\UASM64.EXE /c /coff /Cp /Zi /Zd /nologo /I"$I",*.asm +17=0,0,"$E\x64\x64dbg",$.exe +[Resource] +1=,1,8,KSExample_x64.xml +2=,101,2,keystone.ico +[StringTable] +[VerInf] +FV=1.0.0.0 +FileVersion=1.0.0.0 +PV=1.0.0.0 +ProductVersion=1.0.0.0 +Nme=VERINF1 +ID=1 +VerOS=0x00000004 +VerFT=0x00000001 +VerLNG=0x00000409 +VerCHS=0x000004B0 +ProductName=KSExample_x64 +OriginalFilename=KSExample_x64 +LegalTrademarks= +LegalCopyright= +InternalName=KSExample_x64 +FileDescription=KSExample_x64 +CompanyName= +[Group] +Group=Assembly,Resources,Misc +1=1 +2=1 +3=2 +4=2 +5=2 +[AutoLoad] +AutoLoad=2,1,4 +[RADebugBP] +2= +1= +[VersionControl] +Settings=1279 +Milestones=129 +MilestoneEvery=10 +MilestoneEveryCurrent=9 +MilestoneOnBuild=0.0.0.0 +MilestoneOnTime=2 +MilestoneOnDate=0 +MilestoneOnDateWhen=1 +MilestoneOnDateStatus=0 +MilestoneOnDateDate=25 +MilestoneOnDateTimeYear=2017 +MilestoneOnDateTimeMonth=10 +MilestoneOnDateTimeDate=25 +MilestoneOnDateTimeHour=11 +MilestoneOnDateTimeMin=33 +MilestoneOnDateTimeSec=42 +MilestoneOnDateTimeStatus=0 +BackupLocation=M:\radasm\UASM64\Projects\VCBackups\ +CompressionLevel=0 +DefaultComment=Project $N, $Z, Backup Created On $D At $T. +ExcludeExt1=\ +ExcludeExt2=\ +ExcludeExt3=\ +ExcludeExt4=\ +FileVerLength=4 +FileVer2Range=0 +FileVer3Range=0 +FileVer4Range=0 +ProductVerLength=4 +ProductVer2Range=0 +ProductVer3Range=0 +ProductVer4Range=0 +[PTimer] +PTimer=2645403 +[Size] +4=0,0,0,0 +1=0,0,0,0,1327 +2=0,0,0,0,2444 +[Collapse] +1= +2= +[GroupExpand] +GroupExpand=1,0,1,0 +[BookMark] +0= +1= +2= +3= +4= +5= +6= +7= +8= +9= +[BreakPoint] +0= diff --git a/bindings/masm/KSExample_x64/KSExample_x64.xml b/bindings/masm/KSExample_x64/KSExample_x64.xml new file mode 100644 index 0000000..c6603bc --- /dev/null +++ b/bindings/masm/KSExample_x64/KSExample_x64.xml @@ -0,0 +1,24 @@ + + + + KSExample_x64 + + + + + + diff --git a/bindings/masm/KSExample_x64/Res/KSExample_x64Dlg.Rc b/bindings/masm/KSExample_x64/Res/KSExample_x64Dlg.Rc new file mode 100644 index 0000000..82a5db9 --- /dev/null +++ b/bindings/masm/KSExample_x64/Res/KSExample_x64Dlg.Rc @@ -0,0 +1,21 @@ +#define IDD_DIALOG 1000 +#define IDC_TxtAsmToEncode 1001 +#define IDC_TxtEncodedBytes 1002 +#define IDC_LblAsmToEncode 1003 +#define IDC_LblEncodedBytes 1004 +#define IDC_BtnExit 1005 +#define IDC_BtnEncode 1006 +IDD_DIALOG DIALOGEX 6,6,211,134 +CAPTION "Keystone Example x64" +FONT 8,"Segoe UI",400,0 +CLASS "DLGCLASS" +STYLE 0x10C80800 +EXSTYLE 0x00000000 +BEGIN + CONTROL "Enter assembler instructions to encode:",IDC_LblAsmToEncode,"Static",0x50000000,5,7,195,12,0x00000000 + CONTROL "",IDC_TxtAsmToEncode,"Edit",0x50010000,5,24,200,12,0x00000200 + CONTROL "Encoded bytes:",IDC_LblEncodedBytes,"Static",0x50000000,5,44,198,12,0x00000000 + CONTROL "",IDC_TxtEncodedBytes,"Edit",0x50010000,5,61,200,12,0x00000200 + CONTROL "Encode",IDC_BtnEncode,"Button",0x50010000,72,86,70,15,0x00000000 + CONTROL "Exit",IDC_BtnExit,"Button",0x50010000,72,110,70,15,0x00000000 +END diff --git a/bindings/masm/KSExample_x64/Res/KSExample_x64Mnu.Rc b/bindings/masm/KSExample_x64/Res/KSExample_x64Mnu.Rc new file mode 100644 index 0000000..2109cdc --- /dev/null +++ b/bindings/masm/KSExample_x64/Res/KSExample_x64Mnu.Rc @@ -0,0 +1,14 @@ +#define IDM_MENU 10000 +#define IDM_FILE_EXIT 10001 +#define IDM_HELP_ABOUT 10101 +IDM_MENU MENUEX +BEGIN + POPUP "&File",,, + BEGIN + MENUITEM "E&xit",IDM_FILE_EXIT,, + END + POPUP "&Help",,, + BEGIN + MENUITEM "&About",IDM_HELP_ABOUT,, + END +END diff --git a/bindings/masm/KSExample_x64/Res/KSExample_x64Res.Rc b/bindings/masm/KSExample_x64/Res/KSExample_x64Res.Rc new file mode 100644 index 0000000..0febc07 --- /dev/null +++ b/bindings/masm/KSExample_x64/Res/KSExample_x64Res.Rc @@ -0,0 +1,3 @@ +#define MANIFEST 24 +1 MANIFEST DISCARDABLE "KSExample_x64.xml" +101 ICON DISCARDABLE "keystone.ico" diff --git a/bindings/masm/KSExample_x64/Res/KSExample_x64Ver.rc b/bindings/masm/KSExample_x64/Res/KSExample_x64Ver.rc new file mode 100644 index 0000000..62a0fe7 --- /dev/null +++ b/bindings/masm/KSExample_x64/Res/KSExample_x64Ver.rc @@ -0,0 +1,24 @@ +#define VERINF1 1 +VERINF1 VERSIONINFO +FILEVERSION 1,0,0,0 +PRODUCTVERSION 1,0,0,0 +FILEOS 0x00000004 +FILETYPE 0x00000001 +BEGIN + BLOCK "StringFileInfo" + BEGIN + BLOCK "040904B0" + BEGIN + VALUE "FileVersion", "1.0.0.0\0" + VALUE "FileDescription", "KSExample_x64\0" + VALUE "InternalName", "KSExample_x64\0" + VALUE "OriginalFilename", "KSExample_x64\0" + VALUE "ProductName", "KSExample_x64\0" + VALUE "ProductVersion", "1.0.0.0\0" + END + END + BLOCK "VarFileInfo" + BEGIN + VALUE "Translation", 0x0409, 0x04B0 + END +END diff --git a/bindings/masm/KSExample_x64/keystone.ico b/bindings/masm/KSExample_x64/keystone.ico new file mode 100644 index 0000000000000000000000000000000000000000..cfa61b73e48e3168a3f4ce614897a50f32d5ca9b GIT binary patch literal 17542 zcmeI33v^V~xyR4sO-RU0r6TwUs3>T~^wL^tDIv7QN4X;CRp5$CiwZ`oprBB(iHeAL z5w!BE1cGe^+j!+!6tXb4BD#tM6np`;!SawQ5J4b7$n^I=bN1xqWF|9{o7k?qZr1v( zea?P--+%AfXTQ#gW%;ZWD=*I?>})OWYFYg)%j(?Ox%XSv0piX$BXmEdjb+Wc%(DE% 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M:\Masm32\include\debug32.inc +ENDIF + +include KSExample_x86.inc + +.code + +start: + + Invoke GetModuleHandle,NULL + mov hInstance, eax + Invoke GetCommandLine + mov CommandLine, eax + Invoke InitCommonControls + mov icc.dwSize, sizeof INITCOMMONCONTROLSEX + mov icc.dwICC, ICC_COOL_CLASSES or ICC_STANDARD_CLASSES or ICC_WIN95_CLASSES + Invoke InitCommonControlsEx, offset icc + + Invoke WinMain, hInstance, NULL, CommandLine, SW_SHOWDEFAULT + Invoke ExitProcess, eax + +;------------------------------------------------------------------------------------- +; WinMain +;------------------------------------------------------------------------------------- +WinMain proc hInst:HINSTANCE,hPrevInst:HINSTANCE,CmdLine:LPSTR,CmdShow:DWORD + LOCAL wc:WNDCLASSEX + LOCAL msg:MSG + + mov wc.cbSize, sizeof WNDCLASSEX + mov wc.style, CS_HREDRAW or CS_VREDRAW + mov wc.lpfnWndProc, offset WndProc + mov wc.cbClsExtra, NULL + mov wc.cbWndExtra, DLGWINDOWEXTRA + push hInst + pop wc.hInstance + mov wc.hbrBackground, COLOR_WINDOW+1 + mov wc.lpszMenuName, NULL + mov wc.lpszClassName, offset ClassName + ;Invoke LoadIcon, NULL, IDI_APPLICATION + Invoke LoadIcon, hInstance, ICO_MAIN ; resource icon for main application icon + mov hIcoMain, eax ; main application icon + mov wc.hIcon, eax + mov wc.hIconSm, eax + Invoke LoadCursor, NULL, IDC_ARROW + mov wc.hCursor,eax + Invoke RegisterClassEx, addr wc + Invoke CreateDialogParam, hInstance, IDD_DIALOG, NULL, addr WndProc, NULL + Invoke ShowWindow, hWnd, SW_SHOWNORMAL + Invoke UpdateWindow, hWnd + .WHILE TRUE + invoke GetMessage, addr msg, NULL, 0, 0 + .BREAK .if !eax + Invoke TranslateMessage, addr msg + Invoke DispatchMessage, addr msg + .ENDW + mov eax, msg.wParam + ret +WinMain endp + +;------------------------------------------------------------------------------------- +; WndProc - Main Window Message Loop +;------------------------------------------------------------------------------------- +WndProc proc hWin:HWND,uMsg:UINT,wParam:WPARAM,lParam:LPARAM + + mov eax, uMsg + .IF eax == WM_INITDIALOG + push hWin + pop hWnd + ; Init Stuff Here + + Invoke GetSysColorBrush, COLOR_WINDOW + mov hWhiteBrush, eax + + Invoke GetDlgItem, hWin, IDC_TxtAsmToEncode + mov hTxtAsmToEncode, eax + + Invoke GetDlgItem, hWin, IDC_TxtEncodedBytes + mov hTxtEncodedBytes, eax + + Invoke SetWindowText, hTxtAsmToEncode, Addr szCODEInitial + + + .ELSEIF eax == WM_COMMAND + mov eax, wParam + and eax, 0FFFFh + .IF eax == IDM_FILE_EXIT || eax == IDC_BtnExit + Invoke SendMessage,hWin,WM_CLOSE,0,0 + + .ELSEIF eax == IDM_HELP_ABOUT + Invoke ShellAbout,hWin,addr AppName,addr AboutMsg,NULL + + .ELSEIF eax == IDC_BtnEncode + Invoke DoEncode, hWin + + .ENDIF + + .ELSEIF eax == WM_CTLCOLORSTATIC + mov eax, hWhiteBrush + ret + + .ELSEIF eax == WM_CLOSE + Invoke DestroyWindow,hWin + + .ELSEIF eax == WM_DESTROY + Invoke PostQuitMessage,NULL + + .ELSE + Invoke DefWindowProc,hWin,uMsg,wParam,lParam + ret + .ENDIF + xor eax,eax + ret +WndProc endp + +;------------------------------------------------------------------------------------- +; DoEncode - Keystone encode assembler in text box to bytes +;------------------------------------------------------------------------------------- +DoEncode PROC USES EBX hWin:DWORD + LOCAL i:DWORD + + ; Fetch text user typed (or default code string) + Invoke GetWindowText, hTxtAsmToEncode, Addr szCODEBuffer, SIZEOF szCODEBuffer + .IF eax == 0 + Invoke MessageBox, 0, Addr szKSCodeEmpty, Addr szKSError, MB_OK + ret + .ENDIF + + ; Reset some stuff + Invoke RtlZeroMemory, Addr szFinalOutput, SIZEOF szFinalOutput + Invoke SetWindowText, hTxtEncodedBytes, Addr szNull + + ; Keystone stuff + Invoke ks_version, KS_VERSION_MAJOR, KS_VERSION_MINOR + ; rax contains version + + Invoke ks_arch_supported, KS_ARCH_X86 + ; rax contains TRUE if arch is supported by keystone library + + Invoke ks_open, KS_ARCH_X86, KS_MODE_32, Addr ks_engine + mov ks_err, eax + .IF eax != KS_ERR_OK + Invoke MessageBox, 0, Addr szKSOpenFail, Addr szKSError, MB_OK + ret + .ENDIF + + ; Note: In x86 asm the ks_asm address parameter (third parameter) is QWORD (uint64_t) size + + ; Set address variable by setting low order and high order DWORDs: + mov dword ptr [Address+0], 00000000h ; High order DWORD of 64bit address + mov dword ptr [Address+4], 00010000h ; Low order DWORD of 64bit address + + ; Encode assembler code to bytes + Invoke ks_asm, ks_engine, Addr szCODEBuffer, Address, Addr Encode, Addr EncodeSize, Addr Count + mov ks_err, eax + .IF eax != KS_ERR_OK + Invoke MessageBox, 0, Addr szKSAsmFail, Addr szKSError, MB_OK + ret + .ELSE + + ; loop through encoding, fetch each byte and add to our final output string + mov i, 0 + mov eax, 0 + .WHILE eax < EncodeSize + + mov ebx, Encode + add ebx, i + movzx eax, byte ptr [ebx] + + Invoke wsprintf, Addr szOutput, Addr szFmt, eax + Invoke lstrcat, Addr szFinalOutput, Addr szOutput + + inc i + mov eax, i + .ENDW + .ENDIF + + ; Clean up stuff + Invoke ks_free, Encode + Invoke ks_close, ks_engine + + ; Show encoded bytes to user + Invoke SetWindowText, hTxtEncodedBytes, Addr szFinalOutput + + ret +DoEncode endp + +end start \ No newline at end of file diff --git a/bindings/masm/KSExample_x86/KSExample_x86.Inc b/bindings/masm/KSExample_x86/KSExample_x86.Inc new file mode 100644 index 0000000..9fb37ec --- /dev/null +++ b/bindings/masm/KSExample_x86/KSExample_x86.Inc @@ -0,0 +1,87 @@ +include windows.inc +include user32.inc +include kernel32.inc +include gdi32.inc +include shell32.inc +include comctl32.inc +include comdlg32.inc +include masm32.inc + +includelib user32.lib +includelib kernel32.lib +includelib gdi32.lib +includelib shell32.lib +includelib comctl32.lib +includelib comdlg32.lib +includelib masm32.lib + +include keystone_x86.inc +includelib keystone_x86.lib + +;----------------------------------------------------------------------------------------- +; KSExample_x86 Prototypes +;----------------------------------------------------------------------------------------- +WinMain PROTO :DWORD,:DWORD,:DWORD,:DWORD +WndProc PROTO :DWORD,:DWORD,:DWORD,:DWORD +DoEncode PROTO :DWORD + +.CONST +;----------------------------------------------------------------------------------------- +; KSExample_x86 Constants +;----------------------------------------------------------------------------------------- +ICO_MAIN equ 101 + +; Main Dialog +;KSExample_x86.dlg +IDD_DIALOG equ 1000 +IDC_TxtAsmToEncode equ 1001 +IDC_TxtEncodedBytes equ 1002 +IDC_LblAsmToEncode equ 1003 +IDC_LblEncodedBytes equ 1004 +IDC_BtnExit equ 1005 +IDC_BtnEncode equ 1006 + +; Main Menu +IDM_MENU EQU 10000 +IDM_FILE_EXIT EQU 10001 +IDM_HELP_ABOUT EQU 10101 + +.DATA +;----------------------------------------------------------------------------------------- +; KSExample_x86 Initialized Data +;----------------------------------------------------------------------------------------- +ClassName DB 'DLGCLASS',0 +AppName DB 'LTLI Dialog',0 +AboutMsg DB 'www.LetTheLight.in',13,10,'Copyright fearless 2014',0 + +szNull DB 0,0 +szFmt DB '%02X ',0 +szCODEBuffer DB 256 DUP (0) +szCODEInitial DB 'INC ecx; DEC edx',0 +szOutput DB 256 DUP (0) +szFinalOutput DB 256 DUP (0) + +ks_engine DD 0 +Address DQ 0 ; Note has to be QWORD sized as a parameter for ks_asm +Encode DD 0 +EncodeSize DD 0 +Count DD 0 +ks_err DD 0 + +szKSError DB 'Keystone Error',0 +szKSCodeEmpty DB 'Please enter some assembly code to encode.',0 +szKSOpenFail DB 'ERROR: failed on ks_open',0 +szKSAsmFail DB 'ERROR: ks_asm failed',0 + +.DATA? +;----------------------------------------------------------------------------------------- +; KSExample_x86 Uninitialized Data +;----------------------------------------------------------------------------------------- +icc INITCOMMONCONTROLSEX <> +hInstance DD ? +CommandLine DD ? +hWnd DD ? +hIcoMain DD ? +hWhiteBrush DD ? +hTxtAsmToEncode DD ? +hTxtEncodedBytes DD ? \ No newline at end of file diff --git a/bindings/masm/KSExample_x86/KSExample_x86.Rc b/bindings/masm/KSExample_x86/KSExample_x86.Rc new file mode 100644 index 0000000..2aef333 --- /dev/null +++ b/bindings/masm/KSExample_x86/KSExample_x86.Rc @@ -0,0 +1,4 @@ +#include "Res/KSExample_x86Mnu.rc" +#include "Res/KSExample_x86Ver.rc" +#include "Res/KSExample_x86Dlg.rc" +#include "Res/KSExample_x86Res.rc" \ No newline at end of file diff --git a/bindings/masm/KSExample_x86/KSExample_x86.dlg b/bindings/masm/KSExample_x86/KSExample_x86.dlg new file mode 100644 index 0000000000000000000000000000000000000000..2989c493a82048b89088b6dd219fcbb8be802844 GIT binary patch literal 2755 zcmYdeU|?VbVizBGXCKGlU?7t$5S*HxpQ;e*$&gxoOT9KGrkdvxV zVPOVRHzL3bU?6(BxWv17I{Ns#Q|9FjocuB%6EgY#|A$2YFo**fn1Epq6xRS^U0{HV zf)tH307`-|3`)74F3#~G6(x?vxgq(kdCB=HspN%-8}kAYkWO5Io&uB`@qrF1DPAE0 z9TMItPL(C8#h|bw83+jqg7wr3BBykQ0FWRkrSkx>Dm10L=9Q!tDI^vbr{*T*09l!N z#U(|h$t9WjdBqAP`3kAv$hQJ%9UcIf+d(-V3|>P6-6tuB;*>7MZU#0MSDPrS`A>@<}EYpD?2Z*--aV8K; z0 QrWY3IAo?9rpi>$S0J!RXqyPW_ literal 0 HcmV?d00001 diff --git a/bindings/masm/KSExample_x86/KSExample_x86.rap b/bindings/masm/KSExample_x86/KSExample_x86.rap new file mode 100644 index 0000000..acee9cc --- /dev/null +++ b/bindings/masm/KSExample_x86/KSExample_x86.rap @@ -0,0 +1,142 @@ +[Project] +Assembler=masm +Type=Win32 App +Description=KSExample_x86 +Backup=$P\Bak\ +Group=1 +GroupExpand=1 +Res.rc=1 +Ver.rc=1 +[Files] +1=KSExample_x86.Asm +2=KSExample_x86.Inc +3=KSExample_x86.Rc +4=KSExample_x86.dlg +5=KSExample_x86.mnu +[MakeFiles] +0=KSExample_x86.rap +1=KSExample_x86.rc +2=KSExample_x86.asm +3=KSExample_x86.obj +4=KSExample_x86.res +5=KSExample_x86.exe +6=KSExample_x86.def +7=KSExample_x86.dll +8=KSExample_x86.txt +9=KSExample_x86.lib +10=KSExample_x86.mak +11=KSExample_x86.hla +12=KSExample_x86.com +13= +14= +15= +16= +17= +18=KSExample_x86.pdb +[MakeDef] +Menu=1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0 +1=4,O,$B\RC.EXE /v,1 +2=3,O,$B\ML.EXE /c /coff /Cp /nologo /I"$I",2 +3=5,O,$B\LINK.EXE /SUBSYSTEM:WINDOWS /RELEASE /VERSION:4.0 /LIBPATH:"$L" /OUT:"$5",3,4 +4=0,0,,5 +5=rsrc.obj,O,$B\CVTRES.EXE,rsrc.res +6=*.obj,O,$B\ML.EXE /c /coff /Cp /nologo /I"$I",*.asm +7=0,0,"$E\x32dbg.exe",5 +11=4,O,$B\RC.EXE /v,1 +12=3,O,$B\ML.EXE /c /coff /Cp /Zi /Zd /nologo /I"$I",2 +13=5,O,$B\LINK.EXE /SUBSYSTEM:WINDOWS /DEBUG /DEBUGTYPE:CV /PDB:"$18" /VERSION:4.0 /LIBPATH:"$L" /OUT:"$5",3,4 +14=0,0,,5 +15=rsrc.obj,O,$B\CVTRES.EXE,rsrc.res +16=*.obj,O,$B\ML.EXE /c /coff /Cp /nologo /I"$I",*.asm +17=0,0,"$E\x32dbg.exe",5 +[Resource] +1=,1,8,KSExample_x86.xml +2=,101,2,keystone.ico +[StringTable] +[VerInf] +Nme=VERINF1 +ID=1 +FV=1.0.0.0 +PV=1.0.0.0 +VerOS=0x00000004 +VerFT=0x00000001 +VerLNG=0x00000409 +VerCHS=0x000004B0 +ProductVersion=1.0.0.0 +ProductName=KSExample_x86 +OriginalFilename=KSExample_x86 +LegalTrademarks= +LegalCopyright= +InternalName=KSExample_x86 +FileDescription= +FileVersion=1.0.0.0 +CompanyName= +[Group] +Group=Assembly,Resources,Misc +1=1 +2=1 +3=2 +4=2 +5=2 +[AutoLoad] +AutoLoad=2,1,4 +[VersionControl] +Settings=1279 +Milestones=129 +MilestoneEvery=10 +MilestoneEveryCurrent=2 +MilestoneOnBuild=0.0.0.0 +MilestoneOnTime=2 +MilestoneOnDate=0 +MilestoneOnDateWhen=1 +MilestoneOnDateStatus=0 +MilestoneOnDateDate=26 +MilestoneOnDateTimeYear=2017 +MilestoneOnDateTimeMonth=10 +MilestoneOnDateTimeDate=25 +MilestoneOnDateTimeHour=22 +MilestoneOnDateTimeMin=31 +MilestoneOnDateTimeSec=11 +MilestoneOnDateTimeStatus=0 +BackupLocation=M:\radasm\Masm\Projects\VCBackups\ +CompressionLevel=0 +DefaultComment=Project $N, $Z, Backup Created On $D At $T. +ExcludeExt1=\ +ExcludeExt2=\ +ExcludeExt3=\ +ExcludeExt4=\ +FileVerLength=4 +FileVer2Range=0 +FileVer3Range=0 +FileVer4Range=0 +ProductVerLength=4 +ProductVer2Range=0 +ProductVer3Range=0 +ProductVer4Range=0 +[PTimer] +PTimer=1386944 +[GroupExpand] +GroupExpand=1,0,1,0 +[BookMark] +0= +1= +2= +3= +4= +5= +6= +7= +8= +9= +[BreakPoint] +0= +[RADebugBP] +2= +1= +[Size] +4=0,0,0,0 +1=0,0,0,0,4345 +2=0,0,0,0,1979 +[Collapse] +1= +2= diff --git a/bindings/masm/KSExample_x86/KSExample_x86.xml b/bindings/masm/KSExample_x86/KSExample_x86.xml new file mode 100644 index 0000000..51f7b58 --- /dev/null +++ b/bindings/masm/KSExample_x86/KSExample_x86.xml @@ -0,0 +1,24 @@ + + + + KSExample_x86 + + + + + + diff --git a/bindings/masm/KSExample_x86/Res/KSExample_x86Dlg.Rc b/bindings/masm/KSExample_x86/Res/KSExample_x86Dlg.Rc new file mode 100644 index 0000000..b2b06ef --- /dev/null +++ b/bindings/masm/KSExample_x86/Res/KSExample_x86Dlg.Rc @@ -0,0 +1,21 @@ +#define IDD_DIALOG 1000 +#define IDC_TxtAsmToEncode 1001 +#define IDC_TxtEncodedBytes 1002 +#define IDC_LblAsmToEncode 1003 +#define IDC_LblEncodedBytes 1004 +#define IDC_BtnExit 1005 +#define IDC_BtnEncode 1006 +IDD_DIALOG DIALOGEX 6,6,211,134 +CAPTION "Keystone Example x86" +FONT 8,"Segoe UI",400,0 +CLASS "DLGCLASS" +STYLE 0x10C80800 +EXSTYLE 0x00000000 +BEGIN + CONTROL "Enter assembler instructions to encode:",IDC_LblAsmToEncode,"Static",0x50000000,5,7,195,12,0x00000000 + CONTROL "",IDC_TxtAsmToEncode,"Edit",0x50010000,5,24,200,12,0x00000200 + CONTROL "Encoded bytes:",IDC_LblEncodedBytes,"Static",0x50000000,5,44,198,12,0x00000000 + CONTROL "",IDC_TxtEncodedBytes,"Edit",0x50010000,5,61,200,12,0x00000200 + CONTROL "Encode",IDC_BtnEncode,"Button",0x50010000,72,86,70,15,0x00000000 + CONTROL "Exit",IDC_BtnExit,"Button",0x50010000,72,110,70,15,0x00000000 +END diff --git a/bindings/masm/KSExample_x86/Res/KSExample_x86Mnu.Rc b/bindings/masm/KSExample_x86/Res/KSExample_x86Mnu.Rc new file mode 100644 index 0000000..2109cdc --- /dev/null +++ b/bindings/masm/KSExample_x86/Res/KSExample_x86Mnu.Rc @@ -0,0 +1,14 @@ +#define IDM_MENU 10000 +#define IDM_FILE_EXIT 10001 +#define IDM_HELP_ABOUT 10101 +IDM_MENU MENUEX +BEGIN + POPUP "&File",,, + BEGIN + MENUITEM "E&xit",IDM_FILE_EXIT,, + END + POPUP "&Help",,, + BEGIN + MENUITEM "&About",IDM_HELP_ABOUT,, + END +END diff --git a/bindings/masm/KSExample_x86/Res/KSExample_x86Res.Rc b/bindings/masm/KSExample_x86/Res/KSExample_x86Res.Rc new file mode 100644 index 0000000..6b615fb --- /dev/null +++ b/bindings/masm/KSExample_x86/Res/KSExample_x86Res.Rc @@ -0,0 +1,3 @@ +#define MANIFEST 24 +1 MANIFEST DISCARDABLE "KSExample_x86.xml" +101 ICON DISCARDABLE "keystone.ico" diff --git a/bindings/masm/KSExample_x86/Res/KSExample_x86Ver.rc b/bindings/masm/KSExample_x86/Res/KSExample_x86Ver.rc new file mode 100644 index 0000000..9d05f4d --- /dev/null +++ b/bindings/masm/KSExample_x86/Res/KSExample_x86Ver.rc @@ -0,0 +1,23 @@ +#define VERINF1 1 +VERINF1 VERSIONINFO +FILEVERSION 1,0,0,0 +PRODUCTVERSION 1,0,0,0 +FILEOS 0x00000004 +FILETYPE 0x00000001 +BEGIN + BLOCK "StringFileInfo" + BEGIN + BLOCK "040904B0" + BEGIN + VALUE "FileVersion", "1.0.0.0\0" + VALUE "InternalName", "KSExample_x86\0" + VALUE "OriginalFilename", "KSExample_x86\0" + VALUE "ProductName", "KSExample_x86\0" + VALUE "ProductVersion", "1.0.0.0\0" + END + END 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file mode 100644 index 0000000..dde14c0 --- /dev/null +++ b/bindings/masm/README.md @@ -0,0 +1,86 @@ +# Keystone bindings for assembler + +This documentation explains how to install & use assembler x86/x64 bindings for Keystone. + +The `Keystone_x86.inc` file and the `Keystone_x64.inc` files contain the exports, constants and structures required for using Keystone with assembly language. + +These files are a conversion of the original files: `keystone.h`, & `x86.h` to a format that will work with x86 assemblers (MASM) and x64 assemblers (UASM) + + +## Keystone DLLs + +* Compile the relevant version (x86/x64) of `keystone.dll` +* (Optional) Rename the x86 version of `keystone.dll` to `keystone_x86.dll`, and the x64 version of `keystone.dll` to `keystone_x64.dll` - depending on which versions you might be linking with in your projects. +* Copy the `keystone.dll` (or `keystone_x86.dll` / `keystone_x64.dll`) to your assembly projects folder or a `%PATH%` folder. + +Alternatively, static libraries and pre-compiled DLL’s can be obtained from the Keystone homepage +at http://keystone-engine.org/download. Select the appropriate package to download under the Windows Core engine section: Win-32 and/or Win-64 + + +## Keystone Stub Libraries for DLLs + +To create the stub libraries for use with Keystone use the following commands (may differ depending on your installation of visual studio): + +To create the keystone stub library file (`keystone_x86.lib`) for MASM x86 Assembler: +* Open the VS2013 x86 Native Tools Command Prompt +* Navigate to the `Keystone\bindings\masm` folder +* Run the following command `lib /DEF:keystone.def /OUT:keystone_x86.lib /MACHINE:X86` + +To create the keystone stub library file (`keystone_x64.lib`) for UASM x64 Assembler: +* Open the VS2013 x64 Native Tools Command Prompt +* Navigate to the `Keystone\bindings\masm` folder +* Run the following command `lib /DEF:keystone.def /OUT:keystone_x64.lib /MACHINE:X64` + +The usage sections below assume you created the keystone stub libraries for the appropriate x86/x64 DLL + + +## MASM32 x86 Assembler Usage + +* Copy the `Keystone_x86.inc` file from the `Keystone\bindings\masm` folder to your `masm32\include` folder +* Copy the `keystone_x86.lib` file from the `Keystone\bindings\masm` folder to your `masm32\lib` folder +* Copy the `keystone_x86.dll` file (or x86 version of `keystone.dll`) to your assembly projects folder. +* Add the following lines to your source code: +``` + include Keystone_x86.inc + includelib keystone_x86.lib +``` + + +## UASM x64 Assembler Usage + +* Copy the `Keystone_x64.inc` file from the `Keystone\bindings\masm` folder to your `UASM\include` folder +* Copy the `Keystone_x64.lib` file from the `Keystone\bindings\masm` folder to your `UASM\lib` folder +* Copy the `keystone_x64.dll` file (or x64 version of `keystone.dll`) to your assembly projects folder. +* Add the following lines to your source code: +``` + include Keystone_x64.inc + includelib Keystone_x64.lib +``` + + +## RadASM Auto-complete files for MASM & UASM (Optional) + +Additional files are included for use with RadASM's auto-complete / intelliSense feature. These text files incorporate the keystone api calls and defined constants for api call parameters - for ease of use. + +* `masmApiCall.api.txt` - _RadASM code completion file for api calls (for MASM x86)_ +* `masmApiConst.api.txt` - _RadASM code completion file for constants (for MASM x86)_ + +Basic installation instructions: + +* Open each .txt file listed above (for the assembler you will be using with RadASM) +* Copy the contents of the .txt file, and paste into the matching .api file + +Instructions are included in the text files themselves as to which file it is related to and the typical location of those .api files. + + +## Examples + +Included are two keystone example RadASM projects, for MASM x86 and UASM x64 assemblers: +* `KSExample_x86` +* `KSExample_x64` + + +## Resources + +* [MASM32](http://www.masm32.com/masmdl.htm) +* [UASM](http://www.terraspace.co.uk/uasm.html) diff --git a/bindings/masm/keystone.def b/bindings/masm/keystone.def new file mode 100644 index 0000000..3e74a83 --- /dev/null +++ b/bindings/masm/keystone.def @@ -0,0 +1,10 @@ +EXPORTS + ks_arch_supported + ks_asm + ks_close + ks_errno + ks_free + ks_open + ks_option + ks_strerror + ks_version \ No newline at end of file diff --git a/bindings/masm/keystone_x64.inc b/bindings/masm/keystone_x64.inc new file mode 100644 index 0000000..eb4b7cd --- /dev/null +++ b/bindings/masm/keystone_x64.inc @@ -0,0 +1,154 @@ +;-------------------------------------------------------------------------------------------------------- +; Keystone_x64.inc for asm x64 - fearless 2017 - www.github.com/mrfearless - www.LetTheLight.in +; +; Include file for keystone.dll (x64) exports, constants and structures. +; +; This is a conversion of the original files: keystone.h, & x86.h to a format that will work with JWasm, +; UASM (http://www.terraspace.co.uk/uasm.html) and other x64 assemblers (possibly). +; +;-------------------------------------------------------------------------------------------------------- + +; Misc +CS_MNEMONIC_SIZE EQU 32 +size_t TYPEDEF QWORD +csh TYPEDEF size_t + +; Keystone API version +KS_API_MAJOR EQU 0 +KS_API_MINOR EQU 9 + +; Package version +KS_VERSION_MAJOR EQU KS_API_MAJOR +KS_VERSION_MINOR EQU KS_API_MINOR +KS_VERSION_EXTRA EQU 1 +KS_MAKE_VERSION EQU 9d ; ((major << 8) + minor) + +; Architecture type ks_arch +KS_ARCH_ARM EQU 1 ; ARM architecture (including Thumb, Thumb-2) +KS_ARCH_ARM64 EQU 2 ; ARM-64, also called AArch64 +KS_ARCH_MIPS EQU 3 ; Mips architecture +KS_ARCH_X86 EQU 4 ; X86 architecture (including x86 & x86-64) +KS_ARCH_PPC EQU 5 ; PowerPC architecture (currently unsupported) +KS_ARCH_SPARC EQU 6 ; Sparc architecture +KS_ARCH_SYSTEMZ EQU 7 ; SystemZ architecture (S390X) +KS_ARCH_HEXAGON EQU 8 ; Hexagon architecture +KS_ARCH_MAX EQU 9 ; + +; Mode type ks_mode +KS_MODE_LITTLE_ENDIAN EQU 0 ; little-endian mode (default mode) +KS_MODE_BIG_ENDIAN EQU 1073741824; = 1 << 30 - big-endian mode +KS_MODE_ARM EQU 0 ; 32-bit ARM +KS_MODE_THUMB EQU 16d ; = 1 << 4 - ARM's Thumb mode, including Thumb-2 +KS_MODE_V8 EQU 64d ; = 1 << 6 - ARMv8 A32 encodings for ARM +KS_MODE_MICRO EQU 16d ; = 1 << 4 - MicroMips mode (MIPS) +KS_MODE_MIPS3 EQU 32d ; = 1 << 5 - Mips III ISA +KS_MODE_MIPS32R6 EQU 64d ; = 1 << 6 - Mips32r6 ISA +KS_MODE_MIPS32 EQU 4 ; = 1 << 2 - Mips32 ISA +KS_MODE_MIPS64 EQU 8 ; = 1 << 3 - Mips64 ISA +KS_MODE_16 EQU 2 ; = 1 << 1 - 16-bit mode +KS_MODE_32 EQU 4 ; = 1 << 2 - 32-bit mode +KS_MODE_64 EQU 8 ; = 1 << 3 - 64-bit mode +KS_MODE_PPC32 EQU 4 ; = 1 << 2 - 32-bit mode +KS_MODE_PPC64 EQU 8 ; = 1 << 3 - 64-bit mode +KS_MODE_QPX EQU 16d ; = 1 << 4 - Quad Processing eXtensions mode +KS_MODE_SPARC32 EQU 4 ; = 1 << 2 - 32-bit mode +KS_MODE_SPARC64 EQU 8 ; = 1 << 3 - 64-bit mode +KS_MODE_V9 EQU 16d ; = 1 << 4 - SparcV9 mode (Sparc) + +; Errors +KS_ERR_ASM EQU 128 ; All generic errors related to input assembly >= KS_ERR_ASM +KS_ERR_ASM_ARCH EQU 512 ; All architecture-specific errors related to input assembly >= + +; All type of errors encountered by Keystone API ks_err +KS_ERR_OK EQU 0 ; No error: everything was fine +KS_ERR_NOMEM EQU 1 ; Out-Of-Memory error: ks_open(), ks_emulate() +KS_ERR_ARCH EQU 2 ; Unsupported architecture: ks_open() +KS_ERR_HANDLE EQU 3 ; Invalid handle +KS_ERR_MODE EQU 4 ; Invalid/unsupported mode: ks_open() +KS_ERR_VERSION EQU 5 ; Unsupported version (bindings) +KS_ERR_OPT_INVALID EQU 6 ; Unsupported option + +; generic input assembly errors - parser specific +KS_ERR_ASM_EXPR_TOKEN EQU KS_ERR_ASM ; unknown token in expression +KS_ERR_ASM_DIRECTIVE_VALUE_RANGE EQU 129 ; literal value out of range for directive +KS_ERR_ASM_DIRECTIVE_ID EQU 130 ; expected identifier in directive +KS_ERR_ASM_DIRECTIVE_TOKEN EQU 131 ; unexpected token in directive +KS_ERR_ASM_DIRECTIVE_STR EQU 132 ; expected string in directive +KS_ERR_ASM_DIRECTIVE_COMMA EQU 133 ; expected comma in directive +KS_ERR_ASM_DIRECTIVE_RELOC_NAME EQU 134 ; expected relocation name in directive +KS_ERR_ASM_DIRECTIVE_RELOC_TOKEN EQU 135 ; unexpected token in .reloc directive +KS_ERR_ASM_DIRECTIVE_FPOINT EQU 136 ; invalid floating point in directive +KS_ERR_ASM_DIRECTIVE_UNKNOWN EQU 137 ; unknown directive +KS_ERR_ASM_DIRECTIVE_EQU EQU 138 ; invalid equal directive +KS_ERR_ASM_DIRECTIVE_INVALID EQU 139 ; (generic) invalid directive +KS_ERR_ASM_VARIANT_INVALID EQU 140 ; invalid variant +KS_ERR_ASM_EXPR_BRACKET EQU 141 ; brackets expression not supported on this target +KS_ERR_ASM_SYMBOL_MODIFIER EQU 142 ; unexpected symbol modifier following '@' +KS_ERR_ASM_SYMBOL_REDEFINED EQU 143 ; invalid symbol redefinition +KS_ERR_ASM_SYMBOL_MISSING EQU 144 ; cannot find a symbol +KS_ERR_ASM_RPAREN EQU 145 ; expected ')' in parentheses expression +KS_ERR_ASM_STAT_TOKEN EQU 146 ; unexpected token at start of statement +KS_ERR_ASM_UNSUPPORTED EQU 147 ; unsupported token yet +KS_ERR_ASM_MACRO_TOKEN EQU 148 ; unexpected token in macro instantiation +KS_ERR_ASM_MACRO_PAREN EQU 149 ; unbalanced parentheses in macro argument +KS_ERR_ASM_MACRO_EQU EQU 150 ; expected '=' after formal parameter identifier +KS_ERR_ASM_MACRO_ARGS EQU 151 ; too many positional arguments +KS_ERR_ASM_MACRO_LEVELS_EXCEED EQU 152 ; macros cannot be nested more than 20 levels deep +KS_ERR_ASM_MACRO_STR EQU 153 ; invalid macro string +KS_ERR_ASM_MACRO_INVALID EQU 154 ; invalid macro (generic error) +KS_ERR_ASM_ESC_BACKSLASH EQU 155 ; unexpected backslash at end of escaped string +KS_ERR_ASM_ESC_OCTAL EQU 156 ; invalid octal escape sequence (out of range) +KS_ERR_ASM_ESC_SEQUENCE EQU 157 ; invalid escape sequence (unrecognized character) +KS_ERR_ASM_ESC_STR EQU 158 ; broken escape string +KS_ERR_ASM_TOKEN_INVALID EQU 159 ; invalid token +KS_ERR_ASM_INSN_UNSUPPORTED EQU 160 ; this instruction is unsupported in this mode +KS_ERR_ASM_FIXUP_INVALID EQU 161 ; invalid fixup +KS_ERR_ASM_LABEL_INVALID EQU 162 ; invalid label +KS_ERR_ASM_FRAGMENT_INVALID EQU 163 ; invalid fragment + +; generic input assembly errors - architecture specific +KS_ERR_ASM_INVALIDOPERAND EQU KS_ERR_ASM_ARCH, +KS_ERR_ASM_MISSINGFEATURE EQU 513 +KS_ERR_ASM_MNEMONICFAIL EQU 514 + +; ks_err_asm_x86 +KS_ERR_ASM_X86_INVALIDOPERAND EQU KS_ERR_ASM_ARCH +KS_ERR_ASM_X86_MISSINGFEATURE EQU KS_ERR_ASM_MISSINGFEATURE +KS_ERR_ASM_X86_MNEMONICFAIL EQU KS_ERR_ASM_MNEMONICFAIL + +; Runtime option for the Keystone engine ks_opt_type +KS_OPT_SYNTAX EQU 1 ; Choose syntax for input assembly +KS_OPT_SYM_RESOLVER EQU 2 ; Set symbol resolver callback + +; Runtime option value (associated with ks_opt_type above) ks_opt_value +KS_OPT_SYNTAX_INTEL EQU 1 ; = 1 << 0, // X86 Intel syntax - default on X86 (KS_OPT_SYNTAX). +KS_OPT_SYNTAX_ATT EQU 2 ; = 1 << 1, // X86 ATT asm syntax (KS_OPT_SYNTAX). +KS_OPT_SYNTAX_NASM EQU 4 ; = 1 << 2, // X86 Nasm syntax (KS_OPT_SYNTAX). +KS_OPT_SYNTAX_MASM EQU 8 ; = 1 << 3, // X86 Masm syntax (KS_OPT_SYNTAX) - unsupported yet. +KS_OPT_SYNTAX_GAS EQU 16 ; = 1 << 4, // X86 GNU GAS syntax (KS_OPT_SYNTAX). +KS_OPT_SYNTAX_RADIX16 EQU 32 ; = 1 << 5, // All immediates are in hex format (i.e 12 is 0x12) + +; Keystone Functions for x64 assemblers: JWasm/UASM +ks_version PROTO :QWORD, :QWORD ; int* major, int* minor +ks_arch_supported PROTO :QWORD ; ks_arch arch +ks_open PROTO :QWORD, :QWORD, :QWORD ; ks_arch arch, int mode, ks_engine** ks +ks_close PROTO :QWORD ; ks_engine* ks +ks_errno PROTO :QWORD ; ks_engine* ks +ks_strerror PROTO :QWORD ; ks_err code +ks_option PROTO :QWORD, :QWORD, :QWORD ; ks_engine* ks, ks_opt_type type, size_t value +ks_asm PROTO :QWORD, :QWORD, :QWORD, :QWORD, :QWORD, :QWORD ; ks_engine* ks, const char* string, int64_t address, unsigned char** encoding, size_t* encoding_size, size_t* stat_count +ks_free PROTO :QWORD ; unsigned char* p + +; Resolver callback to provide value for a missing symbol in @symbol. +; To handle a symbol, the resolver must put value of the symbol in @value, +; then returns True. +; If we do not resolve a missing symbol, this function must return False. +; In that case, ks_asm() would eventually return with error KS_ERR_ASM_SYMBOL_MISSING. +; +; To register the resolver, pass its function address to ks_option(), using +; option KS_OPT_SYM_RESOLVER. typedef bool *ks_sym_resolver)(const char* symbol, uint64_t* value +; +; Invoke ks_option, ks, KS_OPT_SYM_RESOLVER, Addr ks_sym_resolver +; + +ks_sym_resolver PROTO :QWORD, :QWORD ; const char* symbol, uint64_t* value \ No newline at end of file diff --git a/bindings/masm/keystone_x86.inc b/bindings/masm/keystone_x86.inc new file mode 100644 index 0000000..8d3a33b --- /dev/null +++ b/bindings/masm/keystone_x86.inc @@ -0,0 +1,153 @@ +;-------------------------------------------------------------------------------------------------------- +; Keystone_x86.inc for Masm x86 - fearless 2017 - www.github.com/mrfearless - www.LetTheLight.in +; +; Include file for keystone.dll (x86) exports, constants and structures. +; +; This is a conversion of the original files: keystone.h, & x86.h to a format that will work with MASM +; and other assemblers (possibly). +; +;-------------------------------------------------------------------------------------------------------- + +; Misc +CS_MNEMONIC_SIZE EQU 32 +size_t TYPEDEF DWORD +csh TYPEDEF size_t + +; Keystone API version +KS_API_MAJOR EQU 0 +KS_API_MINOR EQU 9 + +; Package version +KS_VERSION_MAJOR EQU KS_API_MAJOR +KS_VERSION_MINOR EQU KS_API_MINOR +KS_VERSION_EXTRA EQU 1 +KS_MAKE_VERSION EQU 9d ; ((major << 8) + minor) + +; Architecture type ks_arch +KS_ARCH_ARM EQU 1 ; ARM architecture (including Thumb, Thumb-2) +KS_ARCH_ARM64 EQU 2 ; ARM-64, also called AArch64 +KS_ARCH_MIPS EQU 3 ; Mips architecture +KS_ARCH_X86 EQU 4 ; X86 architecture (including x86 & x86-64) +KS_ARCH_PPC EQU 5 ; PowerPC architecture (currently unsupported) +KS_ARCH_SPARC EQU 6 ; Sparc architecture +KS_ARCH_SYSTEMZ EQU 7 ; SystemZ architecture (S390X) +KS_ARCH_HEXAGON EQU 8 ; Hexagon architecture +KS_ARCH_MAX EQU 9 ; + +; Mode type ks_mode +KS_MODE_LITTLE_ENDIAN EQU 0 ; little-endian mode (default mode) +KS_MODE_BIG_ENDIAN EQU 1073741824; = 1 << 30 - big-endian mode +KS_MODE_ARM EQU 0 ; 32-bit ARM +KS_MODE_THUMB EQU 16d ; = 1 << 4 - ARM's Thumb mode, including Thumb-2 +KS_MODE_V8 EQU 64d ; = 1 << 6 - ARMv8 A32 encodings for ARM +KS_MODE_MICRO EQU 16d ; = 1 << 4 - MicroMips mode (MIPS) +KS_MODE_MIPS3 EQU 32d ; = 1 << 5 - Mips III ISA +KS_MODE_MIPS32R6 EQU 64d ; = 1 << 6 - Mips32r6 ISA +KS_MODE_MIPS32 EQU 4 ; = 1 << 2 - Mips32 ISA +KS_MODE_MIPS64 EQU 8 ; = 1 << 3 - Mips64 ISA +KS_MODE_16 EQU 2 ; = 1 << 1 - 16-bit mode +KS_MODE_32 EQU 4 ; = 1 << 2 - 32-bit mode +KS_MODE_64 EQU 8 ; = 1 << 3 - 64-bit mode +KS_MODE_PPC32 EQU 4 ; = 1 << 2 - 32-bit mode +KS_MODE_PPC64 EQU 8 ; = 1 << 3 - 64-bit mode +KS_MODE_QPX EQU 16d ; = 1 << 4 - Quad Processing eXtensions mode +KS_MODE_SPARC32 EQU 4 ; = 1 << 2 - 32-bit mode +KS_MODE_SPARC64 EQU 8 ; = 1 << 3 - 64-bit mode +KS_MODE_V9 EQU 16d ; = 1 << 4 - SparcV9 mode (Sparc) + +; Errors +KS_ERR_ASM EQU 128 ; All generic errors related to input assembly >= KS_ERR_ASM +KS_ERR_ASM_ARCH EQU 512 ; All architecture-specific errors related to input assembly >= + +; All type of errors encountered by Keystone API ks_err +KS_ERR_OK EQU 0 ; No error: everything was fine +KS_ERR_NOMEM EQU 1 ; Out-Of-Memory error: ks_open(), ks_emulate() +KS_ERR_ARCH EQU 2 ; Unsupported architecture: ks_open() +KS_ERR_HANDLE EQU 3 ; Invalid handle +KS_ERR_MODE EQU 4 ; Invalid/unsupported mode: ks_open() +KS_ERR_VERSION EQU 5 ; Unsupported version (bindings) +KS_ERR_OPT_INVALID EQU 6 ; Unsupported option + +; generic input assembly errors - parser specific +KS_ERR_ASM_EXPR_TOKEN EQU KS_ERR_ASM ; unknown token in expression +KS_ERR_ASM_DIRECTIVE_VALUE_RANGE EQU 129 ; literal value out of range for directive +KS_ERR_ASM_DIRECTIVE_ID EQU 130 ; expected identifier in directive +KS_ERR_ASM_DIRECTIVE_TOKEN EQU 131 ; unexpected token in directive +KS_ERR_ASM_DIRECTIVE_STR EQU 132 ; expected string in directive +KS_ERR_ASM_DIRECTIVE_COMMA EQU 133 ; expected comma in directive +KS_ERR_ASM_DIRECTIVE_RELOC_NAME EQU 134 ; expected relocation name in directive +KS_ERR_ASM_DIRECTIVE_RELOC_TOKEN EQU 135 ; unexpected token in .reloc directive +KS_ERR_ASM_DIRECTIVE_FPOINT EQU 136 ; invalid floating point in directive +KS_ERR_ASM_DIRECTIVE_UNKNOWN EQU 137 ; unknown directive +KS_ERR_ASM_DIRECTIVE_EQU EQU 138 ; invalid equal directive +KS_ERR_ASM_DIRECTIVE_INVALID EQU 139 ; (generic) invalid directive +KS_ERR_ASM_VARIANT_INVALID EQU 140 ; invalid variant +KS_ERR_ASM_EXPR_BRACKET EQU 141 ; brackets expression not supported on this target +KS_ERR_ASM_SYMBOL_MODIFIER EQU 142 ; unexpected symbol modifier following '@' +KS_ERR_ASM_SYMBOL_REDEFINED EQU 143 ; invalid symbol redefinition +KS_ERR_ASM_SYMBOL_MISSING EQU 144 ; cannot find a symbol +KS_ERR_ASM_RPAREN EQU 145 ; expected ')' in parentheses expression +KS_ERR_ASM_STAT_TOKEN EQU 146 ; unexpected token at start of statement +KS_ERR_ASM_UNSUPPORTED EQU 147 ; unsupported token yet +KS_ERR_ASM_MACRO_TOKEN EQU 148 ; unexpected token in macro instantiation +KS_ERR_ASM_MACRO_PAREN EQU 149 ; unbalanced parentheses in macro argument +KS_ERR_ASM_MACRO_EQU EQU 150 ; expected '=' after formal parameter identifier +KS_ERR_ASM_MACRO_ARGS EQU 151 ; too many positional arguments +KS_ERR_ASM_MACRO_LEVELS_EXCEED EQU 152 ; macros cannot be nested more than 20 levels deep +KS_ERR_ASM_MACRO_STR EQU 153 ; invalid macro string +KS_ERR_ASM_MACRO_INVALID EQU 154 ; invalid macro (generic error) +KS_ERR_ASM_ESC_BACKSLASH EQU 155 ; unexpected backslash at end of escaped string +KS_ERR_ASM_ESC_OCTAL EQU 156 ; invalid octal escape sequence (out of range) +KS_ERR_ASM_ESC_SEQUENCE EQU 157 ; invalid escape sequence (unrecognized character) +KS_ERR_ASM_ESC_STR EQU 158 ; broken escape string +KS_ERR_ASM_TOKEN_INVALID EQU 159 ; invalid token +KS_ERR_ASM_INSN_UNSUPPORTED EQU 160 ; this instruction is unsupported in this mode +KS_ERR_ASM_FIXUP_INVALID EQU 161 ; invalid fixup +KS_ERR_ASM_LABEL_INVALID EQU 162 ; invalid label +KS_ERR_ASM_FRAGMENT_INVALID EQU 163 ; invalid fragment + +; generic input assembly errors - architecture specific +KS_ERR_ASM_INVALIDOPERAND EQU KS_ERR_ASM_ARCH, +KS_ERR_ASM_MISSINGFEATURE EQU 513 +KS_ERR_ASM_MNEMONICFAIL EQU 514 + +; ks_err_asm_x86 +KS_ERR_ASM_X86_INVALIDOPERAND EQU KS_ERR_ASM_ARCH +KS_ERR_ASM_X86_MISSINGFEATURE EQU KS_ERR_ASM_MISSINGFEATURE +KS_ERR_ASM_X86_MNEMONICFAIL EQU KS_ERR_ASM_MNEMONICFAIL + +; Runtime option for the Keystone engine ks_opt_type +KS_OPT_SYNTAX EQU 1 ; Choose syntax for input assembly +KS_OPT_SYM_RESOLVER EQU 2 ; Set symbol resolver callback + +; Runtime option value (associated with ks_opt_type above) ks_opt_value +KS_OPT_SYNTAX_INTEL EQU 1 ; = 1 << 0, // X86 Intel syntax - default on X86 (KS_OPT_SYNTAX). +KS_OPT_SYNTAX_ATT EQU 2 ; = 1 << 1, // X86 ATT asm syntax (KS_OPT_SYNTAX). +KS_OPT_SYNTAX_NASM EQU 4 ; = 1 << 2, // X86 Nasm syntax (KS_OPT_SYNTAX). +KS_OPT_SYNTAX_MASM EQU 8 ; = 1 << 3, // X86 Masm syntax (KS_OPT_SYNTAX) - unsupported yet. +KS_OPT_SYNTAX_GAS EQU 16 ; = 1 << 4, // X86 GNU GAS syntax (KS_OPT_SYNTAX). +KS_OPT_SYNTAX_RADIX16 EQU 32 ; = 1 << 5, // All immediates are in hex format (i.e 12 is 0x12) + +; Keystone Functions +ks_version PROTO C :DWORD, :DWORD ; int* major, int* minor +ks_arch_supported PROTO C :DWORD ; ks_arch arch +ks_open PROTO C :DWORD, :DWORD, :DWORD ; ks_arch arch, int mode, ks_engine** ks +ks_close PROTO C :DWORD ; ks_engine* ks +ks_errno PROTO C :DWORD ; ks_engine* ks +ks_strerror PROTO C :DWORD ; ks_err code +ks_option PROTO C :DWORD, :DWORD, :DWORD ; ks_engine* ks, ks_opt_type type, size_t value +ks_asm PROTO C :DWORD, :DWORD, :QWORD, :DWORD, :DWORD, :DWORD ; ks_engine* ks, const char* string, int64_t address, unsigned char** encoding, size_t* encoding_size, size_t* stat_count +ks_free PROTO C :DWORD ; unsigned char* p + +; Resolver callback to provide value for a missing symbol in @symbol. +; To handle a symbol, the resolver must put value of the symbol in @value, +; then returns True. +; If we do not resolve a missing symbol, this function must return False. +; In that case, ks_asm() would eventually return with error KS_ERR_ASM_SYMBOL_MISSING. +; +; To register the resolver, pass its function address to ks_option(), using +; option KS_OPT_SYM_RESOLVER. typedef bool ks_sym_resolver const char* symbol, uint64_t* value +; +; Invoke ks_option, ks, KS_OPT_SYM_RESOLVER, Addr ks_sym_resolver +; +ks_sym_resolver PROTO C :DWORD, :DWORD ; const char* symbol, uint64_t* value \ No newline at end of file diff --git a/bindings/masm/makex64_lib.bat b/bindings/masm/makex64_lib.bat new file mode 100644 index 0000000..c543e94 --- /dev/null +++ b/bindings/masm/makex64_lib.bat @@ -0,0 +1 @@ +lib /DEF:keystone.def /OUT:keystone_x64.lib /MACHINE:X64 \ No newline at end of file diff --git a/bindings/masm/makex86_lib.bat b/bindings/masm/makex86_lib.bat new file mode 100644 index 0000000..53350df --- /dev/null +++ b/bindings/masm/makex86_lib.bat @@ -0,0 +1 @@ +lib /DEF:keystone.def /OUT:keystone_x86.lib /MACHINE:X86 \ No newline at end of file diff --git a/bindings/masm/masmApiCall.api.txt b/bindings/masm/masmApiCall.api.txt new file mode 100644 index 0000000..d23ae39 --- /dev/null +++ b/bindings/masm/masmApiCall.api.txt @@ -0,0 +1,15 @@ +;----------------------------------------------------------------------------------------------------- +; Keystone Additions +; +; Paste this text at the end of \Radasm\Masm\masmApiCall.api to add these to Radasm +; +;----------------------------------------------------------------------------------------------------- +ks_version,dwMajor,dwMinor +ks_arch_supported,dwArch +ks_open,dwArch,dwMode,lpdwEngine +ks_close,dwEngine +ks_errno,dwEngine +ks_strerror,dwErrCode +ks_option,dwEngine,dwOptType,dwOptTypeValue +ks_asm,dwEngine,lpszString,dwAddress,lpEncoding,dwEncodingSize,dwStatCount +ks_free,lpEncoding \ No newline at end of file diff --git a/bindings/masm/masmApiConst.api.txt b/bindings/masm/masmApiConst.api.txt new file mode 100644 index 0000000..90399a9 --- /dev/null +++ b/bindings/masm/masmApiConst.api.txt @@ -0,0 +1,14 @@ +;----------------------------------------------------------------------------------------------------- +; Keystone Additions +; +; Paste this text at the end of \Radasm\Masm\masmApiConst.api to add these to Radasm +; +;----------------------------------------------------------------------------------------------------- +1ks_version,NULL,KS_VERSION_MAJOR +2ks_version,NULL,KS_VERSION_MINOR +1ks_arch_supported,KS_ARCH_ARM,KS_ARCH_ARM64,KS_ARCH_MIPS,KS_ARCH_X86,KS_ARCH_PPC,KS_ARCH_SPARC,KS_ARCH_SYSTEMZ,KS_ARCH_HEXAGON,KS_ARCH_MAX +1ks_open,KS_ARCH_ARM,KS_ARCH_ARM64,KS_ARCH_MIPS,KS_ARCH_X86,KS_ARCH_PPC,KS_ARCH_SPARC,KS_ARCH_SYSTEMZ,KS_ARCH_HEXAGON,KS_ARCH_MAX +2ks_open,KS_MODE_LITTLE_ENDIAN,KS_MODE_BIG_ENDIAN,KS_MODE_ARM,KS_MODE_THUMB,KS_MODE_V8,KS_MODE_MICRO,KS_MODE_MIPS3,KS_MODE_MIPS32R6,KS_MODE_MIPS32,KS_MODE_MIPS64,KS_MODE_16,KS_MODE_32,KS_MODE_64,KS_MODE_PPC32,KS_MODE_PPC64,KS_MODE_QPX,KS_MODE_SPARC32,KS_MODE_SPARC64,KS_MODE_V9 +1ks_strerror,KS_ERR_OK,KS_ERR_NOMEM,KS_ERR_ARCH,KS_ERR_HANDLE,KS_ERR_MODE,KS_ERR_VERSION,KS_ERR_OPT_INVALID,KS_ERR_ASM_EXPR_TOKEN,KS_ERR_ASM_DIRECTIVE_VALUE_RANGE,KS_ERR_ASM_DIRECTIVE_ID,KS_ERR_ASM_DIRECTIVE_TOKEN,KS_ERR_ASM_DIRECTIVE_STR,KS_ERR_ASM_DIRECTIVE_COMMA,KS_ERR_ASM_DIRECTIVE_RELOC_NAME,KS_ERR_ASM_DIRECTIVE_RELOC_TOKEN,KS_ERR_ASM_DIRECTIVE_FPOINT,KS_ERR_ASM_DIRECTIVE_UNKNOWN,KS_ERR_ASM_DIRECTIVE_EQU,KS_ERR_ASM_DIRECTIVE_INVALID,KS_ERR_ASM_VARIANT_INVALID,KS_ERR_ASM_EXPR_BRACKET,KS_ERR_ASM_SYMBOL_MODIFIER,KS_ERR_ASM_SYMBOL_REDEFINED,KS_ERR_ASM_SYMBOL_MISSING,KS_ERR_ASM_RPAREN,KS_ERR_ASM_STAT_TOKEN,KS_ERR_ASM_UNSUPPORTED,KS_ERR_ASM_MACRO_TOKEN,KS_ERR_ASM_MACRO_PAREN,KS_ERR_ASM_MACRO_EQU,KS_ERR_ASM_MACRO_ARGS,KS_ERR_ASM_MACRO_LEVELS_EXCEED,KS_ERR_ASM_MACRO_STR,KS_ERR_ASM_MACRO_INVALID,KS_ERR_ASM_ESC_BACKSLASH,KS_ERR_ASM_ESC_OCTAL,KS_ERR_ASM_ESC_SEQUENCE,KS_ERR_ASM_ESC_STR,KS_ERR_ASM_TOKEN_INVALID,KS_ERR_ASM_INSN_UNSUPPORTED,KS_ERR_ASM_FIXUP_INVALID,KS_ERR_ASM_LABEL_INVALID,KS_ERR_ASM_FRAGMENT_INVALID,KS_ERR_ASM_INVALIDOPERAND,KS_ERR_ASM_MISSINGFEATURE,KS_ERR_ASM_MNEMONICFAIL,KS_ERR_ASM_X86_INVALIDOPERAND,KS_ERR_ASM_X86_MISSINGFEATURE,KS_ERR_ASM_X86_MNEMONICFAIL,KS_ERR_ASM,KS_ERR_ASM_ARCH +2ks_option,KS_OPT_SYNTAX,KS_OPT_SYM_RESOLVER +3ks_option,Addr ks_sym_resolver,KS_OPT_SYNTAX_INTEL,KS_OPT_SYNTAX_ATT,KS_OPT_SYNTAX_NASM,KS_OPT_SYNTAX_MASM,KS_OPT_SYNTAX_GAS,KS_OPT_SYNTAX_RADIX16 \ No newline at end of file diff --git a/bindings/nodejs/LICENSE b/bindings/nodejs/LICENSE new file mode 100644 index 0000000..89cc025 --- /dev/null +++ b/bindings/nodejs/LICENSE @@ -0,0 +1,19 @@ +Copyright (c) 2016 Ingmar Steen + +Permission is hereby granted, free of charge, to any person obtaining a copy of +this software and associated documentation files (the "Software"), to deal in +the Software without restriction, including without limitation the rights to +use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of +the Software, and to permit persons to whom the Software is furnished to do so, +subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all +copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +SOFTWARE. \ No newline at end of file diff --git a/bindings/nodejs/Makefile b/bindings/nodejs/Makefile new file mode 100644 index 0000000..7017bb4 --- /dev/null +++ b/bindings/nodejs/Makefile @@ -0,0 +1,21 @@ +# NodeJS binding for Keystone engine. Ingmar Steen + +ifndef BUILDDIR +OBJDIR = ./build +else +OBJDIR = $(abspath $(BUILDDIR))/obj/bindings/nodejs +endif + +.PHONY: gen_const install clean check + +gen_const: + cd .. && python const_generator.py nodejs + +install: + npm install ./ + +clean: + +check: + node sample.js + diff --git a/bindings/nodejs/README.md b/bindings/nodejs/README.md new file mode 100644 index 0000000..83ed4af --- /dev/null +++ b/bindings/nodejs/README.md @@ -0,0 +1,53 @@ +# node-keystone + +`node-keystone` provides Node.js bindings for the +[Keystone](http://www.keystone-engine.org) assembler library, allowing +text data in to be assembled into `Buffer` objects using any of Keystone's +supported architectures. + +### Install + +`npm install /path/to/keystone/bindings/nodejs` + +#### libkeystone + +These bindings require you to have the Keystone library installed as it is +not included. + +### Basic usage + +```javascript +var keystone = require("keystone"); +var assembly = "inc ecx; dec ebx" + +var ks = new keystone.Ks(keystone.ARCH_X86, keystone.MODE_64); +console.log(ks.asm(assembly)); +ks.close(); +``` + +For other examples, see the `example.js` file. + +### License + +The source code is hereby released under the MIT License. The full text of the +license appears below. + +Copyright (c) 2016 Ingmar Steen + +Permission is hereby granted, free of charge, to any person obtaining a copy of +this software and associated documentation files (the "Software"), to deal in +the Software without restriction, including without limitation the rights to +use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of +the Software, and to permit persons to whom the Software is furnished to do so, +subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all +copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +SOFTWARE. diff --git a/bindings/nodejs/consts/arm.js b/bindings/nodejs/consts/arm.js new file mode 100644 index 0000000..7fa6688 --- /dev/null +++ b/bindings/nodejs/consts/arm.js @@ -0,0 +1,4 @@ +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [arm_const.js] +module.exports.ERR_ASM_ARM_INVALIDOPERAND = 512 +module.exports.ERR_ASM_ARM_MISSINGFEATURE = 513 +module.exports.ERR_ASM_ARM_MNEMONICFAIL = 514 diff --git a/bindings/nodejs/consts/arm64.js b/bindings/nodejs/consts/arm64.js new file mode 100644 index 0000000..4c134b6 --- /dev/null +++ b/bindings/nodejs/consts/arm64.js @@ -0,0 +1,4 @@ +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [arm64_const.js] +module.exports.ERR_ASM_ARM64_INVALIDOPERAND = 512 +module.exports.ERR_ASM_ARM64_MISSINGFEATURE = 513 +module.exports.ERR_ASM_ARM64_MNEMONICFAIL = 514 diff --git a/bindings/nodejs/consts/evm.js b/bindings/nodejs/consts/evm.js new file mode 100644 index 0000000..e6762bb --- /dev/null +++ b/bindings/nodejs/consts/evm.js @@ -0,0 +1,4 @@ +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [evm_const.js] +module.exports.ERR_ASM_EVM_INVALIDOPERAND = 512 +module.exports.ERR_ASM_EVM_MISSINGFEATURE = 513 +module.exports.ERR_ASM_EVM_MNEMONICFAIL = 514 diff --git a/bindings/nodejs/consts/hexagon.js b/bindings/nodejs/consts/hexagon.js new file mode 100644 index 0000000..7e94aeb --- /dev/null +++ b/bindings/nodejs/consts/hexagon.js @@ -0,0 +1,4 @@ +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [hexagon_const.js] +module.exports.ERR_ASM_HEXAGON_INVALIDOPERAND = 512 +module.exports.ERR_ASM_HEXAGON_MISSINGFEATURE = 513 +module.exports.ERR_ASM_HEXAGON_MNEMONICFAIL = 514 diff --git a/bindings/nodejs/consts/index.js b/bindings/nodejs/consts/index.js new file mode 100644 index 0000000..df58d5c --- /dev/null +++ b/bindings/nodejs/consts/index.js @@ -0,0 +1,9 @@ +var extend = require('util')._extend, + archs = ['arm64', 'arm', 'hexagon', 'mips', 'ppc', 'sparc', 'systemz', 'x86'], + i + +module.exports = require('./keystone') + +for (i = 0; i < archs.length; ++i) { + extend(module.exports, require('./' + archs[i])); +} diff --git a/bindings/nodejs/consts/keystone.js b/bindings/nodejs/consts/keystone.js new file mode 100644 index 0000000..aca9b12 --- /dev/null +++ b/bindings/nodejs/consts/keystone.js @@ -0,0 +1,91 @@ +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [keystone_const.js] +module.exports.API_MAJOR = 0 +module.exports.API_MINOR = 9 +module.exports.VERSION_MAJOR = 0 +module.exports.VERSION_MINOR = 9 +module.exports.VERSION_EXTRA = 2 +module.exports.ARCH_ARM = 1 +module.exports.ARCH_ARM64 = 2 +module.exports.ARCH_MIPS = 3 +module.exports.ARCH_X86 = 4 +module.exports.ARCH_PPC = 5 +module.exports.ARCH_SPARC = 6 +module.exports.ARCH_SYSTEMZ = 7 +module.exports.ARCH_HEXAGON = 8 +module.exports.ARCH_EVM = 9 +module.exports.ARCH_MAX = 10 +module.exports.MODE_LITTLE_ENDIAN = 0 +module.exports.MODE_BIG_ENDIAN = 1073741824 +module.exports.MODE_ARM = 1 +module.exports.MODE_THUMB = 16 +module.exports.MODE_V8 = 64 +module.exports.MODE_MICRO = 16 +module.exports.MODE_MIPS3 = 32 +module.exports.MODE_MIPS32R6 = 64 +module.exports.MODE_MIPS32 = 4 +module.exports.MODE_MIPS64 = 8 +module.exports.MODE_16 = 2 +module.exports.MODE_32 = 4 +module.exports.MODE_64 = 8 +module.exports.MODE_PPC32 = 4 +module.exports.MODE_PPC64 = 8 +module.exports.MODE_QPX = 16 +module.exports.MODE_SPARC32 = 4 +module.exports.MODE_SPARC64 = 8 +module.exports.MODE_V9 = 16 +module.exports.ERR_ASM = 128 +module.exports.ERR_ASM_ARCH = 512 +module.exports.ERR_OK = 0 +module.exports.ERR_NOMEM = 1 +module.exports.ERR_ARCH = 2 +module.exports.ERR_HANDLE = 3 +module.exports.ERR_MODE = 4 +module.exports.ERR_VERSION = 5 +module.exports.ERR_OPT_INVALID = 6 +module.exports.ERR_ASM_EXPR_TOKEN = 128 +module.exports.ERR_ASM_DIRECTIVE_VALUE_RANGE = 129 +module.exports.ERR_ASM_DIRECTIVE_ID = 130 +module.exports.ERR_ASM_DIRECTIVE_TOKEN = 131 +module.exports.ERR_ASM_DIRECTIVE_STR = 132 +module.exports.ERR_ASM_DIRECTIVE_COMMA = 133 +module.exports.ERR_ASM_DIRECTIVE_RELOC_NAME = 134 +module.exports.ERR_ASM_DIRECTIVE_RELOC_TOKEN = 135 +module.exports.ERR_ASM_DIRECTIVE_FPOINT = 136 +module.exports.ERR_ASM_DIRECTIVE_UNKNOWN = 137 +module.exports.ERR_ASM_DIRECTIVE_EQU = 138 +module.exports.ERR_ASM_DIRECTIVE_INVALID = 139 +module.exports.ERR_ASM_VARIANT_INVALID = 140 +module.exports.ERR_ASM_EXPR_BRACKET = 141 +module.exports.ERR_ASM_SYMBOL_MODIFIER = 142 +module.exports.ERR_ASM_SYMBOL_REDEFINED = 143 +module.exports.ERR_ASM_SYMBOL_MISSING = 144 +module.exports.ERR_ASM_RPAREN = 145 +module.exports.ERR_ASM_STAT_TOKEN = 146 +module.exports.ERR_ASM_UNSUPPORTED = 147 +module.exports.ERR_ASM_MACRO_TOKEN = 148 +module.exports.ERR_ASM_MACRO_PAREN = 149 +module.exports.ERR_ASM_MACRO_EQU = 150 +module.exports.ERR_ASM_MACRO_ARGS = 151 +module.exports.ERR_ASM_MACRO_LEVELS_EXCEED = 152 +module.exports.ERR_ASM_MACRO_STR = 153 +module.exports.ERR_ASM_MACRO_INVALID = 154 +module.exports.ERR_ASM_ESC_BACKSLASH = 155 +module.exports.ERR_ASM_ESC_OCTAL = 156 +module.exports.ERR_ASM_ESC_SEQUENCE = 157 +module.exports.ERR_ASM_ESC_STR = 158 +module.exports.ERR_ASM_TOKEN_INVALID = 159 +module.exports.ERR_ASM_INSN_UNSUPPORTED = 160 +module.exports.ERR_ASM_FIXUP_INVALID = 161 +module.exports.ERR_ASM_LABEL_INVALID = 162 +module.exports.ERR_ASM_FRAGMENT_INVALID = 163 +module.exports.ERR_ASM_INVALIDOPERAND = 512 +module.exports.ERR_ASM_MISSINGFEATURE = 513 +module.exports.ERR_ASM_MNEMONICFAIL = 514 +module.exports.OPT_SYNTAX = 1 +module.exports.OPT_SYM_RESOLVER = 2 +module.exports.OPT_SYNTAX_INTEL = 1 +module.exports.OPT_SYNTAX_ATT = 2 +module.exports.OPT_SYNTAX_NASM = 4 +module.exports.OPT_SYNTAX_MASM = 8 +module.exports.OPT_SYNTAX_GAS = 16 +module.exports.OPT_SYNTAX_RADIX16 = 32 diff --git a/bindings/nodejs/consts/mips.js b/bindings/nodejs/consts/mips.js new file mode 100644 index 0000000..076f68b --- /dev/null +++ b/bindings/nodejs/consts/mips.js @@ -0,0 +1,4 @@ +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [mips_const.js] +module.exports.ERR_ASM_MIPS_INVALIDOPERAND = 512 +module.exports.ERR_ASM_MIPS_MISSINGFEATURE = 513 +module.exports.ERR_ASM_MIPS_MNEMONICFAIL = 514 diff --git a/bindings/nodejs/consts/ppc.js b/bindings/nodejs/consts/ppc.js new file mode 100644 index 0000000..63562f4 --- /dev/null +++ b/bindings/nodejs/consts/ppc.js @@ -0,0 +1,4 @@ +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [ppc_const.js] +module.exports.ERR_ASM_PPC_INVALIDOPERAND = 512 +module.exports.ERR_ASM_PPC_MISSINGFEATURE = 513 +module.exports.ERR_ASM_PPC_MNEMONICFAIL = 514 diff --git a/bindings/nodejs/consts/sparc.js b/bindings/nodejs/consts/sparc.js new file mode 100644 index 0000000..9287ce4 --- /dev/null +++ b/bindings/nodejs/consts/sparc.js @@ -0,0 +1,4 @@ +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [sparc_const.js] +module.exports.ERR_ASM_SPARC_INVALIDOPERAND = 512 +module.exports.ERR_ASM_SPARC_MISSINGFEATURE = 513 +module.exports.ERR_ASM_SPARC_MNEMONICFAIL = 514 diff --git a/bindings/nodejs/consts/systemz.js b/bindings/nodejs/consts/systemz.js new file mode 100644 index 0000000..4f9a611 --- /dev/null +++ b/bindings/nodejs/consts/systemz.js @@ -0,0 +1,4 @@ +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [systemz_const.js] +module.exports.ERR_ASM_SYSTEMZ_INVALIDOPERAND = 512 +module.exports.ERR_ASM_SYSTEMZ_MISSINGFEATURE = 513 +module.exports.ERR_ASM_SYSTEMZ_MNEMONICFAIL = 514 diff --git a/bindings/nodejs/consts/x86.js b/bindings/nodejs/consts/x86.js new file mode 100644 index 0000000..f356afe --- /dev/null +++ b/bindings/nodejs/consts/x86.js @@ -0,0 +1,4 @@ +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [x86_const.js] +module.exports.ERR_ASM_X86_INVALIDOPERAND = 512 +module.exports.ERR_ASM_X86_MISSINGFEATURE = 513 +module.exports.ERR_ASM_X86_MNEMONICFAIL = 514 diff --git a/bindings/nodejs/index.js b/bindings/nodejs/index.js new file mode 100644 index 0000000..04d8e6a --- /dev/null +++ b/bindings/nodejs/index.js @@ -0,0 +1,100 @@ +var ref = require('ref'), + ffi = require('ffi'), + consts = require('./consts'), + extend = require('util')._extend + +var ks_engine = 'void', + ks_enginePtr = ref.refType(ks_engine), + ks_enginePtrPtr = ref.refType(ks_enginePtr), + ks_arch = 'int', + ks_err = 'int', + ks_opt_type = 'int', + uintPtr = ref.refType('uint'), + ucharPtr = ref.refType('uchar'), + ucharPtrPtr = ref.refType(ucharPtr), + size_tPtr = ref.refType('size_t'), + stringPtr = ref.refType('string') + +var Keystone = ffi.Library('libkeystone', { + 'ks_version': [ 'uint', [ uintPtr, uintPtr ] ], + 'ks_arch_supported': [ 'bool', [ ks_arch ] ], + 'ks_open': [ ks_err, [ ks_arch, 'int', ks_enginePtrPtr ] ], + 'ks_close': [ ks_err, [ ks_enginePtr ] ], + 'ks_errno': [ 'int', [ ks_enginePtr ] ], + 'ks_strerror': [ 'string', [ ks_err ] ], + 'ks_option': [ ks_err, [ ks_enginePtr, ks_opt_type, 'size_t' ] ], + 'ks_asm': [ 'int', [ ks_enginePtr, 'string', 'uint64', ucharPtrPtr, size_tPtr, size_tPtr ] ], + 'ks_free': [ 'void', [ 'pointer' ] ] +}) + +function KsError(message, errno, count) { + this.message = message + this.errno = errno + this.count = count +} + +function Ks(arch, mode) { + var _ks = ref.alloc(ks_enginePtr), + err = Keystone.ks_open(arch, mode, _ks) + + if (err !== consts.ERR_OK) { + this._ks = null + throw new KsError('Error: failed on ks_open()') + } + + this._ks = _ks.deref() + + + this.__defineGetter__('errno', function() { + return Keystone.ks_errno(this._ks) + }) + + this.__defineSetter__('syntax', function(value) { + this.set_option(consts.OPT_SYNTAX, value) + }) +} + +Ks.prototype.asm = function(code, addr) { + var encoding = ref.alloc('uchar *'), + size = ref.alloc('size_t'), + count = ref.alloc('size_t'), + err, msg + + if (Keystone.ks_asm(this._ks, code, addr || 0, encoding, size, count) !== consts.ERR_OK) { + err = this.errno + msg = Keystone.ks_strerror(err) + throw new KsError(msg, err, count.deref()) + } + + return { + encoding: ref.reinterpret(encoding.deref(), size.deref(), 0), + count: count.deref() + } +} + +Ks.prototype.close = function() { + Keystone.ks_close(this._ks) + this._ks = null +} + +Ks.prototype.set_option = function(type, value) { + var err = Keystone.ks_option(this._ks, type, value) + if (err != consts.ERR_OK) { + throw new KsError(Keystone.ks_strerror(err), err) + } +} + +module.exports.Ks = Ks + +module.exports.is_arch_supported = function(arch) { + return Keystone.ks_arch_supported(arch) +} + +module.exports.__defineGetter__('version', function() { + var version = Keystone.ks_version(null, null) + return { + major: version >> 8, + minor: version & 255 + } +}) +extend(module.exports, consts) diff --git a/bindings/nodejs/package.json b/bindings/nodejs/package.json new file mode 100644 index 0000000..26113d4 --- /dev/null +++ b/bindings/nodejs/package.json @@ -0,0 +1,18 @@ +{ + "name": "keystone", + "version": "0.9.0", + "description": "Keystone assembler engine", + "homepage": "http://www.keystone-engine.org", + "main": "index.js", + "dependencies": { + "ffi": "^2.0.0", + "ref": "^1.3.2" + }, + "devDependencies": {}, + "scripts": { + "prepublish": "cd .. && python const_generator.py nodejs", + "test": "echo \"Error: no test specified\" && exit 1" + }, + "author": "Ingmar Steen ", + "license": "MIT" +} diff --git a/bindings/nodejs/sample.js b/bindings/nodejs/sample.js new file mode 100644 index 0000000..ddfa545 --- /dev/null +++ b/bindings/nodejs/sample.js @@ -0,0 +1,27 @@ +var keystone = require('.') // Or: require('keystone') if you have installed it + +console.log('Using keystone ' + keystone.version.major + '.' + keystone.version.minor) + +var ks, assembly, result + +// Check if architecture is supported +if (! keystone.is_arch_supported(keystone.ARCH_X86)) { + throw 'Warning: X86 architecture not supported by keystone.' +} + +// Create a new Keystone instance for X86 64bit +ks = new keystone.Ks(keystone.ARCH_X86, keystone.MODE_64) + +// Assemble some instructions +assembly = 'inc rcx; dec rbx' +result = ks.asm(assembly) +console.log('"' + assembly + '"', ':', result.encoding) + +// Change syntax, assemble some more instructions +assembly = 'lea rax, [label1]\nnop\nnop\nlabel1:' +ks.syntax = keystone.OPT_SYNTAX_NASM +result = ks.asm(assembly) +console.log('"' + assembly.replace(/\n/g, '; ') + '"', ':', result.encoding) + +// Close Keystone instance to free resources +ks.close() diff --git a/bindings/ocaml/.gitignore b/bindings/ocaml/.gitignore new file mode 100644 index 0000000..da0a092 --- /dev/null +++ b/bindings/ocaml/.gitignore @@ -0,0 +1,6 @@ +ffi_stubgen.native +ffi_types_stubgen.native +setup.data +setup.log +test_bindings.native +_build diff --git a/bindings/ocaml/.merlin b/bindings/ocaml/.merlin new file mode 100644 index 0000000..565c762 --- /dev/null +++ b/bindings/ocaml/.merlin @@ -0,0 +1,3 @@ +S . +B ./_build +PKG ctypes ctypes.foreign \ No newline at end of file diff --git a/bindings/ocaml/META b/bindings/ocaml/META new file mode 100644 index 0000000..e00fdcb --- /dev/null +++ b/bindings/ocaml/META @@ -0,0 +1,12 @@ +# OASIS_START +# DO NOT EDIT (digest: 9d9362d9b53fea8a38e6075c4d45bb6a) +version = "0.1" +description = "Ctypes bindings to Keystone assembler for OCaml" +requires = "ctypes uchar ctypes.stubs ctypes.foreign result" +archive(byte) = "keystone.cma" +archive(byte, plugin) = "keystone.cma" +archive(native) = "keystone.cmxa" +archive(native, plugin) = "keystone.cmxs" +exists_if = "keystone.cmxa" +# OASIS_STOP + diff --git a/bindings/ocaml/Makefile b/bindings/ocaml/Makefile new file mode 100644 index 0000000..3639f14 --- /dev/null +++ b/bindings/ocaml/Makefile @@ -0,0 +1,41 @@ +# OASIS_START +# DO NOT EDIT (digest: a3c674b4239234cbbe53afe090018954) + +SETUP = ocaml setup.ml + +build: setup.data + $(SETUP) -build $(BUILDFLAGS) + +doc: setup.data build + $(SETUP) -doc $(DOCFLAGS) + +test: setup.data build + $(SETUP) -test $(TESTFLAGS) + +all: + $(SETUP) -all $(ALLFLAGS) + +install: setup.data + $(SETUP) -install $(INSTALLFLAGS) + +uninstall: setup.data + $(SETUP) -uninstall $(UNINSTALLFLAGS) + +reinstall: setup.data + $(SETUP) -reinstall $(REINSTALLFLAGS) + +clean: + $(SETUP) -clean $(CLEANFLAGS) + +distclean: + $(SETUP) -distclean $(DISTCLEANFLAGS) + +setup.data: + $(SETUP) -configure $(CONFIGUREFLAGS) + +configure: + $(SETUP) -configure $(CONFIGUREFLAGS) + +.PHONY: build doc test all install uninstall reinstall clean distclean configure + +# OASIS_STOP diff --git a/bindings/ocaml/README b/bindings/ocaml/README new file mode 100644 index 0000000..4c4ae42 --- /dev/null +++ b/bindings/ocaml/README @@ -0,0 +1,30 @@ +OCaml bindings to the Keystone library (www.keytone-engine.org) + +Make sure Keystone is built and installed. + +Requires OCaml (>= 4.01.0) and Opam (optionally Oasis) + +If Keystone was not installed in the default location then the +keystone_header_loc variable in config.ml needs to be set to the +correct location. The default location is +"/usr/local/include/keystone/keystone.h" + + +To Build: + +1. Install opam. Make sure to run eval `opam config env` to make sure + environment variables are set properly. + +2. Install necessary packages: + + opam install ctypes ctypes-foreign uchar result ocamlfind + +4. Run make + +5. Test the bindings by running ./test-bindings.native + +To rebuild the build files (make, configure etc) run oasis setup + +To install the bindings run make install + +To build documentation run make doc diff --git a/bindings/ocaml/_oasis b/bindings/ocaml/_oasis new file mode 100644 index 0000000..30e9ff2 --- /dev/null +++ b/bindings/ocaml/_oasis @@ -0,0 +1,50 @@ +OASISFormat: 0.4 +OCamlVersion: >= 4.01 +Name: keystone +Version: 0.1 +Synopsis: Ctypes bindings to Keystone assembler for OCaml +Authors: Aziem Chawdhary +License: LGPL-2.1 with OCaml linking exception +Plugins: DevFiles (0.4), META (0.4) +BuildTools: ocamlbuild + +Library keystone + FindLibName: keystone + Install: true + Path: . + Modules: Keystone, Ffi_generated, Ffi_types, Ffi_bindings, Ffi_generated_types + CSources: ffi_generated_stubs.c + CCLib: -lkeystone + CCOpt: -I $pkg_ctypes_stubs + BuildDepends: ctypes, uchar, ctypes.stubs, ctypes.foreign, result + CompiledObject: native + +Document keystone + Type: ocamlbuild (0.4) + Install: true + BuildTools : ocamldoc + Title: API reference for Keystone + XOCamlBuildPath: . + XOCamlBuildlibraries: keystone + +Executable ffi_types_stubgen + Install: false + Path: . + MainIs: ffi_types_stubgen.ml + BuildDepends: ctypes.stubs + CompiledObject: native + +Executable ffi_stubgen + Install: false + Path: . + MainIs: ffi_stubgen.ml + BuildDepends: ctypes.stubs, ctypes.foreign + CompiledObject : native + +Executable test_bindings + Install: false + CCLib: -lkeystone + Path: . + MainIs: test_bindings.ml + BuildDepends: keystone + CompiledObject: native diff --git a/bindings/ocaml/_tags b/bindings/ocaml/_tags new file mode 100644 index 0000000..cc23b78 --- /dev/null +++ b/bindings/ocaml/_tags @@ -0,0 +1,51 @@ +# OASIS_START +# DO NOT EDIT (digest: 56649e18999b9e9fdb9cc2eb938aa836) +# Ignore VCS directories, you can use the same kind of rule outside +# OASIS_START/STOP if you want to exclude directories that contains +# useless stuff for the build process +true: annot, bin_annot +<**/.svn>: -traverse +<**/.svn>: not_hygienic +".bzr": -traverse +".bzr": not_hygienic +".hg": -traverse +".hg": not_hygienic +".git": -traverse +".git": not_hygienic +"_darcs": -traverse +"_darcs": not_hygienic +# Library keystone +"keystone.cmxs": use_keystone +<*.ml{,i,y}>: oasis_library_keystone_ccopt +"ffi_generated_stubs.c": oasis_library_keystone_ccopt +"keystone.cmxa": oasis_library_keystone_cclib +"libkeystone_stubs.lib": oasis_library_keystone_cclib +"dllkeystone_stubs.dll": oasis_library_keystone_cclib +"libkeystone_stubs.a": oasis_library_keystone_cclib +"dllkeystone_stubs.so": oasis_library_keystone_cclib +"keystone.cmxa": use_libkeystone_stubs +"ffi_generated_stubs.c": package(ctypes) +"ffi_generated_stubs.c": package(ctypes.foreign) +"ffi_generated_stubs.c": package(ctypes.stubs) +"ffi_generated_stubs.c": package(result) +"ffi_generated_stubs.c": package(uchar) +# Executable ffi_types_stubgen +"ffi_types_stubgen.native": package(ctypes.stubs) +# Executable ffi_stubgen +"ffi_stubgen.native": package(ctypes.foreign) +"ffi_stubgen.native": package(ctypes.stubs) +# Executable test_bindings +"test_bindings.native": oasis_executable_test_bindings_cclib +"test_bindings.native": package(ctypes) +"test_bindings.native": package(ctypes.foreign) +"test_bindings.native": package(ctypes.stubs) +"test_bindings.native": package(result) +"test_bindings.native": package(uchar) +"test_bindings.native": use_keystone +<*.ml{,i,y}>: package(ctypes) +<*.ml{,i,y}>: package(ctypes.foreign) +<*.ml{,i,y}>: package(ctypes.stubs) +<*.ml{,i,y}>: package(result) +<*.ml{,i,y}>: package(uchar) +<*.ml{,i,y}>: use_keystone +# OASIS_STOP diff --git a/bindings/ocaml/config.ml b/bindings/ocaml/config.ml new file mode 100644 index 0000000..90eb252 --- /dev/null +++ b/bindings/ocaml/config.ml @@ -0,0 +1 @@ +let keystone_header_loc = "\"/usr/local/include/keystone/keystone.h\"" diff --git a/bindings/ocaml/configure b/bindings/ocaml/configure new file mode 100644 index 0000000..6acfaeb --- /dev/null +++ b/bindings/ocaml/configure @@ -0,0 +1,27 @@ +#!/bin/sh + +# OASIS_START +# DO NOT EDIT (digest: dc86c2ad450f91ca10c931b6045d0499) +set -e + +FST=true +for i in "$@"; do + if $FST; then + set -- + FST=false + fi + + case $i in + --*=*) + ARG=${i%%=*} + VAL=${i##*=} + set -- "$@" "$ARG" "$VAL" + ;; + *) + set -- "$@" "$i" + ;; + esac +done + +ocaml setup.ml -configure "$@" +# OASIS_STOP diff --git a/bindings/ocaml/ffi_bindings.ml b/bindings/ocaml/ffi_bindings.ml new file mode 100644 index 0000000..e9db3c6 --- /dev/null +++ b/bindings/ocaml/ffi_bindings.ml @@ -0,0 +1,30 @@ +open Ctypes + +module Bindings (F: Cstubs.FOREIGN) = + struct + + open F + + module T = Ffi_types.Types(Ffi_generated_types) + + let temp = Ffi_generated_types.constant "KS_MODE_BIG_ENDIAN" int64_t + + let ks_arch_supported_ = foreign "ks_arch_supported" (T.ks_arch @-> returning bool) + + let ks_version_ = foreign "ks_version" (ptr uint @-> ptr uint @-> returning uint) + + let ks_open_ = foreign "ks_open" (T.ks_arch @-> int64_t @-> (ptr (ptr T.ks_engine)) @-> returning T.ks_err) + + let ks_close_ = foreign "ks_close" (ptr T.ks_engine @-> returning int64_t) + + let ks_err_ = foreign "ks_errno" (ptr T.ks_engine @-> returning T.ks_err) + + let ks_option_ = foreign "ks_option" (ptr T.ks_engine @-> T.ks_opt_type @-> T.ks_opt_value @-> returning T.ks_err) + + let ks_strerror_ = foreign "ks_strerror" (T.ks_err @-> returning string) + + let ks_free_ = foreign "ks_free" (ptr void @-> returning void) + + let ks_asm_ = foreign "ks_asm" (ptr T.ks_engine @-> string @-> int64_t @-> ptr (ptr uchar) @-> ptr size_t @-> ptr size_t @-> returning int) + + end diff --git a/bindings/ocaml/ffi_stubgen.ml b/bindings/ocaml/ffi_stubgen.ml new file mode 100644 index 0000000..3a3d24e --- /dev/null +++ b/bindings/ocaml/ffi_stubgen.ml @@ -0,0 +1,16 @@ +let _ = + let prefix = "keystone_stub" in + let generate_ml, generate_c = ref false, ref false in + Arg.(parse [ ("-ml", Set generate_ml, "Generate ML"); + ("-c", Set generate_c, "Generate C") ]) + (fun _ -> failwith "unexpected anonymous argument") + "stubgen [-ml|-c]"; + match !generate_ml, !generate_c with + | false, false + | true, true -> + failwith "Exactly one of -ml and -c must be specified" + | true, false -> + Cstubs.write_ml Format.std_formatter ~prefix (module Ffi_bindings.Bindings) + | false, true -> + print_endline ("#include " ^ Config.keystone_header_loc); + Cstubs.write_c Format.std_formatter ~prefix (module Ffi_bindings.Bindings) diff --git a/bindings/ocaml/ffi_types.ml b/bindings/ocaml/ffi_types.ml new file mode 100644 index 0000000..82e13f9 --- /dev/null +++ b/bindings/ocaml/ffi_types.ml @@ -0,0 +1,533 @@ +open Ctypes + +module Types (F: Cstubs.Types.TYPE) = + struct + + open F + + type ks_struct + let ks_struct : ks_struct structure typ = structure "ks_struct" + + type ks_engine + let ks_engine = typedef ks_struct "ks_engine" + + type ks_t = ks_struct structure ptr + let ks_t : ks_struct structure ptr typ = ptr ks_engine + + (** Architecture type *) + type ks_arch = + | KS_ARCH_ARM + | KS_ARCH_ARM64 + | KS_ARCH_MIPS + | KS_ARCH_X86 + | KS_ARCH_PPC + | KS_ARCH_SPARC + | KS_ARCH_SYSTEMZ + | KS_ARCH_HEXAGON + | KS_ARCH_MAX + + + (** Error type: please refer to keystone.h for a full description. *) + type ks_error = + | KS_ERR_OK + | KS_ERR_NOMEM + | KS_ERR_ARCH + | KS_ERR_HANDLE + | KS_ERR_MODE + | KS_ERR_VERSION + | KS_ERR_OPT_INVALID + | KS_ERR_ASM_EXPR_TOKEN + | KS_ERR_ASM_DIRECTIVE_VALUE_RANGE + | KS_ERR_ASM_DIRECTIVE_ID + | KS_ERR_ASM_DIRECTIVE_TOKEN + | KS_ERR_ASM_DIRECTIVE_STR + | KS_ERR_ASM_DIRECTIVE_COMMA + | KS_ERR_ASM_DIRECTIVE_RELOC_NAME + | KS_ERR_ASM_DIRECTIVE_RELOC_TOKEN + | KS_ERR_ASM_DIRECTIVE_FPOINT + | KS_ERR_ASM_DIRECTIVE_UNKNOWN + | KS_ERR_ASM_VARIANT_INVALID + | KS_ERR_ASM_DIRECTIVE_EQU + | KS_ERR_ASM_EXPR_BRACKET + | KS_ERR_ASM_SYMBOL_MODIFIER + | KS_ERR_ASM_SYMBOL_REDEFINED + | KS_ERR_ASM_SYMBOL_MISSING + | KS_ERR_ASM_RPAREN + | KS_ERR_ASM_STAT_TOKEN + | KS_ERR_ASM_UNSUPPORTED + | KS_ERR_ASM_MACRO_TOKEN + | KS_ERR_ASM_MACRO_PAREN + | KS_ERR_ASM_MACRO_EQU + | KS_ERR_ASM_MACRO_ARGS + | KS_ERR_ASM_MACRO_LEVELS_EXCEED + | KS_ERR_ASM_MACRO_STR + | KS_ERR_ASM_ESC_BACKSLASH + | KS_ERR_ASM_ESC_OCTAL + | KS_ERR_ASM_ESC_SEQUENCE + | KS_ERR_ASM_ESC_STR + | KS_ERR_ASM_TOKEN_INVALID + | KS_ERR_ASM_INSN_UNSUPPORTED + | KS_ERR_ASM_FIXUP_INVALID + | KS_ERR_ASM_LABEL_INVALID + | KS_ERR_ASM_FRAGMENT_INVALID + | KS_ERR_ASM_INVALIDOPERAND + | KS_ERR_ASM_MISSINGFEATURE + | KS_ERR_ASM_MNEMONICFAIL + + let string_of_ks_error = function + | KS_ERR_OK -> "KS_ERR_OK" + | KS_ERR_NOMEM -> "KS_ERR_NOMEM" + | KS_ERR_ARCH -> "KS_ERR_ARCH" + | KS_ERR_HANDLE -> "KS_ERR_HANDLE" + | KS_ERR_MODE -> "KS_ERR_MODE" + | KS_ERR_VERSION -> "KS_ERR_VERSION" + | KS_ERR_OPT_INVALID -> "KS_ERR_OPT_INVALID" + | KS_ERR_ASM_EXPR_TOKEN -> "KS_ERR_ASM_EXPR_TOKEN" + | KS_ERR_ASM_DIRECTIVE_VALUE_RANGE -> "KS_ERR_ASM_DIRECTIVE_VALUE_RANGE" + | KS_ERR_ASM_DIRECTIVE_ID -> "KS_ERR_ASM_DIRECTIVE_ID" + | KS_ERR_ASM_DIRECTIVE_TOKEN -> "KS_ERR_ASM_DIRECTIVE_TOKEN" + | KS_ERR_ASM_DIRECTIVE_STR -> "KS_ERR_ASM_DIRECTIVE_STR" + | KS_ERR_ASM_DIRECTIVE_COMMA -> "KS_ERR_ASM_DIRECTIVE_COMMA" + | KS_ERR_ASM_DIRECTIVE_RELOC_NAME -> "KS_ERR_ASM_DIRECTIVE_RELOC_NAME" + | KS_ERR_ASM_DIRECTIVE_RELOC_TOKEN -> "KS_ERR_ASM_DIRECTIVE_RELOC_TOKEN" + | KS_ERR_ASM_DIRECTIVE_FPOINT -> "KS_ERR_ASM_DIRECTIVE_FPOINT" + | KS_ERR_ASM_DIRECTIVE_UNKNOWN -> "KS_ERR_ASM_DIRECTIVE_UNKNOWN" + | KS_ERR_ASM_VARIANT_INVALID -> "KS_ERR_ASM_VARIANT_INVALID" + | KS_ERR_ASM_DIRECTIVE_EQU -> "KS_ERR_ASM_DIRECTIVE_EQU" + | KS_ERR_ASM_EXPR_BRACKET -> "KS_ERR_ASM_EXPR_BRACKET" + | KS_ERR_ASM_SYMBOL_MODIFIER -> "KS_ERR_ASM_SYMBOL_MODIFIER" + | KS_ERR_ASM_SYMBOL_REDEFINED -> "KS_ERR_ASM_SYMBOL_REDEFINED" + | KS_ERR_ASM_SYMBOL_MISSING -> "KS_ERR_ASM_SYMBOL_MISSING" + | KS_ERR_ASM_RPAREN -> "KS_ERR_ASM_RPAREN" + | KS_ERR_ASM_STAT_TOKEN -> "KS_ERR_ASM_STAT_TOKEN" + | KS_ERR_ASM_UNSUPPORTED -> "KS_ERR_ASM_UNSUPPORTED" + | KS_ERR_ASM_MACRO_TOKEN -> "KS_ERR_ASM_MACRO_TOKEN" + | KS_ERR_ASM_MACRO_PAREN -> "KS_ERR_ASM_MACRO_PAREN" + | KS_ERR_ASM_MACRO_EQU -> "KS_ERR_ASM_MACRO_EQU" + | KS_ERR_ASM_MACRO_ARGS -> "KS_ERR_ASM_MACRO_ARGS" + | KS_ERR_ASM_MACRO_LEVELS_EXCEED -> "KS_ERR_ASM_MACRO_LEVELS_EXCEED" + | KS_ERR_ASM_MACRO_STR -> "KS_ERR_ASM_MACRO_STR" + | KS_ERR_ASM_ESC_BACKSLASH -> "KS_ERR_ASM_ESC_BACKSLASH" + | KS_ERR_ASM_ESC_OCTAL -> "KS_ERR_ASM_ESC_OCTAL" + | KS_ERR_ASM_ESC_SEQUENCE -> "KS_ERR_ASM_ESC_SEQUENCE" + | KS_ERR_ASM_ESC_STR -> "KS_ERR_ASM_ESC_STR " + | KS_ERR_ASM_TOKEN_INVALID -> "KS_ERR_ASM_TOKEN_INVALID" + | KS_ERR_ASM_INSN_UNSUPPORTED -> "KS_ERR_ASM_INSN_UNSUPPORTED" + | KS_ERR_ASM_FIXUP_INVALID -> "KS_ERR_ASM_FIXUP_INVALID " + | KS_ERR_ASM_LABEL_INVALID -> "KS_ERR_ASM_LABEL_INVALID " + | KS_ERR_ASM_FRAGMENT_INVALID -> "KS_ERR_ASM_FRAGMENT_INVALID" + | KS_ERR_ASM_INVALIDOPERAND -> "KS_ERR_ASM_INVALIDOPERAND" + | KS_ERR_ASM_MISSINGFEATURE -> "KS_ERR_ASM_MISSINGFEATURE" + | KS_ERR_ASM_MNEMONICFAIL -> "KS_ERR_ASM_MNEMONICFAIL " + + + let ks_err_ok = constant "KS_ERR_OK" int64_t + let ks_err_nomem = constant "KS_ERR_NOMEM" int64_t + let ks_err_arch = constant "KS_ERR_ARCH" int64_t + let ks_err_handle = constant "KS_ERR_HANDLE" int64_t + let ks_err_mode = constant "KS_ERR_MODE" int64_t + let ks_err_version = constant "KS_ERR_VERSION" int64_t + let ks_err_opt_invalid = constant "KS_ERR_OPT_INVALID" int64_t + let ks_err_asm_expr_token = constant "KS_ERR_ASM_EXPR_TOKEN" int64_t + let ks_err_asm_directive_value_range = constant "KS_ERR_ASM_DIRECTIVE_VALUE_RANGE" int64_t + let ks_err_asm_directive_id = constant "KS_ERR_ASM_DIRECTIVE_ID" int64_t + let ks_err_asm_directive_token = constant "KS_ERR_ASM_DIRECTIVE_TOKEN" int64_t + let ks_err_asm_directive_str = constant "KS_ERR_ASM_DIRECTIVE_STR" int64_t + let ks_err_asm_directive_comma = constant "KS_ERR_ASM_DIRECTIVE_COMMA" int64_t + let ks_err_asm_directive_reloc_name = constant "KS_ERR_ASM_DIRECTIVE_RELOC_NAME" int64_t + let ks_err_asm_directive_reloc_token = constant "KS_ERR_ASM_DIRECTIVE_RELOC_TOKEN" int64_t + let ks_err_asm_directive_fpoint = constant "KS_ERR_ASM_DIRECTIVE_FPOINT" int64_t + let ks_err_asm_directive_unknown = constant "KS_ERR_ASM_DIRECTIVE_UNKNOWN" int64_t + let ks_err_asm_variant_invalid = constant "KS_ERR_ASM_VARIANT_INVALID" int64_t + let ks_err_asm_directive_equ = constant "KS_ERR_ASM_DIRECTIVE_EQU" int64_t + let ks_err_asm_expr_bracket = constant "KS_ERR_ASM_EXPR_BRACKET" int64_t + let ks_err_asm_symbol_modifier = constant "KS_ERR_ASM_SYMBOL_MODIFIER" int64_t + let ks_err_asm_symbol_redefined = constant "KS_ERR_ASM_SYMBOL_REDEFINED" int64_t + let ks_err_asm_symbol_missing = constant "KS_ERR_ASM_SYMBOL_MISSING" int64_t + let ks_err_asm_rparen = constant "KS_ERR_ASM_RPAREN" int64_t + let ks_err_asm_stat_token = constant "KS_ERR_ASM_STAT_TOKEN" int64_t + let ks_err_asm_unsupported = constant "KS_ERR_ASM_UNSUPPORTED" int64_t + let ks_err_asm_macro_token = constant "KS_ERR_ASM_MACRO_TOKEN" int64_t + let ks_err_asm_macro_paren = constant "KS_ERR_ASM_MACRO_PAREN" int64_t + let ks_err_asm_macro_equ = constant "KS_ERR_ASM_MACRO_EQU" int64_t + let ks_err_asm_macro_args = constant "KS_ERR_ASM_MACRO_ARGS" int64_t + let ks_err_asm_macro_levels_exceed = constant "KS_ERR_ASM_MACRO_LEVELS_EXCEED" int64_t + let ks_err_asm_macro_str = constant "KS_ERR_ASM_MACRO_STR" int64_t + let ks_err_asm_esc_backslash = constant "KS_ERR_ASM_ESC_BACKSLASH" int64_t + let ks_err_asm_esc_octal = constant "KS_ERR_ASM_ESC_OCTAL" int64_t + let ks_err_asm_esc_sequence = constant "KS_ERR_ASM_ESC_SEQUENCE" int64_t + let ks_err_asm_esc_str = constant "KS_ERR_ASM_ESC_STR" int64_t + let ks_err_asm_token_invalid = constant "KS_ERR_ASM_TOKEN_INVALID" int64_t + let ks_err_asm_insn_unsupported = constant "KS_ERR_ASM_INSN_UNSUPPORTED" int64_t + let ks_err_asm_fixup_invalid = constant "KS_ERR_ASM_FIXUP_INVALID" int64_t + let ks_err_asm_label_invalid = constant "KS_ERR_ASM_LABEL_INVALID" int64_t + let ks_err_asm_fragment_invalid = constant "KS_ERR_ASM_FRAGMENT_INVALID" int64_t + let ks_err_asm_invalidoperand = constant "KS_ERR_ASM_INVALIDOPERAND" int64_t + let ks_err_asm_missingfeature = constant "KS_ERR_ASM_MISSINGFEATURE" int64_t + let ks_err_asm_mnemonicfail = constant "KS_ERR_ASM_MNEMONICFAIL" int64_t + + let ks_err = enum "ks_err" [ + KS_ERR_OK, ks_err_ok; + KS_ERR_NOMEM, ks_err_nomem; + KS_ERR_ARCH, ks_err_arch; + KS_ERR_HANDLE, ks_err_handle; + KS_ERR_MODE, ks_err_mode; + KS_ERR_VERSION, ks_err_version; + KS_ERR_OPT_INVALID, ks_err_opt_invalid; + KS_ERR_ASM_EXPR_TOKEN, ks_err_asm_expr_token; + KS_ERR_ASM_DIRECTIVE_VALUE_RANGE, ks_err_asm_directive_value_range; + KS_ERR_ASM_DIRECTIVE_ID, ks_err_asm_directive_id; + KS_ERR_ASM_DIRECTIVE_TOKEN, ks_err_asm_directive_token; + KS_ERR_ASM_DIRECTIVE_STR, ks_err_asm_directive_str; + KS_ERR_ASM_DIRECTIVE_COMMA, ks_err_asm_directive_comma; + KS_ERR_ASM_DIRECTIVE_RELOC_NAME, ks_err_asm_directive_reloc_name; + KS_ERR_ASM_DIRECTIVE_RELOC_TOKEN, ks_err_asm_directive_reloc_token; + KS_ERR_ASM_DIRECTIVE_FPOINT, ks_err_asm_directive_fpoint; + KS_ERR_ASM_DIRECTIVE_UNKNOWN, ks_err_asm_directive_unknown; + KS_ERR_ASM_VARIANT_INVALID, ks_err_asm_variant_invalid; + KS_ERR_ASM_DIRECTIVE_EQU, ks_err_asm_directive_equ; + KS_ERR_ASM_EXPR_BRACKET, ks_err_asm_expr_bracket; + KS_ERR_ASM_SYMBOL_MODIFIER, ks_err_asm_symbol_modifier; + KS_ERR_ASM_SYMBOL_REDEFINED, ks_err_asm_symbol_redefined; + KS_ERR_ASM_SYMBOL_MISSING, ks_err_asm_symbol_missing; + KS_ERR_ASM_RPAREN, ks_err_asm_rparen; + KS_ERR_ASM_STAT_TOKEN, ks_err_asm_stat_token; + KS_ERR_ASM_UNSUPPORTED, ks_err_asm_unsupported; + KS_ERR_ASM_MACRO_TOKEN, ks_err_asm_macro_token; + KS_ERR_ASM_MACRO_PAREN, ks_err_asm_macro_paren; + KS_ERR_ASM_MACRO_EQU, ks_err_asm_macro_equ; + KS_ERR_ASM_MACRO_ARGS, ks_err_asm_macro_args; + KS_ERR_ASM_MACRO_LEVELS_EXCEED, ks_err_asm_macro_levels_exceed; + KS_ERR_ASM_MACRO_STR, ks_err_asm_macro_str; + KS_ERR_ASM_ESC_BACKSLASH, ks_err_asm_esc_backslash; + KS_ERR_ASM_ESC_OCTAL, ks_err_asm_esc_octal; + KS_ERR_ASM_ESC_SEQUENCE, ks_err_asm_esc_sequence; + KS_ERR_ASM_ESC_STR , ks_err_asm_esc_str ; + KS_ERR_ASM_TOKEN_INVALID, ks_err_asm_token_invalid; + KS_ERR_ASM_INSN_UNSUPPORTED, ks_err_asm_insn_unsupported; + KS_ERR_ASM_FIXUP_INVALID , ks_err_asm_fixup_invalid ; + KS_ERR_ASM_LABEL_INVALID , ks_err_asm_label_invalid ; + KS_ERR_ASM_FRAGMENT_INVALID, ks_err_asm_fragment_invalid; + KS_ERR_ASM_INVALIDOPERAND, ks_err_asm_invalidoperand; + KS_ERR_ASM_MISSINGFEATURE, ks_err_asm_missingfeature; + KS_ERR_ASM_MNEMONICFAIL , ks_err_asm_mnemonicfail + ] + + let ks_arch_arm = constant "KS_ARCH_ARM" int64_t + let ks_arch_arm64 = constant "KS_ARCH_ARM64" int64_t + let ks_arch_mips = constant "KS_ARCH_MIPS" int64_t + let ks_arch_x86 = constant "KS_ARCH_X86" int64_t + let ks_arch_ppc = constant "KS_ARCH_PPC" int64_t + let ks_arch_sparc = constant "KS_ARCH_SPARC" int64_t + let ks_arch_systemz = constant "KS_ARCH_SYSTEMZ" int64_t + let ks_arch_hexagon = constant "KS_ARCH_HEXAGON" int64_t + let ks_arch_max = constant "KS_ARCH_MAX" int64_t + + let ks_arch = enum "ks_arch" [ + KS_ARCH_ARM, ks_arch_arm; + KS_ARCH_ARM64, ks_arch_arm64; + KS_ARCH_MIPS, ks_arch_mips; + KS_ARCH_X86, ks_arch_x86; + KS_ARCH_PPC, ks_arch_ppc; + KS_ARCH_SPARC, ks_arch_sparc; + KS_ARCH_SYSTEMZ, ks_arch_systemz; + KS_ARCH_HEXAGON, ks_arch_hexagon; + KS_ARCH_MAX, ks_arch_max + ] + + + let ks_api_major = constant "KS_API_MAJOR" int + let ks_api_minor = constant "KS_API_MINOR" int + + (** Mode type: refer to keystone.h for a full description *) + type ks_mode = + | KS_MODE_ARM + | KS_MODE_BIG_ENDIAN + | KS_MODE_LITTLE_ENDIAN + | KS_MODE_THUMB + | KS_MODE_V8 + | KS_MODE_MICRO + | KS_MODE_MIPS3 + | KS_MODE_MIPS32R6 + | KS_MODE_MIPS32 + | KS_MODE_MIPS64 + | KS_MODE_16 + | KS_MODE_32 + | KS_MODE_64 + | KS_MODE_PPC32 + | KS_MODE_PPC64 + | KS_MODE_QPX + | KS_MODE_SPARC32 + | KS_MODE_SPARC64 + | KS_MODE_V9 + + + + let string_of_ks_mode = function + | KS_MODE_ARM -> "KS_MODE_ARM" + | KS_MODE_BIG_ENDIAN -> "KS_MODE_BIG_ENDIAN" + | KS_MODE_LITTLE_ENDIAN -> "KS_MODE_LITTLE_ENDIAN" + | KS_MODE_THUMB -> "KS_MODE_THUMB" + | KS_MODE_V8 -> "KS_MODE_V8" + | KS_MODE_MICRO -> "KS_MODE_MICRO" + | KS_MODE_MIPS3 -> "KS_MODE_MIPS3" + | KS_MODE_MIPS32R6 -> "KS_MODE_MIPS32R6" + | KS_MODE_MIPS32 -> "KS_MODE_MIPS32" + | KS_MODE_MIPS64 -> "KS_MODE_MIPS64" + | KS_MODE_16 -> "KS_MODE_16" + | KS_MODE_32 -> "KS_MODE_32" + | KS_MODE_64 -> "KS_MODE_64" + | KS_MODE_PPC32 -> "KS_MODE_PPC32" + | KS_MODE_PPC64 -> "KS_MODE_PPC64" + | KS_MODE_QPX -> "KS_MODE_QPX" + | KS_MODE_SPARC32 -> "KS_MODE_SPARC32" + | KS_MODE_SPARC64 -> "KS_MODE_SPARC64" + | KS_MODE_V9 -> "KS_MODE_V9" + + + + + + let ks_mode_little_endian = constant "KS_MODE_LITTLE_ENDIAN" int64_t + let ks_mode_big_endian = constant "KS_MODE_BIG_ENDIAN" int64_t + let ks_mode_arm = constant "KS_MODE_ARM" int64_t + + let ks_mode_thumb = constant "KS_MODE_THUMB" int64_t + + let ks_mode_v8 = constant "KS_MODE_V8" int64_t + let ks_mode_micro = constant "KS_MODE_MICRO" int64_t + let ks_mode_mips3 = constant "KS_MODE_MIPS3" int64_t + let ks_mode_mips32r6 = constant "KS_MODE_MIPS32R6" int64_t + let ks_mode_mips32 = constant "KS_MODE_MIPS32" int64_t + let ks_mode_mips64 = constant "KS_MODE_MIPS64" int64_t + let ks_mode_16 = constant "KS_MODE_16" int64_t + let ks_mode_32 = constant "KS_MODE_32" int64_t + let ks_mode_64 = constant "KS_MODE_64" int64_t + let ks_mode_ppc32 = constant "KS_MODE_PPC32" int64_t + let ks_mode_ppc64 = constant "KS_MODE_PPC64" int64_t + let ks_mode_qpx = constant "KS_MODE_QPX" int64_t + let ks_mode_sparc32 = constant "KS_MODE_SPARC32" int64_t + let ks_mode_sparc64 = constant "KS_MODE_SPARC64" int64_t + let ks_mode_v9 = constant "KS_MODE_V9" int64_t + + let ks_mode = enum "ks_mode" [ + (*KS_MODE_LITTLE_ENDIAN, ks_mode_little_endian; + KS_MODE_BIG_ENDIAN, ks_mode_big_endian;*) + KS_MODE_ARM, ks_mode_arm; + KS_MODE_THUMB, ks_mode_thumb; + KS_MODE_V8, ks_mode_v8; + KS_MODE_MICRO, ks_mode_micro; + KS_MODE_MIPS3, ks_mode_mips3; + KS_MODE_MIPS32R6,ks_mode_mips32r6; + KS_MODE_MIPS32, ks_mode_mips32; + KS_MODE_MIPS64, ks_mode_mips64; + KS_MODE_16, ks_mode_16; + KS_MODE_32, ks_mode_32; + KS_MODE_64, ks_mode_64; + KS_MODE_PPC32, ks_mode_ppc32; + KS_MODE_PPC64, ks_mode_ppc64; + KS_MODE_QPX, ks_mode_qpx; + KS_MODE_SPARC32, ks_mode_sparc32; + KS_MODE_SPARC64, ks_mode_sparc64; + KS_MODE_V9, ks_mode_v9; + ] + + + type ks_opt_type = + | KS_OPT_SYNTAX + + let ks_opt_syntax_ = constant "KS_OPT_SYNTAX" int64_t + + let ks_opt_type = enum "ks_opt_type" [ + KS_OPT_SYNTAX, ks_opt_syntax_; + ] + + (** Runtime option value: refer to keystone.h for a full description *) + type ks_opt_value = + | KS_OPT_SYNTAX_INTEL + | KS_OPT_SYNTAX_ATT + | KS_OPT_SYNTAX_NASM + | KS_OPT_SYNTAX_MASM + | KS_OPT_SYNTAX_GAS + | KS_OPT_SYNTAX_RADIX16 + + + let ks_opt_syntax_intel = constant "KS_OPT_SYNTAX_INTEL" int64_t + let ks_opt_syntax_att = constant "KS_OPT_SYNTAX_ATT" int64_t + let ks_opt_syntax_nasm = constant "KS_OPT_SYNTAX_NASM" int64_t + let ks_opt_syntax_masm = constant "KS_OPT_SYNTAX_MASM" int64_t + let ks_opt_syntax_gas = constant "KS_OPT_SYNTAX_GAS" int64_t + let ks_opt_syntax_radix16 = constant "KS_OPT_SYNTAX_RADIX16" int64_t + + let ks_opt_value = enum "ks_opt_value" [ + KS_OPT_SYNTAX_INTEL, ks_opt_syntax_intel; + KS_OPT_SYNTAX_ATT, ks_opt_syntax_att; + KS_OPT_SYNTAX_NASM, ks_opt_syntax_nasm; + KS_OPT_SYNTAX_MASM, ks_opt_syntax_masm; + KS_OPT_SYNTAX_GAS, ks_opt_syntax_gas; + KS_OPT_SYNTAX_RADIX16, ks_opt_syntax_radix16 + ] + + + module X86 = + struct + type ks_err_asm_x86 = + | KS_ERR_ASM_X86_INVALIDOPERAND + | KS_ERR_ASM_X86_MISSINGFEATURE + | KS_ERR_ASM_X86_MNEMONICFAIL + + let ks_err_asm_x86_invalidoperand = constant "KS_ERR_ASM_X86_INVALIDOPERAND" int64_t + let ks_err_asm_x86_missingfeature = constant "KS_ERR_ASM_X86_MISSINGFEATURE" int64_t + let ks_err_asm_x86_mnemoicfail = constant "KS_ERR_ASM_X86_MNEMONICFAIL" int64_t + + let ks_err_asm_x86 = enum "ks_err_asm_x86" [ + KS_ERR_ASM_X86_INVALIDOPERAND, ks_err_asm_x86_invalidoperand; + KS_ERR_ASM_X86_MISSINGFEATURE, ks_err_asm_x86_missingfeature; + KS_ERR_ASM_X86_MNEMONICFAIL, ks_err_asm_x86_mnemoicfail; + ] + end + + module ARM64 = + struct + type ks_err_asm_arm64 = + | KS_ERR_ASM_ARM64_INVALIDOPERAND + | KS_ERR_ASM_ARM64_MISSINGFEATURE + | KS_ERR_ASM_ARM64_MNEMONICFAIL + + + let ks_err_asm_arm64_invalidoperand = constant "KS_ERR_ASM_ARM64_INVALIDOPERAND" int64_t + let ks_err_asm_arm64_missingfeature = constant "KS_ERR_ASM_ARM64_MISSINGFEATURE" int64_t + let ks_err_asm_arm64_mnemonicfail = constant "KS_ERR_ASM_ARM64_MNEMONICFAIL" int64_t + + let ks_err_asm_arm64 = enum "ks_err_asm_arm64" [ + KS_ERR_ASM_ARM64_INVALIDOPERAND, ks_err_asm_arm64_invalidoperand; + KS_ERR_ASM_ARM64_MISSINGFEATURE, ks_err_asm_arm64_missingfeature; + KS_ERR_ASM_ARM64_MNEMONICFAIL, ks_err_asm_arm64_mnemonicfail; + ] + end + + module ARM = + struct + type ks_err_asm_arm = + | KS_ERR_ASM_ARM_INVALIDOPERAND + | KS_ERR_ASM_ARM_MISSINGFEATURE + | KS_ERR_ASM_ARM_MNEMONICFAIL + + + let ks_err_asm_arm_invalidoperand = constant "KS_ERR_ASM_ARM_INVALIDOPERAND" int64_t + let ks_err_asm_arm_missingfeature = constant "KS_ERR_ASM_ARM_MISSINGFEATURE" int64_t + let ks_err_asm_arm_mnemonicfail = constant "KS_ERR_ASM_ARM_MNEMONICFAIL" int64_t + + let ks_err_asm_arm = enum "ks_err_asm_arm" [ + KS_ERR_ASM_ARM_INVALIDOPERAND, ks_err_asm_arm_invalidoperand; + KS_ERR_ASM_ARM_MISSINGFEATURE, ks_err_asm_arm_missingfeature; + KS_ERR_ASM_ARM_MNEMONICFAIL, ks_err_asm_arm_mnemonicfail; + ] + end + + module HEXAGON = + struct + type ks_err_asm_hexagon = + | KS_ERR_ASM_HEXAGON_INVALIDOPERAND + | KS_ERR_ASM_HEXAGON_MISSINGFEATURE + | KS_ERR_ASM_HEXAGON_MNEMONICFAIL + + + let ks_err_asm_hexagon_invalidoperand = constant "KS_ERR_ASM_HEXAGON_INVALIDOPERAND" int64_t + let ks_err_asm_hexagon_missingfeature = constant "KS_ERR_ASM_HEXAGON_MISSINGFEATURE" int64_t + let ks_err_asm_hexagon_mnemonicfail = constant "KS_ERR_ASM_HEXAGON_MNEMONICFAIL" int64_t + + let ks_err_asm_hexagon = enum "ks_err_asm_hexagon" [ + KS_ERR_ASM_HEXAGON_INVALIDOPERAND, ks_err_asm_hexagon_invalidoperand; + KS_ERR_ASM_HEXAGON_MISSINGFEATURE, ks_err_asm_hexagon_missingfeature; + KS_ERR_ASM_HEXAGON_MNEMONICFAIL, ks_err_asm_hexagon_mnemonicfail; + ] + end + + + module MIPS = + struct + type ks_err_asm_mips = + | KS_ERR_ASM_MIPS_INVALIDOPERAND + | KS_ERR_ASM_MIPS_MISSINGFEATURE + | KS_ERR_ASM_MIPS_MNEMONICFAIL + + + let ks_err_asm_mips_invalidoperand = constant "KS_ERR_ASM_MIPS_INVALIDOPERAND" int64_t + let ks_err_asm_mips_missingfeature = constant "KS_ERR_ASM_MIPS_MISSINGFEATURE" int64_t + let ks_err_asm_mips_mnemonicfail = constant "KS_ERR_ASM_MIPS_MNEMONICFAIL" int64_t + + let ks_err_asm_mips = enum "ks_err_asm_mips" [ + KS_ERR_ASM_MIPS_INVALIDOPERAND, ks_err_asm_mips_invalidoperand; + KS_ERR_ASM_MIPS_MISSINGFEATURE, ks_err_asm_mips_missingfeature; + KS_ERR_ASM_MIPS_MNEMONICFAIL, ks_err_asm_mips_mnemonicfail; + ] + end + + + + module PPC = + struct + type ks_err_asm_ppc = + | KS_ERR_ASM_PPC_INVALIDOPERAND + | KS_ERR_ASM_PPC_MISSINGFEATURE + | KS_ERR_ASM_PPC_MNEMONICFAIL + + + let ks_err_asm_ppc_invalidoperand = constant "KS_ERR_ASM_PPC_INVALIDOPERAND" int64_t + let ks_err_asm_ppc_missingfeature = constant "KS_ERR_ASM_PPC_MISSINGFEATURE" int64_t + let ks_err_asm_ppc_mnemonicfail = constant "KS_ERR_ASM_PPC_MNEMONICFAIL" int64_t + + let ks_err_asm_ppc = enum "ks_err_asm_ppc" [ + KS_ERR_ASM_PPC_INVALIDOPERAND, ks_err_asm_ppc_invalidoperand; + KS_ERR_ASM_PPC_MISSINGFEATURE, ks_err_asm_ppc_missingfeature; + KS_ERR_ASM_PPC_MNEMONICFAIL, ks_err_asm_ppc_mnemonicfail; + ] + end + + + module SPARC = + struct + type ks_err_asm_sparc = + | KS_ERR_ASM_SPARC_INVALIDOPERAND + | KS_ERR_ASM_SPARC_MISSINGFEATURE + | KS_ERR_ASM_SPARC_MNEMONICFAIL + + + let ks_err_asm_sparc_invalidoperand = constant "KS_ERR_ASM_SPARC_INVALIDOPERAND" int64_t + let ks_err_asm_sparc_missingfeature = constant "KS_ERR_ASM_SPARC_MISSINGFEATURE" int64_t + let ks_err_asm_sparc_mnemonicfail = constant "KS_ERR_ASM_SPARC_MNEMONICFAIL" int64_t + + let ks_err_asm_sparc = enum "ks_err_asm_sparc" [ + KS_ERR_ASM_SPARC_INVALIDOPERAND, ks_err_asm_sparc_invalidoperand; + KS_ERR_ASM_SPARC_MISSINGFEATURE, ks_err_asm_sparc_missingfeature; + KS_ERR_ASM_SPARC_MNEMONICFAIL, ks_err_asm_sparc_mnemonicfail; + ] + end + + module SYSTEMZ = + struct + type ks_err_asm_systemz = + | KS_ERR_ASM_SYSTEMZ_INVALIDOPERAND + | KS_ERR_ASM_SYSTEMZ_MISSINGFEATURE + | KS_ERR_ASM_SYSTEMZ_MNEMONICFAIL + + + let ks_err_asm_systemz_invalidoperand = constant "KS_ERR_ASM_SYSTEMZ_INVALIDOPERAND" int64_t + let ks_err_asm_systemz_missingfeature = constant "KS_ERR_ASM_SYSTEMZ_MISSINGFEATURE" int64_t + let ks_err_asm_systemz_mnemonicfail = constant "KS_ERR_ASM_SYSTEMZ_MNEMONICFAIL" int64_t + + let ks_err_asm_systemz = enum "ks_err_asm_systemz" [ + KS_ERR_ASM_SYSTEMZ_INVALIDOPERAND, ks_err_asm_systemz_invalidoperand; + KS_ERR_ASM_SYSTEMZ_MISSINGFEATURE, ks_err_asm_systemz_missingfeature; + KS_ERR_ASM_SYSTEMZ_MNEMONICFAIL, ks_err_asm_systemz_mnemonicfail; + ] + end + + + + + + + + end diff --git a/bindings/ocaml/ffi_types_stubgen.ml b/bindings/ocaml/ffi_types_stubgen.ml new file mode 100644 index 0000000..76a0f66 --- /dev/null +++ b/bindings/ocaml/ffi_types_stubgen.ml @@ -0,0 +1,3 @@ +let () = + print_endline ("#include " ^ Config.keystone_header_loc); + Cstubs.Types.write_c Format.std_formatter (module Ffi_types.Types) diff --git a/bindings/ocaml/keystone.ml b/bindings/ocaml/keystone.ml new file mode 100644 index 0000000..a64af86 --- /dev/null +++ b/bindings/ocaml/keystone.ml @@ -0,0 +1,82 @@ +open Ctypes +open Foreign + +module B = Ffi_bindings.Bindings(Ffi_generated) +module Types = B.T + +type encoded_result = + { + encoding: int array; + encoding_size : int; + stat_count : int; + } + +let ks_arch_supported arch = + B.ks_arch_supported_ arch + +let ks_version major minor = + let major = Unsigned.UInt.of_int major in + let minor = Unsigned.UInt.of_int minor in + let u = B.ks_version_ (allocate uint major) (allocate uint minor) in + Unsigned.UInt.to_int u + +(* TODO: better handling of error value *) +let ks_option engine opttype optvalue = + match opttype with + | Types.KS_OPT_SYNTAX -> B.ks_option_ engine Types.KS_OPT_SYNTAX optvalue + +let ks_strerror err = + B.ks_strerror_ err + +let ks_open arch ?(endian=Types.KS_MODE_LITTLE_ENDIAN) mode = + let check_endian = + match endian with + | Types.KS_MODE_BIG_ENDIAN -> + begin + let m = Ffi_generated_types.constant (Types.string_of_ks_mode Types.KS_MODE_BIG_ENDIAN) int64_t in + let m' = Ffi_generated_types.constant (Types.string_of_ks_mode mode) int64_t in + Result.Ok(Int64.add m m') + + end + | Types.KS_MODE_LITTLE_ENDIAN -> Result.Ok(Ffi_generated_types.constant (Types.string_of_ks_mode mode) int64_t) + | _ -> Result.Error("Non-endian mode passed to endian arg of ks_open: use KS_MODE_BIG_ENDIAN or KS_MODE_LITTLE_ENDIAN") + in + let mode = + match check_endian with + | Result.Ok a -> a + | Result.Error e -> failwith e + in + let engine = allocate_n ~count:1 ((ptr Types.ks_engine)) in + + match (B.ks_open_ arch mode engine) with + | Types.KS_ERR_OK -> Result.Ok(!@ engine) + | _ as err -> Result.Error(ks_strerror err) + + +let ks_close engine = B.ks_close_ engine + +let ks_errno engine = B.ks_err_ engine + + +let ks_asm engine str addr = + let addr' = Int64.of_int addr in + let encoding = allocate_n ~count:1 (ptr uchar) in + let encoding_size = allocate size_t (Unsigned.Size_t.of_int 0) in + let stat_count = allocate size_t (Unsigned.Size_t.of_int 0) in + match (B.ks_asm_ engine str addr' encoding encoding_size stat_count) with + | 0 -> begin + let iencoding_size = Unsigned.Size_t.to_int (!@ encoding_size) in + let istat_count = Unsigned.Size_t.to_int (!@ stat_count) in + let encodedasm = + CArray.from_ptr (!@ encoding) (Unsigned.Size_t.to_int (!@ encoding_size)) + |> CArray.to_list |> Array.of_list (* No map in CArray *) + |> Array.map (fun c -> Unsigned.UChar.to_int c) + in + B.ks_free_ (to_voidp (!@ encoding)); + Result.Ok({encoding = encodedasm; encoding_size = iencoding_size; stat_count = istat_count}) + end + | _ -> let err = ks_errno engine |> ks_strerror in + Result.Error err + +let asm_array_to_string a = + Array.fold_left (fun str c -> let t = Printf.sprintf "%02x " c in str^t) "" a diff --git a/bindings/ocaml/keystone.mldylib b/bindings/ocaml/keystone.mldylib new file mode 100644 index 0000000..b6dd06f --- /dev/null +++ b/bindings/ocaml/keystone.mldylib @@ -0,0 +1,8 @@ +# OASIS_START +# DO NOT EDIT (digest: 245ae3e4b1018fbf4a40ba68d8f67205) +Keystone +Ffi_generated +Ffi_types +Ffi_bindings +Ffi_generated_types +# OASIS_STOP diff --git a/bindings/ocaml/keystone.mli b/bindings/ocaml/keystone.mli new file mode 100644 index 0000000..b4991fb --- /dev/null +++ b/bindings/ocaml/keystone.mli @@ -0,0 +1,166 @@ +(** Module proving OCaml bindings to the Keystone assembler engine *) + + +module Types : sig + (** Type definitions for Keystone *) + + (** Keystone engine type *) + type ks_t + + (** Keystone Architecture. Please see keystone.h for a full description. *) + type ks_arch = + | KS_ARCH_ARM + | KS_ARCH_ARM64 + | KS_ARCH_MIPS + | KS_ARCH_X86 + | KS_ARCH_PPC + | KS_ARCH_SPARC + | KS_ARCH_SYSTEMZ + | KS_ARCH_HEXAGON + | KS_ARCH_MAX + + (** Keystone error types. Please see keystone.h for a full description. *) + type ks_error = + | KS_ERR_OK + | KS_ERR_NOMEM + | KS_ERR_ARCH + | KS_ERR_HANDLE + | KS_ERR_MODE + | KS_ERR_VERSION + | KS_ERR_OPT_INVALID + | KS_ERR_ASM_EXPR_TOKEN + | KS_ERR_ASM_DIRECTIVE_VALUE_RANGE + | KS_ERR_ASM_DIRECTIVE_ID + | KS_ERR_ASM_DIRECTIVE_TOKEN + | KS_ERR_ASM_DIRECTIVE_STR + | KS_ERR_ASM_DIRECTIVE_COMMA + | KS_ERR_ASM_DIRECTIVE_RELOC_NAME + | KS_ERR_ASM_DIRECTIVE_RELOC_TOKEN + | KS_ERR_ASM_DIRECTIVE_FPOINT + | KS_ERR_ASM_DIRECTIVE_UNKNOWN + | KS_ERR_ASM_VARIANT_INVALID + | KS_ERR_ASM_DIRECTIVE_EQU + | KS_ERR_ASM_EXPR_BRACKET + | KS_ERR_ASM_SYMBOL_MODIFIER + | KS_ERR_ASM_SYMBOL_REDEFINED + | KS_ERR_ASM_SYMBOL_MISSING + | KS_ERR_ASM_RPAREN + | KS_ERR_ASM_STAT_TOKEN + | KS_ERR_ASM_UNSUPPORTED + | KS_ERR_ASM_MACRO_TOKEN + | KS_ERR_ASM_MACRO_PAREN + | KS_ERR_ASM_MACRO_EQU + | KS_ERR_ASM_MACRO_ARGS + | KS_ERR_ASM_MACRO_LEVELS_EXCEED + | KS_ERR_ASM_MACRO_STR + | KS_ERR_ASM_ESC_BACKSLASH + | KS_ERR_ASM_ESC_OCTAL + | KS_ERR_ASM_ESC_SEQUENCE + | KS_ERR_ASM_ESC_STR + | KS_ERR_ASM_TOKEN_INVALID + | KS_ERR_ASM_INSN_UNSUPPORTED + | KS_ERR_ASM_FIXUP_INVALID + | KS_ERR_ASM_LABEL_INVALID + | KS_ERR_ASM_FRAGMENT_INVALID + | KS_ERR_ASM_INVALIDOPERAND + | KS_ERR_ASM_MISSINGFEATURE + | KS_ERR_ASM_MNEMONICFAIL + + type ks_opt_type = + | KS_OPT_SYNTAX + + type ks_opt_value = + | KS_OPT_SYNTAX_INTEL + | KS_OPT_SYNTAX_ATT + | KS_OPT_SYNTAX_NASM + | KS_OPT_SYNTAX_MASM + | KS_OPT_SYNTAX_GAS + | KS_OPT_SYNTAX_RADIX16 + + type ks_mode = + | KS_MODE_ARM + | KS_MODE_BIG_ENDIAN + | KS_MODE_LITTLE_ENDIAN + | KS_MODE_THUMB + | KS_MODE_V8 + | KS_MODE_MICRO + | KS_MODE_MIPS3 + | KS_MODE_MIPS32R6 + | KS_MODE_MIPS32 + | KS_MODE_MIPS64 + | KS_MODE_16 + | KS_MODE_32 + | KS_MODE_64 + | KS_MODE_PPC32 + | KS_MODE_PPC64 + | KS_MODE_QPX + | KS_MODE_SPARC32 + | KS_MODE_SPARC64 + | KS_MODE_V9 +end + +(** Record containing a successful encoding result. + encoding field contains an int array + encoding_size is size of the encoding + stat_count records how many statements were successfully processed. +*) +type encoded_result = + { + encoding: int array; + encoding_size : int; + stat_count : int; + } + +(** Determine if the given architecture is supported. True if the + architecture is supported, false otherwise *) +val ks_arch_supported : Types.ks_arch -> bool + +val ks_version : int -> int -> int + + +(** Set an option for a Keystone engine instance. + Takes an engine instance, an option type and an option value. + + Returns KS_ERR_OK on success or another value on failure. +*) +val ks_option : + Types.ks_t -> + Types.ks_opt_type -> Types.ks_opt_value -> Types.ks_error + +(** Given a ks_err type, returns a string description of the error. *) +val ks_strerror : Types.ks_error -> string + + + +(** Create a new instance of Keystone engine. + arch: is architecture type, mode is hardware mode. + + Returns a Keystone engine or a string with an error message. +*) +val ks_open : + Types.ks_arch -> ?endian:Types.ks_mode -> Types.ks_mode -> (Types.ks_t, string) Result.result + + + +(** Close the Keystone engine instance *) +val ks_close : Types.ks_t -> int64 + + +(** Given a Keystone engine instance, returns the last error number on + some API function failure. *) +val ks_errno : + Types.ks_t -> Types.ks_error + + +(** Assemble a string: takes a Keystone engine instance, a string to +assemble and a start address to assemble from. + +On success returns Ok with a encoded_result record + *) +val ks_asm : + Types.ks_t -> + string -> int -> (encoded_result, string) Result.result + +(** Convert an array containing an encoding of an assembly string and +returns a string representation. *) +val asm_array_to_string : int array -> string diff --git a/bindings/ocaml/keystone.mllib b/bindings/ocaml/keystone.mllib new file mode 100644 index 0000000..b6dd06f --- /dev/null +++ b/bindings/ocaml/keystone.mllib @@ -0,0 +1,8 @@ +# OASIS_START +# DO NOT EDIT (digest: 245ae3e4b1018fbf4a40ba68d8f67205) +Keystone +Ffi_generated +Ffi_types +Ffi_bindings +Ffi_generated_types +# OASIS_STOP diff --git a/bindings/ocaml/keystone.odocl b/bindings/ocaml/keystone.odocl new file mode 100644 index 0000000..b6dd06f --- /dev/null +++ b/bindings/ocaml/keystone.odocl @@ -0,0 +1,8 @@ +# OASIS_START +# DO NOT EDIT (digest: 245ae3e4b1018fbf4a40ba68d8f67205) +Keystone +Ffi_generated +Ffi_types +Ffi_bindings +Ffi_generated_types +# OASIS_STOP diff --git a/bindings/ocaml/keystone_bindings.mldylib b/bindings/ocaml/keystone_bindings.mldylib new file mode 100644 index 0000000..7c49c4c --- /dev/null +++ b/bindings/ocaml/keystone_bindings.mldylib @@ -0,0 +1,4 @@ +# OASIS_START +# DO NOT EDIT (digest: b0cb983199f14176130ec534492d2489) +Ffi_bindings +# OASIS_STOP diff --git a/bindings/ocaml/keystone_bindings.mllib b/bindings/ocaml/keystone_bindings.mllib new file mode 100644 index 0000000..7c49c4c --- /dev/null +++ b/bindings/ocaml/keystone_bindings.mllib @@ -0,0 +1,4 @@ +# OASIS_START +# DO NOT EDIT (digest: b0cb983199f14176130ec534492d2489) +Ffi_bindings +# OASIS_STOP diff --git a/bindings/ocaml/keystone_types.mldylib b/bindings/ocaml/keystone_types.mldylib new file mode 100644 index 0000000..be6d917 --- /dev/null +++ b/bindings/ocaml/keystone_types.mldylib @@ -0,0 +1,4 @@ +# OASIS_START +# DO NOT EDIT (digest: e3b57ef8f44642217053313131298e86) +Ffi_types +# OASIS_STOP diff --git a/bindings/ocaml/keystone_types.mllib b/bindings/ocaml/keystone_types.mllib new file mode 100644 index 0000000..be6d917 --- /dev/null +++ b/bindings/ocaml/keystone_types.mllib @@ -0,0 +1,4 @@ +# OASIS_START +# DO NOT EDIT (digest: e3b57ef8f44642217053313131298e86) +Ffi_types +# OASIS_STOP diff --git a/bindings/ocaml/libkeystone_stubs.clib b/bindings/ocaml/libkeystone_stubs.clib new file mode 100644 index 0000000..a27758f --- /dev/null +++ b/bindings/ocaml/libkeystone_stubs.clib @@ -0,0 +1,4 @@ +# OASIS_START +# DO NOT EDIT (digest: d7517d65f92f5a924cbb6dcbdb6589a1) +ffi_generated_stubs.o +# OASIS_STOP diff --git a/bindings/ocaml/myocamlbuild.ml b/bindings/ocaml/myocamlbuild.ml new file mode 100644 index 0000000..8664be2 --- /dev/null +++ b/bindings/ocaml/myocamlbuild.ml @@ -0,0 +1,847 @@ +(* OASIS_START *) +(* DO NOT EDIT (digest: 31a38f4659c6e259b7a0fa94012983de) *) +module OASISGettext = struct +(* # 22 "src/oasis/OASISGettext.ml" *) + + + let ns_ str = + str + + + let s_ str = + str + + + let f_ (str: ('a, 'b, 'c, 'd) format4) = + str + + + let fn_ fmt1 fmt2 n = + if n = 1 then + fmt1^^"" + else + fmt2^^"" + + + let init = + [] + + +end + +module OASISString = struct +(* # 22 "src/oasis/OASISString.ml" *) + + + (** Various string utilities. + + Mostly inspired by extlib and batteries ExtString and BatString libraries. + + @author Sylvain Le Gall + *) + + + let nsplitf str f = + if str = "" then + [] + else + let buf = Buffer.create 13 in + let lst = ref [] in + let push () = + lst := Buffer.contents buf :: !lst; + Buffer.clear buf + in + let str_len = String.length str in + for i = 0 to str_len - 1 do + if f str.[i] then + push () + else + Buffer.add_char buf str.[i] + done; + push (); + List.rev !lst + + + (** [nsplit c s] Split the string [s] at char [c]. It doesn't include the + separator. + *) + let nsplit str c = + nsplitf str ((=) c) + + + let find ~what ?(offset=0) str = + let what_idx = ref 0 in + let str_idx = ref offset in + while !str_idx < String.length str && + !what_idx < String.length what do + if str.[!str_idx] = what.[!what_idx] then + incr what_idx + else + what_idx := 0; + incr str_idx + done; + if !what_idx <> String.length what then + raise Not_found + else + !str_idx - !what_idx + + + let sub_start str len = + let str_len = String.length str in + if len >= str_len then + "" + else + String.sub str len (str_len - len) + + + let sub_end ?(offset=0) str len = + let str_len = String.length str in + if len >= str_len then + "" + else + String.sub str 0 (str_len - len) + + + let starts_with ~what ?(offset=0) str = + let what_idx = ref 0 in + let str_idx = ref offset in + let ok = ref true in + while !ok && + !str_idx < String.length str && + !what_idx < String.length what do + if str.[!str_idx] = what.[!what_idx] then + incr what_idx + else + ok := false; + incr str_idx + done; + if !what_idx = String.length what then + true + else + false + + + let strip_starts_with ~what str = + if starts_with ~what str then + sub_start str (String.length what) + else + raise Not_found + + + let ends_with ~what ?(offset=0) str = + let what_idx = ref ((String.length what) - 1) in + let str_idx = ref ((String.length str) - 1) in + let ok = ref true in + while !ok && + offset <= !str_idx && + 0 <= !what_idx do + if str.[!str_idx] = what.[!what_idx] then + decr what_idx + else + ok := false; + decr str_idx + done; + if !what_idx = -1 then + true + else + false + + + let strip_ends_with ~what str = + if ends_with ~what str then + sub_end str (String.length what) + else + raise Not_found + + + let replace_chars f s = + let buf = Buffer.create (String.length s) in + String.iter (fun c -> Buffer.add_char buf (f c)) s; + Buffer.contents buf + + let lowercase_ascii = + replace_chars + (fun c -> + if (c >= 'A' && c <= 'Z') then + Char.chr (Char.code c + 32) + else + c) + + let uncapitalize_ascii s = + if s <> "" then + (lowercase_ascii (String.sub s 0 1)) ^ (String.sub s 1 ((String.length s) - 1)) + else + s + + let uppercase_ascii = + replace_chars + (fun c -> + if (c >= 'a' && c <= 'z') then + Char.chr (Char.code c - 32) + else + c) + + let capitalize_ascii s = + if s <> "" then + (uppercase_ascii (String.sub s 0 1)) ^ (String.sub s 1 ((String.length s) - 1)) + else + s + +end + +module OASISExpr = struct +(* # 22 "src/oasis/OASISExpr.ml" *) + + + + + + open OASISGettext + + + type test = string + + + type flag = string + + + type t = + | EBool of bool + | ENot of t + | EAnd of t * t + | EOr of t * t + | EFlag of flag + | ETest of test * string + + + + type 'a choices = (t * 'a) list + + + let eval var_get t = + let rec eval' = + function + | EBool b -> + b + + | ENot e -> + not (eval' e) + + | EAnd (e1, e2) -> + (eval' e1) && (eval' e2) + + | EOr (e1, e2) -> + (eval' e1) || (eval' e2) + + | EFlag nm -> + let v = + var_get nm + in + assert(v = "true" || v = "false"); + (v = "true") + + | ETest (nm, vl) -> + let v = + var_get nm + in + (v = vl) + in + eval' t + + + let choose ?printer ?name var_get lst = + let rec choose_aux = + function + | (cond, vl) :: tl -> + if eval var_get cond then + vl + else + choose_aux tl + | [] -> + let str_lst = + if lst = [] then + s_ "" + else + String.concat + (s_ ", ") + (List.map + (fun (cond, vl) -> + match printer with + | Some p -> p vl + | None -> s_ "") + lst) + in + match name with + | Some nm -> + failwith + (Printf.sprintf + (f_ "No result for the choice list '%s': %s") + nm str_lst) + | None -> + failwith + (Printf.sprintf + (f_ "No result for a choice list: %s") + str_lst) + in + choose_aux (List.rev lst) + + +end + + +# 292 "myocamlbuild.ml" +module BaseEnvLight = struct +(* # 22 "src/base/BaseEnvLight.ml" *) + + + module MapString = Map.Make(String) + + + type t = string MapString.t + + + let default_filename = + Filename.concat + (Sys.getcwd ()) + "setup.data" + + + let load ?(allow_empty=false) ?(filename=default_filename) () = + if Sys.file_exists filename then + begin + let chn = + open_in_bin filename + in + let st = + Stream.of_channel chn + in + let line = + ref 1 + in + let st_line = + Stream.from + (fun _ -> + try + match Stream.next st with + | '\n' -> incr line; Some '\n' + | c -> Some c + with Stream.Failure -> None) + in + let lexer = + Genlex.make_lexer ["="] st_line + in + let rec read_file mp = + match Stream.npeek 3 lexer with + | [Genlex.Ident nm; Genlex.Kwd "="; Genlex.String value] -> + Stream.junk lexer; + Stream.junk lexer; + Stream.junk lexer; + read_file (MapString.add nm value mp) + | [] -> + mp + | _ -> + failwith + (Printf.sprintf + "Malformed data file '%s' line %d" + filename !line) + in + let mp = + read_file MapString.empty + in + close_in chn; + mp + end + else if allow_empty then + begin + MapString.empty + end + else + begin + failwith + (Printf.sprintf + "Unable to load environment, the file '%s' doesn't exist." + filename) + end + + + let rec var_expand str env = + let buff = + Buffer.create ((String.length str) * 2) + in + Buffer.add_substitute + buff + (fun var -> + try + var_expand (MapString.find var env) env + with Not_found -> + failwith + (Printf.sprintf + "No variable %s defined when trying to expand %S." + var + str)) + str; + Buffer.contents buff + + + let var_get name env = + var_expand (MapString.find name env) env + + + let var_choose lst env = + OASISExpr.choose + (fun nm -> var_get nm env) + lst +end + + +# 397 "myocamlbuild.ml" +module MyOCamlbuildFindlib = struct +(* # 22 "src/plugins/ocamlbuild/MyOCamlbuildFindlib.ml" *) + + + (** OCamlbuild extension, copied from + * http://brion.inria.fr/gallium/index.php/Using_ocamlfind_with_ocamlbuild + * by N. Pouillard and others + * + * Updated on 2009/02/28 + * + * Modified by Sylvain Le Gall + *) + open Ocamlbuild_plugin + + type conf = + { no_automatic_syntax: bool; + } + + (* these functions are not really officially exported *) + let run_and_read = + Ocamlbuild_pack.My_unix.run_and_read + + + let blank_sep_strings = + Ocamlbuild_pack.Lexers.blank_sep_strings + + + let exec_from_conf exec = + let exec = + let env_filename = Pathname.basename BaseEnvLight.default_filename in + let env = BaseEnvLight.load ~filename:env_filename ~allow_empty:true () in + try + BaseEnvLight.var_get exec env + with Not_found -> + Printf.eprintf "W: Cannot get variable %s\n" exec; + exec + in + let fix_win32 str = + if Sys.os_type = "Win32" then begin + let buff = Buffer.create (String.length str) in + (* Adapt for windowsi, ocamlbuild + win32 has a hard time to handle '\\'. + *) + String.iter + (fun c -> Buffer.add_char buff (if c = '\\' then '/' else c)) + str; + Buffer.contents buff + end else begin + str + end + in + fix_win32 exec + + let split s ch = + let buf = Buffer.create 13 in + let x = ref [] in + let flush () = + x := (Buffer.contents buf) :: !x; + Buffer.clear buf + in + String.iter + (fun c -> + if c = ch then + flush () + else + Buffer.add_char buf c) + s; + flush (); + List.rev !x + + + let split_nl s = split s '\n' + + + let before_space s = + try + String.before s (String.index s ' ') + with Not_found -> s + + (* ocamlfind command *) + let ocamlfind x = S[Sh (exec_from_conf "ocamlfind"); x] + + (* This lists all supported packages. *) + let find_packages () = + List.map before_space (split_nl & run_and_read (exec_from_conf "ocamlfind" ^ " list")) + + + (* Mock to list available syntaxes. *) + let find_syntaxes () = ["camlp4o"; "camlp4r"] + + + let well_known_syntax = [ + "camlp4.quotations.o"; + "camlp4.quotations.r"; + "camlp4.exceptiontracer"; + "camlp4.extend"; + "camlp4.foldgenerator"; + "camlp4.listcomprehension"; + "camlp4.locationstripper"; + "camlp4.macro"; + "camlp4.mapgenerator"; + "camlp4.metagenerator"; + "camlp4.profiler"; + "camlp4.tracer" + ] + + + let dispatch conf = + function + | After_options -> + (* By using Before_options one let command line options have an higher + * priority on the contrary using After_options will guarantee to have + * the higher priority override default commands by ocamlfind ones *) + Options.ocamlc := ocamlfind & A"ocamlc"; + Options.ocamlopt := ocamlfind & A"ocamlopt"; + Options.ocamldep := ocamlfind & A"ocamldep"; + Options.ocamldoc := ocamlfind & A"ocamldoc"; + Options.ocamlmktop := ocamlfind & A"ocamlmktop"; + Options.ocamlmklib := ocamlfind & A"ocamlmklib" + + | After_rules -> + + (* When one link an OCaml library/binary/package, one should use + * -linkpkg *) + flag ["ocaml"; "link"; "program"] & A"-linkpkg"; + + if not (conf.no_automatic_syntax) then begin + (* For each ocamlfind package one inject the -package option when + * compiling, computing dependencies, generating documentation and + * linking. *) + List.iter + begin fun pkg -> + let base_args = [A"-package"; A pkg] in + (* TODO: consider how to really choose camlp4o or camlp4r. *) + let syn_args = [A"-syntax"; A "camlp4o"] in + let (args, pargs) = + (* Heuristic to identify syntax extensions: whether they end in + ".syntax"; some might not. + *) + if Filename.check_suffix pkg "syntax" || + List.mem pkg well_known_syntax then + (syn_args @ base_args, syn_args) + else + (base_args, []) + in + flag ["ocaml"; "compile"; "pkg_"^pkg] & S args; + flag ["ocaml"; "ocamldep"; "pkg_"^pkg] & S args; + flag ["ocaml"; "doc"; "pkg_"^pkg] & S args; + flag ["ocaml"; "link"; "pkg_"^pkg] & S base_args; + flag ["ocaml"; "infer_interface"; "pkg_"^pkg] & S args; + + (* TODO: Check if this is allowed for OCaml < 3.12.1 *) + flag ["ocaml"; "compile"; "package("^pkg^")"] & S pargs; + flag ["ocaml"; "ocamldep"; "package("^pkg^")"] & S pargs; + flag ["ocaml"; "doc"; "package("^pkg^")"] & S pargs; + flag ["ocaml"; "infer_interface"; "package("^pkg^")"] & S pargs; + end + (find_packages ()); + end; + + (* Like -package but for extensions syntax. Morover -syntax is useless + * when linking. *) + List.iter begin fun syntax -> + flag ["ocaml"; "compile"; "syntax_"^syntax] & S[A"-syntax"; A syntax]; + flag ["ocaml"; "ocamldep"; "syntax_"^syntax] & S[A"-syntax"; A syntax]; + flag ["ocaml"; "doc"; "syntax_"^syntax] & S[A"-syntax"; A syntax]; + flag ["ocaml"; "infer_interface"; "syntax_"^syntax] & + S[A"-syntax"; A syntax]; + end (find_syntaxes ()); + + (* The default "thread" tag is not compatible with ocamlfind. + * Indeed, the default rules add the "threads.cma" or "threads.cmxa" + * options when using this tag. When using the "-linkpkg" option with + * ocamlfind, this module will then be added twice on the command line. + * + * To solve this, one approach is to add the "-thread" option when using + * the "threads" package using the previous plugin. + *) + flag ["ocaml"; "pkg_threads"; "compile"] (S[A "-thread"]); + flag ["ocaml"; "pkg_threads"; "doc"] (S[A "-I"; A "+threads"]); + flag ["ocaml"; "pkg_threads"; "link"] (S[A "-thread"]); + flag ["ocaml"; "pkg_threads"; "infer_interface"] (S[A "-thread"]); + flag ["ocaml"; "package(threads)"; "compile"] (S[A "-thread"]); + flag ["ocaml"; "package(threads)"; "doc"] (S[A "-I"; A "+threads"]); + flag ["ocaml"; "package(threads)"; "link"] (S[A "-thread"]); + flag ["ocaml"; "package(threads)"; "infer_interface"] (S[A "-thread"]); + + | _ -> + () +end + +module MyOCamlbuildBase = struct +(* # 22 "src/plugins/ocamlbuild/MyOCamlbuildBase.ml" *) + + + (** Base functions for writing myocamlbuild.ml + @author Sylvain Le Gall + *) + + + + + + open Ocamlbuild_plugin + module OC = Ocamlbuild_pack.Ocaml_compiler + + + type dir = string + type file = string + type name = string + type tag = string + + +(* # 62 "src/plugins/ocamlbuild/MyOCamlbuildBase.ml" *) + + + type t = + { + lib_ocaml: (name * dir list * string list) list; + lib_c: (name * dir * file list) list; + flags: (tag list * (spec OASISExpr.choices)) list; + (* Replace the 'dir: include' from _tags by a precise interdepends in + * directory. + *) + includes: (dir * dir list) list; + } + + + let env_filename = + Pathname.basename + BaseEnvLight.default_filename + + + let dispatch_combine lst = + fun e -> + List.iter + (fun dispatch -> dispatch e) + lst + + + let tag_libstubs nm = + "use_lib"^nm^"_stubs" + + + let nm_libstubs nm = + nm^"_stubs" + + + let dispatch t e = + let env = + BaseEnvLight.load + ~filename:env_filename + ~allow_empty:true + () + in + match e with + | Before_options -> + let no_trailing_dot s = + if String.length s >= 1 && s.[0] = '.' then + String.sub s 1 ((String.length s) - 1) + else + s + in + List.iter + (fun (opt, var) -> + try + opt := no_trailing_dot (BaseEnvLight.var_get var env) + with Not_found -> + Printf.eprintf "W: Cannot get variable %s\n" var) + [ + Options.ext_obj, "ext_obj"; + Options.ext_lib, "ext_lib"; + Options.ext_dll, "ext_dll"; + ] + + | After_rules -> + (* Declare OCaml libraries *) + List.iter + (function + | nm, [], intf_modules -> + ocaml_lib nm; + let cmis = + List.map (fun m -> (OASISString.uncapitalize_ascii m) ^ ".cmi") + intf_modules in + dep ["ocaml"; "link"; "library"; "file:"^nm^".cma"] cmis + | nm, dir :: tl, intf_modules -> + ocaml_lib ~dir:dir (dir^"/"^nm); + List.iter + (fun dir -> + List.iter + (fun str -> + flag ["ocaml"; "use_"^nm; str] (S[A"-I"; P dir])) + ["compile"; "infer_interface"; "doc"]) + tl; + let cmis = + List.map (fun m -> dir^"/"^(OASISString.uncapitalize_ascii m)^".cmi") + intf_modules in + dep ["ocaml"; "link"; "library"; "file:"^dir^"/"^nm^".cma"] + cmis) + t.lib_ocaml; + + (* Declare directories dependencies, replace "include" in _tags. *) + List.iter + (fun (dir, include_dirs) -> + Pathname.define_context dir include_dirs) + t.includes; + + (* Declare C libraries *) + List.iter + (fun (lib, dir, headers) -> + (* Handle C part of library *) + flag ["link"; "library"; "ocaml"; "byte"; tag_libstubs lib] + (S[A"-dllib"; A("-l"^(nm_libstubs lib)); A"-cclib"; + A("-l"^(nm_libstubs lib))]); + + flag ["link"; "library"; "ocaml"; "native"; tag_libstubs lib] + (S[A"-cclib"; A("-l"^(nm_libstubs lib))]); + + flag ["link"; "program"; "ocaml"; "byte"; tag_libstubs lib] + (S[A"-dllib"; A("dll"^(nm_libstubs lib))]); + + (* When ocaml link something that use the C library, then one + need that file to be up to date. + This holds both for programs and for libraries. + *) + dep ["link"; "ocaml"; tag_libstubs lib] + [dir/"lib"^(nm_libstubs lib)^"."^(!Options.ext_lib)]; + + dep ["compile"; "ocaml"; tag_libstubs lib] + [dir/"lib"^(nm_libstubs lib)^"."^(!Options.ext_lib)]; + + (* TODO: be more specific about what depends on headers *) + (* Depends on .h files *) + dep ["compile"; "c"] + headers; + + (* Setup search path for lib *) + flag ["link"; "ocaml"; "use_"^lib] + (S[A"-I"; P(dir)]); + ) + t.lib_c; + + (* Add flags *) + List.iter + (fun (tags, cond_specs) -> + let spec = BaseEnvLight.var_choose cond_specs env in + let rec eval_specs = + function + | S lst -> S (List.map eval_specs lst) + | A str -> A (BaseEnvLight.var_expand str env) + | spec -> spec + in + flag tags & (eval_specs spec)) + t.flags + | _ -> + () + + + let dispatch_default conf t = + dispatch_combine + [ + dispatch t; + MyOCamlbuildFindlib.dispatch conf; + ] + + +end + + +# 766 "myocamlbuild.ml" +open Ocamlbuild_plugin;; +let package_default = + { + MyOCamlbuildBase.lib_ocaml = [("keystone", [], [])]; + lib_c = [("keystone", ".", [])]; + flags = + [ + (["oasis_library_keystone_ccopt"; "compile"], + [ + (OASISExpr.EBool true, + S [A "-ccopt"; A "-I"; A "-ccopt"; A "${pkg_ctypes_stubs}"]) + ]); + (["oasis_library_keystone_cclib"; "link"], + [(OASISExpr.EBool true, S [A "-cclib"; A "-lkeystone"])]); + (["oasis_library_keystone_cclib"; "ocamlmklib"; "c"], + [(OASISExpr.EBool true, S [A "-lkeystone"])]); + (["oasis_executable_test_bindings_cclib"; "link"], + [(OASISExpr.EBool true, S [A "-cclib"; A "-lkeystone"])]); + (["oasis_executable_test_bindings_cclib"; "ocamlmklib"; "c"], + [(OASISExpr.EBool true, S [A "-lkeystone"])]) + ]; + includes = [] + } + ;; + +let conf = {MyOCamlbuildFindlib.no_automatic_syntax = false} + +let dispatch_default = MyOCamlbuildBase.dispatch_default conf package_default;; + +# 797 "myocamlbuild.ml" +(* OASIS_STOP *) +Ocamlbuild_plugin.dispatch dispatch_default;; +let dispatch = function + | After_rules -> + let stubgen = "ffi_stubgen.native" in + let stubgen_types = "ffi_types_stubgen.native" in + let stubgen_ml_types = "ffi_ml_types_stubgen.native" in + + rule "generated-types ml" + ~dep:stubgen_ml_types + ~prod:"ffi_generated_types.ml" + (fun _ _ -> + Cmd (S [P ("./" ^ stubgen_ml_types); Sh">>"; A"ffi_generated_types.ml"])); + + rule "generated ml" + ~dep:stubgen + ~prod:"ffi_generated.ml" + (fun _ _ -> + Cmd(S[P ("./" ^ stubgen); A"-ml"; Sh">"; A"ffi_generated.ml"])); + + rule "generated-types c" + ~dep:stubgen_types + ~prod:"ffi_ml_types_stubgen.c" + (fun _ _ -> + Cmd (S [P ("./" ^ stubgen_types); Sh">"; A"ffi_ml_types_stubgen.c"])); + + rule "generated-types exe" + ~dep:"ffi_ml_types_stubgen.c" + ~prod:stubgen_ml_types + (fun _ _ -> + let env = BaseEnvLight.load () in + let cc = BaseEnvLight.var_get "bytecomp_c_compiler" env in + let stdlib = BaseEnvLight.var_get "standard_library" env in + let ctypes = BaseEnvLight.var_get "pkg_ctypes_stubs" env in + Cmd (S [Sh cc; A"ffi_ml_types_stubgen.c"; + A"-I"; P ctypes; A"-I"; P stdlib;A"-lkeystone"; + A"-o"; A stubgen_ml_types]) + ); + + rule "generated c" + ~dep:stubgen + ~prod:"ffi_generated_stubs.c" + (fun _ _ -> + Cmd(S[P ("./" ^ stubgen); A"-c"; Sh">"; A"ffi_generated_stubs.c"])); + + flag ["c"; "compile"] & S[A"-I"; A"lib"; A"-package"; A"ctypes"; A"-package"; A"ctypes.stubs"] + + | _ -> + () + +let () = Ocamlbuild_plugin.dispatch (fun hook -> dispatch hook; dispatch_default hook) diff --git a/bindings/ocaml/setup.ml b/bindings/ocaml/setup.ml new file mode 100644 index 0000000..aca3177 --- /dev/null +++ b/bindings/ocaml/setup.ml @@ -0,0 +1,6940 @@ +(* setup.ml generated for the first time by OASIS v0.4.6 *) + +(* OASIS_START *) +(* DO NOT EDIT (digest: e917c0324c290d1aa03c0a37379435b4) *) +(* + Regenerated by OASIS v0.4.6 + Visit http://oasis.forge.ocamlcore.org for more information and + documentation about functions used in this file. +*) +module OASISGettext = struct +(* # 22 "src/oasis/OASISGettext.ml" *) + + + let ns_ str = + str + + + let s_ str = + str + + + let f_ (str: ('a, 'b, 'c, 'd) format4) = + str + + + let fn_ fmt1 fmt2 n = + if n = 1 then + fmt1^^"" + else + fmt2^^"" + + + let init = + [] + + +end + +module OASISContext = struct +(* # 22 "src/oasis/OASISContext.ml" *) + + + open OASISGettext + + + type level = + [ `Debug + | `Info + | `Warning + | `Error] + + + type t = + { + (* TODO: replace this by a proplist. *) + quiet: bool; + info: bool; + debug: bool; + ignore_plugins: bool; + ignore_unknown_fields: bool; + printf: level -> string -> unit; + } + + + let printf lvl str = + let beg = + match lvl with + | `Error -> s_ "E: " + | `Warning -> s_ "W: " + | `Info -> s_ "I: " + | `Debug -> s_ "D: " + in + prerr_endline (beg^str) + + + let default = + ref + { + quiet = false; + info = false; + debug = false; + ignore_plugins = false; + ignore_unknown_fields = false; + printf = printf; + } + + + let quiet = + {!default with quiet = true} + + + let fspecs () = + (* TODO: don't act on default. *) + let ignore_plugins = ref false in + ["-quiet", + Arg.Unit (fun () -> default := {!default with quiet = true}), + s_ " Run quietly"; + + "-info", + Arg.Unit (fun () -> default := {!default with info = true}), + s_ " Display information message"; + + + "-debug", + Arg.Unit (fun () -> default := {!default with debug = true}), + s_ " Output debug message"; + + "-ignore-plugins", + Arg.Set ignore_plugins, + s_ " Ignore plugin's field."; + + "-C", + (* TODO: remove this chdir. *) + Arg.String (fun str -> Sys.chdir str), + s_ "dir Change directory before running."], + fun () -> {!default with ignore_plugins = !ignore_plugins} +end + +module OASISString = struct +(* # 22 "src/oasis/OASISString.ml" *) + + + (** Various string utilities. + + Mostly inspired by extlib and batteries ExtString and BatString libraries. + + @author Sylvain Le Gall + *) + + + let nsplitf str f = + if str = "" then + [] + else + let buf = Buffer.create 13 in + let lst = ref [] in + let push () = + lst := Buffer.contents buf :: !lst; + Buffer.clear buf + in + let str_len = String.length str in + for i = 0 to str_len - 1 do + if f str.[i] then + push () + else + Buffer.add_char buf str.[i] + done; + push (); + List.rev !lst + + + (** [nsplit c s] Split the string [s] at char [c]. It doesn't include the + separator. + *) + let nsplit str c = + nsplitf str ((=) c) + + + let find ~what ?(offset=0) str = + let what_idx = ref 0 in + let str_idx = ref offset in + while !str_idx < String.length str && + !what_idx < String.length what do + if str.[!str_idx] = what.[!what_idx] then + incr what_idx + else + what_idx := 0; + incr str_idx + done; + if !what_idx <> String.length what then + raise Not_found + else + !str_idx - !what_idx + + + let sub_start str len = + let str_len = String.length str in + if len >= str_len then + "" + else + String.sub str len (str_len - len) + + + let sub_end ?(offset=0) str len = + let str_len = String.length str in + if len >= str_len then + "" + else + String.sub str 0 (str_len - len) + + + let starts_with ~what ?(offset=0) str = + let what_idx = ref 0 in + let str_idx = ref offset in + let ok = ref true in + while !ok && + !str_idx < String.length str && + !what_idx < String.length what do + if str.[!str_idx] = what.[!what_idx] then + incr what_idx + else + ok := false; + incr str_idx + done; + if !what_idx = String.length what then + true + else + false + + + let strip_starts_with ~what str = + if starts_with ~what str then + sub_start str (String.length what) + else + raise Not_found + + + let ends_with ~what ?(offset=0) str = + let what_idx = ref ((String.length what) - 1) in + let str_idx = ref ((String.length str) - 1) in + let ok = ref true in + while !ok && + offset <= !str_idx && + 0 <= !what_idx do + if str.[!str_idx] = what.[!what_idx] then + decr what_idx + else + ok := false; + decr str_idx + done; + if !what_idx = -1 then + true + else + false + + + let strip_ends_with ~what str = + if ends_with ~what str then + sub_end str (String.length what) + else + raise Not_found + + + let replace_chars f s = + let buf = Buffer.create (String.length s) in + String.iter (fun c -> Buffer.add_char buf (f c)) s; + Buffer.contents buf + + let lowercase_ascii = + replace_chars + (fun c -> + if (c >= 'A' && c <= 'Z') then + Char.chr (Char.code c + 32) + else + c) + + let uncapitalize_ascii s = + if s <> "" then + (lowercase_ascii (String.sub s 0 1)) ^ (String.sub s 1 ((String.length s) - 1)) + else + s + + let uppercase_ascii = + replace_chars + (fun c -> + if (c >= 'a' && c <= 'z') then + Char.chr (Char.code c - 32) + else + c) + + let capitalize_ascii s = + if s <> "" then + (uppercase_ascii (String.sub s 0 1)) ^ (String.sub s 1 ((String.length s) - 1)) + else + s + +end + +module OASISUtils = struct +(* # 22 "src/oasis/OASISUtils.ml" *) + + + open OASISGettext + + + module MapExt = + struct + module type S = + sig + include Map.S + val add_list: 'a t -> (key * 'a) list -> 'a t + val of_list: (key * 'a) list -> 'a t + val to_list: 'a t -> (key * 'a) list + end + + module Make (Ord: Map.OrderedType) = + struct + include Map.Make(Ord) + + let rec add_list t = + function + | (k, v) :: tl -> add_list (add k v t) tl + | [] -> t + + let of_list lst = add_list empty lst + + let to_list t = fold (fun k v acc -> (k, v) :: acc) t [] + end + end + + + module MapString = MapExt.Make(String) + + + module SetExt = + struct + module type S = + sig + include Set.S + val add_list: t -> elt list -> t + val of_list: elt list -> t + val to_list: t -> elt list + end + + module Make (Ord: Set.OrderedType) = + struct + include Set.Make(Ord) + + let rec add_list t = + function + | e :: tl -> add_list (add e t) tl + | [] -> t + + let of_list lst = add_list empty lst + + let to_list = elements + end + end + + + module SetString = SetExt.Make(String) + + + let compare_csl s1 s2 = + String.compare (OASISString.lowercase_ascii s1) (OASISString.lowercase_ascii s2) + + + module HashStringCsl = + Hashtbl.Make + (struct + type t = string + let equal s1 s2 = (compare_csl s1 s2) = 0 + let hash s = Hashtbl.hash (OASISString.lowercase_ascii s) + end) + + module SetStringCsl = + SetExt.Make + (struct + type t = string + let compare = compare_csl + end) + + + let varname_of_string ?(hyphen='_') s = + if String.length s = 0 then + begin + invalid_arg "varname_of_string" + end + else + begin + let buf = + OASISString.replace_chars + (fun c -> + if ('a' <= c && c <= 'z') + || + ('A' <= c && c <= 'Z') + || + ('0' <= c && c <= '9') then + c + else + hyphen) + s; + in + let buf = + (* Start with a _ if digit *) + if '0' <= s.[0] && s.[0] <= '9' then + "_"^buf + else + buf + in + OASISString.lowercase_ascii buf + end + + + let varname_concat ?(hyphen='_') p s = + let what = String.make 1 hyphen in + let p = + try + OASISString.strip_ends_with ~what p + with Not_found -> + p + in + let s = + try + OASISString.strip_starts_with ~what s + with Not_found -> + s + in + p^what^s + + + let is_varname str = + str = varname_of_string str + + + let failwithf fmt = Printf.ksprintf failwith fmt + + +end + +module PropList = struct +(* # 22 "src/oasis/PropList.ml" *) + + + open OASISGettext + + + type name = string + + + exception Not_set of name * string option + exception No_printer of name + exception Unknown_field of name * name + + + let () = + Printexc.register_printer + (function + | Not_set (nm, Some rsn) -> + Some + (Printf.sprintf (f_ "Field '%s' is not set: %s") nm rsn) + | Not_set (nm, None) -> + Some + (Printf.sprintf (f_ "Field '%s' is not set") nm) + | No_printer nm -> + Some + (Printf.sprintf (f_ "No default printer for value %s") nm) + | Unknown_field (nm, schm) -> + Some + (Printf.sprintf + (f_ "Field %s is not defined in schema %s") nm schm) + | _ -> + None) + + + module Data = + struct + type t = + (name, unit -> unit) Hashtbl.t + + let create () = + Hashtbl.create 13 + + let clear t = + Hashtbl.clear t + + +(* # 78 "src/oasis/PropList.ml" *) + end + + + module Schema = + struct + type ('ctxt, 'extra) value = + { + get: Data.t -> string; + set: Data.t -> ?context:'ctxt -> string -> unit; + help: (unit -> string) option; + extra: 'extra; + } + + type ('ctxt, 'extra) t = + { + name: name; + fields: (name, ('ctxt, 'extra) value) Hashtbl.t; + order: name Queue.t; + name_norm: string -> string; + } + + let create ?(case_insensitive=false) nm = + { + name = nm; + fields = Hashtbl.create 13; + order = Queue.create (); + name_norm = + (if case_insensitive then + OASISString.lowercase_ascii + else + fun s -> s); + } + + let add t nm set get extra help = + let key = + t.name_norm nm + in + + if Hashtbl.mem t.fields key then + failwith + (Printf.sprintf + (f_ "Field '%s' is already defined in schema '%s'") + nm t.name); + Hashtbl.add + t.fields + key + { + set = set; + get = get; + help = help; + extra = extra; + }; + Queue.add nm t.order + + let mem t nm = + Hashtbl.mem t.fields nm + + let find t nm = + try + Hashtbl.find t.fields (t.name_norm nm) + with Not_found -> + raise (Unknown_field (nm, t.name)) + + let get t data nm = + (find t nm).get data + + let set t data nm ?context x = + (find t nm).set + data + ?context + x + + let fold f acc t = + Queue.fold + (fun acc k -> + let v = + find t k + in + f acc k v.extra v.help) + acc + t.order + + let iter f t = + fold + (fun () -> f) + () + t + + let name t = + t.name + end + + + module Field = + struct + type ('ctxt, 'value, 'extra) t = + { + set: Data.t -> ?context:'ctxt -> 'value -> unit; + get: Data.t -> 'value; + sets: Data.t -> ?context:'ctxt -> string -> unit; + gets: Data.t -> string; + help: (unit -> string) option; + extra: 'extra; + } + + let new_id = + let last_id = + ref 0 + in + fun () -> incr last_id; !last_id + + let create ?schema ?name ?parse ?print ?default ?update ?help extra = + (* Default value container *) + let v = + ref None + in + + (* If name is not given, create unique one *) + let nm = + match name with + | Some s -> s + | None -> Printf.sprintf "_anon_%d" (new_id ()) + in + + (* Last chance to get a value: the default *) + let default () = + match default with + | Some d -> d + | None -> raise (Not_set (nm, Some (s_ "no default value"))) + in + + (* Get data *) + let get data = + (* Get value *) + try + (Hashtbl.find data nm) (); + match !v with + | Some x -> x + | None -> default () + with Not_found -> + default () + in + + (* Set data *) + let set data ?context x = + let x = + match update with + | Some f -> + begin + try + f ?context (get data) x + with Not_set _ -> + x + end + | None -> + x + in + Hashtbl.replace + data + nm + (fun () -> v := Some x) + in + + (* Parse string value, if possible *) + let parse = + match parse with + | Some f -> + f + | None -> + fun ?context s -> + failwith + (Printf.sprintf + (f_ "Cannot parse field '%s' when setting value %S") + nm + s) + in + + (* Set data, from string *) + let sets data ?context s = + set ?context data (parse ?context s) + in + + (* Output value as string, if possible *) + let print = + match print with + | Some f -> + f + | None -> + fun _ -> raise (No_printer nm) + in + + (* Get data, as a string *) + let gets data = + print (get data) + in + + begin + match schema with + | Some t -> + Schema.add t nm sets gets extra help + | None -> + () + end; + + { + set = set; + get = get; + sets = sets; + gets = gets; + help = help; + extra = extra; + } + + let fset data t ?context x = + t.set data ?context x + + let fget data t = + t.get data + + let fsets data t ?context s = + t.sets data ?context s + + let fgets data t = + t.gets data + end + + + module FieldRO = + struct + let create ?schema ?name ?parse ?print ?default ?update ?help extra = + let fld = + Field.create ?schema ?name ?parse ?print ?default ?update ?help extra + in + fun data -> Field.fget data fld + end +end + +module OASISMessage = struct +(* # 22 "src/oasis/OASISMessage.ml" *) + + + open OASISGettext + open OASISContext + + + let generic_message ~ctxt lvl fmt = + let cond = + if ctxt.quiet then + false + else + match lvl with + | `Debug -> ctxt.debug + | `Info -> ctxt.info + | _ -> true + in + Printf.ksprintf + (fun str -> + if cond then + begin + ctxt.printf lvl str + end) + fmt + + + let debug ~ctxt fmt = + generic_message ~ctxt `Debug fmt + + + let info ~ctxt fmt = + generic_message ~ctxt `Info fmt + + + let warning ~ctxt fmt = + generic_message ~ctxt `Warning fmt + + + let error ~ctxt fmt = + generic_message ~ctxt `Error fmt + +end + +module OASISVersion = struct +(* # 22 "src/oasis/OASISVersion.ml" *) + + + open OASISGettext + + + + + + type s = string + + + type t = string + + + type comparator = + | VGreater of t + | VGreaterEqual of t + | VEqual of t + | VLesser of t + | VLesserEqual of t + | VOr of comparator * comparator + | VAnd of comparator * comparator + + + + (* Range of allowed characters *) + let is_digit c = + '0' <= c && c <= '9' + + + let is_alpha c = + ('a' <= c && c <= 'z') || ('A' <= c && c <= 'Z') + + + let is_special = + function + | '.' | '+' | '-' | '~' -> true + | _ -> false + + + let rec version_compare v1 v2 = + if v1 <> "" || v2 <> "" then + begin + (* Compare ascii string, using special meaning for version + * related char + *) + let val_ascii c = + if c = '~' then -1 + else if is_digit c then 0 + else if c = '\000' then 0 + else if is_alpha c then Char.code c + else (Char.code c) + 256 + in + + let len1 = String.length v1 in + let len2 = String.length v2 in + + let p = ref 0 in + + (** Compare ascii part *) + let compare_vascii () = + let cmp = ref 0 in + while !cmp = 0 && + !p < len1 && !p < len2 && + not (is_digit v1.[!p] && is_digit v2.[!p]) do + cmp := (val_ascii v1.[!p]) - (val_ascii v2.[!p]); + incr p + done; + if !cmp = 0 && !p < len1 && !p = len2 then + val_ascii v1.[!p] + else if !cmp = 0 && !p = len1 && !p < len2 then + - (val_ascii v2.[!p]) + else + !cmp + in + + (** Compare digit part *) + let compare_digit () = + let extract_int v p = + let start_p = !p in + while !p < String.length v && is_digit v.[!p] do + incr p + done; + let substr = + String.sub v !p ((String.length v) - !p) + in + let res = + match String.sub v start_p (!p - start_p) with + | "" -> 0 + | s -> int_of_string s + in + res, substr + in + let i1, tl1 = extract_int v1 (ref !p) in + let i2, tl2 = extract_int v2 (ref !p) in + i1 - i2, tl1, tl2 + in + + match compare_vascii () with + | 0 -> + begin + match compare_digit () with + | 0, tl1, tl2 -> + if tl1 <> "" && is_digit tl1.[0] then + 1 + else if tl2 <> "" && is_digit tl2.[0] then + -1 + else + version_compare tl1 tl2 + | n, _, _ -> + n + end + | n -> + n + end + else + begin + 0 + end + + + let version_of_string str = str + + + let string_of_version t = t + + + let version_compare_string s1 s2 = + version_compare (version_of_string s1) (version_of_string s2) + + + let chop t = + try + let pos = + String.rindex t '.' + in + String.sub t 0 pos + with Not_found -> + t + + + let rec comparator_apply v op = + match op with + | VGreater cv -> + (version_compare v cv) > 0 + | VGreaterEqual cv -> + (version_compare v cv) >= 0 + | VLesser cv -> + (version_compare v cv) < 0 + | VLesserEqual cv -> + (version_compare v cv) <= 0 + | VEqual cv -> + (version_compare v cv) = 0 + | VOr (op1, op2) -> + (comparator_apply v op1) || (comparator_apply v op2) + | VAnd (op1, op2) -> + (comparator_apply v op1) && (comparator_apply v op2) + + + let rec string_of_comparator = + function + | VGreater v -> "> "^(string_of_version v) + | VEqual v -> "= "^(string_of_version v) + | VLesser v -> "< "^(string_of_version v) + | VGreaterEqual v -> ">= "^(string_of_version v) + | VLesserEqual v -> "<= "^(string_of_version v) + | VOr (c1, c2) -> + (string_of_comparator c1)^" || "^(string_of_comparator c2) + | VAnd (c1, c2) -> + (string_of_comparator c1)^" && "^(string_of_comparator c2) + + + let rec varname_of_comparator = + let concat p v = + OASISUtils.varname_concat + p + (OASISUtils.varname_of_string + (string_of_version v)) + in + function + | VGreater v -> concat "gt" v + | VLesser v -> concat "lt" v + | VEqual v -> concat "eq" v + | VGreaterEqual v -> concat "ge" v + | VLesserEqual v -> concat "le" v + | VOr (c1, c2) -> + (varname_of_comparator c1)^"_or_"^(varname_of_comparator c2) + | VAnd (c1, c2) -> + (varname_of_comparator c1)^"_and_"^(varname_of_comparator c2) + + + let rec comparator_ge v' = + let cmp v = version_compare v v' >= 0 in + function + | VEqual v + | VGreaterEqual v + | VGreater v -> cmp v + | VLesserEqual _ + | VLesser _ -> false + | VOr (c1, c2) -> comparator_ge v' c1 || comparator_ge v' c2 + | VAnd (c1, c2) -> comparator_ge v' c1 && comparator_ge v' c2 + + +end + +module OASISLicense = struct +(* # 22 "src/oasis/OASISLicense.ml" *) + + + (** License for _oasis fields + @author Sylvain Le Gall + *) + + + + + + type license = string + + + type license_exception = string + + + type license_version = + | Version of OASISVersion.t + | VersionOrLater of OASISVersion.t + | NoVersion + + + + type license_dep_5_unit = + { + license: license; + excption: license_exception option; + version: license_version; + } + + + + type license_dep_5 = + | DEP5Unit of license_dep_5_unit + | DEP5Or of license_dep_5 list + | DEP5And of license_dep_5 list + + + type t = + | DEP5License of license_dep_5 + | OtherLicense of string (* URL *) + + + +end + +module OASISExpr = struct +(* # 22 "src/oasis/OASISExpr.ml" *) + + + + + + open OASISGettext + + + type test = string + + + type flag = string + + + type t = + | EBool of bool + | ENot of t + | EAnd of t * t + | EOr of t * t + | EFlag of flag + | ETest of test * string + + + + type 'a choices = (t * 'a) list + + + let eval var_get t = + let rec eval' = + function + | EBool b -> + b + + | ENot e -> + not (eval' e) + + | EAnd (e1, e2) -> + (eval' e1) && (eval' e2) + + | EOr (e1, e2) -> + (eval' e1) || (eval' e2) + + | EFlag nm -> + let v = + var_get nm + in + assert(v = "true" || v = "false"); + (v = "true") + + | ETest (nm, vl) -> + let v = + var_get nm + in + (v = vl) + in + eval' t + + + let choose ?printer ?name var_get lst = + let rec choose_aux = + function + | (cond, vl) :: tl -> + if eval var_get cond then + vl + else + choose_aux tl + | [] -> + let str_lst = + if lst = [] then + s_ "" + else + String.concat + (s_ ", ") + (List.map + (fun (cond, vl) -> + match printer with + | Some p -> p vl + | None -> s_ "") + lst) + in + match name with + | Some nm -> + failwith + (Printf.sprintf + (f_ "No result for the choice list '%s': %s") + nm str_lst) + | None -> + failwith + (Printf.sprintf + (f_ "No result for a choice list: %s") + str_lst) + in + choose_aux (List.rev lst) + + +end + +module OASISText = struct +(* # 22 "src/oasis/OASISText.ml" *) + + + + type elt = + | Para of string + | Verbatim of string + | BlankLine + + + type t = elt list + +end + +module OASISTypes = struct +(* # 22 "src/oasis/OASISTypes.ml" *) + + + + + + type name = string + type package_name = string + type url = string + type unix_dirname = string + type unix_filename = string + type host_dirname = string + type host_filename = string + type prog = string + type arg = string + type args = string list + type command_line = (prog * arg list) + + + type findlib_name = string + type findlib_full = string + + + type compiled_object = + | Byte + | Native + | Best + + + + type dependency = + | FindlibPackage of findlib_full * OASISVersion.comparator option + | InternalLibrary of name + + + + type tool = + | ExternalTool of name + | InternalExecutable of name + + + + type vcs = + | Darcs + | Git + | Svn + | Cvs + | Hg + | Bzr + | Arch + | Monotone + | OtherVCS of url + + + + type plugin_kind = + [ `Configure + | `Build + | `Doc + | `Test + | `Install + | `Extra + ] + + + type plugin_data_purpose = + [ `Configure + | `Build + | `Install + | `Clean + | `Distclean + | `Install + | `Uninstall + | `Test + | `Doc + | `Extra + | `Other of string + ] + + + type 'a plugin = 'a * name * OASISVersion.t option + + + type all_plugin = plugin_kind plugin + + + type plugin_data = (all_plugin * plugin_data_purpose * (unit -> unit)) list + + +(* # 115 "src/oasis/OASISTypes.ml" *) + + + type 'a conditional = 'a OASISExpr.choices + + + type custom = + { + pre_command: (command_line option) conditional; + post_command: (command_line option) conditional; + } + + + + type common_section = + { + cs_name: name; + cs_data: PropList.Data.t; + cs_plugin_data: plugin_data; + } + + + + type build_section = + { + bs_build: bool conditional; + bs_install: bool conditional; + bs_path: unix_dirname; + bs_compiled_object: compiled_object; + bs_build_depends: dependency list; + bs_build_tools: tool list; + bs_c_sources: unix_filename list; + bs_data_files: (unix_filename * unix_filename option) list; + bs_ccopt: args conditional; + bs_cclib: args conditional; + bs_dlllib: args conditional; + bs_dllpath: args conditional; + bs_byteopt: args conditional; + bs_nativeopt: args conditional; + } + + + + type library = + { + lib_modules: string list; + lib_pack: bool; + lib_internal_modules: string list; + lib_findlib_parent: findlib_name option; + lib_findlib_name: findlib_name option; + lib_findlib_containers: findlib_name list; + } + + + type object_ = + { + obj_modules: string list; + obj_findlib_fullname: findlib_name list option; + } + + + type executable = + { + exec_custom: bool; + exec_main_is: unix_filename; + } + + + type flag = + { + flag_description: string option; + flag_default: bool conditional; + } + + + type source_repository = + { + src_repo_type: vcs; + src_repo_location: url; + src_repo_browser: url option; + src_repo_module: string option; + src_repo_branch: string option; + src_repo_tag: string option; + src_repo_subdir: unix_filename option; + } + + + type test = + { + test_type: [`Test] plugin; + test_command: command_line conditional; + test_custom: custom; + test_working_directory: unix_filename option; + test_run: bool conditional; + test_tools: tool list; + } + + + type doc_format = + | HTML of unix_filename + | DocText + | PDF + | PostScript + | Info of unix_filename + | DVI + | OtherDoc + + + + type doc = + { + doc_type: [`Doc] plugin; + doc_custom: custom; + doc_build: bool conditional; + doc_install: bool conditional; + doc_install_dir: unix_filename; + doc_title: string; + doc_authors: string list; + doc_abstract: string option; + doc_format: doc_format; + doc_data_files: (unix_filename * unix_filename option) list; + doc_build_tools: tool list; + } + + + type section = + | Library of common_section * build_section * library + | Object of common_section * build_section * object_ + | Executable of common_section * build_section * executable + | Flag of common_section * flag + | SrcRepo of common_section * source_repository + | Test of common_section * test + | Doc of common_section * doc + + + + type section_kind = + [ `Library | `Object | `Executable | `Flag | `SrcRepo | `Test | `Doc ] + + + type package = + { + oasis_version: OASISVersion.t; + ocaml_version: OASISVersion.comparator option; + findlib_version: OASISVersion.comparator option; + alpha_features: string list; + beta_features: string list; + name: package_name; + version: OASISVersion.t; + license: OASISLicense.t; + license_file: unix_filename option; + copyrights: string list; + maintainers: string list; + authors: string list; + homepage: url option; + synopsis: string; + description: OASISText.t option; + categories: url list; + + conf_type: [`Configure] plugin; + conf_custom: custom; + + build_type: [`Build] plugin; + build_custom: custom; + + install_type: [`Install] plugin; + install_custom: custom; + uninstall_custom: custom; + + clean_custom: custom; + distclean_custom: custom; + + files_ab: unix_filename list; + sections: section list; + plugins: [`Extra] plugin list; + disable_oasis_section: unix_filename list; + schema_data: PropList.Data.t; + plugin_data: plugin_data; + } + + +end + +module OASISFeatures = struct +(* # 22 "src/oasis/OASISFeatures.ml" *) + + open OASISTypes + open OASISUtils + open OASISGettext + open OASISVersion + + module MapPlugin = + Map.Make + (struct + type t = plugin_kind * name + let compare = Pervasives.compare + end) + + module Data = + struct + type t = + { + oasis_version: OASISVersion.t; + plugin_versions: OASISVersion.t option MapPlugin.t; + alpha_features: string list; + beta_features: string list; + } + + let create oasis_version alpha_features beta_features = + { + oasis_version = oasis_version; + plugin_versions = MapPlugin.empty; + alpha_features = alpha_features; + beta_features = beta_features + } + + let of_package pkg = + create + pkg.OASISTypes.oasis_version + pkg.OASISTypes.alpha_features + pkg.OASISTypes.beta_features + + let add_plugin (plugin_kind, plugin_name, plugin_version) t = + {t with + plugin_versions = MapPlugin.add + (plugin_kind, plugin_name) + plugin_version + t.plugin_versions} + + let plugin_version plugin_kind plugin_name t = + MapPlugin.find (plugin_kind, plugin_name) t.plugin_versions + + let to_string t = + Printf.sprintf + "oasis_version: %s; alpha_features: %s; beta_features: %s; \ + plugins_version: %s" + (OASISVersion.string_of_version t.oasis_version) + (String.concat ", " t.alpha_features) + (String.concat ", " t.beta_features) + (String.concat ", " + (MapPlugin.fold + (fun (_, plg) ver_opt acc -> + (plg^ + (match ver_opt with + | Some v -> + " "^(OASISVersion.string_of_version v) + | None -> "")) + :: acc) + t.plugin_versions [])) + end + + type origin = + | Field of string * string + | Section of string + | NoOrigin + + type stage = Alpha | Beta + + + let string_of_stage = + function + | Alpha -> "alpha" + | Beta -> "beta" + + + let field_of_stage = + function + | Alpha -> "AlphaFeatures" + | Beta -> "BetaFeatures" + + type publication = InDev of stage | SinceVersion of OASISVersion.t + + type t = + { + name: string; + plugin: all_plugin option; + publication: publication; + description: unit -> string; + } + + (* TODO: mutex protect this. *) + let all_features = Hashtbl.create 13 + + + let since_version ver_str = SinceVersion (version_of_string ver_str) + let alpha = InDev Alpha + let beta = InDev Beta + + + let to_string t = + Printf.sprintf + "feature: %s; plugin: %s; publication: %s" + t.name + (match t.plugin with + | None -> "" + | Some (_, nm, _) -> nm) + (match t.publication with + | InDev stage -> string_of_stage stage + | SinceVersion ver -> ">= "^(OASISVersion.string_of_version ver)) + + let data_check t data origin = + let no_message = "no message" in + + let check_feature features stage = + let has_feature = List.mem t.name features in + if not has_feature then + match origin with + | Field (fld, where) -> + Some + (Printf.sprintf + (f_ "Field %s in %s is only available when feature %s \ + is in field %s.") + fld where t.name (field_of_stage stage)) + | Section sct -> + Some + (Printf.sprintf + (f_ "Section %s is only available when features %s \ + is in field %s.") + sct t.name (field_of_stage stage)) + | NoOrigin -> + Some no_message + else + None + in + + let version_is_good ~min_version version fmt = + let version_is_good = + OASISVersion.comparator_apply + version (OASISVersion.VGreaterEqual min_version) + in + Printf.ksprintf + (fun str -> + if version_is_good then + None + else + Some str) + fmt + in + + match origin, t.plugin, t.publication with + | _, _, InDev Alpha -> check_feature data.Data.alpha_features Alpha + | _, _, InDev Beta -> check_feature data.Data.beta_features Beta + | Field(fld, where), None, SinceVersion min_version -> + version_is_good ~min_version data.Data.oasis_version + (f_ "Field %s in %s is only valid since OASIS v%s, update \ + OASISFormat field from '%s' to '%s' after checking \ + OASIS changelog.") + fld where (string_of_version min_version) + (string_of_version data.Data.oasis_version) + (string_of_version min_version) + + | Field(fld, where), Some(plugin_knd, plugin_name, _), + SinceVersion min_version -> + begin + try + let plugin_version_current = + try + match Data.plugin_version plugin_knd plugin_name data with + | Some ver -> ver + | None -> + failwithf + (f_ "Field %s in %s is only valid for the OASIS \ + plugin %s since v%s, but no plugin version is \ + defined in the _oasis file, change '%s' to \ + '%s (%s)' in your _oasis file.") + fld where plugin_name (string_of_version min_version) + plugin_name + plugin_name (string_of_version min_version) + with Not_found -> + failwithf + (f_ "Field %s in %s is only valid when the OASIS plugin %s \ + is defined.") + fld where plugin_name + in + version_is_good ~min_version plugin_version_current + (f_ "Field %s in %s is only valid for the OASIS plugin %s \ + since v%s, update your plugin from '%s (%s)' to \ + '%s (%s)' after checking the plugin's changelog.") + fld where plugin_name (string_of_version min_version) + plugin_name (string_of_version plugin_version_current) + plugin_name (string_of_version min_version) + with Failure msg -> + Some msg + end + + | Section sct, None, SinceVersion min_version -> + version_is_good ~min_version data.Data.oasis_version + (f_ "Section %s is only valid for since OASIS v%s, update \ + OASISFormat field from '%s' to '%s' after checking OASIS \ + changelog.") + sct (string_of_version min_version) + (string_of_version data.Data.oasis_version) + (string_of_version min_version) + + | Section sct, Some(plugin_knd, plugin_name, _), + SinceVersion min_version -> + begin + try + let plugin_version_current = + try + match Data.plugin_version plugin_knd plugin_name data with + | Some ver -> ver + | None -> + failwithf + (f_ "Section %s is only valid for the OASIS \ + plugin %s since v%s, but no plugin version is \ + defined in the _oasis file, change '%s' to \ + '%s (%s)' in your _oasis file.") + sct plugin_name (string_of_version min_version) + plugin_name + plugin_name (string_of_version min_version) + with Not_found -> + failwithf + (f_ "Section %s is only valid when the OASIS plugin %s \ + is defined.") + sct plugin_name + in + version_is_good ~min_version plugin_version_current + (f_ "Section %s is only valid for the OASIS plugin %s \ + since v%s, update your plugin from '%s (%s)' to \ + '%s (%s)' after checking the plugin's changelog.") + sct plugin_name (string_of_version min_version) + plugin_name (string_of_version plugin_version_current) + plugin_name (string_of_version min_version) + with Failure msg -> + Some msg + end + + | NoOrigin, None, SinceVersion min_version -> + version_is_good ~min_version data.Data.oasis_version "%s" no_message + + | NoOrigin, Some(plugin_knd, plugin_name, _), SinceVersion min_version -> + begin + try + let plugin_version_current = + match Data.plugin_version plugin_knd plugin_name data with + | Some ver -> ver + | None -> raise Not_found + in + version_is_good ~min_version plugin_version_current + "%s" no_message + with Not_found -> + Some no_message + end + + + let data_assert t data origin = + match data_check t data origin with + | None -> () + | Some str -> failwith str + + + let data_test t data = + match data_check t data NoOrigin with + | None -> true + | Some str -> false + + + let package_test t pkg = + data_test t (Data.of_package pkg) + + + let create ?plugin name publication description = + let () = + if Hashtbl.mem all_features name then + failwithf "Feature '%s' is already declared." name + in + let t = + { + name = name; + plugin = plugin; + publication = publication; + description = description; + } + in + Hashtbl.add all_features name t; + t + + + let get_stage name = + try + (Hashtbl.find all_features name).publication + with Not_found -> + failwithf (f_ "Feature %s doesn't exist.") name + + + let list () = + Hashtbl.fold (fun _ v acc -> v :: acc) all_features [] + + (* + * Real flags. + *) + + + let features = + create "features_fields" + (since_version "0.4") + (fun () -> + s_ "Enable to experiment not yet official features.") + + + let flag_docs = + create "flag_docs" + (since_version "0.3") + (fun () -> + s_ "Building docs require '-docs' flag at configure.") + + + let flag_tests = + create "flag_tests" + (since_version "0.3") + (fun () -> + s_ "Running tests require '-tests' flag at configure.") + + + let pack = + create "pack" + (since_version "0.3") + (fun () -> + s_ "Allow to create packed library.") + + + let section_object = + create "section_object" beta + (fun () -> + s_ "Implement an object section.") + + + let dynrun_for_release = + create "dynrun_for_release" alpha + (fun () -> + s_ "Make '-setup-update dynamic' suitable for releasing project.") + + + let compiled_setup_ml = + create "compiled_setup_ml" alpha + (fun () -> + s_ "It compiles the setup.ml and speed-up actions done with it.") + + let disable_oasis_section = + create "disable_oasis_section" alpha + (fun () -> + s_ "Allows the OASIS section comments and digest to be omitted in \ + generated files.") + + let no_automatic_syntax = + create "no_automatic_syntax" alpha + (fun () -> + s_ "Disable the automatic inclusion of -syntax camlp4o for packages \ + that matches the internal heuristic (if a dependency ends with \ + a .syntax or is a well known syntax).") +end + +module OASISUnixPath = struct +(* # 22 "src/oasis/OASISUnixPath.ml" *) + + + type unix_filename = string + type unix_dirname = string + + + type host_filename = string + type host_dirname = string + + + let current_dir_name = "." + + + let parent_dir_name = ".." + + + let is_current_dir fn = + fn = current_dir_name || fn = "" + + + let concat f1 f2 = + if is_current_dir f1 then + f2 + else + let f1' = + try OASISString.strip_ends_with ~what:"/" f1 with Not_found -> f1 + in + f1'^"/"^f2 + + + let make = + function + | hd :: tl -> + List.fold_left + (fun f p -> concat f p) + hd + tl + | [] -> + invalid_arg "OASISUnixPath.make" + + + let dirname f = + try + String.sub f 0 (String.rindex f '/') + with Not_found -> + current_dir_name + + + let basename f = + try + let pos_start = + (String.rindex f '/') + 1 + in + String.sub f pos_start ((String.length f) - pos_start) + with Not_found -> + f + + + let chop_extension f = + try + let last_dot = + String.rindex f '.' + in + let sub = + String.sub f 0 last_dot + in + try + let last_slash = + String.rindex f '/' + in + if last_slash < last_dot then + sub + else + f + with Not_found -> + sub + + with Not_found -> + f + + + let capitalize_file f = + let dir = dirname f in + let base = basename f in + concat dir (OASISString.capitalize_ascii base) + + + let uncapitalize_file f = + let dir = dirname f in + let base = basename f in + concat dir (OASISString.uncapitalize_ascii base) + + +end + +module OASISHostPath = struct +(* # 22 "src/oasis/OASISHostPath.ml" *) + + + open Filename + + + module Unix = OASISUnixPath + + + let make = + function + | [] -> + invalid_arg "OASISHostPath.make" + | hd :: tl -> + List.fold_left Filename.concat hd tl + + + let of_unix ufn = + if Sys.os_type = "Unix" then + ufn + else + make + (List.map + (fun p -> + if p = Unix.current_dir_name then + current_dir_name + else if p = Unix.parent_dir_name then + parent_dir_name + else + p) + (OASISString.nsplit ufn '/')) + + +end + +module OASISSection = struct +(* # 22 "src/oasis/OASISSection.ml" *) + + + open OASISTypes + + + let section_kind_common = + function + | Library (cs, _, _) -> + `Library, cs + | Object (cs, _, _) -> + `Object, cs + | Executable (cs, _, _) -> + `Executable, cs + | Flag (cs, _) -> + `Flag, cs + | SrcRepo (cs, _) -> + `SrcRepo, cs + | Test (cs, _) -> + `Test, cs + | Doc (cs, _) -> + `Doc, cs + + + let section_common sct = + snd (section_kind_common sct) + + + let section_common_set cs = + function + | Library (_, bs, lib) -> Library (cs, bs, lib) + | Object (_, bs, obj) -> Object (cs, bs, obj) + | Executable (_, bs, exec) -> Executable (cs, bs, exec) + | Flag (_, flg) -> Flag (cs, flg) + | SrcRepo (_, src_repo) -> SrcRepo (cs, src_repo) + | Test (_, tst) -> Test (cs, tst) + | Doc (_, doc) -> Doc (cs, doc) + + + (** Key used to identify section + *) + let section_id sct = + let k, cs = + section_kind_common sct + in + k, cs.cs_name + + + let string_of_section sct = + let k, nm = + section_id sct + in + (match k with + | `Library -> "library" + | `Object -> "object" + | `Executable -> "executable" + | `Flag -> "flag" + | `SrcRepo -> "src repository" + | `Test -> "test" + | `Doc -> "doc") + ^" "^nm + + + let section_find id scts = + List.find + (fun sct -> id = section_id sct) + scts + + + module CSection = + struct + type t = section + + let id = section_id + + let compare t1 t2 = + compare (id t1) (id t2) + + let equal t1 t2 = + (id t1) = (id t2) + + let hash t = + Hashtbl.hash (id t) + end + + + module MapSection = Map.Make(CSection) + module SetSection = Set.Make(CSection) + + +end + +module OASISBuildSection = struct +(* # 22 "src/oasis/OASISBuildSection.ml" *) + + +end + +module OASISExecutable = struct +(* # 22 "src/oasis/OASISExecutable.ml" *) + + + open OASISTypes + + + let unix_exec_is (cs, bs, exec) is_native ext_dll suffix_program = + let dir = + OASISUnixPath.concat + bs.bs_path + (OASISUnixPath.dirname exec.exec_main_is) + in + let is_native_exec = + match bs.bs_compiled_object with + | Native -> true + | Best -> is_native () + | Byte -> false + in + + OASISUnixPath.concat + dir + (cs.cs_name^(suffix_program ())), + + if not is_native_exec && + not exec.exec_custom && + bs.bs_c_sources <> [] then + Some (dir^"/dll"^cs.cs_name^"_stubs"^(ext_dll ())) + else + None + + +end + +module OASISLibrary = struct +(* # 22 "src/oasis/OASISLibrary.ml" *) + + + open OASISTypes + open OASISUtils + open OASISGettext + open OASISSection + + + (* Look for a module file, considering capitalization or not. *) + let find_module source_file_exists bs modul = + let possible_base_fn = + List.map + (OASISUnixPath.concat bs.bs_path) + [modul; + OASISUnixPath.uncapitalize_file modul; + OASISUnixPath.capitalize_file modul] + in + (* TODO: we should be able to be able to determine the source for every + * files. Hence we should introduce a Module(source: fn) for the fields + * Modules and InternalModules + *) + List.fold_left + (fun acc base_fn -> + match acc with + | `No_sources _ -> + begin + let file_found = + List.fold_left + (fun acc ext -> + if source_file_exists (base_fn^ext) then + (base_fn^ext) :: acc + else + acc) + [] + [".ml"; ".mli"; ".mll"; ".mly"] + in + match file_found with + | [] -> + acc + | lst -> + `Sources (base_fn, lst) + end + | `Sources _ -> + acc) + (`No_sources possible_base_fn) + possible_base_fn + + + let source_unix_files ~ctxt (cs, bs, lib) source_file_exists = + List.fold_left + (fun acc modul -> + match find_module source_file_exists bs modul with + | `Sources (base_fn, lst) -> + (base_fn, lst) :: acc + | `No_sources _ -> + OASISMessage.warning + ~ctxt + (f_ "Cannot find source file matching \ + module '%s' in library %s") + modul cs.cs_name; + acc) + [] + (lib.lib_modules @ lib.lib_internal_modules) + + + let generated_unix_files + ~ctxt + ~is_native + ~has_native_dynlink + ~ext_lib + ~ext_dll + ~source_file_exists + (cs, bs, lib) = + + let find_modules lst ext = + let find_module modul = + match find_module source_file_exists bs modul with + | `Sources (base_fn, [fn]) when ext <> "cmi" + && Filename.check_suffix fn ".mli" -> + None (* No implementation files for pure interface. *) + | `Sources (base_fn, _) -> + Some [base_fn] + | `No_sources lst -> + OASISMessage.warning + ~ctxt + (f_ "Cannot find source file matching \ + module '%s' in library %s") + modul cs.cs_name; + Some lst + in + List.fold_left + (fun acc nm -> + match find_module nm with + | None -> acc + | Some base_fns -> + List.map (fun base_fn -> base_fn ^"."^ext) base_fns :: acc) + [] + lst + in + + (* The .cmx that be compiled along *) + let cmxs = + let should_be_built = + match bs.bs_compiled_object with + | Native -> true + | Best -> is_native + | Byte -> false + in + if should_be_built then + if lib.lib_pack then + find_modules + [cs.cs_name] + "cmx" + else + find_modules + (lib.lib_modules @ lib.lib_internal_modules) + "cmx" + else + [] + in + + let acc_nopath = + [] + in + + (* The headers and annot/cmt files that should be compiled along *) + let headers = + let sufx = + if lib.lib_pack + then [".cmti"; ".cmt"; ".annot"] + else [".cmi"; ".cmti"; ".cmt"; ".annot"] + in + List.map + begin + List.fold_left + begin fun accu s -> + let dot = String.rindex s '.' in + let base = String.sub s 0 dot in + List.map ((^) base) sufx @ accu + end + [] + end + (find_modules lib.lib_modules "cmi") + in + + (* Compute what libraries should be built *) + let acc_nopath = + (* Add the packed header file if required *) + let add_pack_header acc = + if lib.lib_pack then + [cs.cs_name^".cmi"; cs.cs_name^".cmti"; cs.cs_name^".cmt"] :: acc + else + acc + in + let byte acc = + add_pack_header ([cs.cs_name^".cma"] :: acc) + in + let native acc = + let acc = + add_pack_header + (if has_native_dynlink then + [cs.cs_name^".cmxs"] :: acc + else acc) + in + [cs.cs_name^".cmxa"] :: [cs.cs_name^ext_lib] :: acc + in + match bs.bs_compiled_object with + | Native -> + byte (native acc_nopath) + | Best when is_native -> + byte (native acc_nopath) + | Byte | Best -> + byte acc_nopath + in + + (* Add C library to be built *) + let acc_nopath = + if bs.bs_c_sources <> [] then + begin + ["lib"^cs.cs_name^"_stubs"^ext_lib] + :: + ["dll"^cs.cs_name^"_stubs"^ext_dll] + :: + acc_nopath + end + else + acc_nopath + in + + (* All the files generated *) + List.rev_append + (List.rev_map + (List.rev_map + (OASISUnixPath.concat bs.bs_path)) + acc_nopath) + (headers @ cmxs) + + +end + +module OASISObject = struct +(* # 22 "src/oasis/OASISObject.ml" *) + + + open OASISTypes + open OASISGettext + + + let source_unix_files ~ctxt (cs, bs, obj) source_file_exists = + List.fold_left + (fun acc modul -> + match OASISLibrary.find_module source_file_exists bs modul with + | `Sources (base_fn, lst) -> + (base_fn, lst) :: acc + | `No_sources _ -> + OASISMessage.warning + ~ctxt + (f_ "Cannot find source file matching \ + module '%s' in object %s") + modul cs.cs_name; + acc) + [] + obj.obj_modules + + + let generated_unix_files + ~ctxt + ~is_native + ~source_file_exists + (cs, bs, obj) = + + let find_module ext modul = + match OASISLibrary.find_module source_file_exists bs modul with + | `Sources (base_fn, _) -> [base_fn ^ ext] + | `No_sources lst -> + OASISMessage.warning + ~ctxt + (f_ "Cannot find source file matching \ + module '%s' in object %s") + modul cs.cs_name ; + lst + in + + let header, byte, native, c_object, f = + match obj.obj_modules with + | [ m ] -> (find_module ".cmi" m, + find_module ".cmo" m, + find_module ".cmx" m, + find_module ".o" m, + fun x -> x) + | _ -> ([cs.cs_name ^ ".cmi"], + [cs.cs_name ^ ".cmo"], + [cs.cs_name ^ ".cmx"], + [cs.cs_name ^ ".o"], + OASISUnixPath.concat bs.bs_path) + in + List.map (List.map f) ( + match bs.bs_compiled_object with + | Native -> + native :: c_object :: byte :: header :: [] + | Best when is_native -> + native :: c_object :: byte :: header :: [] + | Byte | Best -> + byte :: header :: []) + + +end + +module OASISFindlib = struct +(* # 22 "src/oasis/OASISFindlib.ml" *) + + + open OASISTypes + open OASISUtils + open OASISGettext + open OASISSection + + + type library_name = name + type findlib_part_name = name + type 'a map_of_findlib_part_name = 'a OASISUtils.MapString.t + + + exception InternalLibraryNotFound of library_name + exception FindlibPackageNotFound of findlib_name + + + type group_t = + | Container of findlib_name * group_t list + | Package of (findlib_name * + common_section * + build_section * + [`Library of library | `Object of object_] * + group_t list) + + + type data = common_section * + build_section * + [`Library of library | `Object of object_] + type tree = + | Node of (data option) * (tree MapString.t) + | Leaf of data + + + let findlib_mapping pkg = + (* Map from library name to either full findlib name or parts + parent. *) + let fndlb_parts_of_lib_name = + let fndlb_parts cs lib = + let name = + match lib.lib_findlib_name with + | Some nm -> nm + | None -> cs.cs_name + in + let name = + String.concat "." (lib.lib_findlib_containers @ [name]) + in + name + in + List.fold_left + (fun mp -> + function + | Library (cs, _, lib) -> + begin + let lib_name = cs.cs_name in + let fndlb_parts = fndlb_parts cs lib in + if MapString.mem lib_name mp then + failwithf + (f_ "The library name '%s' is used more than once.") + lib_name; + match lib.lib_findlib_parent with + | Some lib_name_parent -> + MapString.add + lib_name + (`Unsolved (lib_name_parent, fndlb_parts)) + mp + | None -> + MapString.add + lib_name + (`Solved fndlb_parts) + mp + end + + | Object (cs, _, obj) -> + begin + let obj_name = cs.cs_name in + if MapString.mem obj_name mp then + failwithf + (f_ "The object name '%s' is used more than once.") + obj_name; + let findlib_full_name = match obj.obj_findlib_fullname with + | Some ns -> String.concat "." ns + | None -> obj_name + in + MapString.add + obj_name + (`Solved findlib_full_name) + mp + end + + | Executable _ | Test _ | Flag _ | SrcRepo _ | Doc _ -> + mp) + MapString.empty + pkg.sections + in + + (* Solve the above graph to be only library name to full findlib name. *) + let fndlb_name_of_lib_name = + let rec solve visited mp lib_name lib_name_child = + if SetString.mem lib_name visited then + failwithf + (f_ "Library '%s' is involved in a cycle \ + with regard to findlib naming.") + lib_name; + let visited = SetString.add lib_name visited in + try + match MapString.find lib_name mp with + | `Solved fndlb_nm -> + fndlb_nm, mp + | `Unsolved (lib_nm_parent, post_fndlb_nm) -> + let pre_fndlb_nm, mp = + solve visited mp lib_nm_parent lib_name + in + let fndlb_nm = pre_fndlb_nm^"."^post_fndlb_nm in + fndlb_nm, MapString.add lib_name (`Solved fndlb_nm) mp + with Not_found -> + failwithf + (f_ "Library '%s', which is defined as the findlib parent of \ + library '%s', doesn't exist.") + lib_name lib_name_child + in + let mp = + MapString.fold + (fun lib_name status mp -> + match status with + | `Solved _ -> + (* Solved initialy, no need to go further *) + mp + | `Unsolved _ -> + let _, mp = solve SetString.empty mp lib_name "" in + mp) + fndlb_parts_of_lib_name + fndlb_parts_of_lib_name + in + MapString.map + (function + | `Solved fndlb_nm -> fndlb_nm + | `Unsolved _ -> assert false) + mp + in + + (* Convert an internal library name to a findlib name. *) + let findlib_name_of_library_name lib_nm = + try + MapString.find lib_nm fndlb_name_of_lib_name + with Not_found -> + raise (InternalLibraryNotFound lib_nm) + in + + (* Add a library to the tree. + *) + let add sct mp = + let fndlb_fullname = + let cs, _, _ = sct in + let lib_name = cs.cs_name in + findlib_name_of_library_name lib_name + in + let rec add_children nm_lst (children: tree MapString.t) = + match nm_lst with + | (hd :: tl) -> + begin + let node = + try + add_node tl (MapString.find hd children) + with Not_found -> + (* New node *) + new_node tl + in + MapString.add hd node children + end + | [] -> + (* Should not have a nameless library. *) + assert false + and add_node tl node = + if tl = [] then + begin + match node with + | Node (None, children) -> + Node (Some sct, children) + | Leaf (cs', _, _) | Node (Some (cs', _, _), _) -> + (* TODO: allow to merge Package, i.e. + * archive(byte) = "foo.cma foo_init.cmo" + *) + let cs, _, _ = sct in + failwithf + (f_ "Library '%s' and '%s' have the same findlib name '%s'") + cs.cs_name cs'.cs_name fndlb_fullname + end + else + begin + match node with + | Leaf data -> + Node (Some data, add_children tl MapString.empty) + | Node (data_opt, children) -> + Node (data_opt, add_children tl children) + end + and new_node = + function + | [] -> + Leaf sct + | hd :: tl -> + Node (None, MapString.add hd (new_node tl) MapString.empty) + in + add_children (OASISString.nsplit fndlb_fullname '.') mp + in + + let rec group_of_tree mp = + MapString.fold + (fun nm node acc -> + let cur = + match node with + | Node (Some (cs, bs, lib), children) -> + Package (nm, cs, bs, lib, group_of_tree children) + | Node (None, children) -> + Container (nm, group_of_tree children) + | Leaf (cs, bs, lib) -> + Package (nm, cs, bs, lib, []) + in + cur :: acc) + mp [] + in + + let group_mp = + List.fold_left + (fun mp -> + function + | Library (cs, bs, lib) -> + add (cs, bs, `Library lib) mp + | Object (cs, bs, obj) -> + add (cs, bs, `Object obj) mp + | _ -> + mp) + MapString.empty + pkg.sections + in + + let groups = + group_of_tree group_mp + in + + let library_name_of_findlib_name = + lazy begin + (* Revert findlib_name_of_library_name. *) + MapString.fold + (fun k v mp -> MapString.add v k mp) + fndlb_name_of_lib_name + MapString.empty + end + in + let library_name_of_findlib_name fndlb_nm = + try + MapString.find fndlb_nm (Lazy.force library_name_of_findlib_name) + with Not_found -> + raise (FindlibPackageNotFound fndlb_nm) + in + + groups, + findlib_name_of_library_name, + library_name_of_findlib_name + + + let findlib_of_group = + function + | Container (fndlb_nm, _) + | Package (fndlb_nm, _, _, _, _) -> fndlb_nm + + + let root_of_group grp = + let rec root_lib_aux = + (* We do a DFS in the group. *) + function + | Container (_, children) -> + List.fold_left + (fun res grp -> + if res = None then + root_lib_aux grp + else + res) + None + children + | Package (_, cs, bs, lib, _) -> + Some (cs, bs, lib) + in + match root_lib_aux grp with + | Some res -> + res + | None -> + failwithf + (f_ "Unable to determine root library of findlib library '%s'") + (findlib_of_group grp) + + +end + +module OASISFlag = struct +(* # 22 "src/oasis/OASISFlag.ml" *) + + +end + +module OASISPackage = struct +(* # 22 "src/oasis/OASISPackage.ml" *) + + +end + +module OASISSourceRepository = struct +(* # 22 "src/oasis/OASISSourceRepository.ml" *) + + +end + +module OASISTest = struct +(* # 22 "src/oasis/OASISTest.ml" *) + + +end + +module OASISDocument = struct +(* # 22 "src/oasis/OASISDocument.ml" *) + + +end + +module OASISExec = struct +(* # 22 "src/oasis/OASISExec.ml" *) + + + open OASISGettext + open OASISUtils + open OASISMessage + + + (* TODO: I don't like this quote, it is there because $(rm) foo expands to + * 'rm -f' foo... + *) + let run ~ctxt ?f_exit_code ?(quote=true) cmd args = + let cmd = + if quote then + if Sys.os_type = "Win32" then + if String.contains cmd ' ' then + (* Double the 1st double quote... win32... sigh *) + "\""^(Filename.quote cmd) + else + cmd + else + Filename.quote cmd + else + cmd + in + let cmdline = + String.concat " " (cmd :: args) + in + info ~ctxt (f_ "Running command '%s'") cmdline; + match f_exit_code, Sys.command cmdline with + | None, 0 -> () + | None, i -> + failwithf + (f_ "Command '%s' terminated with error code %d") + cmdline i + | Some f, i -> + f i + + + let run_read_output ~ctxt ?f_exit_code cmd args = + let fn = + Filename.temp_file "oasis-" ".txt" + in + try + begin + let () = + run ~ctxt ?f_exit_code cmd (args @ [">"; Filename.quote fn]) + in + let chn = + open_in fn + in + let routput = + ref [] + in + begin + try + while true do + routput := (input_line chn) :: !routput + done + with End_of_file -> + () + end; + close_in chn; + Sys.remove fn; + List.rev !routput + end + with e -> + (try Sys.remove fn with _ -> ()); + raise e + + + let run_read_one_line ~ctxt ?f_exit_code cmd args = + match run_read_output ~ctxt ?f_exit_code cmd args with + | [fst] -> + fst + | lst -> + failwithf + (f_ "Command return unexpected output %S") + (String.concat "\n" lst) +end + +module OASISFileUtil = struct +(* # 22 "src/oasis/OASISFileUtil.ml" *) + + + open OASISGettext + + + let file_exists_case fn = + let dirname = Filename.dirname fn in + let basename = Filename.basename fn in + if Sys.file_exists dirname then + if basename = Filename.current_dir_name then + true + else + List.mem + basename + (Array.to_list (Sys.readdir dirname)) + else + false + + + let find_file ?(case_sensitive=true) paths exts = + + (* Cardinal product of two list *) + let ( * ) lst1 lst2 = + List.flatten + (List.map + (fun a -> + List.map + (fun b -> a, b) + lst2) + lst1) + in + + let rec combined_paths lst = + match lst with + | p1 :: p2 :: tl -> + let acc = + (List.map + (fun (a, b) -> Filename.concat a b) + (p1 * p2)) + in + combined_paths (acc :: tl) + | [e] -> + e + | [] -> + [] + in + + let alternatives = + List.map + (fun (p, e) -> + if String.length e > 0 && e.[0] <> '.' then + p ^ "." ^ e + else + p ^ e) + ((combined_paths paths) * exts) + in + List.find (fun file -> + (if case_sensitive then + file_exists_case file + else + Sys.file_exists file) + && not (Sys.is_directory file) + ) alternatives + + + let which ~ctxt prg = + let path_sep = + match Sys.os_type with + | "Win32" -> + ';' + | _ -> + ':' + in + let path_lst = OASISString.nsplit (Sys.getenv "PATH") path_sep in + let exec_ext = + match Sys.os_type with + | "Win32" -> + "" :: (OASISString.nsplit (Sys.getenv "PATHEXT") path_sep) + | _ -> + [""] + in + find_file ~case_sensitive:false [path_lst; [prg]] exec_ext + + + (**/**) + let rec fix_dir dn = + (* Windows hack because Sys.file_exists "src\\" = false when + * Sys.file_exists "src" = true + *) + let ln = + String.length dn + in + if Sys.os_type = "Win32" && ln > 0 && dn.[ln - 1] = '\\' then + fix_dir (String.sub dn 0 (ln - 1)) + else + dn + + + let q = Filename.quote + (**/**) + + + let cp ~ctxt ?(recurse=false) src tgt = + if recurse then + match Sys.os_type with + | "Win32" -> + OASISExec.run ~ctxt + "xcopy" [q src; q tgt; "/E"] + | _ -> + OASISExec.run ~ctxt + "cp" ["-r"; q src; q tgt] + else + OASISExec.run ~ctxt + (match Sys.os_type with + | "Win32" -> "copy" + | _ -> "cp") + [q src; q tgt] + + + let mkdir ~ctxt tgt = + OASISExec.run ~ctxt + (match Sys.os_type with + | "Win32" -> "md" + | _ -> "mkdir") + [q tgt] + + + let rec mkdir_parent ~ctxt f tgt = + let tgt = + fix_dir tgt + in + if Sys.file_exists tgt then + begin + if not (Sys.is_directory tgt) then + OASISUtils.failwithf + (f_ "Cannot create directory '%s', a file of the same name already \ + exists") + tgt + end + else + begin + mkdir_parent ~ctxt f (Filename.dirname tgt); + if not (Sys.file_exists tgt) then + begin + f tgt; + mkdir ~ctxt tgt + end + end + + + let rmdir ~ctxt tgt = + if Sys.readdir tgt = [||] then begin + match Sys.os_type with + | "Win32" -> + OASISExec.run ~ctxt "rd" [q tgt] + | _ -> + OASISExec.run ~ctxt "rm" ["-r"; q tgt] + end else begin + OASISMessage.error ~ctxt + (f_ "Cannot remove directory '%s': not empty.") + tgt + end + + + let glob ~ctxt fn = + let basename = + Filename.basename fn + in + if String.length basename >= 2 && + basename.[0] = '*' && + basename.[1] = '.' then + begin + let ext_len = + (String.length basename) - 2 + in + let ext = + String.sub basename 2 ext_len + in + let dirname = + Filename.dirname fn + in + Array.fold_left + (fun acc fn -> + try + let fn_ext = + String.sub + fn + ((String.length fn) - ext_len) + ext_len + in + if fn_ext = ext then + (Filename.concat dirname fn) :: acc + else + acc + with Invalid_argument _ -> + acc) + [] + (Sys.readdir dirname) + end + else + begin + if file_exists_case fn then + [fn] + else + [] + end +end + + +# 2916 "setup.ml" +module BaseEnvLight = struct +(* # 22 "src/base/BaseEnvLight.ml" *) + + + module MapString = Map.Make(String) + + + type t = string MapString.t + + + let default_filename = + Filename.concat + (Sys.getcwd ()) + "setup.data" + + + let load ?(allow_empty=false) ?(filename=default_filename) () = + if Sys.file_exists filename then + begin + let chn = + open_in_bin filename + in + let st = + Stream.of_channel chn + in + let line = + ref 1 + in + let st_line = + Stream.from + (fun _ -> + try + match Stream.next st with + | '\n' -> incr line; Some '\n' + | c -> Some c + with Stream.Failure -> None) + in + let lexer = + Genlex.make_lexer ["="] st_line + in + let rec read_file mp = + match Stream.npeek 3 lexer with + | [Genlex.Ident nm; Genlex.Kwd "="; Genlex.String value] -> + Stream.junk lexer; + Stream.junk lexer; + Stream.junk lexer; + read_file (MapString.add nm value mp) + | [] -> + mp + | _ -> + failwith + (Printf.sprintf + "Malformed data file '%s' line %d" + filename !line) + in + let mp = + read_file MapString.empty + in + close_in chn; + mp + end + else if allow_empty then + begin + MapString.empty + end + else + begin + failwith + (Printf.sprintf + "Unable to load environment, the file '%s' doesn't exist." + filename) + end + + + let rec var_expand str env = + let buff = + Buffer.create ((String.length str) * 2) + in + Buffer.add_substitute + buff + (fun var -> + try + var_expand (MapString.find var env) env + with Not_found -> + failwith + (Printf.sprintf + "No variable %s defined when trying to expand %S." + var + str)) + str; + Buffer.contents buff + + + let var_get name env = + var_expand (MapString.find name env) env + + + let var_choose lst env = + OASISExpr.choose + (fun nm -> var_get nm env) + lst +end + + +# 3021 "setup.ml" +module BaseContext = struct +(* # 22 "src/base/BaseContext.ml" *) + + (* TODO: get rid of this module. *) + open OASISContext + + + let args () = fst (fspecs ()) + + + let default = default + +end + +module BaseMessage = struct +(* # 22 "src/base/BaseMessage.ml" *) + + + (** Message to user, overrid for Base + @author Sylvain Le Gall + *) + open OASISMessage + open BaseContext + + + let debug fmt = debug ~ctxt:!default fmt + + + let info fmt = info ~ctxt:!default fmt + + + let warning fmt = warning ~ctxt:!default fmt + + + let error fmt = error ~ctxt:!default fmt + +end + +module BaseEnv = struct +(* # 22 "src/base/BaseEnv.ml" *) + + open OASISGettext + open OASISUtils + open PropList + + + module MapString = BaseEnvLight.MapString + + + type origin_t = + | ODefault + | OGetEnv + | OFileLoad + | OCommandLine + + + type cli_handle_t = + | CLINone + | CLIAuto + | CLIWith + | CLIEnable + | CLIUser of (Arg.key * Arg.spec * Arg.doc) list + + + type definition_t = + { + hide: bool; + dump: bool; + cli: cli_handle_t; + arg_help: string option; + group: string option; + } + + + let schema = + Schema.create "environment" + + + (* Environment data *) + let env = + Data.create () + + + (* Environment data from file *) + let env_from_file = + ref MapString.empty + + + (* Lexer for var *) + let var_lxr = + Genlex.make_lexer [] + + + let rec var_expand str = + let buff = + Buffer.create ((String.length str) * 2) + in + Buffer.add_substitute + buff + (fun var -> + try + (* TODO: this is a quick hack to allow calling Test.Command + * without defining executable name really. I.e. if there is + * an exec Executable toto, then $(toto) should be replace + * by its real name. It is however useful to have this function + * for other variable that depend on the host and should be + * written better than that. + *) + let st = + var_lxr (Stream.of_string var) + in + match Stream.npeek 3 st with + | [Genlex.Ident "utoh"; Genlex.Ident nm] -> + OASISHostPath.of_unix (var_get nm) + | [Genlex.Ident "utoh"; Genlex.String s] -> + OASISHostPath.of_unix s + | [Genlex.Ident "ocaml_escaped"; Genlex.Ident nm] -> + String.escaped (var_get nm) + | [Genlex.Ident "ocaml_escaped"; Genlex.String s] -> + String.escaped s + | [Genlex.Ident nm] -> + var_get nm + | _ -> + failwithf + (f_ "Unknown expression '%s' in variable expansion of %s.") + var + str + with + | Unknown_field (_, _) -> + failwithf + (f_ "No variable %s defined when trying to expand %S.") + var + str + | Stream.Error e -> + failwithf + (f_ "Syntax error when parsing '%s' when trying to \ + expand %S: %s") + var + str + e) + str; + Buffer.contents buff + + + and var_get name = + let vl = + try + Schema.get schema env name + with Unknown_field _ as e -> + begin + try + MapString.find name !env_from_file + with Not_found -> + raise e + end + in + var_expand vl + + + let var_choose ?printer ?name lst = + OASISExpr.choose + ?printer + ?name + var_get + lst + + + let var_protect vl = + let buff = + Buffer.create (String.length vl) + in + String.iter + (function + | '$' -> Buffer.add_string buff "\\$" + | c -> Buffer.add_char buff c) + vl; + Buffer.contents buff + + + let var_define + ?(hide=false) + ?(dump=true) + ?short_desc + ?(cli=CLINone) + ?arg_help + ?group + name (* TODO: type constraint on the fact that name must be a valid OCaml + id *) + dflt = + + let default = + [ + OFileLoad, (fun () -> MapString.find name !env_from_file); + ODefault, dflt; + OGetEnv, (fun () -> Sys.getenv name); + ] + in + + let extra = + { + hide = hide; + dump = dump; + cli = cli; + arg_help = arg_help; + group = group; + } + in + + (* Try to find a value that can be defined + *) + let var_get_low lst = + let errors, res = + List.fold_left + (fun (errors, res) (o, v) -> + if res = None then + begin + try + errors, Some (v ()) + with + | Not_found -> + errors, res + | Failure rsn -> + (rsn :: errors), res + | e -> + (Printexc.to_string e) :: errors, res + end + else + errors, res) + ([], None) + (List.sort + (fun (o1, _) (o2, _) -> + Pervasives.compare o2 o1) + lst) + in + match res, errors with + | Some v, _ -> + v + | None, [] -> + raise (Not_set (name, None)) + | None, lst -> + raise (Not_set (name, Some (String.concat (s_ ", ") lst))) + in + + let help = + match short_desc with + | Some fs -> Some fs + | None -> None + in + + let var_get_lst = + FieldRO.create + ~schema + ~name + ~parse:(fun ?(context=ODefault) s -> [context, fun () -> s]) + ~print:var_get_low + ~default + ~update:(fun ?context x old_x -> x @ old_x) + ?help + extra + in + + fun () -> + var_expand (var_get_low (var_get_lst env)) + + + let var_redefine + ?hide + ?dump + ?short_desc + ?cli + ?arg_help + ?group + name + dflt = + if Schema.mem schema name then + begin + (* TODO: look suspsicious, we want to memorize dflt not dflt () *) + Schema.set schema env ~context:ODefault name (dflt ()); + fun () -> var_get name + end + else + begin + var_define + ?hide + ?dump + ?short_desc + ?cli + ?arg_help + ?group + name + dflt + end + + + let var_ignore (e: unit -> string) = () + + + let print_hidden = + var_define + ~hide:true + ~dump:false + ~cli:CLIAuto + ~arg_help:"Print even non-printable variable. (debug)" + "print_hidden" + (fun () -> "false") + + + let var_all () = + List.rev + (Schema.fold + (fun acc nm def _ -> + if not def.hide || bool_of_string (print_hidden ()) then + nm :: acc + else + acc) + [] + schema) + + + let default_filename = + BaseEnvLight.default_filename + + + let load ?allow_empty ?filename () = + env_from_file := BaseEnvLight.load ?allow_empty ?filename () + + + let unload () = + env_from_file := MapString.empty; + Data.clear env + + + let dump ?(filename=default_filename) () = + let chn = + open_out_bin filename + in + let output nm value = + Printf.fprintf chn "%s=%S\n" nm value + in + let mp_todo = + (* Dump data from schema *) + Schema.fold + (fun mp_todo nm def _ -> + if def.dump then + begin + try + let value = + Schema.get + schema + env + nm + in + output nm value + with Not_set _ -> + () + end; + MapString.remove nm mp_todo) + !env_from_file + schema + in + (* Dump data defined outside of schema *) + MapString.iter output mp_todo; + + (* End of the dump *) + close_out chn + + + let print () = + let printable_vars = + Schema.fold + (fun acc nm def short_descr_opt -> + if not def.hide || bool_of_string (print_hidden ()) then + begin + try + let value = + Schema.get + schema + env + nm + in + let txt = + match short_descr_opt with + | Some s -> s () + | None -> nm + in + (txt, value) :: acc + with Not_set _ -> + acc + end + else + acc) + [] + schema + in + let max_length = + List.fold_left max 0 + (List.rev_map String.length + (List.rev_map fst printable_vars)) + in + let dot_pad str = + String.make ((max_length - (String.length str)) + 3) '.' + in + + Printf.printf "\nConfiguration: \n"; + List.iter + (fun (name, value) -> + Printf.printf "%s: %s %s\n" name (dot_pad name) value) + (List.rev printable_vars); + Printf.printf "\n%!" + + + let args () = + let arg_concat = + OASISUtils.varname_concat ~hyphen:'-' + in + [ + "--override", + Arg.Tuple + ( + let rvr = ref "" + in + let rvl = ref "" + in + [ + Arg.Set_string rvr; + Arg.Set_string rvl; + Arg.Unit + (fun () -> + Schema.set + schema + env + ~context:OCommandLine + !rvr + !rvl) + ] + ), + "var+val Override any configuration variable."; + + ] + @ + List.flatten + (Schema.fold + (fun acc name def short_descr_opt -> + let var_set s = + Schema.set + schema + env + ~context:OCommandLine + name + s + in + + let arg_name = + OASISUtils.varname_of_string ~hyphen:'-' name + in + + let hlp = + match short_descr_opt with + | Some txt -> txt () + | None -> "" + in + + let arg_hlp = + match def.arg_help with + | Some s -> s + | None -> "str" + in + + let default_value = + try + Printf.sprintf + (f_ " [%s]") + (Schema.get + schema + env + name) + with Not_set _ -> + "" + in + + let args = + match def.cli with + | CLINone -> + [] + | CLIAuto -> + [ + arg_concat "--" arg_name, + Arg.String var_set, + Printf.sprintf (f_ "%s %s%s") arg_hlp hlp default_value + ] + | CLIWith -> + [ + arg_concat "--with-" arg_name, + Arg.String var_set, + Printf.sprintf (f_ "%s %s%s") arg_hlp hlp default_value + ] + | CLIEnable -> + let dflt = + if default_value = " [true]" then + s_ " [default: enabled]" + else + s_ " [default: disabled]" + in + [ + arg_concat "--enable-" arg_name, + Arg.Unit (fun () -> var_set "true"), + Printf.sprintf (f_ " %s%s") hlp dflt; + + arg_concat "--disable-" arg_name, + Arg.Unit (fun () -> var_set "false"), + Printf.sprintf (f_ " %s%s") hlp dflt + ] + | CLIUser lst -> + lst + in + args :: acc) + [] + schema) +end + +module BaseArgExt = struct +(* # 22 "src/base/BaseArgExt.ml" *) + + + open OASISUtils + open OASISGettext + + + let parse argv args = + (* Simulate command line for Arg *) + let current = + ref 0 + in + + try + Arg.parse_argv + ~current:current + (Array.concat [[|"none"|]; argv]) + (Arg.align args) + (failwithf (f_ "Don't know what to do with arguments: '%s'")) + (s_ "configure options:") + with + | Arg.Help txt -> + print_endline txt; + exit 0 + | Arg.Bad txt -> + prerr_endline txt; + exit 1 +end + +module BaseCheck = struct +(* # 22 "src/base/BaseCheck.ml" *) + + + open BaseEnv + open BaseMessage + open OASISUtils + open OASISGettext + + + let prog_best prg prg_lst = + var_redefine + prg + (fun () -> + let alternate = + List.fold_left + (fun res e -> + match res with + | Some _ -> + res + | None -> + try + Some (OASISFileUtil.which ~ctxt:!BaseContext.default e) + with Not_found -> + None) + None + prg_lst + in + match alternate with + | Some prg -> prg + | None -> raise Not_found) + + + let prog prg = + prog_best prg [prg] + + + let prog_opt prg = + prog_best prg [prg^".opt"; prg] + + + let ocamlfind = + prog "ocamlfind" + + + let version + var_prefix + cmp + fversion + () = + (* Really compare version provided *) + let var = + var_prefix^"_version_"^(OASISVersion.varname_of_comparator cmp) + in + var_redefine + ~hide:true + var + (fun () -> + let version_str = + match fversion () with + | "[Distributed with OCaml]" -> + begin + try + (var_get "ocaml_version") + with Not_found -> + warning + (f_ "Variable ocaml_version not defined, fallback \ + to default"); + Sys.ocaml_version + end + | res -> + res + in + let version = + OASISVersion.version_of_string version_str + in + if OASISVersion.comparator_apply version cmp then + version_str + else + failwithf + (f_ "Cannot satisfy version constraint on %s: %s (version: %s)") + var_prefix + (OASISVersion.string_of_comparator cmp) + version_str) + () + + + let package_version pkg = + OASISExec.run_read_one_line ~ctxt:!BaseContext.default + (ocamlfind ()) + ["query"; "-format"; "%v"; pkg] + + + let package ?version_comparator pkg () = + let var = + OASISUtils.varname_concat + "pkg_" + (OASISUtils.varname_of_string pkg) + in + let findlib_dir pkg = + let dir = + OASISExec.run_read_one_line ~ctxt:!BaseContext.default + (ocamlfind ()) + ["query"; "-format"; "%d"; pkg] + in + if Sys.file_exists dir && Sys.is_directory dir then + dir + else + failwithf + (f_ "When looking for findlib package %s, \ + directory %s return doesn't exist") + pkg dir + in + let vl = + var_redefine + var + (fun () -> findlib_dir pkg) + () + in + ( + match version_comparator with + | Some ver_cmp -> + ignore + (version + var + ver_cmp + (fun _ -> package_version pkg) + ()) + | None -> + () + ); + vl +end + +module BaseOCamlcConfig = struct +(* # 22 "src/base/BaseOCamlcConfig.ml" *) + + + open BaseEnv + open OASISUtils + open OASISGettext + + + module SMap = Map.Make(String) + + + let ocamlc = + BaseCheck.prog_opt "ocamlc" + + + let ocamlc_config_map = + (* Map name to value for ocamlc -config output + (name ^": "^value) + *) + let rec split_field mp lst = + match lst with + | line :: tl -> + let mp = + try + let pos_semicolon = + String.index line ':' + in + if pos_semicolon > 1 then + ( + let name = + String.sub line 0 pos_semicolon + in + let linelen = + String.length line + in + let value = + if linelen > pos_semicolon + 2 then + String.sub + line + (pos_semicolon + 2) + (linelen - pos_semicolon - 2) + else + "" + in + SMap.add name value mp + ) + else + ( + mp + ) + with Not_found -> + ( + mp + ) + in + split_field mp tl + | [] -> + mp + in + + let cache = + lazy + (var_protect + (Marshal.to_string + (split_field + SMap.empty + (OASISExec.run_read_output + ~ctxt:!BaseContext.default + (ocamlc ()) ["-config"])) + [])) + in + var_redefine + "ocamlc_config_map" + ~hide:true + ~dump:false + (fun () -> + (* TODO: update if ocamlc change !!! *) + Lazy.force cache) + + + let var_define nm = + (* Extract data from ocamlc -config *) + let avlbl_config_get () = + Marshal.from_string + (ocamlc_config_map ()) + 0 + in + let chop_version_suffix s = + try + String.sub s 0 (String.index s '+') + with _ -> + s + in + + let nm_config, value_config = + match nm with + | "ocaml_version" -> + "version", chop_version_suffix + | _ -> nm, (fun x -> x) + in + var_redefine + nm + (fun () -> + try + let map = + avlbl_config_get () + in + let value = + SMap.find nm_config map + in + value_config value + with Not_found -> + failwithf + (f_ "Cannot find field '%s' in '%s -config' output") + nm + (ocamlc ())) + +end + +module BaseStandardVar = struct +(* # 22 "src/base/BaseStandardVar.ml" *) + + + open OASISGettext + open OASISTypes + open OASISExpr + open BaseCheck + open BaseEnv + + + let ocamlfind = BaseCheck.ocamlfind + let ocamlc = BaseOCamlcConfig.ocamlc + let ocamlopt = prog_opt "ocamlopt" + let ocamlbuild = prog "ocamlbuild" + + + (**/**) + let rpkg = + ref None + + + let pkg_get () = + match !rpkg with + | Some pkg -> pkg + | None -> failwith (s_ "OASIS Package is not set") + + + let var_cond = ref [] + + + let var_define_cond ~since_version f dflt = + let holder = ref (fun () -> dflt) in + let since_version = + OASISVersion.VGreaterEqual (OASISVersion.version_of_string since_version) + in + var_cond := + (fun ver -> + if OASISVersion.comparator_apply ver since_version then + holder := f ()) :: !var_cond; + fun () -> !holder () + + + (**/**) + + + let pkg_name = + var_define + ~short_desc:(fun () -> s_ "Package name") + "pkg_name" + (fun () -> (pkg_get ()).name) + + + let pkg_version = + var_define + ~short_desc:(fun () -> s_ "Package version") + "pkg_version" + (fun () -> + (OASISVersion.string_of_version (pkg_get ()).version)) + + + let c = BaseOCamlcConfig.var_define + + + let os_type = c "os_type" + let system = c "system" + let architecture = c "architecture" + let ccomp_type = c "ccomp_type" + let ocaml_version = c "ocaml_version" + + + (* TODO: Check standard variable presence at runtime *) + + + let standard_library_default = c "standard_library_default" + let standard_library = c "standard_library" + let standard_runtime = c "standard_runtime" + let bytecomp_c_compiler = c "bytecomp_c_compiler" + let native_c_compiler = c "native_c_compiler" + let model = c "model" + let ext_obj = c "ext_obj" + let ext_asm = c "ext_asm" + let ext_lib = c "ext_lib" + let ext_dll = c "ext_dll" + let default_executable_name = c "default_executable_name" + let systhread_supported = c "systhread_supported" + + + let flexlink = + BaseCheck.prog "flexlink" + + + let flexdll_version = + var_define + ~short_desc:(fun () -> "FlexDLL version (Win32)") + "flexdll_version" + (fun () -> + let lst = + OASISExec.run_read_output ~ctxt:!BaseContext.default + (flexlink ()) ["-help"] + in + match lst with + | line :: _ -> + Scanf.sscanf line "FlexDLL version %s" (fun ver -> ver) + | [] -> + raise Not_found) + + + (**/**) + let p name hlp dflt = + var_define + ~short_desc:hlp + ~cli:CLIAuto + ~arg_help:"dir" + name + dflt + + + let (/) a b = + if os_type () = Sys.os_type then + Filename.concat a b + else if os_type () = "Unix" then + OASISUnixPath.concat a b + else + OASISUtils.failwithf (f_ "Cannot handle os_type %s filename concat") + (os_type ()) + (**/**) + + + let prefix = + p "prefix" + (fun () -> s_ "Install architecture-independent files dir") + (fun () -> + match os_type () with + | "Win32" -> + let program_files = + Sys.getenv "PROGRAMFILES" + in + program_files/(pkg_name ()) + | _ -> + "/usr/local") + + + let exec_prefix = + p "exec_prefix" + (fun () -> s_ "Install architecture-dependent files in dir") + (fun () -> "$prefix") + + + let bindir = + p "bindir" + (fun () -> s_ "User executables") + (fun () -> "$exec_prefix"/"bin") + + + let sbindir = + p "sbindir" + (fun () -> s_ "System admin executables") + (fun () -> "$exec_prefix"/"sbin") + + + let libexecdir = + p "libexecdir" + (fun () -> s_ "Program executables") + (fun () -> "$exec_prefix"/"libexec") + + + let sysconfdir = + p "sysconfdir" + (fun () -> s_ "Read-only single-machine data") + (fun () -> "$prefix"/"etc") + + + let sharedstatedir = + p "sharedstatedir" + (fun () -> s_ "Modifiable architecture-independent data") + (fun () -> "$prefix"/"com") + + + let localstatedir = + p "localstatedir" + (fun () -> s_ "Modifiable single-machine data") + (fun () -> "$prefix"/"var") + + + let libdir = + p "libdir" + (fun () -> s_ "Object code libraries") + (fun () -> "$exec_prefix"/"lib") + + + let datarootdir = + p "datarootdir" + (fun () -> s_ "Read-only arch-independent data root") + (fun () -> "$prefix"/"share") + + + let datadir = + p "datadir" + (fun () -> s_ "Read-only architecture-independent data") + (fun () -> "$datarootdir") + + + let infodir = + p "infodir" + (fun () -> s_ "Info documentation") + (fun () -> "$datarootdir"/"info") + + + let localedir = + p "localedir" + (fun () -> s_ "Locale-dependent data") + (fun () -> "$datarootdir"/"locale") + + + let mandir = + p "mandir" + (fun () -> s_ "Man documentation") + (fun () -> "$datarootdir"/"man") + + + let docdir = + p "docdir" + (fun () -> s_ "Documentation root") + (fun () -> "$datarootdir"/"doc"/"$pkg_name") + + + let htmldir = + p "htmldir" + (fun () -> s_ "HTML documentation") + (fun () -> "$docdir") + + + let dvidir = + p "dvidir" + (fun () -> s_ "DVI documentation") + (fun () -> "$docdir") + + + let pdfdir = + p "pdfdir" + (fun () -> s_ "PDF documentation") + (fun () -> "$docdir") + + + let psdir = + p "psdir" + (fun () -> s_ "PS documentation") + (fun () -> "$docdir") + + + let destdir = + p "destdir" + (fun () -> s_ "Prepend a path when installing package") + (fun () -> + raise + (PropList.Not_set + ("destdir", + Some (s_ "undefined by construct")))) + + + let findlib_version = + var_define + "findlib_version" + (fun () -> + BaseCheck.package_version "findlib") + + + let is_native = + var_define + "is_native" + (fun () -> + try + let _s: string = + ocamlopt () + in + "true" + with PropList.Not_set _ -> + let _s: string = + ocamlc () + in + "false") + + + let ext_program = + var_define + "suffix_program" + (fun () -> + match os_type () with + | "Win32" | "Cygwin" -> ".exe" + | _ -> "") + + + let rm = + var_define + ~short_desc:(fun () -> s_ "Remove a file.") + "rm" + (fun () -> + match os_type () with + | "Win32" -> "del" + | _ -> "rm -f") + + + let rmdir = + var_define + ~short_desc:(fun () -> s_ "Remove a directory.") + "rmdir" + (fun () -> + match os_type () with + | "Win32" -> "rd" + | _ -> "rm -rf") + + + let debug = + var_define + ~short_desc:(fun () -> s_ "Turn ocaml debug flag on") + ~cli:CLIEnable + "debug" + (fun () -> "true") + + + let profile = + var_define + ~short_desc:(fun () -> s_ "Turn ocaml profile flag on") + ~cli:CLIEnable + "profile" + (fun () -> "false") + + + let tests = + var_define_cond ~since_version:"0.3" + (fun () -> + var_define + ~short_desc:(fun () -> + s_ "Compile tests executable and library and run them") + ~cli:CLIEnable + "tests" + (fun () -> "false")) + "true" + + + let docs = + var_define_cond ~since_version:"0.3" + (fun () -> + var_define + ~short_desc:(fun () -> s_ "Create documentations") + ~cli:CLIEnable + "docs" + (fun () -> "true")) + "true" + + + let native_dynlink = + var_define + ~short_desc:(fun () -> s_ "Compiler support generation of .cmxs.") + ~cli:CLINone + "native_dynlink" + (fun () -> + let res = + let ocaml_lt_312 () = + OASISVersion.comparator_apply + (OASISVersion.version_of_string (ocaml_version ())) + (OASISVersion.VLesser + (OASISVersion.version_of_string "3.12.0")) + in + let flexdll_lt_030 () = + OASISVersion.comparator_apply + (OASISVersion.version_of_string (flexdll_version ())) + (OASISVersion.VLesser + (OASISVersion.version_of_string "0.30")) + in + let has_native_dynlink = + let ocamlfind = ocamlfind () in + try + let fn = + OASISExec.run_read_one_line + ~ctxt:!BaseContext.default + ocamlfind + ["query"; "-predicates"; "native"; "dynlink"; + "-format"; "%d/%a"] + in + Sys.file_exists fn + with _ -> + false + in + if not has_native_dynlink then + false + else if ocaml_lt_312 () then + false + else if (os_type () = "Win32" || os_type () = "Cygwin") + && flexdll_lt_030 () then + begin + BaseMessage.warning + (f_ ".cmxs generation disabled because FlexDLL needs to be \ + at least 0.30. Please upgrade FlexDLL from %s to 0.30.") + (flexdll_version ()); + false + end + else + true + in + string_of_bool res) + + + let init pkg = + rpkg := Some pkg; + List.iter (fun f -> f pkg.oasis_version) !var_cond + +end + +module BaseFileAB = struct +(* # 22 "src/base/BaseFileAB.ml" *) + + + open BaseEnv + open OASISGettext + open BaseMessage + + + let to_filename fn = + let fn = + OASISHostPath.of_unix fn + in + if not (Filename.check_suffix fn ".ab") then + warning + (f_ "File '%s' doesn't have '.ab' extension") + fn; + Filename.chop_extension fn + + + let replace fn_lst = + let buff = + Buffer.create 13 + in + List.iter + (fun fn -> + let fn = + OASISHostPath.of_unix fn + in + let chn_in = + open_in fn + in + let chn_out = + open_out (to_filename fn) + in + ( + try + while true do + Buffer.add_string buff (var_expand (input_line chn_in)); + Buffer.add_char buff '\n' + done + with End_of_file -> + () + ); + Buffer.output_buffer chn_out buff; + Buffer.clear buff; + close_in chn_in; + close_out chn_out) + fn_lst +end + +module BaseLog = struct +(* # 22 "src/base/BaseLog.ml" *) + + + open OASISUtils + + + let default_filename = + Filename.concat + (Filename.dirname BaseEnv.default_filename) + "setup.log" + + + module SetTupleString = + Set.Make + (struct + type t = string * string + let compare (s11, s12) (s21, s22) = + match String.compare s11 s21 with + | 0 -> String.compare s12 s22 + | n -> n + end) + + + let load () = + if Sys.file_exists default_filename then + begin + let chn = + open_in default_filename + in + let scbuf = + Scanf.Scanning.from_file default_filename + in + let rec read_aux (st, lst) = + if not (Scanf.Scanning.end_of_input scbuf) then + begin + let acc = + try + Scanf.bscanf scbuf "%S %S\n" + (fun e d -> + let t = + e, d + in + if SetTupleString.mem t st then + st, lst + else + SetTupleString.add t st, + t :: lst) + with Scanf.Scan_failure _ -> + failwith + (Scanf.bscanf scbuf + "%l" + (fun line -> + Printf.sprintf + "Malformed log file '%s' at line %d" + default_filename + line)) + in + read_aux acc + end + else + begin + close_in chn; + List.rev lst + end + in + read_aux (SetTupleString.empty, []) + end + else + begin + [] + end + + + let register event data = + let chn_out = + open_out_gen [Open_append; Open_creat; Open_text] 0o644 default_filename + in + Printf.fprintf chn_out "%S %S\n" event data; + close_out chn_out + + + let unregister event data = + if Sys.file_exists default_filename then + begin + let lst = + load () + in + let chn_out = + open_out default_filename + in + let write_something = + ref false + in + List.iter + (fun (e, d) -> + if e <> event || d <> data then + begin + write_something := true; + Printf.fprintf chn_out "%S %S\n" e d + end) + lst; + close_out chn_out; + if not !write_something then + Sys.remove default_filename + end + + + let filter events = + let st_events = + List.fold_left + (fun st e -> + SetString.add e st) + SetString.empty + events + in + List.filter + (fun (e, _) -> SetString.mem e st_events) + (load ()) + + + let exists event data = + List.exists + (fun v -> (event, data) = v) + (load ()) +end + +module BaseBuilt = struct +(* # 22 "src/base/BaseBuilt.ml" *) + + + open OASISTypes + open OASISGettext + open BaseStandardVar + open BaseMessage + + + type t = + | BExec (* Executable *) + | BExecLib (* Library coming with executable *) + | BLib (* Library *) + | BObj (* Library *) + | BDoc (* Document *) + + + let to_log_event_file t nm = + "built_"^ + (match t with + | BExec -> "exec" + | BExecLib -> "exec_lib" + | BLib -> "lib" + | BObj -> "obj" + | BDoc -> "doc")^ + "_"^nm + + + let to_log_event_done t nm = + "is_"^(to_log_event_file t nm) + + + let register t nm lst = + BaseLog.register + (to_log_event_done t nm) + "true"; + List.iter + (fun alt -> + let registered = + List.fold_left + (fun registered fn -> + if OASISFileUtil.file_exists_case fn then + begin + BaseLog.register + (to_log_event_file t nm) + (if Filename.is_relative fn then + Filename.concat (Sys.getcwd ()) fn + else + fn); + true + end + else + registered) + false + alt + in + if not registered then + warning + (f_ "Cannot find an existing alternative files among: %s") + (String.concat (s_ ", ") alt)) + lst + + + let unregister t nm = + List.iter + (fun (e, d) -> + BaseLog.unregister e d) + (BaseLog.filter + [to_log_event_file t nm; + to_log_event_done t nm]) + + + let fold t nm f acc = + List.fold_left + (fun acc (_, fn) -> + if OASISFileUtil.file_exists_case fn then + begin + f acc fn + end + else + begin + warning + (f_ "File '%s' has been marked as built \ + for %s but doesn't exist") + fn + (Printf.sprintf + (match t with + | BExec | BExecLib -> + (f_ "executable %s") + | BLib -> + (f_ "library %s") + | BObj -> + (f_ "object %s") + | BDoc -> + (f_ "documentation %s")) + nm); + acc + end) + acc + (BaseLog.filter + [to_log_event_file t nm]) + + + let is_built t nm = + List.fold_left + (fun is_built (_, d) -> + (try + bool_of_string d + with _ -> + false)) + false + (BaseLog.filter + [to_log_event_done t nm]) + + + let of_executable ffn (cs, bs, exec) = + let unix_exec_is, unix_dll_opt = + OASISExecutable.unix_exec_is + (cs, bs, exec) + (fun () -> + bool_of_string + (is_native ())) + ext_dll + ext_program + in + let evs = + (BExec, cs.cs_name, [[ffn unix_exec_is]]) + :: + (match unix_dll_opt with + | Some fn -> + [BExecLib, cs.cs_name, [[ffn fn]]] + | None -> + []) + in + evs, + unix_exec_is, + unix_dll_opt + + + let of_library ffn (cs, bs, lib) = + let unix_lst = + OASISLibrary.generated_unix_files + ~ctxt:!BaseContext.default + ~source_file_exists:(fun fn -> + OASISFileUtil.file_exists_case (OASISHostPath.of_unix fn)) + ~is_native:(bool_of_string (is_native ())) + ~has_native_dynlink:(bool_of_string (native_dynlink ())) + ~ext_lib:(ext_lib ()) + ~ext_dll:(ext_dll ()) + (cs, bs, lib) + in + let evs = + [BLib, + cs.cs_name, + List.map (List.map ffn) unix_lst] + in + evs, unix_lst + + + let of_object ffn (cs, bs, obj) = + let unix_lst = + OASISObject.generated_unix_files + ~ctxt:!BaseContext.default + ~source_file_exists:(fun fn -> + OASISFileUtil.file_exists_case (OASISHostPath.of_unix fn)) + ~is_native:(bool_of_string (is_native ())) + (cs, bs, obj) + in + let evs = + [BObj, + cs.cs_name, + List.map (List.map ffn) unix_lst] + in + evs, unix_lst + +end + +module BaseCustom = struct +(* # 22 "src/base/BaseCustom.ml" *) + + + open BaseEnv + open BaseMessage + open OASISTypes + open OASISGettext + + + let run cmd args extra_args = + OASISExec.run ~ctxt:!BaseContext.default ~quote:false + (var_expand cmd) + (List.map + var_expand + (args @ (Array.to_list extra_args))) + + + let hook ?(failsafe=false) cstm f e = + let optional_command lst = + let printer = + function + | Some (cmd, args) -> String.concat " " (cmd :: args) + | None -> s_ "No command" + in + match + var_choose + ~name:(s_ "Pre/Post Command") + ~printer + lst with + | Some (cmd, args) -> + begin + try + run cmd args [||] + with e when failsafe -> + warning + (f_ "Command '%s' fail with error: %s") + (String.concat " " (cmd :: args)) + (match e with + | Failure msg -> msg + | e -> Printexc.to_string e) + end + | None -> + () + in + let res = + optional_command cstm.pre_command; + f e + in + optional_command cstm.post_command; + res +end + +module BaseDynVar = struct +(* # 22 "src/base/BaseDynVar.ml" *) + + + open OASISTypes + open OASISGettext + open BaseEnv + open BaseBuilt + + + let init pkg = + (* TODO: disambiguate exec vs other variable by adding exec_VARNAME. *) + (* TODO: provide compile option for library libary_byte_args_VARNAME... *) + List.iter + (function + | Executable (cs, bs, exec) -> + if var_choose bs.bs_build then + var_ignore + (var_redefine + (* We don't save this variable *) + ~dump:false + ~short_desc:(fun () -> + Printf.sprintf + (f_ "Filename of executable '%s'") + cs.cs_name) + (OASISUtils.varname_of_string cs.cs_name) + (fun () -> + let fn_opt = + fold + BExec cs.cs_name + (fun _ fn -> Some fn) + None + in + match fn_opt with + | Some fn -> fn + | None -> + raise + (PropList.Not_set + (cs.cs_name, + Some (Printf.sprintf + (f_ "Executable '%s' not yet built.") + cs.cs_name))))) + + | Library _ | Object _ | Flag _ | Test _ | SrcRepo _ | Doc _ -> + ()) + pkg.sections +end + +module BaseTest = struct +(* # 22 "src/base/BaseTest.ml" *) + + + open BaseEnv + open BaseMessage + open OASISTypes + open OASISExpr + open OASISGettext + + + let test lst pkg extra_args = + + let one_test (failure, n) (test_plugin, cs, test) = + if var_choose + ~name:(Printf.sprintf + (f_ "test %s run") + cs.cs_name) + ~printer:string_of_bool + test.test_run then + begin + let () = + info (f_ "Running test '%s'") cs.cs_name + in + let back_cwd = + match test.test_working_directory with + | Some dir -> + let cwd = + Sys.getcwd () + in + let chdir d = + info (f_ "Changing directory to '%s'") d; + Sys.chdir d + in + chdir dir; + fun () -> chdir cwd + + | None -> + fun () -> () + in + try + let failure_percent = + BaseCustom.hook + test.test_custom + (test_plugin pkg (cs, test)) + extra_args + in + back_cwd (); + (failure_percent +. failure, n + 1) + with e -> + begin + back_cwd (); + raise e + end + end + else + begin + info (f_ "Skipping test '%s'") cs.cs_name; + (failure, n) + end + in + let failed, n = + List.fold_left + one_test + (0.0, 0) + lst + in + let failure_percent = + if n = 0 then + 0.0 + else + failed /. (float_of_int n) + in + let msg = + Printf.sprintf + (f_ "Tests had a %.2f%% failure rate") + (100. *. failure_percent) + in + if failure_percent > 0.0 then + failwith msg + else + info "%s" msg; + + (* Possible explanation why the tests where not run. *) + if OASISFeatures.package_test OASISFeatures.flag_tests pkg && + not (bool_of_string (BaseStandardVar.tests ())) && + lst <> [] then + BaseMessage.warning + "Tests are turned off, consider enabling with \ + 'ocaml setup.ml -configure --enable-tests'" +end + +module BaseDoc = struct +(* # 22 "src/base/BaseDoc.ml" *) + + + open BaseEnv + open BaseMessage + open OASISTypes + open OASISGettext + + + let doc lst pkg extra_args = + + let one_doc (doc_plugin, cs, doc) = + if var_choose + ~name:(Printf.sprintf + (f_ "documentation %s build") + cs.cs_name) + ~printer:string_of_bool + doc.doc_build then + begin + info (f_ "Building documentation '%s'") cs.cs_name; + BaseCustom.hook + doc.doc_custom + (doc_plugin pkg (cs, doc)) + extra_args + end + in + List.iter one_doc lst; + + if OASISFeatures.package_test OASISFeatures.flag_docs pkg && + not (bool_of_string (BaseStandardVar.docs ())) && + lst <> [] then + BaseMessage.warning + "Docs are turned off, consider enabling with \ + 'ocaml setup.ml -configure --enable-docs'" +end + +module BaseSetup = struct +(* # 22 "src/base/BaseSetup.ml" *) + + open BaseEnv + open BaseMessage + open OASISTypes + open OASISSection + open OASISGettext + open OASISUtils + + + type std_args_fun = + package -> string array -> unit + + + type ('a, 'b) section_args_fun = + name * (package -> (common_section * 'a) -> string array -> 'b) + + + type t = + { + configure: std_args_fun; + build: std_args_fun; + doc: ((doc, unit) section_args_fun) list; + test: ((test, float) section_args_fun) list; + install: std_args_fun; + uninstall: std_args_fun; + clean: std_args_fun list; + clean_doc: (doc, unit) section_args_fun list; + clean_test: (test, unit) section_args_fun list; + distclean: std_args_fun list; + distclean_doc: (doc, unit) section_args_fun list; + distclean_test: (test, unit) section_args_fun list; + package: package; + oasis_fn: string option; + oasis_version: string; + oasis_digest: Digest.t option; + oasis_exec: string option; + oasis_setup_args: string list; + setup_update: bool; + } + + + (* Associate a plugin function with data from package *) + let join_plugin_sections filter_map lst = + List.rev + (List.fold_left + (fun acc sct -> + match filter_map sct with + | Some e -> + e :: acc + | None -> + acc) + [] + lst) + + + (* Search for plugin data associated with a section name *) + let lookup_plugin_section plugin action nm lst = + try + List.assoc nm lst + with Not_found -> + failwithf + (f_ "Cannot find plugin %s matching section %s for %s action") + plugin + nm + action + + + let configure t args = + (* Run configure *) + BaseCustom.hook + t.package.conf_custom + (fun () -> + (* Reload if preconf has changed it *) + begin + try + unload (); + load (); + with _ -> + () + end; + + (* Run plugin's configure *) + t.configure t.package args; + + (* Dump to allow postconf to change it *) + dump ()) + (); + + (* Reload environment *) + unload (); + load (); + + (* Save environment *) + print (); + + (* Replace data in file *) + BaseFileAB.replace t.package.files_ab + + + let build t args = + BaseCustom.hook + t.package.build_custom + (t.build t.package) + args + + + let doc t args = + BaseDoc.doc + (join_plugin_sections + (function + | Doc (cs, e) -> + Some + (lookup_plugin_section + "documentation" + (s_ "build") + cs.cs_name + t.doc, + cs, + e) + | _ -> + None) + t.package.sections) + t.package + args + + + let test t args = + BaseTest.test + (join_plugin_sections + (function + | Test (cs, e) -> + Some + (lookup_plugin_section + "test" + (s_ "run") + cs.cs_name + t.test, + cs, + e) + | _ -> + None) + t.package.sections) + t.package + args + + + let all t args = + let rno_doc = + ref false + in + let rno_test = + ref false + in + let arg_rest = + ref [] + in + Arg.parse_argv + ~current:(ref 0) + (Array.of_list + ((Sys.executable_name^" all") :: + (Array.to_list args))) + [ + "-no-doc", + Arg.Set rno_doc, + s_ "Don't run doc target"; + + "-no-test", + Arg.Set rno_test, + s_ "Don't run test target"; + + "--", + Arg.Rest (fun arg -> arg_rest := arg :: !arg_rest), + s_ "All arguments for configure."; + ] + (failwithf (f_ "Don't know what to do with '%s'")) + ""; + + info "Running configure step"; + configure t (Array.of_list (List.rev !arg_rest)); + + info "Running build step"; + build t [||]; + + (* Load setup.log dynamic variables *) + BaseDynVar.init t.package; + + if not !rno_doc then + begin + info "Running doc step"; + doc t [||]; + end + else + begin + info "Skipping doc step" + end; + + if not !rno_test then + begin + info "Running test step"; + test t [||] + end + else + begin + info "Skipping test step" + end + + + let install t args = + BaseCustom.hook + t.package.install_custom + (t.install t.package) + args + + + let uninstall t args = + BaseCustom.hook + t.package.uninstall_custom + (t.uninstall t.package) + args + + + let reinstall t args = + uninstall t args; + install t args + + + let clean, distclean = + let failsafe f a = + try + f a + with e -> + warning + (f_ "Action fail with error: %s") + (match e with + | Failure msg -> msg + | e -> Printexc.to_string e) + in + + let generic_clean t cstm mains docs tests args = + BaseCustom.hook + ~failsafe:true + cstm + (fun () -> + (* Clean section *) + List.iter + (function + | Test (cs, test) -> + let f = + try + List.assoc cs.cs_name tests + with Not_found -> + fun _ _ _ -> () + in + failsafe + (f t.package (cs, test)) + args + | Doc (cs, doc) -> + let f = + try + List.assoc cs.cs_name docs + with Not_found -> + fun _ _ _ -> () + in + failsafe + (f t.package (cs, doc)) + args + | Library _ + | Object _ + | Executable _ + | Flag _ + | SrcRepo _ -> + ()) + t.package.sections; + (* Clean whole package *) + List.iter + (fun f -> + failsafe + (f t.package) + args) + mains) + () + in + + let clean t args = + generic_clean + t + t.package.clean_custom + t.clean + t.clean_doc + t.clean_test + args + in + + let distclean t args = + (* Call clean *) + clean t args; + + (* Call distclean code *) + generic_clean + t + t.package.distclean_custom + t.distclean + t.distclean_doc + t.distclean_test + args; + + (* Remove generated file *) + List.iter + (fun fn -> + if Sys.file_exists fn then + begin + info (f_ "Remove '%s'") fn; + Sys.remove fn + end) + (BaseEnv.default_filename + :: + BaseLog.default_filename + :: + (List.rev_map BaseFileAB.to_filename t.package.files_ab)) + in + + clean, distclean + + + let version t _ = + print_endline t.oasis_version + + + let update_setup_ml, no_update_setup_ml_cli = + let b = ref true in + b, + ("-no-update-setup-ml", + Arg.Clear b, + s_ " Don't try to update setup.ml, even if _oasis has changed.") + + + let default_oasis_fn = "_oasis" + + + let update_setup_ml t = + let oasis_fn = + match t.oasis_fn with + | Some fn -> fn + | None -> default_oasis_fn + in + let oasis_exec = + match t.oasis_exec with + | Some fn -> fn + | None -> "oasis" + in + let ocaml = + Sys.executable_name + in + let setup_ml, args = + match Array.to_list Sys.argv with + | setup_ml :: args -> + setup_ml, args + | [] -> + failwith + (s_ "Expecting non-empty command line arguments.") + in + let ocaml, setup_ml = + if Sys.executable_name = Sys.argv.(0) then + (* We are not running in standard mode, probably the script + * is precompiled. + *) + "ocaml", "setup.ml" + else + ocaml, setup_ml + in + let no_update_setup_ml_cli, _, _ = no_update_setup_ml_cli in + let do_update () = + let oasis_exec_version = + OASISExec.run_read_one_line + ~ctxt:!BaseContext.default + ~f_exit_code: + (function + | 0 -> + () + | 1 -> + failwithf + (f_ "Executable '%s' is probably an old version \ + of oasis (< 0.3.0), please update to version \ + v%s.") + oasis_exec t.oasis_version + | 127 -> + failwithf + (f_ "Cannot find executable '%s', please install \ + oasis v%s.") + oasis_exec t.oasis_version + | n -> + failwithf + (f_ "Command '%s version' exited with code %d.") + oasis_exec n) + oasis_exec ["version"] + in + if OASISVersion.comparator_apply + (OASISVersion.version_of_string oasis_exec_version) + (OASISVersion.VGreaterEqual + (OASISVersion.version_of_string t.oasis_version)) then + begin + (* We have a version >= for the executable oasis, proceed with + * update. + *) + (* TODO: delegate this check to 'oasis setup'. *) + if Sys.os_type = "Win32" then + failwithf + (f_ "It is not possible to update the running script \ + setup.ml on Windows. Please update setup.ml by \ + running '%s'.") + (String.concat " " (oasis_exec :: "setup" :: t.oasis_setup_args)) + else + begin + OASISExec.run + ~ctxt:!BaseContext.default + ~f_exit_code: + (function + | 0 -> + () + | n -> + failwithf + (f_ "Unable to update setup.ml using '%s', \ + please fix the problem and retry.") + oasis_exec) + oasis_exec ("setup" :: t.oasis_setup_args); + OASISExec.run ~ctxt:!BaseContext.default ocaml (setup_ml :: args) + end + end + else + failwithf + (f_ "The version of '%s' (v%s) doesn't match the version of \ + oasis used to generate the %s file. Please install at \ + least oasis v%s.") + oasis_exec oasis_exec_version setup_ml t.oasis_version + in + + if !update_setup_ml then + begin + try + match t.oasis_digest with + | Some dgst -> + if Sys.file_exists oasis_fn && + dgst <> Digest.file default_oasis_fn then + begin + do_update (); + true + end + else + false + | None -> + false + with e -> + error + (f_ "Error when updating setup.ml. If you want to avoid this error, \ + you can bypass the update of %s by running '%s %s %s %s'") + setup_ml ocaml setup_ml no_update_setup_ml_cli + (String.concat " " args); + raise e + end + else + false + + + let setup t = + let catch_exn = + ref true + in + try + let act_ref = + ref (fun _ -> + failwithf + (f_ "No action defined, run '%s %s -help'") + Sys.executable_name + Sys.argv.(0)) + + in + let extra_args_ref = + ref [] + in + let allow_empty_env_ref = + ref false + in + let arg_handle ?(allow_empty_env=false) act = + Arg.Tuple + [ + Arg.Rest (fun str -> extra_args_ref := str :: !extra_args_ref); + + Arg.Unit + (fun () -> + allow_empty_env_ref := allow_empty_env; + act_ref := act); + ] + in + + Arg.parse + (Arg.align + ([ + "-configure", + arg_handle ~allow_empty_env:true configure, + s_ "[options*] Configure the whole build process."; + + "-build", + arg_handle build, + s_ "[options*] Build executables and libraries."; + + "-doc", + arg_handle doc, + s_ "[options*] Build documents."; + + "-test", + arg_handle test, + s_ "[options*] Run tests."; + + "-all", + arg_handle ~allow_empty_env:true all, + s_ "[options*] Run configure, build, doc and test targets."; + + "-install", + arg_handle install, + s_ "[options*] Install libraries, data, executables \ + and documents."; + + "-uninstall", + arg_handle uninstall, + s_ "[options*] Uninstall libraries, data, executables \ + and documents."; + + "-reinstall", + arg_handle reinstall, + s_ "[options*] Uninstall and install libraries, data, \ + executables and documents."; + + "-clean", + arg_handle ~allow_empty_env:true clean, + s_ "[options*] Clean files generated by a build."; + + "-distclean", + arg_handle ~allow_empty_env:true distclean, + s_ "[options*] Clean files generated by a build and configure."; + + "-version", + arg_handle ~allow_empty_env:true version, + s_ " Display version of OASIS used to generate this setup.ml."; + + "-no-catch-exn", + Arg.Clear catch_exn, + s_ " Don't catch exception, useful for debugging."; + ] + @ + (if t.setup_update then + [no_update_setup_ml_cli] + else + []) + @ (BaseContext.args ()))) + (failwithf (f_ "Don't know what to do with '%s'")) + (s_ "Setup and run build process current package\n"); + + (* Build initial environment *) + load ~allow_empty:!allow_empty_env_ref (); + + (** Initialize flags *) + List.iter + (function + | Flag (cs, {flag_description = hlp; + flag_default = choices}) -> + begin + let apply ?short_desc () = + var_ignore + (var_define + ~cli:CLIEnable + ?short_desc + (OASISUtils.varname_of_string cs.cs_name) + (fun () -> + string_of_bool + (var_choose + ~name:(Printf.sprintf + (f_ "default value of flag %s") + cs.cs_name) + ~printer:string_of_bool + choices))) + in + match hlp with + | Some hlp -> + apply ~short_desc:(fun () -> hlp) () + | None -> + apply () + end + | _ -> + ()) + t.package.sections; + + BaseStandardVar.init t.package; + + BaseDynVar.init t.package; + + if t.setup_update && update_setup_ml t then + () + else + !act_ref t (Array.of_list (List.rev !extra_args_ref)) + + with e when !catch_exn -> + error "%s" (Printexc.to_string e); + exit 1 + + +end + + +# 5432 "setup.ml" +module InternalConfigurePlugin = struct +(* # 22 "src/plugins/internal/InternalConfigurePlugin.ml" *) + + + (** Configure using internal scheme + @author Sylvain Le Gall + *) + + + open BaseEnv + open OASISTypes + open OASISUtils + open OASISGettext + open BaseMessage + + + (** Configure build using provided series of check to be done + * and then output corresponding file. + *) + let configure pkg argv = + let var_ignore_eval var = let _s: string = var () in () in + let errors = ref SetString.empty in + let buff = Buffer.create 13 in + + let add_errors fmt = + Printf.kbprintf + (fun b -> + errors := SetString.add (Buffer.contents b) !errors; + Buffer.clear b) + buff + fmt + in + + let warn_exception e = + warning "%s" (Printexc.to_string e) + in + + (* Check tools *) + let check_tools lst = + List.iter + (function + | ExternalTool tool -> + begin + try + var_ignore_eval (BaseCheck.prog tool) + with e -> + warn_exception e; + add_errors (f_ "Cannot find external tool '%s'") tool + end + | InternalExecutable nm1 -> + (* Check that matching tool is built *) + List.iter + (function + | Executable ({cs_name = nm2}, + {bs_build = build}, + _) when nm1 = nm2 -> + if not (var_choose build) then + add_errors + (f_ "Cannot find buildable internal executable \ + '%s' when checking build depends") + nm1 + | _ -> + ()) + pkg.sections) + lst + in + + let build_checks sct bs = + if var_choose bs.bs_build then + begin + if bs.bs_compiled_object = Native then + begin + try + var_ignore_eval BaseStandardVar.ocamlopt + with e -> + warn_exception e; + add_errors + (f_ "Section %s requires native compilation") + (OASISSection.string_of_section sct) + end; + + (* Check tools *) + check_tools bs.bs_build_tools; + + (* Check depends *) + List.iter + (function + | FindlibPackage (findlib_pkg, version_comparator) -> + begin + try + var_ignore_eval + (BaseCheck.package ?version_comparator findlib_pkg) + with e -> + warn_exception e; + match version_comparator with + | None -> + add_errors + (f_ "Cannot find findlib package %s") + findlib_pkg + | Some ver_cmp -> + add_errors + (f_ "Cannot find findlib package %s (%s)") + findlib_pkg + (OASISVersion.string_of_comparator ver_cmp) + end + | InternalLibrary nm1 -> + (* Check that matching library is built *) + List.iter + (function + | Library ({cs_name = nm2}, + {bs_build = build}, + _) when nm1 = nm2 -> + if not (var_choose build) then + add_errors + (f_ "Cannot find buildable internal library \ + '%s' when checking build depends") + nm1 + | _ -> + ()) + pkg.sections) + bs.bs_build_depends + end + in + + (* Parse command line *) + BaseArgExt.parse argv (BaseEnv.args ()); + + (* OCaml version *) + begin + match pkg.ocaml_version with + | Some ver_cmp -> + begin + try + var_ignore_eval + (BaseCheck.version + "ocaml" + ver_cmp + BaseStandardVar.ocaml_version) + with e -> + warn_exception e; + add_errors + (f_ "OCaml version %s doesn't match version constraint %s") + (BaseStandardVar.ocaml_version ()) + (OASISVersion.string_of_comparator ver_cmp) + end + | None -> + () + end; + + (* Findlib version *) + begin + match pkg.findlib_version with + | Some ver_cmp -> + begin + try + var_ignore_eval + (BaseCheck.version + "findlib" + ver_cmp + BaseStandardVar.findlib_version) + with e -> + warn_exception e; + add_errors + (f_ "Findlib version %s doesn't match version constraint %s") + (BaseStandardVar.findlib_version ()) + (OASISVersion.string_of_comparator ver_cmp) + end + | None -> + () + end; + (* Make sure the findlib version is fine for the OCaml compiler. *) + begin + let ocaml_ge4 = + OASISVersion.version_compare + (OASISVersion.version_of_string (BaseStandardVar.ocaml_version())) + (OASISVersion.version_of_string "4.0.0") >= 0 in + if ocaml_ge4 then + let findlib_lt132 = + OASISVersion.version_compare + (OASISVersion.version_of_string (BaseStandardVar.findlib_version())) + (OASISVersion.version_of_string "1.3.2") < 0 in + if findlib_lt132 then + add_errors "OCaml >= 4.0.0 requires Findlib version >= 1.3.2" + end; + + (* FlexDLL *) + if BaseStandardVar.os_type () = "Win32" || + BaseStandardVar.os_type () = "Cygwin" then + begin + try + var_ignore_eval BaseStandardVar.flexlink + with e -> + warn_exception e; + add_errors (f_ "Cannot find 'flexlink'") + end; + + (* Check build depends *) + List.iter + (function + | Executable (_, bs, _) + | Library (_, bs, _) as sct -> + build_checks sct bs + | Doc (_, doc) -> + if var_choose doc.doc_build then + check_tools doc.doc_build_tools + | Test (_, test) -> + if var_choose test.test_run then + check_tools test.test_tools + | _ -> + ()) + pkg.sections; + + (* Check if we need native dynlink (presence of libraries that compile to + * native) + *) + begin + let has_cmxa = + List.exists + (function + | Library (_, bs, _) -> + var_choose bs.bs_build && + (bs.bs_compiled_object = Native || + (bs.bs_compiled_object = Best && + bool_of_string (BaseStandardVar.is_native ()))) + | _ -> + false) + pkg.sections + in + if has_cmxa then + var_ignore_eval BaseStandardVar.native_dynlink + end; + + (* Check errors *) + if SetString.empty != !errors then + begin + List.iter + (fun e -> error "%s" e) + (SetString.elements !errors); + failwithf + (fn_ + "%d configuration error" + "%d configuration errors" + (SetString.cardinal !errors)) + (SetString.cardinal !errors) + end + + +end + +module InternalInstallPlugin = struct +(* # 22 "src/plugins/internal/InternalInstallPlugin.ml" *) + + + (** Install using internal scheme + @author Sylvain Le Gall + *) + + + open BaseEnv + open BaseStandardVar + open BaseMessage + open OASISTypes + open OASISFindlib + open OASISGettext + open OASISUtils + + + let exec_hook = + ref (fun (cs, bs, exec) -> cs, bs, exec) + + + let lib_hook = + ref (fun (cs, bs, lib) -> cs, bs, lib, []) + + + let obj_hook = + ref (fun (cs, bs, obj) -> cs, bs, obj, []) + + + let doc_hook = + ref (fun (cs, doc) -> cs, doc) + + + let install_file_ev = + "install-file" + + + let install_dir_ev = + "install-dir" + + + let install_findlib_ev = + "install-findlib" + + + let win32_max_command_line_length = 8000 + + + let split_install_command ocamlfind findlib_name meta files = + if Sys.os_type = "Win32" then + (* Arguments for the first command: *) + let first_args = ["install"; findlib_name; meta] in + (* Arguments for remaining commands: *) + let other_args = ["install"; findlib_name; "-add"] in + (* Extract as much files as possible from [files], [len] is + the current command line length: *) + let rec get_files len acc files = + match files with + | [] -> + (List.rev acc, []) + | file :: rest -> + let len = len + 1 + String.length file in + if len > win32_max_command_line_length then + (List.rev acc, files) + else + get_files len (file :: acc) rest + in + (* Split the command into several commands. *) + let rec split args files = + match files with + | [] -> + [] + | _ -> + (* Length of "ocamlfind install [META|-add]" *) + let len = + List.fold_left + (fun len arg -> + len + 1 (* for the space *) + String.length arg) + (String.length ocamlfind) + args + in + match get_files len [] files with + | ([], _) -> + failwith (s_ "Command line too long.") + | (firsts, others) -> + let cmd = args @ firsts in + (* Use -add for remaining commands: *) + let () = + let findlib_ge_132 = + OASISVersion.comparator_apply + (OASISVersion.version_of_string + (BaseStandardVar.findlib_version ())) + (OASISVersion.VGreaterEqual + (OASISVersion.version_of_string "1.3.2")) + in + if not findlib_ge_132 then + failwithf + (f_ "Installing the library %s require to use the \ + flag '-add' of ocamlfind because the command \ + line is too long. This flag is only available \ + for findlib 1.3.2. Please upgrade findlib from \ + %s to 1.3.2") + findlib_name (BaseStandardVar.findlib_version ()) + in + let cmds = split other_args others in + cmd :: cmds + in + (* The first command does not use -add: *) + split first_args files + else + ["install" :: findlib_name :: meta :: files] + + + let install pkg argv = + + let in_destdir = + try + let destdir = + destdir () + in + (* Practically speaking destdir is prepended + * at the beginning of the target filename + *) + fun fn -> destdir^fn + with PropList.Not_set _ -> + fun fn -> fn + in + + let install_file ?tgt_fn src_file envdir = + let tgt_dir = + in_destdir (envdir ()) + in + let tgt_file = + Filename.concat + tgt_dir + (match tgt_fn with + | Some fn -> + fn + | None -> + Filename.basename src_file) + in + (* Create target directory if needed *) + OASISFileUtil.mkdir_parent + ~ctxt:!BaseContext.default + (fun dn -> + info (f_ "Creating directory '%s'") dn; + BaseLog.register install_dir_ev dn) + tgt_dir; + + (* Really install files *) + info (f_ "Copying file '%s' to '%s'") src_file tgt_file; + OASISFileUtil.cp ~ctxt:!BaseContext.default src_file tgt_file; + BaseLog.register install_file_ev tgt_file + in + + (* Install data into defined directory *) + let install_data srcdir lst tgtdir = + let tgtdir = + OASISHostPath.of_unix (var_expand tgtdir) + in + List.iter + (fun (src, tgt_opt) -> + let real_srcs = + OASISFileUtil.glob + ~ctxt:!BaseContext.default + (Filename.concat srcdir src) + in + if real_srcs = [] then + failwithf + (f_ "Wildcard '%s' doesn't match any files") + src; + List.iter + (fun fn -> + install_file + fn + (fun () -> + match tgt_opt with + | Some s -> + OASISHostPath.of_unix (var_expand s) + | None -> + tgtdir)) + real_srcs) + lst + in + + let make_fnames modul sufx = + List.fold_right + begin fun sufx accu -> + (OASISString.capitalize_ascii modul ^ sufx) :: + (OASISString.uncapitalize_ascii modul ^ sufx) :: + accu + end + sufx + [] + in + + (** Install all libraries *) + let install_libs pkg = + + let files_of_library (f_data, acc) data_lib = + let cs, bs, lib, lib_extra = + !lib_hook data_lib + in + if var_choose bs.bs_install && + BaseBuilt.is_built BaseBuilt.BLib cs.cs_name then + begin + let acc = + (* Start with acc + lib_extra *) + List.rev_append lib_extra acc + in + let acc = + (* Add uncompiled header from the source tree *) + let path = + OASISHostPath.of_unix bs.bs_path + in + List.fold_left + begin fun acc modul -> + begin + try + [List.find + OASISFileUtil.file_exists_case + (List.map + (Filename.concat path) + (make_fnames modul [".mli"; ".ml"]))] + with Not_found -> + warning + (f_ "Cannot find source header for module %s \ + in library %s") + modul cs.cs_name; + [] + end + @ + List.filter + OASISFileUtil.file_exists_case + (List.map + (Filename.concat path) + (make_fnames modul [".annot";".cmti";".cmt"])) + @ acc + end + acc + lib.lib_modules + in + + let acc = + (* Get generated files *) + BaseBuilt.fold + BaseBuilt.BLib + cs.cs_name + (fun acc fn -> fn :: acc) + acc + in + + let f_data () = + (* Install data associated with the library *) + install_data + bs.bs_path + bs.bs_data_files + (Filename.concat + (datarootdir ()) + pkg.name); + f_data () + in + + (f_data, acc) + end + else + begin + (f_data, acc) + end + and files_of_object (f_data, acc) data_obj = + let cs, bs, obj, obj_extra = + !obj_hook data_obj + in + if var_choose bs.bs_install && + BaseBuilt.is_built BaseBuilt.BObj cs.cs_name then + begin + let acc = + (* Start with acc + obj_extra *) + List.rev_append obj_extra acc + in + let acc = + (* Add uncompiled header from the source tree *) + let path = + OASISHostPath.of_unix bs.bs_path + in + List.fold_left + begin fun acc modul -> + begin + try + [List.find + OASISFileUtil.file_exists_case + (List.map + (Filename.concat path) + (make_fnames modul [".mli"; ".ml"]))] + with Not_found -> + warning + (f_ "Cannot find source header for module %s \ + in object %s") + modul cs.cs_name; + [] + end + @ + List.filter + OASISFileUtil.file_exists_case + (List.map + (Filename.concat path) + (make_fnames modul [".annot";".cmti";".cmt"])) + @ acc + end + acc + obj.obj_modules + in + + let acc = + (* Get generated files *) + BaseBuilt.fold + BaseBuilt.BObj + cs.cs_name + (fun acc fn -> fn :: acc) + acc + in + + let f_data () = + (* Install data associated with the object *) + install_data + bs.bs_path + bs.bs_data_files + (Filename.concat + (datarootdir ()) + pkg.name); + f_data () + in + + (f_data, acc) + end + else + begin + (f_data, acc) + end + + in + + (* Install one group of library *) + let install_group_lib grp = + (* Iterate through all group nodes *) + let rec install_group_lib_aux data_and_files grp = + let data_and_files, children = + match grp with + | Container (_, children) -> + data_and_files, children + | Package (_, cs, bs, `Library lib, children) -> + files_of_library data_and_files (cs, bs, lib), children + | Package (_, cs, bs, `Object obj, children) -> + files_of_object data_and_files (cs, bs, obj), children + in + List.fold_left + install_group_lib_aux + data_and_files + children + in + + (* Findlib name of the root library *) + let findlib_name = + findlib_of_group grp + in + + (* Determine root library *) + let root_lib = + root_of_group grp + in + + (* All files to install for this library *) + let f_data, files = + install_group_lib_aux (ignore, []) grp + in + + (* Really install, if there is something to install *) + if files = [] then + begin + warning + (f_ "Nothing to install for findlib library '%s'") + findlib_name + end + else + begin + let meta = + (* Search META file *) + let _, bs, _ = + root_lib + in + let res = + Filename.concat bs.bs_path "META" + in + if not (OASISFileUtil.file_exists_case res) then + failwithf + (f_ "Cannot find file '%s' for findlib library %s") + res + findlib_name; + res + in + let files = + (* Make filename shorter to avoid hitting command max line length + * too early, esp. on Windows. + *) + let remove_prefix p n = + let plen = String.length p in + let nlen = String.length n in + if plen <= nlen && String.sub n 0 plen = p then + begin + let fn_sep = + if Sys.os_type = "Win32" then + '\\' + else + '/' + in + let cutpoint = plen + + (if plen < nlen && n.[plen] = fn_sep then + 1 + else + 0) + in + String.sub n cutpoint (nlen - cutpoint) + end + else + n + in + List.map (remove_prefix (Sys.getcwd ())) files + in + info + (f_ "Installing findlib library '%s'") + findlib_name; + let ocamlfind = ocamlfind () in + let commands = + split_install_command + ocamlfind + findlib_name + meta + files + in + List.iter + (OASISExec.run ~ctxt:!BaseContext.default ocamlfind) + commands; + BaseLog.register install_findlib_ev findlib_name + end; + + (* Install data files *) + f_data (); + + in + + let group_libs, _, _ = + findlib_mapping pkg + in + + (* We install libraries in groups *) + List.iter install_group_lib group_libs + in + + let install_execs pkg = + let install_exec data_exec = + let cs, bs, exec = + !exec_hook data_exec + in + if var_choose bs.bs_install && + BaseBuilt.is_built BaseBuilt.BExec cs.cs_name then + begin + let exec_libdir () = + Filename.concat + (libdir ()) + pkg.name + in + BaseBuilt.fold + BaseBuilt.BExec + cs.cs_name + (fun () fn -> + install_file + ~tgt_fn:(cs.cs_name ^ ext_program ()) + fn + bindir) + (); + BaseBuilt.fold + BaseBuilt.BExecLib + cs.cs_name + (fun () fn -> + install_file + fn + exec_libdir) + (); + install_data + bs.bs_path + bs.bs_data_files + (Filename.concat + (datarootdir ()) + pkg.name) + end + in + List.iter + (function + | Executable (cs, bs, exec)-> + install_exec (cs, bs, exec) + | _ -> + ()) + pkg.sections + in + + let install_docs pkg = + let install_doc data = + let cs, doc = + !doc_hook data + in + if var_choose doc.doc_install && + BaseBuilt.is_built BaseBuilt.BDoc cs.cs_name then + begin + let tgt_dir = + OASISHostPath.of_unix (var_expand doc.doc_install_dir) + in + BaseBuilt.fold + BaseBuilt.BDoc + cs.cs_name + (fun () fn -> + install_file + fn + (fun () -> tgt_dir)) + (); + install_data + Filename.current_dir_name + doc.doc_data_files + doc.doc_install_dir + end + in + List.iter + (function + | Doc (cs, doc) -> + install_doc (cs, doc) + | _ -> + ()) + pkg.sections + in + + install_libs pkg; + install_execs pkg; + install_docs pkg + + + (* Uninstall already installed data *) + let uninstall _ argv = + List.iter + (fun (ev, data) -> + if ev = install_file_ev then + begin + if OASISFileUtil.file_exists_case data then + begin + info + (f_ "Removing file '%s'") + data; + Sys.remove data + end + else + begin + warning + (f_ "File '%s' doesn't exist anymore") + data + end + end + else if ev = install_dir_ev then + begin + if Sys.file_exists data && Sys.is_directory data then + begin + if Sys.readdir data = [||] then + begin + info + (f_ "Removing directory '%s'") + data; + OASISFileUtil.rmdir ~ctxt:!BaseContext.default data + end + else + begin + warning + (f_ "Directory '%s' is not empty (%s)") + data + (String.concat + ", " + (Array.to_list + (Sys.readdir data))) + end + end + else + begin + warning + (f_ "Directory '%s' doesn't exist anymore") + data + end + end + else if ev = install_findlib_ev then + begin + info (f_ "Removing findlib library '%s'") data; + OASISExec.run ~ctxt:!BaseContext.default + (ocamlfind ()) ["remove"; data] + end + else + failwithf (f_ "Unknown log event '%s'") ev; + BaseLog.unregister ev data) + (* We process event in reverse order *) + (List.rev + (BaseLog.filter + [install_file_ev; + install_dir_ev; + install_findlib_ev])) + + +end + + +# 6296 "setup.ml" +module OCamlbuildCommon = struct +(* # 22 "src/plugins/ocamlbuild/OCamlbuildCommon.ml" *) + + + (** Functions common to OCamlbuild build and doc plugin + *) + + + open OASISGettext + open BaseEnv + open BaseStandardVar + open OASISTypes + + + + + type extra_args = string list + + + let ocamlbuild_clean_ev = "ocamlbuild-clean" + + + let ocamlbuildflags = + var_define + ~short_desc:(fun () -> "OCamlbuild additional flags") + "ocamlbuildflags" + (fun () -> "") + + + (** Fix special arguments depending on environment *) + let fix_args args extra_argv = + List.flatten + [ + if (os_type ()) = "Win32" then + [ + "-classic-display"; + "-no-log"; + "-no-links"; + "-install-lib-dir"; + (Filename.concat (standard_library ()) "ocamlbuild") + ] + else + []; + + if not (bool_of_string (is_native ())) || (os_type ()) = "Win32" then + [ + "-byte-plugin" + ] + else + []; + args; + + if bool_of_string (debug ()) then + ["-tag"; "debug"] + else + []; + + if bool_of_string (tests ()) then + ["-tag"; "tests"] + else + []; + + if bool_of_string (profile ()) then + ["-tag"; "profile"] + else + []; + + OASISString.nsplit (ocamlbuildflags ()) ' '; + + Array.to_list extra_argv; + ] + + + (** Run 'ocamlbuild -clean' if not already done *) + let run_clean extra_argv = + let extra_cli = + String.concat " " (Array.to_list extra_argv) + in + (* Run if never called with these args *) + if not (BaseLog.exists ocamlbuild_clean_ev extra_cli) then + begin + OASISExec.run ~ctxt:!BaseContext.default + (ocamlbuild ()) (fix_args ["-clean"] extra_argv); + BaseLog.register ocamlbuild_clean_ev extra_cli; + at_exit + (fun () -> + try + BaseLog.unregister ocamlbuild_clean_ev extra_cli + with _ -> + ()) + end + + + (** Run ocamlbuild, unregister all clean events *) + let run_ocamlbuild args extra_argv = + (* TODO: enforce that target in args must be UNIX encoded i.e. toto/index.html + *) + OASISExec.run ~ctxt:!BaseContext.default + (ocamlbuild ()) (fix_args args extra_argv); + (* Remove any clean event, we must run it again *) + List.iter + (fun (e, d) -> BaseLog.unregister e d) + (BaseLog.filter [ocamlbuild_clean_ev]) + + + (** Determine real build directory *) + let build_dir extra_argv = + let rec search_args dir = + function + | "-build-dir" :: dir :: tl -> + search_args dir tl + | _ :: tl -> + search_args dir tl + | [] -> + dir + in + search_args "_build" (fix_args [] extra_argv) + + +end + +module OCamlbuildPlugin = struct +(* # 22 "src/plugins/ocamlbuild/OCamlbuildPlugin.ml" *) + + + (** Build using ocamlbuild + @author Sylvain Le Gall + *) + + + open OASISTypes + open OASISGettext + open OASISUtils + open OASISString + open BaseEnv + open OCamlbuildCommon + open BaseStandardVar + open BaseMessage + + + + + + let cond_targets_hook = + ref (fun lst -> lst) + + + let build extra_args pkg argv = + (* Return the filename in build directory *) + let in_build_dir fn = + Filename.concat + (build_dir argv) + fn + in + + (* Return the unix filename in host build directory *) + let in_build_dir_of_unix fn = + in_build_dir (OASISHostPath.of_unix fn) + in + + let cond_targets = + List.fold_left + (fun acc -> + function + | Library (cs, bs, lib) when var_choose bs.bs_build -> + begin + let evs, unix_files = + BaseBuilt.of_library + in_build_dir_of_unix + (cs, bs, lib) + in + + let tgts = + List.flatten + (List.filter + (fun l -> l <> []) + (List.map + (List.filter + (fun fn -> + ends_with ~what:".cma" fn + || ends_with ~what:".cmxs" fn + || ends_with ~what:".cmxa" fn + || ends_with ~what:(ext_lib ()) fn + || ends_with ~what:(ext_dll ()) fn)) + unix_files)) + in + + match tgts with + | _ :: _ -> + (evs, tgts) :: acc + | [] -> + failwithf + (f_ "No possible ocamlbuild targets for library %s") + cs.cs_name + end + + | Object (cs, bs, obj) when var_choose bs.bs_build -> + begin + let evs, unix_files = + BaseBuilt.of_object + in_build_dir_of_unix + (cs, bs, obj) + in + + let tgts = + List.flatten + (List.filter + (fun l -> l <> []) + (List.map + (List.filter + (fun fn -> + ends_with ".cmo" fn + || ends_with ".cmx" fn)) + unix_files)) + in + + match tgts with + | _ :: _ -> + (evs, tgts) :: acc + | [] -> + failwithf + (f_ "No possible ocamlbuild targets for object %s") + cs.cs_name + end + + | Executable (cs, bs, exec) when var_choose bs.bs_build -> + begin + let evs, unix_exec_is, unix_dll_opt = + BaseBuilt.of_executable + in_build_dir_of_unix + (cs, bs, exec) + in + + let target ext = + let unix_tgt = + (OASISUnixPath.concat + bs.bs_path + (OASISUnixPath.chop_extension + exec.exec_main_is))^ext + in + let evs = + (* Fix evs, we want to use the unix_tgt, without copying *) + List.map + (function + | BaseBuilt.BExec, nm, lst when nm = cs.cs_name -> + BaseBuilt.BExec, nm, + [[in_build_dir_of_unix unix_tgt]] + | ev -> + ev) + evs + in + evs, [unix_tgt] + in + + (* Add executable *) + let acc = + match bs.bs_compiled_object with + | Native -> + (target ".native") :: acc + | Best when bool_of_string (is_native ()) -> + (target ".native") :: acc + | Byte + | Best -> + (target ".byte") :: acc + in + acc + end + + | Library _ | Object _ | Executable _ | Test _ + | SrcRepo _ | Flag _ | Doc _ -> + acc) + [] + (* Keep the pkg.sections ordered *) + (List.rev pkg.sections); + in + + (* Check and register built files *) + let check_and_register (bt, bnm, lst) = + List.iter + (fun fns -> + if not (List.exists OASISFileUtil.file_exists_case fns) then + failwithf + (fn_ + "Expected built file %s doesn't exist." + "None of expected built files %s exists." + (List.length fns)) + (String.concat (s_ " or ") (List.map (Printf.sprintf "'%s'") fns))) + lst; + (BaseBuilt.register bt bnm lst) + in + + (* Run the hook *) + let cond_targets = !cond_targets_hook cond_targets in + + (* Run a list of target... *) + run_ocamlbuild (List.flatten (List.map snd cond_targets) @ extra_args) argv; + (* ... and register events *) + List.iter check_and_register (List.flatten (List.map fst cond_targets)) + + + let clean pkg extra_args = + run_clean extra_args; + List.iter + (function + | Library (cs, _, _) -> + BaseBuilt.unregister BaseBuilt.BLib cs.cs_name + | Executable (cs, _, _) -> + BaseBuilt.unregister BaseBuilt.BExec cs.cs_name; + BaseBuilt.unregister BaseBuilt.BExecLib cs.cs_name + | _ -> + ()) + pkg.sections + + +end + +module OCamlbuildDocPlugin = struct +(* # 22 "src/plugins/ocamlbuild/OCamlbuildDocPlugin.ml" *) + + + (* Create documentation using ocamlbuild .odocl files + @author Sylvain Le Gall + *) + + + open OASISTypes + open OASISGettext + open OASISMessage + open OCamlbuildCommon + open BaseStandardVar + + + + + type run_t = + { + extra_args: string list; + run_path: unix_filename; + } + + + let doc_build run pkg (cs, doc) argv = + let index_html = + OASISUnixPath.make + [ + run.run_path; + cs.cs_name^".docdir"; + "index.html"; + ] + in + let tgt_dir = + OASISHostPath.make + [ + build_dir argv; + OASISHostPath.of_unix run.run_path; + cs.cs_name^".docdir"; + ] + in + run_ocamlbuild (index_html :: run.extra_args) argv; + List.iter + (fun glb -> + BaseBuilt.register + BaseBuilt.BDoc + cs.cs_name + [OASISFileUtil.glob ~ctxt:!BaseContext.default + (Filename.concat tgt_dir glb)]) + ["*.html"; "*.css"] + + + let doc_clean run pkg (cs, doc) argv = + run_clean argv; + BaseBuilt.unregister BaseBuilt.BDoc cs.cs_name + + +end + + +# 6674 "setup.ml" +open OASISTypes;; + +let setup_t = + { + BaseSetup.configure = InternalConfigurePlugin.configure; + build = OCamlbuildPlugin.build ["-use-ocamlfind"]; + test = []; + doc = + [ + ("keystone", + OCamlbuildDocPlugin.doc_build + { + OCamlbuildDocPlugin.extra_args = ["-use-ocamlfind"]; + run_path = "." + }) + ]; + install = InternalInstallPlugin.install; + uninstall = InternalInstallPlugin.uninstall; + clean = [OCamlbuildPlugin.clean]; + clean_test = []; + clean_doc = + [ + ("keystone", + OCamlbuildDocPlugin.doc_clean + { + OCamlbuildDocPlugin.extra_args = ["-use-ocamlfind"]; + run_path = "." + }) + ]; + distclean = []; + distclean_test = []; + distclean_doc = []; + package = + { + oasis_version = "0.4"; + ocaml_version = Some (OASISVersion.VGreaterEqual "4.01"); + findlib_version = None; + alpha_features = []; + beta_features = []; + name = "keystone"; + version = "0.1"; + license = + OASISLicense.DEP5License + (OASISLicense.DEP5Unit + { + OASISLicense.license = "LGPL"; + excption = Some "OCaml linking"; + version = OASISLicense.Version "2.1" + }); + license_file = None; + copyrights = []; + maintainers = []; + authors = ["Aziem Chawdhary"]; + homepage = None; + synopsis = "Ctypes bindings to Keystone assembler for OCaml"; + description = None; + categories = []; + conf_type = (`Configure, "internal", Some "0.4"); + conf_custom = + { + pre_command = [(OASISExpr.EBool true, None)]; + post_command = [(OASISExpr.EBool true, None)] + }; + build_type = (`Build, "ocamlbuild", Some "0.4"); + build_custom = + { + pre_command = [(OASISExpr.EBool true, None)]; + post_command = [(OASISExpr.EBool true, None)] + }; + install_type = (`Install, "internal", Some "0.4"); + install_custom = + { + pre_command = [(OASISExpr.EBool true, None)]; + post_command = [(OASISExpr.EBool true, None)] + }; + uninstall_custom = + { + pre_command = [(OASISExpr.EBool true, None)]; + post_command = [(OASISExpr.EBool true, None)] + }; + clean_custom = + { + pre_command = [(OASISExpr.EBool true, None)]; + post_command = [(OASISExpr.EBool true, None)] + }; + distclean_custom = + { + pre_command = [(OASISExpr.EBool true, None)]; + post_command = [(OASISExpr.EBool true, None)] + }; + files_ab = []; + sections = + [ + Library + ({ + cs_name = "keystone"; + cs_data = PropList.Data.create (); + cs_plugin_data = [] + }, + { + bs_build = [(OASISExpr.EBool true, true)]; + bs_install = [(OASISExpr.EBool true, true)]; + bs_path = "."; + bs_compiled_object = Native; + bs_build_depends = + [ + FindlibPackage ("ctypes", None); + FindlibPackage ("uchar", None); + FindlibPackage ("ctypes.stubs", None); + FindlibPackage ("ctypes.foreign", None); + FindlibPackage ("result", None) + ]; + bs_build_tools = [ExternalTool "ocamlbuild"]; + bs_c_sources = ["ffi_generated_stubs.c"]; + bs_data_files = []; + bs_ccopt = + [ + (OASISExpr.EBool true, + ["-I"; "${pkg_ctypes_stubs}"]) + ]; + bs_cclib = [(OASISExpr.EBool true, ["-lkeystone"])]; + bs_dlllib = [(OASISExpr.EBool true, [])]; + bs_dllpath = [(OASISExpr.EBool true, [])]; + bs_byteopt = [(OASISExpr.EBool true, [])]; + bs_nativeopt = [(OASISExpr.EBool true, [])] + }, + { + lib_modules = + [ + "Keystone"; + "Ffi_generated"; + "Ffi_types"; + "Ffi_bindings"; + "Ffi_generated_types" + ]; + lib_pack = false; + lib_internal_modules = []; + lib_findlib_parent = None; + lib_findlib_name = Some "keystone"; + lib_findlib_containers = [] + }); + Doc + ({ + cs_name = "keystone"; + cs_data = PropList.Data.create (); + cs_plugin_data = [] + }, + { + doc_type = (`Doc, "ocamlbuild", Some "0.4"); + doc_custom = + { + pre_command = [(OASISExpr.EBool true, None)]; + post_command = [(OASISExpr.EBool true, None)] + }; + doc_build = + [ + (OASISExpr.ENot (OASISExpr.EFlag "docs"), false); + (OASISExpr.EFlag "docs", true) + ]; + doc_install = [(OASISExpr.EBool true, true)]; + doc_install_dir = "$docdir"; + doc_title = "API reference for Keystone"; + doc_authors = []; + doc_abstract = None; + doc_format = OtherDoc; + doc_data_files = []; + doc_build_tools = + [ExternalTool "ocamlbuild"; ExternalTool "ocamldoc"] + }); + Executable + ({ + cs_name = "ffi_types_stubgen"; + cs_data = PropList.Data.create (); + cs_plugin_data = [] + }, + { + bs_build = [(OASISExpr.EBool true, true)]; + bs_install = [(OASISExpr.EBool true, false)]; + bs_path = "."; + bs_compiled_object = Native; + bs_build_depends = + [FindlibPackage ("ctypes.stubs", None)]; + bs_build_tools = [ExternalTool "ocamlbuild"]; + bs_c_sources = []; + bs_data_files = []; + bs_ccopt = [(OASISExpr.EBool true, [])]; + bs_cclib = [(OASISExpr.EBool true, [])]; + bs_dlllib = [(OASISExpr.EBool true, [])]; + bs_dllpath = [(OASISExpr.EBool true, [])]; + bs_byteopt = [(OASISExpr.EBool true, [])]; + bs_nativeopt = [(OASISExpr.EBool true, [])] + }, + { + exec_custom = false; + exec_main_is = "ffi_types_stubgen.ml" + }); + Executable + ({ + cs_name = "ffi_stubgen"; + cs_data = PropList.Data.create (); + cs_plugin_data = [] + }, + { + bs_build = [(OASISExpr.EBool true, true)]; + bs_install = [(OASISExpr.EBool true, false)]; + bs_path = "."; + bs_compiled_object = Native; + bs_build_depends = + [ + FindlibPackage ("ctypes.stubs", None); + FindlibPackage ("ctypes.foreign", None) + ]; + bs_build_tools = [ExternalTool "ocamlbuild"]; + bs_c_sources = []; + bs_data_files = []; + bs_ccopt = [(OASISExpr.EBool true, [])]; + bs_cclib = [(OASISExpr.EBool true, [])]; + bs_dlllib = [(OASISExpr.EBool true, [])]; + bs_dllpath = [(OASISExpr.EBool true, [])]; + bs_byteopt = [(OASISExpr.EBool true, [])]; + bs_nativeopt = [(OASISExpr.EBool true, [])] + }, + {exec_custom = false; exec_main_is = "ffi_stubgen.ml"}); + Executable + ({ + cs_name = "test_bindings"; + cs_data = PropList.Data.create (); + cs_plugin_data = [] + }, + { + bs_build = [(OASISExpr.EBool true, true)]; + bs_install = [(OASISExpr.EBool true, false)]; + bs_path = "."; + bs_compiled_object = Native; + bs_build_depends = [InternalLibrary "keystone"]; + bs_build_tools = [ExternalTool "ocamlbuild"]; + bs_c_sources = []; + bs_data_files = []; + bs_ccopt = [(OASISExpr.EBool true, [])]; + bs_cclib = [(OASISExpr.EBool true, ["-lkeystone"])]; + bs_dlllib = [(OASISExpr.EBool true, [])]; + bs_dllpath = [(OASISExpr.EBool true, [])]; + bs_byteopt = [(OASISExpr.EBool true, [])]; + bs_nativeopt = [(OASISExpr.EBool true, [])] + }, + {exec_custom = false; exec_main_is = "test_bindings.ml"}) + ]; + plugins = + [(`Extra, "DevFiles", Some "0.4"); (`Extra, "META", Some "0.4")]; + disable_oasis_section = []; + schema_data = PropList.Data.create (); + plugin_data = [] + }; + oasis_fn = Some "_oasis"; + oasis_version = "0.4.6"; + oasis_digest = Some "\0174\176\255\171N\142\235\136\215R8\140\185^\250"; + oasis_exec = None; + oasis_setup_args = []; + setup_update = false + };; + +let setup () = BaseSetup.setup setup_t;; + +# 6939 "setup.ml" +(* OASIS_STOP *) +let () = setup ();; diff --git a/bindings/ocaml/test_bindings.ml b/bindings/ocaml/test_bindings.ml new file mode 100644 index 0000000..e4bdd2b --- /dev/null +++ b/bindings/ocaml/test_bindings.ml @@ -0,0 +1,58 @@ +open Keystone + +module T = Keystone.Types + +let test_ks arch mode ?(syntax=T.KS_OPT_SYNTAX_INTEL) ?(endian=T.KS_MODE_LITTLE_ENDIAN) asm = + Printf.printf "ASSEMBLING %s\n" asm; flush stdout; + match (ks_open arch ~endian:endian mode) with + | Result.Ok engine -> + begin + ignore(ks_option engine T.KS_OPT_SYNTAX syntax); + match (ks_asm engine asm 0) with + | Result.Ok(result) -> + Printf.printf "%s = %s\nAssembled: %i bytes, %i statements\n \n" + asm + (asm_array_to_string result.encoding) + result.encoding_size + result.stat_count; + ignore(ks_close engine) + + | Result.Error s -> ignore (ks_close engine); + Printf.printf "ERROR: failed on ks_asm with: %s\n" s + end + + | Result.Error e -> Printf.printf "ERROR: failed on ks_open: %s\n" e + + +let _ = + test_ks T.KS_ARCH_X86 T.KS_MODE_16 "add eax, ecx"; + test_ks T.KS_ARCH_X86 T.KS_MODE_32 "add eax, ecx"; + test_ks T.KS_ARCH_X86 T.KS_MODE_64 "add rax, rcx"; + test_ks T.KS_ARCH_X86 T.KS_MODE_32 ~syntax:T.KS_OPT_SYNTAX_ATT "add %ecx, %eax"; + test_ks T.KS_ARCH_X86 T.KS_MODE_64 ~syntax:T.KS_OPT_SYNTAX_ATT "add %rcx, %rax"; + test_ks T.KS_ARCH_X86 T.KS_MODE_32 ~syntax:T.KS_OPT_SYNTAX_RADIX16 "add eax, 15"; + + test_ks T.KS_ARCH_ARM T.KS_MODE_ARM "sub r1, r2, r5"; + test_ks T.KS_ARCH_ARM T.KS_MODE_ARM "sub r1, r2, r5"; + test_ks T.KS_ARCH_ARM T.KS_MODE_ARM ~endian:T.KS_MODE_BIG_ENDIAN "sub r1, r2, r5"; + test_ks T.KS_ARCH_ARM T.KS_MODE_THUMB "movs r4, #0xf0"; + test_ks T.KS_ARCH_ARM T.KS_MODE_THUMB ~endian:T.KS_MODE_BIG_ENDIAN "movs r4, #0xf0"; + + test_ks T.KS_ARCH_ARM64 T.KS_MODE_LITTLE_ENDIAN "ldr w1, [sp, #0x8]"; + + test_ks T.KS_ARCH_HEXAGON T.KS_MODE_BIG_ENDIAN "v23.w=vavg(v11.w,v2.w):rnd"; + + test_ks T.KS_ARCH_MIPS T.KS_MODE_MIPS32 "and $9, $6, $7"; + test_ks T.KS_ARCH_MIPS T.KS_MODE_MIPS32 ~endian:T.KS_MODE_BIG_ENDIAN "and $9, $6, $7"; + + test_ks T.KS_ARCH_MIPS T.KS_MODE_MIPS64 "and $9, $6, $7"; + test_ks T.KS_ARCH_MIPS T.KS_MODE_MIPS64 ~endian:T.KS_MODE_BIG_ENDIAN "and $9, $6, $7"; + + test_ks T.KS_ARCH_PPC T.KS_MODE_PPC32 ~endian:T.KS_MODE_BIG_ENDIAN "add 1,2,3"; + test_ks T.KS_ARCH_PPC T.KS_MODE_PPC64 "add 1,2,3"; + test_ks T.KS_ARCH_PPC T.KS_MODE_PPC64 ~endian:T.KS_MODE_BIG_ENDIAN "add 1,2,3"; + + test_ks T.KS_ARCH_SPARC T.KS_MODE_SPARC32 "add %g1, %g2, %g3"; + test_ks T.KS_ARCH_SPARC T.KS_MODE_SPARC32 ~endian:T.KS_MODE_BIG_ENDIAN "add %g1, %g2, %g3"; + + test_ks T.KS_ARCH_SYSTEMZ T.KS_MODE_BIG_ENDIAN "a %r0, 4095(%r15, %r1)" diff --git a/bindings/powershell/Keystone/Const/keystone_h.cs b/bindings/powershell/Keystone/Const/keystone_h.cs new file mode 100644 index 0000000..ad29764 --- /dev/null +++ b/bindings/powershell/Keystone/Const/keystone_h.cs @@ -0,0 +1,91 @@ +/// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [keystone_h.cs] +KS_API_MAJOR = 0, +KS_API_MINOR = 9, +KS_VERSION_MAJOR = 0, +KS_VERSION_MINOR = 9, +KS_VERSION_EXTRA = 2, +KS_ARCH_ARM = 1, +KS_ARCH_ARM64 = 2, +KS_ARCH_MIPS = 3, +KS_ARCH_X86 = 4, +KS_ARCH_PPC = 5, +KS_ARCH_SPARC = 6, +KS_ARCH_SYSTEMZ = 7, +KS_ARCH_HEXAGON = 8, +KS_ARCH_EVM = 9, +KS_ARCH_MAX = 10, +KS_MODE_LITTLE_ENDIAN = 0, +KS_MODE_BIG_ENDIAN = 1073741824, +KS_MODE_ARM = 1, +KS_MODE_THUMB = 16, +KS_MODE_V8 = 64, +KS_MODE_MICRO = 16, +KS_MODE_MIPS3 = 32, +KS_MODE_MIPS32R6 = 64, +KS_MODE_MIPS32 = 4, +KS_MODE_MIPS64 = 8, +KS_MODE_16 = 2, +KS_MODE_32 = 4, +KS_MODE_64 = 8, +KS_MODE_PPC32 = 4, +KS_MODE_PPC64 = 8, +KS_MODE_QPX = 16, +KS_MODE_SPARC32 = 4, +KS_MODE_SPARC64 = 8, +KS_MODE_V9 = 16, +KS_ERR_ASM = 128, +KS_ERR_ASM_ARCH = 512, +KS_ERR_OK = 0, +KS_ERR_NOMEM = 1, +KS_ERR_ARCH = 2, +KS_ERR_HANDLE = 3, +KS_ERR_MODE = 4, +KS_ERR_VERSION = 5, +KS_ERR_OPT_INVALID = 6, +KS_ERR_ASM_EXPR_TOKEN = 128, +KS_ERR_ASM_DIRECTIVE_VALUE_RANGE = 129, +KS_ERR_ASM_DIRECTIVE_ID = 130, +KS_ERR_ASM_DIRECTIVE_TOKEN = 131, +KS_ERR_ASM_DIRECTIVE_STR = 132, +KS_ERR_ASM_DIRECTIVE_COMMA = 133, +KS_ERR_ASM_DIRECTIVE_RELOC_NAME = 134, +KS_ERR_ASM_DIRECTIVE_RELOC_TOKEN = 135, +KS_ERR_ASM_DIRECTIVE_FPOINT = 136, +KS_ERR_ASM_DIRECTIVE_UNKNOWN = 137, +KS_ERR_ASM_DIRECTIVE_EQU = 138, +KS_ERR_ASM_DIRECTIVE_INVALID = 139, +KS_ERR_ASM_VARIANT_INVALID = 140, +KS_ERR_ASM_EXPR_BRACKET = 141, +KS_ERR_ASM_SYMBOL_MODIFIER = 142, +KS_ERR_ASM_SYMBOL_REDEFINED = 143, +KS_ERR_ASM_SYMBOL_MISSING = 144, +KS_ERR_ASM_RPAREN = 145, +KS_ERR_ASM_STAT_TOKEN = 146, +KS_ERR_ASM_UNSUPPORTED = 147, +KS_ERR_ASM_MACRO_TOKEN = 148, +KS_ERR_ASM_MACRO_PAREN = 149, +KS_ERR_ASM_MACRO_EQU = 150, +KS_ERR_ASM_MACRO_ARGS = 151, +KS_ERR_ASM_MACRO_LEVELS_EXCEED = 152, +KS_ERR_ASM_MACRO_STR = 153, +KS_ERR_ASM_MACRO_INVALID = 154, +KS_ERR_ASM_ESC_BACKSLASH = 155, +KS_ERR_ASM_ESC_OCTAL = 156, +KS_ERR_ASM_ESC_SEQUENCE = 157, +KS_ERR_ASM_ESC_STR = 158, +KS_ERR_ASM_TOKEN_INVALID = 159, +KS_ERR_ASM_INSN_UNSUPPORTED = 160, +KS_ERR_ASM_FIXUP_INVALID = 161, +KS_ERR_ASM_LABEL_INVALID = 162, +KS_ERR_ASM_FRAGMENT_INVALID = 163, +KS_ERR_ASM_INVALIDOPERAND = 512, +KS_ERR_ASM_MISSINGFEATURE = 513, +KS_ERR_ASM_MNEMONICFAIL = 514, +KS_OPT_SYNTAX = 1, +KS_OPT_SYM_RESOLVER = 2, +KS_OPT_SYNTAX_INTEL = 1, +KS_OPT_SYNTAX_ATT = 2, +KS_OPT_SYNTAX_NASM = 4, +KS_OPT_SYNTAX_MASM = 8, +KS_OPT_SYNTAX_GAS = 16, +KS_OPT_SYNTAX_RADIX16 = 32, diff --git a/bindings/powershell/Keystone/Keystone.psd1 b/bindings/powershell/Keystone/Keystone.psd1 new file mode 100644 index 0000000..73936b2 --- /dev/null +++ b/bindings/powershell/Keystone/Keystone.psd1 @@ -0,0 +1,22 @@ +@{ +# Script module or binary module file associated with this manifest. +ModuleToProcess = 'Keystone.psm1' + +# Version number of this module. +ModuleVersion = '0.0.0.1' + +# ID used to uniquely identify this module +GUID = 'd34db33f-7f65-4681-9cfb-0cf4929a8e68' + +# Author of this module +Author = 'Ruben Boonen' + +# Description of the functionality provided by this module +Description = 'Keystone Engine Binding Module' + +# Minimum version of the Windows PowerShell engine required by this module +PowerShellVersion = '2.0' + +# Functions to export from this module +FunctionsToExport = '*' +} diff --git a/bindings/powershell/Keystone/Keystone.psm1 b/bindings/powershell/Keystone/Keystone.psm1 new file mode 100644 index 0000000..c72eb42 --- /dev/null +++ b/bindings/powershell/Keystone/Keystone.psm1 @@ -0,0 +1,313 @@ +function Get-KeystoneAssembly { +<# +.SYNOPSIS + Powershell wrapper for Keystone (using inline C#). + +.DESCRIPTION + Author: Ruben Boonen (@FuzzySec) + License: BSD 3-Clause + Required Dependencies: None + Optional Dependencies: None + +.PARAMETER Architecture + Architecture type. + +.PARAMETER Mode + Mode type. + +.PARAMETER Code + Assembly string, use ";" or multi-line variables for instruction separation. + +.PARAMETER Syntax + Syntax for input assembly. + +.PARAMETER Version + Print ASCII version banner. + +.EXAMPLE + + # Support for multi-line code blocks + PS C:\> $Code = @" + >> sub esp, 200 + >> pop eax + >> pop ecx + >> ret + >> "@ + PS C:\> Get-KeystoneAssembly -Architecture KS_ARCH_X86 -Mode KS_MODE_32 -Code $Code + + Bytes : 9 + Instructions : 4 + PSArray : {0x81, 0xEC, 0xC8, 0x00...} + CArray : {\x81, \xEC, \xC8, \x00...} + RawArray : {81, EC, C8, 00...} + +.EXAMPLE + + # Get-KeystoneAssembly emits objects + PS C:\> $Code = @" + >> sub esp, 200 + >> pop eax + >> pop ecx + >> ret + >> "@ + PS C:\> $Object = Get-KeystoneAssembly -Architecture KS_ARCH_X86 -Mode KS_MODE_32 -Code $Code + PS C:\> $Object.RawArray -join "" + 81ECC80000005859C3 + PS C:\> $Object.CArray -join "" + \x81\xEC\xC8\x00\x00\x00\x58\x59\xC3 + PS C:\> "`$Shellcode = {" + $($Object.PSArray -join ", ") + "}" + $Shellcode = {0x81, 0xEC, 0xC8, 0x00, 0x00, 0x00, 0x58, 0x59, 0xC3} + +#> + + param( + [Parameter(ParameterSetName='Keystone', Mandatory = $True)] + [ValidateSet( + 'KS_ARCH_ARM', + 'KS_ARCH_ARM64', + 'KS_ARCH_MIPS', + 'KS_ARCH_X86', + 'KS_ARCH_PPC', + 'KS_ARCH_SPARC', + 'KS_ARCH_SYSTEMZ', + 'KS_ARCH_HEXAGON', + 'KS_ARCH_MAX') + ] + [String]$Architecture, + + [Parameter(ParameterSetName='Keystone', Mandatory = $True)] + [ValidateSet( + 'KS_MODE_LITTLE_ENDIAN', + 'KS_MODE_BIG_ENDIAN', + 'KS_MODE_ARM', + 'KS_MODE_THUMB', + 'KS_MODE_V8', + 'KS_MODE_MICRO', + 'KS_MODE_MIPS3', + 'KS_MODE_MIPS32R6', + 'KS_MODE_MIPS32', + 'KS_MODE_MIPS64', + 'KS_MODE_16', + 'KS_MODE_32', + 'KS_MODE_64', + 'KS_MODE_PPC32', + 'KS_MODE_PPC64', + 'KS_MODE_QPX', + 'KS_MODE_SPARC32', + 'KS_MODE_SPARC64', + 'KS_MODE_V9') + ] + [String]$Mode, + + [Parameter(ParameterSetName='Keystone', Mandatory = $True)] + [ValidateNotNullOrEmpty()] + [string]$Code, + + [Parameter(ParameterSetName='Keystone', Mandatory = $False)] + [ValidateSet( + 'KS_OPT_SYNTAX_INTEL', + 'KS_OPT_SYNTAX_ATT', + 'KS_OPT_SYNTAX_NASM', + 'KS_OPT_SYNTAX_MASM', + 'KS_OPT_SYNTAX_GAS') + ] + [String]$Syntax = "KS_OPT_SYNTAX_INTEL", + + [Parameter(ParameterSetName='Version', Mandatory = $False)] + [switch]$Version = $null + ) + + # Compatibility for PS v2 / PS v3+ + if(!$PSScriptRoot) { + $PSScriptRoot = Split-Path $MyInvocation.MyCommand.Path -Parent + } + + # Set the keystone DLL path + $DllPath = $($PSScriptRoot + '\Lib\Keystone\keystone.dll').Replace('\','\\') + + # Make sure the user didn't forget the DLL + if (![IO.File]::Exists($DllPath)) { + echo "`n[!] Missing Keystone DLL" + echo "[>] Quitting!`n" + Return + } + + # Load C# constants + $ks_err = Select-String "KS_ERR_" $($PSScriptRoot + '\Const\keystone_h.cs') |select -exp line + $ks_arch = Select-String "KS_ARCH_" $($PSScriptRoot + '\Const\keystone_h.cs') |select -exp line + $ks_mode = Select-String "KS_MODE_" $($PSScriptRoot + '\Const\keystone_h.cs') |select -exp line + $ks_opt_value = Select-String "KS_OPT_SYNTAX_" $($PSScriptRoot + '\Const\keystone_h.cs') |select -exp line + + # Inline C# to parse the unmanaged keystone DLL + Add-Type -TypeDefinition @" + using System; + using System.Diagnostics; + using System.Runtime.InteropServices; + using System.Security.Principal; + + public enum ks_err : int + { + $ks_err + } + + public enum ks_arch : int + { + $ks_arch + } + + public enum ks_mode : int + { + $ks_mode + } + + public enum ks_opt_value : uint + { + $ks_opt_value + } + + public static class Keystone + { + [DllImport("$DllPath")] + public static extern ks_err ks_open( + ks_arch arch, + ks_mode mode, + ref IntPtr handle); + + [DllImport("$DllPath")] + public static extern ks_err ks_option( + IntPtr handle, + int mode, + ks_opt_value value); + + [DllImport("$DllPath")] + public static extern int ks_asm( + IntPtr handle, + String assembly, + ulong address, + ref IntPtr encoding, + ref uint encoding_size, + ref uint stat_count); + + [DllImport("$DllPath")] + public static extern ks_err ks_errno( + IntPtr handle); + + [DllImport("$DllPath")] + public static extern ks_err ks_close( + IntPtr handle); + + [DllImport("$DllPath")] + public static extern void ks_free( + IntPtr handle); + + [DllImport("$DllPath")] + public static extern int ks_version( + uint major, + uint minor); + } +"@ + + if ($Version){ + $VerCount = [System.BitConverter]::GetBytes($([Keystone]::ks_version($null,$null))) + $Banner = @" + + ;# + ######### + ######"" ;; + ###";#### ;############## + ##### ### ##"" "## ""###### + #### ### ""### "### + #### ## "### "# + "### \# ; #### + "### " ##"#### + ## \### ## #### + #### "###; ### #### + ######## "#" ;### ###"##### + "#############" ####"/##" + " ;####### + "#######" + # + + -=[Keystone Engine v$($VerCount[1]).$($VerCount[0])]=- + +"@ + # Mmm ASCII version banner! + $Banner + Return + } + + # Asm Handle + $AsmHandle = [IntPtr]::Zero + + # Initialize Keystone with ks_open() + $CallResult = [Keystone]::ks_open($Architecture,$Mode,[ref]$AsmHandle) + if ($CallResult -ne "KS_ERR_OK") { + if ($CallResult -eq "KS_ERR_MODE"){ + echo "`n[!] Invalid Architecture/Mode combination" + echo "[>] Quitting..`n" + } else { + echo "`n[!] cs_open error: $CallResult" + echo "[>] Quitting..`n" + } + Return + } + + # Only one ks_opt_type -> KS_OPT_SYNTAX = 1 + $CallResult = [Keystone]::ks_option($AsmHandle, 1, $Syntax) + if ($CallResult -ne "KS_ERR_OK") { + echo "`n[!] ks_option error: $CallResult" + echo "[>] Quitting..`n" + $CallResult = [Keystone]::ks_close($AsmHandle) + Return + } + + # Result variables + $Encoded = [IntPtr]::Zero + [int]$Encoded_size = 0 + [int]$Stat_count = 0 + + # Assemble instructions + $CallResult = [Keystone]::ks_asm($AsmHandle, $Code, 0, [ref]$Encoded, [ref]$Encoded_size, [ref]$stat_count) + + if ($CallResult -ne 0) { + echo "`n[!] ks_asm error: $([Keystone]::ks_errno($AsmHandle))" + echo "[>] Quitting..`n" + $CallResult = [Keystone]::ks_close($AsmHandle) + Return + } else { + $BufferOffset = $Encoded.ToInt64() + + if ($Encoded_size -gt 0) { + # PS/C# hex array + $PSArray = @() + # C-style hex array + $CArray = @() + # Raw hex array + $RawArray = @() + for ($i=0; $i -lt $Encoded_size; $i++) { + $PSArray += echo "0x$("{0:X2}" -f $([Runtime.InteropServices.Marshal]::ReadByte($BufferOffset)))" + $CArray += echo "\x$("{0:X2}" -f $([Runtime.InteropServices.Marshal]::ReadByte($BufferOffset)))" + $RawArray += echo "$("{0:X2}" -f $([Runtime.InteropServices.Marshal]::ReadByte($BufferOffset)))" + $BufferOffset = $BufferOffset+1 + } + # Result Object + $HashTable = @{ + Bytes = $Encoded_size + Instructions = $stat_count + PSArray = $PSArray + CArray = $CArray + RawArray = $RawArray + } + New-Object PSObject -Property $HashTable |Select-Object Bytes,Instructions,PSArray,CArray,RawArray + + # Clean up! + [Keystone]::ks_free($Encoded) + $CallResult = [Keystone]::ks_close($AsmHandle) + } else { + echo "`n[!] No bytes assembled" + echo "[>] Quitting..`n" + $CallResult = [Keystone]::ks_close($AsmHandle) + Return + } + } +} \ No newline at end of file diff --git a/bindings/powershell/Keystone/Lib/Keystone/.gitignore b/bindings/powershell/Keystone/Lib/Keystone/.gitignore new file mode 100644 index 0000000..e69de29 diff --git a/bindings/powershell/README.md b/bindings/powershell/README.md new file mode 100644 index 0000000..0fd165c --- /dev/null +++ b/bindings/powershell/README.md @@ -0,0 +1,38 @@ +This documentation explains how to install & use PowerShell binding for Keystone. + + +Install +------ + +Compile the relevant version (x86/x64) of `keystone.dll` and place it in +`./Keystone/Lib/Keystone/`. + +Alternatively, pre-compiled DLL’s can be obtained from the Keystone homepage +at http://keystone-engine.org/download + + +Usage +----- + +To use the PowerShell binding, the entire Keystone folder should be added to +one of the PowerShell module directories: + + # Global PSModulePath path + %Windir%\System32\WindowsPowerShell\v1.0\Modules + + # User PSModulePath path + %UserProfile%\Documents\WindowsPowerShell\Modules + +Once this is done the module can be initialized by typing “Import-Module Keystone” +in a new PowerShell terminal. Further information on the usage of the binding +can be obtained with the following command: + + Get-Help Get-KeystoneAssembly -Full + + +Notes +----- + +The Keystone engine requires the Visual C++ Redistributable Packages for Visual +Studio 2013. The architecture relevant installer can be downloaded at the +URL https://www.microsoft.com/en-gb/download/confirmation.aspx?id=40784 diff --git a/bindings/python/LICENSE.TXT b/bindings/python/LICENSE.TXT new file mode 100644 index 0000000..a47b0bc --- /dev/null +++ b/bindings/python/LICENSE.TXT @@ -0,0 +1,32 @@ +This is the software license for Python binding of Keystone Engine. + +Keystone has been designed & implemented by Nguyen Anh Quynh. + +See http://www.keystone-engine.org for further information. + +Copyright (c) 2016, Nguyen Anh Quynh. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + +* Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. +* Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. +* Neither the name of the developer(s) nor the names of its + contributors may be used to endorse or promote products derived from this + software without specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +POSSIBILITY OF SUCH DAMAGE. diff --git a/bindings/python/MANIFEST.in b/bindings/python/MANIFEST.in new file mode 100644 index 0000000..9335b55 --- /dev/null +++ b/bindings/python/MANIFEST.in @@ -0,0 +1,6 @@ +recursive-include src * +recursive-include prebuilt * +include LICENSE.TXT +include README.md +global-exclude *.pyc +global-exclude __pycache__ diff --git a/bindings/python/Makefile b/bindings/python/Makefile new file mode 100644 index 0000000..5bce6e7 --- /dev/null +++ b/bindings/python/Makefile @@ -0,0 +1,82 @@ +# Python binding for Keystone engine. Nguyen Anh Quynh + +ifndef BUILDDIR +OBJDIR = ./build +else +OBJDIR = $(abspath $(BUILDDIR))/obj/bindings/python +endif + +.PHONY: gen_const install install3 clean + +gen_const: + cd .. && python const_generator.py python + +install: + rm -rf $(OBJDIR) src/ + rm -rf prebuilt/win64/keystone.dll + rm -rf prebuilt/win32/keystone.dll + if test -n "${DESTDIR}"; then \ + python setup.py build -b $(OBJDIR) install --root="${DESTDIR}"; \ + else \ + python setup.py build -b $(OBJDIR) install; \ + fi + +install3: + rm -rf $(OBJDIR) src/ + rm -rf prebuilt/win64/keystone.dll + rm -rf prebuilt/win32/keystone.dll + if test -n "${DESTDIR}"; then \ + python3 setup.py build -b $(OBJDIR) install --root="${DESTDIR}"; \ + else \ + python3 setup.py build -b $(OBJDIR) install; \ + fi + +# build & upload PyPi package with source code of the core +sdist: + rm -rf src/ dist/ + rm -rf prebuilt/win64/keystone.dll + rm -rf prebuilt/win32/keystone.dll + cp README.pypi-src README + cp PKG-INFO.src PKG-INFO + python setup.py sdist register upload + +# build & upload PyPi package with source code of the core +sdist3: + rm -rf src/ dist/ + rm -rf prebuilt/win64/keystone.dll + rm -rf prebuilt/win32/keystone.dll + cp README.pypi-src README + cp PKG-INFO.src PKG-INFO + python3 setup.py sdist register upload + +# build & upload PyPi package with prebuilt core +# NOTE: be sure to have precompiled core under prebuilt/win*/ beforehand +sdist_win: + rm -rf src/ dist/ + cp README.pypi-win README + cp PKG-INFO.win PKG-INFO + python setup.py sdist register upload + +# build & upload PyPi package with prebuilt core +# NOTE: be sure to have precompiled core under prebuilt/win*/ beforehand +sdist3_win: + rm -rf src/ dist/ + cp README.pypi-win README + cp PKG-INFO.win PKG-INFO + python3 setup.py sdist register upload + +clean: + rm -rf $(OBJDIR) src/ dist/ README + rm -f keystone/*.so + rm -rf prebuilt/win64/keystone.dll + rm -rf prebuilt/win32/keystone.dll + + +SAMPLES = sample_arm.py sample_arm64.py sample_mips.py +SAMPLES += sample_sparc.py sample_m68k.py sample_x86.py +check: + @for t in $(SAMPLES); do \ + echo Check $$t ... ; \ + ./$$t > /dev/null && echo OK || echo FAILED; \ + done + diff --git a/bindings/python/README.md b/bindings/python/README.md new file mode 100644 index 0000000..9c527fb --- /dev/null +++ b/bindings/python/README.md @@ -0,0 +1,35 @@ +To install Python binding from Pypi (binary), simply do: + + pip install keystone-engine + + +In case you want to install from source code, follow the below steps. + + +0. Install the core engine as dependency + + Follow README.md in the root directory to compile & install the core. + + +1. To install pure Python binding on *nix, run the command below in the Python bindings directory: + + $ sudo make install + + To install Python3 binding package, run the command below: + (Note: this requires python3 installed in your machine) + + $ sudo make install3 + + For example how to use Keystone API, see sample.py + + +2. To install Python binding on Windows: + + Run the following command in command prompt: + + C:\> C:\location_to_python\python.exe setup.py install + + Next, copy all the DLL files from the 'Core engine for Windows' package available + on the same Keystone download page and paste it in the path: + + C:\location_to_python\Lib\site-packages\keystone\ diff --git a/bindings/python/README.pypi-src b/bindings/python/README.pypi-src new file mode 100644 index 0000000..e610f35 --- /dev/null +++ b/bindings/python/README.pypi-src @@ -0,0 +1,25 @@ +Keystone is a lightweight multi-platform, multi-architecture assembler framework. +It offers some unparalleled features: + +- Multi-architecture, with support for Arm, Arm64 (AArch64/Armv8), Hexagon, Mips, PowerPC, Sparc, SystemZ & X86 (include 16/32/64bit). +- Clean/simple/lightweight/intuitive architecture-neutral API. +- Implemented in C/C++ languages, with bindings for Python, NodeJS, Ruby, Go, Rust, Haskell & OCaml available. +- Native support for Windows & \*nix (with Mac OSX, Linux, *BSD & Solaris confirmed). +- Thread-safe by design. +- Open source - with a dual license. + +Further information is available at http://www.keystone-engine.org + + +[License] + +Keystone is available under a dual license: + +- Version 2 of the GNU General Public License (GPLv2). (I.e. Without the "any later version" clause.). + License information can be found in the COPYING and the EXCEPTIONS-CLIENT. + + This combination allows almost all of open source projects to use Keystone without conflicts. + +- For commercial usage in production environments, contact the authors of Keystone to buy a royalty-free license. + + See LICENSE-COM.TXT for more information. diff --git a/bindings/python/build_wheel.sh b/bindings/python/build_wheel.sh new file mode 100644 index 0000000..39ffcb3 --- /dev/null +++ b/bindings/python/build_wheel.sh @@ -0,0 +1,15 @@ +#!/bin/bash +set -e -x + +cd bindings/python +sudo rm /usr/bin/python && sudo ln -s /opt/python/cp27-cp27m/bin/python /usr/bin/python; python -V + +# Compile wheels +if [ -f /opt/python/cp36-cp36m/bin/python ];then + /opt/python/cp36-cp36m/bin/python setup.py bdist_wheel +else + python3 setup.py bdist_wheel +fi +cd dist +auditwheel repair *.whl +mv -f wheelhouse/*.whl . diff --git a/bindings/python/debian/changelog b/bindings/python/debian/changelog new file mode 100644 index 0000000..5f56a99 --- /dev/null +++ b/bindings/python/debian/changelog @@ -0,0 +1,14 @@ +keystone-engine (0.9.2-1) unstable; urgency=low + + * Fix for Python binding (Pypi package) + * Fix module loading issue + * Load library versioning + * Add as_bytes=True param to asm() + + -- Michael Mohr Tue, 21 Jul 2020 21:21:36 -0700 + +keystone-engine (0.9.1-3) unstable; urgency=low + + * Initial packaging. + + -- Michael Mohr Sun, 11 Mar 2018 23:34:28 -0700 diff --git a/bindings/python/debian/compat b/bindings/python/debian/compat new file mode 100644 index 0000000..ec63514 --- /dev/null +++ b/bindings/python/debian/compat @@ -0,0 +1 @@ +9 diff --git a/bindings/python/debian/control b/bindings/python/debian/control new file mode 100644 index 0000000..4c493dc --- /dev/null +++ b/bindings/python/debian/control @@ -0,0 +1,19 @@ +Source: keystone-engine +Maintainer: Michael Mohr +Section: python +Priority: optional +Build-Depends: dh-python, python-all (>= 2.6.6-3), debhelper (>= 9), + python-setuptools, python3-all, python3-setuptools +Standards-Version: 3.9.6 +X-Python3-Version: >= 3.4 +Homepage: http://www.keystone-engine.org + +Package: python-keystone-engine +Architecture: all +Depends: ${misc:Depends}, ${python:Depends}, keystone-engine1 +Description: Keystone assembler engine (Python 2) + +Package: python3-keystone-engine +Architecture: all +Depends: ${misc:Depends}, ${python3:Depends}, keystone-engine1 +Description: Keystone assembler engine (Python 3) diff --git a/bindings/python/debian/rules b/bindings/python/debian/rules new file mode 100644 index 0000000..24c9b9e --- /dev/null +++ b/bindings/python/debian/rules @@ -0,0 +1,7 @@ +#!/usr/bin/make -f + +export PYBUILD_NAME=keystone-engine + +%: + dh $@ --with python2,python3 --buildsystem=pybuild + diff --git a/bindings/python/debian/source/format b/bindings/python/debian/source/format new file mode 100644 index 0000000..163aaf8 --- /dev/null +++ b/bindings/python/debian/source/format @@ -0,0 +1 @@ +3.0 (quilt) diff --git a/bindings/python/keystone/__init__.py b/bindings/python/keystone/__init__.py new file mode 100644 index 0000000..5e4a966 --- /dev/null +++ b/bindings/python/keystone/__init__.py @@ -0,0 +1,4 @@ +# Keystone Python bindings, by Nguyen Anh Quynnh +from . import arm_const, arm64_const, mips_const, sparc_const, hexagon_const, systemz_const, ppc_const, x86_const +from .keystone_const import * +from .keystone import Ks, ks_version, ks_arch_supported, version_bind, debug, KsError, __version__ diff --git a/bindings/python/keystone/arm64_const.py b/bindings/python/keystone/arm64_const.py new file mode 100644 index 0000000..8d3fe1d --- /dev/null +++ b/bindings/python/keystone/arm64_const.py @@ -0,0 +1,4 @@ +# For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [arm64_const.py] +KS_ERR_ASM_ARM64_INVALIDOPERAND = 512 +KS_ERR_ASM_ARM64_MISSINGFEATURE = 513 +KS_ERR_ASM_ARM64_MNEMONICFAIL = 514 diff --git a/bindings/python/keystone/arm_const.py b/bindings/python/keystone/arm_const.py new file mode 100644 index 0000000..93e7f93 --- /dev/null +++ b/bindings/python/keystone/arm_const.py @@ -0,0 +1,4 @@ +# For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [arm_const.py] +KS_ERR_ASM_ARM_INVALIDOPERAND = 512 +KS_ERR_ASM_ARM_MISSINGFEATURE = 513 +KS_ERR_ASM_ARM_MNEMONICFAIL = 514 diff --git a/bindings/python/keystone/evm_const.py b/bindings/python/keystone/evm_const.py new file mode 100644 index 0000000..699d697 --- /dev/null +++ b/bindings/python/keystone/evm_const.py @@ -0,0 +1,4 @@ +# For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [evm_const.py] +KS_ERR_ASM_EVM_INVALIDOPERAND = 512 +KS_ERR_ASM_EVM_MISSINGFEATURE = 513 +KS_ERR_ASM_EVM_MNEMONICFAIL = 514 diff --git a/bindings/python/keystone/hexagon_const.py b/bindings/python/keystone/hexagon_const.py new file mode 100644 index 0000000..8a6e1ca --- /dev/null +++ b/bindings/python/keystone/hexagon_const.py @@ -0,0 +1,4 @@ +# For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [hexagon_const.py] +KS_ERR_ASM_HEXAGON_INVALIDOPERAND = 512 +KS_ERR_ASM_HEXAGON_MISSINGFEATURE = 513 +KS_ERR_ASM_HEXAGON_MNEMONICFAIL = 514 diff --git a/bindings/python/keystone/keystone.py b/bindings/python/keystone/keystone.py new file mode 100644 index 0000000..fd525a7 --- /dev/null +++ b/bindings/python/keystone/keystone.py @@ -0,0 +1,245 @@ +# Keystone Python bindings, by Nguyen Anh Quynnh +import sys +_python2 = sys.version_info[0] < 3 +if _python2: + range = xrange + +from . import arm_const, arm64_const, mips_const, sparc_const, hexagon_const, ppc_const, systemz_const, x86_const, evm_const +from .keystone_const import * + +from ctypes import * +from platform import system +from os.path import split, join, dirname, exists +import sys + + +import inspect +if not hasattr(sys.modules[__name__], '__file__'): + __file__ = inspect.getfile(inspect.currentframe()) + +_lib_path = split(__file__)[0] +_all_libs = ('keystone.dll', 'libkeystone.so', 'libkeystone.so.%u' %KS_API_MAJOR, 'libkeystone.dylib') +_found = False + +for _lib in _all_libs: + try: + _lib_file = join(_lib_path, _lib) + #print(">> 0: Trying to load %s" %_lib_file); + _ks = cdll.LoadLibrary(_lib_file) + _found = True + break + except OSError: + pass + +if _found == False: + # try loading from default paths + for _lib in _all_libs: + try: + #print(">> 1: Trying to load %s" %_lib); + _ks = cdll.LoadLibrary(_lib) + _found = True + break + except OSError: + pass + +if _found == False: + # last try: loading from python lib directory + import distutils.sysconfig + _lib_path = distutils.sysconfig.get_python_lib() + for _lib in _all_libs: + try: + _lib_file = join(_lib_path, 'keystone', _lib) + #print(">> 2: Trying to load %s" %_lib_file); + _ks = cdll.LoadLibrary(_lib_file) + _found = True + break + except OSError: + pass + +# Attempt Linux/Darwin specific load (10.11 specific), +# since LD_LIBRARY_PATH is not guaranteed to exist +if (_found == False) and (system() != 'Windows'): + _lib_path = '/usr/local/lib/' + for _lib in _all_libs: + try: + _lib_file = join(_lib_path, _lib) + #print(">> 3: Trying to load %s" %_lib_file); + _ks = cdll.LoadLibrary(_lib_file) + _found = True + break + except OSError: + pass + +if _found == False: + raise ImportError("ERROR: fail to load the dynamic library.") + +__version__ = "%u.%u.%u" %(KS_VERSION_MAJOR, KS_VERSION_MINOR, KS_VERSION_EXTRA) + +# setup all the function prototype +def _setup_prototype(lib, fname, restype, *argtypes): + getattr(lib, fname).restype = restype + getattr(lib, fname).argtypes = argtypes + +kserr = c_int +ks_engine = c_void_p +ks_hook_h = c_size_t + +_setup_prototype(_ks, "ks_version", c_uint, POINTER(c_int), POINTER(c_int)) +_setup_prototype(_ks, "ks_arch_supported", c_bool, c_int) +_setup_prototype(_ks, "ks_open", kserr, c_uint, c_uint, POINTER(ks_engine)) +_setup_prototype(_ks, "ks_close", kserr, ks_engine) +_setup_prototype(_ks, "ks_strerror", c_char_p, kserr) +_setup_prototype(_ks, "ks_errno", kserr, ks_engine) +_setup_prototype(_ks, "ks_option", kserr, ks_engine, c_int, c_void_p) +_setup_prototype(_ks, "ks_asm", c_int, ks_engine, c_char_p, c_uint64, POINTER(POINTER(c_ubyte)), POINTER(c_size_t), POINTER(c_size_t)) +_setup_prototype(_ks, "ks_free", None, POINTER(c_ubyte)) + +# callback for OPT_SYM_RESOLVER option +KS_SYM_RESOLVER = CFUNCTYPE(c_bool, c_char_p, POINTER(c_uint64)) + +# access to error code via @errno of KsError +# this also includes the @stat_count returned by ks_asm +class KsError(Exception): + def __init__(self, errno, count=None): + self.stat_count = count + self.errno = errno + self.message = _ks.ks_strerror(self.errno) + if not isinstance(self.message, str) and isinstance(self.message, bytes): + self.message = self.message.decode('utf-8') + + # retrieve @stat_count value returned by ks_asm() + def get_asm_count(self): + return self.stat_count + + def __str__(self): + return self.message + + +# return the core's version +def ks_version(): + major = c_int() + minor = c_int() + combined = _ks.ks_version(byref(major), byref(minor)) + return (major.value, minor.value, combined) + + +# return the binding's version +def version_bind(): + return (KS_API_MAJOR, KS_API_MINOR, (KS_API_MAJOR << 8) + KS_API_MINOR) + + +# check to see if this engine supports a particular arch +def ks_arch_supported(query): + return _ks.ks_arch_supported(query) + + +class Ks(object): + def __init__(self, arch, mode): + # verify version compatibility with the core before doing anything + (major, minor, _combined) = ks_version() + if major != KS_API_MAJOR or minor != KS_API_MINOR: + self._ksh = None + # our binding version is different from the core's API version + raise KsError(KS_ERR_VERSION) + + self._arch, self._mode = arch, mode + self._ksh = c_void_p() + status = _ks.ks_open(arch, mode, byref(self._ksh)) + if status != KS_ERR_OK: + self._ksh = None + raise KsError(status) + + if arch == KS_ARCH_X86: + # Intel syntax is default for X86 + self._syntax = KS_OPT_SYNTAX_INTEL + else: + self._syntax = None + + + # destructor to be called automatically when object is destroyed. + def __del__(self): + if self._ksh: + try: + status = _ks.ks_close(self._ksh) + self._ksh = None + if status != KS_ERR_OK: + raise KsError(status) + except: # _ks might be pulled from under our feet + pass + + + # return assembly syntax. + @property + def syntax(self): + return self._syntax + + + # syntax setter: modify assembly syntax. + @syntax.setter + def syntax(self, style): + status = _ks.ks_option(self._ksh, KS_OPT_SYNTAX, style) + if status != KS_ERR_OK: + raise KsError(status) + # save syntax + self._syntax = style + + + @property + def sym_resolver(self): + return + + + @sym_resolver.setter + def sym_resolver(self, resolver): + callback = KS_SYM_RESOLVER(resolver) + status = _ks.ks_option(self._ksh, KS_OPT_SYM_RESOLVER, callback) + if status != KS_ERR_OK: + raise KsError(status) + # save resolver + self._sym_resolver = callback + + + # assemble a string of assembly + def asm(self, string, addr=0, as_bytes=False): + encode = POINTER(c_ubyte)() + encode_size = c_size_t() + stat_count = c_size_t() + if not isinstance(string, bytes) and isinstance(string, str): + string = string.encode('ascii') + + status = _ks.ks_asm(self._ksh, string, addr, byref(encode), byref(encode_size), byref(stat_count)) + if (status != 0): + errno = _ks.ks_errno(self._ksh) + raise KsError(errno, stat_count.value) + else: + if stat_count.value == 0: + return (None, 0) + else: + if as_bytes: + encoding = string_at(encode, encode_size.value) + else: + encoding = [] + for i in range(encode_size.value): + encoding.append(encode[i]) + + _ks.ks_free(encode) + return (encoding, stat_count.value) + + +# print out debugging info +def debug(): + archs = { "arm": KS_ARCH_ARM, "arm64": KS_ARCH_ARM64, \ + "mips": KS_ARCH_MIPS, "sparc": KS_ARCH_SPARC, \ + "systemz": KS_ARCH_SYSTEMZ, "ppc": KS_ARCH_PPC, \ + "hexagon": KS_ARCH_HEXAGON, "x86": KS_ARCH_X86, 'evm': KS_ARCH_EVM } + + all_archs = "" + keys = archs.keys() + for k in sorted(keys): + if ks_arch_supported(archs[k]): + all_archs += "-%s" % k + + (major, minor, _combined) = ks_version() + + return "python-%s-c%u.%u-b%u.%u" % (all_archs, major, minor, KS_API_MAJOR, KS_API_MINOR) + diff --git a/bindings/python/keystone/keystone_const.py b/bindings/python/keystone/keystone_const.py new file mode 100644 index 0000000..155fdd1 --- /dev/null +++ b/bindings/python/keystone/keystone_const.py @@ -0,0 +1,91 @@ +# For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [keystone_const.py] +KS_API_MAJOR = 0 +KS_API_MINOR = 9 +KS_VERSION_MAJOR = 0 +KS_VERSION_MINOR = 9 +KS_VERSION_EXTRA = 2 +KS_ARCH_ARM = 1 +KS_ARCH_ARM64 = 2 +KS_ARCH_MIPS = 3 +KS_ARCH_X86 = 4 +KS_ARCH_PPC = 5 +KS_ARCH_SPARC = 6 +KS_ARCH_SYSTEMZ = 7 +KS_ARCH_HEXAGON = 8 +KS_ARCH_EVM = 9 +KS_ARCH_MAX = 10 +KS_MODE_LITTLE_ENDIAN = 0 +KS_MODE_BIG_ENDIAN = 1073741824 +KS_MODE_ARM = 1 +KS_MODE_THUMB = 16 +KS_MODE_V8 = 64 +KS_MODE_MICRO = 16 +KS_MODE_MIPS3 = 32 +KS_MODE_MIPS32R6 = 64 +KS_MODE_MIPS32 = 4 +KS_MODE_MIPS64 = 8 +KS_MODE_16 = 2 +KS_MODE_32 = 4 +KS_MODE_64 = 8 +KS_MODE_PPC32 = 4 +KS_MODE_PPC64 = 8 +KS_MODE_QPX = 16 +KS_MODE_SPARC32 = 4 +KS_MODE_SPARC64 = 8 +KS_MODE_V9 = 16 +KS_ERR_ASM = 128 +KS_ERR_ASM_ARCH = 512 +KS_ERR_OK = 0 +KS_ERR_NOMEM = 1 +KS_ERR_ARCH = 2 +KS_ERR_HANDLE = 3 +KS_ERR_MODE = 4 +KS_ERR_VERSION = 5 +KS_ERR_OPT_INVALID = 6 +KS_ERR_ASM_EXPR_TOKEN = 128 +KS_ERR_ASM_DIRECTIVE_VALUE_RANGE = 129 +KS_ERR_ASM_DIRECTIVE_ID = 130 +KS_ERR_ASM_DIRECTIVE_TOKEN = 131 +KS_ERR_ASM_DIRECTIVE_STR = 132 +KS_ERR_ASM_DIRECTIVE_COMMA = 133 +KS_ERR_ASM_DIRECTIVE_RELOC_NAME = 134 +KS_ERR_ASM_DIRECTIVE_RELOC_TOKEN = 135 +KS_ERR_ASM_DIRECTIVE_FPOINT = 136 +KS_ERR_ASM_DIRECTIVE_UNKNOWN = 137 +KS_ERR_ASM_DIRECTIVE_EQU = 138 +KS_ERR_ASM_DIRECTIVE_INVALID = 139 +KS_ERR_ASM_VARIANT_INVALID = 140 +KS_ERR_ASM_EXPR_BRACKET = 141 +KS_ERR_ASM_SYMBOL_MODIFIER = 142 +KS_ERR_ASM_SYMBOL_REDEFINED = 143 +KS_ERR_ASM_SYMBOL_MISSING = 144 +KS_ERR_ASM_RPAREN = 145 +KS_ERR_ASM_STAT_TOKEN = 146 +KS_ERR_ASM_UNSUPPORTED = 147 +KS_ERR_ASM_MACRO_TOKEN = 148 +KS_ERR_ASM_MACRO_PAREN = 149 +KS_ERR_ASM_MACRO_EQU = 150 +KS_ERR_ASM_MACRO_ARGS = 151 +KS_ERR_ASM_MACRO_LEVELS_EXCEED = 152 +KS_ERR_ASM_MACRO_STR = 153 +KS_ERR_ASM_MACRO_INVALID = 154 +KS_ERR_ASM_ESC_BACKSLASH = 155 +KS_ERR_ASM_ESC_OCTAL = 156 +KS_ERR_ASM_ESC_SEQUENCE = 157 +KS_ERR_ASM_ESC_STR = 158 +KS_ERR_ASM_TOKEN_INVALID = 159 +KS_ERR_ASM_INSN_UNSUPPORTED = 160 +KS_ERR_ASM_FIXUP_INVALID = 161 +KS_ERR_ASM_LABEL_INVALID = 162 +KS_ERR_ASM_FRAGMENT_INVALID = 163 +KS_ERR_ASM_INVALIDOPERAND = 512 +KS_ERR_ASM_MISSINGFEATURE = 513 +KS_ERR_ASM_MNEMONICFAIL = 514 +KS_OPT_SYNTAX = 1 +KS_OPT_SYM_RESOLVER = 2 +KS_OPT_SYNTAX_INTEL = 1 +KS_OPT_SYNTAX_ATT = 2 +KS_OPT_SYNTAX_NASM = 4 +KS_OPT_SYNTAX_MASM = 8 +KS_OPT_SYNTAX_GAS = 16 +KS_OPT_SYNTAX_RADIX16 = 32 diff --git a/bindings/python/keystone/mips_const.py b/bindings/python/keystone/mips_const.py new file mode 100644 index 0000000..6d3f1ae --- /dev/null +++ b/bindings/python/keystone/mips_const.py @@ -0,0 +1,4 @@ +# For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [mips_const.py] +KS_ERR_ASM_MIPS_INVALIDOPERAND = 512 +KS_ERR_ASM_MIPS_MISSINGFEATURE = 513 +KS_ERR_ASM_MIPS_MNEMONICFAIL = 514 diff --git a/bindings/python/keystone/ppc_const.py b/bindings/python/keystone/ppc_const.py new file mode 100644 index 0000000..93d6785 --- /dev/null +++ b/bindings/python/keystone/ppc_const.py @@ -0,0 +1,4 @@ +# For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [ppc_const.py] +KS_ERR_ASM_PPC_INVALIDOPERAND = 512 +KS_ERR_ASM_PPC_MISSINGFEATURE = 513 +KS_ERR_ASM_PPC_MNEMONICFAIL = 514 diff --git a/bindings/python/keystone/sparc_const.py b/bindings/python/keystone/sparc_const.py new file mode 100644 index 0000000..1723bfc --- /dev/null +++ b/bindings/python/keystone/sparc_const.py @@ -0,0 +1,4 @@ +# For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [sparc_const.py] +KS_ERR_ASM_SPARC_INVALIDOPERAND = 512 +KS_ERR_ASM_SPARC_MISSINGFEATURE = 513 +KS_ERR_ASM_SPARC_MNEMONICFAIL = 514 diff --git a/bindings/python/keystone/systemz_const.py b/bindings/python/keystone/systemz_const.py new file mode 100644 index 0000000..594d5e9 --- /dev/null +++ b/bindings/python/keystone/systemz_const.py @@ -0,0 +1,4 @@ +# For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [systemz_const.py] +KS_ERR_ASM_SYSTEMZ_INVALIDOPERAND = 512 +KS_ERR_ASM_SYSTEMZ_MISSINGFEATURE = 513 +KS_ERR_ASM_SYSTEMZ_MNEMONICFAIL = 514 diff --git a/bindings/python/keystone/x86_const.py b/bindings/python/keystone/x86_const.py new file mode 100644 index 0000000..085d6b2 --- /dev/null +++ b/bindings/python/keystone/x86_const.py @@ -0,0 +1,4 @@ +# For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [x86_const.py] +KS_ERR_ASM_X86_INVALIDOPERAND = 512 +KS_ERR_ASM_X86_MISSINGFEATURE = 513 +KS_ERR_ASM_X86_MNEMONICFAIL = 514 diff --git a/bindings/python/sample.py b/bindings/python/sample.py new file mode 100644 index 0000000..2e2830e --- /dev/null +++ b/bindings/python/sample.py @@ -0,0 +1,98 @@ +#!/usr/bin/env python + +# Sample code for Keystone assembler engine. +# By Nguyen Anh Quynh , 2016 + +from __future__ import print_function +from keystone import * + + +def test_ks(arch, mode, code, syntax=0): + ks = Ks(arch, mode) + if syntax != 0: + ks.syntax = syntax + + encoding, count = ks.asm(code) + + print("%s = [ " % code, end='') + for i in encoding: + print("%02x " % i, end='') + print("]") + + +# test symbol resolver +def test_sym_resolver(): + def sym_resolver(symbol, value): + # is this the missing symbol we want to handle? + if symbol == "_l1": + # put value of this symbol in @value + value = 0x1002 + # we handled this symbol, so return true + return True + + # we did not handle this symbol, so return false + return False + + ks = Ks(KS_ARCH_X86, KS_MODE_32) + + # register callback for symbol resolver + ks.sym_resolver = sym_resolver + + CODE = b"jmp _l1; nop; _l1:" + encoding, count = ks.asm(CODE, 0x1000) + + print("%s = [ " % CODE, end='') + for i in encoding: + print("%02x " % i, end='') + print("]") + + +if __name__ == '__main__': + # X86 + test_ks(KS_ARCH_X86, KS_MODE_16, b"add eax, ecx") + test_ks(KS_ARCH_X86, KS_MODE_32, b"add eax, ecx") + test_ks(KS_ARCH_X86, KS_MODE_64, b"add rax, rcx") + test_ks(KS_ARCH_X86, KS_MODE_32, b"add %ecx, %eax", KS_OPT_SYNTAX_ATT) + test_ks(KS_ARCH_X86, KS_MODE_64, b"add %rcx, %rax", KS_OPT_SYNTAX_ATT) + + test_ks(KS_ARCH_X86, KS_MODE_32, b"add eax, 0x15") + test_ks(KS_ARCH_X86, KS_MODE_32, b"add eax, 15h"); + test_ks(KS_ARCH_X86, KS_MODE_32, b"add eax, 15") + + # RADIX16 syntax Intel (default syntax) + test_ks(KS_ARCH_X86, KS_MODE_32, b"add eax, 15", KS_OPT_SYNTAX_RADIX16) + # RADIX16 syntax for AT&T + test_ks(KS_ARCH_X86, KS_MODE_32, b"add $15, %eax", KS_OPT_SYNTAX_RADIX16 | KS_OPT_SYNTAX_ATT) + + # ARM + test_ks(KS_ARCH_ARM, KS_MODE_ARM, b"sub r1, r2, r5") + test_ks(KS_ARCH_ARM, KS_MODE_ARM + KS_MODE_BIG_ENDIAN, b"sub r1, r2, r5") + test_ks(KS_ARCH_ARM, KS_MODE_THUMB, b"movs r4, #0xf0") + test_ks(KS_ARCH_ARM, KS_MODE_THUMB + KS_MODE_BIG_ENDIAN, b"movs r4, #0xf0") + + # ARM64 + test_ks(KS_ARCH_ARM64, KS_MODE_LITTLE_ENDIAN, b"ldr w1, [sp, #0x8]") + + # Hexagon + test_ks(KS_ARCH_HEXAGON, KS_MODE_BIG_ENDIAN, b"v23.w=vavg(v11.w,v2.w):rnd") + + # Mips + test_ks(KS_ARCH_MIPS, KS_MODE_MIPS32, b"and $9, $6, $7") + test_ks(KS_ARCH_MIPS, KS_MODE_MIPS32 + KS_MODE_BIG_ENDIAN, b"and $9, $6, $7") + test_ks(KS_ARCH_MIPS, KS_MODE_MIPS64, b"and $9, $6, $7") + test_ks(KS_ARCH_MIPS, KS_MODE_MIPS64 + KS_MODE_BIG_ENDIAN, b"and $9, $6, $7") + + # PowerPC + test_ks(KS_ARCH_PPC, KS_MODE_PPC32 + KS_MODE_BIG_ENDIAN, b"add 1, 2, 3") + test_ks(KS_ARCH_PPC, KS_MODE_PPC64, b"add 1, 2, 3") + test_ks(KS_ARCH_PPC, KS_MODE_PPC64 + KS_MODE_BIG_ENDIAN, b"add 1, 2, 3") + + # Sparc + test_ks(KS_ARCH_SPARC, KS_MODE_SPARC32 + KS_MODE_LITTLE_ENDIAN, b"add %g1, %g2, %g3") + test_ks(KS_ARCH_SPARC, KS_MODE_SPARC32 + KS_MODE_BIG_ENDIAN, b"add %g1, %g2, %g3") + + # SystemZ + test_ks(KS_ARCH_SYSTEMZ, KS_MODE_BIG_ENDIAN, b"a %r0, 4095(%r15,%r1)") + + # test symbol resolver + test_sym_resolver() diff --git a/bindings/python/sample_asm_count.py b/bindings/python/sample_asm_count.py new file mode 100644 index 0000000..387bc39 --- /dev/null +++ b/bindings/python/sample_asm_count.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python + +# By Nguyen Anh Quynh , 2016 +# Sample code for Keystone assembler engine. + +# This shows how to get out of KsError the number of +# assembly instructions successfully compiled when error occur + +from keystone import * + +CODE = b"INC ecx; yyy; DEC edx" # input assembly with an invalid instruction + +try: + # Initialize engine in X86-32bit mode + ks = Ks(KS_ARCH_X86, KS_MODE_32) + encoding, count = ks.asm(CODE) + print("%s = %s" %(CODE, encoding)) +except KsError as e: + print("ERROR: %s" %e) + # get count via e.get_asm_count() + count = e.get_asm_count() + if count is not None: + # print out the number of instructions succesfully compiled + print("asmcount = %u" %e.get_asm_count()) diff --git a/bindings/python/setup.cfg b/bindings/python/setup.cfg new file mode 100644 index 0000000..3fdd7b2 --- /dev/null +++ b/bindings/python/setup.cfg @@ -0,0 +1,4 @@ +[metadata] +description-file = README.pypi-src +[bdist_wheel] +universal = 1 diff --git a/bindings/python/setup.py b/bindings/python/setup.py new file mode 100644 index 0000000..e65732b --- /dev/null +++ b/bindings/python/setup.py @@ -0,0 +1,243 @@ +#!/usr/bin/env python +# Python binding for Keystone engine. Nguyen Anh Quynh + +# upload TestPyPi package with: $ python setup.py sdist upload -r pypitest +# upload PyPi package with: $ python setup.py sdist upload -r pypi + +import glob +import os +import shutil +import subprocess +import stat +import sys +import platform +from distutils import log +from setuptools import setup +from distutils.util import get_platform +from distutils.command.build import build as _build +from distutils.command.sdist import sdist as _sdist +from setuptools.command.bdist_egg import bdist_egg as _bdist_egg +from setuptools.command.develop import develop as _develop + +#VERSION = '0.9.2' + 'rc1' + '.post2' +VERSION = '0.9.2' +SYSTEM = sys.platform +IS_64BITS = platform.architecture()[0] == '64bit' + +# paths +ROOT_DIR = os.path.dirname(os.path.abspath(__file__)) +LIBS_DIR = os.path.join(ROOT_DIR, 'keystone') +SRC_DIR = os.path.join(ROOT_DIR, 'src') +BUILD_DIR = os.path.join(SRC_DIR, 'build') + +if SYSTEM == 'darwin': + LIBRARY_FILE = "libkeystone.dylib" + MAC_LIBRARY_FILE = "libkeystone*.dylib" +elif SYSTEM == 'win32': + LIBRARY_FILE = "keystone.dll" +elif SYSTEM == 'cygwin': + LIBRARY_FILE = "cygkeystone-0.dll" +else: + LIBRARY_FILE = "libkeystone.so" + +# prebuilt libraries for Windows - for sdist +PATH_LIB64 = os.path.join(ROOT_DIR, 'prebuilt', 'win64') +PATH_LIB32 = os.path.join(ROOT_DIR, 'prebuilt', 'win32') + +def copy_sources(): + """Copy the C sources into the source directory. + This rearranges the source files under the python distribution + directory. + """ + src = [] + + os.system('make clean') + shutil.rmtree(SRC_DIR, ignore_errors=True) + os.mkdir(SRC_DIR) + + shutil.copytree(os.path.join(ROOT_DIR, '../../llvm'), os.path.join(SRC_DIR, 'llvm/')) + shutil.copytree(os.path.join(ROOT_DIR, '../../include'), os.path.join(SRC_DIR, 'include/')) + shutil.copytree(os.path.join(ROOT_DIR, '../../suite'), os.path.join(SRC_DIR, 'suite/')) + + src.extend(glob.glob(os.path.join(ROOT_DIR, "../../*.h"))) + src.extend(glob.glob(os.path.join(ROOT_DIR, "../../*.cpp"))) + src.extend(glob.glob(os.path.join(ROOT_DIR, "../../*.inc"))) + src.extend(glob.glob(os.path.join(ROOT_DIR, "../../*.def"))) + + src.extend(glob.glob(os.path.join(ROOT_DIR, "../../CMakeLists.txt"))) + src.extend(glob.glob(os.path.join(ROOT_DIR, "../../CMakeUninstall.in"))) + src.extend(glob.glob(os.path.join(ROOT_DIR, "../../*.txt"))) + src.extend(glob.glob(os.path.join(ROOT_DIR, "../../*.TXT"))) + src.extend(glob.glob(os.path.join(ROOT_DIR, "../../COPYING"))) + src.extend(glob.glob(os.path.join(ROOT_DIR, "../../LICENSE*"))) + src.extend(glob.glob(os.path.join(ROOT_DIR, "../../EXCEPTIONS-CLIENT"))) + src.extend(glob.glob(os.path.join(ROOT_DIR, "../../README.md"))) + src.extend(glob.glob(os.path.join(ROOT_DIR, "../../RELEASE_NOTES"))) + src.extend(glob.glob(os.path.join(ROOT_DIR, "../../ChangeLog"))) + src.extend(glob.glob(os.path.join(ROOT_DIR, "../../SPONSORS.TXT"))) + src.extend(glob.glob(os.path.join(ROOT_DIR, "../../*.cmake"))) + src.extend(glob.glob(os.path.join(ROOT_DIR, "../../*.sh"))) + src.extend(glob.glob(os.path.join(ROOT_DIR, "../../*.bat"))) + + for filename in src: + outpath = os.path.join(SRC_DIR, os.path.basename(filename)) + log.info("%s -> %s" % (filename, outpath)) + shutil.copy(filename, outpath) + +def build_libraries(): + cur_dir = os.getcwd() + + if SYSTEM in ("win32", "cygwin"): + # if Windows prebuilt library is available, then include it + if IS_64BITS and os.path.exists(os.path.join(PATH_LIB64, LIBRARY_FILE)): + shutil.copy(os.path.join(PATH_LIB64, LIBRARY_FILE), LIBS_DIR) + return + elif os.path.exists(os.path.join(PATH_LIB32, LIBRARY_FILE)): + shutil.copy(os.path.join(PATH_LIB32, LIBRARY_FILE), LIBS_DIR) + return + # cd src/build + if not os.path.isdir(SRC_DIR): + copy_sources() + os.chdir(SRC_DIR) + if not os.path.isdir(BUILD_DIR): + os.mkdir(BUILD_DIR) + os.chdir(BUILD_DIR) + + if SYSTEM == "win32": + if IS_64BITS: + subprocess.call([r'..\nmake-dll.bat']) + else: + subprocess.call([r'..\nmake-dll.bat', 'X86']) + winobj_dir = os.path.join(BUILD_DIR, 'llvm', 'bin') + shutil.copy(os.path.join(winobj_dir, LIBRARY_FILE), LIBS_DIR) + else: + cmd = ['sh', '../make-share.sh', 'lib_only'] + subprocess.call(cmd) + if SYSTEM == "cygwin": + obj_dir = os.path.join(BUILD_DIR, 'llvm', 'bin') + else: + obj_dir = os.path.join(BUILD_DIR, 'llvm', 'lib') + obj64_dir = os.path.join(BUILD_DIR, 'llvm', 'lib64') + if SYSTEM == 'darwin': + for file in glob.glob(os.path.join(obj_dir, MAC_LIBRARY_FILE)): + try: + shutil.copy(file, LIBS_DIR, follow_symlinks=False) + except: + shutil.copy(file, LIBS_DIR) + else: + try: + shutil.copy(os.path.join(obj_dir, LIBRARY_FILE), LIBS_DIR) + except: + shutil.copy(os.path.join(obj64_dir, LIBRARY_FILE), LIBS_DIR) + # back to root dir + os.chdir(cur_dir) + +class sdist(_sdist): + def run(self): + copy_sources() + return _sdist.run(self) + +class build(_build): + def run(self): + log.info("Building C++ extensions") + build_libraries() + return _build.run(self) + +class develop(_develop): + def run(self): + log.info("Building C++ extensions") + build_libraries() + return _develop.run(self) + +class bdist_egg(_bdist_egg): + def run(self): + self.run_command('build') + return _bdist_egg.run(self) + +def dummy_src(): + return [] + +if 'bdist_wheel' in sys.argv and '--plat-name' not in sys.argv: + idx = sys.argv.index('bdist_wheel') + 1 + sys.argv.insert(idx, '--plat-name') + name = get_platform() + if 'linux' in name: + # linux_* platform tags are disallowed because the python ecosystem is fubar + # linux builds should be built in the centos 5 vm for maximum compatibility + # see https://github.com/pypa/manylinux + # see also https://github.com/angr/angr-dev/blob/master/bdist.sh + sys.argv.insert(idx + 1, 'manylinux1_' + platform.machine()) + elif 'mingw' in name: + if IS_64BITS: + sys.argv.insert(idx + 1, 'win_amd64') + else: + sys.argv.insert(idx + 1, 'win32') + else: + # https://www.python.org/dev/peps/pep-0425/ + sys.argv.insert(idx + 1, name.replace('.', '_').replace('-', '_')) + + +long_desc = ''' +Keystone is a lightweight multi-platform, multi-architecture assembler framework. +It offers some unparalleled features: + +- Multi-architecture, with support for Arm, Arm64 (AArch64/Armv8), Ethereum Virtual Machine, Hexagon, Mips, PowerPC, Sparc, SystemZ & X86 (include 16/32/64bit). +- Clean/simple/lightweight/intuitive architecture-neutral API. +- Implemented in C/C++ languages, with bindings for Java, Masm, C#, PowerShell, Perl, Python, NodeJS, Ruby, Go, Rust, Haskell, VB6 & OCaml available. +- Native support for Windows & \*nix (with Mac OSX, Linux, \*BSD & Solaris confirmed). +- Thread-safe by design. +- Open source - with a dual license. + +Further information is available at http://www.keystone-engine.org + + +License +------- + +Keystone is available under a dual license: + +- Version 2 of the GNU General Public License (GPLv2). (I.e. Without the "any later version" clause.). + License information can be found in the COPYING file EXCEPTIONS-CLIENT file. + + This combination allows almost all of open source projects to use Keystone without conflicts. + +- For commercial usage in production environments, contact the authors of Keystone to buy a royalty-free license. + + See LICENSE-COM.TXT for more information. +''' + +setup( + provides=['keystone'], + packages=['keystone'], + name='keystone-engine', + version=VERSION, + author='Nguyen Anh Quynh', + author_email='aquynh@gmail.com', + description='Keystone assembler engine', + long_description=long_desc, + long_description_content_type="text/markdown", + url='https://www.keystone-engine.org', + classifiers=[ + # How mature is this project? Common values are + # 3 - Alpha + # 4 - Beta + # 5 - Production/Stable + 'Development Status :: 5 - Production/Stable', + + # Indicate who your project is intended for + 'Intended Audience :: Developers', + 'Topic :: Software Development :: Build Tools', + + 'License :: OSI Approved :: BSD License', + 'Programming Language :: Python :: 2', + 'Programming Language :: Python :: 3', + ], + requires=['ctypes'], + cmdclass={'build': build, 'develop': develop, 'sdist': sdist, 'bdist_egg': bdist_egg}, + zip_safe=False, + include_package_data=True, + is_pure=False, + package_data={ + 'keystone': ['*'] + } +) diff --git a/bindings/ruby/Makefile b/bindings/ruby/Makefile new file mode 100644 index 0000000..75110fe --- /dev/null +++ b/bindings/ruby/Makefile @@ -0,0 +1,11 @@ +# Ruby binding for Unicorn engine. Sascha Schirra + +.PHONY: gen_const + +install: + $(MAKE) gen_const + C_INCLUDE_PATH=/usr/local/ cd keystone_gem && rake build + cd keystone_gem && gem install --local pkg/keystone-0.9.0.gem + +gen_const: + cd .. && python const_generator.py ruby diff --git a/bindings/ruby/README.md b/bindings/ruby/README.md new file mode 100644 index 0000000..82903b7 --- /dev/null +++ b/bindings/ruby/README.md @@ -0,0 +1,24 @@ +# Installation + +## Software requirements + +### Linux +- ruby >= 1.9.3 +- rubygems +- make +- gcc + +### Mac OS +- ruby >= 1.9.3 +- rubygems +- make +- XCode + +## Install keystone + * cd path_to_keystone + * ./make.sh install + +## Install ruby binding + * cd bindings/ruby + * make install + \ No newline at end of file diff --git a/bindings/ruby/keystone_gem/Gemfile b/bindings/ruby/keystone_gem/Gemfile new file mode 100644 index 0000000..fa75df1 --- /dev/null +++ b/bindings/ruby/keystone_gem/Gemfile @@ -0,0 +1,3 @@ +source 'https://rubygems.org' + +gemspec diff --git a/bindings/ruby/keystone_gem/Rakefile b/bindings/ruby/keystone_gem/Rakefile new file mode 100644 index 0000000..43022f7 --- /dev/null +++ b/bindings/ruby/keystone_gem/Rakefile @@ -0,0 +1,2 @@ +require "bundler/gem_tasks" +task :default => :spec diff --git a/bindings/ruby/keystone_gem/ext/extconf.rb b/bindings/ruby/keystone_gem/ext/extconf.rb new file mode 100644 index 0000000..557251e --- /dev/null +++ b/bindings/ruby/keystone_gem/ext/extconf.rb @@ -0,0 +1,8 @@ +require 'mkmf' + +extension_name = 'keystone' + +dir_config(extension_name) +have_library('keystone') + +create_makefile(extension_name) \ No newline at end of file diff --git a/bindings/ruby/keystone_gem/ext/keystone.c b/bindings/ruby/keystone_gem/ext/keystone.c new file mode 100644 index 0000000..fe25e6d --- /dev/null +++ b/bindings/ruby/keystone_gem/ext/keystone.c @@ -0,0 +1,113 @@ +/* + +Ruby bindings for the Keystone Engine + +Copyright(c) 2016 Sascha Schirra + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +version 2 as published by the Free Software Foundation. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + +*/ +#include "ruby.h" +#include +#include "keystone.h" + +VALUE KeystoneModule = Qnil; +VALUE KsClass = Qnil; +VALUE KsError = Qnil; + + +void Init_keystone() { + rb_require("keystone/keystone_const"); + KeystoneModule = rb_define_module("Keystone"); + KsError = rb_define_class_under(KeystoneModule, "KsError", rb_eStandardError); + + KsClass = rb_define_class_under(KeystoneModule, "Ks", rb_cObject); + rb_define_method(KsClass, "initialize", m_ks_initialize, 2); + rb_define_method(KsClass, "asm", m_ks_asm, -1); + rb_define_method(KsClass, "syntax", m_ks_get_syntax, 0); + rb_define_method(KsClass, "syntax=", m_ks_set_syntax, 1); +} + +VALUE m_ks_initialize(VALUE self, VALUE arch, VALUE mode) { + ks_engine *_ks; + ks_err err; + err = ks_open(NUM2INT(arch), NUM2INT(mode), &_ks); + if (err != KS_ERR_OK) { + rb_raise(KsError, "%d", err); + } + + VALUE ks = Data_Wrap_Struct(KsClass, 0, ks_close, _ks); + rb_iv_set(self, "@ksh", ks); + + if(NUM2INT(arch) == KS_ARCH_X86){ + rb_iv_set(self, "@syntax", INT2NUM(KS_OPT_SYNTAX_INTEL)); + } + else{ + rb_iv_set(self, "@syntax", Qnil); + } + + return self; +} + +VALUE m_ks_asm(int argc, VALUE* argv, VALUE self){ + VALUE string; + VALUE addr; + + size_t count; + unsigned char *encode; + size_t size; + + ks_err err; + ks_engine *_ks; + + VALUE to_return = rb_ary_new(); + + Data_Get_Struct(rb_iv_get(self,"@ksh"), ks_engine, _ks); + + rb_scan_args(argc, argv, "11", &string, &addr); + if (NIL_P(addr)) + addr = INT2NUM(0); + + err = ks_asm(_ks, StringValuePtr(string), NUM2INT(addr), &encode, &size, &count); + if (err != KS_ERR_OK) { + rb_raise(KsError, "%d", err); + } + + if (count == 0){ + rb_ary_store(to_return, 0, Qnil); + rb_ary_store(to_return, 1, INT2NUM(0)); + } + else{ + rb_ary_store(to_return, 0, rb_str_new(encode, size)); + rb_ary_store(to_return, 1, INT2NUM(count)); + } + ks_free(encode); + return to_return; +} + +VALUE m_ks_get_syntax(VALUE self){ + return rb_iv_get(self, "@syntax"); +} + +VALUE m_ks_set_syntax(VALUE self, VALUE val){ + ks_err err; + ks_engine *_ks; + + Data_Get_Struct(rb_iv_get(self,"@ksh"), ks_engine, _ks); + + ks_option(_ks, KS_OPT_SYNTAX, NUM2INT(val)); + rb_iv_set(self, "@syntax", val); + + return Qnil; +} diff --git a/bindings/ruby/keystone_gem/ext/keystone.h b/bindings/ruby/keystone_gem/ext/keystone.h new file mode 100644 index 0000000..50241e5 --- /dev/null +++ b/bindings/ruby/keystone_gem/ext/keystone.h @@ -0,0 +1,24 @@ +/* + +Ruby bindings for the Keystone Engine + +Copyright(c) 2016 Sascha Schirra + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +version 2 as published by the Free Software Foundation. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + +*/ +VALUE m_ks_initialize(VALUE self, VALUE arch, VALUE mode); +VALUE m_ks_asm(int argc, VALUE* argv, VALUE self); +VALUE m_ks_get_syntax(VALUE self); +VALUE m_ks_set_syntax(VALUE self, VALUE val); diff --git a/bindings/ruby/keystone_gem/keystone.gemspec b/bindings/ruby/keystone_gem/keystone.gemspec new file mode 100644 index 0000000..299d9fe --- /dev/null +++ b/bindings/ruby/keystone_gem/keystone.gemspec @@ -0,0 +1,21 @@ +# coding: utf-8 +lib = File.expand_path('../lib', __FILE__) +$LOAD_PATH.unshift(lib) unless $LOAD_PATH.include?(lib) +require 'keystone/version' + +Gem::Specification.new do |spec| + spec.name = "keystone" + spec.version = Keystone::VERSION + spec.authors = ["Sascha Schirra"] + spec.email = ["sashs@scoding.de"] + spec.license = 'GPL-2.0' + spec.summary = %q{Ruby binding for Keystone} + spec.description = %q{Ruby binding for Keystone } + spec.homepage = "https://keystone-engine.org" + + spec.files = Dir["lib/keystone/*.rb"] + Dir["ext/keystone.c"] + Dir["ext/keystone.h"] + Dir["ext/extconf.rb"] + spec.require_paths = ["lib","ext"] + spec.extensions = ["ext/extconf.rb"] + spec.add_development_dependency "bundler", "~> 1.11" + spec.add_development_dependency "rake", "~> 10.0" +end diff --git a/bindings/ruby/keystone_gem/lib/keystone/arm64_const.rb b/bindings/ruby/keystone_gem/lib/keystone/arm64_const.rb new file mode 100644 index 0000000..324cc16 --- /dev/null +++ b/bindings/ruby/keystone_gem/lib/keystone/arm64_const.rb @@ -0,0 +1,7 @@ +# For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [arm64_const.rb] + +module Keystone + KS_ERR_ASM_ARM64_INVALIDOPERAND = 512 + KS_ERR_ASM_ARM64_MISSINGFEATURE = 513 + KS_ERR_ASM_ARM64_MNEMONICFAIL = 514 +end \ No newline at end of file diff --git a/bindings/ruby/keystone_gem/lib/keystone/arm_const.rb b/bindings/ruby/keystone_gem/lib/keystone/arm_const.rb new file mode 100644 index 0000000..76c1261 --- /dev/null +++ b/bindings/ruby/keystone_gem/lib/keystone/arm_const.rb @@ -0,0 +1,7 @@ +# For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [arm_const.rb] + +module Keystone + KS_ERR_ASM_ARM_INVALIDOPERAND = 512 + KS_ERR_ASM_ARM_MISSINGFEATURE = 513 + KS_ERR_ASM_ARM_MNEMONICFAIL = 514 +end \ No newline at end of file diff --git a/bindings/ruby/keystone_gem/lib/keystone/evm_const.rb b/bindings/ruby/keystone_gem/lib/keystone/evm_const.rb new file mode 100644 index 0000000..a29f7b4 --- /dev/null +++ b/bindings/ruby/keystone_gem/lib/keystone/evm_const.rb @@ -0,0 +1,7 @@ +# For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [evm_const.rb] + +module Keystone + KS_ERR_ASM_EVM_INVALIDOPERAND = 512 + KS_ERR_ASM_EVM_MISSINGFEATURE = 513 + KS_ERR_ASM_EVM_MNEMONICFAIL = 514 +end \ No newline at end of file diff --git a/bindings/ruby/keystone_gem/lib/keystone/hexagon_const.rb b/bindings/ruby/keystone_gem/lib/keystone/hexagon_const.rb new file mode 100644 index 0000000..9f04db2 --- /dev/null +++ b/bindings/ruby/keystone_gem/lib/keystone/hexagon_const.rb @@ -0,0 +1,7 @@ +# For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [hexagon_const.rb] + +module Keystone + KS_ERR_ASM_HEXAGON_INVALIDOPERAND = 512 + KS_ERR_ASM_HEXAGON_MISSINGFEATURE = 513 + KS_ERR_ASM_HEXAGON_MNEMONICFAIL = 514 +end \ No newline at end of file diff --git a/bindings/ruby/keystone_gem/lib/keystone/keystone_const.rb b/bindings/ruby/keystone_gem/lib/keystone/keystone_const.rb new file mode 100644 index 0000000..5254b77 --- /dev/null +++ b/bindings/ruby/keystone_gem/lib/keystone/keystone_const.rb @@ -0,0 +1,94 @@ +# For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [keystone_const.rb] + +module Keystone + KS_API_MAJOR = 0 + KS_API_MINOR = 9 + KS_VERSION_MAJOR = 0 + KS_VERSION_MINOR = 9 + KS_VERSION_EXTRA = 2 + KS_ARCH_ARM = 1 + KS_ARCH_ARM64 = 2 + KS_ARCH_MIPS = 3 + KS_ARCH_X86 = 4 + KS_ARCH_PPC = 5 + KS_ARCH_SPARC = 6 + KS_ARCH_SYSTEMZ = 7 + KS_ARCH_HEXAGON = 8 + KS_ARCH_EVM = 9 + KS_ARCH_MAX = 10 + KS_MODE_LITTLE_ENDIAN = 0 + KS_MODE_BIG_ENDIAN = 1073741824 + KS_MODE_ARM = 1 + KS_MODE_THUMB = 16 + KS_MODE_V8 = 64 + KS_MODE_MICRO = 16 + KS_MODE_MIPS3 = 32 + KS_MODE_MIPS32R6 = 64 + KS_MODE_MIPS32 = 4 + KS_MODE_MIPS64 = 8 + KS_MODE_16 = 2 + KS_MODE_32 = 4 + KS_MODE_64 = 8 + KS_MODE_PPC32 = 4 + KS_MODE_PPC64 = 8 + KS_MODE_QPX = 16 + KS_MODE_SPARC32 = 4 + KS_MODE_SPARC64 = 8 + KS_MODE_V9 = 16 + KS_ERR_ASM = 128 + KS_ERR_ASM_ARCH = 512 + KS_ERR_OK = 0 + KS_ERR_NOMEM = 1 + KS_ERR_ARCH = 2 + KS_ERR_HANDLE = 3 + KS_ERR_MODE = 4 + KS_ERR_VERSION = 5 + KS_ERR_OPT_INVALID = 6 + KS_ERR_ASM_EXPR_TOKEN = 128 + KS_ERR_ASM_DIRECTIVE_VALUE_RANGE = 129 + KS_ERR_ASM_DIRECTIVE_ID = 130 + KS_ERR_ASM_DIRECTIVE_TOKEN = 131 + KS_ERR_ASM_DIRECTIVE_STR = 132 + KS_ERR_ASM_DIRECTIVE_COMMA = 133 + KS_ERR_ASM_DIRECTIVE_RELOC_NAME = 134 + KS_ERR_ASM_DIRECTIVE_RELOC_TOKEN = 135 + KS_ERR_ASM_DIRECTIVE_FPOINT = 136 + KS_ERR_ASM_DIRECTIVE_UNKNOWN = 137 + KS_ERR_ASM_DIRECTIVE_EQU = 138 + KS_ERR_ASM_DIRECTIVE_INVALID = 139 + KS_ERR_ASM_VARIANT_INVALID = 140 + KS_ERR_ASM_EXPR_BRACKET = 141 + KS_ERR_ASM_SYMBOL_MODIFIER = 142 + KS_ERR_ASM_SYMBOL_REDEFINED = 143 + KS_ERR_ASM_SYMBOL_MISSING = 144 + KS_ERR_ASM_RPAREN = 145 + KS_ERR_ASM_STAT_TOKEN = 146 + KS_ERR_ASM_UNSUPPORTED = 147 + KS_ERR_ASM_MACRO_TOKEN = 148 + KS_ERR_ASM_MACRO_PAREN = 149 + KS_ERR_ASM_MACRO_EQU = 150 + KS_ERR_ASM_MACRO_ARGS = 151 + KS_ERR_ASM_MACRO_LEVELS_EXCEED = 152 + KS_ERR_ASM_MACRO_STR = 153 + KS_ERR_ASM_MACRO_INVALID = 154 + KS_ERR_ASM_ESC_BACKSLASH = 155 + KS_ERR_ASM_ESC_OCTAL = 156 + KS_ERR_ASM_ESC_SEQUENCE = 157 + KS_ERR_ASM_ESC_STR = 158 + KS_ERR_ASM_TOKEN_INVALID = 159 + KS_ERR_ASM_INSN_UNSUPPORTED = 160 + KS_ERR_ASM_FIXUP_INVALID = 161 + KS_ERR_ASM_LABEL_INVALID = 162 + KS_ERR_ASM_FRAGMENT_INVALID = 163 + KS_ERR_ASM_INVALIDOPERAND = 512 + KS_ERR_ASM_MISSINGFEATURE = 513 + KS_ERR_ASM_MNEMONICFAIL = 514 + KS_OPT_SYNTAX = 1 + KS_OPT_SYM_RESOLVER = 2 + KS_OPT_SYNTAX_INTEL = 1 + KS_OPT_SYNTAX_ATT = 2 + KS_OPT_SYNTAX_NASM = 4 + KS_OPT_SYNTAX_MASM = 8 + KS_OPT_SYNTAX_GAS = 16 + KS_OPT_SYNTAX_RADIX16 = 32 +end \ No newline at end of file diff --git a/bindings/ruby/keystone_gem/lib/keystone/mips_const.rb b/bindings/ruby/keystone_gem/lib/keystone/mips_const.rb new file mode 100644 index 0000000..85990e9 --- /dev/null +++ b/bindings/ruby/keystone_gem/lib/keystone/mips_const.rb @@ -0,0 +1,7 @@ +# For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [mips_const.rb] + +module Keystone + KS_ERR_ASM_MIPS_INVALIDOPERAND = 512 + KS_ERR_ASM_MIPS_MISSINGFEATURE = 513 + KS_ERR_ASM_MIPS_MNEMONICFAIL = 514 +end \ No newline at end of file diff --git a/bindings/ruby/keystone_gem/lib/keystone/ppc_const.rb b/bindings/ruby/keystone_gem/lib/keystone/ppc_const.rb new file mode 100644 index 0000000..ee518dd --- /dev/null +++ b/bindings/ruby/keystone_gem/lib/keystone/ppc_const.rb @@ -0,0 +1,7 @@ +# For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [ppc_const.rb] + +module Keystone + KS_ERR_ASM_PPC_INVALIDOPERAND = 512 + KS_ERR_ASM_PPC_MISSINGFEATURE = 513 + KS_ERR_ASM_PPC_MNEMONICFAIL = 514 +end \ No newline at end of file diff --git a/bindings/ruby/keystone_gem/lib/keystone/sparc_const.rb b/bindings/ruby/keystone_gem/lib/keystone/sparc_const.rb new file mode 100644 index 0000000..2053907 --- /dev/null +++ b/bindings/ruby/keystone_gem/lib/keystone/sparc_const.rb @@ -0,0 +1,7 @@ +# For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [sparc_const.rb] + +module Keystone + KS_ERR_ASM_SPARC_INVALIDOPERAND = 512 + KS_ERR_ASM_SPARC_MISSINGFEATURE = 513 + KS_ERR_ASM_SPARC_MNEMONICFAIL = 514 +end \ No newline at end of file diff --git a/bindings/ruby/keystone_gem/lib/keystone/systemz_const.rb b/bindings/ruby/keystone_gem/lib/keystone/systemz_const.rb new file mode 100644 index 0000000..2d93464 --- /dev/null +++ b/bindings/ruby/keystone_gem/lib/keystone/systemz_const.rb @@ -0,0 +1,7 @@ +# For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [systemz_const.rb] + +module Keystone + KS_ERR_ASM_SYSTEMZ_INVALIDOPERAND = 512 + KS_ERR_ASM_SYSTEMZ_MISSINGFEATURE = 513 + KS_ERR_ASM_SYSTEMZ_MNEMONICFAIL = 514 +end \ No newline at end of file diff --git a/bindings/ruby/keystone_gem/lib/keystone/version.rb b/bindings/ruby/keystone_gem/lib/keystone/version.rb new file mode 100644 index 0000000..5e23397 --- /dev/null +++ b/bindings/ruby/keystone_gem/lib/keystone/version.rb @@ -0,0 +1,3 @@ +module Keystone + VERSION = "0.9.0" +end diff --git a/bindings/ruby/keystone_gem/lib/keystone/x86_const.rb b/bindings/ruby/keystone_gem/lib/keystone/x86_const.rb new file mode 100644 index 0000000..1444012 --- /dev/null +++ b/bindings/ruby/keystone_gem/lib/keystone/x86_const.rb @@ -0,0 +1,7 @@ +# For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [x86_const.rb] + +module Keystone + KS_ERR_ASM_X86_INVALIDOPERAND = 512 + KS_ERR_ASM_X86_MISSINGFEATURE = 513 + KS_ERR_ASM_X86_MNEMONICFAIL = 514 +end \ No newline at end of file diff --git a/bindings/ruby/keystone_gem/pkg/.gitignore b/bindings/ruby/keystone_gem/pkg/.gitignore new file mode 100644 index 0000000..b7e7725 --- /dev/null +++ b/bindings/ruby/keystone_gem/pkg/.gitignore @@ -0,0 +1,10 @@ +/.bundle/ +/.yardoc +/Gemfile.lock +/_yardoc/ +/coverage/ +/doc/ +/pkg/ +/spec/reports/ +/tmp/ +*.gem diff --git a/bindings/ruby/sample.rb b/bindings/ruby/sample.rb new file mode 100644 index 0000000..9839fb1 --- /dev/null +++ b/bindings/ruby/sample.rb @@ -0,0 +1,60 @@ +#!/usr/bin/env ruby + +# Sample code for Keystone assembler engine. +# By Sascha Schirra , 2016 + +require 'keystone' + +include Keystone + +def test_ks(arch, mode, code, syntax=0) + ks = Ks.new(arch, mode) + if syntax != 0 + ks.syntax = syntax + end + encoding, count = ks.asm(code) + + print("%s = [ " % code) + encoding.each_char do |i| + print("%02x " % i.ord) + end + puts("]") +end + + +# X86 +test_ks(KS_ARCH_X86, KS_MODE_16, "add eax, ecx") +test_ks(KS_ARCH_X86, KS_MODE_32, "add eax, ecx") +test_ks(KS_ARCH_X86, KS_MODE_64, "add rax, rcx") +test_ks(KS_ARCH_X86, KS_MODE_32, "add %ecx, %eax", KS_OPT_SYNTAX_ATT) +test_ks(KS_ARCH_X86, KS_MODE_64, "add %rcx, %rax", KS_OPT_SYNTAX_ATT) + +# ARM +test_ks(KS_ARCH_ARM, KS_MODE_ARM, "sub r1, r2, r5") +test_ks(KS_ARCH_ARM, KS_MODE_ARM + KS_MODE_BIG_ENDIAN, "sub r1, r2, r5") +test_ks(KS_ARCH_ARM, KS_MODE_THUMB, "movs r4, #0xf0") +test_ks(KS_ARCH_ARM, KS_MODE_THUMB + KS_MODE_BIG_ENDIAN, "movs r4, #0xf0") + +# ARM64 +test_ks(KS_ARCH_ARM64, KS_MODE_LITTLE_ENDIAN, "ldr w1, [sp, #0x8]") + +# Hexagon +test_ks(KS_ARCH_HEXAGON, KS_MODE_BIG_ENDIAN, "v23.w=vavg(v11.w,v2.w):rnd") + +# Mips +test_ks(KS_ARCH_MIPS, KS_MODE_MIPS32, "and $9, $6, $7") +test_ks(KS_ARCH_MIPS, KS_MODE_MIPS32 + KS_MODE_BIG_ENDIAN, "and $9, $6, $7") +test_ks(KS_ARCH_MIPS, KS_MODE_MIPS64, "and $9, $6, $7") +test_ks(KS_ARCH_MIPS, KS_MODE_MIPS64 + KS_MODE_BIG_ENDIAN, "and $9, $6, $7") + +# PowerPC +test_ks(KS_ARCH_PPC, KS_MODE_PPC32 + KS_MODE_BIG_ENDIAN, "add 1, 2, 3") +test_ks(KS_ARCH_PPC, KS_MODE_PPC64, "add 1, 2, 3") +test_ks(KS_ARCH_PPC, KS_MODE_PPC64 + KS_MODE_BIG_ENDIAN, "add 1, 2, 3") + +# Sparc +test_ks(KS_ARCH_SPARC, KS_MODE_SPARC32 + KS_MODE_LITTLE_ENDIAN, "add %g1, %g2, %g3") +test_ks(KS_ARCH_SPARC, KS_MODE_SPARC32 + KS_MODE_BIG_ENDIAN, "add %g1, %g2, %g3") + +# SystemZ +test_ks(KS_ARCH_SYSTEMZ, KS_MODE_BIG_ENDIAN, "a %r0, 4095(%r15,%r1)") diff --git a/bindings/rust/.gitignore b/bindings/rust/.gitignore new file mode 100644 index 0000000..7a0c501 --- /dev/null +++ b/bindings/rust/.gitignore @@ -0,0 +1,4 @@ +Cargo.lock +**/target/** +*.bk +keystone-sys/keystone diff --git a/bindings/rust/COPYING b/bindings/rust/COPYING new file mode 100644 index 0000000..00ccfbb --- /dev/null +++ b/bindings/rust/COPYING @@ -0,0 +1,339 @@ + GNU GENERAL PUBLIC LICENSE + Version 2, June 1991 + + Copyright (C) 1989, 1991 Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. 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See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + +Also add information on how to contact you by electronic and paper mail. + +If the program is interactive, make it output a short notice like this +when it starts in an interactive mode: + + Gnomovision version 69, Copyright (C) year name of author + Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, the commands you use may +be called something other than `show w' and `show c'; they could even be +mouse-clicks or menu items--whatever suits your program. + +You should also get your employer (if you work as a programmer) or your +school, if any, to sign a "copyright disclaimer" for the program, if +necessary. Here is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the program + `Gnomovision' (which makes passes at compilers) written by James Hacker. + + , 1 April 1989 + Ty Coon, President of Vice + +This General Public License does not permit incorporating your program into +proprietary programs. If your program is a subroutine library, you may +consider it more useful to permit linking proprietary applications with the +library. If this is what you want to do, use the GNU Lesser General +Public License instead of this License. diff --git a/bindings/rust/Cargo.toml b/bindings/rust/Cargo.toml new file mode 100644 index 0000000..3342e5a --- /dev/null +++ b/bindings/rust/Cargo.toml @@ -0,0 +1,26 @@ +[package] +name = "keystone" +version = "0.9.2" +authors = [ + "Remco Verhoef ", + "Tasuku SUENAGA a.k.a. gunyarakun " +] +description = "Rust bindings for the keystone-engine" +license = "GPL-2.0" +readme = "README.md" +repository = "https://github.com/keystone-engine/keystone" +include = [ + "src/*", "tests/*", "Cargo.toml", "COPYING", "README.md" +] + +[dependencies] +libc = "0.2" +keystone-sys = { path = "keystone-sys", version = "0.9.2" } + +[features] +default = [] + +use_system_keystone = ["keystone-sys/use_system_keystone"] +build_keystone_cmake = ["keystone-sys/build_keystone_cmake"] + +[workspace] diff --git a/bindings/rust/Makefile b/bindings/rust/Makefile new file mode 100644 index 0000000..05a3a38 --- /dev/null +++ b/bindings/rust/Makefile @@ -0,0 +1,26 @@ +# Rust binding for Keystone engine. Remco Verhoef + +.PHONY: gen_const build package clean check + +build: keystone-sys/keystone + cargo build -vv + +package: keystone-sys/keystone + cd keystone-sys && cargo package -vv + cargo package -vv + +# For packaging we need to embed the keystone source in the crate +keystone-sys/keystone: + rsync -a ../.. keystone-sys/keystone --exclude bindings --filter ":- ../../.gitignore" + +clean: + rm -rf keystone-sys/keystone/ + cargo clean + +check: +# Make sure to only use one test thread as keystone isn't thread-safe + cargo test -- --test-threads=1 + +gen_const: + cd .. && python2 const_generator.py rust + cargo fmt diff --git a/bindings/rust/README.md b/bindings/rust/README.md new file mode 100644 index 0000000..1bcfac1 --- /dev/null +++ b/bindings/rust/README.md @@ -0,0 +1,56 @@ +# keystone-rs +Rust bindings for the [keystone](http://www.keystone-engine.org/) engine. + +## Sample +```rust +extern crate keystone; +use keystone::*; + +fn main() { + let engine = Keystone::new(Arch::X86, Mode::MODE_32) + .expect("Could not initialize Keystone engine"); + + engine.option(OptionType::SYNTAX, OptionValue::SYNTAX_NASM) + .expect("Could not set option to nasm syntax"); + + let result = engine.asm("mov ah, 0x80".to_string(), 0) + .expect("Could not assemble"); + + println!("ASM result: {}", result); + + if let Err(err) = engine.asm("INVALID".to_string(), 0) { + println!("Error: {}", err); + } +} +``` + +## Installation +Add a dependency line into `Cargo.toml`. + +``` +[dependencies] +keystone = "0.9.2" +``` + +This package attempts to build keystone. That requires cmake and c/c++ compiler. + +If you want to use keystone already installed in the system, specify `use_system_keystone` feature on `Cargo.toml`. + +``` +[dependencies.keystone] +version = "0.9.2" +default-features = false +features = ["use_system_keystone"] +``` + +## Testing +``` +cargo test +``` + +## Contributors +- Remco Verhoef (@remco_verhoef) +- Tasuku SUENAGA a.k.a. gunyarakun (@tasukuchan) + +Special thanks to: +- Sébastien Duquette (@ekse) for his [unicorn-rs](https://github.com/ekse/unicorn-rs) binding diff --git a/bindings/rust/examples/asm.rs b/bindings/rust/examples/asm.rs new file mode 100644 index 0000000..86f3262 --- /dev/null +++ b/bindings/rust/examples/asm.rs @@ -0,0 +1,21 @@ +extern crate keystone; +use keystone::*; + +fn main() { + let engine = + Keystone::new(Arch::X86, Mode::MODE_32).expect("Could not initialize Keystone engine"); + + engine + .option(OptionType::SYNTAX, OptionValue::SYNTAX_NASM) + .expect("Could not set option to nasm syntax"); + + let result = engine + .asm("mov ah, 0x80".to_string(), 0) + .expect("Could not assemble"); + + println!("ASM result: {}", result); + + if let Err(err) = engine.asm("INVALID".to_string(), 0) { + println!("Error: {}", err); + } +} diff --git a/bindings/rust/keystone-sys/Cargo.toml b/bindings/rust/keystone-sys/Cargo.toml new file mode 100644 index 0000000..a836c30 --- /dev/null +++ b/bindings/rust/keystone-sys/Cargo.toml @@ -0,0 +1,26 @@ +[package] +name = "keystone-sys" +version = "0.9.2" +authors = [ + "Remco Verhoef ", + "Tasuku SUENAGA a.k.a. gunyarakun " +] +description = "Rust bindings for the keystone assembler" +repository = "https://github.com/keystone-engine/keystone" +documentation = "https://docs.rs/keystone/" +license = "GPL-2.0" +build = "build.rs" + +[build-dependencies] +pkg-config = { optional = true, version = "0.3" } +cmake = { optional = true, version = "0.1" } + +[dependencies] +bitflags = "1.0" +libc = "0.2" + +[features] +default = ["build_keystone_cmake"] + +use_system_keystone = ["pkg-config"] +build_keystone_cmake = ["cmake"] diff --git a/bindings/rust/keystone-sys/build.rs b/bindings/rust/keystone-sys/build.rs new file mode 100644 index 0000000..599fc05 --- /dev/null +++ b/bindings/rust/keystone-sys/build.rs @@ -0,0 +1,53 @@ +#[cfg(feature = "build_keystone_cmake")] +extern crate cmake; +#[cfg(feature = "use_system_keystone")] +extern crate pkg_config; + +#[cfg(all(not(windows), feature = "build_keystone_cmake"))] +use std::os::unix::fs::symlink; +#[cfg(all(windows, feature = "build_keystone_cmake"))] +use std::os::windows::fs::symlink_dir as symlink; + +#[cfg(feature = "build_keystone_cmake")] +use std::path::Path; + +#[cfg(feature = "build_keystone_cmake")] +fn build_with_cmake() { + if !Path::new("keystone").exists() { + // This only happens when using the crate via a `git` reference as the + // published version already embeds keystone's source. + let pwd = std::env::current_dir().unwrap(); + let keystone_dir = pwd.ancestors().skip(3).next().unwrap(); + symlink(keystone_dir, "keystone").expect("failed to symlink keystone"); + } + + let dest = cmake::Config::new("keystone") + .define("BUILD_LIBS_ONLY", "1") + .define("BUILD_SHARED_LIBS", "OFF") + .define("LLVM_TARGETS_TO_BUILD", "all") + // Prevent python from leaving behind `.pyc` files which break `cargo package` + .env("PYTHONDONTWRITEBYTECODE", "1") + .build(); + + println!("cargo:rustc-link-search=native={}/lib", dest.display()); + println!("cargo:rustc-link-lib=keystone"); + + let target = std::env::var("TARGET").unwrap(); + if target.contains("apple") { + println!("cargo:rustc-link-lib=dylib=c++"); + } else if target.contains("linux") { + println!("cargo:rustc-link-lib=dylib=stdc++"); + } else if target.contains("windows") { + println!("cargo:rustc-link-lib=dylib=shell32"); + } +} + +fn main() { + if cfg!(feature = "use_system_keystone") { + #[cfg(feature = "use_system_keystone")] + pkg_config::find_library("keystone").expect("Could not find system keystone"); + } else { + #[cfg(feature = "build_keystone_cmake")] + build_with_cmake(); + } +} diff --git a/bindings/rust/keystone-sys/src/keystone_const.rs b/bindings/rust/keystone-sys/src/keystone_const.rs new file mode 100644 index 0000000..2733b2a --- /dev/null +++ b/bindings/rust/keystone-sys/src/keystone_const.rs @@ -0,0 +1,119 @@ +#![allow(non_camel_case_types)] +// For Keystone Engine. AUTO-GENERATED FILE, DO NOT EDIT [keystone_const.rs] +use ::libc::*; + +pub const API_MAJOR: c_uint = 0; +pub const API_MINOR: c_uint = 9; + +bitflags! { +#[repr(C)] + pub struct Mode: c_int { + const LITTLE_ENDIAN = 0; + const BIG_ENDIAN = 1073741824; + const ARM = 1; + const THUMB = 16; + const V8 = 64; + const MICRO = 16; + const MIPS3 = 32; + const MIPS32R6 = 64; + const MIPS32 = 4; + const MIPS64 = 8; + const MODE_16 = 2; + const MODE_32 = 4; + const MODE_64 = 8; + const PPC32 = 4; + const PPC64 = 8; + const QPX = 16; + const SPARC32 = 4; + const SPARC64 = 8; + const V9 = 16; + } +} + +#[repr(C)] +#[derive(Debug, PartialEq, Clone, Copy)] +pub enum Arch { + ARM = 1, + ARM64 = 2, + MIPS = 3, + X86 = 4, + PPC = 5, + SPARC = 6, + SYSTEMZ = 7, + HEXAGON = 8, + EVM = 9, + MAX = 10, +} + +#[repr(C)] +#[derive(Debug, PartialEq, Clone, Copy)] +pub enum OptionType { + SYNTAX = 1, + SYM_RESOLVER = 2, +} + +bitflags! { +#[repr(C)] + pub struct OptionValue: size_t { + const SYNTAX_INTEL = 1; + const SYNTAX_ATT = 2; + const SYNTAX_NASM = 4; + const SYNTAX_MASM = 8; + const SYNTAX_GAS = 16; + const SYNTAX_RADIX16 = 32; + } +} + +bitflags! { +#[repr(C)] + pub struct Error: c_int { + const ASM = 128; + const ASM_ARCH = 512; + const OK = 0; + const NOMEM = 1; + const ARCH = 2; + const HANDLE = 3; + const MODE = 4; + const VERSION = 5; + const OPT_INVALID = 6; + const ASM_EXPR_TOKEN = 128; + const ASM_DIRECTIVE_VALUE_RANGE = 129; + const ASM_DIRECTIVE_ID = 130; + const ASM_DIRECTIVE_TOKEN = 131; + const ASM_DIRECTIVE_STR = 132; + const ASM_DIRECTIVE_COMMA = 133; + const ASM_DIRECTIVE_RELOC_NAME = 134; + const ASM_DIRECTIVE_RELOC_TOKEN = 135; + const ASM_DIRECTIVE_FPOINT = 136; + const ASM_DIRECTIVE_UNKNOWN = 137; + const ASM_DIRECTIVE_EQU = 138; + const ASM_DIRECTIVE_INVALID = 139; + const ASM_VARIANT_INVALID = 140; + const ASM_EXPR_BRACKET = 141; + const ASM_SYMBOL_MODIFIER = 142; + const ASM_SYMBOL_REDEFINED = 143; + const ASM_SYMBOL_MISSING = 144; + const ASM_RPAREN = 145; + const ASM_STAT_TOKEN = 146; + const ASM_UNSUPPORTED = 147; + const ASM_MACRO_TOKEN = 148; + const ASM_MACRO_PAREN = 149; + const ASM_MACRO_EQU = 150; + const ASM_MACRO_ARGS = 151; + const ASM_MACRO_LEVELS_EXCEED = 152; + const ASM_MACRO_STR = 153; + const ASM_MACRO_INVALID = 154; + const ASM_ESC_BACKSLASH = 155; + const ASM_ESC_OCTAL = 156; + const ASM_ESC_SEQUENCE = 157; + const ASM_ESC_STR = 158; + const ASM_TOKEN_INVALID = 159; + const ASM_INSN_UNSUPPORTED = 160; + const ASM_FIXUP_INVALID = 161; + const ASM_LABEL_INVALID = 162; + const ASM_FRAGMENT_INVALID = 163; + const ASM_INVALIDOPERAND = 512; + const ASM_MISSINGFEATURE = 513; + const ASM_MNEMONICFAIL = 514; + } +} diff --git a/bindings/rust/keystone-sys/src/lib.rs b/bindings/rust/keystone-sys/src/lib.rs new file mode 100644 index 0000000..6eb282a --- /dev/null +++ b/bindings/rust/keystone-sys/src/lib.rs @@ -0,0 +1,72 @@ +//! Keystone Assembler Engine (www.keystone-engine.org) */ +//! By Nguyen Anh Quynh , 2016 */ +//! Rust bindings by Remco Verhoef , 2016 */ +//! +#![allow(bad_style)] + +#[macro_use] +extern crate bitflags; +extern crate libc; + +pub mod keystone_const; + +use keystone_const::{Arch, Error, Mode, OptionType, OptionValue}; +use ::std::{ + ffi::CStr, + fmt, + ptr, +}; +use ::libc::{ + c_char, + c_uchar, + c_int, + c_uint, + size_t, +}; + +/// Opaque type representing the Keystone engine +#[repr(C)] +pub struct ks_engine { + _private: [u8; 0], +} +pub type ks_handle = ptr::NonNull; + +extern "C" { + pub fn ks_version(major: *mut c_uint, minor: *mut c_uint) -> c_uint; + pub fn ks_arch_supported(arch: Arch) -> c_int; + pub fn ks_open(arch: Arch, mode: Mode, engine: *mut Option) -> Error; + pub fn ks_asm( + engine: ks_handle, + string: *const c_char, + address: u64, + encoding: *mut *mut c_uchar, + encoding_size: *mut size_t, + stat_count: *mut size_t, + ) -> c_int; + pub fn ks_errno(engine: ks_handle) -> Error; + pub fn ks_strerror(error_code: Error) -> *const c_char; + pub fn ks_option(engine: ks_handle, opt_type: OptionType, value: OptionValue) -> Error; + pub fn ks_close(engine: ks_handle); + pub fn ks_free(encoding: *mut c_uchar); +} + +impl Error { + pub fn msg(self) -> String { + error_msg(self) + } +} + +/// Return a string describing given error code. +pub fn error_msg(error: Error) -> String { + unsafe { + CStr::from_ptr(ks_strerror(error)) + .to_string_lossy() + .into_owned() + } +} + +impl fmt::Display for Error { + fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result { + write!(f, "{}", self.msg()) + } +} diff --git a/bindings/rust/src/lib.rs b/bindings/rust/src/lib.rs new file mode 100644 index 0000000..dd5bd04 --- /dev/null +++ b/bindings/rust/src/lib.rs @@ -0,0 +1,168 @@ +//! Keystone Assembler Engine (www.keystone-engine.org) \ +//! By Nguyen Anh Quynh , 2016 \ +//! Rust bindings by Remco Verhoef , 2016 +//! +//! ```rust +//! extern crate keystone; +//! use keystone::{Keystone, Arch, Mode, OptionType, OptionValue}; +//! +//! fn main() { +//! let engine = Keystone::new(Arch::X86, Mode::MODE_32) +//! .expect("Could not initialize Keystone engine"); +//! engine.option(OptionType::SYNTAX, OptionValue::SYNTAX_NASM) +//! .expect("Could not set option to nasm syntax"); +//! let result = engine.asm("mov ah, 0x80".to_string(), 0) +//! .expect("Could not assemble"); +//! } +//! ``` + +extern crate keystone_sys as ffi; +extern crate libc; + +use std::{ + convert::TryInto, + ffi::{CStr, CString}, + fmt, + ops::Not, +}; + +pub use ffi::keystone_const::*; +pub use ffi::ks_handle; + +#[derive(Debug, PartialEq)] +pub struct AsmResult { + pub size: u32, + pub stat_count: u32, + pub bytes: Vec, +} + +impl fmt::Display for AsmResult { + fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result { + for &byte in &self.bytes { + f.write_fmt(format_args!("{:02x}", byte))?; + } + + Ok(()) + } +} + +pub fn bindings_version() -> (u32, u32) { + (API_MAJOR, API_MINOR) +} + +/// Return tuple `(major, minor)` API version numbers. +pub fn version() -> (u32, u32) { + let mut major: u32 = 0; + let mut minor: u32 = 0; + + unsafe { + ffi::ks_version(&mut major, &mut minor); + } + (major, minor) +} + +/// Return tuple `(major, minor)` API version numbers. +pub fn arch_supported(arch: Arch) -> bool { + unsafe { ffi::ks_arch_supported(arch) != 0 } +} + +pub fn error_msg(error: Error) -> String { + unsafe { + CStr::from_ptr(ffi::ks_strerror(error)) + .to_string_lossy() + .into_owned() + } +} + +pub struct Keystone { + handle: ks_handle, +} + +impl Keystone { + /// Create new instance of Keystone engine. + pub fn new(arch: Arch, mode: Mode) -> Result { + if version() != bindings_version() { + return Err(Error::VERSION); + } + + let mut handle: Option = None; + + let err = unsafe { ffi::ks_open(arch, mode, &mut handle) }; + if err == Error::OK { + Ok(Keystone { + handle: handle.expect("Got NULL engine from ks_open()") + }) + } else { + Err(err) + } + } + + /// Report the last error number when some API function fail. + pub fn error(&self) -> Option { + let err = unsafe { ffi::ks_errno(self.handle) }; + if err == Error::OK { + None + } else { + Some(err) + } + } + + /// Set option for Keystone engine at runtime + pub fn option(&self, option_type: OptionType, value: OptionValue) -> Result<(), Error> { + let err = unsafe { ffi::ks_option(self.handle, option_type, value) }; + if err == Error::OK { + Ok(()) + } else { + Err(err) + } + } + + /// Assemble a string given its the buffer, size, start address and number + /// of instructions to be decoded. + /// + /// This API dynamically allocate memory to contain assembled instruction. + /// Resulted array of bytes containing the machine code is put into @*encoding + pub fn asm(&self, str: String, address: u64) -> Result { + let mut size: libc::size_t = 0; + let mut stat_count: libc::size_t = 0; + + let s = CString::new(str).unwrap(); + let mut ptr: *mut libc::c_uchar = std::ptr::null_mut(); + + let err = Error::from_bits_truncate(unsafe { + ffi::ks_asm( + self.handle, + s.as_ptr(), + address, + &mut ptr, + &mut size, + &mut stat_count, + ) + }); + + if err == Error::OK { + debug_assert!(ptr.is_null().not()); + let bytes_slice = unsafe { std::slice::from_raw_parts(ptr, size) }; + let bytes = bytes_slice.to_vec(); + + unsafe { + ffi::ks_free(ptr); + }; + + Ok(AsmResult { + size: size.try_into().expect("size_t overflowed u32"), + stat_count: stat_count.try_into().expect("size_t overflowed u32"), + bytes, + }) + } else { + let err = self.error().unwrap_or(err); + Err(err) + } + } +} + +impl Drop for Keystone { + fn drop(&mut self) { + unsafe { ffi::ks_close(self.handle) }; + } +} diff --git a/bindings/rust/tests/keystone.rs b/bindings/rust/tests/keystone.rs new file mode 100644 index 0000000..f5d3e39 --- /dev/null +++ b/bindings/rust/tests/keystone.rs @@ -0,0 +1,50 @@ +extern crate keystone; + +use keystone::{Arch, Error, Keystone, Mode, OptionType, OptionValue}; + +#[test] +fn version() { + let (major, minor) = keystone::version(); + assert_eq!((major, minor), keystone::bindings_version()); +} + +#[test] +fn arch_supported() { + assert_eq!(keystone::arch_supported(Arch::ARM), true); + assert_eq!(keystone::arch_supported(Arch::X86), true); +} + +#[test] +fn asm() { + let asm = String::from("mov ah, 0x80\n nop\n mov al, 0x81\n"); + + let engine = Keystone::new(Arch::X86, Mode::LITTLE_ENDIAN | Mode::MODE_32) + .expect("Could not initialize Keystone engine"); + + engine + .option(OptionType::SYNTAX, OptionValue::SYNTAX_NASM) + .expect("Could not set option to nasm syntax"); + + let result = engine.asm(asm, 0).expect("Could not assemble"); + + print!("{0:?}", result.bytes); + assert_eq!(result.bytes, [0xb4, 0x80, 0x90, 0xb0, 0x81]); +} + +#[test] +fn invalid_asm() { + let asm = String::from("invalid asm"); + + let engine = + Keystone::new(Arch::X86, Mode::MODE_32).expect("Could not initialize Keystone engine"); + + let result = engine.asm(asm, 0); + let err = result.unwrap_err(); + + assert_eq!(err, Error::ASM_MNEMONICFAIL); + assert_eq!(err.msg(), "Invalid mnemonic (KS_ERR_ASM_MNEMONICFAIL)"); + assert_eq!( + format!("{}", err), + "Invalid mnemonic (KS_ERR_ASM_MNEMONICFAIL)" + ); +} diff --git a/bindings/vb6/CAsmResult.cls b/bindings/vb6/CAsmResult.cls new file mode 100644 index 0000000..2e3152a --- /dev/null +++ b/bindings/vb6/CAsmResult.cls @@ -0,0 +1,47 @@ +VERSION 1.0 CLASS +BEGIN + MultiUse = -1 'True + Persistable = 0 'NotPersistable + DataBindingBehavior = 0 'vbNone + DataSourceBehavior = 0 'vbNone + MTSTransactionMode = 0 'NotAnMTSObject +END +Attribute VB_Name = "CAsmResult" +Attribute VB_GlobalNameSpace = False +Attribute VB_Creatable = True +Attribute VB_PredeclaredId = False +Attribute VB_Exposed = False +Option Explicit + +'Keystone Assembly Engine bindings for VB6 +'Contributed by FireEye FLARE Team +'Author: David Zimmer , +'License: Apache +'Copyright: FireEye 2017 + +'NOTE: the VB code was built and tested against the latest binary release: Keystone 0.9.1 +' I will enabled the symbol resolver once it makes it into the stable release + +Public errMsg As String +Public lastErr As ks_err +Public size As Long +Public count As Long +Public source As String +Public arch As ks_arch +Public mode As ks_mode +Public syntax As ks_opt_type + +Private b() As Byte + +Property Get hadErr() As Boolean + If Len(errMsg) > 0 Or lastErr <> 0 Then hadErr = True +End Property + +Property Get result() As Byte() + result = b +End Property + +Friend Property Let result(buf() As Byte) + b = buf +End Property + diff --git a/bindings/vb6/Form1.frm b/bindings/vb6/Form1.frm new file mode 100644 index 0000000..f15a663 --- /dev/null +++ b/bindings/vb6/Form1.frm @@ -0,0 +1,192 @@ +VERSION 5.00 +Object = "{831FDD16-0C5C-11D2-A9FC-0000F8754DA1}#2.0#0"; "mscomctl.ocx" +Begin VB.Form Form1 + Caption = "Keystone Assembler Engine VB6 Bindings - Contributed by FireEye FLARE team" + ClientHeight = 4680 + ClientLeft = 60 + ClientTop = 345 + ClientWidth = 10860 + LinkTopic = "Form1" + ScaleHeight = 4680 + ScaleWidth = 10860 + StartUpPosition = 2 'CenterScreen + Begin VB.CommandButton Command1 + Caption = "Copy" + Height = 375 + Left = 4680 + TabIndex = 1 + Top = 4200 + Width = 1695 + End + Begin MSComctlLib.ListView lv + Height = 3975 + Left = 120 + TabIndex = 0 + Top = 120 + Width = 10695 + _ExtentX = 18865 + _ExtentY = 7011 + View = 3 + LabelEdit = 1 + LabelWrap = -1 'True + HideSelection = -1 'True + FullRowSelect = -1 'True + GridLines = -1 'True + _Version = 393217 + ForeColor = -2147483640 + BackColor = -2147483643 + BorderStyle = 1 + Appearance = 1 + NumItems = 3 + BeginProperty ColumnHeader(1) {BDD1F052-858B-11D1-B16A-00C0F0283628} + Text = "arch" + Object.Width = 5292 + EndProperty + BeginProperty ColumnHeader(2) {BDD1F052-858B-11D1-B16A-00C0F0283628} + SubItemIndex = 1 + Text = "asm" + Object.Width = 5292 + EndProperty + BeginProperty ColumnHeader(3) {BDD1F052-858B-11D1-B16A-00C0F0283628} + SubItemIndex = 2 + Text = "bytes" + Object.Width = 14111 + EndProperty + End +End +Attribute VB_Name = "Form1" +Attribute VB_GlobalNameSpace = False +Attribute VB_Creatable = False +Attribute VB_PredeclaredId = True +Attribute VB_Exposed = False +Option Explicit + +'Keystone Assembly Engine bindings for VB6 +'Contributed by FireEye FLARE Team +'Author: David Zimmer , +'License: Apache +'Copyright: FireEye 2017 + +'NOTE: the VB code was built and tested against the latest binary release: Keystone 0.9.1 +' I will enabled the symbol resolver once it makes it into the stable release + +Private Sub Form_Load() + + Const base As Long = 0 '&H1000 + + initDll + If hLib <> 0 Then Me.Caption = Me.Caption & " - loaded KeyStone v" & version + + 'MsgBox err2str(KS_ERR_ASM_SYMBOL_MISSING) + + ' X86 + 'AddResult test_ks(KS_ARCH_X86, KS_MODE_32, "jmp 0x2000; nop; nop;", 0, base) + AddResult test_ks(KS_ARCH_X86, KS_MODE_16, "add eax, ecx", 0, base) + AddResult test_ks(KS_ARCH_X86, KS_MODE_32, "add eax, ecx", 0, base) + AddResult test_ks(KS_ARCH_X86, KS_MODE_64, "add rax, rcx", 0, base) + AddResult test_ks(KS_ARCH_X86, KS_MODE_32, "add %ecx, %eax", KS_OPT_SYNTAX_ATT, base) + AddResult test_ks(KS_ARCH_X86, KS_MODE_64, "add %rcx, %rax", KS_OPT_SYNTAX_ATT, base) + + ' ARM + AddResult test_ks(KS_ARCH_ARM, KS_MODE_ARM, "sub r1, r2, r5", 0, base) + AddResult test_ks(KS_ARCH_ARM, KS_MODE_ARM + KS_MODE_BIG_ENDIAN, "sub r1, r2, r5", 0, base) + AddResult test_ks(KS_ARCH_ARM, KS_MODE_THUMB, "movs r4, #0xf0", 0, base) + AddResult test_ks(KS_ARCH_ARM, KS_MODE_THUMB + KS_MODE_BIG_ENDIAN, "movs r4, #0xf0", 0, base) + + ' ARM64 + AddResult test_ks(KS_ARCH_ARM64, KS_MODE_LITTLE_ENDIAN, "ldr w1, [sp, #0x8]", 0, base) + + ' Hexagon + AddResult test_ks(KS_ARCH_HEXAGON, KS_MODE_BIG_ENDIAN, "v23.w=vavg(v11.w,v2.w):rnd", 0, base) + + ' Mips + AddResult test_ks(KS_ARCH_MIPS, KS_MODE_MIPS32, "and $9, $6, $7", 0) + AddResult test_ks(KS_ARCH_MIPS, KS_MODE_MIPS32 + KS_MODE_BIG_ENDIAN, "and $9, $6, $7", 0, base) + AddResult test_ks(KS_ARCH_MIPS, KS_MODE_MIPS64, "and $9, $6, $7", 0) + AddResult test_ks(KS_ARCH_MIPS, KS_MODE_MIPS64 + KS_MODE_BIG_ENDIAN, "and $9, $6, $7", 0, base) + + ' PowerPC + AddResult test_ks(KS_ARCH_PPC, KS_MODE_PPC32 + KS_MODE_BIG_ENDIAN, "add 1, 2, 3", 0, base) + AddResult test_ks(KS_ARCH_PPC, KS_MODE_PPC64, "add 1, 2, 3", 0) + AddResult test_ks(KS_ARCH_PPC, KS_MODE_PPC64 + KS_MODE_BIG_ENDIAN, "add 1, 2, 3", 0, base) + + ' Sparc + AddResult test_ks(KS_ARCH_SPARC, KS_MODE_SPARC32 + KS_MODE_LITTLE_ENDIAN, "add %g1, %g2, %g3", 0, base) + AddResult test_ks(KS_ARCH_SPARC, KS_MODE_SPARC32 + KS_MODE_BIG_ENDIAN, "add %g1, %g2, %g3", 0, base) + + ' SystemZ + AddResult test_ks(KS_ARCH_SYSTEMZ, KS_MODE_BIG_ENDIAN, "a %r0, 4095(%r15,%r1)", 0, base) + + ' symbol resolver test (will enable once in stable release binaries not tested yet) + 'AddResult test_ks(KS_ARCH_X86, KS_MODE_32, "jmp _l1; nop", 0, , base, True) + +End Sub + + +Public Function test_ks(arch As ks_arch, mode As ks_mode, assembly As String, Optional syntax As ks_opt_type = 0, Optional base As Long = 0, Optional withResolver As Boolean = False) As CAsmResult + + Dim r As New CAsmResult + Dim buf As Long, size As Long, count As Long, b() As Byte + Dim hKeystone As Long + Dim address As Currency + + Set test_ks = r + + If hLib = 0 Then initDll r + If hLib = 0 Then Exit Function + + r.arch = arch + r.mode = mode + r.syntax = syntax + r.source = assembly + + If ks_arch_supported(arch) = 0 Then + r.errMsg = "specified architecture not supported" + Exit Function + End If + + r.lastErr = ks_open(arch, mode, hKeystone) + If r.lastErr <> KS_ERR_OK Then + r.errMsg = err2str(r.lastErr) + Exit Function + End If + + 'If withResolver Then setResolver hKeystone, AddressOf vbSymResolver + If syntax <> 0 Then Call ks_option(hKeystone, KS_OPT_SYNTAX, syntax) + + address = lng2Cur(base) + r.lastErr = ks_asm(hKeystone, assembly, address, buf, size, count) + + If r.lastErr = KS_ERR_OK Then + ReDim b(size - 1) + CopyMemory ByVal VarPtr(b(0)), ByVal buf, size + ks_free buf + r.result = b() + r.count = count + r.size = size + End If + + ks_close hKeystone + +End Function + +Function AddResult(r As CAsmResult) + + Dim li As ListItem + + Set li = lv.ListItems.Add(, , ks_arch2str(r.arch)) + li.SubItems(1) = r.source + If r.hadErr Then + li.SubItems(2) = "Error: " & r.errMsg + Else + li.SubItems(2) = b2Str(r.result) + End If + Set li.Tag = r + +End Function + +Private Sub Command1_Click() + Clipboard.Clear + Clipboard.SetText GetAllElements(lv) +End Sub + diff --git a/bindings/vb6/Project1.vbp b/bindings/vb6/Project1.vbp new file mode 100644 index 0000000..24e1604 --- /dev/null +++ b/bindings/vb6/Project1.vbp @@ -0,0 +1,40 @@ +Type=Exe +Form=Form1.frm +Reference=*\G{00020430-0000-0000-C000-000000000046}#2.0#0#C:\WINDOWS\system32\stdole2.tlb#OLE Automation +Module=mKeyStone; mKeystone.bas +Module=mMisc; mMisc.bas +Class=CAsmResult; CAsmResult.cls +Object={831FDD16-0C5C-11D2-A9FC-0000F8754DA1}#2.0#0; mscomctl.ocx +IconForm="Form1" +Startup="Form1" +Command32="" +Name="Project1" +HelpContextID="0" +CompatibleMode="0" +MajorVer=1 +MinorVer=0 +RevisionVer=0 +AutoIncrementVer=0 +ServerSupportFiles=0 +VersionCompanyName="sandsprite" +CompilationType=0 +OptimizationType=0 +FavorPentiumPro(tm)=0 +CodeViewDebugInfo=0 +NoAliasing=0 +BoundsCheck=0 +OverflowCheck=0 +FlPointCheck=0 +FDIVCheck=0 +UnroundedFP=0 +StartMode=0 +Unattended=0 +Retained=0 +ThreadPerObject=0 +MaxNumberOfThreads=1 + +[MS Transaction Server] +AutoRefresh=1 + +[fastBuild] +fullPath=%ap%\bin\vbKeyStone.exe diff --git a/bindings/vb6/Project1.vbw b/bindings/vb6/Project1.vbw new file mode 100644 index 0000000..f8b75a4 --- /dev/null +++ b/bindings/vb6/Project1.vbw @@ -0,0 +1,4 @@ +Form1 = 269, 165, 1275, 826, , 22, 22, 1050, 683, C +mKeyStone = 54, 17, 1321, 960, Z +mMisc = 132, 132, 1160, 793, +CAsmResult = 264, 264, 1270, 925, diff --git a/bindings/vb6/keystone.def b/bindings/vb6/keystone.def new file mode 100644 index 0000000..3e74a83 --- /dev/null +++ b/bindings/vb6/keystone.def @@ -0,0 +1,10 @@ +EXPORTS + ks_arch_supported + ks_asm + ks_close + ks_errno + ks_free + ks_open + ks_option + ks_strerror + ks_version \ No newline at end of file diff --git a/bindings/vb6/keystone.lib b/bindings/vb6/keystone.lib new file mode 100644 index 0000000000000000000000000000000000000000..01fd39f04706e4de07f9b21049029d8d8f48e2c0 GIT binary patch literal 3366 zcmcIm%}*0S6n|}@lx<^(_?<`=!T}S5P_}#+V~SuRp%hX|;%%wzA`OLYc8kH27mofJ zCLX~L(^PXT3OEJ&H0zBbGe0;{Bq9RvfjHjd&dIP%&uiJ=RM$qaPb`Suhz1Q=KO4a z7KfC#tERc-nzU!r-K|z_r)HI)k;?aVw><}{rM6hHU0ejt#aq&1InIvFEW9Nx8;<1- z@fuQZSFIg3z-uV_TGjrE<}+U3;UZkK`WdnT6~kvj#tuur!ip@JQ)l zr`^qTDh@8AXm3|>y=QtCoSg|oK_o3O3}V}90Jh{!p&q=?WM z`zbn#-+w&ccFq)EI2SxcI*vvej5@uyC`mIR`a|n%hcWgH2wXNQaiDhEiGD+n7{K%H zbdHBNnL00YyemUoIRTWrxT`SUJpTLY`fwr~$Ge5Eh$DU(f&JXU{d930cE{JjsGYXB zxd5e`qp$~rI&mFSZJ~(AUtllya4%7b!d@p=!, +'License: Apache +'Copyright: FireEye 2017 + +'NOTE: the VB code was built and tested against the latest binary release: Keystone 0.9.1 +' I will enabled the symbol resolver once it makes it into the stable release + +Public hLib As Long +Public version As String +Public vMajor As Long +Public vMinor As Long + +Public Enum ks_arch + KS_ARCH_ARM = 1 ' ARM architecture (including Thumb, Thumb-2) + KS_ARCH_ARM64 ' ARM-64, also called AArch64 + KS_ARCH_MIPS ' Mips architecture + KS_ARCH_X86 ' X86 architecture (including x86 & x86-64) + KS_ARCH_PPC ' PowerPC architecture (currently unsupported) + KS_ARCH_SPARC ' Sparc architecture + KS_ARCH_SYSTEMZ ' SystemZ architecture (S390X) + KS_ARCH_HEXAGON ' Hexagon architecture + KS_ARCH_MAX +End Enum + +Public Enum ks_mode + KS_MODE_LITTLE_ENDIAN = 0 ' little-endian mode (default mode) + KS_MODE_BIG_ENDIAN = &H40000000 ' big-endian mode + ' arm / arm64 + KS_MODE_ARM = 1 ' ARM mode + KS_MODE_THUMB = &H10 ' THUMB mode (including Thumb-2) + KS_MODE_V8 = &H40 ' ARMv8 A32 encodings for ARM + ' mips + KS_MODE_MICRO = &H10 ' MicroMips mode + KS_MODE_MIPS3 = &H20 ' Mips III ISA + KS_MODE_MIPS32R6 = &H40 ' Mips32r6 ISA + KS_MODE_MIPS32 = 4 ' Mips32 ISA + KS_MODE_MIPS64 = 8 ' Mips64 ISA + ' x86 / x64 + KS_MODE_16 = 2 ' 16-bit mode + KS_MODE_32 = 4 ' 32-bit mode + KS_MODE_64 = 8 ' 64-bit mode + ' ppc + KS_MODE_PPC32 = 4 ' 32-bit mode + KS_MODE_PPC64 = 8 ' 64-bit mode + KS_MODE_QPX = &H10 ' Quad Processing eXtensions mode + ' sparc + KS_MODE_SPARC32 = 4 ' 32-bit mode + KS_MODE_SPARC64 = 8 ' 64-bit mode + KS_MODE_V9 = &H10 ' SparcV9 mode +End Enum + +'All generic errors related to input assembly >= KS_ERR_ASM +Public Const KS_ERR_ASM = 128 + +'All architecture-specific errors related to input assembly >= KS_ERR_ASM_ARCH +Public Const KS_ERR_ASM_ARCH = 512 + +'All type of errors encountered by Keystone API. +Public Enum ks_err ' All type of errors encountered by Keystone API. + KS_ERR_OK = 0 ' No error: everything was fine + KS_ERR_NOMEM ' Out-Of-Memory error: ks_open(), ks_emulate() + KS_ERR_ARCH ' Unsupported architecture: ks_open() + KS_ERR_HANDLE ' Invalid handle + KS_ERR_MODE ' Invalid/unsupported mode: ks_open() + KS_ERR_VERSION ' Unsupported version (bindings) + KS_ERR_OPT_INVALID ' Unsupported option + ' generic input assembly errors - parser specific + KS_ERR_ASM_EXPR_TOKEN = 128 'KS_ERR_ASM ' unknown token in expression + KS_ERR_ASM_DIRECTIVE_VALUE_RANGE ' literal value out of range for directive + KS_ERR_ASM_DIRECTIVE_ID ' expected identifier in directive + KS_ERR_ASM_DIRECTIVE_TOKEN ' unexpected token in directive + KS_ERR_ASM_DIRECTIVE_STR ' expected string in directive + KS_ERR_ASM_DIRECTIVE_COMMA ' expected comma in directive + KS_ERR_ASM_DIRECTIVE_RELOC_NAME ' expected relocation name in directive + KS_ERR_ASM_DIRECTIVE_RELOC_TOKEN ' unexpected token in .reloc directive + KS_ERR_ASM_DIRECTIVE_FPOINT ' invalid floating point in directive + KS_ERR_ASM_DIRECTIVE_UNKNOWN ' unknown directive + KS_ERR_ASM_DIRECTIVE_EQU ' invalid equal directive + KS_ERR_ASM_DIRECTIVE_INVALID ' (generic) invalid directive + KS_ERR_ASM_VARIANT_INVALID ' invalid variant + KS_ERR_ASM_EXPR_BRACKET ' brackets expression not supported on this target + KS_ERR_ASM_SYMBOL_MODIFIER ' unexpected symbol modifier following '@' + KS_ERR_ASM_SYMBOL_REDEFINED ' invalid symbol redefinition + KS_ERR_ASM_SYMBOL_MISSING ' cannot find a symbol + KS_ERR_ASM_RPAREN ' expected ')' in parentheses expression + KS_ERR_ASM_STAT_TOKEN ' unexpected token at start of statement + KS_ERR_ASM_UNSUPPORTED ' unsupported token yet + KS_ERR_ASM_MACRO_TOKEN ' unexpected token in macro instantiation + KS_ERR_ASM_MACRO_PAREN ' unbalanced parentheses in macro argument + KS_ERR_ASM_MACRO_EQU ' expected '=' after formal parameter identifier + KS_ERR_ASM_MACRO_ARGS ' too many positional arguments + KS_ERR_ASM_MACRO_LEVELS_EXCEED ' macros cannot be nested more than 20 levels deep + KS_ERR_ASM_MACRO_STR ' invalid macro string + KS_ERR_ASM_MACRO_INVALID ' invalid macro (generic error) + KS_ERR_ASM_ESC_BACKSLASH ' unexpected backslash at end of escaped string + KS_ERR_ASM_ESC_OCTAL ' invalid octal escape sequence (out of range) + KS_ERR_ASM_ESC_SEQUENCE ' invalid escape sequence (unrecognized character) + KS_ERR_ASM_ESC_STR ' broken escape string + KS_ERR_ASM_TOKEN_INVALID ' invalid token + KS_ERR_ASM_INSN_UNSUPPORTED ' this instruction is unsupported in this mode + KS_ERR_ASM_FIXUP_INVALID ' invalid fixup + KS_ERR_ASM_LABEL_INVALID ' invalid label + KS_ERR_ASM_FRAGMENT_INVALID ' invalid fragment + ' generic input assembly errors - architecture specific + KS_ERR_ASM_INVALIDOPERAND = 512 'KS_ERR_ASM_ARCH + KS_ERR_ASM_MISSINGFEATURE + KS_ERR_ASM_MNEMONICFAIL +End Enum + +'Runtime option for the Keystone engine +Public Enum ks_opt_type ' Runtime option for the Keystone engine + KS_OPT_SYNTAX = 1 ' Choose syntax for input assembly +End Enum + + +'Runtime option value (associated with ks_opt_type above) +Public Enum ks_opt_value + KS_OPT_SYNTAX_INTEL = 1 ' X86 Intel syntax - default on X86 (KS_OPT_SYNTAX). + KS_OPT_SYNTAX_ATT = 2 ' X86 ATT asm syntax (KS_OPT_SYNTAX). + KS_OPT_SYNTAX_NASM = 4 ' X86 Nasm syntax (KS_OPT_SYNTAX). + KS_OPT_SYNTAX_MASM = 8 ' X86 Masm syntax (KS_OPT_SYNTAX) - unsupported yet. + KS_OPT_SYNTAX_GAS = &H10 ' X86 GNU GAS syntax (KS_OPT_SYNTAX). +End Enum + +Public Enum KS_ERR_ASM + KS_ERR_ASM_INVALIDOPERAND = 512 'KS_ERR_ASM_ARCH + KS_ERR_ASM_MISSINGFEATURE + KS_ERR_ASM_MNEMONICFAIL +End Enum + +' Resolver callback to provide value for a missing symbol in @symbol. +' To handle a symbol, the resolver must put value of the symbol in @value, +' then returns True. +' If we do not resolve a missing symbol, this function must return False. +' In that case, ks_asm() would eventually return with error KS_ERR_ASM_SYMBOL_MISSING. +' +' To register the resolver, pass its function address to ks_option(), using +' option KS_OPT_SYM_RESOLVER. For example, see samples/sample.c. +'typedef bool (*ks_sym_resolver)(const char *symbol, uint64_t *value); +'public function vbSymResolver(byval symbol as long , byref value as currency) as long + +'void __stdcall setResolver(ks_engine *ks, unsigned int lpfnVBResolver){ +'Public Declare Function setResolver Lib "vbKeyStone.dll" (ByVal hEngine As Long, ByVal lpfnVBResolver As Long) As Long + + +'/* +' Return combined API version & major and minor version numbers. +' +' @major: major number of API version +' @minor: minor number of API version +' +' @return hexical number as (major << 8 | minor), which encodes both +' major & minor versions. +' NOTE: This returned value can be compared with version number made +' with macro KS_MAKE_VERSION +' +' For example, second API version would return 1 in @major, and 1 in @minor +' The return value would be 0x0101 +' +' NOTE: if you only care about returned value, but not major and minor values, +' set both @major & @minor arguments to NULL. +'*/ +'unsigned int ks_version(unsigned int *major, unsigned int *minor); +Public Declare Function ks_version Lib "vbKeyStone.dll" Alias "vs_version" (ByRef major As Long, ByRef minor As Long) As Long + +' +' +'/* +' Determine if the given architecture is supported by this library. +' +' @arch: architecture type (KS_ARCH_*) +' +' @return True if this library supports the given arch. +'*/ +'bool ks_arch_supported(ks_arch arch); +Public Declare Function ks_arch_supported Lib "vbKeyStone.dll" Alias "vs_arch_supported" (ByVal arch As ks_arch) As Long + +' +' +'/* +' Create new instance of Keystone engine. +' +' @arch: architecture type (KS_ARCH_*) +' @mode: hardware mode. This is combined of KS_MODE_* +' @ks: pointer to ks_engine, which will be updated at return time +' +' @return KS_ERR_OK on success, or other value on failure (refer to ks_err enum +' for detailed error). +'*/ +'ks_err ks_open(ks_arch arch, int mode, ks_engine **ks); +Public Declare Function ks_open Lib "vbKeyStone.dll" Alias "vs_open" (ByVal arch As ks_arch, ByVal mode As Long, ByRef hEngine As Long) As ks_err + + +' +'/* +' Close KS instance: MUST do to release the handle when it is not used anymore. +' NOTE: this must be called only when there is no longer usage of Keystone. +' The reason is the this API releases some cached memory, thus access to any +' Keystone API after ks_close() might crash your application. +' After this, @ks is invalid, and nolonger usable. +' +' @ks: pointer to a handle returned by ks_open() +' +' @return KS_ERR_OK on success, or other value on failure (refer to ks_err enum +' for detailed error). +'*/ +'ks_err ks_close(ks_engine *ks); +Public Declare Function ks_close Lib "vbKeyStone.dll" Alias "vs_close" (ByVal hEngine As Long) As ks_err + + +' +'/* +' Report the last error number when some API function fail. +' Like glibc's errno, ks_errno might not retain its old error once accessed. +' +' @ks: handle returned by ks_open() +' +' @return: error code of ks_err enum type (KS_ERR_*, see above) +'*/ +'ks_err ks_errno(ks_engine *ks); +Public Declare Function ks_errno Lib "vbKeyStone.dll" Alias "vs_errno" (ByVal hEngine As Long) As ks_err + + +' +'/* +' Return a string describing given error code. +' +' @code: error code (see KS_ERR_* above) +' +' @return: returns a pointer to a string that describes the error code +' passed in the argument @code +' */ +'const char *ks_strerror(ks_err code); +Public Declare Function ks_strerror Lib "vbKeyStone.dll" Alias "vs_strerror" (ByVal code As ks_err) As Long + + +' +'/* +' Set option for Keystone engine at runtime +' +' @ks: handle returned by ks_open() +' @type: type of option to be set +' @value: option value corresponding with @type +' +' @return: KS_ERR_OK on success, or other value on failure. +' Refer to ks_err enum for detailed error. +'*/ +'ks_err ks_option(ks_engine *ks, ks_opt_type type, size_t value); +Public Declare Function ks_option Lib "vbKeyStone.dll" Alias "vs_option" (ByVal hEngine As Long, ByVal opt As ks_opt_type, ByVal value As Long) As ks_err + + +'/* +' Assemble a string given its the buffer, size, start address and number +' of instructions to be decoded. +' This API dynamically allocate memory to contain assembled instruction. +' Resulted array of bytes containing the machine code is put into @*encoding +' +' NOTE 1: this API will automatically determine memory needed to contain +' output bytes in *encoding. +' +' NOTE 2: caller must free the allocated memory itself to avoid memory leaking. +' +' @ks: handle returned by ks_open() +' @str: NULL-terminated assembly string. Use ; or \n to separate statements. +' @address: address of the first assembly instruction, or 0 to ignore. +' @encoding: array of bytes containing encoding of input assembly string. +' NOTE: *encoding will be allocated by this function, and should be freed +' with ks_free() function. +' @encoding_size: size of *encoding +' @stat_count: number of statements successfully processed +' +' @return: 0 on success, or -1 on failure. +' +' On failure, call ks_errno() for error code. +'*/ + +'int ks_asm(ks_engine *ks, +' const char *string, +' uint64_t address, +' unsigned char **encoding, size_t *encoding_size, +' size_t *stat_count); + +Public Declare Function ks_asm Lib "vbKeyStone.dll" Alias "vs_asm" ( _ + ByVal hEngine As Long, _ + ByVal asm As String, _ + ByVal address As Currency, _ + ByRef bytesOut As Long, _ + ByRef encodedSize As Long, _ + ByRef linesAssembled As Long _ +) As ks_err + + + +'/* +' Free memory allocated by ks_asm() +' @p: memory allocated in @encoding argument of ks_asm() +'*/ +'void ks_free(unsigned char *p); +Public Declare Sub ks_free Lib "vbKeyStone.dll" Alias "vs_free" (ByVal buf As Long) + +Private Declare Function lstrcpy Lib "kernel32" Alias "lstrcpyA" (ByVal lpString1 As String, ByVal lpString2 As String) As Long +Private Declare Function lstrlen Lib "kernel32" Alias "lstrlenA" (ByVal lpString As Long) As Long + +Function cstr2vb(lpStr As Long) As String + + Dim length As Long + Dim buf() As Byte + + If lpStr = 0 Then Exit Function + + length = lstrlen(lpStr) + If length < 1 Then Exit Function + + ReDim buf(1 To length) + CopyMemory buf(1), ByVal lpStr, length + + cstr2vb = StrConv(buf, vbUnicode, &H409) + +End Function + +Function err2str(e As ks_err) As String + Dim lpStr As Long + lpStr = ks_strerror(e) + err2str = cstr2vb(lpStr) +End Function + +Function ks_arch2str(v As ks_arch) As String + Dim r As String + If v = KS_ARCH_ARM Then r = "KS_ARCH_ARM" + If v = KS_ARCH_ARM64 Then r = "KS_ARCH_ARM64" + If v = KS_ARCH_MIPS Then r = "KS_ARCH_MIPS" + If v = KS_ARCH_X86 Then r = "KS_ARCH_X86" + If v = KS_ARCH_PPC Then r = "KS_ARCH_PPC" + If v = KS_ARCH_SPARC Then r = "KS_ARCH_SPARC" + If v = KS_ARCH_SYSTEMZ Then r = "KS_ARCH_SYSTEMZ" + If v = KS_ARCH_HEXAGON Then r = "KS_ARCH_HEXAGON" + If v = KS_ARCH_MAX Then r = "KS_ARCH_MAX" + If Len(r) = 0 Then r = "Unknown: " & Hex(v) + ks_arch2str = r +End Function + +Function ks_opt_value2str(v As ks_opt_value) As String + Dim r As String + If v = KS_OPT_SYNTAX_INTEL Then r = "KS_OPT_SYNTAX_INTEL" + If v = KS_OPT_SYNTAX_ATT Then r = "KS_OPT_SYNTAX_ATT" + If v = KS_OPT_SYNTAX_NASM Then r = "KS_OPT_SYNTAX_NASM" + If v = KS_OPT_SYNTAX_MASM Then r = "KS_OPT_SYNTAX_MASM" + If v = KS_OPT_SYNTAX_GAS Then r = "KS_OPT_SYNTAX_GAS" + If Len(r) = 0 Then r = "Unknown: " & Hex(v) + ks_opt_value2str = r +End Function + +Private Function CheckPath(pth As String, Optional errMsg As String) As Long + + Dim hCap As Long, capPth As String, shimPth As String + + shimPth = pth & "\vbKeystone.dll" + capPth = pth & "\keystone.dll" + + If Not FileExists(shimPth) Then Exit Function + + hCap = LoadLibrary(capPth) + If hCap = 0 Then hCap = LoadLibrary("keystone.dll") + If hCap = 0 Then errMsg = "Could not find keystone.dll" + + CheckPath = LoadLibrary(shimPth) + 'If CheckPath = 0 Then MsgBox Err.LastDllError + +End Function + +Public Function initDll(Optional ByRef r As CAsmResult) As Boolean + + Dim errMsg As String + + hLib = GetModuleHandle("vbKeystone.dll") + + If hLib = 0 Then hLib = CheckPath(App.path & "\bin\", errMsg) + If hLib = 0 Then hLib = CheckPath(App.path & "\", errMsg) + If hLib = 0 Then hLib = CheckPath(App.path & "\..\", errMsg) + If hLib = 0 Then hLib = LoadLibrary("vbKeystone.dll") + + If hLib = 0 Then + If Not r Is Nothing Then r.errMsg = errMsg & " Could not load vbKeystone.dll" + Exit Function + End If + + ks_version vMajor, vMinor + version = vMajor & "." & vMinor + initDll = True + +End Function + +'untested +'Public Function vbSymResolver(ByVal symbol As Long, ByRef value As Currency) As Long +' +' Dim sym As String +' +' sym = cstr2vb(symbol) +' +' If sym = "_l1" Then +' value = lng2Cur(&H1002) +' vbSymResolver = 1 +' Else +' vbSymResolver = 0 +' End If +' +'End Function diff --git a/bindings/vb6/mMisc.bas b/bindings/vb6/mMisc.bas new file mode 100644 index 0000000..7aa8d4e --- /dev/null +++ b/bindings/vb6/mMisc.bas @@ -0,0 +1,241 @@ +Attribute VB_Name = "mMisc" +Option Explicit + +'These are old library functions + +'Author: David Zimmer , +'License: Apache +'Copyright: David Zimmer + + +Private Type Bit64Currency + value As Currency +End Type + +Private Type Bit64Integer + LowValue As Long + HighValue As Long +End Type + +Global Const LANG_US = &H409 + +Public Declare Function LoadLibrary Lib "kernel32" Alias "LoadLibraryA" (ByVal lpLibFileName As String) As Long +Public Declare Function FreeLibrary Lib "kernel32" (ByVal hLibModule As Long) As Long +Public Declare Sub CopyMemory Lib "kernel32" Alias "RtlMoveMemory" (Destination As Any, source As Any, ByVal length As Long) +Public Declare Function GetProcAddress Lib "kernel32" (ByVal hModule As Long, ByVal lpProcName As String) As Long +Public Declare Function GetModuleHandle Lib "kernel32" Alias "GetModuleHandleA" (ByVal lpModuleName As String) As Long +Public Declare Function SetDllDirectory Lib "kernel32" Alias "SetDllDirectoryA" (ByVal lpPathName As String) As Long + + +Function lng2Cur(v As Long) As Currency + Dim c As Bit64Currency + Dim dl As Bit64Integer + dl.LowValue = v + dl.HighValue = 0 + LSet c = dl + lng2Cur = c.value +End Function + +Function cur2str(v As Currency) As String + Dim c As Bit64Currency + Dim dl As Bit64Integer + c.value = v + LSet dl = c + If dl.HighValue = 0 Then + cur2str = Right("00000000" & Hex(dl.LowValue), 8) + Else + cur2str = Right("00000000" & Hex(dl.HighValue), 8) & "`" & Right("00000000" & Hex(dl.LowValue), 8) + End If +End Function + +Function cur2lng(v As Currency) As Long + Dim c As Bit64Currency + Dim dl As Bit64Integer + c.value = v + LSet dl = c + cur2lng = dl.LowValue +End Function + +Sub push(ary, value) 'this modifies parent ary object + On Error GoTo init + Dim x + + x = UBound(ary) + ReDim Preserve ary(x + 1) + + If IsObject(value) Then + Set ary(x + 1) = value + Else + ary(x + 1) = value + End If + + Exit Sub +init: + ReDim ary(0) + If IsObject(value) Then + Set ary(0) = value + Else + ary(0) = value + End If +End Sub + +Function HexDump(bAryOrStrData, Optional hexOnly = 0, Optional ByVal startAt As Long = 1, Optional ByVal length As Long = -1) As String + Dim s() As String, chars As String, tmp As String + On Error Resume Next + Dim ary() As Byte + Dim offset As Long + Const LANG_US = &H409 + Dim i As Long, tt, h, x + + offset = 0 + + If TypeName(bAryOrStrData) = "Byte()" Then + ary() = bAryOrStrData + Else + ary = StrConv(CStr(bAryOrStrData), vbFromUnicode, LANG_US) + End If + + If startAt < 1 Then startAt = 1 + If length < 1 Then length = -1 + + While startAt Mod 16 <> 0 + startAt = startAt - 1 + Wend + + startAt = startAt + 1 + + chars = " " + For i = startAt To UBound(ary) + 1 + tt = Hex(ary(i - 1)) + If Len(tt) = 1 Then tt = "0" & tt + tmp = tmp & tt & " " + x = ary(i - 1) + 'chars = chars & IIf((x > 32 And x < 127) Or x > 191, Chr(x), ".") 'x > 191 causes \x0 problems on non us systems... asc(chr(x)) = 0 + chars = chars & IIf((x > 32 And x < 127), Chr(x), ".") + If i > 1 And i Mod 16 = 0 Then + h = Hex(offset) + While Len(h) < 6: h = "0" & h: Wend + If hexOnly = 0 Then + push s, h & " " & tmp & chars + Else + push s, tmp + End If + offset = offset + 16 + tmp = Empty + chars = " " + End If + If length <> -1 Then + length = length - 1 + If length = 0 Then Exit For + End If + Next + + 'if read length was not mod 16=0 then + 'we have part of line to account for + If tmp <> Empty Then + If hexOnly = 0 Then + h = Hex(offset) + While Len(h) < 6: h = "0" & h: Wend + h = h & " " & tmp + While Len(h) <= 56: h = h & " ": Wend + push s, h & chars + Else + push s, tmp + End If + End If + + HexDump = Join(s, vbCrLf) + + If hexOnly <> 0 Then + HexDump = Replace(HexDump, " ", "") + HexDump = Replace(HexDump, vbCrLf, "") + End If + +End Function + + + +Function FileExists(path As String) As Boolean + On Error GoTo hell + + If Len(path) = 0 Then Exit Function + If Right(path, 1) = "\" Then Exit Function + If Dir(path, vbHidden Or vbNormal Or vbReadOnly Or vbSystem) <> "" Then FileExists = True + + Exit Function +hell: FileExists = False +End Function + +Sub WriteFile(path, it) + Dim f + f = FreeFile + Open path For Output As #f + Print #f, it + Close f +End Sub + +Function GetParentFolder(path) As String + Dim tmp() As String, ub As Long + On Error Resume Next + tmp = Split(path, "\") + ub = tmp(UBound(tmp)) + If Err.Number = 0 Then + GetParentFolder = Replace(Join(tmp, "\"), "\" & ub, "") + Else + GetParentFolder = path + End If +End Function + +Function b2Str(b() As Byte) As String + Dim i As Long + + If AryIsEmpty(b) Then + b2Str = "Empty" + Else + For i = 0 To UBound(b) + b2Str = b2Str & hhex(b(i)) & " " + Next + b2Str = Trim(b2Str) + End If + +End Function + +Function hhex(b) As String + hhex = Right("00" & Hex(b), 2) +End Function + +Function AryIsEmpty(ary) As Boolean + Dim i As Long + + On Error GoTo oops + i = UBound(ary) '<- throws error if not initalized + AryIsEmpty = False + Exit Function +oops: AryIsEmpty = True +End Function + + +Function GetAllElements(lv As ListView) As String + Dim ret() As String, i As Integer, tmp As String + Dim li As ListItem + + For i = 1 To lv.ColumnHeaders.count + tmp = tmp & lv.ColumnHeaders(i).Text & vbTab + Next + + push ret, tmp + push ret, String(50, "-") + + For Each li In lv.ListItems + tmp = li.Text & vbTab + For i = 1 To lv.ColumnHeaders.count - 1 + tmp = tmp & li.SubItems(i) & vbTab + Next + push ret, tmp + Next + + GetAllElements = Join(ret, vbCrLf) + +End Function + + diff --git a/bindings/vb6/make_lib.bat b/bindings/vb6/make_lib.bat new file mode 100644 index 0000000..9b40f00 --- /dev/null +++ b/bindings/vb6/make_lib.bat @@ -0,0 +1,2 @@ +call "C:\Program Files (x86)\Microsoft Visual Studio 11.0\VC\bin\vcvars32.bat" +lib /DEF:keystone.def /OUT:keystone.lib /MACHINE:X86 diff --git a/bindings/vb6/output.txt b/bindings/vb6/output.txt new file mode 100644 index 0000000..7b58745 --- /dev/null +++ b/bindings/vb6/output.txt @@ -0,0 +1,93 @@ + +vb sample output: + +arch asm bytes +-------------------------------------------------- +KS_ARCH_X86 add eax, ecx 66 01 C8 +KS_ARCH_X86 add eax, ecx 01 C8 +KS_ARCH_X86 add rax, rcx 48 01 C8 +KS_ARCH_X86 add %ecx, %eax 01 C8 +KS_ARCH_X86 add %rcx, %rax 48 01 C8 +KS_ARCH_ARM sub r1, r2, r5 05 10 42 E0 +KS_ARCH_ARM sub r1, r2, r5 E0 42 10 05 +KS_ARCH_ARM movs r4, #0xf0 F0 24 +KS_ARCH_ARM movs r4, #0xf0 24 F0 +KS_ARCH_ARM64 ldr w1, [sp, #0x8] E1 0B 40 B9 +KS_ARCH_HEXAGON v23.w=vavg(v11.w,v2.w):rnd D7 CB E2 1C +KS_ARCH_MIPS and $9, $6, $7 24 48 C7 00 +KS_ARCH_MIPS and $9, $6, $7 00 C7 48 24 +KS_ARCH_MIPS and $9, $6, $7 24 48 C7 00 +KS_ARCH_MIPS and $9, $6, $7 00 C7 48 24 +KS_ARCH_PPC add 1, 2, 3 7C 22 1A 14 +KS_ARCH_PPC add 1, 2, 3 14 1A 22 7C +KS_ARCH_PPC add 1, 2, 3 7C 22 1A 14 +KS_ARCH_SPARC add %g1, %g2, %g3 02 40 00 86 +KS_ARCH_SPARC add %g1, %g2, %g3 86 00 40 02 +KS_ARCH_SYSTEMZ a %r0, 4095(%r15,%r1) 5A 0F 1F FF + + +c_sample output: +---------------------------------------------------- + +add eax, ecx = 66 01 c8 +Assembled: 3 bytes, 1 statements + +add eax, ecx = 01 c8 +Assembled: 2 bytes, 1 statements + +add rax, rcx = 48 01 c8 +Assembled: 3 bytes, 1 statements + +add %ecx, %eax = 01 c8 +Assembled: 2 bytes, 1 statements + +add %rcx, %rax = 48 01 c8 +Assembled: 3 bytes, 1 statements + +sub r1, r2, r5 = 05 10 42 e0 +Assembled: 4 bytes, 1 statements + +sub r1, r2, r5 = e0 42 10 05 +Assembled: 4 bytes, 1 statements + +movs r4, #0xf0 = f0 24 +Assembled: 2 bytes, 1 statements + +movs r4, #0xf0 = 24 f0 +Assembled: 2 bytes, 1 statements + +ldr w1, [sp, #0x8] = e1 0b 40 b9 +Assembled: 4 bytes, 1 statements + +v23.w=vavg(v11.w,v2.w):rnd = d7 cb e2 1c +Assembled: 4 bytes, 1 statements + +and $9, $6, $7 = 24 48 c7 00 +Assembled: 4 bytes, 1 statements + +and $9, $6, $7 = 00 c7 48 24 +Assembled: 4 bytes, 1 statements + +and $9, $6, $7 = 24 48 c7 00 +Assembled: 4 bytes, 1 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keystone API +*/ + +#include +#include +#include + +#include +#pragma comment(lib, "keystone.lib") + +#define EXPORT comment(linker, "/EXPORT:"__FUNCTION__"="__FUNCDNAME__) + +/* - I will enable this once it makes it into the stable binary release...not tested yet.. +typedef bool (__stdcall *vb_sym_resolver)(const char *symbol, uint64_t *value); +vb_sym_resolver vbResolver = NULL; + +bool c_sym_resolver(const char *symbol, uint64_t *value){ + if((int)vbResolver == 0) return false; + return vbResolver(symbol, value); +} + +void __stdcall setResolver(ks_engine *ks, unsigned int lpfnVBResolver){ +#pragma EXPORT + vbResolver = (vb_sym_resolver)lpfnVBResolver; + ks_option(ks, KS_OPT_SYM_RESOLVER, (size_t)c_sym_resolver); +} +*/ + +unsigned int __stdcall vs_version(unsigned int *major, unsigned int *minor){ +#pragma EXPORT + return ks_version(major,minor); +} + +bool __stdcall vs_arch_supported(ks_arch arch){ +#pragma EXPORT + return ks_arch_supported(arch); +} + +ks_err __stdcall vs_open(ks_arch arch, int mode, ks_engine **ks){ +#pragma EXPORT + return ks_open(arch, mode,ks); +} + +ks_err __stdcall vs_close(ks_engine *ks){ +#pragma EXPORT + return ks_close(ks); +} + +ks_err __stdcall vs_errno(ks_engine *ks){ +#pragma EXPORT + return ks_errno(ks); +} +const char* __stdcall vs_strerror(ks_err code){ +#pragma EXPORT + return ks_strerror(code); +} + +ks_err __stdcall vs_option(ks_engine *ks, ks_opt_type type, size_t value){ +#pragma EXPORT + return ks_option(ks,type, value); +} + +int __stdcall vs_asm(ks_engine *ks, const char *string, uint64_t address, unsigned char **encoding, size_t *encoding_size, size_t *stat_count){ +#pragma EXPORT + return ks_asm(ks,string,address,encoding,encoding_size,stat_count); +} + +void __stdcall vs_free(unsigned char *p){ +#pragma EXPORT + return ks_free(p); +} diff --git a/bindings/vb6/vbKeystone.sln b/bindings/vb6/vbKeystone.sln new file mode 100644 index 0000000..65eb424 --- /dev/null +++ b/bindings/vb6/vbKeystone.sln @@ -0,0 +1,20 @@ + +Microsoft Visual Studio Solution File, Format Version 10.00 +# Visual Studio 2008 +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "vbKeystone", "vbKeystone.vcproj", "{B693CA7B-8B91-4413-AAED-14F1947F012A}" +EndProject +Global + GlobalSection(SolutionConfigurationPlatforms) = preSolution + Debug|Win32 = Debug|Win32 + Release|Win32 = Release|Win32 + EndGlobalSection + GlobalSection(ProjectConfigurationPlatforms) = postSolution + {B693CA7B-8B91-4413-AAED-14F1947F012A}.Debug|Win32.ActiveCfg = Debug|Win32 + {B693CA7B-8B91-4413-AAED-14F1947F012A}.Debug|Win32.Build.0 = Debug|Win32 + {B693CA7B-8B91-4413-AAED-14F1947F012A}.Release|Win32.ActiveCfg = Release|Win32 + {B693CA7B-8B91-4413-AAED-14F1947F012A}.Release|Win32.Build.0 = Release|Win32 + EndGlobalSection + GlobalSection(SolutionProperties) = preSolution + HideSolutionNode = FALSE + EndGlobalSection +EndGlobal diff --git a/bindings/vb6/vbKeystone.vcproj b/bindings/vb6/vbKeystone.vcproj new file mode 100644 index 0000000..d2cdc7c --- /dev/null +++ b/bindings/vb6/vbKeystone.vcproj @@ -0,0 +1,182 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/debian/changelog b/debian/changelog new file mode 100644 index 0000000..f6f48cb --- /dev/null +++ b/debian/changelog @@ -0,0 +1,22 @@ +keystone-engine (0.9.2-1) unstable; urgency=medium + + * Default radix set to 16 + * kstool accepts -b option to print out encoding binary to output + * Do not build Universal binaries for Mac + * Better installer for Linux + * Add Ethereum VM architecture + * Better support for older compiler + * Add Masm binding + * Rename namespace llvm to llvm_ks + * Better cross compile with Android NDK + * Add KS_VERSION_{MAJOR, MINOR, EXTRA} + * Add new option KS_OPT_SYM_RESOLVER + * Fix memory leaks in ks_asm() + + -- Michael Mohr Tue, 21 Jul 2020 21:16:03 -0700 + +keystone-engine (0.9.1-1) unstable; urgency=medium + + * Initial packaging. + + -- Michael Mohr Sun, 11 Mar 2018 22:31:26 -0700 diff --git a/debian/compat b/debian/compat new file mode 100644 index 0000000..ec63514 --- /dev/null +++ b/debian/compat @@ -0,0 +1 @@ +9 diff --git a/debian/control b/debian/control new file mode 100644 index 0000000..0964097 --- /dev/null +++ b/debian/control @@ -0,0 +1,24 @@ +Source: keystone-engine +Priority: optional +Maintainer: Michael Mohr +Build-Depends: debhelper (>= 9) +Standards-Version: 3.9.8 +Section: libs +Homepage: http://www.keystone-engine.org/ +Vcs-Git: https://github.com/keystone-engine/keystone.git +Vcs-Browser: https://github.com/keystone-engine/keystone + +Package: keystone-engine-dev +Section: libdevel +Architecture: any +Depends: keystone-engine1 (= ${binary:Version}), ${misc:Depends} +Description: A lightweight multi-architecture assembler framework. + Multi-architecture, with support for Arm, Arm64 (AArch64/Armv8), + Hexagon, Mips, PowerPC, Sparc, SystemZ, & X86 (include 16/32/64bit). + +Package: keystone-engine1 +Architecture: any +Depends: ${shlibs:Depends}, ${misc:Depends} +Description: A lightweight multi-architecture assembler framework. + Multi-architecture, with support for Arm, Arm64 (AArch64/Armv8), + Hexagon, Mips, PowerPC, Sparc, SystemZ, & X86 (include 16/32/64bit). diff --git a/debian/copyright b/debian/copyright new file mode 100644 index 0000000..5ee133b --- /dev/null +++ b/debian/copyright @@ -0,0 +1,28 @@ +Format: https://www.debian.org/doc/packaging-manuals/copyright-format/1.0/ +Upstream-Name: keystone-engine +Source: http://www.keystone-engine.org/ + +Files: * +Copyright: 2016-2018 Nguyen Anh Quynh +License: GPL-2.0+ + +Files: debian/* +Copyright: 2018 Michael Mohr +License: GPL-2.0+ + +License: GPL-2.0+ + This package is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + . + This package is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + . + You should have received a copy of the GNU General Public License + along with this program. If not, see + . + On Debian systems, the complete text of the GNU General + Public License version 2 can be found in "/usr/share/common-licenses/GPL-2". diff --git a/debian/keystone-engine-dev.dirs b/debian/keystone-engine-dev.dirs new file mode 100644 index 0000000..4418816 --- /dev/null +++ b/debian/keystone-engine-dev.dirs @@ -0,0 +1,2 @@ +usr/lib +usr/include diff --git a/debian/keystone-engine-dev.install b/debian/keystone-engine-dev.install new file mode 100644 index 0000000..41c1529 --- /dev/null +++ b/debian/keystone-engine-dev.install @@ -0,0 +1,3 @@ +usr/include/keystone/*.h +usr/lib/*/libkeystone.so +usr/lib/*/pkgconfig/keystone.pc diff --git a/debian/keystone-engine-docs.docs b/debian/keystone-engine-docs.docs new file mode 100644 index 0000000..83aacb5 --- /dev/null +++ b/debian/keystone-engine-docs.docs @@ -0,0 +1,8 @@ +AUTHORS.TXT +ChangeLog +CMakeLists.txt +CREDITS.TXT +LICENSE-COM.TXT +README.md +RELEASE_NOTES +SPONSORS.TXT diff --git a/debian/keystone-engine1.dirs b/debian/keystone-engine1.dirs new file mode 100644 index 0000000..14f5b95 --- /dev/null +++ b/debian/keystone-engine1.dirs @@ -0,0 +1,2 @@ +usr/lib +usr/bin diff --git a/debian/keystone-engine1.install b/debian/keystone-engine1.install new file mode 100644 index 0000000..c48de5f --- /dev/null +++ b/debian/keystone-engine1.install @@ -0,0 +1,2 @@ +usr/lib/*/libkeystone.so.* +usr/bin/kstool diff --git a/debian/rules b/debian/rules new file mode 100644 index 0000000..97588d7 --- /dev/null +++ b/debian/rules @@ -0,0 +1,27 @@ +#!/usr/bin/make -f +# See debhelper(7) (uncomment to enable) +# output every command that modifies files on the build system. +#export DH_VERBOSE = 1 + + +# see FEATURE AREAS in dpkg-buildflags(1) +#export DEB_BUILD_MAINT_OPTIONS = hardening=+all + +# see ENVIRONMENT in dpkg-buildflags(1) +# package maintainers to append CFLAGS +#export DEB_CFLAGS_MAINT_APPEND = -Wall -pedantic +# package maintainers to append LDFLAGS +#export DEB_LDFLAGS_MAINT_APPEND = -Wl,--as-needed + + +%: + dh $@ --parallel + + +# dh_make generated override targets +# This is example for Cmake (See https://bugs.debian.org/641051 ) +#override_dh_auto_configure: +# dh_auto_configure -- # -DCMAKE_LIBRARY_PATH=$(DEB_HOST_MULTIARCH) + +override_dh_auto_configure: + dh_auto_configure -- -DBUILD_SHARED_LIBS=ON -DLLVM_TARGETS_TO_BUILD="all" diff --git a/debian/source/format b/debian/source/format new file mode 100644 index 0000000..163aaf8 --- /dev/null +++ b/debian/source/format @@ -0,0 +1 @@ +3.0 (quilt) diff --git a/docs/COMPILE-NIX.md b/docs/COMPILE-NIX.md new file mode 100644 index 0000000..182bb9f --- /dev/null +++ b/docs/COMPILE-NIX.md @@ -0,0 +1,102 @@ +This documentation explains how to build & install Keystone on all kind of nix OS. +For Windows, see [COMPILE-WINDOWS.md](COMPILE-WINDOWS.md) + + +1. Dependency + + CMake is required to build keystone. + + - On Mac OS X, you can install "cmake" with "brew". + + $ brew install cmake + + - On Ubuntu Linux, install "cmake" with: + + $ sudo apt-get install cmake + + +2. From the root directory of Keystone source, compile its dynamic library + with the following commands. + + $ mkdir build + $ cd build + $ ../make-share.sh + + In the case you want to compile with all the debug information, replace the + last line with: + + $ ../make-share.sh debug + + For Linux distributions following the "Filesystem Hierarchy Standard" and + put x64 libraries under $PREFIX/lib64, such as Fedora, Redhat & Suse, + add "lib64" option at the end of make-share.sh script, like below. + + $ ../make-share.sh lib64 + + By default, this builds all architectures, which is: AArch64, ARM, Hexagon, + Mips, PowerPC, Sparc, SystemZ & X86. To compile just some selected ones, + pass a semicolon-separated list of targets to LLVM_TARGETS_TO_BUILD, + like follows if we only want AArch64 & X86. + + $ cmake -DCMAKE_BUILD_TYPE=Release -DBUILD_SHARED_LIBS=ON -DLLVM_TARGETS_TO_BUILD="AArch64;X86" -G "Unix Makefiles" .. + $ make -j8 + + You can also compile static a library with: + + $ mkdir build + $ cd build + $ ../make-lib.sh + + In the case you want to compile with all the debug information, replace the + last line with: + + $ ../make-lib.sh debug + + For Linux distributions following the "Filesystem Hierarchy Standard" and + put x64 libraries under $PREFIX/lib64, such as Fedora, Redhat & Suse, + add "lib64" option at the end of make-share.sh script, like below. + + $ ../make-lib.sh lib64 + + Like above, this builds all architectures. To compile just some selected ones, + pass a semicolon-separated list of targets to LLVM_TARGETS_TO_BUILD, + like follows if we only want AArch64 & X86. + + $ cmake -DCMAKE_BUILD_TYPE=Release -DBUILD_SHARED_LIBS=OFF -DLLVM_TARGETS_TO_BUILD="AArch64, X86" -G "Unix Makefiles" .. + $ make -j8 + + To customize your build by specifying PREFIX or other installation directories, + pass one of the variables at https://cmake.org/cmake/help/v3.0/module/GNUInstallDirs.html + to cmake. For example: + + $ cmake -DCMAKE_INSTALL_PREFIX=/usr -DCMAKE_BUILD_TYPE=Release -DBUILD_SHARED_LIBS=OFF -DLLVM_TARGETS_TO_BUILD="AArch64, X86" -G "Unix Makefiles" .. + $ make -j8 + + +3. Right after building, install Keystone. + + $ sudo make install + + Keystone is installed in `/usr/local`, depending on your distribution (eg. Ubuntu) you might + need to add `/usr/local/lib` to `/etc/ld.so.conf`. Then update the dynamic linker + with: + + $ sudo ldconfig + + Besides the libraries & C header files under directory "include/keystone", + this step also installs a tool named "kstool" on the system. + (The source of "kstool" is in the directory "kstool/kstool") + + +4. Test Keystone with "kstool" like below. + + $ kstool x32 "add eax, ebx" + + Run "kstool" without any option to find out how to use this handy tool. + + +5. Learn more on how to code your own tools with our samples. + + For C sample code, see code in directory samples/ + + For Python sample code, see code in directory bindings/python/ diff --git a/docs/COMPILE-WINDOWS-CROSS.md b/docs/COMPILE-WINDOWS-CROSS.md new file mode 100644 index 0000000..0678f7e --- /dev/null +++ b/docs/COMPILE-WINDOWS-CROSS.md @@ -0,0 +1,60 @@ +This documentation explains how to use the Keystone project as a library in a cross compiled project. It assumes the use of Mingw GCC suite for compilation. + +Cross-compiling for Windows from Linux + +0. Dependency + +To be able to cross-compile from Linux to Windows, you will need the Windows libraries found on the download page of Keystone engine. After download, decompress them and place them in you project path. + + +1. Dynamic Libraries + +To use the dynamic libraries of Keystone, just use the following in your GCC command line : + + -I .//keystone-0.9.1-winXX/include/ for the include part + -L .//keystone-0.9.1-winXX/ -lkeystone for the linking part + +where XX is 32 or 64. + +To be able to use you compiled application on Windows, ship then the keystone.dll file with your application. + + +2. Static Libraries + +To avoid shipping the dll file with your project, you may want to use the Keystone static libraries instead. + +2.1. 32 bits architecture + +There, you would use the following on your GCC command line : + + -I .//keystone-0.9.1-win32/include/ for the include part + .//keystone-0.9.1-winXX/keystone.lib for the linking part + +Your Mingw compiler should be able to understand the .lib file directly (not tested for now). + +2.2. 64 bits architecture + +Using the 64 bits version of keystone.lib is not recognized by the Mingw compiler. There is so a need in transforming the keystone.lib file into a keystone.a file. + +2.2.1. Dependency + +gendef and dlltool are required to translate the lib file. + + - On Ubuntu Linux (debian based), install "gendef" with: + + $ sudo apt-get install mingw-w64-tools + + - dlltool is normally shipped with your installation of the Mingw compiler (on a 64 bits ubuntu, you will find it as x86_64-w64-mingw32-dlltool). If you don't have it, you can install it : + + $ sudo apt-get install mingw-w64 + +2.2.2. In the keystone-0.9.1-win64 directory, enter the following commands : + + $ gendef keystone.dll + $ x86_64-w64-mingw32-dlltool --as-flags=--64 -m i386:x86-64 -k --output-lib libkeystone.a --input-def keystone.def + + +2.2.3. You now have a standard .a file that can be used in you command to compile by using : + + -I .//keystone-0.9.1-win32/include/ for the include part + .//keystone-0.9.1-winXX/keystone.a for the linking part diff --git a/docs/COMPILE-WINDOWS.md b/docs/COMPILE-WINDOWS.md new file mode 100644 index 0000000..b8ecac3 --- /dev/null +++ b/docs/COMPILE-WINDOWS.md @@ -0,0 +1,64 @@ +This documentation explains how to build Keystone on Windows. +For *nix OS, see [COMPILE-NIX.md](COMPILE-NIX.md) + + +1. Dependency + + CMake is required as dependency. + Download & install cmake from http://www.cmake.org + + Microsoft Visual Studio 2013 or older is required for compiling. + Download & install it from https://www.visualstudio.com + + Python is another dependency. Download & install it from + https://www.python.org + + +2. Open the Visual Studio Command Prompt, and from the root directory + of Keystone source, do: + + $ mkdir build + $ cd build + + To build DLL file, run: + + $ ..\nmake-dll.bat + + By default, this builds all architectures, which is: AArch64, ARM, Hexagon, + Mips, PowerPC, Sparc, SystemZ & X86. To compile just some selected ones, + pass a semicolon-separated list of targets to LLVM_TARGETS_TO_BUILD, + like follows if we only want AArch64 & X86. + + $ cmake -DCMAKE_BUILD_TYPE=Release -DBUILD_SHARED_LIBS=ON -DLLVM_TARGETS_TO_BUILD="AArch64;X86" -G "NMake Makefiles" .. + $ nmake + + To build LIB file, run: + + $ ..\nmake-lib.bat + + Like above, this builds all architectures. To compile just some selected ones, + pass a semicolon-separated list of targets to LLVM_TARGETS_TO_BUILD, + like follows if we only want AArch64 & X86. + + $ cmake -DCMAKE_BUILD_TYPE=Release -DBUILD_SHARED_LIBS=OFF -DLLVM_TARGETS_TO_BUILD="AArch64, X86" -G "NMake Makefiles" .. + $ nmake + + Find the generated libraries in build\llvm\lib\keystone.{dll,lib} + + In the case you build LIB file, a tool named "kstool.exe" is also + compiled & available under directory "build\kstool". + (Find source of "kstool" in directory "kstool/kstool") + + +3. Test Keystone with "kstool" like below. + + $ kstool.exe x32 "add eax, ebx" + + Run "kstool.exe" without any option to find out how to use this handy tool. + + +4. Learn more on how to code your own tools with our samples. + + For C sample code, see code in directory samples/ + + For Python sample code, see code in directory bindings/python/ diff --git a/docs/COMPILE.md b/docs/COMPILE.md new file mode 100644 index 0000000..76d486d --- /dev/null +++ b/docs/COMPILE.md @@ -0,0 +1,16 @@ +To compile Keystone on Mac OS X, Linux, BSD, Solaris and all kind of nix OS, +see [COMPILE-NIX.md](COMPILE-NIX.md) + +To compile Keystone on Windows, see [COMPILE-WINDOWS.md](COMPILE-WINDOWS.md) + +To cross-compiling for Windows from Linux, see [COMPILE-WINDOWS-CROSS.md](COMPILE-WINDOWS-CROSS.md) + +Alternatively, you can build and install Keystone using [vcpkg](https://github.com/Microsoft/vcpkg/) dependency manager with a single command: + - vcpkg install keystone + +VCPGK supports to build Keystone on Windows, Linux and Macos, the Keystone port in vcpkg is kept up to date by Microsoft team members and community contributors. + +Learn more on how to code your own tools with our samples. + + - For C sample code, see code in directory samples/ + - For Python sample code, see code in directory bindings/python/ diff --git a/docs/README.md b/docs/README.md new file mode 100644 index 0000000..09bbd5e --- /dev/null +++ b/docs/README.md @@ -0,0 +1,17 @@ +Documention of Keystone assembler engine. + +* How to compile & install Keystone from source. + + [COMPILE.md](COMPILE.md) + +* How to compile & install Keystone from packages. + + http://keystone-engine.org/docs/ + +* Tutorial on programming with C & Python languages. + + http://keystone-engine.org/docs/tutorial.html + +* Compare Keystone & LLVM. + + http://keystone-engine.org/docs/beyond_llvm.html diff --git a/docs/RECON2016-keystone.pdf b/docs/RECON2016-keystone.pdf new file mode 100644 index 0000000000000000000000000000000000000000..d5871c3c18bddedfa83edad0cbca3c42d0a2845b GIT binary patch literal 1424514 zcmeEubyQqWwl41O8mu9>yE`-zTtaXQ?i$?Po!}BQxCIFWCs;@zI5h47La<=(Kz=i8 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zn?&LHu3?J$Hz{L{!t>nB#S&wsE3|P=fQ< z)q~48%sJ!l#U&vJNa+!eFyrFvB?=k?&3_)UWN~eQ5 z#w5c(Q(nGOBo?AqjQfrUXVtk+UCj z-lT-Zcl=Osk{vX$B|qv3Xm*O_zr{G48IUFa-w*25ger}=mCahy+Qpc?D7C!~+TCJ> zNF3BJ(*f9e3wsxa60RUu<3_Y- zAn!dscE6$mA??sE>RTSDxjhlEfJJ*D?FRNDpv!SUhI_^72G=X-%Ao^Mo9MIl>891So>NK604>**1r(8_PUde~k<(SGO4hfB zyvTzn+wU^+TX&W&loV<{ck;sbRNs5n!uQm^=Y+z{DkmN)e};+()6Z>%x^dY8z6_>j z=j47Om#Z8zv1APICPXi!{^D3-+SCknP+aAPPm(&WA$+3pCTN8~Tdx q{r`SA-S9dX>lXj_>EF>w-@(bv;b*?5XJTMrXJ&>XCKi?zf%+flAQ(~r literal 0 HcmV?d00001 diff --git a/docs/beyond_llvm.md b/docs/beyond_llvm.md new file mode 100644 index 0000000..27a88cc --- /dev/null +++ b/docs/beyond_llvm.md @@ -0,0 +1,19 @@ +## Keystone & LLVM + +Keystone engine is based on the [MC component](http://blog.llvm.org/2010/04/intro-to-llvm-mc-project.html) of the LLVM compiler infrastructure, which among many stuffs has an assembler engine inside. LLVM even has a tool named *llvm-mc* that can be used to compile input string of assembly instructions. + +While Keystone reuses a part of LLVM as its core (with quite a few of changes to adapt to our design), there is a major difference between them. Notably, Keystone can do whatever LLVM does in term of assembling, but beyond that our engine can do more & do better in some aspects. + +The section below highlights the areas where Keystone shines. + +- **Framework**: *llvm-mc* is a tool, but not a framework. Therefore, it is very tricky to build your own assembler tools on of LLVM, while this is the main purpose of Keystone. Keystone's API makes it easy to handle errors, report internal status of its core or change compilation mode at runtime, etc. + +- **Lightweight**: Keystone is much more lightweight than LLVM because we stripped all the subsystems that do not involve in assembler. As a result, Keystone is more than 10 times smaller in size and in memory consumption. Initial verson of Keystone takes only 30 seconds to compile on a laptop, while LLVM needs 15 minutes to build. + +- **Flexibility**: LLVM's assembler is much more restricted. For example, it only accepts assembly in LLVM syntax. On the contrary, Keystone is going to support all kind of input, ranging from Nasm, Masm, etc. + +- **Capability**: LLVM is for compiling & linking, so (understandably) some of its technical choices are not inline with an independent assembler like Keystone. For example, LLVM always put code and data in separate sections. However, it is very common for assembly to mix code and data in the same section (think about shellcode). Keystone is made to handle this kind of input very well. + +- **Binding**: As a framework, Keystone supports multiple bindings on top of the core, starting with Python (more bindings will be added later). This makes it easy to be adopted by developers. + +With all that said, LLVM is an awesome project, which Keystone was born from. However, Keystone is not just LLVM, but offering more because it has been designed & implemented to be an independent framework. diff --git a/include/keystone/arm.h b/include/keystone/arm.h new file mode 100644 index 0000000..f4d2489 --- /dev/null +++ b/include/keystone/arm.h @@ -0,0 +1,23 @@ +/* Keystone Assembler Engine */ +/* By Nguyen Anh Quynh, 2016 */ + +#ifndef KEYSTONE_ARM_H +#define KEYSTONE_ARM_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "keystone.h" + +typedef enum ks_err_asm_arm { + KS_ERR_ASM_ARM_INVALIDOPERAND = KS_ERR_ASM_ARCH, + KS_ERR_ASM_ARM_MISSINGFEATURE, + KS_ERR_ASM_ARM_MNEMONICFAIL, +} ks_err_asm_arm; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/include/keystone/arm64.h b/include/keystone/arm64.h new file mode 100644 index 0000000..7a7af41 --- /dev/null +++ b/include/keystone/arm64.h @@ -0,0 +1,23 @@ +/* Keystone Assembler Engine */ +/* By Nguyen Anh Quynh, 2016 */ + +#ifndef KEYSTONE_ARM64_H +#define KEYSTONE_ARM64_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "keystone.h" + +typedef enum ks_err_asm_arm64 { + KS_ERR_ASM_ARM64_INVALIDOPERAND = KS_ERR_ASM_ARCH, + KS_ERR_ASM_ARM64_MISSINGFEATURE, + KS_ERR_ASM_ARM64_MNEMONICFAIL, +} ks_err_asm_arm64; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/include/keystone/evm.h b/include/keystone/evm.h new file mode 100644 index 0000000..60ac408 --- /dev/null +++ b/include/keystone/evm.h @@ -0,0 +1,23 @@ +/* Keystone Assembler Engine */ +/* By Nguyen Anh Quynh, 2016-2018 */ + +#ifndef KEYSTONE_EVM_H +#define KEYSTONE_EVM_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "keystone.h" + +typedef enum ks_err_asm_evm { + KS_ERR_ASM_EVM_INVALIDOPERAND = KS_ERR_ASM_ARCH, + KS_ERR_ASM_EVM_MISSINGFEATURE, + KS_ERR_ASM_EVM_MNEMONICFAIL, +} ks_err_asm_evm; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/include/keystone/hexagon.h b/include/keystone/hexagon.h new file mode 100644 index 0000000..e615812 --- /dev/null +++ b/include/keystone/hexagon.h @@ -0,0 +1,24 @@ +/* Keystone Assembler Engine */ +/* By Nguyen Anh Quynh, 2016 */ + +#ifndef KEYSTONE_HEXAGON_H +#define KEYSTONE_HEXAGON_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "keystone.h" + +typedef enum ks_err_asm_hexagon { + KS_ERR_ASM_HEXAGON_INVALIDOPERAND = KS_ERR_ASM_ARCH, + KS_ERR_ASM_HEXAGON_MISSINGFEATURE, + KS_ERR_ASM_HEXAGON_MNEMONICFAIL, +} ks_err_asm_hexagon; + + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/include/keystone/keystone.h b/include/keystone/keystone.h new file mode 100644 index 0000000..e29235e --- /dev/null +++ b/include/keystone/keystone.h @@ -0,0 +1,341 @@ +/* Keystone Assembler Engine (www.keystone-engine.org) */ +/* By Nguyen Anh Quynh , 2016 */ + +#ifndef KEYSTONE_ENGINE_H +#define KEYSTONE_ENGINE_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include +#include + +#ifdef _MSC_VER // MSVC compiler +#pragma warning(disable:4201) +#pragma warning(disable:4100) +#ifndef KEYSTONE_STATIC +#define KEYSTONE_EXPORT __declspec(dllexport) +#else +#define KEYSTONE_EXPORT +#endif +#else +#ifdef __GNUC__ +#include +#ifndef KEYSTONE_STATIC +#define KEYSTONE_EXPORT __attribute__((visibility("default"))) +#else +#define KEYSTONE_EXPORT +#endif +#else +#define KEYSTONE_EXPORT +#endif +#endif + + +struct ks_struct; +typedef struct ks_struct ks_engine; + +// Keystone API version +#define KS_API_MAJOR 0 +#define KS_API_MINOR 9 + +// Package version +#define KS_VERSION_MAJOR KS_API_MAJOR +#define KS_VERSION_MINOR KS_API_MINOR +#define KS_VERSION_EXTRA 2 + +/* + Macro to create combined version which can be compared to + result of ks_version() API. +*/ +#define KS_MAKE_VERSION(major, minor) ((major << 8) + minor) + +// Architecture type +typedef enum ks_arch { + KS_ARCH_ARM = 1, // ARM architecture (including Thumb, Thumb-2) + KS_ARCH_ARM64, // ARM-64, also called AArch64 + KS_ARCH_MIPS, // Mips architecture + KS_ARCH_X86, // X86 architecture (including x86 & x86-64) + KS_ARCH_PPC, // PowerPC architecture (currently unsupported) + KS_ARCH_SPARC, // Sparc architecture + KS_ARCH_SYSTEMZ, // SystemZ architecture (S390X) + KS_ARCH_HEXAGON, // Hexagon architecture + KS_ARCH_EVM, // Ethereum Virtual Machine architecture + KS_ARCH_MAX, +} ks_arch; + +// Mode type +typedef enum ks_mode { + KS_MODE_LITTLE_ENDIAN = 0, // little-endian mode (default mode) + KS_MODE_BIG_ENDIAN = 1 << 30, // big-endian mode + // arm / arm64 + KS_MODE_ARM = 1 << 0, // ARM mode + KS_MODE_THUMB = 1 << 4, // THUMB mode (including Thumb-2) + KS_MODE_V8 = 1 << 6, // ARMv8 A32 encodings for ARM + // mips + KS_MODE_MICRO = 1 << 4, // MicroMips mode + KS_MODE_MIPS3 = 1 << 5, // Mips III ISA + KS_MODE_MIPS32R6 = 1 << 6, // Mips32r6 ISA + KS_MODE_MIPS32 = 1 << 2, // Mips32 ISA + KS_MODE_MIPS64 = 1 << 3, // Mips64 ISA + // x86 / x64 + KS_MODE_16 = 1 << 1, // 16-bit mode + KS_MODE_32 = 1 << 2, // 32-bit mode + KS_MODE_64 = 1 << 3, // 64-bit mode + // ppc + KS_MODE_PPC32 = 1 << 2, // 32-bit mode + KS_MODE_PPC64 = 1 << 3, // 64-bit mode + KS_MODE_QPX = 1 << 4, // Quad Processing eXtensions mode + // sparc + KS_MODE_SPARC32 = 1 << 2, // 32-bit mode + KS_MODE_SPARC64 = 1 << 3, // 64-bit mode + KS_MODE_V9 = 1 << 4, // SparcV9 mode +} ks_mode; + +// All generic errors related to input assembly >= KS_ERR_ASM +#define KS_ERR_ASM 128 + +// All architecture-specific errors related to input assembly >= KS_ERR_ASM_ARCH +#define KS_ERR_ASM_ARCH 512 + +// All type of errors encountered by Keystone API. +typedef enum ks_err { + KS_ERR_OK = 0, // No error: everything was fine + KS_ERR_NOMEM, // Out-Of-Memory error: ks_open(), ks_emulate() + KS_ERR_ARCH, // Unsupported architecture: ks_open() + KS_ERR_HANDLE, // Invalid handle + KS_ERR_MODE, // Invalid/unsupported mode: ks_open() + KS_ERR_VERSION, // Unsupported version (bindings) + KS_ERR_OPT_INVALID, // Unsupported option + + // generic input assembly errors - parser specific + KS_ERR_ASM_EXPR_TOKEN = KS_ERR_ASM, // unknown token in expression + KS_ERR_ASM_DIRECTIVE_VALUE_RANGE, // literal value out of range for directive + KS_ERR_ASM_DIRECTIVE_ID, // expected identifier in directive + KS_ERR_ASM_DIRECTIVE_TOKEN, // unexpected token in directive + KS_ERR_ASM_DIRECTIVE_STR, // expected string in directive + KS_ERR_ASM_DIRECTIVE_COMMA, // expected comma in directive + KS_ERR_ASM_DIRECTIVE_RELOC_NAME, // expected relocation name in directive + KS_ERR_ASM_DIRECTIVE_RELOC_TOKEN, // unexpected token in .reloc directive + KS_ERR_ASM_DIRECTIVE_FPOINT, // invalid floating point in directive + KS_ERR_ASM_DIRECTIVE_UNKNOWN, // unknown directive + KS_ERR_ASM_DIRECTIVE_EQU, // invalid equal directive + KS_ERR_ASM_DIRECTIVE_INVALID, // (generic) invalid directive + KS_ERR_ASM_VARIANT_INVALID, // invalid variant + KS_ERR_ASM_EXPR_BRACKET, // brackets expression not supported on this target + KS_ERR_ASM_SYMBOL_MODIFIER, // unexpected symbol modifier following '@' + KS_ERR_ASM_SYMBOL_REDEFINED, // invalid symbol redefinition + KS_ERR_ASM_SYMBOL_MISSING, // cannot find a symbol + KS_ERR_ASM_RPAREN, // expected ')' in parentheses expression + KS_ERR_ASM_STAT_TOKEN, // unexpected token at start of statement + KS_ERR_ASM_UNSUPPORTED, // unsupported token yet + KS_ERR_ASM_MACRO_TOKEN, // unexpected token in macro instantiation + KS_ERR_ASM_MACRO_PAREN, // unbalanced parentheses in macro argument + KS_ERR_ASM_MACRO_EQU, // expected '=' after formal parameter identifier + KS_ERR_ASM_MACRO_ARGS, // too many positional arguments + KS_ERR_ASM_MACRO_LEVELS_EXCEED, // macros cannot be nested more than 20 levels deep + KS_ERR_ASM_MACRO_STR, // invalid macro string + KS_ERR_ASM_MACRO_INVALID, // invalid macro (generic error) + KS_ERR_ASM_ESC_BACKSLASH, // unexpected backslash at end of escaped string + KS_ERR_ASM_ESC_OCTAL, // invalid octal escape sequence (out of range) + KS_ERR_ASM_ESC_SEQUENCE, // invalid escape sequence (unrecognized character) + KS_ERR_ASM_ESC_STR, // broken escape string + KS_ERR_ASM_TOKEN_INVALID, // invalid token + KS_ERR_ASM_INSN_UNSUPPORTED, // this instruction is unsupported in this mode + KS_ERR_ASM_FIXUP_INVALID, // invalid fixup + KS_ERR_ASM_LABEL_INVALID, // invalid label + KS_ERR_ASM_FRAGMENT_INVALID, // invalid fragment + + // generic input assembly errors - architecture specific + KS_ERR_ASM_INVALIDOPERAND = KS_ERR_ASM_ARCH, + KS_ERR_ASM_MISSINGFEATURE, + KS_ERR_ASM_MNEMONICFAIL, +} ks_err; + +// Resolver callback to provide value for a missing symbol in @symbol. +// To handle a symbol, the resolver must put value of the symbol in @value, +// then returns True. +// If we do not resolve a missing symbol, this function must return False. +// In that case, ks_asm() would eventually return with error KS_ERR_ASM_SYMBOL_MISSING. + +// To register the resolver, pass its function address to ks_option(), using +// option KS_OPT_SYM_RESOLVER. For example, see samples/sample.c. +typedef bool (*ks_sym_resolver)(const char *symbol, uint64_t *value); + +// Runtime option for the Keystone engine +typedef enum ks_opt_type { + KS_OPT_SYNTAX = 1, // Choose syntax for input assembly + KS_OPT_SYM_RESOLVER, // Set symbol resolver callback +} ks_opt_type; + + +// Runtime option value (associated with ks_opt_type above) +typedef enum ks_opt_value { + KS_OPT_SYNTAX_INTEL = 1 << 0, // X86 Intel syntax - default on X86 (KS_OPT_SYNTAX). + KS_OPT_SYNTAX_ATT = 1 << 1, // X86 ATT asm syntax (KS_OPT_SYNTAX). + KS_OPT_SYNTAX_NASM = 1 << 2, // X86 Nasm syntax (KS_OPT_SYNTAX). + KS_OPT_SYNTAX_MASM = 1 << 3, // X86 Masm syntax (KS_OPT_SYNTAX) - unsupported yet. + KS_OPT_SYNTAX_GAS = 1 << 4, // X86 GNU GAS syntax (KS_OPT_SYNTAX). + KS_OPT_SYNTAX_RADIX16 = 1 << 5, // All immediates are in hex format (i.e 12 is 0x12) +} ks_opt_value; + + +#include "arm64.h" +#include "arm.h" +#include "evm.h" +#include "hexagon.h" +#include "mips.h" +#include "ppc.h" +#include "sparc.h" +#include "systemz.h" +#include "x86.h" + +/* + Return combined API version & major and minor version numbers. + + @major: major number of API version + @minor: minor number of API version + + @return hexical number as (major << 8 | minor), which encodes both + major & minor versions. + NOTE: This returned value can be compared with version number made + with macro KS_MAKE_VERSION + + For example, second API version would return 1 in @major, and 1 in @minor + The return value would be 0x0101 + + NOTE: if you only care about returned value, but not major and minor values, + set both @major & @minor arguments to NULL. +*/ +KEYSTONE_EXPORT +unsigned int ks_version(unsigned int *major, unsigned int *minor); + + +/* + Determine if the given architecture is supported by this library. + + @arch: architecture type (KS_ARCH_*) + + @return True if this library supports the given arch. +*/ +KEYSTONE_EXPORT +bool ks_arch_supported(ks_arch arch); + + +/* + Create new instance of Keystone engine. + + @arch: architecture type (KS_ARCH_*) + @mode: hardware mode. This is combined of KS_MODE_* + @ks: pointer to ks_engine, which will be updated at return time + + @return KS_ERR_OK on success, or other value on failure (refer to ks_err enum + for detailed error). +*/ +KEYSTONE_EXPORT +ks_err ks_open(ks_arch arch, int mode, ks_engine **ks); + + +/* + Close KS instance: MUST do to release the handle when it is not used anymore. + NOTE: this must be called only when there is no longer usage of Keystone. + The reason is the this API releases some cached memory, thus access to any + Keystone API after ks_close() might crash your application. + After this, @ks is invalid, and nolonger usable. + + @ks: pointer to a handle returned by ks_open() + + @return KS_ERR_OK on success, or other value on failure (refer to ks_err enum + for detailed error). +*/ +KEYSTONE_EXPORT +ks_err ks_close(ks_engine *ks); + + +/* + Report the last error number when some API function fail. + Like glibc's errno, ks_errno might not retain its old error once accessed. + + @ks: handle returned by ks_open() + + @return: error code of ks_err enum type (KS_ERR_*, see above) +*/ +KEYSTONE_EXPORT +ks_err ks_errno(ks_engine *ks); + + +/* + Return a string describing given error code. + + @code: error code (see KS_ERR_* above) + + @return: returns a pointer to a string that describes the error code + passed in the argument @code + */ +KEYSTONE_EXPORT +const char *ks_strerror(ks_err code); + + +/* + Set option for Keystone engine at runtime + + @ks: handle returned by ks_open() + @type: type of option to be set. See ks_opt_type + @value: option value corresponding with @type + + @return: KS_ERR_OK on success, or other value on failure. + Refer to ks_err enum for detailed error. +*/ +KEYSTONE_EXPORT +ks_err ks_option(ks_engine *ks, ks_opt_type type, size_t value); + + +/* + Assemble a string given its the buffer, size, start address and number + of instructions to be decoded. + This API dynamically allocate memory to contain assembled instruction. + Resulted array of bytes containing the machine code is put into @*encoding + + NOTE 1: this API will automatically determine memory needed to contain + output bytes in *encoding. + + NOTE 2: caller must free the allocated memory itself to avoid memory leaking. + + @ks: handle returned by ks_open() + @str: NULL-terminated assembly string. Use ; or \n to separate statements. + @address: address of the first assembly instruction, or 0 to ignore. + @encoding: array of bytes containing encoding of input assembly string. + NOTE: *encoding will be allocated by this function, and should be freed + with ks_free() function. + @encoding_size: size of *encoding + @stat_count: number of statements successfully processed + + @return: 0 on success, or -1 on failure. + + On failure, call ks_errno() for error code. +*/ +KEYSTONE_EXPORT +int ks_asm(ks_engine *ks, + const char *string, + uint64_t address, + unsigned char **encoding, size_t *encoding_size, + size_t *stat_count); + + +/* + Free memory allocated by ks_asm() + + @p: memory allocated in @encoding argument of ks_asm() +*/ +KEYSTONE_EXPORT +void ks_free(unsigned char *p); + + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/include/keystone/mips.h b/include/keystone/mips.h new file mode 100644 index 0000000..e71c553 --- /dev/null +++ b/include/keystone/mips.h @@ -0,0 +1,23 @@ +/* Keystone Assembler Engine */ +/* By Nguyen Anh Quynh, 2016 */ + +#ifndef KEYSTONE_MIPS_H +#define KEYSTONE_MIPS_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "keystone.h" + +typedef enum ks_err_asm_mips { + KS_ERR_ASM_MIPS_INVALIDOPERAND = KS_ERR_ASM_ARCH, + KS_ERR_ASM_MIPS_MISSINGFEATURE, + KS_ERR_ASM_MIPS_MNEMONICFAIL, +} ks_err_asm_mips; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/include/keystone/ppc.h b/include/keystone/ppc.h new file mode 100644 index 0000000..39a602c --- /dev/null +++ b/include/keystone/ppc.h @@ -0,0 +1,24 @@ +/* Keystone Assembler Engine */ +/* By Nguyen Anh Quynh, 2016 */ + +#ifndef KEYSTONE_PPC_H +#define KEYSTONE_PPC_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "keystone.h" + +typedef enum ks_err_asm_ppc { + KS_ERR_ASM_PPC_INVALIDOPERAND = KS_ERR_ASM_ARCH, + KS_ERR_ASM_PPC_MISSINGFEATURE, + KS_ERR_ASM_PPC_MNEMONICFAIL, +} ks_err_asm_ppc; + + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/include/keystone/sparc.h b/include/keystone/sparc.h new file mode 100644 index 0000000..e49c426 --- /dev/null +++ b/include/keystone/sparc.h @@ -0,0 +1,24 @@ +/* Keystone Assembler Engine */ +/* By Nguyen Anh Quynh, 2016 */ + +#ifndef KEYSTONE_SPARC_H +#define KEYSTONE_SPARC_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "keystone.h" + +typedef enum ks_err_asm_sparc { + KS_ERR_ASM_SPARC_INVALIDOPERAND = KS_ERR_ASM_ARCH, + KS_ERR_ASM_SPARC_MISSINGFEATURE, + KS_ERR_ASM_SPARC_MNEMONICFAIL, +} ks_err_asm_sparc; + + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/include/keystone/systemz.h b/include/keystone/systemz.h new file mode 100644 index 0000000..ec2b07a --- /dev/null +++ b/include/keystone/systemz.h @@ -0,0 +1,24 @@ +/* Keystone Assembler Engine */ +/* By Nguyen Anh Quynh, 2016 */ + +#ifndef KEYSTONE_SYSTEMZ_H +#define KEYSTONE_SYSTEMZ_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "keystone.h" + +typedef enum ks_err_asm_systemz { + KS_ERR_ASM_SYSTEMZ_INVALIDOPERAND = KS_ERR_ASM_ARCH, + KS_ERR_ASM_SYSTEMZ_MISSINGFEATURE, + KS_ERR_ASM_SYSTEMZ_MNEMONICFAIL, +} ks_err_asm_systemz; + + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/include/keystone/x86.h b/include/keystone/x86.h new file mode 100644 index 0000000..1fac684 --- /dev/null +++ b/include/keystone/x86.h @@ -0,0 +1,23 @@ +/* Keystone Assembler Engine */ +/* By Nguyen Anh Quynh, 2016 */ + +#ifndef KEYSTONE_X86_H +#define KEYSTONE_X86_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "keystone.h" + +typedef enum ks_err_asm_x86 { + KS_ERR_ASM_X86_INVALIDOPERAND = KS_ERR_ASM_ARCH, + KS_ERR_ASM_X86_MISSINGFEATURE, + KS_ERR_ASM_X86_MNEMONICFAIL, +} ks_err_asm_x86; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/kstool/CMakeLists.txt b/kstool/CMakeLists.txt new file mode 100644 index 0000000..d28da48 --- /dev/null +++ b/kstool/CMakeLists.txt @@ -0,0 +1,19 @@ +# Kstool for Keystone assembler engine. +# By Nguyen Anh Quynh, 2016 + +cmake_minimum_required(VERSION 2.8) + +project(kstool) + +include_directories("../include") + +if (${CMAKE_CXX_COMPILER_ID} STREQUAL MSVC) + include_directories("./") + add_executable(kstool getopt.cpp kstool.cpp) +else() + add_executable(kstool kstool.cpp) +endif() + +target_link_libraries(kstool keystone) + +install(TARGETS kstool DESTINATION bin) diff --git a/kstool/README b/kstool/README new file mode 100644 index 0000000..2417992 --- /dev/null +++ b/kstool/README @@ -0,0 +1 @@ +This directory contains kstool of Keystone engine. diff --git a/kstool/getopt.cpp b/kstool/getopt.cpp new file mode 100644 index 0000000..7c3f517 --- /dev/null +++ b/kstool/getopt.cpp @@ -0,0 +1,75 @@ +#include +#include + +#include "getopt.h" + +int opterr = 1, /* if error message should be printed */ + optind = 1, /* index into parent argv vector */ + optopt, /* character checked for validity */ + optreset; /* reset getopt */ +const char *optarg; /* argument associated with option */ + +#define BADCH (int)'?' +#define BADARG (int)':' +#define EMSG "" + +/* + * getopt -- + * Parse argc/argv argument vector. + */ +int getopt(int nargc, char * const nargv[], const char *ostr) +{ + static const char *place = EMSG; /* option letter processing */ + const char *oli; /* option letter list index */ + + if (optreset || !*place) { /* update scanning pointer */ + optreset = 0; + if (optind >= nargc || *(place = nargv[optind]) != '-') { + place = EMSG; + return (-1); + } + + if (place[1] && *++place == '-') { /* found "--" */ + ++optind; + place = EMSG; + return (-1); + } + } /* option letter okay? */ + + if ((optopt = (int)*place++) == (int)':' || + !(oli = strchr (ostr, optopt))) { + /* + * if the user didn't specify '-' as an option, + * assume it means -1. + */ + if (optopt == (int)'-') + return (-1); + if (!*place) + ++optind; + if (opterr && *ostr != ':') + (void)printf ("illegal option -- %c\n", optopt); + return (BADCH); + } + + if (*++oli != ':') { /* don't need argument */ + optarg = NULL; + if (!*place) + ++optind; + } else { /* need an argument */ + if (*place) /* no white space */ + optarg = place; + else if (nargc <= ++optind) { /* no arg */ + place = EMSG; + if (*ostr == ':') + return (BADARG); + if (opterr) + (void)printf ("option requires an argument -- %c\n", optopt); + return (BADCH); + } else /* white space */ + optarg = nargv[optind]; + place = EMSG; + ++optind; + } + + return optopt; /* dump back option letter */ +} diff --git a/kstool/getopt.h b/kstool/getopt.h new file mode 100644 index 0000000..fdbe719 --- /dev/null +++ b/kstool/getopt.h @@ -0,0 +1,14 @@ +#ifndef KSTOOL_GETOPT_H +#define KSTOOL_GETOPT_H + +// global +extern int opterr, /* if error message should be printed */ + optind, /* index into parent argv vector */ + optopt, /* character checked for validity */ + optreset; /* reset getopt */ + +extern const char *optarg; /* argument associated with option */ + +int getopt(int nargc, char *const nargv[], const char *ostr); + +#endif diff --git a/kstool/kstool.cpp b/kstool/kstool.cpp new file mode 100644 index 0000000..0d5ff45 --- /dev/null +++ b/kstool/kstool.cpp @@ -0,0 +1,346 @@ +// Kstool for Keystone Assembler Engine. +// By Nguyen Anh Quynh, 2016-2020 +#include +#include +#include +#include +#include +#include +#if !defined(WIN32) && !defined(WIN64) && !defined(_WIN32) && !defined(_WIN64) +#include +#else +#endif +#include + +#include + +#if defined(WIN32) || defined(WIN64) || defined(_WIN32) || defined(_WIN64) +#include "getopt.h" +#endif + +static void usage(char *prog) +{ + printf("Kstool v%u.%u.%u for Keystone Assembler Engine (www.keystone-engine.org)\nBy Nguyen Anh Quynh, 2016-2020\n\n", + KS_VERSION_MAJOR, KS_VERSION_MINOR, KS_VERSION_EXTRA); + printf("Syntax: %s [-b] [start-address-in-hex-format]\n", prog); + printf("\nThe following options are supported:\n"); + + if (ks_arch_supported(KS_ARCH_X86)) { + printf(" x16: X86 16bit, Intel syntax\n"); + printf(" x32: X86 32bit, Intel syntax\n"); + printf(" x64: X86 64bit, Intel syntax\n"); + printf(" x16att: X86 16bit, AT&T syntax\n"); + printf(" x32att: X86 32bit, AT&T syntax\n"); + printf(" x64att: X86 64bit, AT&T syntax\n"); + printf(" x16nasm: X86 16bit, NASM syntax\n"); + printf(" x32nasm: X86 32bit, NASM syntax\n"); + printf(" x64nasm: X86 64bit, NASM syntax\n"); + } + + if (ks_arch_supported(KS_ARCH_ARM)) { + printf(" arm: ARM - little endian\n"); + printf(" armbe: ARM - big endian\n"); + printf(" thumb: Thumb - little endian\n"); + printf(" thumbbe: Thumb - big endian\n"); + printf(" armv8: ARM V8 - little endian\n"); + printf(" armv8be: ARM V8 - big endian\n"); + printf(" thumbv8: Thumb V8 - little endian\n"); + printf(" thumbv8be: Thumb V8 - big endian\n"); + } + + if (ks_arch_supported(KS_ARCH_ARM64)) { + printf(" arm64: AArch64\n"); + } + + if (ks_arch_supported(KS_ARCH_HEXAGON)) { + printf(" hexagon: Hexagon\n"); + } + + if (ks_arch_supported(KS_ARCH_MIPS)) { + printf(" mips: Mips - little endian\n"); + printf(" mipsbe: Mips - big endian\n"); + printf(" mips64: Mips64 - little endian\n"); + printf(" mips64be: Mips64 - big endian\n"); + } + + if (ks_arch_supported(KS_ARCH_PPC)) { + printf(" ppc32be: PowerPC32 - big endian\n"); + printf(" ppc64: PowerPC64 - little endian\n"); + printf(" ppc64be: PowerPC64 - big endian\n"); + } + + if (ks_arch_supported(KS_ARCH_SPARC)) { + printf(" sparc: Sparc - little endian\n"); + printf(" sparcbe: Sparc - big endian\n"); + printf(" sparc64be: Sparc64 - big endian\n"); + } + + if (ks_arch_supported(KS_ARCH_SYSTEMZ)) { + printf(" systemz: SystemZ (S390x)\n"); + } + + if (ks_arch_supported(KS_ARCH_EVM)) { + printf(" evm: Ethereum Virtual Machine\n"); + } + + printf("\nExtra options:\n"); + printf(" -b binary output\n\n"); +} + +int main(int argc, char **argv) +{ + ks_engine *ks; + ks_err err = KS_ERR_ARCH; + char *mode, *assembly = NULL; + uint64_t start_addr = 0; + char *input = NULL; + size_t count; + unsigned char *insn = NULL; + size_t size; + bool binary_output = false; + int c; + int args_left; + + while ((c = getopt(argc, argv, "bh")) != -1) { + switch (c) { + case 'b': + binary_output = true; + break; + case 'h': + usage(argv[0]); + return 0; + default: + usage(argv[0]); + return -1; + } + } + + args_left = argc - optind; + if (args_left == 1) { + // handle code from stdin +#if !defined(WIN32) && !defined(WIN64) && !defined(_WIN32) && !defined(_WIN64) + int flags; + size_t index = 0; + char buf[1024]; + + mode = argv[optind]; + + if ((flags = fcntl(STDIN_FILENO, F_GETFL, 0)) == -1) + flags = 0; + + fcntl(STDIN_FILENO, F_SETFL, flags | O_NONBLOCK); + + while(fgets(buf, sizeof(buf), stdin)) { + input = (char*)realloc(input, index + strlen(buf)); + if (!input) { + printf("Failed to allocate memory."); + return 1; + } + + memcpy(&input[index], buf, strlen(buf)); + index += strlen(buf); + } + + fcntl(STDIN_FILENO, F_SETFL, flags); + + assembly = input; + if (!assembly) { + usage(argv[0]); + return -1; + } +#else // Windows does not handle code from stdin + usage(argv[0]); + return -1; +#endif + } else if (args_left == 2) { + // kstool + mode = argv[optind]; + assembly = argv[optind + 1]; + } else if (args_left == 3) { + // kstool

    + char *temp; + mode = argv[optind]; + assembly = argv[optind + 1]; + start_addr = strtoull(argv[optind + 2], &temp, 16); + if (temp == argv[optind + 2] || *temp != '\0' || errno == ERANGE) { + printf("ERROR: invalid address argument, quit!\n"); + return -2; + } + } else { + usage(argv[0]); + return -1; + } + + if (!strcmp(mode, "x16")) { + err = ks_open(KS_ARCH_X86, KS_MODE_16, &ks); + } + if (!strcmp(mode, "x32")) { + err = ks_open(KS_ARCH_X86, KS_MODE_32, &ks); + } + if (!strcmp(mode, "x64")) { + err = ks_open(KS_ARCH_X86, KS_MODE_64, &ks); + } + + if (!strcmp(mode, "x16att")) { + err = ks_open(KS_ARCH_X86, KS_MODE_16, &ks); + if (!err) { + ks_option(ks, KS_OPT_SYNTAX, KS_OPT_SYNTAX_ATT); + } + } + if (!strcmp(mode, "x32att")) { + err = ks_open(KS_ARCH_X86, KS_MODE_32, &ks); + if (!err) { + ks_option(ks, KS_OPT_SYNTAX, KS_OPT_SYNTAX_ATT); + } + } + if (!strcmp(mode, "x64att")) { + err = ks_open(KS_ARCH_X86, KS_MODE_64, &ks); + if (!err) { + ks_option(ks, KS_OPT_SYNTAX, KS_OPT_SYNTAX_ATT); + } + } + + if (!strcmp(mode, "x16nasm")) { + err = ks_open(KS_ARCH_X86, KS_MODE_16, &ks); + if (!err) { + ks_option(ks, KS_OPT_SYNTAX, KS_OPT_SYNTAX_NASM); + } + } + if (!strcmp(mode, "x32nasm")) { + err = ks_open(KS_ARCH_X86, KS_MODE_32, &ks); + if (!err) { + ks_option(ks, KS_OPT_SYNTAX, KS_OPT_SYNTAX_NASM); + } + } + if (!strcmp(mode, "x64nasm")) { + err = ks_open(KS_ARCH_X86, KS_MODE_64, &ks); + if (!err) { + ks_option(ks, KS_OPT_SYNTAX, KS_OPT_SYNTAX_NASM); + } + } + + if (!strcmp(mode, "arm")) { + err = ks_open(KS_ARCH_ARM, KS_MODE_ARM+KS_MODE_LITTLE_ENDIAN, &ks); + } + + if (!strcmp(mode, "armbe")) { + err = ks_open(KS_ARCH_ARM, KS_MODE_ARM+KS_MODE_BIG_ENDIAN, &ks); + } + + if (!strcmp(mode, "thumb")) { + err = ks_open(KS_ARCH_ARM, KS_MODE_THUMB+KS_MODE_LITTLE_ENDIAN, &ks); + } + + if (!strcmp(mode, "thumbbe")) { + err = ks_open(KS_ARCH_ARM, KS_MODE_THUMB+KS_MODE_BIG_ENDIAN, &ks); + } + + if (!strcmp(mode, "armv8")) { + err = ks_open(KS_ARCH_ARM, KS_MODE_ARM+KS_MODE_LITTLE_ENDIAN+KS_MODE_V8, &ks); + } + + if (!strcmp(mode, "armv8be")) { + err = ks_open(KS_ARCH_ARM, KS_MODE_ARM+KS_MODE_BIG_ENDIAN+KS_MODE_V8, &ks); + } + + if (!strcmp(mode, "thumbv8")) { + err = ks_open(KS_ARCH_ARM, KS_MODE_THUMB+KS_MODE_LITTLE_ENDIAN+KS_MODE_V8, &ks); + } + + if (!strcmp(mode, "thumbv8be")) { + err = ks_open(KS_ARCH_ARM, KS_MODE_THUMB+KS_MODE_BIG_ENDIAN+KS_MODE_V8, &ks); + } + + if (!strcmp(mode, "arm64")) { + err = ks_open(KS_ARCH_ARM64, KS_MODE_LITTLE_ENDIAN, &ks); + } + + if (!strcmp(mode, "hex") || !strcmp(mode, "hexagon")) { + err = ks_open(KS_ARCH_HEXAGON, KS_MODE_BIG_ENDIAN, &ks); + } + + if (!strcmp(mode, "mips")) { + err = ks_open(KS_ARCH_MIPS, KS_MODE_MIPS32+KS_MODE_LITTLE_ENDIAN, &ks); + } + + if (!strcmp(mode, "mipsbe")) { + err = ks_open(KS_ARCH_MIPS, KS_MODE_MIPS32+KS_MODE_BIG_ENDIAN, &ks); + } + + if (!strcmp(mode, "mips64")) { + err = ks_open(KS_ARCH_MIPS, KS_MODE_MIPS64+KS_MODE_LITTLE_ENDIAN, &ks); + } + + if (!strcmp(mode, "mips64be")) { + err = ks_open(KS_ARCH_MIPS, KS_MODE_MIPS64+KS_MODE_BIG_ENDIAN, &ks); + } + + if (!strcmp(mode, "ppc32be")) { + err = ks_open(KS_ARCH_PPC, KS_MODE_PPC32+KS_MODE_BIG_ENDIAN, &ks); + } + + if (!strcmp(mode, "ppc64")) { + err = ks_open(KS_ARCH_PPC, KS_MODE_PPC64+KS_MODE_LITTLE_ENDIAN, &ks); + } + + if (!strcmp(mode, "ppc64be")) { + err = ks_open(KS_ARCH_PPC, KS_MODE_PPC64+KS_MODE_BIG_ENDIAN, &ks); + } + + if (!strcmp(mode, "sparc")) { + err = ks_open(KS_ARCH_SPARC, KS_MODE_SPARC32+KS_MODE_LITTLE_ENDIAN, &ks); + } + + if (!strcmp(mode, "sparcbe")) { + err = ks_open(KS_ARCH_SPARC, KS_MODE_SPARC32+KS_MODE_BIG_ENDIAN, &ks); + } + + if (!strcmp(mode, "sparc64be")) { + err = ks_open(KS_ARCH_SPARC, KS_MODE_SPARC64+KS_MODE_BIG_ENDIAN, &ks); + } + + if (!strcmp(mode, "systemz") || !strcmp(mode, "sysz") || !strcmp(mode, "s390x")) { + err = ks_open(KS_ARCH_SYSTEMZ, KS_MODE_BIG_ENDIAN, &ks); + } + + if (!strcmp(mode, "evm")) { + err = ks_open(KS_ARCH_EVM, 0, &ks); + } + + if (err) { + printf("ERROR: failed on ks_open()\n"); + usage(argv[0]); + return -1; + } + + if (ks_asm(ks, assembly, start_addr, &insn, &size, &count)) { + printf("ERROR: failed on ks_asm() with count = %zu, error = '%s' (code = %u)\n", count, ks_strerror(ks_errno(ks)), ks_errno(ks)); + } else { + if (binary_output) { + size_t i; + for (i = 0; i < size; ++i) { + putchar(insn[i]); + } + } else { + size_t i; + printf("%s = [ ", assembly); + for (i = 0; i < size; i++) { + printf("%02x ", insn[i]); + } + printf("]\n"); + //printf("Assembled: %lu bytes, %lu statement(s)\n", size, count); + } + } + + // NOTE: free insn after usage to avoid leaking memory + if (insn != NULL) { + ks_free(insn); + } + + // close Keystone instance when done + ks_close(ks); + + free(input); + + return 0; +} diff --git a/kstool/test-all.sh b/kstool/test-all.sh new file mode 100644 index 0000000..7b95537 --- /dev/null +++ b/kstool/test-all.sh @@ -0,0 +1,101 @@ +#!/bin/sh + +echo "::X86-32" +kstool x32 "add eax, ecx" +# encoding: [0x01,0xc8] +echo + +echo "::X86-64" +kstool x64 "add rax, rcx" +#encoding: [0x48,0x01,0xc8] +echo + +echo "::X86-32 ATT" +kstool x32att "add %ecx, %eax" +# encoding: [0x01,0xc8] +echo + +echo "::X86-64 ATT" +kstool x64att "add %rcx, %rax" +#encoding: [0x48,0x01,0xc8] +echo + +echo "::Arm" +kstool arm "sub r1, r2, r5" +#encoding: [0x05,0x10,0x42,0xe0] +echo + +echo "::Arm BE" +kstool armbe "sub r1, r2, r5" +#encoding: [0x05,0x10,0x42,0xe0] +echo + +echo "::Thumb LE" +kstool thumb "movs r4, #0xf0" +#encoding: [0xf0,0x24] +echo + +echo "::Thumb BE" +kstool thumbbe "movs r4, #0xf0" +#encoding: [0x24,0xf0] +echo + +echo "::Arm64 BE" +kstool arm64be "ldr w1, [sp, #0x8]" +#encoding: [0xe1,0x0b,0x40,0xb9] +echo + +echo "::Sparc BE" +kstool sparcbe "add %g1, %g2, %g3" +#encoding: [0x86,0x00,0x40,0x02] +echo + +echo "::Sparc LE" +kstool sparc "add %g1, %g2, %g3" +#encoding: [0x02,0x40,0x00,0x86] +echo + +echo "::Mips BE" +kstool mipsbe "and \$9, \$6, \$7" +#encoding: [0x00,0xc7,0x48,0x24] +echo + +echo "::Mips LE" +kstool mips "and \$9, \$6, \$7" +#encoding: [0x24,0x48,0xc7,0x00] +echo + +echo "::Mips64 LE" +kstool mips64 "and \$9, \$6, \$7" +#encoding: [0x24,0x48,0xc7,0x00] +echo + +echo "::Mips64 BE" +kstool mips64be "and \$9, \$6, \$7" +#encoding: [0x00,0xc7,0x48,0x24] +echo + +echo "::SystemZ" +kstool systemz "a %r0, 4095(%r15,%r1)" +#encoding: [0x5a,0x0f,0x1f,0xff] +echo + +echo "::Hexagon" +kstool hex "v23.w=vavg(v11.w,v2.w):rnd" +#encoding: [0xd7,0xcb,0xe2,0x1c] +echo + +echo "::PPC BE" +kstool ppc32be "add 1, 2, 3" +#encoding: [0x7c,0x22,0x1a,0x14] +echo + +echo "::PPC64 LE" +kstool ppc64 "add 1, 2, 3" +#encoding: [0x14,0x1a,0x22,0x7c] +echo + +echo "::PPC64 BE" +kstool ppc64be "add 1, 2, 3" +#encoding: [0x7c,0x22,0x1a,0x14] +echo diff --git a/llvm/CMakeLists.txt b/llvm/CMakeLists.txt new file mode 100644 index 0000000..e324ef3 --- /dev/null +++ b/llvm/CMakeLists.txt @@ -0,0 +1,548 @@ +# See docs/CMake.html for instructions about how to build LLVM with CMake. + +cmake_minimum_required(VERSION 2.8.7) + +set(LLVM_INSTALL_TOOLCHAIN_ONLY ON) + +if (NOT CMAKE_BUILD_TYPE AND NOT CMAKE_CONFIGURATION_TYPES) + message(STATUS "No build type selected, default to Debug") + set(CMAKE_BUILD_TYPE "Debug") +endif() + +if(POLICY CMP0022) + cmake_policy(SET CMP0022 NEW) # automatic when 2.8.12 is required +endif() + +if (POLICY CMP0051) + # CMake 3.1 and higher include generator expressions of the form + # $ in the SOURCES property. These need to be + # stripped everywhere that access the SOURCES property, so we just + # defer to the OLD behavior of not including generator expressions + # in the output for now. + cmake_policy(SET CMP0051 OLD) +endif() + +if(CMAKE_VERSION VERSION_LESS 3.1.20141117) + set(cmake_3_2_USES_TERMINAL) +else() + set(cmake_3_2_USES_TERMINAL USES_TERMINAL) +endif() + +if(NOT DEFINED LLVM_VERSION_MAJOR) + set(LLVM_VERSION_MAJOR 3) +endif() +if(NOT DEFINED LLVM_VERSION_MINOR) + set(LLVM_VERSION_MINOR 9) +endif() +if(NOT DEFINED LLVM_VERSION_PATCH) + set(LLVM_VERSION_PATCH 0) +endif() +if(NOT DEFINED LLVM_VERSION_SUFFIX) + set(LLVM_VERSION_SUFFIX svn) +endif() + +if (POLICY CMP0048) + cmake_policy(SET CMP0048 NEW) + set(cmake_3_0_PROJ_VERSION + VERSION ${LLVM_VERSION_MAJOR}.${LLVM_VERSION_MINOR}.${LLVM_VERSION_PATCH}) + set(cmake_3_0_LANGUAGES LANGUAGES) +endif() + +if (NOT PACKAGE_VERSION) + set(PACKAGE_VERSION + "${LLVM_VERSION_MAJOR}.${LLVM_VERSION_MINOR}.${LLVM_VERSION_PATCH}${LLVM_VERSION_SUFFIX}") +endif() + +project(LLVM + ${cmake_3_0_PROJ_VERSION} + ${cmake_3_0_LANGUAGES} + C CXX ASM) + +# The following only works with the Ninja generator in CMake >= 3.0. +set(LLVM_PARALLEL_COMPILE_JOBS "" CACHE STRING + "Define the maximum number of concurrent compilation jobs.") +if(LLVM_PARALLEL_COMPILE_JOBS) + if(CMAKE_VERSION VERSION_LESS 3.0 OR NOT CMAKE_MAKE_PROGRAM MATCHES "ninja") + message(WARNING "Job pooling is only available with Ninja generators and CMake 3.0 and later.") + else() + set_property(GLOBAL APPEND PROPERTY JOB_POOLS compile_job_pool=${LLVM_PARALLEL_COMPILE_JOBS}) + set(CMAKE_JOB_POOL_COMPILE compile_job_pool) + endif() +endif() + +set(LLVM_PARALLEL_LINK_JOBS "" CACHE STRING + "Define the maximum number of concurrent link jobs.") +if(LLVM_PARALLEL_LINK_JOBS) + if(CMAKE_VERSION VERSION_LESS 3.0 OR NOT CMAKE_MAKE_PROGRAM MATCHES "ninja") + message(WARNING "Job pooling is only available with Ninja generators and CMake 3.0 and later.") + else() + set_property(GLOBAL APPEND PROPERTY JOB_POOLS link_job_pool=${LLVM_PARALLEL_LINK_JOBS}) + set(CMAKE_JOB_POOL_LINK link_job_pool) + endif() +endif() + +# Add path for custom modules +set(CMAKE_MODULE_PATH + ${CMAKE_MODULE_PATH} + "${CMAKE_CURRENT_SOURCE_DIR}/cmake" + "${CMAKE_CURRENT_SOURCE_DIR}/cmake/modules" + ) + +# Generate a CompilationDatabase (compile_commands.json file) for our build, +# for use by clang_complete, YouCompleteMe, etc. +set(CMAKE_EXPORT_COMPILE_COMMANDS 1) + +option(LLVM_USE_FOLDERS "Enable solution folders in Visual Studio. Disable for Express versions." ON) +if ( LLVM_USE_FOLDERS ) + set_property(GLOBAL PROPERTY USE_FOLDERS ON) +endif() + +include(VersionFromVCS) + +option(LLVM_APPEND_VC_REV + "Append the version control system revision id to LLVM version" OFF) + +if( LLVM_APPEND_VC_REV ) + add_version_info_from_vcs(PACKAGE_VERSION) +endif() + +set(PACKAGE_NAME LLVM) +set(PACKAGE_STRING "${PACKAGE_NAME} ${PACKAGE_VERSION}") +set(PACKAGE_BUGREPORT "http://llvm.org/bugs/") + +set(BUG_REPORT_URL "${PACKAGE_BUGREPORT}" CACHE STRING + "Default URL where bug reports are to be submitted.") + +# Configure CPack. +set(CPACK_PACKAGE_INSTALL_DIRECTORY "LLVM") +set(CPACK_PACKAGE_VENDOR "LLVM") +set(CPACK_PACKAGE_VERSION_MAJOR ${LLVM_VERSION_MAJOR}) +set(CPACK_PACKAGE_VERSION_MINOR ${LLVM_VERSION_MINOR}) +set(CPACK_PACKAGE_VERSION_PATCH ${LLVM_VERSION_PATCH}) +set(CPACK_PACKAGE_VERSION ${PACKAGE_VERSION}) +set(CPACK_RESOURCE_FILE_LICENSE "${CMAKE_CURRENT_SOURCE_DIR}/LICENSE.TXT") +set(CPACK_NSIS_COMPRESSOR "/SOLID lzma \r\n SetCompressorDictSize 32") +if(WIN32 AND NOT UNIX) + set(CPACK_PACKAGE_INSTALL_REGISTRY_KEY "LLVM") + set(CPACK_PACKAGE_ICON "${CMAKE_CURRENT_SOURCE_DIR}\\\\cmake\\\\nsis_logo.bmp") + set(CPACK_NSIS_MUI_ICON "${CMAKE_CURRENT_SOURCE_DIR}\\\\cmake\\\\nsis_icon.ico") + set(CPACK_NSIS_MUI_UNIICON "${CMAKE_CURRENT_SOURCE_DIR}\\\\cmake\\\\nsis_icon.ico") + set(CPACK_NSIS_MODIFY_PATH "ON") + set(CPACK_NSIS_ENABLE_UNINSTALL_BEFORE_INSTALL "ON") + set(CPACK_NSIS_EXTRA_INSTALL_COMMANDS + "ExecWait '$INSTDIR/tools/msbuild/install.bat'") + set(CPACK_NSIS_EXTRA_UNINSTALL_COMMANDS + "ExecWait '$INSTDIR/tools/msbuild/uninstall.bat'") + if( CMAKE_CL_64 ) + set(CPACK_NSIS_INSTALL_ROOT "$PROGRAMFILES64") + endif() +endif() +include(CPack) + +string(TOUPPER "${CMAKE_BUILD_TYPE}" uppercase_CMAKE_BUILD_TYPE) + +if (CMAKE_BUILD_TYPE AND + NOT uppercase_CMAKE_BUILD_TYPE MATCHES "^(DEBUG|RELEASE|RELWITHDEBINFO|MINSIZEREL|NONE)$") + message(FATAL_ERROR "Invalid value for CMAKE_BUILD_TYPE: ${CMAKE_BUILD_TYPE}") +endif() + +set(LLVM_LIBDIR_SUFFIX "" CACHE STRING "Define suffix of library directory name (32/64)" ) + +# They are used as destination of target generators. +set(LLVM_RUNTIME_OUTPUT_INTDIR ${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_CFG_INTDIR}/bin) +set(LLVM_LIBRARY_OUTPUT_INTDIR ${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_CFG_INTDIR}/lib${LLVM_LIBDIR_SUFFIX}) +if(WIN32 OR CYGWIN) + # DLL platform -- put DLLs into bin. + set(LLVM_SHLIB_OUTPUT_INTDIR ${LLVM_RUNTIME_OUTPUT_INTDIR}) +else() + set(LLVM_SHLIB_OUTPUT_INTDIR ${LLVM_LIBRARY_OUTPUT_INTDIR}) +endif() + +# Each of them corresponds to llvm-config's. +set(LLVM_TOOLS_BINARY_DIR ${LLVM_RUNTIME_OUTPUT_INTDIR}) # --bindir +set(LLVM_LIBRARY_DIR ${LLVM_LIBRARY_OUTPUT_INTDIR}) # --libdir +set(LLVM_MAIN_SRC_DIR ${CMAKE_CURRENT_SOURCE_DIR} ) # --src-root +set(LLVM_MAIN_INCLUDE_DIR ${LLVM_MAIN_SRC_DIR}/include ) # --includedir +set(LLVM_BINARY_DIR ${CMAKE_CURRENT_BINARY_DIR} ) # --prefix + +set(LLVM_EXAMPLES_BINARY_DIR ${LLVM_BINARY_DIR}/examples) +set(LLVM_INCLUDE_DIR ${CMAKE_CURRENT_BINARY_DIR}/include) + +set(LLVM_ALL_TARGETS + AArch64 +# AMDGPU + ARM + Hexagon + Mips + PowerPC + Sparc + SystemZ + X86 + ) + +set(LLVM_TARGETS_TO_BUILD "all" + CACHE STRING "Semicolon-separated list of targets to build, or \"all\".") + +set(LLVM_EXPERIMENTAL_TARGETS_TO_BUILD "" + CACHE STRING "Semicolon-separated list of experimental targets to build.") + +option(BUILD_SHARED_LIBS + "Build all libraries as shared libraries instead of static" OFF) + +option(LLVM_ENABLE_TIMESTAMPS "Enable embedding timestamp information in build" ON) +if(LLVM_ENABLE_TIMESTAMPS) + set(ENABLE_TIMESTAMPS 1) +endif() + +option(LLVM_ENABLE_BACKTRACES "Enable embedding backtraces on crash." ON) +if(LLVM_ENABLE_BACKTRACES) + set(ENABLE_BACKTRACES 1) +endif() + +option(LLVM_ENABLE_CRASH_OVERRIDES "Enable crash overrides." ON) +if(LLVM_ENABLE_CRASH_OVERRIDES) + set(ENABLE_CRASH_OVERRIDES 1) +endif() + +option(LLVM_ENABLE_FFI "Use libffi to call external functions from the interpreter" OFF) +set(FFI_LIBRARY_DIR "" CACHE PATH "Additional directory, where CMake should search for libffi.so") +set(FFI_INCLUDE_DIR "" CACHE PATH "Additional directory, where CMake should search for ffi.h or ffi/ffi.h") + +set(LLVM_TARGET_ARCH "host" + CACHE STRING "Set target to use for LLVM JIT or use \"host\" for automatic detection.") + +option(LLVM_ENABLE_TERMINFO "Use terminfo database if available." ON) + +option(LLVM_ENABLE_THREADS "Use threads if available." ON) + +option(LLVM_ENABLE_ZLIB "Use zlib for compression/decompression if available." ON) + +if( LLVM_TARGETS_TO_BUILD STREQUAL "all" ) + set( LLVM_TARGETS_TO_BUILD ${LLVM_ALL_TARGETS} ) +endif() + +set(LLVM_TARGETS_TO_BUILD + ${LLVM_TARGETS_TO_BUILD} + ${LLVM_EXPERIMENTAL_TARGETS_TO_BUILD}) +list(REMOVE_DUPLICATES LLVM_TARGETS_TO_BUILD) + +include(AddLLVMDefinitions) + +option(LLVM_ENABLE_PIC "Build Position-Independent Code" ON) +option(LLVM_ENABLE_WARNINGS "Enable compiler warnings." ON) +option(LLVM_ENABLE_MODULES "Compile with C++ modules enabled." OFF) +option(LLVM_ENABLE_CXX1Y "Compile with C++1y enabled." OFF) +option(LLVM_ENABLE_LIBCXX "Use libc++ if available." OFF) +option(LLVM_ENABLE_LIBCXXABI "Use libc++abi when using libc++." OFF) +option(LLVM_ENABLE_PEDANTIC "Compile with pedantic enabled." ON) +option(LLVM_ENABLE_WERROR "Fail and stop if a warning is triggered." OFF) + +if( NOT uppercase_CMAKE_BUILD_TYPE STREQUAL "DEBUG" ) + option(LLVM_ENABLE_ASSERTIONS "Enable assertions" OFF) +else() + option(LLVM_ENABLE_ASSERTIONS "Enable assertions" ON) +endif() + +set(LLVM_ABI_BREAKING_CHECKS "WITH_ASSERTS" CACHE STRING + "Enable abi-breaking checks. Can be WITH_ASSERTS, FORCE_ON or FORCE_OFF.") + +option(LLVM_FORCE_USE_OLD_HOST_TOOLCHAIN + "Set to ON to force using an old, unsupported host toolchain." OFF) + +option(LLVM_EXTERNALIZE_DEBUGINFO + "Generate dSYM files and strip executables and libraries (Darwin Only)" OFF) + +# If enabled, verify we are on a platform that supports oprofile. +if( LLVM_USE_OPROFILE ) + if( NOT CMAKE_SYSTEM_NAME MATCHES "Linux" ) + message(FATAL_ERROR "OProfile support is available on Linux only.") + endif( NOT CMAKE_SYSTEM_NAME MATCHES "Linux" ) +endif( LLVM_USE_OPROFILE ) + +set(LLVM_USE_SANITIZER "" CACHE STRING + "Define the sanitizer used to build binaries and tests.") + +option(LLVM_USE_SPLIT_DWARF + "Use -gsplit-dwarf when compiling llvm." OFF) + +# Define an option controlling whether we should build for 32-bit on 64-bit +# platforms, where supported. +if( CMAKE_SIZEOF_VOID_P EQUAL 8 AND NOT WIN32 ) + # TODO: support other platforms and toolchains. + option(LLVM_BUILD_32_BITS "Build 32 bits executables and libraries." OFF) +endif() + +# Define the default arguments to use with 'lit', and an option for the user to +# override. +set(LIT_ARGS_DEFAULT "-sv") +if (MSVC_IDE OR XCODE) + set(LIT_ARGS_DEFAULT "${LIT_ARGS_DEFAULT} --no-progress-bar") +endif() +set(LLVM_LIT_ARGS "${LIT_ARGS_DEFAULT}" CACHE STRING "Default options for lit") + +# On Win32 hosts, provide an option to specify the path to the GnuWin32 tools. +if( WIN32 AND NOT CYGWIN ) + set(LLVM_LIT_TOOLS_DIR "" CACHE PATH "Path to GnuWin32 tools") +endif() + +option(LLVM_BUILD_RUNTIME + "Build the LLVM runtime libraries." ON) + +option(LLVM_BUILD_TESTS + "Build LLVM unit tests. If OFF, just generate build targets." OFF) + +# You can configure which libraries from LLVM you want to include in the +# shared library by setting LLVM_DYLIB_COMPONENTS to a semi-colon delimited +# list of LLVM components. All component names handled by llvm-config are valid. +if(NOT DEFINED LLVM_DYLIB_COMPONENTS) + set(LLVM_DYLIB_COMPONENTS "all" CACHE STRING + "Semicolon-separated list of components to include in libLLVM, or \"all\".") +endif() +option(LLVM_LINK_LLVM_DYLIB "Link tools against the libllvm dynamic library" OFF) +option(LLVM_BUILD_LLVM_C_DYLIB "Build libllvm-c re-export library (Darwin Only)" OFF) +set(LLVM_BUILD_LLVM_DYLIB_default OFF) +if(LLVM_LINK_LLVM_DYLIB OR LLVM_BUILD_LLVM_C_DYLIB) + set(LLVM_BUILD_LLVM_DYLIB_default ON) +endif() +option(LLVM_BUILD_LLVM_DYLIB "Build libllvm dynamic library" ${LLVM_BUILD_LLVM_DYLIB_default}) +set(LLVM_DISABLE_LLVM_DYLIB_ATEXIT_DEFAULT ON) +if (LLVM_LINK_LLVM_DYLIB) + set(LLVM_DISABLE_LLVM_DYLIB_ATEXIT_DEFAULT OFF) +endif() +option(LLVM_DISABLE_LLVM_DYLIB_ATEXIT "Disable llvm-shlib's atexit destructors." ${LLVM_DISABLE_LLVM_DYLIB_ATEXIT_DEFAULT}) +if(LLVM_DISABLE_LLVM_DYLIB_ATEXIT) + set(DISABLE_LLVM_DYLIB_ATEXIT 1) +endif() + +if(CMAKE_CROSSCOMPILING) + set(LLVM_USE_HOST_TOOLS ON) +endif() + +# All options referred to from HandleLLVMOptions have to be specified +# BEFORE this include, otherwise options will not be correctly set on +# first cmake run +include(config-ix) + +# By default, we target the host, but this can be overridden at CMake +# invocation time. +set(LLVM_DEFAULT_TARGET_TRIPLE "${LLVM_HOST_TRIPLE}" CACHE STRING + "Default target for which LLVM will generate code." ) +set(TARGET_TRIPLE "${LLVM_DEFAULT_TARGET_TRIPLE}") + +include(HandleLLVMOptions) + +# Verify that we can find a Python 2 interpreter. Python 3 is unsupported. +# FIXME: We should support systems with only Python 3, but that requires work +# on LLDB. +set(Python_ADDITIONAL_VERSIONS 2.7) +include(FindPythonInterp) +if( NOT PYTHONINTERP_FOUND ) + message(FATAL_ERROR +"Unable to find Python interpreter, required for builds and testing. + +Please install Python or specify the PYTHON_EXECUTABLE CMake variable.") +endif() + +if( ${PYTHON_VERSION_STRING} VERSION_LESS 2.7 ) + message(FATAL_ERROR "Python 2.7 or newer is required") +endif() + +###### +# LLVMBuild Integration +# +# We use llvm-build to generate all the data required by the CMake based +# build system in one swoop: +# +# - We generate a file (a CMake fragment) in the object root which contains +# all the definitions that are required by CMake. +# +# - We generate the library table used by llvm-config. +# +# - We generate the dependencies for the CMake fragment, so that we will +# automatically reconfigure outselves. + +set(LLVMBUILDTOOL "${LLVM_MAIN_SRC_DIR}/utils/llvm-build/llvm-build") +set(LLVMCONFIGLIBRARYDEPENDENCIESINC + "${LLVM_BINARY_DIR}/tools/llvm-config/LibraryDependencies.inc") +set(LLVMBUILDCMAKEFRAG + "${LLVM_BINARY_DIR}/LLVMBuild.cmake") + +if (LLVM_USE_OPROFILE) + set(LLVMOPTIONALCOMPONENTS ${LLVMOPTIONALCOMPONENTS} OProfileJIT) +endif (LLVM_USE_OPROFILE) + +message(STATUS "Constructing LLVMBuild project information") +execute_process( + COMMAND ${PYTHON_EXECUTABLE} ${LLVMBUILDTOOL} + --native-target "${LLVM_NATIVE_ARCH}" + --enable-targets "${LLVM_TARGETS_TO_BUILD}" + --enable-optional-components "${LLVMOPTIONALCOMPONENTS}" + --write-library-table ${LLVMCONFIGLIBRARYDEPENDENCIESINC} + --write-cmake-fragment ${LLVMBUILDCMAKEFRAG} + OUTPUT_VARIABLE LLVMBUILDOUTPUT + ERROR_VARIABLE LLVMBUILDERRORS + OUTPUT_STRIP_TRAILING_WHITESPACE + ERROR_STRIP_TRAILING_WHITESPACE + RESULT_VARIABLE LLVMBUILDRESULT) + +# On Win32, CMake doesn't properly handle piping the default output/error +# streams into the GUI console. So, we explicitly catch and report them. +if( NOT "${LLVMBUILDOUTPUT}" STREQUAL "") + message(STATUS "llvm-build output: ${LLVMBUILDOUTPUT}") +endif() +if( NOT "${LLVMBUILDRESULT}" STREQUAL "0" ) + message(FATAL_ERROR + "Unexpected failure executing llvm-build: ${LLVMBUILDERRORS}") +endif() + +# Include the generated CMake fragment. This will define properties from the +# LLVMBuild files in a format which is easy to consume from CMake, and will add +# the dependencies so that CMake will reconfigure properly when the LLVMBuild +# files change. +include(${LLVMBUILDCMAKEFRAG}) + +###### + +# Configure all of the various header file fragments LLVM uses which depend on +# configuration variables. +set(LLVM_ENUM_TARGETS "") +set(LLVM_ENUM_ASM_PARSERS "") +foreach(t ${LLVM_TARGETS_TO_BUILD}) + set( td ${LLVM_MAIN_SRC_DIR}/lib/Target/${t} ) + add_definitions(-DLLVM_ENABLE_ARCH_${t}) + + list(FIND LLVM_ALL_TARGETS ${t} idx) + list(FIND LLVM_EXPERIMENTAL_TARGETS_TO_BUILD ${t} idy) + if( idx LESS 0 AND idy LESS 0 ) + message(FATAL_ERROR "The target `${t}' does not exist. + It should be one of\n${LLVM_ALL_TARGETS}") + else() + set(LLVM_ENUM_TARGETS "${LLVM_ENUM_TARGETS}LLVM_TARGET(${t})\n") + endif() + + if( EXISTS ${td}/AsmParser/CMakeLists.txt ) + set(LLVM_ENUM_ASM_PARSERS + "${LLVM_ENUM_ASM_PARSERS}LLVM_ASM_PARSER(${t})\n") + endif() +endforeach(t) + +# Produce the target definition files, which provide a way for clients to easily +# include various classes of targets. +configure_file( + ${LLVM_MAIN_INCLUDE_DIR}/llvm/Config/AsmParsers.def.in + ${LLVM_INCLUDE_DIR}/llvm/Config/AsmParsers.def + ) +configure_file( + ${LLVM_MAIN_INCLUDE_DIR}/llvm/Config/Targets.def.in + ${LLVM_INCLUDE_DIR}/llvm/Config/Targets.def + ) + +# Configure the three LLVM configuration header files. +configure_file( + ${LLVM_MAIN_INCLUDE_DIR}/llvm/Config/config.h.cmake + ${LLVM_INCLUDE_DIR}/llvm/Config/config.h) +configure_file( + ${LLVM_MAIN_INCLUDE_DIR}/llvm/Config/llvm-config.h.cmake + ${LLVM_INCLUDE_DIR}/llvm/Config/llvm-config.h) +configure_file( + ${LLVM_MAIN_INCLUDE_DIR}/llvm/Support/DataTypes.h.cmake + ${LLVM_INCLUDE_DIR}/llvm/Support/DataTypes.h) + +# They are not referenced. See set_output_directory(). +set( CMAKE_RUNTIME_OUTPUT_DIRECTORY ${LLVM_BINARY_DIR}/bin ) +set( CMAKE_LIBRARY_OUTPUT_DIRECTORY ${LLVM_BINARY_DIR}/lib${LLVM_LIBDIR_SUFFIX} ) +set( CMAKE_ARCHIVE_OUTPUT_DIRECTORY ${LLVM_BINARY_DIR}/lib${LLVM_LIBDIR_SUFFIX} ) + +set(CMAKE_BUILD_WITH_INSTALL_RPATH ON) +if (APPLE) + set(CMAKE_INSTALL_NAME_DIR "@rpath") + set(CMAKE_INSTALL_RPATH "@executable_path/../lib") +else(UNIX) + if(NOT DEFINED CMAKE_INSTALL_RPATH) + set(CMAKE_INSTALL_RPATH "\$ORIGIN/../lib${LLVM_LIBDIR_SUFFIX}") + if(${CMAKE_SYSTEM_NAME} MATCHES "(FreeBSD|DragonFly)") + set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,-z,origin") + set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -Wl,-z,origin") + endif() + endif(NOT DEFINED CMAKE_INSTALL_RPATH) +endif() + +if(APPLE AND DARWIN_LTO_LIBRARY) + set(CMAKE_EXE_LINKER_FLAGS + "${CMAKE_EXE_LINKER_FLAGS} -Wl,-lto_library -Wl,${DARWIN_LTO_LIBRARY}") + set(CMAKE_SHARED_LINKER_FLAGS + "${CMAKE_SHARED_LINKER_FLAGS} -Wl,-lto_library -Wl,${DARWIN_LTO_LIBRARY}") + set(CMAKE_MODULE_LINKER_FLAGS + "${CMAKE_MODULE_LINKER_FLAGS} -Wl,-lto_library -Wl,${DARWIN_LTO_LIBRARY}") +endif() + +# Work around a broken bfd ld behavior. When linking a binary with a +# foo.so library, it will try to find any library that foo.so uses and +# check its symbols. This is wasteful (the check was done when foo.so +# was created) and can fail since it is not the dynamic linker and +# doesn't know how to handle search paths correctly. +if (UNIX AND NOT APPLE AND NOT ${CMAKE_SYSTEM_NAME} MATCHES "SunOS") + set(CMAKE_EXE_LINKER_FLAGS + "${CMAKE_EXE_LINKER_FLAGS} -Wl,-allow-shlib-undefined") +endif() + +set(CMAKE_INCLUDE_CURRENT_DIR ON) + +include_directories( ${LLVM_INCLUDE_DIR} ${LLVM_MAIN_INCLUDE_DIR}) + +# when crosscompiling import the executable targets from a file +if(LLVM_USE_HOST_TOOLS) + include(CrossCompile) +endif(LLVM_USE_HOST_TOOLS) +if(LLVM_TARGET_IS_CROSSCOMPILE_HOST) +# Dummy use to avoid CMake Wraning: Manually-specified variables were not used +# (this is a variable that CrossCompile sets on recursive invocations) +endif() + +if(${CMAKE_SYSTEM_NAME} MATCHES "(FreeBSD|DragonFly)") + # On FreeBSD, /usr/local/* is not used by default. In order to build LLVM + # with libxml2, iconv.h, etc., we must add /usr/local paths. + include_directories("/usr/local/include") + link_directories("/usr/local/lib") +endif(${CMAKE_SYSTEM_NAME} MATCHES "(FreeBSD|DragonFly)") + +if( ${CMAKE_SYSTEM_NAME} MATCHES SunOS ) + SET(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -include llvm/Support/Solaris.h") +endif( ${CMAKE_SYSTEM_NAME} MATCHES SunOS ) + +# Make sure we don't get -rdynamic in every binary. For those that need it, +# use export_executable_symbols(target). +set(CMAKE_SHARED_LIBRARY_LINK_CXX_FLAGS "") + +set(LLVM_PROFDATA_FILE "" CACHE FILEPATH + "Profiling data file to use when compiling in order to improve runtime performance.") + +if(LLVM_PROFDATA_FILE AND EXISTS ${LLVM_PROFDATA_FILE}) + if ("${CMAKE_CXX_COMPILER_ID}" MATCHES "Clang" ) + add_definitions("-fprofile-instr-use=${LLVM_PROFDATA_FILE}") + else() + message(FATAL_ERROR "LLVM_PROFDATA_FILE can only be specified when compiling with clang") + endif() +endif() + +include(AddLLVM) + +if( MINGW ) + # People report that -O3 is unreliable on MinGW. The traditional + # build also uses -O2 for that reason: + llvm_replace_compiler_option(CMAKE_CXX_FLAGS_RELEASE "-O3" "-O2") +endif() + +add_subdirectory(lib/Support) + +add_subdirectory(include/llvm) + +add_subdirectory(lib) + +add_subdirectory(keystone) + +add_subdirectory(cmake/modules) + +install(DIRECTORY ../include/keystone +DESTINATION include +) diff --git a/llvm/CREDITS.TXT b/llvm/CREDITS.TXT new file mode 100644 index 0000000..da1fb01 --- /dev/null +++ b/llvm/CREDITS.TXT @@ -0,0 +1,467 @@ +This file is a partial list of people who have contributed to the LLVM +project. If you have contributed a patch or made some other contribution to +LLVM, please submit a patch to this file to add yourself, and it will be +done! + +The list is sorted by surname and formatted to allow easy grepping and +beautification by scripts. The fields are: name (N), email (E), web-address +(W), PGP key ID and fingerprint (P), description (D), snail-mail address +(S), and (I) IRC handle. + + +N: Vikram Adve +E: vadve@cs.uiuc.edu +W: http://www.cs.uiuc.edu/~vadve/ +D: The Sparc64 backend, provider of much wisdom, and motivator for LLVM + +N: Owen Anderson +E: resistor@mac.com +D: LCSSA pass and related LoopUnswitch work +D: GVNPRE pass, DataLayout refactoring, random improvements + +N: Henrik Bach +D: MingW Win32 API portability layer + +N: Aaron Ballman +E: aaron@aaronballman.com +D: __declspec attributes, Windows support, general bug fixing + +N: Nate Begeman +E: natebegeman@mac.com +D: PowerPC backend developer +D: Target-independent code generator and analysis improvements + +N: Daniel Berlin +E: dberlin@dberlin.org +D: ET-Forest implementation. +D: Sparse bitmap + +N: David Blaikie +E: dblaikie@gmail.com +D: General bug fixing/fit & finish, mostly in Clang + +N: Neil Booth +E: neil@daikokuya.co.uk +D: APFloat implementation. + +N: Misha Brukman +E: brukman+llvm@uiuc.edu +W: http://misha.brukman.net +D: Portions of X86 and Sparc JIT compilers, PowerPC backend +D: Incremental bitcode loader + +N: Cameron Buschardt +E: buschard@uiuc.edu +D: The `mem2reg' pass - promotes values stored in memory to registers + +N: Brendon Cahoon +E: bcahoon@codeaurora.org +D: Loop unrolling with run-time trip counts. + +N: Chandler Carruth +E: chandlerc@gmail.com +E: chandlerc@google.com +D: Hashing algorithms and interfaces +D: Inline cost analysis +D: Machine block placement pass +D: SROA + +N: Casey Carter +E: ccarter@uiuc.edu +D: Fixes to the Reassociation pass, various improvement patches + +N: Evan Cheng +E: evan.cheng@apple.com +D: ARM and X86 backends +D: Instruction scheduler improvements +D: Register allocator improvements +D: Loop optimizer improvements +D: Target-independent code generator improvements + +N: Dan Villiom Podlaski Christiansen +E: danchr@gmail.com +E: danchr@cs.au.dk +W: http://villiom.dk +D: LLVM Makefile improvements +D: Clang diagnostic & driver tweaks +S: Aarhus, Denmark + +N: Jeff Cohen +E: jeffc@jolt-lang.org +W: http://jolt-lang.org +D: Native Win32 API portability layer + +N: John T. Criswell +E: criswell@uiuc.edu +D: Original Autoconf support, documentation improvements, bug fixes + +N: Anshuman Dasgupta +E: adasgupt@codeaurora.org +D: Deterministic finite automaton based infrastructure for VLIW packetization + +N: Stefanus Du Toit +E: stefanus.du.toit@intel.com +D: Bug fixes and minor improvements + +N: Rafael Avila de Espindola +E: rafael.espindola@gmail.com +D: The ARM backend + +N: Dave Estes +E: cestes@codeaurora.org +D: AArch64 machine description for Cortex-A53 + +N: Alkis Evlogimenos +E: alkis@evlogimenos.com +D: Linear scan register allocator, many codegen improvements, Java frontend + +N: Hal Finkel +E: hfinkel@anl.gov +D: Basic-block autovectorization, PowerPC backend improvements + +N: Eric Fiselier +E: eric@efcs.ca +D: LIT patches and documentation. + +N: Ryan Flynn +E: pizza@parseerror.com +D: Miscellaneous bug fixes + +N: Brian Gaeke +E: gaeke@uiuc.edu +W: http://www.students.uiuc.edu/~gaeke/ +D: Portions of X86 static and JIT compilers; initial SparcV8 backend +D: Dynamic trace optimizer +D: FreeBSD/X86 compatibility fixes, the llvm-nm tool + +N: Nicolas Geoffray +E: nicolas.geoffray@lip6.fr +W: http://www-src.lip6.fr/homepages/Nicolas.Geoffray/ +D: PPC backend fixes for Linux + +N: Louis Gerbarg +E: lgg@apple.com +D: Portions of the PowerPC backend + +N: Saem Ghani +E: saemghani@gmail.com +D: Callgraph class cleanups + +N: Mikhail Glushenkov +E: foldr@codedgers.com +D: Author of llvmc2 + +N: Dan Gohman +E: sunfish@mozilla.com +D: Miscellaneous bug fixes +D: WebAssembly Backend + +N: David Goodwin +E: david@goodwinz.net +D: Thumb-2 code generator + +N: David Greene +E: greened@obbligato.org +D: Miscellaneous bug fixes +D: Register allocation refactoring + +N: Gabor Greif +E: ggreif@gmail.com +D: Improvements for space efficiency + +N: James Grosbach +E: grosbach@apple.com +I: grosbach +D: SjLj exception handling support +D: General fixes and improvements for the ARM back-end +D: MCJIT +D: ARM integrated assembler and assembly parser +D: Led effort for the backend formerly known as ARM64 + +N: Lang Hames +E: lhames@gmail.com +D: PBQP-based register allocator + +N: Gordon Henriksen +E: gordonhenriksen@mac.com +D: Pluggable GC support +D: C interface +D: Ocaml bindings + +N: Raul Fernandes Herbster +E: raul@dsc.ufcg.edu.br +D: JIT support for ARM + +N: Paolo Invernizzi +E: arathorn@fastwebnet.it +D: Visual C++ compatibility fixes + +N: Patrick Jenkins +E: patjenk@wam.umd.edu +D: Nightly Tester + +N: Dale Johannesen +E: dalej@apple.com +D: ARM constant islands improvements +D: Tail merging improvements +D: Rewrite X87 back end +D: Use APFloat for floating point constants widely throughout compiler +D: Implement X87 long double + +N: Brad Jones +E: kungfoomaster@nondot.org +D: Support for packed types + +N: Rod Kay +E: rkay@auroraux.org +D: Author of LLVM Ada bindings + +N: Eric Kidd +W: http://randomhacks.net/ +D: llvm-config script + +N: Anton Korobeynikov +E: asl@math.spbu.ru +D: Mingw32 fixes, cross-compiling support, stdcall/fastcall calling conv. +D: x86/linux PIC codegen, aliases, regparm/visibility attributes +D: Switch lowering refactoring + +N: Sumant Kowshik +E: kowshik@uiuc.edu +D: Author of the original C backend + +N: Benjamin Kramer +E: benny.kra@gmail.com +D: Miscellaneous bug fixes + +N: Sundeep Kushwaha +E: sundeepk@codeaurora.org +D: Implemented DFA-based target independent VLIW packetizer + +N: Christopher Lamb +E: christopher.lamb@gmail.com +D: aligned load/store support, parts of noalias and restrict support +D: vreg subreg infrastructure, X86 codegen improvements based on subregs +D: address spaces + +N: Jim Laskey +E: jlaskey@apple.com +D: Improvements to the PPC backend, instruction scheduling +D: Debug and Dwarf implementation +D: Auto upgrade mangler +D: llvm-gcc4 svn wrangler + +N: Chris Lattner +E: sabre@nondot.org +W: http://nondot.org/~sabre/ +D: Primary architect of LLVM + +N: Tanya Lattner (Tanya Brethour) +E: tonic@nondot.org +W: http://nondot.org/~tonic/ +D: The initial llvm-ar tool, converted regression testsuite to dejagnu +D: Modulo scheduling in the SparcV9 backend +D: Release manager (1.7+) + +N: Sylvestre Ledru +E: sylvestre@debian.org +W: http://sylvestre.ledru.info/ +W: http://llvm.org/apt/ +D: Debian and Ubuntu packaging +D: Continuous integration with jenkins + +N: Andrew Lenharth +E: alenhar2@cs.uiuc.edu +W: http://www.lenharth.org/~andrewl/ +D: Alpha backend +D: Sampling based profiling + +N: Nick Lewycky +E: nicholas@mxc.ca +D: PredicateSimplifier pass + +N: Tony Linthicum, et. al. +E: tlinth@codeaurora.org +D: Backend for Qualcomm's Hexagon VLIW processor. + +N: Bruno Cardoso Lopes +E: bruno.cardoso@gmail.com +I: bruno +W: http://brunocardoso.cc +D: Mips backend +D: Random ARM integrated assembler and assembly parser improvements +D: General X86 AVX1 support + +N: Duraid Madina +E: duraid@octopus.com.au +W: http://kinoko.c.u-tokyo.ac.jp/~duraid/ +D: IA64 backend, BigBlock register allocator + +N: John McCall +E: rjmccall@apple.com +D: Clang semantic analysis and IR generation + +N: Michael McCracken +E: michael.mccracken@gmail.com +D: Line number support for llvmgcc + +N: Vladimir Merzliakov +E: wanderer@rsu.ru +D: Test suite fixes for FreeBSD + +N: Scott Michel +E: scottm@aero.org +D: Added STI Cell SPU backend. + +N: Kai Nacke +E: kai@redstar.de +D: Support for implicit TLS model used with MS VC runtime +D: Dumping of Win64 EH structures + +N: Takumi Nakamura +E: geek4civic@gmail.com +E: chapuni@hf.rim.or.jp +D: Cygwin and MinGW support. +D: Win32 tweaks. +S: Yokohama, Japan + +N: Edward O'Callaghan +E: eocallaghan@auroraux.org +W: http://www.auroraux.org +D: Add Clang support with various other improvements to utils/NewNightlyTest.pl +D: Fix and maintain Solaris & AuroraUX support for llvm, various build warnings +D: and error clean ups. + +N: Morten Ofstad +E: morten@hue.no +D: Visual C++ compatibility fixes + +N: Jakob Stoklund Olesen +E: stoklund@2pi.dk +D: Machine code verifier +D: Blackfin backend +D: Fast register allocator +D: Greedy register allocator + +N: Richard Osborne +E: richard@xmos.com +D: XCore backend + +N: Devang Patel +E: dpatel@apple.com +D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate +D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements +D: Optimizer improvements, Loop Index Split + +N: Ana Pazos +E: apazos@codeaurora.org +D: Fixes and improvements to the AArch64 backend + +N: Wesley Peck +E: peckw@wesleypeck.com +W: http://wesleypeck.com/ +D: MicroBlaze backend + +N: Francois Pichet +E: pichet2000@gmail.com +D: MSVC support + +N: Vladimir Prus +W: http://vladimir_prus.blogspot.com +E: ghost@cs.msu.su +D: Made inst_iterator behave like a proper iterator, LowerConstantExprs pass + +N: Kalle Raiskila +E: kalle.rasikila@nokia.com +D: Some bugfixes to CellSPU + +N: Xerxes Ranby +E: xerxes@zafena.se +D: Cmake dependency chain and various bug fixes + +N: Alex Rosenberg +E: alexr@leftfield.org +I: arosenberg +D: ARM calling conventions rewrite, hard float support + +N: Chad Rosier +E: mcrosier@codeaurora.org +I: mcrosier +D: AArch64 fast instruction selection pass +D: Fixes and improvements to the ARM fast-isel pass +D: Fixes and improvements to the AArch64 backend + +N: Nadav Rotem +E: nrotem@apple.com +D: X86 code generation improvements, Loop Vectorizer. + +N: Roman Samoilov +E: roman@codedgers.com +D: MSIL backend + +N: Duncan Sands +E: baldrick@free.fr +I: baldrick +D: Ada support in llvm-gcc +D: Dragonegg plugin +D: Exception handling improvements +D: Type legalizer rewrite + +N: Ruchira Sasanka +E: sasanka@uiuc.edu +D: Graph coloring register allocator for the Sparc64 backend + +N: Arnold Schwaighofer +E: arnold.schwaighofer@gmail.com +D: Tail call optimization for the x86 backend + +N: Shantonu Sen +E: ssen@apple.com +D: Miscellaneous bug fixes + +N: Anand Shukla +E: ashukla@cs.uiuc.edu +D: The `paths' pass + +N: Michael J. Spencer +E: bigcheesegs@gmail.com +D: Shepherding Windows COFF support into MC. +D: Lots of Windows stuff. + +N: Reid Spencer +E: rspencer@reidspencer.com +W: http://reidspencer.com/ +D: Lots of stuff, see: http://wiki.llvm.org/index.php/User:Reid + +N: Alp Toker +E: alp@nuanti.com +W: http://atoker.com/ +D: C++ frontend next generation standards implementation + +N: Craig Topper +E: craig.topper@gmail.com +D: X86 codegen and disassembler improvements. AVX2 support. + +N: Edwin Torok +E: edwintorok@gmail.com +D: Miscellaneous bug fixes + +N: Adam Treat +E: manyoso@yahoo.com +D: C++ bugs filed, and C++ front-end bug fixes. + +N: Lauro Ramos Venancio +E: lauro.venancio@indt.org.br +D: ARM backend improvements +D: Thread Local Storage implementation + +N: Bill Wendling +I: wendling +E: isanbard@gmail.com +D: Release manager, IR Linker, LTO +D: Bunches of stuff + +N: Bob Wilson +E: bob.wilson@acm.org +D: Advanced SIMD (NEON) support in the ARM backend. + diff --git a/llvm/LICENSE.TXT b/llvm/LICENSE.TXT new file mode 100644 index 0000000..84090c0 --- /dev/null +++ b/llvm/LICENSE.TXT @@ -0,0 +1,70 @@ +============================================================================== +LLVM Release License +============================================================================== +University of Illinois/NCSA +Open Source License + +Copyright (c) 2003-2015 University of Illinois at Urbana-Champaign. +All rights reserved. + +Developed by: + + LLVM Team + + University of Illinois at Urbana-Champaign + + http://llvm.org + +Permission is hereby granted, free of charge, to any person obtaining a copy of +this software and associated documentation files (the "Software"), to deal with +the Software without restriction, including without limitation the rights to +use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies +of the Software, and to permit persons to whom the Software is furnished to do +so, subject to the following conditions: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimers. + + * Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimers in the + documentation and/or other materials provided with the distribution. + + * Neither the names of the LLVM Team, University of Illinois at + Urbana-Champaign, nor the names of its contributors may be used to + endorse or promote products derived from this Software without specific + prior written permission. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS +FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE +SOFTWARE. + +============================================================================== +Copyrights and Licenses for Third Party Software Distributed with LLVM: +============================================================================== +The LLVM software contains code written by third parties. Such software will +have its own individual LICENSE.TXT file in the directory in which it appears. +This file will describe the copyrights, license, and restrictions which apply +to that code. + +The disclaimer of warranty in the University of Illinois Open Source License +applies to all code in the LLVM Distribution, and nothing in any of the +other licenses gives permission to use the names of the LLVM Team or the +University of Illinois to endorse or promote products derived from this +Software. + +The following pieces of software have additional or alternate copyrights, +licenses, and/or restrictions: + +Program Directory +------- --------- +Autoconf llvm/autoconf + llvm/projects/ModuleMaker/autoconf +Google Test llvm/utils/unittest/googletest +OpenBSD regex llvm/lib/Support/{reg*, COPYRIGHT.regex} +pyyaml tests llvm/test/YAMLParser/{*.data, LICENSE.TXT} +ARM contributions llvm/lib/Target/ARM/LICENSE.TXT +md5 contributions llvm/lib/Support/MD5.cpp llvm/include/llvm/Support/MD5.h diff --git a/llvm/LLVMBuild.txt b/llvm/LLVMBuild.txt new file mode 100644 index 0000000..cbc0cdc --- /dev/null +++ b/llvm/LLVMBuild.txt @@ -0,0 +1,24 @@ +;===- ./LLVMBuild.txt ------------------------------------------*- Conf -*--===; +; +; The LLVM Compiler Infrastructure +; +; This file is distributed under the University of Illinois Open Source +; License. See LICENSE.TXT for details. +; +;===------------------------------------------------------------------------===; +; +; This is an LLVMBuild description file for the components in this subdirectory. +; +; For more information on the LLVMBuild system, please see: +; +; http://llvm.org/docs/LLVMBuild.html +; +;===------------------------------------------------------------------------===; + +[common] +subdirectories = lib + +[component_0] +type = Group +name = Miscellaneous +parent = $ROOT diff --git a/llvm/cmake/config-ix.cmake b/llvm/cmake/config-ix.cmake new file mode 100644 index 0000000..88bb66a --- /dev/null +++ b/llvm/cmake/config-ix.cmake @@ -0,0 +1,459 @@ +if( WIN32 AND NOT CYGWIN ) + # We consider Cygwin as another Unix + set(PURE_WINDOWS 1) +endif() + +include(CheckIncludeFile) +include(CheckIncludeFileCXX) +include(CheckLibraryExists) +include(CheckSymbolExists) +include(CheckFunctionExists) +include(CheckCXXSourceCompiles) +include(TestBigEndian) + +include(HandleLLVMStdlib) + +if( UNIX AND NOT BEOS ) + # Used by check_symbol_exists: + set(CMAKE_REQUIRED_LIBRARIES m) +endif() +# x86_64 FreeBSD 9.2 requires libcxxrt to be specified explicitly. +if( CMAKE_SYSTEM MATCHES "FreeBSD-9.2-RELEASE" AND + CMAKE_SIZEOF_VOID_P EQUAL 8 ) + list(APPEND CMAKE_REQUIRED_LIBRARIES "cxxrt") +endif() + +# Helper macros and functions +macro(add_cxx_include result files) + set(${result} "") + foreach (file_name ${files}) + set(${result} "${${result}}#include<${file_name}>\n") + endforeach() +endmacro(add_cxx_include files result) + +function(check_type_exists type files variable) + add_cxx_include(includes "${files}") + CHECK_CXX_SOURCE_COMPILES(" + ${includes} ${type} typeVar; + int main() { + return 0; + } + " ${variable}) +endfunction() + +# include checks +check_include_file(dirent.h HAVE_DIRENT_H) +check_include_file(dlfcn.h HAVE_DLFCN_H) +check_include_file(errno.h HAVE_ERRNO_H) +check_include_file(execinfo.h HAVE_EXECINFO_H) +check_include_file(fcntl.h HAVE_FCNTL_H) +check_include_file(inttypes.h HAVE_INTTYPES_H) +check_include_file(limits.h HAVE_LIMITS_H) +check_include_file(link.h HAVE_LINK_H) +check_include_file(malloc.h HAVE_MALLOC_H) +check_include_file(malloc/malloc.h HAVE_MALLOC_MALLOC_H) +check_include_file(ndir.h HAVE_NDIR_H) +if( NOT PURE_WINDOWS ) + check_include_file(pthread.h HAVE_PTHREAD_H) +endif() +check_include_file(signal.h HAVE_SIGNAL_H) +check_include_file(stdint.h HAVE_STDINT_H) +check_include_file(sys/dir.h HAVE_SYS_DIR_H) +check_include_file(sys/ioctl.h HAVE_SYS_IOCTL_H) +check_include_file(sys/mman.h HAVE_SYS_MMAN_H) +check_include_file(sys/ndir.h HAVE_SYS_NDIR_H) +check_include_file(sys/param.h HAVE_SYS_PARAM_H) +check_include_file(sys/resource.h HAVE_SYS_RESOURCE_H) +check_include_file(sys/stat.h HAVE_SYS_STAT_H) +check_include_file(sys/time.h HAVE_SYS_TIME_H) +check_include_file(sys/uio.h HAVE_SYS_UIO_H) +check_include_file(termios.h HAVE_TERMIOS_H) +check_include_file(unistd.h HAVE_UNISTD_H) +check_include_file(utime.h HAVE_UTIME_H) +check_include_file(zlib.h HAVE_ZLIB_H) +check_include_file(fenv.h HAVE_FENV_H) +check_symbol_exists(FE_ALL_EXCEPT "fenv.h" HAVE_DECL_FE_ALL_EXCEPT) +check_symbol_exists(FE_INEXACT "fenv.h" HAVE_DECL_FE_INEXACT) + +check_include_file(mach/mach.h HAVE_MACH_MACH_H) +check_include_file(mach-o/dyld.h HAVE_MACH_O_DYLD_H) +check_include_file(histedit.h HAVE_HISTEDIT_H) + +# size_t must be defined before including cxxabi.h on FreeBSD 10.0. +check_cxx_source_compiles(" +#include +#include +int main() { return 0; } +" HAVE_CXXABI_H) + +# library checks +if( NOT PURE_WINDOWS ) + check_library_exists(pthread pthread_create "" HAVE_LIBPTHREAD) + if (HAVE_LIBPTHREAD) + check_library_exists(pthread pthread_getspecific "" HAVE_PTHREAD_GETSPECIFIC) + check_library_exists(pthread pthread_rwlock_init "" HAVE_PTHREAD_RWLOCK_INIT) + check_library_exists(pthread pthread_mutex_lock "" HAVE_PTHREAD_MUTEX_LOCK) + else() + # this could be Android + check_library_exists(c pthread_create "" PTHREAD_IN_LIBC) + if (PTHREAD_IN_LIBC) + check_library_exists(c pthread_getspecific "" HAVE_PTHREAD_GETSPECIFIC) + check_library_exists(c pthread_rwlock_init "" HAVE_PTHREAD_RWLOCK_INIT) + check_library_exists(c pthread_mutex_lock "" HAVE_PTHREAD_MUTEX_LOCK) + endif() + endif() + check_library_exists(dl dlopen "" HAVE_LIBDL) + check_library_exists(rt clock_gettime "" HAVE_LIBRT) +endif() + +# Don't look for these libraries on Windows. Also don't look for them if we're +# using MSan, since uninstrmented third party code may call MSan interceptors +# like strlen, leading to false positives. +if( NOT PURE_WINDOWS AND NOT LLVM_USE_SANITIZER MATCHES "Memory.*") + if (LLVM_ENABLE_ZLIB) + check_library_exists(z compress2 "" HAVE_LIBZ) + else() + set(HAVE_LIBZ 0) + endif() + if (HAVE_HISTEDIT_H) + check_library_exists(edit el_init "" HAVE_LIBEDIT) + endif() + if(LLVM_ENABLE_TERMINFO) + set(HAVE_TERMINFO 0) + foreach(library tinfo terminfo curses ncurses ncursesw) + string(TOUPPER ${library} library_suffix) + check_library_exists(${library} setupterm "" HAVE_TERMINFO_${library_suffix}) + if(HAVE_TERMINFO_${library_suffix}) + set(HAVE_TERMINFO 1) + set(TERMINFO_LIBS "${library}") + break() + endif() + endforeach() + else() + set(HAVE_TERMINFO 0) + endif() +endif() + +# function checks +check_symbol_exists(arc4random "stdlib.h" HAVE_DECL_ARC4RANDOM) +check_symbol_exists(backtrace "execinfo.h" HAVE_BACKTRACE) +check_symbol_exists(getpagesize unistd.h HAVE_GETPAGESIZE) +check_symbol_exists(getrusage sys/resource.h HAVE_GETRUSAGE) +check_symbol_exists(setrlimit sys/resource.h HAVE_SETRLIMIT) +check_symbol_exists(isatty unistd.h HAVE_ISATTY) +check_symbol_exists(futimens sys/stat.h HAVE_FUTIMENS) +check_symbol_exists(futimes sys/time.h HAVE_FUTIMES) +if( HAVE_SETJMP_H ) + check_symbol_exists(longjmp setjmp.h HAVE_LONGJMP) + check_symbol_exists(setjmp setjmp.h HAVE_SETJMP) + check_symbol_exists(siglongjmp setjmp.h HAVE_SIGLONGJMP) + check_symbol_exists(sigsetjmp setjmp.h HAVE_SIGSETJMP) +endif() +if( HAVE_SYS_UIO_H ) + check_symbol_exists(writev sys/uio.h HAVE_WRITEV) +endif() +check_symbol_exists(mallctl malloc_np.h HAVE_MALLCTL) +check_symbol_exists(mallinfo malloc.h HAVE_MALLINFO) +check_symbol_exists(malloc_zone_statistics malloc/malloc.h + HAVE_MALLOC_ZONE_STATISTICS) +check_symbol_exists(mkdtemp "stdlib.h;unistd.h" HAVE_MKDTEMP) +check_symbol_exists(mkstemp "stdlib.h;unistd.h" HAVE_MKSTEMP) +check_symbol_exists(mktemp "stdlib.h;unistd.h" HAVE_MKTEMP) +check_symbol_exists(closedir "sys/types.h;dirent.h" HAVE_CLOSEDIR) +check_symbol_exists(opendir "sys/types.h;dirent.h" HAVE_OPENDIR) +check_symbol_exists(readdir "sys/types.h;dirent.h" HAVE_READDIR) +check_symbol_exists(getcwd unistd.h HAVE_GETCWD) +check_symbol_exists(gettimeofday sys/time.h HAVE_GETTIMEOFDAY) +check_symbol_exists(getrlimit "sys/types.h;sys/time.h;sys/resource.h" HAVE_GETRLIMIT) +check_symbol_exists(posix_spawn spawn.h HAVE_POSIX_SPAWN) +check_symbol_exists(pread unistd.h HAVE_PREAD) +check_symbol_exists(realpath stdlib.h HAVE_REALPATH) +check_symbol_exists(sbrk unistd.h HAVE_SBRK) +check_symbol_exists(srand48 stdlib.h HAVE_RAND48_SRAND48) +if( HAVE_RAND48_SRAND48 ) + check_symbol_exists(lrand48 stdlib.h HAVE_RAND48_LRAND48) + if( HAVE_RAND48_LRAND48 ) + check_symbol_exists(drand48 stdlib.h HAVE_RAND48_DRAND48) + if( HAVE_RAND48_DRAND48 ) + set(HAVE_RAND48 1 CACHE INTERNAL "are srand48/lrand48/drand48 available?") + endif() + endif() +endif() +check_symbol_exists(strtoll stdlib.h HAVE_STRTOLL) +check_symbol_exists(strtoq stdlib.h HAVE_STRTOQ) +check_symbol_exists(strerror string.h HAVE_STRERROR) +check_symbol_exists(strerror_r string.h HAVE_STRERROR_R) +check_symbol_exists(strerror_s string.h HAVE_DECL_STRERROR_S) +check_symbol_exists(setenv stdlib.h HAVE_SETENV) +if( PURE_WINDOWS ) + check_symbol_exists(_chsize_s io.h HAVE__CHSIZE_S) + + check_function_exists(_alloca HAVE__ALLOCA) + check_function_exists(__alloca HAVE___ALLOCA) + check_function_exists(__chkstk HAVE___CHKSTK) + check_function_exists(__chkstk_ms HAVE___CHKSTK_MS) + check_function_exists(___chkstk HAVE____CHKSTK) + check_function_exists(___chkstk_ms HAVE____CHKSTK_MS) + + check_function_exists(__ashldi3 HAVE___ASHLDI3) + check_function_exists(__ashrdi3 HAVE___ASHRDI3) + check_function_exists(__divdi3 HAVE___DIVDI3) + check_function_exists(__fixdfdi HAVE___FIXDFDI) + check_function_exists(__fixsfdi HAVE___FIXSFDI) + check_function_exists(__floatdidf HAVE___FLOATDIDF) + check_function_exists(__lshrdi3 HAVE___LSHRDI3) + check_function_exists(__moddi3 HAVE___MODDI3) + check_function_exists(__udivdi3 HAVE___UDIVDI3) + check_function_exists(__umoddi3 HAVE___UMODDI3) + + check_function_exists(__main HAVE___MAIN) + check_function_exists(__cmpdi2 HAVE___CMPDI2) +endif() +if( HAVE_DLFCN_H ) + if( HAVE_LIBDL ) + list(APPEND CMAKE_REQUIRED_LIBRARIES dl) + endif() + check_symbol_exists(dlerror dlfcn.h HAVE_DLERROR) + check_symbol_exists(dlopen dlfcn.h HAVE_DLOPEN) + if( HAVE_LIBDL ) + list(REMOVE_ITEM CMAKE_REQUIRED_LIBRARIES dl) + endif() +endif() + +check_symbol_exists(__GLIBC__ stdio.h LLVM_USING_GLIBC) +if( LLVM_USING_GLIBC ) + add_llvm_definitions( -D_GNU_SOURCE ) +endif() + +set(headers "sys/types.h") + +if (HAVE_INTTYPES_H) + set(headers ${headers} "inttypes.h") +endif() + +if (HAVE_STDINT_H) + set(headers ${headers} "stdint.h") +endif() + +check_type_exists(int64_t "${headers}" HAVE_INT64_T) +check_type_exists(uint64_t "${headers}" HAVE_UINT64_T) +check_type_exists(u_int64_t "${headers}" HAVE_U_INT64_T) + +# available programs checks +function(llvm_find_program name) + string(TOUPPER ${name} NAME) + string(REGEX REPLACE "\\." "_" NAME ${NAME}) + + find_program(LLVM_PATH_${NAME} NAMES ${ARGV}) + mark_as_advanced(LLVM_PATH_${NAME}) + if(LLVM_PATH_${NAME}) + set(HAVE_${NAME} 1 CACHE INTERNAL "Is ${name} available ?") + mark_as_advanced(HAVE_${NAME}) + else(LLVM_PATH_${NAME}) + set(HAVE_${NAME} "" CACHE INTERNAL "Is ${name} available ?") + endif(LLVM_PATH_${NAME}) +endfunction() + +# Define LLVM_HAS_ATOMICS if gcc or MSVC atomic builtins are supported. +include(CheckAtomic) + +if( LLVM_ENABLE_PIC ) + set(ENABLE_PIC 1) +else() + set(ENABLE_PIC 0) + check_cxx_compiler_flag("-fno-pie" SUPPORTS_NO_PIE_FLAG) + if(SUPPORTS_NO_PIE_FLAG) + set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -fno-pie") + endif() +endif() + +check_cxx_compiler_flag("-Wno-variadic-macros" SUPPORTS_NO_VARIADIC_MACROS_FLAG) + +set(USE_NO_MAYBE_UNINITIALIZED 0) +set(USE_NO_UNINITIALIZED 0) + +# Disable gcc's potentially uninitialized use analysis as it presents lots of +# false positives. +if (CMAKE_COMPILER_IS_GNUCXX) + check_cxx_compiler_flag("-Wmaybe-uninitialized" HAS_MAYBE_UNINITIALIZED) + if (HAS_MAYBE_UNINITIALIZED) + set(USE_NO_MAYBE_UNINITIALIZED 1) + else() + # Only recent versions of gcc make the distinction between -Wuninitialized + # and -Wmaybe-uninitialized. If -Wmaybe-uninitialized isn't supported, just + # turn off all uninitialized use warnings. + check_cxx_compiler_flag("-Wuninitialized" HAS_UNINITIALIZED) + set(USE_NO_UNINITIALIZED ${HAS_UNINITIALIZED}) + endif() +endif() + +# By default, we target the host, but this can be overridden at CMake +# invocation time. +include(GetHostTriple) +get_host_triple(LLVM_INFERRED_HOST_TRIPLE) + +set(LLVM_HOST_TRIPLE "${LLVM_INFERRED_HOST_TRIPLE}" CACHE STRING + "Host on which LLVM binaries will run") + +# Determine the native architecture. +string(TOLOWER "${LLVM_TARGET_ARCH}" LLVM_NATIVE_ARCH) +if( LLVM_NATIVE_ARCH STREQUAL "host" ) + string(REGEX MATCH "^[^-]*" LLVM_NATIVE_ARCH ${LLVM_HOST_TRIPLE}) +endif () + +if (LLVM_NATIVE_ARCH MATCHES "i[2-6]86") + set(LLVM_NATIVE_ARCH X86) +elseif (LLVM_NATIVE_ARCH STREQUAL "x86") + set(LLVM_NATIVE_ARCH X86) +elseif (LLVM_NATIVE_ARCH STREQUAL "amd64") + set(LLVM_NATIVE_ARCH X86) +elseif (LLVM_NATIVE_ARCH STREQUAL "x86_64") + set(LLVM_NATIVE_ARCH X86) +elseif (LLVM_NATIVE_ARCH MATCHES "sparc") + set(LLVM_NATIVE_ARCH Sparc) +elseif (LLVM_NATIVE_ARCH MATCHES "powerpc") + set(LLVM_NATIVE_ARCH PowerPC) +elseif (LLVM_NATIVE_ARCH MATCHES "aarch64") + set(LLVM_NATIVE_ARCH AArch64) +elseif (LLVM_NATIVE_ARCH MATCHES "arm64") + set(LLVM_NATIVE_ARCH AArch64) +elseif (LLVM_NATIVE_ARCH MATCHES "arm") + set(LLVM_NATIVE_ARCH ARM) +elseif (LLVM_NATIVE_ARCH MATCHES "mips") + set(LLVM_NATIVE_ARCH Mips) +elseif (LLVM_NATIVE_ARCH MATCHES "xcore") + set(LLVM_NATIVE_ARCH XCore) +elseif (LLVM_NATIVE_ARCH MATCHES "msp430") + set(LLVM_NATIVE_ARCH MSP430) +elseif (LLVM_NATIVE_ARCH MATCHES "hexagon") + set(LLVM_NATIVE_ARCH Hexagon) +elseif (LLVM_NATIVE_ARCH MATCHES "s390x") + set(LLVM_NATIVE_ARCH SystemZ) +elseif (LLVM_NATIVE_ARCH MATCHES "wasm32") + set(LLVM_NATIVE_ARCH WebAssembly) +elseif (LLVM_NATIVE_ARCH MATCHES "wasm64") + set(LLVM_NATIVE_ARCH WebAssembly) +else () + message(FATAL_ERROR "Unknown architecture ${LLVM_NATIVE_ARCH}") +endif () + +# If build targets includes "host", then replace with native architecture. +list(FIND LLVM_TARGETS_TO_BUILD "host" idx) +if( NOT idx LESS 0 ) + list(REMOVE_AT LLVM_TARGETS_TO_BUILD ${idx}) + list(APPEND LLVM_TARGETS_TO_BUILD ${LLVM_NATIVE_ARCH}) + list(REMOVE_DUPLICATES LLVM_TARGETS_TO_BUILD) +endif() + +list(FIND LLVM_TARGETS_TO_BUILD ${LLVM_NATIVE_ARCH} NATIVE_ARCH_IDX) +if (NATIVE_ARCH_IDX EQUAL -1) + message(STATUS + "Native target ${LLVM_NATIVE_ARCH} is not selected; lli will not JIT code") +else () + message(STATUS "Native target architecture is ${LLVM_NATIVE_ARCH}") + set(LLVM_NATIVE_TARGET LLVMInitialize${LLVM_NATIVE_ARCH}Target) + set(LLVM_NATIVE_TARGETINFO LLVMInitialize${LLVM_NATIVE_ARCH}TargetInfo) + set(LLVM_NATIVE_TARGETMC LLVMInitialize${LLVM_NATIVE_ARCH}TargetMC) + set(LLVM_NATIVE_ASMPRINTER LLVMInitialize${LLVM_NATIVE_ARCH}AsmPrinter) + + # We don't have an ASM parser for all architectures yet. + if (EXISTS ${CMAKE_SOURCE_DIR}/lib/Target/${LLVM_NATIVE_ARCH}/AsmParser/CMakeLists.txt) + set(LLVM_NATIVE_ASMPARSER LLVMInitialize${LLVM_NATIVE_ARCH}AsmParser) + endif () + + # We don't have an disassembler for all architectures yet. + if (EXISTS ${CMAKE_SOURCE_DIR}/lib/Target/${LLVM_NATIVE_ARCH}/Disassembler/CMakeLists.txt) + set(LLVM_NATIVE_DISASSEMBLER LLVMInitialize${LLVM_NATIVE_ARCH}Disassembler) + endif () +endif () + +if( MINGW ) + set(HAVE_LIBPSAPI 1) + set(HAVE_LIBSHELL32 1) + # TODO: Check existence of libraries. + # include(CheckLibraryExists) +endif( MINGW ) + +if (NOT HAVE_STRTOLL) + # Use _strtoi64 if strtoll is not available. + check_symbol_exists(_strtoi64 stdlib.h have_strtoi64) + if (have_strtoi64) + set(HAVE_STRTOLL 1) + set(strtoll "_strtoi64") + set(strtoull "_strtoui64") + endif () +endif () + +if( MSVC ) + set(SHLIBEXT ".lib") + set(stricmp "_stricmp") + set(strdup "_strdup") + + # See if the DIA SDK is available and usable. + set(MSVC_DIA_SDK_DIR "$ENV{VSINSTALLDIR}DIA SDK") + + # Due to a bug in MSVC 2013's installation software, it is possible + # for MSVC 2013 to write the DIA SDK into the Visual Studio 2012 + # install directory. If this happens, the installation is corrupt + # and there's nothing we can do. It happens with enough frequency + # though that we should handle it. We do so by simply checking that + # the DIA SDK folder exists. Should this happen you will need to + # uninstall VS 2012 and then re-install VS 2013. + if (IS_DIRECTORY ${MSVC_DIA_SDK_DIR}) + set(HAVE_DIA_SDK 1) + else() + set(HAVE_DIA_SDK 0) + endif() +else() + set(HAVE_DIA_SDK 0) +endif( MSVC ) + +if( PURE_WINDOWS ) + CHECK_CXX_SOURCE_COMPILES(" + #include + #include + extern \"C\" void foo(PENUMLOADED_MODULES_CALLBACK); + extern \"C\" void foo(BOOL(CALLBACK*)(PCSTR,ULONG_PTR,ULONG,PVOID)); + int main(){return 0;}" + HAVE_ELMCB_PCSTR) + if( HAVE_ELMCB_PCSTR ) + set(WIN32_ELMCB_PCSTR "PCSTR") + else() + set(WIN32_ELMCB_PCSTR "PSTR") + endif() +endif( PURE_WINDOWS ) + +# FIXME: Signal handler return type, currently hardcoded to 'void' +set(RETSIGTYPE void) + +if( LLVM_ENABLE_THREADS ) + # Check if threading primitives aren't supported on this platform + if( NOT HAVE_PTHREAD_H AND NOT WIN32 ) + set(LLVM_ENABLE_THREADS 0) + endif() +endif() + +if( LLVM_ENABLE_THREADS ) + message(STATUS "Threads enabled.") +else( LLVM_ENABLE_THREADS ) + message(STATUS "Threads disabled.") +endif() + +if (LLVM_ENABLE_ZLIB ) + # Check if zlib is available in the system. + if ( NOT HAVE_ZLIB_H OR NOT HAVE_LIBZ ) + set(LLVM_ENABLE_ZLIB 0) + endif() +endif() + +set(LLVM_PREFIX ${CMAKE_INSTALL_PREFIX}) + +find_program(GOLD_EXECUTABLE NAMES ${LLVM_DEFAULT_TARGET_TRIPLE}-ld.gold ld.gold ${LLVM_DEFAULT_TARGET_TRIPLE}-ld ld DOC "The gold linker") +set(LLVM_BINUTILS_INCDIR "" CACHE PATH + "PATH to binutils/include containing plugin-api.h for gold plugin.") + +if(APPLE) + find_program(LD64_EXECUTABLE NAMES ld DOC "The ld64 linker") +endif() + +string(REPLACE " " ";" LLVM_BINDINGS_LIST "${LLVM_BINDINGS}") diff --git a/llvm/cmake/config.guess b/llvm/cmake/config.guess new file mode 100644 index 0000000..b209a1a --- /dev/null +++ b/llvm/cmake/config.guess @@ -0,0 +1,1529 @@ +#! /bin/sh +# Attempt to guess a canonical system name. +# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, +# 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, +# 2011 Free Software Foundation, Inc. + +timestamp='2011-08-20' + +# This file is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA +# 02110-1301, USA. +# +# As a special exception to the GNU General Public License, if you +# distribute this file as part of a program that contains a +# configuration script generated by Autoconf, you may include it under +# the same distribution terms that you use for the rest of that program. + + +# Originally written by Per Bothner. Please send patches (context +# diff format) to and include a ChangeLog +# entry. +# +# This script attempts to guess a canonical system name similar to +# config.sub. If it succeeds, it prints the system name on stdout, and +# exits with 0. Otherwise, it exits with 1. +# +# You can get the latest version of this script from: +# http://git.savannah.gnu.org/gitweb/?p=config.git;a=blob_plain;f=config.guess;hb=HEAD + +me=`echo "$0" | sed -e 's,.*/,,'` + +usage="\ +Usage: $0 [OPTION] + +Output the configuration name of the system \`$me' is run on. + +Operation modes: + -h, --help print this help, then exit + -t, --time-stamp print date of last modification, then exit + -v, --version print version number, then exit + +Report bugs and patches to ." + +version="\ +GNU config.guess ($timestamp) + +Originally written by Per Bothner. +Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, +2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free +Software Foundation, Inc. + +This is free software; see the source for copying conditions. There is NO +warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE." + +help=" +Try \`$me --help' for more information." + +# Parse command line +while test $# -gt 0 ; do + case $1 in + --time-stamp | --time* | -t ) + echo "$timestamp" ; exit ;; + --version | -v ) + echo "$version" ; exit ;; + --help | --h* | -h ) + echo "$usage"; exit ;; + -- ) # Stop option processing + shift; break ;; + - ) # Use stdin as input. + break ;; + -* ) + echo "$me: invalid option $1$help" >&2 + exit 1 ;; + * ) + break ;; + esac +done + +if test $# != 0; then + echo "$me: too many arguments$help" >&2 + exit 1 +fi + +trap 'exit 1' 1 2 15 + +# CC_FOR_BUILD -- compiler used by this script. Note that the use of a +# compiler to aid in system detection is discouraged as it requires +# temporary files to be created and, as you can see below, it is a +# headache to deal with in a portable fashion. + +# Historically, `CC_FOR_BUILD' used to be named `HOST_CC'. We still +# use `HOST_CC' if defined, but it is deprecated. + +# Portable tmp directory creation inspired by the Autoconf team. + +set_cc_for_build=' +trap "exitcode=\$?; (rm -f \$tmpfiles 2>/dev/null; rmdir \$tmp 2>/dev/null) && exit \$exitcode" 0 ; +trap "rm -f \$tmpfiles 2>/dev/null; rmdir \$tmp 2>/dev/null; exit 1" 1 2 13 15 ; +: ${TMPDIR=/tmp} ; + { tmp=`(umask 077 && mktemp -d "$TMPDIR/cgXXXXXX") 2>/dev/null` && test -n "$tmp" && test -d "$tmp" ; } || + { test -n "$RANDOM" && tmp=$TMPDIR/cg$$-$RANDOM && (umask 077 && mkdir $tmp) ; } || + { tmp=$TMPDIR/cg-$$ && (umask 077 && mkdir $tmp) && echo "Warning: creating insecure temp directory" >&2 ; } || + { echo "$me: cannot create a temporary directory in $TMPDIR" >&2 ; exit 1 ; } ; +dummy=$tmp/dummy ; +tmpfiles="$dummy.c $dummy.o $dummy.rel $dummy" ; +case $CC_FOR_BUILD,$HOST_CC,$CC in + ,,) echo "int x;" > $dummy.c ; + for c in cc gcc c89 c99 ; do + if ($c -c -o $dummy.o $dummy.c) >/dev/null 2>&1 ; then + CC_FOR_BUILD="$c"; break ; + fi ; + done ; + if test x"$CC_FOR_BUILD" = x ; then + CC_FOR_BUILD=no_compiler_found ; + fi + ;; + ,,*) CC_FOR_BUILD=$CC ;; + ,*,*) CC_FOR_BUILD=$HOST_CC ;; +esac ; set_cc_for_build= ;' + +# This is needed to find uname on a Pyramid OSx when run in the BSD universe. +# (ghazi@noc.rutgers.edu 1994-08-24) +if (test -f /.attbin/uname) >/dev/null 2>&1 ; then + PATH=$PATH:/.attbin ; export PATH +fi + +UNAME_MACHINE=`(uname -m) 2>/dev/null` || UNAME_MACHINE=unknown +UNAME_RELEASE=`(uname -r) 2>/dev/null` || UNAME_RELEASE=unknown +UNAME_SYSTEM=`(uname -s) 2>/dev/null` || UNAME_SYSTEM=unknown +UNAME_VERSION=`(uname -v) 2>/dev/null` || UNAME_VERSION=unknown + +# Note: order is significant - the case branches are not exclusive. + +case "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" in + *:NetBSD:*:*) + # NetBSD (nbsd) targets should (where applicable) match one or + # more of the tupples: *-*-netbsdelf*, *-*-netbsdaout*, + # *-*-netbsdecoff* and *-*-netbsd*. For targets that recently + # switched to ELF, *-*-netbsd* would select the old + # object file format. This provides both forward + # compatibility and a consistent mechanism for selecting the + # object file format. + # + # Note: NetBSD doesn't particularly care about the vendor + # portion of the name. We always set it to "unknown". + sysctl="sysctl -n hw.machine_arch" + UNAME_MACHINE_ARCH=`(/sbin/$sysctl 2>/dev/null || \ + /usr/sbin/$sysctl 2>/dev/null || echo unknown)` + case "${UNAME_MACHINE_ARCH}" in + armeb) machine=armeb-unknown ;; + arm*) machine=arm-unknown ;; + sh3el) machine=shl-unknown ;; + sh3eb) machine=sh-unknown ;; + sh5el) machine=sh5le-unknown ;; + *) machine=${UNAME_MACHINE_ARCH}-unknown ;; + esac + # The Operating System including object format, if it has switched + # to ELF recently, or will in the future. + case "${UNAME_MACHINE_ARCH}" in + arm*|i386|m68k|ns32k|sh3*|sparc|vax) + eval $set_cc_for_build + if echo __ELF__ | $CC_FOR_BUILD -E - 2>/dev/null \ + | grep -q __ELF__ + then + # Once all utilities can be ECOFF (netbsdecoff) or a.out (netbsdaout). + # Return netbsd for either. FIX? + os=netbsd + else + os=netbsdelf + fi + ;; + *) + os=netbsd + ;; + esac + # The OS release + # Debian GNU/NetBSD machines have a different userland, and + # thus, need a distinct triplet. However, they do not need + # kernel version information, so it can be replaced with a + # suitable tag, in the style of linux-gnu. + case "${UNAME_VERSION}" in + Debian*) + release='-gnu' + ;; + *) + release=`echo ${UNAME_RELEASE}|sed -e 's/[-_].*/\./'` + ;; + esac + # Since CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM: + # contains redundant information, the shorter form: + # CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM is used. + echo "${machine}-${os}${release}" + exit ;; + *:OpenBSD:*:*) + UNAME_MACHINE_ARCH=`arch | sed 's/OpenBSD.//'` + echo ${UNAME_MACHINE_ARCH}-unknown-openbsd${UNAME_RELEASE} + exit ;; + *:Bitrig:*:*) + UNAME_MACHINE_ARCH=`arch | sed 's/Bitrig.//'` + echo ${UNAME_MACHINE_ARCH}-unknown-bitrig${UNAME_RELEASE} + exit ;; + *:ekkoBSD:*:*) + echo ${UNAME_MACHINE}-unknown-ekkobsd${UNAME_RELEASE} + exit ;; + *:SolidBSD:*:*) + echo ${UNAME_MACHINE}-unknown-solidbsd${UNAME_RELEASE} + exit ;; + macppc:MirBSD:*:*) + echo powerpc-unknown-mirbsd${UNAME_RELEASE} + exit ;; + *:MirBSD:*:*) + echo ${UNAME_MACHINE}-unknown-mirbsd${UNAME_RELEASE} + exit ;; + alpha:OSF1:*:*) + case $UNAME_RELEASE in + *4.0) + UNAME_RELEASE=`/usr/sbin/sizer -v | awk '{print $3}'` + ;; + *5.*) + UNAME_RELEASE=`/usr/sbin/sizer -v | awk '{print $4}'` + ;; + esac + # According to Compaq, /usr/sbin/psrinfo has been available on + # OSF/1 and Tru64 systems produced since 1995. I hope that + # covers most systems running today. This code pipes the CPU + # types through head -n 1, so we only detect the type of CPU 0. + ALPHA_CPU_TYPE=`/usr/sbin/psrinfo -v | sed -n -e 's/^ The alpha \(.*\) processor.*$/\1/p' | head -n 1` + case "$ALPHA_CPU_TYPE" in + "EV4 (21064)") + UNAME_MACHINE="alpha" ;; + "EV4.5 (21064)") + UNAME_MACHINE="alpha" ;; + "LCA4 (21066/21068)") + UNAME_MACHINE="alpha" ;; + "EV5 (21164)") + UNAME_MACHINE="alphaev5" ;; + "EV5.6 (21164A)") + UNAME_MACHINE="alphaev56" ;; + "EV5.6 (21164PC)") + UNAME_MACHINE="alphapca56" ;; + "EV5.7 (21164PC)") + UNAME_MACHINE="alphapca57" ;; + "EV6 (21264)") + UNAME_MACHINE="alphaev6" ;; + "EV6.7 (21264A)") + UNAME_MACHINE="alphaev67" ;; + "EV6.8CB (21264C)") + UNAME_MACHINE="alphaev68" ;; + "EV6.8AL (21264B)") + UNAME_MACHINE="alphaev68" ;; + "EV6.8CX (21264D)") + UNAME_MACHINE="alphaev68" ;; + "EV6.9A (21264/EV69A)") + UNAME_MACHINE="alphaev69" ;; + "EV7 (21364)") + UNAME_MACHINE="alphaev7" ;; + "EV7.9 (21364A)") + UNAME_MACHINE="alphaev79" ;; + esac + # A Pn.n version is a patched version. + # A Vn.n version is a released version. + # A Tn.n version is a released field test version. + # A Xn.n version is an unreleased experimental baselevel. + # 1.2 uses "1.2" for uname -r. + echo ${UNAME_MACHINE}-dec-osf`echo ${UNAME_RELEASE} | sed -e 's/^[PVTX]//' | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz'` + # Reset EXIT trap before exiting to avoid spurious non-zero exit code. + exitcode=$? + trap '' 0 + exit $exitcode ;; + Alpha\ *:Windows_NT*:*) + # How do we know it's Interix rather than the generic POSIX subsystem? + # Should we change UNAME_MACHINE based on the output of uname instead + # of the specific Alpha model? + echo alpha-pc-interix + exit ;; + 21064:Windows_NT:50:3) + echo alpha-dec-winnt3.5 + exit ;; + Amiga*:UNIX_System_V:4.0:*) + echo m68k-unknown-sysv4 + exit ;; + *:[Aa]miga[Oo][Ss]:*:*) + echo ${UNAME_MACHINE}-unknown-amigaos + exit ;; + *:[Mm]orph[Oo][Ss]:*:*) + echo ${UNAME_MACHINE}-unknown-morphos + exit ;; + *:OS/390:*:*) + echo i370-ibm-openedition + exit ;; + *:z/VM:*:*) + echo s390-ibm-zvmoe + exit ;; + *:OS400:*:*) + echo powerpc-ibm-os400 + exit ;; + arm:RISC*:1.[012]*:*|arm:riscix:1.[012]*:*) + echo arm-acorn-riscix${UNAME_RELEASE} + exit ;; + arm:riscos:*:*|arm:RISCOS:*:*) + echo arm-unknown-riscos + exit ;; + SR2?01:HI-UX/MPP:*:* | SR8000:HI-UX/MPP:*:*) + echo hppa1.1-hitachi-hiuxmpp + exit ;; + Pyramid*:OSx*:*:* | MIS*:OSx*:*:* | MIS*:SMP_DC-OSx*:*:*) + # akee@wpdis03.wpafb.af.mil (Earle F. Ake) contributed MIS and NILE. + if test "`(/bin/universe) 2>/dev/null`" = att ; then + echo pyramid-pyramid-sysv3 + else + echo pyramid-pyramid-bsd + fi + exit ;; + NILE*:*:*:dcosx) + echo pyramid-pyramid-svr4 + exit ;; + DRS?6000:unix:4.0:6*) + echo sparc-icl-nx6 + exit ;; + DRS?6000:UNIX_SV:4.2*:7* | DRS?6000:isis:4.2*:7*) + case `/usr/bin/uname -p` in + sparc) echo sparc-icl-nx7; exit ;; + esac ;; + s390x:SunOS:*:*) + echo ${UNAME_MACHINE}-ibm-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` + exit ;; + sun4H:SunOS:5.*:*) + echo sparc-hal-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` + exit ;; + sun4*:SunOS:5.*:* | tadpole*:SunOS:5.*:*) + echo sparc-sun-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` + exit ;; + i86pc:AuroraUX:5.*:* | i86xen:AuroraUX:5.*:*) + echo i386-pc-auroraux${UNAME_RELEASE} + exit ;; + i86pc:SunOS:5.*:* | i86xen:SunOS:5.*:*) + eval $set_cc_for_build + SUN_ARCH="i386" + # If there is a compiler, see if it is configured for 64-bit objects. + # Note that the Sun cc does not turn __LP64__ into 1 like gcc does. + # This test works for both compilers. + if [ "$CC_FOR_BUILD" != 'no_compiler_found' ]; then + if (echo '#ifdef __amd64'; echo IS_64BIT_ARCH; echo '#endif') | \ + (CCOPTS= $CC_FOR_BUILD -E - 2>/dev/null) | \ + grep IS_64BIT_ARCH >/dev/null + then + SUN_ARCH="x86_64" + fi + fi + echo ${SUN_ARCH}-pc-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` + exit ;; + sun4*:SunOS:6*:*) + # According to config.sub, this is the proper way to canonicalize + # SunOS6. Hard to guess exactly what SunOS6 will be like, but + # it's likely to be more like Solaris than SunOS4. + echo sparc-sun-solaris3`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` + exit ;; + sun4*:SunOS:*:*) + case "`/usr/bin/arch -k`" in + Series*|S4*) + UNAME_RELEASE=`uname -v` + ;; + esac + # Japanese Language versions have a version number like `4.1.3-JL'. + echo sparc-sun-sunos`echo ${UNAME_RELEASE}|sed -e 's/-/_/'` + exit ;; + sun3*:SunOS:*:*) + echo m68k-sun-sunos${UNAME_RELEASE} + exit ;; + sun*:*:4.2BSD:*) + UNAME_RELEASE=`(sed 1q /etc/motd | awk '{print substr($5,1,3)}') 2>/dev/null` + test "x${UNAME_RELEASE}" = "x" && UNAME_RELEASE=3 + case "`/bin/arch`" in + sun3) + echo m68k-sun-sunos${UNAME_RELEASE} + ;; + sun4) + echo sparc-sun-sunos${UNAME_RELEASE} + ;; + esac + exit ;; + aushp:SunOS:*:*) + echo sparc-auspex-sunos${UNAME_RELEASE} + exit ;; + # The situation for MiNT is a little confusing. The machine name + # can be virtually everything (everything which is not + # "atarist" or "atariste" at least should have a processor + # > m68000). The system name ranges from "MiNT" over "FreeMiNT" + # to the lowercase version "mint" (or "freemint"). Finally + # the system name "TOS" denotes a system which is actually not + # MiNT. But MiNT is downward compatible to TOS, so this should + # be no problem. + atarist[e]:*MiNT:*:* | atarist[e]:*mint:*:* | atarist[e]:*TOS:*:*) + echo m68k-atari-mint${UNAME_RELEASE} + exit ;; + atari*:*MiNT:*:* | atari*:*mint:*:* | atarist[e]:*TOS:*:*) + echo m68k-atari-mint${UNAME_RELEASE} + exit ;; + *falcon*:*MiNT:*:* | *falcon*:*mint:*:* | *falcon*:*TOS:*:*) + echo m68k-atari-mint${UNAME_RELEASE} + exit ;; + milan*:*MiNT:*:* | milan*:*mint:*:* | *milan*:*TOS:*:*) + echo m68k-milan-mint${UNAME_RELEASE} + exit ;; + hades*:*MiNT:*:* | hades*:*mint:*:* | *hades*:*TOS:*:*) + echo m68k-hades-mint${UNAME_RELEASE} + exit ;; + *:*MiNT:*:* | *:*mint:*:* | *:*TOS:*:*) + echo m68k-unknown-mint${UNAME_RELEASE} + exit ;; + m68k:machten:*:*) + echo m68k-apple-machten${UNAME_RELEASE} + exit ;; + powerpc:machten:*:*) + echo powerpc-apple-machten${UNAME_RELEASE} + exit ;; + RISC*:Mach:*:*) + echo mips-dec-mach_bsd4.3 + exit ;; + RISC*:ULTRIX:*:*) + echo mips-dec-ultrix${UNAME_RELEASE} + exit ;; + VAX*:ULTRIX*:*:*) + echo vax-dec-ultrix${UNAME_RELEASE} + exit ;; + 2020:CLIX:*:* | 2430:CLIX:*:*) + echo clipper-intergraph-clix${UNAME_RELEASE} + exit ;; + mips:*:*:UMIPS | mips:*:*:RISCos) + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c +#ifdef __cplusplus +#include /* for printf() prototype */ + int main (int argc, char *argv[]) { +#else + int main (argc, argv) int argc; char *argv[]; { +#endif + #if defined (host_mips) && defined (MIPSEB) + #if defined (SYSTYPE_SYSV) + printf ("mips-mips-riscos%ssysv\n", argv[1]); exit (0); + #endif + #if defined (SYSTYPE_SVR4) + printf ("mips-mips-riscos%ssvr4\n", argv[1]); exit (0); + #endif + #if defined (SYSTYPE_BSD43) || defined(SYSTYPE_BSD) + printf ("mips-mips-riscos%sbsd\n", argv[1]); exit (0); + #endif + #endif + exit (-1); + } +EOF + $CC_FOR_BUILD -o $dummy $dummy.c && + dummyarg=`echo "${UNAME_RELEASE}" | sed -n 's/\([0-9]*\).*/\1/p'` && + SYSTEM_NAME=`$dummy $dummyarg` && + { echo "$SYSTEM_NAME"; exit; } + echo mips-mips-riscos${UNAME_RELEASE} + exit ;; + Motorola:PowerMAX_OS:*:*) + echo powerpc-motorola-powermax + exit ;; + Motorola:*:4.3:PL8-*) + echo powerpc-harris-powermax + exit ;; + Night_Hawk:*:*:PowerMAX_OS | Synergy:PowerMAX_OS:*:*) + echo powerpc-harris-powermax + exit ;; + Night_Hawk:Power_UNIX:*:*) + echo powerpc-harris-powerunix + exit ;; + m88k:CX/UX:7*:*) + echo m88k-harris-cxux7 + exit ;; + m88k:*:4*:R4*) + echo m88k-motorola-sysv4 + exit ;; + m88k:*:3*:R3*) + echo m88k-motorola-sysv3 + exit ;; + AViiON:dgux:*:*) + # DG/UX returns AViiON for all architectures + UNAME_PROCESSOR=`/usr/bin/uname -p` + if [ $UNAME_PROCESSOR = mc88100 ] || [ $UNAME_PROCESSOR = mc88110 ] + then + if [ ${TARGET_BINARY_INTERFACE}x = m88kdguxelfx ] || \ + [ ${TARGET_BINARY_INTERFACE}x = x ] + then + echo m88k-dg-dgux${UNAME_RELEASE} + else + echo m88k-dg-dguxbcs${UNAME_RELEASE} + fi + else + echo i586-dg-dgux${UNAME_RELEASE} + fi + exit ;; + M88*:DolphinOS:*:*) # DolphinOS (SVR3) + echo m88k-dolphin-sysv3 + exit ;; + M88*:*:R3*:*) + # Delta 88k system running SVR3 + echo m88k-motorola-sysv3 + exit ;; + XD88*:*:*:*) # Tektronix XD88 system running UTekV (SVR3) + echo m88k-tektronix-sysv3 + exit ;; + Tek43[0-9][0-9]:UTek:*:*) # Tektronix 4300 system running UTek (BSD) + echo m68k-tektronix-bsd + exit ;; + *:IRIX*:*:*) + echo mips-sgi-irix`echo ${UNAME_RELEASE}|sed -e 's/-/_/g'` + exit ;; + ????????:AIX?:[12].1:2) # AIX 2.2.1 or AIX 2.1.1 is RT/PC AIX. + echo romp-ibm-aix # uname -m gives an 8 hex-code CPU id + exit ;; # Note that: echo "'`uname -s`'" gives 'AIX ' + i*86:AIX:*:*) + echo i386-ibm-aix + exit ;; + ia64:AIX:*:*) + if [ -x /usr/bin/oslevel ] ; then + IBM_REV=`/usr/bin/oslevel` + else + IBM_REV=${UNAME_VERSION}.${UNAME_RELEASE} + fi + echo ${UNAME_MACHINE}-ibm-aix${IBM_REV} + exit ;; + *:AIX:2:3) + if grep bos325 /usr/include/stdio.h >/dev/null 2>&1; then + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c + #include + + main() + { + if (!__power_pc()) + exit(1); + puts("powerpc-ibm-aix3.2.5"); + exit(0); + } +EOF + if $CC_FOR_BUILD -o $dummy $dummy.c && SYSTEM_NAME=`$dummy` + then + echo "$SYSTEM_NAME" + else + echo rs6000-ibm-aix3.2.5 + fi + elif grep bos324 /usr/include/stdio.h >/dev/null 2>&1; then + echo rs6000-ibm-aix3.2.4 + else + echo rs6000-ibm-aix3.2 + fi + exit ;; + *:AIX:*:[4567]) + IBM_CPU_ID=`/usr/sbin/lsdev -C -c processor -S available | sed 1q | awk '{ print $1 }'` + if /usr/sbin/lsattr -El ${IBM_CPU_ID} | grep ' POWER' >/dev/null 2>&1; then + IBM_ARCH=rs6000 + else + IBM_ARCH=powerpc + fi + if [ -x /usr/bin/oslevel ] ; then + IBM_REV=`/usr/bin/oslevel` + else + IBM_REV=${UNAME_VERSION}.${UNAME_RELEASE} + fi + echo ${IBM_ARCH}-ibm-aix${IBM_REV} + exit ;; + *:AIX:*:*) + echo rs6000-ibm-aix + exit ;; + ibmrt:4.4BSD:*|romp-ibm:BSD:*) + echo romp-ibm-bsd4.4 + exit ;; + ibmrt:*BSD:*|romp-ibm:BSD:*) # covers RT/PC BSD and + echo romp-ibm-bsd${UNAME_RELEASE} # 4.3 with uname added to + exit ;; # report: romp-ibm BSD 4.3 + *:BOSX:*:*) + echo rs6000-bull-bosx + exit ;; + DPX/2?00:B.O.S.:*:*) + echo m68k-bull-sysv3 + exit ;; + 9000/[34]??:4.3bsd:1.*:*) + echo m68k-hp-bsd + exit ;; + hp300:4.4BSD:*:* | 9000/[34]??:4.3bsd:2.*:*) + echo m68k-hp-bsd4.4 + exit ;; + 9000/[34678]??:HP-UX:*:*) + HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'` + case "${UNAME_MACHINE}" in + 9000/31? ) HP_ARCH=m68000 ;; + 9000/[34]?? ) HP_ARCH=m68k ;; + 9000/[678][0-9][0-9]) + if [ -x /usr/bin/getconf ]; then + sc_cpu_version=`/usr/bin/getconf SC_CPU_VERSION 2>/dev/null` + sc_kernel_bits=`/usr/bin/getconf SC_KERNEL_BITS 2>/dev/null` + case "${sc_cpu_version}" in + 523) HP_ARCH="hppa1.0" ;; # CPU_PA_RISC1_0 + 528) HP_ARCH="hppa1.1" ;; # CPU_PA_RISC1_1 + 532) # CPU_PA_RISC2_0 + case "${sc_kernel_bits}" in + 32) HP_ARCH="hppa2.0n" ;; + 64) HP_ARCH="hppa2.0w" ;; + '') HP_ARCH="hppa2.0" ;; # HP-UX 10.20 + esac ;; + esac + fi + if [ "${HP_ARCH}" = "" ]; then + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c + + #define _HPUX_SOURCE + #include + #include + + int main () + { + #if defined(_SC_KERNEL_BITS) + long bits = sysconf(_SC_KERNEL_BITS); + #endif + long cpu = sysconf (_SC_CPU_VERSION); + + switch (cpu) + { + case CPU_PA_RISC1_0: puts ("hppa1.0"); break; + case CPU_PA_RISC1_1: puts ("hppa1.1"); break; + case CPU_PA_RISC2_0: + #if defined(_SC_KERNEL_BITS) + switch (bits) + { + case 64: puts ("hppa2.0w"); break; + case 32: puts ("hppa2.0n"); break; + default: puts ("hppa2.0"); break; + } break; + #else /* !defined(_SC_KERNEL_BITS) */ + puts ("hppa2.0"); break; + #endif + default: puts ("hppa1.0"); break; + } + exit (0); + } +EOF + (CCOPTS= $CC_FOR_BUILD -o $dummy $dummy.c 2>/dev/null) && HP_ARCH=`$dummy` + test -z "$HP_ARCH" && HP_ARCH=hppa + fi ;; + esac + if [ ${HP_ARCH} = "hppa2.0w" ] + then + eval $set_cc_for_build + + # hppa2.0w-hp-hpux* has a 64-bit kernel and a compiler generating + # 32-bit code. hppa64-hp-hpux* has the same kernel and a compiler + # generating 64-bit code. GNU and HP use different nomenclature: + # + # $ CC_FOR_BUILD=cc ./config.guess + # => hppa2.0w-hp-hpux11.23 + # $ CC_FOR_BUILD="cc +DA2.0w" ./config.guess + # => hppa64-hp-hpux11.23 + + if echo __LP64__ | (CCOPTS= $CC_FOR_BUILD -E - 2>/dev/null) | + grep -q __LP64__ + then + HP_ARCH="hppa2.0w" + else + HP_ARCH="hppa64" + fi + fi + echo ${HP_ARCH}-hp-hpux${HPUX_REV} + exit ;; + ia64:HP-UX:*:*) + HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'` + echo ia64-hp-hpux${HPUX_REV} + exit ;; + 3050*:HI-UX:*:*) + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c + #include + int + main () + { + long cpu = sysconf (_SC_CPU_VERSION); + /* The order matters, because CPU_IS_HP_MC68K erroneously returns + true for CPU_PA_RISC1_0. CPU_IS_PA_RISC returns correct + results, however. */ + if (CPU_IS_PA_RISC (cpu)) + { + switch (cpu) + { + case CPU_PA_RISC1_0: puts ("hppa1.0-hitachi-hiuxwe2"); break; + case CPU_PA_RISC1_1: puts ("hppa1.1-hitachi-hiuxwe2"); break; + case CPU_PA_RISC2_0: puts ("hppa2.0-hitachi-hiuxwe2"); break; + default: puts ("hppa-hitachi-hiuxwe2"); break; + } + } + else if (CPU_IS_HP_MC68K (cpu)) + puts ("m68k-hitachi-hiuxwe2"); + else puts ("unknown-hitachi-hiuxwe2"); + exit (0); + } +EOF + $CC_FOR_BUILD -o $dummy $dummy.c && SYSTEM_NAME=`$dummy` && + { echo "$SYSTEM_NAME"; exit; } + echo unknown-hitachi-hiuxwe2 + exit ;; + 9000/7??:4.3bsd:*:* | 9000/8?[79]:4.3bsd:*:* ) + echo hppa1.1-hp-bsd + exit ;; + 9000/8??:4.3bsd:*:*) + echo hppa1.0-hp-bsd + exit ;; + *9??*:MPE/iX:*:* | *3000*:MPE/iX:*:*) + echo hppa1.0-hp-mpeix + exit ;; + hp7??:OSF1:*:* | hp8?[79]:OSF1:*:* ) + echo hppa1.1-hp-osf + exit ;; + hp8??:OSF1:*:*) + echo hppa1.0-hp-osf + exit ;; + i*86:OSF1:*:*) + if [ -x /usr/sbin/sysversion ] ; then + echo ${UNAME_MACHINE}-unknown-osf1mk + else + echo ${UNAME_MACHINE}-unknown-osf1 + fi + exit ;; + parisc*:Lites*:*:*) + echo hppa1.1-hp-lites + exit ;; + C1*:ConvexOS:*:* | convex:ConvexOS:C1*:*) + echo c1-convex-bsd + exit ;; + C2*:ConvexOS:*:* | convex:ConvexOS:C2*:*) + if getsysinfo -f scalar_acc + then echo c32-convex-bsd + else echo c2-convex-bsd + fi + exit ;; + C34*:ConvexOS:*:* | convex:ConvexOS:C34*:*) + echo c34-convex-bsd + exit ;; + C38*:ConvexOS:*:* | convex:ConvexOS:C38*:*) + echo c38-convex-bsd + exit ;; + C4*:ConvexOS:*:* | convex:ConvexOS:C4*:*) + echo c4-convex-bsd + exit ;; + CRAY*Y-MP:*:*:*) + echo ymp-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' + exit ;; + CRAY*[A-Z]90:*:*:*) + echo ${UNAME_MACHINE}-cray-unicos${UNAME_RELEASE} \ + | sed -e 's/CRAY.*\([A-Z]90\)/\1/' \ + -e y/ABCDEFGHIJKLMNOPQRSTUVWXYZ/abcdefghijklmnopqrstuvwxyz/ \ + -e 's/\.[^.]*$/.X/' + exit ;; + CRAY*TS:*:*:*) + echo t90-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' + exit ;; + CRAY*T3E:*:*:*) + echo alphaev5-cray-unicosmk${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' + exit ;; + CRAY*SV1:*:*:*) + echo sv1-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' + exit ;; + *:UNICOS/mp:*:*) + echo craynv-cray-unicosmp${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' + exit ;; + F30[01]:UNIX_System_V:*:* | F700:UNIX_System_V:*:*) + FUJITSU_PROC=`uname -m | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz'` + FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'` + FUJITSU_REL=`echo ${UNAME_RELEASE} | sed -e 's/ /_/'` + echo "${FUJITSU_PROC}-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" + exit ;; + 5000:UNIX_System_V:4.*:*) + FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'` + FUJITSU_REL=`echo ${UNAME_RELEASE} | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/ /_/'` + echo "sparc-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" + exit ;; + i*86:BSD/386:*:* | i*86:BSD/OS:*:* | *:Ascend\ Embedded/OS:*:*) + echo ${UNAME_MACHINE}-pc-bsdi${UNAME_RELEASE} + exit ;; + sparc*:BSD/OS:*:*) + echo sparc-unknown-bsdi${UNAME_RELEASE} + exit ;; + *:BSD/OS:*:*) + echo ${UNAME_MACHINE}-unknown-bsdi${UNAME_RELEASE} + exit ;; + *:FreeBSD:*:*) + UNAME_PROCESSOR=`/usr/bin/uname -p` + case ${UNAME_PROCESSOR} in + amd64) + echo x86_64-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; + *) + echo ${UNAME_PROCESSOR}-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; + esac + exit ;; + i*:CYGWIN*:*) + echo ${UNAME_MACHINE}-pc-cygwin + exit ;; + *:MINGW*:*) + echo ${UNAME_MACHINE}-pc-mingw32 + exit ;; + *:MSYS*:*) + echo ${UNAME_MACHINE}-pc-msys + exit ;; + i*:windows32*:*) + # uname -m includes "-pc" on this system. + echo ${UNAME_MACHINE}-mingw32 + exit ;; + i*:PW*:*) + echo ${UNAME_MACHINE}-pc-pw32 + exit ;; + *:Interix*:*) + case ${UNAME_MACHINE} in + x86) + echo i586-pc-interix${UNAME_RELEASE} + exit ;; + authenticamd | genuineintel | EM64T) + echo x86_64-unknown-interix${UNAME_RELEASE} + exit ;; + IA64) + echo ia64-unknown-interix${UNAME_RELEASE} + exit ;; + esac ;; + [345]86:Windows_95:* | [345]86:Windows_98:* | [345]86:Windows_NT:*) + echo i${UNAME_MACHINE}-pc-mks + exit ;; + 8664:Windows_NT:*) + echo x86_64-pc-mks + exit ;; + i*:Windows_NT*:* | Pentium*:Windows_NT*:*) + # How do we know it's Interix rather than the generic POSIX subsystem? + # It also conflicts with pre-2.0 versions of AT&T UWIN. Should we + # UNAME_MACHINE based on the output of uname instead of i386? + echo i586-pc-interix + exit ;; + i*:UWIN*:*) + echo ${UNAME_MACHINE}-pc-uwin + exit ;; + amd64:CYGWIN*:*:* | x86_64:CYGWIN*:*:*) + echo x86_64-unknown-cygwin + exit ;; + p*:CYGWIN*:*) + echo powerpcle-unknown-cygwin + exit ;; + prep*:SunOS:5.*:*) + echo powerpcle-unknown-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` + exit ;; + *:GNU:*:*) + # the GNU system + echo `echo ${UNAME_MACHINE}|sed -e 's,[-/].*$,,'`-unknown-gnu`echo ${UNAME_RELEASE}|sed -e 's,/.*$,,'` + exit ;; + *:GNU/*:*:*) + # other systems with GNU libc and userland + echo ${UNAME_MACHINE}-unknown-`echo ${UNAME_SYSTEM} | sed 's,^[^/]*/,,' | tr '[A-Z]' '[a-z]'``echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'`-gnu + exit ;; + i*86:Minix:*:*) + echo ${UNAME_MACHINE}-pc-minix + exit ;; + aarch64*:Linux:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + alpha:Linux:*:*) + case `sed -n '/^cpu model/s/^.*: \(.*\)/\1/p' < /proc/cpuinfo` in + EV5) UNAME_MACHINE=alphaev5 ;; + EV56) UNAME_MACHINE=alphaev56 ;; + PCA56) UNAME_MACHINE=alphapca56 ;; + PCA57) UNAME_MACHINE=alphapca56 ;; + EV6) UNAME_MACHINE=alphaev6 ;; + EV67) UNAME_MACHINE=alphaev67 ;; + EV68*) UNAME_MACHINE=alphaev68 ;; + esac + objdump --private-headers /bin/sh | grep -q ld.so.1 + if test "$?" = 0 ; then LIBC="libc1" ; else LIBC="" ; fi + echo ${UNAME_MACHINE}-unknown-linux-gnu${LIBC} + exit ;; + arm*:Linux:*:*) + eval $set_cc_for_build + if echo __ARM_EABI__ | $CC_FOR_BUILD -E - 2>/dev/null \ + | grep -q __ARM_EABI__ + then + echo ${UNAME_MACHINE}-unknown-linux-gnu + else + if echo __ARM_PCS_VFP | $CC_FOR_BUILD -E - 2>/dev/null \ + | grep -q __ARM_PCS_VFP + then + echo ${UNAME_MACHINE}-unknown-linux-gnueabi + else + echo ${UNAME_MACHINE}-unknown-linux-gnueabihf + fi + fi + exit ;; + avr32*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + cris:Linux:*:*) + echo cris-axis-linux-gnu + exit ;; + crisv32:Linux:*:*) + echo crisv32-axis-linux-gnu + exit ;; + frv:Linux:*:*) + echo frv-unknown-linux-gnu + exit ;; + i*86:Linux:*:*) + LIBC=gnu + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c + #ifdef __dietlibc__ + LIBC=dietlibc + #endif +EOF + eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep '^LIBC'` + echo "${UNAME_MACHINE}-pc-linux-${LIBC}" + exit ;; + ia64:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + m32r*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + m68*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + mips:Linux:*:* | mips64:Linux:*:*) + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c + #undef CPU + #undef ${UNAME_MACHINE} + #undef ${UNAME_MACHINE}el + #if defined(__MIPSEL__) || defined(__MIPSEL) || defined(_MIPSEL) || defined(MIPSEL) + CPU=${UNAME_MACHINE}el + #else + #if defined(__MIPSEB__) || defined(__MIPSEB) || defined(_MIPSEB) || defined(MIPSEB) + CPU=${UNAME_MACHINE} + #else + CPU= + #endif + #endif +EOF + eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep '^CPU'` + test x"${CPU}" != x && { echo "${CPU}-unknown-linux-gnu"; exit; } + ;; + or32:Linux:*:*) + echo or32-unknown-linux-gnu + exit ;; + padre:Linux:*:*) + echo sparc-unknown-linux-gnu + exit ;; + parisc64:Linux:*:* | hppa64:Linux:*:*) + echo hppa64-unknown-linux-gnu + exit ;; + parisc:Linux:*:* | hppa:Linux:*:*) + # Look for CPU level + case `grep '^cpu[^a-z]*:' /proc/cpuinfo 2>/dev/null | cut -d' ' -f2` in + PA7*) echo hppa1.1-unknown-linux-gnu ;; + PA8*) echo hppa2.0-unknown-linux-gnu ;; + *) echo hppa-unknown-linux-gnu ;; + esac + exit ;; + ppc64:Linux:*:*) + echo powerpc64-unknown-linux-gnu + exit ;; + ppc64le:Linux:*:*) + echo powerpc64le-unknown-linux-gnu + exit ;; + ppc:Linux:*:*) + echo powerpc-unknown-linux-gnu + exit ;; + s390:Linux:*:* | s390x:Linux:*:*) + echo ${UNAME_MACHINE}-ibm-linux + exit ;; + sh64*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + sh*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + sparc:Linux:*:* | sparc64:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + tile*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + vax:Linux:*:*) + echo ${UNAME_MACHINE}-dec-linux-gnu + exit ;; + x86_64:Linux:*:*) + echo x86_64-unknown-linux-gnu + exit ;; + xtensa*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + i*86:DYNIX/ptx:4*:*) + # ptx 4.0 does uname -s correctly, with DYNIX/ptx in there. + # earlier versions are messed up and put the nodename in both + # sysname and nodename. + echo i386-sequent-sysv4 + exit ;; + i*86:UNIX_SV:4.2MP:2.*) + # Unixware is an offshoot of SVR4, but it has its own version + # number series starting with 2... + # I am not positive that other SVR4 systems won't match this, + # I just have to hope. -- rms. + # Use sysv4.2uw... so that sysv4* matches it. + echo ${UNAME_MACHINE}-pc-sysv4.2uw${UNAME_VERSION} + exit ;; + i*86:OS/2:*:*) + # If we were able to find `uname', then EMX Unix compatibility + # is probably installed. + echo ${UNAME_MACHINE}-pc-os2-emx + exit ;; + i*86:XTS-300:*:STOP) + echo ${UNAME_MACHINE}-unknown-stop + exit ;; + i*86:atheos:*:*) + echo ${UNAME_MACHINE}-unknown-atheos + exit ;; + i*86:syllable:*:*) + echo ${UNAME_MACHINE}-pc-syllable + exit ;; + i*86:LynxOS:2.*:* | i*86:LynxOS:3.[01]*:* | i*86:LynxOS:4.[02]*:*) + echo i386-unknown-lynxos${UNAME_RELEASE} + exit ;; + i*86:*DOS:*:*) + echo ${UNAME_MACHINE}-pc-msdosdjgpp + exit ;; + i*86:*:4.*:* | i*86:SYSTEM_V:4.*:*) + UNAME_REL=`echo ${UNAME_RELEASE} | sed 's/\/MP$//'` + if grep Novell /usr/include/link.h >/dev/null 2>/dev/null; then + echo ${UNAME_MACHINE}-univel-sysv${UNAME_REL} + else + echo ${UNAME_MACHINE}-pc-sysv${UNAME_REL} + fi + exit ;; + i*86:*:5:[678]*) + # UnixWare 7.x, OpenUNIX and OpenServer 6. + case `/bin/uname -X | grep "^Machine"` in + *486*) UNAME_MACHINE=i486 ;; + *Pentium) UNAME_MACHINE=i586 ;; + *Pent*|*Celeron) UNAME_MACHINE=i686 ;; + esac + echo ${UNAME_MACHINE}-unknown-sysv${UNAME_RELEASE}${UNAME_SYSTEM}${UNAME_VERSION} + exit ;; + i*86:*:3.2:*) + if test -f /usr/options/cb.name; then + UNAME_REL=`sed -n 's/.*Version //p' /dev/null >/dev/null ; then + UNAME_REL=`(/bin/uname -X|grep Release|sed -e 's/.*= //')` + (/bin/uname -X|grep i80486 >/dev/null) && UNAME_MACHINE=i486 + (/bin/uname -X|grep '^Machine.*Pentium' >/dev/null) \ + && UNAME_MACHINE=i586 + (/bin/uname -X|grep '^Machine.*Pent *II' >/dev/null) \ + && UNAME_MACHINE=i686 + (/bin/uname -X|grep '^Machine.*Pentium Pro' >/dev/null) \ + && UNAME_MACHINE=i686 + echo ${UNAME_MACHINE}-pc-sco$UNAME_REL + else + echo ${UNAME_MACHINE}-pc-sysv32 + fi + exit ;; + pc:*:*:*) + # Left here for compatibility: + # uname -m prints for DJGPP always 'pc', but it prints nothing about + # the processor, so we play safe by assuming i586. + # Note: whatever this is, it MUST be the same as what config.sub + # prints for the "djgpp" host, or else GDB configury will decide that + # this is a cross-build. + echo i586-pc-msdosdjgpp + exit ;; + Intel:Mach:3*:*) + echo i386-pc-mach3 + exit ;; + paragon:*:*:*) + echo i860-intel-osf1 + exit ;; + i860:*:4.*:*) # i860-SVR4 + if grep Stardent /usr/include/sys/uadmin.h >/dev/null 2>&1 ; then + echo i860-stardent-sysv${UNAME_RELEASE} # Stardent Vistra i860-SVR4 + else # Add other i860-SVR4 vendors below as they are discovered. + echo i860-unknown-sysv${UNAME_RELEASE} # Unknown i860-SVR4 + fi + exit ;; + mini*:CTIX:SYS*5:*) + # "miniframe" + echo m68010-convergent-sysv + exit ;; + mc68k:UNIX:SYSTEM5:3.51m) + echo m68k-convergent-sysv + exit ;; + M680?0:D-NIX:5.3:*) + echo m68k-diab-dnix + exit ;; + M68*:*:R3V[5678]*:*) + test -r /sysV68 && { echo 'm68k-motorola-sysv'; exit; } ;; + 3[345]??:*:4.0:3.0 | 3[34]??A:*:4.0:3.0 | 3[34]??,*:*:4.0:3.0 | 3[34]??/*:*:4.0:3.0 | 4400:*:4.0:3.0 | 4850:*:4.0:3.0 | SKA40:*:4.0:3.0 | SDS2:*:4.0:3.0 | SHG2:*:4.0:3.0 | S7501*:*:4.0:3.0) + OS_REL='' + test -r /etc/.relid \ + && OS_REL=.`sed -n 's/[^ ]* [^ ]* \([0-9][0-9]\).*/\1/p' < /etc/.relid` + /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ + && { echo i486-ncr-sysv4.3${OS_REL}; exit; } + /bin/uname -p 2>/dev/null | /bin/grep entium >/dev/null \ + && { echo i586-ncr-sysv4.3${OS_REL}; exit; } ;; + 3[34]??:*:4.0:* | 3[34]??,*:*:4.0:*) + /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ + && { echo i486-ncr-sysv4; exit; } ;; + NCR*:*:4.2:* | MPRAS*:*:4.2:*) + OS_REL='.3' + test -r /etc/.relid \ + && OS_REL=.`sed -n 's/[^ ]* [^ ]* \([0-9][0-9]\).*/\1/p' < /etc/.relid` + /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ + && { echo i486-ncr-sysv4.3${OS_REL}; exit; } + /bin/uname -p 2>/dev/null | /bin/grep entium >/dev/null \ + && { echo i586-ncr-sysv4.3${OS_REL}; exit; } + /bin/uname -p 2>/dev/null | /bin/grep pteron >/dev/null \ + && { echo i586-ncr-sysv4.3${OS_REL}; exit; } ;; + m68*:LynxOS:2.*:* | m68*:LynxOS:3.0*:*) + echo m68k-unknown-lynxos${UNAME_RELEASE} + exit ;; + mc68030:UNIX_System_V:4.*:*) + echo m68k-atari-sysv4 + exit ;; + TSUNAMI:LynxOS:2.*:*) + echo sparc-unknown-lynxos${UNAME_RELEASE} + exit ;; + rs6000:LynxOS:2.*:*) + echo rs6000-unknown-lynxos${UNAME_RELEASE} + exit ;; + PowerPC:LynxOS:2.*:* | PowerPC:LynxOS:3.[01]*:* | PowerPC:LynxOS:4.[02]*:*) + echo powerpc-unknown-lynxos${UNAME_RELEASE} + exit ;; + SM[BE]S:UNIX_SV:*:*) + echo mips-dde-sysv${UNAME_RELEASE} + exit ;; + RM*:ReliantUNIX-*:*:*) + echo mips-sni-sysv4 + exit ;; + RM*:SINIX-*:*:*) + echo mips-sni-sysv4 + exit ;; + *:SINIX-*:*:*) + if uname -p 2>/dev/null >/dev/null ; then + UNAME_MACHINE=`(uname -p) 2>/dev/null` + echo ${UNAME_MACHINE}-sni-sysv4 + else + echo ns32k-sni-sysv + fi + exit ;; + PENTIUM:*:4.0*:*) # Unisys `ClearPath HMP IX 4000' SVR4/MP effort + # says + echo i586-unisys-sysv4 + exit ;; + *:UNIX_System_V:4*:FTX*) + # From Gerald Hewes . + # How about differentiating between stratus architectures? -djm + echo hppa1.1-stratus-sysv4 + exit ;; + *:*:*:FTX*) + # From seanf@swdc.stratus.com. + echo i860-stratus-sysv4 + exit ;; + i*86:VOS:*:*) + # From Paul.Green@stratus.com. + echo ${UNAME_MACHINE}-stratus-vos + exit ;; + *:VOS:*:*) + # From Paul.Green@stratus.com. + echo hppa1.1-stratus-vos + exit ;; + mc68*:A/UX:*:*) + echo m68k-apple-aux${UNAME_RELEASE} + exit ;; + news*:NEWS-OS:6*:*) + echo mips-sony-newsos6 + exit ;; + R[34]000:*System_V*:*:* | R4000:UNIX_SYSV:*:* | R*000:UNIX_SV:*:*) + if [ -d /usr/nec ]; then + echo mips-nec-sysv${UNAME_RELEASE} + else + echo mips-unknown-sysv${UNAME_RELEASE} + fi + exit ;; + BeBox:BeOS:*:*) # BeOS running on hardware made by Be, PPC only. + echo powerpc-be-beos + exit ;; + BeMac:BeOS:*:*) # BeOS running on Mac or Mac clone, PPC only. + echo powerpc-apple-beos + exit ;; + BePC:BeOS:*:*) # BeOS running on Intel PC compatible. + echo i586-pc-beos + exit ;; + BePC:Haiku:*:*) # Haiku running on Intel PC compatible. + echo i586-pc-haiku + exit ;; + SX-4:SUPER-UX:*:*) + echo sx4-nec-superux${UNAME_RELEASE} + exit ;; + SX-5:SUPER-UX:*:*) + echo sx5-nec-superux${UNAME_RELEASE} + exit ;; + SX-6:SUPER-UX:*:*) + echo sx6-nec-superux${UNAME_RELEASE} + exit ;; + SX-7:SUPER-UX:*:*) + echo sx7-nec-superux${UNAME_RELEASE} + exit ;; + SX-8:SUPER-UX:*:*) + echo sx8-nec-superux${UNAME_RELEASE} + exit ;; + SX-8R:SUPER-UX:*:*) + echo sx8r-nec-superux${UNAME_RELEASE} + exit ;; + Power*:Rhapsody:*:*) + echo powerpc-apple-rhapsody${UNAME_RELEASE} + exit ;; + *:Rhapsody:*:*) + echo ${UNAME_MACHINE}-apple-rhapsody${UNAME_RELEASE} + exit ;; + *:Darwin:*:*) + UNAME_PROCESSOR=`uname -p` || UNAME_PROCESSOR=unknown + case $UNAME_PROCESSOR in + i386) + eval $set_cc_for_build + if [ "$CC_FOR_BUILD" != 'no_compiler_found' ]; then + if (echo '#ifdef __LP64__'; echo IS_64BIT_ARCH; echo '#endif') | \ + (CCOPTS= $CC_FOR_BUILD -E - 2>/dev/null) | \ + grep IS_64BIT_ARCH >/dev/null + then + UNAME_PROCESSOR="x86_64" + fi + fi ;; + unknown) UNAME_PROCESSOR=powerpc ;; + esac + echo ${UNAME_PROCESSOR}-apple-darwin${UNAME_RELEASE} + exit ;; + *:procnto*:*:* | *:QNX:[0123456789]*:*) + UNAME_PROCESSOR=`uname -p` + if test "$UNAME_PROCESSOR" = "x86"; then + UNAME_PROCESSOR=i386 + UNAME_MACHINE=pc + fi + echo ${UNAME_PROCESSOR}-${UNAME_MACHINE}-nto-qnx${UNAME_RELEASE} + exit ;; + *:QNX:*:4*) + echo i386-pc-qnx + exit ;; + NEO-?:NONSTOP_KERNEL:*:*) + echo neo-tandem-nsk${UNAME_RELEASE} + exit ;; + NSE-?:NONSTOP_KERNEL:*:*) + echo nse-tandem-nsk${UNAME_RELEASE} + exit ;; + NSR-?:NONSTOP_KERNEL:*:*) + echo nsr-tandem-nsk${UNAME_RELEASE} + exit ;; + *:NonStop-UX:*:*) + echo mips-compaq-nonstopux + exit ;; + BS2000:POSIX*:*:*) + echo bs2000-siemens-sysv + exit ;; + DS/*:UNIX_System_V:*:*) + echo ${UNAME_MACHINE}-${UNAME_SYSTEM}-${UNAME_RELEASE} + exit ;; + *:Plan9:*:*) + # "uname -m" is not consistent, so use $cputype instead. 386 + # is converted to i386 for consistency with other x86 + # operating systems. + if test "$cputype" = "386"; then + UNAME_MACHINE=i386 + else + UNAME_MACHINE="$cputype" + fi + echo ${UNAME_MACHINE}-unknown-plan9 + exit ;; + *:TOPS-10:*:*) + echo pdp10-unknown-tops10 + exit ;; + *:TENEX:*:*) + echo pdp10-unknown-tenex + exit ;; + KS10:TOPS-20:*:* | KL10:TOPS-20:*:* | TYPE4:TOPS-20:*:*) + echo pdp10-dec-tops20 + exit ;; + XKL-1:TOPS-20:*:* | TYPE5:TOPS-20:*:*) + echo pdp10-xkl-tops20 + exit ;; + *:TOPS-20:*:*) + echo pdp10-unknown-tops20 + exit ;; + *:ITS:*:*) + echo pdp10-unknown-its + exit ;; + SEI:*:*:SEIUX) + echo mips-sei-seiux${UNAME_RELEASE} + exit ;; + *:DragonFly:*:*) + echo ${UNAME_MACHINE}-unknown-dragonfly`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` + exit ;; + *:*VMS:*:*) + UNAME_MACHINE=`(uname -p) 2>/dev/null` + case "${UNAME_MACHINE}" in + A*) echo alpha-dec-vms ; exit ;; + I*) echo ia64-dec-vms ; exit ;; + V*) echo vax-dec-vms ; exit ;; + esac ;; + *:XENIX:*:SysV) + echo i386-pc-xenix + exit ;; + i*86:skyos:*:*) + echo ${UNAME_MACHINE}-pc-skyos`echo ${UNAME_RELEASE}` | sed -e 's/ .*$//' + exit ;; + i*86:rdos:*:*) + echo ${UNAME_MACHINE}-pc-rdos + exit ;; + i*86:AROS:*:*) + echo ${UNAME_MACHINE}-pc-aros + exit ;; +esac + +#echo '(No uname command or uname output not recognized.)' 1>&2 +#echo "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" 1>&2 + +eval $set_cc_for_build +cat >$dummy.c < +# include +#endif +main () +{ +#if defined (sony) +#if defined (MIPSEB) + /* BFD wants "bsd" instead of "newsos". Perhaps BFD should be changed, + I don't know.... */ + printf ("mips-sony-bsd\n"); exit (0); +#else +#include + printf ("m68k-sony-newsos%s\n", +#ifdef NEWSOS4 + "4" +#else + "" +#endif + ); exit (0); +#endif +#endif + +#if defined (__arm) && defined (__acorn) && defined (__unix) + printf ("arm-acorn-riscix\n"); exit (0); +#endif + +#if defined (hp300) && !defined (hpux) + printf ("m68k-hp-bsd\n"); exit (0); +#endif + +#if defined (NeXT) +#if !defined (__ARCHITECTURE__) +#define __ARCHITECTURE__ "m68k" +#endif + int version; + version=`(hostinfo | sed -n 's/.*NeXT Mach \([0-9]*\).*/\1/p') 2>/dev/null`; + if (version < 4) + printf ("%s-next-nextstep%d\n", __ARCHITECTURE__, version); + else + printf ("%s-next-openstep%d\n", __ARCHITECTURE__, version); + exit (0); +#endif + +#if defined (MULTIMAX) || defined (n16) +#if defined (UMAXV) + printf ("ns32k-encore-sysv\n"); exit (0); +#else +#if defined (CMU) + printf ("ns32k-encore-mach\n"); exit (0); +#else + printf ("ns32k-encore-bsd\n"); exit (0); +#endif +#endif +#endif + +#if defined (__386BSD__) + printf ("i386-pc-bsd\n"); exit (0); +#endif + +#if defined (sequent) +#if defined (i386) + printf ("i386-sequent-dynix\n"); exit (0); +#endif +#if defined (ns32000) + printf ("ns32k-sequent-dynix\n"); exit (0); +#endif +#endif + +#if defined (_SEQUENT_) + struct utsname un; + + uname(&un); + + if (strncmp(un.version, "V2", 2) == 0) { + printf ("i386-sequent-ptx2\n"); exit (0); + } + if (strncmp(un.version, "V1", 2) == 0) { /* XXX is V1 correct? */ + printf ("i386-sequent-ptx1\n"); exit (0); + } + printf ("i386-sequent-ptx\n"); exit (0); + +#endif + +#if defined (vax) +# if !defined (ultrix) +# include +# if defined (BSD) +# if BSD == 43 + printf ("vax-dec-bsd4.3\n"); exit (0); +# else +# if BSD == 199006 + printf ("vax-dec-bsd4.3reno\n"); exit (0); +# else + printf ("vax-dec-bsd\n"); exit (0); +# endif +# endif +# else + printf ("vax-dec-bsd\n"); exit (0); +# endif +# else + printf ("vax-dec-ultrix\n"); exit (0); +# endif +#endif + +#if defined (alliant) && defined (i860) + printf ("i860-alliant-bsd\n"); exit (0); +#endif + + exit (1); +} +EOF + +$CC_FOR_BUILD -o $dummy $dummy.c 2>/dev/null && SYSTEM_NAME=`$dummy` && + { echo "$SYSTEM_NAME"; exit; } + +# Apollos put the system type in the environment. + +test -d /usr/apollo && { echo ${ISP}-apollo-${SYSTYPE}; exit; } + +# Convex versions that predate uname can use getsysinfo(1) + +if [ -x /usr/convex/getsysinfo ] +then + case `getsysinfo -f cpu_type` in + c1*) + echo c1-convex-bsd + exit ;; + c2*) + if getsysinfo -f scalar_acc + then echo c32-convex-bsd + else echo c2-convex-bsd + fi + exit ;; + c34*) + echo c34-convex-bsd + exit ;; + c38*) + echo c38-convex-bsd + exit ;; + c4*) + echo c4-convex-bsd + exit ;; + esac +fi + +cat >&2 < in order to provide the needed +information to handle your system. + +config.guess timestamp = $timestamp + +uname -m = `(uname -m) 2>/dev/null || echo unknown` +uname -r = `(uname -r) 2>/dev/null || echo unknown` +uname -s = `(uname -s) 2>/dev/null || echo unknown` +uname -v = `(uname -v) 2>/dev/null || echo unknown` + +/usr/bin/uname -p = `(/usr/bin/uname -p) 2>/dev/null` +/bin/uname -X = `(/bin/uname -X) 2>/dev/null` + +hostinfo = `(hostinfo) 2>/dev/null` +/bin/universe = `(/bin/universe) 2>/dev/null` +/usr/bin/arch -k = `(/usr/bin/arch -k) 2>/dev/null` +/bin/arch = `(/bin/arch) 2>/dev/null` +/usr/bin/oslevel = `(/usr/bin/oslevel) 2>/dev/null` +/usr/convex/getsysinfo = `(/usr/convex/getsysinfo) 2>/dev/null` + +UNAME_MACHINE = ${UNAME_MACHINE} +UNAME_RELEASE = ${UNAME_RELEASE} +UNAME_SYSTEM = ${UNAME_SYSTEM} +UNAME_VERSION = ${UNAME_VERSION} +EOF + +exit 1 + +# Local variables: +# eval: (add-hook 'write-file-hooks 'time-stamp) +# time-stamp-start: "timestamp='" +# time-stamp-format: "%:y-%02m-%02d" +# time-stamp-end: "'" +# End: diff --git a/llvm/cmake/dummy.cpp b/llvm/cmake/dummy.cpp new file mode 100644 index 0000000..c4e7e95 --- /dev/null +++ b/llvm/cmake/dummy.cpp @@ -0,0 +1 @@ +typedef int dummy; diff --git a/llvm/cmake/modules/AddLLVM.cmake b/llvm/cmake/modules/AddLLVM.cmake new file mode 100644 index 0000000..9bdc58f --- /dev/null +++ b/llvm/cmake/modules/AddLLVM.cmake @@ -0,0 +1,1204 @@ +include(LLVMProcessSources) +include(LLVM-Config) +include(DetermineGCCCompatible) + +macro(add_llvm_dir) + include_directories(BEFORE + ${CMAKE_CURRENT_BINARY_DIR} + ${CMAKE_CURRENT_SOURCE_DIR}) +endmacro(add_llvm_dir) + +function(llvm_update_compile_flags name) + get_property(sources TARGET ${name} PROPERTY SOURCES) + if("${sources}" MATCHES "\\.c(;|$)") + set(update_src_props ON) + endif() + + # LLVM_REQUIRES_EH is an internal flag that individual + # targets can use to force EH + if((LLVM_REQUIRES_EH OR LLVM_ENABLE_EH) AND NOT CLANG_CL) + if(NOT (LLVM_REQUIRES_RTTI OR LLVM_ENABLE_RTTI)) + message(AUTHOR_WARNING "Exception handling requires RTTI. Enabling RTTI for ${name}") + set(LLVM_REQUIRES_RTTI ON) + endif() + else() + if(LLVM_COMPILER_IS_GCC_COMPATIBLE) + list(APPEND LLVM_COMPILE_FLAGS "-fno-exceptions") + elseif(MSVC) + list(APPEND LLVM_COMPILE_DEFINITIONS _HAS_EXCEPTIONS=0) + list(APPEND LLVM_COMPILE_FLAGS "/EHs-c-") + endif() + endif() + + # LLVM_REQUIRES_RTTI is an internal flag that individual + # targets can use to force RTTI + set(LLVM_CONFIG_HAS_RTTI YES CACHE INTERNAL "") + if(NOT (LLVM_REQUIRES_RTTI OR LLVM_ENABLE_RTTI)) + set(LLVM_CONFIG_HAS_RTTI NO CACHE INTERNAL "") + list(APPEND LLVM_COMPILE_DEFINITIONS GTEST_HAS_RTTI=0) + if (LLVM_COMPILER_IS_GCC_COMPATIBLE) + list(APPEND LLVM_COMPILE_FLAGS "-fno-rtti") + elseif (MSVC) + list(APPEND LLVM_COMPILE_FLAGS "/GR-") + endif () + endif() + + # Assume that; + # - LLVM_COMPILE_FLAGS is list. + # - PROPERTY COMPILE_FLAGS is string. + string(REPLACE ";" " " target_compile_flags " ${LLVM_COMPILE_FLAGS}") + + if(update_src_props) + foreach(fn ${sources}) + get_filename_component(suf ${fn} EXT) + if("${suf}" STREQUAL ".cpp") + set_property(SOURCE ${fn} APPEND_STRING PROPERTY + COMPILE_FLAGS "${target_compile_flags}") + endif() + endforeach() + else() + # Update target props, since all sources are C++. + set_property(TARGET ${name} APPEND_STRING PROPERTY + COMPILE_FLAGS "${target_compile_flags}") + endif() + + set_property(TARGET ${name} APPEND PROPERTY COMPILE_DEFINITIONS ${LLVM_COMPILE_DEFINITIONS}) +endfunction() + +function(add_llvm_symbol_exports target_name export_file) + if(${CMAKE_SYSTEM_NAME} MATCHES "Darwin") + set(native_export_file "${target_name}.exports") + add_custom_command(OUTPUT ${native_export_file} + COMMAND sed -e "s/^/_/" < ${export_file} > ${native_export_file} + DEPENDS ${export_file} + VERBATIM + COMMENT "Creating export file for ${target_name}") + set_property(TARGET ${target_name} APPEND_STRING PROPERTY + LINK_FLAGS " -Wl,-exported_symbols_list,${CMAKE_CURRENT_BINARY_DIR}/${native_export_file}") + elseif(LLVM_HAVE_LINK_VERSION_SCRIPT) + # Gold and BFD ld require a version script rather than a plain list. + set(native_export_file "${target_name}.exports") + # FIXME: Don't write the "local:" line on OpenBSD. + add_custom_command(OUTPUT ${native_export_file} + COMMAND echo "{" > ${native_export_file} + COMMAND grep -q "[[:alnum:]]" ${export_file} && echo " global:" >> ${native_export_file} || : + COMMAND sed -e "s/$/;/" -e "s/^/ /" < ${export_file} >> ${native_export_file} + COMMAND echo " local: *;" >> ${native_export_file} + COMMAND echo "};" >> ${native_export_file} + DEPENDS ${export_file} + VERBATIM + COMMENT "Creating export file for ${target_name}") + if (${CMAKE_SYSTEM_NAME} MATCHES "SunOS") + set_property(TARGET ${target_name} APPEND_STRING PROPERTY + LINK_FLAGS " -Wl,-M,${CMAKE_CURRENT_BINARY_DIR}/${native_export_file}") + else() + set_property(TARGET ${target_name} APPEND_STRING PROPERTY + LINK_FLAGS " -Wl,--version-script,${CMAKE_CURRENT_BINARY_DIR}/${native_export_file}") + endif() + else() + set(native_export_file "${target_name}.def") + + add_custom_command(OUTPUT ${native_export_file} + COMMAND ${PYTHON_EXECUTABLE} -c "import sys;print(''.join(['EXPORTS\\n']+sys.stdin.readlines(),))" + < ${export_file} > ${native_export_file} + DEPENDS ${export_file} + VERBATIM + COMMENT "Creating export file for ${target_name}") + set(export_file_linker_flag "${CMAKE_CURRENT_BINARY_DIR}/${native_export_file}") + if(MSVC) + set(export_file_linker_flag "/DEF:\"${export_file_linker_flag}\"") + endif() + set_property(TARGET ${target_name} APPEND_STRING PROPERTY + LINK_FLAGS " ${export_file_linker_flag}") + endif() + + add_custom_target(${target_name}_exports DEPENDS ${native_export_file}) + set_target_properties(${target_name}_exports PROPERTIES FOLDER "Misc") + + get_property(srcs TARGET ${target_name} PROPERTY SOURCES) + foreach(src ${srcs}) + get_filename_component(extension ${src} EXT) + if(extension STREQUAL ".cpp") + set(first_source_file ${src}) + break() + endif() + endforeach() + + # Force re-linking when the exports file changes. Actually, it + # forces recompilation of the source file. The LINK_DEPENDS target + # property only works for makefile-based generators. + # FIXME: This is not safe because this will create the same target + # ${native_export_file} in several different file: + # - One where we emitted ${target_name}_exports + # - One where we emitted the build command for the following object. + # set_property(SOURCE ${first_source_file} APPEND PROPERTY + # OBJECT_DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${native_export_file}) + + set_property(DIRECTORY APPEND + PROPERTY ADDITIONAL_MAKE_CLEAN_FILES ${native_export_file}) + + add_dependencies(${target_name} ${target_name}_exports) + + # Add dependency to *_exports later -- CMake issue 14747 + list(APPEND LLVM_COMMON_DEPENDS ${target_name}_exports) + set(LLVM_COMMON_DEPENDS ${LLVM_COMMON_DEPENDS} PARENT_SCOPE) +endfunction(add_llvm_symbol_exports) + +if(NOT WIN32 AND NOT APPLE) + execute_process( + COMMAND ${CMAKE_C_COMPILER} -Wl,--version + OUTPUT_VARIABLE stdout + ERROR_QUIET + ) + if("${stdout}" MATCHES "GNU gold") + set(LLVM_LINKER_IS_GOLD ON) + endif() +endif() + +function(add_link_opts target_name) + # Don't use linker optimizations in debug builds since it slows down the + # linker in a context where the optimizations are not important. + if (NOT uppercase_CMAKE_BUILD_TYPE STREQUAL "DEBUG") + + # Pass -O3 to the linker. This enabled different optimizations on different + # linkers. + if(NOT (${CMAKE_SYSTEM_NAME} MATCHES "Darwin|SunOS" OR WIN32)) + set_property(TARGET ${target_name} APPEND_STRING PROPERTY + LINK_FLAGS " -Wl,-O3") + endif() + + if(LLVM_LINKER_IS_GOLD) + # With gold gc-sections is always safe. + set_property(TARGET ${target_name} APPEND_STRING PROPERTY + LINK_FLAGS " -Wl,--gc-sections") + # Note that there is a bug with -Wl,--icf=safe so it is not safe + # to enable. See https://sourceware.org/bugzilla/show_bug.cgi?id=17704. + endif() + + if(NOT LLVM_NO_DEAD_STRIP) + if(${CMAKE_SYSTEM_NAME} MATCHES "Darwin") + # ld64's implementation of -dead_strip breaks tools that use plugins. + set_property(TARGET ${target_name} APPEND_STRING PROPERTY + LINK_FLAGS " -Wl,-dead_strip") + elseif(${CMAKE_SYSTEM_NAME} MATCHES "SunOS") + set_property(TARGET ${target_name} APPEND_STRING PROPERTY + LINK_FLAGS " -Wl,-z -Wl,discard-unused=sections") + elseif(NOT WIN32 AND NOT LLVM_LINKER_IS_GOLD) + # Object files are compiled with -ffunction-data-sections. + # Versions of bfd ld < 2.23.1 have a bug in --gc-sections that breaks + # tools that use plugins. Always pass --gc-sections once we require + # a newer linker. + set_property(TARGET ${target_name} APPEND_STRING PROPERTY + LINK_FLAGS " -Wl,--gc-sections") + endif() + endif() + endif() +endfunction(add_link_opts) + +# Set each output directory according to ${CMAKE_CONFIGURATION_TYPES}. +# Note: Don't set variables CMAKE_*_OUTPUT_DIRECTORY any more, +# or a certain builder, for eaxample, msbuild.exe, would be confused. +function(set_output_directory target) + cmake_parse_arguments(ARG "" "BINARY_DIR;LIBRARY_DIR" "" ${ARGN}) + + # module_dir -- corresponding to LIBRARY_OUTPUT_DIRECTORY. + # It affects output of add_library(MODULE). + if(WIN32 OR CYGWIN) + # DLL platform + set(module_dir ${ARG_BINARY_DIR}) + else() + set(module_dir ${ARG_LIBRARY_DIR}) + endif() + if(NOT "${CMAKE_CFG_INTDIR}" STREQUAL ".") + foreach(build_mode ${CMAKE_CONFIGURATION_TYPES}) + string(TOUPPER "${build_mode}" CONFIG_SUFFIX) + if(ARG_BINARY_DIR) + string(REPLACE ${CMAKE_CFG_INTDIR} ${build_mode} bi ${ARG_BINARY_DIR}) + set_target_properties(${target} PROPERTIES "RUNTIME_OUTPUT_DIRECTORY_${CONFIG_SUFFIX}" ${bi}) + endif() + if(ARG_LIBRARY_DIR) + string(REPLACE ${CMAKE_CFG_INTDIR} ${build_mode} li ${ARG_LIBRARY_DIR}) + set_target_properties(${target} PROPERTIES "ARCHIVE_OUTPUT_DIRECTORY_${CONFIG_SUFFIX}" ${li}) + endif() + if(module_dir) + string(REPLACE ${CMAKE_CFG_INTDIR} ${build_mode} mi ${module_dir}) + set_target_properties(${target} PROPERTIES "LIBRARY_OUTPUT_DIRECTORY_${CONFIG_SUFFIX}" ${mi}) + endif() + endforeach() + else() + if(ARG_BINARY_DIR) + set_target_properties(${target} PROPERTIES RUNTIME_OUTPUT_DIRECTORY ${ARG_BINARY_DIR}) + endif() + if(ARG_LIBRARY_DIR) + set_target_properties(${target} PROPERTIES ARCHIVE_OUTPUT_DIRECTORY ${ARG_LIBRARY_DIR}) + endif() + if(module_dir) + set_target_properties(${target} PROPERTIES LIBRARY_OUTPUT_DIRECTORY ${module_dir}) + endif() + endif() +endfunction() + +# If on Windows and building with MSVC, add the resource script containing the +# VERSIONINFO data to the project. This embeds version resource information +# into the output .exe or .dll. +# TODO: Enable for MinGW Windows builds too. +# +function(add_windows_version_resource_file OUT_VAR) + set(sources ${ARGN}) + if (MSVC) + set(resource_file ${LLVM_SOURCE_DIR}/resources/windows_version_resource.rc) + if(EXISTS ${resource_file}) + set(sources ${sources} ${resource_file}) + source_group("Resource Files" ${resource_file}) + set(windows_resource_file ${resource_file} PARENT_SCOPE) + endif() + endif(MSVC) + + set(${OUT_VAR} ${sources} PARENT_SCOPE) +endfunction(add_windows_version_resource_file) + +# set_windows_version_resource_properties(name resource_file... +# VERSION_MAJOR int +# Optional major version number (defaults to LLVM_VERSION_MAJOR) +# VERSION_MINOR int +# Optional minor version number (defaults to LLVM_VERSION_MINOR) +# VERSION_PATCHLEVEL int +# Optional patchlevel version number (defaults to LLVM_VERSION_PATCH) +# VERSION_STRING +# Optional version string (defaults to PACKAGE_VERSION) +# PRODUCT_NAME +# Optional product name string (defaults to "LLVM") +# ) +function(set_windows_version_resource_properties name resource_file) + cmake_parse_arguments(ARG + "" + "VERSION_MAJOR;VERSION_MINOR;VERSION_PATCHLEVEL;VERSION_STRING;PRODUCT_NAME" + "" + ${ARGN}) + + if (NOT DEFINED ARG_VERSION_MAJOR) + set(ARG_VERSION_MAJOR ${LLVM_VERSION_MAJOR}) + endif() + + if (NOT DEFINED ARG_VERSION_MINOR) + set(ARG_VERSION_MINOR ${LLVM_VERSION_MINOR}) + endif() + + if (NOT DEFINED ARG_VERSION_PATCHLEVEL) + set(ARG_VERSION_PATCHLEVEL ${LLVM_VERSION_PATCH}) + endif() + + if (NOT DEFINED ARG_VERSION_STRING) + set(ARG_VERSION_STRING ${PACKAGE_VERSION}) + endif() + + if (NOT DEFINED ARG_PRODUCT_NAME) + set(ARG_PRODUCT_NAME "LLVM") + endif() + + set_property(SOURCE ${resource_file} + PROPERTY COMPILE_FLAGS /nologo) + set_property(SOURCE ${resource_file} + PROPERTY COMPILE_DEFINITIONS + "RC_VERSION_FIELD_1=${ARG_VERSION_MAJOR}" + "RC_VERSION_FIELD_2=${ARG_VERSION_MINOR}" + "RC_VERSION_FIELD_3=${ARG_VERSION_PATCHLEVEL}" + "RC_VERSION_FIELD_4=0" + "RC_FILE_VERSION=\"${ARG_VERSION_STRING}\"" + "RC_INTERNAL_NAME=\"${name}\"" + "RC_PRODUCT_NAME=\"${ARG_PRODUCT_NAME}\"" + "RC_PRODUCT_VERSION=\"${ARG_VERSION_STRING}\"") +endfunction(set_windows_version_resource_properties) + +# llvm_add_library(name sources... +# SHARED;STATIC +# STATIC by default w/o BUILD_SHARED_LIBS. +# SHARED by default w/ BUILD_SHARED_LIBS. +# OBJECT +# Also create an OBJECT library target. Default if STATIC && SHARED. +# MODULE +# Target ${name} might not be created on unsupported platforms. +# Check with "if(TARGET ${name})". +# DISABLE_LLVM_LINK_LLVM_DYLIB +# Do not link this library to libLLVM, even if +# LLVM_LINK_LLVM_DYLIB is enabled. +# OUTPUT_NAME name +# Corresponds to OUTPUT_NAME in target properties. +# DEPENDS targets... +# Same semantics as add_dependencies(). +# LINK_COMPONENTS components... +# Same as the variable LLVM_LINK_COMPONENTS. +# LINK_LIBS lib_targets... +# Same semantics as target_link_libraries(). +# ADDITIONAL_HEADERS +# May specify header files for IDE generators. +# SONAME +# Should set SONAME link flags and create symlinks +# ) +function(llvm_add_library name) + cmake_parse_arguments(ARG + "MODULE;SHARED;STATIC;OBJECT;DISABLE_LLVM_LINK_LLVM_DYLIB;SONAME" + "OUTPUT_NAME" + "ADDITIONAL_HEADERS;DEPENDS;LINK_COMPONENTS;LINK_LIBS;OBJLIBS" + ${ARGN}) + list(APPEND LLVM_COMMON_DEPENDS ${ARG_DEPENDS}) + if(ARG_ADDITIONAL_HEADERS) + # Pass through ADDITIONAL_HEADERS. + set(ARG_ADDITIONAL_HEADERS ADDITIONAL_HEADERS ${ARG_ADDITIONAL_HEADERS}) + endif() + if(ARG_OBJLIBS) + set(ALL_FILES ${ARG_OBJLIBS}) + else() + llvm_process_sources(ALL_FILES ${ARG_UNPARSED_ARGUMENTS} ${ARG_ADDITIONAL_HEADERS}) + endif() + + if(ARG_MODULE) + if(ARG_SHARED OR ARG_STATIC) + message(WARNING "MODULE with SHARED|STATIC doesn't make sense.") + endif() + if(NOT LLVM_ENABLE_PLUGINS) + message(STATUS "${name} ignored -- Loadable modules not supported on this platform.") + return() + endif() + else() + if(BUILD_SHARED_LIBS AND NOT ARG_STATIC) + set(ARG_SHARED TRUE) + endif() + if(NOT ARG_SHARED) + set(ARG_STATIC TRUE) + endif() + endif() + + # Generate objlib + if((ARG_SHARED AND ARG_STATIC) OR ARG_OBJECT) + # Generate an obj library for both targets. + set(obj_name "obj.${name}") + add_library(${obj_name} OBJECT EXCLUDE_FROM_ALL + ${ALL_FILES} + ) + llvm_update_compile_flags(${obj_name}) + set(ALL_FILES "$") + + # Do add_dependencies(obj) later due to CMake issue 14747. + list(APPEND objlibs ${obj_name}) + + set_target_properties(${obj_name} PROPERTIES FOLDER "Object Libraries") + endif() + + if(ARG_SHARED AND ARG_STATIC) + # static + set(name_static "${name}_static") + if(ARG_OUTPUT_NAME) + set(output_name OUTPUT_NAME "${ARG_OUTPUT_NAME}") + endif() + # DEPENDS has been appended to LLVM_COMMON_LIBS. + llvm_add_library(${name_static} STATIC + ${output_name} + OBJLIBS ${ALL_FILES} # objlib + LINK_LIBS ${ARG_LINK_LIBS} + LINK_COMPONENTS ${ARG_LINK_COMPONENTS} + ) + # FIXME: Add name_static to anywhere in TARGET ${name}'s PROPERTY. + set(ARG_STATIC) + endif() + + if(ARG_MODULE) + add_library(${name} MODULE ${ALL_FILES}) + elseif(ARG_SHARED) + add_windows_version_resource_file(ALL_FILES ${ALL_FILES}) + add_library(${name} SHARED ${ALL_FILES}) + else() + add_library(${name} STATIC ${ALL_FILES}) + endif() + + if(DEFINED windows_resource_file) + set_windows_version_resource_properties(${name} ${windows_resource_file}) + set(windows_resource_file ${windows_resource_file} PARENT_SCOPE) + endif() + + set_output_directory(${name} BINARY_DIR ${LLVM_RUNTIME_OUTPUT_INTDIR} LIBRARY_DIR ${LLVM_LIBRARY_OUTPUT_INTDIR}) + # $ doesn't require compile flags. + if(NOT obj_name) + llvm_update_compile_flags(${name}) + endif() + add_link_opts( ${name} ) + if(ARG_OUTPUT_NAME) + set_target_properties(${name} + PROPERTIES + OUTPUT_NAME ${ARG_OUTPUT_NAME} + ) + endif() + + if(ARG_MODULE) + set_target_properties(${name} PROPERTIES + PREFIX "" + SUFFIX ${LLVM_PLUGIN_EXT} + ) + endif() + + if(ARG_SHARED) + if(WIN32) + set_target_properties(${name} PROPERTIES + PREFIX "" + ) + endif() + endif() + + if(ARG_MODULE OR ARG_SHARED) + # Do not add -Dname_EXPORTS to the command-line when building files in this + # target. Doing so is actively harmful for the modules build because it + # creates extra module variants, and not useful because we don't use these + # macros. + set_target_properties( ${name} PROPERTIES DEFINE_SYMBOL "" ) + + if (LLVM_EXPORTED_SYMBOL_FILE) + add_llvm_symbol_exports( ${name} ${LLVM_EXPORTED_SYMBOL_FILE} ) + endif() + endif() + + if(ARG_SHARED AND UNIX) + if(NOT APPLE AND ARG_SONAME) + get_target_property(output_name ${name} OUTPUT_NAME) + if(${output_name} STREQUAL "output_name-NOTFOUND") + set(output_name ${name}) + endif() + set(library_name ${output_name}-${LLVM_VERSION_MAJOR}.${LLVM_VERSION_MINOR}${LLVM_VERSION_SUFFIX}) + set(api_name ${output_name}-${LLVM_VERSION_MAJOR}.${LLVM_VERSION_MINOR}.${LLVM_VERSION_PATCH}${LLVM_VERSION_SUFFIX}) + set_target_properties(${name} PROPERTIES OUTPUT_NAME ${library_name}) + llvm_install_library_symlink(${api_name} ${library_name} SHARED + COMPONENT ${name} + ALWAYS_GENERATE) + llvm_install_library_symlink(${output_name} ${library_name} SHARED + COMPONENT ${name} + ALWAYS_GENERATE) + endif() + endif() + + # Add the explicit dependency information for this library. + # + # It would be nice to verify that we have the dependencies for this library + # name, but using get_property(... SET) doesn't suffice to determine if a + # property has been set to an empty value. + get_property(lib_deps GLOBAL PROPERTY LLVMBUILD_LIB_DEPS_${name}) + + if (LLVM_LINK_LLVM_DYLIB AND NOT ARG_STATIC AND NOT ARG_DISABLE_LLVM_LINK_LLVM_DYLIB) + set(llvm_libs LLVM) + else() + llvm_map_components_to_libnames(llvm_libs + ${ARG_LINK_COMPONENTS} + ${LLVM_LINK_COMPONENTS} + ) + endif() + + if(CMAKE_VERSION VERSION_LESS 2.8.12) + # Link libs w/o keywords, assuming PUBLIC. + target_link_libraries(${name} + ${ARG_LINK_LIBS} + ${lib_deps} + ${llvm_libs} + ) + elseif(ARG_STATIC) + target_link_libraries(${name} INTERFACE + ${ARG_LINK_LIBS} + ${lib_deps} + ${llvm_libs} + ) + else() + # We can use PRIVATE since SO knows its dependent libs. + target_link_libraries(${name} PRIVATE + ${ARG_LINK_LIBS} + ${lib_deps} + ${llvm_libs} + ) + endif() + + if(LLVM_COMMON_DEPENDS) + #add_dependencies(${name} ${LLVM_COMMON_DEPENDS}) + # Add dependencies also to objlibs. + # CMake issue 14747 -- add_dependencies() might be ignored to objlib's user. + foreach(objlib ${objlibs}) + add_dependencies(${objlib} ${LLVM_COMMON_DEPENDS}) + endforeach() + endif() + + if(ARG_SHARED OR ARG_MODULE) + llvm_externalize_debuginfo(${name}) + endif() +endfunction() + +macro(add_llvm_library name) + cmake_parse_arguments(ARG + "SHARED" + "" + "" + ${ARGN}) + if( BUILD_SHARED_LIBS ) + llvm_add_library(${name} SHARED ${ARGN}) + else() + llvm_add_library(${name} ${ARGN}) + endif() + # The gtest libraries should not be installed or exported as a target + if ("${name}" STREQUAL gtest OR "${name}" STREQUAL gtest_main) + set(_is_gtest TRUE) + else() + set(_is_gtest FALSE) + set_property( GLOBAL APPEND PROPERTY LLVM_LIBS ${name} ) + endif() + + if( EXCLUDE_FROM_ALL ) + set_target_properties( ${name} PROPERTIES EXCLUDE_FROM_ALL ON) + elseif(NOT _is_gtest) + if (NOT LLVM_INSTALL_TOOLCHAIN_ONLY OR ${name} STREQUAL "LTO") + set(install_dir lib${LLVM_LIBDIR_SUFFIX}) + if(ARG_SHARED OR BUILD_SHARED_LIBS) + if(WIN32 OR CYGWIN OR MINGW) + set(install_type RUNTIME) + set(install_dir bin) + else() + set(install_type LIBRARY) + endif() + else() + set(install_type ARCHIVE) + endif() + + install(TARGETS ${name} + EXPORT LLVMExports + ${install_type} DESTINATION ${install_dir} + COMPONENT ${name}) + + if (NOT CMAKE_CONFIGURATION_TYPES) + add_custom_target(install-${name} + DEPENDS ${name} + COMMAND "${CMAKE_COMMAND}" + -DCMAKE_INSTALL_COMPONENT=${name} + -P "${CMAKE_BINARY_DIR}/cmake_install.cmake") + endif() + endif() + set_property(GLOBAL APPEND PROPERTY LLVM_EXPORTS ${name}) + endif() + set_target_properties(${name} PROPERTIES FOLDER "Libraries") +endmacro(add_llvm_library name) + +macro(add_llvm_loadable_module name) + llvm_add_library(${name} MODULE ${ARGN}) + if(NOT TARGET ${name}) + # Add empty "phony" target + add_custom_target(${name}) + else() + if( EXCLUDE_FROM_ALL ) + set_target_properties( ${name} PROPERTIES EXCLUDE_FROM_ALL ON) + else() + if (NOT LLVM_INSTALL_TOOLCHAIN_ONLY) + if(WIN32 OR CYGWIN) + # DLL platform + set(dlldir "bin") + else() + set(dlldir "lib${LLVM_LIBDIR_SUFFIX}") + endif() + install(TARGETS ${name} + EXPORT LLVMExports + LIBRARY DESTINATION ${dlldir} + ARCHIVE DESTINATION lib${LLVM_LIBDIR_SUFFIX}) + endif() + set_property(GLOBAL APPEND PROPERTY LLVM_EXPORTS ${name}) + endif() + endif() + + set_target_properties(${name} PROPERTIES FOLDER "Loadable modules") +endmacro(add_llvm_loadable_module name) + + +macro(add_llvm_executable name) + cmake_parse_arguments(ARG "DISABLE_LLVM_LINK_LLVM_DYLIB;IGNORE_EXTERNALIZE_DEBUGINFO" "" "" ${ARGN}) + llvm_process_sources( ALL_FILES ${ARG_UNPARSED_ARGUMENTS} ) + + # Generate objlib + if(LLVM_ENABLE_OBJLIB) + # Generate an obj library for both targets. + set(obj_name "obj.${name}") + add_library(${obj_name} OBJECT EXCLUDE_FROM_ALL + ${ALL_FILES} + ) + llvm_update_compile_flags(${obj_name}) + set(ALL_FILES "$") + + set_target_properties(${obj_name} PROPERTIES FOLDER "Object Libraries") + endif() + + add_windows_version_resource_file(ALL_FILES ${ALL_FILES}) + + if(XCODE) + # Note: the dummy.cpp source file provides no definitions. However, + # it forces Xcode to properly link the static library. + list(APPEND ALL_FILES "${LLVM_MAIN_SRC_DIR}/cmake/dummy.cpp") + endif() + + if( EXCLUDE_FROM_ALL ) + add_executable(${name} EXCLUDE_FROM_ALL ${ALL_FILES}) + else() + add_executable(${name} ${ALL_FILES}) + endif() + + if(DEFINED windows_resource_file) + set_windows_version_resource_properties(${name} ${windows_resource_file}) + endif() + + # $ doesn't require compile flags. + if(NOT LLVM_ENABLE_OBJLIB) + llvm_update_compile_flags(${name}) + endif() + add_link_opts( ${name} ) + + # Do not add -Dname_EXPORTS to the command-line when building files in this + # target. Doing so is actively harmful for the modules build because it + # creates extra module variants, and not useful because we don't use these + # macros. + set_target_properties( ${name} PROPERTIES DEFINE_SYMBOL "" ) + + if (LLVM_EXPORTED_SYMBOL_FILE) + add_llvm_symbol_exports( ${name} ${LLVM_EXPORTED_SYMBOL_FILE} ) + endif(LLVM_EXPORTED_SYMBOL_FILE) + + if (LLVM_LINK_LLVM_DYLIB AND NOT ARG_DISABLE_LLVM_LINK_LLVM_DYLIB) + set(USE_SHARED USE_SHARED) + endif() + + set(EXCLUDE_FROM_ALL OFF) + set_output_directory(${name} BINARY_DIR ${LLVM_RUNTIME_OUTPUT_INTDIR} LIBRARY_DIR ${LLVM_LIBRARY_OUTPUT_INTDIR}) + llvm_config( ${name} ${USE_SHARED} ${LLVM_LINK_COMPONENTS} ) + if( LLVM_COMMON_DEPENDS ) + add_dependencies( ${name} ${LLVM_COMMON_DEPENDS} ) + endif( LLVM_COMMON_DEPENDS ) + + if(NOT ARG_IGNORE_EXTERNALIZE_DEBUGINFO) + llvm_externalize_debuginfo(${name}) + endif() +endmacro(add_llvm_executable name) + +function(export_executable_symbols target) + if (NOT MSVC) # MSVC's linker doesn't support exporting all symbols. + set_target_properties(${target} PROPERTIES ENABLE_EXPORTS 1) + if (APPLE) + set_property(TARGET ${target} APPEND_STRING PROPERTY + LINK_FLAGS " -rdynamic") + endif() + endif() +endfunction() + +if(NOT LLVM_TOOLCHAIN_TOOLS) + set (LLVM_TOOLCHAIN_TOOLS + llvm-ar + llvm-ranlib + llvm-lib + llvm-objdump + ) +endif() + +macro(add_llvm_tool name) + if( NOT LLVM_BUILD_TOOLS ) + set(EXCLUDE_FROM_ALL ON) + endif() + add_llvm_executable(${name} ${ARGN}) + + list(FIND LLVM_TOOLCHAIN_TOOLS ${name} LLVM_IS_${name}_TOOLCHAIN_TOOL) + if (LLVM_IS_${name}_TOOLCHAIN_TOOL GREATER -1 OR NOT LLVM_INSTALL_TOOLCHAIN_ONLY) + if( LLVM_BUILD_TOOLS ) + install(TARGETS ${name} + EXPORT LLVMExports + RUNTIME DESTINATION bin + COMPONENT ${name}) + + if (NOT CMAKE_CONFIGURATION_TYPES) + add_custom_target(install-${name} + DEPENDS ${name} + COMMAND "${CMAKE_COMMAND}" + -DCMAKE_INSTALL_COMPONENT=${name} + -P "${CMAKE_BINARY_DIR}/cmake_install.cmake") + endif() + endif() + endif() + if( LLVM_BUILD_TOOLS ) + set_property(GLOBAL APPEND PROPERTY LLVM_EXPORTS ${name}) + endif() + set_target_properties(${name} PROPERTIES FOLDER "Tools") +endmacro(add_llvm_tool name) + + +macro(add_llvm_example name) + if( NOT LLVM_BUILD_EXAMPLES ) + set(EXCLUDE_FROM_ALL ON) + endif() + add_llvm_executable(${name} ${ARGN}) + if( LLVM_BUILD_EXAMPLES ) + install(TARGETS ${name} RUNTIME DESTINATION examples) + endif() + set_target_properties(${name} PROPERTIES FOLDER "Examples") +endmacro(add_llvm_example name) + + +macro(add_llvm_utility name) + add_llvm_executable(${name} DISABLE_LLVM_LINK_LLVM_DYLIB ${ARGN}) + set_target_properties(${name} PROPERTIES FOLDER "Utils") + if( LLVM_INSTALL_UTILS ) + install (TARGETS ${name} + RUNTIME DESTINATION bin + COMPONENT ${name}) + if (NOT CMAKE_CONFIGURATION_TYPES) + add_custom_target(install-${name} + DEPENDS ${name} + COMMAND "${CMAKE_COMMAND}" + -DCMAKE_INSTALL_COMPONENT=${name} + -P "${CMAKE_BINARY_DIR}/cmake_install.cmake") + endif() + endif() +endmacro(add_llvm_utility name) + + +macro(add_llvm_target target_name) + include_directories(BEFORE + ${CMAKE_CURRENT_BINARY_DIR} + ${CMAKE_CURRENT_SOURCE_DIR}) + add_llvm_library(LLVM${target_name} ${ARGN}) + set( CURRENT_LLVM_TARGET LLVM${target_name} ) +endmacro(add_llvm_target) + +function(canonicalize_tool_name name output) + string(REPLACE "${CMAKE_CURRENT_SOURCE_DIR}/" "" nameStrip ${name}) + string(REPLACE "-" "_" nameUNDERSCORE ${nameStrip}) + string(TOUPPER ${nameUNDERSCORE} nameUPPER) + set(${output} "${nameUPPER}" PARENT_SCOPE) +endfunction(canonicalize_tool_name) + +# Custom add_subdirectory wrapper +# Takes in a project name (i.e. LLVM), the the subdirectory name, and an +# and an optional path if it differs from the name. +macro(add_llvm_subdirectory project type name) + set(add_llvm_external_dir "${ARGN}") + if("${add_llvm_external_dir}" STREQUAL "") + set(add_llvm_external_dir ${name}) + endif() + canonicalize_tool_name(${name} nameUPPER) + if(EXISTS ${CMAKE_CURRENT_SOURCE_DIR}/${add_llvm_external_dir}/CMakeLists.txt) + # Treat it as in-tree subproject. + option(${project}_${type}_${nameUPPER}_BUILD + "Whether to build ${name} as part of ${project}" On) + mark_as_advanced(${project}_${type}_${name}_BUILD) + if(${project}_${type}_${nameUPPER}_BUILD) + add_subdirectory(${CMAKE_CURRENT_SOURCE_DIR}/${add_llvm_external_dir} ${add_llvm_external_dir}) + # Don't process it in add_llvm_implicit_projects(). + set(${project}_${type}_${nameUPPER}_BUILD OFF) + endif() + else() + set(LLVM_EXTERNAL_${nameUPPER}_SOURCE_DIR + "${LLVM_EXTERNAL_${nameUPPER}_SOURCE_DIR}" + CACHE PATH "Path to ${name} source directory") + set(${project}_${type}_${nameUPPER}_BUILD_DEFAULT ON) + if(NOT LLVM_EXTERNAL_${nameUPPER}_SOURCE_DIR OR NOT EXISTS ${LLVM_EXTERNAL_${nameUPPER}_SOURCE_DIR}) + set(${project}_${type}_${nameUPPER}_BUILD_DEFAULT OFF) + endif() + if("${LLVM_EXTERNAL_${nameUPPER}_BUILD}" STREQUAL "OFF") + set(${project}_${type}_${nameUPPER}_BUILD_DEFAULT OFF) + endif() + option(${project}_${type}_${nameUPPER}_BUILD + "Whether to build ${name} as part of LLVM" + ${${project}_${type}_${nameUPPER}_BUILD_DEFAULT}) + if (${project}_${type}_${nameUPPER}_BUILD) + if(EXISTS ${LLVM_EXTERNAL_${nameUPPER}_SOURCE_DIR}) + add_subdirectory(${LLVM_EXTERNAL_${nameUPPER}_SOURCE_DIR} ${add_llvm_external_dir}) + elseif(NOT "${LLVM_EXTERNAL_${nameUPPER}_SOURCE_DIR}" STREQUAL "") + message(WARNING "Nonexistent directory for ${name}: ${LLVM_EXTERNAL_${nameUPPER}_SOURCE_DIR}") + endif() + # FIXME: It'd be redundant. + set(${project}_${type}_${nameUPPER}_BUILD Off) + endif() + endif() +endmacro() + +# Add external project that may want to be built as part of llvm such as Clang, +# lld, and Polly. This adds two options. One for the source directory of the +# project, which defaults to ${CMAKE_CURRENT_SOURCE_DIR}/${name}. Another to +# enable or disable building it with everything else. +# Additional parameter can be specified as the name of directory. +macro(add_llvm_external_project name) + add_llvm_subdirectory(LLVM TOOL ${name} ${ARGN}) +endmacro() + +macro(add_llvm_tool_subdirectory name) + add_llvm_external_project(${name}) +endmacro(add_llvm_tool_subdirectory) + +function(get_project_name_from_src_var var output) + string(REGEX MATCH "LLVM_EXTERNAL_(.*)_SOURCE_DIR" + MACHED_TOOL "${var}") + if(MACHED_TOOL) + set(${output} ${CMAKE_MATCH_1} PARENT_SCOPE) + else() + set(${output} PARENT_SCOPE) + endif() +endfunction() + +function(create_subdirectory_options project type) + file(GLOB sub-dirs "${CMAKE_CURRENT_SOURCE_DIR}/*") + foreach(dir ${sub-dirs}) + if(IS_DIRECTORY "${dir}" AND EXISTS "${dir}/CMakeLists.txt") + canonicalize_tool_name(${dir} name) + option(${project}_${type}_${name}_BUILD + "Whether to build ${name} as part of ${project}" On) + mark_as_advanced(${project}_${type}_${name}_BUILD) + endif() + endforeach() +endfunction(create_subdirectory_options) + +function(create_llvm_tool_options) + create_subdirectory_options(LLVM TOOL) +endfunction(create_llvm_tool_options) + +function(add_llvm_implicit_projects) + set(list_of_implicit_subdirs "") + file(GLOB sub-dirs "${CMAKE_CURRENT_SOURCE_DIR}/*") + foreach(dir ${sub-dirs}) + if(IS_DIRECTORY "${dir}" AND EXISTS "${dir}/CMakeLists.txt") + canonicalize_tool_name(${dir} name) + if (LLVM_TOOL_${name}_BUILD) + get_filename_component(fn "${dir}" NAME) + list(APPEND list_of_implicit_subdirs "${fn}") + endif() + endif() + endforeach() + + foreach(external_proj ${list_of_implicit_subdirs}) + add_llvm_external_project("${external_proj}") + endforeach() +endfunction(add_llvm_implicit_projects) + +# Generic support for adding a unittest. +function(add_unittest test_suite test_name) + if( NOT LLVM_BUILD_TESTS ) + set(EXCLUDE_FROM_ALL ON) + endif() + + include_directories(${LLVM_MAIN_SRC_DIR}/utils/unittest/googletest/include) + if (NOT LLVM_ENABLE_THREADS) + list(APPEND LLVM_COMPILE_DEFINITIONS GTEST_HAS_PTHREAD=0) + endif () + + if (SUPPORTS_NO_VARIADIC_MACROS_FLAG) + list(APPEND LLVM_COMPILE_FLAGS "-Wno-variadic-macros") + endif () + + set(LLVM_REQUIRES_RTTI OFF) + + add_llvm_executable(${test_name} IGNORE_EXTERNALIZE_DEBUGINFO ${ARGN}) + set(outdir ${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_CFG_INTDIR}) + set_output_directory(${test_name} BINARY_DIR ${outdir} LIBRARY_DIR ${outdir}) + target_link_libraries(${test_name} + gtest + gtest_main + LLVMSupport # gtest needs it for raw_ostream. + ) + + add_dependencies(${test_suite} ${test_name}) + get_target_property(test_suite_folder ${test_suite} FOLDER) + if (NOT ${test_suite_folder} STREQUAL "NOTFOUND") + set_property(TARGET ${test_name} PROPERTY FOLDER "${test_suite_folder}") + endif () +endfunction() + +function(llvm_add_go_executable binary pkgpath) + cmake_parse_arguments(ARG "ALL" "" "DEPENDS;GOFLAGS" ${ARGN}) + + if(LLVM_BINDINGS MATCHES "go") + # FIXME: This should depend only on the libraries Go needs. + get_property(llvmlibs GLOBAL PROPERTY LLVM_LIBS) + set(binpath ${CMAKE_BINARY_DIR}/bin/${binary}${CMAKE_EXECUTABLE_SUFFIX}) + set(cc "${CMAKE_C_COMPILER} ${CMAKE_C_COMPILER_ARG1}") + set(cxx "${CMAKE_CXX_COMPILER} ${CMAKE_CXX_COMPILER_ARG1}") + set(cppflags "") + get_property(include_dirs DIRECTORY PROPERTY INCLUDE_DIRECTORIES) + foreach(d ${include_dirs}) + set(cppflags "${cppflags} -I${d}") + endforeach(d) + set(ldflags "${CMAKE_EXE_LINKER_FLAGS}") + add_custom_command(OUTPUT ${binpath} + COMMAND ${CMAKE_BINARY_DIR}/bin/llvm-go "go=${GO_EXECUTABLE}" "cc=${cc}" "cxx=${cxx}" "cppflags=${cppflags}" "ldflags=${ldflags}" + ${ARG_GOFLAGS} build -o ${binpath} ${pkgpath} + DEPENDS llvm-config ${CMAKE_BINARY_DIR}/bin/llvm-go${CMAKE_EXECUTABLE_SUFFIX} + ${llvmlibs} ${ARG_DEPENDS} + COMMENT "Building Go executable ${binary}" + VERBATIM) + if (ARG_ALL) + add_custom_target(${binary} ALL DEPENDS ${binpath}) + else() + add_custom_target(${binary} DEPENDS ${binpath}) + endif() + endif() +endfunction() + +# This function provides an automatic way to 'configure'-like generate a file +# based on a set of common and custom variables, specifically targeting the +# variables needed for the 'lit.site.cfg' files. This function bundles the +# common variables that any Lit instance is likely to need, and custom +# variables can be passed in. +function(configure_lit_site_cfg input output) + foreach(c ${LLVM_TARGETS_TO_BUILD}) + set(TARGETS_BUILT "${TARGETS_BUILT} ${c}") + endforeach(c) + set(TARGETS_TO_BUILD ${TARGETS_BUILT}) + + set(SHLIBEXT "${LTDL_SHLIB_EXT}") + + # Configuration-time: See Unit/lit.site.cfg.in + if (CMAKE_CFG_INTDIR STREQUAL ".") + set(LLVM_BUILD_MODE ".") + else () + set(LLVM_BUILD_MODE "%(build_mode)s") + endif () + + # They below might not be the build tree but provided binary tree. + set(LLVM_SOURCE_DIR ${LLVM_MAIN_SRC_DIR}) + set(LLVM_BINARY_DIR ${LLVM_BINARY_DIR}) + string(REPLACE ${CMAKE_CFG_INTDIR} ${LLVM_BUILD_MODE} LLVM_TOOLS_DIR ${LLVM_TOOLS_BINARY_DIR}) + string(REPLACE ${CMAKE_CFG_INTDIR} ${LLVM_BUILD_MODE} LLVM_LIBS_DIR ${LLVM_LIBRARY_DIR}) + + # SHLIBDIR points the build tree. + string(REPLACE ${CMAKE_CFG_INTDIR} ${LLVM_BUILD_MODE} SHLIBDIR "${LLVM_SHLIB_OUTPUT_INTDIR}") + + set(PYTHON_EXECUTABLE ${PYTHON_EXECUTABLE}) + # FIXME: "ENABLE_SHARED" doesn't make sense, since it is used just for + # plugins. We may rename it. + if(LLVM_ENABLE_PLUGINS) + set(ENABLE_SHARED "1") + else() + set(ENABLE_SHARED "0") + endif() + + if(LLVM_ENABLE_ASSERTIONS AND NOT MSVC_IDE) + set(ENABLE_ASSERTIONS "1") + else() + set(ENABLE_ASSERTIONS "0") + endif() + + set(HOST_OS ${CMAKE_SYSTEM_NAME}) + set(HOST_ARCH ${CMAKE_SYSTEM_PROCESSOR}) + + set(HOST_CC "${CMAKE_C_COMPILER} ${CMAKE_C_COMPILER_ARG1}") + set(HOST_CXX "${CMAKE_CXX_COMPILER} ${CMAKE_CXX_COMPILER_ARG1}") + set(HOST_LDFLAGS "${CMAKE_EXE_LINKER_FLAGS}") + + configure_file(${input} ${output} @ONLY) +endfunction() + +# A raw function to create a lit target. This is used to implement the testuite +# management functions. +function(add_lit_target target comment) + cmake_parse_arguments(ARG "" "" "PARAMS;DEPENDS;ARGS" ${ARGN}) + set(LIT_ARGS "${ARG_ARGS} ${LLVM_LIT_ARGS}") + separate_arguments(LIT_ARGS) + if (NOT CMAKE_CFG_INTDIR STREQUAL ".") + list(APPEND LIT_ARGS --param build_mode=${CMAKE_CFG_INTDIR}) + endif () + if (LLVM_MAIN_SRC_DIR) + set (LIT_COMMAND ${PYTHON_EXECUTABLE} ${LLVM_MAIN_SRC_DIR}/utils/lit/lit.py) + else() + find_program(LIT_COMMAND llvm-lit) + endif () + list(APPEND LIT_COMMAND ${LIT_ARGS}) + foreach(param ${ARG_PARAMS}) + list(APPEND LIT_COMMAND --param ${param}) + endforeach() + if (ARG_UNPARSED_ARGUMENTS) + add_custom_target(${target} + COMMAND ${LIT_COMMAND} ${ARG_UNPARSED_ARGUMENTS} + COMMENT "${comment}" + ${cmake_3_2_USES_TERMINAL} + ) + else() + add_custom_target(${target} + COMMAND ${CMAKE_COMMAND} -E echo "${target} does nothing, no tools built.") + message(STATUS "${target} does nothing.") + endif() + if (ARG_DEPENDS) + add_dependencies(${target} ${ARG_DEPENDS}) + endif() + + # Tests should be excluded from "Build Solution". + set_target_properties(${target} PROPERTIES EXCLUDE_FROM_DEFAULT_BUILD ON) +endfunction() + +# A function to add a set of lit test suites to be driven through 'check-*' targets. +function(add_lit_testsuite target comment) + cmake_parse_arguments(ARG "" "" "PARAMS;DEPENDS;ARGS" ${ARGN}) + + # EXCLUDE_FROM_ALL excludes the test ${target} out of check-all. + if(NOT EXCLUDE_FROM_ALL) + # Register the testsuites, params and depends for the global check rule. + set_property(GLOBAL APPEND PROPERTY LLVM_LIT_TESTSUITES ${ARG_UNPARSED_ARGUMENTS}) + set_property(GLOBAL APPEND PROPERTY LLVM_LIT_PARAMS ${ARG_PARAMS}) + set_property(GLOBAL APPEND PROPERTY LLVM_LIT_DEPENDS ${ARG_DEPENDS}) + set_property(GLOBAL APPEND PROPERTY LLVM_LIT_EXTRA_ARGS ${ARG_ARGS}) + endif() + + # Produce a specific suffixed check rule. + add_lit_target(${target} ${comment} + ${ARG_UNPARSED_ARGUMENTS} + PARAMS ${ARG_PARAMS} + DEPENDS ${ARG_DEPENDS} + ARGS ${ARG_ARGS} + ) +endfunction() + +function(add_lit_testsuites project directory) + if (NOT CMAKE_CONFIGURATION_TYPES) + cmake_parse_arguments(ARG "" "" "PARAMS;DEPENDS;ARGS" ${ARGN}) + file(GLOB_RECURSE litCfg ${directory}/lit*.cfg) + set(lit_suites) + foreach(f ${litCfg}) + get_filename_component(dir ${f} DIRECTORY) + set(lit_suites ${lit_suites} ${dir}) + endforeach() + list(REMOVE_DUPLICATES lit_suites) + foreach(dir ${lit_suites}) + string(REPLACE ${directory} "" name_slash ${dir}) + if (name_slash) + string(REPLACE "/" "-" name_slash ${name_slash}) + string(REPLACE "\\" "-" name_dashes ${name_slash}) + string(TOLOWER "${project}${name_dashes}" name_var) + add_lit_target("check-${name_var}" "Running lit suite ${dir}" + ${dir} + PARAMS ${ARG_PARAMS} + DEPENDS ${ARG_DEPENDS} + ARGS ${ARG_ARGS} + ) + endif() + endforeach() + endif() +endfunction() + +function(llvm_install_library_symlink name dest type) + cmake_parse_arguments(ARG "ALWAYS_GENERATE" "COMPONENT" "" ${ARGN}) + foreach(path ${CMAKE_MODULE_PATH}) + if(EXISTS ${path}/LLVMInstallSymlink.cmake) + set(INSTALL_SYMLINK ${path}/LLVMInstallSymlink.cmake) + break() + endif() + endforeach() + + set(component ${ARG_COMPONENT}) + if(NOT component) + set(component ${name}) + endif() + + set(full_name ${CMAKE_${type}_LIBRARY_PREFIX}${name}${CMAKE_${type}_LIBRARY_SUFFIX}) + set(full_dest ${CMAKE_${type}_LIBRARY_PREFIX}${dest}${CMAKE_${type}_LIBRARY_SUFFIX}) + + set(output_dir lib${LLVM_LIBDIR_SUFFIX}) + if(WIN32 AND "${type}" STREQUAL "SHARED") + set(output_dir bin) + endif() + + install(SCRIPT ${INSTALL_SYMLINK} + CODE "install_symlink(${full_name} ${full_dest} ${output_dir})" + COMPONENT ${component}) + + if (NOT CMAKE_CONFIGURATION_TYPES AND NOT ARG_ALWAYS_GENERATE) + add_custom_target(install-${name} + DEPENDS ${name} ${dest} install-${dest} + COMMAND "${CMAKE_COMMAND}" + -DCMAKE_INSTALL_COMPONENT=${name} + -P "${CMAKE_BINARY_DIR}/cmake_install.cmake") + endif() +endfunction() + +function(llvm_install_symlink name dest) + cmake_parse_arguments(ARG "ALWAYS_GENERATE" "" "" ${ARGN}) + foreach(path ${CMAKE_MODULE_PATH}) + if(EXISTS ${path}/LLVMInstallSymlink.cmake) + set(INSTALL_SYMLINK ${path}/LLVMInstallSymlink.cmake) + break() + endif() + endforeach() + + if(ARG_ALWAYS_GENERATE) + set(component ${dest}) + else() + set(component ${name}) + endif() + + set(full_name ${name}${CMAKE_EXECUTABLE_SUFFIX}) + set(full_dest ${dest}${CMAKE_EXECUTABLE_SUFFIX}) + + install(SCRIPT ${INSTALL_SYMLINK} + CODE "install_symlink(${full_name} ${full_dest} bin)" + COMPONENT ${component}) + + if (NOT CMAKE_CONFIGURATION_TYPES AND NOT ARG_ALWAYS_GENERATE) + add_custom_target(install-${name} + DEPENDS ${name} ${dest} install-${dest} + COMMAND "${CMAKE_COMMAND}" + -DCMAKE_INSTALL_COMPONENT=${name} + -P "${CMAKE_BINARY_DIR}/cmake_install.cmake") + endif() +endfunction() + +function(add_llvm_tool_symlink name dest) + cmake_parse_arguments(ARG "ALWAYS_GENERATE" "" "" ${ARGN}) + if(UNIX) + set(LLVM_LINK_OR_COPY create_symlink) + set(dest_binary "${dest}${CMAKE_EXECUTABLE_SUFFIX}") + else() + set(LLVM_LINK_OR_COPY copy) + set(dest_binary "${LLVM_RUNTIME_OUTPUT_INTDIR}/${dest}${CMAKE_EXECUTABLE_SUFFIX}") + endif() + + set(output_path "${LLVM_RUNTIME_OUTPUT_INTDIR}/${name}${CMAKE_EXECUTABLE_SUFFIX}") + + if(ARG_ALWAYS_GENERATE) + set_property(DIRECTORY APPEND PROPERTY + ADDITIONAL_MAKE_CLEAN_FILES ${dest_binary}) + add_custom_command(TARGET ${dest} POST_BUILD + COMMAND ${CMAKE_COMMAND} -E ${LLVM_LINK_OR_COPY} "${dest_binary}" "${output_path}") + else() + add_custom_command(OUTPUT ${output_path} + COMMAND ${CMAKE_COMMAND} -E ${LLVM_LINK_OR_COPY} "${dest_binary}" "${output_path}" + DEPENDS ${dest}) + add_custom_target(${name} ALL DEPENDS ${output_path}) + set_target_properties(${name} PROPERTIES FOLDER Tools) + + # Make sure the parent tool is a toolchain tool, otherwise exclude this tool + list(FIND LLVM_TOOLCHAIN_TOOLS ${dest} LLVM_IS_${dest}_TOOLCHAIN_TOOL) + if (NOT LLVM_IS_${dest}_TOOLCHAIN_TOOL GREATER -1) + set(LLVM_IS_${name}_TOOLCHAIN_TOOL ${LLVM_IS_${dest}_TOOLCHAIN_TOOL}) + else() + list(FIND LLVM_TOOLCHAIN_TOOLS ${name} LLVM_IS_${name}_TOOLCHAIN_TOOL) + endif() + + # LLVM_IS_${name}_TOOLCHAIN_TOOL will only be greater than -1 if both this + # tool and its parent tool are in LLVM_TOOLCHAIN_TOOLS + if (LLVM_IS_${name}_TOOLCHAIN_TOOL GREATER -1 OR NOT LLVM_INSTALL_TOOLCHAIN_ONLY) + if( LLVM_BUILD_TOOLS ) + llvm_install_symlink(${name} ${dest}) + endif() + endif() + endif() +endfunction() + +function(llvm_externalize_debuginfo name) + if(NOT LLVM_EXTERNALIZE_DEBUGINFO) + return() + endif() + + if(APPLE) + if(CMAKE_CXX_FLAGS MATCHES "-flto" + OR CMAKE_CXX_FLAGS_${uppercase_CMAKE_BUILD_TYPE} MATCHES "-flto") + + set(lto_object ${CMAKE_CURRENT_BINARY_DIR}/${CMAKE_CFG_INTDIR}/${name}-lto.o) + set_property(TARGET ${name} APPEND_STRING PROPERTY + LINK_FLAGS " -Wl,-object_path_lto,${lto_object}") + endif() + add_custom_command(TARGET ${name} POST_BUILD + COMMAND xcrun dsymutil $ + COMMAND xcrun strip -Sxl $) + else() + message(FATAL_ERROR "LLVM_EXTERNALIZE_DEBUGINFO isn't implemented for non-darwin platforms!") + endif() +endfunction() diff --git a/llvm/cmake/modules/AddLLVMDefinitions.cmake b/llvm/cmake/modules/AddLLVMDefinitions.cmake new file mode 100644 index 0000000..dab1623 --- /dev/null +++ b/llvm/cmake/modules/AddLLVMDefinitions.cmake @@ -0,0 +1,17 @@ +# There is no clear way of keeping track of compiler command-line +# options chosen via `add_definitions', so we need our own method for +# using it on tools/llvm-config/CMakeLists.txt. + +# Beware that there is no implementation of remove_llvm_definitions. + +macro(add_llvm_definitions) + # We don't want no semicolons on LLVM_DEFINITIONS: + foreach(arg ${ARGN}) + if(DEFINED LLVM_DEFINITIONS) + set(LLVM_DEFINITIONS "${LLVM_DEFINITIONS} ${arg}") + else() + set(LLVM_DEFINITIONS ${arg}) + endif() + endforeach(arg) + add_definitions( ${ARGN} ) +endmacro(add_llvm_definitions) diff --git a/llvm/cmake/modules/CMakeLists.txt b/llvm/cmake/modules/CMakeLists.txt new file mode 100644 index 0000000..f515cb0 --- /dev/null +++ b/llvm/cmake/modules/CMakeLists.txt @@ -0,0 +1,94 @@ +set(LLVM_INSTALL_PACKAGE_DIR share/llvm/cmake) +set(llvm_cmake_builddir "${LLVM_BINARY_DIR}/${LLVM_INSTALL_PACKAGE_DIR}") + +get_property(LLVM_EXPORTS GLOBAL PROPERTY LLVM_EXPORTS) +export(TARGETS ${LLVM_EXPORTS} + FILE ${llvm_cmake_builddir}/LLVMExports.cmake) + +get_property(LLVM_AVAILABLE_LIBS GLOBAL PROPERTY LLVM_LIBS) + +foreach(lib ${LLVM_AVAILABLE_LIBS}) + get_property(llvm_lib_deps GLOBAL PROPERTY LLVMBUILD_LIB_DEPS_${lib}) + set(all_llvm_lib_deps + "${all_llvm_lib_deps}\nset_property(GLOBAL PROPERTY LLVMBUILD_LIB_DEPS_${lib} ${llvm_lib_deps})") +endforeach(lib) + +# Generate LLVMConfig.cmake for the build tree. +set(LLVM_CONFIG_CODE " +# LLVM_BUILD_* values available only from LLVM build tree. +set(LLVM_BUILD_BINARY_DIR \"${LLVM_BINARY_DIR}\") +set(LLVM_BUILD_LIBRARY_DIR \"${LLVM_LIBRARY_DIR}\") +set(LLVM_BUILD_MAIN_INCLUDE_DIR \"${LLVM_MAIN_INCLUDE_DIR}\") +set(LLVM_BUILD_MAIN_SRC_DIR \"${LLVM_MAIN_SRC_DIR}\") +") +set(LLVM_CONFIG_INCLUDE_DIRS + "${LLVM_MAIN_INCLUDE_DIR}" + "${LLVM_INCLUDE_DIR}" + ) +set(LLVM_CONFIG_LIBRARY_DIRS + "${LLVM_LIBRARY_DIR}" + ) +set(LLVM_CONFIG_CMAKE_DIR "${CMAKE_CURRENT_SOURCE_DIR}") +set(LLVM_CONFIG_TOOLS_BINARY_DIR "${LLVM_TOOLS_BINARY_DIR}") +set(LLVM_CONFIG_EXPORTS_FILE "${llvm_cmake_builddir}/LLVMExports.cmake") +configure_file( + LLVMConfig.cmake.in + ${llvm_cmake_builddir}/LLVMConfig.cmake + @ONLY) + +# For compatibility with projects that include(LLVMConfig) +# via CMAKE_MODULE_PATH, place API modules next to it. +# This should be removed in the future. +file(COPY . + DESTINATION ${llvm_cmake_builddir} + FILES_MATCHING PATTERN *.cmake + PATTERN .svn EXCLUDE + PATTERN CMakeFiles EXCLUDE + ) + +# Generate LLVMConfig.cmake for the install tree. +set(LLVM_CONFIG_CODE " +# Compute the installation prefix from this LLVMConfig.cmake file location. +get_filename_component(LLVM_INSTALL_PREFIX \"\${CMAKE_CURRENT_LIST_FILE}\" PATH)") +# Construct the proper number of get_filename_component(... PATH) +# calls to compute the installation prefix. +string(REGEX REPLACE "/" ";" _count "${LLVM_INSTALL_PACKAGE_DIR}") +foreach(p ${_count}) + set(LLVM_CONFIG_CODE "${LLVM_CONFIG_CODE} +get_filename_component(LLVM_INSTALL_PREFIX \"\${LLVM_INSTALL_PREFIX}\" PATH)") +endforeach(p) +set(LLVM_CONFIG_INCLUDE_DIRS "\${LLVM_INSTALL_PREFIX}/include") +set(LLVM_CONFIG_LIBRARY_DIRS "\${LLVM_INSTALL_PREFIX}/lib\${LLVM_LIBDIR_SUFFIX}") +set(LLVM_CONFIG_CMAKE_DIR "\${LLVM_INSTALL_PREFIX}/${LLVM_INSTALL_PACKAGE_DIR}") +set(LLVM_CONFIG_TOOLS_BINARY_DIR "\${LLVM_INSTALL_PREFIX}/bin") +set(LLVM_CONFIG_EXPORTS_FILE "\${LLVM_CMAKE_DIR}/LLVMExports.cmake") +configure_file( + LLVMConfig.cmake.in + ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/LLVMConfig.cmake + @ONLY) + +# Generate LLVMConfigVersion.cmake for build and install tree. +configure_file( + LLVMConfigVersion.cmake.in + ${llvm_cmake_builddir}/LLVMConfigVersion.cmake + @ONLY) + +if (NOT LLVM_INSTALL_TOOLCHAIN_ONLY) + install(EXPORT LLVMExports DESTINATION ${LLVM_INSTALL_PACKAGE_DIR}) + + install(FILES + ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/LLVMConfig.cmake + ${llvm_cmake_builddir}/LLVMConfigVersion.cmake + LLVM-Config.cmake + DESTINATION ${LLVM_INSTALL_PACKAGE_DIR}) + + install(DIRECTORY . + DESTINATION ${LLVM_INSTALL_PACKAGE_DIR} + FILES_MATCHING PATTERN *.cmake + PATTERN .svn EXCLUDE + PATTERN LLVMConfig.cmake EXCLUDE + PATTERN LLVMConfigVersion.cmake EXCLUDE + PATTERN LLVM-Config.cmake EXCLUDE + PATTERN GetHostTriple.cmake EXCLUDE + PATTERN CheckAtomic.cmake EXCLUDE) +endif() diff --git a/llvm/cmake/modules/CheckAtomic.cmake b/llvm/cmake/modules/CheckAtomic.cmake new file mode 100644 index 0000000..551de6a --- /dev/null +++ b/llvm/cmake/modules/CheckAtomic.cmake @@ -0,0 +1,69 @@ +# atomic builtins are required for threading support. + +INCLUDE(CheckCXXSourceCompiles) + +# Sometimes linking against libatomic is required for atomic ops, if +# the platform doesn't support lock-free atomics. + +function(check_working_cxx_atomics varname) + set(OLD_CMAKE_REQUIRED_FLAGS ${CMAKE_REQUIRED_FLAGS}) + set(CMAKE_REQUIRED_FLAGS "-std=c++11") + CHECK_CXX_SOURCE_COMPILES(" +#include +std::atomic x; +int main() { + return x; +} +" ${varname}) + set(CMAKE_REQUIRED_FLAGS ${OLD_CMAKE_REQUIRED_FLAGS}) +endfunction(check_working_cxx_atomics) + +# This isn't necessary on MSVC, so avoid command-line switch annoyance +# by only running on GCC-like hosts. +if (LLVM_COMPILER_IS_GCC_COMPATIBLE) + # First check if atomics work without the library. + check_working_cxx_atomics(HAVE_CXX_ATOMICS_WITHOUT_LIB) + # If not, check if the library exists, and atomics work with it. + if(NOT HAVE_CXX_ATOMICS_WITHOUT_LIB) + check_library_exists(atomic __atomic_fetch_add_4 "" HAVE_LIBATOMIC) + if( HAVE_LIBATOMIC ) + list(APPEND CMAKE_REQUIRED_LIBRARIES "atomic") + check_working_cxx_atomics(HAVE_CXX_ATOMICS_WITH_LIB) + if (NOT HAVE_CXX_ATOMICS_WITH_LIB) + message(FATAL_ERROR "Host compiler must support std::atomic!") + endif() + else() + message(FATAL_ERROR "Host compiler appears to require libatomic, but cannot find it.") + endif() + endif() +endif() + +## TODO: This define is only used for the legacy atomic operations in +## llvm's Atomic.h, which should be replaced. Other code simply +## assumes C++11 works. +CHECK_CXX_SOURCE_COMPILES(" +#ifdef _MSC_VER +#include /* Workaround for PR19898. */ +#include +#endif +int main() { +#ifdef _MSC_VER + volatile LONG val = 1; + MemoryBarrier(); + InterlockedCompareExchange(&val, 0, 1); + InterlockedIncrement(&val); + InterlockedDecrement(&val); +#else + volatile unsigned long val = 1; + __sync_synchronize(); + __sync_val_compare_and_swap(&val, 1, 0); + __sync_add_and_fetch(&val, 1); + __sync_sub_and_fetch(&val, 1); +#endif + return 0; + } +" LLVM_HAS_ATOMICS) + +if( NOT LLVM_HAS_ATOMICS ) + message(STATUS "Warning: LLVM will be built thread-unsafe because atomic builtins are missing") +endif() diff --git a/llvm/cmake/modules/ChooseMSVCCRT.cmake b/llvm/cmake/modules/ChooseMSVCCRT.cmake new file mode 100644 index 0000000..0e6e1aa --- /dev/null +++ b/llvm/cmake/modules/ChooseMSVCCRT.cmake @@ -0,0 +1,106 @@ +# The macro choose_msvc_crt() takes a list of possible +# C runtimes to choose from, in the form of compiler flags, +# to present to the user. (MTd for /MTd, etc) +# +# The macro is invoked at the end of the file. +# +# CMake already sets CRT flags in the CMAKE_CXX_FLAGS_* and +# CMAKE_C_FLAGS_* variables by default. To let the user +# override that for each build type: +# 1. Detect which CRT is already selected, and reflect this in +# LLVM_USE_CRT_* so the user can have a better idea of what +# changes they're making. +# 2. Replace the flags in both variables with the new flag via a regex. +# 3. set() the variables back into the cache so the changes +# are user-visible. + +### Helper macros: ### +macro(make_crt_regex regex crts) + set(${regex} "") + foreach(crt ${${crts}}) + # Trying to match the beginning or end of the string with stuff + # like [ ^]+ didn't work, so use a bunch of parentheses instead. + set(${regex} "${${regex}}|(^| +)/${crt}($| +)") + endforeach(crt) + string(REGEX REPLACE "^\\|" "" ${regex} "${${regex}}") +endmacro(make_crt_regex) + +macro(get_current_crt crt_current regex flagsvar) + # Find the selected-by-CMake CRT for each build type, if any. + # Strip off the leading slash and any whitespace. + string(REGEX MATCH "${${regex}}" ${crt_current} "${${flagsvar}}") + string(REPLACE "/" " " ${crt_current} "${${crt_current}}") + string(STRIP "${${crt_current}}" ${crt_current}) +endmacro(get_current_crt) + +# Replaces or adds a flag to a variable. +# Expects 'flag' to be padded with spaces. +macro(set_flag_in_var flagsvar regex flag) + string(REGEX MATCH "${${regex}}" current_flag "${${flagsvar}}") + if("${current_flag}" STREQUAL "") + set(${flagsvar} "${${flagsvar}}${${flag}}") + else() + string(REGEX REPLACE "${${regex}}" "${${flag}}" ${flagsvar} "${${flagsvar}}") + endif() + string(STRIP "${${flagsvar}}" ${flagsvar}) + # Make sure this change gets reflected in the cache/gui. + # CMake requires the docstring parameter whenever set() touches the cache, + # so get the existing docstring and re-use that. + get_property(flagsvar_docs CACHE ${flagsvar} PROPERTY HELPSTRING) + set(${flagsvar} "${${flagsvar}}" CACHE STRING "${flagsvar_docs}" FORCE) +endmacro(set_flag_in_var) + + +macro(choose_msvc_crt MSVC_CRT) + if(LLVM_USE_CRT) + message(FATAL_ERROR + "LLVM_USE_CRT is deprecated. Use the CMAKE_BUILD_TYPE-specific +variables (LLVM_USE_CRT_DEBUG, etc) instead.") + endif() + + make_crt_regex(MSVC_CRT_REGEX ${MSVC_CRT}) + + foreach(build_type ${CMAKE_CONFIGURATION_TYPES} ${CMAKE_BUILD_TYPE}) + string(TOUPPER "${build_type}" build) + if (NOT LLVM_USE_CRT_${build}) + get_current_crt(LLVM_USE_CRT_${build} + MSVC_CRT_REGEX + CMAKE_CXX_FLAGS_${build}) + set(LLVM_USE_CRT_${build} + "${LLVM_USE_CRT_${build}}" + CACHE STRING "Specify VC++ CRT to use for ${build_type} configurations." + FORCE) + set_property(CACHE LLVM_USE_CRT_${build} + PROPERTY STRINGS ;${${MSVC_CRT}}) + endif(NOT LLVM_USE_CRT_${build}) + endforeach(build_type) + + foreach(build_type ${CMAKE_CONFIGURATION_TYPES} ${CMAKE_BUILD_TYPE}) + string(TOUPPER "${build_type}" build) + if ("${LLVM_USE_CRT_${build}}" STREQUAL "") + set(flag_string " ") + else() + set(flag_string " /${LLVM_USE_CRT_${build}} ") + list(FIND ${MSVC_CRT} ${LLVM_USE_CRT_${build}} idx) + if (idx LESS 0) + message(FATAL_ERROR + "Invalid value for LLVM_USE_CRT_${build}: ${LLVM_USE_CRT_${build}}. Valid options are one of: ${${MSVC_CRT}}") + endif (idx LESS 0) + message(STATUS "Using ${build_type} VC++ CRT: ${LLVM_USE_CRT_${build}}") + endif() + foreach(lang C CXX) + set_flag_in_var(CMAKE_${lang}_FLAGS_${build} MSVC_CRT_REGEX flag_string) + endforeach(lang) + endforeach(build_type) +endmacro(choose_msvc_crt MSVC_CRT) + + +# List of valid CRTs for MSVC +set(MSVC_CRT + MD + MDd + MT + MTd) + +choose_msvc_crt(MSVC_CRT) + diff --git a/llvm/cmake/modules/CrossCompile.cmake b/llvm/cmake/modules/CrossCompile.cmake new file mode 100644 index 0000000..c136dfa --- /dev/null +++ b/llvm/cmake/modules/CrossCompile.cmake @@ -0,0 +1,57 @@ +function(llvm_create_cross_target_internal target_name toochain buildtype) + + if(NOT DEFINED LLVM_${target_name}_BUILD) + set(LLVM_${target_name}_BUILD "${CMAKE_BINARY_DIR}/${target_name}") + set(LLVM_${target_name}_BUILD ${LLVM_${target_name}_BUILD} PARENT_SCOPE) + message(STATUS "Setting native build dir to " ${LLVM_${target_name}_BUILD}) + endif(NOT DEFINED LLVM_${target_name}_BUILD) + + if (EXISTS ${LLVM_MAIN_SRC_DIR}/cmake/platforms/${toolchain}.cmake) + set(CROSS_TOOLCHAIN_FLAGS_${target_name} + -DCMAKE_TOOLCHAIN_FILE=\"${LLVM_MAIN_SRC_DIR}/cmake/platforms/${toolchain}.cmake\" + CACHE STRING "Toolchain file for ${target_name}") + endif() + + add_custom_command(OUTPUT ${LLVM_${target_name}_BUILD} + COMMAND ${CMAKE_COMMAND} -E make_directory ${LLVM_${target_name}_BUILD} + COMMENT "Creating ${LLVM_${target_name}_BUILD}...") + + add_custom_command(OUTPUT ${LLVM_${target_name}_BUILD}/CMakeCache.txt + COMMAND ${CMAKE_COMMAND} -G "${CMAKE_GENERATOR}" + ${CROSS_TOOLCHAIN_FLAGS_${target_name}} ${CMAKE_SOURCE_DIR} + -DLLVM_TARGET_IS_CROSSCOMPILE_HOST=TRUE + WORKING_DIRECTORY ${LLVM_${target_name}_BUILD} + DEPENDS ${LLVM_${target_name}_BUILD} + COMMENT "Configuring ${target_name} LLVM...") + + add_custom_target(CONFIGURE_LLVM_${target_name} + DEPENDS ${LLVM_${target_name}_BUILD}/CMakeCache.txt) + + set_directory_properties(PROPERTIES ADDITIONAL_MAKE_CLEAN_FILES + ${LLVM_${target_name}_BUILD}) + + if(NOT IS_DIRECTORY ${LLVM_${target_name}_BUILD}) + + + message(STATUS "Configuring ${target_name} build...") + execute_process(COMMAND ${CMAKE_COMMAND} -E make_directory + ${LLVM_${target_name}_BUILD} ) + + message(STATUS "Configuring ${target_name} targets...") + if (buildtype) + set(build_type_flags "-DCMAKE_BUILD_TYPE=${buildtype}") + endif() + execute_process(COMMAND ${CMAKE_COMMAND} ${build_type_flags} + -G "${CMAKE_GENERATOR}" -DLLVM_TARGETS_TO_BUILD=${LLVM_TARGETS_TO_BUILD} + ${CROSS_TOOLCHAIN_FLAGS_${target_name}} ${CMAKE_SOURCE_DIR} + -DLLVM_TARGET_IS_CROSSCOMPILE_HOST=TRUE + WORKING_DIRECTORY ${LLVM_${target_name}_BUILD} ) + endif(NOT IS_DIRECTORY ${LLVM_${target_name}_BUILD}) + +endfunction() + +function(llvm_create_cross_target target_name sysroot) + llvm_create_cross_target_internal(${target_name} ${sysroot} ${CMAKE_BUILD_TYPE}) +endfunction() + +llvm_create_cross_target_internal(NATIVE "" Release) diff --git a/llvm/cmake/modules/DetermineGCCCompatible.cmake b/llvm/cmake/modules/DetermineGCCCompatible.cmake new file mode 100644 index 0000000..1bf15fc --- /dev/null +++ b/llvm/cmake/modules/DetermineGCCCompatible.cmake @@ -0,0 +1,11 @@ +# Determine if the compiler has GCC-compatible command-line syntax. + +if(NOT DEFINED LLVM_COMPILER_IS_GCC_COMPATIBLE) + if(CMAKE_COMPILER_IS_GNUCXX) + set(LLVM_COMPILER_IS_GCC_COMPATIBLE ON) + elseif( MSVC ) + set(LLVM_COMPILER_IS_GCC_COMPATIBLE OFF) + elseif( "${CMAKE_CXX_COMPILER_ID}" MATCHES "Clang" ) + set(LLVM_COMPILER_IS_GCC_COMPATIBLE ON) + endif() +endif() diff --git a/llvm/cmake/modules/GetHostTriple.cmake b/llvm/cmake/modules/GetHostTriple.cmake new file mode 100644 index 0000000..426f71e --- /dev/null +++ b/llvm/cmake/modules/GetHostTriple.cmake @@ -0,0 +1,30 @@ +# Returns the host triple. +# Invokes config.guess + +function( get_host_triple var ) + if( MSVC ) + if( CMAKE_CL_64 ) + set( value "x86_64-pc-win32" ) + else() + set( value "i686-pc-win32" ) + endif() + elseif( (MINGW OR ANDROID) AND NOT MSYS ) + if( CMAKE_SIZEOF_VOID_P EQUAL 8 ) + set( value "x86_64-w64-mingw32" ) + else() + set( value "i686-pc-mingw32" ) + endif() + else( MSVC ) + set(config_guess ${LLVM_MAIN_SRC_DIR}/cmake/config.guess) + execute_process(COMMAND sh ${config_guess} + RESULT_VARIABLE TT_RV + OUTPUT_VARIABLE TT_OUT + OUTPUT_STRIP_TRAILING_WHITESPACE) + if( NOT TT_RV EQUAL 0 ) + message(FATAL_ERROR "Failed to execute ${config_guess}") + endif( NOT TT_RV EQUAL 0 ) + set( value ${TT_OUT} ) + endif( MSVC ) + set( ${var} ${value} PARENT_SCOPE ) + message(STATUS "Target triple: ${value}") +endfunction( get_host_triple var ) diff --git a/llvm/cmake/modules/GetSVN.cmake b/llvm/cmake/modules/GetSVN.cmake new file mode 100644 index 0000000..d512bd2 --- /dev/null +++ b/llvm/cmake/modules/GetSVN.cmake @@ -0,0 +1,115 @@ +# CMake project that writes Subversion revision information to a header. +# +# Input variables: +# FIRST_SOURCE_DIR - First source directory +# FIRST_NAME - The macro prefix for the first repository's info +# SECOND_SOURCE_DIR - Second source directory (opt) +# SECOND_NAME - The macro prefix for the second repository's info (opt) +# HEADER_FILE - The header file to write +# +# The output header will contain macros FIRST_REPOSITORY and FIRST_REVISION, +# and SECOND_REPOSITORY and SECOND_REVISION if requested, where "FIRST" and +# "SECOND" are substituted with the names specified in the input variables. + +# Chop off cmake/modules/GetSVN.cmake +get_filename_component(LLVM_DIR "${CMAKE_SCRIPT_MODE_FILE}" PATH) +get_filename_component(LLVM_DIR "${LLVM_DIR}" PATH) +get_filename_component(LLVM_DIR "${LLVM_DIR}" PATH) + +# Handle strange terminals +set(ENV{TERM} "dumb") + +macro(get_source_info_svn path revision repository) + # If svn is a bat file, find_program(Subversion) doesn't find it. + # Explicitly search for that here; Subversion_SVN_EXECUTABLE will override + # the find_program call in FindSubversion.cmake. + find_program(Subversion_SVN_EXECUTABLE NAMES svn svn.bat) + + # FindSubversion does not work with symlinks. See PR 8437 + if (NOT IS_SYMLINK "${path}") + find_package(Subversion) + endif() + if (Subversion_FOUND) + subversion_wc_info( ${path} Project ) + if (Project_WC_REVISION) + set(${revision} ${Project_WC_REVISION} PARENT_SCOPE) + endif() + if (Project_WC_URL) + set(${repository} ${Project_WC_URL} PARENT_SCOPE) + endif() + endif() +endmacro() + +macro(get_source_info_git_svn path revision repository) + find_program(git_executable NAMES git git.exe git.cmd) + if (git_executable) + execute_process(COMMAND ${git_executable} svn info + WORKING_DIRECTORY ${path} + TIMEOUT 5 + RESULT_VARIABLE git_result + OUTPUT_VARIABLE git_output) + if (git_result EQUAL 0) + string(REGEX REPLACE "^(.*\n)?Revision: ([^\n]+).*" + "\\2" git_svn_rev "${git_output}") + set(${revision} ${git_svn_rev} PARENT_SCOPE) + string(REGEX REPLACE "^(.*\n)?URL: ([^\n]+).*" + "\\2" git_url "${git_output}") + set(${repository} ${git_url} PARENT_SCOPE) + endif() + endif() +endmacro() + +macro(get_source_info_git path revision repository) + find_program(git_executable NAMES git git.exe git.cmd) + if (git_executable) + execute_process(COMMAND ${git_executable} log -1 --pretty=format:%H + WORKING_DIRECTORY ${path} + TIMEOUT 5 + RESULT_VARIABLE git_result + OUTPUT_VARIABLE git_output) + if (git_result EQUAL 0) + set(${revision} ${git_output} PARENT_SCOPE) + endif() + execute_process(COMMAND ${git_executable} remote -v + WORKING_DIRECTORY ${path} + TIMEOUT 5 + RESULT_VARIABLE git_result + OUTPUT_VARIABLE git_output) + if (git_result EQUAL 0) + string(REGEX REPLACE "^(.*\n)?[^ \t]+[ \t]+([^ \t\n]+)[ \t]+\\(fetch\\).*" + "\\2" git_url "${git_output}") + set(${repository} "${git_url}" PARENT_SCOPE) + endif() + endif() +endmacro() + +function(get_source_info path revision repository) + if (EXISTS "${path}/.svn") + get_source_info_svn("${path}" revision repository) + elseif (EXISTS "${path}/.git/svn") + get_source_info_git_svn("${path}" revision repository) + elseif (EXISTS "${path}/.git") + get_source_info_git("${path}" revision repository) + endif() +endfunction() + +function(append_info name path) + get_source_info("${path}" revision repository) + string(STRIP "${revision}" revision) + string(STRIP "${repository}" repository) + file(APPEND "${HEADER_FILE}.txt" + "#define ${name}_REVISION \"${revision}\"\n") + file(APPEND "${HEADER_FILE}.txt" + "#define ${name}_REPOSITORY \"${repository}\"\n") +endfunction() + +append_info(${FIRST_NAME} "${FIRST_SOURCE_DIR}") +if(DEFINED SECOND_SOURCE_DIR) + append_info(${SECOND_NAME} "${SECOND_SOURCE_DIR}") +endif() + +# Copy the file only if it has changed. +execute_process(COMMAND ${CMAKE_COMMAND} -E copy_if_different + "${HEADER_FILE}.txt" "${HEADER_FILE}") +file(REMOVE "${HEADER_FILE}.txt") + diff --git a/llvm/cmake/modules/HandleLLVMOptions.cmake b/llvm/cmake/modules/HandleLLVMOptions.cmake new file mode 100644 index 0000000..9b6a590 --- /dev/null +++ b/llvm/cmake/modules/HandleLLVMOptions.cmake @@ -0,0 +1,669 @@ +# This CMake module is responsible for interpreting the user defined LLVM_ +# options and executing the appropriate CMake commands to realize the users' +# selections. + +# This is commonly needed so make sure it's defined before we include anything +# else. +string(TOUPPER "${CMAKE_BUILD_TYPE}" uppercase_CMAKE_BUILD_TYPE) + +include(HandleLLVMStdlib) +include(AddLLVMDefinitions) +include(CheckCCompilerFlag) +include(CheckCXXCompilerFlag) + +if(NOT LLVM_FORCE_USE_OLD_TOOLCHAIN) + if(CMAKE_CXX_COMPILER_ID STREQUAL "GNU") + if(CMAKE_CXX_COMPILER_VERSION VERSION_LESS 4.7) + message(FATAL_ERROR "Host GCC version must be at least 4.7!") + endif() + elseif(CMAKE_CXX_COMPILER_ID STREQUAL "Clang") + if(CMAKE_CXX_COMPILER_VERSION VERSION_LESS 3.1) + message(FATAL_ERROR "Host Clang version must be at least 3.1!") + endif() + + if (CMAKE_CXX_SIMULATE_ID MATCHES "MSVC") + if (CMAKE_CXX_SIMULATE_VERSION VERSION_LESS 18.0) + message(FATAL_ERROR "Host Clang must have at least -fms-compatibility-version=18.0") + endif() + set(CLANG_CL 1) + elseif(NOT LLVM_ENABLE_LIBCXX) + # Otherwise, test that we aren't using too old of a version of libstdc++ + # with the Clang compiler. This is tricky as there is no real way to + # check the version of libstdc++ directly. Instead we test for a known + # bug in libstdc++4.6 that is fixed in libstdc++4.7. + set(OLD_CMAKE_REQUIRED_FLAGS ${CMAKE_REQUIRED_FLAGS}) + set(OLD_CMAKE_REQUIRED_LIBRARIES ${CMAKE_REQUIRED_LIBRARIES}) + set(CMAKE_REQUIRED_FLAGS "-std=c++0x") + check_cxx_source_compiles(" +#include +std::atomic x(0.0f); +int main() { return (float)x; }" + LLVM_NO_OLD_LIBSTDCXX) + if(NOT LLVM_NO_OLD_LIBSTDCXX) + message(FATAL_ERROR "Host Clang must be able to find libstdc++4.7 or newer!") + endif() + set(CMAKE_REQUIRED_FLAGS ${OLD_CMAKE_REQUIRED_FLAGS}) + set(CMAKE_REQUIRED_LIBRARIES ${OLD_CMAKE_REQUIRED_LIBRARIES}) + endif() + elseif(CMAKE_CXX_COMPILER_ID MATCHES "MSVC") + if(CMAKE_CXX_COMPILER_VERSION VERSION_LESS 18.0) + message(FATAL_ERROR "Host Visual Studio must be at least 2013") + elseif(CMAKE_CXX_COMPILER_VERSION VERSION_LESS 18.0.31101) + message(WARNING "Host Visual Studio should at least be 2013 Update 4 (MSVC 18.0.31101)" + " due to miscompiles from earlier versions") + endif() + endif() +endif() + +if (CMAKE_LINKER MATCHES "lld-link.exe") + # Pass /MANIFEST:NO so that CMake doesn't run mt.exe on our binaries. Adding + # manifests with mt.exe breaks LLD's symbol tables and takes as much time as + # the link. See PR24476. + append("/MANIFEST:NO" + CMAKE_EXE_LINKER_FLAGS CMAKE_MODULE_LINKER_FLAGS CMAKE_SHARED_LINKER_FLAGS) +endif() + +if( LLVM_ENABLE_ASSERTIONS ) + # MSVC doesn't like _DEBUG on release builds. See PR 4379. + if( NOT MSVC ) + add_definitions( -D_DEBUG ) + endif() + # On non-Debug builds cmake automatically defines NDEBUG, so we + # explicitly undefine it: + if( NOT uppercase_CMAKE_BUILD_TYPE STREQUAL "DEBUG" ) + add_definitions( -UNDEBUG ) + # Also remove /D NDEBUG to avoid MSVC warnings about conflicting defines. + foreach (flags_var_to_scrub + CMAKE_CXX_FLAGS_RELEASE + CMAKE_CXX_FLAGS_RELWITHDEBINFO + CMAKE_CXX_FLAGS_MINSIZEREL + CMAKE_C_FLAGS_RELEASE + CMAKE_C_FLAGS_RELWITHDEBINFO + CMAKE_C_FLAGS_MINSIZEREL) + string (REGEX REPLACE "(^| )[/-]D *NDEBUG($| )" " " + "${flags_var_to_scrub}" "${${flags_var_to_scrub}}") + endforeach() + endif() +endif() + +string(TOUPPER "${LLVM_ABI_BREAKING_CHECKS}" uppercase_LLVM_ABI_BREAKING_CHECKS) + +if( uppercase_LLVM_ABI_BREAKING_CHECKS STREQUAL "WITH_ASSERTS" ) + if( LLVM_ENABLE_ASSERTIONS ) + set( LLVM_ENABLE_ABI_BREAKING_CHECKS 1 ) + endif() +elseif( uppercase_LLVM_ABI_BREAKING_CHECKS STREQUAL "FORCE_ON" ) + set( LLVM_ENABLE_ABI_BREAKING_CHECKS 1 ) +elseif( uppercase_LLVM_ABI_BREAKING_CHECKS STREQUAL "FORCE_OFF" ) + # We don't need to do anything special to turn off ABI breaking checks. +elseif( NOT DEFINED LLVM_ABI_BREAKING_CHECKS ) + # Treat LLVM_ABI_BREAKING_CHECKS like "FORCE_OFF" when it has not been + # defined. +else() + message(FATAL_ERROR "Unknown value for LLVM_ABI_BREAKING_CHECKS: \"${LLVM_ABI_BREAKING_CHECKS}\"!") +endif() + +if(WIN32) + set(LLVM_HAVE_LINK_VERSION_SCRIPT 0) + if(CYGWIN) + set(LLVM_ON_WIN32 0) + set(LLVM_ON_UNIX 1) + else(CYGWIN) + set(LLVM_ON_WIN32 1) + set(LLVM_ON_UNIX 0) + endif(CYGWIN) +else(WIN32) + if(UNIX) + set(LLVM_ON_WIN32 0) + set(LLVM_ON_UNIX 1) + if(APPLE) + set(LLVM_HAVE_LINK_VERSION_SCRIPT 0) + else(APPLE) + set(LLVM_HAVE_LINK_VERSION_SCRIPT 1) + endif(APPLE) + else(UNIX) + MESSAGE(SEND_ERROR "Unable to determine platform") + endif(UNIX) +endif(WIN32) + +set(EXEEXT ${CMAKE_EXECUTABLE_SUFFIX}) +set(LTDL_SHLIB_EXT ${CMAKE_SHARED_LIBRARY_SUFFIX}) + +# We use *.dylib rather than *.so on darwin. +set(LLVM_PLUGIN_EXT ${CMAKE_SHARED_LIBRARY_SUFFIX}) + +if(APPLE) + # Darwin-specific linker flags for loadable modules. + set(CMAKE_MODULE_LINKER_FLAGS "${CMAKE_MODULE_LINKER_FLAGS} -Wl,-flat_namespace -Wl,-undefined -Wl,suppress") +endif() + +# Pass -Wl,-z,defs. This makes sure all symbols are defined. Otherwise a DSO +# build might work on ELF but fail on MachO/COFF. +if(NOT (${CMAKE_SYSTEM_NAME} MATCHES "Darwin" OR WIN32 OR CYGWIN OR + ${CMAKE_SYSTEM_NAME} MATCHES "FreeBSD" OR + ${CMAKE_SYSTEM_NAME} MATCHES "OpenBSD") AND + NOT LLVM_USE_SANITIZER) + set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -Wl,-z,defs") +endif() + + +function(append value) + foreach(variable ${ARGN}) + set(${variable} "${${variable}} ${value}" PARENT_SCOPE) + endforeach(variable) +endfunction() + +function(append_if condition value) + if (${condition}) + foreach(variable ${ARGN}) + set(${variable} "${${variable}} ${value}" PARENT_SCOPE) + endforeach(variable) + endif() +endfunction() + +macro(add_flag_if_supported flag name) + check_c_compiler_flag("-Werror ${flag}" "C_SUPPORTS_${name}") + append_if("C_SUPPORTS_${name}" "${flag}" CMAKE_C_FLAGS) + check_cxx_compiler_flag("-Werror ${flag}" "CXX_SUPPORTS_${name}") + append_if("CXX_SUPPORTS_${name}" "${flag}" CMAKE_CXX_FLAGS) +endmacro() + +function(add_flag_or_print_warning flag name) + check_c_compiler_flag("-Werror ${flag}" "C_SUPPORTS_${name}") + check_cxx_compiler_flag("-Werror ${flag}" "CXX_SUPPORTS_${name}") + if (C_SUPPORTS_${name} AND CXX_SUPPORTS_${name}) + message(STATUS "Building with ${flag}") + set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${flag}" PARENT_SCOPE) + set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${flag}" PARENT_SCOPE) + set(CMAKE_ASM_FLAGS "${CMAKE_ASM_FLAGS} ${flag}" PARENT_SCOPE) + else() + message(WARNING "${flag} is not supported.") + endif() +endfunction() + +if( LLVM_ENABLE_PIC ) + if( XCODE ) + # Xcode has -mdynamic-no-pic on by default, which overrides -fPIC. I don't + # know how to disable this, so just force ENABLE_PIC off for now. + message(WARNING "-fPIC not supported with Xcode.") + elseif( WIN32 OR CYGWIN) + # On Windows all code is PIC. MinGW warns if -fPIC is used. + else() + add_flag_or_print_warning("-fPIC" FPIC) + endif() +endif() + +if(NOT WIN32 AND NOT CYGWIN) + # MinGW warns if -fvisibility-inlines-hidden is used. + check_cxx_compiler_flag("-fvisibility-inlines-hidden" SUPPORTS_FVISIBILITY_INLINES_HIDDEN_FLAG) + append_if(SUPPORTS_FVISIBILITY_INLINES_HIDDEN_FLAG "-fvisibility-inlines-hidden" CMAKE_CXX_FLAGS) +endif() + +if( CMAKE_SIZEOF_VOID_P EQUAL 8 AND NOT WIN32 ) + # TODO: support other platforms and toolchains. + if( LLVM_BUILD_32_BITS ) + message(STATUS "Building 32 bits executables and libraries.") + add_llvm_definitions( -m32 ) + set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -m32") + set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -m32") + set(CMAKE_MODULE_LINKER_FLAGS "${CMAKE_MODULE_LINKER_FLAGS} -m32") + endif( LLVM_BUILD_32_BITS ) +endif( CMAKE_SIZEOF_VOID_P EQUAL 8 AND NOT WIN32 ) + +if (LLVM_BUILD_STATIC) + set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -static") +endif() + +if( XCODE ) + # For Xcode enable several build settings that correspond to + # many warnings that are on by default in Clang but are + # not enabled for historical reasons. For versions of Xcode + # that do not support these options they will simply + # be ignored. + set(CMAKE_XCODE_ATTRIBUTE_GCC_WARN_ABOUT_RETURN_TYPE "YES") + set(CMAKE_XCODE_ATTRIBUTE_GCC_WARN_ABOUT_MISSING_NEWLINE "YES") + set(CMAKE_XCODE_ATTRIBUTE_GCC_WARN_UNUSED_VALUE "YES") + set(CMAKE_XCODE_ATTRIBUTE_GCC_WARN_UNUSED_VARIABLE "YES") + set(CMAKE_XCODE_ATTRIBUTE_GCC_WARN_SIGN_COMPARE "YES") + set(CMAKE_XCODE_ATTRIBUTE_GCC_WARN_UNUSED_FUNCTION "YES") + set(CMAKE_XCODE_ATTRIBUTE_GCC_WARN_INITIALIZER_NOT_FULLY_BRACKETED "YES") + set(CMAKE_XCODE_ATTRIBUTE_GCC_WARN_HIDDEN_VIRTUAL_FUNCTIONS "YES") + set(CMAKE_XCODE_ATTRIBUTE_GCC_WARN_UNINITIALIZED_AUTOS "YES") + set(CMAKE_XCODE_ATTRIBUTE_CLANG_WARN_BOOL_CONVERSION "YES") + set(CMAKE_XCODE_ATTRIBUTE_CLANG_WARN_EMPTY_BODY "YES") + set(CMAKE_XCODE_ATTRIBUTE_CLANG_WARN_ENUM_CONVERSION "YES") + set(CMAKE_XCODE_ATTRIBUTE_CLANG_WARN_INT_CONVERSION "YES") + set(CMAKE_XCODE_ATTRIBUTE_CLANG_WARN_CONSTANT_CONVERSION "YES") + set(CMAKE_XCODE_ATTRIBUTE_GCC_WARN_NON_VIRTUAL_DESTRUCTOR "YES") +endif() + +# On Win32 using MS tools, provide an option to set the number of parallel jobs +# to use. +if( MSVC_IDE ) + set(LLVM_COMPILER_JOBS "0" CACHE STRING + "Number of parallel compiler jobs. 0 means use all processors. Default is 0.") + if( NOT LLVM_COMPILER_JOBS STREQUAL "1" ) + if( LLVM_COMPILER_JOBS STREQUAL "0" ) + add_llvm_definitions( /MP ) + else() + message(STATUS "Number of parallel compiler jobs set to " ${LLVM_COMPILER_JOBS}) + add_llvm_definitions( /MP${LLVM_COMPILER_JOBS} ) + endif() + else() + message(STATUS "Parallel compilation disabled") + endif() +endif() + +if( MSVC ) + if( CMAKE_CXX_COMPILER_VERSION VERSION_LESS 19.0 ) + # For MSVC 2013, disable iterator null pointer checking in debug mode, + # especially so std::equal(nullptr, nullptr, nullptr) will not assert. + add_llvm_definitions("-D_DEBUG_POINTER_IMPL=") + endif() + + include(ChooseMSVCCRT) + + if( NOT (${CMAKE_VERSION} VERSION_LESS 2.8.11) ) + # set stack reserved size to ~10MB + # CMake previously automatically set this value for MSVC builds, but the + # behavior was changed in CMake 2.8.11 (Issue 12437) to use the MSVC default + # value (1 MB) which is not enough for us in tasks such as parsing recursive + # C++ templates in Clang. + set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} /STACK:10000000") + endif() + + if( MSVC11 ) + add_llvm_definitions(-D_VARIADIC_MAX=10) + endif() + + # Add definitions that make MSVC much less annoying. + add_llvm_definitions( + # For some reason MS wants to deprecate a bunch of standard functions... + -D_CRT_SECURE_NO_DEPRECATE + -D_CRT_SECURE_NO_WARNINGS + -D_CRT_NONSTDC_NO_DEPRECATE + -D_CRT_NONSTDC_NO_WARNINGS + -D_SCL_SECURE_NO_DEPRECATE + -D_SCL_SECURE_NO_WARNINGS + ) + + set(msvc_warning_flags + # Disabled warnings. + -wd4141 # Suppress ''modifier' : used more than once' (because of __forceinline combined with inline) + -wd4146 # Suppress 'unary minus operator applied to unsigned type, result still unsigned' + -wd4180 # Suppress 'qualifier applied to function type has no meaning; ignored' + -wd4244 # Suppress ''argument' : conversion from 'type1' to 'type2', possible loss of data' + -wd4258 # Suppress ''var' : definition from the for loop is ignored; the definition from the enclosing scope is used' + -wd4267 # Suppress ''var' : conversion from 'size_t' to 'type', possible loss of data' + -wd4291 # Suppress ''declaration' : no matching operator delete found; memory will not be freed if initialization throws an exception' + -wd4345 # Suppress 'behavior change: an object of POD type constructed with an initializer of the form () will be default-initialized' + -wd4351 # Suppress 'new behavior: elements of array 'array' will be default initialized' + -wd4355 # Suppress ''this' : used in base member initializer list' + -wd4456 # Suppress 'declaration of 'var' hides local variable' + -wd4457 # Suppress 'declaration of 'var' hides function parameter' + -wd4458 # Suppress 'declaration of 'var' hides class member' + -wd4459 # Suppress 'declaration of 'var' hides global declaration' + -wd4503 # Suppress ''identifier' : decorated name length exceeded, name was truncated' + -wd4624 # Suppress ''derived class' : destructor could not be generated because a base class destructor is inaccessible' + -wd4722 # Suppress 'function' : destructor never returns, potential memory leak + -wd4800 # Suppress ''type' : forcing value to bool 'true' or 'false' (performance warning)' + -wd4100 # Suppress 'unreferenced formal parameter' + -wd4127 # Suppress 'conditional expression is constant' + -wd4512 # Suppress 'assignment operator could not be generated' + -wd4505 # Suppress 'unreferenced local function has been removed' + -wd4610 # Suppress ' can never be instantiated' + -wd4510 # Suppress 'default constructor could not be generated' + -wd4702 # Suppress 'unreachable code' + -wd4245 # Suppress 'signed/unsigned mismatch' + -wd4706 # Suppress 'assignment within conditional expression' + -wd4310 # Suppress 'cast truncates constant value' + -wd4701 # Suppress 'potentially uninitialized local variable' + -wd4703 # Suppress 'potentially uninitialized local pointer variable' + -wd4389 # Suppress 'signed/unsigned mismatch' + -wd4611 # Suppress 'interaction between '_setjmp' and C++ object destruction is non-portable' + -wd4805 # Suppress 'unsafe mix of type and type in operation' + -wd4204 # Suppress 'nonstandard extension used : non-constant aggregate initializer' + -wd4577 # Suppress 'noexcept used with no exception handling mode specified; termination on exception is not guaranteed' + -wd4091 # Suppress 'typedef: ignored on left of '' when no variable is declared' + # C4592 is disabled because of false positives in Visual Studio 2015 + # Update 1. Re-evaluate the usefulness of this diagnostic with Update 2. + -wd4592 # Suppress ''var': symbol will be dynamically initialized (implementation limitation) + + # Ideally, we'd like this warning to be enabled, but MSVC 2013 doesn't + # support the 'aligned' attribute in the way that clang sources requires (for + # any code that uses the LLVM_ALIGNAS macro), so this is must be disabled to + # avoid unwanted alignment warnings. + # When we switch to requiring a version of MSVC that supports the 'alignas' + # specifier (MSVC 2015?) this warning can be re-enabled. + -wd4324 # Suppress 'structure was padded due to __declspec(align())' + + # Promoted warnings. + -w14062 # Promote 'enumerator in switch of enum is not handled' to level 1 warning. + + # Promoted warnings to errors. + -we4238 # Promote 'nonstandard extension used : class rvalue used as lvalue' to error. + ) + + # Enable warnings + if (LLVM_ENABLE_WARNINGS) + # Put /W4 in front of all the -we flags. cl.exe doesn't care, but for + # clang-cl having /W4 after the -we flags will re-enable the warnings + # disabled by -we. + set(msvc_warning_flags "/W4 ${msvc_warning_flags}") + # CMake appends /W3 by default, and having /W3 followed by /W4 will result in + # cl : Command line warning D9025 : overriding '/W3' with '/W4'. Since this is + # a command line warning and not a compiler warning, it cannot be suppressed except + # by fixing the command line. + string(REGEX REPLACE " /W[0-4]" "" CMAKE_C_FLAGS "${CMAKE_C_FLAGS}") + string(REGEX REPLACE " /W[0-4]" "" CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS}") + + if (LLVM_ENABLE_PEDANTIC) + # No MSVC equivalent available + endif (LLVM_ENABLE_PEDANTIC) + endif (LLVM_ENABLE_WARNINGS) + if (LLVM_ENABLE_WERROR) + append("/WX" msvc_warning_flags) + endif (LLVM_ENABLE_WERROR) + + foreach(flag ${msvc_warning_flags}) + append("${flag}" CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + endforeach(flag) + + append("/Zc:inline" CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + + # /Zc:strictStrings is incompatible with VS12's (Visual Studio 2013's) + # debug mode headers. Instead of only enabling them in VS2013's debug mode, + # we'll just enable them for Visual Studio 2015 (VS 14, MSVC_VERSION 1900) + # and up. + if (NOT (MSVC_VERSION LESS 1900)) + # Disable string literal const->non-const type conversion. + # "When specified, the compiler requires strict const-qualification + # conformance for pointers initialized by using string literals." + append("/Zc:strictStrings" CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + endif(NOT (MSVC_VERSION LESS 1900)) + + # "Generate Intrinsic Functions". + append("/Oi" CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + + # "Enforce type conversion rules". + append("/Zc:rvalueCast" CMAKE_CXX_FLAGS) + + if (NOT LLVM_ENABLE_TIMESTAMPS AND CMAKE_CXX_COMPILER_ID MATCHES "Clang") + # clang-cl and cl by default produce non-deterministic binaries because + # link.exe /incremental requires a timestamp in the .obj file. clang-cl + # has the flag /Brepro to force deterministic binaries, so pass that when + # LLVM_ENABLE_TIMESTAMPS is turned off. + # This checks CMAKE_CXX_COMPILER_ID in addition to check_cxx_compiler_flag() + # because cl.exe does not emit an error on flags it doesn't understand, + # letting check_cxx_compiler_flag() claim it understands all flags. + check_cxx_compiler_flag("/Brepro" SUPPORTS_BREPRO) + append_if(SUPPORTS_BREPRO "/Brepro" CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + + if (SUPPORTS_BREPRO) + # Check if /INCREMENTAL is passed to the linker and complain that it + # won't work with /Brepro. + string(TOUPPER "${CMAKE_EXE_LINKER_FLAGS}" upper_exe_flags) + string(TOUPPER "${CMAKE_MODULE_LINKER_FLAGS}" upper_module_flags) + string(TOUPPER "${CMAKE_SHARED_LINKER_FLAGS}" upper_shared_flags) + + string(FIND "${upper_exe_flags}" "/INCREMENTAL" exe_index) + string(FIND "${upper_module_flags}" "/INCREMENTAL" module_index) + string(FIND "${upper_shared_flags}" "/INCREMENTAL" shared_index) + + if (${exe_index} GREATER -1 OR + ${module_index} GREATER -1 OR + ${shared_index} GREATER -1) + message(FATAL_ERROR "LLVM_ENABLE_TIMESTAMPS not compatible with /INCREMENTAL linking") + endif() + endif() + endif() + + # Disable sized deallocation if the flag is supported. MSVC fails to compile + # the operator new overload in User otherwise. + check_c_compiler_flag("/WX /Zc:sizedDealloc-" SUPPORTS_SIZED_DEALLOC) + append_if(SUPPORTS_SIZED_DEALLOC "/Zc:sizedDealloc-" CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + +elseif( LLVM_COMPILER_IS_GCC_COMPATIBLE ) + if (LLVM_ENABLE_WARNINGS) + append("-Wall -W -Wno-unused-parameter -Wwrite-strings" CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + append("-Wcast-qual" CMAKE_CXX_FLAGS) + + # Turn off missing field initializer warnings for gcc to avoid noise from + # false positives with empty {}. Turn them on otherwise (they're off by + # default for clang). + check_cxx_compiler_flag("-Wmissing-field-initializers" CXX_SUPPORTS_MISSING_FIELD_INITIALIZERS_FLAG) + if (CXX_SUPPORTS_MISSING_FIELD_INITIALIZERS_FLAG) + if (CMAKE_COMPILER_IS_GNUCXX) + append("-Wno-missing-field-initializers" CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + else() + append("-Wmissing-field-initializers" CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + endif() + endif() + + append_if(LLVM_ENABLE_PEDANTIC "-pedantic" CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + append_if(LLVM_ENABLE_PEDANTIC "-Wno-long-long" CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + add_flag_if_supported("-Wcovered-switch-default" COVERED_SWITCH_DEFAULT_FLAG) + append_if(USE_NO_UNINITIALIZED "-Wno-uninitialized" CMAKE_CXX_FLAGS) + append_if(USE_NO_MAYBE_UNINITIALIZED "-Wno-maybe-uninitialized" CMAKE_CXX_FLAGS) + + # Check if -Wnon-virtual-dtor warns even though the class is marked final. + # If it does, don't add it. So it won't be added on clang 3.4 and older. + # This also catches cases when -Wnon-virtual-dtor isn't supported by + # the compiler at all. This flag is not activated for gcc since it will + # incorrectly identify a protected non-virtual base when there is a friend + # declaration. + if (NOT CMAKE_COMPILER_IS_GNUCXX) + set(OLD_CMAKE_REQUIRED_FLAGS ${CMAKE_REQUIRED_FLAGS}) + set(CMAKE_REQUIRED_FLAGS "${CMAKE_REQUIRED_FLAGS} -std=c++11 -Werror=non-virtual-dtor") + CHECK_CXX_SOURCE_COMPILES("class base {public: virtual void anchor();protected: ~base();}; + class derived final : public base { public: ~derived();}; + int main() { return 0; }" + CXX_WONT_WARN_ON_FINAL_NONVIRTUALDTOR) + set(CMAKE_REQUIRED_FLAGS ${OLD_CMAKE_REQUIRED_FLAGS}) + append_if(CXX_WONT_WARN_ON_FINAL_NONVIRTUALDTOR + "-Wnon-virtual-dtor" CMAKE_CXX_FLAGS) + endif() + + # Enable -Wdelete-non-virtual-dtor if available. + add_flag_if_supported("-Wdelete-non-virtual-dtor" DELETE_NON_VIRTUAL_DTOR_FLAG) + + # Check if -Wcomment is OK with an // comment ending with '\' if the next + # line is also a // comment. + set(OLD_CMAKE_REQUIRED_FLAGS ${CMAKE_REQUIRED_FLAGS}) + set(CMAKE_REQUIRED_FLAGS "${CMAKE_REQUIRED_FLAGS} -Werror -Wcomment") + CHECK_C_SOURCE_COMPILES("// \\\\\\n//\\nint main() {return 0;}" + C_WCOMMENT_ALLOWS_LINE_WRAP) + set(CMAKE_REQUIRED_FLAGS ${OLD_CMAKE_REQUIRED_FLAGS}) + if (NOT C_WCOMMENT_ALLOWS_LINE_WRAP) + append("-Wno-comment" CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + endif() + endif (LLVM_ENABLE_WARNINGS) + append_if(LLVM_ENABLE_WERROR "-Werror" CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + if (NOT LLVM_ENABLE_TIMESTAMPS) + add_flag_if_supported("-Werror=date-time" WERROR_DATE_TIME) + endif () + if (LLVM_ENABLE_CXX1Y) + check_cxx_compiler_flag("-std=c++1y" CXX_SUPPORTS_CXX1Y) + append_if(CXX_SUPPORTS_CXX1Y "-std=c++1y" CMAKE_CXX_FLAGS) + else() + check_cxx_compiler_flag("-std=c++11" CXX_SUPPORTS_CXX11) + if (CXX_SUPPORTS_CXX11) + if (CYGWIN OR MINGW) + # MinGW and Cygwin are a bit stricter and lack things like + # 'strdup', 'stricmp', etc in c++11 mode. + append("-std=gnu++11" CMAKE_CXX_FLAGS) + else() + append("-std=c++11" CMAKE_CXX_FLAGS) + endif() + else() + message(FATAL_ERROR "LLVM requires C++11 support but the '-std=c++11' flag isn't supported.") + endif() + endif() + if (LLVM_ENABLE_MODULES) + set(OLD_CMAKE_REQUIRED_FLAGS ${CMAKE_REQUIRED_FLAGS}) + set(CMAKE_REQUIRED_FLAGS "${CMAKE_REQUIRED_FLAGS} -fmodules") + # Check that we can build code with modules enabled, and that repeatedly + # including still manages to respect NDEBUG properly. + CHECK_CXX_SOURCE_COMPILES("#undef NDEBUG + #include + #define NDEBUG + #include + int main() { assert(this code is not compiled); }" + CXX_SUPPORTS_MODULES) + set(CMAKE_REQUIRED_FLAGS ${OLD_CMAKE_REQUIRED_FLAGS}) + if (CXX_SUPPORTS_MODULES) + append_if(CXX_SUPPORTS_MODULES "-fmodules" CMAKE_C_FLAGS) + append_if(CXX_SUPPORTS_MODULES "-fmodules -fcxx-modules" CMAKE_CXX_FLAGS) + else() + message(FATAL_ERROR "LLVM_ENABLE_MODULES is not supported by this compiler") + endif() + endif(LLVM_ENABLE_MODULES) +endif( MSVC ) + +macro(append_common_sanitizer_flags) + if (NOT MSVC) + # Append -fno-omit-frame-pointer and turn on debug info to get better + # stack traces. + add_flag_if_supported("-fno-omit-frame-pointer" FNO_OMIT_FRAME_POINTER) + if (NOT uppercase_CMAKE_BUILD_TYPE STREQUAL "DEBUG" AND + NOT uppercase_CMAKE_BUILD_TYPE STREQUAL "RELWITHDEBINFO") + add_flag_if_supported("-gline-tables-only" GLINE_TABLES_ONLY) + endif() + # Use -O1 even in debug mode, otherwise sanitizers slowdown is too large. + if (uppercase_CMAKE_BUILD_TYPE STREQUAL "DEBUG") + add_flag_if_supported("-O1" O1) + endif() + elseif (CLANG_CL) + # Keep frame pointers around. + append("/Oy-" CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + if (CMAKE_LINKER MATCHES "lld-link.exe") + # Use DWARF debug info with LLD. + append("-gdwarf" CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + else() + # Enable codeview otherwise. + append("/Z7" CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + endif() + # Always ask the linker to produce symbols with asan. + append("-debug" CMAKE_EXE_LINKER_FLAGS CMAKE_MODULE_LINKER_FLAGS CMAKE_SHARED_LINKER_FLAGS) + endif() +endmacro() + +# Turn on sanitizers if necessary. +if(LLVM_USE_SANITIZER) + if (LLVM_ON_UNIX) + if (LLVM_USE_SANITIZER STREQUAL "Address") + append_common_sanitizer_flags() + append("-fsanitize=address" CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + elseif (LLVM_USE_SANITIZER MATCHES "Memory(WithOrigins)?") + append_common_sanitizer_flags() + append("-fsanitize=memory" CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + if(LLVM_USE_SANITIZER STREQUAL "MemoryWithOrigins") + append("-fsanitize-memory-track-origins" CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + endif() + elseif (LLVM_USE_SANITIZER STREQUAL "Undefined") + append_common_sanitizer_flags() + append("-fsanitize=undefined -fno-sanitize=vptr,function -fno-sanitize-recover=all" + CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + elseif (LLVM_USE_SANITIZER STREQUAL "Thread") + append_common_sanitizer_flags() + append("-fsanitize=thread" CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + elseif (LLVM_USE_SANITIZER STREQUAL "Address;Undefined" OR + LLVM_USE_SANITIZER STREQUAL "Undefined;Address") + append_common_sanitizer_flags() + append("-fsanitize=address,undefined -fno-sanitize=vptr,function -fno-sanitize-recover=all" + CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + else() + message(FATAL_ERROR "Unsupported value of LLVM_USE_SANITIZER: ${LLVM_USE_SANITIZER}") + endif() + elseif(MSVC) + if (LLVM_USE_SANITIZER STREQUAL "Address") + append_common_sanitizer_flags() + append("-fsanitize=address" CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + else() + message(FATAL_ERROR "This sanitizer not yet supported in the MSVC environment: ${LLVM_USE_SANITIZER}") + endif() + else() + message(FATAL_ERROR "LLVM_USE_SANITIZER is not supported on this platform.") + endif() + if (LLVM_USE_SANITIZE_COVERAGE) + append("-fsanitize-coverage=edge,indirect-calls,8bit-counters,trace-cmp" CMAKE_C_FLAGS CMAKE_CXX_FLAGS) + endif() +endif() + +# Turn on -gsplit-dwarf if requested +if(LLVM_USE_SPLIT_DWARF) + add_definitions("-gsplit-dwarf") +endif() + +add_llvm_definitions( -D__STDC_CONSTANT_MACROS ) +add_llvm_definitions( -D__STDC_FORMAT_MACROS ) +add_llvm_definitions( -D__STDC_LIMIT_MACROS ) + +# clang doesn't print colored diagnostics when invoked from Ninja +if (UNIX AND + CMAKE_CXX_COMPILER_ID STREQUAL "Clang" AND + CMAKE_GENERATOR STREQUAL "Ninja") + append("-fcolor-diagnostics" CMAKE_C_FLAGS CMAKE_CXX_FLAGS) +endif() + +# Add flags for add_dead_strip(). +# FIXME: With MSVS, consider compiling with /Gy and linking with /OPT:REF? +# But MinSizeRel seems to add that automatically, so maybe disable these +# flags instead if LLVM_NO_DEAD_STRIP is set. +if(NOT CYGWIN AND NOT WIN32) + if(NOT ${CMAKE_SYSTEM_NAME} MATCHES "Darwin" AND + NOT uppercase_CMAKE_BUILD_TYPE STREQUAL "DEBUG") + check_c_compiler_flag("-Werror -fno-function-sections" C_SUPPORTS_FNO_FUNCTION_SECTIONS) + if (C_SUPPORTS_FNO_FUNCTION_SECTIONS) + # Don't add -ffunction-section if it can be disabled with -fno-function-sections. + # Doing so will break sanitizers. + add_flag_if_supported("-ffunction-sections" FFUNCTION_SECTIONS) + endif() + add_flag_if_supported("-fdata-sections" FDATA_SECTIONS) + endif() +endif() + +if(CYGWIN OR MINGW) + # Prune --out-implib from executables. It doesn't make sense even + # with --export-all-symbols. + string(REGEX REPLACE "-Wl,--out-implib,[^ ]+ " " " + CMAKE_C_LINK_EXECUTABLE "${CMAKE_C_LINK_EXECUTABLE}") + string(REGEX REPLACE "-Wl,--out-implib,[^ ]+ " " " + CMAKE_CXX_LINK_EXECUTABLE "${CMAKE_CXX_LINK_EXECUTABLE}") +endif() + +if(MSVC) + # Remove flags here, for exceptions and RTTI. + # Each target property or source property should be responsible to control + # them. + # CL.EXE complains to override flags like "/GR /GR-". + string(REGEX REPLACE "(^| ) */EH[-cs]+ *( |$)" "\\1 \\2" CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS}") + string(REGEX REPLACE "(^| ) */GR-? *( |$)" "\\1 \\2" CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS}") +endif() + +# Provide public options to globally control RTTI and EH +option(LLVM_ENABLE_EH "Enable Exception handling" OFF) +option(LLVM_ENABLE_RTTI "Enable run time type information" OFF) +if(LLVM_ENABLE_EH AND NOT LLVM_ENABLE_RTTI) + message(FATAL_ERROR "Exception handling requires RTTI. You must set LLVM_ENABLE_RTTI to ON") +endif() + +option(LLVM_BUILD_INSTRUMENTED "Build LLVM and tools with PGO instrumentation (experimental)" Off) +mark_as_advanced(LLVM_BUILD_INSTRUMENTED) +append_if(LLVM_BUILD_INSTRUMENTED "-fprofile-instr-generate" + CMAKE_CXX_FLAGS + CMAKE_C_FLAGS + CMAKE_EXE_LINKER_FLAGS + CMAKE_SHARED_LINKER_FLAGS) + +# Plugin support +# FIXME: Make this configurable. +if(WIN32 OR CYGWIN) + if(BUILD_SHARED_LIBS) + set(LLVM_ENABLE_PLUGINS ON) + else() + set(LLVM_ENABLE_PLUGINS OFF) + endif() +else() + set(LLVM_ENABLE_PLUGINS ON) +endif() diff --git a/llvm/cmake/modules/HandleLLVMStdlib.cmake b/llvm/cmake/modules/HandleLLVMStdlib.cmake new file mode 100644 index 0000000..b07781c --- /dev/null +++ b/llvm/cmake/modules/HandleLLVMStdlib.cmake @@ -0,0 +1,35 @@ +# This CMake module is responsible for setting the standard library to libc++ +# if the user has requested it. + +include(DetermineGCCCompatible) + +if(NOT DEFINED LLVM_STDLIB_HANDLED) + set(LLVM_STDLIB_HANDLED ON) + + function(append value) + foreach(variable ${ARGN}) + set(${variable} "${${variable}} ${value}" PARENT_SCOPE) + endforeach(variable) + endfunction() + + include(CheckCXXCompilerFlag) + if(LLVM_ENABLE_LIBCXX) + if(LLVM_COMPILER_IS_GCC_COMPATIBLE) + check_cxx_compiler_flag("-stdlib=libc++" CXX_SUPPORTS_STDLIB) + if(CXX_SUPPORTS_STDLIB) + append("-stdlib=libc++" + CMAKE_CXX_FLAGS CMAKE_EXE_LINKER_FLAGS CMAKE_SHARED_LINKER_FLAGS + CMAKE_MODULE_LINKER_FLAGS) + if(LLVM_ENABLE_LIBCXXABI) + append("-lc++abi" + CMAKE_EXE_LINKER_FLAGS CMAKE_SHARED_LINKER_FLAGS + CMAKE_MODULE_LINKER_FLAGS) + endif() + else() + message(WARNING "Can't specify libc++ with '-stdlib='") + endif() + else() + message(WARNING "Not sure how to specify libc++ for this compiler") + endif() + endif() +endif() diff --git a/llvm/cmake/modules/LLVM-Config.cmake b/llvm/cmake/modules/LLVM-Config.cmake new file mode 100644 index 0000000..aa68b40 --- /dev/null +++ b/llvm/cmake/modules/LLVM-Config.cmake @@ -0,0 +1,252 @@ +function(get_system_libs return_var) + message(AUTHOR_WARNING "get_system_libs no longer needed") + set(${return_var} "" PARENT_SCOPE) +endfunction() + + +function(link_system_libs target) + message(AUTHOR_WARNING "link_system_libs no longer needed") +endfunction() + + +function(is_llvm_target_library library return_var) + # Sets variable `return_var' to ON if `library' corresponds to a + # LLVM supported target. To OFF if it doesn't. + set(${return_var} OFF PARENT_SCOPE) + string(TOUPPER "${library}" capitalized_lib) + string(TOUPPER "${LLVM_ALL_TARGETS}" targets) + foreach(t ${targets}) + if( capitalized_lib STREQUAL t OR + capitalized_lib STREQUAL "LLVM${t}" OR + capitalized_lib STREQUAL "LLVM${t}CODEGEN" OR + capitalized_lib STREQUAL "LLVM${t}ASMPARSER" OR + capitalized_lib STREQUAL "LLVM${t}ASMPRINTER" OR + capitalized_lib STREQUAL "LLVM${t}DISASSEMBLER" OR + capitalized_lib STREQUAL "LLVM${t}INFO" ) + set(${return_var} ON PARENT_SCOPE) + break() + endif() + endforeach() +endfunction(is_llvm_target_library) + + +macro(llvm_config executable) + cmake_parse_arguments(ARG "USE_SHARED" "" "" ${ARGN}) + set(link_components ${ARG_UNPARSED_ARGUMENTS}) + + if(USE_SHARED) + # If USE_SHARED is specified, then we link against libLLVM, + # but also against the component libraries below. This is + # done in case libLLVM does not contain all of the components + # the target requires. + # + # TODO strip LLVM_DYLIB_COMPONENTS out of link_components. + # To do this, we need special handling for "all", since that + # may imply linking to libraries that are not included in + # libLLVM. + target_link_libraries(${executable} LLVM) + endif() + + explicit_llvm_config(${executable} ${link_components}) +endmacro(llvm_config) + + +function(explicit_llvm_config executable) + set( link_components ${ARGN} ) + + llvm_map_components_to_libnames(LIBRARIES ${link_components}) + get_target_property(t ${executable} TYPE) + if("x${t}" STREQUAL "xSTATIC_LIBRARY") + target_link_libraries(${executable} INTERFACE ${LIBRARIES}) + elseif("x${t}" STREQUAL "xSHARED_LIBRARY" OR "x${t}" STREQUAL "xMODULE_LIBRARY") + target_link_libraries(${executable} PRIVATE ${LIBRARIES}) + else() + # Use plain form for legacy user. + target_link_libraries(${executable} ${LIBRARIES}) + endif() +endfunction(explicit_llvm_config) + + +# This is Deprecated +function(llvm_map_components_to_libraries OUT_VAR) + message(AUTHOR_WARNING "Using llvm_map_components_to_libraries() is deprecated. Use llvm_map_components_to_libnames() instead") + explicit_map_components_to_libraries(result ${ARGN}) + set( ${OUT_VAR} ${result} ${sys_result} PARENT_SCOPE ) +endfunction(llvm_map_components_to_libraries) + +# This is a variant intended for the final user: +# Map LINK_COMPONENTS to actual libnames. +function(llvm_map_components_to_libnames out_libs) + set( link_components ${ARGN} ) + if(NOT LLVM_AVAILABLE_LIBS) + # Inside LLVM itself available libs are in a global property. + get_property(LLVM_AVAILABLE_LIBS GLOBAL PROPERTY LLVM_LIBS) + endif() + string(TOUPPER "${LLVM_AVAILABLE_LIBS}" capitalized_libs) + + # Expand some keywords: + list(FIND LLVM_TARGETS_TO_BUILD "${LLVM_NATIVE_ARCH}" have_native_backend) + list(FIND link_components "engine" engine_required) + if( NOT engine_required EQUAL -1 ) + list(FIND LLVM_TARGETS_WITH_JIT "${LLVM_NATIVE_ARCH}" have_jit) + if( NOT have_native_backend EQUAL -1 AND NOT have_jit EQUAL -1 ) + list(APPEND link_components "jit") + list(APPEND link_components "native") + else() + list(APPEND link_components "interpreter") + endif() + endif() + list(FIND link_components "native" native_required) + if( NOT native_required EQUAL -1 ) + if( NOT have_native_backend EQUAL -1 ) + list(APPEND link_components ${LLVM_NATIVE_ARCH}) + endif() + endif() + + # Translate symbolic component names to real libraries: + foreach(c ${link_components}) + # add codegen, asmprinter, asmparser, disassembler + list(FIND LLVM_TARGETS_TO_BUILD ${c} idx) + if( NOT idx LESS 0 ) + if( TARGET LLVM${c}CodeGen ) + list(APPEND expanded_components "LLVM${c}CodeGen") + else() + if( TARGET LLVM${c} ) + list(APPEND expanded_components "LLVM${c}") + else() + message(FATAL_ERROR "Target ${c} is not in the set of libraries.") + endif() + endif() + if( TARGET LLVM${c}AsmPrinter ) + list(APPEND expanded_components "LLVM${c}AsmPrinter") + endif() + if( TARGET LLVM${c}AsmParser ) + list(APPEND expanded_components "LLVM${c}AsmParser") + endif() + if( TARGET LLVM${c}Desc ) + list(APPEND expanded_components "LLVM${c}Desc") + endif() + if( TARGET LLVM${c}Info ) + list(APPEND expanded_components "LLVM${c}Info") + endif() + if( TARGET LLVM${c}Disassembler ) + list(APPEND expanded_components "LLVM${c}Disassembler") + endif() + elseif( c STREQUAL "native" ) + # already processed + elseif( c STREQUAL "nativecodegen" ) + list(APPEND expanded_components "LLVM${LLVM_NATIVE_ARCH}CodeGen") + if( TARGET LLVM${LLVM_NATIVE_ARCH}Desc ) + list(APPEND expanded_components "LLVM${LLVM_NATIVE_ARCH}Desc") + endif() + if( TARGET LLVM${LLVM_NATIVE_ARCH}Info ) + list(APPEND expanded_components "LLVM${LLVM_NATIVE_ARCH}Info") + endif() + elseif( c STREQUAL "backend" ) + # same case as in `native'. + elseif( c STREQUAL "engine" ) + # already processed + elseif( c STREQUAL "all" ) + list(APPEND expanded_components ${LLVM_AVAILABLE_LIBS}) + elseif( c STREQUAL "AllTargetsAsmPrinters" ) + # Link all the asm printers from all the targets + foreach(t ${LLVM_TARGETS_TO_BUILD}) + if( TARGET LLVM${t}AsmPrinter ) + list(APPEND expanded_components "LLVM${t}AsmPrinter") + endif() + endforeach(t) + elseif( c STREQUAL "AllTargetsAsmParsers" ) + # Link all the asm parsers from all the targets + foreach(t ${LLVM_TARGETS_TO_BUILD}) + if( TARGET LLVM${t}AsmParser ) + list(APPEND expanded_components "LLVM${t}AsmParser") + endif() + endforeach(t) + elseif( c STREQUAL "AllTargetsDescs" ) + # Link all the descs from all the targets + foreach(t ${LLVM_TARGETS_TO_BUILD}) + if( TARGET LLVM${t}Desc ) + list(APPEND expanded_components "LLVM${t}Desc") + endif() + endforeach(t) + elseif( c STREQUAL "AllTargetsDisassemblers" ) + # Link all the disassemblers from all the targets + foreach(t ${LLVM_TARGETS_TO_BUILD}) + if( TARGET LLVM${t}Disassembler ) + list(APPEND expanded_components "LLVM${t}Disassembler") + endif() + endforeach(t) + elseif( c STREQUAL "AllTargetsInfos" ) + # Link all the infos from all the targets + foreach(t ${LLVM_TARGETS_TO_BUILD}) + if( TARGET LLVM${t}Info ) + list(APPEND expanded_components "LLVM${t}Info") + endif() + endforeach(t) + else( NOT idx LESS 0 ) + # Canonize the component name: + string(TOUPPER "${c}" capitalized) + list(FIND capitalized_libs LLVM${capitalized} lib_idx) + if( lib_idx LESS 0 ) + # The component is unknown. Maybe is an omitted target? + is_llvm_target_library(${c} iltl_result) + if( NOT iltl_result ) + message(FATAL_ERROR "Library `${c}' not found in list of llvm libraries.") + endif() + else( lib_idx LESS 0 ) + list(GET LLVM_AVAILABLE_LIBS ${lib_idx} canonical_lib) + list(APPEND expanded_components ${canonical_lib}) + endif( lib_idx LESS 0 ) + endif( NOT idx LESS 0 ) + endforeach(c) + + set(${out_libs} ${expanded_components} PARENT_SCOPE) +endfunction() + +# Perform a post-order traversal of the dependency graph. +# This duplicates the algorithm used by llvm-config, originally +# in tools/llvm-config/llvm-config.cpp, function ComputeLibsForComponents. +function(expand_topologically name required_libs visited_libs) + list(FIND visited_libs ${name} found) + if( found LESS 0 ) + list(APPEND visited_libs ${name}) + set(visited_libs ${visited_libs} PARENT_SCOPE) + + get_property(lib_deps GLOBAL PROPERTY LLVMBUILD_LIB_DEPS_${name}) + foreach( lib_dep ${lib_deps} ) + expand_topologically(${lib_dep} "${required_libs}" "${visited_libs}") + set(required_libs ${required_libs} PARENT_SCOPE) + set(visited_libs ${visited_libs} PARENT_SCOPE) + endforeach() + + list(APPEND required_libs ${name}) + set(required_libs ${required_libs} PARENT_SCOPE) + endif() +endfunction() + +# Expand dependencies while topologically sorting the list of libraries: +function(llvm_expand_dependencies out_libs) + set(expanded_components ${ARGN}) + + set(required_libs) + set(visited_libs) + foreach( lib ${expanded_components} ) + expand_topologically(${lib} "${required_libs}" "${visited_libs}") + endforeach() + + list(REVERSE required_libs) + set(${out_libs} ${required_libs} PARENT_SCOPE) +endfunction() + +function(explicit_map_components_to_libraries out_libs) + llvm_map_components_to_libnames(link_libs ${ARGN}) + llvm_expand_dependencies(expanded_components ${link_libs}) + # Return just the libraries included in this build: + set(result) + foreach(c ${expanded_components}) + if( TARGET ${c} ) + set(result ${result} ${c}) + endif() + endforeach(c) + set(${out_libs} ${result} PARENT_SCOPE) +endfunction(explicit_map_components_to_libraries) diff --git a/llvm/cmake/modules/LLVMConfig.cmake.in b/llvm/cmake/modules/LLVMConfig.cmake.in new file mode 100644 index 0000000..6855c44 --- /dev/null +++ b/llvm/cmake/modules/LLVMConfig.cmake.in @@ -0,0 +1,60 @@ +# This file provides information and services to the final user. + +@LLVM_CONFIG_CODE@ + +set(LLVM_VERSION_MAJOR @LLVM_VERSION_MAJOR@) +set(LLVM_VERSION_MINOR @LLVM_VERSION_MINOR@) +set(LLVM_VERSION_PATCH @LLVM_VERSION_PATCH@) +set(LLVM_PACKAGE_VERSION @PACKAGE_VERSION@) + +set(LLVM_COMMON_DEPENDS @LLVM_COMMON_DEPENDS@) + +set(LLVM_AVAILABLE_LIBS @LLVM_AVAILABLE_LIBS@) + +set(LLVM_ALL_TARGETS @LLVM_ALL_TARGETS@) + +set(LLVM_TARGETS_TO_BUILD @LLVM_TARGETS_TO_BUILD@) + +set(LLVM_TARGETS_WITH_JIT @LLVM_TARGETS_WITH_JIT@) + +@all_llvm_lib_deps@ + +set(TARGET_TRIPLE "@TARGET_TRIPLE@") + +set(LLVM_ABI_BREAKING_CHECKS @LLVM_ABI_BREAKING_CHECKS@) + +set(LLVM_ENABLE_ASSERTIONS @LLVM_ENABLE_ASSERTIONS@) + +set(LLVM_ENABLE_EH @LLVM_ENABLE_EH@) + +set(LLVM_ENABLE_RTTI @LLVM_ENABLE_RTTI@) + +set(LLVM_ENABLE_TERMINFO @LLVM_ENABLE_TERMINFO@) + +set(LLVM_ENABLE_THREADS @LLVM_ENABLE_THREADS@) + +set(LLVM_ENABLE_ZLIB @LLVM_ENABLE_ZLIB@) + +set(LLVM_NATIVE_ARCH @LLVM_NATIVE_ARCH@) + +set(LLVM_ENABLE_PIC @LLVM_ENABLE_PIC@) + +set(LLVM_ENABLE_PLUGINS @LLVM_ENABLE_PLUGINS@) +set(LLVM_PLUGIN_EXT @LLVM_PLUGIN_EXT@) + +set(LLVM_ON_UNIX @LLVM_ON_UNIX@) +set(LLVM_ON_WIN32 @LLVM_ON_WIN32@) + +set(LLVM_LIBDIR_SUFFIX @LLVM_LIBDIR_SUFFIX@) + +set(LLVM_INCLUDE_DIRS "@LLVM_CONFIG_INCLUDE_DIRS@") +set(LLVM_LIBRARY_DIRS "@LLVM_CONFIG_LIBRARY_DIRS@") +set(LLVM_DEFINITIONS "@LLVM_DEFINITIONS@") +set(LLVM_CMAKE_DIR "@LLVM_CONFIG_CMAKE_DIR@") +set(LLVM_TOOLS_BINARY_DIR "@LLVM_CONFIG_TOOLS_BINARY_DIR@") + +if(NOT TARGET LLVMSupport) + include("@LLVM_CONFIG_EXPORTS_FILE@") +endif() + +include(${LLVM_CMAKE_DIR}/LLVM-Config.cmake) diff --git a/llvm/cmake/modules/LLVMConfigVersion.cmake.in b/llvm/cmake/modules/LLVMConfigVersion.cmake.in new file mode 100644 index 0000000..e9ac4ed --- /dev/null +++ b/llvm/cmake/modules/LLVMConfigVersion.cmake.in @@ -0,0 +1,13 @@ +set(PACKAGE_VERSION "@PACKAGE_VERSION@") + +# LLVM is API-compatible only with matching major.minor versions +# and patch versions not less than that requested. +if("@LLVM_VERSION_MAJOR@.@LLVM_VERSION_MINOR@" VERSION_EQUAL + "${PACKAGE_FIND_VERSION_MAJOR}.${PACKAGE_FIND_VERSION_MINOR}" + AND NOT "@LLVM_VERSION_PATCH@" VERSION_LESS "${PACKAGE_FIND_VERSION_PATCH}") + set(PACKAGE_VERSION_COMPATIBLE 1) + if("@LLVM_VERSION_PATCH@" VERSION_EQUAL + "${PACKAGE_FIND_VERSION_PATCH}") + set(PACKAGE_VERSION_EXACT 1) + endif() +endif() diff --git a/llvm/cmake/modules/LLVMExternalProjectUtils.cmake b/llvm/cmake/modules/LLVMExternalProjectUtils.cmake new file mode 100644 index 0000000..c2d9f53 --- /dev/null +++ b/llvm/cmake/modules/LLVMExternalProjectUtils.cmake @@ -0,0 +1,195 @@ +include(ExternalProject) + +# llvm_ExternalProject_BuildCmd(out_var target) +# Utility function for constructing command lines for external project targets +function(llvm_ExternalProject_BuildCmd out_var target) + if (CMAKE_GENERATOR MATCHES "Make") + # Use special command for Makefiles to support parallelism. + set(${out_var} "$(MAKE)" "${target}" PARENT_SCOPE) + else() + set(${out_var} ${CMAKE_COMMAND} --build . --target ${target} + --config $ PARENT_SCOPE) + endif() +endfunction() + +# llvm_ExternalProject_Add(name source_dir ... +# USE_TOOLCHAIN +# Use just-built tools (see TOOLCHAIN_TOOLS) +# EXCLUDE_FROM_ALL +# Exclude this project from the all target +# NO_INSTALL +# Don't generate install targets for this project +# CMAKE_ARGS arguments... +# Optional cmake arguments to pass when configuring the project +# TOOLCHAIN_TOOLS targets... +# Targets for toolchain tools (defaults to clang;lld) +# DEPENDS targets... +# Targets that this project depends on +# EXTRA_TARGETS targets... +# Extra targets in the subproject to generate targets for +# ) +function(llvm_ExternalProject_Add name source_dir) + cmake_parse_arguments(ARG "USE_TOOLCHAIN;EXCLUDE_FROM_ALL;NO_INSTALL" + "SOURCE_DIR" + "CMAKE_ARGS;TOOLCHAIN_TOOLS;RUNTIME_LIBRARIES;DEPENDS;EXTRA_TARGETS" ${ARGN}) + canonicalize_tool_name(${name} nameCanon) + if(NOT ARG_TOOLCHAIN_TOOLS) + set(ARG_TOOLCHAIN_TOOLS clang lld) + endif() + foreach(tool ${ARG_TOOLCHAIN_TOOLS}) + if(TARGET ${tool}) + list(APPEND TOOLCHAIN_TOOLS ${tool}) + list(APPEND TOOLCHAIN_BINS $) + endif() + endforeach() + + if(NOT ARG_RUNTIME_LIBRARIES) + set(ARG_RUNTIME_LIBRARIES compiler-rt libcxx) + endif() + foreach(lib ${ARG_RUNTIME_LIBRARIES}) + if(TARGET ${lib}) + list(APPEND RUNTIME_LIBRARIES ${lib}) + endif() + endforeach() + + list(FIND TOOLCHAIN_TOOLS clang FOUND_CLANG) + if(FOUND_CLANG GREATER -1) + set(CLANG_IN_TOOLCHAIN On) + endif() + + if(RUNTIME_LIBRARIES AND CLANG_IN_TOOLCHAIN) + list(APPEND TOOLCHAIN_BINS ${RUNTIME_LIBRARIES}) + endif() + + if(CMAKE_VERSION VERSION_GREATER 3.1.0) + set(cmake_3_1_EXCLUDE_FROM_ALL EXCLUDE_FROM_ALL 1) + endif() + + if(CMAKE_VERSION VERSION_GREATER 3.3.20150708) + set(cmake_3_4_USES_TERMINAL_OPTIONS + USES_TERMINAL_CONFIGURE 1 + USES_TERMINAL_BUILD 1 + USES_TERMINAL_INSTALL 1 + ) + set(cmake_3_4_USES_TERMINAL USES_TERMINAL 1) + endif() + + if(CMAKE_VERSION VERSION_GREATER 3.1.20141116) + set(cmake_3_2_USES_TERMINAL USES_TERMINAL) + endif() + + set(STAMP_DIR ${CMAKE_CURRENT_BINARY_DIR}/${name}-stamps/) + set(BINARY_DIR ${CMAKE_CURRENT_BINARY_DIR}/${name}-bins/) + + add_custom_target(${name}-clear + COMMAND ${CMAKE_COMMAND} -E remove_directory ${BINARY_DIR} + COMMAND ${CMAKE_COMMAND} -E remove_directory ${STAMP_DIR} + COMMENT "Clobbering ${name} build and stamp directories" + ${cmake_3_2_USES_TERMINAL} + ) + + # Find all variables that start with COMPILER_RT and populate a variable with + # them. + get_cmake_property(variableNames VARIABLES) + foreach(variableName ${variableNames}) + if(variableName MATCHES "^${nameCanon}") + string(REPLACE ";" "\;" value "${${variableName}}") + list(APPEND PASSTHROUGH_VARIABLES + -D${variableName}=${value}) + endif() + endforeach() + + if(ARG_USE_TOOLCHAIN) + if(CLANG_IN_TOOLCHAIN) + set(compiler_args -DCMAKE_C_COMPILER=${LLVM_RUNTIME_OUTPUT_INTDIR}/clang + -DCMAKE_CXX_COMPILER=${LLVM_RUNTIME_OUTPUT_INTDIR}/clang++) + endif() + list(APPEND ARG_DEPENDS ${TOOLCHAIN_TOOLS}) + endif() + + add_custom_command( + OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${name}-clobber-stamp + DEPENDS ${ARG_DEPENDS} + COMMAND ${CMAKE_COMMAND} -E touch ${BINARY_DIR}/CMakeCache.txt + COMMAND ${CMAKE_COMMAND} -E touch ${STAMP_DIR}/${name}-mkdir + COMMAND ${CMAKE_COMMAND} -E touch ${CMAKE_CURRENT_BINARY_DIR}/${name}-clobber-stamp + COMMENT "Clobbering bootstrap build and stamp directories" + ) + + add_custom_target(${name}-clobber + DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${name}-clobber-stamp) + + if(ARG_EXCLUDE_FROM_ALL) + set(exclude ${cmake_3_1_EXCLUDE_FROM_ALL}) + endif() + + ExternalProject_Add(${name} + DEPENDS ${ARG_DEPENDS} + ${name}-clobber + PREFIX ${CMAKE_BINARY_DIR}/projects/${name} + SOURCE_DIR ${source_dir} + STAMP_DIR ${STAMP_DIR} + BINARY_DIR ${BINARY_DIR} + ${exclude} + CMAKE_ARGS ${${nameCanon}_CMAKE_ARGS} + ${compiler_args} + -DCMAKE_INSTALL_PREFIX=${CMAKE_INSTALL_PREFIX} + ${ARG_CMAKE_ARGS} + ${PASSTHROUGH_VARIABLES} + INSTALL_COMMAND "" + STEP_TARGETS configure build + ${cmake_3_4_USES_TERMINAL_OPTIONS} + ) + + if(ARG_USE_TOOLCHAIN) + ExternalProject_Add_Step(${name} force-rebuild + COMMENT "Forcing rebuild becaues tools have changed" + DEPENDERS configure + DEPENDS ${TOOLCHAIN_BINS} + ${cmake_3_4_USES_TERMINAL} ) + endif() + + if(ARG_USE_TOOLCHAIN) + set(force_deps DEPENDS ${TOOLCHAIN_BINS}) + endif() + + llvm_ExternalProject_BuildCmd(run_clean clean) + ExternalProject_Add_Step(${name} clean + COMMAND ${run_clean} + COMMENT "Cleaning ${name}..." + DEPENDEES configure + ${force_deps} + WORKING_DIRECTORY ${BINARY_DIR} + ${cmake_3_4_USES_TERMINAL} + ) + ExternalProject_Add_StepTargets(${name} clean) + + if(ARG_USE_TOOLCHAIN) + add_dependencies(${name}-clean ${name}-clobber) + set_target_properties(${name}-clean PROPERTIES + SOURCES ${CMAKE_CURRENT_BINARY_DIR}/${name}-clobber-stamp) + endif() + + if(NOT ARG_NO_INSTALL) + install(CODE "execute_process\(COMMAND \${CMAKE_COMMAND} -DCMAKE_INSTALL_PREFIX=\${CMAKE_INSTALL_PREFIX} -P ${BINARY_DIR}/cmake_install.cmake \)" + COMPONENT ${name}) + + add_custom_target(install-${name} + DEPENDS ${name} + COMMAND "${CMAKE_COMMAND}" + -DCMAKE_INSTALL_COMPONENT=${name} + -P "${CMAKE_BINARY_DIR}/cmake_install.cmake" + ${cmake_3_2_USES_TERMINAL}) + endif() + + # Add top-level targets + foreach(target ${ARG_EXTRA_TARGETS}) + llvm_ExternalProject_BuildCmd(build_runtime_cmd ${target}) + add_custom_target(${target} + COMMAND ${build_runtime_cmd} + DEPENDS ${name}-configure + WORKING_DIRECTORY ${BINARY_DIR} + VERBATIM + ${cmake_3_2_USES_TERMINAL}) + endforeach() +endfunction() diff --git a/llvm/cmake/modules/LLVMInstallSymlink.cmake b/llvm/cmake/modules/LLVMInstallSymlink.cmake new file mode 100644 index 0000000..482697b --- /dev/null +++ b/llvm/cmake/modules/LLVMInstallSymlink.cmake @@ -0,0 +1,21 @@ +# We need to execute this script at installation time because the +# DESTDIR environment variable may be unset at configuration time. +# See PR8397. + +function(install_symlink name target outdir) + if(UNIX) + set(LINK_OR_COPY create_symlink) + set(DESTDIR $ENV{DESTDIR}) + else() + set(LINK_OR_COPY copy) + endif() + + set(bindir "${DESTDIR}${CMAKE_INSTALL_PREFIX}/${outdir}/") + + message("Creating ${name}") + + execute_process( + COMMAND "${CMAKE_COMMAND}" -E ${LINK_OR_COPY} "${target}" "${name}" + WORKING_DIRECTORY "${bindir}") + +endfunction() diff --git a/llvm/cmake/modules/LLVMProcessSources.cmake b/llvm/cmake/modules/LLVMProcessSources.cmake new file mode 100644 index 0000000..2fa8f71 --- /dev/null +++ b/llvm/cmake/modules/LLVMProcessSources.cmake @@ -0,0 +1,79 @@ +include(AddFileDependencies) +include(CMakeParseArguments) + +function(llvm_replace_compiler_option var old new) + # Replaces a compiler option or switch `old' in `var' by `new'. + # If `old' is not in `var', appends `new' to `var'. + # Example: llvm_replace_compiler_option(CMAKE_CXX_FLAGS_RELEASE "-O3" "-O2") + # If the option already is on the variable, don't add it: + if( "${${var}}" MATCHES "(^| )${new}($| )" ) + set(n "") + else() + set(n "${new}") + endif() + if( "${${var}}" MATCHES "(^| )${old}($| )" ) + string( REGEX REPLACE "(^| )${old}($| )" " ${n} " ${var} "${${var}}" ) + else() + set( ${var} "${${var}} ${n}" ) + endif() + set( ${var} "${${var}}" PARENT_SCOPE ) +endfunction(llvm_replace_compiler_option) + +function(add_header_files_for_glob hdrs_out glob) + file(GLOB hds ${glob}) + set(${hdrs_out} ${hds} PARENT_SCOPE) +endfunction(add_header_files_for_glob) + +function(find_all_header_files hdrs_out additional_headerdirs) + add_header_files_for_glob(hds *.h) + list(APPEND all_headers ${hds}) + + foreach(additional_dir ${additional_headerdirs}) + add_header_files_for_glob(hds "${additional_dir}/*.h") + list(APPEND all_headers ${hds}) + add_header_files_for_glob(hds "${additional_dir}/*.inc") + list(APPEND all_headers ${hds}) + endforeach(additional_dir) + + set( ${hdrs_out} ${all_headers} PARENT_SCOPE ) +endfunction(find_all_header_files) + + +function(llvm_process_sources OUT_VAR) + cmake_parse_arguments(ARG "" "" "ADDITIONAL_HEADERS;ADDITIONAL_HEADER_DIRS" ${ARGN}) + set(sources ${ARG_UNPARSED_ARGUMENTS}) + llvm_check_source_file_list( ${sources} ) + if( MSVC_IDE OR XCODE ) + # This adds .td and .h files to the Visual Studio solution: + find_all_header_files(hdrs "${ARG_ADDITIONAL_HEADER_DIRS}") + if (hdrs) + set_source_files_properties(${hdrs} PROPERTIES HEADER_FILE_ONLY ON) + endif() + set_source_files_properties(${ARG_ADDITIONAL_HEADERS} PROPERTIES HEADER_FILE_ONLY ON) + list(APPEND sources ${ARG_ADDITIONAL_HEADERS} ${hdrs}) + endif() + + set( ${OUT_VAR} ${sources} PARENT_SCOPE ) +endfunction(llvm_process_sources) + + +function(llvm_check_source_file_list) + set(listed ${ARGN}) + file(GLOB globbed *.c *.cpp) + foreach(g ${globbed}) + get_filename_component(fn ${g} NAME) + + # Don't reject hidden files. Some editors create backups in the + # same directory as the file. + if (NOT "${fn}" MATCHES "^\\.") + list(FIND LLVM_OPTIONAL_SOURCES ${fn} idx) + if( idx LESS 0 ) + list(FIND listed ${fn} idx) + if( idx LESS 0 ) + message(SEND_ERROR "Found unknown source file ${g} +Please update ${CMAKE_CURRENT_LIST_FILE}\n") + endif() + endif() + endif() + endforeach() +endfunction(llvm_check_source_file_list) diff --git a/llvm/cmake/modules/VersionFromVCS.cmake b/llvm/cmake/modules/VersionFromVCS.cmake new file mode 100644 index 0000000..6be4daa --- /dev/null +++ b/llvm/cmake/modules/VersionFromVCS.cmake @@ -0,0 +1,80 @@ +# Adds version control information to the variable VERS. For +# determining the Version Control System used (if any) it inspects the +# existence of certain subdirectories under CMAKE_CURRENT_SOURCE_DIR. + +function(add_version_info_from_vcs VERS) + string(REPLACE "svn" "" result "${${VERS}}") + if( EXISTS "${CMAKE_CURRENT_SOURCE_DIR}/.svn" ) + set(result "${result}svn") + # FindSubversion does not work with symlinks. See PR 8437 + if( NOT IS_SYMLINK "${CMAKE_CURRENT_SOURCE_DIR}" ) + find_package(Subversion) + endif() + if( Subversion_FOUND ) + subversion_wc_info( ${CMAKE_CURRENT_SOURCE_DIR} Project ) + if( Project_WC_REVISION ) + set(SVN_REVISION ${Project_WC_REVISION} PARENT_SCOPE) + set(result "${result}-r${Project_WC_REVISION}") + endif() + if( Project_WC_URL ) + set(LLVM_REPOSITORY ${Project_WC_URL} PARENT_SCOPE) + endif() + endif() + elseif( EXISTS ${CMAKE_CURRENT_SOURCE_DIR}/.git ) + set(result "${result}git") + # Try to get a ref-id + if( EXISTS ${CMAKE_CURRENT_SOURCE_DIR}/.git/svn ) + find_program(git_executable NAMES git git.exe git.cmd) + if( git_executable ) + set(is_git_svn_rev_exact false) + execute_process(COMMAND + ${git_executable} svn info + WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR} + TIMEOUT 5 + RESULT_VARIABLE git_result + OUTPUT_VARIABLE git_output) + if( git_result EQUAL 0 ) + string(REGEX MATCH "URL: ([^ \n]*)" svn_url ${git_output}) + if(svn_url) + set(LLVM_REPOSITORY ${CMAKE_MATCH_1} PARENT_SCOPE) + endif() + + string(REGEX REPLACE "^(.*\n)?Revision: ([^\n]+).*" + "\\2" git_svn_rev_number "${git_output}") + set(SVN_REVISION ${git_svn_rev_number} PARENT_SCOPE) + set(git_svn_rev "-svn-${git_svn_rev}") + + # Determine if the HEAD points directly at a subversion revision. + execute_process(COMMAND ${git_executable} svn find-rev HEAD + WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR} + TIMEOUT 5 + RESULT_VARIABLE git_result + OUTPUT_VARIABLE git_output) + if( git_result EQUAL 0 ) + string(STRIP "${git_output}" git_head_svn_rev_number) + if( git_head_svn_rev_number EQUAL git_svn_rev_number ) + set(is_git_svn_rev_exact true) + endif() + endif() + else() + set(git_svn_rev "") + endif() + execute_process(COMMAND + ${git_executable} rev-parse --short HEAD + WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR} + TIMEOUT 5 + RESULT_VARIABLE git_result + OUTPUT_VARIABLE git_output) + if( git_result EQUAL 0 AND NOT is_git_svn_rev_exact ) + string(STRIP "${git_output}" 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"${ANDROID_COMMON_FLAGS}" CACHE STRING "toolchain_cxxflags" FORCE) +SET(CMAKE_EXE_LINKER_FLAGS "-pie" CACHE STRING "toolchain_exelinkflags" FORCE) + diff --git a/llvm/cmake/platforms/iOS.cmake b/llvm/cmake/platforms/iOS.cmake new file mode 100644 index 0000000..4914059 --- /dev/null +++ b/llvm/cmake/platforms/iOS.cmake @@ -0,0 +1,79 @@ +# Toolchain config for iOS. +# +# Usage: +# mkdir build; cd build +# cmake ..; make +# mkdir ios; cd ios +# cmake -DLLVM_IOS_TOOLCHAIN_DIR=/path/to/ios/ndk \ +# -DCMAKE_TOOLCHAIN_FILE=../../cmake/platforms/iOS.cmake ../.. +# make + +SET(CMAKE_SYSTEM_NAME Darwin) +SET(CMAKE_SYSTEM_VERSION 13) +SET(CMAKE_CXX_COMPILER_WORKS True) +SET(CMAKE_C_COMPILER_WORKS True) +SET(DARWIN_TARGET_OS_NAME ios) + +IF(NOT DEFINED ENV{SDKROOT}) + execute_process(COMMAND xcodebuild -version -sdk iphoneos Path + OUTPUT_VARIABLE SDKROOT + ERROR_QUIET + OUTPUT_STRIP_TRAILING_WHITESPACE) +ELSE() + execute_process(COMMAND xcodebuild -version -sdk $ENV{SDKROOT} Path + OUTPUT_VARIABLE SDKROOT + ERROR_QUIET + OUTPUT_STRIP_TRAILING_WHITESPACE) +ENDIF() + +IF(NOT EXISTS ${SDKROOT}) + MESSAGE(FATAL_ERROR "SDKROOT could not be detected!") +ENDIF() + +set(CMAKE_OSX_SYSROOT ${SDKROOT}) + +IF(NOT CMAKE_C_COMPILER) + execute_process(COMMAND xcrun -sdk ${SDKROOT} -find clang + OUTPUT_VARIABLE CMAKE_C_COMPILER + ERROR_QUIET + OUTPUT_STRIP_TRAILING_WHITESPACE) + message(STATUS "Using c compiler ${CMAKE_C_COMPILER}") +ENDIF() + +IF(NOT CMAKE_CXX_COMPILER) + execute_process(COMMAND xcrun -sdk ${SDKROOT} -find clang++ + OUTPUT_VARIABLE CMAKE_CXX_COMPILER + ERROR_QUIET + OUTPUT_STRIP_TRAILING_WHITESPACE) + message(STATUS "Using c compiler ${CMAKE_CXX_COMPILER}") +ENDIF() + +IF(NOT CMAKE_AR) + execute_process(COMMAND xcrun -sdk ${SDKROOT} -find ar + OUTPUT_VARIABLE CMAKE_AR_val + ERROR_QUIET + OUTPUT_STRIP_TRAILING_WHITESPACE) + SET(CMAKE_AR ${CMAKE_AR_val} CACHE FILEPATH "Archiver") + message(STATUS "Using ar ${CMAKE_AR}") +ENDIF() + +IF(NOT CMAKE_RANLIB) + execute_process(COMMAND xcrun -sdk ${SDKROOT} -find ranlib + OUTPUT_VARIABLE CMAKE_RANLIB_val + ERROR_QUIET + OUTPUT_STRIP_TRAILING_WHITESPACE) + SET(CMAKE_RANLIB ${CMAKE_RANLIB_val} CACHE FILEPATH "Ranlib") + message(STATUS "Using ranlib ${CMAKE_RANLIB}") +ENDIF() + +IF (NOT DEFINED IOS_MIN_TARGET) +execute_process(COMMAND xcodebuild -sdk ${SDKROOT} -version SDKVersion + OUTPUT_VARIABLE IOS_MIN_TARGET + ERROR_QUIET + OUTPUT_STRIP_TRAILING_WHITESPACE) +ENDIF() + +SET(IOS_COMMON_FLAGS "-mios-version-min=${IOS_MIN_TARGET}") +SET(CMAKE_C_FLAGS "${IOS_COMMON_FLAGS}" CACHE STRING "toolchain_cflags" FORCE) +SET(CMAKE_CXX_FLAGS "${IOS_COMMON_FLAGS}" CACHE STRING "toolchain_cxxflags" FORCE) +SET(CMAKE_LINK_FLAGS "${IOS_COMMON_FLAGS}" CACHE STRING "toolchain_linkflags" FORCE) diff --git a/llvm/include/llvm-c/Types.h b/llvm/include/llvm-c/Types.h new file mode 100644 index 0000000..6661e89 --- /dev/null +++ b/llvm/include/llvm-c/Types.h @@ -0,0 +1,32 @@ +/*===-- llvm-c/Support.h - C Interface Types declarations ---------*- C -*-===*\ +|* *| +|* The LLVM Compiler Infrastructure *| +|* *| +|* This file is distributed under the University of Illinois Open Source *| +|* License. See LICENSE.TXT for details. *| +|* *| +|*===----------------------------------------------------------------------===*| +|* *| +|* This file defines types used by the the C interface to LLVM. *| +|* *| +\*===----------------------------------------------------------------------===*/ + +#ifndef LLVM_C_TYPES_H +#define LLVM_C_TYPES_H + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Used to pass regions of memory through LLVM interfaces. + * + * @see llvm_ks::MemoryBuffer + */ +typedef struct LLVMOpaqueMemoryBuffer *LLVMMemoryBufferRef; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/llvm/include/llvm/ADT/APFloat.h b/llvm/include/llvm/ADT/APFloat.h new file mode 100644 index 0000000..60b9720 --- /dev/null +++ b/llvm/include/llvm/ADT/APFloat.h @@ -0,0 +1,686 @@ +//===- llvm/ADT/APFloat.h - Arbitrary Precision Floating Point ---*- C++ -*-==// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +/// +/// \file +/// \brief +/// This file declares a class to represent arbitrary precision floating point +/// values and provide a variety of arithmetic operations on them. +/// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_APFLOAT_H +#define LLVM_ADT_APFLOAT_H + +#include "llvm/ADT/APInt.h" + +namespace llvm_ks { + +struct fltSemantics; +class APSInt; +class StringRef; + +/// Enum that represents what fraction of the LSB truncated bits of an fp number +/// represent. +/// +/// This essentially combines the roles of guard and sticky bits. +enum lostFraction { // Example of truncated bits: + lfExactlyZero, // 000000 + lfLessThanHalf, // 0xxxxx x's not all zero + lfExactlyHalf, // 100000 + lfMoreThanHalf // 1xxxxx x's not all zero +}; + +/// \brief A self-contained host- and target-independent arbitrary-precision +/// floating-point software implementation. +/// +/// APFloat uses bignum integer arithmetic as provided by static functions in +/// the APInt class. The library will work with bignum integers whose parts are +/// any unsigned type at least 16 bits wide, but 64 bits is recommended. +/// +/// Written for clarity rather than speed, in particular with a view to use in +/// the front-end of a cross compiler so that target arithmetic can be correctly +/// performed on the host. Performance should nonetheless be reasonable, +/// particularly for its intended use. It may be useful as a base +/// implementation for a run-time library during development of a faster +/// target-specific one. +/// +/// All 5 rounding modes in the IEEE-754R draft are handled correctly for all +/// implemented operations. Currently implemented operations are add, subtract, +/// multiply, divide, fused-multiply-add, conversion-to-float, +/// conversion-to-integer and conversion-from-integer. New rounding modes +/// (e.g. away from zero) can be added with three or four lines of code. +/// +/// Four formats are built-in: IEEE single precision, double precision, +/// quadruple precision, and x87 80-bit extended double (when operating with +/// full extended precision). Adding a new format that obeys IEEE semantics +/// only requires adding two lines of code: a declaration and definition of the +/// format. +/// +/// All operations return the status of that operation as an exception bit-mask, +/// so multiple operations can be done consecutively with their results or-ed +/// together. The returned status can be useful for compiler diagnostics; e.g., +/// inexact, underflow and overflow can be easily diagnosed on constant folding, +/// and compiler optimizers can determine what exceptions would be raised by +/// folding operations and optimize, or perhaps not optimize, accordingly. +/// +/// At present, underflow tininess is detected after rounding; it should be +/// straight forward to add support for the before-rounding case too. +/// +/// The library reads hexadecimal floating point numbers as per C99, and +/// correctly rounds if necessary according to the specified rounding mode. +/// Syntax is required to have been validated by the caller. It also converts +/// floating point numbers to hexadecimal text as per the C99 %a and %A +/// conversions. The output precision (or alternatively the natural minimal +/// precision) can be specified; if the requested precision is less than the +/// natural precision the output is correctly rounded for the specified rounding +/// mode. +/// +/// It also reads decimal floating point numbers and correctly rounds according +/// to the specified rounding mode. +/// +/// Conversion to decimal text is not currently implemented. +/// +/// Non-zero finite numbers are represented internally as a sign bit, a 16-bit +/// signed exponent, and the significand as an array of integer parts. After +/// normalization of a number of precision P the exponent is within the range of +/// the format, and if the number is not denormal the P-th bit of the +/// significand is set as an explicit integer bit. For denormals the most +/// significant bit is shifted right so that the exponent is maintained at the +/// format's minimum, so that the smallest denormal has just the least +/// significant bit of the significand set. The sign of zeroes and infinities +/// is significant; the exponent and significand of such numbers is not stored, +/// but has a known implicit (deterministic) value: 0 for the significands, 0 +/// for zero exponent, all 1 bits for infinity exponent. For NaNs the sign and +/// significand are deterministic, although not really meaningful, and preserved +/// in non-conversion operations. The exponent is implicitly all 1 bits. +/// +/// APFloat does not provide any exception handling beyond default exception +/// handling. We represent Signaling NaNs via IEEE-754R 2008 6.2.1 should clause +/// by encoding Signaling NaNs with the first bit of its trailing significand as +/// 0. +/// +/// TODO +/// ==== +/// +/// Some features that may or may not be worth adding: +/// +/// Binary to decimal conversion (hard). +/// +/// Optional ability to detect underflow tininess before rounding. +/// +/// New formats: x87 in single and double precision mode (IEEE apart from +/// extended exponent range) (hard). +/// +/// New operations: sqrt, IEEE remainder, C90 fmod, nexttoward. +/// +class APFloat { +public: + + /// A signed type to represent a floating point numbers unbiased exponent. + typedef signed short ExponentType; + + /// \name Floating Point Semantics. + /// @{ + + static const fltSemantics IEEEhalf; + static const fltSemantics IEEEsingle; + static const fltSemantics IEEEdouble; + static const fltSemantics IEEEquad; + static const fltSemantics PPCDoubleDouble; + static const fltSemantics x87DoubleExtended; + + /// A Pseudo fltsemantic used to construct APFloats that cannot conflict with + /// anything real. + static const fltSemantics Bogus; + + /// @} + + static unsigned int semanticsPrecision(const fltSemantics &); + static ExponentType semanticsMinExponent(const fltSemantics &); + static ExponentType semanticsMaxExponent(const fltSemantics &); + static unsigned int semanticsSizeInBits(const fltSemantics &); + + /// IEEE-754R 5.11: Floating Point Comparison Relations. + enum cmpResult { + cmpLessThan, + cmpEqual, + cmpGreaterThan, + cmpUnordered + }; + + /// IEEE-754R 4.3: Rounding-direction attributes. + enum roundingMode { + rmNearestTiesToEven, + rmTowardPositive, + rmTowardNegative, + rmTowardZero, + rmNearestTiesToAway + }; + + /// IEEE-754R 7: Default exception handling. + /// + /// opUnderflow or opOverflow are always returned or-ed with opInexact. + enum opStatus { + opOK = 0x00, + opInvalidOp = 0x01, + opDivByZero = 0x02, + opOverflow = 0x04, + opUnderflow = 0x08, + opInexact = 0x10 + }; + + /// Category of internally-represented number. + enum fltCategory { + fcInfinity, + fcNaN, + fcNormal, + fcZero + }; + + /// Convenience enum used to construct an uninitialized APFloat. + enum uninitializedTag { + uninitialized + }; + + /// \name Constructors + /// @{ + + APFloat(const fltSemantics &); // Default construct to 0.0 + APFloat(const fltSemantics &, StringRef); + APFloat(const fltSemantics &, integerPart); + APFloat(const fltSemantics &, uninitializedTag); + APFloat(const fltSemantics &, const APInt &); + explicit APFloat(double d); + explicit APFloat(float f); + APFloat(const APFloat &); + APFloat(APFloat &&); + ~APFloat(); + + /// @} + + /// \brief Returns whether this instance allocated memory. + bool needsCleanup() const { return partCount() > 1; } + + /// \name Convenience "constructors" + /// @{ + + /// Factory for Positive and Negative Zero. + /// + /// \param Negative True iff the number should be negative. + static APFloat getZero(const fltSemantics &Sem, bool Negative = false) { + APFloat Val(Sem, uninitialized); + Val.makeZero(Negative); + return Val; + } + + /// Factory for Positive and Negative Infinity. + /// + /// \param Negative True iff the number should be negative. + static APFloat getInf(const fltSemantics &Sem, bool Negative = false) { + APFloat Val(Sem, uninitialized); + Val.makeInf(Negative); + return Val; + } + + /// Factory for QNaN values. + /// + /// \param Negative - True iff the NaN generated should be negative. + /// \param type - The unspecified fill bits for creating the NaN, 0 by + /// default. The value is truncated as necessary. + static APFloat getNaN(const fltSemantics &Sem, bool Negative = false, + unsigned type = 0) { + if (type) { + APInt fill(64, type); + return getQNaN(Sem, Negative, &fill); + } else { + return getQNaN(Sem, Negative, nullptr); + } + } + + /// Factory for QNaN values. + static APFloat getQNaN(const fltSemantics &Sem, bool Negative = false, + const APInt *payload = nullptr) { + return makeNaN(Sem, false, Negative, payload); + } + + /// Factory for SNaN values. + static APFloat getSNaN(const fltSemantics &Sem, bool Negative = false, + const APInt *payload = nullptr) { + return makeNaN(Sem, true, Negative, payload); + } + + /// Returns the largest finite number in the given semantics. + /// + /// \param Negative - True iff the number should be negative + static APFloat getLargest(const fltSemantics &Sem, bool Negative = false); + + /// Returns the smallest (by magnitude) finite number in the given semantics. + /// Might be denormalized, which implies a relative loss of precision. + /// + /// \param Negative - True iff the number should be negative + static APFloat getSmallest(const fltSemantics &Sem, bool Negative = false); + + /// Returns the smallest (by magnitude) normalized finite number in the given + /// semantics. + /// + /// \param Negative - True iff the number should be negative + static APFloat getSmallestNormalized(const fltSemantics &Sem, + bool Negative = false); + + /// Returns a float which is bitcasted from an all one value int. + /// + /// \param BitWidth - Select float type + /// \param isIEEE - If 128 bit number, select between PPC and IEEE + static APFloat getAllOnesValue(unsigned BitWidth, bool isIEEE = false); + + /// Returns the size of the floating point number (in bits) in the given + /// semantics. + static unsigned getSizeInBits(const fltSemantics &Sem); + + /// @} + + /// Used to insert APFloat objects, or objects that contain APFloat objects, + /// into FoldingSets. + void Profile(FoldingSetNodeID &NID) const; + + /// \name Arithmetic + /// @{ + + opStatus add(const APFloat &, roundingMode); + opStatus subtract(const APFloat &, roundingMode); + opStatus multiply(const APFloat &, roundingMode); + opStatus divide(const APFloat &, roundingMode); + /// IEEE remainder. + opStatus remainder(const APFloat &); + /// C fmod, or llvm frem. + opStatus mod(const APFloat &); + opStatus fusedMultiplyAdd(const APFloat &, const APFloat &, roundingMode); + opStatus roundToIntegral(roundingMode); + /// IEEE-754R 5.3.1: nextUp/nextDown. + opStatus next(bool nextDown); + + /// \brief Operator+ overload which provides the default + /// \c nmNearestTiesToEven rounding mode and *no* error checking. + APFloat operator+(const APFloat &RHS) const { + APFloat Result = *this; + Result.add(RHS, rmNearestTiesToEven); + return Result; + } + + /// \brief Operator- overload which provides the default + /// \c nmNearestTiesToEven rounding mode and *no* error checking. + APFloat operator-(const APFloat &RHS) const { + APFloat Result = *this; + Result.subtract(RHS, rmNearestTiesToEven); + return Result; + } + + /// \brief Operator* overload which provides the default + /// \c nmNearestTiesToEven rounding mode and *no* error checking. + APFloat operator*(const APFloat &RHS) const { + APFloat Result = *this; + Result.multiply(RHS, rmNearestTiesToEven); + return Result; + } + + /// \brief Operator/ overload which provides the default + /// \c nmNearestTiesToEven rounding mode and *no* error checking. + APFloat operator/(const APFloat &RHS) const { + APFloat Result = *this; + Result.divide(RHS, rmNearestTiesToEven); + return Result; + } + + /// @} + + /// \name Sign operations. + /// @{ + + void changeSign(); + void clearSign(); + void copySign(const APFloat &); + + /// \brief A static helper to produce a copy of an APFloat value with its sign + /// copied from some other APFloat. + static APFloat copySign(APFloat Value, const APFloat &Sign) { + Value.copySign(Sign); + return Value; + } + + /// @} + + /// \name Conversions + /// @{ + + opStatus convert(const fltSemantics &, roundingMode, bool *); + opStatus convertToInteger(integerPart *, unsigned int, bool, roundingMode, + bool *) const; + opStatus convertToInteger(APSInt &, roundingMode, bool *) const; + opStatus convertFromAPInt(const APInt &, bool, roundingMode); + opStatus convertFromSignExtendedInteger(const integerPart *, unsigned int, + bool, roundingMode); + opStatus convertFromZeroExtendedInteger(const integerPart *, unsigned int, + bool, roundingMode); + opStatus convertFromString(StringRef, roundingMode); + APInt bitcastToAPInt() const; + double convertToDouble() const; + float convertToFloat() const; + + /// @} + + /// The definition of equality is not straightforward for floating point, so + /// we won't use operator==. Use one of the following, or write whatever it + /// is you really mean. + bool operator==(const APFloat &) const = delete; + + /// IEEE comparison with another floating point number (NaNs compare + /// unordered, 0==-0). + cmpResult compare(const APFloat &) const; + + /// Bitwise comparison for equality (QNaNs compare equal, 0!=-0). + bool bitwiseIsEqual(const APFloat &) const; + + /// Write out a hexadecimal representation of the floating point value to DST, + /// which must be of sufficient size, in the C99 form [-]0xh.hhhhp[+-]d. + /// Return the number of characters written, excluding the terminating NUL. + unsigned int convertToHexString(char *dst, unsigned int hexDigits, + bool upperCase, roundingMode) const; + + /// \name IEEE-754R 5.7.2 General operations. + /// @{ + + /// IEEE-754R isSignMinus: Returns true if and only if the current value is + /// negative. + /// + /// This applies to zeros and NaNs as well. + bool isNegative() const { return sign; } + + /// IEEE-754R isNormal: Returns true if and only if the current value is normal. + /// + /// This implies that the current value of the float is not zero, subnormal, + /// infinite, or NaN following the definition of normality from IEEE-754R. + bool isNormal() const { return !isDenormal() && isFiniteNonZero(); } + + /// Returns true if and only if the current value is zero, subnormal, or + /// normal. + /// + /// This means that the value is not infinite or NaN. + bool isFinite() const { return !isNaN() && !isInfinity(); } + + /// Returns true if and only if the float is plus or minus zero. + bool isZero() const { return category == fcZero; } + + /// IEEE-754R isSubnormal(): Returns true if and only if the float is a + /// denormal. + bool isDenormal() const; + + /// IEEE-754R isInfinite(): Returns true if and only if the float is infinity. + bool isInfinity() const { return category == fcInfinity; } + + /// Returns true if and only if the float is a quiet or signaling NaN. + bool isNaN() const { return category == fcNaN; } + + /// Returns true if and only if the float is a signaling NaN. + bool isSignaling() const; + + /// @} + + /// \name Simple Queries + /// @{ + + fltCategory getCategory() const { return category; } + const fltSemantics &getSemantics() const { return *semantics; } + bool isNonZero() const { return category != fcZero; } + bool isFiniteNonZero() const { return isFinite() && !isZero(); } + bool isPosZero() const { return isZero() && !isNegative(); } + bool isNegZero() const { return isZero() && isNegative(); } + + /// Returns true if and only if the number has the smallest possible non-zero + /// magnitude in the current semantics. + bool isSmallest() const; + + /// Returns true if and only if the number has the largest possible finite + /// magnitude in the current semantics. + bool isLargest() const; + + /// Returns true if and only if the number is an exact integer. + bool isInteger() const; + + /// @} + + APFloat &operator=(const APFloat &); + APFloat &operator=(APFloat &&); + + /// \brief Overload to compute a hash code for an APFloat value. + /// + /// Note that the use of hash codes for floating point values is in general + /// frought with peril. Equality is hard to define for these values. For + /// example, should negative and positive zero hash to different codes? Are + /// they equal or not? This hash value implementation specifically + /// emphasizes producing different codes for different inputs in order to + /// be used in canonicalization and memoization. As such, equality is + /// bitwiseIsEqual, and 0 != -0. + friend hash_code hash_value(const APFloat &Arg); + + /// Converts this value into a decimal string. + /// + /// \param FormatPrecision The maximum number of digits of + /// precision to output. If there are fewer digits available, + /// zero padding will not be used unless the value is + /// integral and small enough to be expressed in + /// FormatPrecision digits. 0 means to use the natural + /// precision of the number. + /// \param FormatMaxPadding The maximum number of zeros to + /// consider inserting before falling back to scientific + /// notation. 0 means to always use scientific notation. + /// + /// Number Precision MaxPadding Result + /// ------ --------- ---------- ------ + /// 1.01E+4 5 2 10100 + /// 1.01E+4 4 2 1.01E+4 + /// 1.01E+4 5 1 1.01E+4 + /// 1.01E-2 5 2 0.0101 + /// 1.01E-2 4 2 0.0101 + /// 1.01E-2 4 1 1.01E-2 + void toString(SmallVectorImpl &Str, unsigned FormatPrecision = 0, + unsigned FormatMaxPadding = 3) const; + + /// If this value has an exact multiplicative inverse, store it in inv and + /// return true. + bool getExactInverse(APFloat *inv) const; + + /// \brief Enumeration of \c ilogb error results. + enum IlogbErrorKinds { + IEK_Zero = INT_MIN+1, + IEK_NaN = INT_MIN, + IEK_Inf = INT_MAX + }; + + /// \brief Returns the exponent of the internal representation of the APFloat. + /// + /// Because the radix of APFloat is 2, this is equivalent to floor(log2(x)). + /// For special APFloat values, this returns special error codes: + /// + /// NaN -> \c IEK_NaN + /// 0 -> \c IEK_Zero + /// Inf -> \c IEK_Inf + /// + friend int ilogb(const APFloat &Arg) { + if (Arg.isNaN()) + return IEK_NaN; + if (Arg.isZero()) + return IEK_Zero; + if (Arg.isInfinity()) + return IEK_Inf; + + return Arg.exponent; + } + + /// \brief Returns: X * 2^Exp for integral exponents. + friend APFloat scalbn(APFloat X, int Exp); + +private: + + /// \name Simple Queries + /// @{ + + integerPart *significandParts(); + const integerPart *significandParts() const; + unsigned int partCount() const; + + /// @} + + /// \name Significand operations. + /// @{ + + integerPart addSignificand(const APFloat &); + integerPart subtractSignificand(const APFloat &, integerPart); + lostFraction addOrSubtractSignificand(const APFloat &, bool subtract); + lostFraction multiplySignificand(const APFloat &, const APFloat *); + lostFraction divideSignificand(const APFloat &); + void incrementSignificand(); + void initialize(const fltSemantics *); + void shiftSignificandLeft(unsigned int); + lostFraction shiftSignificandRight(unsigned int); + unsigned int significandLSB() const; + unsigned int significandMSB() const; + void zeroSignificand(); + /// Return true if the significand excluding the integral bit is all ones. + bool isSignificandAllOnes() const; + /// Return true if the significand excluding the integral bit is all zeros. + bool isSignificandAllZeros() const; + + /// @} + + /// \name Arithmetic on special values. + /// @{ + + opStatus addOrSubtractSpecials(const APFloat &, bool subtract); + opStatus divideSpecials(const APFloat &); + opStatus multiplySpecials(const APFloat &); + opStatus modSpecials(const APFloat &); + + /// @} + + /// \name Special value setters. + /// @{ + + void makeLargest(bool Neg = false); + void makeSmallest(bool Neg = false); + void makeNaN(bool SNaN = false, bool Neg = false, + const APInt *fill = nullptr); + static APFloat makeNaN(const fltSemantics &Sem, bool SNaN, bool Negative, + const APInt *fill); + void makeInf(bool Neg = false); + void makeZero(bool Neg = false); + + /// @} + + /// \name Miscellany + /// @{ + + bool convertFromStringSpecials(StringRef str); + opStatus normalize(roundingMode, lostFraction); + opStatus addOrSubtract(const APFloat &, roundingMode, bool subtract); + cmpResult compareAbsoluteValue(const APFloat &) const; + opStatus handleOverflow(roundingMode); + bool roundAwayFromZero(roundingMode, lostFraction, unsigned int) const; + opStatus convertToSignExtendedInteger(integerPart *, unsigned int, bool, + roundingMode, bool *) const; + opStatus convertFromUnsignedParts(const integerPart *, unsigned int, + roundingMode); + opStatus convertFromHexadecimalString(StringRef, roundingMode); + opStatus convertFromDecimalString(StringRef, roundingMode); + char *convertNormalToHexString(char *, unsigned int, bool, + roundingMode) const; + opStatus roundSignificandWithExponent(const integerPart *, unsigned int, int, + roundingMode); + + /// @} + + APInt convertHalfAPFloatToAPInt() const; + APInt convertFloatAPFloatToAPInt() const; + APInt convertDoubleAPFloatToAPInt() const; + APInt convertQuadrupleAPFloatToAPInt() const; + APInt convertF80LongDoubleAPFloatToAPInt() const; + APInt convertPPCDoubleDoubleAPFloatToAPInt() const; + void initFromAPInt(const fltSemantics *Sem, const APInt &api); + void initFromHalfAPInt(const APInt &api); + void initFromFloatAPInt(const APInt &api); + void initFromDoubleAPInt(const APInt &api); + void initFromQuadrupleAPInt(const APInt &api); + void initFromF80LongDoubleAPInt(const APInt &api); + void initFromPPCDoubleDoubleAPInt(const APInt &api); + + void assign(const APFloat &); + void copySignificand(const APFloat &); + void freeSignificand(); + + /// The semantics that this value obeys. + const fltSemantics *semantics; + + /// A binary fraction with an explicit integer bit. + /// + /// The significand must be at least one bit wider than the target precision. + union Significand { + integerPart part; + integerPart *parts; + } significand; + + /// The signed unbiased exponent of the value. + ExponentType exponent; + + /// What kind of floating point number this is. + /// + /// Only 2 bits are required, but VisualStudio incorrectly sign extends it. + /// Using the extra bit keeps it from failing under VisualStudio. + fltCategory category : 3; + + /// Sign bit of the number. + unsigned int sign : 1; +}; + +/// See friend declarations above. +/// +/// These additional declarations are required in order to compile LLVM with IBM +/// xlC compiler. +hash_code hash_value(const APFloat &Arg); +APFloat scalbn(APFloat X, int Exp); + +/// \brief Returns the absolute value of the argument. +inline APFloat abs(APFloat X) { + X.clearSign(); + return X; +} + +/// Implements IEEE minNum semantics. Returns the smaller of the 2 arguments if +/// both are not NaN. If either argument is a NaN, returns the other argument. +LLVM_READONLY +inline APFloat minnum(const APFloat &A, const APFloat &B) { + if (A.isNaN()) + return B; + if (B.isNaN()) + return A; + return (B.compare(A) == APFloat::cmpLessThan) ? B : A; +} + +/// Implements IEEE maxNum semantics. Returns the larger of the 2 arguments if +/// both are not NaN. If either argument is a NaN, returns the other argument. +LLVM_READONLY +inline APFloat maxnum(const APFloat &A, const APFloat &B) { + if (A.isNaN()) + return B; + if (B.isNaN()) + return A; + return (A.compare(B) == APFloat::cmpLessThan) ? B : A; +} + +} // namespace llvm_ks + +#endif // LLVM_ADT_APFLOAT_H diff --git a/llvm/include/llvm/ADT/APInt.h b/llvm/include/llvm/ADT/APInt.h new file mode 100644 index 0000000..1f24416 --- /dev/null +++ b/llvm/include/llvm/ADT/APInt.h @@ -0,0 +1,1915 @@ +//===-- llvm/ADT/APInt.h - For Arbitrary Precision Integer -----*- C++ -*--===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +/// +/// \file +/// \brief This file implements a class to represent arbitrary precision +/// integral constant values and operations on them. +/// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_APINT_H +#define LLVM_ADT_APINT_H + +#include "llvm/ADT/ArrayRef.h" +#include "llvm/Support/Compiler.h" +#include "llvm/Support/MathExtras.h" +#include +#include +#include +#include + +namespace llvm_ks { +class FoldingSetNodeID; +class StringRef; +class hash_code; +class raw_ostream; + +template class SmallVectorImpl; + +// An unsigned host type used as a single part of a multi-part +// bignum. +typedef uint64_t integerPart; + +const unsigned int host_char_bit = 8; +const unsigned int integerPartWidth = + host_char_bit * static_cast(sizeof(integerPart)); + +//===----------------------------------------------------------------------===// +// APInt Class +//===----------------------------------------------------------------------===// + +/// \brief Class for arbitrary precision integers. +/// +/// APInt is a functional replacement for common case unsigned integer type like +/// "unsigned", "unsigned long" or "uint64_t", but also allows non-byte-width +/// integer sizes and large integer value types such as 3-bits, 15-bits, or more +/// than 64-bits of precision. APInt provides a variety of arithmetic operators +/// and methods to manipulate integer values of any bit-width. It supports both +/// the typical integer arithmetic and comparison operations as well as bitwise +/// manipulation. +/// +/// The class has several invariants worth noting: +/// * All bit, byte, and word positions are zero-based. +/// * Once the bit width is set, it doesn't change except by the Truncate, +/// SignExtend, or ZeroExtend operations. +/// * All binary operators must be on APInt instances of the same bit width. +/// Attempting to use these operators on instances with different bit +/// widths will yield an assertion. +/// * The value is stored canonically as an unsigned value. For operations +/// where it makes a difference, there are both signed and unsigned variants +/// of the operation. For example, sdiv and udiv. However, because the bit +/// widths must be the same, operations such as Mul and Add produce the same +/// results regardless of whether the values are interpreted as signed or +/// not. +/// * In general, the class tries to follow the style of computation that LLVM +/// uses in its IR. This simplifies its use for LLVM. +/// +class APInt { + unsigned BitWidth; ///< The number of bits in this APInt. + + /// This union is used to store the integer value. When the + /// integer bit-width <= 64, it uses VAL, otherwise it uses pVal. + union { + uint64_t VAL; ///< Used to store the <= 64 bits integer value. + uint64_t *pVal; ///< Used to store the >64 bits integer value. + }; + + /// This enum is used to hold the constants we needed for APInt. + enum { + /// Bits in a word + APINT_BITS_PER_WORD = + static_cast(sizeof(uint64_t)) * CHAR_BIT, + /// Byte size of a word + APINT_WORD_SIZE = static_cast(sizeof(uint64_t)) + }; + + friend struct DenseMapAPIntKeyInfo; + + /// \brief Fast internal constructor + /// + /// This constructor is used only internally for speed of construction of + /// temporaries. It is unsafe for general use so it is not public. + APInt(uint64_t *val, unsigned bits) : BitWidth(bits), pVal(val) {} + + /// \brief Determine if this APInt just has one word to store value. + /// + /// \returns true if the number of bits <= 64, false otherwise. + bool isSingleWord() const { return BitWidth <= APINT_BITS_PER_WORD; } + + /// \brief Determine which word a bit is in. + /// + /// \returns the word position for the specified bit position. + static unsigned whichWord(unsigned bitPosition) { + return bitPosition / APINT_BITS_PER_WORD; + } + + /// \brief Determine which bit in a word a bit is in. + /// + /// \returns the bit position in a word for the specified bit position + /// in the APInt. + static unsigned whichBit(unsigned bitPosition) { + return bitPosition % APINT_BITS_PER_WORD; + } + + /// \brief Get a single bit mask. + /// + /// \returns a uint64_t with only bit at "whichBit(bitPosition)" set + /// This method generates and returns a uint64_t (word) mask for a single + /// bit at a specific bit position. This is used to mask the bit in the + /// corresponding word. + static uint64_t maskBit(unsigned bitPosition) { + return 1ULL << whichBit(bitPosition); + } + + /// \brief Clear unused high order bits + /// + /// This method is used internally to clear the top "N" bits in the high order + /// word that are not used by the APInt. This is needed after the most + /// significant word is assigned a value to ensure that those bits are + /// zero'd out. + APInt &clearUnusedBits() { + // Compute how many bits are used in the final word + unsigned wordBits = BitWidth % APINT_BITS_PER_WORD; + if (wordBits == 0) + // If all bits are used, we want to leave the value alone. This also + // avoids the undefined behavior of >> when the shift is the same size as + // the word size (64). + return *this; + + // Mask out the high bits. + uint64_t mask = ~uint64_t(0ULL) >> (APINT_BITS_PER_WORD - wordBits); + if (isSingleWord()) + VAL &= mask; + else + pVal[getNumWords() - 1] &= mask; + return *this; + } + + /// \brief Get the word corresponding to a bit position + /// \returns the corresponding word for the specified bit position. + uint64_t getWord(unsigned bitPosition) const { + return isSingleWord() ? VAL : pVal[whichWord(bitPosition)]; + } + + /// \brief Convert a char array into an APInt + /// + /// \param radix 2, 8, 10, 16, or 36 + /// Converts a string into a number. The string must be non-empty + /// and well-formed as a number of the given base. The bit-width + /// must be sufficient to hold the result. + /// + /// This is used by the constructors that take string arguments. + /// + /// StringRef::getAsInteger is superficially similar but (1) does + /// not assume that the string is well-formed and (2) grows the + /// result to hold the input. + void fromString(unsigned numBits, StringRef str, uint8_t radix); + + /// \brief An internal division function for dividing APInts. + /// + /// This is used by the toString method to divide by the radix. It simply + /// provides a more convenient form of divide for internal use since KnuthDiv + /// has specific constraints on its inputs. If those constraints are not met + /// then it provides a simpler form of divide. + static void divide(const APInt LHS, unsigned lhsWords, const APInt &RHS, + unsigned rhsWords, APInt *Quotient, APInt *Remainder); + + /// out-of-line slow case for inline constructor + void initSlowCase(unsigned numBits, uint64_t val, bool isSigned); + + /// shared code between two array constructors + void initFromArray(ArrayRef array); + + /// out-of-line slow case for inline copy constructor + void initSlowCase(const APInt &that); + + /// out-of-line slow case for shl + APInt shlSlowCase(unsigned shiftAmt) const; + + /// out-of-line slow case for operator& + APInt AndSlowCase(const APInt &RHS) const; + + /// out-of-line slow case for operator| + APInt OrSlowCase(const APInt &RHS) const; + + /// out-of-line slow case for operator^ + APInt XorSlowCase(const APInt &RHS) const; + + /// out-of-line slow case for operator= + APInt &AssignSlowCase(const APInt &RHS); + + /// out-of-line slow case for operator== + bool EqualSlowCase(const APInt &RHS) const; + + /// out-of-line slow case for operator== + bool EqualSlowCase(uint64_t Val) const; + + /// out-of-line slow case for countLeadingZeros + unsigned countLeadingZerosSlowCase() const; + + /// out-of-line slow case for countTrailingOnes + unsigned countTrailingOnesSlowCase() const; + + /// out-of-line slow case for countPopulation + unsigned countPopulationSlowCase() const; + +public: + /// \name Constructors + /// @{ + + /// \brief Create a new APInt of numBits width, initialized as val. + /// + /// If isSigned is true then val is treated as if it were a signed value + /// (i.e. as an int64_t) and the appropriate sign extension to the bit width + /// will be done. Otherwise, no sign extension occurs (high order bits beyond + /// the range of val are zero filled). + /// + /// \param numBits the bit width of the constructed APInt + /// \param val the initial value of the APInt + /// \param isSigned how to treat signedness of val + APInt(unsigned numBits, uint64_t val, bool isSigned = false) + : BitWidth(numBits), VAL(0) { + assert(BitWidth && "bitwidth too small"); + if (isSingleWord()) + VAL = val; + else + initSlowCase(numBits, val, isSigned); + clearUnusedBits(); + } + + /// \brief Construct an APInt of numBits width, initialized as bigVal[]. + /// + /// Note that bigVal.size() can be smaller or larger than the corresponding + /// bit width but any extraneous bits will be dropped. + /// + /// \param numBits the bit width of the constructed APInt + /// \param bigVal a sequence of words to form the initial value of the APInt + APInt(unsigned numBits, ArrayRef bigVal); + + /// Equivalent to APInt(numBits, ArrayRef(bigVal, numWords)), but + /// deprecated because this constructor is prone to ambiguity with the + /// APInt(unsigned, uint64_t, bool) constructor. + /// + /// If this overload is ever deleted, care should be taken to prevent calls + /// from being incorrectly captured by the APInt(unsigned, uint64_t, bool) + /// constructor. + APInt(unsigned numBits, unsigned numWords, const uint64_t bigVal[]); + + /// \brief Construct an APInt from a string representation. + /// + /// This constructor interprets the string \p str in the given radix. The + /// interpretation stops when the first character that is not suitable for the + /// radix is encountered, or the end of the string. Acceptable radix values + /// are 2, 8, 10, 16, and 36. It is an error for the value implied by the + /// string to require more bits than numBits. + /// + /// \param numBits the bit width of the constructed APInt + /// \param str the string to be interpreted + /// \param radix the radix to use for the conversion + APInt(unsigned numBits, StringRef str, uint8_t radix); + + /// Simply makes *this a copy of that. + /// @brief Copy Constructor. + APInt(const APInt &that) : BitWidth(that.BitWidth), VAL(0) { + if (isSingleWord()) + VAL = that.VAL; + else + initSlowCase(that); + } + + /// \brief Move Constructor. + APInt(APInt &&that) : BitWidth(that.BitWidth), VAL(that.VAL) { + that.BitWidth = 0; + } + + /// \brief Destructor. + ~APInt() { + if (needsCleanup()) + delete[] pVal; + } + + /// \brief Default constructor that creates an uninteresting APInt + /// representing a 1-bit zero value. + /// + /// This is useful for object deserialization (pair this with the static + /// method Read). + explicit APInt() : BitWidth(1), VAL(0) {} + + /// \brief Returns whether this instance allocated memory. + bool needsCleanup() const { return !isSingleWord(); } + + /// Used to insert APInt objects, or objects that contain APInt objects, into + /// FoldingSets. + void Profile(FoldingSetNodeID &id) const; + + /// @} + /// \name Value Tests + /// @{ + + /// \brief Determine sign of this APInt. + /// + /// This tests the high bit of this APInt to determine if it is set. + /// + /// \returns true if this APInt is negative, false otherwise + bool isNegative() const { return (*this)[BitWidth - 1]; } + + /// \brief Determine if this APInt Value is non-negative (>= 0) + /// + /// This tests the high bit of the APInt to determine if it is unset. + bool isNonNegative() const { return !isNegative(); } + + /// \brief Determine if this APInt Value is positive. + /// + /// This tests if the value of this APInt is positive (> 0). Note + /// that 0 is not a positive value. + /// + /// \returns true if this APInt is positive. + bool isStrictlyPositive() const { return isNonNegative() && !!*this; } + + /// \brief Determine if all bits are set + /// + /// This checks to see if the value has all bits of the APInt are set or not. + bool isAllOnesValue() const { + if (isSingleWord()) + return VAL == ~integerPart(0) >> (APINT_BITS_PER_WORD - BitWidth); + return countPopulationSlowCase() == BitWidth; + } + + /// \brief Determine if this is the largest unsigned value. + /// + /// This checks to see if the value of this APInt is the maximum unsigned + /// value for the APInt's bit width. + bool isMaxValue() const { return isAllOnesValue(); } + + /// \brief Determine if this is the largest signed value. + /// + /// This checks to see if the value of this APInt is the maximum signed + /// value for the APInt's bit width. + bool isMaxSignedValue() const { + return !isNegative() && countPopulation() == BitWidth - 1; + } + + /// \brief Determine if this is the smallest unsigned value. + /// + /// This checks to see if the value of this APInt is the minimum unsigned + /// value for the APInt's bit width. + bool isMinValue() const { return !*this; } + + /// \brief Determine if this is the smallest signed value. + /// + /// This checks to see if the value of this APInt is the minimum signed + /// value for the APInt's bit width. + bool isMinSignedValue() const { + return isNegative() && isPowerOf2(); + } + + /// \brief Check if this APInt has an N-bits unsigned integer value. + bool isIntN(unsigned N) const { + assert(N && "N == 0 ???"); + return getActiveBits() <= N; + } + + /// \brief Check if this APInt has an N-bits signed integer value. + bool isSignedIntN(unsigned N) const { + assert(N && "N == 0 ???"); + return getMinSignedBits() <= N; + } + + /// \brief Check if this APInt's value is a power of two greater than zero. + /// + /// \returns true if the argument APInt value is a power of two > 0. + bool isPowerOf2() const { + if (isSingleWord()) + return isPowerOf2_64(VAL); + return countPopulationSlowCase() == 1; + } + + /// \brief Check if the APInt's value is returned by getSignBit. + /// + /// \returns true if this is the value returned by getSignBit. + bool isSignBit() const { return isMinSignedValue(); } + + /// \brief Convert APInt to a boolean value. + /// + /// This converts the APInt to a boolean value as a test against zero. + bool getBoolValue() const { return !!*this; } + + /// If this value is smaller than the specified limit, return it, otherwise + /// return the limit value. This causes the value to saturate to the limit. + uint64_t getLimitedValue(uint64_t Limit = ~0ULL) const { + return (getActiveBits() > 64 || getZExtValue() > Limit) ? Limit + : getZExtValue(); + } + + /// \brief Check if the APInt consists of a repeated bit pattern. + /// + /// e.g. 0x01010101 satisfies isSplat(8). + /// \param SplatSizeInBits The size of the pattern in bits. Must divide bit + /// width without remainder. + bool isSplat(unsigned SplatSizeInBits) const; + + /// @} + /// \name Value Generators + /// @{ + + /// \brief Gets maximum unsigned value of APInt for specific bit width. + static APInt getMaxValue(unsigned numBits) { + return getAllOnesValue(numBits); + } + + /// \brief Gets maximum signed value of APInt for a specific bit width. + static APInt getSignedMaxValue(unsigned numBits) { + APInt API = getAllOnesValue(numBits); + API.clearBit(numBits - 1); + return API; + } + + /// \brief Gets minimum unsigned value of APInt for a specific bit width. + static APInt getMinValue(unsigned numBits) { return APInt(numBits, 0); } + + /// \brief Gets minimum signed value of APInt for a specific bit width. + static APInt getSignedMinValue(unsigned numBits) { + APInt API(numBits, 0); + API.setBit(numBits - 1); + return API; + } + + /// \brief Get the SignBit for a specific bit width. + /// + /// This is just a wrapper function of getSignedMinValue(), and it helps code + /// readability when we want to get a SignBit. + static APInt getSignBit(unsigned BitWidth) { + return getSignedMinValue(BitWidth); + } + + /// \brief Get the all-ones value. + /// + /// \returns the all-ones value for an APInt of the specified bit-width. + static APInt getAllOnesValue(unsigned numBits) { + return APInt(numBits, UINT64_MAX, true); + } + + /// \brief Get the '0' value. + /// + /// \returns the '0' value for an APInt of the specified bit-width. + static APInt getNullValue(unsigned numBits) { return APInt(numBits, 0); } + + /// \brief Compute an APInt containing numBits highbits from this APInt. + /// + /// Get an APInt with the same BitWidth as this APInt, just zero mask + /// the low bits and right shift to the least significant bit. + /// + /// \returns the high "numBits" bits of this APInt. + APInt getHiBits(unsigned numBits) const; + + /// \brief Compute an APInt containing numBits lowbits from this APInt. + /// + /// Get an APInt with the same BitWidth as this APInt, just zero mask + /// the high bits. + /// + /// \returns the low "numBits" bits of this APInt. + APInt getLoBits(unsigned numBits) const; + + /// \brief Return an APInt with exactly one bit set in the result. + static APInt getOneBitSet(unsigned numBits, unsigned BitNo) { + APInt Res(numBits, 0); + Res.setBit(BitNo); + return Res; + } + + /// \brief Get a value with a block of bits set. + /// + /// Constructs an APInt value that has a contiguous range of bits set. The + /// bits from loBit (inclusive) to hiBit (exclusive) will be set. All other + /// bits will be zero. For example, with parameters(32, 0, 16) you would get + /// 0x0000FFFF. If hiBit is less than loBit then the set bits "wrap". For + /// example, with parameters (32, 28, 4), you would get 0xF000000F. + /// + /// \param numBits the intended bit width of the result + /// \param loBit the index of the lowest bit set. + /// \param hiBit the index of the highest bit set. + /// + /// \returns An APInt value with the requested bits set. + static APInt getBitsSet(unsigned numBits, unsigned loBit, unsigned hiBit) { + assert(hiBit <= numBits && "hiBit out of range"); + assert(loBit < numBits && "loBit out of range"); + if (hiBit < loBit) + return getLowBitsSet(numBits, hiBit) | + getHighBitsSet(numBits, numBits - loBit); + return getLowBitsSet(numBits, hiBit - loBit).shl(loBit); + } + + /// \brief Get a value with high bits set + /// + /// Constructs an APInt value that has the top hiBitsSet bits set. + /// + /// \param numBits the bitwidth of the result + /// \param hiBitsSet the number of high-order bits set in the result. + static APInt getHighBitsSet(unsigned numBits, unsigned hiBitsSet) { + assert(hiBitsSet <= numBits && "Too many bits to set!"); + // Handle a degenerate case, to avoid shifting by word size + if (hiBitsSet == 0) + return APInt(numBits, 0); + unsigned shiftAmt = numBits - hiBitsSet; + // For small values, return quickly + if (numBits <= APINT_BITS_PER_WORD) + return APInt(numBits, ~0ULL << shiftAmt); + return getAllOnesValue(numBits).shl(shiftAmt); + } + + /// \brief Get a value with low bits set + /// + /// Constructs an APInt value that has the bottom loBitsSet bits set. + /// + /// \param numBits the bitwidth of the result + /// \param loBitsSet the number of low-order bits set in the result. + static APInt getLowBitsSet(unsigned numBits, unsigned loBitsSet) { + assert(loBitsSet <= numBits && "Too many bits to set!"); + // Handle a degenerate case, to avoid shifting by word size + if (loBitsSet == 0) + return APInt(numBits, 0); + if (loBitsSet == APINT_BITS_PER_WORD) + return APInt(numBits, UINT64_MAX); + // For small values, return quickly. + if (loBitsSet <= APINT_BITS_PER_WORD) + return APInt(numBits, UINT64_MAX >> (APINT_BITS_PER_WORD - loBitsSet)); + return getAllOnesValue(numBits).lshr(numBits - loBitsSet); + } + + /// \brief Return a value containing V broadcasted over NewLen bits. + static APInt getSplat(unsigned NewLen, const APInt &V) { + assert(NewLen >= V.getBitWidth() && "Can't splat to smaller bit width!"); + + APInt Val = V.zextOrSelf(NewLen); + for (unsigned I = V.getBitWidth(); I < NewLen; I <<= 1) + Val |= Val << I; + + return Val; + } + + /// \brief Determine if two APInts have the same value, after zero-extending + /// one of them (if needed!) to ensure that the bit-widths match. + static bool isSameValue(const APInt &I1, const APInt &I2) { + if (I1.getBitWidth() == I2.getBitWidth()) + return I1 == I2; + + if (I1.getBitWidth() > I2.getBitWidth()) + return I1 == I2.zext(I1.getBitWidth()); + + return I1.zext(I2.getBitWidth()) == I2; + } + + /// \brief Overload to compute a hash_code for an APInt value. + friend hash_code hash_value(const APInt &Arg); + + /// This function returns a pointer to the internal storage of the APInt. + /// This is useful for writing out the APInt in binary form without any + /// conversions. + const uint64_t *getRawData() const { + if (isSingleWord()) + return &VAL; + return &pVal[0]; + } + + /// @} + /// \name Unary Operators + /// @{ + + /// \brief Postfix increment operator. + /// + /// \returns a new APInt value representing *this incremented by one + const APInt operator++(int) { + APInt API(*this); + ++(*this); + return API; + } + + /// \brief Prefix increment operator. + /// + /// \returns *this incremented by one + APInt &operator++(); + + /// \brief Postfix decrement operator. + /// + /// \returns a new APInt representing *this decremented by one. + const APInt operator--(int) { + APInt API(*this); + --(*this); + return API; + } + + /// \brief Prefix decrement operator. + /// + /// \returns *this decremented by one. + APInt &operator--(); + + /// \brief Unary bitwise complement operator. + /// + /// Performs a bitwise complement operation on this APInt. + /// + /// \returns an APInt that is the bitwise complement of *this + APInt operator~() const { + APInt Result(*this); + Result.flipAllBits(); + return Result; + } + + /// \brief Unary negation operator + /// + /// Negates *this using two's complement logic. + /// + /// \returns An APInt value representing the negation of *this. + APInt operator-() const { return APInt(BitWidth, 0) - (*this); } + + /// \brief Logical negation operator. + /// + /// Performs logical negation operation on this APInt. + /// + /// \returns true if *this is zero, false otherwise. + bool operator!() const { + if (isSingleWord()) + return !VAL; + + for (unsigned i = 0; i != getNumWords(); ++i) + if (pVal[i]) + return false; + return true; + } + + /// @} + /// \name Assignment Operators + /// @{ + + /// \brief Copy assignment operator. + /// + /// \returns *this after assignment of RHS. + APInt &operator=(const APInt &RHS) { + // If the bitwidths are the same, we can avoid mucking with memory + if (isSingleWord() && RHS.isSingleWord()) { + VAL = RHS.VAL; + BitWidth = RHS.BitWidth; + return clearUnusedBits(); + } + + return AssignSlowCase(RHS); + } + + /// @brief Move assignment operator. + APInt &operator=(APInt &&that) { + if (!isSingleWord()) { + // The MSVC STL shipped in 2013 requires that self move assignment be a + // no-op. Otherwise algorithms like stable_sort will produce answers + // where half of the output is left in a moved-from state. + if (this == &that) + return *this; + delete[] pVal; + } + + // Use memcpy so that type based alias analysis sees both VAL and pVal + // as modified. + memcpy(&VAL, &that.VAL, sizeof(uint64_t)); + + // If 'this == &that', avoid zeroing our own bitwidth by storing to 'that' + // first. + unsigned ThatBitWidth = that.BitWidth; + that.BitWidth = 0; + BitWidth = ThatBitWidth; + + return *this; + } + + /// \brief Assignment operator. + /// + /// The RHS value is assigned to *this. If the significant bits in RHS exceed + /// the bit width, the excess bits are truncated. If the bit width is larger + /// than 64, the value is zero filled in the unspecified high order bits. + /// + /// \returns *this after assignment of RHS value. + APInt &operator=(uint64_t RHS); + + /// \brief Bitwise AND assignment operator. + /// + /// Performs a bitwise AND operation on this APInt and RHS. The result is + /// assigned to *this. + /// + /// \returns *this after ANDing with RHS. + APInt &operator&=(const APInt &RHS); + + /// \brief Bitwise OR assignment operator. + /// + /// Performs a bitwise OR operation on this APInt and RHS. The result is + /// assigned *this; + /// + /// \returns *this after ORing with RHS. + APInt &operator|=(const APInt &RHS); + + /// \brief Bitwise OR assignment operator. + /// + /// Performs a bitwise OR operation on this APInt and RHS. RHS is + /// logically zero-extended or truncated to match the bit-width of + /// the LHS. + APInt &operator|=(uint64_t RHS) { + if (isSingleWord()) { + VAL |= RHS; + clearUnusedBits(); + } else { + pVal[0] |= RHS; + } + return *this; + } + + /// \brief Bitwise XOR assignment operator. + /// + /// Performs a bitwise XOR operation on this APInt and RHS. The result is + /// assigned to *this. + /// + /// \returns *this after XORing with RHS. + APInt &operator^=(const APInt &RHS); + + /// \brief Multiplication assignment operator. + /// + /// Multiplies this APInt by RHS and assigns the result to *this. + /// + /// \returns *this + APInt &operator*=(const APInt &RHS); + + /// \brief Addition assignment operator. + /// + /// Adds RHS to *this and assigns the result to *this. + /// + /// \returns *this + APInt &operator+=(const APInt &RHS); + + /// \brief Subtraction assignment operator. + /// + /// Subtracts RHS from *this and assigns the result to *this. + /// + /// \returns *this + APInt &operator-=(const APInt &RHS); + + /// \brief Left-shift assignment function. + /// + /// Shifts *this left by shiftAmt and assigns the result to *this. + /// + /// \returns *this after shifting left by shiftAmt + APInt &operator<<=(unsigned shiftAmt) { + *this = shl(shiftAmt); + return *this; + } + + /// @} + /// \name Binary Operators + /// @{ + + /// \brief Bitwise AND operator. + /// + /// Performs a bitwise AND operation on *this and RHS. + /// + /// \returns An APInt value representing the bitwise AND of *this and RHS. + APInt operator&(const APInt &RHS) const { + assert(BitWidth == RHS.BitWidth && "Bit widths must be the same"); + if (isSingleWord()) + return APInt(getBitWidth(), VAL & RHS.VAL); + return AndSlowCase(RHS); + } + APInt LLVM_ATTRIBUTE_UNUSED_RESULT And(const APInt &RHS) const { + return this->operator&(RHS); + } + + /// \brief Bitwise OR operator. + /// + /// Performs a bitwise OR operation on *this and RHS. + /// + /// \returns An APInt value representing the bitwise OR of *this and RHS. + APInt operator|(const APInt &RHS) const { + assert(BitWidth == RHS.BitWidth && "Bit widths must be the same"); + if (isSingleWord()) + return APInt(getBitWidth(), VAL | RHS.VAL); + return OrSlowCase(RHS); + } + + /// \brief Bitwise OR function. + /// + /// Performs a bitwise or on *this and RHS. This is implemented by simply + /// calling operator|. + /// + /// \returns An APInt value representing the bitwise OR of *this and RHS. + APInt LLVM_ATTRIBUTE_UNUSED_RESULT Or(const APInt &RHS) const { + return this->operator|(RHS); + } + + /// \brief Bitwise XOR operator. + /// + /// Performs a bitwise XOR operation on *this and RHS. + /// + /// \returns An APInt value representing the bitwise XOR of *this and RHS. + APInt operator^(const APInt &RHS) const { + assert(BitWidth == RHS.BitWidth && "Bit widths must be the same"); + if (isSingleWord()) + return APInt(BitWidth, VAL ^ RHS.VAL); + return XorSlowCase(RHS); + } + + /// \brief Bitwise XOR function. + /// + /// Performs a bitwise XOR operation on *this and RHS. This is implemented + /// through the usage of operator^. + /// + /// \returns An APInt value representing the bitwise XOR of *this and RHS. + APInt LLVM_ATTRIBUTE_UNUSED_RESULT Xor(const APInt &RHS) const { + return this->operator^(RHS); + } + + /// \brief Multiplication operator. + /// + /// Multiplies this APInt by RHS and returns the result. + APInt operator*(const APInt &RHS) const; + + /// \brief Addition operator. + /// + /// Adds RHS to this APInt and returns the result. + APInt operator+(const APInt &RHS) const; + APInt operator+(uint64_t RHS) const { return (*this) + APInt(BitWidth, RHS); } + + /// \brief Subtraction operator. + /// + /// Subtracts RHS from this APInt and returns the result. + APInt operator-(const APInt &RHS) const; + APInt operator-(uint64_t RHS) const { return (*this) - APInt(BitWidth, RHS); } + + /// \brief Left logical shift operator. + /// + /// Shifts this APInt left by \p Bits and returns the result. + APInt operator<<(unsigned Bits) const { return shl(Bits); } + + /// \brief Left logical shift operator. + /// + /// Shifts this APInt left by \p Bits and returns the result. + APInt operator<<(const APInt &Bits) const { return shl(Bits); } + + /// \brief Arithmetic right-shift function. + /// + /// Arithmetic right-shift this APInt by shiftAmt. + APInt LLVM_ATTRIBUTE_UNUSED_RESULT ashr(unsigned shiftAmt) const; + + /// \brief Logical right-shift function. + /// + /// Logical right-shift this APInt by shiftAmt. + APInt LLVM_ATTRIBUTE_UNUSED_RESULT lshr(unsigned shiftAmt) const; + + /// \brief Left-shift function. + /// + /// Left-shift this APInt by shiftAmt. + APInt LLVM_ATTRIBUTE_UNUSED_RESULT shl(unsigned shiftAmt) const { + assert(shiftAmt <= BitWidth && "Invalid shift amount"); + if (isSingleWord()) { + if (shiftAmt >= BitWidth) + return APInt(BitWidth, 0); // avoid undefined shift results + return APInt(BitWidth, VAL << shiftAmt); + } + return shlSlowCase(shiftAmt); + } + + /// \brief Rotate left by rotateAmt. + APInt LLVM_ATTRIBUTE_UNUSED_RESULT rotl(unsigned rotateAmt) const; + + /// \brief Rotate right by rotateAmt. + APInt LLVM_ATTRIBUTE_UNUSED_RESULT rotr(unsigned rotateAmt) const; + + /// \brief Arithmetic right-shift function. + /// + /// Arithmetic right-shift this APInt by shiftAmt. + APInt LLVM_ATTRIBUTE_UNUSED_RESULT ashr(const APInt &shiftAmt) const; + + /// \brief Logical right-shift function. + /// + /// Logical right-shift this APInt by shiftAmt. + APInt LLVM_ATTRIBUTE_UNUSED_RESULT lshr(const APInt &shiftAmt) const; + + /// \brief Left-shift function. + /// + /// Left-shift this APInt by shiftAmt. + APInt LLVM_ATTRIBUTE_UNUSED_RESULT shl(const APInt &shiftAmt) const; + + /// \brief Rotate left by rotateAmt. + APInt LLVM_ATTRIBUTE_UNUSED_RESULT rotl(const APInt &rotateAmt) const; + + /// \brief Rotate right by rotateAmt. + APInt LLVM_ATTRIBUTE_UNUSED_RESULT rotr(const APInt &rotateAmt) const; + + /// \brief Unsigned division operation. + /// + /// Perform an unsigned divide operation on this APInt by RHS. Both this and + /// RHS are treated as unsigned quantities for purposes of this division. + /// + /// \returns a new APInt value containing the division result + APInt LLVM_ATTRIBUTE_UNUSED_RESULT udiv(const APInt &RHS) const; + + /// \brief Signed division function for APInt. + /// + /// Signed divide this APInt by APInt RHS. + APInt LLVM_ATTRIBUTE_UNUSED_RESULT sdiv(const APInt &RHS) const; + + /// \brief Unsigned remainder operation. + /// + /// Perform an unsigned remainder operation on this APInt with RHS being the + /// divisor. Both this and RHS are treated as unsigned quantities for purposes + /// of this operation. Note that this is a true remainder operation and not a + /// modulo operation because the sign follows the sign of the dividend which + /// is *this. + /// + /// \returns a new APInt value containing the remainder result + APInt LLVM_ATTRIBUTE_UNUSED_RESULT urem(const APInt &RHS) const; + + /// \brief Function for signed remainder operation. + /// + /// Signed remainder operation on APInt. + APInt LLVM_ATTRIBUTE_UNUSED_RESULT srem(const APInt &RHS) const; + + /// \brief Dual division/remainder interface. + /// + /// Sometimes it is convenient to divide two APInt values and obtain both the + /// quotient and remainder. This function does both operations in the same + /// computation making it a little more efficient. The pair of input arguments + /// may overlap with the pair of output arguments. It is safe to call + /// udivrem(X, Y, X, Y), for example. + static void udivrem(const APInt &LHS, const APInt &RHS, APInt &Quotient, + APInt &Remainder); + + static void sdivrem(const APInt &LHS, const APInt &RHS, APInt &Quotient, + APInt &Remainder); + + // Operations that return overflow indicators. + APInt sadd_ov(const APInt &RHS, bool &Overflow) const; + APInt uadd_ov(const APInt &RHS, bool &Overflow) const; + APInt ssub_ov(const APInt &RHS, bool &Overflow) const; + APInt usub_ov(const APInt &RHS, bool &Overflow) const; + APInt sdiv_ov(const APInt &RHS, bool &Overflow) const; + APInt smul_ov(const APInt &RHS, bool &Overflow) const; + APInt umul_ov(const APInt &RHS, bool &Overflow) const; + APInt sshl_ov(const APInt &Amt, bool &Overflow) const; + APInt ushl_ov(const APInt &Amt, bool &Overflow) const; + + /// \brief Array-indexing support. + /// + /// \returns the bit value at bitPosition + bool operator[](unsigned bitPosition) const { + assert(bitPosition < getBitWidth() && "Bit position out of bounds!"); + return (maskBit(bitPosition) & + (isSingleWord() ? VAL : pVal[whichWord(bitPosition)])) != + 0; + } + + /// @} + /// \name Comparison Operators + /// @{ + + /// \brief Equality operator. + /// + /// Compares this APInt with RHS for the validity of the equality + /// relationship. + bool operator==(const APInt &RHS) const { + assert(BitWidth == RHS.BitWidth && "Comparison requires equal bit widths"); + if (isSingleWord()) + return VAL == RHS.VAL; + return EqualSlowCase(RHS); + } + + /// \brief Equality operator. + /// + /// Compares this APInt with a uint64_t for the validity of the equality + /// relationship. + /// + /// \returns true if *this == Val + bool operator==(uint64_t Val) const { + if (isSingleWord()) + return VAL == Val; + return EqualSlowCase(Val); + } + + /// \brief Equality comparison. + /// + /// Compares this APInt with RHS for the validity of the equality + /// relationship. + /// + /// \returns true if *this == Val + bool eq(const APInt &RHS) const { return (*this) == RHS; } + + /// \brief Inequality operator. + /// + /// Compares this APInt with RHS for the validity of the inequality + /// relationship. + /// + /// \returns true if *this != Val + bool operator!=(const APInt &RHS) const { return !((*this) == RHS); } + + /// \brief Inequality operator. + /// + /// Compares this APInt with a uint64_t for the validity of the inequality + /// relationship. + /// + /// \returns true if *this != Val + bool operator!=(uint64_t Val) const { return !((*this) == Val); } + + /// \brief Inequality comparison + /// + /// Compares this APInt with RHS for the validity of the inequality + /// relationship. + /// + /// \returns true if *this != Val + bool ne(const APInt &RHS) const { return !((*this) == RHS); } + + /// \brief Unsigned less than comparison + /// + /// Regards both *this and RHS as unsigned quantities and compares them for + /// the validity of the less-than relationship. + /// + /// \returns true if *this < RHS when both are considered unsigned. + bool ult(const APInt &RHS) const; + + /// \brief Unsigned less than comparison + /// + /// Regards both *this as an unsigned quantity and compares it with RHS for + /// the validity of the less-than relationship. + /// + /// \returns true if *this < RHS when considered unsigned. + bool ult(uint64_t RHS) const { + return getActiveBits() > 64 ? false : getZExtValue() < RHS; + } + + /// \brief Signed less than comparison + /// + /// Regards both *this and RHS as signed quantities and compares them for + /// validity of the less-than relationship. + /// + /// \returns true if *this < RHS when both are considered signed. + bool slt(const APInt &RHS) const; + + /// \brief Signed less than comparison + /// + /// Regards both *this as a signed quantity and compares it with RHS for + /// the validity of the less-than relationship. + /// + /// \returns true if *this < RHS when considered signed. + bool slt(int64_t RHS) const { + return getMinSignedBits() > 64 ? isNegative() : getSExtValue() < RHS; + } + + /// \brief Unsigned less or equal comparison + /// + /// Regards both *this and RHS as unsigned quantities and compares them for + /// validity of the less-or-equal relationship. + /// + /// \returns true if *this <= RHS when both are considered unsigned. + bool ule(const APInt &RHS) const { return ult(RHS) || eq(RHS); } + + /// \brief Unsigned less or equal comparison + /// + /// Regards both *this as an unsigned quantity and compares it with RHS for + /// the validity of the less-or-equal relationship. + /// + /// \returns true if *this <= RHS when considered unsigned. + bool ule(uint64_t RHS) const { return !ugt(RHS); } + + /// \brief Signed less or equal comparison + /// + /// Regards both *this and RHS as signed quantities and compares them for + /// validity of the less-or-equal relationship. + /// + /// \returns true if *this <= RHS when both are considered signed. + bool sle(const APInt &RHS) const { return slt(RHS) || eq(RHS); } + + /// \brief Signed less or equal comparison + /// + /// Regards both *this as a signed quantity and compares it with RHS for the + /// validity of the less-or-equal relationship. + /// + /// \returns true if *this <= RHS when considered signed. + bool sle(uint64_t RHS) const { return !sgt(RHS); } + + /// \brief Unsigned greather than comparison + /// + /// Regards both *this and RHS as unsigned quantities and compares them for + /// the validity of the greater-than relationship. + /// + /// \returns true if *this > RHS when both are considered unsigned. + bool ugt(const APInt &RHS) const { return !ult(RHS) && !eq(RHS); } + + /// \brief Unsigned greater than comparison + /// + /// Regards both *this as an unsigned quantity and compares it with RHS for + /// the validity of the greater-than relationship. + /// + /// \returns true if *this > RHS when considered unsigned. + bool ugt(uint64_t RHS) const { + return getActiveBits() > 64 ? true : getZExtValue() > RHS; + } + + /// \brief Signed greather than comparison + /// + /// Regards both *this and RHS as signed quantities and compares them for the + /// validity of the greater-than relationship. + /// + /// \returns true if *this > RHS when both are considered signed. + bool sgt(const APInt &RHS) const { return !slt(RHS) && !eq(RHS); } + + /// \brief Signed greater than comparison + /// + /// Regards both *this as a signed quantity and compares it with RHS for + /// the validity of the greater-than relationship. + /// + /// \returns true if *this > RHS when considered signed. + bool sgt(int64_t RHS) const { + return getMinSignedBits() > 64 ? !isNegative() : getSExtValue() > RHS; + } + + /// \brief Unsigned greater or equal comparison + /// + /// Regards both *this and RHS as unsigned quantities and compares them for + /// validity of the greater-or-equal relationship. + /// + /// \returns true if *this >= RHS when both are considered unsigned. + bool uge(const APInt &RHS) const { return !ult(RHS); } + + /// \brief Unsigned greater or equal comparison + /// + /// Regards both *this as an unsigned quantity and compares it with RHS for + /// the validity of the greater-or-equal relationship. + /// + /// \returns true if *this >= RHS when considered unsigned. + bool uge(uint64_t RHS) const { return !ult(RHS); } + + /// \brief Signed greather or equal comparison + /// + /// Regards both *this and RHS as signed quantities and compares them for + /// validity of the greater-or-equal relationship. + /// + /// \returns true if *this >= RHS when both are considered signed. + bool sge(const APInt &RHS) const { return !slt(RHS); } + + /// \brief Signed greater or equal comparison + /// + /// Regards both *this as a signed quantity and compares it with RHS for + /// the validity of the greater-or-equal relationship. + /// + /// \returns true if *this >= RHS when considered signed. + bool sge(int64_t RHS) const { return !slt(RHS); } + + /// This operation tests if there are any pairs of corresponding bits + /// between this APInt and RHS that are both set. + bool intersects(const APInt &RHS) const { return (*this & RHS) != 0; } + + /// @} + /// \name Resizing Operators + /// @{ + + /// \brief Truncate to new width. + /// + /// Truncate the APInt to a specified width. It is an error to specify a width + /// that is greater than or equal to the current width. + APInt LLVM_ATTRIBUTE_UNUSED_RESULT trunc(unsigned width) const; + + /// \brief Sign extend to a new width. + /// + /// This operation sign extends the APInt to a new width. If the high order + /// bit is set, the fill on the left will be done with 1 bits, otherwise zero. + /// It is an error to specify a width that is less than or equal to the + /// current width. + APInt LLVM_ATTRIBUTE_UNUSED_RESULT sext(unsigned width) const; + + /// \brief Zero extend to a new width. + /// + /// This operation zero extends the APInt to a new width. The high order bits + /// are filled with 0 bits. It is an error to specify a width that is less + /// than or equal to the current width. + APInt LLVM_ATTRIBUTE_UNUSED_RESULT zext(unsigned width) const; + + /// \brief Sign extend or truncate to width + /// + /// Make this APInt have the bit width given by \p width. The value is sign + /// extended, truncated, or left alone to make it that width. + APInt LLVM_ATTRIBUTE_UNUSED_RESULT sextOrTrunc(unsigned width) const; + + /// \brief Zero extend or truncate to width + /// + /// Make this APInt have the bit width given by \p width. The value is zero + /// extended, truncated, or left alone to make it that width. + APInt LLVM_ATTRIBUTE_UNUSED_RESULT zextOrTrunc(unsigned width) const; + + /// \brief Sign extend or truncate to width + /// + /// Make this APInt have the bit width given by \p width. The value is sign + /// extended, or left alone to make it that width. + APInt LLVM_ATTRIBUTE_UNUSED_RESULT sextOrSelf(unsigned width) const; + + /// \brief Zero extend or truncate to width + /// + /// Make this APInt have the bit width given by \p width. The value is zero + /// extended, or left alone to make it that width. + APInt LLVM_ATTRIBUTE_UNUSED_RESULT zextOrSelf(unsigned width) const; + + /// @} + /// \name Bit Manipulation Operators + /// @{ + + /// \brief Set every bit to 1. + void setAllBits() { + if (isSingleWord()) + VAL = UINT64_MAX; + else { + // Set all the bits in all the words. + for (unsigned i = 0; i < getNumWords(); ++i) + pVal[i] = UINT64_MAX; + } + // Clear the unused ones + clearUnusedBits(); + } + + /// \brief Set a given bit to 1. + /// + /// Set the given bit to 1 whose position is given as "bitPosition". + void setBit(unsigned bitPosition); + + /// \brief Set every bit to 0. + void clearAllBits() { + if (isSingleWord()) + VAL = 0; + else + memset(pVal, 0, getNumWords() * APINT_WORD_SIZE); + } + + /// \brief Set a given bit to 0. + /// + /// Set the given bit to 0 whose position is given as "bitPosition". + void clearBit(unsigned bitPosition); + + /// \brief Toggle every bit to its opposite value. + void flipAllBits() { + if (isSingleWord()) + VAL ^= UINT64_MAX; + else { + for (unsigned i = 0; i < getNumWords(); ++i) + pVal[i] ^= UINT64_MAX; + } + clearUnusedBits(); + } + + /// \brief Toggles a given bit to its opposite value. + /// + /// Toggle a given bit to its opposite value whose position is given + /// as "bitPosition". + void flipBit(unsigned bitPosition); + + /// @} + /// \name Value Characterization Functions + /// @{ + + /// \brief Return the number of bits in the APInt. + unsigned getBitWidth() const { return BitWidth; } + + /// \brief Get the number of words. + /// + /// Here one word's bitwidth equals to that of uint64_t. + /// + /// \returns the number of words to hold the integer value of this APInt. + unsigned getNumWords() const { return getNumWords(BitWidth); } + + /// \brief Get the number of words. + /// + /// *NOTE* Here one word's bitwidth equals to that of uint64_t. + /// + /// \returns the number of words to hold the integer value with a given bit + /// width. + static unsigned getNumWords(unsigned BitWidth) { + return ((uint64_t)BitWidth + APINT_BITS_PER_WORD - 1) / APINT_BITS_PER_WORD; + } + + /// \brief Compute the number of active bits in the value + /// + /// This function returns the number of active bits which is defined as the + /// bit width minus the number of leading zeros. This is used in several + /// computations to see how "wide" the value is. + unsigned getActiveBits() const { return BitWidth - countLeadingZeros(); } + + /// \brief Compute the number of active words in the value of this APInt. + /// + /// This is used in conjunction with getActiveData to extract the raw value of + /// the APInt. + unsigned getActiveWords() const { + unsigned numActiveBits = getActiveBits(); + return numActiveBits ? whichWord(numActiveBits - 1) + 1 : 1; + } + + /// \brief Get the minimum bit size for this signed APInt + /// + /// Computes the minimum bit width for this APInt while considering it to be a + /// signed (and probably negative) value. If the value is not negative, this + /// function returns the same value as getActiveBits()+1. Otherwise, it + /// returns the smallest bit width that will retain the negative value. For + /// example, -1 can be written as 0b1 or 0xFFFFFFFFFF. 0b1 is shorter and so + /// for -1, this function will always return 1. + unsigned getMinSignedBits() const { + if (isNegative()) + return BitWidth - countLeadingOnes() + 1; + return getActiveBits() + 1; + } + + /// \brief Get zero extended value + /// + /// This method attempts to return the value of this APInt as a zero extended + /// uint64_t. The bitwidth must be <= 64 or the value must fit within a + /// uint64_t. Otherwise an assertion will result. + uint64_t getZExtValue() const { + if (isSingleWord()) + return VAL; + assert(getActiveBits() <= 64 && "Too many bits for uint64_t"); + return pVal[0]; + } + + /// \brief Get sign extended value + /// + /// This method attempts to return the value of this APInt as a sign extended + /// int64_t. The bit width must be <= 64 or the value must fit within an + /// int64_t. Otherwise an assertion will result. + int64_t getSExtValue() const { + if (isSingleWord()) + return int64_t(VAL << (APINT_BITS_PER_WORD - BitWidth)) >> + (APINT_BITS_PER_WORD - BitWidth); + assert(getMinSignedBits() <= 64 && "Too many bits for int64_t"); + return int64_t(pVal[0]); + } + + /// \brief Get bits required for string value. + /// + /// This method determines how many bits are required to hold the APInt + /// equivalent of the string given by \p str. + static unsigned getBitsNeeded(StringRef str, uint8_t radix); + + /// \brief The APInt version of the countLeadingZeros functions in + /// MathExtras.h. + /// + /// It counts the number of zeros from the most significant bit to the first + /// one bit. + /// + /// \returns BitWidth if the value is zero, otherwise returns the number of + /// zeros from the most significant bit to the first one bits. + unsigned countLeadingZeros() const { + if (isSingleWord()) { + unsigned unusedBits = APINT_BITS_PER_WORD - BitWidth; + return llvm_ks::countLeadingZeros(VAL) - unusedBits; + } + return countLeadingZerosSlowCase(); + } + + /// \brief Count the number of leading one bits. + /// + /// This function is an APInt version of the countLeadingOnes + /// functions in MathExtras.h. It counts the number of ones from the most + /// significant bit to the first zero bit. + /// + /// \returns 0 if the high order bit is not set, otherwise returns the number + /// of 1 bits from the most significant to the least + unsigned countLeadingOnes() const; + + /// Computes the number of leading bits of this APInt that are equal to its + /// sign bit. + unsigned getNumSignBits() const { + return isNegative() ? countLeadingOnes() : countLeadingZeros(); + } + + /// \brief Count the number of trailing zero bits. + /// + /// This function is an APInt version of the countTrailingZeros + /// functions in MathExtras.h. It counts the number of zeros from the least + /// significant bit to the first set bit. + /// + /// \returns BitWidth if the value is zero, otherwise returns the number of + /// zeros from the least significant bit to the first one bit. + unsigned countTrailingZeros() const; + + /// \brief Count the number of trailing one bits. + /// + /// This function is an APInt version of the countTrailingOnes + /// functions in MathExtras.h. It counts the number of ones from the least + /// significant bit to the first zero bit. + /// + /// \returns BitWidth if the value is all ones, otherwise returns the number + /// of ones from the least significant bit to the first zero bit. + unsigned countTrailingOnes() const { + if (isSingleWord()) + return llvm_ks::countTrailingOnes(VAL); + return countTrailingOnesSlowCase(); + } + + /// \brief Count the number of bits set. + /// + /// This function is an APInt version of the countPopulation functions + /// in MathExtras.h. It counts the number of 1 bits in the APInt value. + /// + /// \returns 0 if the value is zero, otherwise returns the number of set bits. + unsigned countPopulation() const { + if (isSingleWord()) + return llvm_ks::countPopulation(VAL); + return countPopulationSlowCase(); + } + + /// @} + /// \name Conversion Functions + /// @{ + void print(raw_ostream &OS, bool isSigned) const; + + /// Converts an APInt to a string and append it to Str. Str is commonly a + /// SmallString. + void toString(SmallVectorImpl &Str, unsigned Radix, bool Signed, + bool formatAsCLiteral = false) const; + + /// Considers the APInt to be unsigned and converts it into a string in the + /// radix given. The radix can be 2, 8, 10 16, or 36. + void toStringUnsigned(SmallVectorImpl &Str, unsigned Radix = 10) const { + toString(Str, Radix, false, false); + } + + /// Considers the APInt to be signed and converts it into a string in the + /// radix given. The radix can be 2, 8, 10, 16, or 36. + void toStringSigned(SmallVectorImpl &Str, unsigned Radix = 10) const { + toString(Str, Radix, true, false); + } + + /// \brief Return the APInt as a std::string. + /// + /// Note that this is an inefficient method. It is better to pass in a + /// SmallVector/SmallString to the methods above to avoid thrashing the heap + /// for the string. + std::string toString(unsigned Radix, bool Signed) const; + + /// \returns a byte-swapped representation of this APInt Value. + APInt LLVM_ATTRIBUTE_UNUSED_RESULT byteSwap() const; + + /// \brief Converts this APInt to a double value. + double roundToDouble(bool isSigned) const; + + /// \brief Converts this unsigned APInt to a double value. + double roundToDouble() const { return roundToDouble(false); } + + /// \brief Converts this signed APInt to a double value. + double signedRoundToDouble() const { return roundToDouble(true); } + + /// \brief Converts APInt bits to a double + /// + /// The conversion does not do a translation from integer to double, it just + /// re-interprets the bits as a double. Note that it is valid to do this on + /// any bit width. Exactly 64 bits will be translated. + double bitsToDouble() const { + union { + uint64_t I; + double D; + } T; + T.I = (isSingleWord() ? VAL : pVal[0]); + return T.D; + } + + /// \brief Converts APInt bits to a double + /// + /// The conversion does not do a translation from integer to float, it just + /// re-interprets the bits as a float. Note that it is valid to do this on + /// any bit width. Exactly 32 bits will be translated. + float bitsToFloat() const { + union { + unsigned I; + float F; + } T; + T.I = unsigned((isSingleWord() ? VAL : pVal[0])); + return T.F; + } + + /// \brief Converts a double to APInt bits. + /// + /// The conversion does not do a translation from double to integer, it just + /// re-interprets the bits of the double. + static APInt LLVM_ATTRIBUTE_UNUSED_RESULT doubleToBits(double V) { + union { + uint64_t I; + double D; + } T; + T.D = V; + return APInt(sizeof T * CHAR_BIT, T.I); + } + + /// \brief Converts a float to APInt bits. + /// + /// The conversion does not do a translation from float to integer, it just + /// re-interprets the bits of the float. + static APInt LLVM_ATTRIBUTE_UNUSED_RESULT floatToBits(float V) { + union { + unsigned I; + float F; + } T; + T.F = V; + return APInt(sizeof T * CHAR_BIT, T.I); + } + + /// @} + /// \name Mathematics Operations + /// @{ + + /// \returns the floor log base 2 of this APInt. + unsigned logBase2() const { return BitWidth - 1 - countLeadingZeros(); } + + /// \returns the ceil log base 2 of this APInt. + unsigned ceilLogBase2() const { + return BitWidth - (*this - 1).countLeadingZeros(); + } + + /// \returns the nearest log base 2 of this APInt. Ties round up. + /// + /// NOTE: When we have a BitWidth of 1, we define: + /// + /// log2(0) = UINT32_MAX + /// log2(1) = 0 + /// + /// to get around any mathematical concerns resulting from + /// referencing 2 in a space where 2 does no exist. + unsigned nearestLogBase2() const { + // Special case when we have a bitwidth of 1. If VAL is 1, then we + // get 0. If VAL is 0, we get UINT64_MAX which gets truncated to + // UINT32_MAX. + if (BitWidth == 1) + return VAL - 1; + + // Handle the zero case. + if (!getBoolValue()) + return UINT32_MAX; + + // The non-zero case is handled by computing: + // + // nearestLogBase2(x) = logBase2(x) + x[logBase2(x)-1]. + // + // where x[i] is referring to the value of the ith bit of x. + unsigned lg = logBase2(); + return lg + unsigned((*this)[lg - 1]); + } + + /// \returns the log base 2 of this APInt if its an exact power of two, -1 + /// otherwise + int32_t exactLogBase2() const { + if (!isPowerOf2()) + return -1; + return logBase2(); + } + + /// \brief Compute the square root + APInt LLVM_ATTRIBUTE_UNUSED_RESULT sqrt() const; + + /// \brief Get the absolute value; + /// + /// If *this is < 0 then return -(*this), otherwise *this; + APInt LLVM_ATTRIBUTE_UNUSED_RESULT abs() const { + if (isNegative()) + return -(*this); + return *this; + } + + /// \returns the multiplicative inverse for a given modulo. + APInt multiplicativeInverse(const APInt &modulo) const; + + /// @} + /// \name Support for division by constant + /// @{ + + /// Calculate the magic number for signed division by a constant. + struct ms; + ms magic() const; + + /// Calculate the magic number for unsigned division by a constant. + struct mu; + mu magicu(unsigned LeadingZeros = 0) const; + + /// @} + /// \name Building-block Operations for APInt and APFloat + /// @{ + + // These building block operations operate on a representation of arbitrary + // precision, two's-complement, bignum integer values. They should be + // sufficient to implement APInt and APFloat bignum requirements. Inputs are + // generally a pointer to the base of an array of integer parts, representing + // an unsigned bignum, and a count of how many parts there are. + + /// Sets the least significant part of a bignum to the input value, and zeroes + /// out higher parts. + static void tcSet(integerPart *, integerPart, unsigned int); + + /// Assign one bignum to another. + static void tcAssign(integerPart *, const integerPart *, unsigned int); + + /// Returns true if a bignum is zero, false otherwise. + static bool tcIsZero(const integerPart *, unsigned int); + + /// Extract the given bit of a bignum; returns 0 or 1. Zero-based. + static int tcExtractBit(const integerPart *, unsigned int bit); + + /// Copy the bit vector of width srcBITS from SRC, starting at bit srcLSB, to + /// DST, of dstCOUNT parts, such that the bit srcLSB becomes the least + /// significant bit of DST. All high bits above srcBITS in DST are + /// zero-filled. + static void tcExtract(integerPart *, unsigned int dstCount, + const integerPart *, unsigned int srcBits, + unsigned int srcLSB); + + /// Set the given bit of a bignum. Zero-based. + static void tcSetBit(integerPart *, unsigned int bit); + + /// Clear the given bit of a bignum. Zero-based. + static void tcClearBit(integerPart *, unsigned int bit); + + /// Returns the bit number of the least or most significant set bit of a + /// number. If the input number has no bits set -1U is returned. + static unsigned int tcLSB(const integerPart *, unsigned int); + static unsigned int tcMSB(const integerPart *parts, unsigned int n); + + /// Negate a bignum in-place. + static void tcNegate(integerPart *, unsigned int); + + /// DST += RHS + CARRY where CARRY is zero or one. Returns the carry flag. + static integerPart tcAdd(integerPart *, const integerPart *, + integerPart carry, unsigned); + + /// DST -= RHS + CARRY where CARRY is zero or one. Returns the carry flag. + static integerPart tcSubtract(integerPart *, const integerPart *, + integerPart carry, unsigned); + + /// DST += SRC * MULTIPLIER + PART if add is true + /// DST = SRC * MULTIPLIER + PART if add is false + /// + /// Requires 0 <= DSTPARTS <= SRCPARTS + 1. If DST overlaps SRC they must + /// start at the same point, i.e. DST == SRC. + /// + /// If DSTPARTS == SRC_PARTS + 1 no overflow occurs and zero is returned. + /// Otherwise DST is filled with the least significant DSTPARTS parts of the + /// result, and if all of the omitted higher parts were zero return zero, + /// otherwise overflow occurred and return one. + static int tcMultiplyPart(integerPart *dst, const integerPart *src, + integerPart multiplier, integerPart carry, + unsigned int srcParts, unsigned int dstParts, + bool add); + + /// DST = LHS * RHS, where DST has the same width as the operands and is + /// filled with the least significant parts of the result. Returns one if + /// overflow occurred, otherwise zero. DST must be disjoint from both + /// operands. + static int tcMultiply(integerPart *, const integerPart *, const integerPart *, + unsigned); + + /// DST = LHS * RHS, where DST has width the sum of the widths of the + /// operands. No overflow occurs. DST must be disjoint from both + /// operands. Returns the number of parts required to hold the result. + static unsigned int tcFullMultiply(integerPart *, const integerPart *, + const integerPart *, unsigned, unsigned); + + /// If RHS is zero LHS and REMAINDER are left unchanged, return one. + /// Otherwise set LHS to LHS / RHS with the fractional part discarded, set + /// REMAINDER to the remainder, return zero. i.e. + /// + /// OLD_LHS = RHS * LHS + REMAINDER + /// + /// SCRATCH is a bignum of the same size as the operands and result for use by + /// the routine; its contents need not be initialized and are destroyed. LHS, + /// REMAINDER and SCRATCH must be distinct. + static int tcDivide(integerPart *lhs, const integerPart *rhs, + integerPart *remainder, integerPart *scratch, + unsigned int parts); + + /// Shift a bignum left COUNT bits. Shifted in bits are zero. There are no + /// restrictions on COUNT. + static void tcShiftLeft(integerPart *, unsigned int parts, + unsigned int count); + + /// Shift a bignum right COUNT bits. Shifted in bits are zero. There are no + /// restrictions on COUNT. + static void tcShiftRight(integerPart *, unsigned int parts, + unsigned int count); + + /// The obvious AND, OR and XOR and complement operations. + static void tcAnd(integerPart *, const integerPart *, unsigned int); + static void tcOr(integerPart *, const integerPart *, unsigned int); + static void tcXor(integerPart *, const integerPart *, unsigned int); + static void tcComplement(integerPart *, unsigned int); + + /// Comparison (unsigned) of two bignums. + static int tcCompare(const integerPart *, const integerPart *, unsigned int); + + /// Increment a bignum in-place. Return the carry flag. + static integerPart tcIncrement(integerPart *, unsigned int); + + /// Decrement a bignum in-place. Return the borrow flag. + static integerPart tcDecrement(integerPart *, unsigned int); + + /// Set the least significant BITS and clear the rest. + static void tcSetLeastSignificantBits(integerPart *, unsigned int, + unsigned int bits); + + /// \brief debug method + void dump() const; + + /// @} +}; + +/// Magic data for optimising signed division by a constant. +struct APInt::ms { + APInt m; ///< magic number + unsigned s; ///< shift amount +}; + +/// Magic data for optimising unsigned division by a constant. +struct APInt::mu { + APInt m; ///< magic number + bool a; ///< add indicator + unsigned s; ///< shift amount +}; + +inline bool operator==(uint64_t V1, const APInt &V2) { return V2 == V1; } + +inline bool operator!=(uint64_t V1, const APInt &V2) { return V2 != V1; } + +inline raw_ostream &operator<<(raw_ostream &OS, const APInt &I) { + I.print(OS, true); + return OS; +} + +namespace APIntOps { + +/// \brief Determine the smaller of two APInts considered to be signed. +inline APInt smin(const APInt &A, const APInt &B) { return A.slt(B) ? A : B; } + +/// \brief Determine the larger of two APInts considered to be signed. +inline APInt smax(const APInt &A, const APInt &B) { return A.sgt(B) ? A : B; } + +/// \brief Determine the smaller of two APInts considered to be signed. +inline APInt umin(const APInt &A, const APInt &B) { return A.ult(B) ? A : B; } + +/// \brief Determine the larger of two APInts considered to be unsigned. +inline APInt umax(const APInt &A, const APInt &B) { return A.ugt(B) ? A : B; } + +/// \brief Check if the specified APInt has a N-bits unsigned integer value. +inline bool isIntN(unsigned N, const APInt &APIVal) { return APIVal.isIntN(N); } + +/// \brief Check if the specified APInt has a N-bits signed integer value. +inline bool isSignedIntN(unsigned N, const APInt &APIVal) { + return APIVal.isSignedIntN(N); +} + +/// \returns true if the argument APInt value is a sequence of ones starting at +/// the least significant bit with the remainder zero. +inline bool isMask(unsigned numBits, const APInt &APIVal) { + return numBits <= APIVal.getBitWidth() && + APIVal == APInt::getLowBitsSet(APIVal.getBitWidth(), numBits); +} + +/// \brief Return true if the argument APInt value contains a sequence of ones +/// with the remainder zero. +inline bool isShiftedMask(unsigned numBits, const APInt &APIVal) { + return isMask(numBits, (APIVal - APInt(numBits, 1)) | APIVal); +} + +/// \brief Returns a byte-swapped representation of the specified APInt Value. +inline APInt byteSwap(const APInt &APIVal) { return APIVal.byteSwap(); } + +/// \brief Returns the floor log base 2 of the specified APInt value. +inline unsigned logBase2(const APInt &APIVal) { return APIVal.logBase2(); } + +/// \brief Compute GCD of two APInt values. +/// +/// This function returns the greatest common divisor of the two APInt values +/// using Euclid's algorithm. +/// +/// \returns the greatest common divisor of Val1 and Val2 +APInt GreatestCommonDivisor(const APInt &Val1, const APInt &Val2); + +/// \brief Converts the given APInt to a double value. +/// +/// Treats the APInt as an unsigned value for conversion purposes. +inline double RoundAPIntToDouble(const APInt &APIVal) { + return APIVal.roundToDouble(); +} + +/// \brief Converts the given APInt to a double value. +/// +/// Treats the APInt as a signed value for conversion purposes. +inline double RoundSignedAPIntToDouble(const APInt &APIVal) { + return APIVal.signedRoundToDouble(); +} + +/// \brief Converts the given APInt to a float vlalue. +inline float RoundAPIntToFloat(const APInt &APIVal) { + return float(RoundAPIntToDouble(APIVal)); +} + +/// \brief Converts the given APInt to a float value. +/// +/// Treast the APInt as a signed value for conversion purposes. +inline float RoundSignedAPIntToFloat(const APInt &APIVal) { + return float(APIVal.signedRoundToDouble()); +} + +/// \brief Converts the given double value into a APInt. +/// +/// This function convert a double value to an APInt value. +APInt RoundDoubleToAPInt(double Double, unsigned width); + +/// \brief Converts a float value into a APInt. +/// +/// Converts a float value into an APInt value. +inline APInt RoundFloatToAPInt(float Float, unsigned width) { + return RoundDoubleToAPInt(double(Float), width); +} + +/// \brief Arithmetic right-shift function. +/// +/// Arithmetic right-shift the APInt by shiftAmt. +inline APInt ashr(const APInt &LHS, unsigned shiftAmt) { + return LHS.ashr(shiftAmt); +} + +/// \brief Logical right-shift function. +/// +/// Logical right-shift the APInt by shiftAmt. +inline APInt lshr(const APInt &LHS, unsigned shiftAmt) { + return LHS.lshr(shiftAmt); +} + +/// \brief Left-shift function. +/// +/// Left-shift the APInt by shiftAmt. +inline APInt shl(const APInt &LHS, unsigned shiftAmt) { + return LHS.shl(shiftAmt); +} + +/// \brief Signed division function for APInt. +/// +/// Signed divide APInt LHS by APInt RHS. +inline APInt sdiv(const APInt &LHS, const APInt &RHS) { return LHS.sdiv(RHS); } + +/// \brief Unsigned division function for APInt. +/// +/// Unsigned divide APInt LHS by APInt RHS. +inline APInt udiv(const APInt &LHS, const APInt &RHS) { return LHS.udiv(RHS); } + +/// \brief Function for signed remainder operation. +/// +/// Signed remainder operation on APInt. +inline APInt srem(const APInt &LHS, const APInt &RHS) { return LHS.srem(RHS); } + +/// \brief Function for unsigned remainder operation. +/// +/// Unsigned remainder operation on APInt. +inline APInt urem(const APInt &LHS, const APInt &RHS) { return LHS.urem(RHS); } + +/// \brief Function for multiplication operation. +/// +/// Performs multiplication on APInt values. +inline APInt mul(const APInt &LHS, const APInt &RHS) { return LHS * RHS; } + +/// \brief Function for addition operation. +/// +/// Performs addition on APInt values. +inline APInt add(const APInt &LHS, const APInt &RHS) { return LHS + RHS; } + +/// \brief Function for subtraction operation. +/// +/// Performs subtraction on APInt values. +inline APInt sub(const APInt &LHS, const APInt &RHS) { return LHS - RHS; } + +/// \brief Bitwise AND function for APInt. +/// +/// Performs bitwise AND operation on APInt LHS and +/// APInt RHS. +inline APInt And(const APInt &LHS, const APInt &RHS) { return LHS & RHS; } + +/// \brief Bitwise OR function for APInt. +/// +/// Performs bitwise OR operation on APInt LHS and APInt RHS. +inline APInt Or(const APInt &LHS, const APInt &RHS) { return LHS | RHS; } + +/// \brief Bitwise XOR function for APInt. +/// +/// Performs bitwise XOR operation on APInt. +inline APInt Xor(const APInt &LHS, const APInt &RHS) { return LHS ^ RHS; } + +/// \brief Bitwise complement function. +/// +/// Performs a bitwise complement operation on APInt. +inline APInt Not(const APInt &APIVal) { return ~APIVal; } + +} // End of APIntOps namespace + +// See friend declaration above. This additional declaration is required in +// order to compile LLVM with IBM xlC compiler. +hash_code hash_value(const APInt &Arg); +} // End of llvm namespace + +#endif diff --git a/llvm/include/llvm/ADT/APSInt.h b/llvm/include/llvm/ADT/APSInt.h new file mode 100644 index 0000000..f4ca41d --- /dev/null +++ b/llvm/include/llvm/ADT/APSInt.h @@ -0,0 +1,342 @@ +//===-- llvm/ADT/APSInt.h - Arbitrary Precision Signed Int -----*- C++ -*--===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the APSInt class, which is a simple class that +// represents an arbitrary sized integer that knows its signedness. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_APSINT_H +#define LLVM_ADT_APSINT_H + +#include "llvm/ADT/APInt.h" + +namespace llvm_ks { + +class APSInt : public APInt { + bool IsUnsigned; + +public: + /// Default constructor that creates an uninitialized APInt. + explicit APSInt() : IsUnsigned(false) {} + + /// APSInt ctor - Create an APSInt with the specified width, default to + /// unsigned. + explicit APSInt(uint32_t BitWidth, bool isUnsigned = true) + : APInt(BitWidth, 0), IsUnsigned(isUnsigned) {} + + explicit APSInt(APInt I, bool isUnsigned = true) + : APInt(std::move(I)), IsUnsigned(isUnsigned) {} + + /// Construct an APSInt from a string representation. + /// + /// This constructor interprets the string \p Str using the radix of 10. + /// The interpretation stops at the end of the string. The bit width of the + /// constructed APSInt is determined automatically. + /// + /// \param Str the string to be interpreted. + explicit APSInt(StringRef Str); + + APSInt &operator=(APInt RHS) { + // Retain our current sign. + APInt::operator=(std::move(RHS)); + return *this; + } + + APSInt &operator=(uint64_t RHS) { + // Retain our current sign. + APInt::operator=(RHS); + return *this; + } + + // Query sign information. + bool isSigned() const { return !IsUnsigned; } + bool isUnsigned() const { return IsUnsigned; } + void setIsUnsigned(bool Val) { IsUnsigned = Val; } + void setIsSigned(bool Val) { IsUnsigned = !Val; } + + /// toString - Append this APSInt to the specified SmallString. + void toString(SmallVectorImpl &Str, unsigned Radix = 10) const { + APInt::toString(Str, Radix, isSigned()); + } + /// toString - Converts an APInt to a std::string. This is an inefficient + /// method; you should prefer passing in a SmallString instead. + std::string toString(unsigned Radix) const { + return APInt::toString(Radix, isSigned()); + } + using APInt::toString; + + /// \brief Get the correctly-extended \c int64_t value. + int64_t getExtValue() const { + assert(getMinSignedBits() <= 64 && "Too many bits for int64_t"); + return isSigned() ? getSExtValue() : getZExtValue(); + } + + APSInt LLVM_ATTRIBUTE_UNUSED_RESULT trunc(uint32_t width) const { + return APSInt(APInt::trunc(width), IsUnsigned); + } + + APSInt LLVM_ATTRIBUTE_UNUSED_RESULT extend(uint32_t width) const { + if (IsUnsigned) + return APSInt(zext(width), IsUnsigned); + else + return APSInt(sext(width), IsUnsigned); + } + + APSInt LLVM_ATTRIBUTE_UNUSED_RESULT extOrTrunc(uint32_t width) const { + if (IsUnsigned) + return APSInt(zextOrTrunc(width), IsUnsigned); + else + return APSInt(sextOrTrunc(width), IsUnsigned); + } + + const APSInt &operator%=(const APSInt &RHS) { + assert(IsUnsigned == RHS.IsUnsigned && "Signedness mismatch!"); + if (IsUnsigned) + *this = urem(RHS); + else + *this = srem(RHS); + return *this; + } + const APSInt &operator/=(const APSInt &RHS) { + assert(IsUnsigned == RHS.IsUnsigned && "Signedness mismatch!"); + if (IsUnsigned) + *this = udiv(RHS); + else + *this = sdiv(RHS); + return *this; + } + APSInt operator%(const APSInt &RHS) const { + assert(IsUnsigned == RHS.IsUnsigned && "Signedness mismatch!"); + return IsUnsigned ? APSInt(urem(RHS), true) : APSInt(srem(RHS), false); + } + APSInt operator/(const APSInt &RHS) const { + assert(IsUnsigned == RHS.IsUnsigned && "Signedness mismatch!"); + return IsUnsigned ? APSInt(udiv(RHS), true) : APSInt(sdiv(RHS), false); + } + + APSInt operator>>(unsigned Amt) const { + return IsUnsigned ? APSInt(lshr(Amt), true) : APSInt(ashr(Amt), false); + } + APSInt& operator>>=(unsigned Amt) { + *this = *this >> Amt; + return *this; + } + + inline bool operator<(const APSInt& RHS) const { + assert(IsUnsigned == RHS.IsUnsigned && "Signedness mismatch!"); + return IsUnsigned ? ult(RHS) : slt(RHS); + } + inline bool operator>(const APSInt& RHS) const { + assert(IsUnsigned == RHS.IsUnsigned && "Signedness mismatch!"); + return IsUnsigned ? ugt(RHS) : sgt(RHS); + } + inline bool operator<=(const APSInt& RHS) const { + assert(IsUnsigned == RHS.IsUnsigned && "Signedness mismatch!"); + return IsUnsigned ? ule(RHS) : sle(RHS); + } + inline bool operator>=(const APSInt& RHS) const { + assert(IsUnsigned == RHS.IsUnsigned && "Signedness mismatch!"); + return IsUnsigned ? uge(RHS) : sge(RHS); + } + inline bool operator==(const APSInt& RHS) const { + assert(IsUnsigned == RHS.IsUnsigned && "Signedness mismatch!"); + return eq(RHS); + } + inline bool operator!=(const APSInt& RHS) const { + return !((*this) == RHS); + } + + bool operator==(int64_t RHS) const { + return compareValues(*this, get(RHS)) == 0; + } + bool operator!=(int64_t RHS) const { + return compareValues(*this, get(RHS)) != 0; + } + bool operator<=(int64_t RHS) const { + return compareValues(*this, get(RHS)) <= 0; + } + bool operator>=(int64_t RHS) const { + return compareValues(*this, get(RHS)) >= 0; + } + bool operator<(int64_t RHS) const { + return compareValues(*this, get(RHS)) < 0; + } + bool operator>(int64_t RHS) const { + return compareValues(*this, get(RHS)) > 0; + } + + // The remaining operators just wrap the logic of APInt, but retain the + // signedness information. + + APSInt operator<<(unsigned Bits) const { + return APSInt(static_cast(*this) << Bits, IsUnsigned); + } + APSInt& operator<<=(unsigned Amt) { + *this = *this << Amt; + return *this; + } + + APSInt& operator++() { + ++(static_cast(*this)); + return *this; + } + APSInt& operator--() { + --(static_cast(*this)); + return *this; + } + APSInt operator++(int) { + return APSInt(++static_cast(*this), IsUnsigned); + } + APSInt operator--(int) { + return APSInt(--static_cast(*this), IsUnsigned); + } + APSInt operator-() const { + return APSInt(-static_cast(*this), IsUnsigned); + } + APSInt& operator+=(const APSInt& RHS) { + assert(IsUnsigned == RHS.IsUnsigned && "Signedness mismatch!"); + static_cast(*this) += RHS; + return *this; + } + APSInt& operator-=(const APSInt& RHS) { + assert(IsUnsigned == RHS.IsUnsigned && "Signedness mismatch!"); + static_cast(*this) -= RHS; + return *this; + } + APSInt& operator*=(const APSInt& RHS) { + assert(IsUnsigned == RHS.IsUnsigned && "Signedness mismatch!"); + static_cast(*this) *= RHS; + return *this; + } + APSInt& operator&=(const APSInt& RHS) { + assert(IsUnsigned == RHS.IsUnsigned && "Signedness mismatch!"); + static_cast(*this) &= RHS; + return *this; + } + APSInt& operator|=(const APSInt& RHS) { + assert(IsUnsigned == RHS.IsUnsigned && "Signedness mismatch!"); + static_cast(*this) |= RHS; + return *this; + } + APSInt& operator^=(const APSInt& RHS) { + assert(IsUnsigned == RHS.IsUnsigned && "Signedness mismatch!"); + static_cast(*this) ^= RHS; + return *this; + } + + APSInt operator&(const APSInt& RHS) const { + assert(IsUnsigned == RHS.IsUnsigned && "Signedness mismatch!"); + return APSInt(static_cast(*this) & RHS, IsUnsigned); + } + APSInt LLVM_ATTRIBUTE_UNUSED_RESULT And(const APSInt& RHS) const { + return this->operator&(RHS); + } + + APSInt operator|(const APSInt& RHS) const { + assert(IsUnsigned == RHS.IsUnsigned && "Signedness mismatch!"); + return APSInt(static_cast(*this) | RHS, IsUnsigned); + } + APSInt LLVM_ATTRIBUTE_UNUSED_RESULT Or(const APSInt& RHS) const { + return this->operator|(RHS); + } + + APSInt operator^(const APSInt &RHS) const { + assert(IsUnsigned == RHS.IsUnsigned && "Signedness mismatch!"); + return APSInt(static_cast(*this) ^ RHS, IsUnsigned); + } + APSInt LLVM_ATTRIBUTE_UNUSED_RESULT Xor(const APSInt& RHS) const { + return this->operator^(RHS); + } + + APSInt operator*(const APSInt& RHS) const { + assert(IsUnsigned == RHS.IsUnsigned && "Signedness mismatch!"); + return APSInt(static_cast(*this) * RHS, IsUnsigned); + } + APSInt operator+(const APSInt& RHS) const { + assert(IsUnsigned == RHS.IsUnsigned && "Signedness mismatch!"); + return APSInt(static_cast(*this) + RHS, IsUnsigned); + } + APSInt operator-(const APSInt& RHS) const { + assert(IsUnsigned == RHS.IsUnsigned && "Signedness mismatch!"); + return APSInt(static_cast(*this) - RHS, IsUnsigned); + } + APSInt operator~() const { + return APSInt(~static_cast(*this), IsUnsigned); + } + + /// getMaxValue - Return the APSInt representing the maximum integer value + /// with the given bit width and signedness. + static APSInt getMaxValue(uint32_t numBits, bool Unsigned) { + return APSInt(Unsigned ? APInt::getMaxValue(numBits) + : APInt::getSignedMaxValue(numBits), Unsigned); + } + + /// getMinValue - Return the APSInt representing the minimum integer value + /// with the given bit width and signedness. + static APSInt getMinValue(uint32_t numBits, bool Unsigned) { + return APSInt(Unsigned ? APInt::getMinValue(numBits) + : APInt::getSignedMinValue(numBits), Unsigned); + } + + /// \brief Determine if two APSInts have the same value, zero- or + /// sign-extending as needed. + static bool isSameValue(const APSInt &I1, const APSInt &I2) { + return !compareValues(I1, I2); + } + + /// \brief Compare underlying values of two numbers. + static int compareValues(const APSInt &I1, const APSInt &I2) { + if (I1.getBitWidth() == I2.getBitWidth() && I1.isSigned() == I2.isSigned()) + return I1 == I2 ? 0 : I1 > I2 ? 1 : -1; + + // Check for a bit-width mismatch. + if (I1.getBitWidth() > I2.getBitWidth()) + return compareValues(I1, I2.extend(I1.getBitWidth())); + else if (I2.getBitWidth() > I1.getBitWidth()) + return compareValues(I1.extend(I2.getBitWidth()), I2); + + // We have a signedness mismatch. Check for negative values and do an + // unsigned compare if both are positive. + if (I1.isSigned()) { + assert(!I2.isSigned() && "Expected signed mismatch"); + if (I1.isNegative()) + return -1; + } else { + assert(I2.isSigned() && "Expected signed mismatch"); + if (I2.isNegative()) + return 1; + } + + return I1.eq(I2) ? 0 : I1.ugt(I2) ? 1 : -1; + } + + static APSInt get(int64_t X) { return APSInt(APInt(64, X), false); } + static APSInt getUnsigned(uint64_t X) { return APSInt(APInt(64, X), true); } + + /// Profile - Used to insert APSInt objects, or objects that contain APSInt + /// objects, into FoldingSets. + void Profile(FoldingSetNodeID& ID) const; +}; + +inline bool operator==(int64_t V1, const APSInt &V2) { return V2 == V1; } +inline bool operator!=(int64_t V1, const APSInt &V2) { return V2 != V1; } +inline bool operator<=(int64_t V1, const APSInt &V2) { return V2 >= V1; } +inline bool operator>=(int64_t V1, const APSInt &V2) { return V2 <= V1; } +inline bool operator<(int64_t V1, const APSInt &V2) { return V2 > V1; } +inline bool operator>(int64_t V1, const APSInt &V2) { return V2 < V1; } + +inline raw_ostream &operator<<(raw_ostream &OS, const APSInt &I) { + I.print(OS, I.isSigned()); + return OS; +} + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/ADT/ArrayRef.h b/llvm/include/llvm/ADT/ArrayRef.h new file mode 100644 index 0000000..1c706cc --- /dev/null +++ b/llvm/include/llvm/ADT/ArrayRef.h @@ -0,0 +1,384 @@ +//===--- ArrayRef.h - Array Reference Wrapper -------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_ARRAYREF_H +#define LLVM_ADT_ARRAYREF_H + +#include "llvm/ADT/Hashing.h" +#include "llvm/ADT/None.h" +#include "llvm/ADT/SmallVector.h" +#include + +namespace llvm_ks { + /// ArrayRef - Represent a constant reference to an array (0 or more elements + /// consecutively in memory), i.e. a start pointer and a length. It allows + /// various APIs to take consecutive elements easily and conveniently. + /// + /// This class does not own the underlying data, it is expected to be used in + /// situations where the data resides in some other buffer, whose lifetime + /// extends past that of the ArrayRef. For this reason, it is not in general + /// safe to store an ArrayRef. + /// + /// This is intended to be trivially copyable, so it should be passed by + /// value. + template + class ArrayRef { + public: + typedef const T *iterator; + typedef const T *const_iterator; + typedef size_t size_type; + + typedef std::reverse_iterator reverse_iterator; + + private: + /// The start of the array, in an external buffer. + const T *Data; + + /// The number of elements. + size_type Length; + + public: + /// @name Constructors + /// @{ + + /// Construct an empty ArrayRef. + /*implicit*/ ArrayRef() : Data(nullptr), Length(0) {} + + /// Construct an empty ArrayRef from None. + /*implicit*/ ArrayRef(NoneType) : Data(nullptr), Length(0) {} + + /// Construct an ArrayRef from a single element. + /*implicit*/ ArrayRef(const T &OneElt) + : Data(&OneElt), Length(1) {} + + /// Construct an ArrayRef from a pointer and length. + /*implicit*/ ArrayRef(const T *data, size_t length) + : Data(data), Length(length) {} + + /// Construct an ArrayRef from a range. + ArrayRef(const T *begin, const T *end) + : Data(begin), Length(end - begin) {} + + /// Construct an ArrayRef from a SmallVector. This is templated in order to + /// avoid instantiating SmallVectorTemplateCommon whenever we + /// copy-construct an ArrayRef. + template + /*implicit*/ ArrayRef(const SmallVectorTemplateCommon &Vec) + : Data(Vec.data()), Length(Vec.size()) { + } + + /// Construct an ArrayRef from a std::vector. + template + /*implicit*/ ArrayRef(const std::vector &Vec) + : Data(Vec.data()), Length(Vec.size()) {} + + /// Construct an ArrayRef from a C array. + template + /*implicit*/ LLVM_CONSTEXPR ArrayRef(const T (&Arr)[N]) + : Data(Arr), Length(N) {} + + /// Construct an ArrayRef from a std::initializer_list. + /*implicit*/ ArrayRef(const std::initializer_list &Vec) + : Data(Vec.begin() == Vec.end() ? (T*)nullptr : Vec.begin()), + Length(Vec.size()) {} + + /// Construct an ArrayRef from ArrayRef. This uses SFINAE to + /// ensure that only ArrayRefs of pointers can be converted. + template + ArrayRef( + const ArrayRef &A, + typename std::enable_if< + std::is_convertible::value>::type * = nullptr) + : Data(A.data()), Length(A.size()) {} + + /// Construct an ArrayRef from a SmallVector. This is + /// templated in order to avoid instantiating SmallVectorTemplateCommon + /// whenever we copy-construct an ArrayRef. + template + /*implicit*/ ArrayRef( + const SmallVectorTemplateCommon &Vec, + typename std::enable_if< + std::is_convertible::value>::type * = nullptr) + : Data(Vec.data()), Length(Vec.size()) { + } + + /// Construct an ArrayRef from std::vector. This uses SFINAE + /// to ensure that only vectors of pointers can be converted. + template + ArrayRef(const std::vector &Vec, + typename std::enable_if< + std::is_convertible::value>::type* = 0) + : Data(Vec.data()), Length(Vec.size()) {} + + /// @} + /// @name Simple Operations + /// @{ + + iterator begin() const { return Data; } + iterator end() const { return Data + Length; } + + reverse_iterator rbegin() const { return reverse_iterator(end()); } + reverse_iterator rend() const { return reverse_iterator(begin()); } + + /// empty - Check if the array is empty. + bool empty() const { return Length == 0; } + + const T *data() const { return Data; } + + /// size - Get the array size. + size_t size() const { return Length; } + + /// front - Get the first element. + const T &front() const { + assert(!empty()); + return Data[0]; + } + + /// back - Get the last element. + const T &back() const { + assert(!empty()); + return Data[Length-1]; + } + + // copy - Allocate copy in Allocator and return ArrayRef to it. + template ArrayRef copy(Allocator &A) { + T *Buff = A.template Allocate(Length); + std::uninitialized_copy(begin(), end(), Buff); + return ArrayRef(Buff, Length); + } + + /// equals - Check for element-wise equality. + bool equals(ArrayRef RHS) const { + if (Length != RHS.Length) + return false; + return std::equal(begin(), end(), RHS.begin()); + } + + /// slice(n) - Chop off the first N elements of the array. + ArrayRef slice(unsigned N) const { + assert(N <= size() && "Invalid specifier"); + return ArrayRef(data()+N, size()-N); + } + + /// slice(n, m) - Chop off the first N elements of the array, and keep M + /// elements in the array. + ArrayRef slice(unsigned N, unsigned M) const { + assert(N+M <= size() && "Invalid specifier"); + return ArrayRef(data()+N, M); + } + + // \brief Drop the last \p N elements of the array. + ArrayRef drop_back(unsigned N = 1) const { + assert(size() >= N && "Dropping more elements than exist"); + return slice(0, size() - N); + } + + /// @} + /// @name Operator Overloads + /// @{ + const T &operator[](size_t Index) const { + assert(Index < Length && "Invalid index!"); + return Data[Index]; + } + + /// @} + /// @name Expensive Operations + /// @{ + std::vector vec() const { + return std::vector(Data, Data+Length); + } + + /// @} + /// @name Conversion operators + /// @{ + operator std::vector() const { + return std::vector(Data, Data+Length); + } + + /// @} + }; + + /// MutableArrayRef - Represent a mutable reference to an array (0 or more + /// elements consecutively in memory), i.e. a start pointer and a length. It + /// allows various APIs to take and modify consecutive elements easily and + /// conveniently. + /// + /// This class does not own the underlying data, it is expected to be used in + /// situations where the data resides in some other buffer, whose lifetime + /// extends past that of the MutableArrayRef. For this reason, it is not in + /// general safe to store a MutableArrayRef. + /// + /// This is intended to be trivially copyable, so it should be passed by + /// value. + template + class MutableArrayRef : public ArrayRef { + public: + typedef T *iterator; + + typedef std::reverse_iterator reverse_iterator; + + /// Construct an empty MutableArrayRef. + /*implicit*/ MutableArrayRef() : ArrayRef() {} + + /// Construct an empty MutableArrayRef from None. + /*implicit*/ MutableArrayRef(NoneType) : ArrayRef() {} + + /// Construct an MutableArrayRef from a single element. + /*implicit*/ MutableArrayRef(T &OneElt) : ArrayRef(OneElt) {} + + /// Construct an MutableArrayRef from a pointer and length. + /*implicit*/ MutableArrayRef(T *data, size_t length) + : ArrayRef(data, length) {} + + /// Construct an MutableArrayRef from a range. + MutableArrayRef(T *begin, T *end) : ArrayRef(begin, end) {} + + /// Construct an MutableArrayRef from a SmallVector. + /*implicit*/ MutableArrayRef(SmallVectorImpl &Vec) + : ArrayRef(Vec) {} + + /// Construct a MutableArrayRef from a std::vector. + /*implicit*/ MutableArrayRef(std::vector &Vec) + : ArrayRef(Vec) {} + + /// Construct an MutableArrayRef from a C array. + template + /*implicit*/ LLVM_CONSTEXPR MutableArrayRef(T (&Arr)[N]) + : ArrayRef(Arr) {} + + T *data() const { return const_cast(ArrayRef::data()); } + + iterator begin() const { return data(); } + iterator end() const { return data() + this->size(); } + + reverse_iterator rbegin() const { return reverse_iterator(end()); } + reverse_iterator rend() const { return reverse_iterator(begin()); } + + /// front - Get the first element. + T &front() const { + assert(!this->empty()); + return data()[0]; + } + + /// back - Get the last element. + T &back() const { + assert(!this->empty()); + return data()[this->size()-1]; + } + + /// slice(n) - Chop off the first N elements of the array. + MutableArrayRef slice(unsigned N) const { + assert(N <= this->size() && "Invalid specifier"); + return MutableArrayRef(data()+N, this->size()-N); + } + + /// slice(n, m) - Chop off the first N elements of the array, and keep M + /// elements in the array. + MutableArrayRef slice(unsigned N, unsigned M) const { + assert(N+M <= this->size() && "Invalid specifier"); + return MutableArrayRef(data()+N, M); + } + + MutableArrayRef drop_back(unsigned N) const { + assert(this->size() >= N && "Dropping more elements than exist"); + return slice(0, this->size() - N); + } + + /// @} + /// @name Operator Overloads + /// @{ + T &operator[](size_t Index) const { + assert(Index < this->size() && "Invalid index!"); + return data()[Index]; + } + }; + + /// @name ArrayRef Convenience constructors + /// @{ + + /// Construct an ArrayRef from a single element. + template + ArrayRef makeArrayRef(const T &OneElt) { + return OneElt; + } + + /// Construct an ArrayRef from a pointer and length. + template + ArrayRef makeArrayRef(const T *data, size_t length) { + return ArrayRef(data, length); + } + + /// Construct an ArrayRef from a range. + template + ArrayRef makeArrayRef(const T *begin, const T *end) { + return ArrayRef(begin, end); + } + + /// Construct an ArrayRef from a SmallVector. + template + ArrayRef makeArrayRef(const SmallVectorImpl &Vec) { + return Vec; + } + + /// Construct an ArrayRef from a SmallVector. + template + ArrayRef makeArrayRef(const SmallVector &Vec) { + return Vec; + } + + /// Construct an ArrayRef from a std::vector. + template + ArrayRef makeArrayRef(const std::vector &Vec) { + return Vec; + } + + /// Construct an ArrayRef from an ArrayRef (no-op) (const) + template ArrayRef makeArrayRef(const ArrayRef &Vec) { + return Vec; + } + + /// Construct an ArrayRef from an ArrayRef (no-op) + template ArrayRef &makeArrayRef(ArrayRef &Vec) { + return Vec; + } + + /// Construct an ArrayRef from a C array. + template + ArrayRef makeArrayRef(const T (&Arr)[N]) { + return ArrayRef(Arr); + } + + /// @} + /// @name ArrayRef Comparison Operators + /// @{ + + template + inline bool operator==(ArrayRef LHS, ArrayRef RHS) { + return LHS.equals(RHS); + } + + template + inline bool operator!=(ArrayRef LHS, ArrayRef RHS) { + return !(LHS == RHS); + } + + /// @} + + // ArrayRefs can be treated like a POD type. + template struct isPodLike; + template struct isPodLike > { + static const bool value = true; + }; + + template hash_code hash_value(ArrayRef S) { + return hash_combine_range(S.begin(), S.end()); + } +} // end namespace llvm_ks + +#endif // LLVM_ADT_ARRAYREF_H diff --git a/llvm/include/llvm/ADT/DenseMap.h b/llvm/include/llvm/ADT/DenseMap.h new file mode 100644 index 0000000..99a23d0 --- /dev/null +++ b/llvm/include/llvm/ADT/DenseMap.h @@ -0,0 +1,1074 @@ +//===- llvm/ADT/DenseMap.h - Dense probed hash table ------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the DenseMap class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_DENSEMAP_H +#define LLVM_ADT_DENSEMAP_H + +#include "llvm/ADT/DenseMapInfo.h" +#include "llvm/ADT/EpochTracker.h" +#include "llvm/Support/AlignOf.h" +#include "llvm/Support/Compiler.h" +#include "llvm/Support/MathExtras.h" +#include "llvm/Support/PointerLikeTypeTraits.h" +#include "llvm/Support/type_traits.h" +#include +#include +#include +#include +#include +#include +#include +#include + +namespace llvm_ks { + +namespace detail { +// We extend a pair to allow users to override the bucket type with their own +// implementation without requiring two members. +template +struct DenseMapPair : public std::pair { + KeyT &getFirst() { return std::pair::first; } + const KeyT &getFirst() const { return std::pair::first; } + ValueT &getSecond() { return std::pair::second; } + const ValueT &getSecond() const { return std::pair::second; } +}; +} + +template < + typename KeyT, typename ValueT, typename KeyInfoT = DenseMapInfo, + typename Bucket = detail::DenseMapPair, bool IsConst = false> +class DenseMapIterator; + +template +class DenseMapBase : public DebugEpochBase { +public: + typedef unsigned size_type; + typedef KeyT key_type; + typedef ValueT mapped_type; + typedef BucketT value_type; + + typedef DenseMapIterator iterator; + typedef DenseMapIterator + const_iterator; + inline iterator begin() { + // When the map is empty, avoid the overhead of AdvancePastEmptyBuckets(). + return empty() ? end() : iterator(getBuckets(), getBucketsEnd(), *this); + } + inline iterator end() { + return iterator(getBucketsEnd(), getBucketsEnd(), *this, true); + } + inline const_iterator begin() const { + return empty() ? end() + : const_iterator(getBuckets(), getBucketsEnd(), *this); + } + inline const_iterator end() const { + return const_iterator(getBucketsEnd(), getBucketsEnd(), *this, true); + } + + bool LLVM_ATTRIBUTE_UNUSED_RESULT empty() const { + return getNumEntries() == 0; + } + unsigned size() const { return getNumEntries(); } + + /// Grow the densemap so that it has at least Size buckets. Does not shrink + void resize(size_type Size) { + incrementEpoch(); + if (Size > getNumBuckets()) + grow(Size); + } + + void clear() { + incrementEpoch(); + if (getNumEntries() == 0 && getNumTombstones() == 0) return; + + // If the capacity of the array is huge, and the # elements used is small, + // shrink the array. + if (getNumEntries() * 4 < getNumBuckets() && getNumBuckets() > 64) { + shrink_and_clear(); + return; + } + + const KeyT EmptyKey = getEmptyKey(), TombstoneKey = getTombstoneKey(); + unsigned NumEntries = getNumEntries(); + for (BucketT *P = getBuckets(), *E = getBucketsEnd(); P != E; ++P) { + if (!KeyInfoT::isEqual(P->getFirst(), EmptyKey)) { + if (!KeyInfoT::isEqual(P->getFirst(), TombstoneKey)) { + P->getSecond().~ValueT(); + --NumEntries; + } + P->getFirst() = EmptyKey; + } + } + assert(NumEntries == 0 && "Node count imbalance!"); + setNumEntries(0); + setNumTombstones(0); + } + + /// Return 1 if the specified key is in the map, 0 otherwise. + size_type count(const KeyT &Val) const { + const BucketT *TheBucket; + return LookupBucketFor(Val, TheBucket) ? 1 : 0; + } + + iterator find(const KeyT &Val) { + BucketT *TheBucket; + if (LookupBucketFor(Val, TheBucket)) + return iterator(TheBucket, getBucketsEnd(), *this, true); + return end(); + } + const_iterator find(const KeyT &Val) const { + const BucketT *TheBucket; + if (LookupBucketFor(Val, TheBucket)) + return const_iterator(TheBucket, getBucketsEnd(), *this, true); + return end(); + } + + /// Alternate version of find() which allows a different, and possibly + /// less expensive, key type. + /// The DenseMapInfo is responsible for supplying methods + /// getHashValue(LookupKeyT) and isEqual(LookupKeyT, KeyT) for each key + /// type used. + template + iterator find_as(const LookupKeyT &Val) { + BucketT *TheBucket; + if (LookupBucketFor(Val, TheBucket)) + return iterator(TheBucket, getBucketsEnd(), *this, true); + return end(); + } + template + const_iterator find_as(const LookupKeyT &Val) const { + const BucketT *TheBucket; + if (LookupBucketFor(Val, TheBucket)) + return const_iterator(TheBucket, getBucketsEnd(), *this, true); + return end(); + } + + /// lookup - Return the entry for the specified key, or a default + /// constructed value if no such entry exists. + ValueT lookup(const KeyT &Val) const { + const BucketT *TheBucket; + if (LookupBucketFor(Val, TheBucket)) + return TheBucket->getSecond(); + return ValueT(); + } + + // Inserts key,value pair into the map if the key isn't already in the map. + // If the key is already in the map, it returns false and doesn't update the + // value. + std::pair insert(const std::pair &KV) { + BucketT *TheBucket; + if (LookupBucketFor(KV.first, TheBucket)) + return std::make_pair(iterator(TheBucket, getBucketsEnd(), *this, true), + false); // Already in map. + + // Otherwise, insert the new element. + TheBucket = InsertIntoBucket(KV.first, KV.second, TheBucket); + return std::make_pair(iterator(TheBucket, getBucketsEnd(), *this, true), + true); + } + + // Inserts key,value pair into the map if the key isn't already in the map. + // If the key is already in the map, it returns false and doesn't update the + // value. + std::pair insert(std::pair &&KV) { + BucketT *TheBucket; + if (LookupBucketFor(KV.first, TheBucket)) + return std::make_pair(iterator(TheBucket, getBucketsEnd(), *this, true), + false); // Already in map. + + // Otherwise, insert the new element. + TheBucket = InsertIntoBucket(std::move(KV.first), + std::move(KV.second), + TheBucket); + return std::make_pair(iterator(TheBucket, getBucketsEnd(), *this, true), + true); + } + + /// insert - Range insertion of pairs. + template + void insert(InputIt I, InputIt E) { + for (; I != E; ++I) + insert(*I); + } + + + bool erase(const KeyT &Val) { + BucketT *TheBucket; + if (!LookupBucketFor(Val, TheBucket)) + return false; // not in map. + + TheBucket->getSecond().~ValueT(); + TheBucket->getFirst() = getTombstoneKey(); + decrementNumEntries(); + incrementNumTombstones(); + return true; + } + void erase(iterator I) { + BucketT *TheBucket = &*I; + TheBucket->getSecond().~ValueT(); + TheBucket->getFirst() = getTombstoneKey(); + decrementNumEntries(); + incrementNumTombstones(); + } + + value_type& FindAndConstruct(const KeyT &Key) { + BucketT *TheBucket; + if (LookupBucketFor(Key, TheBucket)) + return *TheBucket; + + return *InsertIntoBucket(Key, ValueT(), TheBucket); + } + + ValueT &operator[](const KeyT &Key) { + return FindAndConstruct(Key).second; + } + + value_type& FindAndConstruct(KeyT &&Key) { + BucketT *TheBucket; + if (LookupBucketFor(Key, TheBucket)) + return *TheBucket; + + return *InsertIntoBucket(std::move(Key), ValueT(), TheBucket); + } + + ValueT &operator[](KeyT &&Key) { + return FindAndConstruct(std::move(Key)).second; + } + + /// isPointerIntoBucketsArray - Return true if the specified pointer points + /// somewhere into the DenseMap's array of buckets (i.e. either to a key or + /// value in the DenseMap). + bool isPointerIntoBucketsArray(const void *Ptr) const { + return Ptr >= getBuckets() && Ptr < getBucketsEnd(); + } + + /// getPointerIntoBucketsArray() - Return an opaque pointer into the buckets + /// array. In conjunction with the previous method, this can be used to + /// determine whether an insertion caused the DenseMap to reallocate. + const void *getPointerIntoBucketsArray() const { return getBuckets(); } + +protected: + DenseMapBase() = default; + + void destroyAll() { + if (getNumBuckets() == 0) // Nothing to do. + return; + + const KeyT EmptyKey = getEmptyKey(), TombstoneKey = getTombstoneKey(); + for (BucketT *P = getBuckets(), *E = getBucketsEnd(); P != E; ++P) { + if (!KeyInfoT::isEqual(P->getFirst(), EmptyKey) && + !KeyInfoT::isEqual(P->getFirst(), TombstoneKey)) + P->getSecond().~ValueT(); + P->getFirst().~KeyT(); + } + } + + void initEmpty() { + setNumEntries(0); + setNumTombstones(0); + + assert((getNumBuckets() & (getNumBuckets()-1)) == 0 && + "# initial buckets must be a power of two!"); + const KeyT EmptyKey = getEmptyKey(); + for (BucketT *B = getBuckets(), *E = getBucketsEnd(); B != E; ++B) + ::new (&B->getFirst()) KeyT(EmptyKey); + } + + void moveFromOldBuckets(BucketT *OldBucketsBegin, BucketT *OldBucketsEnd) { + initEmpty(); + + // Insert all the old elements. + const KeyT EmptyKey = getEmptyKey(); + const KeyT TombstoneKey = getTombstoneKey(); + for (BucketT *B = OldBucketsBegin, *E = OldBucketsEnd; B != E; ++B) { + if (!KeyInfoT::isEqual(B->getFirst(), EmptyKey) && + !KeyInfoT::isEqual(B->getFirst(), TombstoneKey)) { + // Insert the key/value into the new table. + BucketT *DestBucket; + bool FoundVal = LookupBucketFor(B->getFirst(), DestBucket); + (void)FoundVal; // silence warning. + assert(!FoundVal && "Key already in new map?"); + DestBucket->getFirst() = std::move(B->getFirst()); + ::new (&DestBucket->getSecond()) ValueT(std::move(B->getSecond())); + incrementNumEntries(); + + // Free the value. + B->getSecond().~ValueT(); + } + B->getFirst().~KeyT(); + } + } + + template + void copyFrom( + const DenseMapBase &other) { + assert(&other != this); + assert(getNumBuckets() == other.getNumBuckets()); + + setNumEntries(other.getNumEntries()); + setNumTombstones(other.getNumTombstones()); + + if (isPodLike::value && isPodLike::value) + memcpy(getBuckets(), other.getBuckets(), + getNumBuckets() * sizeof(BucketT)); + else + for (size_t i = 0; i < getNumBuckets(); ++i) { + ::new (&getBuckets()[i].getFirst()) + KeyT(other.getBuckets()[i].getFirst()); + if (!KeyInfoT::isEqual(getBuckets()[i].getFirst(), getEmptyKey()) && + !KeyInfoT::isEqual(getBuckets()[i].getFirst(), getTombstoneKey())) + ::new (&getBuckets()[i].getSecond()) + ValueT(other.getBuckets()[i].getSecond()); + } + } + + static unsigned getHashValue(const KeyT &Val) { + return KeyInfoT::getHashValue(Val); + } + template + static unsigned getHashValue(const LookupKeyT &Val) { + return KeyInfoT::getHashValue(Val); + } + static const KeyT getEmptyKey() { + return KeyInfoT::getEmptyKey(); + } + static const KeyT getTombstoneKey() { + return KeyInfoT::getTombstoneKey(); + } + +private: + unsigned getNumEntries() const { + return static_cast(this)->getNumEntries(); + } + void setNumEntries(unsigned Num) { + static_cast(this)->setNumEntries(Num); + } + void incrementNumEntries() { + setNumEntries(getNumEntries() + 1); + } + void decrementNumEntries() { + setNumEntries(getNumEntries() - 1); + } + unsigned getNumTombstones() const { + return static_cast(this)->getNumTombstones(); + } + void setNumTombstones(unsigned Num) { + static_cast(this)->setNumTombstones(Num); + } + void incrementNumTombstones() { + setNumTombstones(getNumTombstones() + 1); + } + void decrementNumTombstones() { + setNumTombstones(getNumTombstones() - 1); + } + const BucketT *getBuckets() const { + return static_cast(this)->getBuckets(); + } + BucketT *getBuckets() { + return static_cast(this)->getBuckets(); + } + unsigned getNumBuckets() const { + return static_cast(this)->getNumBuckets(); + } + BucketT *getBucketsEnd() { + return getBuckets() + getNumBuckets(); + } + const BucketT *getBucketsEnd() const { + return getBuckets() + getNumBuckets(); + } + + void grow(unsigned AtLeast) { + static_cast(this)->grow(AtLeast); + } + + void shrink_and_clear() { + static_cast(this)->shrink_and_clear(); + } + + + BucketT *InsertIntoBucket(const KeyT &Key, const ValueT &Value, + BucketT *TheBucket) { + TheBucket = InsertIntoBucketImpl(Key, TheBucket); + + TheBucket->getFirst() = Key; + ::new (&TheBucket->getSecond()) ValueT(Value); + return TheBucket; + } + + BucketT *InsertIntoBucket(const KeyT &Key, ValueT &&Value, + BucketT *TheBucket) { + TheBucket = InsertIntoBucketImpl(Key, TheBucket); + + TheBucket->getFirst() = Key; + ::new (&TheBucket->getSecond()) ValueT(std::move(Value)); + return TheBucket; + } + + BucketT *InsertIntoBucket(KeyT &&Key, ValueT &&Value, BucketT *TheBucket) { + TheBucket = InsertIntoBucketImpl(Key, TheBucket); + + TheBucket->getFirst() = std::move(Key); + ::new (&TheBucket->getSecond()) ValueT(std::move(Value)); + return TheBucket; + } + + BucketT *InsertIntoBucketImpl(const KeyT &Key, BucketT *TheBucket) { + incrementEpoch(); + + // If the load of the hash table is more than 3/4, or if fewer than 1/8 of + // the buckets are empty (meaning that many are filled with tombstones), + // grow the table. + // + // The later case is tricky. For example, if we had one empty bucket with + // tons of tombstones, failing lookups (e.g. for insertion) would have to + // probe almost the entire table until it found the empty bucket. If the + // table completely filled with tombstones, no lookup would ever succeed, + // causing infinite loops in lookup. + unsigned NewNumEntries = getNumEntries() + 1; + unsigned NumBuckets = getNumBuckets(); + if (LLVM_UNLIKELY(NewNumEntries * 4 >= NumBuckets * 3)) { + this->grow(NumBuckets * 2); + LookupBucketFor(Key, TheBucket); + NumBuckets = getNumBuckets(); + } else if (LLVM_UNLIKELY(NumBuckets-(NewNumEntries+getNumTombstones()) <= + NumBuckets/8)) { + this->grow(NumBuckets); + LookupBucketFor(Key, TheBucket); + } + assert(TheBucket); + + // Only update the state after we've grown our bucket space appropriately + // so that when growing buckets we have self-consistent entry count. + incrementNumEntries(); + + // If we are writing over a tombstone, remember this. + const KeyT EmptyKey = getEmptyKey(); + if (!KeyInfoT::isEqual(TheBucket->getFirst(), EmptyKey)) + decrementNumTombstones(); + + return TheBucket; + } + + /// LookupBucketFor - Lookup the appropriate bucket for Val, returning it in + /// FoundBucket. If the bucket contains the key and a value, this returns + /// true, otherwise it returns a bucket with an empty marker or tombstone and + /// returns false. + template + bool LookupBucketFor(const LookupKeyT &Val, + const BucketT *&FoundBucket) const { + const BucketT *BucketsPtr = getBuckets(); + const unsigned NumBuckets = getNumBuckets(); + + if (NumBuckets == 0) { + FoundBucket = nullptr; + return false; + } + + // FoundTombstone - Keep track of whether we find a tombstone while probing. + const BucketT *FoundTombstone = nullptr; + const KeyT EmptyKey = getEmptyKey(); + const KeyT TombstoneKey = getTombstoneKey(); + assert(!KeyInfoT::isEqual(Val, EmptyKey) && + !KeyInfoT::isEqual(Val, TombstoneKey) && + "Empty/Tombstone value shouldn't be inserted into map!"); + + unsigned BucketNo = getHashValue(Val) & (NumBuckets-1); + unsigned ProbeAmt = 1; + while (1) { + const BucketT *ThisBucket = BucketsPtr + BucketNo; + // Found Val's bucket? If so, return it. + if (LLVM_LIKELY(KeyInfoT::isEqual(Val, ThisBucket->getFirst()))) { + FoundBucket = ThisBucket; + return true; + } + + // If we found an empty bucket, the key doesn't exist in the set. + // Insert it and return the default value. + if (LLVM_LIKELY(KeyInfoT::isEqual(ThisBucket->getFirst(), EmptyKey))) { + // If we've already seen a tombstone while probing, fill it in instead + // of the empty bucket we eventually probed to. + FoundBucket = FoundTombstone ? FoundTombstone : ThisBucket; + return false; + } + + // If this is a tombstone, remember it. If Val ends up not in the map, we + // prefer to return it than something that would require more probing. + if (KeyInfoT::isEqual(ThisBucket->getFirst(), TombstoneKey) && + !FoundTombstone) + FoundTombstone = ThisBucket; // Remember the first tombstone found. + + // Otherwise, it's a hash collision or a tombstone, continue quadratic + // probing. + BucketNo += ProbeAmt++; + BucketNo &= (NumBuckets-1); + } + } + + template + bool LookupBucketFor(const LookupKeyT &Val, BucketT *&FoundBucket) { + const BucketT *ConstFoundBucket; + bool Result = const_cast(this) + ->LookupBucketFor(Val, ConstFoundBucket); + FoundBucket = const_cast(ConstFoundBucket); + return Result; + } + +public: + /// Return the approximate size (in bytes) of the actual map. + /// This is just the raw memory used by DenseMap. + /// If entries are pointers to objects, the size of the referenced objects + /// are not included. + size_t getMemorySize() const { + return getNumBuckets() * sizeof(BucketT); + } +}; + +template , + typename BucketT = detail::DenseMapPair> +class DenseMap : public DenseMapBase, + KeyT, ValueT, KeyInfoT, BucketT> { + // Lift some types from the dependent base class into this class for + // simplicity of referring to them. + typedef DenseMapBase BaseT; + friend class DenseMapBase; + + BucketT *Buckets; + unsigned NumEntries; + unsigned NumTombstones; + unsigned NumBuckets; + +public: + explicit DenseMap(unsigned NumInitBuckets = 0) { + init(NumInitBuckets); + } + + DenseMap(const DenseMap &other) : BaseT() { + init(0); + copyFrom(other); + } + + DenseMap(DenseMap &&other) : BaseT() { + init(0); + swap(other); + } + + template + DenseMap(const InputIt &I, const InputIt &E) { + init(NextPowerOf2(std::distance(I, E))); + this->insert(I, E); + } + + ~DenseMap() { + this->destroyAll(); + operator delete(Buckets); + } + + void swap(DenseMap& RHS) { + this->incrementEpoch(); + RHS.incrementEpoch(); + std::swap(Buckets, RHS.Buckets); + std::swap(NumEntries, RHS.NumEntries); + std::swap(NumTombstones, RHS.NumTombstones); + std::swap(NumBuckets, RHS.NumBuckets); + } + + DenseMap& operator=(const DenseMap& other) { + if (&other != this) + copyFrom(other); + return *this; + } + + DenseMap& operator=(DenseMap &&other) { + this->destroyAll(); + operator delete(Buckets); + init(0); + swap(other); + return *this; + } + + void copyFrom(const DenseMap& other) { + this->destroyAll(); + operator delete(Buckets); + if (allocateBuckets(other.NumBuckets)) { + this->BaseT::copyFrom(other); + } else { + NumEntries = 0; + NumTombstones = 0; + } + } + + void init(unsigned InitBuckets) { + if (allocateBuckets(InitBuckets)) { + this->BaseT::initEmpty(); + } else { + NumEntries = 0; + NumTombstones = 0; + } + } + + void grow(unsigned AtLeast) { + unsigned OldNumBuckets = NumBuckets; + BucketT *OldBuckets = Buckets; + + allocateBuckets(std::max(64, static_cast(NextPowerOf2(AtLeast-1)))); + assert(Buckets); + if (!OldBuckets) { + this->BaseT::initEmpty(); + return; + } + + this->moveFromOldBuckets(OldBuckets, OldBuckets+OldNumBuckets); + + // Free the old table. + operator delete(OldBuckets); + } + + void shrink_and_clear() { + unsigned OldNumEntries = NumEntries; + this->destroyAll(); + + // Reduce the number of buckets. + unsigned NewNumBuckets = 0; + if (OldNumEntries) + NewNumBuckets = std::max(64, 1 << (Log2_32_Ceil(OldNumEntries) + 1)); + if (NewNumBuckets == NumBuckets) { + this->BaseT::initEmpty(); + return; + } + + operator delete(Buckets); + init(NewNumBuckets); + } + +private: + unsigned getNumEntries() const { + return NumEntries; + } + void setNumEntries(unsigned Num) { + NumEntries = Num; + } + + unsigned getNumTombstones() const { + return NumTombstones; + } + void setNumTombstones(unsigned Num) { + NumTombstones = Num; + } + + BucketT *getBuckets() const { + return Buckets; + } + + unsigned getNumBuckets() const { + return NumBuckets; + } + + bool allocateBuckets(unsigned Num) { + NumBuckets = Num; + if (NumBuckets == 0) { + Buckets = nullptr; + return false; + } + + Buckets = static_cast(operator new(sizeof(BucketT) * NumBuckets)); + return true; + } +}; + +template , + typename BucketT = detail::DenseMapPair> +class SmallDenseMap + : public DenseMapBase< + SmallDenseMap, KeyT, + ValueT, KeyInfoT, BucketT> { + // Lift some types from the dependent base class into this class for + // simplicity of referring to them. + typedef DenseMapBase BaseT; + friend class DenseMapBase; + + unsigned Small : 1; + unsigned NumEntries : 31; + unsigned NumTombstones; + + struct LargeRep { + BucketT *Buckets; + unsigned NumBuckets; + }; + + /// A "union" of an inline bucket array and the struct representing + /// a large bucket. This union will be discriminated by the 'Small' bit. + AlignedCharArrayUnion storage; + +public: + explicit SmallDenseMap(unsigned NumInitBuckets = 0) { + init(NumInitBuckets); + } + + SmallDenseMap(const SmallDenseMap &other) : BaseT() { + init(0); + copyFrom(other); + } + + SmallDenseMap(SmallDenseMap &&other) : BaseT() { + init(0); + swap(other); + } + + template + SmallDenseMap(const InputIt &I, const InputIt &E) { + init(NextPowerOf2(std::distance(I, E))); + this->insert(I, E); + } + + ~SmallDenseMap() { + this->destroyAll(); + deallocateBuckets(); + } + + void swap(SmallDenseMap& RHS) { + unsigned TmpNumEntries = RHS.NumEntries; + RHS.NumEntries = NumEntries; + NumEntries = TmpNumEntries; + std::swap(NumTombstones, RHS.NumTombstones); + + const KeyT EmptyKey = this->getEmptyKey(); + const KeyT TombstoneKey = this->getTombstoneKey(); + if (Small && RHS.Small) { + // If we're swapping inline bucket arrays, we have to cope with some of + // the tricky bits of DenseMap's storage system: the buckets are not + // fully initialized. Thus we swap every key, but we may have + // a one-directional move of the value. + for (unsigned i = 0, e = InlineBuckets; i != e; ++i) { + BucketT *LHSB = &getInlineBuckets()[i], + *RHSB = &RHS.getInlineBuckets()[i]; + bool hasLHSValue = (!KeyInfoT::isEqual(LHSB->getFirst(), EmptyKey) && + !KeyInfoT::isEqual(LHSB->getFirst(), TombstoneKey)); + bool hasRHSValue = (!KeyInfoT::isEqual(RHSB->getFirst(), EmptyKey) && + !KeyInfoT::isEqual(RHSB->getFirst(), TombstoneKey)); + if (hasLHSValue && hasRHSValue) { + // Swap together if we can... + std::swap(*LHSB, *RHSB); + continue; + } + // Swap separately and handle any assymetry. + std::swap(LHSB->getFirst(), RHSB->getFirst()); + if (hasLHSValue) { + ::new (&RHSB->getSecond()) ValueT(std::move(LHSB->getSecond())); + LHSB->getSecond().~ValueT(); + } else if (hasRHSValue) { + ::new (&LHSB->getSecond()) ValueT(std::move(RHSB->getSecond())); + RHSB->getSecond().~ValueT(); + } + } + return; + } + if (!Small && !RHS.Small) { + std::swap(getLargeRep()->Buckets, RHS.getLargeRep()->Buckets); + std::swap(getLargeRep()->NumBuckets, RHS.getLargeRep()->NumBuckets); + return; + } + + SmallDenseMap &SmallSide = Small ? *this : RHS; + SmallDenseMap &LargeSide = Small ? RHS : *this; + + // First stash the large side's rep and move the small side across. + LargeRep TmpRep = std::move(*LargeSide.getLargeRep()); + LargeSide.getLargeRep()->~LargeRep(); + LargeSide.Small = true; + // This is similar to the standard move-from-old-buckets, but the bucket + // count hasn't actually rotated in this case. So we have to carefully + // move construct the keys and values into their new locations, but there + // is no need to re-hash things. + for (unsigned i = 0, e = InlineBuckets; i != e; ++i) { + BucketT *NewB = &LargeSide.getInlineBuckets()[i], + *OldB = &SmallSide.getInlineBuckets()[i]; + ::new (&NewB->getFirst()) KeyT(std::move(OldB->getFirst())); + OldB->getFirst().~KeyT(); + if (!KeyInfoT::isEqual(NewB->getFirst(), EmptyKey) && + !KeyInfoT::isEqual(NewB->getFirst(), TombstoneKey)) { + ::new (&NewB->getSecond()) ValueT(std::move(OldB->getSecond())); + OldB->getSecond().~ValueT(); + } + } + + // The hard part of moving the small buckets across is done, just move + // the TmpRep into its new home. + SmallSide.Small = false; + new (SmallSide.getLargeRep()) LargeRep(std::move(TmpRep)); + } + + SmallDenseMap& operator=(const SmallDenseMap& other) { + if (&other != this) + copyFrom(other); + return *this; + } + + SmallDenseMap& operator=(SmallDenseMap &&other) { + this->destroyAll(); + deallocateBuckets(); + init(0); + swap(other); + return *this; + } + + void copyFrom(const SmallDenseMap& other) { + this->destroyAll(); + deallocateBuckets(); + Small = true; + if (other.getNumBuckets() > InlineBuckets) { + Small = false; + new (getLargeRep()) LargeRep(allocateBuckets(other.getNumBuckets())); + } + this->BaseT::copyFrom(other); + } + + void init(unsigned InitBuckets) { + Small = true; + if (InitBuckets > InlineBuckets) { + Small = false; + new (getLargeRep()) LargeRep(allocateBuckets(InitBuckets)); + } + this->BaseT::initEmpty(); + } + + void grow(unsigned AtLeast) { + if (AtLeast >= InlineBuckets) + AtLeast = std::max(64, NextPowerOf2(AtLeast-1)); + + if (Small) { + if (AtLeast < InlineBuckets) + return; // Nothing to do. + + // First move the inline buckets into a temporary storage. + AlignedCharArrayUnion TmpStorage; + BucketT *TmpBegin = reinterpret_cast(TmpStorage.buffer); + BucketT *TmpEnd = TmpBegin; + + // Loop over the buckets, moving non-empty, non-tombstones into the + // temporary storage. Have the loop move the TmpEnd forward as it goes. + const KeyT EmptyKey = this->getEmptyKey(); + const KeyT TombstoneKey = this->getTombstoneKey(); + for (BucketT *P = getBuckets(), *E = P + InlineBuckets; P != E; ++P) { + if (!KeyInfoT::isEqual(P->getFirst(), EmptyKey) && + !KeyInfoT::isEqual(P->getFirst(), TombstoneKey)) { + assert(size_t(TmpEnd - TmpBegin) < InlineBuckets && + "Too many inline buckets!"); + ::new (&TmpEnd->getFirst()) KeyT(std::move(P->getFirst())); + ::new (&TmpEnd->getSecond()) ValueT(std::move(P->getSecond())); + ++TmpEnd; + P->getSecond().~ValueT(); + } + P->getFirst().~KeyT(); + } + + // Now make this map use the large rep, and move all the entries back + // into it. + Small = false; + new (getLargeRep()) LargeRep(allocateBuckets(AtLeast)); + this->moveFromOldBuckets(TmpBegin, TmpEnd); + return; + } + + LargeRep OldRep = std::move(*getLargeRep()); + getLargeRep()->~LargeRep(); + if (AtLeast <= InlineBuckets) { + Small = true; + } else { + new (getLargeRep()) LargeRep(allocateBuckets(AtLeast)); + } + + this->moveFromOldBuckets(OldRep.Buckets, OldRep.Buckets+OldRep.NumBuckets); + + // Free the old table. + operator delete(OldRep.Buckets); + } + + void shrink_and_clear() { + unsigned OldSize = this->size(); + this->destroyAll(); + + // Reduce the number of buckets. + unsigned NewNumBuckets = 0; + if (OldSize) { + NewNumBuckets = 1 << (Log2_32_Ceil(OldSize) + 1); + if (NewNumBuckets > InlineBuckets && NewNumBuckets < 64u) + NewNumBuckets = 64; + } + if ((Small && NewNumBuckets <= InlineBuckets) || + (!Small && NewNumBuckets == getLargeRep()->NumBuckets)) { + this->BaseT::initEmpty(); + return; + } + + deallocateBuckets(); + init(NewNumBuckets); + } + +private: + unsigned getNumEntries() const { + return NumEntries; + } + void setNumEntries(unsigned Num) { + assert(Num < INT_MAX && "Cannot support more than INT_MAX entries"); + NumEntries = Num; + } + + unsigned getNumTombstones() const { + return NumTombstones; + } + void setNumTombstones(unsigned Num) { + NumTombstones = Num; + } + + const BucketT *getInlineBuckets() const { + assert(Small); + // Note that this cast does not violate aliasing rules as we assert that + // the memory's dynamic type is the small, inline bucket buffer, and the + // 'storage.buffer' static type is 'char *'. + return reinterpret_cast(storage.buffer); + } + BucketT *getInlineBuckets() { + return const_cast( + const_cast(this)->getInlineBuckets()); + } + const LargeRep *getLargeRep() const { + assert(!Small); + // Note, same rule about aliasing as with getInlineBuckets. + return reinterpret_cast(storage.buffer); + } + LargeRep *getLargeRep() { + return const_cast( + const_cast(this)->getLargeRep()); + } + + const BucketT *getBuckets() const { + return Small ? getInlineBuckets() : getLargeRep()->Buckets; + } + BucketT *getBuckets() { + return const_cast( + const_cast(this)->getBuckets()); + } + unsigned getNumBuckets() const { + return Small ? InlineBuckets : getLargeRep()->NumBuckets; + } + + void deallocateBuckets() { + if (Small) + return; + + operator delete(getLargeRep()->Buckets); + getLargeRep()->~LargeRep(); + } + + LargeRep allocateBuckets(unsigned Num) { + assert(Num > InlineBuckets && "Must allocate more buckets than are inline"); + LargeRep Rep = { + static_cast(operator new(sizeof(BucketT) * Num)), Num + }; + return Rep; + } +}; + +template +class DenseMapIterator : DebugEpochBase::HandleBase { + typedef DenseMapIterator ConstIterator; + friend class DenseMapIterator; + friend class DenseMapIterator; + +public: + typedef ptrdiff_t difference_type; + typedef typename std::conditional::type + value_type; + typedef value_type *pointer; + typedef value_type &reference; + typedef std::forward_iterator_tag iterator_category; +private: + pointer Ptr, End; +public: + DenseMapIterator() : Ptr(nullptr), End(nullptr) {} + + DenseMapIterator(pointer Pos, pointer E, const DebugEpochBase &Epoch, + bool NoAdvance = false) + : DebugEpochBase::HandleBase(&Epoch), Ptr(Pos), End(E) { + assert(isHandleInSync() && "invalid construction!"); + if (!NoAdvance) AdvancePastEmptyBuckets(); + } + + // Converting ctor from non-const iterators to const iterators. SFINAE'd out + // for const iterator destinations so it doesn't end up as a user defined copy + // constructor. + template ::type> + DenseMapIterator( + const DenseMapIterator &I) + : DebugEpochBase::HandleBase(I), Ptr(I.Ptr), End(I.End) {} + + reference operator*() const { + assert(isHandleInSync() && "invalid iterator access!"); + return *Ptr; + } + pointer operator->() const { + assert(isHandleInSync() && "invalid iterator access!"); + return Ptr; + } + + bool operator==(const ConstIterator &RHS) const { + assert((!Ptr || isHandleInSync()) && "handle not in sync!"); + assert((!RHS.Ptr || RHS.isHandleInSync()) && "handle not in sync!"); + assert(getEpochAddress() == RHS.getEpochAddress() && + "comparing incomparable iterators!"); + return Ptr == RHS.Ptr; + } + bool operator!=(const ConstIterator &RHS) const { + assert((!Ptr || isHandleInSync()) && "handle not in sync!"); + assert((!RHS.Ptr || RHS.isHandleInSync()) && "handle not in sync!"); + assert(getEpochAddress() == RHS.getEpochAddress() && + "comparing incomparable iterators!"); + return Ptr != RHS.Ptr; + } + + inline DenseMapIterator& operator++() { // Preincrement + assert(isHandleInSync() && "invalid iterator access!"); + ++Ptr; + AdvancePastEmptyBuckets(); + return *this; + } + DenseMapIterator operator++(int) { // Postincrement + assert(isHandleInSync() && "invalid iterator access!"); + DenseMapIterator tmp = *this; ++*this; return tmp; + } + +private: + void AdvancePastEmptyBuckets() { + const KeyT Empty = KeyInfoT::getEmptyKey(); + const KeyT Tombstone = KeyInfoT::getTombstoneKey(); + + while (Ptr != End && (KeyInfoT::isEqual(Ptr->getFirst(), Empty) || + KeyInfoT::isEqual(Ptr->getFirst(), Tombstone))) + ++Ptr; + } +}; + +template +static inline size_t +capacity_in_bytes(const DenseMap &X) { + return X.getMemorySize(); +} + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/ADT/DenseMapInfo.h b/llvm/include/llvm/ADT/DenseMapInfo.h new file mode 100644 index 0000000..28ad3b9 --- /dev/null +++ b/llvm/include/llvm/ADT/DenseMapInfo.h @@ -0,0 +1,221 @@ +//===- llvm/ADT/DenseMapInfo.h - Type traits for DenseMap -------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines DenseMapInfo traits for DenseMap. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_DENSEMAPINFO_H +#define LLVM_ADT_DENSEMAPINFO_H + +#include "llvm/ADT/ArrayRef.h" +#include "llvm/ADT/Hashing.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/PointerLikeTypeTraits.h" +#include "llvm/Support/type_traits.h" + +namespace llvm_ks { + +template +struct DenseMapInfo { + //static inline T getEmptyKey(); + //static inline T getTombstoneKey(); + //static unsigned getHashValue(const T &Val); + //static bool isEqual(const T &LHS, const T &RHS); +}; + +// Provide DenseMapInfo for all pointers. +template +struct DenseMapInfo { + static inline T* getEmptyKey() { + uintptr_t Val = static_cast(-1); + Val <<= PointerLikeTypeTraits::NumLowBitsAvailable; + return reinterpret_cast(Val); + } + static inline T* getTombstoneKey() { + uintptr_t Val = static_cast(-2); + Val <<= PointerLikeTypeTraits::NumLowBitsAvailable; + return reinterpret_cast(Val); + } + static unsigned getHashValue(const T *PtrVal) { + return (unsigned((uintptr_t)PtrVal) >> 4) ^ + (unsigned((uintptr_t)PtrVal) >> 9); + } + static bool isEqual(const T *LHS, const T *RHS) { return LHS == RHS; } +}; + +// Provide DenseMapInfo for chars. +template<> struct DenseMapInfo { + static inline char getEmptyKey() { return ~0; } + static inline char getTombstoneKey() { return ~0 - 1; } + static unsigned getHashValue(const char& Val) { return Val * 37U; } + static bool isEqual(const char &LHS, const char &RHS) { + return LHS == RHS; + } +}; + +// Provide DenseMapInfo for unsigned ints. +template<> struct DenseMapInfo { + static inline unsigned getEmptyKey() { return ~0U; } + static inline unsigned getTombstoneKey() { return ~0U - 1; } + static unsigned getHashValue(const unsigned& Val) { return Val * 37U; } + static bool isEqual(const unsigned& LHS, const unsigned& RHS) { + return LHS == RHS; + } +}; + +// Provide DenseMapInfo for unsigned longs. +template<> struct DenseMapInfo { + static inline unsigned long getEmptyKey() { return ~0UL; } + static inline unsigned long getTombstoneKey() { return ~0UL - 1L; } + static unsigned getHashValue(const unsigned long& Val) { + return (unsigned)(Val * 37UL); + } + static bool isEqual(const unsigned long& LHS, const unsigned long& RHS) { + return LHS == RHS; + } +}; + +// Provide DenseMapInfo for unsigned long longs. +template<> struct DenseMapInfo { + static inline unsigned long long getEmptyKey() { return ~0ULL; } + static inline unsigned long long getTombstoneKey() { return ~0ULL - 1ULL; } + static unsigned getHashValue(const unsigned long long& Val) { + return (unsigned)(Val * 37ULL); + } + static bool isEqual(const unsigned long long& LHS, + const unsigned long long& RHS) { + return LHS == RHS; + } +}; + +// Provide DenseMapInfo for ints. +template<> struct DenseMapInfo { + static inline int getEmptyKey() { return 0x7fffffff; } + static inline int getTombstoneKey() { return -0x7fffffff - 1; } + static unsigned getHashValue(const int& Val) { return (unsigned)(Val * 37U); } + static bool isEqual(const int& LHS, const int& RHS) { + return LHS == RHS; + } +}; + +// Provide DenseMapInfo for longs. +template<> struct DenseMapInfo { + static inline long getEmptyKey() { + return (1UL << (sizeof(long) * 8 - 1)) - 1UL; + } + static inline long getTombstoneKey() { return getEmptyKey() - 1L; } + static unsigned getHashValue(const long& Val) { + return (unsigned)(Val * 37UL); + } + static bool isEqual(const long& LHS, const long& RHS) { + return LHS == RHS; + } +}; + +// Provide DenseMapInfo for long longs. +template<> struct DenseMapInfo { + static inline long long getEmptyKey() { return 0x7fffffffffffffffLL; } + static inline long long getTombstoneKey() { return -0x7fffffffffffffffLL-1; } + static unsigned getHashValue(const long long& Val) { + return (unsigned)(Val * 37ULL); + } + static bool isEqual(const long long& LHS, + const long long& RHS) { + return LHS == RHS; + } +}; + +// Provide DenseMapInfo for all pairs whose members have info. +template +struct DenseMapInfo > { + typedef std::pair Pair; + typedef DenseMapInfo FirstInfo; + typedef DenseMapInfo SecondInfo; + + static inline Pair getEmptyKey() { + return std::make_pair(FirstInfo::getEmptyKey(), + SecondInfo::getEmptyKey()); + } + static inline Pair getTombstoneKey() { + return std::make_pair(FirstInfo::getTombstoneKey(), + SecondInfo::getTombstoneKey()); + } + static unsigned getHashValue(const Pair& PairVal) { + uint64_t key = (uint64_t)FirstInfo::getHashValue(PairVal.first) << 32 + | (uint64_t)SecondInfo::getHashValue(PairVal.second); + key += ~(key << 32); + key ^= (key >> 22); + key += ~(key << 13); + key ^= (key >> 8); + key += (key << 3); + key ^= (key >> 15); + key += ~(key << 27); + key ^= (key >> 31); + return (unsigned)key; + } + static bool isEqual(const Pair &LHS, const Pair &RHS) { + return FirstInfo::isEqual(LHS.first, RHS.first) && + SecondInfo::isEqual(LHS.second, RHS.second); + } +}; + +// Provide DenseMapInfo for StringRefs. +template <> struct DenseMapInfo { + static inline StringRef getEmptyKey() { + return StringRef(reinterpret_cast(~static_cast(0)), + 0); + } + static inline StringRef getTombstoneKey() { + return StringRef(reinterpret_cast(~static_cast(1)), + 0); + } + static unsigned getHashValue(StringRef Val) { + assert(Val.data() != getEmptyKey().data() && "Cannot hash the empty key!"); + assert(Val.data() != getTombstoneKey().data() && + "Cannot hash the tombstone key!"); + return (unsigned)(hash_value(Val)); + } + static bool isEqual(StringRef LHS, StringRef RHS) { + if (RHS.data() == getEmptyKey().data()) + return LHS.data() == getEmptyKey().data(); + if (RHS.data() == getTombstoneKey().data()) + return LHS.data() == getTombstoneKey().data(); + return LHS == RHS; + } +}; + +// Provide DenseMapInfo for ArrayRefs. +template struct DenseMapInfo> { + static inline ArrayRef getEmptyKey() { + return ArrayRef(reinterpret_cast(~static_cast(0)), + size_t(0)); + } + static inline ArrayRef getTombstoneKey() { + return ArrayRef(reinterpret_cast(~static_cast(1)), + size_t(0)); + } + static unsigned getHashValue(ArrayRef Val) { + assert(Val.data() != getEmptyKey().data() && "Cannot hash the empty key!"); + assert(Val.data() != getTombstoneKey().data() && + "Cannot hash the tombstone key!"); + return (unsigned)(hash_value(Val)); + } + static bool isEqual(ArrayRef LHS, ArrayRef RHS) { + if (RHS.data() == getEmptyKey().data()) + return LHS.data() == getEmptyKey().data(); + if (RHS.data() == getTombstoneKey().data()) + return LHS.data() == getTombstoneKey().data(); + return LHS == RHS; + } +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/ADT/DenseSet.h b/llvm/include/llvm/ADT/DenseSet.h new file mode 100644 index 0000000..4223e09 --- /dev/null +++ b/llvm/include/llvm/ADT/DenseSet.h @@ -0,0 +1,165 @@ +//===- llvm/ADT/DenseSet.h - Dense probed hash table ------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the DenseSet class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_DENSESET_H +#define LLVM_ADT_DENSESET_H + +#include "llvm/ADT/DenseMap.h" + +namespace llvm_ks { + +namespace detail { +struct DenseSetEmpty {}; + +// Use the empty base class trick so we can create a DenseMap where the buckets +// contain only a single item. +template class DenseSetPair : public DenseSetEmpty { + KeyT key; + +public: + KeyT &getFirst() { return key; } + const KeyT &getFirst() const { return key; } + DenseSetEmpty &getSecond() { return *this; } + const DenseSetEmpty &getSecond() const { return *this; } +}; +} + +/// DenseSet - This implements a dense probed hash-table based set. +template > +class DenseSet { + typedef DenseMap> MapTy; + static_assert(sizeof(typename MapTy::value_type) == sizeof(ValueT), + "DenseMap buckets unexpectedly large!"); + MapTy TheMap; + +public: + typedef ValueT key_type; + typedef ValueT value_type; + typedef unsigned size_type; + + explicit DenseSet(unsigned NumInitBuckets = 0) : TheMap(NumInitBuckets) {} + + bool empty() const { return TheMap.empty(); } + size_type size() const { return TheMap.size(); } + size_t getMemorySize() const { return TheMap.getMemorySize(); } + + /// Grow the DenseSet so that it has at least Size buckets. Will not shrink + /// the Size of the set. + void resize(size_t Size) { TheMap.resize(Size); } + + void clear() { + TheMap.clear(); + } + + /// Return 1 if the specified key is in the set, 0 otherwise. + size_type count(const ValueT &V) const { + return TheMap.count(V); + } + + bool erase(const ValueT &V) { + return TheMap.erase(V); + } + + void swap(DenseSet& RHS) { + TheMap.swap(RHS.TheMap); + } + + // Iterators. + + class Iterator { + typename MapTy::iterator I; + friend class DenseSet; + + public: + typedef typename MapTy::iterator::difference_type difference_type; + typedef ValueT value_type; + typedef value_type *pointer; + typedef value_type &reference; + typedef std::forward_iterator_tag iterator_category; + + Iterator(const typename MapTy::iterator &i) : I(i) {} + + ValueT &operator*() { return I->getFirst(); } + ValueT *operator->() { return &I->getFirst(); } + + Iterator& operator++() { ++I; return *this; } + bool operator==(const Iterator& X) const { return I == X.I; } + bool operator!=(const Iterator& X) const { return I != X.I; } + }; + + class ConstIterator { + typename MapTy::const_iterator I; + friend class DenseSet; + + public: + typedef typename MapTy::const_iterator::difference_type difference_type; + typedef ValueT value_type; + typedef value_type *pointer; + typedef value_type &reference; + typedef std::forward_iterator_tag iterator_category; + + ConstIterator(const typename MapTy::const_iterator &i) : I(i) {} + + const ValueT &operator*() { return I->getFirst(); } + const ValueT *operator->() { return &I->getFirst(); } + + ConstIterator& operator++() { ++I; return *this; } + bool operator==(const ConstIterator& X) const { return I == X.I; } + bool operator!=(const ConstIterator& X) const { return I != X.I; } + }; + + typedef Iterator iterator; + typedef ConstIterator const_iterator; + + iterator begin() { return Iterator(TheMap.begin()); } + iterator end() { return Iterator(TheMap.end()); } + + const_iterator begin() const { return ConstIterator(TheMap.begin()); } + const_iterator end() const { return ConstIterator(TheMap.end()); } + + iterator find(const ValueT &V) { return Iterator(TheMap.find(V)); } + + /// Alternative version of find() which allows a different, and possibly less + /// expensive, key type. + /// The DenseMapInfo is responsible for supplying methods + /// getHashValue(LookupKeyT) and isEqual(LookupKeyT, KeyT) for each key type + /// used. + template + iterator find_as(const LookupKeyT &Val) { + return Iterator(TheMap.find_as(Val)); + } + template + const_iterator find_as(const LookupKeyT &Val) const { + return ConstIterator(TheMap.find_as(Val)); + } + + void erase(Iterator I) { return TheMap.erase(I.I); } + void erase(ConstIterator CI) { return TheMap.erase(CI.I); } + + std::pair insert(const ValueT &V) { + detail::DenseSetEmpty Empty; + return TheMap.insert(std::make_pair(V, Empty)); + } + + // Range insertion of values. + template + void insert(InputIt I, InputIt E) { + for (; I != E; ++I) + insert(*I); + } +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/ADT/EpochTracker.h b/llvm/include/llvm/ADT/EpochTracker.h new file mode 100644 index 0000000..4f4bb72 --- /dev/null +++ b/llvm/include/llvm/ADT/EpochTracker.h @@ -0,0 +1,99 @@ +//===- llvm/ADT/EpochTracker.h - ADT epoch tracking --------------*- C++ -*-==// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the DebugEpochBase and DebugEpochBase::HandleBase classes. +// These can be used to write iterators that are fail-fast when LLVM is built +// with asserts enabled. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_EPOCH_TRACKER_H +#define LLVM_ADT_EPOCH_TRACKER_H + +#include "llvm/Config/llvm-config.h" + +#include + +namespace llvm_ks { + +#ifndef LLVM_ENABLE_ABI_BREAKING_CHECKS + +class DebugEpochBase { +public: + void incrementEpoch() {} + + class HandleBase { + public: + HandleBase() = default; + explicit HandleBase(const DebugEpochBase *) {} + bool isHandleInSync() const { return true; } + const void *getEpochAddress() const { return nullptr; } + }; +}; + +#else + +/// \brief A base class for data structure classes wishing to make iterators +/// ("handles") pointing into themselves fail-fast. When building without +/// asserts, this class is empty and does nothing. +/// +/// DebugEpochBase does not by itself track handles pointing into itself. The +/// expectation is that routines touching the handles will poll on +/// isHandleInSync at appropriate points to assert that the handle they're using +/// is still valid. +/// +class DebugEpochBase { + uint64_t Epoch; + +public: + DebugEpochBase() : Epoch(0) {} + + /// \brief Calling incrementEpoch invalidates all handles pointing into the + /// calling instance. + void incrementEpoch() { ++Epoch; } + + /// \brief The destructor calls incrementEpoch to make use-after-free bugs + /// more likely to crash deterministically. + ~DebugEpochBase() { incrementEpoch(); } + + /// \brief A base class for iterator classes ("handles") that wish to poll for + /// iterator invalidating modifications in the underlying data structure. + /// When LLVM is built without asserts, this class is empty and does nothing. + /// + /// HandleBase does not track the parent data structure by itself. It expects + /// the routines modifying the data structure to call incrementEpoch when they + /// make an iterator-invalidating modification. + /// + class HandleBase { + const uint64_t *EpochAddress; + uint64_t EpochAtCreation; + + public: + HandleBase() : EpochAddress(nullptr), EpochAtCreation(UINT64_MAX) {} + + explicit HandleBase(const DebugEpochBase *Parent) + : EpochAddress(&Parent->Epoch), EpochAtCreation(Parent->Epoch) {} + + /// \brief Returns true if the DebugEpochBase this Handle is linked to has + /// not called incrementEpoch on itself since the creation of this + /// HandleBase instance. + bool isHandleInSync() const { return *EpochAddress == EpochAtCreation; } + + /// \brief Returns a pointer to the epoch word stored in the data structure + /// this handle points into. Can be used to check if two iterators point + /// into the same data structure. + const void *getEpochAddress() const { return EpochAddress; } + }; +}; + +#endif // LLVM_ENABLE_ABI_BREAKING_CHECKS + +} // namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/ADT/FoldingSet.h b/llvm/include/llvm/ADT/FoldingSet.h new file mode 100644 index 0000000..5f99a29 --- /dev/null +++ b/llvm/include/llvm/ADT/FoldingSet.h @@ -0,0 +1,749 @@ +//===-- llvm/ADT/FoldingSet.h - Uniquing Hash Set ---------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines a hash set that can be used to remove duplication of nodes +// in a graph. This code was originally created by Chris Lattner for use with +// SelectionDAGCSEMap, but was isolated to provide use across the llvm code set. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_FOLDINGSET_H +#define LLVM_ADT_FOLDINGSET_H + +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/ADT/iterator.h" +#include "llvm/Support/Allocator.h" +#include "llvm/Support/DataTypes.h" + +namespace llvm_ks { +/// This folding set used for two purposes: +/// 1. Given information about a node we want to create, look up the unique +/// instance of the node in the set. If the node already exists, return +/// it, otherwise return the bucket it should be inserted into. +/// 2. Given a node that has already been created, remove it from the set. +/// +/// This class is implemented as a single-link chained hash table, where the +/// "buckets" are actually the nodes themselves (the next pointer is in the +/// node). The last node points back to the bucket to simplify node removal. +/// +/// Any node that is to be included in the folding set must be a subclass of +/// FoldingSetNode. The node class must also define a Profile method used to +/// establish the unique bits of data for the node. The Profile method is +/// passed a FoldingSetNodeID object which is used to gather the bits. Just +/// call one of the Add* functions defined in the FoldingSetImpl::NodeID class. +/// NOTE: That the folding set does not own the nodes and it is the +/// responsibility of the user to dispose of the nodes. +/// +/// Eg. +/// class MyNode : public FoldingSetNode { +/// private: +/// std::string Name; +/// unsigned Value; +/// public: +/// MyNode(const char *N, unsigned V) : Name(N), Value(V) {} +/// ... +/// void Profile(FoldingSetNodeID &ID) const { +/// ID.AddString(Name); +/// ID.AddInteger(Value); +/// } +/// ... +/// }; +/// +/// To define the folding set itself use the FoldingSet template; +/// +/// Eg. +/// FoldingSet MyFoldingSet; +/// +/// Four public methods are available to manipulate the folding set; +/// +/// 1) If you have an existing node that you want add to the set but unsure +/// that the node might already exist then call; +/// +/// MyNode *M = MyFoldingSet.GetOrInsertNode(N); +/// +/// If The result is equal to the input then the node has been inserted. +/// Otherwise, the result is the node existing in the folding set, and the +/// input can be discarded (use the result instead.) +/// +/// 2) If you are ready to construct a node but want to check if it already +/// exists, then call FindNodeOrInsertPos with a FoldingSetNodeID of the bits to +/// check; +/// +/// FoldingSetNodeID ID; +/// ID.AddString(Name); +/// ID.AddInteger(Value); +/// void *InsertPoint; +/// +/// MyNode *M = MyFoldingSet.FindNodeOrInsertPos(ID, InsertPoint); +/// +/// If found then M with be non-NULL, else InsertPoint will point to where it +/// should be inserted using InsertNode. +/// +/// 3) If you get a NULL result from FindNodeOrInsertPos then you can as a new +/// node with FindNodeOrInsertPos; +/// +/// InsertNode(N, InsertPoint); +/// +/// 4) Finally, if you want to remove a node from the folding set call; +/// +/// bool WasRemoved = RemoveNode(N); +/// +/// The result indicates whether the node existed in the folding set. + +class FoldingSetNodeID; + +//===----------------------------------------------------------------------===// +/// FoldingSetImpl - Implements the folding set functionality. The main +/// structure is an array of buckets. Each bucket is indexed by the hash of +/// the nodes it contains. The bucket itself points to the nodes contained +/// in the bucket via a singly linked list. The last node in the list points +/// back to the bucket to facilitate node removal. +/// +class FoldingSetImpl { + +protected: + /// Buckets - Array of bucket chains. + /// + void **Buckets; + + /// NumBuckets - Length of the Buckets array. Always a power of 2. + /// + unsigned NumBuckets; + + /// NumNodes - Number of nodes in the folding set. Growth occurs when NumNodes + /// is greater than twice the number of buckets. + unsigned NumNodes; + + explicit FoldingSetImpl(unsigned Log2InitSize = 6); + FoldingSetImpl(FoldingSetImpl &&Arg); + FoldingSetImpl &operator=(FoldingSetImpl &&RHS); + ~FoldingSetImpl(); + +public: + //===--------------------------------------------------------------------===// + /// Node - This class is used to maintain the singly linked bucket list in + /// a folding set. + /// + class Node { + private: + // NextInFoldingSetBucket - next link in the bucket list. + void *NextInFoldingSetBucket; + + public: + Node() : NextInFoldingSetBucket(nullptr) {} + + // Accessors + void *getNextInBucket() const { return NextInFoldingSetBucket; } + void SetNextInBucket(void *N) { NextInFoldingSetBucket = N; } + }; + + /// clear - Remove all nodes from the folding set. + void clear(); + + /// RemoveNode - Remove a node from the folding set, returning true if one + /// was removed or false if the node was not in the folding set. + bool RemoveNode(Node *N); + + /// GetOrInsertNode - If there is an existing simple Node exactly + /// equal to the specified node, return it. Otherwise, insert 'N' and return + /// it instead. + Node *GetOrInsertNode(Node *N); + + /// FindNodeOrInsertPos - Look up the node specified by ID. If it exists, + /// return it. If not, return the insertion token that will make insertion + /// faster. + Node *FindNodeOrInsertPos(const FoldingSetNodeID &ID, void *&InsertPos); + + /// InsertNode - Insert the specified node into the folding set, knowing that + /// it is not already in the folding set. InsertPos must be obtained from + /// FindNodeOrInsertPos. + void InsertNode(Node *N, void *InsertPos); + + /// InsertNode - Insert the specified node into the folding set, knowing that + /// it is not already in the folding set. + void InsertNode(Node *N) { + Node *Inserted = GetOrInsertNode(N); + (void)Inserted; + assert(Inserted == N && "Node already inserted!"); + } + + /// size - Returns the number of nodes in the folding set. + unsigned size() const { return NumNodes; } + + /// empty - Returns true if there are no nodes in the folding set. + bool empty() const { return NumNodes == 0; } + +private: + /// GrowHashTable - Double the size of the hash table and rehash everything. + /// + void GrowHashTable(); + +protected: + /// GetNodeProfile - Instantiations of the FoldingSet template implement + /// this function to gather data bits for the given node. + virtual void GetNodeProfile(Node *N, FoldingSetNodeID &ID) const = 0; + /// NodeEquals - Instantiations of the FoldingSet template implement + /// this function to compare the given node with the given ID. + virtual bool NodeEquals(Node *N, const FoldingSetNodeID &ID, unsigned IDHash, + FoldingSetNodeID &TempID) const=0; + /// ComputeNodeHash - Instantiations of the FoldingSet template implement + /// this function to compute a hash value for the given node. + virtual unsigned ComputeNodeHash(Node *N, FoldingSetNodeID &TempID) const = 0; +}; + +//===----------------------------------------------------------------------===// + +template struct FoldingSetTrait; + +/// DefaultFoldingSetTrait - This class provides default implementations +/// for FoldingSetTrait implementations. +/// +template struct DefaultFoldingSetTrait { + static void Profile(const T &X, FoldingSetNodeID &ID) { + X.Profile(ID); + } + static void Profile(T &X, FoldingSetNodeID &ID) { + X.Profile(ID); + } + + // Equals - Test if the profile for X would match ID, using TempID + // to compute a temporary ID if necessary. The default implementation + // just calls Profile and does a regular comparison. Implementations + // can override this to provide more efficient implementations. + static inline bool Equals(T &X, const FoldingSetNodeID &ID, unsigned IDHash, + FoldingSetNodeID &TempID); + + // ComputeHash - Compute a hash value for X, using TempID to + // compute a temporary ID if necessary. The default implementation + // just calls Profile and does a regular hash computation. + // Implementations can override this to provide more efficient + // implementations. + static inline unsigned ComputeHash(T &X, FoldingSetNodeID &TempID); +}; + +/// FoldingSetTrait - This trait class is used to define behavior of how +/// to "profile" (in the FoldingSet parlance) an object of a given type. +/// The default behavior is to invoke a 'Profile' method on an object, but +/// through template specialization the behavior can be tailored for specific +/// types. Combined with the FoldingSetNodeWrapper class, one can add objects +/// to FoldingSets that were not originally designed to have that behavior. +template struct FoldingSetTrait + : public DefaultFoldingSetTrait {}; + +template struct ContextualFoldingSetTrait; + +/// DefaultContextualFoldingSetTrait - Like DefaultFoldingSetTrait, but +/// for ContextualFoldingSets. +template +struct DefaultContextualFoldingSetTrait { + static void Profile(T &X, FoldingSetNodeID &ID, Ctx Context) { + X.Profile(ID, Context); + } + static inline bool Equals(T &X, const FoldingSetNodeID &ID, unsigned IDHash, + FoldingSetNodeID &TempID, Ctx Context); + static inline unsigned ComputeHash(T &X, FoldingSetNodeID &TempID, + Ctx Context); +}; + +/// ContextualFoldingSetTrait - Like FoldingSetTrait, but for +/// ContextualFoldingSets. +template struct ContextualFoldingSetTrait + : public DefaultContextualFoldingSetTrait {}; + +//===--------------------------------------------------------------------===// +/// FoldingSetNodeIDRef - This class describes a reference to an interned +/// FoldingSetNodeID, which can be a useful to store node id data rather +/// than using plain FoldingSetNodeIDs, since the 32-element SmallVector +/// is often much larger than necessary, and the possibility of heap +/// allocation means it requires a non-trivial destructor call. +class FoldingSetNodeIDRef { + const unsigned *Data; + size_t Size; + +public: + FoldingSetNodeIDRef() : Data(nullptr), Size(0) {} + FoldingSetNodeIDRef(const unsigned *D, size_t S) : Data(D), Size(S) {} + + /// ComputeHash - Compute a strong hash value for this FoldingSetNodeIDRef, + /// used to lookup the node in the FoldingSetImpl. + unsigned ComputeHash() const; + + bool operator==(FoldingSetNodeIDRef) const; + + bool operator!=(FoldingSetNodeIDRef RHS) const { return !(*this == RHS); } + + /// Used to compare the "ordering" of two nodes as defined by the + /// profiled bits and their ordering defined by memcmp(). + bool operator<(FoldingSetNodeIDRef) const; + + const unsigned *getData() const { return Data; } + size_t getSize() const { return Size; } +}; + +//===--------------------------------------------------------------------===// +/// FoldingSetNodeID - This class is used to gather all the unique data bits of +/// a node. When all the bits are gathered this class is used to produce a +/// hash value for the node. +/// +class FoldingSetNodeID { + /// Bits - Vector of all the data bits that make the node unique. + /// Use a SmallVector to avoid a heap allocation in the common case. + SmallVector Bits; + +public: + FoldingSetNodeID() {} + + FoldingSetNodeID(FoldingSetNodeIDRef Ref) + : Bits(Ref.getData(), Ref.getData() + Ref.getSize()) {} + + /// Add* - Add various data types to Bit data. + /// + void AddPointer(const void *Ptr); + void AddInteger(signed I); + void AddInteger(unsigned I); + void AddInteger(long I); + void AddInteger(unsigned long I); + void AddInteger(long long I); + void AddInteger(unsigned long long I); + void AddBoolean(bool B) { AddInteger(B ? 1U : 0U); } + void AddString(StringRef String); + void AddNodeID(const FoldingSetNodeID &ID); + + template + inline void Add(const T &x) { FoldingSetTrait::Profile(x, *this); } + + /// clear - Clear the accumulated profile, allowing this FoldingSetNodeID + /// object to be used to compute a new profile. + inline void clear() { Bits.clear(); } + + /// ComputeHash - Compute a strong hash value for this FoldingSetNodeID, used + /// to lookup the node in the FoldingSetImpl. + unsigned ComputeHash() const; + + /// operator== - Used to compare two nodes to each other. + /// + bool operator==(const FoldingSetNodeID &RHS) const; + bool operator==(const FoldingSetNodeIDRef RHS) const; + + bool operator!=(const FoldingSetNodeID &RHS) const { return !(*this == RHS); } + bool operator!=(const FoldingSetNodeIDRef RHS) const { return !(*this ==RHS);} + + /// Used to compare the "ordering" of two nodes as defined by the + /// profiled bits and their ordering defined by memcmp(). + bool operator<(const FoldingSetNodeID &RHS) const; + bool operator<(const FoldingSetNodeIDRef RHS) const; + + /// Intern - Copy this node's data to a memory region allocated from the + /// given allocator and return a FoldingSetNodeIDRef describing the + /// interned data. + FoldingSetNodeIDRef Intern(BumpPtrAllocator &Allocator) const; +}; + +// Convenience type to hide the implementation of the folding set. +typedef FoldingSetImpl::Node FoldingSetNode; +template class FoldingSetIterator; +template class FoldingSetBucketIterator; + +// Definitions of FoldingSetTrait and ContextualFoldingSetTrait functions, which +// require the definition of FoldingSetNodeID. +template +inline bool +DefaultFoldingSetTrait::Equals(T &X, const FoldingSetNodeID &ID, + unsigned /*IDHash*/, + FoldingSetNodeID &TempID) { + FoldingSetTrait::Profile(X, TempID); + return TempID == ID; +} +template +inline unsigned +DefaultFoldingSetTrait::ComputeHash(T &X, FoldingSetNodeID &TempID) { + FoldingSetTrait::Profile(X, TempID); + return TempID.ComputeHash(); +} +template +inline bool +DefaultContextualFoldingSetTrait::Equals(T &X, + const FoldingSetNodeID &ID, + unsigned /*IDHash*/, + FoldingSetNodeID &TempID, + Ctx Context) { + ContextualFoldingSetTrait::Profile(X, TempID, Context); + return TempID == ID; +} +template +inline unsigned +DefaultContextualFoldingSetTrait::ComputeHash(T &X, + FoldingSetNodeID &TempID, + Ctx Context) { + ContextualFoldingSetTrait::Profile(X, TempID, Context); + return TempID.ComputeHash(); +} + +//===----------------------------------------------------------------------===// +/// FoldingSet - This template class is used to instantiate a specialized +/// implementation of the folding set to the node class T. T must be a +/// subclass of FoldingSetNode and implement a Profile function. +/// +/// Note that this set type is movable and move-assignable. However, its +/// moved-from state is not a valid state for anything other than +/// move-assigning and destroying. This is primarily to enable movable APIs +/// that incorporate these objects. +template class FoldingSet final : public FoldingSetImpl { +private: + /// GetNodeProfile - Each instantiatation of the FoldingSet needs to provide a + /// way to convert nodes into a unique specifier. + void GetNodeProfile(Node *N, FoldingSetNodeID &ID) const override { + T *TN = static_cast(N); + FoldingSetTrait::Profile(*TN, ID); + } + /// NodeEquals - Instantiations may optionally provide a way to compare a + /// node with a specified ID. + bool NodeEquals(Node *N, const FoldingSetNodeID &ID, unsigned IDHash, + FoldingSetNodeID &TempID) const override { + T *TN = static_cast(N); + return FoldingSetTrait::Equals(*TN, ID, IDHash, TempID); + } + /// ComputeNodeHash - Instantiations may optionally provide a way to compute a + /// hash value directly from a node. + unsigned ComputeNodeHash(Node *N, FoldingSetNodeID &TempID) const override { + T *TN = static_cast(N); + return FoldingSetTrait::ComputeHash(*TN, TempID); + } + +public: + explicit FoldingSet(unsigned Log2InitSize = 6) + : FoldingSetImpl(Log2InitSize) {} + + FoldingSet(FoldingSet &&Arg) : FoldingSetImpl(std::move(Arg)) {} + FoldingSet &operator=(FoldingSet &&RHS) { + (void)FoldingSetImpl::operator=(std::move(RHS)); + return *this; + } + + typedef FoldingSetIterator iterator; + iterator begin() { return iterator(Buckets); } + iterator end() { return iterator(Buckets+NumBuckets); } + + typedef FoldingSetIterator const_iterator; + const_iterator begin() const { return const_iterator(Buckets); } + const_iterator end() const { return const_iterator(Buckets+NumBuckets); } + + typedef FoldingSetBucketIterator bucket_iterator; + + bucket_iterator bucket_begin(unsigned hash) { + return bucket_iterator(Buckets + (hash & (NumBuckets-1))); + } + + bucket_iterator bucket_end(unsigned hash) { + return bucket_iterator(Buckets + (hash & (NumBuckets-1)), true); + } + + /// GetOrInsertNode - If there is an existing simple Node exactly + /// equal to the specified node, return it. Otherwise, insert 'N' and + /// return it instead. + T *GetOrInsertNode(Node *N) { + return static_cast(FoldingSetImpl::GetOrInsertNode(N)); + } + + /// FindNodeOrInsertPos - Look up the node specified by ID. If it exists, + /// return it. If not, return the insertion token that will make insertion + /// faster. + T *FindNodeOrInsertPos(const FoldingSetNodeID &ID, void *&InsertPos) { + return static_cast(FoldingSetImpl::FindNodeOrInsertPos(ID, InsertPos)); + } +}; + +//===----------------------------------------------------------------------===// +/// ContextualFoldingSet - This template class is a further refinement +/// of FoldingSet which provides a context argument when calling +/// Profile on its nodes. Currently, that argument is fixed at +/// initialization time. +/// +/// T must be a subclass of FoldingSetNode and implement a Profile +/// function with signature +/// void Profile(llvm_ks::FoldingSetNodeID &, Ctx); +template +class ContextualFoldingSet final : public FoldingSetImpl { + // Unfortunately, this can't derive from FoldingSet because the + // construction vtable for FoldingSet requires + // FoldingSet::GetNodeProfile to be instantiated, which in turn + // requires a single-argument T::Profile(). + +private: + Ctx Context; + + /// GetNodeProfile - Each instantiatation of the FoldingSet needs to provide a + /// way to convert nodes into a unique specifier. + void GetNodeProfile(FoldingSetImpl::Node *N, + FoldingSetNodeID &ID) const override { + T *TN = static_cast(N); + ContextualFoldingSetTrait::Profile(*TN, ID, Context); + } + bool NodeEquals(FoldingSetImpl::Node *N, const FoldingSetNodeID &ID, + unsigned IDHash, FoldingSetNodeID &TempID) const override { + T *TN = static_cast(N); + return ContextualFoldingSetTrait::Equals(*TN, ID, IDHash, TempID, + Context); + } + unsigned ComputeNodeHash(FoldingSetImpl::Node *N, + FoldingSetNodeID &TempID) const override { + T *TN = static_cast(N); + return ContextualFoldingSetTrait::ComputeHash(*TN, TempID, Context); + } + +public: + explicit ContextualFoldingSet(Ctx Context, unsigned Log2InitSize = 6) + : FoldingSetImpl(Log2InitSize), Context(Context) + {} + + Ctx getContext() const { return Context; } + + typedef FoldingSetIterator iterator; + iterator begin() { return iterator(Buckets); } + iterator end() { return iterator(Buckets+NumBuckets); } + + typedef FoldingSetIterator const_iterator; + const_iterator begin() const { return const_iterator(Buckets); } + const_iterator end() const { return const_iterator(Buckets+NumBuckets); } + + typedef FoldingSetBucketIterator bucket_iterator; + + bucket_iterator bucket_begin(unsigned hash) { + return bucket_iterator(Buckets + (hash & (NumBuckets-1))); + } + + bucket_iterator bucket_end(unsigned hash) { + return bucket_iterator(Buckets + (hash & (NumBuckets-1)), true); + } + + /// GetOrInsertNode - If there is an existing simple Node exactly + /// equal to the specified node, return it. Otherwise, insert 'N' + /// and return it instead. + T *GetOrInsertNode(Node *N) { + return static_cast(FoldingSetImpl::GetOrInsertNode(N)); + } + + /// FindNodeOrInsertPos - Look up the node specified by ID. If it + /// exists, return it. If not, return the insertion token that will + /// make insertion faster. + T *FindNodeOrInsertPos(const FoldingSetNodeID &ID, void *&InsertPos) { + return static_cast(FoldingSetImpl::FindNodeOrInsertPos(ID, InsertPos)); + } +}; + +//===----------------------------------------------------------------------===// +/// FoldingSetVector - This template class combines a FoldingSet and a vector +/// to provide the interface of FoldingSet but with deterministic iteration +/// order based on the insertion order. T must be a subclass of FoldingSetNode +/// and implement a Profile function. +template > +class FoldingSetVector { + FoldingSet Set; + VectorT Vector; + +public: + explicit FoldingSetVector(unsigned Log2InitSize = 6) + : Set(Log2InitSize) { + } + + typedef pointee_iterator iterator; + iterator begin() { return Vector.begin(); } + iterator end() { return Vector.end(); } + + typedef pointee_iterator const_iterator; + const_iterator begin() const { return Vector.begin(); } + const_iterator end() const { return Vector.end(); } + + /// clear - Remove all nodes from the folding set. + void clear() { Set.clear(); Vector.clear(); } + + /// FindNodeOrInsertPos - Look up the node specified by ID. If it exists, + /// return it. If not, return the insertion token that will make insertion + /// faster. + T *FindNodeOrInsertPos(const FoldingSetNodeID &ID, void *&InsertPos) { + return Set.FindNodeOrInsertPos(ID, InsertPos); + } + + /// GetOrInsertNode - If there is an existing simple Node exactly + /// equal to the specified node, return it. Otherwise, insert 'N' and + /// return it instead. + T *GetOrInsertNode(T *N) { + T *Result = Set.GetOrInsertNode(N); + if (Result == N) Vector.push_back(N); + return Result; + } + + /// InsertNode - Insert the specified node into the folding set, knowing that + /// it is not already in the folding set. InsertPos must be obtained from + /// FindNodeOrInsertPos. + void InsertNode(T *N, void *InsertPos) { + Set.InsertNode(N, InsertPos); + Vector.push_back(N); + } + + /// InsertNode - Insert the specified node into the folding set, knowing that + /// it is not already in the folding set. + void InsertNode(T *N) { + Set.InsertNode(N); + Vector.push_back(N); + } + + /// size - Returns the number of nodes in the folding set. + unsigned size() const { return Set.size(); } + + /// empty - Returns true if there are no nodes in the folding set. + bool empty() const { return Set.empty(); } +}; + +//===----------------------------------------------------------------------===// +/// FoldingSetIteratorImpl - This is the common iterator support shared by all +/// folding sets, which knows how to walk the folding set hash table. +class FoldingSetIteratorImpl { +protected: + FoldingSetNode *NodePtr; + FoldingSetIteratorImpl(void **Bucket); + void advance(); + +public: + bool operator==(const FoldingSetIteratorImpl &RHS) const { + return NodePtr == RHS.NodePtr; + } + bool operator!=(const FoldingSetIteratorImpl &RHS) const { + return NodePtr != RHS.NodePtr; + } +}; + +template class FoldingSetIterator : public FoldingSetIteratorImpl { +public: + explicit FoldingSetIterator(void **Bucket) : FoldingSetIteratorImpl(Bucket) {} + + T &operator*() const { + return *static_cast(NodePtr); + } + + T *operator->() const { + return static_cast(NodePtr); + } + + inline FoldingSetIterator &operator++() { // Preincrement + advance(); + return *this; + } + FoldingSetIterator operator++(int) { // Postincrement + FoldingSetIterator tmp = *this; ++*this; return tmp; + } +}; + +//===----------------------------------------------------------------------===// +/// FoldingSetBucketIteratorImpl - This is the common bucket iterator support +/// shared by all folding sets, which knows how to walk a particular bucket +/// of a folding set hash table. + +class FoldingSetBucketIteratorImpl { +protected: + void *Ptr; + + explicit FoldingSetBucketIteratorImpl(void **Bucket); + + FoldingSetBucketIteratorImpl(void **Bucket, bool) + : Ptr(Bucket) {} + + void advance() { + void *Probe = static_cast(Ptr)->getNextInBucket(); + uintptr_t x = reinterpret_cast(Probe) & ~0x1; + Ptr = reinterpret_cast(x); + } + +public: + bool operator==(const FoldingSetBucketIteratorImpl &RHS) const { + return Ptr == RHS.Ptr; + } + bool operator!=(const FoldingSetBucketIteratorImpl &RHS) const { + return Ptr != RHS.Ptr; + } +}; + +template +class FoldingSetBucketIterator : public FoldingSetBucketIteratorImpl { +public: + explicit FoldingSetBucketIterator(void **Bucket) : + FoldingSetBucketIteratorImpl(Bucket) {} + + FoldingSetBucketIterator(void **Bucket, bool) : + FoldingSetBucketIteratorImpl(Bucket, true) {} + + T &operator*() const { return *static_cast(Ptr); } + T *operator->() const { return static_cast(Ptr); } + + inline FoldingSetBucketIterator &operator++() { // Preincrement + advance(); + return *this; + } + FoldingSetBucketIterator operator++(int) { // Postincrement + FoldingSetBucketIterator tmp = *this; ++*this; return tmp; + } +}; + +//===----------------------------------------------------------------------===// +/// FoldingSetNodeWrapper - This template class is used to "wrap" arbitrary +/// types in an enclosing object so that they can be inserted into FoldingSets. +template +class FoldingSetNodeWrapper : public FoldingSetNode { + T data; + +public: + template + explicit FoldingSetNodeWrapper(Ts &&... Args) + : data(std::forward(Args)...) {} + + void Profile(FoldingSetNodeID &ID) { FoldingSetTrait::Profile(data, ID); } + + T &getValue() { return data; } + const T &getValue() const { return data; } + + operator T&() { return data; } + operator const T&() const { return data; } +}; + +//===----------------------------------------------------------------------===// +/// FastFoldingSetNode - This is a subclass of FoldingSetNode which stores +/// a FoldingSetNodeID value rather than requiring the node to recompute it +/// each time it is needed. This trades space for speed (which can be +/// significant if the ID is long), and it also permits nodes to drop +/// information that would otherwise only be required for recomputing an ID. +class FastFoldingSetNode : public FoldingSetNode { + FoldingSetNodeID FastID; + +protected: + explicit FastFoldingSetNode(const FoldingSetNodeID &ID) : FastID(ID) {} + +public: + void Profile(FoldingSetNodeID &ID) const { ID.AddNodeID(FastID); } +}; + +//===----------------------------------------------------------------------===// +// Partial specializations of FoldingSetTrait. + +template struct FoldingSetTrait { + static inline void Profile(T *X, FoldingSetNodeID &ID) { + ID.AddPointer(X); + } +}; +template +struct FoldingSetTrait> { + static inline void Profile(const std::pair &P, + llvm_ks::FoldingSetNodeID &ID) { + ID.Add(P.first); + ID.Add(P.second); + } +}; +} // End of namespace llvm_ks. + +#endif diff --git a/llvm/include/llvm/ADT/Hashing.h b/llvm/include/llvm/ADT/Hashing.h new file mode 100644 index 0000000..5d74e04 --- /dev/null +++ b/llvm/include/llvm/ADT/Hashing.h @@ -0,0 +1,661 @@ +//===-- llvm/ADT/Hashing.h - Utilities for hashing --------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the newly proposed standard C++ interfaces for hashing +// arbitrary data and building hash functions for user-defined types. This +// interface was originally proposed in N3333[1] and is currently under review +// for inclusion in a future TR and/or standard. +// +// The primary interfaces provide are comprised of one type and three functions: +// +// -- 'hash_code' class is an opaque type representing the hash code for some +// data. It is the intended product of hashing, and can be used to implement +// hash tables, checksumming, and other common uses of hashes. It is not an +// integer type (although it can be converted to one) because it is risky +// to assume much about the internals of a hash_code. In particular, each +// execution of the program has a high probability of producing a different +// hash_code for a given input. Thus their values are not stable to save or +// persist, and should only be used during the execution for the +// construction of hashing datastructures. +// +// -- 'hash_value' is a function designed to be overloaded for each +// user-defined type which wishes to be used within a hashing context. It +// should be overloaded within the user-defined type's namespace and found +// via ADL. Overloads for primitive types are provided by this library. +// +// -- 'hash_combine' and 'hash_combine_range' are functions designed to aid +// programmers in easily and intuitively combining a set of data into +// a single hash_code for their object. They should only logically be used +// within the implementation of a 'hash_value' routine or similar context. +// +// Note that 'hash_combine_range' contains very special logic for hashing +// a contiguous array of integers or pointers. This logic is *extremely* fast, +// on a modern Intel "Gainestown" Xeon (Nehalem uarch) @2.2 GHz, these were +// benchmarked at over 6.5 GiB/s for large keys, and <20 cycles/hash for keys +// under 32-bytes. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_HASHING_H +#define LLVM_ADT_HASHING_H + +#include "llvm/Support/DataTypes.h" +#include "llvm/Support/Host.h" +#include "llvm/Support/SwapByteOrder.h" +#include "llvm/Support/type_traits.h" +#include +#include +#include +#include +#include +#include + +namespace llvm_ks { + +/// \brief An opaque object representing a hash code. +/// +/// This object represents the result of hashing some entity. It is intended to +/// be used to implement hashtables or other hashing-based data structures. +/// While it wraps and exposes a numeric value, this value should not be +/// trusted to be stable or predictable across processes or executions. +/// +/// In order to obtain the hash_code for an object 'x': +/// \code +/// using llvm_ks::hash_value; +/// llvm_ks::hash_code code = hash_value(x); +/// \endcode +class hash_code { + size_t value; + +public: + /// \brief Default construct a hash_code. + /// Note that this leaves the value uninitialized. + hash_code() = default; + + /// \brief Form a hash code directly from a numerical value. + hash_code(size_t value) : value(value) {} + + /// \brief Convert the hash code to its numerical value for use. + /*explicit*/ operator size_t() const { return value; } + + friend bool operator==(const hash_code &lhs, const hash_code &rhs) { + return lhs.value == rhs.value; + } + friend bool operator!=(const hash_code &lhs, const hash_code &rhs) { + return lhs.value != rhs.value; + } + + /// \brief Allow a hash_code to be directly run through hash_value. + friend size_t hash_value(const hash_code &code) { return code.value; } +}; + +/// \brief Compute a hash_code for any integer value. +/// +/// Note that this function is intended to compute the same hash_code for +/// a particular value without regard to the pre-promotion type. This is in +/// contrast to hash_combine which may produce different hash_codes for +/// differing argument types even if they would implicit promote to a common +/// type without changing the value. +template +typename std::enable_if::value, hash_code>::type +hash_value(T value); + +/// \brief Compute a hash_code for a pointer's address. +/// +/// N.B.: This hashes the *address*. Not the value and not the type. +template hash_code hash_value(const T *ptr); + +/// \brief Compute a hash_code for a pair of objects. +template +hash_code hash_value(const std::pair &arg); + +/// \brief Compute a hash_code for a standard string. +template +hash_code hash_value(const std::basic_string &arg); + + +/// \brief Override the execution seed with a fixed value. +/// +/// This hashing library uses a per-execution seed designed to change on each +/// run with high probability in order to ensure that the hash codes are not +/// attackable and to ensure that output which is intended to be stable does +/// not rely on the particulars of the hash codes produced. +/// +/// That said, there are use cases where it is important to be able to +/// reproduce *exactly* a specific behavior. To that end, we provide a function +/// which will forcibly set the seed to a fixed value. This must be done at the +/// start of the program, before any hashes are computed. Also, it cannot be +/// undone. This makes it thread-hostile and very hard to use outside of +/// immediately on start of a simple program designed for reproducible +/// behavior. +void set_fixed_execution_hash_seed(size_t fixed_value); + + +// All of the implementation details of actually computing the various hash +// code values are held within this namespace. These routines are included in +// the header file mainly to allow inlining and constant propagation. +namespace hashing { +namespace detail { + +inline uint64_t fetch64(const char *p) { + uint64_t result; + memcpy(&result, p, sizeof(result)); + if (sys::IsBigEndianHost) + sys::swapByteOrder(result); + return result; +} + +inline uint32_t fetch32(const char *p) { + uint32_t result; + memcpy(&result, p, sizeof(result)); + if (sys::IsBigEndianHost) + sys::swapByteOrder(result); + return result; +} + +/// Some primes between 2^63 and 2^64 for various uses. +static const uint64_t k0 = 0xc3a5c85c97cb3127ULL; +static const uint64_t k1 = 0xb492b66fbe98f273ULL; +static const uint64_t k2 = 0x9ae16a3b2f90404fULL; +static const uint64_t k3 = 0xc949d7c7509e6557ULL; + +/// \brief Bitwise right rotate. +/// Normally this will compile to a single instruction, especially if the +/// shift is a manifest constant. +inline uint64_t rotate(uint64_t val, size_t shift) { + // Avoid shifting by 64: doing so yields an undefined result. + return shift == 0 ? val : ((val >> shift) | (val << (64 - shift))); +} + +inline uint64_t shift_mix(uint64_t val) { + return val ^ (val >> 47); +} + +inline uint64_t hash_16_bytes(uint64_t low, uint64_t high) { + // Murmur-inspired hashing. + const uint64_t kMul = 0x9ddfea08eb382d69ULL; + uint64_t a = (low ^ high) * kMul; + a ^= (a >> 47); + uint64_t b = (high ^ a) * kMul; + b ^= (b >> 47); + b *= kMul; + return b; +} + +inline uint64_t hash_1to3_bytes(const char *s, size_t len, uint64_t seed) { + uint8_t a = s[0]; + uint8_t b = s[len >> 1]; + uint8_t c = s[len - 1]; + uint32_t y = static_cast(a) + (static_cast(b) << 8); + uint32_t z = len + (static_cast(c) << 2); + return shift_mix(y * k2 ^ z * k3 ^ seed) * k2; +} + +inline uint64_t hash_4to8_bytes(const char *s, size_t len, uint64_t seed) { + uint64_t a = fetch32(s); + return hash_16_bytes(len + (a << 3), seed ^ fetch32(s + len - 4)); +} + +inline uint64_t hash_9to16_bytes(const char *s, size_t len, uint64_t seed) { + uint64_t a = fetch64(s); + uint64_t b = fetch64(s + len - 8); + return hash_16_bytes(seed ^ a, rotate(b + len, len)) ^ b; +} + +inline uint64_t hash_17to32_bytes(const char *s, size_t len, uint64_t seed) { + uint64_t a = fetch64(s) * k1; + uint64_t b = fetch64(s + 8); + uint64_t c = fetch64(s + len - 8) * k2; + uint64_t d = fetch64(s + len - 16) * k0; + return hash_16_bytes(rotate(a - b, 43) + rotate(c ^ seed, 30) + d, + a + rotate(b ^ k3, 20) - c + len + seed); +} + +inline uint64_t hash_33to64_bytes(const char *s, size_t len, uint64_t seed) { + uint64_t z = fetch64(s + 24); + uint64_t a = fetch64(s) + (len + fetch64(s + len - 16)) * k0; + uint64_t b = rotate(a + z, 52); + uint64_t c = rotate(a, 37); + a += fetch64(s + 8); + c += rotate(a, 7); + a += fetch64(s + 16); + uint64_t vf = a + z; + uint64_t vs = b + rotate(a, 31) + c; + a = fetch64(s + 16) + fetch64(s + len - 32); + z = fetch64(s + len - 8); + b = rotate(a + z, 52); + c = rotate(a, 37); + a += fetch64(s + len - 24); + c += rotate(a, 7); + a += fetch64(s + len - 16); + uint64_t wf = a + z; + uint64_t ws = b + rotate(a, 31) + c; + uint64_t r = shift_mix((vf + ws) * k2 + (wf + vs) * k0); + return shift_mix((seed ^ (r * k0)) + vs) * k2; +} + +inline uint64_t hash_short(const char *s, size_t length, uint64_t seed) { + if (length >= 4 && length <= 8) + return hash_4to8_bytes(s, length, seed); + if (length > 8 && length <= 16) + return hash_9to16_bytes(s, length, seed); + if (length > 16 && length <= 32) + return hash_17to32_bytes(s, length, seed); + if (length > 32) + return hash_33to64_bytes(s, length, seed); + if (length != 0) + return hash_1to3_bytes(s, length, seed); + + return k2 ^ seed; +} + +/// \brief The intermediate state used during hashing. +/// Currently, the algorithm for computing hash codes is based on CityHash and +/// keeps 56 bytes of arbitrary state. +struct hash_state { + uint64_t h0, h1, h2, h3, h4, h5, h6; + + /// \brief Create a new hash_state structure and initialize it based on the + /// seed and the first 64-byte chunk. + /// This effectively performs the initial mix. + static hash_state create(const char *s, uint64_t seed) { + hash_state state = { + 0, seed, hash_16_bytes(seed, k1), rotate(seed ^ k1, 49), + seed * k1, shift_mix(seed), 0 }; + state.h6 = hash_16_bytes(state.h4, state.h5); + state.mix(s); + return state; + } + + /// \brief Mix 32-bytes from the input sequence into the 16-bytes of 'a' + /// and 'b', including whatever is already in 'a' and 'b'. + static void mix_32_bytes(const char *s, uint64_t &a, uint64_t &b) { + a += fetch64(s); + uint64_t c = fetch64(s + 24); + b = rotate(b + a + c, 21); + uint64_t d = a; + a += fetch64(s + 8) + fetch64(s + 16); + b += rotate(a, 44) + d; + a += c; + } + + /// \brief Mix in a 64-byte buffer of data. + /// We mix all 64 bytes even when the chunk length is smaller, but we + /// record the actual length. + void mix(const char *s) { + h0 = rotate(h0 + h1 + h3 + fetch64(s + 8), 37) * k1; + h1 = rotate(h1 + h4 + fetch64(s + 48), 42) * k1; + h0 ^= h6; + h1 += h3 + fetch64(s + 40); + h2 = rotate(h2 + h5, 33) * k1; + h3 = h4 * k1; + h4 = h0 + h5; + mix_32_bytes(s, h3, h4); + h5 = h2 + h6; + h6 = h1 + fetch64(s + 16); + mix_32_bytes(s + 32, h5, h6); + std::swap(h2, h0); + } + + /// \brief Compute the final 64-bit hash code value based on the current + /// state and the length of bytes hashed. + uint64_t finalize(size_t length) { + return hash_16_bytes(hash_16_bytes(h3, h5) + shift_mix(h1) * k1 + h2, + hash_16_bytes(h4, h6) + shift_mix(length) * k1 + h0); + } +}; + + +/// \brief A global, fixed seed-override variable. +/// +/// This variable can be set using the \see llvm_ks::set_fixed_execution_seed +/// function. See that function for details. Do not, under any circumstances, +/// set or read this variable. +extern size_t fixed_seed_override; + +inline size_t get_execution_seed() { + // FIXME: This needs to be a per-execution seed. This is just a placeholder + // implementation. Switching to a per-execution seed is likely to flush out + // instability bugs and so will happen as its own commit. + // + // However, if there is a fixed seed override set the first time this is + // called, return that instead of the per-execution seed. + const uint64_t seed_prime = 0xff51afd7ed558ccdULL; + static size_t seed = fixed_seed_override ? fixed_seed_override + : (size_t)seed_prime; + return seed; +} + + +/// \brief Trait to indicate whether a type's bits can be hashed directly. +/// +/// A type trait which is true if we want to combine values for hashing by +/// reading the underlying data. It is false if values of this type must +/// first be passed to hash_value, and the resulting hash_codes combined. +// +// FIXME: We want to replace is_integral_or_enum and is_pointer here with +// a predicate which asserts that comparing the underlying storage of two +// values of the type for equality is equivalent to comparing the two values +// for equality. For all the platforms we care about, this holds for integers +// and pointers, but there are platforms where it doesn't and we would like to +// support user-defined types which happen to satisfy this property. +template struct is_hashable_data + : std::integral_constant::value || + std::is_pointer::value) && + 64 % sizeof(T) == 0)> {}; + +// Special case std::pair to detect when both types are viable and when there +// is no alignment-derived padding in the pair. This is a bit of a lie because +// std::pair isn't truly POD, but it's close enough in all reasonable +// implementations for our use case of hashing the underlying data. +template struct is_hashable_data > + : std::integral_constant::value && + is_hashable_data::value && + (sizeof(T) + sizeof(U)) == + sizeof(std::pair))> {}; + +/// \brief Helper to get the hashable data representation for a type. +/// This variant is enabled when the type itself can be used. +template +typename std::enable_if::value, T>::type +get_hashable_data(const T &value) { + return value; +} +/// \brief Helper to get the hashable data representation for a type. +/// This variant is enabled when we must first call hash_value and use the +/// result as our data. +template +typename std::enable_if::value, size_t>::type +get_hashable_data(const T &value) { + using ::llvm_ks::hash_value; + return hash_value(value); +} + +/// \brief Helper to store data from a value into a buffer and advance the +/// pointer into that buffer. +/// +/// This routine first checks whether there is enough space in the provided +/// buffer, and if not immediately returns false. If there is space, it +/// copies the underlying bytes of value into the buffer, advances the +/// buffer_ptr past the copied bytes, and returns true. +template +bool store_and_advance(char *&buffer_ptr, char *buffer_end, const T& value, + size_t offset = 0) { + size_t store_size = sizeof(value) - offset; + if (buffer_ptr + store_size > buffer_end) + return false; + const char *value_data = reinterpret_cast(&value); + memcpy(buffer_ptr, value_data + offset, store_size); + buffer_ptr += store_size; + return true; +} + +/// \brief Implement the combining of integral values into a hash_code. +/// +/// This overload is selected when the value type of the iterator is +/// integral. Rather than computing a hash_code for each object and then +/// combining them, this (as an optimization) directly combines the integers. +template +hash_code hash_combine_range_impl(InputIteratorT first, InputIteratorT last) { + const size_t seed = get_execution_seed(); + char buffer[64], *buffer_ptr = buffer; + char *const buffer_end = std::end(buffer); + while (first != last && store_and_advance(buffer_ptr, buffer_end, + get_hashable_data(*first))) + ++first; + if (first == last) + return hash_short(buffer, buffer_ptr - buffer, seed); + assert(buffer_ptr == buffer_end); + + hash_state state = state.create(buffer, seed); + size_t length = 64; + while (first != last) { + // Fill up the buffer. We don't clear it, which re-mixes the last round + // when only a partial 64-byte chunk is left. + buffer_ptr = buffer; + while (first != last && store_and_advance(buffer_ptr, buffer_end, + get_hashable_data(*first))) + ++first; + + // Rotate the buffer if we did a partial fill in order to simulate doing + // a mix of the last 64-bytes. That is how the algorithm works when we + // have a contiguous byte sequence, and we want to emulate that here. + std::rotate(buffer, buffer_ptr, buffer_end); + + // Mix this chunk into the current state. + state.mix(buffer); + length += buffer_ptr - buffer; + }; + + return state.finalize(length); +} + +/// \brief Implement the combining of integral values into a hash_code. +/// +/// This overload is selected when the value type of the iterator is integral +/// and when the input iterator is actually a pointer. Rather than computing +/// a hash_code for each object and then combining them, this (as an +/// optimization) directly combines the integers. Also, because the integers +/// are stored in contiguous memory, this routine avoids copying each value +/// and directly reads from the underlying memory. +template +typename std::enable_if::value, hash_code>::type +hash_combine_range_impl(ValueT *first, ValueT *last) { + const size_t seed = get_execution_seed(); + const char *s_begin = reinterpret_cast(first); + const char *s_end = reinterpret_cast(last); + const size_t length = std::distance(s_begin, s_end); + if (length <= 64) + return hash_short(s_begin, length, seed); + + const char *s_aligned_end = s_begin + (length & ~63); + hash_state state = state.create(s_begin, seed); + s_begin += 64; + while (s_begin != s_aligned_end) { + state.mix(s_begin); + s_begin += 64; + } + if (length & 63) + state.mix(s_end - 64); + + return state.finalize(length); +} + +} // namespace detail +} // namespace hashing + + +/// \brief Compute a hash_code for a sequence of values. +/// +/// This hashes a sequence of values. It produces the same hash_code as +/// 'hash_combine(a, b, c, ...)', but can run over arbitrary sized sequences +/// and is significantly faster given pointers and types which can be hashed as +/// a sequence of bytes. +template +hash_code hash_combine_range(InputIteratorT first, InputIteratorT last) { + return ::llvm_ks::hashing::detail::hash_combine_range_impl(first, last); +} + + +// Implementation details for hash_combine. +namespace hashing { +namespace detail { + +/// \brief Helper class to manage the recursive combining of hash_combine +/// arguments. +/// +/// This class exists to manage the state and various calls involved in the +/// recursive combining of arguments used in hash_combine. It is particularly +/// useful at minimizing the code in the recursive calls to ease the pain +/// caused by a lack of variadic functions. +struct hash_combine_recursive_helper { + char buffer[64]; + hash_state state; + const size_t seed; + +public: + /// \brief Construct a recursive hash combining helper. + /// + /// This sets up the state for a recursive hash combine, including getting + /// the seed and buffer setup. + hash_combine_recursive_helper() + : seed(get_execution_seed()) {} + + /// \brief Combine one chunk of data into the current in-flight hash. + /// + /// This merges one chunk of data into the hash. First it tries to buffer + /// the data. If the buffer is full, it hashes the buffer into its + /// hash_state, empties it, and then merges the new chunk in. This also + /// handles cases where the data straddles the end of the buffer. + template + char *combine_data(size_t &length, char *buffer_ptr, char *buffer_end, T data) { + if (!store_and_advance(buffer_ptr, buffer_end, data)) { + // Check for skew which prevents the buffer from being packed, and do + // a partial store into the buffer to fill it. This is only a concern + // with the variadic combine because that formation can have varying + // argument types. + size_t partial_store_size = buffer_end - buffer_ptr; + memcpy(buffer_ptr, &data, partial_store_size); + + // If the store fails, our buffer is full and ready to hash. We have to + // either initialize the hash state (on the first full buffer) or mix + // this buffer into the existing hash state. Length tracks the *hashed* + // length, not the buffered length. + if (length == 0) { + state = state.create(buffer, seed); + length = 64; + } else { + // Mix this chunk into the current state and bump length up by 64. + state.mix(buffer); + length += 64; + } + // Reset the buffer_ptr to the head of the buffer for the next chunk of + // data. + buffer_ptr = buffer; + + // Try again to store into the buffer -- this cannot fail as we only + // store types smaller than the buffer. + if (!store_and_advance(buffer_ptr, buffer_end, data, + partial_store_size)) + abort(); + } + return buffer_ptr; + } + + /// \brief Recursive, variadic combining method. + /// + /// This function recurses through each argument, combining that argument + /// into a single hash. + template + hash_code combine(size_t length, char *buffer_ptr, char *buffer_end, + const T &arg, const Ts &...args) { + buffer_ptr = combine_data(length, buffer_ptr, buffer_end, get_hashable_data(arg)); + + // Recurse to the next argument. + return combine(length, buffer_ptr, buffer_end, args...); + } + + /// \brief Base case for recursive, variadic combining. + /// + /// The base case when combining arguments recursively is reached when all + /// arguments have been handled. It flushes the remaining buffer and + /// constructs a hash_code. + hash_code combine(size_t length, char *buffer_ptr, char *buffer_end) { + // Check whether the entire set of values fit in the buffer. If so, we'll + // use the optimized short hashing routine and skip state entirely. + if (length == 0) + return hash_short(buffer, buffer_ptr - buffer, seed); + + // Mix the final buffer, rotating it if we did a partial fill in order to + // simulate doing a mix of the last 64-bytes. That is how the algorithm + // works when we have a contiguous byte sequence, and we want to emulate + // that here. + std::rotate(buffer, buffer_ptr, buffer_end); + + // Mix this chunk into the current state. + state.mix(buffer); + length += buffer_ptr - buffer; + + return state.finalize(length); + } +}; + +} // namespace detail +} // namespace hashing + +/// \brief Combine values into a single hash_code. +/// +/// This routine accepts a varying number of arguments of any type. It will +/// attempt to combine them into a single hash_code. For user-defined types it +/// attempts to call a \see hash_value overload (via ADL) for the type. For +/// integer and pointer types it directly combines their data into the +/// resulting hash_code. +/// +/// The result is suitable for returning from a user's hash_value +/// *implementation* for their user-defined type. Consumers of a type should +/// *not* call this routine, they should instead call 'hash_value'. +template hash_code hash_combine(const Ts &...args) { + // Recursively hash each argument using a helper class. + ::llvm_ks::hashing::detail::hash_combine_recursive_helper helper; + return helper.combine(0, helper.buffer, helper.buffer + 64, args...); +} + +// Implementation details for implementations of hash_value overloads provided +// here. +namespace hashing { +namespace detail { + +/// \brief Helper to hash the value of a single integer. +/// +/// Overloads for smaller integer types are not provided to ensure consistent +/// behavior in the presence of integral promotions. Essentially, +/// "hash_value('4')" and "hash_value('0' + 4)" should be the same. +inline hash_code hash_integer_value(uint64_t value) { + // Similar to hash_4to8_bytes but using a seed instead of length. + const uint64_t seed = get_execution_seed(); + const char *s = reinterpret_cast(&value); + const uint64_t a = fetch32(s); + return hash_16_bytes(seed + (a << 3), fetch32(s + 4)); +} + +} // namespace detail +} // namespace hashing + +// Declared and documented above, but defined here so that any of the hashing +// infrastructure is available. +template +typename std::enable_if::value, hash_code>::type +hash_value(T value) { + return ::llvm_ks::hashing::detail::hash_integer_value(value); +} + +// Declared and documented above, but defined here so that any of the hashing +// infrastructure is available. +template hash_code hash_value(const T *ptr) { + return ::llvm_ks::hashing::detail::hash_integer_value( + reinterpret_cast(ptr)); +} + +// Declared and documented above, but defined here so that any of the hashing +// infrastructure is available. +template +hash_code hash_value(const std::pair &arg) { + return hash_combine(arg.first, arg.second); +} + +// Declared and documented above, but defined here so that any of the hashing +// infrastructure is available. +template +hash_code hash_value(const std::basic_string &arg) { + return hash_combine_range(arg.begin(), arg.end()); +} + +} // namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/ADT/IndexedMap.h b/llvm/include/llvm/ADT/IndexedMap.h new file mode 100644 index 0000000..f8a28a3 --- /dev/null +++ b/llvm/include/llvm/ADT/IndexedMap.h @@ -0,0 +1,85 @@ +//===- llvm/ADT/IndexedMap.h - An index map implementation ------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements an indexed map. The index map template takes two +// types. The first is the mapped type and the second is a functor +// that maps its argument to a size_t. On instantiation a "null" value +// can be provided to be used as a "does not exist" indicator in the +// map. A member function grow() is provided that given the value of +// the maximally indexed key (the argument of the functor) makes sure +// the map has enough space for it. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_INDEXEDMAP_H +#define LLVM_ADT_INDEXEDMAP_H + +#include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/SmallVector.h" +#include +#include + +namespace llvm_ks { + +template > + class IndexedMap { + typedef typename ToIndexT::argument_type IndexT; + // Prefer SmallVector with zero inline storage over std::vector. IndexedMaps + // can grow very large and SmallVector grows more efficiently as long as T + // is trivially copyable. + typedef SmallVector StorageT; + StorageT storage_; + T nullVal_; + ToIndexT toIndex_; + + public: + IndexedMap() : nullVal_(T()) { } + + explicit IndexedMap(const T& val) : nullVal_(val) { } + + typename StorageT::reference operator[](IndexT n) { + assert(toIndex_(n) < storage_.size() && "index out of bounds!"); + return storage_[toIndex_(n)]; + } + + typename StorageT::const_reference operator[](IndexT n) const { + assert(toIndex_(n) < storage_.size() && "index out of bounds!"); + return storage_[toIndex_(n)]; + } + + void reserve(typename StorageT::size_type s) { + storage_.reserve(s); + } + + void resize(typename StorageT::size_type s) { + storage_.resize(s, nullVal_); + } + + void clear() { + storage_.clear(); + } + + void grow(IndexT n) { + unsigned NewSize = toIndex_(n) + 1; + if (NewSize > storage_.size()) + resize(NewSize); + } + + bool inBounds(IndexT n) const { + return toIndex_(n) < storage_.size(); + } + + typename StorageT::size_type size() const { + return storage_.size(); + } + }; + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/ADT/IntEqClasses.h b/llvm/include/llvm/ADT/IntEqClasses.h new file mode 100644 index 0000000..100dbb5 --- /dev/null +++ b/llvm/include/llvm/ADT/IntEqClasses.h @@ -0,0 +1,88 @@ +//===-- llvm/ADT/IntEqClasses.h - Equiv. Classes of Integers ----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// Equivalence classes for small integers. This is a mapping of the integers +// 0 .. N-1 into M equivalence classes numbered 0 .. M-1. +// +// Initially each integer has its own equivalence class. Classes are joined by +// passing a representative member of each class to join(). +// +// Once the classes are built, compress() will number them 0 .. M-1 and prevent +// further changes. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_INTEQCLASSES_H +#define LLVM_ADT_INTEQCLASSES_H + +#include "llvm/ADT/SmallVector.h" + +namespace llvm_ks { + +class IntEqClasses { + /// EC - When uncompressed, map each integer to a smaller member of its + /// equivalence class. The class leader is the smallest member and maps to + /// itself. + /// + /// When compressed, EC[i] is the equivalence class of i. + SmallVector EC; + + /// NumClasses - The number of equivalence classes when compressed, or 0 when + /// uncompressed. + unsigned NumClasses; + +public: + /// IntEqClasses - Create an equivalence class mapping for 0 .. N-1. + IntEqClasses(unsigned N = 0) : NumClasses(0) { grow(N); } + + /// grow - Increase capacity to hold 0 .. N-1, putting new integers in unique + /// equivalence classes. + /// This requires an uncompressed map. + void grow(unsigned N); + + /// clear - Clear all classes so that grow() will assign a unique class to + /// every integer. + void clear() { + EC.clear(); + NumClasses = 0; + } + + /// Join the equivalence classes of a and b. After joining classes, + /// findLeader(a) == findLeader(b). This requires an uncompressed map. + /// Returns the new leader. + unsigned join(unsigned a, unsigned b); + + /// findLeader - Compute the leader of a's equivalence class. This is the + /// smallest member of the class. + /// This requires an uncompressed map. + unsigned findLeader(unsigned a) const; + + /// compress - Compress equivalence classes by numbering them 0 .. M. + /// This makes the equivalence class map immutable. + void compress(); + + /// getNumClasses - Return the number of equivalence classes after compress() + /// was called. + unsigned getNumClasses() const { return NumClasses; } + + /// operator[] - Return a's equivalence class number, 0 .. getNumClasses()-1. + /// This requires a compressed map. + unsigned operator[](unsigned a) const { + assert(NumClasses && "operator[] called before compress()"); + return EC[a]; + } + + /// uncompress - Change back to the uncompressed representation that allows + /// editing. + void uncompress(); +}; + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/ADT/IntrusiveRefCntPtr.h b/llvm/include/llvm/ADT/IntrusiveRefCntPtr.h new file mode 100644 index 0000000..674a447 --- /dev/null +++ b/llvm/include/llvm/ADT/IntrusiveRefCntPtr.h @@ -0,0 +1,287 @@ +//== llvm/ADT/IntrusiveRefCntPtr.h - Smart Refcounting Pointer ---*- C++ -*-==// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines IntrusiveRefCntPtr, a template class that +// implements a "smart" pointer for objects that maintain their own +// internal reference count, and RefCountedBase/RefCountedBaseVPTR, two +// generic base classes for objects that wish to have their lifetimes +// managed using reference counting. +// +// IntrusiveRefCntPtr is similar to Boost's intrusive_ptr with added +// LLVM-style casting. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_INTRUSIVEREFCNTPTR_H +#define LLVM_ADT_INTRUSIVEREFCNTPTR_H + +#include +#include +#include + +namespace llvm_ks { + + template + class IntrusiveRefCntPtr; + +//===----------------------------------------------------------------------===// +/// RefCountedBase - A generic base class for objects that wish to +/// have their lifetimes managed using reference counts. Classes +/// subclass RefCountedBase to obtain such functionality, and are +/// typically handled with IntrusiveRefCntPtr "smart pointers" (see below) +/// which automatically handle the management of reference counts. +/// Objects that subclass RefCountedBase should not be allocated on +/// the stack, as invoking "delete" (which is called when the +/// reference count hits 0) on such objects is an error. +//===----------------------------------------------------------------------===// + template + class RefCountedBase { + mutable unsigned ref_cnt; + + public: + RefCountedBase() : ref_cnt(0) {} + RefCountedBase(const RefCountedBase &) : ref_cnt(0) {} + + void Retain() const { ++ref_cnt; } + void Release() const { + assert (ref_cnt > 0 && "Reference count is already zero."); + if (--ref_cnt == 0) delete static_cast(this); + } + }; + +//===----------------------------------------------------------------------===// +/// RefCountedBaseVPTR - A class that has the same function as +/// RefCountedBase, but with a virtual destructor. Should be used +/// instead of RefCountedBase for classes that already have virtual +/// methods to enforce dynamic allocation via 'new'. Classes that +/// inherit from RefCountedBaseVPTR can't be allocated on stack - +/// attempting to do this will produce a compile error. +//===----------------------------------------------------------------------===// + class RefCountedBaseVPTR { + mutable unsigned ref_cnt; + + protected: + RefCountedBaseVPTR() : ref_cnt(0) {} + RefCountedBaseVPTR(const RefCountedBaseVPTR &) : ref_cnt(0) {} + + virtual ~RefCountedBaseVPTR() {} + + void Retain() const { ++ref_cnt; } + void Release() const { + assert (ref_cnt > 0 && "Reference count is already zero."); + if (--ref_cnt == 0) delete this; + } + + template + friend struct IntrusiveRefCntPtrInfo; + }; + + + template struct IntrusiveRefCntPtrInfo { + static void retain(T *obj) { obj->Retain(); } + static void release(T *obj) { obj->Release(); } + }; + +/// \brief A thread-safe version of \c llvm_ks::RefCountedBase. +/// +/// A generic base class for objects that wish to have their lifetimes managed +/// using reference counts. Classes subclass \c ThreadSafeRefCountedBase to +/// obtain such functionality, and are typically handled with +/// \c IntrusiveRefCntPtr "smart pointers" which automatically handle the +/// management of reference counts. +template +class ThreadSafeRefCountedBase { + mutable std::atomic RefCount; + +protected: + ThreadSafeRefCountedBase() : RefCount(0) {} + +public: + void Retain() const { ++RefCount; } + + void Release() const { + int NewRefCount = --RefCount; + assert(NewRefCount >= 0 && "Reference count was already zero."); + if (NewRefCount == 0) + delete static_cast(this); + } +}; + +//===----------------------------------------------------------------------===// +/// IntrusiveRefCntPtr - A template class that implements a "smart pointer" +/// that assumes the wrapped object has a reference count associated +/// with it that can be managed via calls to +/// IntrusivePtrAddRef/IntrusivePtrRelease. The smart pointers +/// manage reference counts via the RAII idiom: upon creation of +/// smart pointer the reference count of the wrapped object is +/// incremented and upon destruction of the smart pointer the +/// reference count is decremented. This class also safely handles +/// wrapping NULL pointers. +/// +/// Reference counting is implemented via calls to +/// Obj->Retain()/Obj->Release(). Release() is required to destroy +/// the object when the reference count reaches zero. Inheriting from +/// RefCountedBase/RefCountedBaseVPTR takes care of this +/// automatically. +//===----------------------------------------------------------------------===// + template + class IntrusiveRefCntPtr { + T* Obj; + + public: + typedef T element_type; + + explicit IntrusiveRefCntPtr() : Obj(nullptr) {} + + IntrusiveRefCntPtr(T* obj) : Obj(obj) { + retain(); + } + + IntrusiveRefCntPtr(const IntrusiveRefCntPtr& S) : Obj(S.Obj) { + retain(); + } + + IntrusiveRefCntPtr(IntrusiveRefCntPtr&& S) : Obj(S.Obj) { + S.Obj = nullptr; + } + + template + IntrusiveRefCntPtr(IntrusiveRefCntPtr&& S) : Obj(S.get()) { + S.Obj = nullptr; + } + + template + IntrusiveRefCntPtr(const IntrusiveRefCntPtr& S) + : Obj(S.get()) { + retain(); + } + + IntrusiveRefCntPtr& operator=(IntrusiveRefCntPtr S) { + swap(S); + return *this; + } + + ~IntrusiveRefCntPtr() { release(); } + + T& operator*() const { return *Obj; } + + T* operator->() const { return Obj; } + + T* get() const { return Obj; } + + explicit operator bool() const { return Obj; } + + void swap(IntrusiveRefCntPtr& other) { + T* tmp = other.Obj; + other.Obj = Obj; + Obj = tmp; + } + + void reset() { + release(); + Obj = nullptr; + } + + void resetWithoutRelease() { + Obj = nullptr; + } + + private: + void retain() { if (Obj) IntrusiveRefCntPtrInfo::retain(Obj); } + void release() { if (Obj) IntrusiveRefCntPtrInfo::release(Obj); } + + template + friend class IntrusiveRefCntPtr; + }; + + template + inline bool operator==(const IntrusiveRefCntPtr& A, + const IntrusiveRefCntPtr& B) + { + return A.get() == B.get(); + } + + template + inline bool operator!=(const IntrusiveRefCntPtr& A, + const IntrusiveRefCntPtr& B) + { + return A.get() != B.get(); + } + + template + inline bool operator==(const IntrusiveRefCntPtr& A, + U* B) + { + return A.get() == B; + } + + template + inline bool operator!=(const IntrusiveRefCntPtr& A, + U* B) + { + return A.get() != B; + } + + template + inline bool operator==(T* A, + const IntrusiveRefCntPtr& B) + { + return A == B.get(); + } + + template + inline bool operator!=(T* A, + const IntrusiveRefCntPtr& B) + { + return A != B.get(); + } + + template + bool operator==(std::nullptr_t A, const IntrusiveRefCntPtr &B) { + return !B; + } + + template + bool operator==(const IntrusiveRefCntPtr &A, std::nullptr_t B) { + return B == A; + } + + template + bool operator!=(std::nullptr_t A, const IntrusiveRefCntPtr &B) { + return !(A == B); + } + + template + bool operator!=(const IntrusiveRefCntPtr &A, std::nullptr_t B) { + return !(A == B); + } + +//===----------------------------------------------------------------------===// +// LLVM-style downcasting support for IntrusiveRefCntPtr objects +//===----------------------------------------------------------------------===// + + template struct simplify_type; + + template struct simplify_type > { + typedef T* SimpleType; + static SimpleType getSimplifiedValue(IntrusiveRefCntPtr& Val) { + return Val.get(); + } + }; + + template struct simplify_type > { + typedef /*const*/ T* SimpleType; + static SimpleType getSimplifiedValue(const IntrusiveRefCntPtr& Val) { + return Val.get(); + } + }; + +} // end namespace llvm_ks + +#endif // LLVM_ADT_INTRUSIVEREFCNTPTR_H diff --git a/llvm/include/llvm/ADT/MapVector.h b/llvm/include/llvm/ADT/MapVector.h new file mode 100644 index 0000000..f7cd21f --- /dev/null +++ b/llvm/include/llvm/ADT/MapVector.h @@ -0,0 +1,200 @@ +//===- llvm/ADT/MapVector.h - Map w/ deterministic value order --*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements a map that provides insertion order iteration. The +// interface is purposefully minimal. The key is assumed to be cheap to copy +// and 2 copies are kept, one for indexing in a DenseMap, one for iteration in +// a std::vector. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_MAPVECTOR_H +#define LLVM_ADT_MAPVECTOR_H + +#include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/SmallVector.h" +#include + +namespace llvm_ks { + +/// This class implements a map that also provides access to all stored values +/// in a deterministic order. The values are kept in a std::vector and the +/// mapping is done with DenseMap from Keys to indexes in that vector. +template, + typename VectorType = std::vector > > +class MapVector { + typedef typename VectorType::size_type size_type; + + MapType Map; + VectorType Vector; + +public: + typedef typename VectorType::iterator iterator; + typedef typename VectorType::const_iterator const_iterator; + typedef typename VectorType::reverse_iterator reverse_iterator; + typedef typename VectorType::const_reverse_iterator const_reverse_iterator; + + size_type size() const { return Vector.size(); } + + iterator begin() { return Vector.begin(); } + const_iterator begin() const { return Vector.begin(); } + iterator end() { return Vector.end(); } + const_iterator end() const { return Vector.end(); } + + reverse_iterator rbegin() { return Vector.rbegin(); } + const_reverse_iterator rbegin() const { return Vector.rbegin(); } + reverse_iterator rend() { return Vector.rend(); } + const_reverse_iterator rend() const { return Vector.rend(); } + + bool empty() const { + return Vector.empty(); + } + + std::pair &front() { return Vector.front(); } + const std::pair &front() const { return Vector.front(); } + std::pair &back() { return Vector.back(); } + const std::pair &back() const { return Vector.back(); } + + void clear() { + Map.clear(); + Vector.clear(); + } + + void swap(MapVector &RHS) { + std::swap(Map, RHS.Map); + std::swap(Vector, RHS.Vector); + } + + ValueT &operator[](const KeyT &Key) { + std::pair Pair = std::make_pair(Key, 0); + std::pair Result = Map.insert(Pair); + unsigned &I = Result.first->second; + if (Result.second) { + Vector.push_back(std::make_pair(Key, ValueT())); + I = Vector.size() - 1; + } + return Vector[I].second; + } + + ValueT lookup(const KeyT &Key) const { + typename MapType::const_iterator Pos = Map.find(Key); + return Pos == Map.end()? ValueT() : Vector[Pos->second].second; + } + + std::pair insert(const std::pair &KV) { + std::pair Pair = std::make_pair(KV.first, 0); + std::pair Result = Map.insert(Pair); + unsigned &I = Result.first->second; + if (Result.second) { + Vector.push_back(std::make_pair(KV.first, KV.second)); + I = Vector.size() - 1; + return std::make_pair(std::prev(end()), true); + } + return std::make_pair(begin() + I, false); + } + + size_type count(const KeyT &Key) const { + typename MapType::const_iterator Pos = Map.find(Key); + return Pos == Map.end()? 0 : 1; + } + + iterator find(const KeyT &Key) { + typename MapType::const_iterator Pos = Map.find(Key); + return Pos == Map.end()? Vector.end() : + (Vector.begin() + Pos->second); + } + + const_iterator find(const KeyT &Key) const { + typename MapType::const_iterator Pos = Map.find(Key); + return Pos == Map.end()? Vector.end() : + (Vector.begin() + Pos->second); + } + + /// \brief Remove the last element from the vector. + void pop_back() { + typename MapType::iterator Pos = Map.find(Vector.back().first); + Map.erase(Pos); + Vector.pop_back(); + } + + /// \brief Remove the element given by Iterator. + /// + /// Returns an iterator to the element following the one which was removed, + /// which may be end(). + /// + /// \note This is a deceivingly expensive operation (linear time). It's + /// usually better to use \a remove_if() if possible. + typename VectorType::iterator erase(typename VectorType::iterator Iterator) { + Map.erase(Iterator->first); + auto Next = Vector.erase(Iterator); + if (Next == Vector.end()) + return Next; + + // Update indices in the map. + size_t Index = Next - Vector.begin(); + for (auto &I : Map) { + assert(I.second != Index && "Index was already erased!"); + if (I.second > Index) + --I.second; + } + return Next; + } + + /// \brief Remove all elements with the key value Key. + /// + /// Returns the number of elements removed. + size_type erase(const KeyT &Key) { + auto Iterator = find(Key); + if (Iterator == end()) + return 0; + erase(Iterator); + return 1; + } + + /// \brief Remove the elements that match the predicate. + /// + /// Erase all elements that match \c Pred in a single pass. Takes linear + /// time. + template void remove_if(Predicate Pred); +}; + +template +template +void MapVector::remove_if(Function Pred) { + auto O = Vector.begin(); + for (auto I = O, E = Vector.end(); I != E; ++I) { + if (Pred(*I)) { + // Erase from the map. + Map.erase(I->first); + continue; + } + + if (I != O) { + // Move the value and update the index in the map. + *O = std::move(*I); + Map[O->first] = O - Vector.begin(); + } + ++O; + } + // Erase trailing entries in the vector. + Vector.erase(O, Vector.end()); +} + +/// \brief A MapVector that performs no allocations if smaller than a certain +/// size. +template +struct SmallMapVector + : MapVector, + SmallVector, N>> { +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/ADT/None.h b/llvm/include/llvm/ADT/None.h new file mode 100644 index 0000000..08286f8 --- /dev/null +++ b/llvm/include/llvm/ADT/None.h @@ -0,0 +1,26 @@ +//===-- None.h - Simple null value for implicit construction ------*- C++ -*-=// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file provides None, an enumerator for use in implicit constructors +// of various (usually templated) types to make such construction more +// terse. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_NONE_H +#define LLVM_ADT_NONE_H + +namespace llvm_ks { +/// \brief A simple null object to allow implicit construction of Optional +/// and similar types without having to spell out the specialization's name. +enum class NoneType { None }; +const NoneType None = None; +} + +#endif diff --git a/llvm/include/llvm/ADT/Optional.h b/llvm/include/llvm/ADT/Optional.h new file mode 100644 index 0000000..817eb70 --- /dev/null +++ b/llvm/include/llvm/ADT/Optional.h @@ -0,0 +1,228 @@ +//===-- Optional.h - Simple variant for passing optional values ---*- C++ -*-=// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file provides Optional, a template class modeled in the spirit of +// OCaml's 'opt' variant. The idea is to strongly type whether or not +// a value can be optional. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_OPTIONAL_H +#define LLVM_ADT_OPTIONAL_H + +#include "llvm/ADT/None.h" +#include "llvm/Support/AlignOf.h" +#include "llvm/Support/Compiler.h" +#include +#include +#include + +namespace llvm_ks { + +template +class Optional { + AlignedCharArrayUnion storage; + bool hasVal; +public: + typedef T value_type; + + Optional(NoneType) : hasVal(false) {} + explicit Optional() : hasVal(false) {} + Optional(const T &y) : hasVal(true) { + new (storage.buffer) T(y); + } + Optional(const Optional &O) : hasVal(O.hasVal) { + if (hasVal) + new (storage.buffer) T(*O); + } + + Optional(T &&y) : hasVal(true) { + new (storage.buffer) T(std::forward(y)); + } + Optional(Optional &&O) : hasVal(O) { + if (O) { + new (storage.buffer) T(std::move(*O)); + O.reset(); + } + } + Optional &operator=(T &&y) { + if (hasVal) + **this = std::move(y); + else { + new (storage.buffer) T(std::move(y)); + hasVal = true; + } + return *this; + } + Optional &operator=(Optional &&O) { + if (!O) + reset(); + else { + *this = std::move(*O); + O.reset(); + } + return *this; + } + + /// Create a new object by constructing it in place with the given arguments. + template + void emplace(ArgTypes &&...Args) { + reset(); + hasVal = true; + new (storage.buffer) T(std::forward(Args)...); + } + + static inline Optional create(const T* y) { + return y ? Optional(*y) : Optional(); + } + + // FIXME: these assignments (& the equivalent const T&/const Optional& ctors) + // could be made more efficient by passing by value, possibly unifying them + // with the rvalue versions above - but this could place a different set of + // requirements (notably: the existence of a default ctor) when implemented + // in that way. Careful SFINAE to avoid such pitfalls would be required. + Optional &operator=(const T &y) { + if (hasVal) + **this = y; + else { + new (storage.buffer) T(y); + hasVal = true; + } + return *this; + } + + Optional &operator=(const Optional &O) { + if (!O) + reset(); + else + *this = *O; + return *this; + } + + void reset() { + if (hasVal) { + (**this).~T(); + hasVal = false; + } + } + + ~Optional() { + reset(); + } + + const T* getPointer() const { assert(hasVal); return reinterpret_cast(storage.buffer); } + T* getPointer() { assert(hasVal); return reinterpret_cast(storage.buffer); } + const T& getValue() const LLVM_LVALUE_FUNCTION { assert(hasVal); return *getPointer(); } + T& getValue() LLVM_LVALUE_FUNCTION { assert(hasVal); return *getPointer(); } + + explicit operator bool() const { return hasVal; } + bool hasValue() const { return hasVal; } + const T* operator->() const { return getPointer(); } + T* operator->() { return getPointer(); } + const T& operator*() const LLVM_LVALUE_FUNCTION { assert(hasVal); return *getPointer(); } + T& operator*() LLVM_LVALUE_FUNCTION { assert(hasVal); return *getPointer(); } + + template + LLVM_CONSTEXPR T getValueOr(U &&value) const LLVM_LVALUE_FUNCTION { + return hasValue() ? getValue() : std::forward(value); + } + +#if LLVM_HAS_RVALUE_REFERENCE_THIS + T&& getValue() && { assert(hasVal); return std::move(*getPointer()); } + T&& operator*() && { assert(hasVal); return std::move(*getPointer()); } + + template + T getValueOr(U &&value) && { + return hasValue() ? std::move(getValue()) : std::forward(value); + } +#endif +}; + +template struct isPodLike; +template struct isPodLike > { + // An Optional is pod-like if T is. + static const bool value = isPodLike::value; +}; + +/// \brief Poison comparison between two \c Optional objects. Clients needs to +/// explicitly compare the underlying values and account for empty \c Optional +/// objects. +/// +/// This routine will never be defined. It returns \c void to help diagnose +/// errors at compile time. +template +void operator==(const Optional &X, const Optional &Y); + +template +bool operator==(const Optional &X, NoneType) { + return !X.hasValue(); +} + +template +bool operator==(NoneType, const Optional &X) { + return X == None; +} + +template +bool operator!=(const Optional &X, NoneType) { + return !(X == None); +} + +template +bool operator!=(NoneType, const Optional &X) { + return X != None; +} +/// \brief Poison comparison between two \c Optional objects. Clients needs to +/// explicitly compare the underlying values and account for empty \c Optional +/// objects. +/// +/// This routine will never be defined. It returns \c void to help diagnose +/// errors at compile time. +template +void operator!=(const Optional &X, const Optional &Y); + +/// \brief Poison comparison between two \c Optional objects. Clients needs to +/// explicitly compare the underlying values and account for empty \c Optional +/// objects. +/// +/// This routine will never be defined. It returns \c void to help diagnose +/// errors at compile time. +template +void operator<(const Optional &X, const Optional &Y); + +/// \brief Poison comparison between two \c Optional objects. Clients needs to +/// explicitly compare the underlying values and account for empty \c Optional +/// objects. +/// +/// This routine will never be defined. It returns \c void to help diagnose +/// errors at compile time. +template +void operator<=(const Optional &X, const Optional &Y); + +/// \brief Poison comparison between two \c Optional objects. Clients needs to +/// explicitly compare the underlying values and account for empty \c Optional +/// objects. +/// +/// This routine will never be defined. It returns \c void to help diagnose +/// errors at compile time. +template +void operator>=(const Optional &X, const Optional &Y); + +/// \brief Poison comparison between two \c Optional objects. Clients needs to +/// explicitly compare the underlying values and account for empty \c Optional +/// objects. +/// +/// This routine will never be defined. It returns \c void to help diagnose +/// errors at compile time. +template +void operator>(const Optional &X, const Optional &Y); + +} // end llvm namespace + +#endif diff --git a/llvm/include/llvm/ADT/PointerIntPair.h b/llvm/include/llvm/ADT/PointerIntPair.h new file mode 100644 index 0000000..69a8568 --- /dev/null +++ b/llvm/include/llvm/ADT/PointerIntPair.h @@ -0,0 +1,223 @@ +//===- llvm/ADT/PointerIntPair.h - Pair for pointer and int -----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the PointerIntPair class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_POINTERINTPAIR_H +#define LLVM_ADT_POINTERINTPAIR_H + +#include "llvm/Support/Compiler.h" +#include "llvm/Support/PointerLikeTypeTraits.h" +#include +#include + +namespace llvm_ks { + +template struct DenseMapInfo; + +template +struct PointerIntPairInfo; + +/// PointerIntPair - This class implements a pair of a pointer and small +/// integer. It is designed to represent this in the space required by one +/// pointer by bitmangling the integer into the low part of the pointer. This +/// can only be done for small integers: typically up to 3 bits, but it depends +/// on the number of bits available according to PointerLikeTypeTraits for the +/// type. +/// +/// Note that PointerIntPair always puts the IntVal part in the highest bits +/// possible. For example, PointerIntPair will put the bit for +/// the bool into bit #2, not bit #0, which allows the low two bits to be used +/// for something else. For example, this allows: +/// PointerIntPair, 1, bool> +/// ... and the two bools will land in different bits. +/// +template , + typename Info = PointerIntPairInfo> +class PointerIntPair { + intptr_t Value; + +public: + PointerIntPair() : Value(0) {} + PointerIntPair(PointerTy PtrVal, IntType IntVal) { + setPointerAndInt(PtrVal, IntVal); + } + explicit PointerIntPair(PointerTy PtrVal) { initWithPointer(PtrVal); } + + PointerTy getPointer() const { return Info::getPointer(Value); } + + IntType getInt() const { + return (IntType)Info::getInt(Value); + } + + void setPointer(PointerTy PtrVal) { + Value = Info::updatePointer(Value, PtrVal); + } + + void setInt(IntType IntVal) { + Value = Info::updateInt(Value, static_cast(IntVal)); + } + + void initWithPointer(PointerTy PtrVal) { + Value = Info::updatePointer(0, PtrVal); + } + + void setPointerAndInt(PointerTy PtrVal, IntType IntVal) { + Value = Info::updateInt(Info::updatePointer(0, PtrVal), + static_cast(IntVal)); + } + + PointerTy const *getAddrOfPointer() const { + return const_cast(this)->getAddrOfPointer(); + } + + PointerTy *getAddrOfPointer() { + assert(Value == reinterpret_cast(getPointer()) && + "Can only return the address if IntBits is cleared and " + "PtrTraits doesn't change the pointer"); + return reinterpret_cast(&Value); + } + + void *getOpaqueValue() const { return reinterpret_cast(Value); } + void setFromOpaqueValue(void *Val) { + Value = reinterpret_cast(Val); + } + + static PointerIntPair getFromOpaqueValue(void *V) { + PointerIntPair P; + P.setFromOpaqueValue(V); + return P; + } + + // Allow PointerIntPairs to be created from const void * if and only if the + // pointer type could be created from a const void *. + static PointerIntPair getFromOpaqueValue(const void *V) { + (void)PtrTraits::getFromVoidPointer(V); + return getFromOpaqueValue(const_cast(V)); + } + + bool operator==(const PointerIntPair &RHS) const { + return Value == RHS.Value; + } + bool operator!=(const PointerIntPair &RHS) const { + return Value != RHS.Value; + } + bool operator<(const PointerIntPair &RHS) const { return Value < RHS.Value; } + bool operator>(const PointerIntPair &RHS) const { return Value > RHS.Value; } + bool operator<=(const PointerIntPair &RHS) const { + return Value <= RHS.Value; + } + bool operator>=(const PointerIntPair &RHS) const { + return Value >= RHS.Value; + } +}; + +template +struct PointerIntPairInfo { + static_assert(PtrTraits::NumLowBitsAvailable < + std::numeric_limits::digits, + "cannot use a pointer type that has all bits free"); + static_assert(IntBits <= PtrTraits::NumLowBitsAvailable, + "PointerIntPair with integer size too large for pointer"); + enum : uintptr_t { + /// PointerBitMask - The bits that come from the pointer. + PointerBitMask = + ~(uintptr_t)(((intptr_t)1 << PtrTraits::NumLowBitsAvailable) - 1), + + /// IntShift - The number of low bits that we reserve for other uses, and + /// keep zero. + IntShift = (uintptr_t)PtrTraits::NumLowBitsAvailable - IntBits, + + /// IntMask - This is the unshifted mask for valid bits of the int type. + IntMask = (uintptr_t)(((intptr_t)1 << IntBits) - 1), + + // ShiftedIntMask - This is the bits for the integer shifted in place. + ShiftedIntMask = (uintptr_t)(IntMask << IntShift) + }; + + static PointerT getPointer(intptr_t Value) { + return PtrTraits::getFromVoidPointer( + reinterpret_cast(Value & PointerBitMask)); + } + + static intptr_t getInt(intptr_t Value) { + return (Value >> IntShift) & IntMask; + } + + static intptr_t updatePointer(intptr_t OrigValue, PointerT Ptr) { + intptr_t PtrWord = + reinterpret_cast(PtrTraits::getAsVoidPointer(Ptr)); + assert((PtrWord & ~PointerBitMask) == 0 && + "Pointer is not sufficiently aligned"); + // Preserve all low bits, just update the pointer. + return PtrWord | (OrigValue & ~PointerBitMask); + } + + static intptr_t updateInt(intptr_t OrigValue, intptr_t Int) { + intptr_t IntWord = static_cast(Int); + assert((IntWord & ~IntMask) == 0 && "Integer too large for field"); + + // Preserve all bits other than the ones we are updating. + return (OrigValue & ~ShiftedIntMask) | IntWord << IntShift; + } +}; + +template struct isPodLike; +template +struct isPodLike> { + static const bool value = true; +}; + +// Provide specialization of DenseMapInfo for PointerIntPair. +template +struct DenseMapInfo> { + typedef PointerIntPair Ty; + static Ty getEmptyKey() { + uintptr_t Val = static_cast(-1); + Val <<= PointerLikeTypeTraits::NumLowBitsAvailable; + return Ty::getFromOpaqueValue(reinterpret_cast(Val)); + } + static Ty getTombstoneKey() { + uintptr_t Val = static_cast(-2); + Val <<= PointerLikeTypeTraits::NumLowBitsAvailable; + return Ty::getFromOpaqueValue(reinterpret_cast(Val)); + } + static unsigned getHashValue(Ty V) { + uintptr_t IV = reinterpret_cast(V.getOpaqueValue()); + return unsigned(IV) ^ unsigned(IV >> 9); + } + static bool isEqual(const Ty &LHS, const Ty &RHS) { return LHS == RHS; } +}; + +// Teach SmallPtrSet that PointerIntPair is "basically a pointer". +template +class PointerLikeTypeTraits< + PointerIntPair> { +public: + static inline void * + getAsVoidPointer(const PointerIntPair &P) { + return P.getOpaqueValue(); + } + static inline PointerIntPair + getFromVoidPointer(void *P) { + return PointerIntPair::getFromOpaqueValue(P); + } + static inline PointerIntPair + getFromVoidPointer(const void *P) { + return PointerIntPair::getFromOpaqueValue(P); + } + enum { NumLowBitsAvailable = PtrTraits::NumLowBitsAvailable - IntBits }; +}; + +} // end namespace llvm_ks +#endif diff --git a/llvm/include/llvm/ADT/PointerUnion.h b/llvm/include/llvm/ADT/PointerUnion.h new file mode 100644 index 0000000..d5000d4 --- /dev/null +++ b/llvm/include/llvm/ADT/PointerUnion.h @@ -0,0 +1,474 @@ +//===- llvm/ADT/PointerUnion.h - Discriminated Union of 2 Ptrs --*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the PointerUnion class, which is a discriminated union of +// pointer types. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_POINTERUNION_H +#define LLVM_ADT_POINTERUNION_H + +#include "llvm/ADT/DenseMapInfo.h" +#include "llvm/ADT/PointerIntPair.h" +#include "llvm/Support/Compiler.h" + +namespace llvm_ks { + +template struct PointerUnionTypeSelectorReturn { + typedef T Return; +}; + +/// Get a type based on whether two types are the same or not. +/// +/// For: +/// +/// \code +/// typedef typename PointerUnionTypeSelector::Return Ret; +/// \endcode +/// +/// Ret will be EQ type if T1 is same as T2 or NE type otherwise. +template +struct PointerUnionTypeSelector { + typedef typename PointerUnionTypeSelectorReturn::Return Return; +}; + +template +struct PointerUnionTypeSelector { + typedef typename PointerUnionTypeSelectorReturn::Return Return; +}; + +template +struct PointerUnionTypeSelectorReturn< + PointerUnionTypeSelector> { + typedef + typename PointerUnionTypeSelector::Return Return; +}; + +/// Provide PointerLikeTypeTraits for void* that is used by PointerUnion +/// for the two template arguments. +template class PointerUnionUIntTraits { +public: + static inline void *getAsVoidPointer(void *P) { return P; } + static inline void *getFromVoidPointer(void *P) { return P; } + enum { + PT1BitsAv = (int)(PointerLikeTypeTraits::NumLowBitsAvailable), + PT2BitsAv = (int)(PointerLikeTypeTraits::NumLowBitsAvailable), + NumLowBitsAvailable = PT1BitsAv < PT2BitsAv ? PT1BitsAv : PT2BitsAv + }; +}; + +/// A discriminated union of two pointer types, with the discriminator in the +/// low bit of the pointer. +/// +/// This implementation is extremely efficient in space due to leveraging the +/// low bits of the pointer, while exposing a natural and type-safe API. +/// +/// Common use patterns would be something like this: +/// PointerUnion P; +/// P = (int*)0; +/// printf("%d %d", P.is(), P.is()); // prints "1 0" +/// X = P.get(); // ok. +/// Y = P.get(); // runtime assertion failure. +/// Z = P.get(); // compile time failure. +/// P = (float*)0; +/// Y = P.get(); // ok. +/// X = P.get(); // runtime assertion failure. +template class PointerUnion { +public: + typedef PointerIntPair> + ValTy; + +private: + ValTy Val; + + struct IsPT1 { + static const int Num = 0; + }; + struct IsPT2 { + static const int Num = 1; + }; + template struct UNION_DOESNT_CONTAIN_TYPE {}; + +public: + PointerUnion() {} + + PointerUnion(PT1 V) + : Val(const_cast( + PointerLikeTypeTraits::getAsVoidPointer(V))) {} + PointerUnion(PT2 V) + : Val(const_cast(PointerLikeTypeTraits::getAsVoidPointer(V)), + 1) {} + + /// Test if the pointer held in the union is null, regardless of + /// which type it is. + bool isNull() const { + // Convert from the void* to one of the pointer types, to make sure that + // we recursively strip off low bits if we have a nested PointerUnion. + return !PointerLikeTypeTraits::getFromVoidPointer(Val.getPointer()); + } + explicit operator bool() const { return !isNull(); } + + /// Test if the Union currently holds the type matching T. + template int is() const { + typedef typename ::llvm_ks::PointerUnionTypeSelector< + PT1, T, IsPT1, ::llvm_ks::PointerUnionTypeSelector< + PT2, T, IsPT2, UNION_DOESNT_CONTAIN_TYPE>>::Return + Ty; + int TyNo = Ty::Num; + return static_cast(Val.getInt()) == TyNo; + } + + /// Returns the value of the specified pointer type. + /// + /// If the specified pointer type is incorrect, assert. + template T get() const { + assert(is() && "Invalid accessor called"); + return PointerLikeTypeTraits::getFromVoidPointer(Val.getPointer()); + } + + /// Returns the current pointer if it is of the specified pointer type, + /// otherwises returns null. + template T dyn_cast() const { + if (is()) + return get(); + return T(); + } + + /// If the union is set to the first pointer type get an address pointing to + /// it. + PT1 const *getAddrOfPtr1() const { + return const_cast(this)->getAddrOfPtr1(); + } + + /// If the union is set to the first pointer type get an address pointing to + /// it. + PT1 *getAddrOfPtr1() { + assert(is() && "Val is not the first pointer"); + assert( + get() == Val.getPointer() && + "Can't get the address because PointerLikeTypeTraits changes the ptr"); + return (PT1 *)Val.getAddrOfPointer(); + } + + /// Assignment from nullptr which just clears the union. + const PointerUnion &operator=(std::nullptr_t) { + Val.initWithPointer(nullptr); + return *this; + } + + /// Assignment operators - Allow assigning into this union from either + /// pointer type, setting the discriminator to remember what it came from. + const PointerUnion &operator=(const PT1 &RHS) { + Val.initWithPointer( + const_cast(PointerLikeTypeTraits::getAsVoidPointer(RHS))); + return *this; + } + const PointerUnion &operator=(const PT2 &RHS) { + Val.setPointerAndInt( + const_cast(PointerLikeTypeTraits::getAsVoidPointer(RHS)), + 1); + return *this; + } + + void *getOpaqueValue() const { return Val.getOpaqueValue(); } + static inline PointerUnion getFromOpaqueValue(void *VP) { + PointerUnion V; + V.Val = ValTy::getFromOpaqueValue(VP); + return V; + } +}; + +template +static bool operator==(PointerUnion lhs, PointerUnion rhs) { + return lhs.getOpaqueValue() == rhs.getOpaqueValue(); +} + +template +static bool operator!=(PointerUnion lhs, PointerUnion rhs) { + return lhs.getOpaqueValue() != rhs.getOpaqueValue(); +} + +template +static bool operator<(PointerUnion lhs, PointerUnion rhs) { + return lhs.getOpaqueValue() < rhs.getOpaqueValue(); +} + +// Teach SmallPtrSet that PointerUnion is "basically a pointer", that has +// # low bits available = min(PT1bits,PT2bits)-1. +template +class PointerLikeTypeTraits> { +public: + static inline void *getAsVoidPointer(const PointerUnion &P) { + return P.getOpaqueValue(); + } + static inline PointerUnion getFromVoidPointer(void *P) { + return PointerUnion::getFromOpaqueValue(P); + } + + // The number of bits available are the min of the two pointer types. + enum { + NumLowBitsAvailable = PointerLikeTypeTraits< + typename PointerUnion::ValTy>::NumLowBitsAvailable + }; +}; + +/// A pointer union of three pointer types. See documentation for PointerUnion +/// for usage. +template class PointerUnion3 { +public: + typedef PointerUnion InnerUnion; + typedef PointerUnion ValTy; + +private: + ValTy Val; + + struct IsInnerUnion { + ValTy Val; + IsInnerUnion(ValTy val) : Val(val) {} + template int is() const { + return Val.template is() && + Val.template get().template is(); + } + template T get() const { + return Val.template get().template get(); + } + }; + + struct IsPT3 { + ValTy Val; + IsPT3(ValTy val) : Val(val) {} + template int is() const { return Val.template is(); } + template T get() const { return Val.template get(); } + }; + +public: + PointerUnion3() {} + + PointerUnion3(PT1 V) { Val = InnerUnion(V); } + PointerUnion3(PT2 V) { Val = InnerUnion(V); } + PointerUnion3(PT3 V) { Val = V; } + + /// Test if the pointer held in the union is null, regardless of + /// which type it is. + bool isNull() const { return Val.isNull(); } + explicit operator bool() const { return !isNull(); } + + /// Test if the Union currently holds the type matching T. + template int is() const { + // If T is PT1/PT2 choose IsInnerUnion otherwise choose IsPT3. + typedef typename ::llvm_ks::PointerUnionTypeSelector< + PT1, T, IsInnerUnion, + ::llvm_ks::PointerUnionTypeSelector>::Return + Ty; + return Ty(Val).template is(); + } + + /// Returns the value of the specified pointer type. + /// + /// If the specified pointer type is incorrect, assert. + template T get() const { + assert(is() && "Invalid accessor called"); + // If T is PT1/PT2 choose IsInnerUnion otherwise choose IsPT3. + typedef typename ::llvm_ks::PointerUnionTypeSelector< + PT1, T, IsInnerUnion, + ::llvm_ks::PointerUnionTypeSelector>::Return + Ty; + return Ty(Val).template get(); + } + + /// Returns the current pointer if it is of the specified pointer type, + /// otherwises returns null. + template T dyn_cast() const { + if (is()) + return get(); + return T(); + } + + /// Assignment from nullptr which just clears the union. + const PointerUnion3 &operator=(std::nullptr_t) { + Val = nullptr; + return *this; + } + + /// Assignment operators - Allow assigning into this union from either + /// pointer type, setting the discriminator to remember what it came from. + const PointerUnion3 &operator=(const PT1 &RHS) { + Val = InnerUnion(RHS); + return *this; + } + const PointerUnion3 &operator=(const PT2 &RHS) { + Val = InnerUnion(RHS); + return *this; + } + const PointerUnion3 &operator=(const PT3 &RHS) { + Val = RHS; + return *this; + } + + void *getOpaqueValue() const { return Val.getOpaqueValue(); } + static inline PointerUnion3 getFromOpaqueValue(void *VP) { + PointerUnion3 V; + V.Val = ValTy::getFromOpaqueValue(VP); + return V; + } +}; + +// Teach SmallPtrSet that PointerUnion3 is "basically a pointer", that has +// # low bits available = min(PT1bits,PT2bits,PT2bits)-2. +template +class PointerLikeTypeTraits> { +public: + static inline void *getAsVoidPointer(const PointerUnion3 &P) { + return P.getOpaqueValue(); + } + static inline PointerUnion3 getFromVoidPointer(void *P) { + return PointerUnion3::getFromOpaqueValue(P); + } + + // The number of bits available are the min of the two pointer types. + enum { + NumLowBitsAvailable = PointerLikeTypeTraits< + typename PointerUnion3::ValTy>::NumLowBitsAvailable + }; +}; + +/// A pointer union of four pointer types. See documentation for PointerUnion +/// for usage. +template +class PointerUnion4 { +public: + typedef PointerUnion InnerUnion1; + typedef PointerUnion InnerUnion2; + typedef PointerUnion ValTy; + +private: + ValTy Val; + +public: + PointerUnion4() {} + + PointerUnion4(PT1 V) { Val = InnerUnion1(V); } + PointerUnion4(PT2 V) { Val = InnerUnion1(V); } + PointerUnion4(PT3 V) { Val = InnerUnion2(V); } + PointerUnion4(PT4 V) { Val = InnerUnion2(V); } + + /// Test if the pointer held in the union is null, regardless of + /// which type it is. + bool isNull() const { return Val.isNull(); } + explicit operator bool() const { return !isNull(); } + + /// Test if the Union currently holds the type matching T. + template int is() const { + // If T is PT1/PT2 choose InnerUnion1 otherwise choose InnerUnion2. + typedef typename ::llvm_ks::PointerUnionTypeSelector< + PT1, T, InnerUnion1, ::llvm_ks::PointerUnionTypeSelector< + PT2, T, InnerUnion1, InnerUnion2>>::Return Ty; + return Val.template is() && Val.template get().template is(); + } + + /// Returns the value of the specified pointer type. + /// + /// If the specified pointer type is incorrect, assert. + template T get() const { + assert(is() && "Invalid accessor called"); + // If T is PT1/PT2 choose InnerUnion1 otherwise choose InnerUnion2. + typedef typename ::llvm_ks::PointerUnionTypeSelector< + PT1, T, InnerUnion1, ::llvm_ks::PointerUnionTypeSelector< + PT2, T, InnerUnion1, InnerUnion2>>::Return Ty; + return Val.template get().template get(); + } + + /// Returns the current pointer if it is of the specified pointer type, + /// otherwises returns null. + template T dyn_cast() const { + if (is()) + return get(); + return T(); + } + + /// Assignment from nullptr which just clears the union. + const PointerUnion4 &operator=(std::nullptr_t) { + Val = nullptr; + return *this; + } + + /// Assignment operators - Allow assigning into this union from either + /// pointer type, setting the discriminator to remember what it came from. + const PointerUnion4 &operator=(const PT1 &RHS) { + Val = InnerUnion1(RHS); + return *this; + } + const PointerUnion4 &operator=(const PT2 &RHS) { + Val = InnerUnion1(RHS); + return *this; + } + const PointerUnion4 &operator=(const PT3 &RHS) { + Val = InnerUnion2(RHS); + return *this; + } + const PointerUnion4 &operator=(const PT4 &RHS) { + Val = InnerUnion2(RHS); + return *this; + } + + void *getOpaqueValue() const { return Val.getOpaqueValue(); } + static inline PointerUnion4 getFromOpaqueValue(void *VP) { + PointerUnion4 V; + V.Val = ValTy::getFromOpaqueValue(VP); + return V; + } +}; + +// Teach SmallPtrSet that PointerUnion4 is "basically a pointer", that has +// # low bits available = min(PT1bits,PT2bits,PT2bits)-2. +template +class PointerLikeTypeTraits> { +public: + static inline void * + getAsVoidPointer(const PointerUnion4 &P) { + return P.getOpaqueValue(); + } + static inline PointerUnion4 getFromVoidPointer(void *P) { + return PointerUnion4::getFromOpaqueValue(P); + } + + // The number of bits available are the min of the two pointer types. + enum { + NumLowBitsAvailable = PointerLikeTypeTraits< + typename PointerUnion4::ValTy>::NumLowBitsAvailable + }; +}; + +// Teach DenseMap how to use PointerUnions as keys. +template struct DenseMapInfo> { + typedef PointerUnion Pair; + typedef DenseMapInfo FirstInfo; + typedef DenseMapInfo SecondInfo; + + static inline Pair getEmptyKey() { return Pair(FirstInfo::getEmptyKey()); } + static inline Pair getTombstoneKey() { + return Pair(FirstInfo::getTombstoneKey()); + } + static unsigned getHashValue(const Pair &PairVal) { + intptr_t key = (intptr_t)PairVal.getOpaqueValue(); + return DenseMapInfo::getHashValue(key); + } + static bool isEqual(const Pair &LHS, const Pair &RHS) { + return LHS.template is() == RHS.template is() && + (LHS.template is() ? FirstInfo::isEqual(LHS.template get(), + RHS.template get()) + : SecondInfo::isEqual(LHS.template get(), + RHS.template get())); + } +}; + +} + +#endif diff --git a/llvm/include/llvm/ADT/STLExtras.h b/llvm/include/llvm/ADT/STLExtras.h new file mode 100644 index 0000000..3346de9 --- /dev/null +++ b/llvm/include/llvm/ADT/STLExtras.h @@ -0,0 +1,472 @@ +//===- llvm/ADT/STLExtras.h - Useful STL related functions ------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains some templates that are useful if you are working with the +// STL at all. +// +// No library is required when using these functions. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_STLEXTRAS_H +#define LLVM_ADT_STLEXTRAS_H + +#include "llvm/Support/Compiler.h" +#include // for std::all_of +#include +#include // for std::size_t +#include // for qsort +#include +#include +#include +#include // for std::pair + +namespace llvm_ks { + +//===----------------------------------------------------------------------===// +// Extra additions to +//===----------------------------------------------------------------------===// + +template +struct identity : public std::unary_function { + Ty &operator()(Ty &self) const { + return self; + } + const Ty &operator()(const Ty &self) const { + return self; + } +}; + +template +struct less_ptr : public std::binary_function { + bool operator()(const Ty* left, const Ty* right) const { + return *left < *right; + } +}; + +template +struct greater_ptr : public std::binary_function { + bool operator()(const Ty* left, const Ty* right) const { + return *right < *left; + } +}; + +/// An efficient, type-erasing, non-owning reference to a callable. This is +/// intended for use as the type of a function parameter that is not used +/// after the function in question returns. +/// +/// This class does not own the callable, so it is not in general safe to store +/// a function_ref. +template class function_ref; + +template +class function_ref { + Ret (*callback)(intptr_t callable, Params ...params); + intptr_t callable; + + template + static Ret callback_fn(intptr_t callable, Params ...params) { + return (*reinterpret_cast(callable))( + std::forward(params)...); + } + +public: + template + function_ref(Callable &&callable, + typename std::enable_if< + !std::is_same::type, + function_ref>::value>::type * = nullptr) + : callback(callback_fn::type>), + callable(reinterpret_cast(&callable)) {} + Ret operator()(Params ...params) const { + return callback(callable, std::forward(params)...); + } +}; + +// deleter - Very very very simple method that is used to invoke operator +// delete on something. It is used like this: +// +// for_each(V.begin(), B.end(), deleter); +// +template +inline void deleter(T *Ptr) { + delete Ptr; +} + + + +//===----------------------------------------------------------------------===// +// Extra additions to +//===----------------------------------------------------------------------===// + +// mapped_iterator - This is a simple iterator adapter that causes a function to +// be dereferenced whenever operator* is invoked on the iterator. +// +template +class mapped_iterator { + RootIt current; + UnaryFunc Fn; +public: + typedef typename std::iterator_traits::iterator_category + iterator_category; + typedef typename std::iterator_traits::difference_type + difference_type; + typedef typename UnaryFunc::result_type value_type; + + typedef void pointer; + //typedef typename UnaryFunc::result_type *pointer; + typedef void reference; // Can't modify value returned by fn + + typedef RootIt iterator_type; + + inline const RootIt &getCurrent() const { return current; } + inline const UnaryFunc &getFunc() const { return Fn; } + + inline explicit mapped_iterator(const RootIt &I, UnaryFunc F) + : current(I), Fn(F) {} + + inline value_type operator*() const { // All this work to do this + return Fn(*current); // little change + } + + mapped_iterator &operator++() { + ++current; + return *this; + } + mapped_iterator &operator--() { + --current; + return *this; + } + mapped_iterator operator++(int) { + mapped_iterator __tmp = *this; + ++current; + return __tmp; + } + mapped_iterator operator--(int) { + mapped_iterator __tmp = *this; + --current; + return __tmp; + } + mapped_iterator operator+(difference_type n) const { + return mapped_iterator(current + n, Fn); + } + mapped_iterator &operator+=(difference_type n) { + current += n; + return *this; + } + mapped_iterator operator-(difference_type n) const { + return mapped_iterator(current - n, Fn); + } + mapped_iterator &operator-=(difference_type n) { + current -= n; + return *this; + } + reference operator[](difference_type n) const { return *(*this + n); } + + bool operator!=(const mapped_iterator &X) const { return !operator==(X); } + bool operator==(const mapped_iterator &X) const { + return current == X.current; + } + bool operator<(const mapped_iterator &X) const { return current < X.current; } + + difference_type operator-(const mapped_iterator &X) const { + return current - X.current; + } +}; + +template +inline mapped_iterator +operator+(typename mapped_iterator::difference_type N, + const mapped_iterator &X) { + return mapped_iterator(X.getCurrent() - N, X.getFunc()); +} + + +// map_iterator - Provide a convenient way to create mapped_iterators, just like +// make_pair is useful for creating pairs... +// +template +inline mapped_iterator map_iterator(const ItTy &I, FuncTy F) { + return mapped_iterator(I, F); +} + +/// \brief Metafunction to determine if type T has a member called rbegin(). +template struct has_rbegin { + template static char(&f(const U &, decltype(&U::rbegin)))[1]; + static char(&f(...))[2]; + const static bool value = sizeof(f(std::declval(), nullptr)) == 1; +}; + +// Returns an iterator_range over the given container which iterates in reverse. +// Note that the container must have rbegin()/rend() methods for this to work. +template +auto reverse(ContainerTy &&C, + typename std::enable_if::value>::type * = + nullptr) -> decltype(make_range(C.rbegin(), C.rend())) { + return make_range(C.rbegin(), C.rend()); +} + +// Returns a std::reverse_iterator wrapped around the given iterator. +template +std::reverse_iterator make_reverse_iterator(IteratorTy It) { + return std::reverse_iterator(It); +} + +// Returns an iterator_range over the given container which iterates in reverse. +// Note that the container must have begin()/end() methods which return +// bidirectional iterators for this to work. +template +auto reverse( + ContainerTy &&C, + typename std::enable_if::value>::type * = nullptr) + -> decltype(make_range(llvm_ks::make_reverse_iterator(std::end(C)), + llvm_ks::make_reverse_iterator(std::begin(C)))) { + return make_range(llvm_ks::make_reverse_iterator(std::end(C)), + llvm_ks::make_reverse_iterator(std::begin(C))); +} + +//===----------------------------------------------------------------------===// +// Extra additions to +//===----------------------------------------------------------------------===// + +/// \brief Function object to check whether the first component of a std::pair +/// compares less than the first component of another std::pair. +struct less_first { + template bool operator()(const T &lhs, const T &rhs) const { + return lhs.first < rhs.first; + } +}; + +/// \brief Function object to check whether the second component of a std::pair +/// compares less than the second component of another std::pair. +struct less_second { + template bool operator()(const T &lhs, const T &rhs) const { + return lhs.second < rhs.second; + } +}; + +// A subset of N3658. More stuff can be added as-needed. + +/// \brief Represents a compile-time sequence of integers. +template struct integer_sequence { + typedef T value_type; + + static LLVM_CONSTEXPR size_t size() { return sizeof...(I); } +}; + +/// \brief Alias for the common case of a sequence of size_ts. +template +struct index_sequence : integer_sequence {}; + +template +struct build_index_impl : build_index_impl {}; +template +struct build_index_impl<0, I...> : index_sequence {}; + +/// \brief Creates a compile-time integer sequence for a parameter pack. +template +struct index_sequence_for : build_index_impl {}; + +//===----------------------------------------------------------------------===// +// Extra additions for arrays +//===----------------------------------------------------------------------===// + +/// Find the length of an array. +template +LLVM_CONSTEXPR inline size_t array_lengthof(T (&)[N]) { + return N; +} + +/// Adapt std::less for array_pod_sort. +template +inline int array_pod_sort_comparator(const void *P1, const void *P2) { + if (std::less()(*reinterpret_cast(P1), + *reinterpret_cast(P2))) + return -1; + if (std::less()(*reinterpret_cast(P2), + *reinterpret_cast(P1))) + return 1; + return 0; +} + +/// get_array_pod_sort_comparator - This is an internal helper function used to +/// get type deduction of T right. +template +inline int (*get_array_pod_sort_comparator(const T &)) + (const void*, const void*) { + return array_pod_sort_comparator; +} + + +/// array_pod_sort - This sorts an array with the specified start and end +/// extent. This is just like std::sort, except that it calls qsort instead of +/// using an inlined template. qsort is slightly slower than std::sort, but +/// most sorts are not performance critical in LLVM and std::sort has to be +/// template instantiated for each type, leading to significant measured code +/// bloat. This function should generally be used instead of std::sort where +/// possible. +/// +/// This function assumes that you have simple POD-like types that can be +/// compared with std::less and can be moved with memcpy. If this isn't true, +/// you should use std::sort. +/// +/// NOTE: If qsort_r were portable, we could allow a custom comparator and +/// default to std::less. +template +inline void array_pod_sort(IteratorTy Start, IteratorTy End) { + // Don't inefficiently call qsort with one element or trigger undefined + // behavior with an empty sequence. + auto NElts = End - Start; + if (NElts <= 1) return; + qsort(&*Start, NElts, sizeof(*Start), get_array_pod_sort_comparator(*Start)); +} + +template +inline void array_pod_sort( + IteratorTy Start, IteratorTy End, + int (*Compare)( + const typename std::iterator_traits::value_type *, + const typename std::iterator_traits::value_type *)) { + // Don't inefficiently call qsort with one element or trigger undefined + // behavior with an empty sequence. + auto NElts = End - Start; + if (NElts <= 1) return; + qsort(&*Start, NElts, sizeof(*Start), + reinterpret_cast(Compare)); +} + +//===----------------------------------------------------------------------===// +// Extra additions to +//===----------------------------------------------------------------------===// + +/// For a container of pointers, deletes the pointers and then clears the +/// container. +template +void DeleteContainerPointers(Container &C) { + for (typename Container::iterator I = C.begin(), E = C.end(); I != E; ++I) + delete *I; + C.clear(); +} + +/// In a container of pairs (usually a map) whose second element is a pointer, +/// deletes the second elements and then clears the container. +template +void DeleteContainerSeconds(Container &C) { + for (typename Container::iterator I = C.begin(), E = C.end(); I != E; ++I) + delete I->second; + C.clear(); +} + +/// Provide wrappers to std::all_of which take ranges instead of having to pass +/// begin/end explicitly. +template +bool all_of(R &&Range, UnaryPredicate &&P) { + return std::all_of(Range.begin(), Range.end(), + std::forward(P)); +} + +/// Provide wrappers to std::any_of which take ranges instead of having to pass +/// begin/end explicitly. +template +bool any_of(R &&Range, UnaryPredicate &&P) { + return std::any_of(Range.begin(), Range.end(), + std::forward(P)); +} + +/// Provide wrappers to std::find which take ranges instead of having to pass +/// begin/end explicitly. +template +auto find(R &&Range, const T &val) -> decltype(Range.begin()) { + return std::find(Range.begin(), Range.end(), val); +} + +//===----------------------------------------------------------------------===// +// Extra additions to +//===----------------------------------------------------------------------===// + +// Implement make_unique according to N3656. + +/// \brief Constructs a `new T()` with the given args and returns a +/// `unique_ptr` which owns the object. +/// +/// Example: +/// +/// auto p = make_unique(); +/// auto p = make_unique>(0, 1); +template +typename std::enable_if::value, std::unique_ptr>::type +make_unique(Args &&... args) { + return std::unique_ptr(new T(std::forward(args)...)); +} + +/// \brief Constructs a `new T[n]` with the given args and returns a +/// `unique_ptr` which owns the object. +/// +/// \param n size of the new array. +/// +/// Example: +/// +/// auto p = make_unique(2); // value-initializes the array with 0's. +template +typename std::enable_if::value && std::extent::value == 0, + std::unique_ptr>::type +make_unique(size_t n) { + return std::unique_ptr(new typename std::remove_extent::type[n]()); +} + +/// This function isn't used and is only here to provide better compile errors. +template +typename std::enable_if::value != 0>::type +make_unique(Args &&...) = delete; + +struct FreeDeleter { + void operator()(void* v) { + ::free(v); + } +}; + +template +struct pair_hash { + size_t operator()(const std::pair &P) const { + return std::hash()(P.first) * 31 + std::hash()(P.second); + } +}; + +/// A functor like C++14's std::less in its absence. +struct less { + template bool operator()(A &&a, B &&b) const { + return std::forward(a) < std::forward(b); + } +}; + +/// A functor like C++14's std::equal in its absence. +struct equal { + template bool operator()(A &&a, B &&b) const { + return std::forward(a) == std::forward(b); + } +}; + +/// Binary functor that adapts to any other binary functor after dereferencing +/// operands. +template struct deref { + T func; + // Could be further improved to cope with non-derivable functors and + // non-binary functors (should be a variadic template member function + // operator()). + template + auto operator()(A &lhs, B &rhs) const -> decltype(func(*lhs, *rhs)) { + assert(lhs); + assert(rhs); + return func(*lhs, *rhs); + } +}; + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/ADT/SetVector.h b/llvm/include/llvm/ADT/SetVector.h new file mode 100644 index 0000000..df3464a --- /dev/null +++ b/llvm/include/llvm/ADT/SetVector.h @@ -0,0 +1,255 @@ +//===- llvm/ADT/SetVector.h - Set with insert order iteration ---*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements a set that has insertion order iteration +// characteristics. This is useful for keeping a set of things that need to be +// visited later but in a deterministic order (insertion order). The interface +// is purposefully minimal. +// +// This file defines SetVector and SmallSetVector, which performs no allocations +// if the SetVector has less than a certain number of elements. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_SETVECTOR_H +#define LLVM_ADT_SETVECTOR_H + +#include "llvm/ADT/DenseSet.h" +#include "llvm/ADT/SmallSet.h" +#include +#include +#include + +namespace llvm_ks { + +/// \brief A vector that has set insertion semantics. +/// +/// This adapter class provides a way to keep a set of things that also has the +/// property of a deterministic iteration order. The order of iteration is the +/// order of insertion. +template , + typename Set = DenseSet> +class SetVector { +public: + typedef T value_type; + typedef T key_type; + typedef T& reference; + typedef const T& const_reference; + typedef Set set_type; + typedef Vector vector_type; + typedef typename vector_type::const_iterator iterator; + typedef typename vector_type::const_iterator const_iterator; + typedef typename vector_type::const_reverse_iterator reverse_iterator; + typedef typename vector_type::const_reverse_iterator const_reverse_iterator; + typedef typename vector_type::size_type size_type; + + /// \brief Construct an empty SetVector + SetVector() {} + + /// \brief Initialize a SetVector with a range of elements + template + SetVector(It Start, It End) { + insert(Start, End); + } + + ArrayRef getArrayRef() const { return vector_; } + + /// \brief Determine if the SetVector is empty or not. + bool empty() const { + return vector_.empty(); + } + + /// \brief Determine the number of elements in the SetVector. + size_type size() const { + return vector_.size(); + } + + /// \brief Get an iterator to the beginning of the SetVector. + iterator begin() { + return vector_.begin(); + } + + /// \brief Get a const_iterator to the beginning of the SetVector. + const_iterator begin() const { + return vector_.begin(); + } + + /// \brief Get an iterator to the end of the SetVector. + iterator end() { + return vector_.end(); + } + + /// \brief Get a const_iterator to the end of the SetVector. + const_iterator end() const { + return vector_.end(); + } + + /// \brief Get an reverse_iterator to the end of the SetVector. + reverse_iterator rbegin() { + return vector_.rbegin(); + } + + /// \brief Get a const_reverse_iterator to the end of the SetVector. + const_reverse_iterator rbegin() const { + return vector_.rbegin(); + } + + /// \brief Get a reverse_iterator to the beginning of the SetVector. + reverse_iterator rend() { + return vector_.rend(); + } + + /// \brief Get a const_reverse_iterator to the beginning of the SetVector. + const_reverse_iterator rend() const { + return vector_.rend(); + } + + /// \brief Return the last element of the SetVector. + const T &back() const { + assert(!empty() && "Cannot call back() on empty SetVector!"); + return vector_.back(); + } + + /// \brief Index into the SetVector. + const_reference operator[](size_type n) const { + assert(n < vector_.size() && "SetVector access out of range!"); + return vector_[n]; + } + + /// \brief Insert a new element into the SetVector. + /// \returns true iff the element was inserted into the SetVector. + bool insert(const value_type &X) { + bool result = set_.insert(X).second; + if (result) + vector_.push_back(X); + return result; + } + + /// \brief Insert a range of elements into the SetVector. + template + void insert(It Start, It End) { + for (; Start != End; ++Start) + if (set_.insert(*Start).second) + vector_.push_back(*Start); + } + + /// \brief Remove an item from the set vector. + bool remove(const value_type& X) { + if (set_.erase(X)) { + typename vector_type::iterator I = + std::find(vector_.begin(), vector_.end(), X); + assert(I != vector_.end() && "Corrupted SetVector instances!"); + vector_.erase(I); + return true; + } + return false; + } + + /// \brief Remove items from the set vector based on a predicate function. + /// + /// This is intended to be equivalent to the following code, if we could + /// write it: + /// + /// \code + /// V.erase(std::remove_if(V.begin(), V.end(), P), V.end()); + /// \endcode + /// + /// However, SetVector doesn't expose non-const iterators, making any + /// algorithm like remove_if impossible to use. + /// + /// \returns true if any element is removed. + template + bool remove_if(UnaryPredicate P) { + typename vector_type::iterator I + = std::remove_if(vector_.begin(), vector_.end(), + TestAndEraseFromSet(P, set_)); + if (I == vector_.end()) + return false; + vector_.erase(I, vector_.end()); + return true; + } + + /// \brief Count the number of elements of a given key in the SetVector. + /// \returns 0 if the element is not in the SetVector, 1 if it is. + size_type count(const key_type &key) const { + return set_.count(key); + } + + /// \brief Completely clear the SetVector + void clear() { + set_.clear(); + vector_.clear(); + } + + /// \brief Remove the last element of the SetVector. + void pop_back() { + assert(!empty() && "Cannot remove an element from an empty SetVector!"); + set_.erase(back()); + vector_.pop_back(); + } + + T LLVM_ATTRIBUTE_UNUSED_RESULT pop_back_val() { + T Ret = back(); + pop_back(); + return Ret; + } + + bool operator==(const SetVector &that) const { + return vector_ == that.vector_; + } + + bool operator!=(const SetVector &that) const { + return vector_ != that.vector_; + } + +private: + /// \brief A wrapper predicate designed for use with std::remove_if. + /// + /// This predicate wraps a predicate suitable for use with std::remove_if to + /// call set_.erase(x) on each element which is slated for removal. + template + class TestAndEraseFromSet { + UnaryPredicate P; + set_type &set_; + + public: + TestAndEraseFromSet(UnaryPredicate P, set_type &set_) : P(P), set_(set_) {} + + template + bool operator()(const ArgumentT &Arg) { + if (P(Arg)) { + set_.erase(Arg); + return true; + } + return false; + } + }; + + set_type set_; ///< The set. + vector_type vector_; ///< The vector. +}; + +/// \brief A SetVector that performs no allocations if smaller than +/// a certain size. +template +class SmallSetVector : public SetVector, SmallSet > { +public: + SmallSetVector() {} + + /// \brief Initialize a SmallSetVector with a range of elements + template + SmallSetVector(It Start, It End) { + this->insert(Start, End); + } +}; + +} // End llvm namespace + +// vim: sw=2 ai +#endif diff --git a/llvm/include/llvm/ADT/SmallPtrSet.h b/llvm/include/llvm/ADT/SmallPtrSet.h new file mode 100644 index 0000000..b532d1a --- /dev/null +++ b/llvm/include/llvm/ADT/SmallPtrSet.h @@ -0,0 +1,384 @@ +//===- llvm/ADT/SmallPtrSet.h - 'Normally small' pointer set ----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the SmallPtrSet class. See the doxygen comment for +// SmallPtrSetImplBase for more details on the algorithm used. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_SMALLPTRSET_H +#define LLVM_ADT_SMALLPTRSET_H + +#include "llvm/Support/Compiler.h" +#include "llvm/Support/DataTypes.h" +#include "llvm/Support/PointerLikeTypeTraits.h" +#include +#include +#include +#include +#include +#include + +namespace llvm_ks { + +class SmallPtrSetIteratorImpl; + +/// SmallPtrSetImplBase - This is the common code shared among all the +/// SmallPtrSet<>'s, which is almost everything. SmallPtrSet has two modes, one +/// for small and one for large sets. +/// +/// Small sets use an array of pointers allocated in the SmallPtrSet object, +/// which is treated as a simple array of pointers. When a pointer is added to +/// the set, the array is scanned to see if the element already exists, if not +/// the element is 'pushed back' onto the array. If we run out of space in the +/// array, we grow into the 'large set' case. SmallSet should be used when the +/// sets are often small. In this case, no memory allocation is used, and only +/// light-weight and cache-efficient scanning is used. +/// +/// Large sets use a classic exponentially-probed hash table. Empty buckets are +/// represented with an illegal pointer value (-1) to allow null pointers to be +/// inserted. Tombstones are represented with another illegal pointer value +/// (-2), to allow deletion. The hash table is resized when the table is 3/4 or +/// more. When this happens, the table is doubled in size. +/// +class SmallPtrSetImplBase { + friend class SmallPtrSetIteratorImpl; + +protected: + /// SmallArray - Points to a fixed size set of buckets, used in 'small mode'. + const void **SmallArray; + /// CurArray - This is the current set of buckets. If equal to SmallArray, + /// then the set is in 'small mode'. + const void **CurArray; + /// CurArraySize - The allocated size of CurArray, always a power of two. + unsigned CurArraySize; + + // If small, this is # elts allocated consecutively + unsigned NumElements; + unsigned NumTombstones; + + // Helpers to copy and move construct a SmallPtrSet. + SmallPtrSetImplBase(const void **SmallStorage, + const SmallPtrSetImplBase &that); + SmallPtrSetImplBase(const void **SmallStorage, unsigned SmallSize, + SmallPtrSetImplBase &&that); + explicit SmallPtrSetImplBase(const void **SmallStorage, unsigned SmallSize) : + SmallArray(SmallStorage), CurArray(SmallStorage), CurArraySize(SmallSize) { + assert(SmallSize && (SmallSize & (SmallSize-1)) == 0 && + "Initial size must be a power of two!"); + clear(); + } + ~SmallPtrSetImplBase() { + if (!isSmall()) + free(CurArray); + } + +public: + typedef unsigned size_type; + bool LLVM_ATTRIBUTE_UNUSED_RESULT empty() const { return size() == 0; } + size_type size() const { return NumElements; } + + void clear() { + // If the capacity of the array is huge, and the # elements used is small, + // shrink the array. + if (!isSmall() && NumElements*4 < CurArraySize && CurArraySize > 32) + return shrink_and_clear(); + + // Fill the array with empty markers. + memset(CurArray, -1, CurArraySize*sizeof(void*)); + NumElements = 0; + NumTombstones = 0; + } + +protected: + static void *getTombstoneMarker() { return reinterpret_cast(-2); } + static void *getEmptyMarker() { + // Note that -1 is chosen to make clear() efficiently implementable with + // memset and because it's not a valid pointer value. + return reinterpret_cast(-1); + } + + /// insert_imp - This returns true if the pointer was new to the set, false if + /// it was already in the set. This is hidden from the client so that the + /// derived class can check that the right type of pointer is passed in. + std::pair insert_imp(const void *Ptr) { + if (isSmall()) { + // Check to see if it is already in the set. + for (const void **APtr = SmallArray, **E = SmallArray+NumElements; + APtr != E; ++APtr) + if (*APtr == Ptr) + return std::make_pair(APtr, false); + + // Nope, there isn't. If we stay small, just 'pushback' now. + if (NumElements < CurArraySize) { + SmallArray[NumElements++] = Ptr; + return std::make_pair(SmallArray + (NumElements - 1), true); + } + // Otherwise, hit the big set case, which will call grow. + } + return insert_imp_big(Ptr); + } + + /// erase_imp - If the set contains the specified pointer, remove it and + /// return true, otherwise return false. This is hidden from the client so + /// that the derived class can check that the right type of pointer is passed + /// in. + bool erase_imp(const void * Ptr); + + bool count_imp(const void * Ptr) const { + if (isSmall()) { + // Linear search for the item. + for (const void *const *APtr = SmallArray, + *const *E = SmallArray+NumElements; APtr != E; ++APtr) + if (*APtr == Ptr) + return true; + return false; + } + + // Big set case. + return *FindBucketFor(Ptr) == Ptr; + } + +private: + bool isSmall() const { return CurArray == SmallArray; } + + std::pair insert_imp_big(const void *Ptr); + + const void * const *FindBucketFor(const void *Ptr) const; + void shrink_and_clear(); + + /// Grow - Allocate a larger backing store for the buckets and move it over. + void Grow(unsigned NewSize); + + void operator=(const SmallPtrSetImplBase &RHS) = delete; + +protected: + /// swap - Swaps the elements of two sets. + /// Note: This method assumes that both sets have the same small size. + void swap(SmallPtrSetImplBase &RHS); + + void CopyFrom(const SmallPtrSetImplBase &RHS); + void MoveFrom(unsigned SmallSize, SmallPtrSetImplBase &&RHS); + +private: + /// Code shared by MoveFrom() and move constructor. + void MoveHelper(unsigned SmallSize, SmallPtrSetImplBase &&RHS); + /// Code shared by CopyFrom() and copy constructor. + void CopyHelper(const SmallPtrSetImplBase &RHS); +}; + +/// SmallPtrSetIteratorImpl - This is the common base class shared between all +/// instances of SmallPtrSetIterator. +class SmallPtrSetIteratorImpl { +protected: + const void *const *Bucket; + const void *const *End; + +public: + explicit SmallPtrSetIteratorImpl(const void *const *BP, const void*const *E) + : Bucket(BP), End(E) { + AdvanceIfNotValid(); + } + + bool operator==(const SmallPtrSetIteratorImpl &RHS) const { + return Bucket == RHS.Bucket; + } + bool operator!=(const SmallPtrSetIteratorImpl &RHS) const { + return Bucket != RHS.Bucket; + } + +protected: + /// AdvanceIfNotValid - If the current bucket isn't valid, advance to a bucket + /// that is. This is guaranteed to stop because the end() bucket is marked + /// valid. + void AdvanceIfNotValid() { + assert(Bucket <= End); + while (Bucket != End && + (*Bucket == SmallPtrSetImplBase::getEmptyMarker() || + *Bucket == SmallPtrSetImplBase::getTombstoneMarker())) + ++Bucket; + } +}; + +/// SmallPtrSetIterator - This implements a const_iterator for SmallPtrSet. +template +class SmallPtrSetIterator : public SmallPtrSetIteratorImpl { + typedef PointerLikeTypeTraits PtrTraits; + +public: + typedef PtrTy value_type; + typedef PtrTy reference; + typedef PtrTy pointer; + typedef std::ptrdiff_t difference_type; + typedef std::forward_iterator_tag iterator_category; + + explicit SmallPtrSetIterator(const void *const *BP, const void *const *E) + : SmallPtrSetIteratorImpl(BP, E) {} + + // Most methods provided by baseclass. + + const PtrTy operator*() const { + assert(Bucket < End); + return PtrTraits::getFromVoidPointer(const_cast(*Bucket)); + } + + inline SmallPtrSetIterator& operator++() { // Preincrement + ++Bucket; + AdvanceIfNotValid(); + return *this; + } + + SmallPtrSetIterator operator++(int) { // Postincrement + SmallPtrSetIterator tmp = *this; ++*this; return tmp; + } +}; + +/// RoundUpToPowerOfTwo - This is a helper template that rounds N up to the next +/// power of two (which means N itself if N is already a power of two). +template +struct RoundUpToPowerOfTwo; + +/// RoundUpToPowerOfTwoH - If N is not a power of two, increase it. This is a +/// helper template used to implement RoundUpToPowerOfTwo. +template +struct RoundUpToPowerOfTwoH { + enum { Val = N }; +}; +template +struct RoundUpToPowerOfTwoH { + enum { + // We could just use NextVal = N+1, but this converges faster. N|(N-1) sets + // the right-most zero bits to one all at once, e.g. 0b0011000 -> 0b0011111. + Val = RoundUpToPowerOfTwo<(N|(N-1)) + 1>::Val + }; +}; + +template +struct RoundUpToPowerOfTwo { + enum { Val = RoundUpToPowerOfTwoH::Val }; +}; + +/// \brief A templated base class for \c SmallPtrSet which provides the +/// typesafe interface that is common across all small sizes. +/// +/// This is particularly useful for passing around between interface boundaries +/// to avoid encoding a particular small size in the interface boundary. +template +class SmallPtrSetImpl : public SmallPtrSetImplBase { + typedef PointerLikeTypeTraits PtrTraits; + + SmallPtrSetImpl(const SmallPtrSetImpl &) = delete; + +protected: + // Constructors that forward to the base. + SmallPtrSetImpl(const void **SmallStorage, const SmallPtrSetImpl &that) + : SmallPtrSetImplBase(SmallStorage, that) {} + SmallPtrSetImpl(const void **SmallStorage, unsigned SmallSize, + SmallPtrSetImpl &&that) + : SmallPtrSetImplBase(SmallStorage, SmallSize, std::move(that)) {} + explicit SmallPtrSetImpl(const void **SmallStorage, unsigned SmallSize) + : SmallPtrSetImplBase(SmallStorage, SmallSize) {} + +public: + typedef SmallPtrSetIterator iterator; + typedef SmallPtrSetIterator const_iterator; + + /// Inserts Ptr if and only if there is no element in the container equal to + /// Ptr. The bool component of the returned pair is true if and only if the + /// insertion takes place, and the iterator component of the pair points to + /// the element equal to Ptr. + std::pair insert(PtrType Ptr) { + auto p = insert_imp(PtrTraits::getAsVoidPointer(Ptr)); + return std::make_pair(iterator(p.first, CurArray + CurArraySize), p.second); + } + + /// erase - If the set contains the specified pointer, remove it and return + /// true, otherwise return false. + bool erase(PtrType Ptr) { + return erase_imp(PtrTraits::getAsVoidPointer(Ptr)); + } + + /// count - Return 1 if the specified pointer is in the set, 0 otherwise. + size_type count(PtrType Ptr) const { + return count_imp(PtrTraits::getAsVoidPointer(Ptr)) ? 1 : 0; + } + + template + void insert(IterT I, IterT E) { + for (; I != E; ++I) + insert(*I); + } + + inline iterator begin() const { + return iterator(CurArray, CurArray+CurArraySize); + } + inline iterator end() const { + return iterator(CurArray+CurArraySize, CurArray+CurArraySize); + } +}; + +/// SmallPtrSet - This class implements a set which is optimized for holding +/// SmallSize or less elements. This internally rounds up SmallSize to the next +/// power of two if it is not already a power of two. See the comments above +/// SmallPtrSetImplBase for details of the algorithm. +template +class SmallPtrSet : public SmallPtrSetImpl { + // In small mode SmallPtrSet uses linear search for the elements, so it is + // not a good idea to choose this value too high. You may consider using a + // DenseSet<> instead if you expect many elements in the set. + static_assert(SmallSize <= 32, "SmallSize should be small"); + + typedef SmallPtrSetImpl BaseT; + + // Make sure that SmallSize is a power of two, round up if not. + enum { SmallSizePowTwo = RoundUpToPowerOfTwo::Val }; + /// SmallStorage - Fixed size storage used in 'small mode'. + const void *SmallStorage[SmallSizePowTwo]; + +public: + SmallPtrSet() : BaseT(SmallStorage, SmallSizePowTwo) {} + SmallPtrSet(const SmallPtrSet &that) : BaseT(SmallStorage, that) {} + SmallPtrSet(SmallPtrSet &&that) + : BaseT(SmallStorage, SmallSizePowTwo, std::move(that)) {} + + template + SmallPtrSet(It I, It E) : BaseT(SmallStorage, SmallSizePowTwo) { + this->insert(I, E); + } + + SmallPtrSet & + operator=(const SmallPtrSet &RHS) { + if (&RHS != this) + this->CopyFrom(RHS); + return *this; + } + + SmallPtrSet& + operator=(SmallPtrSet &&RHS) { + if (&RHS != this) + this->MoveFrom(SmallSizePowTwo, std::move(RHS)); + return *this; + } + + /// swap - Swaps the elements of two sets. + void swap(SmallPtrSet &RHS) { + SmallPtrSetImplBase::swap(RHS); + } +}; +} + +namespace std { + /// Implement std::swap in terms of SmallPtrSet swap. + template + inline void swap(llvm_ks::SmallPtrSet &LHS, llvm_ks::SmallPtrSet &RHS) { + LHS.swap(RHS); + } +} + +#endif diff --git a/llvm/include/llvm/ADT/SmallSet.h b/llvm/include/llvm/ADT/SmallSet.h new file mode 100644 index 0000000..f96d8a5 --- /dev/null +++ b/llvm/include/llvm/ADT/SmallSet.h @@ -0,0 +1,136 @@ +//===- llvm/ADT/SmallSet.h - 'Normally small' sets --------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the SmallSet class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_SMALLSET_H +#define LLVM_ADT_SMALLSET_H + +#include "llvm/ADT/None.h" +#include "llvm/ADT/SmallPtrSet.h" +#include "llvm/ADT/SmallVector.h" +#include + +namespace llvm_ks { + +/// SmallSet - This maintains a set of unique values, optimizing for the case +/// when the set is small (less than N). In this case, the set can be +/// maintained with no mallocs. If the set gets large, we expand to using an +/// std::set to maintain reasonable lookup times. +/// +/// Note that this set does not provide a way to iterate over members in the +/// set. +template > +class SmallSet { + /// Use a SmallVector to hold the elements here (even though it will never + /// reach its 'large' stage) to avoid calling the default ctors of elements + /// we will never use. + SmallVector Vector; + std::set Set; + typedef typename SmallVector::const_iterator VIterator; + typedef typename SmallVector::iterator mutable_iterator; + + // In small mode SmallPtrSet uses linear search for the elements, so it is + // not a good idea to choose this value too high. You may consider using a + // DenseSet<> instead if you expect many elements in the set. + static_assert(N <= 32, "N should be small"); + +public: + typedef size_t size_type; + SmallSet() {} + + bool LLVM_ATTRIBUTE_UNUSED_RESULT empty() const { + return Vector.empty() && Set.empty(); + } + + size_type size() const { + return isSmall() ? Vector.size() : Set.size(); + } + + /// count - Return 1 if the element is in the set, 0 otherwise. + size_type count(const T &V) const { + if (isSmall()) { + // Since the collection is small, just do a linear search. + return vfind(V) == Vector.end() ? 0 : 1; + } else { + return Set.count(V); + } + } + + /// insert - Insert an element into the set if it isn't already there. + /// Returns true if the element is inserted (it was not in the set before). + /// The first value of the returned pair is unused and provided for + /// partial compatibility with the standard library self-associative container + /// concept. + // FIXME: Add iterators that abstract over the small and large form, and then + // return those here. + std::pair insert(const T &V) { + if (!isSmall()) + return std::make_pair(None, Set.insert(V).second); + + VIterator I = vfind(V); + if (I != Vector.end()) // Don't reinsert if it already exists. + return std::make_pair(None, false); + if (Vector.size() < N) { + Vector.push_back(V); + return std::make_pair(None, true); + } + + // Otherwise, grow from vector to set. + while (!Vector.empty()) { + Set.insert(Vector.back()); + Vector.pop_back(); + } + Set.insert(V); + return std::make_pair(None, true); + } + + template + void insert(IterT I, IterT E) { + for (; I != E; ++I) + insert(*I); + } + + bool erase(const T &V) { + if (!isSmall()) + return Set.erase(V); + for (mutable_iterator I = Vector.begin(), E = Vector.end(); I != E; ++I) + if (*I == V) { + Vector.erase(I); + return true; + } + return false; + } + + void clear() { + Vector.clear(); + Set.clear(); + } + +private: + bool isSmall() const { return Set.empty(); } + + VIterator vfind(const T &V) const { + for (VIterator I = Vector.begin(), E = Vector.end(); I != E; ++I) + if (*I == V) + return I; + return Vector.end(); + } +}; + +/// If this set is of pointer values, transparently switch over to using +/// SmallPtrSet for performance. +template +class SmallSet : public SmallPtrSet {}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/ADT/SmallString.h b/llvm/include/llvm/ADT/SmallString.h new file mode 100644 index 0000000..e4b93b7 --- /dev/null +++ b/llvm/include/llvm/ADT/SmallString.h @@ -0,0 +1,297 @@ +//===- llvm/ADT/SmallString.h - 'Normally small' strings --------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the SmallString class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_SMALLSTRING_H +#define LLVM_ADT_SMALLSTRING_H + +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/StringRef.h" + +namespace llvm_ks { + +/// SmallString - A SmallString is just a SmallVector with methods and accessors +/// that make it work better as a string (e.g. operator+ etc). +template +class SmallString : public SmallVector { +public: + /// Default ctor - Initialize to empty. + SmallString() {} + + /// Initialize from a StringRef. + SmallString(StringRef S) : SmallVector(S.begin(), S.end()) {} + + /// Initialize with a range. + template + SmallString(ItTy S, ItTy E) : SmallVector(S, E) {} + + // Note that in order to add new overloads for append & assign, we have to + // duplicate the inherited versions so as not to inadvertently hide them. + + /// @} + /// @name String Assignment + /// @{ + + /// Assign from a repeated element. + void assign(size_t NumElts, char Elt) { + this->SmallVectorImpl::assign(NumElts, Elt); + } + + /// Assign from an iterator pair. + template + void assign(in_iter S, in_iter E) { + this->clear(); + SmallVectorImpl::append(S, E); + } + + /// Assign from a StringRef. + void assign(StringRef RHS) { + this->clear(); + SmallVectorImpl::append(RHS.begin(), RHS.end()); + } + + /// Assign from a SmallVector. + void assign(const SmallVectorImpl &RHS) { + this->clear(); + SmallVectorImpl::append(RHS.begin(), RHS.end()); + } + + /// @} + /// @name String Concatenation + /// @{ + + /// Append from an iterator pair. + template + void append(in_iter S, in_iter E) { + SmallVectorImpl::append(S, E); + } + + void append(size_t NumInputs, char Elt) { + SmallVectorImpl::append(NumInputs, Elt); + } + + + /// Append from a StringRef. + void append(StringRef RHS) { + SmallVectorImpl::append(RHS.begin(), RHS.end()); + } + + /// Append from a SmallVector. + void append(const SmallVectorImpl &RHS) { + SmallVectorImpl::append(RHS.begin(), RHS.end()); + } + + /// @} + /// @name String Comparison + /// @{ + + /// Check for string equality. This is more efficient than compare() when + /// the relative ordering of inequal strings isn't needed. + bool equals(StringRef RHS) const { + return str().equals(RHS); + } + + /// Check for string equality, ignoring case. + bool equals_lower(StringRef RHS) const { + return str().equals_lower(RHS); + } + + /// Compare two strings; the result is -1, 0, or 1 if this string is + /// lexicographically less than, equal to, or greater than the \p RHS. + int compare(StringRef RHS) const { + return str().compare(RHS); + } + + /// compare_lower - Compare two strings, ignoring case. + int compare_lower(StringRef RHS) const { + return str().compare_lower(RHS); + } + + /// compare_numeric - Compare two strings, treating sequences of digits as + /// numbers. + int compare_numeric(StringRef RHS) const { + return str().compare_numeric(RHS); + } + + /// @} + /// @name String Predicates + /// @{ + + /// startswith - Check if this string starts with the given \p Prefix. + bool startswith(StringRef Prefix) const { + return str().startswith(Prefix); + } + + /// endswith - Check if this string ends with the given \p Suffix. + bool endswith(StringRef Suffix) const { + return str().endswith(Suffix); + } + + /// @} + /// @name String Searching + /// @{ + + /// find - Search for the first character \p C in the string. + /// + /// \return - The index of the first occurrence of \p C, or npos if not + /// found. + size_t find(char C, size_t From = 0) const { + return str().find(C, From); + } + + /// Search for the first string \p Str in the string. + /// + /// \returns The index of the first occurrence of \p Str, or npos if not + /// found. + size_t find(StringRef Str, size_t From = 0) const { + return str().find(Str, From); + } + + /// Search for the last character \p C in the string. + /// + /// \returns The index of the last occurrence of \p C, or npos if not + /// found. + size_t rfind(char C, size_t From = StringRef::npos) const { + return str().rfind(C, From); + } + + /// Search for the last string \p Str in the string. + /// + /// \returns The index of the last occurrence of \p Str, or npos if not + /// found. + size_t rfind(StringRef Str) const { + return str().rfind(Str); + } + + /// Find the first character in the string that is \p C, or npos if not + /// found. Same as find. + size_t find_first_of(char C, size_t From = 0) const { + return str().find_first_of(C, From); + } + + /// Find the first character in the string that is in \p Chars, or npos if + /// not found. + /// + /// Complexity: O(size() + Chars.size()) + size_t find_first_of(StringRef Chars, size_t From = 0) const { + return str().find_first_of(Chars, From); + } + + /// Find the first character in the string that is not \p C or npos if not + /// found. + size_t find_first_not_of(char C, size_t From = 0) const { + return str().find_first_not_of(C, From); + } + + /// Find the first character in the string that is not in the string + /// \p Chars, or npos if not found. + /// + /// Complexity: O(size() + Chars.size()) + size_t find_first_not_of(StringRef Chars, size_t From = 0) const { + return str().find_first_not_of(Chars, From); + } + + /// Find the last character in the string that is \p C, or npos if not + /// found. + size_t find_last_of(char C, size_t From = StringRef::npos) const { + return str().find_last_of(C, From); + } + + /// Find the last character in the string that is in \p C, or npos if not + /// found. + /// + /// Complexity: O(size() + Chars.size()) + size_t find_last_of( + StringRef Chars, size_t From = StringRef::npos) const { + return str().find_last_of(Chars, From); + } + + /// @} + /// @name Helpful Algorithms + /// @{ + + /// Return the number of occurrences of \p C in the string. + size_t count(char C) const { + return str().count(C); + } + + /// Return the number of non-overlapped occurrences of \p Str in the + /// string. + size_t count(StringRef Str) const { + return str().count(Str); + } + + /// @} + /// @name Substring Operations + /// @{ + + /// Return a reference to the substring from [Start, Start + N). + /// + /// \param Start The index of the starting character in the substring; if + /// the index is npos or greater than the length of the string then the + /// empty substring will be returned. + /// + /// \param N The number of characters to included in the substring. If \p N + /// exceeds the number of characters remaining in the string, the string + /// suffix (starting with \p Start) will be returned. + StringRef substr(size_t Start, size_t N = StringRef::npos) const { + return str().substr(Start, N); + } + + /// Return a reference to the substring from [Start, End). + /// + /// \param Start The index of the starting character in the substring; if + /// the index is npos or greater than the length of the string then the + /// empty substring will be returned. + /// + /// \param End The index following the last character to include in the + /// substring. If this is npos, or less than \p Start, or exceeds the + /// number of characters remaining in the string, the string suffix + /// (starting with \p Start) will be returned. + StringRef slice(size_t Start, size_t End) const { + return str().slice(Start, End); + } + + // Extra methods. + + /// Explicit conversion to StringRef. + StringRef str() const { return StringRef(this->begin(), this->size()); } + + // TODO: Make this const, if it's safe... + const char* c_str() { + this->push_back(0); + this->pop_back(); + return this->data(); + } + + /// Implicit conversion to StringRef. + operator StringRef() const { return str(); } + + // Extra operators. + const SmallString &operator=(StringRef RHS) { + this->clear(); + return *this += RHS; + } + + SmallString &operator+=(StringRef RHS) { + this->append(RHS.begin(), RHS.end()); + return *this; + } + SmallString &operator+=(char C) { + this->push_back(C); + return *this; + } +}; + +} + +#endif diff --git a/llvm/include/llvm/ADT/SmallVector.h b/llvm/include/llvm/ADT/SmallVector.h new file mode 100644 index 0000000..016ceda --- /dev/null +++ b/llvm/include/llvm/ADT/SmallVector.h @@ -0,0 +1,954 @@ +//===- llvm/ADT/SmallVector.h - 'Normally small' vectors --------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the SmallVector class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_SMALLVECTOR_H +#define LLVM_ADT_SMALLVECTOR_H + +#include "llvm/ADT/iterator_range.h" +#include "llvm/Support/AlignOf.h" +#include "llvm/Support/Compiler.h" +#include "llvm/Support/MathExtras.h" +#include "llvm/Support/type_traits.h" +#include +#include +#include +#include +#include +#include +#include +#include + +namespace llvm_ks { + +/// This is all the non-templated stuff common to all SmallVectors. +class SmallVectorBase { +protected: + void *BeginX, *EndX, *CapacityX; + +protected: + SmallVectorBase(void *FirstEl, size_t Size) + : BeginX(FirstEl), EndX(FirstEl), CapacityX((char*)FirstEl+Size) {} + + /// This is an implementation of the grow() method which only works + /// on POD-like data types and is out of line to reduce code duplication. + void grow_pod(void *FirstEl, size_t MinSizeInBytes, size_t TSize); + +public: + /// This returns size()*sizeof(T). + size_t size_in_bytes() const { + return size_t((char*)EndX - (char*)BeginX); + } + + /// capacity_in_bytes - This returns capacity()*sizeof(T). + size_t capacity_in_bytes() const { + return size_t((char*)CapacityX - (char*)BeginX); + } + + bool LLVM_ATTRIBUTE_UNUSED_RESULT empty() const { return BeginX == EndX; } +}; + +template struct SmallVectorStorage; + +/// This is the part of SmallVectorTemplateBase which does not depend on whether +/// the type T is a POD. The extra dummy template argument is used by ArrayRef +/// to avoid unnecessarily requiring T to be complete. +template +class SmallVectorTemplateCommon : public SmallVectorBase { +private: + template friend struct SmallVectorStorage; + + // Allocate raw space for N elements of type T. If T has a ctor or dtor, we + // don't want it to be automatically run, so we need to represent the space as + // something else. Use an array of char of sufficient alignment. + typedef llvm_ks::AlignedCharArrayUnion U; + U FirstEl; + // Space after 'FirstEl' is clobbered, do not add any instance vars after it. + +protected: + SmallVectorTemplateCommon(size_t Size) : SmallVectorBase(&FirstEl, Size) {} + + void grow_pod(size_t MinSizeInBytes, size_t TSize) { + SmallVectorBase::grow_pod(&FirstEl, MinSizeInBytes, TSize); + } + + /// Return true if this is a smallvector which has not had dynamic + /// memory allocated for it. + bool isSmall() const { + return BeginX == static_cast(&FirstEl); + } + + /// Put this vector in a state of being small. + void resetToSmall() { + BeginX = EndX = CapacityX = &FirstEl; + } + + void setEnd(T *P) { this->EndX = P; } +public: + typedef size_t size_type; + typedef ptrdiff_t difference_type; + typedef T value_type; + typedef T *iterator; + typedef const T *const_iterator; + + typedef std::reverse_iterator const_reverse_iterator; + typedef std::reverse_iterator reverse_iterator; + + typedef T &reference; + typedef const T &const_reference; + typedef T *pointer; + typedef const T *const_pointer; + + // forward iterator creation methods. + LLVM_ATTRIBUTE_ALWAYS_INLINE + iterator begin() { return (iterator)this->BeginX; } + LLVM_ATTRIBUTE_ALWAYS_INLINE + const_iterator begin() const { return (const_iterator)this->BeginX; } + LLVM_ATTRIBUTE_ALWAYS_INLINE + iterator end() { return (iterator)this->EndX; } + LLVM_ATTRIBUTE_ALWAYS_INLINE + const_iterator end() const { return (const_iterator)this->EndX; } +protected: + iterator capacity_ptr() { return (iterator)this->CapacityX; } + const_iterator capacity_ptr() const { return (const_iterator)this->CapacityX;} +public: + + // reverse iterator creation methods. + reverse_iterator rbegin() { return reverse_iterator(end()); } + const_reverse_iterator rbegin() const{ return const_reverse_iterator(end()); } + reverse_iterator rend() { return reverse_iterator(begin()); } + const_reverse_iterator rend() const { return const_reverse_iterator(begin());} + + LLVM_ATTRIBUTE_ALWAYS_INLINE + size_type size() const { return end()-begin(); } + size_type max_size() const { return size_type(-1) / sizeof(T); } + + /// Return the total number of elements in the currently allocated buffer. + size_t capacity() const { return capacity_ptr() - begin(); } + + /// Return a pointer to the vector's buffer, even if empty(). + pointer data() { return pointer(begin()); } + /// Return a pointer to the vector's buffer, even if empty(). + const_pointer data() const { return const_pointer(begin()); } + + LLVM_ATTRIBUTE_ALWAYS_INLINE + reference operator[](size_type idx) { + assert(idx < size()); + return begin()[idx]; + } + LLVM_ATTRIBUTE_ALWAYS_INLINE + const_reference operator[](size_type idx) const { + assert(idx < size()); + return begin()[idx]; + } + + reference front() { + assert(!empty()); + return begin()[0]; + } + const_reference front() const { + assert(!empty()); + return begin()[0]; + } + + reference back() { + assert(!empty()); + return end()[-1]; + } + const_reference back() const { + assert(!empty()); + return end()[-1]; + } +}; + +/// SmallVectorTemplateBase - This is where we put method +/// implementations that are designed to work with non-POD-like T's. +template +class SmallVectorTemplateBase : public SmallVectorTemplateCommon { +protected: + SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {} + + static void destroy_range(T *S, T *E) { + while (S != E) { + --E; + E->~T(); + } + } + + /// Use move-assignment to move the range [I, E) onto the + /// objects starting with "Dest". This is just 's + /// std::move, but not all stdlibs actually provide that. + template + static It2 move(It1 I, It1 E, It2 Dest) { + for (; I != E; ++I, ++Dest) + *Dest = ::std::move(*I); + return Dest; + } + + /// Use move-assignment to move the range + /// [I, E) onto the objects ending at "Dest", moving objects + /// in reverse order. This is just 's + /// std::move_backward, but not all stdlibs actually provide that. + template + static It2 move_backward(It1 I, It1 E, It2 Dest) { + while (I != E) + *--Dest = ::std::move(*--E); + return Dest; + } + + /// Move the range [I, E) into the uninitialized memory starting with "Dest", + /// constructing elements as needed. + template + static void uninitialized_move(It1 I, It1 E, It2 Dest) { + for (; I != E; ++I, ++Dest) + ::new ((void*) &*Dest) T(::std::move(*I)); + } + + /// Copy the range [I, E) onto the uninitialized memory starting with "Dest", + /// constructing elements as needed. + template + static void uninitialized_copy(It1 I, It1 E, It2 Dest) { + std::uninitialized_copy(I, E, Dest); + } + + /// Grow the allocated memory (without initializing new elements), doubling + /// the size of the allocated memory. Guarantees space for at least one more + /// element, or MinSize more elements if specified. + void grow(size_t MinSize = 0); + +public: + void push_back(const T &Elt) { + if (LLVM_UNLIKELY(this->EndX >= this->CapacityX)) + this->grow(); + ::new ((void*) this->end()) T(Elt); + this->setEnd(this->end()+1); + } + + void push_back(T &&Elt) { + if (LLVM_UNLIKELY(this->EndX >= this->CapacityX)) + this->grow(); + ::new ((void*) this->end()) T(::std::move(Elt)); + this->setEnd(this->end()+1); + } + + void pop_back() { + this->setEnd(this->end()-1); + this->end()->~T(); + } +}; + +// Define this out-of-line to dissuade the C++ compiler from inlining it. +template +void SmallVectorTemplateBase::grow(size_t MinSize) { + size_t CurCapacity = this->capacity(); + size_t CurSize = this->size(); + // Always grow, even from zero. + size_t NewCapacity = size_t(NextPowerOf2(CurCapacity+2)); + if (NewCapacity < MinSize) + NewCapacity = MinSize; + T *NewElts = static_cast(malloc(NewCapacity*sizeof(T))); + + // Move the elements over. + this->uninitialized_move(this->begin(), this->end(), NewElts); + + // Destroy the original elements. + destroy_range(this->begin(), this->end()); + + // If this wasn't grown from the inline copy, deallocate the old space. + if (!this->isSmall()) + free(this->begin()); + + this->setEnd(NewElts+CurSize); + this->BeginX = NewElts; + this->CapacityX = this->begin()+NewCapacity; +} + + +/// SmallVectorTemplateBase - This is where we put method +/// implementations that are designed to work with POD-like T's. +template +class SmallVectorTemplateBase : public SmallVectorTemplateCommon { +protected: + SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {} + + // No need to do a destroy loop for POD's. + static void destroy_range(T *, T *) {} + + /// Use move-assignment to move the range [I, E) onto the + /// objects starting with "Dest". For PODs, this is just memcpy. + template + static It2 move(It1 I, It1 E, It2 Dest) { + return ::std::copy(I, E, Dest); + } + + /// Use move-assignment to move the range [I, E) onto the objects ending at + /// "Dest", moving objects in reverse order. + template + static It2 move_backward(It1 I, It1 E, It2 Dest) { + return ::std::copy_backward(I, E, Dest); + } + + /// Move the range [I, E) onto the uninitialized memory + /// starting with "Dest", constructing elements into it as needed. + template + static void uninitialized_move(It1 I, It1 E, It2 Dest) { + // Just do a copy. + uninitialized_copy(I, E, Dest); + } + + /// Copy the range [I, E) onto the uninitialized memory + /// starting with "Dest", constructing elements into it as needed. + template + static void uninitialized_copy(It1 I, It1 E, It2 Dest) { + // Arbitrary iterator types; just use the basic implementation. + std::uninitialized_copy(I, E, Dest); + } + + /// Copy the range [I, E) onto the uninitialized memory + /// starting with "Dest", constructing elements into it as needed. + template + static void uninitialized_copy( + T1 *I, T1 *E, T2 *Dest, + typename std::enable_if::type, + T2>::value>::type * = nullptr) { + // Use memcpy for PODs iterated by pointers (which includes SmallVector + // iterators): std::uninitialized_copy optimizes to memmove, but we can + // use memcpy here. Note that I and E are iterators and thus might be + // invalid for memcpy if they are equal. + if (I != E) + memcpy(Dest, I, (E - I) * sizeof(T)); + } + + /// Double the size of the allocated memory, guaranteeing space for at + /// least one more element or MinSize if specified. + void grow(size_t MinSize = 0) { + this->grow_pod(MinSize*sizeof(T), sizeof(T)); + } +public: + void push_back(const T &Elt) { + if (LLVM_UNLIKELY(this->EndX >= this->CapacityX)) + this->grow(); + memcpy(reinterpret_cast(this->end()), &Elt, sizeof(T)); + this->setEnd(this->end()+1); + } + + void pop_back() { + this->setEnd(this->end()-1); + } +}; + + +/// This class consists of common code factored out of the SmallVector class to +/// reduce code duplication based on the SmallVector 'N' template parameter. +template +class SmallVectorImpl : public SmallVectorTemplateBase::value> { + typedef SmallVectorTemplateBase::value > SuperClass; + + SmallVectorImpl(const SmallVectorImpl&) = delete; +public: + typedef typename SuperClass::iterator iterator; + typedef typename SuperClass::size_type size_type; + +protected: + // Default ctor - Initialize to empty. + explicit SmallVectorImpl(unsigned N) + : SmallVectorTemplateBase::value>(N*sizeof(T)) { + } + +public: + ~SmallVectorImpl() { + // Destroy the constructed elements in the vector. + this->destroy_range(this->begin(), this->end()); + + // If this wasn't grown from the inline copy, deallocate the old space. + if (!this->isSmall()) + free(this->begin()); + } + + + void clear() { + this->destroy_range(this->begin(), this->end()); + this->EndX = this->BeginX; + } + + void resize(size_type N) { + if (N < this->size()) { + this->destroy_range(this->begin()+N, this->end()); + this->setEnd(this->begin()+N); + } else if (N > this->size()) { + if (this->capacity() < N) + this->grow(N); + for (auto I = this->end(), E = this->begin() + N; I != E; ++I) + new (&*I) T(); + this->setEnd(this->begin()+N); + } + } + + void resize(size_type N, const T &NV) { + if (N < this->size()) { + this->destroy_range(this->begin()+N, this->end()); + this->setEnd(this->begin()+N); + } else if (N > this->size()) { + if (this->capacity() < N) + this->grow(N); + std::uninitialized_fill(this->end(), this->begin()+N, NV); + this->setEnd(this->begin()+N); + } + } + + void reserve(size_type N) { + if (this->capacity() < N) + this->grow(N); + } + + T LLVM_ATTRIBUTE_UNUSED_RESULT pop_back_val() { + T Result = ::std::move(this->back()); + this->pop_back(); + return Result; + } + + void swap(SmallVectorImpl &RHS); + + /// Add the specified range to the end of the SmallVector. + template + void append(in_iter in_start, in_iter in_end) { + size_type NumInputs = std::distance(in_start, in_end); + // Grow allocated space if needed. + if (NumInputs > size_type(this->capacity_ptr()-this->end())) + this->grow(this->size()+NumInputs); + + // Copy the new elements over. + this->uninitialized_copy(in_start, in_end, this->end()); + this->setEnd(this->end() + NumInputs); + } + + /// Add the specified range to the end of the SmallVector. + void append(size_type NumInputs, const T &Elt) { + // Grow allocated space if needed. + if (NumInputs > size_type(this->capacity_ptr()-this->end())) + this->grow(this->size()+NumInputs); + + // Copy the new elements over. + std::uninitialized_fill_n(this->end(), NumInputs, Elt); + this->setEnd(this->end() + NumInputs); + } + + void append(std::initializer_list IL) { + append(IL.begin(), IL.end()); + } + + void assign(size_type NumElts, const T &Elt) { + clear(); + if (this->capacity() < NumElts) + this->grow(NumElts); + this->setEnd(this->begin()+NumElts); + std::uninitialized_fill(this->begin(), this->end(), Elt); + } + + void assign(std::initializer_list IL) { + clear(); + append(IL); + } + + iterator erase(iterator I) { + assert(I >= this->begin() && "Iterator to erase is out of bounds."); + assert(I < this->end() && "Erasing at past-the-end iterator."); + + iterator N = I; + // Shift all elts down one. + this->move(I+1, this->end(), I); + // Drop the last elt. + this->pop_back(); + return(N); + } + + iterator erase(iterator S, iterator E) { + assert(S >= this->begin() && "Range to erase is out of bounds."); + assert(S <= E && "Trying to erase invalid range."); + assert(E <= this->end() && "Trying to erase past the end."); + + iterator N = S; + // Shift all elts down. + iterator I = this->move(E, this->end(), S); + // Drop the last elts. + this->destroy_range(I, this->end()); + this->setEnd(I); + return(N); + } + + iterator insert(iterator I, T &&Elt) { + if (I == this->end()) { // Important special case for empty vector. + this->push_back(::std::move(Elt)); + return this->end()-1; + } + + assert(I >= this->begin() && "Insertion iterator is out of bounds."); + assert(I <= this->end() && "Inserting past the end of the vector."); + + if (this->EndX >= this->CapacityX) { + size_t EltNo = I-this->begin(); + this->grow(); + I = this->begin()+EltNo; + } + + ::new ((void*) this->end()) T(::std::move(this->back())); + // Push everything else over. + this->move_backward(I, this->end()-1, this->end()); + this->setEnd(this->end()+1); + + // If we just moved the element we're inserting, be sure to update + // the reference. + T *EltPtr = &Elt; + if (I <= EltPtr && EltPtr < this->EndX) + ++EltPtr; + + *I = ::std::move(*EltPtr); + return I; + } + + iterator insert(iterator I, const T &Elt) { + if (I == this->end()) { // Important special case for empty vector. + this->push_back(Elt); + return this->end()-1; + } + + assert(I >= this->begin() && "Insertion iterator is out of bounds."); + assert(I <= this->end() && "Inserting past the end of the vector."); + + if (this->EndX >= this->CapacityX) { + size_t EltNo = I-this->begin(); + this->grow(); + I = this->begin()+EltNo; + } + ::new ((void*) this->end()) T(std::move(this->back())); + // Push everything else over. + this->move_backward(I, this->end()-1, this->end()); + this->setEnd(this->end()+1); + + // If we just moved the element we're inserting, be sure to update + // the reference. + const T *EltPtr = &Elt; + if (I <= EltPtr && EltPtr < this->EndX) + ++EltPtr; + + *I = *EltPtr; + return I; + } + + iterator insert(iterator I, size_type NumToInsert, const T &Elt) { + // Convert iterator to elt# to avoid invalidating iterator when we reserve() + size_t InsertElt = I - this->begin(); + + if (I == this->end()) { // Important special case for empty vector. + append(NumToInsert, Elt); + return this->begin()+InsertElt; + } + + assert(I >= this->begin() && "Insertion iterator is out of bounds."); + assert(I <= this->end() && "Inserting past the end of the vector."); + + // Ensure there is enough space. + reserve(this->size() + NumToInsert); + + // Uninvalidate the iterator. + I = this->begin()+InsertElt; + + // If there are more elements between the insertion point and the end of the + // range than there are being inserted, we can use a simple approach to + // insertion. Since we already reserved space, we know that this won't + // reallocate the vector. + if (size_t(this->end()-I) >= NumToInsert) { + T *OldEnd = this->end(); + append(std::move_iterator(this->end() - NumToInsert), + std::move_iterator(this->end())); + + // Copy the existing elements that get replaced. + this->move_backward(I, OldEnd-NumToInsert, OldEnd); + + std::fill_n(I, NumToInsert, Elt); + return I; + } + + // Otherwise, we're inserting more elements than exist already, and we're + // not inserting at the end. + + // Move over the elements that we're about to overwrite. + T *OldEnd = this->end(); + this->setEnd(this->end() + NumToInsert); + size_t NumOverwritten = OldEnd-I; + this->uninitialized_move(I, OldEnd, this->end()-NumOverwritten); + + // Replace the overwritten part. + std::fill_n(I, NumOverwritten, Elt); + + // Insert the non-overwritten middle part. + std::uninitialized_fill_n(OldEnd, NumToInsert-NumOverwritten, Elt); + return I; + } + + template + iterator insert(iterator I, ItTy From, ItTy To) { + // Convert iterator to elt# to avoid invalidating iterator when we reserve() + size_t InsertElt = I - this->begin(); + + if (I == this->end()) { // Important special case for empty vector. + append(From, To); + return this->begin()+InsertElt; + } + + assert(I >= this->begin() && "Insertion iterator is out of bounds."); + assert(I <= this->end() && "Inserting past the end of the vector."); + + size_t NumToInsert = std::distance(From, To); + + // Ensure there is enough space. + reserve(this->size() + NumToInsert); + + // Uninvalidate the iterator. + I = this->begin()+InsertElt; + + // If there are more elements between the insertion point and the end of the + // range than there are being inserted, we can use a simple approach to + // insertion. Since we already reserved space, we know that this won't + // reallocate the vector. + if (size_t(this->end()-I) >= NumToInsert) { + T *OldEnd = this->end(); + append(std::move_iterator(this->end() - NumToInsert), + std::move_iterator(this->end())); + + // Copy the existing elements that get replaced. + this->move_backward(I, OldEnd-NumToInsert, OldEnd); + + std::copy(From, To, I); + return I; + } + + // Otherwise, we're inserting more elements than exist already, and we're + // not inserting at the end. + + // Move over the elements that we're about to overwrite. + T *OldEnd = this->end(); + this->setEnd(this->end() + NumToInsert); + size_t NumOverwritten = OldEnd-I; + this->uninitialized_move(I, OldEnd, this->end()-NumOverwritten); + + // Replace the overwritten part. + for (T *J = I; NumOverwritten > 0; --NumOverwritten) { + *J = *From; + ++J; ++From; + } + + // Insert the non-overwritten middle part. + this->uninitialized_copy(From, To, OldEnd); + return I; + } + + void insert(iterator I, std::initializer_list IL) { + insert(I, IL.begin(), IL.end()); + } + + template void emplace_back(ArgTypes &&... Args) { + if (LLVM_UNLIKELY(this->EndX >= this->CapacityX)) + this->grow(); + ::new ((void *)this->end()) T(std::forward(Args)...); + this->setEnd(this->end() + 1); + } + + SmallVectorImpl &operator=(const SmallVectorImpl &RHS); + + SmallVectorImpl &operator=(SmallVectorImpl &&RHS); + + bool operator==(const SmallVectorImpl &RHS) const { + if (this->size() != RHS.size()) return false; + return std::equal(this->begin(), this->end(), RHS.begin()); + } + bool operator!=(const SmallVectorImpl &RHS) const { + return !(*this == RHS); + } + + bool operator<(const SmallVectorImpl &RHS) const { + return std::lexicographical_compare(this->begin(), this->end(), + RHS.begin(), RHS.end()); + } + + /// Set the array size to \p N, which the current array must have enough + /// capacity for. + /// + /// This does not construct or destroy any elements in the vector. + /// + /// Clients can use this in conjunction with capacity() to write past the end + /// of the buffer when they know that more elements are available, and only + /// update the size later. This avoids the cost of value initializing elements + /// which will only be overwritten. + void set_size(size_type N) { + assert(N <= this->capacity()); + this->setEnd(this->begin() + N); + } +}; + + +template +void SmallVectorImpl::swap(SmallVectorImpl &RHS) { + if (this == &RHS) return; + + // We can only avoid copying elements if neither vector is small. + if (!this->isSmall() && !RHS.isSmall()) { + std::swap(this->BeginX, RHS.BeginX); + std::swap(this->EndX, RHS.EndX); + std::swap(this->CapacityX, RHS.CapacityX); + return; + } + if (RHS.size() > this->capacity()) + this->grow(RHS.size()); + if (this->size() > RHS.capacity()) + RHS.grow(this->size()); + + // Swap the shared elements. + size_t NumShared = this->size(); + if (NumShared > RHS.size()) NumShared = RHS.size(); + for (size_type i = 0; i != NumShared; ++i) + std::swap((*this)[i], RHS[i]); + + // Copy over the extra elts. + if (this->size() > RHS.size()) { + size_t EltDiff = this->size() - RHS.size(); + this->uninitialized_copy(this->begin()+NumShared, this->end(), RHS.end()); + RHS.setEnd(RHS.end()+EltDiff); + this->destroy_range(this->begin()+NumShared, this->end()); + this->setEnd(this->begin()+NumShared); + } else if (RHS.size() > this->size()) { + size_t EltDiff = RHS.size() - this->size(); + this->uninitialized_copy(RHS.begin()+NumShared, RHS.end(), this->end()); + this->setEnd(this->end() + EltDiff); + this->destroy_range(RHS.begin()+NumShared, RHS.end()); + RHS.setEnd(RHS.begin()+NumShared); + } +} + +template +SmallVectorImpl &SmallVectorImpl:: + operator=(const SmallVectorImpl &RHS) { + // Avoid self-assignment. + if (this == &RHS) return *this; + + // If we already have sufficient space, assign the common elements, then + // destroy any excess. + size_t RHSSize = RHS.size(); + size_t CurSize = this->size(); + if (CurSize >= RHSSize) { + // Assign common elements. + iterator NewEnd; + if (RHSSize) + NewEnd = std::copy(RHS.begin(), RHS.begin()+RHSSize, this->begin()); + else + NewEnd = this->begin(); + + // Destroy excess elements. + this->destroy_range(NewEnd, this->end()); + + // Trim. + this->setEnd(NewEnd); + return *this; + } + + // If we have to grow to have enough elements, destroy the current elements. + // This allows us to avoid copying them during the grow. + // FIXME: don't do this if they're efficiently moveable. + if (this->capacity() < RHSSize) { + // Destroy current elements. + this->destroy_range(this->begin(), this->end()); + this->setEnd(this->begin()); + CurSize = 0; + this->grow(RHSSize); + } else if (CurSize) { + // Otherwise, use assignment for the already-constructed elements. + std::copy(RHS.begin(), RHS.begin()+CurSize, this->begin()); + } + + // Copy construct the new elements in place. + this->uninitialized_copy(RHS.begin()+CurSize, RHS.end(), + this->begin()+CurSize); + + // Set end. + this->setEnd(this->begin()+RHSSize); + return *this; +} + +template +SmallVectorImpl &SmallVectorImpl::operator=(SmallVectorImpl &&RHS) { + // Avoid self-assignment. + if (this == &RHS) return *this; + + // If the RHS isn't small, clear this vector and then steal its buffer. + if (!RHS.isSmall()) { + this->destroy_range(this->begin(), this->end()); + if (!this->isSmall()) free(this->begin()); + this->BeginX = RHS.BeginX; + this->EndX = RHS.EndX; + this->CapacityX = RHS.CapacityX; + RHS.resetToSmall(); + return *this; + } + + // If we already have sufficient space, assign the common elements, then + // destroy any excess. + size_t RHSSize = RHS.size(); + size_t CurSize = this->size(); + if (CurSize >= RHSSize) { + // Assign common elements. + iterator NewEnd = this->begin(); + if (RHSSize) + NewEnd = this->move(RHS.begin(), RHS.end(), NewEnd); + + // Destroy excess elements and trim the bounds. + this->destroy_range(NewEnd, this->end()); + this->setEnd(NewEnd); + + // Clear the RHS. + RHS.clear(); + + return *this; + } + + // If we have to grow to have enough elements, destroy the current elements. + // This allows us to avoid copying them during the grow. + // FIXME: this may not actually make any sense if we can efficiently move + // elements. + if (this->capacity() < RHSSize) { + // Destroy current elements. + this->destroy_range(this->begin(), this->end()); + this->setEnd(this->begin()); + CurSize = 0; + this->grow(RHSSize); + } else if (CurSize) { + // Otherwise, use assignment for the already-constructed elements. + this->move(RHS.begin(), RHS.begin()+CurSize, this->begin()); + } + + // Move-construct the new elements in place. + this->uninitialized_move(RHS.begin()+CurSize, RHS.end(), + this->begin()+CurSize); + + // Set end. + this->setEnd(this->begin()+RHSSize); + + RHS.clear(); + return *this; +} + +/// Storage for the SmallVector elements which aren't contained in +/// SmallVectorTemplateCommon. There are 'N-1' elements here. The remaining '1' +/// element is in the base class. This is specialized for the N=1 and N=0 cases +/// to avoid allocating unnecessary storage. +template +struct SmallVectorStorage { + typename SmallVectorTemplateCommon::U InlineElts[N - 1]; +}; +template struct SmallVectorStorage {}; +template struct SmallVectorStorage {}; + +/// This is a 'vector' (really, a variable-sized array), optimized +/// for the case when the array is small. It contains some number of elements +/// in-place, which allows it to avoid heap allocation when the actual number of +/// elements is below that threshold. This allows normal "small" cases to be +/// fast without losing generality for large inputs. +/// +/// Note that this does not attempt to be exception safe. +/// +template +class SmallVector : public SmallVectorImpl { + /// Inline space for elements which aren't stored in the base class. + SmallVectorStorage Storage; +public: + SmallVector() : SmallVectorImpl(N) { + } + + explicit SmallVector(size_t Size, const T &Value = T()) + : SmallVectorImpl(N) { + this->assign(Size, Value); + } + + template + SmallVector(ItTy S, ItTy E) : SmallVectorImpl(N) { + this->append(S, E); + } + + template + explicit SmallVector(const llvm_ks::iterator_range R) + : SmallVectorImpl(N) { + this->append(R.begin(), R.end()); + } + + SmallVector(std::initializer_list IL) : SmallVectorImpl(N) { + this->assign(IL); + } + + SmallVector(const SmallVector &RHS) : SmallVectorImpl(N) { + if (!RHS.empty()) + SmallVectorImpl::operator=(RHS); + } + + const SmallVector &operator=(const SmallVector &RHS) { + SmallVectorImpl::operator=(RHS); + return *this; + } + + SmallVector(SmallVector &&RHS) : SmallVectorImpl(N) { + if (!RHS.empty()) + SmallVectorImpl::operator=(::std::move(RHS)); + } + + const SmallVector &operator=(SmallVector &&RHS) { + SmallVectorImpl::operator=(::std::move(RHS)); + return *this; + } + + SmallVector(SmallVectorImpl &&RHS) : SmallVectorImpl(N) { + if (!RHS.empty()) + SmallVectorImpl::operator=(::std::move(RHS)); + } + + const SmallVector &operator=(SmallVectorImpl &&RHS) { + SmallVectorImpl::operator=(::std::move(RHS)); + return *this; + } + + const SmallVector &operator=(std::initializer_list IL) { + this->assign(IL); + return *this; + } +}; + +template +static inline size_t capacity_in_bytes(const SmallVector &X) { + return X.capacity_in_bytes(); +} + +} // End llvm namespace + +namespace std { + /// Implement std::swap in terms of SmallVector swap. + template + inline void + swap(llvm_ks::SmallVectorImpl &LHS, llvm_ks::SmallVectorImpl &RHS) { + LHS.swap(RHS); + } + + /// Implement std::swap in terms of SmallVector swap. + template + inline void + swap(llvm_ks::SmallVector &LHS, llvm_ks::SmallVector &RHS) { + LHS.swap(RHS); + } +} + +#endif diff --git a/llvm/include/llvm/ADT/StringExtras.h b/llvm/include/llvm/ADT/StringExtras.h new file mode 100644 index 0000000..124c8f7 --- /dev/null +++ b/llvm/include/llvm/ADT/StringExtras.h @@ -0,0 +1,181 @@ +//===-- llvm/ADT/StringExtras.h - Useful string functions -------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains some functions that are useful when dealing with strings. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_STRINGEXTRAS_H +#define LLVM_ADT_STRINGEXTRAS_H + +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/DataTypes.h" +#include + +namespace llvm_ks { +template class SmallVectorImpl; + +/// hexdigit - Return the hexadecimal character for the +/// given number \p X (which should be less than 16). +static inline char hexdigit(unsigned X, bool LowerCase = false) { + const char HexChar = LowerCase ? 'a' : 'A'; + return X < 10 ? '0' + X : HexChar + X - 10; +} + +/// Construct a string ref from a boolean. +static inline StringRef toStringRef(bool B) { + return StringRef(B ? "true" : "false"); +} + +/// Interpret the given character \p C as a hexadecimal digit and return its +/// value. +/// +/// If \p C is not a valid hex digit, -1U is returned. +static inline unsigned hexDigitValue(char C) { + if (C >= '0' && C <= '9') return C-'0'; + if (C >= 'a' && C <= 'f') return C-'a'+10U; + if (C >= 'A' && C <= 'F') return C-'A'+10U; + return -1U; +} + +static inline std::string utohexstr(uint64_t X, bool LowerCase = false) { + char Buffer[17]; + char *BufPtr = std::end(Buffer); + + if (X == 0) *--BufPtr = '0'; + + while (X) { + unsigned char Mod = static_cast(X) & 15; + *--BufPtr = hexdigit(Mod, LowerCase); + X >>= 4; + } + + return std::string(BufPtr, std::end(Buffer)); +} + +static inline std::string utostr(uint64_t X, bool isNeg = false) { + char Buffer[21]; + char *BufPtr = std::end(Buffer); + + if (X == 0) *--BufPtr = '0'; // Handle special case... + + while (X) { + *--BufPtr = '0' + char(X % 10); + X /= 10; + } + + if (isNeg) *--BufPtr = '-'; // Add negative sign... + return std::string(BufPtr, std::end(Buffer)); +} + + +static inline std::string itostr(int64_t X) { + if (X < 0) + return utostr(static_cast(-X), true); + else + return utostr(static_cast(X)); +} + +/// StrInStrNoCase - Portable version of strcasestr. Locates the first +/// occurrence of string 's1' in string 's2', ignoring case. Returns +/// the offset of s2 in s1 or npos if s2 cannot be found. +StringRef::size_type StrInStrNoCase(StringRef s1, StringRef s2); + +/// getToken - This function extracts one token from source, ignoring any +/// leading characters that appear in the Delimiters string, and ending the +/// token at any of the characters that appear in the Delimiters string. If +/// there are no tokens in the source string, an empty string is returned. +/// The function returns a pair containing the extracted token and the +/// remaining tail string. +std::pair getToken(StringRef Source, + StringRef Delimiters = " \t\n\v\f\r"); + +/// SplitString - Split up the specified string according to the specified +/// delimiters, appending the result fragments to the output list. +void SplitString(StringRef Source, + SmallVectorImpl &OutFragments, + StringRef Delimiters = " \t\n\v\f\r"); + +/// HashString - Hash function for strings. +/// +/// This is the Bernstein hash function. +// +// FIXME: Investigate whether a modified bernstein hash function performs +// better: http://eternallyconfuzzled.com/tuts/algorithms/jsw_tut_hashing.aspx +// X*33+c -> X*33^c +static inline unsigned HashString(StringRef Str, unsigned Result = 0) { + for (StringRef::size_type i = 0, e = Str.size(); i != e; ++i) + Result = Result * 33 + (unsigned char)Str[i]; + return Result; +} + +/// Returns the English suffix for an ordinal integer (-st, -nd, -rd, -th). +static inline StringRef getOrdinalSuffix(unsigned Val) { + // It is critically important that we do this perfectly for + // user-written sequences with over 100 elements. + switch (Val % 100) { + case 11: + case 12: + case 13: + return "th"; + default: + switch (Val % 10) { + case 1: return "st"; + case 2: return "nd"; + case 3: return "rd"; + default: return "th"; + } + } +} + +template +inline std::string join_impl(IteratorT Begin, IteratorT End, + StringRef Separator, std::input_iterator_tag) { + std::string S; + if (Begin == End) + return S; + + S += (*Begin); + while (++Begin != End) { + S += Separator; + S += (*Begin); + } + return S; +} + +template +inline std::string join_impl(IteratorT Begin, IteratorT End, + StringRef Separator, std::forward_iterator_tag) { + std::string S; + if (Begin == End) + return S; + + size_t Len = (std::distance(Begin, End) - 1) * Separator.size(); + for (IteratorT I = Begin; I != End; ++I) + Len += (*Begin).size(); + S.reserve(Len); + S += (*Begin); + while (++Begin != End) { + S += Separator; + S += (*Begin); + } + return S; +} + +/// Joins the strings in the range [Begin, End), adding Separator between +/// the elements. +template +inline std::string join(IteratorT Begin, IteratorT End, StringRef Separator) { + typedef typename std::iterator_traits::iterator_category tag; + return join_impl(Begin, End, Separator, tag()); +} + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/ADT/StringMap.h b/llvm/include/llvm/ADT/StringMap.h new file mode 100644 index 0000000..1227b87 --- /dev/null +++ b/llvm/include/llvm/ADT/StringMap.h @@ -0,0 +1,463 @@ +//===--- StringMap.h - String Hash table map interface ----------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the StringMap class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_STRINGMAP_H +#define LLVM_ADT_STRINGMAP_H + +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/Allocator.h" +#include +#include + +namespace llvm_ks { + template + class StringMapConstIterator; + template + class StringMapIterator; + template + class StringMapEntry; + +/// StringMapEntryBase - Shared base class of StringMapEntry instances. +class StringMapEntryBase { + unsigned StrLen; + +public: + explicit StringMapEntryBase(unsigned Len) : StrLen(Len) {} + + unsigned getKeyLength() const { return StrLen; } +}; + +/// StringMapImpl - This is the base class of StringMap that is shared among +/// all of its instantiations. +class StringMapImpl { +protected: + // Array of NumBuckets pointers to entries, null pointers are holes. + // TheTable[NumBuckets] contains a sentinel value for easy iteration. Followed + // by an array of the actual hash values as unsigned integers. + StringMapEntryBase **TheTable; + unsigned NumBuckets; + unsigned NumItems; + unsigned NumTombstones; + unsigned ItemSize; + +protected: + explicit StringMapImpl(unsigned itemSize) + : TheTable(nullptr), + // Initialize the map with zero buckets to allocation. + NumBuckets(0), NumItems(0), NumTombstones(0), ItemSize(itemSize) {} + StringMapImpl(StringMapImpl &&RHS) + : TheTable(RHS.TheTable), NumBuckets(RHS.NumBuckets), + NumItems(RHS.NumItems), NumTombstones(RHS.NumTombstones), + ItemSize(RHS.ItemSize) { + RHS.TheTable = nullptr; + RHS.NumBuckets = 0; + RHS.NumItems = 0; + RHS.NumTombstones = 0; + } + + StringMapImpl(unsigned InitSize, unsigned ItemSize); + unsigned RehashTable(unsigned BucketNo = 0); + + /// LookupBucketFor - Look up the bucket that the specified string should end + /// up in. If it already exists as a key in the map, the Item pointer for the + /// specified bucket will be non-null. Otherwise, it will be null. In either + /// case, the FullHashValue field of the bucket will be set to the hash value + /// of the string. + unsigned LookupBucketFor(StringRef Key); + + /// FindKey - Look up the bucket that contains the specified key. If it exists + /// in the map, return the bucket number of the key. Otherwise return -1. + /// This does not modify the map. + int FindKey(StringRef Key) const; + + /// RemoveKey - Remove the specified StringMapEntry from the table, but do not + /// delete it. This aborts if the value isn't in the table. + void RemoveKey(StringMapEntryBase *V); + + /// RemoveKey - Remove the StringMapEntry for the specified key from the + /// table, returning it. If the key is not in the table, this returns null. + StringMapEntryBase *RemoveKey(StringRef Key); + +private: + void init(unsigned Size); + +public: + static StringMapEntryBase *getTombstoneVal() { + return (StringMapEntryBase*)-1; + } + + unsigned getNumBuckets() const { return NumBuckets; } + unsigned getNumItems() const { return NumItems; } + + bool empty() const { return NumItems == 0; } + unsigned size() const { return NumItems; } + + void swap(StringMapImpl &Other) { + std::swap(TheTable, Other.TheTable); + std::swap(NumBuckets, Other.NumBuckets); + std::swap(NumItems, Other.NumItems); + std::swap(NumTombstones, Other.NumTombstones); + } +}; + +/// StringMapEntry - This is used to represent one value that is inserted into +/// a StringMap. It contains the Value itself and the key: the string length +/// and data. +template +class StringMapEntry : public StringMapEntryBase { + StringMapEntry(StringMapEntry &E) = delete; + +public: + ValueTy second; + + explicit StringMapEntry(unsigned strLen) + : StringMapEntryBase(strLen), second() {} + template + StringMapEntry(unsigned strLen, InitTy &&V) + : StringMapEntryBase(strLen), second(std::forward(V)) {} + + StringRef getKey() const { + return StringRef(getKeyData(), getKeyLength()); + } + + const ValueTy &getValue() const { return second; } + ValueTy &getValue() { return second; } + + void setValue(const ValueTy &V) { second = V; } + + /// getKeyData - Return the start of the string data that is the key for this + /// value. The string data is always stored immediately after the + /// StringMapEntry object. + const char *getKeyData() const {return reinterpret_cast(this+1);} + + StringRef first() const { return StringRef(getKeyData(), getKeyLength()); } + + /// Create - Create a StringMapEntry for the specified key and default + /// construct the value. + template + static StringMapEntry *Create(StringRef Key, AllocatorTy &Allocator, + InitType &&InitVal) { + unsigned KeyLength = Key.size(); + + // Allocate a new item with space for the string at the end and a null + // terminator. + unsigned AllocSize = static_cast(sizeof(StringMapEntry))+ + KeyLength+1; + unsigned Alignment = alignOf(); + + StringMapEntry *NewItem = + static_cast(Allocator.Allocate(AllocSize,Alignment)); + + // Default construct the value. + new (NewItem) StringMapEntry(KeyLength, std::forward(InitVal)); + + // Copy the string information. + char *StrBuffer = const_cast(NewItem->getKeyData()); + if (KeyLength > 0) + memcpy(StrBuffer, Key.data(), KeyLength); + StrBuffer[KeyLength] = 0; // Null terminate for convenience of clients. + return NewItem; + } + + template + static StringMapEntry *Create(StringRef Key, AllocatorTy &Allocator) { + return Create(Key, Allocator, ValueTy()); + } + + /// Create - Create a StringMapEntry with normal malloc/free. + template + static StringMapEntry *Create(StringRef Key, InitType &&InitVal) { + MallocAllocator A; + return Create(Key, A, std::forward(InitVal)); + } + + static StringMapEntry *Create(StringRef Key) { + return Create(Key, ValueTy()); + } + + /// GetStringMapEntryFromKeyData - Given key data that is known to be embedded + /// into a StringMapEntry, return the StringMapEntry itself. + static StringMapEntry &GetStringMapEntryFromKeyData(const char *KeyData) { + char *Ptr = const_cast(KeyData) - sizeof(StringMapEntry); + return *reinterpret_cast(Ptr); + } + + /// Destroy - Destroy this StringMapEntry, releasing memory back to the + /// specified allocator. + template + void Destroy(AllocatorTy &Allocator) { + // Free memory referenced by the item. + unsigned AllocSize = + static_cast(sizeof(StringMapEntry)) + getKeyLength() + 1; + this->~StringMapEntry(); + Allocator.Deallocate(static_cast(this), AllocSize); + } + + /// Destroy this object, releasing memory back to the malloc allocator. + void Destroy() { + MallocAllocator A; + Destroy(A); + } +}; + +/// StringMap - This is an unconventional map that is specialized for handling +/// keys that are "strings", which are basically ranges of bytes. This does some +/// funky memory allocation and hashing things to make it extremely efficient, +/// storing the string data *after* the value in the map. +template +class StringMap : public StringMapImpl { + AllocatorTy Allocator; + +public: + typedef StringMapEntry MapEntryTy; + + StringMap() : StringMapImpl(static_cast(sizeof(MapEntryTy))) {} + explicit StringMap(unsigned InitialSize) + : StringMapImpl(InitialSize, static_cast(sizeof(MapEntryTy))) {} + + explicit StringMap(AllocatorTy A) + : StringMapImpl(static_cast(sizeof(MapEntryTy))), Allocator(A) {} + + StringMap(unsigned InitialSize, AllocatorTy A) + : StringMapImpl(InitialSize, static_cast(sizeof(MapEntryTy))), + Allocator(A) {} + + StringMap(std::initializer_list> List) + : StringMapImpl(static_cast(sizeof(MapEntryTy))) { + for (const auto &P : List) { + insert(P); + } + } + + StringMap(StringMap &&RHS) + : StringMapImpl(std::move(RHS)), Allocator(std::move(RHS.Allocator)) {} + + StringMap &operator=(StringMap RHS) { + StringMapImpl::swap(RHS); + std::swap(Allocator, RHS.Allocator); + return *this; + } + + // FIXME: Implement copy operations if/when they're needed. + + AllocatorTy &getAllocator() { return Allocator; } + const AllocatorTy &getAllocator() const { return Allocator; } + + typedef const char* key_type; + typedef ValueTy mapped_type; + typedef StringMapEntry value_type; + typedef size_t size_type; + + typedef StringMapConstIterator const_iterator; + typedef StringMapIterator iterator; + + iterator begin() { + return iterator(TheTable, NumBuckets == 0); + } + iterator end() { + return iterator(TheTable+NumBuckets, true); + } + const_iterator begin() const { + return const_iterator(TheTable, NumBuckets == 0); + } + const_iterator end() const { + return const_iterator(TheTable+NumBuckets, true); + } + + iterator find(StringRef Key) { + int Bucket = FindKey(Key); + if (Bucket == -1) return end(); + return iterator(TheTable+Bucket, true); + } + + const_iterator find(StringRef Key) const { + int Bucket = FindKey(Key); + if (Bucket == -1) return end(); + return const_iterator(TheTable+Bucket, true); + } + + /// lookup - Return the entry for the specified key, or a default + /// constructed value if no such entry exists. + ValueTy lookup(StringRef Key) const { + const_iterator it = find(Key); + if (it != end()) + return it->second; + return ValueTy(); + } + + ValueTy &operator[](StringRef Key) { + return insert(std::make_pair(Key, ValueTy())).first->second; + } + + /// count - Return 1 if the element is in the map, 0 otherwise. + size_type count(StringRef Key) const { + return find(Key) == end() ? 0 : 1; + } + + /// insert - Insert the specified key/value pair into the map. If the key + /// already exists in the map, return false and ignore the request, otherwise + /// insert it and return true. + bool insert(MapEntryTy *KeyValue) { + unsigned BucketNo = LookupBucketFor(KeyValue->getKey()); + StringMapEntryBase *&Bucket = TheTable[BucketNo]; + if (Bucket && Bucket != getTombstoneVal()) + return false; // Already exists in map. + + if (Bucket == getTombstoneVal()) + --NumTombstones; + Bucket = KeyValue; + ++NumItems; + assert(NumItems + NumTombstones <= NumBuckets); + + RehashTable(); + return true; + } + + /// insert - Inserts the specified key/value pair into the map if the key + /// isn't already in the map. The bool component of the returned pair is true + /// if and only if the insertion takes place, and the iterator component of + /// the pair points to the element with key equivalent to the key of the pair. + std::pair insert(std::pair KV) { + unsigned BucketNo = LookupBucketFor(KV.first); + StringMapEntryBase *&Bucket = TheTable[BucketNo]; + if (Bucket && Bucket != getTombstoneVal()) + return std::make_pair(iterator(TheTable + BucketNo, false), + false); // Already exists in map. + + if (Bucket == getTombstoneVal()) + --NumTombstones; + Bucket = + MapEntryTy::Create(KV.first, Allocator, std::move(KV.second)); + ++NumItems; + assert(NumItems + NumTombstones <= NumBuckets); + + BucketNo = RehashTable(BucketNo); + return std::make_pair(iterator(TheTable + BucketNo, false), true); + } + + // clear - Empties out the StringMap + void clear() { + if (empty()) return; + + // Zap all values, resetting the keys back to non-present (not tombstone), + // which is safe because we're removing all elements. + for (unsigned I = 0, E = NumBuckets; I != E; ++I) { + StringMapEntryBase *&Bucket = TheTable[I]; + if (Bucket && Bucket != getTombstoneVal()) { + static_cast(Bucket)->Destroy(Allocator); + } + Bucket = nullptr; + } + + NumItems = 0; + NumTombstones = 0; + } + + /// remove - Remove the specified key/value pair from the map, but do not + /// erase it. This aborts if the key is not in the map. + void remove(MapEntryTy *KeyValue) { + RemoveKey(KeyValue); + } + + void erase(iterator I) { + MapEntryTy &V = *I; + remove(&V); + V.Destroy(Allocator); + } + + bool erase(StringRef Key) { + iterator I = find(Key); + if (I == end()) return false; + erase(I); + return true; + } + + ~StringMap() { + // Delete all the elements in the map, but don't reset the elements + // to default values. This is a copy of clear(), but avoids unnecessary + // work not required in the destructor. + if (!empty()) { + for (unsigned I = 0, E = NumBuckets; I != E; ++I) { + StringMapEntryBase *Bucket = TheTable[I]; + if (Bucket && Bucket != getTombstoneVal()) { + static_cast(Bucket)->Destroy(Allocator); + } + } + } + free(TheTable); + } +}; + +template class StringMapConstIterator { +protected: + StringMapEntryBase **Ptr; + +public: + typedef StringMapEntry value_type; + + StringMapConstIterator() : Ptr(nullptr) { } + + explicit StringMapConstIterator(StringMapEntryBase **Bucket, + bool NoAdvance = false) + : Ptr(Bucket) { + if (!NoAdvance) AdvancePastEmptyBuckets(); + } + + const value_type &operator*() const { + return *static_cast*>(*Ptr); + } + const value_type *operator->() const { + return static_cast*>(*Ptr); + } + + bool operator==(const StringMapConstIterator &RHS) const { + return Ptr == RHS.Ptr; + } + bool operator!=(const StringMapConstIterator &RHS) const { + return Ptr != RHS.Ptr; + } + + inline StringMapConstIterator& operator++() { // Preincrement + ++Ptr; + AdvancePastEmptyBuckets(); + return *this; + } + StringMapConstIterator operator++(int) { // Postincrement + StringMapConstIterator tmp = *this; ++*this; return tmp; + } + +private: + void AdvancePastEmptyBuckets() { + while (*Ptr == nullptr || *Ptr == StringMapImpl::getTombstoneVal()) + ++Ptr; + } +}; + +template +class StringMapIterator : public StringMapConstIterator { +public: + StringMapIterator() {} + explicit StringMapIterator(StringMapEntryBase **Bucket, + bool NoAdvance = false) + : StringMapConstIterator(Bucket, NoAdvance) { + } + StringMapEntry &operator*() const { + return *static_cast*>(*this->Ptr); + } + StringMapEntry *operator->() const { + return static_cast*>(*this->Ptr); + } +}; +} + +#endif diff --git a/llvm/include/llvm/ADT/StringRef.h b/llvm/include/llvm/ADT/StringRef.h new file mode 100644 index 0000000..078fa08 --- /dev/null +++ b/llvm/include/llvm/ADT/StringRef.h @@ -0,0 +1,609 @@ +//===--- StringRef.h - Constant String Reference Wrapper --------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_STRINGREF_H +#define LLVM_ADT_STRINGREF_H + +#include "llvm/Support/Compiler.h" +#include +#include +#include +#include +#include +#include + +namespace llvm_ks { + template + class SmallVectorImpl; + class APInt; + class hash_code; + class StringRef; + + /// Helper functions for StringRef::getAsInteger. + bool getAsUnsignedInteger(StringRef Str, unsigned Radix, + unsigned long long &Result); + + bool getAsSignedInteger(StringRef Str, unsigned Radix, long long &Result); + + /// StringRef - Represent a constant reference to a string, i.e. a character + /// array and a length, which need not be null terminated. + /// + /// This class does not own the string data, it is expected to be used in + /// situations where the character data resides in some other buffer, whose + /// lifetime extends past that of the StringRef. For this reason, it is not in + /// general safe to store a StringRef. + class StringRef { + public: + typedef const char *iterator; + typedef const char *const_iterator; + static const size_t npos = ~size_t(0); + typedef size_t size_type; + + private: + /// The start of the string, in an external buffer. + const char *Data; + + /// The length of the string. + size_t Length; + + // Workaround memcmp issue with null pointers (undefined behavior) + // by providing a specialized version + LLVM_ATTRIBUTE_ALWAYS_INLINE + static int compareMemory(const char *Lhs, const char *Rhs, size_t Length) { + if (Length == 0) { return 0; } + return ::memcmp(Lhs,Rhs,Length); + } + + public: + /// @name Constructors + /// @{ + + /// Construct an empty string ref. + /*implicit*/ StringRef() : Data(nullptr), Length(0) {} + + /// Construct a string ref from a cstring. + /*implicit*/ StringRef(const char *Str) + : Data(Str) { + //assert(Str && "StringRef cannot be built from a NULL argument"); + if (!Str) + Length = 0; + else + Length = ::strlen(Str); // invoking strlen(NULL) is undefined behavior + } + + /// Construct a string ref from a pointer and length. + LLVM_ATTRIBUTE_ALWAYS_INLINE + /*implicit*/ StringRef(const char *data, size_t length) + : Data(data), Length(length) { + assert((data || length == 0) && + "StringRef cannot be built from a NULL argument with non-null length"); + } + + /// Construct a string ref from an std::string. + LLVM_ATTRIBUTE_ALWAYS_INLINE + /*implicit*/ StringRef(const std::string &Str) + : Data(Str.data()), Length(Str.length()) {} + + /// @} + /// @name Iterators + /// @{ + + iterator begin() const { return Data; } + + iterator end() const { return Data + Length; } + + const unsigned char *bytes_begin() const { + return reinterpret_cast(begin()); + } + const unsigned char *bytes_end() const { + return reinterpret_cast(end()); + } + + /// @} + /// @name String Operations + /// @{ + + /// data - Get a pointer to the start of the string (which may not be null + /// terminated). + LLVM_ATTRIBUTE_ALWAYS_INLINE + const char *data() const { return Data; } + + /// empty - Check if the string is empty. + LLVM_ATTRIBUTE_ALWAYS_INLINE + bool empty() const { return Length == 0; } + + /// size - Get the string size. + LLVM_ATTRIBUTE_ALWAYS_INLINE + size_t size() const { return Length; } + + /// front - Get the first character in the string. + char front() const { + assert(!empty()); + return Data[0]; + } + + /// back - Get the last character in the string. + char back() const { + assert(!empty()); + return Data[Length-1]; + } + + // copy - Allocate copy in Allocator and return StringRef to it. + template StringRef copy(Allocator &A) const { + char *S = A.template Allocate(Length); + std::copy(begin(), end(), S); + return StringRef(S, Length); + } + + /// equals - Check for string equality, this is more efficient than + /// compare() when the relative ordering of inequal strings isn't needed. + LLVM_ATTRIBUTE_ALWAYS_INLINE + bool equals(StringRef RHS) const { + return (Length == RHS.Length && + compareMemory(Data, RHS.Data, RHS.Length) == 0); + } + + /// equals_lower - Check for string equality, ignoring case. + bool equals_lower(StringRef RHS) const { + return Length == RHS.Length && compare_lower(RHS) == 0; + } + + /// compare - Compare two strings; the result is -1, 0, or 1 if this string + /// is lexicographically less than, equal to, or greater than the \p RHS. + LLVM_ATTRIBUTE_ALWAYS_INLINE + int compare(StringRef RHS) const { + // Check the prefix for a mismatch. + if (int Res = compareMemory(Data, RHS.Data, std::min(Length, RHS.Length))) + return Res < 0 ? -1 : 1; + + // Otherwise the prefixes match, so we only need to check the lengths. + if (Length == RHS.Length) + return 0; + return Length < RHS.Length ? -1 : 1; + } + + /// compare_lower - Compare two strings, ignoring case. + int compare_lower(StringRef RHS) const; + + /// compare_numeric - Compare two strings, treating sequences of digits as + /// numbers. + int compare_numeric(StringRef RHS) const; + + /// \brief Determine the edit distance between this string and another + /// string. + /// + /// \param Other the string to compare this string against. + /// + /// \param AllowReplacements whether to allow character + /// replacements (change one character into another) as a single + /// operation, rather than as two operations (an insertion and a + /// removal). + /// + /// \param MaxEditDistance If non-zero, the maximum edit distance that + /// this routine is allowed to compute. If the edit distance will exceed + /// that maximum, returns \c MaxEditDistance+1. + /// + /// \returns the minimum number of character insertions, removals, + /// or (if \p AllowReplacements is \c true) replacements needed to + /// transform one of the given strings into the other. If zero, + /// the strings are identical. + unsigned edit_distance(StringRef Other, bool AllowReplacements = true, + unsigned MaxEditDistance = 0) const; + + /// str - Get the contents as an std::string. + std::string str() const { + if (!Data) return std::string(); + return std::string(Data, Length); + } + + /// @} + /// @name Operator Overloads + /// @{ + + char operator[](size_t Index) const { + assert(Index < Length && "Invalid index!"); + return Data[Index]; + } + + /// @} + /// @name Type Conversions + /// @{ + + operator std::string() const { + return str(); + } + + /// @} + /// @name String Predicates + /// @{ + + /// Check if this string starts with the given \p Prefix. + LLVM_ATTRIBUTE_ALWAYS_INLINE + bool startswith(StringRef Prefix) const { + return Length >= Prefix.Length && + compareMemory(Data, Prefix.Data, Prefix.Length) == 0; + } + + /// Check if this string starts with the given \p Prefix, ignoring case. + bool startswith_lower(StringRef Prefix) const; + + /// Check if this string ends with the given \p Suffix. + LLVM_ATTRIBUTE_ALWAYS_INLINE + bool endswith(StringRef Suffix) const { + return Length >= Suffix.Length && + compareMemory(end() - Suffix.Length, Suffix.Data, Suffix.Length) == 0; + } + + /// Check if this string ends with the given \p Suffix, ignoring case. + bool endswith_lower(StringRef Suffix) const; + + /// @} + /// @name String Searching + /// @{ + + /// Search for the first character \p C in the string. + /// + /// \returns The index of the first occurrence of \p C, or npos if not + /// found. + LLVM_ATTRIBUTE_ALWAYS_INLINE + size_t find(char C, size_t From = 0) const { + size_t FindBegin = std::min(From, Length); + if (FindBegin < Length) { // Avoid calling memchr with nullptr. + // Just forward to memchr, which is faster than a hand-rolled loop. + if (const void *P = ::memchr(Data + FindBegin, C, Length - FindBegin)) + return static_cast(P) - Data; + } + return npos; + } + + /// Search for the first string \p Str in the string. + /// + /// \returns The index of the first occurrence of \p Str, or npos if not + /// found. + size_t find(StringRef Str, size_t From = 0) const; + + /// Search for the last character \p C in the string. + /// + /// \returns The index of the last occurrence of \p C, or npos if not + /// found. + size_t rfind(char C, size_t From = npos) const { + From = std::min(From, Length); + size_t i = From; + while (i != 0) { + --i; + if (Data[i] == C) + return i; + } + return npos; + } + + /// Search for the last string \p Str in the string. + /// + /// \returns The index of the last occurrence of \p Str, or npos if not + /// found. + size_t rfind(StringRef Str) const; + + /// Find the first character in the string that is \p C, or npos if not + /// found. Same as find. + size_t find_first_of(char C, size_t From = 0) const { + return find(C, From); + } + + /// Find the first character in the string that is in \p Chars, or npos if + /// not found. + /// + /// Complexity: O(size() + Chars.size()) + size_t find_first_of(StringRef Chars, size_t From = 0) const; + + /// Find the first character in the string that is not \p C or npos if not + /// found. + size_t find_first_not_of(char C, size_t From = 0) const; + + /// Find the first character in the string that is not in the string + /// \p Chars, or npos if not found. + /// + /// Complexity: O(size() + Chars.size()) + size_t find_first_not_of(StringRef Chars, size_t From = 0) const; + + /// Find the last character in the string that is \p C, or npos if not + /// found. + size_t find_last_of(char C, size_t From = npos) const { + return rfind(C, From); + } + + /// Find the last character in the string that is in \p C, or npos if not + /// found. + /// + /// Complexity: O(size() + Chars.size()) + size_t find_last_of(StringRef Chars, size_t From = npos) const; + + /// Find the last character in the string that is not \p C, or npos if not + /// found. + size_t find_last_not_of(char C, size_t From = npos) const; + + /// Find the last character in the string that is not in \p Chars, or + /// npos if not found. + /// + /// Complexity: O(size() + Chars.size()) + size_t find_last_not_of(StringRef Chars, size_t From = npos) const; + + /// @} + /// @name Helpful Algorithms + /// @{ + + /// Return the number of occurrences of \p C in the string. + size_t count(char C) const { + size_t Count = 0; + for (size_t i = 0, e = Length; i != e; ++i) + if (Data[i] == C) + ++Count; + return Count; + } + + /// Return the number of non-overlapped occurrences of \p Str in + /// the string. + size_t count(StringRef Str) const; + + /// Parse the current string as an integer of the specified radix. If + /// \p Radix is specified as zero, this does radix autosensing using + /// extended C rules: 0 is octal, 0x is hex, 0b is binary. + /// + /// If the string is invalid or if only a subset of the string is valid, + /// this returns true to signify the error. The string is considered + /// erroneous if empty or if it overflows T. + template + typename std::enable_if::is_signed, bool>::type + getAsInteger(unsigned Radix, T &Result) const { + long long LLVal; + if (getAsSignedInteger(*this, Radix, LLVal) || + static_cast(LLVal) != LLVal) + return true; + Result = LLVal; + return false; + } + + template + typename std::enable_if::is_signed, bool>::type + getAsInteger(unsigned Radix, T &Result) const { + unsigned long long ULLVal; + // The additional cast to unsigned long long is required to avoid the + // Visual C++ warning C4805: '!=' : unsafe mix of type 'bool' and type + // 'unsigned __int64' when instantiating getAsInteger with T = bool. + if (getAsUnsignedInteger(*this, Radix, ULLVal) || + static_cast(static_cast(ULLVal)) != ULLVal) + return true; + Result = ULLVal; + return false; + } + + /// Parse the current string as an integer of the specified \p Radix, or of + /// an autosensed radix if the \p Radix given is 0. The current value in + /// \p Result is discarded, and the storage is changed to be wide enough to + /// store the parsed integer. + /// + /// \returns true if the string does not solely consist of a valid + /// non-empty number in the appropriate base. + /// + /// APInt::fromString is superficially similar but assumes the + /// string is well-formed in the given radix. + bool getAsInteger(unsigned Radix, APInt &Result) const; + + /// @} + /// @name String Operations + /// @{ + + // Convert the given ASCII string to lowercase. + std::string lower() const; + + /// Convert the given ASCII string to uppercase. + std::string upper() const; + + /// @} + /// @name Substring Operations + /// @{ + + /// Return a reference to the substring from [Start, Start + N). + /// + /// \param Start The index of the starting character in the substring; if + /// the index is npos or greater than the length of the string then the + /// empty substring will be returned. + /// + /// \param N The number of characters to included in the substring. If N + /// exceeds the number of characters remaining in the string, the string + /// suffix (starting with \p Start) will be returned. + LLVM_ATTRIBUTE_ALWAYS_INLINE + StringRef substr(size_t Start, size_t N = npos) const { + Start = std::min(Start, Length); + return StringRef(Data + Start, std::min(N, Length - Start)); + } + + /// Return a StringRef equal to 'this' but with the first \p N elements + /// dropped. + LLVM_ATTRIBUTE_ALWAYS_INLINE + StringRef drop_front(size_t N = 1) const { + assert(size() >= N && "Dropping more elements than exist"); + return substr(N); + } + + /// Return a StringRef equal to 'this' but with the last \p N elements + /// dropped. + LLVM_ATTRIBUTE_ALWAYS_INLINE + StringRef drop_back(size_t N = 1) const { + assert(size() >= N && "Dropping more elements than exist"); + return substr(0, size()-N); + } + + /// Return a reference to the substring from [Start, End). + /// + /// \param Start The index of the starting character in the substring; if + /// the index is npos or greater than the length of the string then the + /// empty substring will be returned. + /// + /// \param End The index following the last character to include in the + /// substring. If this is npos, or less than \p Start, or exceeds the + /// number of characters remaining in the string, the string suffix + /// (starting with \p Start) will be returned. + LLVM_ATTRIBUTE_ALWAYS_INLINE + StringRef slice(size_t Start, size_t End) const { + Start = std::min(Start, Length); + End = std::min(std::max(Start, End), Length); + return StringRef(Data + Start, End - Start); + } + + /// Split into two substrings around the first occurrence of a separator + /// character. + /// + /// If \p Separator is in the string, then the result is a pair (LHS, RHS) + /// such that (*this == LHS + Separator + RHS) is true and RHS is + /// maximal. If \p Separator is not in the string, then the result is a + /// pair (LHS, RHS) where (*this == LHS) and (RHS == ""). + /// + /// \param Separator The character to split on. + /// \returns The split substrings. + std::pair split(char Separator) const { + size_t Idx = find(Separator); + if (Idx == npos) + return std::make_pair(*this, StringRef()); + return std::make_pair(slice(0, Idx), slice(Idx+1, npos)); + } + + /// Split into two substrings around the first occurrence of a separator + /// string. + /// + /// If \p Separator is in the string, then the result is a pair (LHS, RHS) + /// such that (*this == LHS + Separator + RHS) is true and RHS is + /// maximal. If \p Separator is not in the string, then the result is a + /// pair (LHS, RHS) where (*this == LHS) and (RHS == ""). + /// + /// \param Separator - The string to split on. + /// \return - The split substrings. + std::pair split(StringRef Separator) const { + size_t Idx = find(Separator); + if (Idx == npos) + return std::make_pair(*this, StringRef()); + return std::make_pair(slice(0, Idx), slice(Idx + Separator.size(), npos)); + } + + /// Split into substrings around the occurrences of a separator string. + /// + /// Each substring is stored in \p A. If \p MaxSplit is >= 0, at most + /// \p MaxSplit splits are done and consequently <= \p MaxSplit + 1 + /// elements are added to A. + /// If \p KeepEmpty is false, empty strings are not added to \p A. They + /// still count when considering \p MaxSplit + /// An useful invariant is that + /// Separator.join(A) == *this if MaxSplit == -1 and KeepEmpty == true + /// + /// \param A - Where to put the substrings. + /// \param Separator - The string to split on. + /// \param MaxSplit - The maximum number of times the string is split. + /// \param KeepEmpty - True if empty substring should be added. + void split(SmallVectorImpl &A, + StringRef Separator, int MaxSplit = -1, + bool KeepEmpty = true) const; + + /// Split into substrings around the occurrences of a separator character. + /// + /// Each substring is stored in \p A. If \p MaxSplit is >= 0, at most + /// \p MaxSplit splits are done and consequently <= \p MaxSplit + 1 + /// elements are added to A. + /// If \p KeepEmpty is false, empty strings are not added to \p A. They + /// still count when considering \p MaxSplit + /// An useful invariant is that + /// Separator.join(A) == *this if MaxSplit == -1 and KeepEmpty == true + /// + /// \param A - Where to put the substrings. + /// \param Separator - The string to split on. + /// \param MaxSplit - The maximum number of times the string is split. + /// \param KeepEmpty - True if empty substring should be added. + void split(SmallVectorImpl &A, char Separator, int MaxSplit = -1, + bool KeepEmpty = true) const; + + /// Split into two substrings around the last occurrence of a separator + /// character. + /// + /// If \p Separator is in the string, then the result is a pair (LHS, RHS) + /// such that (*this == LHS + Separator + RHS) is true and RHS is + /// minimal. If \p Separator is not in the string, then the result is a + /// pair (LHS, RHS) where (*this == LHS) and (RHS == ""). + /// + /// \param Separator - The character to split on. + /// \return - The split substrings. + std::pair rsplit(char Separator) const { + size_t Idx = rfind(Separator); + if (Idx == npos) + return std::make_pair(*this, StringRef()); + return std::make_pair(slice(0, Idx), slice(Idx+1, npos)); + } + + /// Return string with consecutive characters in \p Chars starting from + /// the left removed. + StringRef ltrim(StringRef Chars = " \t\n\v\f\r") const { + return drop_front(std::min(Length, find_first_not_of(Chars))); + } + + /// Return string with consecutive characters in \p Chars starting from + /// the right removed. + StringRef rtrim(StringRef Chars = " \t\n\v\f\r") const { + return drop_back(Length - std::min(Length, find_last_not_of(Chars) + 1)); + } + + /// Return string with consecutive characters in \p Chars starting from + /// the left and right removed. + StringRef trim(StringRef Chars = " \t\n\v\f\r") const { + return ltrim(Chars).rtrim(Chars); + } + + /// @} + }; + + /// @name StringRef Comparison Operators + /// @{ + + LLVM_ATTRIBUTE_ALWAYS_INLINE + inline bool operator==(StringRef LHS, StringRef RHS) { + return LHS.equals(RHS); + } + + LLVM_ATTRIBUTE_ALWAYS_INLINE + inline bool operator!=(StringRef LHS, StringRef RHS) { + return !(LHS == RHS); + } + + inline bool operator<(StringRef LHS, StringRef RHS) { + return LHS.compare(RHS) == -1; + } + + inline bool operator<=(StringRef LHS, StringRef RHS) { + return LHS.compare(RHS) != 1; + } + + inline bool operator>(StringRef LHS, StringRef RHS) { + return LHS.compare(RHS) == 1; + } + + inline bool operator>=(StringRef LHS, StringRef RHS) { + return LHS.compare(RHS) != -1; + } + + inline std::string &operator+=(std::string &buffer, StringRef string) { + return buffer.append(string.data(), string.size()); + } + + /// @} + + /// \brief Compute a hash_code for a StringRef. + hash_code hash_value(StringRef S); + + // StringRefs can be treated like a POD type. + template struct isPodLike; + template <> struct isPodLike { static const bool value = true; }; +} + +#endif diff --git a/llvm/include/llvm/ADT/StringSet.h b/llvm/include/llvm/ADT/StringSet.h new file mode 100644 index 0000000..407b32f --- /dev/null +++ b/llvm/include/llvm/ADT/StringSet.h @@ -0,0 +1,39 @@ +//===--- StringSet.h - The LLVM Compiler Driver -----------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open +// Source License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// StringSet - A set-like wrapper for the StringMap. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_STRINGSET_H +#define LLVM_ADT_STRINGSET_H + +#include "llvm/ADT/StringMap.h" + +namespace llvm_ks { + + /// StringSet - A wrapper for StringMap that provides set-like functionality. + template + class StringSet : public llvm_ks::StringMap { + typedef llvm_ks::StringMap base; + public: + StringSet() = default; + StringSet(std::initializer_list S) { + for (StringRef X : S) + insert(X); + } + + std::pair insert(StringRef Key) { + assert(!Key.empty()); + return base::insert(std::make_pair(Key, '\0')); + } + }; +} + +#endif // LLVM_ADT_STRINGSET_H diff --git a/llvm/include/llvm/ADT/StringSwitch.h b/llvm/include/llvm/ADT/StringSwitch.h new file mode 100644 index 0000000..c9f91af --- /dev/null +++ b/llvm/include/llvm/ADT/StringSwitch.h @@ -0,0 +1,166 @@ +//===--- StringSwitch.h - Switch-on-literal-string Construct --------------===/ +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +//===----------------------------------------------------------------------===/ +// +// This file implements the StringSwitch template, which mimics a switch() +// statement whose cases are string literals. +// +//===----------------------------------------------------------------------===/ +#ifndef LLVM_ADT_STRINGSWITCH_H +#define LLVM_ADT_STRINGSWITCH_H + +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/Compiler.h" +#include +#include + +namespace llvm_ks { + +/// \brief A switch()-like statement whose cases are string literals. +/// +/// The StringSwitch class is a simple form of a switch() statement that +/// determines whether the given string matches one of the given string +/// literals. The template type parameter \p T is the type of the value that +/// will be returned from the string-switch expression. For example, +/// the following code switches on the name of a color in \c argv[i]: +/// +/// \code +/// Color color = StringSwitch(argv[i]) +/// .Case("red", Red) +/// .Case("orange", Orange) +/// .Case("yellow", Yellow) +/// .Case("green", Green) +/// .Case("blue", Blue) +/// .Case("indigo", Indigo) +/// .Cases("violet", "purple", Violet) +/// .Default(UnknownColor); +/// \endcode +template +class StringSwitch { + /// \brief The string we are matching. + StringRef Str; + + /// \brief The pointer to the result of this switch statement, once known, + /// null before that. + const T *Result; + +public: + LLVM_ATTRIBUTE_ALWAYS_INLINE + explicit StringSwitch(StringRef S) + : Str(S), Result(nullptr) { } + + template + LLVM_ATTRIBUTE_ALWAYS_INLINE + StringSwitch& Case(const char (&S)[N], const T& Value) { + if (!Result && N-1 == Str.size() && + (std::memcmp(S, Str.data(), N-1) == 0)) { + Result = &Value; + } + + return *this; + } + + template + LLVM_ATTRIBUTE_ALWAYS_INLINE + StringSwitch& EndsWith(const char (&S)[N], const T &Value) { + if (!Result && Str.size() >= N-1 && + std::memcmp(S, Str.data() + Str.size() + 1 - N, N-1) == 0) { + Result = &Value; + } + + return *this; + } + + template + LLVM_ATTRIBUTE_ALWAYS_INLINE + StringSwitch& StartsWith(const char (&S)[N], const T &Value) { + if (!Result && Str.size() >= N-1 && + std::memcmp(S, Str.data(), N-1) == 0) { + Result = &Value; + } + + return *this; + } + + template + LLVM_ATTRIBUTE_ALWAYS_INLINE + StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], + const T& Value) { + if (!Result && ( + (N0-1 == Str.size() && std::memcmp(S0, Str.data(), N0-1) == 0) || + (N1-1 == Str.size() && std::memcmp(S1, Str.data(), N1-1) == 0))) { + Result = &Value; + } + + return *this; + } + + template + LLVM_ATTRIBUTE_ALWAYS_INLINE + StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], + const char (&S2)[N2], const T& Value) { + if (!Result && ( + (N0-1 == Str.size() && std::memcmp(S0, Str.data(), N0-1) == 0) || + (N1-1 == Str.size() && std::memcmp(S1, Str.data(), N1-1) == 0) || + (N2-1 == Str.size() && std::memcmp(S2, Str.data(), N2-1) == 0))) { + Result = &Value; + } + + return *this; + } + + template + LLVM_ATTRIBUTE_ALWAYS_INLINE + StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], + const char (&S2)[N2], const char (&S3)[N3], + const T& Value) { + if (!Result && ( + (N0-1 == Str.size() && std::memcmp(S0, Str.data(), N0-1) == 0) || + (N1-1 == Str.size() && std::memcmp(S1, Str.data(), N1-1) == 0) || + (N2-1 == Str.size() && std::memcmp(S2, Str.data(), N2-1) == 0) || + (N3-1 == Str.size() && std::memcmp(S3, Str.data(), N3-1) == 0))) { + Result = &Value; + } + + return *this; + } + + template + LLVM_ATTRIBUTE_ALWAYS_INLINE + StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], + const char (&S2)[N2], const char (&S3)[N3], + const char (&S4)[N4], const T& Value) { + if (!Result && ( + (N0-1 == Str.size() && std::memcmp(S0, Str.data(), N0-1) == 0) || + (N1-1 == Str.size() && std::memcmp(S1, Str.data(), N1-1) == 0) || + (N2-1 == Str.size() && std::memcmp(S2, Str.data(), N2-1) == 0) || + (N3-1 == Str.size() && std::memcmp(S3, Str.data(), N3-1) == 0) || + (N4-1 == Str.size() && std::memcmp(S4, Str.data(), N4-1) == 0))) { + Result = &Value; + } + + return *this; + } + + LLVM_ATTRIBUTE_ALWAYS_INLINE + R Default(const T& Value) const { + if (Result) + return *Result; + + return Value; + } + + LLVM_ATTRIBUTE_ALWAYS_INLINE + operator R() const { + assert(Result && "Fell off the end of a string-switch"); + return *Result; + } +}; + +} // end namespace llvm_ks + +#endif // LLVM_ADT_STRINGSWITCH_H diff --git a/llvm/include/llvm/ADT/Triple.h b/llvm/include/llvm/ADT/Triple.h new file mode 100644 index 0000000..806d63d --- /dev/null +++ b/llvm/include/llvm/ADT/Triple.h @@ -0,0 +1,685 @@ +//===-- llvm/ADT/Triple.h - Target triple helper class ----------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_TRIPLE_H +#define LLVM_ADT_TRIPLE_H + +#include "llvm/ADT/Twine.h" + +// Some system headers or GCC predefined macros conflict with identifiers in +// this file. Undefine them here. +#undef NetBSD +#undef mips +#undef sparc + +namespace llvm_ks { + +/// Triple - Helper class for working with autoconf configuration names. For +/// historical reasons, we also call these 'triples' (they used to contain +/// exactly three fields). +/// +/// Configuration names are strings in the canonical form: +/// ARCHITECTURE-VENDOR-OPERATING_SYSTEM +/// or +/// ARCHITECTURE-VENDOR-OPERATING_SYSTEM-ENVIRONMENT +/// +/// This class is used for clients which want to support arbitrary +/// configuration names, but also want to implement certain special +/// behavior for particular configurations. This class isolates the mapping +/// from the components of the configuration name to well known IDs. +/// +/// At its core the Triple class is designed to be a wrapper for a triple +/// string; the constructor does not change or normalize the triple string. +/// Clients that need to handle the non-canonical triples that users often +/// specify should use the normalize method. +/// +/// See autoconf/config.guess for a glimpse into what configuration names +/// look like in practice. +class Triple { +public: + enum ArchType { + UnknownArch, + + arm, // ARM (little endian): arm, armv.*, xscale + armeb, // ARM (big endian): armeb + aarch64, // AArch64 (little endian): aarch64 + aarch64_be, // AArch64 (big endian): aarch64_be + avr, // AVR: Atmel AVR microcontroller + bpfel, // eBPF or extended BPF or 64-bit BPF (little endian) + bpfeb, // eBPF or extended BPF or 64-bit BPF (big endian) + hexagon, // Hexagon: hexagon + mips, // MIPS: mips, mipsallegrex + mipsel, // MIPSEL: mipsel, mipsallegrexel + mips64, // MIPS64: mips64 + mips64el, // MIPS64EL: mips64el + msp430, // MSP430: msp430 + ppc, // PPC: powerpc + ppc64, // PPC64: powerpc64, ppu + ppc64le, // PPC64LE: powerpc64le + r600, // R600: AMD GPUs HD2XXX - HD6XXX + amdgcn, // AMDGCN: AMD GCN GPUs + sparc, // Sparc: sparc + sparcv9, // Sparcv9: Sparcv9 + sparcel, // Sparc: (endianness = little). NB: 'Sparcle' is a CPU variant + systemz, // SystemZ: s390x + tce, // TCE (http://tce.cs.tut.fi/): tce + thumb, // Thumb (little endian): thumb, thumbv.* + thumbeb, // Thumb (big endian): thumbeb + x86, // X86: i[3-9]86 + x86_64, // X86-64: amd64, x86_64 + xcore, // XCore: xcore + nvptx, // NVPTX: 32-bit + nvptx64, // NVPTX: 64-bit + le32, // le32: generic little-endian 32-bit CPU (PNaCl) + le64, // le64: generic little-endian 64-bit CPU (PNaCl) + amdil, // AMDIL + amdil64, // AMDIL with 64-bit pointers + hsail, // AMD HSAIL + hsail64, // AMD HSAIL with 64-bit pointers + spir, // SPIR: standard portable IR for OpenCL 32-bit version + spir64, // SPIR: standard portable IR for OpenCL 64-bit version + kalimba, // Kalimba: generic kalimba + shave, // SHAVE: Movidius vector VLIW processors + wasm32, // WebAssembly with 32-bit pointers + wasm64, // WebAssembly with 64-bit pointers + LastArchType = wasm64 + }; + enum SubArchType { + NoSubArch, + + ARMSubArch_v8_2a, + ARMSubArch_v8_1a, + ARMSubArch_v8, + ARMSubArch_v8m_baseline, + ARMSubArch_v8m_mainline, + ARMSubArch_v7, + ARMSubArch_v7em, + ARMSubArch_v7m, + ARMSubArch_v7s, + ARMSubArch_v7k, + ARMSubArch_v6, + ARMSubArch_v6m, + ARMSubArch_v6k, + ARMSubArch_v6t2, + ARMSubArch_v5, + ARMSubArch_v5te, + ARMSubArch_v4t, + + KalimbaSubArch_v3, + KalimbaSubArch_v4, + KalimbaSubArch_v5 + }; + enum VendorType { + UnknownVendor, + + Apple, + PC, + SCEI, + BGP, + BGQ, + Freescale, + IBM, + ImaginationTechnologies, + MipsTechnologies, + NVIDIA, + CSR, + Myriad, + LastVendorType = Myriad + }; + enum OSType { + UnknownOS, + + CloudABI, + Darwin, + DragonFly, + FreeBSD, + IOS, + KFreeBSD, + Linux, + Lv2, // PS3 + MacOSX, + NetBSD, + OpenBSD, + Solaris, + Win32, + Haiku, + Minix, + RTEMS, + NaCl, // Native Client + CNK, // BG/P Compute-Node Kernel + Bitrig, + AIX, + CUDA, // NVIDIA CUDA + NVCL, // NVIDIA OpenCL + AMDHSA, // AMD HSA Runtime + PS4, + ELFIAMCU, + TvOS, // Apple tvOS + WatchOS, // Apple watchOS + LastOSType = WatchOS + }; + enum EnvironmentType { + UnknownEnvironment, + + GNU, + GNUEABI, + GNUEABIHF, + GNUX32, + CODE16, + EABI, + EABIHF, + Android, + + MSVC, + Itanium, + Cygnus, + AMDOpenCL, + CoreCLR, + LastEnvironmentType = CoreCLR + }; + enum ObjectFormatType { + UnknownObjectFormat, + + COFF, + ELF, + MachO, + }; + +private: + std::string Data; + + /// The parsed arch type. + ArchType Arch; + + /// The parsed subarchitecture type. + SubArchType SubArch; + + /// The parsed vendor type. + VendorType Vendor; + + /// The parsed OS type. + OSType OS; + + /// The parsed Environment type. + EnvironmentType Environment; + + /// The object format type. + ObjectFormatType ObjectFormat; + +public: + /// @name Constructors + /// @{ + + /// Default constructor is the same as an empty string and leaves all + /// triple fields unknown. + Triple() : Data(), Arch(), Vendor(), OS(), Environment(), ObjectFormat() {} + + explicit Triple(const Twine &Str); + Triple(const Twine &ArchStr, const Twine &VendorStr, const Twine &OSStr); + Triple(const Twine &ArchStr, const Twine &VendorStr, const Twine &OSStr, + const Twine &EnvironmentStr); + + bool operator==(const Triple &Other) const { + return Arch == Other.Arch && SubArch == Other.SubArch && + Vendor == Other.Vendor && OS == Other.OS && + Environment == Other.Environment && + ObjectFormat == Other.ObjectFormat; + } + + /// @} + /// @name Normalization + /// @{ + + /// normalize - Turn an arbitrary machine specification into the canonical + /// triple form (or something sensible that the Triple class understands if + /// nothing better can reasonably be done). In particular, it handles the + /// common case in which otherwise valid components are in the wrong order. + static std::string normalize(StringRef Str); + + /// Return the normalized form of this triple's string. + std::string normalize() const { return normalize(Data); } + + /// @} + /// @name Typed Component Access + /// @{ + + /// getArch - Get the parsed architecture type of this triple. + ArchType getArch() const { return Arch; } + + /// getSubArch - get the parsed subarchitecture type for this triple. + SubArchType getSubArch() const { return SubArch; } + + /// getVendor - Get the parsed vendor type of this triple. + VendorType getVendor() const { return Vendor; } + + /// getOS - Get the parsed operating system type of this triple. + OSType getOS() const { return OS; } + + /// hasEnvironment - Does this triple have the optional environment + /// (fourth) component? + bool hasEnvironment() const { + return getEnvironmentName() != ""; + } + + /// getEnvironment - Get the parsed environment type of this triple. + EnvironmentType getEnvironment() const { return Environment; } + + /// Parse the version number from the OS name component of the + /// triple, if present. + /// + /// For example, "fooos1.2.3" would return (1, 2, 3). + /// + /// If an entry is not defined, it will be returned as 0. + void getEnvironmentVersion(unsigned &Major, unsigned &Minor, + unsigned &Micro) const; + + /// getFormat - Get the object format for this triple. + ObjectFormatType getObjectFormat() const { return ObjectFormat; } + + /// getOSVersion - Parse the version number from the OS name component of the + /// triple, if present. + /// + /// For example, "fooos1.2.3" would return (1, 2, 3). + /// + /// If an entry is not defined, it will be returned as 0. + void getOSVersion(unsigned &Major, unsigned &Minor, unsigned &Micro) const; + + /// getOSMajorVersion - Return just the major version number, this is + /// specialized because it is a common query. + unsigned getOSMajorVersion() const { + unsigned Maj, Min, Micro; + getOSVersion(Maj, Min, Micro); + return Maj; + } + + /// getMacOSXVersion - Parse the version number as with getOSVersion and then + /// translate generic "darwin" versions to the corresponding OS X versions. + /// This may also be called with IOS triples but the OS X version number is + /// just set to a constant 10.4.0 in that case. Returns true if successful. + bool getMacOSXVersion(unsigned &Major, unsigned &Minor, + unsigned &Micro) const; + + /// getiOSVersion - Parse the version number as with getOSVersion. This should + /// only be called with IOS or generic triples. + void getiOSVersion(unsigned &Major, unsigned &Minor, + unsigned &Micro) const; + + /// getWatchOSVersion - Parse the version number as with getOSVersion. This + /// should only be called with WatchOS or generic triples. + void getWatchOSVersion(unsigned &Major, unsigned &Minor, + unsigned &Micro) const; + + /// @} + /// @name Direct Component Access + /// @{ + + const std::string &str() const { return Data; } + + const std::string &getTriple() const { return Data; } + + /// getArchName - Get the architecture (first) component of the + /// triple. + StringRef getArchName() const; + + /// getVendorName - Get the vendor (second) component of the triple. + StringRef getVendorName() const; + + /// getOSName - Get the operating system (third) component of the + /// triple. + StringRef getOSName() const; + + /// getEnvironmentName - Get the optional environment (fourth) + /// component of the triple, or "" if empty. + StringRef getEnvironmentName() const; + + /// getOSAndEnvironmentName - Get the operating system and optional + /// environment components as a single string (separated by a '-' + /// if the environment component is present). + StringRef getOSAndEnvironmentName() const; + + /// @} + /// @name Convenience Predicates + /// @{ + + /// Test whether the architecture is 64-bit + /// + /// Note that this tests for 64-bit pointer width, and nothing else. Note + /// that we intentionally expose only three predicates, 64-bit, 32-bit, and + /// 16-bit. The inner details of pointer width for particular architectures + /// is not summed up in the triple, and so only a coarse grained predicate + /// system is provided. + bool isArch64Bit() const; + + /// Test whether the architecture is 32-bit + /// + /// Note that this tests for 32-bit pointer width, and nothing else. + bool isArch32Bit() const; + + /// Test whether the architecture is 16-bit + /// + /// Note that this tests for 16-bit pointer width, and nothing else. + bool isArch16Bit() const; + + /// isOSVersionLT - Helper function for doing comparisons against version + /// numbers included in the target triple. + bool isOSVersionLT(unsigned Major, unsigned Minor = 0, + unsigned Micro = 0) const { + unsigned LHS[3]; + getOSVersion(LHS[0], LHS[1], LHS[2]); + + if (LHS[0] != Major) + return LHS[0] < Major; + if (LHS[1] != Minor) + return LHS[1] < Minor; + if (LHS[2] != Micro) + return LHS[1] < Micro; + + return false; + } + + bool isOSVersionLT(const Triple &Other) const { + unsigned RHS[3]; + Other.getOSVersion(RHS[0], RHS[1], RHS[2]); + return isOSVersionLT(RHS[0], RHS[1], RHS[2]); + } + + /// isMacOSXVersionLT - Comparison function for checking OS X version + /// compatibility, which handles supporting skewed version numbering schemes + /// used by the "darwin" triples. + unsigned isMacOSXVersionLT(unsigned Major, unsigned Minor = 0, + unsigned Micro = 0) const { + assert(isMacOSX() && "Not an OS X triple!"); + + // If this is OS X, expect a sane version number. + if (getOS() == Triple::MacOSX) + return isOSVersionLT(Major, Minor, Micro); + + // Otherwise, compare to the "Darwin" number. + assert(Major == 10 && "Unexpected major version"); + return isOSVersionLT(Minor + 4, Micro, 0); + } + + /// isMacOSX - Is this a Mac OS X triple. For legacy reasons, we support both + /// "darwin" and "osx" as OS X triples. + bool isMacOSX() const { + return getOS() == Triple::Darwin || getOS() == Triple::MacOSX; + } + + /// Is this an iOS triple. + /// Note: This identifies tvOS as a variant of iOS. If that ever + /// changes, i.e., if the two operating systems diverge or their version + /// numbers get out of sync, that will need to be changed. + /// watchOS has completely different version numbers so it is not included. + bool isiOS() const { + return getOS() == Triple::IOS || isTvOS(); + } + + /// Is this an Apple tvOS triple. + bool isTvOS() const { + return getOS() == Triple::TvOS; + } + + /// Is this an Apple watchOS triple. + bool isWatchOS() const { + return getOS() == Triple::WatchOS; + } + + bool isWatchABI() const { + return getSubArch() == Triple::ARMSubArch_v7k; + } + + /// isOSDarwin - Is this a "Darwin" OS (OS X, iOS, or watchOS). + bool isOSDarwin() const { + return isMacOSX() || isiOS() || isWatchOS(); + } + + bool isOSNetBSD() const { + return getOS() == Triple::NetBSD; + } + + bool isOSOpenBSD() const { + return getOS() == Triple::OpenBSD; + } + + bool isOSFreeBSD() const { + return getOS() == Triple::FreeBSD; + } + + bool isOSDragonFly() const { return getOS() == Triple::DragonFly; } + + bool isOSSolaris() const { + return getOS() == Triple::Solaris; + } + + bool isOSBitrig() const { + return getOS() == Triple::Bitrig; + } + + bool isOSIAMCU() const { + return getOS() == Triple::ELFIAMCU; + } + + /// Checks if the environment could be MSVC. + bool isWindowsMSVCEnvironment() const { + return getOS() == Triple::Win32 && + (getEnvironment() == Triple::UnknownEnvironment || + getEnvironment() == Triple::MSVC); + } + + /// Checks if the environment is MSVC. + bool isKnownWindowsMSVCEnvironment() const { + return getOS() == Triple::Win32 && getEnvironment() == Triple::MSVC; + } + + bool isWindowsCoreCLREnvironment() const { + return getOS() == Triple::Win32 && getEnvironment() == Triple::CoreCLR; + } + + bool isWindowsItaniumEnvironment() const { + return getOS() == Triple::Win32 && getEnvironment() == Triple::Itanium; + } + + bool isWindowsCygwinEnvironment() const { + return getOS() == Triple::Win32 && getEnvironment() == Triple::Cygnus; + } + + bool isWindowsGNUEnvironment() const { + return getOS() == Triple::Win32 && getEnvironment() == Triple::GNU; + } + + /// Tests for either Cygwin or MinGW OS + bool isOSCygMing() const { + return isWindowsCygwinEnvironment() || isWindowsGNUEnvironment(); + } + + /// Is this a "Windows" OS targeting a "MSVCRT.dll" environment. + bool isOSMSVCRT() const { + return isWindowsMSVCEnvironment() || isWindowsGNUEnvironment() || + isWindowsItaniumEnvironment(); + } + + /// Tests whether the OS is Windows. + bool isOSWindows() const { + return getOS() == Triple::Win32; + } + + /// Tests whether the OS is NaCl (Native Client) + bool isOSNaCl() const { + return getOS() == Triple::NaCl; + } + + /// Tests whether the OS is Linux. + bool isOSLinux() const { + return getOS() == Triple::Linux; + } + + /// Tests whether the OS uses the ELF binary format. + bool isOSBinFormatELF() const { + return getObjectFormat() == Triple::ELF; + } + + /// Tests whether the OS uses the COFF binary format. + bool isOSBinFormatCOFF() const { + return getObjectFormat() == Triple::COFF; + } + + /// Tests whether the environment is MachO. + bool isOSBinFormatMachO() const { + return getObjectFormat() == Triple::MachO; + } + + /// Tests whether the target is the PS4 CPU + bool isPS4CPU() const { + return getArch() == Triple::x86_64 && + getVendor() == Triple::SCEI && + getOS() == Triple::PS4; + } + + /// Tests whether the target is the PS4 platform + bool isPS4() const { + return getVendor() == Triple::SCEI && + getOS() == Triple::PS4; + } + + /// Tests whether the target is Android + bool isAndroid() const { return getEnvironment() == Triple::Android; } + + /// Tests whether the target is NVPTX (32- or 64-bit). + bool isNVPTX() const { + return getArch() == Triple::nvptx || getArch() == Triple::nvptx64; + } + + /// @} + /// @name Mutators + /// @{ + + /// setArch - Set the architecture (first) component of the triple + /// to a known type. + void setArch(ArchType Kind); + + /// setVendor - Set the vendor (second) component of the triple to a + /// known type. + void setVendor(VendorType Kind); + + /// setOS - Set the operating system (third) component of the triple + /// to a known type. + void setOS(OSType Kind); + + /// setEnvironment - Set the environment (fourth) component of the triple + /// to a known type. + void setEnvironment(EnvironmentType Kind); + + /// setObjectFormat - Set the object file format + void setObjectFormat(ObjectFormatType Kind); + + /// setTriple - Set all components to the new triple \p Str. + void setTriple(const Twine &Str); + + /// setArchName - Set the architecture (first) component of the + /// triple by name. + void setArchName(StringRef Str); + + /// setVendorName - Set the vendor (second) component of the triple + /// by name. + void setVendorName(StringRef Str); + + /// setOSName - Set the operating system (third) component of the + /// triple by name. + void setOSName(StringRef Str); + + /// setEnvironmentName - Set the optional environment (fourth) + /// component of the triple by name. + void setEnvironmentName(StringRef Str); + + /// setOSAndEnvironmentName - Set the operating system and optional + /// environment components with a single string. + void setOSAndEnvironmentName(StringRef Str); + + /// @} + /// @name Helpers to build variants of a particular triple. + /// @{ + + /// Form a triple with a 32-bit variant of the current architecture. + /// + /// This can be used to move across "families" of architectures where useful. + /// + /// \returns A new triple with a 32-bit architecture or an unknown + /// architecture if no such variant can be found. + llvm_ks::Triple get32BitArchVariant() const; + + /// Form a triple with a 64-bit variant of the current architecture. + /// + /// This can be used to move across "families" of architectures where useful. + /// + /// \returns A new triple with a 64-bit architecture or an unknown + /// architecture if no such variant can be found. + llvm_ks::Triple get64BitArchVariant() const; + + /// Form a triple with a big endian variant of the current architecture. + /// + /// This can be used to move across "families" of architectures where useful. + /// + /// \returns A new triple with a big endian architecture or an unknown + /// architecture if no such variant can be found. + llvm_ks::Triple getBigEndianArchVariant() const; + + /// Form a triple with a little endian variant of the current architecture. + /// + /// This can be used to move across "families" of architectures where useful. + /// + /// \returns A new triple with a little endian architecture or an unknown + /// architecture if no such variant can be found. + llvm_ks::Triple getLittleEndianArchVariant() const; + + /// Get the (LLVM) name of the minimum ARM CPU for the arch we are targeting. + /// + /// \param Arch the architecture name (e.g., "armv7s"). If it is an empty + /// string then the triple's arch name is used. + StringRef getARMCPUForArch(StringRef Arch = StringRef()) const; + + /// @} + /// @name Static helpers for IDs. + /// @{ + + /// getArchTypeName - Get the canonical name for the \p Kind architecture. + static const char *getArchTypeName(ArchType Kind); + + /// getArchTypePrefix - Get the "prefix" canonical name for the \p Kind + /// architecture. This is the prefix used by the architecture specific + /// builtins, and is suitable for passing to \see + /// Intrinsic::getIntrinsicForGCCBuiltin(). + /// + /// \return - The architecture prefix, or 0 if none is defined. + static const char *getArchTypePrefix(ArchType Kind); + + /// getVendorTypeName - Get the canonical name for the \p Kind vendor. + static const char *getVendorTypeName(VendorType Kind); + + /// getOSTypeName - Get the canonical name for the \p Kind operating system. + static const char *getOSTypeName(OSType Kind); + + /// getEnvironmentTypeName - Get the canonical name for the \p Kind + /// environment. + static const char *getEnvironmentTypeName(EnvironmentType Kind); + + /// @} + /// @name Static helpers for converting alternate architecture names. + /// @{ + + /// getArchTypeForLLVMName - The canonical type for the given LLVM + /// architecture name (e.g., "x86"). + static ArchType getArchTypeForLLVMName(StringRef Str); + + /// @} +}; + +} // End llvm namespace + + +#endif diff --git a/llvm/include/llvm/ADT/Twine.h b/llvm/include/llvm/ADT/Twine.h new file mode 100644 index 0000000..2b11962 --- /dev/null +++ b/llvm/include/llvm/ADT/Twine.h @@ -0,0 +1,540 @@ +//===-- Twine.h - Fast Temporary String Concatenation -----------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_TWINE_H +#define LLVM_ADT_TWINE_H + +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/DataTypes.h" +#include "llvm/Support/ErrorHandling.h" +#include +#include + +namespace llvm_ks { + class raw_ostream; + + /// Twine - A lightweight data structure for efficiently representing the + /// concatenation of temporary values as strings. + /// + /// A Twine is a kind of rope, it represents a concatenated string using a + /// binary-tree, where the string is the preorder of the nodes. Since the + /// Twine can be efficiently rendered into a buffer when its result is used, + /// it avoids the cost of generating temporary values for intermediate string + /// results -- particularly in cases when the Twine result is never + /// required. By explicitly tracking the type of leaf nodes, we can also avoid + /// the creation of temporary strings for conversions operations (such as + /// appending an integer to a string). + /// + /// A Twine is not intended for use directly and should not be stored, its + /// implementation relies on the ability to store pointers to temporary stack + /// objects which may be deallocated at the end of a statement. Twines should + /// only be used accepted as const references in arguments, when an API wishes + /// to accept possibly-concatenated strings. + /// + /// Twines support a special 'null' value, which always concatenates to form + /// itself, and renders as an empty string. This can be returned from APIs to + /// effectively nullify any concatenations performed on the result. + /// + /// \b Implementation + /// + /// Given the nature of a Twine, it is not possible for the Twine's + /// concatenation method to construct interior nodes; the result must be + /// represented inside the returned value. For this reason a Twine object + /// actually holds two values, the left- and right-hand sides of a + /// concatenation. We also have nullary Twine objects, which are effectively + /// sentinel values that represent empty strings. + /// + /// Thus, a Twine can effectively have zero, one, or two children. The \see + /// isNullary(), \see isUnary(), and \see isBinary() predicates exist for + /// testing the number of children. + /// + /// We maintain a number of invariants on Twine objects (FIXME: Why): + /// - Nullary twines are always represented with their Kind on the left-hand + /// side, and the Empty kind on the right-hand side. + /// - Unary twines are always represented with the value on the left-hand + /// side, and the Empty kind on the right-hand side. + /// - If a Twine has another Twine as a child, that child should always be + /// binary (otherwise it could have been folded into the parent). + /// + /// These invariants are check by \see isValid(). + /// + /// \b Efficiency Considerations + /// + /// The Twine is designed to yield efficient and small code for common + /// situations. For this reason, the concat() method is inlined so that + /// concatenations of leaf nodes can be optimized into stores directly into a + /// single stack allocated object. + /// + /// In practice, not all compilers can be trusted to optimize concat() fully, + /// so we provide two additional methods (and accompanying operator+ + /// overloads) to guarantee that particularly important cases (cstring plus + /// StringRef) codegen as desired. + class Twine { + /// NodeKind - Represent the type of an argument. + enum NodeKind : unsigned char { + /// An empty string; the result of concatenating anything with it is also + /// empty. + NullKind, + + /// The empty string. + EmptyKind, + + /// A pointer to a Twine instance. + TwineKind, + + /// A pointer to a C string instance. + CStringKind, + + /// A pointer to an std::string instance. + StdStringKind, + + /// A pointer to a StringRef instance. + StringRefKind, + + /// A pointer to a SmallString instance. + SmallStringKind, + + /// A char value, to render as a character. + CharKind, + + /// An unsigned int value, to render as an unsigned decimal integer. + DecUIKind, + + /// An int value, to render as a signed decimal integer. + DecIKind, + + /// A pointer to an unsigned long value, to render as an unsigned decimal + /// integer. + DecULKind, + + /// A pointer to a long value, to render as a signed decimal integer. + DecLKind, + + /// A pointer to an unsigned long long value, to render as an unsigned + /// decimal integer. + DecULLKind, + + /// A pointer to a long long value, to render as a signed decimal integer. + DecLLKind, + + /// A pointer to a uint64_t value, to render as an unsigned hexadecimal + /// integer. + UHexKind + }; + + union Child + { + const Twine *twine; + const char *cString; + const std::string *stdString; + const StringRef *stringRef; + const SmallVectorImpl *smallString; + char character; + unsigned int decUI; + int decI; + const unsigned long *decUL; + const long *decL; + const unsigned long long *decULL; + const long long *decLL; + const uint64_t *uHex; + }; + + private: + /// LHS - The prefix in the concatenation, which may be uninitialized for + /// Null or Empty kinds. + Child LHS; + /// RHS - The suffix in the concatenation, which may be uninitialized for + /// Null or Empty kinds. + Child RHS; + /// LHSKind - The NodeKind of the left hand side, \see getLHSKind(). + NodeKind LHSKind; + /// RHSKind - The NodeKind of the right hand side, \see getRHSKind(). + NodeKind RHSKind; + + private: + /// Construct a nullary twine; the kind must be NullKind or EmptyKind. + explicit Twine(NodeKind Kind) + : LHSKind(Kind), RHSKind(EmptyKind) { + assert(isNullary() && "Invalid kind!"); + } + + /// Construct a binary twine. + explicit Twine(const Twine &LHS, const Twine &RHS) + : LHSKind(TwineKind), RHSKind(TwineKind) { + this->LHS.twine = &LHS; + this->RHS.twine = &RHS; + assert(isValid() && "Invalid twine!"); + } + + /// Construct a twine from explicit values. + explicit Twine(Child LHS, NodeKind LHSKind, Child RHS, NodeKind RHSKind) + : LHS(LHS), RHS(RHS), LHSKind(LHSKind), RHSKind(RHSKind) { + assert(isValid() && "Invalid twine!"); + } + + /// Since the intended use of twines is as temporary objects, assignments + /// when concatenating might cause undefined behavior or stack corruptions + Twine &operator=(const Twine &Other) = delete; + + /// Check for the null twine. + bool isNull() const { + return getLHSKind() == NullKind; + } + + /// Check for the empty twine. + bool isEmpty() const { + return getLHSKind() == EmptyKind; + } + + /// Check if this is a nullary twine (null or empty). + bool isNullary() const { + return isNull() || isEmpty(); + } + + /// Check if this is a unary twine. + bool isUnary() const { + return getRHSKind() == EmptyKind && !isNullary(); + } + + /// Check if this is a binary twine. + bool isBinary() const { + return getLHSKind() != NullKind && getRHSKind() != EmptyKind; + } + + /// Check if this is a valid twine (satisfying the invariants on + /// order and number of arguments). + bool isValid() const { + // Nullary twines always have Empty on the RHS. + if (isNullary() && getRHSKind() != EmptyKind) + return false; + + // Null should never appear on the RHS. + if (getRHSKind() == NullKind) + return false; + + // The RHS cannot be non-empty if the LHS is empty. + if (getRHSKind() != EmptyKind && getLHSKind() == EmptyKind) + return false; + + // A twine child should always be binary. + if (getLHSKind() == TwineKind && + !LHS.twine->isBinary()) + return false; + if (getRHSKind() == TwineKind && + !RHS.twine->isBinary()) + return false; + + return true; + } + + /// Get the NodeKind of the left-hand side. + NodeKind getLHSKind() const { return LHSKind; } + + /// Get the NodeKind of the right-hand side. + NodeKind getRHSKind() const { return RHSKind; } + + /// Print one child from a twine. + void printOneChild(raw_ostream &OS, Child Ptr, NodeKind Kind) const; + + /// Print the representation of one child from a twine. + void printOneChildRepr(raw_ostream &OS, Child Ptr, + NodeKind Kind) const; + + public: + /// @name Constructors + /// @{ + + /// Construct from an empty string. + /*implicit*/ Twine() : LHSKind(EmptyKind), RHSKind(EmptyKind) { + assert(isValid() && "Invalid twine!"); + } + + Twine(const Twine &) = default; + + /// Construct from a C string. + /// + /// We take care here to optimize "" into the empty twine -- this will be + /// optimized out for string constants. This allows Twine arguments have + /// default "" values, without introducing unnecessary string constants. + /*implicit*/ Twine(const char *Str) + : RHSKind(EmptyKind) { + if (Str[0] != '\0') { + LHS.cString = Str; + LHSKind = CStringKind; + } else + LHSKind = EmptyKind; + + assert(isValid() && "Invalid twine!"); + } + + /// Construct from an std::string. + /*implicit*/ Twine(const std::string &Str) + : LHSKind(StdStringKind), RHSKind(EmptyKind) { + LHS.stdString = &Str; + assert(isValid() && "Invalid twine!"); + } + + /// Construct from a StringRef. + /*implicit*/ Twine(const StringRef &Str) + : LHSKind(StringRefKind), RHSKind(EmptyKind) { + LHS.stringRef = &Str; + assert(isValid() && "Invalid twine!"); + } + + /// Construct from a SmallString. + /*implicit*/ Twine(const SmallVectorImpl &Str) + : LHSKind(SmallStringKind), RHSKind(EmptyKind) { + LHS.smallString = &Str; + assert(isValid() && "Invalid twine!"); + } + + /// Construct from a char. + explicit Twine(char Val) + : LHSKind(CharKind), RHSKind(EmptyKind) { + LHS.character = Val; + } + + /// Construct from a signed char. + explicit Twine(signed char Val) + : LHSKind(CharKind), RHSKind(EmptyKind) { + LHS.character = static_cast(Val); + } + + /// Construct from an unsigned char. + explicit Twine(unsigned char Val) + : LHSKind(CharKind), RHSKind(EmptyKind) { + LHS.character = static_cast(Val); + } + + /// Construct a twine to print \p Val as an unsigned decimal integer. + explicit Twine(unsigned Val) + : LHSKind(DecUIKind), RHSKind(EmptyKind) { + LHS.decUI = Val; + } + + /// Construct a twine to print \p Val as a signed decimal integer. + explicit Twine(int Val) + : LHSKind(DecIKind), RHSKind(EmptyKind) { + LHS.decI = Val; + } + + /// Construct a twine to print \p Val as an unsigned decimal integer. + explicit Twine(const unsigned long &Val) + : LHSKind(DecULKind), RHSKind(EmptyKind) { + LHS.decUL = &Val; + } + + /// Construct a twine to print \p Val as a signed decimal integer. + explicit Twine(const long &Val) + : LHSKind(DecLKind), RHSKind(EmptyKind) { + LHS.decL = &Val; + } + + /// Construct a twine to print \p Val as an unsigned decimal integer. + explicit Twine(const unsigned long long &Val) + : LHSKind(DecULLKind), RHSKind(EmptyKind) { + LHS.decULL = &Val; + } + + /// Construct a twine to print \p Val as a signed decimal integer. + explicit Twine(const long long &Val) + : LHSKind(DecLLKind), RHSKind(EmptyKind) { + LHS.decLL = &Val; + } + + // FIXME: Unfortunately, to make sure this is as efficient as possible we + // need extra binary constructors from particular types. We can't rely on + // the compiler to be smart enough to fold operator+()/concat() down to the + // right thing. Yet. + + /// Construct as the concatenation of a C string and a StringRef. + /*implicit*/ Twine(const char *LHS, const StringRef &RHS) + : LHSKind(CStringKind), RHSKind(StringRefKind) { + this->LHS.cString = LHS; + this->RHS.stringRef = &RHS; + assert(isValid() && "Invalid twine!"); + } + + /// Construct as the concatenation of a StringRef and a C string. + /*implicit*/ Twine(const StringRef &LHS, const char *RHS) + : LHSKind(StringRefKind), RHSKind(CStringKind) { + this->LHS.stringRef = &LHS; + this->RHS.cString = RHS; + assert(isValid() && "Invalid twine!"); + } + + /// Create a 'null' string, which is an empty string that always + /// concatenates to form another empty string. + static Twine createNull() { + return Twine(NullKind); + } + + /// @} + /// @name Numeric Conversions + /// @{ + + // Construct a twine to print \p Val as an unsigned hexadecimal integer. + static Twine utohexstr(const uint64_t &Val) { + Child LHS, RHS; + LHS.uHex = &Val; + RHS.twine = nullptr; + return Twine(LHS, UHexKind, RHS, EmptyKind); + } + + /// @} + /// @name Predicate Operations + /// @{ + + /// Check if this twine is trivially empty; a false return value does not + /// necessarily mean the twine is empty. + bool isTriviallyEmpty() const { + return isNullary(); + } + + /// Return true if this twine can be dynamically accessed as a single + /// StringRef value with getSingleStringRef(). + bool isSingleStringRef() const { + if (getRHSKind() != EmptyKind) return false; + + switch (getLHSKind()) { + case EmptyKind: + case CStringKind: + case StdStringKind: + case StringRefKind: + case SmallStringKind: + return true; + default: + return false; + } + } + + /// @} + /// @name String Operations + /// @{ + + Twine concat(const Twine &Suffix) const; + + /// @} + /// @name Output & Conversion. + /// @{ + + /// Return the twine contents as a std::string. + std::string str() const; + + /// Append the concatenated string into the given SmallString or SmallVector. + void toVector(SmallVectorImpl &Out) const; + + /// This returns the twine as a single StringRef. This method is only valid + /// if isSingleStringRef() is true. + StringRef getSingleStringRef() const { + assert(isSingleStringRef() &&"This cannot be had as a single stringref!"); + switch (getLHSKind()) { + default: llvm_unreachable("Out of sync with isSingleStringRef"); + case EmptyKind: return StringRef(); + case CStringKind: return StringRef(LHS.cString); + case StdStringKind: return StringRef(*LHS.stdString); + case StringRefKind: return *LHS.stringRef; + case SmallStringKind: + return StringRef(LHS.smallString->data(), LHS.smallString->size()); + } + } + + /// This returns the twine as a single StringRef if it can be + /// represented as such. Otherwise the twine is written into the given + /// SmallVector and a StringRef to the SmallVector's data is returned. + StringRef toStringRef(SmallVectorImpl &Out) const { + if (isSingleStringRef()) + return getSingleStringRef(); + toVector(Out); + return StringRef(Out.data(), Out.size()); + } + + /// This returns the twine as a single null terminated StringRef if it + /// can be represented as such. Otherwise the twine is written into the + /// given SmallVector and a StringRef to the SmallVector's data is returned. + /// + /// The returned StringRef's size does not include the null terminator. + StringRef toNullTerminatedStringRef(SmallVectorImpl &Out) const; + + /// Write the concatenated string represented by this twine to the + /// stream \p OS. + void print(raw_ostream &OS) const; + + /// Dump the concatenated string represented by this twine to stderr. + void dump() const; + + /// Write the representation of this twine to the stream \p OS. + void printRepr(raw_ostream &OS) const; + + /// Dump the representation of this twine to stderr. + void dumpRepr() const; + + /// @} + }; + + /// @name Twine Inline Implementations + /// @{ + + inline Twine Twine::concat(const Twine &Suffix) const { + // Concatenation with null is null. + if (isNull() || Suffix.isNull()) + return Twine(NullKind); + + // Concatenation with empty yields the other side. + if (isEmpty()) + return Suffix; + if (Suffix.isEmpty()) + return *this; + + // Otherwise we need to create a new node, taking care to fold in unary + // twines. + Child NewLHS, NewRHS; + NewLHS.twine = this; + NewRHS.twine = &Suffix; + NodeKind NewLHSKind = TwineKind, NewRHSKind = TwineKind; + if (isUnary()) { + NewLHS = LHS; + NewLHSKind = getLHSKind(); + } + if (Suffix.isUnary()) { + NewRHS = Suffix.LHS; + NewRHSKind = Suffix.getLHSKind(); + } + + return Twine(NewLHS, NewLHSKind, NewRHS, NewRHSKind); + } + + inline Twine operator+(const Twine &LHS, const Twine &RHS) { + return LHS.concat(RHS); + } + + /// Additional overload to guarantee simplified codegen; this is equivalent to + /// concat(). + + inline Twine operator+(const char *LHS, const StringRef &RHS) { + return Twine(LHS, RHS); + } + + /// Additional overload to guarantee simplified codegen; this is equivalent to + /// concat(). + + inline Twine operator+(const StringRef &LHS, const char *RHS) { + return Twine(LHS, RHS); + } + + inline raw_ostream &operator<<(raw_ostream &OS, const Twine &RHS) { + RHS.print(OS); + return OS; + } + + /// @} +} + +#endif diff --git a/llvm/include/llvm/ADT/edit_distance.h b/llvm/include/llvm/ADT/edit_distance.h new file mode 100644 index 0000000..9c877f5 --- /dev/null +++ b/llvm/include/llvm/ADT/edit_distance.h @@ -0,0 +1,103 @@ +//===-- llvm/ADT/edit_distance.h - Array edit distance function --- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines a Levenshtein distance function that works for any two +// sequences, with each element of each sequence being analogous to a character +// in a string. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_EDIT_DISTANCE_H +#define LLVM_ADT_EDIT_DISTANCE_H + +#include "llvm/ADT/ArrayRef.h" +#include +#include + +namespace llvm_ks { + +/// \brief Determine the edit distance between two sequences. +/// +/// \param FromArray the first sequence to compare. +/// +/// \param ToArray the second sequence to compare. +/// +/// \param AllowReplacements whether to allow element replacements (change one +/// element into another) as a single operation, rather than as two operations +/// (an insertion and a removal). +/// +/// \param MaxEditDistance If non-zero, the maximum edit distance that this +/// routine is allowed to compute. If the edit distance will exceed that +/// maximum, returns \c MaxEditDistance+1. +/// +/// \returns the minimum number of element insertions, removals, or (if +/// \p AllowReplacements is \c true) replacements needed to transform one of +/// the given sequences into the other. If zero, the sequences are identical. +template +unsigned ComputeEditDistance(ArrayRef FromArray, ArrayRef ToArray, + bool AllowReplacements = true, + unsigned MaxEditDistance = 0) { + // The algorithm implemented below is the "classic" + // dynamic-programming algorithm for computing the Levenshtein + // distance, which is described here: + // + // http://en.wikipedia.org/wiki/Levenshtein_distance + // + // Although the algorithm is typically described using an m x n + // array, only one row plus one element are used at a time, so this + // implementation just keeps one vector for the row. To update one entry, + // only the entries to the left, top, and top-left are needed. The left + // entry is in Row[x-1], the top entry is what's in Row[x] from the last + // iteration, and the top-left entry is stored in Previous. + typename ArrayRef::size_type m = FromArray.size(); + typename ArrayRef::size_type n = ToArray.size(); + + const unsigned SmallBufferSize = 64; + unsigned SmallBuffer[SmallBufferSize]; + std::unique_ptr Allocated; + unsigned *Row = SmallBuffer; + if (n + 1 > SmallBufferSize) { + Row = new unsigned[n + 1]; + Allocated.reset(Row); + } + + for (unsigned i = 1; i <= n; ++i) + Row[i] = i; + + for (typename ArrayRef::size_type y = 1; y <= m; ++y) { + Row[0] = y; + unsigned BestThisRow = Row[0]; + + unsigned Previous = y - 1; + for (typename ArrayRef::size_type x = 1; x <= n; ++x) { + int OldRow = Row[x]; + if (AllowReplacements) { + Row[x] = std::min( + Previous + (FromArray[y-1] == ToArray[x-1] ? 0u : 1u), + std::min(Row[x-1], Row[x])+1); + } + else { + if (FromArray[y-1] == ToArray[x-1]) Row[x] = Previous; + else Row[x] = std::min(Row[x-1], Row[x]) + 1; + } + Previous = OldRow; + BestThisRow = std::min(BestThisRow, Row[x]); + } + + if (MaxEditDistance && BestThisRow > MaxEditDistance) + return MaxEditDistance + 1; + } + + unsigned Result = Row[n]; + return Result; +} + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/ADT/ilist.h b/llvm/include/llvm/ADT/ilist.h new file mode 100644 index 0000000..ec7ef4e --- /dev/null +++ b/llvm/include/llvm/ADT/ilist.h @@ -0,0 +1,800 @@ +//==-- llvm/ADT/ilist.h - Intrusive Linked List Template ---------*- C++ -*-==// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines classes to implement an intrusive doubly linked list class +// (i.e. each node of the list must contain a next and previous field for the +// list. +// +// The ilist_traits trait class is used to gain access to the next and previous +// fields of the node type that the list is instantiated with. If it is not +// specialized, the list defaults to using the getPrev(), getNext() method calls +// to get the next and previous pointers. +// +// The ilist class itself, should be a plug in replacement for list, assuming +// that the nodes contain next/prev pointers. This list replacement does not +// provide a constant time size() method, so be careful to use empty() when you +// really want to know if it's empty. +// +// The ilist class is implemented by allocating a 'tail' node when the list is +// created (using ilist_traits<>::createSentinel()). This tail node is +// absolutely required because the user must be able to compute end()-1. Because +// of this, users of the direct next/prev links will see an extra link on the +// end of the list, which should be ignored. +// +// Requirements for a user of this list: +// +// 1. The user must provide {g|s}et{Next|Prev} methods, or specialize +// ilist_traits to provide an alternate way of getting and setting next and +// prev links. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_ILIST_H +#define LLVM_ADT_ILIST_H + +#include "llvm/Support/Compiler.h" +#include +#include +#include +#include + +namespace llvm_ks { + +template class iplist; +template class ilist_iterator; + +/// ilist_nextprev_traits - A fragment for template traits for intrusive list +/// that provides default next/prev implementations for common operations. +/// +template +struct ilist_nextprev_traits { + static NodeTy *getPrev(NodeTy *N) { return N->getPrev(); } + static NodeTy *getNext(NodeTy *N) { return N->getNext(); } + static const NodeTy *getPrev(const NodeTy *N) { return N->getPrev(); } + static const NodeTy *getNext(const NodeTy *N) { return N->getNext(); } + + static void setPrev(NodeTy *N, NodeTy *Prev) { N->setPrev(Prev); } + static void setNext(NodeTy *N, NodeTy *Next) { N->setNext(Next); } +}; + +template +struct ilist_traits; + +/// ilist_sentinel_traits - A fragment for template traits for intrusive list +/// that provides default sentinel implementations for common operations. +/// +/// ilist_sentinel_traits implements a lazy dynamic sentinel allocation +/// strategy. The sentinel is stored in the prev field of ilist's Head. +/// +template +struct ilist_sentinel_traits { + /// createSentinel - create the dynamic sentinel + static NodeTy *createSentinel() { return new NodeTy(); } + + /// destroySentinel - deallocate the dynamic sentinel + static void destroySentinel(NodeTy *N) { delete N; } + + /// provideInitialHead - when constructing an ilist, provide a starting + /// value for its Head + /// @return null node to indicate that it needs to be allocated later + static NodeTy *provideInitialHead() { return nullptr; } + + /// ensureHead - make sure that Head is either already + /// initialized or assigned a fresh sentinel + /// @return the sentinel + static NodeTy *ensureHead(NodeTy *&Head) { + if (!Head) { + Head = ilist_traits::createSentinel(); + ilist_traits::noteHead(Head, Head); + ilist_traits::setNext(Head, nullptr); + return Head; + } + return ilist_traits::getPrev(Head); + } + + /// noteHead - stash the sentinel into its default location + static void noteHead(NodeTy *NewHead, NodeTy *Sentinel) { + ilist_traits::setPrev(NewHead, Sentinel); + } +}; + +template class ilist_half_node; +template class ilist_node; + +/// Traits with an embedded ilist_node as a sentinel. +/// +/// FIXME: The downcast in createSentinel() is UB. +template struct ilist_embedded_sentinel_traits { + /// Get hold of the node that marks the end of the list. + NodeTy *createSentinel() const { + // Since i(p)lists always publicly derive from their corresponding traits, + // placing a data member in this class will augment the i(p)list. But since + // the NodeTy is expected to be publicly derive from ilist_node, + // there is a legal viable downcast from it to NodeTy. We use this trick to + // superimpose an i(p)list with a "ghostly" NodeTy, which becomes the + // sentinel. Dereferencing the sentinel is forbidden (save the + // ilist_node), so no one will ever notice the superposition. + return static_cast(&Sentinel); + } + static void destroySentinel(NodeTy *) {} + + NodeTy *provideInitialHead() const { return createSentinel(); } + NodeTy *ensureHead(NodeTy *) const { return createSentinel(); } + static void noteHead(NodeTy *, NodeTy *) {} + +private: + mutable ilist_node Sentinel; +}; + +/// Trait with an embedded ilist_half_node as a sentinel. +/// +/// FIXME: The downcast in createSentinel() is UB. +template struct ilist_half_embedded_sentinel_traits { + /// Get hold of the node that marks the end of the list. + NodeTy *createSentinel() const { + // See comment in ilist_embedded_sentinel_traits::createSentinel(). + return static_cast(&Sentinel); + } + static void destroySentinel(NodeTy *) {} + + NodeTy *provideInitialHead() const { return createSentinel(); } + NodeTy *ensureHead(NodeTy *) const { return createSentinel(); } + static void noteHead(NodeTy *, NodeTy *) {} + +private: + mutable ilist_half_node Sentinel; +}; + +/// ilist_node_traits - A fragment for template traits for intrusive list +/// that provides default node related operations. +/// +template +struct ilist_node_traits { + static NodeTy *createNode(const NodeTy &V) { return new NodeTy(V); } + static void deleteNode(NodeTy *V) { delete V; } + + void addNodeToList(NodeTy *) {} + void removeNodeFromList(NodeTy *) {} + void transferNodesFromList(ilist_node_traits & /*SrcTraits*/, + ilist_iterator /*first*/, + ilist_iterator /*last*/) {} +}; + +/// ilist_default_traits - Default template traits for intrusive list. +/// By inheriting from this, you can easily use default implementations +/// for all common operations. +/// +template +struct ilist_default_traits : public ilist_nextprev_traits, + public ilist_sentinel_traits, + public ilist_node_traits { +}; + +// Template traits for intrusive list. By specializing this template class, you +// can change what next/prev fields are used to store the links... +template +struct ilist_traits : public ilist_default_traits {}; + +// Const traits are the same as nonconst traits... +template +struct ilist_traits : public ilist_traits {}; + +//===----------------------------------------------------------------------===// +// ilist_iterator - Iterator for intrusive list. +// +template +class ilist_iterator + : public std::iterator { + +public: + typedef ilist_traits Traits; + typedef std::iterator super; + + typedef typename super::value_type value_type; + typedef typename super::difference_type difference_type; + typedef typename super::pointer pointer; + typedef typename super::reference reference; +private: + pointer NodePtr; + + // ilist_iterator is not a random-access iterator, but it has an + // implicit conversion to pointer-type, which is. Declare (but + // don't define) these functions as private to help catch + // accidental misuse. + void operator[](difference_type) const; + void operator+(difference_type) const; + void operator-(difference_type) const; + void operator+=(difference_type) const; + void operator-=(difference_type) const; + template void operator<(T) const; + template void operator<=(T) const; + template void operator>(T) const; + template void operator>=(T) const; + template void operator-(T) const; +public: + + explicit ilist_iterator(pointer NP) : NodePtr(NP) {} + explicit ilist_iterator(reference NR) : NodePtr(&NR) {} + ilist_iterator() : NodePtr(nullptr) {} + + // This is templated so that we can allow constructing a const iterator from + // a nonconst iterator... + template + ilist_iterator(const ilist_iterator &RHS) + : NodePtr(RHS.getNodePtrUnchecked()) {} + + // This is templated so that we can allow assigning to a const iterator from + // a nonconst iterator... + template + const ilist_iterator &operator=(const ilist_iterator &RHS) { + NodePtr = RHS.getNodePtrUnchecked(); + return *this; + } + + void reset(pointer NP) { NodePtr = NP; } + + // Accessors... + explicit operator pointer() const { + return NodePtr; + } + + reference operator*() const { + return *NodePtr; + } + pointer operator->() const { return &operator*(); } + + // Comparison operators + template bool operator==(const ilist_iterator &RHS) const { + return NodePtr == RHS.getNodePtrUnchecked(); + } + template bool operator!=(const ilist_iterator &RHS) const { + return NodePtr != RHS.getNodePtrUnchecked(); + } + + // Increment and decrement operators... + ilist_iterator &operator--() { // predecrement - Back up + NodePtr = Traits::getPrev(NodePtr); + assert(NodePtr && "--'d off the beginning of an ilist!"); + return *this; + } + ilist_iterator &operator++() { // preincrement - Advance + NodePtr = Traits::getNext(NodePtr); + return *this; + } + ilist_iterator operator--(int) { // postdecrement operators... + ilist_iterator tmp = *this; + --*this; + return tmp; + } + ilist_iterator operator++(int) { // postincrement operators... + ilist_iterator tmp = *this; + ++*this; + return tmp; + } + + // Internal interface, do not use... + pointer getNodePtrUnchecked() const { return NodePtr; } +}; + +// These are to catch errors when people try to use them as random access +// iterators. +template +void operator-(int, ilist_iterator) = delete; +template +void operator-(ilist_iterator,int) = delete; + +template +void operator+(int, ilist_iterator) = delete; +template +void operator+(ilist_iterator,int) = delete; + +// operator!=/operator== - Allow mixed comparisons without dereferencing +// the iterator, which could very likely be pointing to end(). +template +bool operator!=(const T* LHS, const ilist_iterator &RHS) { + return LHS != RHS.getNodePtrUnchecked(); +} +template +bool operator==(const T* LHS, const ilist_iterator &RHS) { + return LHS == RHS.getNodePtrUnchecked(); +} +template +bool operator!=(T* LHS, const ilist_iterator &RHS) { + return LHS != RHS.getNodePtrUnchecked(); +} +template +bool operator==(T* LHS, const ilist_iterator &RHS) { + return LHS == RHS.getNodePtrUnchecked(); +} + + +// Allow ilist_iterators to convert into pointers to a node automatically when +// used by the dyn_cast, cast, isa mechanisms... + +template struct simplify_type; + +template struct simplify_type > { + typedef NodeTy* SimpleType; + + static SimpleType getSimplifiedValue(ilist_iterator &Node) { + return &*Node; + } +}; +template struct simplify_type > { + typedef /*const*/ NodeTy* SimpleType; + + static SimpleType getSimplifiedValue(const ilist_iterator &Node) { + return &*Node; + } +}; + + +//===----------------------------------------------------------------------===// +// +/// iplist - The subset of list functionality that can safely be used on nodes +/// of polymorphic types, i.e. a heterogeneous list with a common base class that +/// holds the next/prev pointers. The only state of the list itself is a single +/// pointer to the head of the list. +/// +/// This list can be in one of three interesting states: +/// 1. The list may be completely unconstructed. In this case, the head +/// pointer is null. When in this form, any query for an iterator (e.g. +/// begin() or end()) causes the list to transparently change to state #2. +/// 2. The list may be empty, but contain a sentinel for the end iterator. This +/// sentinel is created by the Traits::createSentinel method and is a link +/// in the list. When the list is empty, the pointer in the iplist points +/// to the sentinel. Once the sentinel is constructed, it +/// is not destroyed until the list is. +/// 3. The list may contain actual objects in it, which are stored as a doubly +/// linked list of nodes. One invariant of the list is that the predecessor +/// of the first node in the list always points to the last node in the list, +/// and the successor pointer for the sentinel (which always stays at the +/// end of the list) is always null. +/// +template > +class iplist : public Traits { + mutable NodeTy *Head; + + // Use the prev node pointer of 'head' as the tail pointer. This is really a + // circularly linked list where we snip the 'next' link from the sentinel node + // back to the first node in the list (to preserve assertions about going off + // the end of the list). + NodeTy *getTail() { return this->ensureHead(Head); } + const NodeTy *getTail() const { return this->ensureHead(Head); } + void setTail(NodeTy *N) const { this->noteHead(Head, N); } + + /// CreateLazySentinel - This method verifies whether the sentinel for the + /// list has been created and lazily makes it if not. + void CreateLazySentinel() const { + this->ensureHead(Head); + } + + static bool op_less(NodeTy &L, NodeTy &R) { return L < R; } + static bool op_equal(NodeTy &L, NodeTy &R) { return L == R; } + + // No fundamental reason why iplist can't be copyable, but the default + // copy/copy-assign won't do. + iplist(const iplist &) = delete; + void operator=(const iplist &) = delete; + +public: + typedef NodeTy *pointer; + typedef const NodeTy *const_pointer; + typedef NodeTy &reference; + typedef const NodeTy &const_reference; + typedef NodeTy value_type; + typedef ilist_iterator iterator; + typedef ilist_iterator const_iterator; + typedef size_t size_type; + typedef ptrdiff_t difference_type; + typedef std::reverse_iterator const_reverse_iterator; + typedef std::reverse_iterator reverse_iterator; + + iplist() : Head(this->provideInitialHead()) {} + ~iplist() { + if (!Head) return; + clear(); + Traits::destroySentinel(getTail()); + } + + // Iterator creation methods. + iterator begin() { + CreateLazySentinel(); + return iterator(Head); + } + const_iterator begin() const { + CreateLazySentinel(); + return const_iterator(Head); + } + iterator end() { + CreateLazySentinel(); + return iterator(getTail()); + } + const_iterator end() const { + CreateLazySentinel(); + return const_iterator(getTail()); + } + + // reverse iterator creation methods. + reverse_iterator rbegin() { return reverse_iterator(end()); } + const_reverse_iterator rbegin() const{ return const_reverse_iterator(end()); } + reverse_iterator rend() { return reverse_iterator(begin()); } + const_reverse_iterator rend() const { return const_reverse_iterator(begin());} + + + // Miscellaneous inspection routines. + size_type max_size() const { return size_type(-1); } + bool LLVM_ATTRIBUTE_UNUSED_RESULT empty() const { + return !Head || Head == getTail(); + } + + // Front and back accessor functions... + reference front() { + assert(!empty() && "Called front() on empty list!"); + return *Head; + } + const_reference front() const { + assert(!empty() && "Called front() on empty list!"); + return *Head; + } + reference back() { + assert(!empty() && "Called back() on empty list!"); + return *this->getPrev(getTail()); + } + const_reference back() const { + assert(!empty() && "Called back() on empty list!"); + return *this->getPrev(getTail()); + } + + void swap(iplist &RHS) { + assert(0 && "Swap does not use list traits callback correctly yet!"); + std::swap(Head, RHS.Head); + } + + iterator insert(iterator where, NodeTy *New) { + NodeTy *CurNode = where.getNodePtrUnchecked(); + NodeTy *PrevNode = this->getPrev(CurNode); + this->setNext(New, CurNode); + this->setPrev(New, PrevNode); + + if (CurNode != Head) // Is PrevNode off the beginning of the list? + this->setNext(PrevNode, New); + else + Head = New; + this->setPrev(CurNode, New); + + this->addNodeToList(New); // Notify traits that we added a node... + return iterator(New); + } + + iterator insertAfter(iterator where, NodeTy *New) { + if (empty()) + return insert(begin(), New); + else + return insert(++where, New); + } + + NodeTy *remove(iterator &IT) { + assert(IT != end() && "Cannot remove end of list!"); + NodeTy *Node = &*IT; + NodeTy *NextNode = this->getNext(Node); + NodeTy *PrevNode = this->getPrev(Node); + + if (Node != Head) // Is PrevNode off the beginning of the list? + this->setNext(PrevNode, NextNode); + else + Head = NextNode; + this->setPrev(NextNode, PrevNode); + IT.reset(NextNode); + this->removeNodeFromList(Node); // Notify traits that we removed a node... + + // Set the next/prev pointers of the current node to null. This isn't + // strictly required, but this catches errors where a node is removed from + // an ilist (and potentially deleted) with iterators still pointing at it. + // When those iterators are incremented or decremented, they will assert on + // the null next/prev pointer instead of "usually working". + this->setNext(Node, nullptr); + this->setPrev(Node, nullptr); + return Node; + } + + NodeTy *remove(const iterator &IT) { + iterator MutIt = IT; + return remove(MutIt); + } + + NodeTy *remove(NodeTy *IT) { return remove(iterator(IT)); } + NodeTy *remove(NodeTy &IT) { return remove(iterator(IT)); } + + // erase - remove a node from the controlled sequence... and delete it. + iterator erase(iterator where) { + this->deleteNode(remove(where)); + return where; + } + + iterator erase(NodeTy *IT) { return erase(iterator(IT)); } + iterator erase(NodeTy &IT) { return erase(iterator(IT)); } + + /// Remove all nodes from the list like clear(), but do not call + /// removeNodeFromList() or deleteNode(). + /// + /// This should only be used immediately before freeing nodes in bulk to + /// avoid traversing the list and bringing all the nodes into cache. + void clearAndLeakNodesUnsafely() { + if (Head) { + Head = getTail(); + this->setPrev(Head, Head); + } + } + +private: + // transfer - The heart of the splice function. Move linked list nodes from + // [first, last) into position. + // + void transfer(iterator position, iplist &L2, iterator first, iterator last) { + assert(first != last && "Should be checked by callers"); + // Position cannot be contained in the range to be transferred. + // Check for the most common mistake. + assert(position != first && + "Insertion point can't be one of the transferred nodes"); + + if (position != last) { + // Note: we have to be careful about the case when we move the first node + // in the list. This node is the list sentinel node and we can't move it. + NodeTy *ThisSentinel = getTail(); + setTail(nullptr); + NodeTy *L2Sentinel = L2.getTail(); + L2.setTail(nullptr); + + // Remove [first, last) from its old position. + NodeTy *First = &*first, *Prev = this->getPrev(First); + NodeTy *Next = last.getNodePtrUnchecked(), *Last = this->getPrev(Next); + if (Prev) + this->setNext(Prev, Next); + else + L2.Head = Next; + this->setPrev(Next, Prev); + + // Splice [first, last) into its new position. + NodeTy *PosNext = position.getNodePtrUnchecked(); + NodeTy *PosPrev = this->getPrev(PosNext); + + // Fix head of list... + if (PosPrev) + this->setNext(PosPrev, First); + else + Head = First; + this->setPrev(First, PosPrev); + + // Fix end of list... + this->setNext(Last, PosNext); + this->setPrev(PosNext, Last); + + this->transferNodesFromList(L2, iterator(First), iterator(PosNext)); + + // Now that everything is set, restore the pointers to the list sentinels. + L2.setTail(L2Sentinel); + setTail(ThisSentinel); + } + } + +public: + + //===----------------------------------------------------------------------=== + // Functionality derived from other functions defined above... + // + + size_type LLVM_ATTRIBUTE_UNUSED_RESULT size() const { + if (!Head) return 0; // Don't require construction of sentinel if empty. + return std::distance(begin(), end()); + } + + iterator erase(iterator first, iterator last) { + while (first != last) + first = erase(first); + return last; + } + + void clear() { if (Head) erase(begin(), end()); } + + // Front and back inserters... + void push_front(NodeTy *val) { insert(begin(), val); } + void push_back(NodeTy *val) { insert(end(), val); } + void pop_front() { + assert(!empty() && "pop_front() on empty list!"); + erase(begin()); + } + void pop_back() { + assert(!empty() && "pop_back() on empty list!"); + iterator t = end(); erase(--t); + } + + // Special forms of insert... + template void insert(iterator where, InIt first, InIt last) { + for (; first != last; ++first) insert(where, *first); + } + + // Splice members - defined in terms of transfer... + void splice(iterator where, iplist &L2) { + if (!L2.empty()) + transfer(where, L2, L2.begin(), L2.end()); + } + void splice(iterator where, iplist &L2, iterator first) { + iterator last = first; ++last; + if (where == first || where == last) return; // No change + transfer(where, L2, first, last); + } + void splice(iterator where, iplist &L2, iterator first, iterator last) { + if (first != last) transfer(where, L2, first, last); + } + void splice(iterator where, iplist &L2, NodeTy &N) { + splice(where, L2, iterator(N)); + } + void splice(iterator where, iplist &L2, NodeTy *N) { + splice(where, L2, iterator(N)); + } + + template + void merge(iplist &Right, Compare comp) { + if (this == &Right) + return; + iterator First1 = begin(), Last1 = end(); + iterator First2 = Right.begin(), Last2 = Right.end(); + while (First1 != Last1 && First2 != Last2) { + if (comp(*First2, *First1)) { + iterator Next = First2; + transfer(First1, Right, First2, ++Next); + First2 = Next; + } else { + ++First1; + } + } + if (First2 != Last2) + transfer(Last1, Right, First2, Last2); + } + void merge(iplist &Right) { return merge(Right, op_less); } + + template + void sort(Compare comp) { + // The list is empty, vacuously sorted. + if (empty()) + return; + // The list has a single element, vacuously sorted. + if (std::next(begin()) == end()) + return; + // Find the split point for the list. + iterator Center = begin(), End = begin(); + while (End != end() && std::next(End) != end()) { + Center = std::next(Center); + End = std::next(std::next(End)); + } + // Split the list into two. + iplist RightHalf; + RightHalf.splice(RightHalf.begin(), *this, Center, end()); + + // Sort the two sublists. + sort(comp); + RightHalf.sort(comp); + + // Merge the two sublists back together. + merge(RightHalf, comp); + } + void sort() { sort(op_less); } + + /// \brief Get the previous node, or \c nullptr for the list head. + NodeTy *getPrevNode(NodeTy &N) const { + auto I = N.getIterator(); + if (I == begin()) + return nullptr; + return &*std::prev(I); + } + /// \brief Get the previous node, or \c nullptr for the list head. + const NodeTy *getPrevNode(const NodeTy &N) const { + return getPrevNode(const_cast(N)); + } + + /// \brief Get the next node, or \c nullptr for the list tail. + NodeTy *getNextNode(NodeTy &N) const { + auto Next = std::next(N.getIterator()); + if (Next == end()) + return nullptr; + return &*Next; + } + /// \brief Get the next node, or \c nullptr for the list tail. + const NodeTy *getNextNode(const NodeTy &N) const { + return getNextNode(const_cast(N)); + } +}; + + +template +struct ilist : public iplist { + typedef typename iplist::size_type size_type; + typedef typename iplist::iterator iterator; + + ilist() {} + ilist(const ilist &right) { + insert(this->begin(), right.begin(), right.end()); + } + explicit ilist(size_type count) { + insert(this->begin(), count, NodeTy()); + } + ilist(size_type count, const NodeTy &val) { + insert(this->begin(), count, val); + } + template ilist(InIt first, InIt last) { + insert(this->begin(), first, last); + } + + // bring hidden functions into scope + using iplist::insert; + using iplist::push_front; + using iplist::push_back; + + // Main implementation here - Insert for a node passed by value... + iterator insert(iterator where, const NodeTy &val) { + return insert(where, this->createNode(val)); + } + + + // Front and back inserters... + void push_front(const NodeTy &val) { insert(this->begin(), val); } + void push_back(const NodeTy &val) { insert(this->end(), val); } + + void insert(iterator where, size_type count, const NodeTy &val) { + for (; count != 0; --count) insert(where, val); + } + + // Assign special forms... + void assign(size_type count, const NodeTy &val) { + iterator I = this->begin(); + for (; I != this->end() && count != 0; ++I, --count) + *I = val; + if (count != 0) + insert(this->end(), val, val); + else + erase(I, this->end()); + } + template void assign(InIt first1, InIt last1) { + iterator first2 = this->begin(), last2 = this->end(); + for ( ; first1 != last1 && first2 != last2; ++first1, ++first2) + *first1 = *first2; + if (first2 == last2) + erase(first1, last1); + else + insert(last1, first2, last2); + } + + + // Resize members... + void resize(size_type newsize, NodeTy val) { + iterator i = this->begin(); + size_type len = 0; + for ( ; i != this->end() && len < newsize; ++i, ++len) /* empty*/ ; + + if (len == newsize) + erase(i, this->end()); + else // i == end() + insert(this->end(), newsize - len, val); + } + void resize(size_type newsize) { resize(newsize, NodeTy()); } +}; + +} // End llvm namespace + +namespace std { + // Ensure that swap uses the fast list swap... + template + void swap(llvm_ks::iplist &Left, llvm_ks::iplist &Right) { + Left.swap(Right); + } +} // End 'std' extensions... + +#endif // LLVM_ADT_ILIST_H diff --git a/llvm/include/llvm/ADT/ilist_node.h b/llvm/include/llvm/ADT/ilist_node.h new file mode 100644 index 0000000..f585b3c --- /dev/null +++ b/llvm/include/llvm/ADT/ilist_node.h @@ -0,0 +1,123 @@ +//==-- llvm/ADT/ilist_node.h - Intrusive Linked List Helper ------*- C++ -*-==// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the ilist_node class template, which is a convenient +// base class for creating classes that can be used with ilists. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_ILIST_NODE_H +#define LLVM_ADT_ILIST_NODE_H + +namespace llvm_ks { + +template +struct ilist_traits; +template struct ilist_embedded_sentinel_traits; +template struct ilist_half_embedded_sentinel_traits; + +/// ilist_half_node - Base class that provides prev services for sentinels. +/// +template +class ilist_half_node { + friend struct ilist_traits; + friend struct ilist_half_embedded_sentinel_traits; + NodeTy *Prev; +protected: + NodeTy *getPrev() { return Prev; } + const NodeTy *getPrev() const { return Prev; } + void setPrev(NodeTy *P) { Prev = P; } + ilist_half_node() : Prev(nullptr) {} +}; + +template +struct ilist_nextprev_traits; + +template class ilist_iterator; + +/// ilist_node - Base class that provides next/prev services for nodes +/// that use ilist_nextprev_traits or ilist_default_traits. +/// +template +class ilist_node : private ilist_half_node { + friend struct ilist_nextprev_traits; + friend struct ilist_traits; + friend struct ilist_half_embedded_sentinel_traits; + friend struct ilist_embedded_sentinel_traits; + NodeTy *Next; + NodeTy *getNext() { return Next; } + const NodeTy *getNext() const { return Next; } + void setNext(NodeTy *N) { Next = N; } +protected: + ilist_node() : Next(nullptr) {} + +public: + ilist_iterator getIterator() { + // FIXME: Stop downcasting to create the iterator (potential UB). + return ilist_iterator(static_cast(this)); + } + ilist_iterator getIterator() const { + // FIXME: Stop downcasting to create the iterator (potential UB). + return ilist_iterator(static_cast(this)); + } +}; + +/// An ilist node that can access its parent list. +/// +/// Requires \c NodeTy to have \a getParent() to find the parent node, and the +/// \c ParentTy to have \a getSublistAccess() to get a reference to the list. +template +class ilist_node_with_parent : public ilist_node { +protected: + ilist_node_with_parent() = default; + +private: + /// Forward to NodeTy::getParent(). + /// + /// Note: do not use the name "getParent()". We want a compile error + /// (instead of recursion) when the subclass fails to implement \a + /// getParent(). + const ParentTy *getNodeParent() const { + return static_cast(this)->getParent(); + } + +public: + /// @name Adjacent Node Accessors + /// @{ + /// \brief Get the previous node, or \c nullptr for the list head. + NodeTy *getPrevNode() { + // Should be separated to a reused function, but then we couldn't use auto + // (and would need the type of the list). + const auto &List = + getNodeParent()->*(ParentTy::getSublistAccess((NodeTy *)nullptr)); + return List.getPrevNode(*static_cast(this)); + } + /// \brief Get the previous node, or \c nullptr for the list head. + const NodeTy *getPrevNode() const { + return const_cast(this)->getPrevNode(); + } + + /// \brief Get the next node, or \c nullptr for the list tail. + NodeTy *getNextNode() { + // Should be separated to a reused function, but then we couldn't use auto + // (and would need the type of the list). + const auto &List = + getNodeParent()->*(ParentTy::getSublistAccess((NodeTy *)nullptr)); + return List.getNextNode(*static_cast(this)); + } + /// \brief Get the next node, or \c nullptr for the list tail. + const NodeTy *getNextNode() const { + return const_cast(this)->getNextNode(); + } + /// @} +}; + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/ADT/iterator.h b/llvm/include/llvm/ADT/iterator.h new file mode 100644 index 0000000..997ee7d --- /dev/null +++ b/llvm/include/llvm/ADT/iterator.h @@ -0,0 +1,246 @@ +//===- iterator.h - Utilities for using and defining iterators --*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_ITERATOR_H +#define LLVM_ADT_ITERATOR_H + +#include +#include + +namespace llvm_ks { + +/// \brief CRTP base class which implements the entire standard iterator facade +/// in terms of a minimal subset of the interface. +/// +/// Use this when it is reasonable to implement most of the iterator +/// functionality in terms of a core subset. If you need special behavior or +/// there are performance implications for this, you may want to override the +/// relevant members instead. +/// +/// Note, one abstraction that this does *not* provide is implementing +/// subtraction in terms of addition by negating the difference. Negation isn't +/// always information preserving, and I can see very reasonable iterator +/// designs where this doesn't work well. It doesn't really force much added +/// boilerplate anyways. +/// +/// Another abstraction that this doesn't provide is implementing increment in +/// terms of addition of one. These aren't equivalent for all iterator +/// categories, and respecting that adds a lot of complexity for little gain. +template +class iterator_facade_base + : public std::iterator { +protected: + enum { + IsRandomAccess = + std::is_base_of::value, + IsBidirectional = + std::is_base_of::value, + }; + +public: + DerivedT operator+(DifferenceTypeT n) const { + static_assert( + IsRandomAccess, + "The '+' operator is only defined for random access iterators."); + DerivedT tmp = *static_cast(this); + tmp += n; + return tmp; + } + friend DerivedT operator+(DifferenceTypeT n, const DerivedT &i) { + static_assert( + IsRandomAccess, + "The '+' operator is only defined for random access iterators."); + return i + n; + } + DerivedT operator-(DifferenceTypeT n) const { + static_assert( + IsRandomAccess, + "The '-' operator is only defined for random access iterators."); + DerivedT tmp = *static_cast(this); + tmp -= n; + return tmp; + } + + DerivedT &operator++() { + return static_cast(this)->operator+=(1); + } + DerivedT operator++(int) { + DerivedT tmp = *static_cast(this); + ++*static_cast(this); + return tmp; + } + DerivedT &operator--() { + static_assert( + IsBidirectional, + "The decrement operator is only defined for bidirectional iterators."); + return static_cast(this)->operator-=(1); + } + DerivedT operator--(int) { + static_assert( + IsBidirectional, + "The decrement operator is only defined for bidirectional iterators."); + DerivedT tmp = *static_cast(this); + --*static_cast(this); + return tmp; + } + + bool operator!=(const DerivedT &RHS) const { + return !static_cast(this)->operator==(RHS); + } + + bool operator>(const DerivedT &RHS) const { + static_assert( + IsRandomAccess, + "Relational operators are only defined for random access iterators."); + return !static_cast(this)->operator<(RHS) && + !static_cast(this)->operator==(RHS); + } + bool operator<=(const DerivedT &RHS) const { + static_assert( + IsRandomAccess, + "Relational operators are only defined for random access iterators."); + return !static_cast(this)->operator>(RHS); + } + bool operator>=(const DerivedT &RHS) const { + static_assert( + IsRandomAccess, + "Relational operators are only defined for random access iterators."); + return !static_cast(this)->operator<(RHS); + } + + PointerT operator->() const { + return &static_cast(this)->operator*(); + } + ReferenceT operator[](DifferenceTypeT n) const { + static_assert(IsRandomAccess, + "Subscripting is only defined for random access iterators."); + return *static_cast(this)->operator+(n); + } +}; + +/// \brief CRTP base class for adapting an iterator to a different type. +/// +/// This class can be used through CRTP to adapt one iterator into another. +/// Typically this is done through providing in the derived class a custom \c +/// operator* implementation. Other methods can be overridden as well. +template < + typename DerivedT, typename WrappedIteratorT, + typename IteratorCategoryT = + typename std::iterator_traits::iterator_category, + typename T = typename std::iterator_traits::value_type, + typename DifferenceTypeT = + typename std::iterator_traits::difference_type, + typename PointerT = T *, typename ReferenceT = T &, + // Don't provide these, they are mostly to act as aliases below. + typename WrappedTraitsT = std::iterator_traits> +class iterator_adaptor_base + : public iterator_facade_base { + typedef typename iterator_adaptor_base::iterator_facade_base BaseT; + +protected: + WrappedIteratorT I; + + iterator_adaptor_base() = default; + + template + explicit iterator_adaptor_base( + U &&u, + typename std::enable_if< + !std::is_base_of::type>::type, + DerivedT>::value, + int>::type = 0) + : I(std::forward(u)) {} + + const WrappedIteratorT &wrapped() const { return I; } + +public: + typedef DifferenceTypeT difference_type; + + DerivedT &operator+=(difference_type n) { + static_assert( + BaseT::IsRandomAccess, + "The '+=' operator is only defined for random access iterators."); + I += n; + return *static_cast(this); + } + DerivedT &operator-=(difference_type n) { + static_assert( + BaseT::IsRandomAccess, + "The '-=' operator is only defined for random access iterators."); + I -= n; + return *static_cast(this); + } + using BaseT::operator-; + difference_type operator-(const DerivedT &RHS) const { + static_assert( + BaseT::IsRandomAccess, + "The '-' operator is only defined for random access iterators."); + return I - RHS.I; + } + + // We have to explicitly provide ++ and -- rather than letting the facade + // forward to += because WrappedIteratorT might not support +=. + using BaseT::operator++; + DerivedT &operator++() { + ++I; + return *static_cast(this); + } + using BaseT::operator--; + DerivedT &operator--() { + static_assert( + BaseT::IsBidirectional, + "The decrement operator is only defined for bidirectional iterators."); + --I; + return *static_cast(this); + } + + bool operator==(const DerivedT &RHS) const { return I == RHS.I; } + bool operator<(const DerivedT &RHS) const { + static_assert( + BaseT::IsRandomAccess, + "Relational operators are only defined for random access iterators."); + return I < RHS.I; + } + + ReferenceT operator*() const { return *I; } +}; + +/// \brief An iterator type that allows iterating over the pointees via some +/// other iterator. +/// +/// The typical usage of this is to expose a type that iterates over Ts, but +/// which is implemented with some iterator over T*s: +/// +/// \code +/// typedef pointee_iterator::iterator> iterator; +/// \endcode +template ())>::type> +struct pointee_iterator + : iterator_adaptor_base< + pointee_iterator, WrappedIteratorT, + typename std::iterator_traits::iterator_category, + T> { + pointee_iterator() = default; + template + pointee_iterator(U &&u) + : pointee_iterator::iterator_adaptor_base(std::forward(u)) {} + + T &operator*() const { return **this->I; } +}; + +} + +#endif diff --git a/llvm/include/llvm/ADT/iterator_range.h b/llvm/include/llvm/ADT/iterator_range.h new file mode 100644 index 0000000..00d3647 --- /dev/null +++ b/llvm/include/llvm/ADT/iterator_range.h @@ -0,0 +1,68 @@ +//===- iterator_range.h - A range adaptor for iterators ---------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +/// \file +/// This provides a very simple, boring adaptor for a begin and end iterator +/// into a range type. This should be used to build range views that work well +/// with range based for loops and range based constructors. +/// +/// Note that code here follows more standards-based coding conventions as it +/// is mirroring proposed interfaces for standardization. +/// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ADT_ITERATOR_RANGE_H +#define LLVM_ADT_ITERATOR_RANGE_H + +#include +#include + +namespace llvm_ks { + +/// \brief A range adaptor for a pair of iterators. +/// +/// This just wraps two iterators into a range-compatible interface. Nothing +/// fancy at all. +template +class iterator_range { + IteratorT begin_iterator, end_iterator; + +public: + //TODO: Add SFINAE to test that the Container's iterators match the range's + // iterators. + template + iterator_range(Container &&c) + //TODO: Consider ADL/non-member begin/end calls. + : begin_iterator(c.begin()), end_iterator(c.end()) {} + iterator_range(IteratorT begin_iterator, IteratorT end_iterator) + : begin_iterator(std::move(begin_iterator)), + end_iterator(std::move(end_iterator)) {} + + IteratorT begin() const { return begin_iterator; } + IteratorT end() const { return end_iterator; } +}; + +/// \brief Convenience function for iterating over sub-ranges. +/// +/// This provides a bit of syntactic sugar to make using sub-ranges +/// in for loops a bit easier. Analogous to std::make_pair(). +template iterator_range make_range(T x, T y) { + return iterator_range(std::move(x), std::move(y)); +} + +template iterator_range make_range(std::pair p) { + return iterator_range(std::move(p.first), std::move(p.second)); +} + +template +iterator_range()))> drop_begin(T &&t, int n) { + return make_range(std::next(begin(t), n), end(t)); +} +} + +#endif diff --git a/llvm/include/llvm/AsmParser/Parser.h b/llvm/include/llvm/AsmParser/Parser.h new file mode 100644 index 0000000..e702a53 --- /dev/null +++ b/llvm/include/llvm/AsmParser/Parser.h @@ -0,0 +1,96 @@ +//===-- Parser.h - Parser for LLVM IR text assembly files -------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// These classes are implemented by the lib/AsmParser library. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_ASMPARSER_PARSER_H +#define LLVM_ASMPARSER_PARSER_H + +#include "llvm/Support/MemoryBuffer.h" + +namespace llvm_ks { + +class Constant; +class LLVMContext; +class Module; +struct SlotMapping; +class SMDiagnostic; + +/// This function is the main interface to the LLVM Assembly Parser. It parses +/// an ASCII file that (presumably) contains LLVM Assembly code. It returns a +/// Module (intermediate representation) with the corresponding features. Note +/// that this does not verify that the generated Module is valid, so you should +/// run the verifier after parsing the file to check that it is okay. +/// \brief Parse LLVM Assembly from a file +/// \param Filename The name of the file to parse +/// \param Error Error result info. +/// \param Context Context in which to allocate globals info. +/// \param Slots The optional slot mapping that will be initialized during +/// parsing. +std::unique_ptr parseAssemblyFile(StringRef Filename, + SMDiagnostic &Error, + LLVMContext &Context, + SlotMapping *Slots = nullptr); + +/// The function is a secondary interface to the LLVM Assembly Parser. It parses +/// an ASCII string that (presumably) contains LLVM Assembly code. It returns a +/// Module (intermediate representation) with the corresponding features. Note +/// that this does not verify that the generated Module is valid, so you should +/// run the verifier after parsing the file to check that it is okay. +/// \brief Parse LLVM Assembly from a string +/// \param AsmString The string containing assembly +/// \param Error Error result info. +/// \param Context Context in which to allocate globals info. +/// \param Slots The optional slot mapping that will be initialized during +/// parsing. +std::unique_ptr parseAssemblyString(StringRef AsmString, + SMDiagnostic &Error, + LLVMContext &Context, + SlotMapping *Slots = nullptr); + +/// parseAssemblyFile and parseAssemblyString are wrappers around this function. +/// \brief Parse LLVM Assembly from a MemoryBuffer. +/// \param F The MemoryBuffer containing assembly +/// \param Err Error result info. +/// \param Slots The optional slot mapping that will be initialized during +/// parsing. +std::unique_ptr parseAssembly(MemoryBufferRef F, SMDiagnostic &Err, + LLVMContext &Context, + SlotMapping *Slots = nullptr); + +/// This function is the low-level interface to the LLVM Assembly Parser. +/// This is kept as an independent function instead of being inlined into +/// parseAssembly for the convenience of interactive users that want to add +/// recently parsed bits to an existing module. +/// +/// \param F The MemoryBuffer containing assembly +/// \param M The module to add data to. +/// \param Err Error result info. +/// \param Slots The optional slot mapping that will be initialized during +/// parsing. +/// \return true on error. +bool parseAssemblyInto(MemoryBufferRef F, Module &M, SMDiagnostic &Err, + SlotMapping *Slots = nullptr); + +/// Parse a type and a constant value in the given string. +/// +/// The constant value can be any LLVM constant, including a constant +/// expression. +/// +/// \param Slots The optional slot mapping that will restore the parsing state +/// of the module. +/// \return null on error. +Constant *parseConstantValue(StringRef Asm, SMDiagnostic &Err, const Module &M, + const SlotMapping *Slots = nullptr); + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/CMakeLists.txt b/llvm/include/llvm/CMakeLists.txt new file mode 100644 index 0000000..5687525 --- /dev/null +++ b/llvm/include/llvm/CMakeLists.txt @@ -0,0 +1,5 @@ +# If we're doing an out-of-tree build, copy a module map for generated +# header files into the build area. +if (NOT "${CMAKE_SOURCE_DIR}" STREQUAL "${CMAKE_BINARY_DIR}") + configure_file(module.modulemap.build module.modulemap COPYONLY) +endif (NOT "${CMAKE_SOURCE_DIR}" STREQUAL "${CMAKE_BINARY_DIR}") diff --git a/llvm/include/llvm/Config/AsmParsers.def.in b/llvm/include/llvm/Config/AsmParsers.def.in new file mode 100644 index 0000000..d636753 --- /dev/null +++ b/llvm/include/llvm/Config/AsmParsers.def.in @@ -0,0 +1,29 @@ +/*===- llvm/Config/AsmParsers.def - LLVM Assembly Parsers -------*- C++ -*-===*\ +|* *| +|* The LLVM Compiler Infrastructure *| +|* *| +|* This file is distributed under the University of Illinois Open Source *| +|* License. See LICENSE.TXT for details. *| +|* *| +|*===----------------------------------------------------------------------===*| +|* *| +|* This file enumerates all of the assembly-language parsers *| +|* supported by this build of LLVM. Clients of this file should define *| +|* the LLVM_ASM_PARSER macro to be a function-like macro with a *| +|* single parameter (the name of the target whose assembly can be *| +|* generated); including this file will then enumerate all of the *| +|* targets with assembly parsers. *| +|* *| +|* The set of targets supported by LLVM is generated at configuration *| +|* time, at which point this header is generated. Do not modify this *| +|* header directly. *| +|* *| +\*===----------------------------------------------------------------------===*/ + +#ifndef LLVM_ASM_PARSER +# error Please define the macro LLVM_ASM_PARSER(TargetName) +#endif + +@LLVM_ENUM_ASM_PARSERS@ + +#undef LLVM_ASM_PARSER diff --git a/llvm/include/llvm/Config/Targets.def.in b/llvm/include/llvm/Config/Targets.def.in new file mode 100644 index 0000000..d589ece --- /dev/null +++ b/llvm/include/llvm/Config/Targets.def.in @@ -0,0 +1,28 @@ +/*===- llvm/Config/Targets.def - LLVM Target Architectures ------*- C++ -*-===*\ +|* *| +|* The LLVM Compiler Infrastructure *| +|* *| +|* This file is distributed under the University of Illinois Open Source *| +|* License. See LICENSE.TXT for details. *| +|* *| +|*===----------------------------------------------------------------------===*| +|* *| +|* This file enumerates all of the target architectures supported by *| +|* this build of LLVM. Clients of this file should define the *| +|* LLVM_TARGET macro to be a function-like macro with a single *| +|* parameter (the name of the target); including this file will then *| +|* enumerate all of the targets. *| +|* *| +|* The set of targets supported by LLVM is generated at configuration *| +|* time, at which point this header is generated. Do not modify this *| +|* header directly. *| +|* *| +\*===----------------------------------------------------------------------===*/ + +#ifndef LLVM_TARGET +# error Please define the macro LLVM_TARGET(TargetName) +#endif + +@LLVM_ENUM_TARGETS@ + +#undef LLVM_TARGET diff --git a/llvm/include/llvm/Config/config.h.cmake b/llvm/include/llvm/Config/config.h.cmake new file mode 100644 index 0000000..b08796a --- /dev/null +++ b/llvm/include/llvm/Config/config.h.cmake @@ -0,0 +1,582 @@ +#ifndef CONFIG_H +#define CONFIG_H + +/* Exported configuration */ +#include "llvm/Config/llvm-config.h" + +/* Bug report URL. */ +#define BUG_REPORT_URL "${BUG_REPORT_URL}" + +/* Define if you want backtraces on crash */ +#cmakedefine ENABLE_BACKTRACES + +/* Define to enable crash overrides */ +#cmakedefine ENABLE_CRASH_OVERRIDES + +/* Define to disable C++ atexit */ +#cmakedefine DISABLE_LLVM_DYLIB_ATEXIT + +/* Define if position independent code is enabled */ +#cmakedefine ENABLE_PIC + +/* Define if timestamp information (e.g., __DATE__) is allowed */ +#cmakedefine ENABLE_TIMESTAMPS ${ENABLE_TIMESTAMPS} + +/* Define to 1 if you have the `arc4random' function. */ +#cmakedefine HAVE_DECL_ARC4RANDOM ${HAVE_DECL_ARC4RANDOM} + +/* Define to 1 if you have the `backtrace' function. */ +#cmakedefine HAVE_BACKTRACE ${HAVE_BACKTRACE} + +/* Define to 1 if you have the `bcopy' function. */ +#undef HAVE_BCOPY + +/* Define to 1 if you have the `closedir' function. */ +#cmakedefine HAVE_CLOSEDIR ${HAVE_CLOSEDIR} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_CXXABI_H ${HAVE_CXXABI_H} + +/* Define to 1 if you have the header file. */ +#undef HAVE_CRASHREPORTERCLIENT_H + +/* can use __crashreporter_info__ */ +#undef HAVE_CRASHREPORTER_INFO + +/* Define to 1 if you have the declaration of `strerror_s', and to 0 if you + don't. */ +#cmakedefine01 HAVE_DECL_STRERROR_S + +/* Define to 1 if you have the DIA SDK installed, and to 0 if you don't. */ +#cmakedefine HAVE_DIA_SDK ${HAVE_DIA_SDK} + +/* Define to 1 if you have the header file, and it defines `DIR'. + */ +#cmakedefine HAVE_DIRENT_H ${HAVE_DIRENT_H} + +/* Define if you have the GNU dld library. */ +#undef HAVE_DLD + +/* Define to 1 if you have the `dlerror' function. */ +#cmakedefine HAVE_DLERROR ${HAVE_DLERROR} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_DLFCN_H ${HAVE_DLFCN_H} + +/* Define if dlopen() is available on this platform. */ +#cmakedefine HAVE_DLOPEN ${HAVE_DLOPEN} + +/* Define if you have the _dyld_func_lookup function. */ +#undef HAVE_DYLD + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_ERRNO_H ${HAVE_ERRNO_H} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_EXECINFO_H ${HAVE_EXECINFO_H} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_FCNTL_H ${HAVE_FCNTL_H} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_FENV_H ${HAVE_FENV_H} + +/* Define if libffi is available on this platform. */ +#cmakedefine HAVE_FFI_CALL ${HAVE_FFI_CALL} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_FFI_FFI_H ${HAVE_FFI_FFI_H} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_FFI_H ${HAVE_FFI_H} + +/* Define to 1 if you have the `futimes' function. */ +#cmakedefine HAVE_FUTIMES ${HAVE_FUTIMES} + +/* Define to 1 if you have the `futimens' function */ +#cmakedefine HAVE_FUTIMENS ${HAVE_FUTIMENS} + +/* Define to 1 if you have the `getcwd' function. */ +#cmakedefine HAVE_GETCWD ${HAVE_GETCWD} + +/* Define to 1 if you have the `getpagesize' function. */ +#cmakedefine HAVE_GETPAGESIZE ${HAVE_GETPAGESIZE} + +/* Define to 1 if you have the `getrlimit' function. */ +#cmakedefine HAVE_GETRLIMIT ${HAVE_GETRLIMIT} + +/* Define to 1 if you have the `getrusage' function. */ +#cmakedefine HAVE_GETRUSAGE ${HAVE_GETRUSAGE} + +/* Define to 1 if you have the `gettimeofday' function. */ +#cmakedefine HAVE_GETTIMEOFDAY ${HAVE_GETTIMEOFDAY} + +/* Define to 1 if the system has the type `int64_t'. */ +#cmakedefine HAVE_INT64_T ${HAVE_INT64_T} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_INTTYPES_H ${HAVE_INTTYPES_H} + +/* Define to 1 if you have the `isatty' function. */ +#cmakedefine HAVE_ISATTY 1 + +/* Define if you have the libdl library or equivalent. */ +#cmakedefine HAVE_LIBDL ${HAVE_LIBDL} + +/* Define to 1 if you have the `m' library (-lm). */ +#undef HAVE_LIBM + +/* Define to 1 if you have the `ole32' library (-lole32). */ +#undef HAVE_LIBOLE32 + +/* Define to 1 if you have the `psapi' library (-lpsapi). */ +#cmakedefine HAVE_LIBPSAPI ${HAVE_LIBPSAPI} + +/* Define to 1 if you have the `pthread' library (-lpthread). */ +#cmakedefine HAVE_LIBPTHREAD ${HAVE_LIBPTHREAD} + +/* Define to 1 if you have the `shell32' library (-lshell32). */ +#cmakedefine HAVE_LIBSHELL32 ${HAVE_LIBSHELL32} + +/* Define to 1 if you have the 'z' library (-lz). */ +#cmakedefine HAVE_LIBZ ${HAVE_LIBZ} + +/* Define to 1 if you have the 'edit' library (-ledit). */ +#cmakedefine HAVE_LIBEDIT ${HAVE_LIBEDIT} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_LIMITS_H ${HAVE_LIMITS_H} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_LINK_H ${HAVE_LINK_H} + +/* Define if you can use -rdynamic. */ +#define HAVE_LINK_EXPORT_DYNAMIC 1 + +/* Define if you can use -Wl,-R. to pass -R. to the linker, in order to add + the current directory to the dynamic linker search path. */ +#undef HAVE_LINK_R + +/* Define to 1 if you have the `longjmp' function. */ +#cmakedefine HAVE_LONGJMP ${HAVE_LONGJMP} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_MACH_MACH_H ${HAVE_MACH_MACH_H} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_MACH_O_DYLD_H ${HAVE_MACH_O_DYLD_H} + +/* Define if mallinfo() is available on this platform. */ +#cmakedefine HAVE_MALLINFO ${HAVE_MALLINFO} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_MALLOC_H ${HAVE_MALLOC_H} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_MALLOC_MALLOC_H ${HAVE_MALLOC_MALLOC_H} + +/* Define to 1 if you have the `malloc_zone_statistics' function. */ +#cmakedefine HAVE_MALLOC_ZONE_STATISTICS ${HAVE_MALLOC_ZONE_STATISTICS} + +/* Define to 1 if you have the `mallctl` function. */ +#cmakedefine HAVE_MALLCTL ${HAVE_MALLCTL} + +/* Define to 1 if you have the `mkdtemp' function. */ +#cmakedefine HAVE_MKDTEMP ${HAVE_MKDTEMP} + +/* Define to 1 if you have the `mkstemp' function. */ +#cmakedefine HAVE_MKSTEMP ${HAVE_MKSTEMP} + +/* Define to 1 if you have the `mktemp' function. */ +#cmakedefine HAVE_MKTEMP ${HAVE_MKTEMP} + +/* Define to 1 if you have a working `mmap' system call. */ +#undef HAVE_MMAP + +/* Define if mmap() uses MAP_ANONYMOUS to map anonymous pages, or undefine if + it uses MAP_ANON */ +#undef HAVE_MMAP_ANONYMOUS + +/* Define if mmap() can map files into memory */ +#undef HAVE_MMAP_FILE + +/* Define to 1 if you have the header file, and it defines `DIR'. */ +#cmakedefine HAVE_NDIR_H ${HAVE_NDIR_H} + +/* Define to 1 if you have the `opendir' function. */ +#cmakedefine HAVE_OPENDIR ${HAVE_OPENDIR} + +/* Define to 1 if you have the `posix_spawn' function. */ +#cmakedefine HAVE_POSIX_SPAWN ${HAVE_POSIX_SPAWN} + +/* Define to 1 if you have the `pread' function. */ +#cmakedefine HAVE_PREAD ${HAVE_PREAD} + +/* Define if libtool can extract symbol lists from object files. */ +#undef HAVE_PRELOADED_SYMBOLS + +/* Define to have the %a format string */ +#undef HAVE_PRINTF_A + +/* Have pthread_getspecific */ +#cmakedefine HAVE_PTHREAD_GETSPECIFIC ${HAVE_PTHREAD_GETSPECIFIC} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_PTHREAD_H ${HAVE_PTHREAD_H} + +/* Have pthread_mutex_lock */ +#cmakedefine HAVE_PTHREAD_MUTEX_LOCK ${HAVE_PTHREAD_MUTEX_LOCK} + +/* Have pthread_rwlock_init */ +#cmakedefine HAVE_PTHREAD_RWLOCK_INIT ${HAVE_PTHREAD_RWLOCK_INIT} + +/* Define to 1 if srand48/lrand48/drand48 exist in */ +#cmakedefine HAVE_RAND48 ${HAVE_RAND48} + +/* Define to 1 if you have the `readdir' function. */ +#cmakedefine HAVE_READDIR ${HAVE_READDIR} + +/* Define to 1 if you have the `realpath' function. */ +#cmakedefine HAVE_REALPATH ${HAVE_REALPATH} + +/* Define to 1 if you have the `sbrk' function. */ +#cmakedefine HAVE_SBRK ${HAVE_SBRK} + +/* Define to 1 if you have the `setenv' function. */ +#cmakedefine HAVE_SETENV ${HAVE_SETENV} + +/* Define to 1 if you have the `setjmp' function. */ +#cmakedefine HAVE_SETJMP ${HAVE_SETJMP} + +/* Define to 1 if you have the `setrlimit' function. */ +#cmakedefine HAVE_SETRLIMIT ${HAVE_SETRLIMIT} + +/* Define if you have the shl_load function. */ +#undef HAVE_SHL_LOAD + +/* Define to 1 if you have the `siglongjmp' function. */ +#cmakedefine HAVE_SIGLONGJMP ${HAVE_SIGLONGJMP} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_SIGNAL_H ${HAVE_SIGNAL_H} + +/* Define to 1 if you have the `sigsetjmp' function. */ +#cmakedefine HAVE_SIGSETJMP ${HAVE_SIGSETJMP} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_STDINT_H ${HAVE_STDINT_H} + +/* Set to 1 if the std::isinf function is found in */ +#undef HAVE_STD_ISINF_IN_CMATH + +/* Set to 1 if the std::isnan function is found in */ +#undef HAVE_STD_ISNAN_IN_CMATH + +/* Define to 1 if you have the `strdup' function. */ +#cmakedefine HAVE_STRDUP ${HAVE_STRDUP} + +/* Define to 1 if you have the `strerror' function. */ +#cmakedefine HAVE_STRERROR ${HAVE_STRERROR} + +/* Define to 1 if you have the `strerror_r' function. */ +#cmakedefine HAVE_STRERROR_R ${HAVE_STRERROR_R} + +/* Define to 1 if you have the `strtoll' function. */ +#cmakedefine HAVE_STRTOLL ${HAVE_STRTOLL} + +/* Define to 1 if you have the `strtoq' function. */ +#cmakedefine HAVE_STRTOQ ${HAVE_STRTOQ} + +/* Define to 1 if you have the `sysconf' function. */ +#undef HAVE_SYSCONF + +/* Define to 1 if you have the header file, and it defines `DIR'. + */ +#cmakedefine HAVE_SYS_DIR_H ${HAVE_SYS_DIR_H} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_SYS_IOCTL_H ${HAVE_SYS_IOCTL_H} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_SYS_MMAN_H ${} + +/* Define to 1 if you have the header file, and it defines `DIR'. + */ +#cmakedefine HAVE_SYS_NDIR_H ${HAVE_SYS_NDIR_H} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_SYS_PARAM_H ${HAVE_SYS_PARAM_H} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_SYS_RESOURCE_H ${HAVE_SYS_RESOURCE_H} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_SYS_STAT_H ${HAVE_SYS_STAT_H} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_SYS_TIME_H ${HAVE_SYS_TIME_H} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_SYS_TYPES_H ${HAVE_SYS_TYPES_H} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_SYS_UIO_H ${HAVE_SYS_UIO_H} + +/* Define if the setupterm() function is supported this platform. */ +#cmakedefine HAVE_TERMINFO ${HAVE_TERMINFO} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_TERMIOS_H ${HAVE_TERMIOS_H} + +/* Define to 1 if the system has the type `uint64_t'. */ +#cmakedefine HAVE_UINT64_T ${HAVE_UINT64_T} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_UNISTD_H ${HAVE_UNISTD_H} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_UTIME_H ${HAVE_UTIME_H} + +/* Define to 1 if the system has the type `u_int64_t'. */ +#cmakedefine HAVE_U_INT64_T ${HAVE_U_INT64_T} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_VALGRIND_VALGRIND_H ${HAVE_VALGRIND_VALGRIND_H} + +/* Define to 1 if you have the `writev' function. */ +#cmakedefine HAVE_WRITEV ${HAVE_WRITEV} + +/* Define to 1 if you have the header file. */ +#cmakedefine HAVE_ZLIB_H ${HAVE_ZLIB_H} + +/* Have host's _alloca */ +#cmakedefine HAVE__ALLOCA ${HAVE__ALLOCA} + +/* Have host's __alloca */ +#cmakedefine HAVE___ALLOCA ${HAVE___ALLOCA} + +/* Have host's __ashldi3 */ +#cmakedefine HAVE___ASHLDI3 ${HAVE___ASHLDI3} + +/* Have host's __ashrdi3 */ +#cmakedefine HAVE___ASHRDI3 ${HAVE___ASHRDI3} + +/* Have host's __chkstk */ +#cmakedefine HAVE___CHKSTK ${HAVE___CHKSTK} + +/* Have host's __chkstk_ms */ +#cmakedefine HAVE___CHKSTK_MS ${HAVE___CHKSTK_MS} + +/* Have host's __cmpdi2 */ +#cmakedefine HAVE___CMPDI2 ${HAVE___CMPDI2} + +/* Have host's __divdi3 */ +#cmakedefine HAVE___DIVDI3 ${HAVE___DIVDI3} + +/* Define to 1 if you have the `__dso_handle' function. */ +#undef HAVE___DSO_HANDLE + +/* Have host's __fixdfdi */ +#cmakedefine HAVE___FIXDFDI ${HAVE___FIXDFDI} + +/* Have host's __fixsfdi */ +#cmakedefine HAVE___FIXSFDI ${HAVE___FIXSFDI} + +/* Have host's __floatdidf */ +#cmakedefine HAVE___FLOATDIDF ${HAVE___FLOATDIDF} + +/* Have host's __lshrdi3 */ +#cmakedefine HAVE___LSHRDI3 ${HAVE___LSHRDI3} + +/* Have host's __main */ +#cmakedefine HAVE___MAIN ${HAVE___MAIN} + +/* Have host's __moddi3 */ +#cmakedefine HAVE___MODDI3 ${HAVE___MODDI3} + +/* Have host's __udivdi3 */ +#cmakedefine HAVE___UDIVDI3 ${HAVE___UDIVDI3} + +/* Have host's __umoddi3 */ +#cmakedefine HAVE___UMODDI3 ${HAVE___UMODDI3} + +/* Have host's ___chkstk */ +#cmakedefine HAVE____CHKSTK ${HAVE____CHKSTK} + +/* Have host's ___chkstk_ms */ +#cmakedefine HAVE____CHKSTK_MS ${HAVE____CHKSTK_MS} + +/* Linker version detected at compile time. */ +#undef HOST_LINK_VERSION + +/* Installation directory for binary executables */ +#cmakedefine LLVM_BINDIR "${LLVM_BINDIR}" + +/* Time at which LLVM was configured */ +#cmakedefine LLVM_CONFIGTIME "${LLVM_CONFIGTIME}" + +/* Installation directory for data files */ +#cmakedefine LLVM_DATADIR "${LLVM_DATADIR}" + +/* Target triple LLVM will generate code for by default + * Doesn't use `cmakedefine` because it is allowed to be empty. + */ +#define LLVM_DEFAULT_TARGET_TRIPLE "${LLVM_DEFAULT_TARGET_TRIPLE}" + +/* Installation directory for documentation */ +#cmakedefine LLVM_DOCSDIR "${LLVM_DOCSDIR}" + +/* Define if LLVM is built with asserts and checks that change the layout of + client-visible data structures. */ +#cmakedefine LLVM_ENABLE_ABI_BREAKING_CHECKS + +/* Define if threads enabled */ +#cmakedefine01 LLVM_ENABLE_THREADS + +/* Define if zlib compression is available */ +#cmakedefine01 LLVM_ENABLE_ZLIB + +/* Installation directory for config files */ +#cmakedefine LLVM_ETCDIR "${LLVM_ETCDIR}" + +/* Has gcc/MSVC atomic intrinsics */ +#cmakedefine01 LLVM_HAS_ATOMICS + +/* Host triple LLVM will be executed on */ +#cmakedefine LLVM_HOST_TRIPLE "${LLVM_HOST_TRIPLE}" + +/* Installation directory for include files */ +#cmakedefine LLVM_INCLUDEDIR "${LLVM_INCLUDEDIR}" + +/* Installation directory for .info files */ +#cmakedefine LLVM_INFODIR "${LLVM_INFODIR}" + +/* Installation directory for man pages */ +#cmakedefine LLVM_MANDIR "${LLVM_MANDIR}" + +/* LLVM architecture name for the native architecture, if available */ +#cmakedefine LLVM_NATIVE_ARCH ${LLVM_NATIVE_ARCH} + +/* LLVM name for the native AsmParser init function, if available */ +#cmakedefine LLVM_NATIVE_ASMPARSER LLVMInitialize${LLVM_NATIVE_ARCH}AsmParser + +/* LLVM name for the native AsmPrinter init function, if available */ +#cmakedefine LLVM_NATIVE_ASMPRINTER LLVMInitialize${LLVM_NATIVE_ARCH}AsmPrinter + +/* LLVM name for the native Disassembler init function, if available */ +#cmakedefine LLVM_NATIVE_DISASSEMBLER LLVMInitialize${LLVM_NATIVE_ARCH}Disassembler + +/* LLVM name for the native Target init function, if available */ +#cmakedefine LLVM_NATIVE_TARGET LLVMInitialize${LLVM_NATIVE_ARCH}Target + +/* LLVM name for the native TargetInfo init function, if available */ +#cmakedefine LLVM_NATIVE_TARGETINFO LLVMInitialize${LLVM_NATIVE_ARCH}TargetInfo + +/* LLVM name for the native target MC init function, if available */ +#cmakedefine LLVM_NATIVE_TARGETMC LLVMInitialize${LLVM_NATIVE_ARCH}TargetMC + +/* Define if this is Unixish platform */ +#cmakedefine LLVM_ON_UNIX ${LLVM_ON_UNIX} + +/* Define if this is Win32ish platform */ +#cmakedefine LLVM_ON_WIN32 ${LLVM_ON_WIN32} + +/* Installation prefix directory */ +#cmakedefine LLVM_PREFIX "${LLVM_PREFIX}" + +/* Define if we have the Intel JIT API runtime support library */ +#cmakedefine LLVM_USE_INTEL_JITEVENTS 1 + +/* Define if we have the oprofile JIT-support library */ +#cmakedefine LLVM_USE_OPROFILE 1 + +/* Major version of the LLVM API */ +#define LLVM_VERSION_MAJOR ${LLVM_VERSION_MAJOR} + +/* Minor version of the LLVM API */ +#define LLVM_VERSION_MINOR ${LLVM_VERSION_MINOR} + +/* Patch version of the LLVM API */ +#define LLVM_VERSION_PATCH ${LLVM_VERSION_PATCH} + +/* LLVM version string */ +#define LLVM_VERSION_STRING "${PACKAGE_VERSION}" + +/* Define if we link Polly to the tools */ +#cmakedefine LINK_POLLY_INTO_TOOLS + +/* Define if the OS needs help to load dependent libraries for dlopen(). */ +#cmakedefine LTDL_DLOPEN_DEPLIBS ${LTDL_DLOPEN_DEPLIBS} + +/* Define to the sub-directory in which libtool stores uninstalled libraries. + */ +#undef LTDL_OBJDIR + +/* Define to the extension used for shared libraries, say, ".so". */ +#cmakedefine LTDL_SHLIB_EXT "${LTDL_SHLIB_EXT}" + +/* Define to the system default library search path. */ +#cmakedefine LTDL_SYSSEARCHPATH "${LTDL_SYSSEARCHPATH}" + +/* Define if /dev/zero should be used when mapping RWX memory, or undefine if + its not necessary */ +#undef NEED_DEV_ZERO_FOR_MMAP + +/* Define if dlsym() requires a leading underscore in symbol names. */ +#undef NEED_USCORE + +/* Define to the address where bug reports for this package should be sent. */ +#cmakedefine PACKAGE_BUGREPORT "${PACKAGE_BUGREPORT}" + +/* Define to the full name of this package. */ +#cmakedefine PACKAGE_NAME "${PACKAGE_NAME}" + +/* Define to the full name and version of this package. */ +#cmakedefine PACKAGE_STRING "${PACKAGE_STRING}" + +/* Define to the one symbol short name of this package. */ +#undef PACKAGE_TARNAME + +/* Define to the version of this package. */ +#cmakedefine PACKAGE_VERSION "${PACKAGE_VERSION}" + +/* Define as the return type of signal handlers (`int' or `void'). */ +#cmakedefine RETSIGTYPE ${RETSIGTYPE} + +/* Define to 1 if the `S_IS*' macros in do not work properly. */ +#undef STAT_MACROS_BROKEN + +/* Define to 1 if you have the ANSI C header files. */ +#undef STDC_HEADERS + +/* Define to 1 if you can safely include both and . */ +#undef TIME_WITH_SYS_TIME + +/* Define to 1 if your declares `struct tm'. */ +#undef TM_IN_SYS_TIME + +/* Type of 1st arg on ELM Callback */ +#cmakedefine WIN32_ELMCB_PCSTR ${WIN32_ELMCB_PCSTR} + +/* Define to `int' if does not define. */ +#undef pid_t + +/* Define to `unsigned int' if does not define. */ +#undef size_t + +/* Define to a function replacing strtoll */ +#cmakedefine strtoll ${strtoll} + +/* Define to a function implementing strtoull */ +#cmakedefine strtoull ${strtoull} + +/* Define to a function implementing stricmp */ +#cmakedefine stricmp ${stricmp} + +/* Define to a function implementing strdup */ +#cmakedefine strdup ${strdup} + +/* Define to 1 if you have the `_chsize_s' function. */ +#cmakedefine HAVE__CHSIZE_S ${HAVE__CHSIZE_S} + +#endif diff --git a/llvm/include/llvm/Config/llvm-config.h.cmake b/llvm/include/llvm/Config/llvm-config.h.cmake new file mode 100644 index 0000000..e0f3067 --- /dev/null +++ b/llvm/include/llvm/Config/llvm-config.h.cmake @@ -0,0 +1,108 @@ +/*===------- llvm/Config/llvm-config.h - llvm configuration -------*- C -*-===*/ +/* */ +/* The LLVM Compiler Infrastructure */ +/* */ +/* This file is distributed under the University of Illinois Open Source */ +/* License. See LICENSE.TXT for details. */ +/* */ +/*===----------------------------------------------------------------------===*/ + +/* This file enumerates variables from the LLVM configuration so that they + can be in exported headers and won't override package specific directives. + This is a C header that can be included in the llvm-c headers. */ + +#ifndef LLVM_CONFIG_H +#define LLVM_CONFIG_H + +/* Installation directory for binary executables */ +#cmakedefine LLVM_BINDIR "${LLVM_BINDIR}" + +/* Time at which LLVM was configured */ +#cmakedefine LLVM_CONFIGTIME "${LLVM_CONFIGTIME}" + +/* Installation directory for data files */ +#cmakedefine LLVM_DATADIR "${LLVM_DATADIR}" + +/* Target triple LLVM will generate code for by default */ +#cmakedefine LLVM_DEFAULT_TARGET_TRIPLE "${LLVM_DEFAULT_TARGET_TRIPLE}" + +/* Installation directory for documentation */ +#cmakedefine LLVM_DOCSDIR "${LLVM_DOCSDIR}" + +/* Define if LLVM is built with asserts and checks that change the layout of + client-visible data structures. */ +#cmakedefine LLVM_ENABLE_ABI_BREAKING_CHECKS + +/* Define if threads enabled */ +#cmakedefine01 LLVM_ENABLE_THREADS + +/* Installation directory for config files */ +#cmakedefine LLVM_ETCDIR "${LLVM_ETCDIR}" + +/* Has gcc/MSVC atomic intrinsics */ +#cmakedefine01 LLVM_HAS_ATOMICS + +/* Host triple LLVM will be executed on */ +#cmakedefine LLVM_HOST_TRIPLE "${LLVM_HOST_TRIPLE}" + +/* Installation directory for include files */ +#cmakedefine LLVM_INCLUDEDIR "${LLVM_INCLUDEDIR}" + +/* Installation directory for .info files */ +#cmakedefine LLVM_INFODIR "${LLVM_INFODIR}" + +/* Installation directory for man pages */ +#cmakedefine LLVM_MANDIR "${LLVM_MANDIR}" + +/* LLVM architecture name for the native architecture, if available */ +#cmakedefine LLVM_NATIVE_ARCH ${LLVM_NATIVE_ARCH} + +/* LLVM name for the native AsmParser init function, if available */ +#cmakedefine LLVM_NATIVE_ASMPARSER LLVMInitialize${LLVM_NATIVE_ARCH}AsmParser + +/* LLVM name for the native AsmPrinter init function, if available */ +#cmakedefine LLVM_NATIVE_ASMPRINTER LLVMInitialize${LLVM_NATIVE_ARCH}AsmPrinter + +/* LLVM name for the native Disassembler init function, if available */ +#cmakedefine LLVM_NATIVE_DISASSEMBLER LLVMInitialize${LLVM_NATIVE_ARCH}Disassembler + +/* LLVM name for the native Target init function, if available */ +#cmakedefine LLVM_NATIVE_TARGET LLVMInitialize${LLVM_NATIVE_ARCH}Target + +/* LLVM name for the native TargetInfo init function, if available */ +#cmakedefine LLVM_NATIVE_TARGETINFO LLVMInitialize${LLVM_NATIVE_ARCH}TargetInfo + +/* LLVM name for the native target MC init function, if available */ +#cmakedefine LLVM_NATIVE_TARGETMC LLVMInitialize${LLVM_NATIVE_ARCH}TargetMC + +/* Define if this is Unixish platform */ +#cmakedefine LLVM_ON_UNIX ${LLVM_ON_UNIX} + +/* Define if this is Win32ish platform */ +#cmakedefine LLVM_ON_WIN32 ${LLVM_ON_WIN32} + +/* Installation prefix directory */ +#cmakedefine LLVM_PREFIX "${LLVM_PREFIX}" + +/* Define if we have the Intel JIT API runtime support library */ +#cmakedefine LLVM_USE_INTEL_JITEVENTS 1 + +/* Define if we have the oprofile JIT-support library */ +#cmakedefine LLVM_USE_OPROFILE 1 + +/* Major version of the LLVM API */ +#define LLVM_VERSION_MAJOR ${LLVM_VERSION_MAJOR} + +/* Minor version of the LLVM API */ +#define LLVM_VERSION_MINOR ${LLVM_VERSION_MINOR} + +/* Patch version of the LLVM API */ +#define LLVM_VERSION_PATCH ${LLVM_VERSION_PATCH} + +/* LLVM version string */ +#define LLVM_VERSION_STRING "${PACKAGE_VERSION}" + +/* Define if we link Polly to the tools */ +#cmakedefine LINK_POLLY_INTO_TOOLS + +#endif diff --git a/llvm/include/llvm/MC/ConstantPools.h b/llvm/include/llvm/MC/ConstantPools.h new file mode 100644 index 0000000..458e09b --- /dev/null +++ b/llvm/include/llvm/MC/ConstantPools.h @@ -0,0 +1,93 @@ +//===- ConstantPool.h - Keep track of assembler-generated ------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the ConstantPool and AssemblerConstantPools classes. +// +//===----------------------------------------------------------------------===// + + +#ifndef LLVM_MC_CONSTANTPOOLS_H +#define LLVM_MC_CONSTANTPOOLS_H + +#include "llvm/ADT/MapVector.h" +#include "llvm/ADT/SmallVector.h" +#include "llvm/Support/SMLoc.h" + +namespace llvm_ks { +class MCContext; +class MCExpr; +class MCSection; +class MCStreamer; +class MCSymbol; + +struct ConstantPoolEntry { + ConstantPoolEntry(MCSymbol *L, const MCExpr *Val, unsigned Sz, SMLoc Loc_) + : Label(L), Value(Val), Size(Sz), Loc(Loc_) {} + MCSymbol *Label; + const MCExpr *Value; + unsigned Size; + SMLoc Loc; +}; + +// A class to keep track of assembler-generated constant pools that are use to +// implement the ldr-pseudo. +class ConstantPool { + typedef SmallVector EntryVecTy; + EntryVecTy Entries; + +public: + // Initialize a new empty constant pool + ConstantPool() {} + + // Add a new entry to the constant pool in the next slot. + // \param Value is the new entry to put in the constant pool. + // \param Size is the size in bytes of the entry + // + // \returns a MCExpr that references the newly inserted value + const MCExpr *addEntry(const MCExpr *Value, MCContext &Context, + unsigned Size, SMLoc Loc); + + // Emit the contents of the constant pool using the provided streamer. + void emitEntries(MCStreamer &Streamer); + + // Return true if the constant pool is empty + bool empty(); +}; + +class AssemblerConstantPools { + // Map type used to keep track of per-Section constant pools used by the + // ldr-pseudo opcode. The map associates a section to its constant pool. The + // constant pool is a vector of (label, value) pairs. When the ldr + // pseudo is parsed we insert a new (label, value) pair into the constant pool + // for the current section and add MCSymbolRefExpr to the new label as + // an opcode to the ldr. After we have parsed all the user input we + // output the (label, value) pairs in each constant pool at the end of the + // section. + // + // We use the MapVector for the map type to ensure stable iteration of + // the sections at the end of the parse. We need to iterate over the + // sections in a stable order to ensure that we have print the + // constant pools in a deterministic order when printing an assembly + // file. + typedef MapVector ConstantPoolMapTy; + ConstantPoolMapTy ConstantPools; + +public: + void emitAll(MCStreamer &Streamer); + void emitForCurrentSection(MCStreamer &Streamer); + const MCExpr *addEntry(MCStreamer &Streamer, const MCExpr *Expr, + unsigned Size, SMLoc Loc); + +private: + ConstantPool *getConstantPool(MCSection *Section); + ConstantPool &getOrCreateConstantPool(MCSection *Section); +}; +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCAsmBackend.h b/llvm/include/llvm/MC/MCAsmBackend.h new file mode 100644 index 0000000..e78b109 --- /dev/null +++ b/llvm/include/llvm/MC/MCAsmBackend.h @@ -0,0 +1,151 @@ +//===-- llvm/MC/MCAsmBackend.h - MC Asm Backend -----------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCASMBACKEND_H +#define LLVM_MC_MCASMBACKEND_H + +#include "llvm/ADT/ArrayRef.h" +#include "llvm/ADT/Optional.h" +#include "llvm/MC/MCDirectives.h" +#include "llvm/MC/MCDwarf.h" +#include "llvm/MC/MCFixup.h" +#include "llvm/Support/DataTypes.h" +#include "llvm/Support/ErrorHandling.h" + +namespace llvm_ks { +class MCAsmLayout; +class MCAssembler; +class MCELFObjectTargetWriter; +struct MCFixupKindInfo; +class MCFragment; +class MCInst; +class MCRelaxableFragment; +class MCObjectWriter; +class MCSection; +class MCValue; +class raw_ostream; + +/// Generic interface to target specific assembler backends. +class MCAsmBackend { + MCAsmBackend(const MCAsmBackend &) = delete; + void operator=(const MCAsmBackend &) = delete; + +protected: // Can only create subclasses. + MCAsmBackend(); + + unsigned HasDataInCodeSupport : 1; + int KsArch; // Keystone arch + +public: + virtual ~MCAsmBackend(); + + /// lifetime management + virtual void reset() {} + + /// Create a new MCObjectWriter instance for use by the assembler backend to + /// emit the final object file. + virtual MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const = 0; + + /// Create a new ELFObjectTargetWriter to enable non-standard + /// ELFObjectWriters. + virtual MCELFObjectTargetWriter *createELFObjectTargetWriter() const { + llvm_unreachable("createELFObjectTargetWriter is not supported by asm " + "backend"); + } + + /// Check whether this target implements data-in-code markers. If not, data + /// region directives will be ignored. + bool hasDataInCodeSupport() const { return HasDataInCodeSupport; } + + /// \name Target Fixup Interfaces + /// @{ + + /// Get the number of target specific fixup kinds. + virtual unsigned getNumFixupKinds() const = 0; + + /// Map a relocation name used in .reloc to a fixup kind. + virtual Optional getFixupKind(StringRef Name) const; + + /// Get information on a fixup kind. + virtual const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const; + + /// Target hook to adjust the literal value of a fixup if necessary. + /// IsResolved signals whether the caller believes a relocation is needed; the + /// target can modify the value. The default does nothing. + virtual void processFixupValue(const MCAssembler &Asm, + const MCAsmLayout &Layout, + const MCFixup &Fixup, const MCFragment *DF, + const MCValue &Target, uint64_t &Value, + bool &IsResolved) {} + + /// Apply the \p Value for given \p Fixup into the provided data fragment, at + /// the offset specified by the fixup and following the fixup kind as + /// appropriate. + virtual void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize, + uint64_t Value, bool IsPCRel, unsigned int &KsError) const = 0; + + /// @} + + /// \name Target Relaxation Interfaces + /// @{ + + /// Check whether the given instruction may need relaxation. + /// + /// \param Inst - The instruction to test. + virtual bool mayNeedRelaxation(const MCInst &Inst) const = 0; + + /// Target specific predicate for whether a given fixup requires the + /// associated instruction to be relaxed. + virtual bool fixupNeedsRelaxationAdvanced(const MCFixup &Fixup, bool Resolved, + uint64_t Value, + const MCRelaxableFragment *DF, + const MCAsmLayout &Layout) const; + + /// Simple predicate for targets where !Resolved implies requiring relaxation + virtual bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, + const MCRelaxableFragment *DF, + const MCAsmLayout &Layout, unsigned &KsError) const = 0; + + /// Relax the instruction in the given fragment to the next wider instruction. + /// + /// \param Inst The instruction to relax, which may be the same as the + /// output. + /// \param [out] Res On return, the relaxed instruction. + virtual void relaxInstruction(const MCInst &Inst, MCInst &Res) const = 0; + + /// @} + + /// Returns the minimum size of a nop in bytes on this target. The assembler + /// will use this to emit excess padding in situations where the padding + /// required for simple alignment would be less than the minimum nop size. + /// + virtual unsigned getMinimumNopSize() const { return 1; } + + /// Write an (optimal) nop sequence of Count bytes to the given output. If the + /// target cannot generate such a sequence, it should return an error. + /// + /// \return - True on success. + virtual bool writeNopData(uint64_t Count, MCObjectWriter *OW) const = 0; + + /// Handle any target-specific assembler flags. By default, do nothing. + virtual void handleAssemblerFlag(MCAssemblerFlag Flag) {} + + /// \brief Generate the compact unwind encoding for the CFI instructions. + virtual uint32_t + generateCompactUnwindEncoding(ArrayRef) const { + return 0; + } + + void setArch(int arch) { KsArch = arch; } + int getArch() { return KsArch; } +}; + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/MC/MCAsmInfo.h b/llvm/include/llvm/MC/MCAsmInfo.h new file mode 100644 index 0000000..67ac6f6 --- /dev/null +++ b/llvm/include/llvm/MC/MCAsmInfo.h @@ -0,0 +1,576 @@ +//===-- llvm/MC/MCAsmInfo.h - Asm info --------------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains a class to be used as the basis for target specific +// asm writers. This class primarily takes care of global printing constants, +// which are used in very similar ways across all targets. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCASMINFO_H +#define LLVM_MC_MCASMINFO_H + +#include "llvm/MC/MCDirectives.h" +#include "llvm/MC/MCDwarf.h" +#include +#include + +namespace llvm_ks { +class MCExpr; +class MCSection; +class MCStreamer; +class MCSymbol; +class MCContext; + +namespace WinEH { +enum class EncodingType { + Invalid, /// Invalid + Alpha, /// Windows Alpha + Alpha64, /// Windows AXP64 + ARM, /// Windows NT (Windows on ARM) + CE, /// Windows CE ARM, PowerPC, SH3, SH4 + Itanium, /// Windows x64, Windows Itanium (IA-64) + X86, /// Windows x86, uses no CFI, just EH tables + MIPS = Alpha, +}; +} + +enum class ExceptionHandling { + None, /// No exception support + DwarfCFI, /// DWARF-like instruction based exceptions + SjLj, /// setjmp/longjmp based exceptions + ARM, /// ARM EHABI + WinEH, /// Windows Exception Handling +}; + +namespace LCOMM { +enum LCOMMType { NoAlignment, ByteAlignment, Log2Alignment }; +} + +/// This class is intended to be used as a base class for asm +/// properties and features specific to the target. +class MCAsmInfo { +protected: + //===------------------------------------------------------------------===// + // Properties to be set by the target writer, used to configure asm printer. + // + + /// Pointer size in bytes. Default is 4. + unsigned PointerSize; + + /// Size of the stack slot reserved for callee-saved registers, in bytes. + /// Default is same as pointer size. + unsigned CalleeSaveStackSlotSize; + + /// True if target is little endian. Default is true. + bool IsLittleEndian; + + /// True if target stack grow up. Default is false. + bool StackGrowsUp; + + /// True if this target has the MachO .subsections_via_symbols directive. + /// Default is false. + bool HasSubsectionsViaSymbols; + + /// True if this is a MachO target that supports the macho-specific .zerofill + /// directive for emitting BSS Symbols. Default is false. + bool HasMachoZeroFillDirective; + + /// True if this is a MachO target that supports the macho-specific .tbss + /// directive for emitting thread local BSS Symbols. Default is false. + bool HasMachoTBSSDirective; + + /// True if the compiler should emit a ".reference .constructors_used" or + /// ".reference .destructors_used" directive after the static ctor/dtor + /// list. This directive is only emitted in Static relocation model. Default + /// is false. + bool HasStaticCtorDtorReferenceInStaticMode; + + /// This is the maximum possible length of an instruction, which is needed to + /// compute the size of an inline asm. Defaults to 4. + unsigned MaxInstLength; + + /// Every possible instruction length is a multiple of this value. Factored + /// out in .debug_frame and .debug_line. Defaults to 1. + unsigned MinInstAlignment; + + /// The '$' token, when not referencing an identifier or constant, refers to + /// the current PC. Defaults to false. + bool DollarIsPC; + + /// This string, if specified, is used to separate instructions from each + /// other when on the same line. Defaults to ';' + const char *SeparatorString; + + /// This indicates the comment character used by the assembler. Defaults to + /// "#" + const char *CommentString; + + /// This is appended to emitted labels. Defaults to ":" + const char *LabelSuffix; + + // Print the EH begin symbol with an assignment. Defaults to false. + bool UseAssignmentForEHBegin; + + // Do we need to create a local symbol for .size? + bool NeedsLocalForSize; + + /// This prefix is used for globals like constant pool entries that are + /// completely private to the .s file and should not have names in the .o + /// file. Defaults to "L" + const char *PrivateGlobalPrefix; + + /// This prefix is used for labels for basic blocks. Defaults to the same as + /// PrivateGlobalPrefix. + const char *PrivateLabelPrefix; + + /// This prefix is used for symbols that should be passed through the + /// assembler but be removed by the linker. This is 'l' on Darwin, currently + /// used for some ObjC metadata. The default of "" meast that for this system + /// a plain private symbol should be used. Defaults to "". + const char *LinkerPrivateGlobalPrefix; + + /// If these are nonempty, they contain a directive to emit before and after + /// an inline assembly statement. Defaults to "#APP\n", "#NO_APP\n" + const char *InlineAsmStart; + const char *InlineAsmEnd; + + /// These are assembly directives that tells the assembler to interpret the + /// following instructions differently. Defaults to ".code16", ".code32", + /// ".code64". + const char *Code16Directive; + const char *Code32Directive; + const char *Code64Directive; + + /// Which dialect of an assembler variant to use. Defaults to 0 + unsigned AssemblerDialect; + + /// Default Radix for immediate + unsigned Radix; + + /// This is true if the assembler allows @ characters in symbol names. + /// Defaults to false. + bool AllowAtInName; + + /// If this is true, symbol names with invalid characters will be printed in + /// quotes. + bool SupportsQuotedNames; + + /// This is true if data region markers should be printed as + /// ".data_region/.end_data_region" directives. If false, use "$d/$a" labels + /// instead. + bool UseDataRegionDirectives; + + //===--- Data Emission Directives -------------------------------------===// + + /// This should be set to the directive used to get some number of zero bytes + /// emitted to the current section. Common cases are "\t.zero\t" and + /// "\t.space\t". If this is set to null, the Data*bitsDirective's will be + /// used to emit zero bytes. Defaults to "\t.zero\t" + const char *ZeroDirective; + + /// This directive allows emission of an ascii string with the standard C + /// escape characters embedded into it. Defaults to "\t.ascii\t" + const char *AsciiDirective; + + /// If not null, this allows for special handling of zero terminated strings + /// on this target. This is commonly supported as ".asciz". If a target + /// doesn't support this, it can be set to null. Defaults to "\t.asciz\t" + const char *AscizDirective; + + /// These directives are used to output some unit of integer data to the + /// current section. If a data directive is set to null, smaller data + /// directives will be used to emit the large sizes. Defaults to "\t.byte\t", + /// "\t.short\t", "\t.long\t", "\t.quad\t" + const char *Data8bitsDirective; + const char *Data16bitsDirective; + const char *Data32bitsDirective; + const char *Data64bitsDirective; + + /// If non-null, a directive that is used to emit a word which should be + /// relocated as a 64-bit GP-relative offset, e.g. .gpdword on Mips. Defaults + /// to NULL. + const char *GPRel64Directive; + + /// If non-null, a directive that is used to emit a word which should be + /// relocated as a 32-bit GP-relative offset, e.g. .gpword on Mips or .gprel32 + /// on Alpha. Defaults to NULL. + const char *GPRel32Directive; + + /// This is true if this target uses "Sun Style" syntax for section switching + /// ("#alloc,#write" etc) instead of the normal ELF syntax (,"a,w") in + /// .section directives. Defaults to false. + bool SunStyleELFSectionSwitchSyntax; + + /// This is true if this target uses ELF '.section' directive before the + /// '.bss' one. It's used for PPC/Linux which doesn't support the '.bss' + /// directive only. Defaults to false. + bool UsesELFSectionDirectiveForBSS; + + bool NeedsDwarfSectionOffsetDirective; + + //===--- Alignment Information ----------------------------------------===// + + /// If this is true (the default) then the asmprinter emits ".align N" + /// directives, where N is the number of bytes to align to. Otherwise, it + /// emits ".align log2(N)", e.g. 3 to align to an 8 byte boundary. Defaults + /// to true. + bool AlignmentIsInBytes; + + /// If non-zero, this is used to fill the executable space created as the + /// result of a alignment directive. Defaults to 0 + unsigned TextAlignFillValue; + + //===--- Global Variable Emission Directives --------------------------===// + + /// This is the directive used to declare a global entity. Defaults to + /// ".globl". + const char *GlobalDirective; + + /// True if the expression + /// .long f - g + /// uses a relocation but it can be suppressed by writing + /// a = f - g + /// .long a + bool SetDirectiveSuppressesReloc; + + /// False if the assembler requires that we use + /// \code + /// Lc = a - b + /// .long Lc + /// \endcode + // + /// instead of + // + /// \code + /// .long a - b + /// \endcode + /// + /// Defaults to true. + bool HasAggressiveSymbolFolding; + + /// True is .comm's and .lcomms optional alignment is to be specified in bytes + /// instead of log2(n). Defaults to true. + bool COMMDirectiveAlignmentIsInBytes; + + /// Describes if the .lcomm directive for the target supports an alignment + /// argument and how it is interpreted. Defaults to NoAlignment. + LCOMM::LCOMMType LCOMMDirectiveAlignmentType; + + // True if the target allows .align directives on functions. This is true for + // most targets, so defaults to true. + bool HasFunctionAlignment; + + /// True if the target has .type and .size directives, this is true for most + /// ELF targets. Defaults to true. + bool HasDotTypeDotSizeDirective; + + /// True if the target has a single parameter .file directive, this is true + /// for ELF targets. Defaults to true. + bool HasSingleParameterDotFile; + + /// True if the target has a .ident directive, this is true for ELF targets. + /// Defaults to false. + bool HasIdentDirective; + + /// True if this target supports the MachO .no_dead_strip directive. Defaults + /// to false. + bool HasNoDeadStrip; + + /// Used to declare a global as being a weak symbol. Defaults to ".weak". + const char *WeakDirective; + + /// This directive, if non-null, is used to declare a global as being a weak + /// undefined symbol. Defaults to NULL. + const char *WeakRefDirective; + + /// True if we have a directive to declare a global as being a weak defined + /// symbol. Defaults to false. + bool HasWeakDefDirective; + + /// True if we have a directive to declare a global as being a weak defined + /// symbol that can be hidden (unexported). Defaults to false. + bool HasWeakDefCanBeHiddenDirective; + + /// True if we have a .linkonce directive. This is used on cygwin/mingw. + /// Defaults to false. + bool HasLinkOnceDirective; + + /// This attribute, if not MCSA_Invalid, is used to declare a symbol as having + /// hidden visibility. Defaults to MCSA_Hidden. + MCSymbolAttr HiddenVisibilityAttr; + + /// This attribute, if not MCSA_Invalid, is used to declare an undefined + /// symbol as having hidden visibility. Defaults to MCSA_Hidden. + MCSymbolAttr HiddenDeclarationVisibilityAttr; + + /// This attribute, if not MCSA_Invalid, is used to declare a symbol as having + /// protected visibility. Defaults to MCSA_Protected + MCSymbolAttr ProtectedVisibilityAttr; + + //===--- Dwarf Emission Directives -----------------------------------===// + + /// True if target supports emission of debugging information. Defaults to + /// false. + bool SupportsDebugInformation; + + /// Exception handling format for the target. Defaults to None. + ExceptionHandling ExceptionsType; + + /// Windows exception handling data (.pdata) encoding. Defaults to Invalid. + WinEH::EncodingType WinEHEncodingType; + + /// True if Dwarf2 output generally uses relocations for references to other + /// .debug_* sections. + bool DwarfUsesRelocationsAcrossSections; + + /// True if DWARF FDE symbol reference relocations should be replaced by an + /// absolute difference. + bool DwarfFDESymbolsUseAbsDiff; + + /// True if dwarf register numbers are printed instead of symbolic register + /// names in .cfi_* directives. Defaults to false. + bool DwarfRegNumForCFI; + + /// True if target uses parens to indicate the symbol variant instead of @. + /// For example, foo(plt) instead of foo@plt. Defaults to false. + bool UseParensForSymbolVariant; + + //===--- Prologue State ----------------------------------------------===// + + std::vector InitialFrameState; + + //===--- Integrated Assembler Information ----------------------------===// + + /// Should we use the integrated assembler? + /// The integrated assembler should be enabled by default (by the + /// constructors) when failing to parse a valid piece of assembly (inline + /// or otherwise) is considered a bug. It may then be overridden after + /// construction (see LLVMTargetMachine::initAsmInfo()). + bool UseIntegratedAssembler; + + /// Compress DWARF debug sections. Defaults to false. + bool CompressDebugSections; + + /// True if the integrated assembler should interpret 'a >> b' constant + /// expressions as logical rather than arithmetic. + bool UseLogicalShr; + +public: + explicit MCAsmInfo(); + virtual ~MCAsmInfo(); + + /// Get the pointer size in bytes. + unsigned getPointerSize() const { return PointerSize; } + + /// Get the callee-saved register stack slot + /// size in bytes. + unsigned getCalleeSaveStackSlotSize() const { + return CalleeSaveStackSlotSize; + } + + /// True if the target is little endian. + bool isLittleEndian() const { return IsLittleEndian; } + + /// True if target stack grow up. + bool isStackGrowthDirectionUp() const { return StackGrowsUp; } + + bool hasSubsectionsViaSymbols() const { return HasSubsectionsViaSymbols; } + + // Data directive accessors. + + const char *getData8bitsDirective() const { return Data8bitsDirective; } + const char *getData16bitsDirective() const { return Data16bitsDirective; } + const char *getData32bitsDirective() const { return Data32bitsDirective; } + const char *getData64bitsDirective() const { return Data64bitsDirective; } + const char *getGPRel64Directive() const { return GPRel64Directive; } + const char *getGPRel32Directive() const { return GPRel32Directive; } + + /// Targets can implement this method to specify a section to switch to if the + /// translation unit doesn't have any trampolines that require an executable + /// stack. + virtual MCSection *getNonexecutableStackSection(MCContext &Ctx) const { + return nullptr; + } + + /// \brief True if the section is atomized using the symbols in it. + /// This is false if the section is not atomized at all (most ELF sections) or + /// if it is atomized based on its contents (MachO' __TEXT,__cstring for + /// example). + virtual bool isSectionAtomizableBySymbols(const MCSection &Section) const; + + virtual const MCExpr *getExprForPersonalitySymbol(const MCSymbol *Sym, + unsigned Encoding, + MCStreamer &Streamer) const; + + virtual const MCExpr *getExprForFDESymbol(const MCSymbol *Sym, + unsigned Encoding, + MCStreamer &Streamer) const; + + /// Return true if the identifier \p Name does not need quotes to be + /// syntactically correct. + virtual bool isValidUnquotedName(StringRef Name) const; + + /// Return true if the .section directive should be omitted when + /// emitting \p SectionName. For example: + /// + /// shouldOmitSectionDirective(".text") + /// + /// returns false => .section .text,#alloc,#execinstr + /// returns true => .text + virtual bool shouldOmitSectionDirective(StringRef SectionName) const; + + bool usesSunStyleELFSectionSwitchSyntax() const { + return SunStyleELFSectionSwitchSyntax; + } + + bool usesELFSectionDirectiveForBSS() const { + return UsesELFSectionDirectiveForBSS; + } + + bool needsDwarfSectionOffsetDirective() const { + return NeedsDwarfSectionOffsetDirective; + } + + // Accessors. + + bool hasMachoZeroFillDirective() const { return HasMachoZeroFillDirective; } + bool hasMachoTBSSDirective() const { return HasMachoTBSSDirective; } + bool hasStaticCtorDtorReferenceInStaticMode() const { + return HasStaticCtorDtorReferenceInStaticMode; + } + unsigned getMaxInstLength() const { return MaxInstLength; } + unsigned getMinInstAlignment() const { return MinInstAlignment; } + bool getDollarIsPC() const { return DollarIsPC; } + const char *getSeparatorString() const { return SeparatorString; } + + /// This indicates the column (zero-based) at which asm comments should be + /// printed. + unsigned getCommentColumn() const { return 40; } + + const char *getCommentString() const { return CommentString; } + void setCommentString(const char *str) { CommentString = str; } + const char *getLabelSuffix() const { return LabelSuffix; } + + bool useAssignmentForEHBegin() const { return UseAssignmentForEHBegin; } + bool needsLocalForSize() const { return NeedsLocalForSize; } + const char *getPrivateGlobalPrefix() const { return PrivateGlobalPrefix; } + const char *getPrivateLabelPrefix() const { return PrivateLabelPrefix; } + bool hasLinkerPrivateGlobalPrefix() const { + return LinkerPrivateGlobalPrefix[0] != '\0'; + } + const char *getLinkerPrivateGlobalPrefix() const { + if (hasLinkerPrivateGlobalPrefix()) + return LinkerPrivateGlobalPrefix; + return getPrivateGlobalPrefix(); + } + const char *getInlineAsmStart() const { return InlineAsmStart; } + const char *getInlineAsmEnd() const { return InlineAsmEnd; } + const char *getCode16Directive() const { return Code16Directive; } + const char *getCode32Directive() const { return Code32Directive; } + const char *getCode64Directive() const { return Code64Directive; } + unsigned getAssemblerDialect() const { return AssemblerDialect; } + void setAssemblerDialect(unsigned v) { AssemblerDialect = v; } + void setRadix(unsigned v) { Radix = v; } + unsigned getRadix() const { return Radix; } + bool doesAllowAtInName() const { return AllowAtInName; } + bool supportsNameQuoting() const { return SupportsQuotedNames; } + bool doesSupportDataRegionDirectives() const { + return UseDataRegionDirectives; + } + const char *getZeroDirective() const { return ZeroDirective; } + const char *getAsciiDirective() const { return AsciiDirective; } + const char *getAscizDirective() const { return AscizDirective; } + bool getAlignmentIsInBytes() const { return AlignmentIsInBytes; } + unsigned getTextAlignFillValue() const { return TextAlignFillValue; } + const char *getGlobalDirective() const { return GlobalDirective; } + bool doesSetDirectiveSuppressesReloc() const { + return SetDirectiveSuppressesReloc; + } + bool hasAggressiveSymbolFolding() const { return HasAggressiveSymbolFolding; } + bool getCOMMDirectiveAlignmentIsInBytes() const { + return COMMDirectiveAlignmentIsInBytes; + } + LCOMM::LCOMMType getLCOMMDirectiveAlignmentType() const { + return LCOMMDirectiveAlignmentType; + } + bool hasFunctionAlignment() const { return HasFunctionAlignment; } + bool hasDotTypeDotSizeDirective() const { return HasDotTypeDotSizeDirective; } + bool hasSingleParameterDotFile() const { return HasSingleParameterDotFile; } + bool hasIdentDirective() const { return HasIdentDirective; } + bool hasNoDeadStrip() const { return HasNoDeadStrip; } + const char *getWeakDirective() const { return WeakDirective; } + const char *getWeakRefDirective() const { return WeakRefDirective; } + bool hasWeakDefDirective() const { return HasWeakDefDirective; } + bool hasWeakDefCanBeHiddenDirective() const { + return HasWeakDefCanBeHiddenDirective; + } + bool hasLinkOnceDirective() const { return HasLinkOnceDirective; } + + MCSymbolAttr getHiddenVisibilityAttr() const { return HiddenVisibilityAttr; } + MCSymbolAttr getHiddenDeclarationVisibilityAttr() const { + return HiddenDeclarationVisibilityAttr; + } + MCSymbolAttr getProtectedVisibilityAttr() const { + return ProtectedVisibilityAttr; + } + bool doesSupportDebugInformation() const { return SupportsDebugInformation; } + bool doesSupportExceptionHandling() const { + return ExceptionsType != ExceptionHandling::None; + } + ExceptionHandling getExceptionHandlingType() const { return ExceptionsType; } + WinEH::EncodingType getWinEHEncodingType() const { return WinEHEncodingType; } + + /// Returns true if the exception handling method for the platform uses call + /// frame information to unwind. + bool usesCFIForEH() const { + return (ExceptionsType == ExceptionHandling::DwarfCFI || + ExceptionsType == ExceptionHandling::ARM || usesWindowsCFI()); + } + + bool usesWindowsCFI() const { + return ExceptionsType == ExceptionHandling::WinEH && + (WinEHEncodingType != WinEH::EncodingType::Invalid && + WinEHEncodingType != WinEH::EncodingType::X86); + } + + bool doesDwarfUseRelocationsAcrossSections() const { + return DwarfUsesRelocationsAcrossSections; + } + bool doDwarfFDESymbolsUseAbsDiff() const { return DwarfFDESymbolsUseAbsDiff; } + bool useDwarfRegNumForCFI() const { return DwarfRegNumForCFI; } + bool useParensForSymbolVariant() const { return UseParensForSymbolVariant; } + + void addInitialFrameState(const MCCFIInstruction &Inst) { + InitialFrameState.push_back(Inst); + } + + const std::vector &getInitialFrameState() const { + return InitialFrameState; + } + + /// Return true if assembly (inline or otherwise) should be parsed. + bool useIntegratedAssembler() const { return UseIntegratedAssembler; } + + /// Set whether assembly (inline or otherwise) should be parsed. + virtual void setUseIntegratedAssembler(bool Value) { + UseIntegratedAssembler = Value; + } + + bool compressDebugSections() const { return CompressDebugSections; } + + void setCompressDebugSections(bool CompressDebugSections) { + this->CompressDebugSections = CompressDebugSections; + } + + bool shouldUseLogicalShr() const { return UseLogicalShr; } +}; +} + +#endif diff --git a/llvm/include/llvm/MC/MCAsmInfoCOFF.h b/llvm/include/llvm/MC/MCAsmInfoCOFF.h new file mode 100644 index 0000000..b5974bd --- /dev/null +++ b/llvm/include/llvm/MC/MCAsmInfoCOFF.h @@ -0,0 +1,33 @@ +//===-- MCAsmInfoCOFF.h - COFF asm properties -------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCASMINFOCOFF_H +#define LLVM_MC_MCASMINFOCOFF_H + +#include "llvm/MC/MCAsmInfo.h" + +namespace llvm_ks { + class MCAsmInfoCOFF : public MCAsmInfo { + protected: + explicit MCAsmInfoCOFF(); + }; + + class MCAsmInfoMicrosoft : public MCAsmInfoCOFF { + protected: + explicit MCAsmInfoMicrosoft(); + }; + + class MCAsmInfoGNUCOFF : public MCAsmInfoCOFF { + protected: + explicit MCAsmInfoGNUCOFF(); + }; +} + + +#endif // LLVM_MC_MCASMINFOCOFF_H diff --git a/llvm/include/llvm/MC/MCAsmInfoDarwin.h b/llvm/include/llvm/MC/MCAsmInfoDarwin.h new file mode 100644 index 0000000..4754f83 --- /dev/null +++ b/llvm/include/llvm/MC/MCAsmInfoDarwin.h @@ -0,0 +1,29 @@ +//===---- MCAsmInfoDarwin.h - Darwin asm properties -------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines target asm properties related what form asm statements +// should take in general on Darwin-based targets +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCASMINFODARWIN_H +#define LLVM_MC_MCASMINFODARWIN_H + +#include "llvm/MC/MCAsmInfo.h" + +namespace llvm_ks { + class MCAsmInfoDarwin : public MCAsmInfo { + public: + explicit MCAsmInfoDarwin(); + bool isSectionAtomizableBySymbols(const MCSection &Section) const override; + }; +} + + +#endif // LLVM_MC_MCASMINFODARWIN_H diff --git a/llvm/include/llvm/MC/MCAsmInfoELF.h b/llvm/include/llvm/MC/MCAsmInfoELF.h new file mode 100644 index 0000000..84dd2d9 --- /dev/null +++ b/llvm/include/llvm/MC/MCAsmInfoELF.h @@ -0,0 +1,28 @@ +//===-- llvm/MC/MCAsmInfoELF.h - ELF Asm info -------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCASMINFOELF_H +#define LLVM_MC_MCASMINFOELF_H + +#include "llvm/MC/MCAsmInfo.h" + +namespace llvm_ks { +class MCAsmInfoELF : public MCAsmInfo { + MCSection *getNonexecutableStackSection(MCContext &Ctx) const final; + +protected: + /// Targets which have non-executable stacks by default can set this to false + /// to disable the special section which requests a non-executable stack. + bool UsesNonexecutableStackSection; + + MCAsmInfoELF(); +}; +} + +#endif diff --git a/llvm/include/llvm/MC/MCAsmLayout.h b/llvm/include/llvm/MC/MCAsmLayout.h new file mode 100644 index 0000000..0ad915a --- /dev/null +++ b/llvm/include/llvm/MC/MCAsmLayout.h @@ -0,0 +1,107 @@ +//===- MCAsmLayout.h - Assembly Layout Object -------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCASMLAYOUT_H +#define LLVM_MC_MCASMLAYOUT_H + +#include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/SmallVector.h" + +namespace llvm_ks { +class MCAssembler; +class MCFragment; +class MCSection; +class MCSymbol; + +/// Encapsulates the layout of an assembly file at a particular point in time. +/// +/// Assembly may require computing multiple layouts for a particular assembly +/// file as part of the relaxation process. This class encapsulates the layout +/// at a single point in time in such a way that it is always possible to +/// efficiently compute the exact address of any symbol in the assembly file, +/// even during the relaxation process. +class MCAsmLayout { + MCAssembler &Assembler; + + /// List of sections in layout order. + llvm_ks::SmallVector SectionOrder; + + /// The last fragment which was laid out, or 0 if nothing has been laid + /// out. Fragments are always laid out in order, so all fragments with a + /// lower ordinal will be valid. + mutable DenseMap LastValidFragment; + + /// \brief Make sure that the layout for the given fragment is valid, lazily + /// computing it if necessary. + bool ensureValid(const MCFragment *F) const; + + /// \brief Is the layout for this fragment valid? + bool isFragmentValid(const MCFragment *F) const; + +public: + MCAsmLayout(MCAssembler &Assembler); + + /// Get the assembler object this is a layout for. + MCAssembler &getAssembler() const { return Assembler; } + + /// \brief Invalidate the fragments starting with F because it has been + /// resized. The fragment's size should have already been updated, but + /// its bundle padding will be recomputed. + void invalidateFragmentsFrom(MCFragment *F); + + /// \brief Perform layout for a single fragment, assuming that the previous + /// fragment has already been laid out correctly, and the parent section has + /// been initialized. + bool layoutFragment(MCFragment *Fragment); + + /// \name Section Access (in layout order) + /// @{ + + llvm_ks::SmallVectorImpl &getSectionOrder() { return SectionOrder; } + const llvm_ks::SmallVectorImpl &getSectionOrder() const { + return SectionOrder; + } + + /// @} + /// \name Fragment Layout Data + /// @{ + + /// \brief Get the offset of the given fragment inside its containing section. + uint64_t getFragmentOffset(const MCFragment *F, bool &valid) const; + + /// @} + /// \name Utility Functions + /// @{ + + /// \brief Get the address space size of the given section, as it effects + /// layout. This may differ from the size reported by \see getSectionSize() by + /// not including section tail padding. + uint64_t getSectionAddressSize(const MCSection *Sec) const; + + /// \brief Get the data size of the given section, as emitted to the object + /// file. This may include additional padding, or be 0 for virtual sections. + uint64_t getSectionFileSize(const MCSection *Sec) const; + + /// \brief Get the offset of the given symbol, as computed in the current + /// layout. + /// \return True on success. + bool getSymbolOffset(const MCSymbol &S, uint64_t &Val, bool &valid) const; + + /// \brief Variant that reports a fatal error if the offset is not computable. + uint64_t getSymbolOffset(const MCSymbol &S, bool &valid) const; + + /// \brief If this symbol is equivalent to A + Constant, return A. + const MCSymbol *getBaseSymbol(const MCSymbol &Symbol) const; + + /// @} +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCAssembler.h b/llvm/include/llvm/MC/MCAssembler.h new file mode 100644 index 0000000..3e954ba --- /dev/null +++ b/llvm/include/llvm/MC/MCAssembler.h @@ -0,0 +1,435 @@ +//===- MCAssembler.h - Object File Generation -------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCASSEMBLER_H +#define LLVM_MC_MCASSEMBLER_H + +#include "llvm/ADT/SmallPtrSet.h" +#include "llvm/ADT/ilist.h" +#include "llvm/ADT/ilist_node.h" +#include "llvm/ADT/iterator.h" +#include "llvm/MC/MCDirectives.h" +#include "llvm/MC/MCDwarf.h" +#include "llvm/MC/MCFixup.h" +#include "llvm/MC/MCFragment.h" +#include "llvm/MC/MCInst.h" +#include "llvm/MC/MCLinkerOptimizationHint.h" +#include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/MC/MCSymbol.h" + +#include "keystone/keystone.h" + +namespace llvm_ks { +class raw_ostream; +class MCAsmLayout; +class MCAssembler; +class MCContext; +class MCCodeEmitter; +class MCExpr; +class MCFragment; +class MCObjectWriter; +class MCSection; +class MCSubtargetInfo; +class MCValue; +class MCAsmBackend; + +// FIXME: This really doesn't belong here. See comments below. +struct IndirectSymbolData { + MCSymbol *Symbol; + MCSection *Section; +}; + +// FIXME: Ditto this. Purely so the Streamer and the ObjectWriter can talk +// to one another. +struct DataRegionData { + // This enum should be kept in sync w/ the mach-o definition in + // llvm/Object/MachOFormat.h. + enum KindTy { Data = 1, JumpTable8, JumpTable16, JumpTable32 } Kind; + MCSymbol *Start; + MCSymbol *End; +}; + +class MCAssembler { + friend class MCAsmLayout; + mutable unsigned KsError; + mutable void *KsSymResolver; + +public: + void setError(unsigned E) const { KsError = E; } + unsigned getError() const { return KsError; } + + void setSymResolver(void *h) const { KsSymResolver = h; } + void *getSymResolver() const { return KsSymResolver; } + + typedef std::vector SectionListType; + typedef std::vector SymbolDataListType; + + typedef pointee_iterator const_iterator; + typedef pointee_iterator iterator; + + typedef pointee_iterator + const_symbol_iterator; + typedef pointee_iterator symbol_iterator; + + typedef iterator_range symbol_range; + typedef iterator_range const_symbol_range; + + typedef std::vector::const_iterator + const_indirect_symbol_iterator; + typedef std::vector::iterator indirect_symbol_iterator; + + typedef std::vector::const_iterator + const_data_region_iterator; + typedef std::vector::iterator data_region_iterator; + + /// MachO specific deployment target version info. + // A Major version of 0 indicates that no version information was supplied + // and so the corresponding load command should not be emitted. + typedef struct { + MCVersionMinType Kind; + unsigned Major; + unsigned Minor; + unsigned Update; + } VersionMinInfoType; + +private: + MCAssembler(const MCAssembler &) = delete; + void operator=(const MCAssembler &) = delete; + + MCContext &Context; + + MCAsmBackend &Backend; + + MCCodeEmitter &Emitter; + + MCObjectWriter &Writer; + + SectionListType Sections; + + SymbolDataListType Symbols; + + std::vector IndirectSymbols; + + std::vector DataRegions; + + /// The list of linker options to propagate into the object file. + std::vector> LinkerOptions; + + /// List of declared file names + std::vector FileNames; + + MCDwarfLineTableParams LTParams; + + /// The set of function symbols for which a .thumb_func directive has + /// been seen. + // + // FIXME: We really would like this in target specific code rather than + // here. Maybe when the relocation stuff moves to target specific, + // this can go with it? The streamer would need some target specific + // refactoring too. + mutable SmallPtrSet ThumbFuncs; + + /// \brief The bundle alignment size currently set in the assembler. + /// + /// By default it's 0, which means bundling is disabled. + unsigned BundleAlignSize; + + unsigned RelaxAll : 1; + unsigned SubsectionsViaSymbols : 1; + unsigned IncrementalLinkerCompatible : 1; + + /// ELF specific e_header flags + // It would be good if there were an MCELFAssembler class to hold this. + // ELF header flags are used both by the integrated and standalone assemblers. + // Access to the flags is necessary in cases where assembler directives affect + // which flags to be set. + unsigned ELFHeaderEFlags; + + /// Used to communicate Linker Optimization Hint information between + /// the Streamer and the .o writer + MCLOHContainer LOHContainer; + + VersionMinInfoType VersionMinInfo; + +private: + /// Evaluate a fixup to a relocatable expression and the value which should be + /// placed into the fixup. + /// + /// \param Layout The layout to use for evaluation. + /// \param Fixup The fixup to evaluate. + /// \param DF The fragment the fixup is inside. + /// \param Target [out] On return, the relocatable expression the fixup + /// evaluates to. + /// \param Value [out] On return, the value of the fixup as currently laid + /// out. + /// \return Whether the fixup value was fully resolved. This is true if the + /// \p Value result is fixed, otherwise the value may change due to + /// relocation. + bool evaluateFixup(const MCAsmLayout &Layout, const MCFixup &Fixup, + const MCFragment *DF, MCValue &Target, + uint64_t &Value, unsigned int &KsError) const; + + /// Check whether a fixup can be satisfied, or whether it needs to be relaxed + /// (increased in size, in order to hold its value correctly). + bool fixupNeedsRelaxation(const MCFixup &Fixup, const MCRelaxableFragment *DF, + const MCAsmLayout &Layout, unsigned &KsError) const; + + /// Check whether the given fragment needs relaxation. + bool fragmentNeedsRelaxation(const MCRelaxableFragment *IF, + const MCAsmLayout &Layout, unsigned &KsError) const; + + /// \brief Perform one layout iteration and return true if any offsets + /// were adjusted. + bool layoutOnce(MCAsmLayout &Layout); + + /// \brief Perform one layout iteration of the given section and return true + /// if any offsets were adjusted. + bool layoutSectionOnce(MCAsmLayout &Layout, MCSection &Sec); + + bool relaxInstruction(MCAsmLayout &Layout, MCRelaxableFragment &IF); + + bool relaxLEB(MCAsmLayout &Layout, MCLEBFragment &IF); + + bool relaxDwarfLineAddr(MCAsmLayout &Layout, MCDwarfLineAddrFragment &DF); + bool relaxDwarfCallFrameFragment(MCAsmLayout &Layout, + MCDwarfCallFrameFragment &DF); + + /// finishLayout - Finalize a layout, including fragment lowering. + void finishLayout(MCAsmLayout &Layout); + + std::pair handleFixup(const MCAsmLayout &Layout, + MCFragment &F, const MCFixup &Fixup, unsigned int &KsError); + +public: + /// Compute the effective fragment size assuming it is laid out at the given + /// \p SectionAddress and \p FragmentOffset. + uint64_t computeFragmentSize(const MCAsmLayout &Layout, + const MCFragment &F, bool &valid) const; + + /// Find the symbol which defines the atom containing the given symbol, or + /// null if there is no such symbol. + const MCSymbol *getAtom(const MCSymbol &S) const; + + /// Check whether a particular symbol is visible to the linker and is required + /// in the symbol table, or whether it can be discarded by the assembler. This + /// also effects whether the assembler treats the label as potentially + /// defining a separate atom. + bool isSymbolLinkerVisible(const MCSymbol &SD) const; + + /// Emit the section contents using the given object writer. + void writeSectionData(const MCSection *Section, + const MCAsmLayout &Layout) const; + + /// Check whether a given symbol has been flagged with .thumb_func. + bool isThumbFunc(const MCSymbol *Func) const; + + /// Flag a function symbol as the target of a .thumb_func directive. + void setIsThumbFunc(const MCSymbol *Func) { ThumbFuncs.insert(Func); } + + /// ELF e_header flags + unsigned getELFHeaderEFlags() const { return ELFHeaderEFlags; } + void setELFHeaderEFlags(unsigned Flags) { ELFHeaderEFlags = Flags; } + + /// MachO deployment target version information. + const VersionMinInfoType &getVersionMinInfo() const { return VersionMinInfo; } + void setVersionMinInfo(MCVersionMinType Kind, unsigned Major, unsigned Minor, + unsigned Update) { + VersionMinInfo.Kind = Kind; + VersionMinInfo.Major = Major; + VersionMinInfo.Minor = Minor; + VersionMinInfo.Update = Update; + } + +public: + /// Construct a new assembler instance. + // + // FIXME: How are we going to parameterize this? Two obvious options are stay + // concrete and require clients to pass in a target like object. The other + // option is to make this abstract, and have targets provide concrete + // implementations as we do with AsmParser. + MCAssembler(MCContext &Context_, MCAsmBackend &Backend_, + MCCodeEmitter &Emitter_, MCObjectWriter &Writer_); + ~MCAssembler(); + + /// Reuse an assembler instance + /// + void reset(); + + MCContext &getContext() const { return Context; } + + MCAsmBackend &getBackend() const { return Backend; } + + MCCodeEmitter &getEmitter() const { return Emitter; } + + MCObjectWriter &getWriter() const { return Writer; } + + MCDwarfLineTableParams getDWARFLinetableParams() const { return LTParams; } + void setDWARFLinetableParams(MCDwarfLineTableParams P) { LTParams = P; } + + /// Finish - Do final processing and write the object to the output stream. + /// \p Writer is used for custom object writer (as the MCJIT does), + /// if not specified it is automatically created from backend. + void Finish(unsigned int &KsError); + + // Layout all section and prepare them for emission. + void layout(MCAsmLayout &Layout, unsigned int &KsError); + + // FIXME: This does not belong here. + bool getSubsectionsViaSymbols() const { return SubsectionsViaSymbols; } + void setSubsectionsViaSymbols(bool Value) { SubsectionsViaSymbols = Value; } + + bool isIncrementalLinkerCompatible() const { + return IncrementalLinkerCompatible; + } + void setIncrementalLinkerCompatible(bool Value) { + IncrementalLinkerCompatible = Value; + } + + bool getRelaxAll() const { return RelaxAll; } + void setRelaxAll(bool Value) { RelaxAll = Value; } + + bool isBundlingEnabled() const { return BundleAlignSize != 0; } + + unsigned getBundleAlignSize() const { return BundleAlignSize; } + + void setBundleAlignSize(unsigned Size) { + assert((Size == 0 || !(Size & (Size - 1))) && + "Expect a power-of-two bundle align size"); + BundleAlignSize = Size; + } + + /// \name Section List Access + /// @{ + + iterator begin() { return Sections.begin(); } + const_iterator begin() const { return Sections.begin(); } + + iterator end() { return Sections.end(); } + const_iterator end() const { return Sections.end(); } + + size_t size() const { return Sections.size(); } + + /// @} + /// \name Symbol List Access + /// @{ + symbol_iterator symbol_begin() { return Symbols.begin(); } + const_symbol_iterator symbol_begin() const { return Symbols.begin(); } + + symbol_iterator symbol_end() { return Symbols.end(); } + const_symbol_iterator symbol_end() const { return Symbols.end(); } + + symbol_range symbols() { return make_range(symbol_begin(), symbol_end()); } + const_symbol_range symbols() const { + return make_range(symbol_begin(), symbol_end()); + } + + size_t symbol_size() const { return Symbols.size(); } + + /// @} + /// \name Indirect Symbol List Access + /// @{ + + // FIXME: This is a total hack, this should not be here. Once things are + // factored so that the streamer has direct access to the .o writer, it can + // disappear. + std::vector &getIndirectSymbols() { + return IndirectSymbols; + } + + indirect_symbol_iterator indirect_symbol_begin() { + return IndirectSymbols.begin(); + } + const_indirect_symbol_iterator indirect_symbol_begin() const { + return IndirectSymbols.begin(); + } + + indirect_symbol_iterator indirect_symbol_end() { + return IndirectSymbols.end(); + } + const_indirect_symbol_iterator indirect_symbol_end() const { + return IndirectSymbols.end(); + } + + size_t indirect_symbol_size() const { return IndirectSymbols.size(); } + + /// @} + /// \name Linker Option List Access + /// @{ + + std::vector> &getLinkerOptions() { + return LinkerOptions; + } + + /// @} + /// \name Data Region List Access + /// @{ + + // FIXME: This is a total hack, this should not be here. Once things are + // factored so that the streamer has direct access to the .o writer, it can + // disappear. + std::vector &getDataRegions() { return DataRegions; } + + data_region_iterator data_region_begin() { return DataRegions.begin(); } + const_data_region_iterator data_region_begin() const { + return DataRegions.begin(); + } + + data_region_iterator data_region_end() { return DataRegions.end(); } + const_data_region_iterator data_region_end() const { + return DataRegions.end(); + } + + size_t data_region_size() const { return DataRegions.size(); } + + /// @} + /// \name Data Region List Access + /// @{ + + // FIXME: This is a total hack, this should not be here. Once things are + // factored so that the streamer has direct access to the .o writer, it can + // disappear. + MCLOHContainer &getLOHContainer() { return LOHContainer; } + const MCLOHContainer &getLOHContainer() const { + return const_cast(this)->getLOHContainer(); + } + /// @} + /// \name Backend Data Access + /// @{ + + bool registerSection(MCSection &Section); + + void registerSymbol(const MCSymbol &Symbol, bool *Created = nullptr); + + ArrayRef getFileNames() { return FileNames; } + + void addFileName(StringRef FileName) { + if (std::find(FileNames.begin(), FileNames.end(), FileName) == + FileNames.end()) + FileNames.push_back(FileName); + } + + /// \brief Write the necessary bundle padding to the given object writer. + /// Expects a fragment \p F containing instructions and its size \p FSize. + void writeFragmentPadding(const MCFragment &F, uint64_t FSize, + MCObjectWriter *OW) const; + + /// @} + + void dump(); +}; + +/// \brief Compute the amount of padding required before the fragment \p F to +/// obey bundling restrictions, where \p FOffset is the fragment's offset in +/// its section and \p FSize is the fragment's size. +uint64_t computeBundlePadding(const MCAssembler &Assembler, const MCFragment *F, + uint64_t FOffset, uint64_t FSize); + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCCodeEmitter.h b/llvm/include/llvm/MC/MCCodeEmitter.h new file mode 100644 index 0000000..c16e43d --- /dev/null +++ b/llvm/include/llvm/MC/MCCodeEmitter.h @@ -0,0 +1,47 @@ +//===-- llvm/MC/MCCodeEmitter.h - Instruction Encoding ----------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCCODEEMITTER_H +#define LLVM_MC_MCCODEEMITTER_H + +#include "llvm/Support/Compiler.h" + +namespace llvm_ks { +class MCFixup; +class MCInst; +class MCSubtargetInfo; +class raw_ostream; +template class SmallVectorImpl; + +/// MCCodeEmitter - Generic instruction encoding interface. +class MCCodeEmitter { +private: + MCCodeEmitter(const MCCodeEmitter &) = delete; + void operator=(const MCCodeEmitter &) = delete; + +protected: // Can only create subclasses. + MCCodeEmitter(); + +public: + virtual ~MCCodeEmitter(); + + /// Lifetime management + virtual void reset() {} + + /// EncodeInstruction - Encode the given \p Inst to bytes on the output + /// stream \p OS. + virtual void encodeInstruction(MCInst &Inst, raw_ostream &OS, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI, + unsigned int &KsError) const = 0; +}; + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/MC/MCCodeView.h b/llvm/include/llvm/MC/MCCodeView.h new file mode 100644 index 0000000..bdc9701 --- /dev/null +++ b/llvm/include/llvm/MC/MCCodeView.h @@ -0,0 +1,184 @@ +//===- MCCodeView.h - Machine Code CodeView support -------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// Holds state from .cv_file and .cv_loc directives for later emission. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCCODEVIEW_H +#define LLVM_MC_MCCODEVIEW_H + +#include "llvm/ADT/StringRef.h" +#include "llvm/ADT/StringMap.h" +#include "llvm/MC/MCObjectStreamer.h" +#include "llvm/MC/MCFragment.h" +#include +#include + +namespace llvm_ks { +class MCContext; +class MCObjectStreamer; +class MCStreamer; + +/// \brief Instances of this class represent the information from a +/// .cv_loc directive. +class MCCVLoc { + uint32_t FunctionId; + uint32_t FileNum; + uint32_t Line; + uint16_t Column; + uint16_t PrologueEnd : 1; + uint16_t IsStmt : 1; + +private: // MCContext manages these + friend class MCContext; + MCCVLoc(unsigned functionid, unsigned fileNum, unsigned line, unsigned column, + bool prologueend, bool isstmt) + : FunctionId(functionid), FileNum(fileNum), Line(line), Column(column), + PrologueEnd(prologueend), IsStmt(isstmt) {} + + // Allow the default copy constructor and assignment operator to be used + // for an MCCVLoc object. + +public: + unsigned getFunctionId() const { return FunctionId; } + + /// \brief Get the FileNum of this MCCVLoc. + unsigned getFileNum() const { return FileNum; } + + /// \brief Get the Line of this MCCVLoc. + unsigned getLine() const { return Line; } + + /// \brief Get the Column of this MCCVLoc. + unsigned getColumn() const { return Column; } + + bool isPrologueEnd() const { return PrologueEnd; } + bool isStmt() const { return IsStmt; } + + void setFunctionId(unsigned FID) { FunctionId = FID; } + + /// \brief Set the FileNum of this MCCVLoc. + void setFileNum(unsigned fileNum) { FileNum = fileNum; } + + /// \brief Set the Line of this MCCVLoc. + void setLine(unsigned line) { Line = line; } + + /// \brief Set the Column of this MCCVLoc. + void setColumn(unsigned column) { + assert(column <= UINT16_MAX); + Column = column; + } + + void setPrologueEnd(bool PE) { PrologueEnd = PE; } + void setIsStmt(bool IS) { IsStmt = IS; } +}; + +/// \brief Instances of this class represent the line information for +/// the CodeView line table entries. Which is created after a machine +/// instruction is assembled and uses an address from a temporary label +/// created at the current address in the current section and the info from +/// the last .cv_loc directive seen as stored in the context. +class MCCVLineEntry : public MCCVLoc { + MCSymbol *Label; + +private: + // Allow the default copy constructor and assignment operator to be used + // for an MCCVLineEntry object. + +public: + // Constructor to create an MCCVLineEntry given a symbol and the dwarf loc. + MCCVLineEntry(MCSymbol *label, const MCCVLoc loc) + : MCCVLoc(loc), Label(label) {} + + MCSymbol *getLabel() const { return Label; } + + // This is called when an instruction is assembled into the specified + // section and if there is information from the last .cv_loc directive that + // has yet to have a line entry made for it is made. + static void Make(MCObjectStreamer *MCOS); +}; + +/// Holds state from .cv_file and .cv_loc directives for later emission. +class CodeViewContext { +public: + CodeViewContext(); + ~CodeViewContext(); + + bool isValidFileNumber(unsigned FileNumber) const; + bool addFile(unsigned FileNumber, StringRef Filename); + ArrayRef getFilenames() { return Filenames; } + + /// \brief Add a line entry. + void addLineEntry(const MCCVLineEntry &LineEntry) { + size_t Offset = MCCVLines.size(); + auto I = + MCCVLineStartStop.insert({LineEntry.getFunctionId(), {Offset, Offset}}); + if (!I.second) + I.first->second.second = Offset; + MCCVLines.push_back(LineEntry); + } + + std::vector getFunctionLineEntries(unsigned FuncId) { + std::vector FilteredLines; + + auto I = MCCVLineStartStop.find(FuncId); + if (I != MCCVLineStartStop.end()) + for (size_t Idx = I->second.first, End = I->second.second + 1; Idx != End; + ++Idx) + if (MCCVLines[Idx].getFunctionId() == FuncId) + FilteredLines.push_back(MCCVLines[Idx]); + return FilteredLines; + } + + /// Emits a line table substream. + void emitLineTableForFunction(MCObjectStreamer &OS, unsigned FuncId, + const MCSymbol *FuncBegin, + const MCSymbol *FuncEnd); + + void emitInlineLineTableForFunction(MCObjectStreamer &OS, + unsigned PrimaryFunctionId, + unsigned SourceFileId, + unsigned SourceLineNum, + ArrayRef SecondaryFunctionIds); + + /// Emits the string table substream. + void emitStringTable(MCObjectStreamer &OS); + + /// Emits the file checksum substream. + void emitFileChecksums(MCObjectStreamer &OS); + +private: + /// Map from string to string table offset. + StringMap StringTable; + + /// The fragment that ultimately holds our strings. + MCDataFragment *StrTabFragment = nullptr; + bool InsertedStrTabFragment = false; + + MCDataFragment *getStringTableFragment(); + + /// Add something to the string table. + StringRef addToStringTable(StringRef S); + + /// Get a string table offset. + unsigned getStringTableOffset(StringRef S); + + /// An array of absolute paths. Eventually this may include the file checksum. + SmallVector Filenames; + + /// The offset of the first and last .cv_loc directive for a given function + /// id. + std::map> MCCVLineStartStop; + + /// A collection of MCCVLineEntry for each section. + std::vector MCCVLines; +}; + +} // end namespace llvm_ks +#endif diff --git a/llvm/include/llvm/MC/MCContext.h b/llvm/include/llvm/MC/MCContext.h new file mode 100644 index 0000000..4c6d450 --- /dev/null +++ b/llvm/include/llvm/MC/MCContext.h @@ -0,0 +1,644 @@ +//===- MCContext.h - Machine Code Context -----------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCCONTEXT_H +#define LLVM_MC_MCCONTEXT_H + +#include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/SetVector.h" +#include "llvm/ADT/SmallString.h" +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/StringMap.h" +#include "llvm/ADT/Twine.h" +#include "llvm/MC/MCCodeView.h" +#include "llvm/MC/MCDwarf.h" +#include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/MC/SectionKind.h" +#include "llvm/Support/Allocator.h" +#include "llvm/Support/Compiler.h" +#include "llvm/Support/raw_ostream.h" +#include +#include +#include // FIXME: Shouldn't be needed. + +namespace llvm_ks { + class MCAsmInfo; + class MCExpr; + class MCSection; + class MCSymbol; + class MCSymbolELF; + class MCLabel; + struct MCDwarfFile; + class MCDwarfLoc; + class MCObjectFileInfo; + class MCRegisterInfo; + class MCLineSection; + class SMLoc; + class MCSectionMachO; + class MCSectionELF; + class MCSectionCOFF; + + /// Context object for machine code objects. This class owns all of the + /// sections that it creates. + /// + class MCContext { + MCContext(const MCContext &) = delete; + MCContext &operator=(const MCContext &) = delete; + + public: + typedef StringMap SymbolTable; + + private: + /// The SourceMgr for this object, if any. + const SourceMgr *SrcMgr; + + /// The MCAsmInfo for this target. + const MCAsmInfo *MAI; + + /// The MCRegisterInfo for this target. + const MCRegisterInfo *MRI; + + /// The MCObjectFileInfo for this target. + const MCObjectFileInfo *MOFI; + + /// Allocator object used for creating machine code objects. + /// + /// We use a bump pointer allocator to avoid the need to track all allocated + /// objects. + BumpPtrAllocator Allocator; + + SpecificBumpPtrAllocator COFFAllocator; + SpecificBumpPtrAllocator ELFAllocator; + SpecificBumpPtrAllocator MachOAllocator; + + /// Bindings of names to symbols. + SymbolTable Symbols; + + /// ELF sections can have a corresponding symbol. This maps one to the + /// other. + DenseMap SectionSymbols; + + /// A mapping from a local label number and an instance count to a symbol. + /// For example, in the assembly + /// 1: + /// 2: + /// 1: + /// We have three labels represented by the pairs (1, 0), (2, 0) and (1, 1) + DenseMap, MCSymbol *> LocalSymbols; + + /// Keeps tracks of names that were used both for used declared and + /// artificial symbols. + StringMap UsedNames; + + /// The next ID to dole out to an unnamed assembler temporary symbol with + /// a given prefix. + StringMap NextID; + + /// Instances of directional local labels. + DenseMap Instances; + /// NextInstance() creates the next instance of the directional local label + /// for the LocalLabelVal and adds it to the map if needed. + unsigned NextInstance(unsigned LocalLabelVal, bool &valid); + /// GetInstance() gets the current instance of the directional local label + /// for the LocalLabelVal and adds it to the map if needed. + unsigned GetInstance(unsigned LocalLabelVal, bool &valid); + + /// The file name of the log file from the environment variable + /// AS_SECURE_LOG_FILE. Which must be set before the .secure_log_unique + /// directive is used or it is an error. + char *SecureLogFile; + /// The stream that gets written to for the .secure_log_unique directive. + std::unique_ptr SecureLog; + /// Boolean toggled when .secure_log_unique / .secure_log_reset is seen to + /// catch errors if .secure_log_unique appears twice without + /// .secure_log_reset appearing between them. + bool SecureLogUsed; + + /// The compilation directory to use for DW_AT_comp_dir. + SmallString<128> CompilationDir; + + /// The main file name if passed in explicitly. + std::string MainFileName; + + /// The dwarf file and directory tables from the dwarf .file directive. + /// We now emit a line table for each compile unit. To reduce the prologue + /// size of each line table, the files and directories used by each compile + /// unit are separated. + std::map MCDwarfLineTablesCUMap; + + /// The current dwarf line information from the last dwarf .loc directive. + MCDwarfLoc CurrentDwarfLoc; + bool DwarfLocSeen; + + /// The current CodeView line information from the last .cv_loc directive. + MCCVLoc CurrentCVLoc = MCCVLoc(0, 0, 0, 0, false, true); + bool CVLocSeen = false; + + /// Generate dwarf debugging info for assembly source files. + bool GenDwarfForAssembly; + + /// The current dwarf file number when generate dwarf debugging info for + /// assembly source files. + unsigned GenDwarfFileNumber; + + /// Sections for generating the .debug_ranges and .debug_aranges sections. + SetVector SectionsForRanges; + + /// The information gathered from labels that will have dwarf label + /// entries when generating dwarf assembly source files. + std::vector MCGenDwarfLabelEntries; + + /// The string to embed in the debug information for the compile unit, if + /// non-empty. + StringRef DwarfDebugFlags; + + /// The string to embed in as the dwarf AT_producer for the compile unit, if + /// non-empty. + StringRef DwarfDebugProducer; + + /// The maximum version of dwarf that we should emit. + uint16_t DwarfVersion; + + /// Honor temporary labels, this is useful for debugging semantic + /// differences between temporary and non-temporary labels (primarily on + /// Darwin). + bool AllowTemporaryLabels; + bool UseNamesOnTempLabels = true; + + /// The Compile Unit ID that we are currently processing. + unsigned DwarfCompileUnitID; + + struct ELFSectionKey { + std::string SectionName; + StringRef GroupName; + unsigned UniqueID; + ELFSectionKey(StringRef SectionName, StringRef GroupName, + unsigned UniqueID) + : SectionName(SectionName), GroupName(GroupName), UniqueID(UniqueID) { + } + bool operator<(const ELFSectionKey &Other) const { + if (SectionName != Other.SectionName) + return SectionName < Other.SectionName; + if (GroupName != Other.GroupName) + return GroupName < Other.GroupName; + return UniqueID < Other.UniqueID; + } + }; + + struct COFFSectionKey { + std::string SectionName; + StringRef GroupName; + int SelectionKey; + COFFSectionKey(StringRef SectionName, StringRef GroupName, + int SelectionKey) + : SectionName(SectionName), GroupName(GroupName), + SelectionKey(SelectionKey) {} + bool operator<(const COFFSectionKey &Other) const { + if (SectionName != Other.SectionName) + return SectionName < Other.SectionName; + if (GroupName != Other.GroupName) + return GroupName < Other.GroupName; + return SelectionKey < Other.SelectionKey; + } + }; + + StringMap MachOUniquingMap; + std::map ELFUniquingMap; + std::map COFFUniquingMap; + StringMap ELFRelSecNames; + + SpecificBumpPtrAllocator MCSubtargetAllocator; + + /// Do automatic reset in destructor + bool AutoReset; + + bool HadError; + + uint64_t BaseAddress; + + MCSymbol *createSymbolImpl(const StringMapEntry *Name, + bool CanBeUnnamed); + MCSymbol *createSymbol(StringRef Name, bool AlwaysAddSuffix, + bool IsTemporary); + + MCSymbol *getOrCreateDirectionalLocalSymbol(unsigned LocalLabelVal, + unsigned Instance); + + public: + explicit MCContext(const MCAsmInfo *MAI, const MCRegisterInfo *MRI, + const MCObjectFileInfo *MOFI, + const SourceMgr *Mgr = nullptr, bool DoAutoReset = true, + uint64_t BaseAddress = 0); + ~MCContext(); + + const SourceMgr *getSourceManager() const { return SrcMgr; } + + const MCAsmInfo *getAsmInfo() const { return MAI; } + + const MCRegisterInfo *getRegisterInfo() const { return MRI; } + + const MCObjectFileInfo *getObjectFileInfo() const { return MOFI; } + + void setAllowTemporaryLabels(bool Value) { AllowTemporaryLabels = Value; } + void setUseNamesOnTempLabels(bool Value) { UseNamesOnTempLabels = Value; } + + uint64_t getBaseAddress() { return BaseAddress; } + + /// \name Module Lifetime Management + /// @{ + + /// reset - return object to right after construction state to prepare + /// to process a new module + void reset(); + + /// @} + + /// \name Symbol Management + /// @{ + + /// Create and return a new linker temporary symbol with a unique but + /// unspecified name. + MCSymbol *createLinkerPrivateTempSymbol(); + + /// Create and return a new assembler temporary symbol with a unique but + /// unspecified name. + MCSymbol *createTempSymbol(bool CanBeUnnamed = true); + + MCSymbol *createTempSymbol(const Twine &Name, bool AlwaysAddSuffix, + bool CanBeUnnamed = true); + + /// Create the definition of a directional local symbol for numbered label + /// (used for "1:" definitions). + MCSymbol *createDirectionalLocalSymbol(unsigned LocalLabelVal, bool &valid); + + /// Create and return a directional local symbol for numbered label (used + /// for "1b" or 1f" references). + MCSymbol *getDirectionalLocalSymbol(unsigned LocalLabelVal, bool Before, bool &valid); + + /// Lookup the symbol inside with the specified \p Name. If it exists, + /// return it. If not, create a forward reference and return it. + /// + /// \param Name - The symbol name, which must be unique across all symbols. + MCSymbol *getOrCreateSymbol(const Twine &Name); + + MCSymbolELF *getOrCreateSectionSymbol(const MCSectionELF &Section); + + /// Gets a symbol that will be defined to the final stack offset of a local + /// variable after codegen. + /// + /// \param Idx - The index of a local variable passed to @llvm.localescape. + MCSymbol *getOrCreateFrameAllocSymbol(StringRef FuncName, unsigned Idx); + + MCSymbol *getOrCreateParentFrameOffsetSymbol(StringRef FuncName); + + MCSymbol *getOrCreateLSDASymbol(StringRef FuncName); + + /// Get the symbol for \p Name, or null. + MCSymbol *lookupSymbol(const Twine &Name) const; + + /// getSymbols - Get a reference for the symbol table for clients that + /// want to, for example, iterate over all symbols. 'const' because we + /// still want any modifications to the table itself to use the MCContext + /// APIs. + const SymbolTable &getSymbols() const { return Symbols; } + + /// @} + + /// \name Section Management + /// @{ + + /// Return the MCSection for the specified mach-o section. This requires + /// the operands to be valid. + MCSectionMachO *getMachOSection(StringRef Segment, StringRef Section, + unsigned TypeAndAttributes, + unsigned Reserved2, SectionKind K, + const char *BeginSymName = nullptr); + + MCSectionMachO *getMachOSection(StringRef Segment, StringRef Section, + unsigned TypeAndAttributes, SectionKind K, + const char *BeginSymName = nullptr) { + return getMachOSection(Segment, Section, TypeAndAttributes, 0, K, + BeginSymName); + } + + MCSectionELF *getELFSection(StringRef Section, unsigned Type, + unsigned Flags) { + return getELFSection(Section, Type, Flags, nullptr); + } + + MCSectionELF *getELFSection(StringRef Section, unsigned Type, + unsigned Flags, const char *BeginSymName) { + return getELFSection(Section, Type, Flags, 0, "", BeginSymName); + } + + MCSectionELF *getELFSection(StringRef Section, unsigned Type, + unsigned Flags, unsigned EntrySize, + StringRef Group) { + return getELFSection(Section, Type, Flags, EntrySize, Group, nullptr); + } + + MCSectionELF *getELFSection(StringRef Section, unsigned Type, + unsigned Flags, unsigned EntrySize, + StringRef Group, const char *BeginSymName) { + return getELFSection(Section, Type, Flags, EntrySize, Group, ~0, + BeginSymName); + } + + MCSectionELF *getELFSection(StringRef Section, unsigned Type, + unsigned Flags, unsigned EntrySize, + StringRef Group, unsigned UniqueID) { + return getELFSection(Section, Type, Flags, EntrySize, Group, UniqueID, + nullptr); + } + + MCSectionELF *getELFSection(StringRef Section, unsigned Type, + unsigned Flags, unsigned EntrySize, + StringRef Group, unsigned UniqueID, + const char *BeginSymName); + + MCSectionELF *getELFSection(StringRef Section, unsigned Type, + unsigned Flags, unsigned EntrySize, + const MCSymbolELF *Group, unsigned UniqueID, + const char *BeginSymName, + const MCSectionELF *Associated); + + MCSectionELF *createELFRelSection(StringRef Name, unsigned Type, + unsigned Flags, unsigned EntrySize, + const MCSymbolELF *Group, + const MCSectionELF *Associated); + + void renameELFSection(MCSectionELF *Section, StringRef Name); + + MCSectionELF *createELFGroupSection(const MCSymbolELF *Group); + + MCSectionCOFF *getCOFFSection(StringRef Section, unsigned Characteristics, + SectionKind Kind, StringRef COMDATSymName, + int Selection, + const char *BeginSymName = nullptr); + + MCSectionCOFF *getCOFFSection(StringRef Section, unsigned Characteristics, + SectionKind Kind, + const char *BeginSymName = nullptr); + + MCSectionCOFF *getCOFFSection(StringRef Section); + + /// Gets or creates a section equivalent to Sec that is associated with the + /// section containing KeySym. For example, to create a debug info section + /// associated with an inline function, pass the normal debug info section + /// as Sec and the function symbol as KeySym. + MCSectionCOFF *getAssociativeCOFFSection(MCSectionCOFF *Sec, + const MCSymbol *KeySym); + + // Create and save a copy of STI and return a reference to the copy. + MCSubtargetInfo &getSubtargetCopy(const MCSubtargetInfo &STI); + + /// @} + + /// \name Dwarf Management + /// @{ + + /// \brief Get the compilation directory for DW_AT_comp_dir + /// This can be overridden by clients which want to control the reported + /// compilation directory and have it be something other than the current + /// working directory. + /// Returns an empty string if the current directory cannot be determined. + StringRef getCompilationDir() const { return CompilationDir; } + + /// \brief Set the compilation directory for DW_AT_comp_dir + /// Override the default (CWD) compilation directory. + void setCompilationDir(StringRef S) { CompilationDir = S.str(); } + + /// \brief Get the main file name for use in error messages and debug + /// info. This can be set to ensure we've got the correct file name + /// after preprocessing or for -save-temps. + const std::string &getMainFileName() const { return MainFileName; } + + /// \brief Set the main file name and override the default. + void setMainFileName(StringRef S) { MainFileName = S; } + + /// Creates an entry in the dwarf file and directory tables. + unsigned getDwarfFile(StringRef Directory, StringRef FileName, + unsigned FileNumber, unsigned CUID); + + bool isValidDwarfFileNumber(unsigned FileNumber, unsigned CUID = 0); + + const std::map &getMCDwarfLineTables() const { + return MCDwarfLineTablesCUMap; + } + + MCDwarfLineTable &getMCDwarfLineTable(unsigned CUID) { + return MCDwarfLineTablesCUMap[CUID]; + } + + const MCDwarfLineTable &getMCDwarfLineTable(unsigned CUID) const { + auto I = MCDwarfLineTablesCUMap.find(CUID); + assert(I != MCDwarfLineTablesCUMap.end()); + return I->second; + } + + const SmallVectorImpl &getMCDwarfFiles(unsigned CUID = 0) { + return getMCDwarfLineTable(CUID).getMCDwarfFiles(); + } + const SmallVectorImpl &getMCDwarfDirs(unsigned CUID = 0) { + return getMCDwarfLineTable(CUID).getMCDwarfDirs(); + } + + bool hasMCLineSections() const { + for (const auto &Table : MCDwarfLineTablesCUMap) + if (!Table.second.getMCDwarfFiles().empty() || Table.second.getLabel()) + return true; + return false; + } + unsigned getDwarfCompileUnitID() { return DwarfCompileUnitID; } + void setDwarfCompileUnitID(unsigned CUIndex) { + DwarfCompileUnitID = CUIndex; + } + void setMCLineTableCompilationDir(unsigned CUID, StringRef CompilationDir) { + getMCDwarfLineTable(CUID).setCompilationDir(CompilationDir); + } + + /// Saves the information from the currently parsed dwarf .loc directive + /// and sets DwarfLocSeen. When the next instruction is assembled an entry + /// in the line number table with this information and the address of the + /// instruction will be created. + void setCurrentDwarfLoc(unsigned FileNum, unsigned Line, unsigned Column, + unsigned Flags, unsigned Isa, + unsigned Discriminator) { + CurrentDwarfLoc.setFileNum(FileNum); + CurrentDwarfLoc.setLine(Line); + CurrentDwarfLoc.setColumn(Column); + CurrentDwarfLoc.setFlags(Flags); + CurrentDwarfLoc.setIsa(Isa); + CurrentDwarfLoc.setDiscriminator(Discriminator); + DwarfLocSeen = true; + } + void clearDwarfLocSeen() { DwarfLocSeen = false; } + + bool getDwarfLocSeen() { return DwarfLocSeen; } + const MCDwarfLoc &getCurrentDwarfLoc() { return CurrentDwarfLoc; } + + bool getGenDwarfForAssembly() { return GenDwarfForAssembly; } + void setGenDwarfForAssembly(bool Value) { GenDwarfForAssembly = Value; } + unsigned getGenDwarfFileNumber() { return GenDwarfFileNumber; } + void setGenDwarfFileNumber(unsigned FileNumber) { + GenDwarfFileNumber = FileNumber; + } + const SetVector &getGenDwarfSectionSyms() { + return SectionsForRanges; + } + bool addGenDwarfSection(MCSection *Sec) { + return SectionsForRanges.insert(Sec); + } + + void finalizeDwarfSections(MCStreamer &MCOS); + const std::vector &getMCGenDwarfLabelEntries() const { + return MCGenDwarfLabelEntries; + } + void addMCGenDwarfLabelEntry(const MCGenDwarfLabelEntry &E) { + MCGenDwarfLabelEntries.push_back(E); + } + + void setDwarfDebugFlags(StringRef S) { DwarfDebugFlags = S; } + StringRef getDwarfDebugFlags() { return DwarfDebugFlags; } + + void setDwarfDebugProducer(StringRef S) { DwarfDebugProducer = S; } + StringRef getDwarfDebugProducer() { return DwarfDebugProducer; } + + void setDwarfVersion(uint16_t v) { DwarfVersion = v; } + uint16_t getDwarfVersion() const { return DwarfVersion; } + + /// @} + + + /// \name CodeView Management + /// @{ + + /// Creates an entry in the cv file table. + unsigned getCVFile(StringRef FileName, unsigned FileNumber); + + /// Saves the information from the currently parsed .cv_loc directive + /// and sets CVLocSeen. When the next instruction is assembled an entry + /// in the line number table with this information and the address of the + /// instruction will be created. + void setCurrentCVLoc(unsigned FunctionId, unsigned FileNo, unsigned Line, + unsigned Column, bool PrologueEnd, bool IsStmt) { + CurrentCVLoc.setFunctionId(FunctionId); + CurrentCVLoc.setFileNum(FileNo); + CurrentCVLoc.setLine(Line); + CurrentCVLoc.setColumn(Column); + CurrentCVLoc.setPrologueEnd(PrologueEnd); + CurrentCVLoc.setIsStmt(IsStmt); + CVLocSeen = true; + } + void clearCVLocSeen() { CVLocSeen = false; } + + bool getCVLocSeen() { return CVLocSeen; } + const MCCVLoc &getCurrentCVLoc() { return CurrentCVLoc; } + + bool isValidCVFileNumber(unsigned FileNumber); + /// @} + + char *getSecureLogFile() { return SecureLogFile; } + raw_fd_ostream *getSecureLog() { return SecureLog.get(); } + bool getSecureLogUsed() { return SecureLogUsed; } + void setSecureLog(std::unique_ptr Value) { + SecureLog = std::move(Value); + } + void setSecureLogUsed(bool Value) { SecureLogUsed = Value; } + + void *allocate(unsigned Size, unsigned Align = 8) { + return Allocator.Allocate(Size, Align); + } + void deallocate(void *Ptr) {} + + bool hadError() { return HadError; } + void reportError(SMLoc L, const Twine &Msg); + // Unrecoverable error has occurred. Display the best diagnostic we can + // and bail via exit(1). For now, most MC backend errors are unrecoverable. + // FIXME: We should really do something about that. + LLVM_ATTRIBUTE_NORETURN void reportFatalError(SMLoc L, + const Twine &Msg); + }; + +} // end namespace llvm_ks + +// operator new and delete aren't allowed inside namespaces. +// The throw specifications are mandated by the standard. +/// \brief Placement new for using the MCContext's allocator. +/// +/// This placement form of operator new uses the MCContext's allocator for +/// obtaining memory. It is a non-throwing new, which means that it returns +/// null on error. (If that is what the allocator does. The current does, so if +/// this ever changes, this operator will have to be changed, too.) +/// Usage looks like this (assuming there's an MCContext 'Context' in scope): +/// \code +/// // Default alignment (8) +/// IntegerLiteral *Ex = new (Context) IntegerLiteral(arguments); +/// // Specific alignment +/// IntegerLiteral *Ex2 = new (Context, 4) IntegerLiteral(arguments); +/// \endcode +/// Please note that you cannot use delete on the pointer; it must be +/// deallocated using an explicit destructor call followed by +/// \c Context.Deallocate(Ptr). +/// +/// \param Bytes The number of bytes to allocate. Calculated by the compiler. +/// \param C The MCContext that provides the allocator. +/// \param Alignment The alignment of the allocated memory (if the underlying +/// allocator supports it). +/// \return The allocated memory. Could be NULL. +inline void *operator new(size_t Bytes, llvm_ks::MCContext &C, + size_t Alignment = 8) LLVM_NOEXCEPT { + return C.allocate(Bytes, Alignment); +} +/// \brief Placement delete companion to the new above. +/// +/// This operator is just a companion to the new above. There is no way of +/// invoking it directly; see the new operator for more details. This operator +/// is called implicitly by the compiler if a placement new expression using +/// the MCContext throws in the object constructor. +inline void operator delete(void *Ptr, llvm_ks::MCContext &C, + size_t) LLVM_NOEXCEPT { + C.deallocate(Ptr); +} + +/// This placement form of operator new[] uses the MCContext's allocator for +/// obtaining memory. It is a non-throwing new[], which means that it returns +/// null on error. +/// Usage looks like this (assuming there's an MCContext 'Context' in scope): +/// \code +/// // Default alignment (8) +/// char *data = new (Context) char[10]; +/// // Specific alignment +/// char *data = new (Context, 4) char[10]; +/// \endcode +/// Please note that you cannot use delete on the pointer; it must be +/// deallocated using an explicit destructor call followed by +/// \c Context.Deallocate(Ptr). +/// +/// \param Bytes The number of bytes to allocate. Calculated by the compiler. +/// \param C The MCContext that provides the allocator. +/// \param Alignment The alignment of the allocated memory (if the underlying +/// allocator supports it). +/// \return The allocated memory. Could be NULL. +inline void *operator new[](size_t Bytes, llvm_ks::MCContext &C, + size_t Alignment = 8) LLVM_NOEXCEPT { + return C.allocate(Bytes, Alignment); +} + +/// \brief Placement delete[] companion to the new[] above. +/// +/// This operator is just a companion to the new[] above. There is no way of +/// invoking it directly; see the new[] operator for more details. This operator +/// is called implicitly by the compiler if a placement new[] expression using +/// the MCContext throws in the object constructor. +inline void operator delete[](void *Ptr, llvm_ks::MCContext &C) LLVM_NOEXCEPT { + C.deallocate(Ptr); +} + +#endif diff --git a/llvm/include/llvm/MC/MCDirectives.h b/llvm/include/llvm/MC/MCDirectives.h new file mode 100644 index 0000000..2cd7b26 --- /dev/null +++ b/llvm/include/llvm/MC/MCDirectives.h @@ -0,0 +1,72 @@ +//===- MCDirectives.h - Enums for directives on various targets -*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines various enums that represent target-specific directives. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCDIRECTIVES_H +#define LLVM_MC_MCDIRECTIVES_H + +namespace llvm_ks { + +enum MCSymbolAttr { + MCSA_Invalid = 0, ///< Not a valid directive. + + // Various directives in alphabetical order. + MCSA_ELF_TypeFunction, ///< .type _foo, STT_FUNC # aka @function + MCSA_ELF_TypeIndFunction, ///< .type _foo, STT_GNU_IFUNC + MCSA_ELF_TypeObject, ///< .type _foo, STT_OBJECT # aka @object + MCSA_ELF_TypeTLS, ///< .type _foo, STT_TLS # aka @tls_object + MCSA_ELF_TypeCommon, ///< .type _foo, STT_COMMON # aka @common + MCSA_ELF_TypeNoType, ///< .type _foo, STT_NOTYPE # aka @notype + MCSA_ELF_TypeGnuUniqueObject, /// .type _foo, @gnu_unique_object + MCSA_Global, ///< .globl + MCSA_Hidden, ///< .hidden (ELF) + MCSA_IndirectSymbol, ///< .indirect_symbol (MachO) + MCSA_Internal, ///< .internal (ELF) + MCSA_LazyReference, ///< .lazy_reference (MachO) + MCSA_Local, ///< .local (ELF) + MCSA_NoDeadStrip, ///< .no_dead_strip (MachO) + MCSA_SymbolResolver, ///< .symbol_resolver (MachO) + MCSA_PrivateExtern, ///< .private_extern (MachO) + MCSA_Protected, ///< .protected (ELF) + MCSA_Reference, ///< .reference (MachO) + MCSA_Weak, ///< .weak + MCSA_WeakDefinition, ///< .weak_definition (MachO) + MCSA_WeakReference, ///< .weak_reference (MachO) + MCSA_WeakDefAutoPrivate ///< .weak_def_can_be_hidden (MachO) +}; + +enum MCAssemblerFlag { + MCAF_SyntaxUnified, ///< .syntax (ARM/ELF) + MCAF_SubsectionsViaSymbols, ///< .subsections_via_symbols (MachO) + MCAF_Code16, ///< .code16 (X86) / .code 16 (ARM) + MCAF_Code32, ///< .code32 (X86) / .code 32 (ARM) + MCAF_Code64 ///< .code64 (X86) +}; + +enum MCDataRegionType { + MCDR_DataRegion, ///< .data_region + MCDR_DataRegionJT8, ///< .data_region jt8 + MCDR_DataRegionJT16, ///< .data_region jt16 + MCDR_DataRegionJT32, ///< .data_region jt32 + MCDR_DataRegionEnd ///< .end_data_region +}; + +enum MCVersionMinType { + MCVM_IOSVersionMin, ///< .ios_version_min + MCVM_OSXVersionMin, ///< .macosx_version_min + MCVM_TvOSVersionMin, ///< .tvos_version_min + MCVM_WatchOSVersionMin, ///< .watchos_version_min +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCDwarf.h b/llvm/include/llvm/MC/MCDwarf.h new file mode 100644 index 0000000..1bb77da --- /dev/null +++ b/llvm/include/llvm/MC/MCDwarf.h @@ -0,0 +1,523 @@ +//===- MCDwarf.h - Machine Code Dwarf support -------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains the declaration of the MCDwarfFile to support the dwarf +// .file directive and the .loc directive. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCDWARF_H +#define LLVM_MC_MCDWARF_H + +#include "llvm/ADT/ArrayRef.h" +#include "llvm/ADT/MapVector.h" +#include "llvm/ADT/StringMap.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/MC/MCSection.h" +#include "llvm/Support/Compiler.h" +#include "llvm/Support/Dwarf.h" +#include "llvm/Support/raw_ostream.h" +#include +#include +#include +#include + +namespace llvm_ks { +class MCAsmBackend; +class MCContext; +class MCObjectStreamer; +class MCStreamer; +class MCSymbol; +class SourceMgr; +class SMLoc; + +/// \brief Instances of this class represent the name of the dwarf +/// .file directive and its associated dwarf file number in the MC file, +/// and MCDwarfFile's are created and uniqued by the MCContext class where +/// the file number for each is its index into the vector of DwarfFiles (note +/// index 0 is not used and not a valid dwarf file number). +struct MCDwarfFile { + // \brief The base name of the file without its directory path. + // The StringRef references memory allocated in the MCContext. + std::string Name; + + // \brief The index into the list of directory names for this file name. + unsigned DirIndex; +}; + +/// \brief Instances of this class represent the information from a +/// dwarf .loc directive. +class MCDwarfLoc { + uint32_t FileNum; + uint32_t Line; + uint16_t Column; + // Flags (see #define's below) + uint8_t Flags; + uint8_t Isa; + uint32_t Discriminator; + +// Flag that indicates the initial value of the is_stmt_start flag. +#define DWARF2_LINE_DEFAULT_IS_STMT 1 + +#define DWARF2_FLAG_IS_STMT (1 << 0) +#define DWARF2_FLAG_BASIC_BLOCK (1 << 1) +#define DWARF2_FLAG_PROLOGUE_END (1 << 2) +#define DWARF2_FLAG_EPILOGUE_BEGIN (1 << 3) + +private: // MCContext manages these + friend class MCContext; + friend class MCDwarfLineEntry; + MCDwarfLoc(unsigned fileNum, unsigned line, unsigned column, unsigned flags, + unsigned isa, unsigned discriminator) + : FileNum(fileNum), Line(line), Column(column), Flags(flags), Isa(isa), + Discriminator(discriminator) {} + + // Allow the default copy constructor and assignment operator to be used + // for an MCDwarfLoc object. + +public: + /// \brief Get the FileNum of this MCDwarfLoc. + unsigned getFileNum() const { return FileNum; } + + /// \brief Get the Line of this MCDwarfLoc. + unsigned getLine() const { return Line; } + + /// \brief Get the Column of this MCDwarfLoc. + unsigned getColumn() const { return Column; } + + /// \brief Get the Flags of this MCDwarfLoc. + unsigned getFlags() const { return Flags; } + + /// \brief Get the Isa of this MCDwarfLoc. + unsigned getIsa() const { return Isa; } + + /// \brief Get the Discriminator of this MCDwarfLoc. + unsigned getDiscriminator() const { return Discriminator; } + + /// \brief Set the FileNum of this MCDwarfLoc. + void setFileNum(unsigned fileNum) { FileNum = fileNum; } + + /// \brief Set the Line of this MCDwarfLoc. + void setLine(unsigned line) { Line = line; } + + /// \brief Set the Column of this MCDwarfLoc. + void setColumn(unsigned column) { + assert(column <= UINT16_MAX); + Column = column; + } + + /// \brief Set the Flags of this MCDwarfLoc. + void setFlags(unsigned flags) { + assert(flags <= UINT8_MAX); + Flags = flags; + } + + /// \brief Set the Isa of this MCDwarfLoc. + void setIsa(unsigned isa) { + assert(isa <= UINT8_MAX); + Isa = isa; + } + + /// \brief Set the Discriminator of this MCDwarfLoc. + void setDiscriminator(unsigned discriminator) { + Discriminator = discriminator; + } +}; + +/// \brief Instances of this class represent the line information for +/// the dwarf line table entries. Which is created after a machine +/// instruction is assembled and uses an address from a temporary label +/// created at the current address in the current section and the info from +/// the last .loc directive seen as stored in the context. +class MCDwarfLineEntry : public MCDwarfLoc { + MCSymbol *Label; + +private: + // Allow the default copy constructor and assignment operator to be used + // for an MCDwarfLineEntry object. + +public: + // Constructor to create an MCDwarfLineEntry given a symbol and the dwarf loc. + MCDwarfLineEntry(MCSymbol *label, const MCDwarfLoc loc) + : MCDwarfLoc(loc), Label(label) {} + + MCSymbol *getLabel() const { return Label; } + + // This is called when an instruction is assembled into the specified + // section and if there is information from the last .loc directive that + // has yet to have a line entry made for it is made. + static void Make(MCObjectStreamer *MCOS, MCSection *Section); +}; + +/// \brief Instances of this class represent the line information for a compile +/// unit where machine instructions have been assembled after seeing .loc +/// directives. This is the information used to build the dwarf line +/// table for a section. +class MCLineSection { +public: + // \brief Add an entry to this MCLineSection's line entries. + void addLineEntry(const MCDwarfLineEntry &LineEntry, MCSection *Sec) { + MCLineDivisions[Sec].push_back(LineEntry); + } + + typedef std::vector MCDwarfLineEntryCollection; + typedef MCDwarfLineEntryCollection::iterator iterator; + typedef MCDwarfLineEntryCollection::const_iterator const_iterator; + typedef MapVector MCLineDivisionMap; + +private: + // A collection of MCDwarfLineEntry for each section. + MCLineDivisionMap MCLineDivisions; + +public: + // Returns the collection of MCDwarfLineEntry for a given Compile Unit ID. + const MCLineDivisionMap &getMCLineEntries() const { + return MCLineDivisions; + } +}; + +struct MCDwarfLineTableParams { + /// First special line opcode - leave room for the standard opcodes. + /// Note: If you want to change this, you'll have to update the + /// "StandardOpcodeLengths" table that is emitted in + /// \c Emit(). + uint8_t DWARF2LineOpcodeBase = 13; + /// Minimum line offset in a special line info. opcode. The value + /// -5 was chosen to give a reasonable range of values. + int8_t DWARF2LineBase = -5; + /// Range of line offsets in a special line info. opcode. + uint8_t DWARF2LineRange = 14; +}; + +struct MCDwarfLineTableHeader { + MCSymbol *Label; + SmallVector MCDwarfDirs; + SmallVector MCDwarfFiles; + StringMap SourceIdMap; + StringRef CompilationDir; + + MCDwarfLineTableHeader() : Label(nullptr) {} + unsigned getFile(StringRef &Directory, StringRef &FileName, + unsigned FileNumber = 0); + std::pair Emit(MCStreamer *MCOS, + MCDwarfLineTableParams Params) const; + std::pair + Emit(MCStreamer *MCOS, MCDwarfLineTableParams Params, + ArrayRef SpecialOpcodeLengths) const; +}; + +class MCDwarfDwoLineTable { + MCDwarfLineTableHeader Header; +public: + void setCompilationDir(StringRef CompilationDir) { + Header.CompilationDir = CompilationDir; + } + unsigned getFile(StringRef Directory, StringRef FileName) { + return Header.getFile(Directory, FileName); + } + void Emit(MCStreamer &MCOS, MCDwarfLineTableParams Params) const; +}; + +class MCDwarfLineTable { + MCDwarfLineTableHeader Header; + MCLineSection MCLineSections; + +public: + // This emits the Dwarf file and the line tables for all Compile Units. + static void Emit(MCObjectStreamer *MCOS, MCDwarfLineTableParams Params); + + // This emits the Dwarf file and the line tables for a given Compile Unit. + void EmitCU(MCObjectStreamer *MCOS, MCDwarfLineTableParams Params) const; + + unsigned getFile(StringRef &Directory, StringRef &FileName, + unsigned FileNumber = 0); + + MCSymbol *getLabel() const { + return Header.Label; + } + + void setLabel(MCSymbol *Label) { + Header.Label = Label; + } + + void setCompilationDir(StringRef CompilationDir) { + Header.CompilationDir = CompilationDir; + } + + const SmallVectorImpl &getMCDwarfDirs() const { + return Header.MCDwarfDirs; + } + + SmallVectorImpl &getMCDwarfDirs() { + return Header.MCDwarfDirs; + } + + const SmallVectorImpl &getMCDwarfFiles() const { + return Header.MCDwarfFiles; + } + + SmallVectorImpl &getMCDwarfFiles() { + return Header.MCDwarfFiles; + } + + const MCLineSection &getMCLineSections() const { + return MCLineSections; + } + MCLineSection &getMCLineSections() { + return MCLineSections; + } +}; + +class MCDwarfLineAddr { +public: + /// Utility function to encode a Dwarf pair of LineDelta and AddrDeltas. + static void Encode(MCContext &Context, MCDwarfLineTableParams Params, + int64_t LineDelta, uint64_t AddrDelta, raw_ostream &OS); + + /// Utility function to emit the encoding to a streamer. + static void Emit(MCStreamer *MCOS, MCDwarfLineTableParams Params, + int64_t LineDelta, uint64_t AddrDelta); +}; + +class MCGenDwarfInfo { +public: + // + // When generating dwarf for assembly source files this emits the Dwarf + // sections. + // + static void Emit(MCStreamer *MCOS); +}; + +// When generating dwarf for assembly source files this is the info that is +// needed to be gathered for each symbol that will have a dwarf label. +class MCGenDwarfLabelEntry { +private: + // Name of the symbol without a leading underbar, if any. + StringRef Name; + // The dwarf file number this symbol is in. + unsigned FileNumber; + // The line number this symbol is at. + unsigned LineNumber; + // The low_pc for the dwarf label is taken from this symbol. + MCSymbol *Label; + +public: + MCGenDwarfLabelEntry(StringRef name, unsigned fileNumber, unsigned lineNumber, + MCSymbol *label) + : Name(name), FileNumber(fileNumber), LineNumber(lineNumber), + Label(label) {} + + StringRef getName() const { return Name; } + unsigned getFileNumber() const { return FileNumber; } + unsigned getLineNumber() const { return LineNumber; } + MCSymbol *getLabel() const { return Label; } + + // This is called when label is created when we are generating dwarf for + // assembly source files. + static void Make(MCSymbol *Symbol, MCStreamer *MCOS, SourceMgr &SrcMgr, + SMLoc &Loc); +}; + +class MCCFIInstruction { +public: + enum OpType { + OpSameValue, + OpRememberState, + OpRestoreState, + OpOffset, + OpDefCfaRegister, + OpDefCfaOffset, + OpDefCfa, + OpRelOffset, + OpAdjustCfaOffset, + OpEscape, + OpRestore, + OpUndefined, + OpRegister, + OpWindowSave, + OpGnuArgsSize + }; + +private: + OpType Operation; + MCSymbol *Label; + unsigned Register; + union { + int Offset; + unsigned Register2; + }; + std::vector Values; + + MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R, int O, StringRef V) + : Operation(Op), Label(L), Register(R), Offset(O), + Values(V.begin(), V.end()) { + assert(Op != OpRegister); + } + + MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R1, unsigned R2) + : Operation(Op), Label(L), Register(R1), Register2(R2) { + assert(Op == OpRegister); + } + +public: + /// \brief .cfi_def_cfa defines a rule for computing CFA as: take address from + /// Register and add Offset to it. + static MCCFIInstruction createDefCfa(MCSymbol *L, unsigned Register, + int Offset) { + return MCCFIInstruction(OpDefCfa, L, Register, -Offset, ""); + } + + /// \brief .cfi_def_cfa_register modifies a rule for computing CFA. From now + /// on Register will be used instead of the old one. Offset remains the same. + static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register) { + return MCCFIInstruction(OpDefCfaRegister, L, Register, 0, ""); + } + + /// \brief .cfi_def_cfa_offset modifies a rule for computing CFA. Register + /// remains the same, but offset is new. Note that it is the absolute offset + /// that will be added to a defined register to the compute CFA address. + static MCCFIInstruction createDefCfaOffset(MCSymbol *L, int Offset) { + return MCCFIInstruction(OpDefCfaOffset, L, 0, -Offset, ""); + } + + /// \brief .cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but + /// Offset is a relative value that is added/subtracted from the previous + /// offset. + static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int Adjustment) { + return MCCFIInstruction(OpAdjustCfaOffset, L, 0, Adjustment, ""); + } + + /// \brief .cfi_offset Previous value of Register is saved at offset Offset + /// from CFA. + static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, + int Offset) { + return MCCFIInstruction(OpOffset, L, Register, Offset, ""); + } + + /// \brief .cfi_rel_offset Previous value of Register is saved at offset + /// Offset from the current CFA register. This is transformed to .cfi_offset + /// using the known displacement of the CFA register from the CFA. + static MCCFIInstruction createRelOffset(MCSymbol *L, unsigned Register, + int Offset) { + return MCCFIInstruction(OpRelOffset, L, Register, Offset, ""); + } + + /// \brief .cfi_register Previous value of Register1 is saved in + /// register Register2. + static MCCFIInstruction createRegister(MCSymbol *L, unsigned Register1, + unsigned Register2) { + return MCCFIInstruction(OpRegister, L, Register1, Register2); + } + + /// \brief .cfi_window_save SPARC register window is saved. + static MCCFIInstruction createWindowSave(MCSymbol *L) { + return MCCFIInstruction(OpWindowSave, L, 0, 0, ""); + } + + /// \brief .cfi_restore says that the rule for Register is now the same as it + /// was at the beginning of the function, after all initial instructions added + /// by .cfi_startproc were executed. + static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register) { + return MCCFIInstruction(OpRestore, L, Register, 0, ""); + } + + /// \brief .cfi_undefined From now on the previous value of Register can't be + /// restored anymore. + static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register) { + return MCCFIInstruction(OpUndefined, L, Register, 0, ""); + } + + /// \brief .cfi_same_value Current value of Register is the same as in the + /// previous frame. I.e., no restoration is needed. + static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register) { + return MCCFIInstruction(OpSameValue, L, Register, 0, ""); + } + + /// \brief .cfi_remember_state Save all current rules for all registers. + static MCCFIInstruction createRememberState(MCSymbol *L) { + return MCCFIInstruction(OpRememberState, L, 0, 0, ""); + } + + /// \brief .cfi_restore_state Restore the previously saved state. + static MCCFIInstruction createRestoreState(MCSymbol *L) { + return MCCFIInstruction(OpRestoreState, L, 0, 0, ""); + } + + /// \brief .cfi_escape Allows the user to add arbitrary bytes to the unwind + /// info. + static MCCFIInstruction createEscape(MCSymbol *L, StringRef Vals) { + return MCCFIInstruction(OpEscape, L, 0, 0, Vals); + } + + /// \brief A special wrapper for .cfi_escape that indicates GNU_ARGS_SIZE + static MCCFIInstruction createGnuArgsSize(MCSymbol *L, int Size) { + return MCCFIInstruction(OpGnuArgsSize, L, 0, Size, ""); + } + + OpType getOperation() const { return Operation; } + MCSymbol *getLabel() const { return Label; } + + unsigned getRegister() const { + assert(Operation == OpDefCfa || Operation == OpOffset || + Operation == OpRestore || Operation == OpUndefined || + Operation == OpSameValue || Operation == OpDefCfaRegister || + Operation == OpRelOffset || Operation == OpRegister); + return Register; + } + + unsigned getRegister2() const { + assert(Operation == OpRegister); + return Register2; + } + + int getOffset() const { + assert(Operation == OpDefCfa || Operation == OpOffset || + Operation == OpRelOffset || Operation == OpDefCfaOffset || + Operation == OpAdjustCfaOffset || Operation == OpGnuArgsSize); + return Offset; + } + + StringRef getValues() const { + assert(Operation == OpEscape); + return StringRef(&Values[0], Values.size()); + } +}; + +struct MCDwarfFrameInfo { + MCDwarfFrameInfo() + : Begin(nullptr), End(nullptr), Personality(nullptr), Lsda(nullptr), + Instructions(), CurrentCfaRegister(0), PersonalityEncoding(), + LsdaEncoding(0), CompactUnwindEncoding(0), IsSignalFrame(false), + IsSimple(false) {} + MCSymbol *Begin; + MCSymbol *End; + const MCSymbol *Personality; + const MCSymbol *Lsda; + std::vector Instructions; + unsigned CurrentCfaRegister; + unsigned PersonalityEncoding; + unsigned LsdaEncoding; + uint32_t CompactUnwindEncoding; + bool IsSignalFrame; + bool IsSimple; +}; + +class MCDwarfFrameEmitter { +public: + // + // This emits the frame info section. + // + static void Emit(MCObjectStreamer &streamer, MCAsmBackend *MAB, bool isEH); + static void EmitAdvanceLoc(MCObjectStreamer &Streamer, uint64_t AddrDelta); + static void EncodeAdvanceLoc(MCContext &Context, uint64_t AddrDelta, + raw_ostream &OS); +}; +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCELFObjectWriter.h b/llvm/include/llvm/MC/MCELFObjectWriter.h new file mode 100644 index 0000000..ba6eafe --- /dev/null +++ b/llvm/include/llvm/MC/MCELFObjectWriter.h @@ -0,0 +1,136 @@ +//===-- llvm/MC/MCELFObjectWriter.h - ELF Object Writer ---------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCELFOBJECTWRITER_H +#define LLVM_MC_MCELFOBJECTWRITER_H + +#include "llvm/ADT/Triple.h" +#include "llvm/Support/DataTypes.h" +#include "llvm/Support/ELF.h" +#include + +namespace llvm_ks { +class MCAssembler; +class MCContext; +class MCFixup; +class MCFragment; +class MCObjectWriter; +class MCSymbol; +class MCSymbolELF; +class MCValue; +class raw_pwrite_stream; + +struct ELFRelocationEntry { + uint64_t Offset; // Where is the relocation. + const MCSymbolELF *Symbol; // The symbol to relocate with. + unsigned Type; // The type of the relocation. + uint64_t Addend; // The addend to use. + + ELFRelocationEntry(uint64_t Offset, const MCSymbolELF *Symbol, unsigned Type, + uint64_t Addend) + : Offset(Offset), Symbol(Symbol), Type(Type), Addend(Addend) {} +}; + +class MCELFObjectTargetWriter { + const uint8_t OSABI; + const uint16_t EMachine; + const unsigned HasRelocationAddend : 1; + const unsigned Is64Bit : 1; + const unsigned IsN64 : 1; + +protected: + + MCELFObjectTargetWriter(bool Is64Bit_, uint8_t OSABI_, + uint16_t EMachine_, bool HasRelocationAddend, + bool IsN64=false); + +public: + static uint8_t getOSABI(Triple::OSType OSType) { + switch (OSType) { + case Triple::CloudABI: + return ELF::ELFOSABI_CLOUDABI; + case Triple::PS4: + case Triple::FreeBSD: + return ELF::ELFOSABI_FREEBSD; + default: + return ELF::ELFOSABI_NONE; + } + } + + virtual ~MCELFObjectTargetWriter() {} + + virtual unsigned getRelocType(MCContext &Ctx, const MCValue &Target, + const MCFixup &Fixup, bool IsPCRel) const = 0; + + virtual bool needsRelocateWithSymbol(const MCSymbol &Sym, + unsigned Type) const; + + virtual void sortRelocs(const MCAssembler &Asm, + std::vector &Relocs); + + /// \name Accessors + /// @{ + uint8_t getOSABI() const { return OSABI; } + uint16_t getEMachine() const { return EMachine; } + bool hasRelocationAddend() const { return HasRelocationAddend; } + bool is64Bit() const { return Is64Bit; } + bool isN64() const { return IsN64; } + /// @} + + // Instead of changing everyone's API we pack the N64 Type fields + // into the existing 32 bit data unsigned. +#define R_TYPE_SHIFT 0 +#define R_TYPE_MASK 0xffffff00 +#define R_TYPE2_SHIFT 8 +#define R_TYPE2_MASK 0xffff00ff +#define R_TYPE3_SHIFT 16 +#define R_TYPE3_MASK 0xff00ffff +#define R_SSYM_SHIFT 24 +#define R_SSYM_MASK 0x00ffffff + + // N64 relocation type accessors + uint8_t getRType(uint32_t Type) const { + return (unsigned)((Type >> R_TYPE_SHIFT) & 0xff); + } + uint8_t getRType2(uint32_t Type) const { + return (unsigned)((Type >> R_TYPE2_SHIFT) & 0xff); + } + uint8_t getRType3(uint32_t Type) const { + return (unsigned)((Type >> R_TYPE3_SHIFT) & 0xff); + } + uint8_t getRSsym(uint32_t Type) const { + return (unsigned)((Type >> R_SSYM_SHIFT) & 0xff); + } + + // N64 relocation type setting + unsigned setRType(unsigned Value, unsigned Type) const { + return ((Type & R_TYPE_MASK) | ((Value & 0xff) << R_TYPE_SHIFT)); + } + unsigned setRType2(unsigned Value, unsigned Type) const { + return (Type & R_TYPE2_MASK) | ((Value & 0xff) << R_TYPE2_SHIFT); + } + unsigned setRType3(unsigned Value, unsigned Type) const { + return (Type & R_TYPE3_MASK) | ((Value & 0xff) << R_TYPE3_SHIFT); + } + unsigned setRSsym(unsigned Value, unsigned Type) const { + return (Type & R_SSYM_MASK) | ((Value & 0xff) << R_SSYM_SHIFT); + } +}; + +/// \brief Construct a new ELF writer instance. +/// +/// \param MOTW - The target specific ELF writer subclass. +/// \param OS - The stream to write to. +/// \returns The constructed object writer. +MCObjectWriter *createELFObjectWriter(MCELFObjectTargetWriter *MOTW, + raw_pwrite_stream &OS, + bool IsLittleEndian); +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/MC/MCELFStreamer.h b/llvm/include/llvm/MC/MCELFStreamer.h new file mode 100644 index 0000000..92116aa --- /dev/null +++ b/llvm/include/llvm/MC/MCELFStreamer.h @@ -0,0 +1,109 @@ +//===- MCELFStreamer.h - MCStreamer ELF Object File Interface ---*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCELFSTREAMER_H +#define LLVM_MC_MCELFSTREAMER_H + +#include "llvm/ADT/SmallPtrSet.h" +#include "llvm/MC/MCDirectives.h" +#include "llvm/MC/MCObjectStreamer.h" +#include "llvm/MC/SectionKind.h" +#include "llvm/Support/DataTypes.h" +#include + +namespace llvm_ks { +class MCAsmBackend; +class MCAssembler; +class MCCodeEmitter; +class MCExpr; +class MCInst; +class raw_ostream; + +class MCELFStreamer : public MCObjectStreamer { +public: + MCELFStreamer(MCContext &Context, MCAsmBackend &TAB, raw_pwrite_stream &OS, + MCCodeEmitter *Emitter) + : MCObjectStreamer(Context, TAB, OS, Emitter), SeenIdent(false) {} + + ~MCELFStreamer() override; + + /// state management + void reset() override { + SeenIdent = false; + BundleGroups.clear(); + MCObjectStreamer::reset(); + } + + /// \name MCStreamer Interface + /// @{ + + void InitSections(bool NoExecStack) override; + void ChangeSection(MCSection *Section, const MCExpr *Subsection) override; + void EmitLabel(MCSymbol *Symbol) override; + void EmitAssemblerFlag(MCAssemblerFlag Flag) override; + void EmitThumbFunc(MCSymbol *Func) override; + void EmitWeakReference(MCSymbol *Alias, const MCSymbol *Symbol) override; + bool EmitSymbolAttribute(MCSymbol *Symbol, MCSymbolAttr Attribute) override; + void EmitSymbolDesc(MCSymbol *Symbol, unsigned DescValue) override; + void EmitCommonSymbol(MCSymbol *Symbol, uint64_t Size, + unsigned ByteAlignment) override; + void BeginCOFFSymbolDef(const MCSymbol *Symbol) override; + void EmitCOFFSymbolStorageClass(int StorageClass) override; + void EmitCOFFSymbolType(int Type) override; + void EndCOFFSymbolDef() override; + + void emitELFSize(MCSymbolELF *Symbol, const MCExpr *Value) override; + + void EmitLocalCommonSymbol(MCSymbol *Symbol, uint64_t Size, + unsigned ByteAlignment) override; + + void EmitZerofill(MCSection *Section, MCSymbol *Symbol = nullptr, + uint64_t Size = 0, unsigned ByteAlignment = 0) override; + void EmitTBSSSymbol(MCSection *Section, MCSymbol *Symbol, uint64_t Size, + unsigned ByteAlignment = 0) override; + void EmitValueImpl(const MCExpr *Value, unsigned Size, + SMLoc Loc = SMLoc()) override; + + void EmitFileDirective(StringRef Filename) override; + + void EmitIdent(StringRef IdentString) override; + + void EmitValueToAlignment(unsigned, int64_t, unsigned, unsigned) override; + + unsigned int FinishImpl() override; + + void EmitBundleAlignMode(unsigned AlignPow2) override; + void EmitBundleLock(bool AlignToEnd) override; + void EmitBundleUnlock() override; + +private: + bool isBundleLocked() const; + void EmitInstToFragment(MCInst &Inst, const MCSubtargetInfo &) override; + void EmitInstToData(MCInst &Inst, const MCSubtargetInfo &, unsigned int &KsError) override; + + void fixSymbolsInTLSFixups(const MCExpr *expr); + + /// \brief Merge the content of the fragment \p EF into the fragment \p DF. + void mergeFragment(MCDataFragment *, MCDataFragment *); + + bool SeenIdent; + + /// BundleGroups - The stack of fragments holding the bundle-locked + /// instructions. + llvm_ks::SmallVector BundleGroups; +}; + +MCELFStreamer *createARMELFStreamer(MCContext &Context, MCAsmBackend &TAB, + raw_pwrite_stream &OS, + MCCodeEmitter *Emitter, bool RelaxAll, + bool IsThumb); + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCExpr.h b/llvm/include/llvm/MC/MCExpr.h new file mode 100644 index 0000000..722cf31 --- /dev/null +++ b/llvm/include/llvm/MC/MCExpr.h @@ -0,0 +1,574 @@ +//===- MCExpr.h - Assembly Level Expressions --------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCEXPR_H +#define LLVM_MC_MCEXPR_H + +#include "llvm/ADT/DenseMap.h" +#include "llvm/Support/Casting.h" +#include "llvm/Support/DataTypes.h" + +namespace llvm_ks { +class MCAsmInfo; +class MCAsmLayout; +class MCAssembler; +class MCContext; +class MCFixup; +class MCFragment; +class MCSection; +class MCStreamer; +class MCSymbol; +class MCValue; +class raw_ostream; +class StringRef; +typedef DenseMap SectionAddrMap; + +/// \brief Base class for the full range of assembler expressions which are +/// needed for parsing. +class MCExpr { +public: + enum ExprKind { + Binary, ///< Binary expressions. + Constant, ///< Constant expressions. + SymbolRef, ///< References to labels and assigned expressions. + Unary, ///< Unary expressions. + Target ///< Target specific expression. + }; + +private: + ExprKind Kind; + + MCExpr(const MCExpr&) = delete; + void operator=(const MCExpr&) = delete; + + bool evaluateAsAbsolute(int64_t &Res, const MCAssembler *Asm, + const MCAsmLayout *Layout, + const SectionAddrMap *Addrs) const; + + bool evaluateAsAbsolute(int64_t &Res, const MCAssembler *Asm, + const MCAsmLayout *Layout, + const SectionAddrMap *Addrs, bool InSet) const; + +protected: + explicit MCExpr(ExprKind Kind) : Kind(Kind) {} + + bool evaluateAsRelocatableImpl(MCValue &Res, const MCAssembler *Asm, + const MCAsmLayout *Layout, + const MCFixup *Fixup, + const SectionAddrMap *Addrs, bool InSet, bool &valid) const; + +public: + /// \name Accessors + /// @{ + + ExprKind getKind() const { return Kind; } + + /// @} + /// \name Utility Methods + /// @{ + + void print(raw_ostream &OS, const MCAsmInfo *MAI) const; + void dump() const; + + /// @} + /// \name Expression Evaluation + /// @{ + + /// \brief Try to evaluate the expression to an absolute value. + /// + /// \param Res - The absolute value, if evaluation succeeds. + /// \param Layout - The assembler layout object to use for evaluating symbol + /// values. If not given, then only non-symbolic expressions will be + /// evaluated. + /// \return - True on success. + bool evaluateAsAbsolute(int64_t &Res, const MCAsmLayout &Layout, + const SectionAddrMap &Addrs) const; + bool evaluateAsAbsolute(int64_t &Res) const; + bool evaluateAsAbsolute(int64_t &Res, const MCAssembler &Asm) const; + bool evaluateAsAbsolute(int64_t &Res, const MCAsmLayout &Layout) const; + + bool evaluateKnownAbsolute(int64_t &Res, const MCAsmLayout &Layout) const; + + /// \brief Try to evaluate the expression to a relocatable value, i.e. an + /// expression of the fixed form (a - b + constant). + /// + /// \param Res - The relocatable value, if evaluation succeeds. + /// \param Layout - The assembler layout object to use for evaluating values. + /// \param Fixup - The Fixup object if available. + /// \return - True on success. + bool evaluateAsRelocatable(MCValue &Res, const MCAsmLayout *Layout, + const MCFixup *Fixup) const; + + /// \brief Try to evaluate the expression to the form (a - b + constant) where + /// neither a nor b are variables. + /// + /// This is a more aggressive variant of evaluateAsRelocatable. The intended + /// use is for when relocations are not available, like the .size directive. + bool evaluateAsValue(MCValue &Res, const MCAsmLayout &Layout) const; + + /// \brief Find the "associated section" for this expression, which is + /// currently defined as the absolute section for constants, or + /// otherwise the section associated with the first defined symbol in the + /// expression. + MCFragment *findAssociatedFragment() const; + + /// @} +}; + +inline raw_ostream &operator<<(raw_ostream &OS, const MCExpr &E) { + E.print(OS, nullptr); + return OS; +} + +//// \brief Represent a constant integer expression. +class MCConstantExpr : public MCExpr { + int64_t Value; + + explicit MCConstantExpr(int64_t Value) + : MCExpr(MCExpr::Constant), Value(Value) {} + +public: + /// \name Construction + /// @{ + + static const MCConstantExpr *create(int64_t Value, MCContext &Ctx); + + /// @} + /// \name Accessors + /// @{ + + int64_t getValue() const { return Value; } + + /// @} + + static bool classof(const MCExpr *E) { + return E->getKind() == MCExpr::Constant; + } +}; + +/// \brief Represent a reference to a symbol from inside an expression. +/// +/// A symbol reference in an expression may be a use of a label, a use of an +/// assembler variable (defined constant), or constitute an implicit definition +/// of the symbol as external. +class MCSymbolRefExpr : public MCExpr { +public: + enum VariantKind : uint16_t { + VK_None, + VK_Invalid, + + VK_GOT, + VK_GOTOFF, + VK_GOTPCREL, + VK_GOTTPOFF, + VK_INDNTPOFF, + VK_NTPOFF, + VK_GOTNTPOFF, + VK_PLT, + VK_TLSGD, + VK_TLSLD, + VK_TLSLDM, + VK_TPOFF, + VK_DTPOFF, + VK_TLVP, // Mach-O thread local variable relocations + VK_TLVPPAGE, + VK_TLVPPAGEOFF, + VK_PAGE, + VK_PAGEOFF, + VK_GOTPAGE, + VK_GOTPAGEOFF, + VK_SECREL, + VK_SIZE, // symbol@SIZE + VK_WEAKREF, // The link between the symbols in .weakref foo, bar + + VK_ARM_NONE, + VK_ARM_GOT_PREL, + VK_ARM_TARGET1, + VK_ARM_TARGET2, + VK_ARM_PREL31, + VK_ARM_SBREL, // symbol(sbrel) + VK_ARM_TLSLDO, // symbol(tlsldo) + VK_ARM_TLSCALL, // symbol(tlscall) + VK_ARM_TLSDESC, // symbol(tlsdesc) + VK_ARM_TLSDESCSEQ, + + VK_PPC_LO, // symbol@l + VK_PPC_HI, // symbol@h + VK_PPC_HA, // symbol@ha + VK_PPC_HIGHER, // symbol@higher + VK_PPC_HIGHERA, // symbol@highera + VK_PPC_HIGHEST, // symbol@highest + VK_PPC_HIGHESTA, // symbol@highesta + VK_PPC_GOT_LO, // symbol@got@l + VK_PPC_GOT_HI, // symbol@got@h + VK_PPC_GOT_HA, // symbol@got@ha + VK_PPC_TOCBASE, // symbol@tocbase + VK_PPC_TOC, // symbol@toc + VK_PPC_TOC_LO, // symbol@toc@l + VK_PPC_TOC_HI, // symbol@toc@h + VK_PPC_TOC_HA, // symbol@toc@ha + VK_PPC_DTPMOD, // symbol@dtpmod + VK_PPC_TPREL, // symbol@tprel + VK_PPC_TPREL_LO, // symbol@tprel@l + VK_PPC_TPREL_HI, // symbol@tprel@h + VK_PPC_TPREL_HA, // symbol@tprel@ha + VK_PPC_TPREL_HIGHER, // symbol@tprel@higher + VK_PPC_TPREL_HIGHERA, // symbol@tprel@highera + VK_PPC_TPREL_HIGHEST, // symbol@tprel@highest + VK_PPC_TPREL_HIGHESTA, // symbol@tprel@highesta + VK_PPC_DTPREL, // symbol@dtprel + VK_PPC_DTPREL_LO, // symbol@dtprel@l + VK_PPC_DTPREL_HI, // symbol@dtprel@h + VK_PPC_DTPREL_HA, // symbol@dtprel@ha + VK_PPC_DTPREL_HIGHER, // symbol@dtprel@higher + VK_PPC_DTPREL_HIGHERA, // symbol@dtprel@highera + VK_PPC_DTPREL_HIGHEST, // symbol@dtprel@highest + VK_PPC_DTPREL_HIGHESTA,// symbol@dtprel@highesta + VK_PPC_GOT_TPREL, // symbol@got@tprel + VK_PPC_GOT_TPREL_LO, // symbol@got@tprel@l + VK_PPC_GOT_TPREL_HI, // symbol@got@tprel@h + VK_PPC_GOT_TPREL_HA, // symbol@got@tprel@ha + VK_PPC_GOT_DTPREL, // symbol@got@dtprel + VK_PPC_GOT_DTPREL_LO, // symbol@got@dtprel@l + VK_PPC_GOT_DTPREL_HI, // symbol@got@dtprel@h + VK_PPC_GOT_DTPREL_HA, // symbol@got@dtprel@ha + VK_PPC_TLS, // symbol@tls + VK_PPC_GOT_TLSGD, // symbol@got@tlsgd + VK_PPC_GOT_TLSGD_LO, // symbol@got@tlsgd@l + VK_PPC_GOT_TLSGD_HI, // symbol@got@tlsgd@h + VK_PPC_GOT_TLSGD_HA, // symbol@got@tlsgd@ha + VK_PPC_TLSGD, // symbol@tlsgd + VK_PPC_GOT_TLSLD, // symbol@got@tlsld + VK_PPC_GOT_TLSLD_LO, // symbol@got@tlsld@l + VK_PPC_GOT_TLSLD_HI, // symbol@got@tlsld@h + VK_PPC_GOT_TLSLD_HA, // symbol@got@tlsld@ha + VK_PPC_TLSLD, // symbol@tlsld + VK_PPC_LOCAL, // symbol@local + + VK_Mips_GPREL, + VK_Mips_GOT_CALL, + VK_Mips_GOT16, + VK_Mips_GOT, + VK_Mips_ABS_HI, + VK_Mips_ABS_LO, + VK_Mips_TLSGD, + VK_Mips_TLSLDM, + VK_Mips_DTPREL_HI, + VK_Mips_DTPREL_LO, + VK_Mips_GOTTPREL, + VK_Mips_TPREL_HI, + VK_Mips_TPREL_LO, + VK_Mips_GPOFF_HI, + VK_Mips_GPOFF_LO, + VK_Mips_GOT_DISP, + VK_Mips_GOT_PAGE, + VK_Mips_GOT_OFST, + VK_Mips_HIGHER, + VK_Mips_HIGHEST, + VK_Mips_GOT_HI16, + VK_Mips_GOT_LO16, + VK_Mips_CALL_HI16, + VK_Mips_CALL_LO16, + VK_Mips_PCREL_HI16, + VK_Mips_PCREL_LO16, + + VK_COFF_IMGREL32, // symbol@imgrel (image-relative) + + VK_Hexagon_PCREL, + VK_Hexagon_LO16, + VK_Hexagon_HI16, + VK_Hexagon_GPREL, + VK_Hexagon_GD_GOT, + VK_Hexagon_LD_GOT, + VK_Hexagon_GD_PLT, + VK_Hexagon_LD_PLT, + VK_Hexagon_IE, + VK_Hexagon_IE_GOT, + + VK_WebAssembly_FUNCTION, // Function table index, rather than virtual addr + + VK_TPREL, + VK_DTPREL + }; + +private: + /// The symbol reference modifier. + const VariantKind Kind; + + /// Specifies how the variant kind should be printed. + const unsigned UseParensForSymbolVariant : 1; + + // FIXME: Remove this bit. + const unsigned HasSubsectionsViaSymbols : 1; + + /// The symbol being referenced. + const MCSymbol *Symbol; + + explicit MCSymbolRefExpr(const MCSymbol *Symbol, VariantKind Kind, + const MCAsmInfo *MAI); + +public: + /// \name Construction + /// @{ + + static const MCSymbolRefExpr *create(const MCSymbol *Symbol, MCContext &Ctx) { + return MCSymbolRefExpr::create(Symbol, VK_None, Ctx); + } + + static const MCSymbolRefExpr *create(const MCSymbol *Symbol, VariantKind Kind, + MCContext &Ctx); + static const MCSymbolRefExpr *create(StringRef Name, VariantKind Kind, + MCContext &Ctx); + + /// @} + /// \name Accessors + /// @{ + + const MCSymbol &getSymbol() const { return *Symbol; } + + VariantKind getKind() const { return Kind; } + + void printVariantKind(raw_ostream &OS) const; + + bool hasSubsectionsViaSymbols() const { return HasSubsectionsViaSymbols; } + + /// @} + /// \name Static Utility Functions + /// @{ + + static StringRef getVariantKindName(VariantKind Kind); + + static VariantKind getVariantKindForName(StringRef Name); + + /// @} + + static bool classof(const MCExpr *E) { + return E->getKind() == MCExpr::SymbolRef; + } +}; + +/// \brief Unary assembler expressions. +class MCUnaryExpr : public MCExpr { +public: + enum Opcode { + LNot, ///< Logical negation. + Minus, ///< Unary minus. + Not, ///< Bitwise negation. + Plus ///< Unary plus. + }; + +private: + Opcode Op; + const MCExpr *Expr; + + MCUnaryExpr(Opcode Op, const MCExpr *Expr) + : MCExpr(MCExpr::Unary), Op(Op), Expr(Expr) {} + +public: + /// \name Construction + /// @{ + + static const MCUnaryExpr *create(Opcode Op, const MCExpr *Expr, + MCContext &Ctx); + static const MCUnaryExpr *createLNot(const MCExpr *Expr, MCContext &Ctx) { + return create(LNot, Expr, Ctx); + } + static const MCUnaryExpr *createMinus(const MCExpr *Expr, MCContext &Ctx) { + return create(Minus, Expr, Ctx); + } + static const MCUnaryExpr *createNot(const MCExpr *Expr, MCContext &Ctx) { + return create(Not, Expr, Ctx); + } + static const MCUnaryExpr *createPlus(const MCExpr *Expr, MCContext &Ctx) { + return create(Plus, Expr, Ctx); + } + + /// @} + /// \name Accessors + /// @{ + + /// \brief Get the kind of this unary expression. + Opcode getOpcode() const { return Op; } + + /// \brief Get the child of this unary expression. + const MCExpr *getSubExpr() const { return Expr; } + + /// @} + + static bool classof(const MCExpr *E) { + return E->getKind() == MCExpr::Unary; + } +}; + +/// \brief Binary assembler expressions. +class MCBinaryExpr : public MCExpr { +public: + enum Opcode { + Add, ///< Addition. + And, ///< Bitwise and. + Div, ///< Signed division. + EQ, ///< Equality comparison. + GT, ///< Signed greater than comparison (result is either 0 or some + ///< target-specific non-zero value) + GTE, ///< Signed greater than or equal comparison (result is either 0 or + ///< some target-specific non-zero value). + LAnd, ///< Logical and. + LOr, ///< Logical or. + LT, ///< Signed less than comparison (result is either 0 or + ///< some target-specific non-zero value). + LTE, ///< Signed less than or equal comparison (result is either 0 or + ///< some target-specific non-zero value). + Mod, ///< Signed remainder. + Mul, ///< Multiplication. + NE, ///< Inequality comparison. + Or, ///< Bitwise or. + Shl, ///< Shift left. + AShr, ///< Arithmetic shift right. + LShr, ///< Logical shift right. + Sub, ///< Subtraction. + Xor ///< Bitwise exclusive or. + }; + +private: + Opcode Op; + const MCExpr *LHS, *RHS; + + MCBinaryExpr(Opcode Op, const MCExpr *LHS, const MCExpr *RHS) + : MCExpr(MCExpr::Binary), Op(Op), LHS(LHS), RHS(RHS) {} + +public: + /// \name Construction + /// @{ + + static const MCBinaryExpr *create(Opcode Op, const MCExpr *LHS, + const MCExpr *RHS, MCContext &Ctx); + static const MCBinaryExpr *createAdd(const MCExpr *LHS, const MCExpr *RHS, + MCContext &Ctx) { + return create(Add, LHS, RHS, Ctx); + } + static const MCBinaryExpr *createAnd(const MCExpr *LHS, const MCExpr *RHS, + MCContext &Ctx) { + return create(And, LHS, RHS, Ctx); + } + static const MCBinaryExpr *createDiv(const MCExpr *LHS, const MCExpr *RHS, + MCContext &Ctx) { + return create(Div, LHS, RHS, Ctx); + } + static const MCBinaryExpr *createEQ(const MCExpr *LHS, const MCExpr *RHS, + MCContext &Ctx) { + return create(EQ, LHS, RHS, Ctx); + } + static const MCBinaryExpr *createGT(const MCExpr *LHS, const MCExpr *RHS, + MCContext &Ctx) { + return create(GT, LHS, RHS, Ctx); + } + static const MCBinaryExpr *createGTE(const MCExpr *LHS, const MCExpr *RHS, + MCContext &Ctx) { + return create(GTE, LHS, RHS, Ctx); + } + static const MCBinaryExpr *createLAnd(const MCExpr *LHS, const MCExpr *RHS, + MCContext &Ctx) { + return create(LAnd, LHS, RHS, Ctx); + } + static const MCBinaryExpr *createLOr(const MCExpr *LHS, const MCExpr *RHS, + MCContext &Ctx) { + return create(LOr, LHS, RHS, Ctx); + } + static const MCBinaryExpr *createLT(const MCExpr *LHS, const MCExpr *RHS, + MCContext &Ctx) { + return create(LT, LHS, RHS, Ctx); + } + static const MCBinaryExpr *createLTE(const MCExpr *LHS, const MCExpr *RHS, + MCContext &Ctx) { + return create(LTE, LHS, RHS, Ctx); + } + static const MCBinaryExpr *createMod(const MCExpr *LHS, const MCExpr *RHS, + MCContext &Ctx) { + return create(Mod, LHS, RHS, Ctx); + } + static const MCBinaryExpr *createMul(const MCExpr *LHS, const MCExpr *RHS, + MCContext &Ctx) { + return create(Mul, LHS, RHS, Ctx); + } + static const MCBinaryExpr *createNE(const MCExpr *LHS, const MCExpr *RHS, + MCContext &Ctx) { + return create(NE, LHS, RHS, Ctx); + } + static const MCBinaryExpr *createOr(const MCExpr *LHS, const MCExpr *RHS, + MCContext &Ctx) { + return create(Or, LHS, RHS, Ctx); + } + static const MCBinaryExpr *createShl(const MCExpr *LHS, const MCExpr *RHS, + MCContext &Ctx) { + return create(Shl, LHS, RHS, Ctx); + } + static const MCBinaryExpr *createAShr(const MCExpr *LHS, const MCExpr *RHS, + MCContext &Ctx) { + return create(AShr, LHS, RHS, Ctx); + } + static const MCBinaryExpr *createLShr(const MCExpr *LHS, const MCExpr *RHS, + MCContext &Ctx) { + return create(LShr, LHS, RHS, Ctx); + } + static const MCBinaryExpr *createSub(const MCExpr *LHS, const MCExpr *RHS, + MCContext &Ctx) { + return create(Sub, LHS, RHS, Ctx); + } + static const MCBinaryExpr *createXor(const MCExpr *LHS, const MCExpr *RHS, + MCContext &Ctx) { + return create(Xor, LHS, RHS, Ctx); + } + + /// @} + /// \name Accessors + /// @{ + + /// \brief Get the kind of this binary expression. + Opcode getOpcode() const { return Op; } + + /// \brief Get the left-hand side expression of the binary operator. + const MCExpr *getLHS() const { return LHS; } + + /// \brief Get the right-hand side expression of the binary operator. + const MCExpr *getRHS() const { return RHS; } + + /// @} + + static bool classof(const MCExpr *E) { + return E->getKind() == MCExpr::Binary; + } +}; + +/// \brief This is an extension point for target-specific MCExpr subclasses to +/// implement. +/// +/// NOTE: All subclasses are required to have trivial destructors because +/// MCExprs are bump pointer allocated and not destructed. +class MCTargetExpr : public MCExpr { +protected: + MCTargetExpr() : MCExpr(Target) {} + virtual ~MCTargetExpr() {} +public: + virtual void printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const = 0; + virtual bool evaluateAsRelocatableImpl(MCValue &Res, + const MCAsmLayout *Layout, + const MCFixup *Fixup) const = 0; + virtual void visitUsedExpr(MCStreamer& Streamer) const = 0; + virtual MCFragment *findAssociatedFragment() const = 0; + + virtual void fixELFSymbolsInTLSFixups(MCAssembler &) const = 0; + + static bool classof(const MCExpr *E) { + return E->getKind() == MCExpr::Target; + } +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCFixup.h b/llvm/include/llvm/MC/MCFixup.h new file mode 100644 index 0000000..0c23828 --- /dev/null +++ b/llvm/include/llvm/MC/MCFixup.h @@ -0,0 +1,113 @@ +//===-- llvm/MC/MCFixup.h - Instruction Relocation and Patching -*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCFIXUP_H +#define LLVM_MC_MCFIXUP_H + +#include "llvm/MC/MCExpr.h" +#include "llvm/Support/DataTypes.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/SMLoc.h" +#include + +namespace llvm_ks { +class MCExpr; + +/// \brief Extensible enumeration to represent the type of a fixup. +enum MCFixupKind { + FK_Data_1 = 0, ///< A one-byte fixup. + FK_Data_2, ///< A two-byte fixup. + FK_Data_4, ///< A four-byte fixup. + FK_Data_8, ///< A eight-byte fixup. + FK_PCRel_1, ///< A one-byte pc relative fixup. + FK_PCRel_2, ///< A two-byte pc relative fixup. + FK_PCRel_4, ///< A four-byte pc relative fixup. + FK_PCRel_8, ///< A eight-byte pc relative fixup. + FK_GPRel_1, ///< A one-byte gp relative fixup. + FK_GPRel_2, ///< A two-byte gp relative fixup. + FK_GPRel_4, ///< A four-byte gp relative fixup. + FK_GPRel_8, ///< A eight-byte gp relative fixup. + FK_SecRel_1, ///< A one-byte section relative fixup. + FK_SecRel_2, ///< A two-byte section relative fixup. + FK_SecRel_4, ///< A four-byte section relative fixup. + FK_SecRel_8, ///< A eight-byte section relative fixup. + + FirstTargetFixupKind = 128, + + // Limit range of target fixups, in case we want to pack more efficiently + // later. + MaxTargetFixupKind = (1 << 8) +}; + +/// \brief Encode information on a single operation to perform on a byte +/// sequence (e.g., an encoded instruction) which requires assemble- or run- +/// time patching. +/// +/// Fixups are used any time the target instruction encoder needs to represent +/// some value in an instruction which is not yet concrete. The encoder will +/// encode the instruction assuming the value is 0, and emit a fixup which +/// communicates to the assembler backend how it should rewrite the encoded +/// value. +/// +/// During the process of relaxation, the assembler will apply fixups as +/// symbolic values become concrete. When relaxation is complete, any remaining +/// fixups become relocations in the object file (or errors, if the fixup cannot +/// be encoded on the target). +class MCFixup { + /// The value to put into the fixup location. The exact interpretation of the + /// expression is target dependent, usually it will be one of the operands to + /// an instruction or an assembler directive. + const MCExpr *Value; + + /// The byte index of start of the relocation inside the encoded instruction. + uint32_t Offset; + + /// The target dependent kind of fixup item this is. The kind is used to + /// determine how the operand value should be encoded into the instruction. + unsigned Kind; + + /// The source location which gave rise to the fixup, if any. + SMLoc Loc; +public: + static MCFixup create(uint32_t Offset, const MCExpr *Value, + MCFixupKind Kind, SMLoc Loc = SMLoc()) { + assert(unsigned(Kind) < MaxTargetFixupKind && "Kind out of range!"); + MCFixup FI; + FI.Value = Value; + FI.Offset = Offset; + FI.Kind = unsigned(Kind); + FI.Loc = Loc; + return FI; + } + + MCFixupKind getKind() const { return MCFixupKind(Kind); } + + uint32_t getOffset() const { return Offset; } + void setOffset(uint32_t Value) { Offset = Value; } + + const MCExpr *getValue() const { return Value; } + + /// \brief Return the generic fixup kind for a value with the given size. It + /// is an error to pass an unsupported size. + static MCFixupKind getKindForSize(unsigned Size, bool isPCRel) { + switch (Size) { + default: llvm_unreachable("Invalid generic fixup size!"); + case 1: return isPCRel ? FK_PCRel_1 : FK_Data_1; + case 2: return isPCRel ? FK_PCRel_2 : FK_Data_2; + case 4: return isPCRel ? FK_PCRel_4 : FK_Data_4; + case 8: return isPCRel ? FK_PCRel_8 : FK_Data_8; + } + } + + SMLoc getLoc() const { return Loc; } +}; + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/MC/MCFixupKindInfo.h b/llvm/include/llvm/MC/MCFixupKindInfo.h new file mode 100644 index 0000000..97db2e9 --- /dev/null +++ b/llvm/include/llvm/MC/MCFixupKindInfo.h @@ -0,0 +1,43 @@ +//===-- llvm/MC/MCFixupKindInfo.h - Fixup Descriptors -----------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCFIXUPKINDINFO_H +#define LLVM_MC_MCFIXUPKINDINFO_H + +namespace llvm_ks { + +/// \brief Target independent information on a fixup kind. +struct MCFixupKindInfo { + enum FixupKindFlags { + /// Is this fixup kind PCrelative? This is used by the assembler backend to + /// evaluate fixup values in a target independent manner when possible. + FKF_IsPCRel = (1 << 0), + + /// Should this fixup kind force a 4-byte aligned effective PC value? + FKF_IsAlignedDownTo32Bits = (1 << 1) + }; + + /// A target specific name for the fixup kind. The names will be unique for + /// distinct kinds on any given target. + const char *Name; + + /// The bit offset to write the relocation into. + unsigned TargetOffset; + + /// The number of bits written by this fixup. The bits are assumed to be + /// contiguous. + unsigned TargetSize; + + /// Flags describing additional information on this fixup kind. + unsigned Flags; +}; + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/MC/MCFragment.h b/llvm/include/llvm/MC/MCFragment.h new file mode 100644 index 0000000..69ec52a --- /dev/null +++ b/llvm/include/llvm/MC/MCFragment.h @@ -0,0 +1,489 @@ +//===- MCFragment.h - Fragment type hierarchy -------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCFRAGMENT_H +#define LLVM_MC_MCFRAGMENT_H + +#include "llvm/ADT/SmallString.h" +#include "llvm/ADT/ilist.h" +#include "llvm/ADT/ilist_node.h" +#include "llvm/ADT/iterator.h" +#include "llvm/MC/MCFixup.h" +#include "llvm/MC/MCInst.h" + +namespace llvm_ks { +class MCSection; +class MCSymbol; +class MCSubtargetInfo; + +class MCFragment : public ilist_node_with_parent { + friend class MCAsmLayout; + + MCFragment(const MCFragment &) = delete; + void operator=(const MCFragment &) = delete; + +public: + enum FragmentType : uint8_t { + FT_Align, + FT_Data, + FT_CompactEncodedInst, + FT_Fill, + FT_Relaxable, + FT_Org, + FT_Dwarf, + FT_DwarfFrame, + FT_LEB, + FT_SafeSEH, + FT_Dummy + }; + +private: + FragmentType Kind; + +protected: + bool HasInstructions; + +private: + /// \brief Should this fragment be aligned to the end of a bundle? + bool AlignToBundleEnd; + + uint8_t BundlePadding; + + /// LayoutOrder - The layout order of this fragment. + unsigned LayoutOrder; + + /// The data for the section this fragment is in. + MCSection *Parent; + + /// Atom - The atom this fragment is in, as represented by it's defining + /// symbol. + const MCSymbol *Atom; + + /// \name Assembler Backend Data + /// @{ + // + // FIXME: This could all be kept private to the assembler implementation. + + /// Offset - The offset of this fragment in its section. This is ~0 until + /// initialized. + uint64_t Offset; + + /// @} + +protected: + MCFragment(FragmentType Kind, bool HasInstructions, + uint8_t BundlePadding, MCSection *Parent = nullptr); + + ~MCFragment(); +private: + + // This is a friend so that the sentinal can be created. + friend struct ilist_sentinel_traits; + MCFragment(); + +public: + /// Destroys the current fragment. + /// + /// This must be used instead of delete as MCFragment is non-virtual. + /// This method will dispatch to the appropriate subclass. + void destroy(); + + FragmentType getKind() const { return Kind; } + + MCSection *getParent() const { return Parent; } + void setParent(MCSection *Value) { Parent = Value; } + + const MCSymbol *getAtom() const { return Atom; } + void setAtom(const MCSymbol *Value) { Atom = Value; } + + unsigned getLayoutOrder() const { return LayoutOrder; } + void setLayoutOrder(unsigned Value) { LayoutOrder = Value; } + + /// \brief Does this fragment have instructions emitted into it? By default + /// this is false, but specific fragment types may set it to true. + bool hasInstructions() const { return HasInstructions; } + + /// \brief Should this fragment be placed at the end of an aligned bundle? + bool alignToBundleEnd() const { return AlignToBundleEnd; } + void setAlignToBundleEnd(bool V) { AlignToBundleEnd = V; } + + /// \brief Get the padding size that must be inserted before this fragment. + /// Used for bundling. By default, no padding is inserted. + /// Note that padding size is restricted to 8 bits. This is an optimization + /// to reduce the amount of space used for each fragment. In practice, larger + /// padding should never be required. + uint8_t getBundlePadding() const { return BundlePadding; } + + /// \brief Set the padding size for this fragment. By default it's a no-op, + /// and only some fragments have a meaningful implementation. + void setBundlePadding(uint8_t N) { BundlePadding = N; } + + /// \brief Return true if given frgment has FT_Dummy type. + bool isDummy() const { return Kind == FT_Dummy; } + + void dump(); +}; + +class MCDummyFragment : public MCFragment { +public: + explicit MCDummyFragment(MCSection *Sec) + : MCFragment(FT_Dummy, false, 0, Sec){}; + static bool classof(const MCFragment *F) { return F->getKind() == FT_Dummy; } +}; + +/// Interface implemented by fragments that contain encoded instructions and/or +/// data. +/// +class MCEncodedFragment : public MCFragment { +protected: + MCEncodedFragment(MCFragment::FragmentType FType, bool HasInstructions, + MCSection *Sec) + : MCFragment(FType, HasInstructions, 0, Sec) {} + +public: + static bool classof(const MCFragment *F) { + MCFragment::FragmentType Kind = F->getKind(); + switch (Kind) { + default: + return false; + case MCFragment::FT_Relaxable: + case MCFragment::FT_CompactEncodedInst: + case MCFragment::FT_Data: + return true; + } + } +}; + +/// Interface implemented by fragments that contain encoded instructions and/or +/// data. +/// +template +class MCEncodedFragmentWithContents : public MCEncodedFragment { + SmallVector Contents; + +protected: + MCEncodedFragmentWithContents(MCFragment::FragmentType FType, + bool HasInstructions, + MCSection *Sec) + : MCEncodedFragment(FType, HasInstructions, Sec) {} + +public: + SmallVectorImpl &getContents() { return Contents; } + const SmallVectorImpl &getContents() const { return Contents; } +}; + +/// Interface implemented by fragments that contain encoded instructions and/or +/// data and also have fixups registered. +/// +template +class MCEncodedFragmentWithFixups : + public MCEncodedFragmentWithContents { + + /// Fixups - The list of fixups in this fragment. + SmallVector Fixups; + +protected: + MCEncodedFragmentWithFixups(MCFragment::FragmentType FType, + bool HasInstructions, + MCSection *Sec) + : MCEncodedFragmentWithContents(FType, HasInstructions, + Sec) {} + +public: + typedef SmallVectorImpl::const_iterator const_fixup_iterator; + typedef SmallVectorImpl::iterator fixup_iterator; + + SmallVectorImpl &getFixups() { return Fixups; } + const SmallVectorImpl &getFixups() const { return Fixups; } + + fixup_iterator fixup_begin() { return Fixups.begin(); } + const_fixup_iterator fixup_begin() const { return Fixups.begin(); } + + fixup_iterator fixup_end() { return Fixups.end(); } + const_fixup_iterator fixup_end() const { return Fixups.end(); } + + static bool classof(const MCFragment *F) { + MCFragment::FragmentType Kind = F->getKind(); + return Kind == MCFragment::FT_Relaxable || Kind == MCFragment::FT_Data; + } +}; + +/// Fragment for data and encoded instructions. +/// +class MCDataFragment : public MCEncodedFragmentWithFixups<32, 4> { +public: + MCDataFragment(MCSection *Sec = nullptr) + : MCEncodedFragmentWithFixups<32, 4>(FT_Data, false, Sec) {} + + void setHasInstructions(bool V) { HasInstructions = V; } + + static bool classof(const MCFragment *F) { + return F->getKind() == MCFragment::FT_Data; + } +}; + +/// This is a compact (memory-size-wise) fragment for holding an encoded +/// instruction (non-relaxable) that has no fixups registered. When applicable, +/// it can be used instead of MCDataFragment and lead to lower memory +/// consumption. +/// +class MCCompactEncodedInstFragment : public MCEncodedFragmentWithContents<4> { +public: + MCCompactEncodedInstFragment(MCSection *Sec = nullptr) + : MCEncodedFragmentWithContents(FT_CompactEncodedInst, true, Sec) { + } + + static bool classof(const MCFragment *F) { + return F->getKind() == MCFragment::FT_CompactEncodedInst; + } +}; + +/// A relaxable fragment holds on to its MCInst, since it may need to be +/// relaxed during the assembler layout and relaxation stage. +/// +class MCRelaxableFragment : public MCEncodedFragmentWithFixups<8, 1> { + + /// Inst - The instruction this is a fragment for. + MCInst Inst; + + /// STI - The MCSubtargetInfo in effect when the instruction was encoded. + const MCSubtargetInfo &STI; + +public: + MCRelaxableFragment(const MCInst &Inst, const MCSubtargetInfo &STI, + MCSection *Sec = nullptr) + : MCEncodedFragmentWithFixups(FT_Relaxable, true, Sec), + Inst(Inst), STI(STI) {} + + const MCInst &getInst() const { return Inst; } + void setInst(const MCInst &Value) { Inst = Value; } + + const MCSubtargetInfo &getSubtargetInfo() { return STI; } + + static bool classof(const MCFragment *F) { + return F->getKind() == MCFragment::FT_Relaxable; + } +}; + +class MCAlignFragment : public MCFragment { + + /// Alignment - The alignment to ensure, in bytes. + unsigned Alignment; + + /// EmitNops - Flag to indicate that (optimal) NOPs should be emitted instead + /// of using the provided value. The exact interpretation of this flag is + /// target dependent. + bool EmitNops : 1; + + /// Value - Value to use for filling padding bytes. + int64_t Value; + + /// ValueSize - The size of the integer (in bytes) of \p Value. + unsigned ValueSize; + + /// MaxBytesToEmit - The maximum number of bytes to emit; if the alignment + /// cannot be satisfied in this width then this fragment is ignored. + unsigned MaxBytesToEmit; + +public: + MCAlignFragment(unsigned Alignment, int64_t Value, unsigned ValueSize, + unsigned MaxBytesToEmit, MCSection *Sec = nullptr) + : MCFragment(FT_Align, false, 0, Sec), Alignment(Alignment), + EmitNops(false), Value(Value), + ValueSize(ValueSize), MaxBytesToEmit(MaxBytesToEmit) {} + + /// \name Accessors + /// @{ + + unsigned getAlignment() const { return Alignment; } + + int64_t getValue() const { return Value; } + + unsigned getValueSize() const { return ValueSize; } + + unsigned getMaxBytesToEmit() const { return MaxBytesToEmit; } + + bool hasEmitNops() const { return EmitNops; } + void setEmitNops(bool Value) { EmitNops = Value; } + + /// @} + + static bool classof(const MCFragment *F) { + return F->getKind() == MCFragment::FT_Align; + } +}; + +class MCFillFragment : public MCFragment { + + /// Value to use for filling bytes. + uint8_t Value; + + /// The number of bytes to insert. + uint64_t Size; + +public: + MCFillFragment(uint8_t Value, uint64_t Size, MCSection *Sec = nullptr) + : MCFragment(FT_Fill, false, 0, Sec), Value(Value), Size(Size) {} + + uint8_t getValue() const { return Value; } + uint64_t getSize() const { return Size; } + + static bool classof(const MCFragment *F) { + return F->getKind() == MCFragment::FT_Fill; + } +}; + +class MCOrgFragment : public MCFragment { + + /// Offset - The offset this fragment should start at. + const MCExpr *Offset; + + /// Value - Value to use for filling bytes. + int8_t Value; + +public: + MCOrgFragment(const MCExpr &Offset, int8_t Value, MCSection *Sec = nullptr) + : MCFragment(FT_Org, false, 0, Sec), Offset(&Offset), Value(Value) {} + + /// \name Accessors + /// @{ + + const MCExpr &getOffset() const { return *Offset; } + + uint8_t getValue() const { return Value; } + + /// @} + + static bool classof(const MCFragment *F) { + return F->getKind() == MCFragment::FT_Org; + } +}; + +class MCLEBFragment : public MCFragment { + + /// Value - The value this fragment should contain. + const MCExpr *Value; + + /// IsSigned - True if this is a sleb128, false if uleb128. + bool IsSigned; + + SmallString<8> Contents; + +public: + MCLEBFragment(const MCExpr &Value_, bool IsSigned_, MCSection *Sec = nullptr) + : MCFragment(FT_LEB, false, 0, Sec), Value(&Value_), IsSigned(IsSigned_) { + Contents.push_back(0); + } + + /// \name Accessors + /// @{ + + const MCExpr &getValue() const { return *Value; } + + bool isSigned() const { return IsSigned; } + + SmallString<8> &getContents() { return Contents; } + const SmallString<8> &getContents() const { return Contents; } + + /// @} + + static bool classof(const MCFragment *F) { + return F->getKind() == MCFragment::FT_LEB; + } +}; + +class MCDwarfLineAddrFragment : public MCFragment { + + /// LineDelta - the value of the difference between the two line numbers + /// between two .loc dwarf directives. + int64_t LineDelta; + + /// AddrDelta - The expression for the difference of the two symbols that + /// make up the address delta between two .loc dwarf directives. + const MCExpr *AddrDelta; + + SmallString<8> Contents; + +public: + MCDwarfLineAddrFragment(int64_t LineDelta, const MCExpr &AddrDelta, + MCSection *Sec = nullptr) + : MCFragment(FT_Dwarf, false, 0, Sec), LineDelta(LineDelta), + AddrDelta(&AddrDelta) { + Contents.push_back(0); + } + + /// \name Accessors + /// @{ + + int64_t getLineDelta() const { return LineDelta; } + + const MCExpr &getAddrDelta() const { return *AddrDelta; } + + SmallString<8> &getContents() { return Contents; } + const SmallString<8> &getContents() const { return Contents; } + + /// @} + + static bool classof(const MCFragment *F) { + return F->getKind() == MCFragment::FT_Dwarf; + } +}; + +class MCDwarfCallFrameFragment : public MCFragment { + + /// AddrDelta - The expression for the difference of the two symbols that + /// make up the address delta between two .cfi_* dwarf directives. + const MCExpr *AddrDelta; + + SmallString<8> Contents; + +public: + MCDwarfCallFrameFragment(const MCExpr &AddrDelta, MCSection *Sec = nullptr) + : MCFragment(FT_DwarfFrame, false, 0, Sec), AddrDelta(&AddrDelta) { + Contents.push_back(0); + } + + /// \name Accessors + /// @{ + + const MCExpr &getAddrDelta() const { return *AddrDelta; } + + SmallString<8> &getContents() { return Contents; } + const SmallString<8> &getContents() const { return Contents; } + + /// @} + + static bool classof(const MCFragment *F) { + return F->getKind() == MCFragment::FT_DwarfFrame; + } +}; + +class MCSafeSEHFragment : public MCFragment { + const MCSymbol *Sym; + +public: + MCSafeSEHFragment(const MCSymbol *Sym, MCSection *Sec = nullptr) + : MCFragment(FT_SafeSEH, false, 0, Sec), Sym(Sym) {} + + /// \name Accessors + /// @{ + + const MCSymbol *getSymbol() { return Sym; } + const MCSymbol *getSymbol() const { return Sym; } + + /// @} + + static bool classof(const MCFragment *F) { + return F->getKind() == MCFragment::FT_SafeSEH; + } +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCInst.h b/llvm/include/llvm/MC/MCInst.h new file mode 100644 index 0000000..30f9fe7 --- /dev/null +++ b/llvm/include/llvm/MC/MCInst.h @@ -0,0 +1,202 @@ +//===-- llvm/MC/MCInst.h - MCInst class -------------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains the declaration of the MCInst and MCOperand classes, which +// is the basic representation used to represent low-level machine code +// instructions. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCINST_H +#define LLVM_MC_MCINST_H + +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/DataTypes.h" +#include "llvm/Support/SMLoc.h" + +namespace llvm_ks { +class raw_ostream; +class MCAsmInfo; +class MCExpr; +class MCInst; + +/// \brief Instances of this class represent operands of the MCInst class. +/// This is a simple discriminated union. +class MCOperand { + enum MachineOperandType : unsigned char { + kInvalid, ///< Uninitialized. + kRegister, ///< Register operand. + kImmediate, ///< Immediate operand. + kFPImmediate, ///< Floating-point immediate operand. + kExpr, ///< Relocatable immediate operand. + kInst ///< Sub-instruction operand. + }; + MachineOperandType Kind; + + union { + unsigned RegVal; + int64_t ImmVal; + double FPImmVal; + const MCExpr *ExprVal; + const MCInst *InstVal; + }; + +public: + MCOperand() : Kind(kInvalid), FPImmVal(0.0) {} + + bool isValid() const { return Kind != kInvalid; } + bool isReg() const { return Kind == kRegister; } + bool isImm() const { return Kind == kImmediate; } + bool isFPImm() const { return Kind == kFPImmediate; } + bool isExpr() const { return Kind == kExpr; } + bool isInst() const { return Kind == kInst; } + + /// \brief Returns the register number. + unsigned getReg() const { + assert(isReg() && "This is not a register operand!"); + return RegVal; + } + + /// \brief Set the register number. + void setReg(unsigned Reg) { + assert(isReg() && "This is not a register operand!"); + RegVal = Reg; + } + + int64_t getImm() const { + assert(isImm() && "This is not an immediate"); + return ImmVal; + } + void setImm(int64_t Val) { + assert(isImm() && "This is not an immediate"); + ImmVal = Val; + } + + double getFPImm() const { + assert(isFPImm() && "This is not an FP immediate"); + return FPImmVal; + } + + void setFPImm(double Val) { + assert(isFPImm() && "This is not an FP immediate"); + FPImmVal = Val; + } + + const MCExpr *getExpr() const { + assert(isExpr() && "This is not an expression"); + return ExprVal; + } + void setExpr(const MCExpr *Val) { + assert(isExpr() && "This is not an expression"); + ExprVal = Val; + } + + const MCInst *getInst() const { + assert(isInst() && "This is not a sub-instruction"); + return InstVal; + } + void setInst(const MCInst *Val) { + assert(isInst() && "This is not a sub-instruction"); + InstVal = Val; + } + + static MCOperand createReg(unsigned Reg) { + MCOperand Op; + Op.Kind = kRegister; + Op.RegVal = Reg; + return Op; + } + static MCOperand createImm(int64_t Val) { + MCOperand Op; + Op.Kind = kImmediate; + Op.ImmVal = Val; + return Op; + } + static MCOperand createFPImm(double Val) { + MCOperand Op; + Op.Kind = kFPImmediate; + Op.FPImmVal = Val; + return Op; + } + static MCOperand createExpr(const MCExpr *Val) { + MCOperand Op; + Op.Kind = kExpr; + Op.ExprVal = Val; + return Op; + } + static MCOperand createInst(const MCInst *Val) { + MCOperand Op; + Op.Kind = kInst; + Op.InstVal = Val; + return Op; + } + + void print(raw_ostream &OS) const; + void dump() const; +}; + +template <> struct isPodLike { static const bool value = true; }; + +/// \brief Instances of this class represent a single low-level machine +/// instruction. +class MCInst { + unsigned Opcode; + uint64_t Address; // address of this instruction - keystone + SMLoc Loc; + SmallVector Operands; + +public: + MCInst(uint64_t addr = 0) : Opcode(0), Address(addr) {} + + void setOpcode(unsigned Op) { Opcode = Op; } + unsigned getOpcode() const { return Opcode; } + + void setAddress(uint64_t addr) { Address = addr; } + uint64_t getAddress() const { return Address; } + + void setLoc(SMLoc loc) { Loc = loc; } + SMLoc getLoc() const { return Loc; } + + const MCOperand &getOperand(unsigned i) const { return Operands[i]; } + MCOperand &getOperand(unsigned i) { return Operands[i]; } + unsigned getNumOperands() const { return Operands.size(); } + + void addOperand(const MCOperand &Op) { Operands.push_back(Op); } + + typedef SmallVectorImpl::iterator iterator; + typedef SmallVectorImpl::const_iterator const_iterator; + void clear() { Operands.clear(); } + void erase(iterator I) { Operands.erase(I); } + size_t size() const { return Operands.size(); } + iterator begin() { return Operands.begin(); } + const_iterator begin() const { return Operands.begin(); } + iterator end() { return Operands.end(); } + const_iterator end() const { return Operands.end(); } + iterator insert(iterator I, const MCOperand &Op) { + return Operands.insert(I, Op); + } + + void print(raw_ostream &OS) const; + void dump() const; +}; + +inline raw_ostream& operator<<(raw_ostream &OS, const MCOperand &MO) { + MO.print(OS); + return OS; +} + +inline raw_ostream& operator<<(raw_ostream &OS, const MCInst &MI) { + MI.print(OS); + return OS; +} + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCInstBuilder.h b/llvm/include/llvm/MC/MCInstBuilder.h new file mode 100644 index 0000000..7d63b19 --- /dev/null +++ b/llvm/include/llvm/MC/MCInstBuilder.h @@ -0,0 +1,74 @@ +//===-- llvm/MC/MCInstBuilder.h - Simplify creation of MCInsts --*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains the MCInstBuilder class for convenient creation of +// MCInsts. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCINSTBUILDER_H +#define LLVM_MC_MCINSTBUILDER_H + +#include "llvm/MC/MCInst.h" + +namespace llvm_ks { + +class MCInstBuilder { + MCInst Inst; + +public: + /// \brief Create a new MCInstBuilder for an MCInst with a specific opcode. + MCInstBuilder(unsigned Opcode) { + Inst.setOpcode(Opcode); + } + + /// \brief Add a new register operand. + MCInstBuilder &addReg(unsigned Reg) { + Inst.addOperand(MCOperand::createReg(Reg)); + return *this; + } + + /// \brief Add a new integer immediate operand. + MCInstBuilder &addImm(int64_t Val) { + Inst.addOperand(MCOperand::createImm(Val)); + return *this; + } + + /// \brief Add a new floating point immediate operand. + MCInstBuilder &addFPImm(double Val) { + Inst.addOperand(MCOperand::createFPImm(Val)); + return *this; + } + + /// \brief Add a new MCExpr operand. + MCInstBuilder &addExpr(const MCExpr *Val) { + Inst.addOperand(MCOperand::createExpr(Val)); + return *this; + } + + /// \brief Add a new MCInst operand. + MCInstBuilder &addInst(const MCInst *Val) { + Inst.addOperand(MCOperand::createInst(Val)); + return *this; + } + + /// \brief Add an operand. + MCInstBuilder &addOperand(const MCOperand &Op) { + Inst.addOperand(Op); + return *this; + } + + operator MCInst&() { + return Inst; + } +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCInstrDesc.h b/llvm/include/llvm/MC/MCInstrDesc.h new file mode 100644 index 0000000..f8186d9 --- /dev/null +++ b/llvm/include/llvm/MC/MCInstrDesc.h @@ -0,0 +1,323 @@ +//===-- llvm/MC/MCInstrDesc.h - Instruction Descriptors -*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the MCOperandInfo and MCInstrDesc classes, which +// are used to describe target instructions and their operands. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCINSTRDESC_H +#define LLVM_MC_MCINSTRDESC_H + +#include "llvm/MC/MCRegisterInfo.h" +#include "llvm/Support/DataTypes.h" +#include + +namespace llvm_ks { + class MCInst; + class MCSubtargetInfo; + +//===----------------------------------------------------------------------===// +// Machine Operand Flags and Description +//===----------------------------------------------------------------------===// + +namespace MCOI { +// Operand constraints +enum OperandConstraint { + TIED_TO = 0, // Must be allocated the same register as. + EARLY_CLOBBER // Operand is an early clobber register operand +}; + +/// \brief These are flags set on operands, but should be considered +/// private, all access should go through the MCOperandInfo accessors. +/// See the accessors for a description of what these are. +enum OperandFlags { LookupPtrRegClass = 0, Predicate, OptionalDef }; + +/// \brief Operands are tagged with one of the values of this enum. +enum OperandType { + OPERAND_UNKNOWN = 0, + OPERAND_IMMEDIATE = 1, + OPERAND_REGISTER = 2, + OPERAND_MEMORY = 3, + OPERAND_PCREL = 4, + OPERAND_FIRST_TARGET = 5 +}; +} + +/// \brief This holds information about one operand of a machine instruction, +/// indicating the register class for register operands, etc. +class MCOperandInfo { +public: + /// \brief This specifies the register class enumeration of the operand + /// if the operand is a register. If isLookupPtrRegClass is set, then this is + /// an index that is passed to TargetRegisterInfo::getPointerRegClass(x) to + /// get a dynamic register class. + int16_t RegClass; + + /// \brief These are flags from the MCOI::OperandFlags enum. + uint8_t Flags; + + /// \brief Information about the type of the operand. + uint8_t OperandType; + /// \brief The lower 16 bits are used to specify which constraints are set. + /// The higher 16 bits are used to specify the value of constraints (4 bits + /// each). + uint32_t Constraints; + + /// \brief Set if this operand is a pointer value and it requires a callback + /// to look up its register class. + bool isLookupPtrRegClass() const { + return Flags & (1 << MCOI::LookupPtrRegClass); + } + + /// \brief Set if this is one of the operands that made up of the predicate + /// operand that controls an isPredicable() instruction. + bool isPredicate() const { return Flags & (1 << MCOI::Predicate); } + + /// \brief Set if this operand is a optional def. + bool isOptionalDef() const { return Flags & (1 << MCOI::OptionalDef); } +}; + +//===----------------------------------------------------------------------===// +// Machine Instruction Flags and Description +//===----------------------------------------------------------------------===// + +namespace MCID { +/// \brief These should be considered private to the implementation of the +/// MCInstrDesc class. Clients should use the predicate methods on MCInstrDesc, +/// not use these directly. These all correspond to bitfields in the +/// MCInstrDesc::Flags field. +enum Flag { + Variadic = 0, + HasOptionalDef, + Pseudo, + Return, + Call, + Barrier, + Terminator, + Branch, + IndirectBranch, + Compare, + MoveImm, + Bitcast, + Select, + DelaySlot, + FoldableAsLoad, + MayLoad, + MayStore, + Predicable, + NotDuplicable, + UnmodeledSideEffects, + Commutable, + ConvertibleTo3Addr, + UsesCustomInserter, + HasPostISelHook, + Rematerializable, + CheapAsAMove, + ExtraSrcRegAllocReq, + ExtraDefRegAllocReq, + RegSequence, + ExtractSubreg, + InsertSubreg, + Convergent +}; +} + +/// \brief Describe properties that are true of each instruction in the target +/// description file. This captures information about side effects, register +/// use and many other things. There is one instance of this struct for each +/// target instruction class, and the MachineInstr class points to this struct +/// directly to describe itself. +class MCInstrDesc { +public: + unsigned short Opcode; // The opcode number + unsigned short NumOperands; // Num of args (may be more if variable_ops) + unsigned char NumDefs; // Num of args that are definitions + unsigned char Size; // Number of bytes in encoding. + unsigned short SchedClass; // enum identifying instr sched class + uint64_t Flags; // Flags identifying machine instr class + uint64_t TSFlags; // Target Specific Flag values + const MCPhysReg *ImplicitUses; // Registers implicitly read by this instr + const MCPhysReg *ImplicitDefs; // Registers implicitly defined by this instr + const MCOperandInfo *OpInfo; // 'NumOperands' entries about operands + // Subtarget feature that this is deprecated on, if any + // -1 implies this is not deprecated by any single feature. It may still be + // deprecated due to a "complex" reason, below. + int64_t DeprecatedFeature; + + // A complex method to determine is a certain is deprecated or not, and return + // the reason for deprecation. + bool (*ComplexDeprecationInfo)(MCInst &, const MCSubtargetInfo &, + std::string &); + + /// \brief Returns the value of the specific constraint if + /// it is set. Returns -1 if it is not set. + int getOperandConstraint(unsigned OpNum, + MCOI::OperandConstraint Constraint) const { + if (OpNum < NumOperands && + (OpInfo[OpNum].Constraints & (1 << Constraint))) { + unsigned Pos = 16 + Constraint * 4; + return (int)(OpInfo[OpNum].Constraints >> Pos) & 0xf; + } + return -1; + } + + /// \brief Returns true if a certain instruction is deprecated and if so + /// returns the reason in \p Info. + bool getDeprecatedInfo(MCInst &MI, const MCSubtargetInfo &STI, + std::string &Info) const; + + /// \brief Return the opcode number for this descriptor. + unsigned getOpcode() const { return Opcode; } + + /// \brief Return the number of declared MachineOperands for this + /// MachineInstruction. Note that variadic (isVariadic() returns true) + /// instructions may have additional operands at the end of the list, and note + /// that the machine instruction may include implicit register def/uses as + /// well. + unsigned getNumOperands() const { return NumOperands; } + + /// \brief Return the number of MachineOperands that are register + /// definitions. Register definitions always occur at the start of the + /// machine operand list. This is the number of "outs" in the .td file, + /// and does not include implicit defs. + unsigned getNumDefs() const { return NumDefs; } + + /// \brief Return flags of this instruction. + unsigned getFlags() const { return Flags; } + + /// \brief Return true if this is a pseudo instruction that doesn't + /// correspond to a real machine instruction. + bool isPseudo() const { return Flags & (1 << MCID::Pseudo); } + + /// \brief Return true if the instruction is a return. + bool isReturn() const { return Flags & (1 << MCID::Return); } + + /// \brief Return true if the instruction is a call. + bool isCall() const { return Flags & (1 << MCID::Call); } + + /// \brief Returns true if this is a conditional, unconditional, or + /// indirect branch. Predicates below can be used to discriminate between + /// these cases, and the TargetInstrInfo::AnalyzeBranch method can be used to + /// get more information. + bool isBranch() const { return Flags & (1 << MCID::Branch); } + + /// \brief Return true if this is an indirect branch, such as a + /// branch through a register. + bool isIndirectBranch() const { return Flags & (1 << MCID::IndirectBranch); } + + /// \brief Return true if this instruction has a predicate operand + /// that controls execution. It may be set to 'always', or may be set to other + /// values. There are various methods in TargetInstrInfo that can be used to + /// control and modify the predicate in this instruction. + bool isPredicable() const { return Flags & (1 << MCID::Predicable); } + + /// \brief Returns true if the specified instruction has a delay slot which + /// must be filled by the code generator. + bool hasDelaySlot() const { return Flags & (1 << MCID::DelaySlot); } + + //===--------------------------------------------------------------------===// + // Side Effect Analysis + //===--------------------------------------------------------------------===// + + /// \brief Return true if this instruction could possibly read memory. + /// Instructions with this flag set are not necessarily simple load + /// instructions, they may load a value and modify it, for example. + bool mayLoad() const { return Flags & (1 << MCID::MayLoad); } + + /// \brief Return true if this instruction could possibly modify memory. + /// Instructions with this flag set are not necessarily simple store + /// instructions, they may store a modified value based on their operands, or + /// may not actually modify anything, for example. + bool mayStore() const { return Flags & (1 << MCID::MayStore); } + + /// \brief Return a list of registers that are potentially read by any + /// instance of this machine instruction. For example, on X86, the "adc" + /// instruction adds two register operands and adds the carry bit in from the + /// flags register. In this case, the instruction is marked as implicitly + /// reading the flags. Likewise, the variable shift instruction on X86 is + /// marked as implicitly reading the 'CL' register, which it always does. + /// + /// This method returns null if the instruction has no implicit uses. + const MCPhysReg *getImplicitUses() const { return ImplicitUses; } + + /// \brief Return the number of implicit uses this instruction has. + unsigned getNumImplicitUses() const { + if (!ImplicitUses) + return 0; + unsigned i = 0; + for (; ImplicitUses[i]; ++i) /*empty*/ + ; + return i; + } + + /// \brief Return a list of registers that are potentially written by any + /// instance of this machine instruction. For example, on X86, many + /// instructions implicitly set the flags register. In this case, they are + /// marked as setting the FLAGS. Likewise, many instructions always deposit + /// their result in a physical register. For example, the X86 divide + /// instruction always deposits the quotient and remainder in the EAX/EDX + /// registers. For that instruction, this will return a list containing the + /// EAX/EDX/EFLAGS registers. + /// + /// This method returns null if the instruction has no implicit defs. + const MCPhysReg *getImplicitDefs() const { return ImplicitDefs; } + + /// \brief Return the number of implicit defs this instruct has. + unsigned getNumImplicitDefs() const { + if (!ImplicitDefs) + return 0; + unsigned i = 0; + for (; ImplicitDefs[i]; ++i) /*empty*/ + ; + return i; + } + + /// \brief Return true if this instruction implicitly + /// uses the specified physical register. + bool hasImplicitUseOfPhysReg(unsigned Reg) const { + if (const MCPhysReg *ImpUses = ImplicitUses) + for (; *ImpUses; ++ImpUses) + if (*ImpUses == Reg) + return true; + return false; + } + + /// \brief Return true if this instruction implicitly + /// defines the specified physical register. + bool hasImplicitDefOfPhysReg(unsigned Reg, + const MCRegisterInfo *MRI = nullptr) const; + + /// \brief Return the scheduling class for this instruction. The + /// scheduling class is an index into the InstrItineraryData table. This + /// returns zero if there is no known scheduling information for the + /// instruction. + unsigned getSchedClass() const { return SchedClass; } + + /// \brief Return the number of bytes in the encoding of this instruction, + /// or zero if the encoding size cannot be known from the opcode. + unsigned getSize() const { return Size; } + + /// \brief Find the index of the first operand in the + /// operand list that is used to represent the predicate. It returns -1 if + /// none is found. + int findFirstPredOperandIdx() const { + if (isPredicable()) { + for (unsigned i = 0, e = getNumOperands(); i != e; ++i) + if (OpInfo[i].isPredicate()) + return i; + } + return -1; + } + +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCInstrInfo.h b/llvm/include/llvm/MC/MCInstrInfo.h new file mode 100644 index 0000000..6c9d7e5 --- /dev/null +++ b/llvm/include/llvm/MC/MCInstrInfo.h @@ -0,0 +1,59 @@ +//===-- llvm/MC/MCInstrInfo.h - Target Instruction Info ---------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file describes the target machine instruction set. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCINSTRINFO_H +#define LLVM_MC_MCINSTRINFO_H + +#include "llvm/MC/MCInstrDesc.h" +#include + +namespace llvm_ks { + +//--------------------------------------------------------------------------- +/// \brief Interface to description of machine instruction set. +class MCInstrInfo { + const MCInstrDesc *Desc; // Raw array to allow static init'n + const unsigned *InstrNameIndices; // Array for name indices in InstrNameData + const char *InstrNameData; // Instruction name string pool + unsigned NumOpcodes; // Number of entries in the desc array + +public: + /// \brief Initialize MCInstrInfo, called by TableGen auto-generated routines. + /// *DO NOT USE*. + void InitMCInstrInfo(const MCInstrDesc *D, const unsigned *NI, const char *ND, + unsigned NO) { + Desc = D; + InstrNameIndices = NI; + InstrNameData = ND; + NumOpcodes = NO; + } + + unsigned getNumOpcodes() const { return NumOpcodes; } + + /// \brief Return the machine instruction descriptor that corresponds to the + /// specified instruction opcode. + const MCInstrDesc &get(unsigned Opcode) const { + assert(Opcode < NumOpcodes && "Invalid opcode!"); + return Desc[Opcode]; + } + + /// \brief Returns the name for the instructions with the given opcode. + const char *getName(unsigned Opcode) const { + assert(Opcode < NumOpcodes && "Invalid opcode!"); + return &InstrNameData[InstrNameIndices[Opcode]]; + } +}; + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/MC/MCInstrItineraries.h b/llvm/include/llvm/MC/MCInstrItineraries.h new file mode 100644 index 0000000..4f6cbfe --- /dev/null +++ b/llvm/include/llvm/MC/MCInstrItineraries.h @@ -0,0 +1,103 @@ +//===-- llvm/MC/MCInstrItineraries.h - Scheduling ---------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file describes the structures used for instruction +// itineraries, stages, and operand reads/writes. This is used by +// schedulers to determine instruction stages and latencies. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCINSTRITINERARIES_H +#define LLVM_MC_MCINSTRITINERARIES_H + +#include "llvm/MC/MCSchedule.h" +#include + +namespace llvm_ks { + +//===----------------------------------------------------------------------===// +/// These values represent a non-pipelined step in +/// the execution of an instruction. Cycles represents the number of +/// discrete time slots needed to complete the stage. Units represent +/// the choice of functional units that can be used to complete the +/// stage. Eg. IntUnit1, IntUnit2. NextCycles indicates how many +/// cycles should elapse from the start of this stage to the start of +/// the next stage in the itinerary. A value of -1 indicates that the +/// next stage should start immediately after the current one. +/// For example: +/// +/// { 1, x, -1 } +/// indicates that the stage occupies FU x for 1 cycle and that +/// the next stage starts immediately after this one. +/// +/// { 2, x|y, 1 } +/// indicates that the stage occupies either FU x or FU y for 2 +/// consecutive cycles and that the next stage starts one cycle +/// after this stage starts. That is, the stage requirements +/// overlap in time. +/// +/// { 1, x, 0 } +/// indicates that the stage occupies FU x for 1 cycle and that +/// the next stage starts in this same cycle. This can be used to +/// indicate that the instruction requires multiple stages at the +/// same time. +/// +/// FU reservation can be of two different kinds: +/// - FUs which instruction actually requires +/// - FUs which instruction just reserves. Reserved unit is not available for +/// execution of other instruction. However, several instructions can reserve +/// the same unit several times. +/// Such two types of units reservation is used to model instruction domain +/// change stalls, FUs using the same resource (e.g. same register file), etc. + +struct InstrStage { + enum ReservationKinds { + Required = 0, + Reserved = 1 + }; + + unsigned Cycles_; ///< Length of stage in machine cycles + unsigned Units_; ///< Choice of functional units + int NextCycles_; ///< Number of machine cycles to next stage + ReservationKinds Kind_; ///< Kind of the FU reservation + + /// \brief Returns the choice of FUs. + unsigned getUnits() const { + return Units_; + } +}; + + +//===----------------------------------------------------------------------===// +/// An itinerary represents the scheduling information for an instruction. +/// This includes a set of stages occupied by the instruction and the pipeline +/// cycle in which operands are read and written. +/// +struct InstrItinerary { + int NumMicroOps; ///< # of micro-ops, -1 means it's variable + unsigned FirstStage; ///< Index of first stage in itinerary + unsigned LastStage; ///< Index of last + 1 stage in itinerary + unsigned FirstOperandCycle; ///< Index of first operand rd/wr + unsigned LastOperandCycle; ///< Index of last + 1 operand rd/wr +}; + + +//===----------------------------------------------------------------------===// +/// Itinerary data supplied by a subtarget to be used by a target. +/// +class InstrItineraryData { +public: + MCSchedModel SchedModel; ///< Basic machine properties. + const InstrStage *Stages; ///< Array of stages selected + const InstrItinerary *Itineraries; ///< Array of itineraries selected +}; + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/MC/MCLabel.h b/llvm/include/llvm/MC/MCLabel.h new file mode 100644 index 0000000..10e5a6d --- /dev/null +++ b/llvm/include/llvm/MC/MCLabel.h @@ -0,0 +1,57 @@ +//===- MCLabel.h - Machine Code Directional Local Labels --------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains the declaration of the MCLabel class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCLABEL_H +#define LLVM_MC_MCLABEL_H + +#include "llvm/Support/Compiler.h" + +namespace llvm_ks { +class MCContext; +class raw_ostream; + +/// \brief Instances of this class represent a label name in the MC file, +/// and MCLabel are created and uniqued by the MCContext class. MCLabel +/// should only be constructed for valid instances in the object file. +class MCLabel { + // \brief The instance number of this Directional Local Label. + unsigned Instance; + +private: // MCContext creates and uniques these. + friend class MCContext; + MCLabel(unsigned instance) : Instance(instance) {} + + MCLabel(const MCLabel &) = delete; + void operator=(const MCLabel &) = delete; + +public: + /// \brief Get the current instance of this Directional Local Label. + unsigned getInstance() const { return Instance; } + + /// \brief Increment the current instance of this Directional Local Label. + unsigned incInstance() { return ++Instance; } + + /// \brief Print the value to the stream \p OS. + void print(raw_ostream &OS) const; + + /// \brief Print the value to stderr. + void dump() const; +}; + +inline raw_ostream &operator<<(raw_ostream &OS, const MCLabel &Label) { + Label.print(OS); + return OS; +} +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCLinkerOptimizationHint.h b/llvm/include/llvm/MC/MCLinkerOptimizationHint.h new file mode 100644 index 0000000..7f1cd89 --- /dev/null +++ b/llvm/include/llvm/MC/MCLinkerOptimizationHint.h @@ -0,0 +1,153 @@ +//===- MCLinkerOptimizationHint.h - LOH interface ---------------*- C++ -*-===// +// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares some helpers classes to handle Linker Optimization Hint +// (LOH). +// +// FIXME: LOH interface supports only MachO format at the moment. +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCLINKEROPTIMIZATIONHINT_H +#define LLVM_MC_MCLINKEROPTIMIZATIONHINT_H + +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/ADT/StringSwitch.h" +#include "llvm/Support/raw_ostream.h" + +namespace llvm_ks { + +// Forward declarations. +class MCAsmLayout; +class MCSymbol; + +/// Linker Optimization Hint Type. +enum MCLOHType { + MCLOH_AdrpAdrp = 0x1u, ///< Adrp xY, _v1@PAGE -> Adrp xY, _v2@PAGE. + MCLOH_AdrpLdr = 0x2u, ///< Adrp _v@PAGE -> Ldr _v@PAGEOFF. + MCLOH_AdrpAddLdr = 0x3u, ///< Adrp _v@PAGE -> Add _v@PAGEOFF -> Ldr. + MCLOH_AdrpLdrGotLdr = 0x4u, ///< Adrp _v@GOTPAGE -> Ldr _v@GOTPAGEOFF -> Ldr. + MCLOH_AdrpAddStr = 0x5u, ///< Adrp _v@PAGE -> Add _v@PAGEOFF -> Str. + MCLOH_AdrpLdrGotStr = 0x6u, ///< Adrp _v@GOTPAGE -> Ldr _v@GOTPAGEOFF -> Str. + MCLOH_AdrpAdd = 0x7u, ///< Adrp _v@PAGE -> Add _v@PAGEOFF. + MCLOH_AdrpLdrGot = 0x8u ///< Adrp _v@GOTPAGE -> Ldr _v@GOTPAGEOFF. +}; + +static inline StringRef MCLOHDirectiveName() { + return StringRef(".loh"); +} + +static inline bool isValidMCLOHType(unsigned Kind) { + return Kind >= MCLOH_AdrpAdrp && Kind <= MCLOH_AdrpLdrGot; +} + +static inline int MCLOHNameToId(StringRef Name) { +#define MCLOHCaseNameToId(Name) .Case(#Name, MCLOH_ ## Name) + return StringSwitch(Name) + MCLOHCaseNameToId(AdrpAdrp) + MCLOHCaseNameToId(AdrpLdr) + MCLOHCaseNameToId(AdrpAddLdr) + MCLOHCaseNameToId(AdrpLdrGotLdr) + MCLOHCaseNameToId(AdrpAddStr) + MCLOHCaseNameToId(AdrpLdrGotStr) + MCLOHCaseNameToId(AdrpAdd) + MCLOHCaseNameToId(AdrpLdrGot) + .Default(-1); +} + +static inline StringRef MCLOHIdToName(MCLOHType Kind) { +#define MCLOHCaseIdToName(Name) case MCLOH_ ## Name: return StringRef(#Name); + switch (Kind) { + MCLOHCaseIdToName(AdrpAdrp); + MCLOHCaseIdToName(AdrpLdr); + MCLOHCaseIdToName(AdrpAddLdr); + MCLOHCaseIdToName(AdrpLdrGotLdr); + MCLOHCaseIdToName(AdrpAddStr); + MCLOHCaseIdToName(AdrpLdrGotStr); + MCLOHCaseIdToName(AdrpAdd); + MCLOHCaseIdToName(AdrpLdrGot); + } + return StringRef(); +} + +static inline int MCLOHIdToNbArgs(MCLOHType Kind) { + switch (Kind) { + // LOH with two arguments + case MCLOH_AdrpAdrp: + case MCLOH_AdrpLdr: + case MCLOH_AdrpAdd: + case MCLOH_AdrpLdrGot: + return 2; + // LOH with three arguments + case MCLOH_AdrpAddLdr: + case MCLOH_AdrpLdrGotLdr: + case MCLOH_AdrpAddStr: + case MCLOH_AdrpLdrGotStr: + return 3; + } + return -1; +} + +/// Store Linker Optimization Hint information (LOH). +class MCLOHDirective { + MCLOHType Kind; + + /// Arguments of this directive. Order matters. + SmallVector Args; + +public: + typedef SmallVectorImpl LOHArgs; + + MCLOHDirective(MCLOHType Kind, const LOHArgs &Args) + : Kind(Kind), Args(Args.begin(), Args.end()) { + assert(isValidMCLOHType(Kind) && "Invalid LOH directive type!"); + } + + MCLOHType getKind() const { return Kind; } + + const LOHArgs &getArgs() const { return Args; } +}; + +class MCLOHContainer { + /// Keep track of the emit size of all the LOHs. + mutable uint64_t EmitSize; + + /// Keep track of all LOH directives. + SmallVector Directives; + +public: + typedef SmallVectorImpl LOHDirectives; + + MCLOHContainer() : EmitSize(0) {} + + /// Const accessor to the directives. + const LOHDirectives &getDirectives() const { + return Directives; + } + + /// Add the directive of the given kind \p Kind with the given arguments + /// \p Args to the container. + void addDirective(MCLOHType Kind, const MCLOHDirective::LOHArgs &Args) { + Directives.push_back(MCLOHDirective(Kind, Args)); + } + + void reset() { + Directives.clear(); + EmitSize = 0; + } +}; + +// Add types for specialized template using MCSymbol. +typedef MCLOHDirective::LOHArgs MCLOHArgs; +typedef MCLOHContainer::LOHDirectives MCLOHDirectives; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCObjectFileInfo.h b/llvm/include/llvm/MC/MCObjectFileInfo.h new file mode 100644 index 0000000..3954dba --- /dev/null +++ b/llvm/include/llvm/MC/MCObjectFileInfo.h @@ -0,0 +1,355 @@ +//===-- llvm/MC/MCObjectFileInfo.h - Object File Info -----------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file describes common object file formats. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCOBJECTFILEINFO_H +#define LLVM_MC_MCOBJECTFILEINFO_H + +#include "llvm/ADT/Triple.h" + +namespace llvm_ks { +class MCContext; +class MCSection; + +class MCObjectFileInfo { +protected: + /// True if .comm supports alignment. This is a hack for as long as we + /// support 10.4 Tiger, whose assembler doesn't support alignment on comm. + bool CommDirectiveSupportsAlignment; + + /// True if target object file supports a weak_definition of constant 0 for an + /// omitted EH frame. + bool SupportsWeakOmittedEHFrame; + + /// True if the target object file supports emitting a compact unwind section + /// without an associated EH frame section. + bool SupportsCompactUnwindWithoutEHFrame; + + /// OmitDwarfIfHaveCompactUnwind - True if the target object file + /// supports having some functions with compact unwind and other with + /// dwarf unwind. + bool OmitDwarfIfHaveCompactUnwind; + + /// PersonalityEncoding, LSDAEncoding, TTypeEncoding - Some encoding values + /// for EH. + unsigned PersonalityEncoding; + unsigned LSDAEncoding; + unsigned FDECFIEncoding; + unsigned TTypeEncoding; + + /// Compact unwind encoding indicating that we should emit only an EH frame. + unsigned CompactUnwindDwarfEHFrameOnly; + + /// Section directive for standard text. + MCSection *TextSection; + + /// Section directive for standard data. + MCSection *DataSection; + + /// Section that is default initialized to zero. + MCSection *BSSSection; + + /// Section that is readonly and can contain arbitrary initialized data. + /// Targets are not required to have a readonly section. If they don't, + /// various bits of code will fall back to using the data section for + /// constants. + MCSection *ReadOnlySection; + + /// This section contains the static constructor pointer list. + MCSection *StaticCtorSection; + + /// This section contains the static destructor pointer list. + MCSection *StaticDtorSection; + + /// If exception handling is supported by the target, this is the section the + /// Language Specific Data Area information is emitted to. + MCSection *LSDASection; + + /// If exception handling is supported by the target and the target can + /// support a compact representation of the CIE and FDE, this is the section + /// to emit them into. + MCSection *CompactUnwindSection; + + // Dwarf sections for debug info. If a target supports debug info, these must + // be set. + MCSection *DwarfAbbrevSection; + MCSection *DwarfInfoSection; + MCSection *DwarfLineSection; + MCSection *DwarfFrameSection; + MCSection *DwarfPubTypesSection; + const MCSection *DwarfDebugInlineSection; + MCSection *DwarfStrSection; + MCSection *DwarfLocSection; + MCSection *DwarfARangesSection; + MCSection *DwarfRangesSection; + MCSection *DwarfMacinfoSection; + // The pubnames section is no longer generated by default. The generation + // can be enabled by a compiler flag. + MCSection *DwarfPubNamesSection; + + /// DWARF5 Experimental Debug Info Sections + /// DwarfAccelNamesSection, DwarfAccelObjCSection, + /// DwarfAccelNamespaceSection, DwarfAccelTypesSection - + /// If we use the DWARF accelerated hash tables then we want to emit these + /// sections. + MCSection *DwarfAccelNamesSection; + MCSection *DwarfAccelObjCSection; + MCSection *DwarfAccelNamespaceSection; + MCSection *DwarfAccelTypesSection; + + // These are used for the Fission separate debug information files. + MCSection *DwarfInfoDWOSection; + MCSection *DwarfTypesDWOSection; + MCSection *DwarfAbbrevDWOSection; + MCSection *DwarfStrDWOSection; + MCSection *DwarfLineDWOSection; + MCSection *DwarfLocDWOSection; + MCSection *DwarfStrOffDWOSection; + MCSection *DwarfAddrSection; + + // These are for Fission DWP files. + MCSection *DwarfCUIndexSection; + MCSection *DwarfTUIndexSection; + + /// Section for newer gnu pubnames. + MCSection *DwarfGnuPubNamesSection; + /// Section for newer gnu pubtypes. + MCSection *DwarfGnuPubTypesSection; + + MCSection *COFFDebugSymbolsSection; + MCSection *COFFDebugTypesSection; + + /// Extra TLS Variable Data section. + /// + /// If the target needs to put additional information for a TLS variable, + /// it'll go here. + MCSection *TLSExtraDataSection; + + /// Section directive for Thread Local data. ELF, MachO and COFF. + MCSection *TLSDataSection; // Defaults to ".tdata". + + /// Section directive for Thread Local uninitialized data. + /// + /// Null if this target doesn't support a BSS section. ELF and MachO only. + MCSection *TLSBSSSection; // Defaults to ".tbss". + + /// StackMap section. + MCSection *StackMapSection; + + /// FaultMap section. + MCSection *FaultMapSection; + + /// EH frame section. + /// + /// It is initialized on demand so it can be overwritten (with uniquing). + MCSection *EHFrameSection; + + // ELF specific sections. + MCSection *DataRelROSection; + MCSection *MergeableConst4Section; + MCSection *MergeableConst8Section; + MCSection *MergeableConst16Section; + + // MachO specific sections. + + /// Section for thread local structure information. + /// + /// Contains the source code name of the variable, visibility and a pointer to + /// the initial value (.tdata or .tbss). + MCSection *TLSTLVSection; // Defaults to ".tlv". + + /// Section for thread local data initialization functions. + const MCSection *TLSThreadInitSection; // Defaults to ".thread_init_func". + + MCSection *CStringSection; + MCSection *UStringSection; + MCSection *TextCoalSection; + MCSection *ConstTextCoalSection; + MCSection *ConstDataSection; + MCSection *DataCoalSection; + MCSection *DataCommonSection; + MCSection *DataBSSSection; + MCSection *FourByteConstantSection; + MCSection *EightByteConstantSection; + MCSection *SixteenByteConstantSection; + MCSection *LazySymbolPointerSection; + MCSection *NonLazySymbolPointerSection; + + /// COFF specific sections. + MCSection *DrectveSection; + MCSection *PDataSection; + MCSection *XDataSection; + MCSection *SXDataSection; + +public: + void InitMCObjectFileInfo(const Triple &TT, MCContext &ctx); + + bool getSupportsWeakOmittedEHFrame() const { + return SupportsWeakOmittedEHFrame; + } + bool getSupportsCompactUnwindWithoutEHFrame() const { + return SupportsCompactUnwindWithoutEHFrame; + } + bool getOmitDwarfIfHaveCompactUnwind() const { + return OmitDwarfIfHaveCompactUnwind; + } + + bool getCommDirectiveSupportsAlignment() const { + return CommDirectiveSupportsAlignment; + } + + unsigned getPersonalityEncoding() const { return PersonalityEncoding; } + unsigned getLSDAEncoding() const { return LSDAEncoding; } + unsigned getFDEEncoding() const { return FDECFIEncoding; } + unsigned getTTypeEncoding() const { return TTypeEncoding; } + + unsigned getCompactUnwindDwarfEHFrameOnly() const { + return CompactUnwindDwarfEHFrameOnly; + } + + MCSection *getTextSection() const { return TextSection; } + MCSection *getDataSection() const { return DataSection; } + MCSection *getBSSSection() const { return BSSSection; } + MCSection *getReadOnlySection() const { return ReadOnlySection; } + MCSection *getLSDASection() const { return LSDASection; } + MCSection *getCompactUnwindSection() const { return CompactUnwindSection; } + MCSection *getDwarfAbbrevSection() const { return DwarfAbbrevSection; } + MCSection *getDwarfInfoSection() const { return DwarfInfoSection; } + MCSection *getDwarfLineSection() const { return DwarfLineSection; } + MCSection *getDwarfFrameSection() const { return DwarfFrameSection; } + MCSection *getDwarfPubNamesSection() const { return DwarfPubNamesSection; } + MCSection *getDwarfPubTypesSection() const { return DwarfPubTypesSection; } + MCSection *getDwarfGnuPubNamesSection() const { + return DwarfGnuPubNamesSection; + } + MCSection *getDwarfGnuPubTypesSection() const { + return DwarfGnuPubTypesSection; + } + const MCSection *getDwarfDebugInlineSection() const { + return DwarfDebugInlineSection; + } + MCSection *getDwarfStrSection() const { return DwarfStrSection; } + MCSection *getDwarfLocSection() const { return DwarfLocSection; } + MCSection *getDwarfARangesSection() const { return DwarfARangesSection; } + MCSection *getDwarfRangesSection() const { return DwarfRangesSection; } + MCSection *getDwarfMacinfoSection() const { return DwarfMacinfoSection; } + + // DWARF5 Experimental Debug Info Sections + MCSection *getDwarfAccelNamesSection() const { + return DwarfAccelNamesSection; + } + MCSection *getDwarfAccelObjCSection() const { return DwarfAccelObjCSection; } + MCSection *getDwarfAccelNamespaceSection() const { + return DwarfAccelNamespaceSection; + } + MCSection *getDwarfAccelTypesSection() const { + return DwarfAccelTypesSection; + } + MCSection *getDwarfInfoDWOSection() const { return DwarfInfoDWOSection; } + MCSection *getDwarfTypesSection(uint64_t Hash) const; + MCSection *getDwarfTypesDWOSection() const { return DwarfTypesDWOSection; } + MCSection *getDwarfAbbrevDWOSection() const { return DwarfAbbrevDWOSection; } + MCSection *getDwarfStrDWOSection() const { return DwarfStrDWOSection; } + MCSection *getDwarfLineDWOSection() const { return DwarfLineDWOSection; } + MCSection *getDwarfLocDWOSection() const { return DwarfLocDWOSection; } + MCSection *getDwarfStrOffDWOSection() const { return DwarfStrOffDWOSection; } + MCSection *getDwarfAddrSection() const { return DwarfAddrSection; } + MCSection *getDwarfCUIndexSection() const { return DwarfCUIndexSection; } + MCSection *getDwarfTUIndexSection() const { return DwarfTUIndexSection; } + + MCSection *getCOFFDebugSymbolsSection() const { + return COFFDebugSymbolsSection; + } + MCSection *getCOFFDebugTypesSection() const { + return COFFDebugTypesSection; + } + + + MCSection *getTLSExtraDataSection() const { return TLSExtraDataSection; } + const MCSection *getTLSDataSection() const { return TLSDataSection; } + MCSection *getTLSBSSSection() const { return TLSBSSSection; } + + MCSection *getStackMapSection() const { return StackMapSection; } + MCSection *getFaultMapSection() const { return FaultMapSection; } + + // ELF specific sections. + MCSection *getDataRelROSection() const { return DataRelROSection; } + const MCSection *getMergeableConst4Section() const { + return MergeableConst4Section; + } + const MCSection *getMergeableConst8Section() const { + return MergeableConst8Section; + } + const MCSection *getMergeableConst16Section() const { + return MergeableConst16Section; + } + + // MachO specific sections. + const MCSection *getTLSTLVSection() const { return TLSTLVSection; } + const MCSection *getTLSThreadInitSection() const { + return TLSThreadInitSection; + } + const MCSection *getCStringSection() const { return CStringSection; } + const MCSection *getUStringSection() const { return UStringSection; } + MCSection *getTextCoalSection() const { return TextCoalSection; } + const MCSection *getConstTextCoalSection() const { + return ConstTextCoalSection; + } + const MCSection *getConstDataSection() const { return ConstDataSection; } + const MCSection *getDataCoalSection() const { return DataCoalSection; } + const MCSection *getDataCommonSection() const { return DataCommonSection; } + MCSection *getDataBSSSection() const { return DataBSSSection; } + const MCSection *getFourByteConstantSection() const { + return FourByteConstantSection; + } + const MCSection *getEightByteConstantSection() const { + return EightByteConstantSection; + } + const MCSection *getSixteenByteConstantSection() const { + return SixteenByteConstantSection; + } + MCSection *getLazySymbolPointerSection() const { + return LazySymbolPointerSection; + } + MCSection *getNonLazySymbolPointerSection() const { + return NonLazySymbolPointerSection; + } + + // COFF specific sections. + MCSection *getDrectveSection() const { return DrectveSection; } + MCSection *getPDataSection() const { return PDataSection; } + MCSection *getXDataSection() const { return XDataSection; } + MCSection *getSXDataSection() const { return SXDataSection; } + + MCSection *getEHFrameSection() { + return EHFrameSection; + } + + enum Environment { IsMachO, IsELF, IsCOFF }; + Environment getObjectFileType() const { return Env; } + +private: + Environment Env; + MCContext *Ctx; + Triple TT; + + void initMachOMCObjectFileInfo(Triple T); + void initELFMCObjectFileInfo(Triple T); + void initCOFFMCObjectFileInfo(Triple T); + +public: + const Triple &getTargetTriple() const { return TT; } +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCObjectStreamer.h b/llvm/include/llvm/MC/MCObjectStreamer.h new file mode 100644 index 0000000..beb180a --- /dev/null +++ b/llvm/include/llvm/MC/MCObjectStreamer.h @@ -0,0 +1,158 @@ +//===- MCObjectStreamer.h - MCStreamer Object File Interface ----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCOBJECTSTREAMER_H +#define LLVM_MC_MCOBJECTSTREAMER_H + +#include "llvm/ADT/SmallVector.h" +#include "llvm/MC/MCAssembler.h" +#include "llvm/MC/MCSection.h" +#include "llvm/MC/MCStreamer.h" + +namespace llvm_ks { +class MCAssembler; +class MCCodeEmitter; +class MCSubtargetInfo; +class MCExpr; +class MCFragment; +class MCDataFragment; +class MCAsmBackend; +class raw_ostream; +class raw_pwrite_stream; + +/// \brief Streaming object file generation interface. +/// +/// This class provides an implementation of the MCStreamer interface which is +/// suitable for use with the assembler backend. Specific object file formats +/// are expected to subclass this interface to implement directives specific +/// to that file format or custom semantics expected by the object writer +/// implementation. +class MCObjectStreamer : public MCStreamer { + MCAssembler *Assembler; + MCSection::iterator CurInsertionPoint; + bool EmitEHFrame; + bool EmitDebugFrame; + SmallVector PendingLabels; + + virtual void EmitInstToData(MCInst &Inst, const MCSubtargetInfo&, unsigned int &KsError) = 0; + void EmitCFIStartProcImpl(MCDwarfFrameInfo &Frame) override; + void EmitCFIEndProcImpl(MCDwarfFrameInfo &Frame) override; + +protected: + MCObjectStreamer(MCContext &Context, MCAsmBackend &TAB, raw_pwrite_stream &OS, + MCCodeEmitter *Emitter); + ~MCObjectStreamer() override; + +public: + /// state management + void reset() override; + + /// Object streamers require the integrated assembler. + bool isIntegratedAssemblerRequired() const override { return true; } + + void EmitFrames(MCAsmBackend *MAB); + void EmitCFISections(bool EH, bool Debug) override; + + MCFragment *getCurrentFragment() const; + + void insert(MCFragment *F) { + flushPendingLabels(F); + MCSection *CurSection = getCurrentSectionOnly(); + CurSection->getFragmentList().insert(CurInsertionPoint, F); + F->setParent(CurSection); + } + + /// Get a data fragment to write into, creating a new one if the current + /// fragment is not a data fragment. + MCDataFragment *getOrCreateDataFragment(); + +protected: + bool changeSectionImpl(MCSection *Section, const MCExpr *Subsection); + + /// If any labels have been emitted but not assigned fragments, ensure that + /// they get assigned, either to F if possible or to a new data fragment. + /// Optionally, it is also possible to provide an offset \p FOffset, which + /// will be used as a symbol offset within the fragment. + void flushPendingLabels(MCFragment *F, uint64_t FOffset = 0); + +public: + void visitUsedSymbol(const MCSymbol &Sym) override; + + MCAssembler &getAssembler() { return *Assembler; } + + /// \name MCStreamer Interface + /// @{ + + void EmitLabel(MCSymbol *Symbol) override; + bool EmitAssignment(MCSymbol *Symbol, const MCExpr *Value) override; + void EmitValueImpl(const MCExpr *Value, unsigned Size, + SMLoc Loc = SMLoc()) override; + void EmitULEB128Value(const MCExpr *Value) override; + void EmitSLEB128Value(const MCExpr *Value) override; + void EmitWeakReference(MCSymbol *Alias, const MCSymbol *Symbol) override; + void ChangeSection(MCSection *Section, const MCExpr *Subsection) override; + void EmitInstruction(MCInst &Inst, const MCSubtargetInfo& STI, unsigned int &KsError) override; + + /// \brief Emit an instruction to a special fragment, because this instruction + /// can change its size during relaxation. + virtual void EmitInstToFragment(MCInst &Inst, const MCSubtargetInfo &); + + void EmitBundleAlignMode(unsigned AlignPow2) override; + void EmitBundleLock(bool AlignToEnd) override; + void EmitBundleUnlock() override; + void EmitBytes(StringRef Data) override; + void EmitValueToAlignment(unsigned ByteAlignment, int64_t Value = 0, + unsigned ValueSize = 1, + unsigned MaxBytesToEmit = 0) override; + void EmitCodeAlignment(unsigned ByteAlignment, + unsigned MaxBytesToEmit = 0) override; + void emitValueToOffset(const MCExpr *Offset, unsigned char Value) override; + void EmitDwarfLocDirective(unsigned FileNo, unsigned Line, + unsigned Column, unsigned Flags, + unsigned Isa, unsigned Discriminator, + StringRef FileName) override; + void EmitDwarfAdvanceLineAddr(int64_t LineDelta, const MCSymbol *LastLabel, + const MCSymbol *Label, + unsigned PointerSize); + void EmitDwarfAdvanceFrameAddr(const MCSymbol *LastLabel, + const MCSymbol *Label); + void EmitCVLocDirective(unsigned FunctionId, unsigned FileNo, unsigned Line, + unsigned Column, bool PrologueEnd, bool IsStmt, + StringRef FileName) override; + void EmitCVLinetableDirective(unsigned FunctionId, const MCSymbol *Begin, + const MCSymbol *End) override; + void EmitCVInlineLinetableDirective( + unsigned PrimaryFunctionId, unsigned SourceFileId, unsigned SourceLineNum, + ArrayRef SecondaryFunctionIds) override; + void EmitCVStringTableDirective() override; + void EmitCVFileChecksumsDirective() override; + void EmitGPRel32Value(const MCExpr *Value) override; + void EmitGPRel64Value(const MCExpr *Value) override; + bool EmitRelocDirective(const MCExpr &Offset, StringRef Name, + const MCExpr *Expr, SMLoc Loc) override; + void EmitFill(uint64_t NumBytes, uint8_t FillValue) override; + unsigned int FinishImpl() override; + + /// Emit the absolute difference between two symbols if possible. + /// + /// Emit the absolute difference between \c Hi and \c Lo, as long as we can + /// compute it. Currently, that requires that both symbols are in the same + /// data fragment. Otherwise, do nothing and return \c false. + /// + /// \pre Offset of \c Hi is greater than the offset \c Lo. + void emitAbsoluteSymbolDiff(const MCSymbol *Hi, const MCSymbol *Lo, + unsigned Size) override; + + bool mayHaveInstructions(MCSection &Sec) const override; + uint64_t getCurrentFragmentSize() override; +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCObjectWriter.h b/llvm/include/llvm/MC/MCObjectWriter.h new file mode 100644 index 0000000..347ed2d --- /dev/null +++ b/llvm/include/llvm/MC/MCObjectWriter.h @@ -0,0 +1,204 @@ +//===-- llvm/MC/MCObjectWriter.h - Object File Writer Interface -*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCOBJECTWRITER_H +#define LLVM_MC_MCOBJECTWRITER_H + +#include "llvm/ADT/SmallVector.h" +#include "llvm/Support/Compiler.h" +#include "llvm/Support/DataTypes.h" +#include "llvm/Support/EndianStream.h" +#include "llvm/Support/raw_ostream.h" +#include + +namespace llvm_ks { +class MCAsmLayout; +class MCAssembler; +class MCFixup; +class MCFragment; +class MCSymbol; +class MCSymbolRefExpr; +class MCValue; + +/// Defines the object file and target independent interfaces used by the +/// assembler backend to write native file format object files. +/// +/// The object writer contains a few callbacks used by the assembler to allow +/// the object writer to modify the assembler data structures at appropriate +/// points. Once assembly is complete, the object writer is given the +/// MCAssembler instance, which contains all the symbol and section data which +/// should be emitted as part of writeObject(). +/// +/// The object writer also contains a number of helper methods for writing +/// binary data to the output stream. +class MCObjectWriter { + MCObjectWriter(const MCObjectWriter &) = delete; + void operator=(const MCObjectWriter &) = delete; + + raw_pwrite_stream *OS; + +protected: + unsigned IsLittleEndian : 1; + +protected: // Can only create subclasses. + MCObjectWriter(raw_pwrite_stream &OS, bool IsLittleEndian) + : OS(&OS), IsLittleEndian(IsLittleEndian) {} + + unsigned getInitialOffset() { + return OS->tell(); + } + +public: + virtual ~MCObjectWriter(); + + /// lifetime management + virtual void reset() {} + + bool isLittleEndian() const { return IsLittleEndian; } + + raw_pwrite_stream &getStream() { return *OS; } + void setStream(raw_pwrite_stream &NewOS) { OS = &NewOS; } + + /// \name High-Level API + /// @{ + + /// Perform any late binding of symbols (for example, to assign symbol + /// indices for use when generating relocations). + /// + /// This routine is called by the assembler after layout and relaxation is + /// complete. + virtual void executePostLayoutBinding(MCAssembler &Asm, + const MCAsmLayout &Layout) = 0; + + /// Record a relocation entry. + /// + /// This routine is called by the assembler after layout and relaxation, and + /// post layout binding. The implementation is responsible for storing + /// information about the relocation so that it can be emitted during + /// writeObject(). + virtual void recordRelocation(MCAssembler &Asm, const MCAsmLayout &Layout, + const MCFragment *Fragment, + const MCFixup &Fixup, MCValue Target, + bool &IsPCRel, uint64_t &FixedValue) = 0; + + /// Check whether the difference (A - B) between two symbol references is + /// fully resolved. + /// + /// Clients are not required to answer precisely and may conservatively return + /// false, even when a difference is fully resolved. + bool isSymbolRefDifferenceFullyResolved(const MCAssembler &Asm, + const MCSymbolRefExpr *A, + const MCSymbolRefExpr *B, + bool InSet, bool &valid) const; + + virtual bool isSymbolRefDifferenceFullyResolvedImpl(const MCAssembler &Asm, + const MCSymbol &A, + const MCSymbol &B, + bool InSet) const; + + virtual bool isSymbolRefDifferenceFullyResolvedImpl(const MCAssembler &Asm, + const MCSymbol &SymA, + const MCFragment &FB, + bool InSet, + bool IsPCRel) const; + + /// True if this symbol (which is a variable) is weak. This is not + /// just STB_WEAK, but more generally whether or not we can evaluate + /// past it. + virtual bool isWeak(const MCSymbol &Sym) const; + + /// Write the object file. + /// + /// This routine is called by the assembler after layout and relaxation is + /// complete, fixups have been evaluated and applied, and relocations + /// generated. + virtual void writeObject(MCAssembler &Asm, const MCAsmLayout &Layout) = 0; + + /// @} + /// \name Binary Output + /// @{ + + void write8(uint8_t Value) { *OS << char(Value); } + + void writeLE16(uint16_t Value) { + support::endian::Writer(*OS).write(Value); + } + + void writeLE32(uint32_t Value) { + support::endian::Writer(*OS).write(Value); + } + + void writeLE64(uint64_t Value) { + support::endian::Writer(*OS).write(Value); + } + + void writeBE16(uint16_t Value) { + support::endian::Writer(*OS).write(Value); + } + + void writeBE32(uint32_t Value) { + support::endian::Writer(*OS).write(Value); + } + + void writeBE64(uint64_t Value) { + support::endian::Writer(*OS).write(Value); + } + + void write16(uint16_t Value) { + if (IsLittleEndian) + writeLE16(Value); + else + writeBE16(Value); + } + + void write32(uint32_t Value) { + if (IsLittleEndian) + writeLE32(Value); + else + writeBE32(Value); + } + + void write64(uint64_t Value) { + if (IsLittleEndian) + writeLE64(Value); + else + writeBE64(Value); + } + + void WriteZeros(unsigned N) { + const char Zeros[16] = {0}; + + for (unsigned i = 0, e = N / 16; i != e; ++i) + *OS << StringRef(Zeros, 16); + + *OS << StringRef(Zeros, N % 16); + } + + void writeBytes(const SmallVectorImpl &ByteVec, + unsigned ZeroFillSize = 0) { + writeBytes(StringRef(ByteVec.data(), ByteVec.size()), ZeroFillSize); + } + + void writeBytes(StringRef Str, unsigned ZeroFillSize = 0) { + // TODO: this version may need to go away once all fragment contents are + // converted to SmallVector + assert( + (ZeroFillSize == 0 || Str.size() <= ZeroFillSize) && + "data size greater than fill size, unexpected large write will occur"); + *OS << Str; + if (ZeroFillSize) + WriteZeros(ZeroFillSize - Str.size()); + } + + /// @} +}; + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/MC/MCParser/AsmCond.h b/llvm/include/llvm/MC/MCParser/AsmCond.h new file mode 100644 index 0000000..b129274 --- /dev/null +++ b/llvm/include/llvm/MC/MCParser/AsmCond.h @@ -0,0 +1,40 @@ +//===- AsmCond.h - Assembly file conditional assembly ----------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCPARSER_ASMCOND_H +#define LLVM_MC_MCPARSER_ASMCOND_H + +namespace llvm_ks { + +/// AsmCond - Class to support conditional assembly +/// +/// The conditional assembly feature (.if, .else, .elseif and .endif) is +/// implemented with AsmCond that tells us what we are in the middle of +/// processing. Ignore can be either true or false. When true we are ignoring +/// the block of code in the middle of a conditional. + +class AsmCond { +public: + enum ConditionalAssemblyType { + NoCond, // no conditional is being processed + IfCond, // inside if conditional + ElseIfCond, // inside elseif conditional + ElseCond // inside else conditional + }; + + ConditionalAssemblyType TheCond; + bool CondMet; + bool Ignore; + + AsmCond() : TheCond(NoCond), CondMet(false), Ignore(false) {} +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCParser/AsmLexer.h b/llvm/include/llvm/MC/MCParser/AsmLexer.h new file mode 100644 index 0000000..a104ddb --- /dev/null +++ b/llvm/include/llvm/MC/MCParser/AsmLexer.h @@ -0,0 +1,75 @@ +//===- AsmLexer.h - Lexer for Assembly Files --------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This class declares the lexer for assembly files. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCPARSER_ASMLEXER_H +#define LLVM_MC_MCPARSER_ASMLEXER_H + +#include "llvm/ADT/StringRef.h" +#include "llvm/MC/MCParser/MCAsmLexer.h" +#include "llvm/Support/DataTypes.h" +#include + +namespace llvm_ks { +class MemoryBuffer; +class MCAsmInfo; + +/// AsmLexer - Lexer class for assembly files. +class AsmLexer : public MCAsmLexer { + const MCAsmInfo &MAI; + + const char *CurPtr; + StringRef CurBuf; + bool isAtStartOfLine; + unsigned defaultRadix; + + void operator=(const AsmLexer&) = delete; + AsmLexer(const AsmLexer&) = delete; + +protected: + /// LexToken - Read the next token and return its code. + AsmToken LexToken() override; + +public: + AsmLexer(const MCAsmInfo &MAI); + ~AsmLexer() override; + + void setBuffer(StringRef Buf, const char *ptr = nullptr); + + StringRef LexUntilEndOfStatement() override; + StringRef LexUntilEndOfLine(); + + size_t peekTokens(MutableArrayRef Buf, + bool ShouldSkipSpace = true) override; + + bool isAtStartOfComment(const char *Ptr); + bool isAtStatementSeparator(const char *Ptr); + + const MCAsmInfo &getMAI() const { return MAI; } + +private: + int getNextChar(); + AsmToken ReturnError(const char *Loc, const std::string &Msg); + + AsmToken LexIdentifier(); + AsmToken LexSlash(); + AsmToken LexLineComment(); + AsmToken LexDigit(); + AsmToken LexSingleQuote(); + AsmToken LexQuote(); + AsmToken LexFloatLiteral(); + AsmToken LexHexFloatLiteral(bool NoIntDigits); +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCParser/MCAsmLexer.h b/llvm/include/llvm/MC/MCParser/MCAsmLexer.h new file mode 100644 index 0000000..2dc2b6b --- /dev/null +++ b/llvm/include/llvm/MC/MCParser/MCAsmLexer.h @@ -0,0 +1,231 @@ +//===-- llvm/MC/MCAsmLexer.h - Abstract Asm Lexer Interface -----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCPARSER_MCASMLEXER_H +#define LLVM_MC_MCPARSER_MCASMLEXER_H + +#include "llvm/ADT/APInt.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/Compiler.h" +#include "llvm/Support/DataTypes.h" +#include "llvm/Support/SMLoc.h" + +namespace llvm_ks { + +/// Target independent representation for an assembler token. +class AsmToken { +public: + enum TokenKind { + // Markers + Eof, Error, + + // String values. + Identifier, + String, + + // Integer values. + Integer, + BigNum, // larger than 64 bits + + // Real values. + Real, + + // No-value. + EndOfStatement, + Colon, + Space, + Plus, Minus, Tilde, + Slash, // '/' + BackSlash, // '\' + LParen, RParen, LBrac, RBrac, LCurly, RCurly, + Star, Dot, Comma, Dollar, Equal, EqualEqual, + + Pipe, PipePipe, Caret, + Amp, AmpAmp, Exclaim, ExclaimEqual, Percent, Hash, + Less, LessEqual, LessLess, LessGreater, + Greater, GreaterEqual, GreaterGreater, At + }; + +private: + TokenKind Kind; + + /// A reference to the entire token contents; this is always a pointer into + /// a memory buffer owned by the source manager. + StringRef Str; + + APInt IntVal; + +public: + AsmToken() {} + AsmToken(TokenKind Kind, StringRef Str, APInt IntVal) + : Kind(Kind), Str(Str), IntVal(IntVal) {} + AsmToken(TokenKind Kind, StringRef Str, int64_t IntVal = 0) + : Kind(Kind), Str(Str), IntVal(64, IntVal, true) {} + + TokenKind getKind() const { return Kind; } + bool is(TokenKind K) const { return Kind == K; } + bool isNot(TokenKind K) const { return Kind != K; } + + SMLoc getLoc() const; + SMLoc getEndLoc() const; + SMRange getLocRange() const; + + /// Get the contents of a string token (without quotes). + StringRef getStringContents(bool &valid) const { + //assert(Kind == String && "This token isn't a string!"); + if (Kind != String) { + valid = false; + return nullptr; + } + valid = true; + return Str.slice(1, Str.size() - 1); + } + + /// Get the identifier string for the current token, which should be an + /// identifier or a string. This gets the portion of the string which should + /// be used as the identifier, e.g., it does not include the quotes on + /// strings. + StringRef getIdentifier() const { + if (Kind == Identifier) + return getString(); + bool valid; + return getStringContents(valid); + } + + /// Get the string for the current token, this includes all characters (for + /// example, the quotes on strings) in the token. + /// + /// The returned StringRef points into the source manager's memory buffer, and + /// is safe to store across calls to Lex(). + StringRef getString() const { return Str; } + + // FIXME: Don't compute this in advance, it makes every token larger, and is + // also not generally what we want (it is nicer for recovery etc. to lex 123br + // as a single token, then diagnose as an invalid number). + int64_t getIntVal(bool &valid) const { + //assert(Kind == Integer && "This token isn't an integer!"); + if (Kind != Integer) { + valid = false; + return -1; + } + valid = true; + return IntVal.getZExtValue(); + } + + APInt getAPIntVal(bool &valid) const { + //assert((Kind == Integer || Kind == BigNum) && + // "This token isn't an integer!"); + if (Kind != Integer && Kind != BigNum) { + valid = false; + //return APInt(-1); + } + valid = true; + return IntVal; + } +}; + +/// Generic assembler lexer interface, for use by target specific assembly +/// lexers. +class MCAsmLexer { + /// The current token, stored in the base class for faster access. + SmallVector CurTok; + + /// The location and description of the current error + SMLoc ErrLoc; + std::string Err; + + MCAsmLexer(const MCAsmLexer &) = delete; + void operator=(const MCAsmLexer &) = delete; +protected: // Can only create subclasses. + const char *TokStart; + bool SkipSpace; + bool AllowAtInIdentifier; + + MCAsmLexer(); + + virtual AsmToken LexToken() = 0; + + void SetError(SMLoc errLoc, const std::string &err) { + ErrLoc = errLoc; + Err = err; + } + +public: + virtual ~MCAsmLexer(); + + /// Consume the next token from the input stream and return it. + /// + /// The lexer will continuosly return the end-of-file token once the end of + /// the main input file has been reached. + const AsmToken &Lex() { + assert(!CurTok.empty()); + CurTok.erase(CurTok.begin()); + if (CurTok.empty()) + CurTok.emplace_back(LexToken()); + return CurTok.front(); + } + + void UnLex(AsmToken const &Token) { + CurTok.insert(CurTok.begin(), Token); + } + + virtual StringRef LexUntilEndOfStatement() = 0; + + /// Get the current source location. + SMLoc getLoc() const; + + /// Get the current (last) lexed token. + const AsmToken &getTok() const { + return CurTok[0]; + } + + /// Look ahead at the next token to be lexed. + const AsmToken peekTok(bool ShouldSkipSpace = true) { + AsmToken Tok; + + MutableArrayRef Buf(Tok); + if (peekTokens(Buf, ShouldSkipSpace) != 1) + return AsmToken(AsmToken::Error, nullptr); + + return Tok; + } + + /// Look ahead an arbitrary number of tokens. + virtual size_t peekTokens(MutableArrayRef Buf, + bool ShouldSkipSpace = true) = 0; + + /// Get the current error location + SMLoc getErrLoc() { + return ErrLoc; + } + + /// Get the current error string + const std::string &getErr() { + return Err; + } + + /// Get the kind of current token. + AsmToken::TokenKind getKind() const { return getTok().getKind(); } + + /// Check if the current token has kind \p K. + bool is(AsmToken::TokenKind K) const { return getTok().is(K); } + + /// Check if the current token has kind \p K. + bool isNot(AsmToken::TokenKind K) const { return getTok().isNot(K); } + + /// Set whether spaces should be ignored by the lexer + void setSkipSpace(bool val) { SkipSpace = val; } + + bool getAllowAtInIdentifier() { return AllowAtInIdentifier; } + void setAllowAtInIdentifier(bool v) { AllowAtInIdentifier = v; } +}; + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/MC/MCParser/MCAsmParser.h b/llvm/include/llvm/MC/MCParser/MCAsmParser.h new file mode 100644 index 0000000..bac580f --- /dev/null +++ b/llvm/include/llvm/MC/MCParser/MCAsmParser.h @@ -0,0 +1,222 @@ +//===-- llvm/MC/MCAsmParser.h - Abstract Asm Parser Interface ---*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCPARSER_MCASMPARSER_H +#define LLVM_MC_MCPARSER_MCASMPARSER_H + +#include "llvm/ADT/ArrayRef.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/MC/MCParser/AsmLexer.h" +#include "llvm/Support/DataTypes.h" + +namespace llvm_ks { +class MCAsmInfo; +class MCAsmLexer; +class MCAsmParserExtension; +class MCContext; +class MCExpr; +class MCInstrInfo; +class MCStreamer; +class MCTargetAsmParser; +class SMLoc; +class SMRange; +class SourceMgr; +class Twine; + +class InlineAsmIdentifierInfo { +public: + void *OpDecl; + bool IsVarDecl; + unsigned Length, Size, Type; + + void clear() { + OpDecl = nullptr; + IsVarDecl = false; + Length = 1; + Size = 0; + Type = 0; + } +}; + +/// \brief Generic Sema callback for assembly parser. +class MCAsmParserSemaCallback { +public: + virtual ~MCAsmParserSemaCallback(); + virtual void *LookupInlineAsmIdentifier(StringRef &LineBuf, + InlineAsmIdentifierInfo &Info, + bool IsUnevaluatedContext) = 0; + virtual StringRef LookupInlineAsmLabel(StringRef Identifier, SourceMgr &SM, + SMLoc Location, bool Create) = 0; + + virtual bool LookupInlineAsmField(StringRef Base, StringRef Member, + unsigned &Offset) = 0; +}; + +/// \brief Generic assembler parser interface, for use by target specific +/// assembly parsers. +class MCAsmParser { +public: + typedef bool (*DirectiveHandler)(MCAsmParserExtension*, StringRef, SMLoc); + typedef std::pair + ExtensionDirectiveHandler; + +private: + MCAsmParser(const MCAsmParser &) = delete; + void operator=(const MCAsmParser &) = delete; + + MCTargetAsmParser *TargetParser; + +protected: // Can only create subclasses. + MCAsmParser(); + +public: + + // save Keystone error + unsigned int KsError; + + virtual ~MCAsmParser(); + + virtual void addDirectiveHandler(StringRef Directive, + ExtensionDirectiveHandler Handler) = 0; + + virtual void addAliasForDirective(StringRef Directive, StringRef Alias) = 0; + + virtual SourceMgr &getSourceManager() = 0; + + virtual MCAsmLexer &getLexer() = 0; + const MCAsmLexer &getLexer() const { + return const_cast(this)->getLexer(); + } + + virtual MCContext &getContext() = 0; + + /// \brief Return the output streamer for the assembler. + virtual MCStreamer &getStreamer() = 0; + + MCTargetAsmParser &getTargetParser() const { return *TargetParser; } + void setTargetParser(MCTargetAsmParser &P); + + virtual unsigned getAssemblerDialect() { return 0;} + virtual void setAssemblerDialect(unsigned i) { } + + /// \brief Run the parser on the input source buffer. + virtual size_t Run(bool NoInitialTextSection, uint64_t Address, bool NoFinalize = false) = 0; + + virtual void setParsingInlineAsm(bool V) = 0; + virtual bool isParsingInlineAsm() = 0; + + virtual void setNasmDefaultRel(bool V) = 0; + virtual bool isNasmDefaultRel() = 0; + + /// \brief Parse MS-style inline assembly. + virtual bool parseMSInlineAsm( + void *AsmLoc, std::string &AsmString, unsigned &NumOutputs, + unsigned &NumInputs, SmallVectorImpl> &OpDecls, + SmallVectorImpl &Constraints, + SmallVectorImpl &Clobbers, const MCInstrInfo *MII, + MCAsmParserSemaCallback &SI, uint64_t &Address) = 0; + + /// \brief Emit a note at the location \p L, with the message \p Msg. + virtual void Note(SMLoc L, const Twine &Msg, + ArrayRef Ranges = None) = 0; + + /// \brief Emit a warning at the location \p L, with the message \p Msg. + /// + /// \return The return value is true, if warnings are fatal. + virtual bool Warning(SMLoc L, const Twine &Msg, + ArrayRef Ranges = None) = 0; + + /// \brief Emit an error at the location \p L, with the message \p Msg. + /// + /// \return The return value is always true, as an idiomatic convenience to + /// clients. + virtual bool Error(SMLoc L, const Twine &Msg, + ArrayRef Ranges = None) = 0; + + /// \brief Get the next AsmToken in the stream, possibly handling file + /// inclusion first. + virtual const AsmToken &Lex() = 0; + + /// \brief Get the current AsmToken from the stream. + const AsmToken &getTok() const; + + /// \brief Report an error at the current lexer location. + bool TokError(const Twine &Msg, ArrayRef Ranges = None); + + /// \brief Parse an identifier or string (as a quoted identifier) and set \p + /// Res to the identifier contents. + virtual bool parseIdentifier(StringRef &Res) = 0; + + /// \brief Parse up to the end of statement and return the contents from the + /// current token until the end of the statement; the current token on exit + /// will be either the EndOfStatement or EOF. + virtual StringRef parseStringToEndOfStatement() = 0; + + /// \brief Parse the current token as a string which may include escaped + /// characters and return the string contents. + virtual bool parseEscapedString(std::string &Data) = 0; + + /// \brief Skip to the end of the current statement, for error recovery. + virtual void eatToEndOfStatement() = 0; + + /// \brief Parse an arbitrary expression. + /// + /// \param Res - The value of the expression. The result is undefined + /// on error. + /// \return - False on success. + virtual bool parseExpression(const MCExpr *&Res, SMLoc &EndLoc) = 0; + bool parseExpression(const MCExpr *&Res); + + /// \brief Parse a primary expression. + /// + /// \param Res - The value of the expression. The result is undefined + /// on error. + /// \return - False on success. + virtual bool parsePrimaryExpr(const MCExpr *&Res, SMLoc &EndLoc) = 0; + + /// \brief Parse an arbitrary expression, assuming that an initial '(' has + /// already been consumed. + /// + /// \param Res - The value of the expression. The result is undefined + /// on error. + /// \return - False on success. + virtual bool parseParenExpression(const MCExpr *&Res, SMLoc &EndLoc) = 0; + + /// \brief Parse an expression which must evaluate to an absolute value. + /// + /// \param Res - The value of the absolute expression. The result is undefined + /// on error. + /// \return - False on success. + virtual bool parseAbsoluteExpression(int64_t &Res) = 0; + + /// \brief Ensure that we have a valid section set in the streamer. Otherwise, + /// report an error and switch to .text. + virtual void checkForValidSection() = 0; + + /// \brief Parse an arbitrary expression of a specified parenthesis depth, + /// assuming that the initial '(' characters have already been consumed. + /// + /// \param ParenDepth - Specifies how many trailing expressions outside the + /// current parentheses we have to parse. + /// \param Res - The value of the expression. The result is undefined + /// on error. + /// \return - False on success. + virtual bool parseParenExprOfDepth(unsigned ParenDepth, const MCExpr *&Res, + SMLoc &EndLoc) = 0; + + virtual void initializeDirectiveKindMap(int syntax) = 0; +}; + +/// \brief Create an MCAsmParser instance. +MCAsmParser *createMCAsmParser(SourceMgr &, MCContext &, MCStreamer &, + const MCAsmInfo &); + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/MC/MCParser/MCAsmParserExtension.h b/llvm/include/llvm/MC/MCParser/MCAsmParserExtension.h new file mode 100644 index 0000000..fd0cdb6 --- /dev/null +++ b/llvm/include/llvm/MC/MCParser/MCAsmParserExtension.h @@ -0,0 +1,92 @@ +//===-- llvm/MC/MCAsmParserExtension.h - Asm Parser Hooks -------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCPARSER_MCASMPARSEREXTENSION_H +#define LLVM_MC_MCPARSER_MCASMPARSEREXTENSION_H + +#include "llvm/ADT/StringRef.h" +#include "llvm/MC/MCParser/MCAsmParser.h" +#include "llvm/Support/SMLoc.h" + +namespace llvm_ks { +class Twine; + +/// \brief Generic interface for extending the MCAsmParser, +/// which is implemented by target and object file assembly parser +/// implementations. +class MCAsmParserExtension { + MCAsmParserExtension(const MCAsmParserExtension &) = delete; + void operator=(const MCAsmParserExtension &) = delete; + + MCAsmParser *Parser; + +protected: + MCAsmParserExtension(); + + // Helper template for implementing static dispatch functions. + template + static bool HandleDirective(MCAsmParserExtension *Target, + StringRef Directive, + SMLoc DirectiveLoc) { + T *Obj = static_cast(Target); + return (Obj->*Handler)(Directive, DirectiveLoc); + } + + bool BracketExpressionsSupported; + +public: + virtual ~MCAsmParserExtension(); + + /// \brief Initialize the extension for parsing using the given \p Parser. + /// The extension should use the AsmParser interfaces to register its + /// parsing routines. + virtual void Initialize(MCAsmParser &Parser); + + /// \name MCAsmParser Proxy Interfaces + /// @{ + + MCContext &getContext() { return getParser().getContext(); } + + MCAsmLexer &getLexer() { return getParser().getLexer(); } + const MCAsmLexer &getLexer() const { + return const_cast(this)->getLexer(); + } + + MCAsmParser &getParser() { return *Parser; } + const MCAsmParser &getParser() const { + return const_cast(this)->getParser(); + } + + SourceMgr &getSourceManager() { return getParser().getSourceManager(); } + MCStreamer &getStreamer() { return getParser().getStreamer(); } + bool Warning(SMLoc L, const Twine &Msg) { + return getParser().Warning(L, Msg); + } + bool Error(SMLoc L, const Twine &Msg) { + return getParser().Error(L, Msg); + } + void Note(SMLoc L, const Twine &Msg) { + getParser().Note(L, Msg); + } + bool TokError(const Twine &Msg) { + return getParser().TokError(Msg); + } + + const AsmToken &Lex() { return getParser().Lex(); } + + const AsmToken &getTok() { return getParser().getTok(); } + + bool HasBracketExpressions() const { return BracketExpressionsSupported; } + + /// @} +}; + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/MC/MCParser/MCAsmParserUtils.h b/llvm/include/llvm/MC/MCParser/MCAsmParserUtils.h new file mode 100644 index 0000000..a63139d --- /dev/null +++ b/llvm/include/llvm/MC/MCParser/MCAsmParserUtils.h @@ -0,0 +1,33 @@ +//===------ llvm/MC/MCAsmParserUtils.h - Asm Parser Utilities ---*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCPARSER_MCASMPARSERUTILS_H +#define LLVM_MC_MCPARSER_MCASMPARSERUTILS_H + +namespace llvm_ks { + +class MCAsmParser; +class MCExpr; +class MCSymbol; +class StringRef; + +namespace MCParserUtils { + +/// Parse a value expression and return whether it can be assigned to a symbol +/// with the given name. +/// +/// On success, returns false and sets the Symbol and Value output parameters. +bool parseAssignmentExpression(StringRef Name, bool allow_redef, + MCAsmParser &Parser, MCSymbol *&Symbol, + const MCExpr *&Value); + +} // namespace MCParserUtils +} // namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCParser/MCParsedAsmOperand.h b/llvm/include/llvm/MC/MCParser/MCParsedAsmOperand.h new file mode 100644 index 0000000..6b284b3 --- /dev/null +++ b/llvm/include/llvm/MC/MCParser/MCParsedAsmOperand.h @@ -0,0 +1,98 @@ +//===-- llvm/MC/MCParsedAsmOperand.h - Asm Parser Operand -------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCPARSER_MCPARSEDASMOPERAND_H +#define LLVM_MC_MCPARSER_MCPARSEDASMOPERAND_H + +#include +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/SMLoc.h" + +namespace llvm_ks { +class raw_ostream; + +/// MCParsedAsmOperand - This abstract class represents a source-level assembly +/// instruction operand. It should be subclassed by target-specific code. This +/// base class is used by target-independent clients and is the interface +/// between parsing an asm instruction and recognizing it. +class MCParsedAsmOperand { + /// MCOperandNum - The corresponding MCInst operand number. Only valid when + /// parsing MS-style inline assembly. + unsigned MCOperandNum; + + /// Constraint - The constraint on this operand. Only valid when parsing + /// MS-style inline assembly. + std::string Constraint; + +protected: + // This only seems to need to be movable (by ARMOperand) but ARMOperand has + // lots of members and MSVC doesn't support defaulted move ops, so to avoid + // that verbosity, just rely on defaulted copy ops. It's only the Constraint + // string member that would benefit from movement anyway. + MCParsedAsmOperand(const MCParsedAsmOperand &RHS) = default; + MCParsedAsmOperand &operator=(const MCParsedAsmOperand &) = default; + MCParsedAsmOperand() = default; + +public: + virtual ~MCParsedAsmOperand() {} + + void setConstraint(StringRef C) { Constraint = C.str(); } + StringRef getConstraint() { return Constraint; } + + void setMCOperandNum (unsigned OpNum) { MCOperandNum = OpNum; } + unsigned getMCOperandNum() { return MCOperandNum; } + + virtual StringRef getSymName() { return StringRef(); } + virtual void *getOpDecl() { return nullptr; } + + /// isToken - Is this a token operand? + virtual bool isToken() const = 0; + /// isImm - Is this an immediate operand? + virtual bool isImm() const = 0; + /// isReg - Is this a register operand? + virtual bool isReg() const = 0; + virtual unsigned getReg() const = 0; + + /// isMem - Is this a memory operand? + virtual bool isMem() const = 0; + + /// getStartLoc - Get the location of the first token of this operand. + virtual SMLoc getStartLoc() const = 0; + /// getEndLoc - Get the location of the last token of this operand. + virtual SMLoc getEndLoc() const = 0; + + /// needAddressOf - Do we need to emit code to get the address of the + /// variable/label? Only valid when parsing MS-style inline assembly. + virtual bool needAddressOf() const { return false; } + + /// isOffsetOf - Do we need to emit code to get the offset of the variable, + /// rather then the value of the variable? Only valid when parsing MS-style + /// inline assembly. + virtual bool isOffsetOf() const { return false; } + + /// getOffsetOfLoc - Get the location of the offset operator. + virtual SMLoc getOffsetOfLoc() const { return SMLoc(); } + + /// print - Print a debug representation of the operand to the given stream. + virtual void print(raw_ostream &OS) const = 0; + /// dump - Print to the debug stream. + virtual void dump() const; +}; + +//===----------------------------------------------------------------------===// +// Debugging Support + +inline raw_ostream& operator<<(raw_ostream &OS, const MCParsedAsmOperand &MO) { + MO.print(OS); + return OS; +} + +} // end namespace llvm_ks. + +#endif diff --git a/llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h b/llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h new file mode 100644 index 0000000..4daab8e --- /dev/null +++ b/llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h @@ -0,0 +1,225 @@ +//===-- llvm/MC/MCTargetAsmParser.h - Target Assembly Parser ----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCPARSER_MCTARGETASMPARSER_H +#define LLVM_MC_MCPARSER_MCTARGETASMPARSER_H + +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCParser/MCAsmParserExtension.h" +#include "llvm/MC/MCTargetOptions.h" +#include + +namespace llvm_ks { +class AsmToken; +class MCInst; +class MCParsedAsmOperand; +class MCStreamer; +class MCSubtargetInfo; +class SMLoc; +class StringRef; +template class SmallVectorImpl; + +typedef SmallVectorImpl> OperandVector; + +enum AsmRewriteKind { + AOK_Delete = 0, // Rewrite should be ignored. + AOK_Align, // Rewrite align as .align. + AOK_EVEN, // Rewrite even as .even. + AOK_DotOperator, // Rewrite a dot operator expression as an immediate. + // E.g., [eax].foo.bar -> [eax].8 + AOK_Emit, // Rewrite _emit as .byte. + AOK_Imm, // Rewrite as $$N. + AOK_ImmPrefix, // Add $$ before a parsed Imm. + AOK_Input, // Rewrite in terms of $N. + AOK_Output, // Rewrite in terms of $N. + AOK_SizeDirective, // Add a sizing directive (e.g., dword ptr). + AOK_Label, // Rewrite local labels. + AOK_Skip // Skip emission (e.g., offset/type operators). +}; + +const char AsmRewritePrecedence [] = { + 0, // AOK_Delete + 2, // AOK_Align + 2, // AOK_EVEN + 2, // AOK_DotOperator + 2, // AOK_Emit + 4, // AOK_Imm + 4, // AOK_ImmPrefix + 3, // AOK_Input + 3, // AOK_Output + 5, // AOK_SizeDirective + 1, // AOK_Label + 2 // AOK_Skip +}; + +struct AsmRewrite { + AsmRewriteKind Kind; + SMLoc Loc; + unsigned Len; + unsigned Val; + StringRef Label; +public: + AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len = 0, unsigned val = 0) + : Kind(kind), Loc(loc), Len(len), Val(val) {} + AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len, StringRef label) + : Kind(kind), Loc(loc), Len(len), Val(0), Label(label) {} +}; + +struct ParseInstructionInfo { + + SmallVectorImpl *AsmRewrites; + + ParseInstructionInfo() : AsmRewrites(nullptr) {} + ParseInstructionInfo(SmallVectorImpl *rewrites) + : AsmRewrites(rewrites) {} +}; + +/// MCTargetAsmParser - Generic interface to target specific assembly parsers. +class MCTargetAsmParser : public MCAsmParserExtension { +public: + enum MatchResultTy { + Match_Success = 1, + Match_InvalidOperand = 512, // KS_ERR_ASM_ARCH + Match_MissingFeature, + Match_MnemonicFail, + FIRST_TARGET_MATCH_RESULT_TY + }; + +private: + MCTargetAsmParser(const MCTargetAsmParser &) = delete; + void operator=(const MCTargetAsmParser &) = delete; +protected: // Can only create subclasses. + MCTargetAsmParser(MCTargetOptions const &, const MCSubtargetInfo &STI); + + /// Create a copy of STI and return a non-const reference to it. + MCSubtargetInfo ©STI(); + + /// AvailableFeatures - The current set of available features. + uint64_t AvailableFeatures; + + /// ParsingInlineAsm - Are we parsing ms-style inline assembly? + bool ParsingInlineAsm; + + /// SemaCallback - The Sema callback implementation. Must be set when parsing + /// ms-style inline assembly. + MCAsmParserSemaCallback *SemaCallback; + + /// Set of options which affects instrumentation of inline assembly. + MCTargetOptions MCOptions; + + /// Current STI. + const MCSubtargetInfo *STI; + +public: + // save Keystone syntax + int KsSyntax; + + ~MCTargetAsmParser() override; + + const MCSubtargetInfo &getSTI() const; + + uint64_t getAvailableFeatures() const { return AvailableFeatures; } + void setAvailableFeatures(uint64_t Value) { AvailableFeatures = Value; } + + bool isParsingInlineAsm () { return ParsingInlineAsm; } + void setParsingInlineAsm (bool Value) { ParsingInlineAsm = Value; } + + MCTargetOptions getTargetOptions() const { return MCOptions; } + + void setSemaCallback(MCAsmParserSemaCallback *Callback) { + SemaCallback = Callback; + } + + virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, + SMLoc &EndLoc, unsigned int &ErrorCode) = 0; + + /// Sets frame register corresponding to the current MachineFunction. + virtual void SetFrameRegister(unsigned RegNo) {} + + /// ParseInstruction - Parse one assembly instruction. + /// + /// The parser is positioned following the instruction name. The target + /// specific instruction parser should parse the entire instruction and + /// construct the appropriate MCInst, or emit an error. On success, the entire + /// line should be parsed up to and including the end-of-statement token. On + /// failure, the parser is not required to read to the end of the line. + // + /// \param Name - The instruction name. + /// \param NameLoc - The source location of the name. + /// \param Operands [out] - The list of parsed operands, this returns + /// ownership of them to the caller. + /// \return True on failure. + virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, + SMLoc NameLoc, OperandVector &Operands, unsigned int &ErrorCode) = 0; + virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, + AsmToken Token, OperandVector &Operands, unsigned int &ErrorCode) { + return ParseInstruction(Info, Name, Token.getLoc(), Operands, ErrorCode); + } + + /// ParseDirective - Parse a target specific assembler directive + /// + /// The parser is positioned following the directive name. The target + /// specific directive parser should parse the entire directive doing or + /// recording any target specific work, or return true and do nothing if the + /// directive is not target specific. If the directive is specific for + /// the target, the entire line is parsed up to and including the + /// end-of-statement token and false is returned. + /// + /// \param DirectiveID - the identifier token of the directive. + virtual bool ParseDirective(AsmToken DirectiveID) = 0; + + /// MatchAndEmitInstruction - Recognize a series of operands of a parsed + /// instruction as an actual MCInst and emit it to the specified MCStreamer. + /// This returns false on success and returns true on failure to match. + /// + /// On failure, the target parser is responsible for emitting a diagnostic + /// explaining the match failure. + virtual bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, + OperandVector &Operands, MCStreamer &Out, + uint64_t &ErrorInfo, + bool MatchingInlineAsm, unsigned int &ErrorCode, uint64_t &Address) = 0; + + /// Allows targets to let registers opt out of clobber lists. + virtual bool OmitRegisterFromClobberLists(unsigned RegNo) { return false; } + + /// Allow a target to add special case operand matching for things that + /// tblgen doesn't/can't handle effectively. For example, literal + /// immediates on ARM. TableGen expects a token operand, but the parser + /// will recognize them as immediates. + virtual unsigned validateTargetOperandClass(MCParsedAsmOperand &Op, + unsigned Kind) { + return Match_InvalidOperand; + } + + /// checkTargetMatchPredicate - Validate the instruction match against + /// any complex target predicates not expressible via match classes. + virtual unsigned checkTargetMatchPredicate(MCInst &Inst) { + return Match_Success; + } + + virtual void convertToMapAndConstraints(unsigned Kind, + const OperandVector &Operands) = 0; + + // Return whether this parser uses assignment statements with equals tokens + virtual bool equalIsAsmAssignment() { return true; }; + // Return whether this start of statement identifier is a label + virtual bool isLabel(AsmToken &Token, bool &valid) { valid = true; return true; }; + + virtual const MCExpr *applyModifierToExpr(const MCExpr *E, + MCSymbolRefExpr::VariantKind, + MCContext &Ctx) { + return nullptr; + } + + virtual void onLabelParsed(MCSymbol *Symbol) { } +}; + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/MC/MCRegisterInfo.h b/llvm/include/llvm/MC/MCRegisterInfo.h new file mode 100644 index 0000000..827e26d --- /dev/null +++ b/llvm/include/llvm/MC/MCRegisterInfo.h @@ -0,0 +1,694 @@ +//=== MC/MCRegisterInfo.h - Target Register Description ---------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file describes an abstract interface used to get information about a +// target machines register file. This information is used for a variety of +// purposed, especially register allocation. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCREGISTERINFO_H +#define LLVM_MC_MCREGISTERINFO_H + +#include "llvm/ADT/DenseMap.h" +#include "llvm/Support/ErrorHandling.h" +#include + +namespace llvm_ks { + +/// An unsigned integer type large enough to represent all physical registers, +/// but not necessarily virtual registers. +typedef uint16_t MCPhysReg; + +/// MCRegisterClass - Base class of TargetRegisterClass. +class MCRegisterClass { +public: + typedef const MCPhysReg* iterator; + typedef const MCPhysReg* const_iterator; + + const iterator RegsBegin; + const uint8_t *const RegSet; + const uint32_t NameIdx; + const uint16_t RegsSize; + const uint16_t RegSetSize; + const uint16_t ID; + const uint16_t RegSize, Alignment; // Size & Alignment of register in bytes + const int8_t CopyCost; + const bool Allocatable; + + /// getID() - Return the register class ID number. + /// + unsigned getID() const { return ID; } + + /// begin/end - Return all of the registers in this class. + /// + iterator begin() const { return RegsBegin; } + iterator end() const { return RegsBegin + RegsSize; } + + /// getNumRegs - Return the number of registers in this class. + /// + unsigned getNumRegs() const { return RegsSize; } + + /// getRegister - Return the specified register in the class. + /// + unsigned getRegister(unsigned i) const { + assert(i < getNumRegs() && "Register number out of range!"); + return RegsBegin[i]; + } + + /// contains - Return true if the specified register is included in this + /// register class. This does not include virtual registers. + bool contains(unsigned Reg) const { + unsigned InByte = Reg % 8; + unsigned Byte = Reg / 8; + if (Byte >= RegSetSize) + return false; + return (RegSet[Byte] & (1 << InByte)) != 0; + } + + /// contains - Return true if both registers are in this class. + bool contains(unsigned Reg1, unsigned Reg2) const { + return contains(Reg1) && contains(Reg2); + } + + /// getSize - Return the size of the register in bytes, which is also the size + /// of a stack slot allocated to hold a spilled copy of this register. + unsigned getSize() const { return RegSize; } + + /// getAlignment - Return the minimum required alignment for a register of + /// this class. + unsigned getAlignment() const { return Alignment; } + + /// getCopyCost - Return the cost of copying a value between two registers in + /// this class. A negative number means the register class is very expensive + /// to copy e.g. status flag register classes. + int getCopyCost() const { return CopyCost; } + + /// isAllocatable - Return true if this register class may be used to create + /// virtual registers. + bool isAllocatable() const { return Allocatable; } +}; + +/// MCRegisterDesc - This record contains information about a particular +/// register. The SubRegs field is a zero terminated array of registers that +/// are sub-registers of the specific register, e.g. AL, AH are sub-registers +/// of AX. The SuperRegs field is a zero terminated array of registers that are +/// super-registers of the specific register, e.g. RAX, EAX, are +/// super-registers of AX. +/// +struct MCRegisterDesc { + uint32_t Name; // Printable name for the reg (for debugging) + uint32_t SubRegs; // Sub-register set, described above + uint32_t SuperRegs; // Super-register set, described above + + // Offset into MCRI::SubRegIndices of a list of sub-register indices for each + // sub-register in SubRegs. + uint32_t SubRegIndices; + + // RegUnits - Points to the list of register units. The low 4 bits holds the + // Scale, the high bits hold an offset into DiffLists. See MCRegUnitIterator. + uint32_t RegUnits; + + /// Index into list with lane mask sequences. The sequence contains a lanemask + /// for every register unit. + uint16_t RegUnitLaneMasks; +}; + +/// MCRegisterInfo base class - We assume that the target defines a static +/// array of MCRegisterDesc objects that represent all of the machine +/// registers that the target has. As such, we simply have to track a pointer +/// to this array so that we can turn register number into a register +/// descriptor. +/// +/// Note this class is designed to be a base class of TargetRegisterInfo, which +/// is the interface used by codegen. However, specific targets *should never* +/// specialize this class. MCRegisterInfo should only contain getters to access +/// TableGen generated physical register data. It must not be extended with +/// virtual methods. +/// +class MCRegisterInfo { +public: + typedef const MCRegisterClass *regclass_iterator; + + /// DwarfLLVMRegPair - Emitted by tablegen so Dwarf<->LLVM reg mappings can be + /// performed with a binary search. + struct DwarfLLVMRegPair { + unsigned FromReg; + unsigned ToReg; + + bool operator<(DwarfLLVMRegPair RHS) const { return FromReg < RHS.FromReg; } + }; + + /// SubRegCoveredBits - Emitted by tablegen: bit range covered by a subreg + /// index, -1 in any being invalid. + struct SubRegCoveredBits { + uint16_t Offset; + uint16_t Size; + }; +private: + const MCRegisterDesc *Desc; // Pointer to the descriptor array + unsigned NumRegs; // Number of entries in the array + unsigned RAReg; // Return address register + unsigned PCReg; // Program counter register + const MCRegisterClass *Classes; // Pointer to the regclass array + unsigned NumClasses; // Number of entries in the array + unsigned NumRegUnits; // Number of regunits. + const MCPhysReg (*RegUnitRoots)[2]; // Pointer to regunit root table. + const MCPhysReg *DiffLists; // Pointer to the difflists array + const unsigned *RegUnitMaskSequences; // Pointer to lane mask sequences + // for register units. + const char *RegStrings; // Pointer to the string table. + const char *RegClassStrings; // Pointer to the class strings. + const uint16_t *SubRegIndices; // Pointer to the subreg lookup + // array. + const SubRegCoveredBits *SubRegIdxRanges; // Pointer to the subreg covered + // bit ranges array. + unsigned NumSubRegIndices; // Number of subreg indices. + const uint16_t *RegEncodingTable; // Pointer to array of register + // encodings. + + unsigned L2DwarfRegsSize; + unsigned EHL2DwarfRegsSize; + unsigned Dwarf2LRegsSize; + unsigned EHDwarf2LRegsSize; + const DwarfLLVMRegPair *L2DwarfRegs; // LLVM to Dwarf regs mapping + const DwarfLLVMRegPair *EHL2DwarfRegs; // LLVM to Dwarf regs mapping EH + const DwarfLLVMRegPair *Dwarf2LRegs; // Dwarf to LLVM regs mapping + const DwarfLLVMRegPair *EHDwarf2LRegs; // Dwarf to LLVM regs mapping EH + DenseMap L2SEHRegs; // LLVM to SEH regs mapping + +public: + /// DiffListIterator - Base iterator class that can traverse the + /// differentially encoded register and regunit lists in DiffLists. + /// Don't use this class directly, use one of the specialized sub-classes + /// defined below. + class DiffListIterator { + uint16_t Val; + const MCPhysReg *List; + + protected: + /// Create an invalid iterator. Call init() to point to something useful. + DiffListIterator() : Val(0), List(nullptr) {} + + /// init - Point the iterator to InitVal, decoding subsequent values from + /// DiffList. The iterator will initially point to InitVal, sub-classes are + /// responsible for skipping the seed value if it is not part of the list. + void init(MCPhysReg InitVal, const MCPhysReg *DiffList) { + Val = InitVal; + List = DiffList; + } + + /// advance - Move to the next list position, return the applied + /// differential. This function does not detect the end of the list, that + /// is the caller's responsibility (by checking for a 0 return value). + unsigned advance() { + assert(isValid() && "Cannot move off the end of the list."); + MCPhysReg D = *List++; + Val += D; + return D; + } + + public: + + /// isValid - returns true if this iterator is not yet at the end. + bool isValid() const { return List; } + + /// Dereference the iterator to get the value at the current position. + unsigned operator*() const { return Val; } + + /// Pre-increment to move to the next position. + void operator++() { + // The end of the list is encoded as a 0 differential. + if (!advance()) + List = nullptr; + } + }; + + // These iterators are allowed to sub-class DiffListIterator and access + // internal list pointers. + friend class MCSubRegIterator; + friend class MCSubRegIndexIterator; + friend class MCSuperRegIterator; + friend class MCRegUnitIterator; + friend class MCRegUnitMaskIterator; + friend class MCRegUnitRootIterator; + + /// \brief Initialize MCRegisterInfo, called by TableGen + /// auto-generated routines. *DO NOT USE*. + void InitMCRegisterInfo(const MCRegisterDesc *D, unsigned NR, unsigned RA, + unsigned PC, + const MCRegisterClass *C, unsigned NC, + const MCPhysReg (*RURoots)[2], + unsigned NRU, + const MCPhysReg *DL, + const unsigned *RUMS, + const char *Strings, + const char *ClassStrings, + const uint16_t *SubIndices, + unsigned NumIndices, + const SubRegCoveredBits *SubIdxRanges, + const uint16_t *RET) { + Desc = D; + NumRegs = NR; + RAReg = RA; + PCReg = PC; + Classes = C; + DiffLists = DL; + RegUnitMaskSequences = RUMS; + RegStrings = Strings; + RegClassStrings = ClassStrings; + NumClasses = NC; + RegUnitRoots = RURoots; + NumRegUnits = NRU; + SubRegIndices = SubIndices; + NumSubRegIndices = NumIndices; + SubRegIdxRanges = SubIdxRanges; + RegEncodingTable = RET; + } + + /// \brief Used to initialize LLVM register to Dwarf + /// register number mapping. Called by TableGen auto-generated routines. + /// *DO NOT USE*. + void mapLLVMRegsToDwarfRegs(const DwarfLLVMRegPair *Map, unsigned Size, + bool isEH) { + if (isEH) { + EHL2DwarfRegs = Map; + EHL2DwarfRegsSize = Size; + } else { + L2DwarfRegs = Map; + L2DwarfRegsSize = Size; + } + } + + /// \brief Used to initialize Dwarf register to LLVM + /// register number mapping. Called by TableGen auto-generated routines. + /// *DO NOT USE*. + void mapDwarfRegsToLLVMRegs(const DwarfLLVMRegPair *Map, unsigned Size, + bool isEH) { + if (isEH) { + EHDwarf2LRegs = Map; + EHDwarf2LRegsSize = Size; + } else { + Dwarf2LRegs = Map; + Dwarf2LRegsSize = Size; + } + } + + /// mapLLVMRegToSEHReg - Used to initialize LLVM register to SEH register + /// number mapping. By default the SEH register number is just the same + /// as the LLVM register number. + /// FIXME: TableGen these numbers. Currently this requires target specific + /// initialization code. + void mapLLVMRegToSEHReg(unsigned LLVMReg, int SEHReg) { + L2SEHRegs[LLVMReg] = SEHReg; + } + + /// \brief This method should return the register where the return + /// address can be found. + unsigned getRARegister() const { + return RAReg; + } + + /// Return the register which is the program counter. + unsigned getProgramCounter() const { + return PCReg; + } + + const MCRegisterDesc &operator[](unsigned RegNo) const { + assert(RegNo < NumRegs && + "Attempting to access record for invalid register number!"); + return Desc[RegNo]; + } + + /// \brief Provide a get method, equivalent to [], but more useful with a + /// pointer to this object. + const MCRegisterDesc &get(unsigned RegNo) const { + return operator[](RegNo); + } + + /// \brief Returns the physical register number of sub-register "Index" + /// for physical register RegNo. Return zero if the sub-register does not + /// exist. + unsigned getSubReg(unsigned Reg, unsigned Idx) const; + + /// \brief Return a super-register of the specified register + /// Reg so its sub-register of index SubIdx is Reg. + unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, + const MCRegisterClass *RC) const; + + /// \brief For a given register pair, return the sub-register index + /// if the second register is a sub-register of the first. Return zero + /// otherwise. + unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const; + + /// \brief Get the size of the bit range covered by a sub-register index. + /// If the index isn't continuous, return the sum of the sizes of its parts. + /// If the index is used to access subregisters of different sizes, return -1. + unsigned getSubRegIdxSize(unsigned Idx) const; + + /// \brief Get the offset of the bit range covered by a sub-register index. + /// If an Offset doesn't make sense (the index isn't continuous, or is used to + /// access sub-registers at different offsets), return -1. + unsigned getSubRegIdxOffset(unsigned Idx) const; + + /// \brief Return the human-readable symbolic target-specific name for the + /// specified physical register. + const char *getName(unsigned RegNo) const { + return RegStrings + get(RegNo).Name; + } + + /// \brief Return the number of registers this target has (useful for + /// sizing arrays holding per register information) + unsigned getNumRegs() const { + return NumRegs; + } + + /// \brief Return the number of sub-register indices + /// understood by the target. Index 0 is reserved for the no-op sub-register, + /// while 1 to getNumSubRegIndices() - 1 represent real sub-registers. + unsigned getNumSubRegIndices() const { + return NumSubRegIndices; + } + + /// \brief Return the number of (native) register units in the + /// target. Register units are numbered from 0 to getNumRegUnits() - 1. They + /// can be accessed through MCRegUnitIterator defined below. + unsigned getNumRegUnits() const { + return NumRegUnits; + } + + /// \brief Map a target register to an equivalent dwarf register + /// number. Returns -1 if there is no equivalent value. The second + /// parameter allows targets to use different numberings for EH info and + /// debugging info. + int getDwarfRegNum(unsigned RegNum, bool isEH) const; + + /// \brief Map a dwarf register back to a target register. + int getLLVMRegNum(unsigned RegNum, bool isEH) const; + + /// \brief Map a target register to an equivalent SEH register + /// number. Returns LLVM register number if there is no equivalent value. + int getSEHRegNum(unsigned RegNum) const; + + regclass_iterator regclass_begin() const { return Classes; } + regclass_iterator regclass_end() const { return Classes+NumClasses; } + + unsigned getNumRegClasses() const { + return (unsigned)(regclass_end()-regclass_begin()); + } + + /// \brief Returns the register class associated with the enumeration + /// value. See class MCOperandInfo. + const MCRegisterClass& getRegClass(unsigned i) const { + assert(i < getNumRegClasses() && "Register Class ID out of range"); + return Classes[i]; + } + + const char *getRegClassName(const MCRegisterClass *Class) const { + return RegClassStrings + Class->NameIdx; + } + + /// \brief Returns the encoding for RegNo + uint16_t getEncodingValue(unsigned RegNo) const { + assert(RegNo < NumRegs && + "Attempting to get encoding for invalid register number!"); + return RegEncodingTable[RegNo]; + } + + /// \brief Returns true if RegB is a sub-register of RegA. + bool isSubRegister(unsigned RegA, unsigned RegB) const { + return isSuperRegister(RegB, RegA); + } + + /// \brief Returns true if RegB is a super-register of RegA. + bool isSuperRegister(unsigned RegA, unsigned RegB) const; + + /// \brief Returns true if RegB is a sub-register of RegA or if RegB == RegA. + bool isSubRegisterEq(unsigned RegA, unsigned RegB) const { + return isSuperRegisterEq(RegB, RegA); + } + + /// \brief Returns true if RegB is a super-register of RegA or if + /// RegB == RegA. + bool isSuperRegisterEq(unsigned RegA, unsigned RegB) const { + return RegA == RegB || isSuperRegister(RegA, RegB); + } + + /// \brief Returns true if RegB is a super-register or sub-register of RegA + /// or if RegB == RegA. + bool isSuperOrSubRegisterEq(unsigned RegA, unsigned RegB) const { + return isSubRegisterEq(RegA, RegB) || isSuperRegister(RegA, RegB); + } +}; + +//===----------------------------------------------------------------------===// +// Register List Iterators +//===----------------------------------------------------------------------===// + +// MCRegisterInfo provides lists of super-registers, sub-registers, and +// aliasing registers. Use these iterator classes to traverse the lists. + +/// MCSubRegIterator enumerates all sub-registers of Reg. +/// If IncludeSelf is set, Reg itself is included in the list. +class MCSubRegIterator : public MCRegisterInfo::DiffListIterator { +public: + MCSubRegIterator(unsigned Reg, const MCRegisterInfo *MCRI, + bool IncludeSelf = false) { + init(Reg, MCRI->DiffLists + MCRI->get(Reg).SubRegs); + // Initially, the iterator points to Reg itself. + if (!IncludeSelf) + ++*this; + } +}; + +/// Iterator that enumerates the sub-registers of a Reg and the associated +/// sub-register indices. +class MCSubRegIndexIterator { + MCSubRegIterator SRIter; + const uint16_t *SRIndex; +public: + /// Constructs an iterator that traverses subregisters and their + /// associated subregister indices. + MCSubRegIndexIterator(unsigned Reg, const MCRegisterInfo *MCRI) + : SRIter(Reg, MCRI) { + SRIndex = MCRI->SubRegIndices + MCRI->get(Reg).SubRegIndices; + } + + /// Returns current sub-register. + unsigned getSubReg() const { + return *SRIter; + } + /// Returns sub-register index of the current sub-register. + unsigned getSubRegIndex() const { + return *SRIndex; + } + + /// Returns true if this iterator is not yet at the end. + bool isValid() const { return SRIter.isValid(); } + + /// Moves to the next position. + void operator++() { + ++SRIter; + ++SRIndex; + } +}; + +/// MCSuperRegIterator enumerates all super-registers of Reg. +/// If IncludeSelf is set, Reg itself is included in the list. +class MCSuperRegIterator : public MCRegisterInfo::DiffListIterator { +public: + MCSuperRegIterator() {} + MCSuperRegIterator(unsigned Reg, const MCRegisterInfo *MCRI, + bool IncludeSelf = false) { + init(Reg, MCRI->DiffLists + MCRI->get(Reg).SuperRegs); + // Initially, the iterator points to Reg itself. + if (!IncludeSelf) + ++*this; + } +}; + +// Definition for isSuperRegister. Put it down here since it needs the +// iterator defined above in addition to the MCRegisterInfo class itself. +inline bool MCRegisterInfo::isSuperRegister(unsigned RegA, unsigned RegB) const{ + for (MCSuperRegIterator I(RegA, this); I.isValid(); ++I) + if (*I == RegB) + return true; + return false; +} + +//===----------------------------------------------------------------------===// +// Register Units +//===----------------------------------------------------------------------===// + +// Register units are used to compute register aliasing. Every register has at +// least one register unit, but it can have more. Two registers overlap if and +// only if they have a common register unit. +// +// A target with a complicated sub-register structure will typically have many +// fewer register units than actual registers. MCRI::getNumRegUnits() returns +// the number of register units in the target. + +// MCRegUnitIterator enumerates a list of register units for Reg. The list is +// in ascending numerical order. +class MCRegUnitIterator : public MCRegisterInfo::DiffListIterator { +public: + /// MCRegUnitIterator - Create an iterator that traverses the register units + /// in Reg. + MCRegUnitIterator() {} + MCRegUnitIterator(unsigned Reg, const MCRegisterInfo *MCRI) { + assert(Reg && "Null register has no regunits"); + // Decode the RegUnits MCRegisterDesc field. + unsigned RU = MCRI->get(Reg).RegUnits; + unsigned Scale = RU & 15; + unsigned Offset = RU >> 4; + + // Initialize the iterator to Reg * Scale, and the List pointer to + // DiffLists + Offset. + init(Reg * Scale, MCRI->DiffLists + Offset); + + // That may not be a valid unit, we need to advance by one to get the real + // unit number. The first differential can be 0 which would normally + // terminate the list, but since we know every register has at least one + // unit, we can allow a 0 differential here. + advance(); + } +}; + +/// MCRegUnitIterator enumerates a list of register units and their associated +/// lane masks for Reg. The register units are in ascending numerical order. +class MCRegUnitMaskIterator { + MCRegUnitIterator RUIter; + const unsigned *MaskListIter; +public: + MCRegUnitMaskIterator() {} + /// Constructs an iterator that traverses the register units and their + /// associated LaneMasks in Reg. + MCRegUnitMaskIterator(unsigned Reg, const MCRegisterInfo *MCRI) + : RUIter(Reg, MCRI) { + uint16_t Idx = MCRI->get(Reg).RegUnitLaneMasks; + MaskListIter = &MCRI->RegUnitMaskSequences[Idx]; + } + + /// Returns a (RegUnit, LaneMask) pair. + std::pair operator*() const { + return std::make_pair(*RUIter, *MaskListIter); + } + + /// Returns true if this iterator is not yet at the end. + bool isValid() const { return RUIter.isValid(); } + + /// Moves to the next position. + void operator++() { + ++MaskListIter; + ++RUIter; + } +}; + +// Each register unit has one or two root registers. The complete set of +// registers containing a register unit is the union of the roots and their +// super-registers. All registers aliasing Unit can be visited like this: +// +// for (MCRegUnitRootIterator RI(Unit, MCRI); RI.isValid(); ++RI) { +// for (MCSuperRegIterator SI(*RI, MCRI, true); SI.isValid(); ++SI) +// visit(*SI); +// } + +/// MCRegUnitRootIterator enumerates the root registers of a register unit. +class MCRegUnitRootIterator { + uint16_t Reg0; + uint16_t Reg1; +public: + MCRegUnitRootIterator() : Reg0(0), Reg1(0) {} + MCRegUnitRootIterator(unsigned RegUnit, const MCRegisterInfo *MCRI) { + assert(RegUnit < MCRI->getNumRegUnits() && "Invalid register unit"); + Reg0 = MCRI->RegUnitRoots[RegUnit][0]; + Reg1 = MCRI->RegUnitRoots[RegUnit][1]; + } + + /// \brief Dereference to get the current root register. + unsigned operator*() const { + return Reg0; + } + + /// \brief Check if the iterator is at the end of the list. + bool isValid() const { + return Reg0; + } + + /// \brief Preincrement to move to the next root register. + void operator++() { + assert(isValid() && "Cannot move off the end of the list."); + Reg0 = Reg1; + Reg1 = 0; + } +}; + +/// MCRegAliasIterator enumerates all registers aliasing Reg. If IncludeSelf is +/// set, Reg itself is included in the list. This iterator does not guarantee +/// any ordering or that entries are unique. +class MCRegAliasIterator { +private: + unsigned Reg; + const MCRegisterInfo *MCRI; + bool IncludeSelf; + + MCRegUnitIterator RI; + MCRegUnitRootIterator RRI; + MCSuperRegIterator SI; +public: + MCRegAliasIterator(unsigned Reg, const MCRegisterInfo *MCRI, + bool IncludeSelf) + : Reg(Reg), MCRI(MCRI), IncludeSelf(IncludeSelf) { + + // Initialize the iterators. + for (RI = MCRegUnitIterator(Reg, MCRI); RI.isValid(); ++RI) { + for (RRI = MCRegUnitRootIterator(*RI, MCRI); RRI.isValid(); ++RRI) { + for (SI = MCSuperRegIterator(*RRI, MCRI, true); SI.isValid(); ++SI) { + if (!(!IncludeSelf && Reg == *SI)) + return; + } + } + } + } + + bool isValid() const { return RI.isValid(); } + + unsigned operator*() const { + assert (SI.isValid() && "Cannot dereference an invalid iterator."); + return *SI; + } + + void advance() { + // Assuming SI is valid. + ++SI; + if (SI.isValid()) return; + + ++RRI; + if (RRI.isValid()) { + SI = MCSuperRegIterator(*RRI, MCRI, true); + return; + } + + ++RI; + if (RI.isValid()) { + RRI = MCRegUnitRootIterator(*RI, MCRI); + SI = MCSuperRegIterator(*RRI, MCRI, true); + } + } + + void operator++() { + assert(isValid() && "Cannot move off the end of the list."); + do advance(); + while (!IncludeSelf && isValid() && *SI == Reg); + } +}; + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/MC/MCSchedule.h b/llvm/include/llvm/MC/MCSchedule.h new file mode 100644 index 0000000..edb1a9c --- /dev/null +++ b/llvm/include/llvm/MC/MCSchedule.h @@ -0,0 +1,233 @@ +//===-- llvm/MC/MCSchedule.h - Scheduling -----------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the classes used to describe a subtarget's machine model +// for scheduling and other instruction cost heuristics. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCSCHEDULE_H +#define LLVM_MC_MCSCHEDULE_H + +#include "llvm/Support/DataTypes.h" +#include + +namespace llvm_ks { + +struct InstrItinerary; + +/// Define a kind of processor resource that will be modeled by the scheduler. +struct MCProcResourceDesc { +#ifndef NDEBUG + const char *Name; +#endif + unsigned NumUnits; // Number of resource of this kind + unsigned SuperIdx; // Index of the resources kind that contains this kind. + + // Number of resources that may be buffered. + // + // Buffered resources (BufferSize != 0) may be consumed at some indeterminate + // cycle after dispatch. This should be used for out-of-order cpus when + // instructions that use this resource can be buffered in a reservaton + // station. + // + // Unbuffered resources (BufferSize == 0) always consume their resource some + // fixed number of cycles after dispatch. If a resource is unbuffered, then + // the scheduler will avoid scheduling instructions with conflicting resources + // in the same cycle. This is for in-order cpus, or the in-order portion of + // an out-of-order cpus. + int BufferSize; + + bool operator==(const MCProcResourceDesc &Other) const { + return NumUnits == Other.NumUnits && SuperIdx == Other.SuperIdx + && BufferSize == Other.BufferSize; + } +}; + +/// Identify one of the processor resource kinds consumed by a particular +/// scheduling class for the specified number of cycles. +struct MCWriteProcResEntry { + unsigned ProcResourceIdx; + unsigned Cycles; + + bool operator==(const MCWriteProcResEntry &Other) const { + return ProcResourceIdx == Other.ProcResourceIdx && Cycles == Other.Cycles; + } +}; + +/// Specify the latency in cpu cycles for a particular scheduling class and def +/// index. -1 indicates an invalid latency. Heuristics would typically consider +/// an instruction with invalid latency to have infinite latency. Also identify +/// the WriteResources of this def. When the operand expands to a sequence of +/// writes, this ID is the last write in the sequence. +struct MCWriteLatencyEntry { + int Cycles; + unsigned WriteResourceID; + + bool operator==(const MCWriteLatencyEntry &Other) const { + return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID; + } +}; + +/// Specify the number of cycles allowed after instruction issue before a +/// particular use operand reads its registers. This effectively reduces the +/// write's latency. Here we allow negative cycles for corner cases where +/// latency increases. This rule only applies when the entry's WriteResource +/// matches the write's WriteResource. +/// +/// MCReadAdvanceEntries are sorted first by operand index (UseIdx), then by +/// WriteResourceIdx. +struct MCReadAdvanceEntry { + unsigned UseIdx; + unsigned WriteResourceID; + int Cycles; + + bool operator==(const MCReadAdvanceEntry &Other) const { + return UseIdx == Other.UseIdx && WriteResourceID == Other.WriteResourceID + && Cycles == Other.Cycles; + } +}; + +/// Summarize the scheduling resources required for an instruction of a +/// particular scheduling class. +/// +/// Defined as an aggregate struct for creating tables with initializer lists. +struct MCSchedClassDesc { + static const unsigned short InvalidNumMicroOps = UINT16_MAX; + static const unsigned short VariantNumMicroOps = UINT16_MAX - 1; + +#ifndef NDEBUG + const char* Name; +#endif + unsigned short NumMicroOps; + bool BeginGroup; + bool EndGroup; + unsigned WriteProcResIdx; // First index into WriteProcResTable. + unsigned NumWriteProcResEntries; + unsigned WriteLatencyIdx; // First index into WriteLatencyTable. + unsigned NumWriteLatencyEntries; + unsigned ReadAdvanceIdx; // First index into ReadAdvanceTable. + unsigned NumReadAdvanceEntries; + + bool isValid() const { + return NumMicroOps != InvalidNumMicroOps; + } + bool isVariant() const { + return NumMicroOps == VariantNumMicroOps; + } +}; + +/// Machine model for scheduling, bundling, and heuristics. +/// +/// The machine model directly provides basic information about the +/// microarchitecture to the scheduler in the form of properties. It also +/// optionally refers to scheduler resource tables and itinerary +/// tables. Scheduler resource tables model the latency and cost for each +/// instruction type. Itinerary tables are an independent mechanism that +/// provides a detailed reservation table describing each cycle of instruction +/// execution. Subtargets may define any or all of the above categories of data +/// depending on the type of CPU and selected scheduler. +struct MCSchedModel { + // IssueWidth is the maximum number of instructions that may be scheduled in + // the same per-cycle group. + unsigned IssueWidth; + static const unsigned DefaultIssueWidth = 1; + + // MicroOpBufferSize is the number of micro-ops that the processor may buffer + // for out-of-order execution. + // + // "0" means operations that are not ready in this cycle are not considered + // for scheduling (they go in the pending queue). Latency is paramount. This + // may be more efficient if many instructions are pending in a schedule. + // + // "1" means all instructions are considered for scheduling regardless of + // whether they are ready in this cycle. Latency still causes issue stalls, + // but we balance those stalls against other heuristics. + // + // "> 1" means the processor is out-of-order. This is a machine independent + // estimate of highly machine specific characteristics such as the register + // renaming pool and reorder buffer. + unsigned MicroOpBufferSize; + static const unsigned DefaultMicroOpBufferSize = 0; + + // LoopMicroOpBufferSize is the number of micro-ops that the processor may + // buffer for optimized loop execution. More generally, this represents the + // optimal number of micro-ops in a loop body. A loop may be partially + // unrolled to bring the count of micro-ops in the loop body closer to this + // number. + unsigned LoopMicroOpBufferSize; + static const unsigned DefaultLoopMicroOpBufferSize = 0; + + // LoadLatency is the expected latency of load instructions. + // + // If MinLatency >= 0, this may be overriden for individual load opcodes by + // InstrItinerary OperandCycles. + unsigned LoadLatency; + static const unsigned DefaultLoadLatency = 4; + + // HighLatency is the expected latency of "very high latency" operations. + // See TargetInstrInfo::isHighLatencyDef(). + // By default, this is set to an arbitrarily high number of cycles + // likely to have some impact on scheduling heuristics. + // If MinLatency >= 0, this may be overriden by InstrItinData OperandCycles. + unsigned HighLatency; + static const unsigned DefaultHighLatency = 10; + + // MispredictPenalty is the typical number of extra cycles the processor + // takes to recover from a branch misprediction. + unsigned MispredictPenalty; + static const unsigned DefaultMispredictPenalty = 10; + + bool PostRAScheduler; // default value is false + + bool CompleteModel; + + unsigned ProcID; + const MCProcResourceDesc *ProcResourceTable; + const MCSchedClassDesc *SchedClassTable; + unsigned NumProcResourceKinds; + unsigned NumSchedClasses; + // Instruction itinerary tables used by InstrItineraryData. + friend class InstrItineraryData; + const InstrItinerary *InstrItineraries; + + unsigned getProcessorID() const { return ProcID; } + + /// Does this machine model include instruction-level scheduling. + bool hasInstrSchedModel() const { return SchedClassTable; } + + /// Return true if this machine model data for all instructions with a + /// scheduling class (itinerary class or SchedRW list). + bool isComplete() const { return CompleteModel; } + + /// Return true if machine supports out of order execution. + bool isOutOfOrder() const { return MicroOpBufferSize > 1; } + + unsigned getNumProcResourceKinds() const { + return NumProcResourceKinds; + } + + const MCProcResourceDesc *getProcResource(unsigned ProcResourceIdx) const { + assert(hasInstrSchedModel() && "No scheduling machine model"); + + assert(ProcResourceIdx < NumProcResourceKinds && "bad proc resource idx"); + return &ProcResourceTable[ProcResourceIdx]; + } + + const MCSchedClassDesc *getSchedClassDesc(unsigned SchedClassIdx) const { + assert(hasInstrSchedModel() && "No scheduling machine model"); + + assert(SchedClassIdx < NumSchedClasses && "bad scheduling class idx"); + return &SchedClassTable[SchedClassIdx]; + } +}; + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/MC/MCSection.h b/llvm/include/llvm/MC/MCSection.h new file mode 100644 index 0000000..770165f --- /dev/null +++ b/llvm/include/llvm/MC/MCSection.h @@ -0,0 +1,203 @@ +//===- MCSection.h - Machine Code Sections ----------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the MCSection class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCSECTION_H +#define LLVM_MC_MCSECTION_H + +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/ADT/ilist.h" +#include "llvm/ADT/ilist_node.h" +#include "llvm/MC/MCFragment.h" +#include "llvm/MC/SectionKind.h" +#include "llvm/Support/Compiler.h" + +namespace llvm_ks { +class MCAsmInfo; +class MCAssembler; +class MCContext; +class MCExpr; +class MCFragment; +class MCSection; +class MCSymbol; +class raw_ostream; + +template<> +struct ilist_node_traits { + MCFragment *createNode(const MCFragment &V); + static void deleteNode(MCFragment *V); + + void addNodeToList(MCFragment *) {} + void removeNodeFromList(MCFragment *) {} + void transferNodesFromList(ilist_node_traits & /*SrcTraits*/, + ilist_iterator /*first*/, + ilist_iterator /*last*/) {} +}; + +/// Instances of this class represent a uniqued identifier for a section in the +/// current translation unit. The MCContext class uniques and creates these. +class MCSection { +public: + enum SectionVariant { SV_COFF = 0, SV_ELF, SV_MachO }; + + /// \brief Express the state of bundle locked groups while emitting code. + enum BundleLockStateType { + NotBundleLocked, + BundleLocked, + BundleLockedAlignToEnd + }; + + typedef iplist FragmentListType; + + typedef FragmentListType::const_iterator const_iterator; + typedef FragmentListType::iterator iterator; + + typedef FragmentListType::const_reverse_iterator const_reverse_iterator; + typedef FragmentListType::reverse_iterator reverse_iterator; + +private: + MCSection(const MCSection &) = delete; + void operator=(const MCSection &) = delete; + + MCSymbol *Begin; + MCSymbol *End = nullptr; + /// The alignment requirement of this section. + unsigned Alignment = 1; + /// The section index in the assemblers section list. + unsigned Ordinal = 0; + /// The index of this section in the layout order. + unsigned LayoutOrder; + + /// \brief Keeping track of bundle-locked state. + BundleLockStateType BundleLockState = NotBundleLocked; + + /// \brief Current nesting depth of bundle_lock directives. + unsigned BundleLockNestingDepth = 0; + + /// \brief We've seen a bundle_lock directive but not its first instruction + /// yet. + unsigned BundleGroupBeforeFirstInst : 1; + + /// Whether this section has had instructions emitted into it. + unsigned HasInstructions : 1; + + unsigned IsRegistered : 1; + + MCDummyFragment DummyFragment; + + FragmentListType Fragments; + + /// Mapping from subsection number to insertion point for subsection numbers + /// below that number. + SmallVector, 1> SubsectionFragmentMap; + +protected: + MCSection(SectionVariant V, SectionKind K, MCSymbol *Begin); + SectionVariant Variant; + SectionKind Kind; + ~MCSection(); + +public: + SectionKind getKind() const { return Kind; } + + SectionVariant getVariant() const { return Variant; } + + MCSymbol *getBeginSymbol() { return Begin; } + const MCSymbol *getBeginSymbol() const { + return const_cast(this)->getBeginSymbol(); + } + void setBeginSymbol(MCSymbol *Sym) { + assert(!Begin); + Begin = Sym; + } + MCSymbol *getEndSymbol(MCContext &Ctx); + bool hasEnded() const; + + unsigned getAlignment() const { return Alignment; } + void setAlignment(unsigned Value) { Alignment = Value; } + + unsigned getOrdinal() const { return Ordinal; } + void setOrdinal(unsigned Value) { Ordinal = Value; } + + unsigned getLayoutOrder() const { return LayoutOrder; } + void setLayoutOrder(unsigned Value) { LayoutOrder = Value; } + + BundleLockStateType getBundleLockState() const { return BundleLockState; } + void setBundleLockState(BundleLockStateType NewState); + bool isBundleLocked() const { return BundleLockState != NotBundleLocked; } + + bool isBundleGroupBeforeFirstInst() const { + return BundleGroupBeforeFirstInst; + } + void setBundleGroupBeforeFirstInst(bool IsFirst) { + BundleGroupBeforeFirstInst = IsFirst; + } + + bool hasInstructions() const { return HasInstructions; } + void setHasInstructions(bool Value) { HasInstructions = Value; } + + bool isRegistered() const { return IsRegistered; } + void setIsRegistered(bool Value) { IsRegistered = Value; } + + MCSection::FragmentListType &getFragmentList() { return Fragments; } + const MCSection::FragmentListType &getFragmentList() const { + return const_cast(this)->getFragmentList(); + } + + /// Support for MCFragment::getNextNode(). + static FragmentListType MCSection::*getSublistAccess(MCFragment *) { + return &MCSection::Fragments; + } + + const MCDummyFragment &getDummyFragment() const { return DummyFragment; } + MCDummyFragment &getDummyFragment() { return DummyFragment; } + + MCSection::iterator begin(); + MCSection::const_iterator begin() const { + return const_cast(this)->begin(); + } + + MCSection::iterator end(); + MCSection::const_iterator end() const { + return const_cast(this)->end(); + } + + MCSection::reverse_iterator rbegin(); + MCSection::const_reverse_iterator rbegin() const { + return const_cast(this)->rbegin(); + } + + MCSection::reverse_iterator rend(); + MCSection::const_reverse_iterator rend() const { + return const_cast(this)->rend(); + } + + MCSection::iterator getSubsectionInsertionPoint(unsigned Subsection); + + void dump(); + + virtual void PrintSwitchToSection(const MCAsmInfo &MAI, raw_ostream &OS, + const MCExpr *Subsection) const = 0; + + /// Return true if a .align directive should use "optimized nops" to fill + /// instead of 0s. + virtual bool UseCodeAlign() const = 0; + + /// Check whether this section is "virtual", that is has no actual object + /// file contents. + virtual bool isVirtualSection() const = 0; +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCSectionCOFF.h b/llvm/include/llvm/MC/MCSectionCOFF.h new file mode 100644 index 0000000..2076ef3 --- /dev/null +++ b/llvm/include/llvm/MC/MCSectionCOFF.h @@ -0,0 +1,79 @@ +//===- MCSectionCOFF.h - COFF Machine Code Sections -------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the MCSectionCOFF class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCSECTIONCOFF_H +#define LLVM_MC_MCSECTIONCOFF_H + +#include "llvm/ADT/StringRef.h" +#include "llvm/MC/MCSection.h" + +namespace llvm_ks { +class MCSymbol; + +/// This represents a section on Windows +class MCSectionCOFF final : public MCSection { + // The memory for this string is stored in the same MCContext as *this. + StringRef SectionName; + + // FIXME: The following fields should not be mutable, but are for now so the + // asm parser can honor the .linkonce directive. + + /// This is the Characteristics field of a section, drawn from the enums + /// below. + mutable unsigned Characteristics; + + /// The COMDAT symbol of this section. Only valid if this is a COMDAT section. + /// Two COMDAT sections are merged if they have the same COMDAT symbol. + MCSymbol *COMDATSymbol; + + /// This is the Selection field for the section symbol, if it is a COMDAT + /// section (Characteristics & IMAGE_SCN_LNK_COMDAT) != 0 + mutable int Selection; + +private: + friend class MCContext; + MCSectionCOFF(StringRef Section, unsigned Characteristics, + MCSymbol *COMDATSymbol, int Selection, SectionKind K, + MCSymbol *Begin) + : MCSection(SV_COFF, K, Begin), SectionName(Section), + Characteristics(Characteristics), COMDATSymbol(COMDATSymbol), + Selection(Selection) { + assert((Characteristics & 0x00F00000) == 0 && + "alignment must not be set upon section creation"); + } + +public: + ~MCSectionCOFF(); + + /// Decides whether a '.section' directive should be printed before the + /// section name + bool ShouldOmitSectionDirective(StringRef Name, const MCAsmInfo &MAI) const; + + StringRef getSectionName() const { return SectionName; } + unsigned getCharacteristics() const { return Characteristics; } + MCSymbol *getCOMDATSymbol() const { return COMDATSymbol; } + int getSelection() const { return Selection; } + + void setSelection(int Selection) const; + + void PrintSwitchToSection(const MCAsmInfo &MAI, raw_ostream &OS, + const MCExpr *Subsection) const override; + bool UseCodeAlign() const override; + bool isVirtualSection() const override; + + static bool classof(const MCSection *S) { return S->getVariant() == SV_COFF; } +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCSectionELF.h b/llvm/include/llvm/MC/MCSectionELF.h new file mode 100644 index 0000000..92028fb --- /dev/null +++ b/llvm/include/llvm/MC/MCSectionELF.h @@ -0,0 +1,97 @@ +//===- MCSectionELF.h - ELF Machine Code Sections ---------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the MCSectionELF class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCSECTIONELF_H +#define LLVM_MC_MCSECTIONELF_H + +#include "llvm/ADT/Twine.h" +#include "llvm/MC/MCSection.h" +#include "llvm/MC/MCSymbolELF.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/ELF.h" +#include "llvm/Support/raw_ostream.h" + +namespace llvm_ks { + +class MCSymbol; + +/// This represents a section on linux, lots of unix variants and some bare +/// metal systems. +class MCSectionELF final : public MCSection { + /// This is the name of the section. The referenced memory is owned by + /// TargetLoweringObjectFileELF's ELFUniqueMap. + StringRef SectionName; + + /// This is the sh_type field of a section, drawn from the enums below. + unsigned Type; + + /// This is the sh_flags field of a section, drawn from the enums below. + unsigned Flags; + + unsigned UniqueID; + + /// The size of each entry in this section. This size only makes sense for + /// sections that contain fixed-sized entries. If a section does not contain + /// fixed-sized entries 'EntrySize' will be 0. + unsigned EntrySize; + + const MCSymbolELF *Group; + + /// Depending on the type of the section this is sh_link or sh_info. + const MCSectionELF *Associated; + +private: + friend class MCContext; + MCSectionELF(StringRef Section, unsigned type, unsigned flags, SectionKind K, + unsigned entrySize, const MCSymbolELF *group, unsigned UniqueID, + MCSymbol *Begin, const MCSectionELF *Associated) + : MCSection(SV_ELF, K, Begin), SectionName(Section), Type(type), + Flags(flags), UniqueID(UniqueID), EntrySize(entrySize), Group(group), + Associated(Associated) { + if (Group) + Group->setIsSignature(); + } + + void setSectionName(StringRef Name) { SectionName = Name; } + +public: + ~MCSectionELF(); + + /// Decides whether a '.section' directive should be printed before the + /// section name + bool ShouldOmitSectionDirective(StringRef Name, const MCAsmInfo &MAI) const; + + StringRef getSectionName() const { return SectionName; } + unsigned getType() const { return Type; } + unsigned getFlags() const { return Flags; } + unsigned getEntrySize() const { return EntrySize; } + const MCSymbolELF *getGroup() const { return Group; } + + void PrintSwitchToSection(const MCAsmInfo &MAI, raw_ostream &OS, + const MCExpr *Subsection) const override; + bool UseCodeAlign() const override; + bool isVirtualSection() const override; + + bool isUnique() const { return UniqueID != ~0U; } + unsigned getUniqueID() const { return UniqueID; } + + const MCSectionELF *getAssociatedSection() const { return Associated; } + + static bool classof(const MCSection *S) { + return S->getVariant() == SV_ELF; + } +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCSectionMachO.h b/llvm/include/llvm/MC/MCSectionMachO.h new file mode 100644 index 0000000..109767c --- /dev/null +++ b/llvm/include/llvm/MC/MCSectionMachO.h @@ -0,0 +1,91 @@ +//===- MCSectionMachO.h - MachO Machine Code Sections -----------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the MCSectionMachO class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCSECTIONMACHO_H +#define LLVM_MC_MCSECTIONMACHO_H + +#include "llvm/ADT/StringRef.h" +#include "llvm/MC/MCSection.h" +#include "llvm/Support/MachO.h" + +namespace llvm_ks { + +/// This represents a section on a Mach-O system (used by Mac OS X). On a Mac +/// system, these are also described in /usr/include/mach-o/loader.h. +class MCSectionMachO final : public MCSection { + char SegmentName[16]; // Not necessarily null terminated! + char SectionName[16]; // Not necessarily null terminated! + + /// This is the SECTION_TYPE and SECTION_ATTRIBUTES field of a section, drawn + /// from the enums below. + unsigned TypeAndAttributes; + + /// The 'reserved2' field of a section, used to represent the size of stubs, + /// for example. + unsigned Reserved2; + + MCSectionMachO(StringRef Segment, StringRef Section, unsigned TAA, + unsigned reserved2, SectionKind K, MCSymbol *Begin); + friend class MCContext; +public: + + StringRef getSegmentName() const { + // SegmentName is not necessarily null terminated! + if (SegmentName[15]) + return StringRef(SegmentName, 16); + return StringRef(SegmentName); + } + StringRef getSectionName() const { + // SectionName is not necessarily null terminated! + if (SectionName[15]) + return StringRef(SectionName, 16); + return StringRef(SectionName); + } + + unsigned getTypeAndAttributes() const { return TypeAndAttributes; } + unsigned getStubSize() const { return Reserved2; } + + MachO::SectionType getType() const { + return static_cast(TypeAndAttributes & + MachO::SECTION_TYPE); + } + bool hasAttribute(unsigned Value) const { + return (TypeAndAttributes & Value) != 0; + } + + /// Parse the section specifier indicated by "Spec". This is a string that can + /// appear after a .section directive in a mach-o flavored .s file. If + /// successful, this fills in the specified Out parameters and returns an + /// empty string. When an invalid section specifier is present, this returns + /// a string indicating the problem. If no TAA was parsed, TAA is not altered, + /// and TAAWasSet becomes false. + static std::string ParseSectionSpecifier(StringRef Spec, // In. + StringRef &Segment, // Out. + StringRef &Section, // Out. + unsigned &TAA, // Out. + bool &TAAParsed, // Out. + unsigned &StubSize); // Out. + + void PrintSwitchToSection(const MCAsmInfo &MAI, raw_ostream &OS, + const MCExpr *Subsection) const override; + bool UseCodeAlign() const override; + bool isVirtualSection() const override; + + static bool classof(const MCSection *S) { + return S->getVariant() == SV_MachO; + } +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCStreamer.h b/llvm/include/llvm/MC/MCStreamer.h new file mode 100644 index 0000000..72621e9 --- /dev/null +++ b/llvm/include/llvm/MC/MCStreamer.h @@ -0,0 +1,779 @@ +//===- MCStreamer.h - High-level Streaming Machine Code Output --*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the MCStreamer class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCSTREAMER_H +#define LLVM_MC_MCSTREAMER_H + +#include "llvm/ADT/ArrayRef.h" +#include "llvm/ADT/SmallVector.h" +#include "llvm/MC/MCDirectives.h" +#include "llvm/MC/MCDwarf.h" +#include "llvm/MC/MCLinkerOptimizationHint.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/MC/MCWinEH.h" +#include "llvm/Support/DataTypes.h" +#include "llvm/Support/SMLoc.h" + +#include + +namespace llvm_ks { +class MCAsmBackend; +class MCCodeEmitter; +class MCContext; +class MCExpr; +class MCInst; +class MCSection; +class MCStreamer; +class MCSymbolELF; +class MCSymbolRefExpr; +class MCSubtargetInfo; +class StringRef; +class Twine; +class raw_ostream; +class formatted_raw_ostream; +class AssemblerConstantPools; + +typedef std::pair MCSectionSubPair; + +/// Target specific streamer interface. This is used so that targets can +/// implement support for target specific assembly directives. +/// +/// If target foo wants to use this, it should implement 3 classes: +/// * FooTargetStreamer : public MCTargetStreamer +/// * FooTargetAsmStreamer : public FooTargetStreamer +/// * FooTargetELFStreamer : public FooTargetStreamer +/// +/// FooTargetStreamer should have a pure virtual method for each directive. For +/// example, for a ".bar symbol_name" directive, it should have +/// virtual emitBar(const MCSymbol &Symbol) = 0; +/// +/// The FooTargetAsmStreamer and FooTargetELFStreamer classes implement the +/// method. The assembly streamer just prints ".bar symbol_name". The object +/// streamer does whatever is needed to implement .bar in the object file. +/// +/// In the assembly printer and parser the target streamer can be used by +/// calling getTargetStreamer and casting it to FooTargetStreamer: +/// +/// MCTargetStreamer &TS = OutStreamer.getTargetStreamer(); +/// FooTargetStreamer &ATS = static_cast(TS); +/// +/// The base classes FooTargetAsmStreamer and FooTargetELFStreamer should +/// *never* be treated differently. Callers should always talk to a +/// FooTargetStreamer. +class MCTargetStreamer { +protected: + MCStreamer &Streamer; + +public: + MCTargetStreamer(MCStreamer &S); + virtual ~MCTargetStreamer(); + + MCStreamer &getStreamer() { return Streamer; } + + // Allow a target to add behavior to the EmitLabel of MCStreamer. + virtual void emitLabel(MCSymbol *Symbol); + // Allow a target to add behavior to the emitAssignment of MCStreamer. + virtual void emitAssignment(MCSymbol *Symbol, const MCExpr *Value); + + virtual void finish(); +}; + +// FIXME: declared here because it is used from +// lib/CodeGen/AsmPrinter/ARMException.cpp. +class ARMTargetStreamer : public MCTargetStreamer { +public: + ARMTargetStreamer(MCStreamer &S); + ~ARMTargetStreamer() override; + + virtual void emitFnStart(); + virtual void emitFnEnd(); + virtual void emitCantUnwind(); + virtual void emitPersonality(const MCSymbol *Personality); + virtual void emitPersonalityIndex(unsigned Index); + virtual void emitHandlerData(); + virtual void emitSetFP(unsigned FpReg, unsigned SpReg, + int64_t Offset = 0); + virtual void emitMovSP(unsigned Reg, int64_t Offset = 0); + virtual void emitPad(int64_t Offset); + virtual void emitRegSave(const SmallVectorImpl &RegList, + bool isVector); + virtual void emitUnwindRaw(int64_t StackOffset, + const SmallVectorImpl &Opcodes); + + virtual void switchVendor(StringRef Vendor); + virtual void emitAttribute(unsigned Attribute, unsigned Value); + virtual void emitTextAttribute(unsigned Attribute, StringRef String); + virtual void emitIntTextAttribute(unsigned Attribute, unsigned IntValue, + StringRef StringValue = ""); + virtual void emitFPU(unsigned FPU); + virtual void emitArch(unsigned Arch); + virtual void emitArchExtension(unsigned ArchExt); + virtual void emitObjectArch(unsigned Arch); + virtual void finishAttributeSection(); + virtual void emitInst(uint32_t Inst, char Suffix = '\0'); + + virtual void AnnotateTLSDescriptorSequence(const MCSymbolRefExpr *SRE); + + virtual void emitThumbSet(MCSymbol *Symbol, const MCExpr *Value); + + void finish() override; + + /// Reset any state between object emissions, i.e. the equivalent of + /// MCStreamer's reset method. + virtual void reset(); + + /// Callback used to implement the ldr= pseudo. + /// Add a new entry to the constant pool for the current section and return an + /// MCExpr that can be used to refer to the constant pool location. + const MCExpr *addConstantPoolEntry(const MCExpr *, SMLoc Loc); + + /// Callback used to implemnt the .ltorg directive. + /// Emit contents of constant pool for the current section. + void emitCurrentConstantPool(); + +private: + std::unique_ptr ConstantPools; +}; + +/// \brief Streaming machine code generation interface. +/// +/// This interface is intended to provide a programatic interface that is very +/// similar to the level that an assembler .s file provides. It has callbacks +/// to emit bytes, handle directives, etc. The implementation of this interface +/// retains state to know what the current section is etc. +/// +/// There are multiple implementations of this interface: one for writing out +/// a .s file, and implementations that write out .o files of various formats. +/// +class MCStreamer { + mutable void *KsSymResolver; + MCContext &Context; + std::unique_ptr TargetStreamer; + + MCStreamer(const MCStreamer &) = delete; + MCStreamer &operator=(const MCStreamer &) = delete; + + std::vector DwarfFrameInfos; + MCDwarfFrameInfo *getCurrentDwarfFrameInfo(); + void EnsureValidDwarfFrame(); + + MCSymbol *EmitCFICommon(); + + std::vector WinFrameInfos; + WinEH::FrameInfo *CurrentWinFrameInfo; + void EnsureValidWinFrameInfo(); + + /// \brief Tracks an index to represent the order a symbol was emitted in. + /// Zero means we did not emit that symbol. + DenseMap SymbolOrdering; + + /// \brief This is stack of current and previous section values saved by + /// PushSection. + SmallVector, 4> SectionStack; + +protected: + MCStreamer(MCContext &Ctx); + + virtual void EmitCFIStartProcImpl(MCDwarfFrameInfo &Frame); + virtual void EmitCFIEndProcImpl(MCDwarfFrameInfo &CurFrame); + + WinEH::FrameInfo *getCurrentWinFrameInfo() { + return CurrentWinFrameInfo; + } + + virtual void EmitWindowsUnwindTables(); + + virtual void EmitRawTextImpl(StringRef String); + +public: + virtual ~MCStreamer(); + + void setSymResolver(void *h) const { KsSymResolver = h; } + void *getSymResolver() const { return KsSymResolver; } + + void visitUsedExpr(const MCExpr &Expr); + virtual void visitUsedSymbol(const MCSymbol &Sym); + + void setTargetStreamer(MCTargetStreamer *TS) { + TargetStreamer.reset(TS); + } + + /// State management + /// + virtual void reset(); + + MCContext &getContext() const { return Context; } + + MCTargetStreamer *getTargetStreamer() { + return TargetStreamer.get(); + } + + unsigned getNumFrameInfos() { return DwarfFrameInfos.size(); } + ArrayRef getDwarfFrameInfos() const { + return DwarfFrameInfos; + } + + unsigned getNumWinFrameInfos() { return WinFrameInfos.size(); } + ArrayRef getWinFrameInfos() const { + return WinFrameInfos; + } + + void generateCompactUnwindEncodings(MCAsmBackend *MAB); + + // \brief Returns the current size of the fragment to which the streamer + // is emitting code to. + virtual uint64_t getCurrentFragmentSize() {return 0; } + + /// \name Assembly File Formatting. + /// @{ + + /// \brief Return true if this streamer supports verbose assembly and if it is + /// enabled. + virtual bool isVerboseAsm() const { return false; } + + /// \brief Return true if this asm streamer supports emitting unformatted text + /// to the .s file with EmitRawText. + virtual bool hasRawTextSupport() const { return false; } + + /// \brief Is the integrated assembler required for this streamer to function + /// correctly? + virtual bool isIntegratedAssemblerRequired() const { return false; } + + /// \brief Add a textual command. + /// + /// Typically for comments that can be emitted to the generated .s + /// file if applicable as a QoI issue to make the output of the compiler + /// more readable. This only affects the MCAsmStreamer, and only when + /// verbose assembly output is enabled. + /// + /// If the comment includes embedded \n's, they will each get the comment + /// prefix as appropriate. The added comment should not end with a \n. + virtual void AddComment(const Twine &T) {} + + /// \brief Return a raw_ostream that comments can be written to. Unlike + /// AddComment, you are required to terminate comments with \n if you use this + /// method. + virtual raw_ostream &GetCommentOS(); + + /// \brief Print T and prefix it with the comment string (normally #) and + /// optionally a tab. This prints the comment immediately, not at the end of + /// the current line. It is basically a safe version of EmitRawText: since it + /// only prints comments, the object streamer ignores it instead of asserting. + virtual void emitRawComment(const Twine &T, bool TabPrefix = true); + + /// AddBlankLine - Emit a blank line to a .s file to pretty it up. + virtual void AddBlankLine() {} + + /// @} + + /// \name Symbol & Section Management + /// @{ + + /// \brief Return the current section that the streamer is emitting code to. + MCSectionSubPair getCurrentSection() const { + if (!SectionStack.empty()) + return SectionStack.back().first; + return MCSectionSubPair(); + } + MCSection *getCurrentSectionOnly() const { return getCurrentSection().first; } + + /// \brief Return the previous section that the streamer is emitting code to. + MCSectionSubPair getPreviousSection() const { + if (!SectionStack.empty()) + return SectionStack.back().second; + return MCSectionSubPair(); + } + + /// \brief Returns an index to represent the order a symbol was emitted in. + /// (zero if we did not emit that symbol) + unsigned GetSymbolOrder(const MCSymbol *Sym) const { + return SymbolOrdering.lookup(Sym); + } + + /// \brief Update streamer for a new active section. + /// + /// This is called by PopSection and SwitchSection, if the current + /// section changes. + virtual void ChangeSection(MCSection *, const MCExpr *); + + /// \brief Save the current and previous section on the section stack. + void PushSection() { + SectionStack.push_back( + std::make_pair(getCurrentSection(), getPreviousSection())); + } + + /// \brief Restore the current and previous section from the section stack. + /// Calls ChangeSection as needed. + /// + /// Returns false if the stack was empty. + bool PopSection() { + if (SectionStack.size() <= 1) + return false; + auto I = SectionStack.end(); + --I; + MCSectionSubPair OldSection = I->first; + --I; + MCSectionSubPair NewSection = I->first; + + if (OldSection != NewSection) + ChangeSection(NewSection.first, NewSection.second); + SectionStack.pop_back(); + return true; + } + + bool SubSection(const MCExpr *Subsection) { + if (SectionStack.empty()) + return false; + + SwitchSection(SectionStack.back().first.first, Subsection); + return true; + } + + /// Set the current section where code is being emitted to \p Section. This + /// is required to update CurSection. + /// + /// This corresponds to assembler directives like .section, .text, etc. + virtual void SwitchSection(MCSection *Section, + const MCExpr *Subsection = nullptr); + + /// \brief Set the current section where code is being emitted to \p Section. + /// This is required to update CurSection. This version does not call + /// ChangeSection. + void SwitchSectionNoChange(MCSection *Section, + const MCExpr *Subsection = nullptr) { + assert(Section && "Cannot switch to a null section!"); + MCSectionSubPair curSection = SectionStack.back().first; + SectionStack.back().second = curSection; + if (MCSectionSubPair(Section, Subsection) != curSection) + SectionStack.back().first = MCSectionSubPair(Section, Subsection); + } + + /// \brief Create the default sections and set the initial one. + virtual void InitSections(bool NoExecStack); + + MCSymbol *endSection(MCSection *Section); + + /// \brief Sets the symbol's section. + /// + /// Each emitted symbol will be tracked in the ordering table, + /// so we can sort on them later. + void AssignFragment(MCSymbol *Symbol, MCFragment *Fragment); + + /// \brief Emit a label for \p Symbol into the current section. + /// + /// This corresponds to an assembler statement such as: + /// foo: + /// + /// \param Symbol - The symbol to emit. A given symbol should only be + /// emitted as a label once, and symbols emitted as a label should never be + /// used in an assignment. + // FIXME: These emission are non-const because we mutate the symbol to + // add the section we're emitting it to later. + virtual void EmitLabel(MCSymbol *Symbol); + + virtual void EmitEHSymAttributes(const MCSymbol *Symbol, MCSymbol *EHSymbol); + + /// \brief Note in the output the specified \p Flag. + virtual void EmitAssemblerFlag(MCAssemblerFlag Flag); + + /// \brief Emit the given list \p Options of strings as linker + /// options into the output. + virtual void EmitLinkerOptions(ArrayRef Kind) {} + + /// \brief Note in the output the specified region \p Kind. + virtual void EmitDataRegion(MCDataRegionType Kind) {} + + /// \brief Specify the MachO minimum deployment target version. + virtual void EmitVersionMin(MCVersionMinType, unsigned Major, unsigned Minor, + unsigned Update) {} + + /// \brief Note in the output that the specified \p Func is a Thumb mode + /// function (ARM target only). + virtual void EmitThumbFunc(MCSymbol *Func); + + /// \brief Emit an assignment of \p Value to \p Symbol. + /// + /// This corresponds to an assembler statement such as: + /// symbol = value + /// + /// The assignment generates no code, but has the side effect of binding the + /// value in the current context. For the assembly streamer, this prints the + /// binding into the .s file. + /// + /// \param Symbol - The symbol being assigned to. + /// \param Value - The value for the symbol. + virtual bool EmitAssignment(MCSymbol *Symbol, const MCExpr *Value); + + /// \brief Emit an weak reference from \p Alias to \p Symbol. + /// + /// This corresponds to an assembler statement such as: + /// .weakref alias, symbol + /// + /// \param Alias - The alias that is being created. + /// \param Symbol - The symbol being aliased. + virtual void EmitWeakReference(MCSymbol *Alias, const MCSymbol *Symbol); + + /// \brief Add the given \p Attribute to \p Symbol. + virtual bool EmitSymbolAttribute(MCSymbol *Symbol, + MCSymbolAttr Attribute) = 0; + + /// \brief Set the \p DescValue for the \p Symbol. + /// + /// \param Symbol - The symbol to have its n_desc field set. + /// \param DescValue - The value to set into the n_desc field. + virtual void EmitSymbolDesc(MCSymbol *Symbol, unsigned DescValue); + + /// \brief Start emitting COFF symbol definition + /// + /// \param Symbol - The symbol to have its External & Type fields set. + virtual void BeginCOFFSymbolDef(const MCSymbol *Symbol); + + /// \brief Emit the storage class of the symbol. + /// + /// \param StorageClass - The storage class the symbol should have. + virtual void EmitCOFFSymbolStorageClass(int StorageClass); + + /// \brief Emit the type of the symbol. + /// + /// \param Type - A COFF type identifier (see COFF::SymbolType in X86COFF.h) + virtual void EmitCOFFSymbolType(int Type); + + /// \brief Marks the end of the symbol definition. + virtual void EndCOFFSymbolDef(); + + virtual void EmitCOFFSafeSEH(MCSymbol const *Symbol); + + /// \brief Emits a COFF section index. + /// + /// \param Symbol - Symbol the section number relocation should point to. + virtual void EmitCOFFSectionIndex(MCSymbol const *Symbol); + + /// \brief Emits a COFF section relative relocation. + /// + /// \param Symbol - Symbol the section relative relocation should point to. + virtual void EmitCOFFSecRel32(MCSymbol const *Symbol); + + /// \brief Emit an ELF .size directive. + /// + /// This corresponds to an assembler statement such as: + /// .size symbol, expression + virtual void emitELFSize(MCSymbolELF *Symbol, const MCExpr *Value); + + /// \brief Emit a Linker Optimization Hint (LOH) directive. + /// \param Args - Arguments of the LOH. + virtual void EmitLOHDirective(MCLOHType Kind, const MCLOHArgs &Args) {} + + /// \brief Emit a common symbol. + /// + /// \param Symbol - The common symbol to emit. + /// \param Size - The size of the common symbol. + /// \param ByteAlignment - The alignment of the symbol if + /// non-zero. This must be a power of 2. + virtual void EmitCommonSymbol(MCSymbol *Symbol, uint64_t Size, + unsigned ByteAlignment) = 0; + + /// \brief Emit a local common (.lcomm) symbol. + /// + /// \param Symbol - The common symbol to emit. + /// \param Size - The size of the common symbol. + /// \param ByteAlignment - The alignment of the common symbol in bytes. + virtual void EmitLocalCommonSymbol(MCSymbol *Symbol, uint64_t Size, + unsigned ByteAlignment); + + /// \brief Emit the zerofill section and an optional symbol. + /// + /// \param Section - The zerofill section to create and or to put the symbol + /// \param Symbol - The zerofill symbol to emit, if non-NULL. + /// \param Size - The size of the zerofill symbol. + /// \param ByteAlignment - The alignment of the zerofill symbol if + /// non-zero. This must be a power of 2 on some targets. + virtual void EmitZerofill(MCSection *Section, MCSymbol *Symbol = nullptr, + uint64_t Size = 0, unsigned ByteAlignment = 0) = 0; + + /// \brief Emit a thread local bss (.tbss) symbol. + /// + /// \param Section - The thread local common section. + /// \param Symbol - The thread local common symbol to emit. + /// \param Size - The size of the symbol. + /// \param ByteAlignment - The alignment of the thread local common symbol + /// if non-zero. This must be a power of 2 on some targets. + virtual void EmitTBSSSymbol(MCSection *Section, MCSymbol *Symbol, + uint64_t Size, unsigned ByteAlignment = 0); + + /// @} + /// \name Generating Data + /// @{ + + /// \brief Emit the bytes in \p Data into the output. + /// + /// This is used to implement assembler directives such as .byte, .ascii, + /// etc. + virtual void EmitBytes(StringRef Data); + + /// \brief Emit the expression \p Value into the output as a native + /// integer of the given \p Size bytes. + /// + /// This is used to implement assembler directives such as .word, .quad, + /// etc. + /// + /// \param Value - The value to emit. + /// \param Size - The size of the integer (in bytes) to emit. This must + /// match a native machine width. + /// \param Loc - The location of the expression for error reporting. + virtual void EmitValueImpl(const MCExpr *Value, unsigned Size, + SMLoc Loc = SMLoc()); + + void EmitValue(const MCExpr *Value, unsigned Size, SMLoc Loc = SMLoc()); + + /// \brief Special case of EmitValue that avoids the client having + /// to pass in a MCExpr for constant integers. + virtual void EmitIntValue(uint64_t Value, unsigned Size, bool &Error); + + virtual void EmitULEB128Value(const MCExpr *Value); + + virtual void EmitSLEB128Value(const MCExpr *Value); + + /// \brief Special case of EmitULEB128Value that avoids the client having to + /// pass in a MCExpr for constant integers. + void EmitULEB128IntValue(uint64_t Value, unsigned Padding = 0); + + /// \brief Special case of EmitSLEB128Value that avoids the client having to + /// pass in a MCExpr for constant integers. + void EmitSLEB128IntValue(int64_t Value); + + /// \brief Special case of EmitValue that avoids the client having to pass in + /// a MCExpr for MCSymbols. + void EmitSymbolValue(const MCSymbol *Sym, unsigned Size, + bool IsSectionRelative = false); + + /// \brief Emit the expression \p Value into the output as a gprel64 (64-bit + /// GP relative) value. + /// + /// This is used to implement assembler directives such as .gpdword on + /// targets that support them. + virtual void EmitGPRel64Value(const MCExpr *Value); + + /// \brief Emit the expression \p Value into the output as a gprel32 (32-bit + /// GP relative) value. + /// + /// This is used to implement assembler directives such as .gprel32 on + /// targets that support them. + virtual void EmitGPRel32Value(const MCExpr *Value); + + /// \brief Emit NumBytes bytes worth of the value specified by FillValue. + /// This implements directives such as '.space'. + virtual void EmitFill(uint64_t NumBytes, uint8_t FillValue); + + /// \brief Emit NumBytes worth of zeros. + /// This function properly handles data in virtual sections. + void EmitZeros(uint64_t NumBytes); + + /// \brief Emit some number of copies of \p Value until the byte alignment \p + /// ByteAlignment is reached. + /// + /// If the number of bytes need to emit for the alignment is not a multiple + /// of \p ValueSize, then the contents of the emitted fill bytes is + /// undefined. + /// + /// This used to implement the .align assembler directive. + /// + /// \param ByteAlignment - The alignment to reach. This must be a power of + /// two on some targets. + /// \param Value - The value to use when filling bytes. + /// \param ValueSize - The size of the integer (in bytes) to emit for + /// \p Value. This must match a native machine width. + /// \param MaxBytesToEmit - The maximum numbers of bytes to emit, or 0. If + /// the alignment cannot be reached in this many bytes, no bytes are + /// emitted. + virtual void EmitValueToAlignment(unsigned ByteAlignment, int64_t Value = 0, + unsigned ValueSize = 1, + unsigned MaxBytesToEmit = 0); + + /// \brief Emit nops until the byte alignment \p ByteAlignment is reached. + /// + /// This used to align code where the alignment bytes may be executed. This + /// can emit different bytes for different sizes to optimize execution. + /// + /// \param ByteAlignment - The alignment to reach. This must be a power of + /// two on some targets. + /// \param MaxBytesToEmit - The maximum numbers of bytes to emit, or 0. If + /// the alignment cannot be reached in this many bytes, no bytes are + /// emitted. + virtual void EmitCodeAlignment(unsigned ByteAlignment, + unsigned MaxBytesToEmit = 0); + + /// \brief Emit some number of copies of \p Value until the byte offset \p + /// Offset is reached. + /// + /// This is used to implement assembler directives such as .org. + /// + /// \param Offset - The offset to reach. This may be an expression, but the + /// expression must be associated with the current section. + /// \param Value - The value to use when filling bytes. + virtual void emitValueToOffset(const MCExpr *Offset, unsigned char Value = 0); + + /// @} + + /// \brief Switch to a new logical file. This is used to implement the '.file + /// "foo.c"' assembler directive. + virtual void EmitFileDirective(StringRef Filename); + + /// \brief Emit the "identifiers" directive. This implements the + /// '.ident "version foo"' assembler directive. + virtual void EmitIdent(StringRef IdentString) {} + + /// \brief Associate a filename with a specified logical file number. This + /// implements the DWARF2 '.file 4 "foo.c"' assembler directive. + virtual unsigned EmitDwarfFileDirective(unsigned FileNo, StringRef Directory, + StringRef Filename, + unsigned CUID = 0); + + /// \brief This implements the DWARF2 '.loc fileno lineno ...' assembler + /// directive. + virtual void EmitDwarfLocDirective(unsigned FileNo, unsigned Line, + unsigned Column, unsigned Flags, + unsigned Isa, unsigned Discriminator, + StringRef FileName); + + /// \brief Associate a filename with a specified logical file number. This + /// implements the '.cv_file 4 "foo.c"' assembler directive. + virtual unsigned EmitCVFileDirective(unsigned FileNo, StringRef Filename); + + /// \brief This implements the CodeView '.cv_loc' assembler directive. + virtual void EmitCVLocDirective(unsigned FunctionId, unsigned FileNo, + unsigned Line, unsigned Column, + bool PrologueEnd, bool IsStmt, + StringRef FileName); + + /// \brief This implements the CodeView '.cv_linetable' assembler directive. + virtual void EmitCVLinetableDirective(unsigned FunctionId, + const MCSymbol *FnStart, + const MCSymbol *FnEnd); + + /// \brief This implements the CodeView '.cv_inline_linetable' assembler + /// directive. + virtual void + EmitCVInlineLinetableDirective(unsigned PrimaryFunctionId, + unsigned SourceFileId, unsigned SourceLineNum, + ArrayRef SecondaryFunctionIds); + + /// \brief This implements the CodeView '.cv_stringtable' assembler directive. + virtual void EmitCVStringTableDirective() {} + + /// \brief This implements the CodeView '.cv_filechecksums' assembler directive. + virtual void EmitCVFileChecksumsDirective() {} + + /// Emit the absolute difference between two symbols. + /// + /// \pre Offset of \c Hi is greater than the offset \c Lo. + virtual void emitAbsoluteSymbolDiff(const MCSymbol *Hi, const MCSymbol *Lo, + unsigned Size); + + virtual MCSymbol *getDwarfLineTableSymbol(unsigned CUID); + virtual void EmitCFISections(bool EH, bool Debug); + void EmitCFIStartProc(bool IsSimple); + void EmitCFIEndProc(); + virtual void EmitCFIDefCfa(int64_t Register, int64_t Offset); + virtual void EmitCFIDefCfaOffset(int64_t Offset); + virtual void EmitCFIDefCfaRegister(int64_t Register); + virtual void EmitCFIOffset(int64_t Register, int64_t Offset); + virtual void EmitCFIPersonality(const MCSymbol *Sym, unsigned Encoding); + virtual void EmitCFILsda(const MCSymbol *Sym, unsigned Encoding); + virtual void EmitCFIRememberState(); + virtual void EmitCFIRestoreState(); + virtual void EmitCFISameValue(int64_t Register); + virtual void EmitCFIRestore(int64_t Register); + virtual void EmitCFIRelOffset(int64_t Register, int64_t Offset); + virtual void EmitCFIAdjustCfaOffset(int64_t Adjustment); + virtual void EmitCFIEscape(StringRef Values); + virtual void EmitCFIGnuArgsSize(int64_t Size); + virtual void EmitCFISignalFrame(); + virtual void EmitCFIUndefined(int64_t Register); + virtual void EmitCFIRegister(int64_t Register1, int64_t Register2); + virtual void EmitCFIWindowSave(); + + virtual void EmitWinCFIStartProc(const MCSymbol *Symbol); + virtual void EmitWinCFIEndProc(); + virtual void EmitWinCFIStartChained(); + virtual void EmitWinCFIEndChained(); + virtual void EmitWinCFIPushReg(unsigned Register); + virtual void EmitWinCFISetFrame(unsigned Register, unsigned Offset); + virtual void EmitWinCFIAllocStack(unsigned Size); + virtual void EmitWinCFISaveReg(unsigned Register, unsigned Offset); + virtual void EmitWinCFISaveXMM(unsigned Register, unsigned Offset); + virtual void EmitWinCFIPushFrame(bool Code); + virtual void EmitWinCFIEndProlog(); + + virtual void EmitWinEHHandler(const MCSymbol *Sym, bool Unwind, bool Except); + virtual void EmitWinEHHandlerData(); + + virtual void EmitSyntaxDirective(); + + /// \brief Emit a .reloc directive. + /// Returns true if the relocation could not be emitted because Name is not + /// known. + virtual bool EmitRelocDirective(const MCExpr &Offset, StringRef Name, + const MCExpr *Expr, SMLoc Loc) { + return true; + } + + /// \brief Emit the given \p Instruction into the current section. + virtual void EmitInstruction(MCInst &Inst, const MCSubtargetInfo &STI, unsigned int &KsError); + + /// \brief Set the bundle alignment mode from now on in the section. + /// The argument is the power of 2 to which the alignment is set. The + /// value 0 means turn the bundle alignment off. + virtual void EmitBundleAlignMode(unsigned AlignPow2); + + /// \brief The following instructions are a bundle-locked group. + /// + /// \param AlignToEnd - If true, the bundle-locked group will be aligned to + /// the end of a bundle. + virtual void EmitBundleLock(bool AlignToEnd); + + /// \brief Ends a bundle-locked group. + virtual void EmitBundleUnlock(); + + /// \brief If this file is backed by a assembly streamer, this dumps the + /// specified string in the output .s file. This capability is indicated by + /// the hasRawTextSupport() predicate. By default this aborts. + void EmitRawText(const Twine &String); + + /// \brief Streamer specific finalization. + virtual unsigned int FinishImpl(); + /// \brief Finish emission of machine code. + unsigned int Finish(); + + virtual bool mayHaveInstructions(MCSection &Sec) const { return true; } +}; + +/// Create a dummy machine code streamer, which does nothing. This is useful for +/// timing the assembler front end. +MCStreamer *createNullStreamer(MCContext &Ctx); + +/// Create a machine code streamer which will print out assembly for the native +/// target, suitable for compiling with a native assembler. +/// +/// \param CE - If given, a code emitter to use to show the instruction +/// encoding inline with the assembly. This method takes ownership of \p CE. +/// +/// \param TAB - If given, a target asm backend to use to show the fixup +/// information in conjunction with encoding information. This method takes +/// ownership of \p TAB. +MCStreamer *createAsmStreamer(MCContext &Ctx, + std::unique_ptr OS, + MCCodeEmitter *CE, + MCAsmBackend *TAB); +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCSubtargetInfo.h b/llvm/include/llvm/MC/MCSubtargetInfo.h new file mode 100644 index 0000000..88d1d74 --- /dev/null +++ b/llvm/include/llvm/MC/MCSubtargetInfo.h @@ -0,0 +1,116 @@ +//==-- llvm/MC/MCSubtargetInfo.h - Subtarget Information ---------*- C++ -*-==// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file describes the subtarget options of a Target machine. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCSUBTARGETINFO_H +#define LLVM_MC_MCSUBTARGETINFO_H + +#include "llvm/MC/MCInstrItineraries.h" +#include "llvm/MC/MCSchedule.h" +#include "llvm/MC/SubtargetFeature.h" +#include + +namespace llvm_ks { + +class StringRef; + +//===----------------------------------------------------------------------===// +/// +/// MCSubtargetInfo - Generic base class for all target subtargets. +/// +class MCSubtargetInfo { + Triple TargetTriple; // Target triple + std::string CPU; // CPU being targeted. + ArrayRef ProcFeatures; // Processor feature list + ArrayRef ProcDesc; // Processor descriptions + + FeatureBitset FeatureBits; // Feature bits for current CPU + FS + + // Scheduler machine model + const SubtargetInfoKV *ProcSchedModels; + const MCSchedModel *CPUSchedModel; + + MCSubtargetInfo() = delete; + MCSubtargetInfo &operator=(MCSubtargetInfo &&) = delete; + MCSubtargetInfo &operator=(const MCSubtargetInfo &) = delete; + +public: + MCSubtargetInfo(const MCSubtargetInfo &) = default; + MCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS, + ArrayRef PF, + ArrayRef PD, + const SubtargetInfoKV *ProcSched); + + /// getTargetTriple - Return the target triple string. + const Triple &getTargetTriple() const { return TargetTriple; } + + /// getCPU - Return the CPU string. + StringRef getCPU() const { + return CPU; + } + + /// getFeatureBits - Return the feature bits. + /// + const FeatureBitset& getFeatureBits() const { + return FeatureBits; + } + + /// setFeatureBits - Set the feature bits. + /// + void setFeatureBits(const FeatureBitset &FeatureBits_) { + FeatureBits = FeatureBits_; + } + +protected: + /// Initialize the scheduling model and feature bits. + /// + /// FIXME: Find a way to stick this in the constructor, since it should only + /// be called during initialization. + void InitMCProcessorInfo(StringRef CPU, StringRef FS); + +public: + /// Set the features to the default for the given CPU with an appended feature + /// string. + void setDefaultFeatures(StringRef CPU, StringRef FS); + + /// ToggleFeature - Toggle a feature and returns the re-computed feature + /// bits. This version does not change the implied bits. + FeatureBitset ToggleFeature(uint64_t FB); + + /// ToggleFeature - Toggle a feature and returns the re-computed feature + /// bits. This version does not change the implied bits. + FeatureBitset ToggleFeature(const FeatureBitset& FB); + + /// ToggleFeature - Toggle a set of features and returns the re-computed + /// feature bits. This version will also change all implied bits. + FeatureBitset ToggleFeature(StringRef FS); + + /// Apply a feature flag and return the re-computed feature bits, including + /// all feature bits implied by the flag. + FeatureBitset ApplyFeatureFlag(StringRef FS); + + /// getSchedModelForCPU - Get the machine model of a CPU. + const MCSchedModel &getSchedModelForCPU(StringRef CPU) const; + + /// Get the machine model for this subtarget's CPU. + const MCSchedModel &getSchedModel() const { return *CPUSchedModel; } + + /// Check whether the CPU string is valid. + bool isCPUStringValid(StringRef CPU) const { + auto Found = std::lower_bound(ProcDesc.begin(), ProcDesc.end(), CPU); + return Found != ProcDesc.end() && StringRef(Found->Key) == CPU; + } +}; + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/MC/MCSymbol.h b/llvm/include/llvm/MC/MCSymbol.h new file mode 100644 index 0000000..c0558b8 --- /dev/null +++ b/llvm/include/llvm/MC/MCSymbol.h @@ -0,0 +1,421 @@ +//===- MCSymbol.h - Machine Code Symbols ------------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains the declaration of the MCSymbol class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCSYMBOL_H +#define LLVM_MC_MCSYMBOL_H + +#include "llvm/ADT/PointerIntPair.h" +#include "llvm/ADT/PointerUnion.h" +#include "llvm/ADT/StringMap.h" +#include "llvm/MC/MCAssembler.h" +#include "llvm/Support/Compiler.h" + +namespace llvm_ks { +class MCAsmInfo; +class MCExpr; +class MCSymbol; +class MCFragment; +class MCSection; +class MCContext; +class raw_ostream; + +/// MCSymbol - Instances of this class represent a symbol name in the MC file, +/// and MCSymbols are created and uniqued by the MCContext class. MCSymbols +/// should only be constructed with valid names for the object file. +/// +/// If the symbol is defined/emitted into the current translation unit, the +/// Section member is set to indicate what section it lives in. Otherwise, if +/// it is a reference to an external entity, it has a null section. +class MCSymbol { +protected: + /// The kind of the symbol. If it is any value other than unset then this + /// class is actually one of the appropriate subclasses of MCSymbol. + enum SymbolKind { + SymbolKindUnset, + SymbolKindCOFF, + SymbolKindELF, + SymbolKindMachO, + }; + + /// A symbol can contain an Offset, or Value, or be Common, but never more + /// than one of these. + enum Contents : uint8_t { + SymContentsUnset, + SymContentsOffset, + SymContentsVariable, + SymContentsCommon, + }; + + // Special sentinal value for the absolute pseudo fragment. + static MCFragment *AbsolutePseudoFragment; + + /// If a symbol has a Fragment, the section is implied, so we only need + /// one pointer. + /// The special AbsolutePseudoFragment value is for absolute symbols. + /// If this is a variable symbol, this caches the variable value's fragment. + /// FIXME: We might be able to simplify this by having the asm streamer create + /// dummy fragments. + /// If this is a section, then it gives the symbol is defined in. This is null + /// for undefined symbols. + /// + /// If this is a fragment, then it gives the fragment this symbol's value is + /// relative to, if any. + /// + /// For the 'HasName' integer, this is true if this symbol is named. + /// A named symbol will have a pointer to the name allocated in the bytes + /// immediately prior to the MCSymbol. + mutable PointerIntPair FragmentAndHasName; + + /// IsTemporary - True if this is an assembler temporary label, which + /// typically does not survive in the .o file's symbol table. Usually + /// "Lfoo" or ".foo". + unsigned IsTemporary : 1; + + /// \brief True if this symbol can be redefined. + unsigned IsRedefinable : 1; + + /// IsUsed - True if this symbol has been used. + mutable unsigned IsUsed : 1; + + mutable bool IsRegistered : 1; + + /// This symbol is visible outside this translation unit. + mutable unsigned IsExternal : 1; + + /// This symbol is private extern. + mutable unsigned IsPrivateExtern : 1; + + /// LLVM RTTI discriminator. This is actually a SymbolKind enumerator, but is + /// unsigned to avoid sign extension and achieve better bitpacking with MSVC. + unsigned Kind : 2; + + /// True if we have created a relocation that uses this symbol. + mutable unsigned IsUsedInReloc : 1; + + /// This is actually a Contents enumerator, but is unsigned to avoid sign + /// extension and achieve better bitpacking with MSVC. + unsigned SymbolContents : 2; + + /// The alignment of the symbol, if it is 'common', or -1. + /// + /// The alignment is stored as log2(align) + 1. This allows all values from + /// 0 to 2^31 to be stored which is every power of 2 representable by an + /// unsigned. + enum : unsigned { NumCommonAlignmentBits = 5 }; + unsigned CommonAlignLog2 : NumCommonAlignmentBits; + + /// The Flags field is used by object file implementations to store + /// additional per symbol information which is not easily classified. + enum : unsigned { NumFlagsBits = 16 }; + mutable uint32_t Flags : NumFlagsBits; + + /// Index field, for use by the object file implementation. + mutable uint32_t Index = 0; + + union { + /// The offset to apply to the fragment address to form this symbol's value. + uint64_t Offset; + + /// The size of the symbol, if it is 'common'. + uint64_t CommonSize; + + /// If non-null, the value for a variable symbol. + const MCExpr *Value; + }; + +protected: // MCContext creates and uniques these. + friend class MCExpr; + friend class MCContext; + + /// \brief The name for a symbol. + /// MCSymbol contains a uint64_t so is probably aligned to 8. On a 32-bit + /// system, the name is a pointer so isn't going to satisfy the 8 byte + /// alignment of uint64_t. Account for that here. + typedef union { + const StringMapEntry *NameEntry; + uint64_t AlignmentPadding; + } NameEntryStorageTy; + + MCSymbol(SymbolKind Kind, const StringMapEntry *Name, bool isTemporary) + : IsTemporary(isTemporary), IsRedefinable(false), IsUsed(false), + IsRegistered(false), IsExternal(false), IsPrivateExtern(false), + Kind(Kind), IsUsedInReloc(false), SymbolContents(SymContentsUnset), + CommonAlignLog2(0), Flags(0) { + Offset = 0; + FragmentAndHasName.setInt(!!Name); + if (Name) + getNameEntryPtr() = Name; + } + + // Provide custom new/delete as we will only allocate space for a name + // if we need one. + void *operator new(size_t s, const StringMapEntry *Name, + MCContext &Ctx); + +private: + + void operator delete(void *); + /// \brief Placement delete - required by std, but never called. + void operator delete(void*, unsigned) { + llvm_unreachable("Constructor throws?"); + } + /// \brief Placement delete - required by std, but never called. + void operator delete(void*, unsigned, bool) { + llvm_unreachable("Constructor throws?"); + } + + MCSymbol(const MCSymbol &) = delete; + void operator=(const MCSymbol &) = delete; + MCSection *getSectionPtr(bool SetUsed = true) const { + if (MCFragment *F = getFragment(SetUsed)) { + assert(F != AbsolutePseudoFragment); + return F->getParent(); + } + return nullptr; + } + + /// \brief Get a reference to the name field. Requires that we have a name + const StringMapEntry *&getNameEntryPtr() { + assert(FragmentAndHasName.getInt() && "Name is required"); + NameEntryStorageTy *Name = reinterpret_cast(this); + return (*(Name - 1)).NameEntry; + } + const StringMapEntry *&getNameEntryPtr() const { + return const_cast(this)->getNameEntryPtr(); + } + +public: + /// getName - Get the symbol name. + StringRef getName() const { + if (!FragmentAndHasName.getInt()) + return StringRef(); + + return getNameEntryPtr()->first(); + } + + bool isRegistered() const { return IsRegistered; } + void setIsRegistered(bool Value) const { IsRegistered = Value; } + + void setUsedInReloc() const { IsUsedInReloc = true; } + bool isUsedInReloc() const { return IsUsedInReloc; } + + /// \name Accessors + /// @{ + + /// isTemporary - Check if this is an assembler temporary symbol. + bool isTemporary() const { return IsTemporary; } + + /// isUsed - Check if this is used. + bool isUsed() const { return IsUsed; } + void setUsed(bool Value) const { IsUsed |= Value; } + + /// \brief Check if this symbol is redefinable. + bool isRedefinable() const { return IsRedefinable; } + /// \brief Mark this symbol as redefinable. + void setRedefinable(bool Value) { IsRedefinable = Value; } + /// \brief Prepare this symbol to be redefined. + void redefineIfPossible() { + if (IsRedefinable) { + if (SymbolContents == SymContentsVariable) { + Value = nullptr; + SymbolContents = SymContentsUnset; + } + setUndefined(); + IsRedefinable = false; + } + } + + /// @} + /// \name Associated Sections + /// @{ + + /// isDefined - Check if this symbol is defined (i.e., it has an address). + /// + /// Defined symbols are either absolute or in some section. + bool isDefined(bool SetUsed = true) const { + return getFragment(SetUsed) != nullptr; + } + + /// isInSection - Check if this symbol is defined in some section (i.e., it + /// is defined but not absolute). + bool isInSection(bool SetUsed = true) const { + return isDefined(SetUsed) && !isAbsolute(SetUsed); + } + + /// isUndefined - Check if this symbol undefined (i.e., implicitly defined). + bool isUndefined(bool SetUsed = true) const { return !isDefined(SetUsed); } + + /// isAbsolute - Check if this is an absolute symbol. + bool isAbsolute(bool SetUsed = true) const { + return getFragment(SetUsed) == AbsolutePseudoFragment; + } + + /// Get the section associated with a defined, non-absolute symbol. + MCSection &getSection(bool SetUsed = true) const { + assert(isInSection(SetUsed) && "Invalid accessor!"); + return *getSectionPtr(SetUsed); + } + + /// Mark the symbol as defined in the fragment \p F. + void setFragment(MCFragment *F) const { + assert(!isVariable() && "Cannot set fragment of variable"); + FragmentAndHasName.setPointer(F); + } + + /// Mark the symbol as undefined. + void setUndefined() { FragmentAndHasName.setPointer(nullptr); } + + bool isELF() const { return Kind == SymbolKindELF; } + + bool isCOFF() const { return Kind == SymbolKindCOFF; } + + bool isMachO() const { return Kind == SymbolKindMachO; } + + /// @} + /// \name Variable Symbols + /// @{ + + /// isVariable - Check if this is a variable symbol. + bool isVariable() const { + return SymbolContents == SymContentsVariable; + } + + /// getVariableValue - Get the value for variable symbols. + const MCExpr *getVariableValue(bool SetUsed = true) const { + assert(isVariable() && "Invalid accessor!"); + IsUsed |= SetUsed; + return Value; + } + + void setVariableValue(const MCExpr *Value, bool &valid); + + /// @} + + /// Get the (implementation defined) index. + uint32_t getIndex() const { + return Index; + } + + /// Set the (implementation defined) index. + void setIndex(uint32_t Value) const { + Index = Value; + } + + uint64_t getOffset() const { + assert((SymbolContents == SymContentsUnset || + SymbolContents == SymContentsOffset) && + "Cannot get offset for a common/variable symbol"); + return Offset; + } + void setOffset(uint64_t Value) { + assert((SymbolContents == SymContentsUnset || + SymbolContents == SymContentsOffset) && + "Cannot set offset for a common/variable symbol"); + Offset = Value; + SymbolContents = SymContentsOffset; + } + + /// Return the size of a 'common' symbol. + uint64_t getCommonSize() const { + assert(isCommon() && "Not a 'common' symbol!"); + return CommonSize; + } + + /// Mark this symbol as being 'common'. + /// + /// \param Size - The size of the symbol. + /// \param Align - The alignment of the symbol. + void setCommon(uint64_t Size, unsigned Align) { + assert(getOffset() == 0); + CommonSize = Size; + SymbolContents = SymContentsCommon; + + assert((!Align || isPowerOf2_32(Align)) && + "Alignment must be a power of 2"); + unsigned Log2Align = Log2_32(Align) + 1; + assert(Log2Align < (1U << NumCommonAlignmentBits) && + "Out of range alignment"); + CommonAlignLog2 = Log2Align; + } + + /// Return the alignment of a 'common' symbol. + unsigned getCommonAlignment() const { + assert(isCommon() && "Not a 'common' symbol!"); + return CommonAlignLog2 ? (1U << (CommonAlignLog2 - 1)) : 0; + } + + /// Declare this symbol as being 'common'. + /// + /// \param Size - The size of the symbol. + /// \param Align - The alignment of the symbol. + /// \return True if symbol was already declared as a different type + bool declareCommon(uint64_t Size, unsigned Align) { + assert(isCommon() || getOffset() == 0); + if(isCommon()) { + if(CommonSize != Size || getCommonAlignment() != Align) + return true; + } else + setCommon(Size, Align); + return false; + } + + /// Is this a 'common' symbol. + bool isCommon() const { + return SymbolContents == SymContentsCommon; + } + + MCFragment *getFragment(bool SetUsed = true) const { + MCFragment *Fragment = FragmentAndHasName.getPointer(); + if (Fragment || !isVariable()) + return Fragment; + Fragment = getVariableValue(SetUsed)->findAssociatedFragment(); + FragmentAndHasName.setPointer(Fragment); + return Fragment; + } + + bool isExternal() const { return IsExternal; } + void setExternal(bool Value) const { IsExternal = Value; } + + bool isPrivateExtern() const { return IsPrivateExtern; } + void setPrivateExtern(bool Value) { IsPrivateExtern = Value; } + + /// print - Print the value to the stream \p OS. + void print(raw_ostream &OS, const MCAsmInfo *MAI) const; + + /// dump - Print the value to stderr. + void dump() const; + +protected: + /// Get the (implementation defined) symbol flags. + uint32_t getFlags() const { return Flags; } + + /// Set the (implementation defined) symbol flags. + void setFlags(uint32_t Value) const { + assert(Value < (1U << NumFlagsBits) && "Out of range flags"); + Flags = Value; + } + + /// Modify the flags via a mask + void modifyFlags(uint32_t Value, uint32_t Mask) const { + assert(Value < (1U << NumFlagsBits) && "Out of range flags"); + Flags = (Flags & ~Mask) | Value; + } +}; + +inline raw_ostream &operator<<(raw_ostream &OS, const MCSymbol &Sym) { + Sym.print(OS, nullptr); + return OS; +} +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCSymbolCOFF.h b/llvm/include/llvm/MC/MCSymbolCOFF.h new file mode 100644 index 0000000..2e7bf71 --- /dev/null +++ b/llvm/include/llvm/MC/MCSymbolCOFF.h @@ -0,0 +1,64 @@ +//===- MCSymbolCOFF.h - ----------------------------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +#ifndef LLVM_MC_MCSYMBOLCOFF_H +#define LLVM_MC_MCSYMBOLCOFF_H + +#include "llvm/MC/MCSymbol.h" + +namespace llvm_ks { +class MCSymbolCOFF : public MCSymbol { + + /// This corresponds to the e_type field of the COFF symbol. + mutable uint16_t Type; + + enum SymbolFlags : uint16_t { + SF_ClassMask = 0x00FF, + SF_ClassShift = 0, + + SF_WeakExternal = 0x0100, + SF_SafeSEH = 0x0200, + }; + +public: + MCSymbolCOFF(const StringMapEntry *Name, bool isTemporary) + : MCSymbol(SymbolKindCOFF, Name, isTemporary), Type(0) {} + + uint16_t getType() const { + return Type; + } + void setType(uint16_t Ty) const { + Type = Ty; + } + + uint16_t getClass() const { + return (getFlags() & SF_ClassMask) >> SF_ClassShift; + } + void setClass(uint16_t StorageClass) const { + modifyFlags(StorageClass << SF_ClassShift, SF_ClassMask); + } + + bool isWeakExternal() const { + return getFlags() & SF_WeakExternal; + } + void setIsWeakExternal() const { + modifyFlags(SF_WeakExternal, SF_WeakExternal); + } + + bool isSafeSEH() const { + return getFlags() & SF_SafeSEH; + } + void setIsSafeSEH() const { + modifyFlags(SF_SafeSEH, SF_SafeSEH); + } + + static bool classof(const MCSymbol *S) { return S->isCOFF(); } +}; +} + +#endif diff --git a/llvm/include/llvm/MC/MCSymbolELF.h b/llvm/include/llvm/MC/MCSymbolELF.h new file mode 100644 index 0000000..17478f9 --- /dev/null +++ b/llvm/include/llvm/MC/MCSymbolELF.h @@ -0,0 +1,54 @@ +//===- MCSymbolELF.h - -----------------------------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +#ifndef LLVM_MC_MCSYMBOLELF_H +#define LLVM_MC_MCSYMBOLELF_H + +#include "llvm/MC/MCSymbol.h" + +namespace llvm_ks { +class MCSymbolELF : public MCSymbol { + /// An expression describing how to calculate the size of a symbol. If a + /// symbol has no size this field will be NULL. + const MCExpr *SymbolSize = nullptr; + +public: + MCSymbolELF(const StringMapEntry *Name, bool isTemporary) + : MCSymbol(SymbolKindELF, Name, isTemporary) {} + void setSize(const MCExpr *SS) { SymbolSize = SS; } + + const MCExpr *getSize() const { return SymbolSize; } + + void setVisibility(unsigned Visibility); + unsigned getVisibility() const; + + void setOther(unsigned Other); + unsigned getOther() const; + + void setType(unsigned Type) const; + unsigned getType() const; + + void setBinding(unsigned Binding) const; + unsigned getBinding() const; + + bool isBindingSet() const; + + void setIsWeakrefUsedInReloc() const; + bool isWeakrefUsedInReloc() const; + + void setIsSignature() const; + bool isSignature() const; + + static bool classof(const MCSymbol *S) { return S->isELF(); } + +private: + void setIsBindingSet() const; +}; +} + +#endif diff --git a/llvm/include/llvm/MC/MCSymbolMachO.h b/llvm/include/llvm/MC/MCSymbolMachO.h new file mode 100644 index 0000000..35e1dda --- /dev/null +++ b/llvm/include/llvm/MC/MCSymbolMachO.h @@ -0,0 +1,123 @@ +//===- MCSymbolMachO.h - ---------------------------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +#ifndef LLVM_MC_MCSYMBOLMACHO_H +#define LLVM_MC_MCSYMBOLMACHO_H + +#include "llvm/MC/MCSymbol.h" + +namespace llvm_ks { +class MCSymbolMachO : public MCSymbol { + /// \brief We store the value for the 'desc' symbol field in the + /// lowest 16 bits of the implementation defined flags. + enum MachOSymbolFlags : uint16_t { // See . + SF_DescFlagsMask = 0xFFFF, + + // Reference type flags. + SF_ReferenceTypeMask = 0x0007, + SF_ReferenceTypeUndefinedNonLazy = 0x0000, + SF_ReferenceTypeUndefinedLazy = 0x0001, + SF_ReferenceTypeDefined = 0x0002, + SF_ReferenceTypePrivateDefined = 0x0003, + SF_ReferenceTypePrivateUndefinedNonLazy = 0x0004, + SF_ReferenceTypePrivateUndefinedLazy = 0x0005, + + // Other 'desc' flags. + SF_ThumbFunc = 0x0008, + SF_NoDeadStrip = 0x0020, + SF_WeakReference = 0x0040, + SF_WeakDefinition = 0x0080, + SF_SymbolResolver = 0x0100, + + // Common alignment + SF_CommonAlignmentMask = 0xF0FF, + SF_CommonAlignmentShift = 8 + }; + +public: + MCSymbolMachO(const StringMapEntry *Name, bool isTemporary) + : MCSymbol(SymbolKindMachO, Name, isTemporary) {} + + // Reference type methods. + + void clearReferenceType() const { + modifyFlags(0, SF_ReferenceTypeMask); + } + + void setReferenceTypeUndefinedLazy(bool Value) const { + modifyFlags(Value ? SF_ReferenceTypeUndefinedLazy : 0, + SF_ReferenceTypeUndefinedLazy); + } + + // Other 'desc' methods. + + void setThumbFunc() const { + modifyFlags(SF_ThumbFunc, SF_ThumbFunc); + } + + bool isNoDeadStrip() const { + return getFlags() & SF_NoDeadStrip; + } + void setNoDeadStrip() const { + modifyFlags(SF_NoDeadStrip, SF_NoDeadStrip); + } + + bool isWeakReference() const { + return getFlags() & SF_WeakReference; + } + void setWeakReference() const { + modifyFlags(SF_WeakReference, SF_WeakReference); + } + + bool isWeakDefinition() const { + return getFlags() & SF_WeakDefinition; + } + void setWeakDefinition() const { + modifyFlags(SF_WeakDefinition, SF_WeakDefinition); + } + + bool isSymbolResolver() const { + return getFlags() & SF_SymbolResolver; + } + void setSymbolResolver() const { + modifyFlags(SF_SymbolResolver, SF_SymbolResolver); + } + + void setDesc(unsigned Value) const { + assert(Value == (Value & SF_DescFlagsMask) && + "Invalid .desc value!"); + setFlags(Value & SF_DescFlagsMask); + } + + /// \brief Get the encoded value of the flags as they will be emitted in to + /// the MachO binary + uint16_t getEncodedFlags() const { + uint16_t Flags = getFlags(); + + // Common alignment is packed into the 'desc' bits. + if (isCommon()) { + if (unsigned Align = getCommonAlignment()) { + unsigned Log2Size = Log2_32(Align); + assert((1U << Log2Size) == Align && "Invalid 'common' alignment!"); + if (Log2Size > 15) + report_fatal_error("invalid 'common' alignment '" + + Twine(Align) + "' for '" + getName() + "'", + false); + Flags = (Flags & SF_CommonAlignmentMask) | + (Log2Size << SF_CommonAlignmentShift); + } + } + + return Flags; + } + + static bool classof(const MCSymbol *S) { return S->isMachO(); } +}; +} + +#endif diff --git a/llvm/include/llvm/MC/MCTargetOptions.h b/llvm/include/llvm/MC/MCTargetOptions.h new file mode 100644 index 0000000..1fc30f1 --- /dev/null +++ b/llvm/include/llvm/MC/MCTargetOptions.h @@ -0,0 +1,41 @@ +//===- MCTargetOptions.h - MC Target Options -------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCTARGETOPTIONS_H +#define LLVM_MC_MCTARGETOPTIONS_H + +#include + +namespace llvm_ks { + +class StringRef; + +class MCTargetOptions { +public: + enum AsmInstrumentation { + AsmInstrumentationNone, + AsmInstrumentationAddress + }; + + bool MCRelaxAll : 1; + bool MCFatalWarnings : 1; + bool MCNoWarn : 1; + bool ShowMCEncoding : 1; + int DwarfVersion; + /// getABIName - If this returns a non-empty string this represents the + /// textual name of the ABI that we want the backend to use, e.g. o32, or + /// aapcs-linux. + StringRef getABIName() const; + std::string ABIName; + MCTargetOptions(); +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h b/llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h new file mode 100644 index 0000000..c399084 --- /dev/null +++ b/llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h @@ -0,0 +1,44 @@ +//===-- MCTargetOptionsCommandFlags.h --------------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains machine code-specific flags that are shared between +// different command line tools. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCTARGETOPTIONSCOMMANDFLAGS_H +#define LLVM_MC_MCTARGETOPTIONSCOMMANDFLAGS_H + +#include "llvm/MC/MCTargetOptions.h" + +using namespace llvm_ks; + +bool RelaxAll; + +int DwarfVersion = 0; + +bool FatalWarnings; + +bool NoWarn; + +//cl::alias NoWarnW("W", cl::desc("Alias for --no-warn"), cl::aliasopt(NoWarn)); + +std::string ABIName = ""; + +static inline MCTargetOptions InitMCTargetOptionsFromFlags() { + MCTargetOptions Options; + Options.MCRelaxAll = RelaxAll; + Options.DwarfVersion = DwarfVersion; + Options.ABIName = ABIName; + Options.MCFatalWarnings = FatalWarnings; + Options.MCNoWarn = NoWarn; + return Options; +} + +#endif diff --git a/llvm/include/llvm/MC/MCValue.h b/llvm/include/llvm/MC/MCValue.h new file mode 100644 index 0000000..ee39879 --- /dev/null +++ b/llvm/include/llvm/MC/MCValue.h @@ -0,0 +1,86 @@ +//===-- llvm/MC/MCValue.h - MCValue class -----------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains the declaration of the MCValue class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCVALUE_H +#define LLVM_MC_MCVALUE_H + +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/Support/DataTypes.h" +#include + +namespace llvm_ks { +class MCAsmInfo; +class raw_ostream; + +/// \brief This represents an "assembler immediate". +/// +/// In its most general form, this can hold ":Kind:(SymbolA - SymbolB + +/// imm64)". Not all targets supports relocations of this general form, but we +/// need to represent this anyway. +/// +/// In general both SymbolA and SymbolB will also have a modifier +/// analogous to the top-level Kind. Current targets are not expected +/// to make use of both though. The choice comes down to whether +/// relocation modifiers apply to the closest symbol or the whole +/// expression. +/// +/// Note that this class must remain a simple POD value class, because we need +/// it to live in unions etc. +class MCValue { + const MCSymbolRefExpr *SymA, *SymB; + int64_t Cst; + uint32_t RefKind; +public: + + int64_t getConstant() const { return Cst; } + const MCSymbolRefExpr *getSymA() const { return SymA; } + const MCSymbolRefExpr *getSymB() const { return SymB; } + uint32_t getRefKind() const { return RefKind; } + + /// \brief Is this an absolute (as opposed to relocatable) value. + bool isAbsolute() const { return !SymA && !SymB; } + + /// \brief Print the value to the stream \p OS. + void print(raw_ostream &OS) const; + + /// \brief Print the value to stderr. + void dump() const; + + MCSymbolRefExpr::VariantKind getAccessVariant() const; + + static MCValue get(const MCSymbolRefExpr *SymA, + const MCSymbolRefExpr *SymB = nullptr, + int64_t Val = 0, uint32_t RefKind = 0) { + MCValue R; + R.Cst = Val; + R.SymA = SymA; + R.SymB = SymB; + R.RefKind = RefKind; + return R; + } + + static MCValue get(int64_t Val) { + MCValue R; + R.Cst = Val; + R.SymA = nullptr; + R.SymB = nullptr; + R.RefKind = 0; + return R; + } + +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCWin64EH.h b/llvm/include/llvm/MC/MCWin64EH.h new file mode 100644 index 0000000..7b03fb1 --- /dev/null +++ b/llvm/include/llvm/MC/MCWin64EH.h @@ -0,0 +1,63 @@ +//===- MCWin64EH.h - Machine Code Win64 EH support --------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains declarations to support the Win64 Exception Handling +// scheme in MC. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCWIN64EH_H +#define LLVM_MC_MCWIN64EH_H + +#include "llvm/MC/MCWinEH.h" +#include "llvm/Support/Win64EH.h" +#include + +namespace llvm_ks { +class MCStreamer; +class MCSymbol; + +namespace Win64EH { +struct Instruction { + static WinEH::Instruction PushNonVol(MCSymbol *L, unsigned Reg) { + return WinEH::Instruction(Win64EH::UOP_PushNonVol, L, Reg, -1); + } + static WinEH::Instruction Alloc(MCSymbol *L, unsigned Size) { + return WinEH::Instruction(Size > 128 ? UOP_AllocLarge : UOP_AllocSmall, L, + -1, Size); + } + static WinEH::Instruction PushMachFrame(MCSymbol *L, bool Code) { + return WinEH::Instruction(UOP_PushMachFrame, L, -1, Code ? 1 : 0); + } + static WinEH::Instruction SaveNonVol(MCSymbol *L, unsigned Reg, + unsigned Offset) { + return WinEH::Instruction(Offset > 512 * 1024 - 8 ? UOP_SaveNonVolBig + : UOP_SaveNonVol, + L, Reg, Offset); + } + static WinEH::Instruction SaveXMM(MCSymbol *L, unsigned Reg, + unsigned Offset) { + return WinEH::Instruction(Offset > 512 * 1024 - 8 ? UOP_SaveXMM128Big + : UOP_SaveXMM128, + L, Reg, Offset); + } + static WinEH::Instruction SetFPReg(MCSymbol *L, unsigned Reg, unsigned Off) { + return WinEH::Instruction(UOP_SetFPReg, L, Reg, Off); + } +}; + +class UnwindEmitter : public WinEH::UnwindEmitter { +public: + void Emit(MCStreamer &Streamer) const override; + void EmitUnwindInfo(MCStreamer &Streamer, WinEH::FrameInfo *FI) const override; +}; +} +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/MCWinEH.h b/llvm/include/llvm/MC/MCWinEH.h new file mode 100644 index 0000000..532d10f --- /dev/null +++ b/llvm/include/llvm/MC/MCWinEH.h @@ -0,0 +1,84 @@ +//===- MCWinEH.h - Windows Unwinding Support --------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCWINEH_H +#define LLVM_MC_MCWINEH_H + +#include + +namespace llvm_ks { +class MCContext; +class MCSection; +class MCStreamer; +class MCSymbol; +class StringRef; + +namespace WinEH { +struct Instruction { + const MCSymbol *Label; + const unsigned Offset; + const unsigned Register; + const unsigned Operation; + + Instruction(unsigned Op, MCSymbol *L, unsigned Reg, unsigned Off) + : Label(L), Offset(Off), Register(Reg), Operation(Op) {} +}; + +struct FrameInfo { + const MCSymbol *Begin; + const MCSymbol *End; + const MCSymbol *ExceptionHandler; + const MCSymbol *Function; + const MCSymbol *PrologEnd; + const MCSymbol *Symbol; + + bool HandlesUnwind; + bool HandlesExceptions; + + int LastFrameInst; + const FrameInfo *ChainedParent; + std::vector Instructions; + + FrameInfo() + : Begin(nullptr), End(nullptr), ExceptionHandler(nullptr), + Function(nullptr), PrologEnd(nullptr), Symbol(nullptr), + HandlesUnwind(false), HandlesExceptions(false), LastFrameInst(-1), + ChainedParent(nullptr), Instructions() {} + FrameInfo(const MCSymbol *Function, const MCSymbol *BeginFuncEHLabel) + : Begin(BeginFuncEHLabel), End(nullptr), ExceptionHandler(nullptr), + Function(Function), PrologEnd(nullptr), Symbol(nullptr), + HandlesUnwind(false), HandlesExceptions(false), LastFrameInst(-1), + ChainedParent(nullptr), Instructions() {} + FrameInfo(const MCSymbol *Function, const MCSymbol *BeginFuncEHLabel, + const FrameInfo *ChainedParent) + : Begin(BeginFuncEHLabel), End(nullptr), ExceptionHandler(nullptr), + Function(Function), PrologEnd(nullptr), Symbol(nullptr), + HandlesUnwind(false), HandlesExceptions(false), LastFrameInst(-1), + ChainedParent(ChainedParent), Instructions() {} +}; + +class UnwindEmitter { +public: + static MCSection *getPDataSection(const MCSymbol *Function, + MCContext &Context); + static MCSection *getXDataSection(const MCSymbol *Function, + MCContext &Context); + + virtual ~UnwindEmitter() { } + + // + // This emits the unwind info sections (.pdata and .xdata in PE/COFF). + // + virtual void Emit(MCStreamer &Streamer) const = 0; + virtual void EmitUnwindInfo(MCStreamer &Streamer, FrameInfo *FI) const = 0; +}; +} +} + +#endif diff --git a/llvm/include/llvm/MC/MachineLocation.h b/llvm/include/llvm/MC/MachineLocation.h new file mode 100644 index 0000000..2a57234 --- /dev/null +++ b/llvm/include/llvm/MC/MachineLocation.h @@ -0,0 +1,79 @@ +//===-- llvm/MC/MachineLocation.h -------------------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// The MachineLocation class is used to represent a simple location in a machine +// frame. Locations will be one of two forms; a register or an address formed +// from a base address plus an offset. Register indirection can be specified by +// explicitly passing an offset to the constructor. +//===----------------------------------------------------------------------===// + + +#ifndef LLVM_MC_MACHINELOCATION_H +#define LLVM_MC_MACHINELOCATION_H + +#include "llvm/Support/Compiler.h" +#include "llvm/Support/DataTypes.h" + +namespace llvm_ks { + class MCSymbol; + +class MachineLocation { +private: + bool IsRegister; // True if location is a register. + unsigned Register; // gcc/gdb register number. + int Offset; // Displacement if not register. +public: + enum : uint32_t { + // The target register number for an abstract frame pointer. The value is + // an arbitrary value that doesn't collide with any real target register. + VirtualFP = ~0U + }; + MachineLocation() + : IsRegister(false), Register(0), Offset(0) {} + /// Create a direct register location. + explicit MachineLocation(unsigned R) + : IsRegister(true), Register(R), Offset(0) {} + /// Create a register-indirect location with an offset. + MachineLocation(unsigned R, int O) + : IsRegister(false), Register(R), Offset(O) {} + + bool operator==(const MachineLocation &Other) const { + return IsRegister == Other.IsRegister && Register == Other.Register && + Offset == Other.Offset; + } + + // Accessors. + /// \return true iff this is a register-indirect location. + bool isIndirect() const { return !IsRegister; } + bool isReg() const { return IsRegister; } + unsigned getReg() const { return Register; } + int getOffset() const { return Offset; } + void setIsRegister(bool Is) { IsRegister = Is; } + void setRegister(unsigned R) { Register = R; } + void setOffset(int O) { Offset = O; } + /// Make this location a direct register location. + void set(unsigned R) { + IsRegister = true; + Register = R; + Offset = 0; + } + /// Make this location a register-indirect+offset location. + void set(unsigned R, int O) { + IsRegister = false; + Register = R; + Offset = O; + } +}; + +inline bool operator!=(const MachineLocation &LHS, const MachineLocation &RHS) { + return !(LHS == RHS); +} + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/MC/SectionKind.h b/llvm/include/llvm/MC/SectionKind.h new file mode 100644 index 0000000..8841eb0 --- /dev/null +++ b/llvm/include/llvm/MC/SectionKind.h @@ -0,0 +1,195 @@ +//===-- llvm/MC/SectionKind.h - Classification of sections ------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_SECTIONKIND_H +#define LLVM_MC_SECTIONKIND_H + +namespace llvm_ks { + +/// SectionKind - This is a simple POD value that classifies the properties of +/// a section. A section is classified into the deepest possible +/// classification, and then the target maps them onto their sections based on +/// what capabilities they have. +/// +/// The comments below describe these as if they were an inheritance hierarchy +/// in order to explain the predicates below. +/// +class SectionKind { + enum Kind { + /// Metadata - Debug info sections or other metadata. + Metadata, + + /// Text - Text section, used for functions and other executable code. + Text, + + /// ReadOnly - Data that is never written to at program runtime by the + /// program or the dynamic linker. Things in the top-level readonly + /// SectionKind are not mergeable. + ReadOnly, + + /// MergableCString - Any null-terminated string which allows merging. + /// These values are known to end in a nul value of the specified size, + /// not otherwise contain a nul value, and be mergable. This allows the + /// linker to unique the strings if it so desires. + + /// Mergeable1ByteCString - 1 byte mergable, null terminated, string. + Mergeable1ByteCString, + + /// Mergeable2ByteCString - 2 byte mergable, null terminated, string. + Mergeable2ByteCString, + + /// Mergeable4ByteCString - 4 byte mergable, null terminated, string. + Mergeable4ByteCString, + + /// MergeableConst - These are sections for merging fixed-length + /// constants together. For example, this can be used to unique + /// constant pool entries etc. + + /// MergeableConst4 - This is a section used by 4-byte constants, + /// for example, floats. + MergeableConst4, + + /// MergeableConst8 - This is a section used by 8-byte constants, + /// for example, doubles. + MergeableConst8, + + /// MergeableConst16 - This is a section used by 16-byte constants, + /// for example, vectors. + MergeableConst16, + + /// Writeable - This is the base of all segments that need to be written + /// to during program runtime. + + /// ThreadLocal - This is the base of all TLS segments. All TLS + /// objects must be writeable, otherwise there is no reason for them to + /// be thread local! + + /// ThreadBSS - Zero-initialized TLS data objects. + ThreadBSS, + + /// ThreadData - Initialized TLS data objects. + ThreadData, + + /// GlobalWriteableData - Writeable data that is global (not thread + /// local). + + /// BSS - Zero initialized writeable data. + BSS, + + /// BSSLocal - This is BSS (zero initialized and writable) data + /// which has local linkage. + BSSLocal, + + /// BSSExtern - This is BSS data with normal external linkage. + BSSExtern, + + /// Common - Data with common linkage. These represent tentative + /// definitions, which always have a zero initializer and are never + /// marked 'constant'. + Common, + + /// This is writeable data that has a non-zero initializer. + Data, + + /// ReadOnlyWithRel - These are global variables that are never + /// written to by the program, but that have relocations, so they + /// must be stuck in a writeable section so that the dynamic linker + /// can write to them. If it chooses to, the dynamic linker can + /// mark the pages these globals end up on as read-only after it is + /// done with its relocation phase. + ReadOnlyWithRel + } K : 8; +public: + + bool isMetadata() const { return K == Metadata; } + bool isText() const { return K == Text; } + + bool isReadOnly() const { + return K == ReadOnly || isMergeableCString() || + isMergeableConst(); + } + + bool isMergeableCString() const { + return K == Mergeable1ByteCString || K == Mergeable2ByteCString || + K == Mergeable4ByteCString; + } + bool isMergeable1ByteCString() const { return K == Mergeable1ByteCString; } + bool isMergeable2ByteCString() const { return K == Mergeable2ByteCString; } + bool isMergeable4ByteCString() const { return K == Mergeable4ByteCString; } + + bool isMergeableConst() const { + return K == MergeableConst4 || K == MergeableConst8 || + K == MergeableConst16; + } + bool isMergeableConst4() const { return K == MergeableConst4; } + bool isMergeableConst8() const { return K == MergeableConst8; } + bool isMergeableConst16() const { return K == MergeableConst16; } + + bool isWriteable() const { + return isThreadLocal() || isGlobalWriteableData(); + } + + bool isThreadLocal() const { + return K == ThreadData || K == ThreadBSS; + } + + bool isThreadBSS() const { return K == ThreadBSS; } + bool isThreadData() const { return K == ThreadData; } + + bool isGlobalWriteableData() const { + return isBSS() || isCommon() || isData() || isReadOnlyWithRel(); + } + + bool isBSS() const { return K == BSS || K == BSSLocal || K == BSSExtern; } + bool isBSSLocal() const { return K == BSSLocal; } + bool isBSSExtern() const { return K == BSSExtern; } + + bool isCommon() const { return K == Common; } + + bool isData() const { return K == Data; } + + bool isReadOnlyWithRel() const { + return K == ReadOnlyWithRel; + } +private: + static SectionKind get(Kind K) { + SectionKind Res; + Res.K = K; + return Res; + } +public: + + static SectionKind getMetadata() { return get(Metadata); } + static SectionKind getText() { return get(Text); } + static SectionKind getReadOnly() { return get(ReadOnly); } + static SectionKind getMergeable1ByteCString() { + return get(Mergeable1ByteCString); + } + static SectionKind getMergeable2ByteCString() { + return get(Mergeable2ByteCString); + } + static SectionKind getMergeable4ByteCString() { + return get(Mergeable4ByteCString); + } + static SectionKind getMergeableConst4() { return get(MergeableConst4); } + static SectionKind getMergeableConst8() { return get(MergeableConst8); } + static SectionKind getMergeableConst16() { return get(MergeableConst16); } + static SectionKind getThreadBSS() { return get(ThreadBSS); } + static SectionKind getThreadData() { return get(ThreadData); } + static SectionKind getBSS() { return get(BSS); } + static SectionKind getBSSLocal() { return get(BSSLocal); } + static SectionKind getBSSExtern() { return get(BSSExtern); } + static SectionKind getCommon() { return get(Common); } + static SectionKind getData() { return get(Data); } + static SectionKind getReadOnlyWithRel() { return get(ReadOnlyWithRel); } +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/MC/StringTableBuilder.h b/llvm/include/llvm/MC/StringTableBuilder.h new file mode 100644 index 0000000..4ffde8f --- /dev/null +++ b/llvm/include/llvm/MC/StringTableBuilder.h @@ -0,0 +1,71 @@ +//===-- StringTableBuilder.h - String table building utility ------*- C++ -*-=// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_STRINGTABLEBUILDER_H +#define LLVM_MC_STRINGTABLEBUILDER_H + +#include "llvm/ADT/SmallString.h" +#include "llvm/ADT/DenseMap.h" +#include + +namespace llvm_ks { + +/// \brief Utility for building string tables with deduplicated suffixes. +class StringTableBuilder { +public: + enum Kind { ELF, WinCOFF, MachO, RAW }; + +private: + SmallString<256> StringTable; + DenseMap StringIndexMap; + size_t Size = 0; + Kind K; + + void finalizeStringTable(bool Optimize); + +public: + StringTableBuilder(Kind K); + + /// \brief Add a string to the builder. Returns the position of S in the + /// table. The position will be changed if finalize is used. + /// Can only be used before the table is finalized. + size_t add(StringRef S); + + /// \brief Analyze the strings and build the final table. No more strings can + /// be added after this point. + void finalize(); + + /// Finalize the string table without reording it. In this mode, offsets + /// returned by add will still be valid. + void finalizeInOrder(); + + /// \brief Retrieve the string table data. Can only be used after the table + /// is finalized. + StringRef data() const { + assert(isFinalized()); + return StringTable; + } + + /// \brief Get the offest of a string in the string table. Can only be used + /// after the table is finalized. + size_t getOffset(StringRef S) const; + + const DenseMap &getMap() const { return StringIndexMap; } + size_t getSize() const { return Size; } + void clear(); + +private: + bool isFinalized() const { + return !StringTable.empty(); + } +}; + +} // end llvm namespace + +#endif diff --git a/llvm/include/llvm/MC/SubtargetFeature.h b/llvm/include/llvm/MC/SubtargetFeature.h new file mode 100644 index 0000000..4673877 --- /dev/null +++ b/llvm/include/llvm/MC/SubtargetFeature.h @@ -0,0 +1,131 @@ +//===-- llvm/MC/SubtargetFeature.h - CPU characteristics --------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines and manages user or tool specified CPU characteristics. +// The intent is to be able to package specific features that should or should +// not be used on a specific target processor. A tool, such as llc, could, as +// as example, gather chip info from the command line, a long with features +// that should be used on that chip. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_SUBTARGETFEATURE_H +#define LLVM_MC_SUBTARGETFEATURE_H + +#include "llvm/ADT/ArrayRef.h" +#include "llvm/ADT/Triple.h" +#include "llvm/Support/DataTypes.h" +#include + +namespace llvm_ks { + class raw_ostream; + class StringRef; + +// A container class for subtarget features. +// This is convenient because std::bitset does not have a constructor +// with an initializer list of set bits. +const unsigned MAX_SUBTARGET_FEATURES = 128; +class FeatureBitset : public std::bitset { +public: + // Cannot inherit constructors because it's not supported by VC++.. + FeatureBitset() : bitset() {} + + FeatureBitset(const bitset& B) : bitset(B) {} + + FeatureBitset(std::initializer_list Init) : bitset() { + for (auto I : Init) + set(I); + } +}; + +//===----------------------------------------------------------------------===// +/// +/// SubtargetFeatureKV - Used to provide key value pairs for feature and +/// CPU bit flags. +// +struct SubtargetFeatureKV { + const char *Key; // K-V key string + const char *Desc; // Help descriptor + FeatureBitset Value; // K-V integer value + FeatureBitset Implies; // K-V bit mask + + // Compare routine for std::lower_bound + bool operator<(StringRef S) const { + return StringRef(Key) < S; + } + + // Compare routine for std::is_sorted. + bool operator<(const SubtargetFeatureKV &Other) const { + return StringRef(Key) < StringRef(Other.Key); + } +}; + +//===----------------------------------------------------------------------===// +/// +/// SubtargetInfoKV - Used to provide key value pairs for CPU and arbitrary +/// pointers. +// +struct SubtargetInfoKV { + const char *Key; // K-V key string + const void *Value; // K-V pointer value + + // Compare routine for std::lower_bound + bool operator<(StringRef S) const { + return StringRef(Key) < S; + } +}; + +//===----------------------------------------------------------------------===// +/// +/// SubtargetFeatures - Manages the enabling and disabling of subtarget +/// specific features. Features are encoded as a string of the form +/// "+attr1,+attr2,-attr3,...,+attrN" +/// A comma separates each feature from the next (all lowercase.) +/// Each of the remaining features is prefixed with + or - indicating whether +/// that feature should be enabled or disabled contrary to the cpu +/// specification. +/// + +class SubtargetFeatures { + std::vector Features; // Subtarget features as a vector +public: + explicit SubtargetFeatures(StringRef Initial = ""); + + /// Features string accessors. + std::string getString() const; + + /// Adding Features. + void AddFeature(StringRef String, bool Enable = true); + + /// ToggleFeature - Toggle a feature and update the feature bits. + static void ToggleFeature(FeatureBitset &Bits, StringRef String, + ArrayRef FeatureTable); + + /// Apply the feature flag and update the feature bits. + static void ApplyFeatureFlag(FeatureBitset &Bits, StringRef Feature, + ArrayRef FeatureTable); + + /// Get feature bits of a CPU. + FeatureBitset getFeatureBits(StringRef CPU, + ArrayRef CPUTable, + ArrayRef FeatureTable); + + /// Print feature string. + void print(raw_ostream &OS) const; + + // Dump feature info. + void dump() const; + + /// Adds the default features for the specified target triple. + void getDefaultSubtargetFeatures(const Triple& Triple); +}; + +} // End namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/Object/Binary.h b/llvm/include/llvm/Object/Binary.h new file mode 100644 index 0000000..9228bb1 --- /dev/null +++ b/llvm/include/llvm/Object/Binary.h @@ -0,0 +1,192 @@ +//===- Binary.h - A generic binary file -------------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the Binary class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_OBJECT_BINARY_H +#define LLVM_OBJECT_BINARY_H + +#include "llvm/Object/Error.h" +#include "llvm/Support/ErrorOr.h" +#include "llvm/Support/FileSystem.h" +#include "llvm/Support/MemoryBuffer.h" + +namespace llvm_ks { + +class LLVMContext; +class StringRef; + +namespace object { + +class Binary { +private: + Binary() = delete; + Binary(const Binary &other) = delete; + + unsigned int TypeID; + +protected: + MemoryBufferRef Data; + + Binary(unsigned int Type, MemoryBufferRef Source); + + enum { + ID_Archive, + ID_MachOUniversalBinary, + ID_COFFImportFile, + ID_IR, // LLVM IR + ID_FunctionIndex, // Function summary index + + // Object and children. + ID_StartObjects, + ID_COFF, + + ID_ELF32L, // ELF 32-bit, little endian + ID_ELF32B, // ELF 32-bit, big endian + ID_ELF64L, // ELF 64-bit, little endian + ID_ELF64B, // ELF 64-bit, big endian + + ID_MachO32L, // MachO 32-bit, little endian + ID_MachO32B, // MachO 32-bit, big endian + ID_MachO64L, // MachO 64-bit, little endian + ID_MachO64B, // MachO 64-bit, big endian + + ID_EndObjects + }; + + static inline unsigned int getELFType(bool isLE, bool is64Bits) { + if (isLE) + return is64Bits ? ID_ELF64L : ID_ELF32L; + else + return is64Bits ? ID_ELF64B : ID_ELF32B; + } + + static unsigned int getMachOType(bool isLE, bool is64Bits) { + if (isLE) + return is64Bits ? ID_MachO64L : ID_MachO32L; + else + return is64Bits ? ID_MachO64B : ID_MachO32B; + } + +public: + virtual ~Binary(); + + StringRef getData() const; + StringRef getFileName() const; + MemoryBufferRef getMemoryBufferRef() const; + + // Cast methods. + unsigned int getType() const { return TypeID; } + + // Convenience methods + bool isObject() const { + return TypeID > ID_StartObjects && TypeID < ID_EndObjects; + } + + bool isSymbolic() const { + return isIR() || isObject(); + } + + bool isArchive() const { + return TypeID == ID_Archive; + } + + bool isMachOUniversalBinary() const { + return TypeID == ID_MachOUniversalBinary; + } + + bool isELF() const { + return TypeID >= ID_ELF32L && TypeID <= ID_ELF64B; + } + + bool isMachO() const { + return TypeID >= ID_MachO32L && TypeID <= ID_MachO64B; + } + + bool isCOFF() const { + return TypeID == ID_COFF; + } + + bool isCOFFImportFile() const { + return TypeID == ID_COFFImportFile; + } + + bool isIR() const { + return TypeID == ID_IR; + } + + bool isFunctionIndex() const { return TypeID == ID_FunctionIndex; } + + bool isLittleEndian() const { + return !(TypeID == ID_ELF32B || TypeID == ID_ELF64B || + TypeID == ID_MachO32B || TypeID == ID_MachO64B); + } +}; + +/// @brief Create a Binary from Source, autodetecting the file type. +/// +/// @param Source The data to create the Binary from. +ErrorOr> createBinary(MemoryBufferRef Source, + LLVMContext *Context = nullptr); + +template class OwningBinary { + std::unique_ptr Bin; + std::unique_ptr Buf; + +public: + OwningBinary(); + OwningBinary(std::unique_ptr Bin, std::unique_ptr Buf); + OwningBinary(OwningBinary&& Other); + OwningBinary &operator=(OwningBinary &&Other); + + std::pair, std::unique_ptr> takeBinary(); + + T* getBinary(); + const T* getBinary() const; +}; + +template +OwningBinary::OwningBinary(std::unique_ptr Bin, + std::unique_ptr Buf) + : Bin(std::move(Bin)), Buf(std::move(Buf)) {} + +template OwningBinary::OwningBinary() {} + +template +OwningBinary::OwningBinary(OwningBinary &&Other) + : Bin(std::move(Other.Bin)), Buf(std::move(Other.Buf)) {} + +template +OwningBinary &OwningBinary::operator=(OwningBinary &&Other) { + Bin = std::move(Other.Bin); + Buf = std::move(Other.Buf); + return *this; +} + +template +std::pair, std::unique_ptr> +OwningBinary::takeBinary() { + return std::make_pair(std::move(Bin), std::move(Buf)); +} + +template T* OwningBinary::getBinary() { + return Bin.get(); +} + +template const T* OwningBinary::getBinary() const { + return Bin.get(); +} + +ErrorOr> createBinary(StringRef Path); +} +} + +#endif diff --git a/llvm/include/llvm/Object/COFF.h b/llvm/include/llvm/Object/COFF.h new file mode 100644 index 0000000..e909550 --- /dev/null +++ b/llvm/include/llvm/Object/COFF.h @@ -0,0 +1,915 @@ +//===- COFF.h - COFF object file implementation -----------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the COFFObjectFile class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_OBJECT_COFF_H +#define LLVM_OBJECT_COFF_H + +#include "llvm/ADT/PointerUnion.h" +#include "llvm/Object/ObjectFile.h" +#include "llvm/Support/COFF.h" +#include "llvm/Support/Endian.h" +#include "llvm/Support/ErrorOr.h" + +namespace llvm_ks { +template class ArrayRef; + +namespace object { +class ImportDirectoryEntryRef; +class DelayImportDirectoryEntryRef; +class ExportDirectoryEntryRef; +class ImportedSymbolRef; +class BaseRelocRef; +typedef content_iterator import_directory_iterator; +typedef content_iterator + delay_import_directory_iterator; +typedef content_iterator export_directory_iterator; +typedef content_iterator imported_symbol_iterator; +typedef content_iterator base_reloc_iterator; + +/// The DOS compatible header at the front of all PE/COFF executables. +struct dos_header { + char Magic[2]; + support::ulittle16_t UsedBytesInTheLastPage; + support::ulittle16_t FileSizeInPages; + support::ulittle16_t NumberOfRelocationItems; + support::ulittle16_t HeaderSizeInParagraphs; + support::ulittle16_t MinimumExtraParagraphs; + support::ulittle16_t MaximumExtraParagraphs; + support::ulittle16_t InitialRelativeSS; + support::ulittle16_t InitialSP; + support::ulittle16_t Checksum; + support::ulittle16_t InitialIP; + support::ulittle16_t InitialRelativeCS; + support::ulittle16_t AddressOfRelocationTable; + support::ulittle16_t OverlayNumber; + support::ulittle16_t Reserved[4]; + support::ulittle16_t OEMid; + support::ulittle16_t OEMinfo; + support::ulittle16_t Reserved2[10]; + support::ulittle32_t AddressOfNewExeHeader; +}; + +struct coff_file_header { + support::ulittle16_t Machine; + support::ulittle16_t NumberOfSections; + support::ulittle32_t TimeDateStamp; + support::ulittle32_t PointerToSymbolTable; + support::ulittle32_t NumberOfSymbols; + support::ulittle16_t SizeOfOptionalHeader; + support::ulittle16_t Characteristics; + + bool isImportLibrary() const { return NumberOfSections == 0xffff; } +}; + +struct coff_bigobj_file_header { + support::ulittle16_t Sig1; + support::ulittle16_t Sig2; + support::ulittle16_t Version; + support::ulittle16_t Machine; + support::ulittle32_t TimeDateStamp; + uint8_t UUID[16]; + support::ulittle32_t unused1; + support::ulittle32_t unused2; + support::ulittle32_t unused3; + support::ulittle32_t unused4; + support::ulittle32_t NumberOfSections; + support::ulittle32_t PointerToSymbolTable; + support::ulittle32_t NumberOfSymbols; +}; + +/// The 32-bit PE header that follows the COFF header. +struct pe32_header { + support::ulittle16_t Magic; + uint8_t MajorLinkerVersion; + uint8_t MinorLinkerVersion; + support::ulittle32_t SizeOfCode; + support::ulittle32_t SizeOfInitializedData; + support::ulittle32_t SizeOfUninitializedData; + support::ulittle32_t AddressOfEntryPoint; + support::ulittle32_t BaseOfCode; + support::ulittle32_t BaseOfData; + support::ulittle32_t ImageBase; + support::ulittle32_t SectionAlignment; + support::ulittle32_t FileAlignment; + support::ulittle16_t MajorOperatingSystemVersion; + support::ulittle16_t MinorOperatingSystemVersion; + support::ulittle16_t MajorImageVersion; + support::ulittle16_t MinorImageVersion; + support::ulittle16_t MajorSubsystemVersion; + support::ulittle16_t MinorSubsystemVersion; + support::ulittle32_t Win32VersionValue; + support::ulittle32_t SizeOfImage; + support::ulittle32_t SizeOfHeaders; + support::ulittle32_t CheckSum; + support::ulittle16_t Subsystem; + // FIXME: This should be DllCharacteristics. + support::ulittle16_t DLLCharacteristics; + support::ulittle32_t SizeOfStackReserve; + support::ulittle32_t SizeOfStackCommit; + support::ulittle32_t SizeOfHeapReserve; + support::ulittle32_t SizeOfHeapCommit; + support::ulittle32_t LoaderFlags; + // FIXME: This should be NumberOfRvaAndSizes. + support::ulittle32_t NumberOfRvaAndSize; +}; + +/// The 64-bit PE header that follows the COFF header. +struct pe32plus_header { + support::ulittle16_t Magic; + uint8_t MajorLinkerVersion; + uint8_t MinorLinkerVersion; + support::ulittle32_t SizeOfCode; + support::ulittle32_t SizeOfInitializedData; + support::ulittle32_t SizeOfUninitializedData; + support::ulittle32_t AddressOfEntryPoint; + support::ulittle32_t BaseOfCode; + support::ulittle64_t ImageBase; + support::ulittle32_t SectionAlignment; + support::ulittle32_t FileAlignment; + support::ulittle16_t MajorOperatingSystemVersion; + support::ulittle16_t MinorOperatingSystemVersion; + support::ulittle16_t MajorImageVersion; + support::ulittle16_t MinorImageVersion; + support::ulittle16_t MajorSubsystemVersion; + support::ulittle16_t MinorSubsystemVersion; + support::ulittle32_t Win32VersionValue; + support::ulittle32_t SizeOfImage; + support::ulittle32_t SizeOfHeaders; + support::ulittle32_t CheckSum; + support::ulittle16_t Subsystem; + support::ulittle16_t DLLCharacteristics; + support::ulittle64_t SizeOfStackReserve; + support::ulittle64_t SizeOfStackCommit; + support::ulittle64_t SizeOfHeapReserve; + support::ulittle64_t SizeOfHeapCommit; + support::ulittle32_t LoaderFlags; + support::ulittle32_t NumberOfRvaAndSize; +}; + +struct data_directory { + support::ulittle32_t RelativeVirtualAddress; + support::ulittle32_t Size; +}; + +struct import_directory_table_entry { + support::ulittle32_t ImportLookupTableRVA; + support::ulittle32_t TimeDateStamp; + support::ulittle32_t ForwarderChain; + support::ulittle32_t NameRVA; + support::ulittle32_t ImportAddressTableRVA; +}; + +template +struct import_lookup_table_entry { + IntTy Data; + + bool isOrdinal() const { return Data < 0; } + + uint16_t getOrdinal() const { + assert(isOrdinal() && "ILT entry is not an ordinal!"); + return Data & 0xFFFF; + } + + uint32_t getHintNameRVA() const { + assert(!isOrdinal() && "ILT entry is not a Hint/Name RVA!"); + return Data & 0xFFFFFFFF; + } +}; + +typedef import_lookup_table_entry + import_lookup_table_entry32; +typedef import_lookup_table_entry + import_lookup_table_entry64; + +struct delay_import_directory_table_entry { + // dumpbin reports this field as "Characteristics" instead of "Attributes". + support::ulittle32_t Attributes; + support::ulittle32_t Name; + support::ulittle32_t ModuleHandle; + support::ulittle32_t DelayImportAddressTable; + support::ulittle32_t DelayImportNameTable; + support::ulittle32_t BoundDelayImportTable; + support::ulittle32_t UnloadDelayImportTable; + support::ulittle32_t TimeStamp; +}; + +struct export_directory_table_entry { + support::ulittle32_t ExportFlags; + support::ulittle32_t TimeDateStamp; + support::ulittle16_t MajorVersion; + support::ulittle16_t MinorVersion; + support::ulittle32_t NameRVA; + support::ulittle32_t OrdinalBase; + support::ulittle32_t AddressTableEntries; + support::ulittle32_t NumberOfNamePointers; + support::ulittle32_t ExportAddressTableRVA; + support::ulittle32_t NamePointerRVA; + support::ulittle32_t OrdinalTableRVA; +}; + +union export_address_table_entry { + support::ulittle32_t ExportRVA; + support::ulittle32_t ForwarderRVA; +}; + +typedef support::ulittle32_t export_name_pointer_table_entry; +typedef support::ulittle16_t export_ordinal_table_entry; + +struct StringTableOffset { + support::ulittle32_t Zeroes; + support::ulittle32_t Offset; +}; + +template +struct coff_symbol { + union { + char ShortName[COFF::NameSize]; + StringTableOffset Offset; + } Name; + + support::ulittle32_t Value; + SectionNumberType SectionNumber; + + support::ulittle16_t Type; + + uint8_t StorageClass; + uint8_t NumberOfAuxSymbols; +}; + +typedef coff_symbol coff_symbol16; +typedef coff_symbol coff_symbol32; + +// Contains only common parts of coff_symbol16 and coff_symbol32. +struct coff_symbol_generic { + union { + char ShortName[COFF::NameSize]; + StringTableOffset Offset; + } Name; + support::ulittle32_t Value; +}; + +class COFFSymbolRef { +public: + COFFSymbolRef(const coff_symbol16 *CS) : CS16(CS), CS32(nullptr) {} + COFFSymbolRef(const coff_symbol32 *CS) : CS16(nullptr), CS32(CS) {} + COFFSymbolRef() : CS16(nullptr), CS32(nullptr) {} + + const void *getRawPtr() const { + return CS16 ? static_cast(CS16) : CS32; + } + + const coff_symbol_generic *getGeneric() const { + if (CS16) + return reinterpret_cast(CS16); + return reinterpret_cast(CS32); + } + + friend bool operator<(COFFSymbolRef A, COFFSymbolRef B) { + return A.getRawPtr() < B.getRawPtr(); + } + + bool isBigObj() const { + if (CS16) + return false; + if (CS32) + return true; + llvm_unreachable("COFFSymbolRef points to nothing!"); + } + + const char *getShortName() const { + return CS16 ? CS16->Name.ShortName : CS32->Name.ShortName; + } + + const StringTableOffset &getStringTableOffset() const { + assert(isSet() && "COFFSymbolRef points to nothing!"); + return CS16 ? CS16->Name.Offset : CS32->Name.Offset; + } + + uint32_t getValue() const { return CS16 ? CS16->Value : CS32->Value; } + + int32_t getSectionNumber() const { + assert(isSet() && "COFFSymbolRef points to nothing!"); + if (CS16) { + // Reserved sections are returned as negative numbers. + if (CS16->SectionNumber <= COFF::MaxNumberOfSections16) + return CS16->SectionNumber; + return static_cast(CS16->SectionNumber); + } + return static_cast(CS32->SectionNumber); + } + + uint16_t getType() const { + assert(isSet() && "COFFSymbolRef points to nothing!"); + return CS16 ? CS16->Type : CS32->Type; + } + + uint8_t getStorageClass() const { + assert(isSet() && "COFFSymbolRef points to nothing!"); + return CS16 ? CS16->StorageClass : CS32->StorageClass; + } + + uint8_t getNumberOfAuxSymbols() const { + assert(isSet() && "COFFSymbolRef points to nothing!"); + return CS16 ? CS16->NumberOfAuxSymbols : CS32->NumberOfAuxSymbols; + } + + uint8_t getBaseType() const { return getType() & 0x0F; } + + uint8_t getComplexType() const { + return (getType() & 0xF0) >> COFF::SCT_COMPLEX_TYPE_SHIFT; + } + + bool isAbsolute() const { + return getSectionNumber() == -1; + } + + bool isExternal() const { + return getStorageClass() == COFF::IMAGE_SYM_CLASS_EXTERNAL; + } + + bool isCommon() const { + return isExternal() && getSectionNumber() == COFF::IMAGE_SYM_UNDEFINED && + getValue() != 0; + } + + bool isUndefined() const { + return isExternal() && getSectionNumber() == COFF::IMAGE_SYM_UNDEFINED && + getValue() == 0; + } + + bool isWeakExternal() const { + return getStorageClass() == COFF::IMAGE_SYM_CLASS_WEAK_EXTERNAL; + } + + bool isFunctionDefinition() const { + return isExternal() && getBaseType() == COFF::IMAGE_SYM_TYPE_NULL && + getComplexType() == COFF::IMAGE_SYM_DTYPE_FUNCTION && + !COFF::isReservedSectionNumber(getSectionNumber()); + } + + bool isFunctionLineInfo() const { + return getStorageClass() == COFF::IMAGE_SYM_CLASS_FUNCTION; + } + + bool isAnyUndefined() const { + return isUndefined() || isWeakExternal(); + } + + bool isFileRecord() const { + return getStorageClass() == COFF::IMAGE_SYM_CLASS_FILE; + } + + bool isSection() const { + return getStorageClass() == COFF::IMAGE_SYM_CLASS_SECTION; + } + + bool isSectionDefinition() const { + // C++/CLI creates external ABS symbols for non-const appdomain globals. + // These are also followed by an auxiliary section definition. + bool isAppdomainGlobal = + getStorageClass() == COFF::IMAGE_SYM_CLASS_EXTERNAL && + getSectionNumber() == COFF::IMAGE_SYM_ABSOLUTE; + bool isOrdinarySection = getStorageClass() == COFF::IMAGE_SYM_CLASS_STATIC; + if (!getNumberOfAuxSymbols()) + return false; + return isAppdomainGlobal || isOrdinarySection; + } + + bool isCLRToken() const { + return getStorageClass() == COFF::IMAGE_SYM_CLASS_CLR_TOKEN; + } + +private: + bool isSet() const { return CS16 || CS32; } + + const coff_symbol16 *CS16; + const coff_symbol32 *CS32; +}; + +struct coff_section { + char Name[COFF::NameSize]; + support::ulittle32_t VirtualSize; + support::ulittle32_t VirtualAddress; + support::ulittle32_t SizeOfRawData; + support::ulittle32_t PointerToRawData; + support::ulittle32_t PointerToRelocations; + support::ulittle32_t PointerToLinenumbers; + support::ulittle16_t NumberOfRelocations; + support::ulittle16_t NumberOfLinenumbers; + support::ulittle32_t Characteristics; + + // Returns true if the actual number of relocations is stored in + // VirtualAddress field of the first relocation table entry. + bool hasExtendedRelocations() const { + return (Characteristics & COFF::IMAGE_SCN_LNK_NRELOC_OVFL) && + NumberOfRelocations == UINT16_MAX; + } +}; + +struct coff_relocation { + support::ulittle32_t VirtualAddress; + support::ulittle32_t SymbolTableIndex; + support::ulittle16_t Type; +}; + +struct coff_aux_function_definition { + support::ulittle32_t TagIndex; + support::ulittle32_t TotalSize; + support::ulittle32_t PointerToLinenumber; + support::ulittle32_t PointerToNextFunction; +}; + +struct coff_aux_bf_and_ef_symbol { + char Unused1[4]; + support::ulittle16_t Linenumber; + char Unused2[6]; + support::ulittle32_t PointerToNextFunction; +}; + +struct coff_aux_weak_external { + support::ulittle32_t TagIndex; + support::ulittle32_t Characteristics; +}; + +struct coff_aux_section_definition { + support::ulittle32_t Length; + support::ulittle16_t NumberOfRelocations; + support::ulittle16_t NumberOfLinenumbers; + support::ulittle32_t CheckSum; + support::ulittle16_t NumberLowPart; + uint8_t Selection; + uint8_t Unused; + support::ulittle16_t NumberHighPart; + int32_t getNumber(bool IsBigObj) const { + uint32_t Number = static_cast(NumberLowPart); + if (IsBigObj) + Number |= static_cast(NumberHighPart) << 16; + return static_cast(Number); + } +}; + +struct coff_aux_clr_token { + uint8_t AuxType; + uint8_t Reserved; + support::ulittle32_t SymbolTableIndex; +}; + +struct coff_import_header { + support::ulittle16_t Sig1; + support::ulittle16_t Sig2; + support::ulittle16_t Version; + support::ulittle16_t Machine; + support::ulittle32_t TimeDateStamp; + support::ulittle32_t SizeOfData; + support::ulittle16_t OrdinalHint; + support::ulittle16_t TypeInfo; + int getType() const { return TypeInfo & 0x3; } + int getNameType() const { return (TypeInfo >> 2) & 0x7; } +}; + +struct coff_import_directory_table_entry { + support::ulittle32_t ImportLookupTableRVA; + support::ulittle32_t TimeDateStamp; + support::ulittle32_t ForwarderChain; + support::ulittle32_t NameRVA; + support::ulittle32_t ImportAddressTableRVA; +}; + +struct coff_load_configuration32 { + support::ulittle32_t Characteristics; + support::ulittle32_t TimeDateStamp; + support::ulittle16_t MajorVersion; + support::ulittle16_t MinorVersion; + support::ulittle32_t GlobalFlagsClear; + support::ulittle32_t GlobalFlagsSet; + support::ulittle32_t CriticalSectionDefaultTimeout; + support::ulittle32_t DeCommitFreeBlockThreshold; + support::ulittle32_t DeCommitTotalFreeThreshold; + support::ulittle32_t LockPrefixTable; + support::ulittle32_t MaximumAllocationSize; + support::ulittle32_t VirtualMemoryThreshold; + support::ulittle32_t ProcessAffinityMask; + support::ulittle32_t ProcessHeapFlags; + support::ulittle16_t CSDVersion; + support::ulittle16_t Reserved; + support::ulittle32_t EditList; + support::ulittle32_t SecurityCookie; + support::ulittle32_t SEHandlerTable; + support::ulittle32_t SEHandlerCount; +}; + +struct coff_load_configuration64 { + support::ulittle32_t Characteristics; + support::ulittle32_t TimeDateStamp; + support::ulittle16_t MajorVersion; + support::ulittle16_t MinorVersion; + support::ulittle32_t GlobalFlagsClear; + support::ulittle32_t GlobalFlagsSet; + support::ulittle32_t CriticalSectionDefaultTimeout; + support::ulittle32_t DeCommitFreeBlockThreshold; + support::ulittle32_t DeCommitTotalFreeThreshold; + support::ulittle32_t LockPrefixTable; + support::ulittle32_t MaximumAllocationSize; + support::ulittle32_t VirtualMemoryThreshold; + support::ulittle32_t ProcessAffinityMask; + support::ulittle32_t ProcessHeapFlags; + support::ulittle16_t CSDVersion; + support::ulittle16_t Reserved; + support::ulittle32_t EditList; + support::ulittle64_t SecurityCookie; + support::ulittle64_t SEHandlerTable; + support::ulittle64_t SEHandlerCount; +}; + +struct coff_runtime_function_x64 { + support::ulittle32_t BeginAddress; + support::ulittle32_t EndAddress; + support::ulittle32_t UnwindInformation; +}; + +struct coff_base_reloc_block_header { + support::ulittle32_t PageRVA; + support::ulittle32_t BlockSize; +}; + +struct coff_base_reloc_block_entry { + support::ulittle16_t Data; + int getType() const { return Data >> 12; } + int getOffset() const { return Data & ((1 << 12) - 1); } +}; + +class COFFObjectFile : public ObjectFile { +private: + friend class ImportDirectoryEntryRef; + friend class ExportDirectoryEntryRef; + const coff_file_header *COFFHeader; + const coff_bigobj_file_header *COFFBigObjHeader; + const pe32_header *PE32Header; + const pe32plus_header *PE32PlusHeader; + const data_directory *DataDirectory; + const coff_section *SectionTable; + const coff_symbol16 *SymbolTable16; + const coff_symbol32 *SymbolTable32; + const char *StringTable; + uint32_t StringTableSize; + const import_directory_table_entry *ImportDirectory; + uint32_t NumberOfImportDirectory; + const delay_import_directory_table_entry *DelayImportDirectory; + uint32_t NumberOfDelayImportDirectory; + const export_directory_table_entry *ExportDirectory; + const coff_base_reloc_block_header *BaseRelocHeader; + const coff_base_reloc_block_header *BaseRelocEnd; + + std::error_code getString(uint32_t offset, StringRef &Res) const; + + template + const coff_symbol_type *toSymb(DataRefImpl Symb) const; + const coff_section *toSec(DataRefImpl Sec) const; + const coff_relocation *toRel(DataRefImpl Rel) const; + + std::error_code initSymbolTablePtr(); + std::error_code initImportTablePtr(); + std::error_code initDelayImportTablePtr(); + std::error_code initExportTablePtr(); + std::error_code initBaseRelocPtr(); + +public: + uintptr_t getSymbolTable() const { + if (SymbolTable16) + return reinterpret_cast(SymbolTable16); + if (SymbolTable32) + return reinterpret_cast(SymbolTable32); + return uintptr_t(0); + } + uint16_t getMachine() const { + if (COFFHeader) + return COFFHeader->Machine; + if (COFFBigObjHeader) + return COFFBigObjHeader->Machine; + llvm_unreachable("no COFF header!"); + } + uint16_t getSizeOfOptionalHeader() const { + if (COFFHeader) + return COFFHeader->isImportLibrary() ? 0 + : COFFHeader->SizeOfOptionalHeader; + // bigobj doesn't have this field. + if (COFFBigObjHeader) + return 0; + llvm_unreachable("no COFF header!"); + } + uint16_t getCharacteristics() const { + if (COFFHeader) + return COFFHeader->isImportLibrary() ? 0 : COFFHeader->Characteristics; + // bigobj doesn't have characteristics to speak of, + // editbin will silently lie to you if you attempt to set any. + if (COFFBigObjHeader) + return 0; + llvm_unreachable("no COFF header!"); + } + uint32_t getTimeDateStamp() const { + if (COFFHeader) + return COFFHeader->TimeDateStamp; + if (COFFBigObjHeader) + return COFFBigObjHeader->TimeDateStamp; + llvm_unreachable("no COFF header!"); + } + uint32_t getNumberOfSections() const { + if (COFFHeader) + return COFFHeader->isImportLibrary() ? 0 : COFFHeader->NumberOfSections; + if (COFFBigObjHeader) + return COFFBigObjHeader->NumberOfSections; + llvm_unreachable("no COFF header!"); + } + uint32_t getPointerToSymbolTable() const { + if (COFFHeader) + return COFFHeader->isImportLibrary() ? 0 + : COFFHeader->PointerToSymbolTable; + if (COFFBigObjHeader) + return COFFBigObjHeader->PointerToSymbolTable; + llvm_unreachable("no COFF header!"); + } + uint32_t getNumberOfSymbols() const { + if (COFFHeader) + return COFFHeader->isImportLibrary() ? 0 : COFFHeader->NumberOfSymbols; + if (COFFBigObjHeader) + return COFFBigObjHeader->NumberOfSymbols; + llvm_unreachable("no COFF header!"); + } +protected: + void moveSymbolNext(DataRefImpl &Symb) const override; + ErrorOr getSymbolName(DataRefImpl Symb) const override; + ErrorOr getSymbolAddress(DataRefImpl Symb) const override; + uint64_t getSymbolValueImpl(DataRefImpl Symb) const override; + uint64_t getCommonSymbolSizeImpl(DataRefImpl Symb) const override; + uint32_t getSymbolFlags(DataRefImpl Symb) const override; + SymbolRef::Type getSymbolType(DataRefImpl Symb) const override; + ErrorOr getSymbolSection(DataRefImpl Symb) const override; + void moveSectionNext(DataRefImpl &Sec) const override; + std::error_code getSectionName(DataRefImpl Sec, + StringRef &Res) const override; + uint64_t getSectionAddress(DataRefImpl Sec) const override; + uint64_t getSectionSize(DataRefImpl Sec) const override; + std::error_code getSectionContents(DataRefImpl Sec, + StringRef &Res) const override; + uint64_t getSectionAlignment(DataRefImpl Sec) const override; + bool isSectionText(DataRefImpl Sec) const override; + bool isSectionData(DataRefImpl Sec) const override; + bool isSectionBSS(DataRefImpl Sec) const override; + bool isSectionVirtual(DataRefImpl Sec) const override; + relocation_iterator section_rel_begin(DataRefImpl Sec) const override; + relocation_iterator section_rel_end(DataRefImpl Sec) const override; + + void moveRelocationNext(DataRefImpl &Rel) const override; + uint64_t getRelocationOffset(DataRefImpl Rel) const override; + symbol_iterator getRelocationSymbol(DataRefImpl Rel) const override; + uint64_t getRelocationType(DataRefImpl Rel) const override; + void getRelocationTypeName(DataRefImpl Rel, + SmallVectorImpl &Result) const override; + +public: + COFFObjectFile(MemoryBufferRef Object, std::error_code &EC); + basic_symbol_iterator symbol_begin_impl() const override; + basic_symbol_iterator symbol_end_impl() const override; + section_iterator section_begin() const override; + section_iterator section_end() const override; + + const coff_section *getCOFFSection(const SectionRef &Section) const; + COFFSymbolRef getCOFFSymbol(const DataRefImpl &Ref) const; + COFFSymbolRef getCOFFSymbol(const SymbolRef &Symbol) const; + const coff_relocation *getCOFFRelocation(const RelocationRef &Reloc) const; + unsigned getSectionID(SectionRef Sec) const; + unsigned getSymbolSectionID(SymbolRef Sym) const; + + uint8_t getBytesInAddress() const override; + StringRef getFileFormatName() const override; + unsigned getArch() const override; + + import_directory_iterator import_directory_begin() const; + import_directory_iterator import_directory_end() const; + delay_import_directory_iterator delay_import_directory_begin() const; + delay_import_directory_iterator delay_import_directory_end() const; + export_directory_iterator export_directory_begin() const; + export_directory_iterator export_directory_end() const; + base_reloc_iterator base_reloc_begin() const; + base_reloc_iterator base_reloc_end() const; + + iterator_range import_directories() const; + iterator_range + delay_import_directories() const; + iterator_range export_directories() const; + iterator_range base_relocs() const; + + const dos_header *getDOSHeader() const { + if (!PE32Header && !PE32PlusHeader) + return nullptr; + return reinterpret_cast(base()); + } + std::error_code getPE32Header(const pe32_header *&Res) const; + std::error_code getPE32PlusHeader(const pe32plus_header *&Res) const; + std::error_code getDataDirectory(uint32_t index, + const data_directory *&Res) const; + std::error_code getSection(int32_t index, const coff_section *&Res) const; + template + std::error_code getSymbol(uint32_t Index, + const coff_symbol_type *&Res) const { + if (Index >= getNumberOfSymbols()) + return object_error::parse_failed; + + Res = reinterpret_cast(getSymbolTable()) + Index; + return std::error_code(); + } + ErrorOr getSymbol(uint32_t index) const { + if (SymbolTable16) { + const coff_symbol16 *Symb = nullptr; + if (std::error_code EC = getSymbol(index, Symb)) + return EC; + return COFFSymbolRef(Symb); + } + if (SymbolTable32) { + const coff_symbol32 *Symb = nullptr; + if (std::error_code EC = getSymbol(index, Symb)) + return EC; + return COFFSymbolRef(Symb); + } + return object_error::parse_failed; + } + template + std::error_code getAuxSymbol(uint32_t index, const T *&Res) const { + ErrorOr s = getSymbol(index); + if (std::error_code EC = s.getError()) + return EC; + Res = reinterpret_cast(s->getRawPtr()); + return std::error_code(); + } + std::error_code getSymbolName(COFFSymbolRef Symbol, StringRef &Res) const; + std::error_code getSymbolName(const coff_symbol_generic *Symbol, + StringRef &Res) const; + + ArrayRef getSymbolAuxData(COFFSymbolRef Symbol) const; + + size_t getSymbolTableEntrySize() const { + if (COFFHeader) + return sizeof(coff_symbol16); + if (COFFBigObjHeader) + return sizeof(coff_symbol32); + llvm_unreachable("null symbol table pointer!"); + } + + iterator_range + getRelocations(const coff_section *Sec) const; + + std::error_code getSectionName(const coff_section *Sec, StringRef &Res) const; + uint64_t getSectionSize(const coff_section *Sec) const; + std::error_code getSectionContents(const coff_section *Sec, + ArrayRef &Res) const; + + uint64_t getImageBase() const; + std::error_code getVaPtr(uint64_t VA, uintptr_t &Res) const; + std::error_code getRvaPtr(uint32_t Rva, uintptr_t &Res) const; + std::error_code getHintName(uint32_t Rva, uint16_t &Hint, + StringRef &Name) const; + + bool isRelocatableObject() const override; + bool is64() const { return PE32PlusHeader; } + + static inline bool classof(const Binary *v) { return v->isCOFF(); } +}; + +// The iterator for the import directory table. +class ImportDirectoryEntryRef { +public: + ImportDirectoryEntryRef() : OwningObject(nullptr) {} + ImportDirectoryEntryRef(const import_directory_table_entry *Table, uint32_t I, + const COFFObjectFile *Owner) + : ImportTable(Table), Index(I), OwningObject(Owner) {} + + bool operator==(const ImportDirectoryEntryRef &Other) const; + void moveNext(); + + imported_symbol_iterator imported_symbol_begin() const; + imported_symbol_iterator imported_symbol_end() const; + iterator_range imported_symbols() const; + + std::error_code getName(StringRef &Result) const; + std::error_code getImportLookupTableRVA(uint32_t &Result) const; + std::error_code getImportAddressTableRVA(uint32_t &Result) const; + + std::error_code + getImportTableEntry(const import_directory_table_entry *&Result) const; + + std::error_code + getImportLookupEntry(const import_lookup_table_entry32 *&Result) const; + +private: + const import_directory_table_entry *ImportTable; + uint32_t Index; + const COFFObjectFile *OwningObject; +}; + +class DelayImportDirectoryEntryRef { +public: + DelayImportDirectoryEntryRef() : OwningObject(nullptr) {} + DelayImportDirectoryEntryRef(const delay_import_directory_table_entry *T, + uint32_t I, const COFFObjectFile *Owner) + : Table(T), Index(I), OwningObject(Owner) {} + + bool operator==(const DelayImportDirectoryEntryRef &Other) const; + void moveNext(); + + imported_symbol_iterator imported_symbol_begin() const; + imported_symbol_iterator imported_symbol_end() const; + iterator_range imported_symbols() const; + + std::error_code getName(StringRef &Result) const; + std::error_code getDelayImportTable( + const delay_import_directory_table_entry *&Result) const; + std::error_code getImportAddress(int AddrIndex, uint64_t &Result) const; + +private: + const delay_import_directory_table_entry *Table; + uint32_t Index; + const COFFObjectFile *OwningObject; +}; + +// The iterator for the export directory table entry. +class ExportDirectoryEntryRef { +public: + ExportDirectoryEntryRef() : OwningObject(nullptr) {} + ExportDirectoryEntryRef(const export_directory_table_entry *Table, uint32_t I, + const COFFObjectFile *Owner) + : ExportTable(Table), Index(I), OwningObject(Owner) {} + + bool operator==(const ExportDirectoryEntryRef &Other) const; + void moveNext(); + + std::error_code getDllName(StringRef &Result) const; + std::error_code getOrdinalBase(uint32_t &Result) const; + std::error_code getOrdinal(uint32_t &Result) const; + std::error_code getExportRVA(uint32_t &Result) const; + std::error_code getSymbolName(StringRef &Result) const; + + std::error_code isForwarder(bool &Result) const; + std::error_code getForwardTo(StringRef &Result) const; + +private: + const export_directory_table_entry *ExportTable; + uint32_t Index; + const COFFObjectFile *OwningObject; +}; + +class ImportedSymbolRef { +public: + ImportedSymbolRef() : OwningObject(nullptr) {} + ImportedSymbolRef(const import_lookup_table_entry32 *Entry, uint32_t I, + const COFFObjectFile *Owner) + : Entry32(Entry), Entry64(nullptr), Index(I), OwningObject(Owner) {} + ImportedSymbolRef(const import_lookup_table_entry64 *Entry, uint32_t I, + const COFFObjectFile *Owner) + : Entry32(nullptr), Entry64(Entry), Index(I), OwningObject(Owner) {} + + bool operator==(const ImportedSymbolRef &Other) const; + void moveNext(); + + std::error_code getSymbolName(StringRef &Result) const; + std::error_code getOrdinal(uint16_t &Result) const; + +private: + const import_lookup_table_entry32 *Entry32; + const import_lookup_table_entry64 *Entry64; + uint32_t Index; + const COFFObjectFile *OwningObject; +}; + +class BaseRelocRef { +public: + BaseRelocRef() : OwningObject(nullptr) {} + BaseRelocRef(const coff_base_reloc_block_header *Header, + const COFFObjectFile *Owner) + : Header(Header), Index(0), OwningObject(Owner) {} + + bool operator==(const BaseRelocRef &Other) const; + void moveNext(); + + std::error_code getType(uint8_t &Type) const; + std::error_code getRVA(uint32_t &Result) const; + +private: + const coff_base_reloc_block_header *Header; + uint32_t Index; + const COFFObjectFile *OwningObject; +}; + +} // end namespace object +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/Object/ELF.h b/llvm/include/llvm/Object/ELF.h new file mode 100644 index 0000000..c7af29e --- /dev/null +++ b/llvm/include/llvm/Object/ELF.h @@ -0,0 +1,542 @@ +//===- ELF.h - ELF object file implementation -------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the ELFFile template class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_OBJECT_ELF_H +#define LLVM_OBJECT_ELF_H + +#include "llvm/ADT/SmallVector.h" +#include "llvm/Object/ELFTypes.h" +#include "llvm/Support/MemoryBuffer.h" + +namespace llvm_ks { +namespace object { + +StringRef getELFRelocationTypeName(uint32_t Machine, uint32_t Type); + +// Subclasses of ELFFile may need this for template instantiation +inline std::pair +getElfArchType(StringRef Object) { + if (Object.size() < ELF::EI_NIDENT) + return std::make_pair((uint8_t)ELF::ELFCLASSNONE, + (uint8_t)ELF::ELFDATANONE); + return std::make_pair((uint8_t)Object[ELF::EI_CLASS], + (uint8_t)Object[ELF::EI_DATA]); +} + +template +class ELFFile { +public: + LLVM_ELF_IMPORT_TYPES_ELFT(ELFT) + typedef typename std::conditional::type uintX_t; + + typedef Elf_Ehdr_Impl Elf_Ehdr; + typedef Elf_Shdr_Impl Elf_Shdr; + typedef Elf_Sym_Impl Elf_Sym; + typedef Elf_Dyn_Impl Elf_Dyn; + typedef Elf_Phdr_Impl Elf_Phdr; + typedef Elf_Rel_Impl Elf_Rel; + typedef Elf_Rel_Impl Elf_Rela; + typedef Elf_Verdef_Impl Elf_Verdef; + typedef Elf_Verdaux_Impl Elf_Verdaux; + typedef Elf_Verneed_Impl Elf_Verneed; + typedef Elf_Vernaux_Impl Elf_Vernaux; + typedef Elf_Versym_Impl Elf_Versym; + typedef Elf_Hash_Impl Elf_Hash; + typedef Elf_GnuHash_Impl Elf_GnuHash; + typedef iterator_range Elf_Dyn_Range; + typedef iterator_range Elf_Shdr_Range; + typedef iterator_range Elf_Sym_Range; + + const uint8_t *base() const { + return reinterpret_cast(Buf.data()); + } + +private: + + StringRef Buf; + + const Elf_Ehdr *Header; + const Elf_Shdr *SectionHeaderTable = nullptr; + StringRef DotShstrtab; // Section header string table. + +public: + template + const T *getEntry(uint32_t Section, uint32_t Entry) const; + template + const T *getEntry(const Elf_Shdr *Section, uint32_t Entry) const; + + ErrorOr getStringTable(const Elf_Shdr *Section) const; + ErrorOr getStringTableForSymtab(const Elf_Shdr &Section) const; + + ErrorOr> getSHNDXTable(const Elf_Shdr &Section) const; + + void VerifyStrTab(const Elf_Shdr *sh) const; + + StringRef getRelocationTypeName(uint32_t Type) const; + void getRelocationTypeName(uint32_t Type, + SmallVectorImpl &Result) const; + + /// \brief Get the symbol for a given relocation. + const Elf_Sym *getRelocationSymbol(const Elf_Rel *Rel, + const Elf_Shdr *SymTab) const; + + ELFFile(StringRef Object, std::error_code &EC); + + bool isMipsELF64() const { + return Header->e_machine == ELF::EM_MIPS && + Header->getFileClass() == ELF::ELFCLASS64; + } + + bool isMips64EL() const { + return Header->e_machine == ELF::EM_MIPS && + Header->getFileClass() == ELF::ELFCLASS64 && + Header->getDataEncoding() == ELF::ELFDATA2LSB; + } + + ErrorOr dynamic_table_begin(const Elf_Phdr *Phdr) const; + ErrorOr dynamic_table_end(const Elf_Phdr *Phdr) const; + ErrorOr dynamic_table(const Elf_Phdr *Phdr) const { + ErrorOr Begin = dynamic_table_begin(Phdr); + if (std::error_code EC = Begin.getError()) + return EC; + ErrorOr End = dynamic_table_end(Phdr); + if (std::error_code EC = End.getError()) + return EC; + return make_range(*Begin, *End); + } + + const Elf_Shdr *section_begin() const; + const Elf_Shdr *section_end() const; + Elf_Shdr_Range sections() const { + return make_range(section_begin(), section_end()); + } + + const Elf_Sym *symbol_begin(const Elf_Shdr *Sec) const { + if (!Sec) + return nullptr; + if (Sec->sh_entsize != sizeof(Elf_Sym)) + report_fatal_error("Invalid symbol size"); + return reinterpret_cast(base() + Sec->sh_offset); + } + const Elf_Sym *symbol_end(const Elf_Shdr *Sec) const { + if (!Sec) + return nullptr; + uint64_t Size = Sec->sh_size; + if (Size % sizeof(Elf_Sym)) + report_fatal_error("Invalid symbol table size"); + return symbol_begin(Sec) + Size / sizeof(Elf_Sym); + } + Elf_Sym_Range symbols(const Elf_Shdr *Sec) const { + return make_range(symbol_begin(Sec), symbol_end(Sec)); + } + + typedef iterator_range Elf_Rela_Range; + + const Elf_Rela *rela_begin(const Elf_Shdr *sec) const { + if (sec->sh_entsize != sizeof(Elf_Rela)) + report_fatal_error("Invalid relocation entry size"); + return reinterpret_cast(base() + sec->sh_offset); + } + + const Elf_Rela *rela_end(const Elf_Shdr *sec) const { + uint64_t Size = sec->sh_size; + if (Size % sizeof(Elf_Rela)) + report_fatal_error("Invalid relocation table size"); + return rela_begin(sec) + Size / sizeof(Elf_Rela); + } + + Elf_Rela_Range relas(const Elf_Shdr *Sec) const { + return make_range(rela_begin(Sec), rela_end(Sec)); + } + + const Elf_Rel *rel_begin(const Elf_Shdr *sec) const { + if (sec->sh_entsize != sizeof(Elf_Rel)) + report_fatal_error("Invalid relocation entry size"); + return reinterpret_cast(base() + sec->sh_offset); + } + + const Elf_Rel *rel_end(const Elf_Shdr *sec) const { + uint64_t Size = sec->sh_size; + if (Size % sizeof(Elf_Rel)) + report_fatal_error("Invalid relocation table size"); + return rel_begin(sec) + Size / sizeof(Elf_Rel); + } + + typedef iterator_range Elf_Rel_Range; + Elf_Rel_Range rels(const Elf_Shdr *Sec) const { + return make_range(rel_begin(Sec), rel_end(Sec)); + } + + /// \brief Iterate over program header table. + const Elf_Phdr *program_header_begin() const { + if (Header->e_phnum && Header->e_phentsize != sizeof(Elf_Phdr)) + report_fatal_error("Invalid program header size"); + return reinterpret_cast(base() + Header->e_phoff); + } + + const Elf_Phdr *program_header_end() const { + return program_header_begin() + Header->e_phnum; + } + + typedef iterator_range Elf_Phdr_Range; + + const Elf_Phdr_Range program_headers() const { + return make_range(program_header_begin(), program_header_end()); + } + + uint64_t getNumSections() const; + uintX_t getStringTableIndex() const; + uint32_t getExtendedSymbolTableIndex(const Elf_Sym *Sym, + const Elf_Shdr *SymTab, + ArrayRef ShndxTable) const; + const Elf_Ehdr *getHeader() const { return Header; } + ErrorOr getSection(const Elf_Sym *Sym, + const Elf_Shdr *SymTab, + ArrayRef ShndxTable) const; + ErrorOr getSection(uint32_t Index) const; + + const Elf_Sym *getSymbol(const Elf_Shdr *Sec, uint32_t Index) const { + return &*(symbol_begin(Sec) + Index); + } + + ErrorOr getSectionName(const Elf_Shdr *Section) const; + template + ErrorOr> getSectionContentsAsArray(const Elf_Shdr *Sec) const; + ErrorOr > getSectionContents(const Elf_Shdr *Sec) const; +}; + +typedef ELFFile> ELF32LEFile; +typedef ELFFile> ELF64LEFile; +typedef ELFFile> ELF32BEFile; +typedef ELFFile> ELF64BEFile; + +template +uint32_t ELFFile::getExtendedSymbolTableIndex( + const Elf_Sym *Sym, const Elf_Shdr *SymTab, + ArrayRef ShndxTable) const { + assert(Sym->st_shndx == ELF::SHN_XINDEX); + unsigned Index = Sym - symbol_begin(SymTab); + + // The size of the table was checked in getSHNDXTable. + return ShndxTable[Index]; +} + +template +ErrorOr::Elf_Shdr *> +ELFFile::getSection(const Elf_Sym *Sym, const Elf_Shdr *SymTab, + ArrayRef ShndxTable) const { + uint32_t Index = Sym->st_shndx; + if (Index == ELF::SHN_XINDEX) + return getSection(getExtendedSymbolTableIndex(Sym, SymTab, ShndxTable)); + + if (Index == ELF::SHN_UNDEF || Index >= ELF::SHN_LORESERVE) + return nullptr; + return getSection(Sym->st_shndx); +} + +template +template +ErrorOr> +ELFFile::getSectionContentsAsArray(const Elf_Shdr *Sec) const { + uintX_t Offset = Sec->sh_offset; + uintX_t Size = Sec->sh_size; + + if (Size % sizeof(T)) + return object_error::parse_failed; + if (Offset + Size > Buf.size()) + return object_error::parse_failed; + + const T *Start = reinterpret_cast(base() + Offset); + return makeArrayRef(Start, Size / sizeof(T)); +} + +template +ErrorOr> +ELFFile::getSectionContents(const Elf_Shdr *Sec) const { + return getSectionContentsAsArray(Sec); +} + +template +StringRef ELFFile::getRelocationTypeName(uint32_t Type) const { + return getELFRelocationTypeName(Header->e_machine, Type); +} + +template +void ELFFile::getRelocationTypeName(uint32_t Type, + SmallVectorImpl &Result) const { + if (!isMipsELF64()) { + StringRef Name = getRelocationTypeName(Type); + Result.append(Name.begin(), Name.end()); + } else { + // The Mips N64 ABI allows up to three operations to be specified per + // relocation record. Unfortunately there's no easy way to test for the + // presence of N64 ELFs as they have no special flag that identifies them + // as being N64. We can safely assume at the moment that all Mips + // ELFCLASS64 ELFs are N64. New Mips64 ABIs should provide enough + // information to disambiguate between old vs new ABIs. + uint8_t Type1 = (Type >> 0) & 0xFF; + uint8_t Type2 = (Type >> 8) & 0xFF; + uint8_t Type3 = (Type >> 16) & 0xFF; + + // Concat all three relocation type names. + StringRef Name = getRelocationTypeName(Type1); + Result.append(Name.begin(), Name.end()); + + Name = getRelocationTypeName(Type2); + Result.append(1, '/'); + Result.append(Name.begin(), Name.end()); + + Name = getRelocationTypeName(Type3); + Result.append(1, '/'); + Result.append(Name.begin(), Name.end()); + } +} + +template +const typename ELFFile::Elf_Sym * +ELFFile::getRelocationSymbol(const Elf_Rel *Rel, + const Elf_Shdr *SymTab) const { + uint32_t Index = Rel->getSymbol(isMips64EL()); + if (Index == 0) + return nullptr; + return getEntry(SymTab, Index); +} + +template +uint64_t ELFFile::getNumSections() const { + assert(Header && "Header not initialized!"); + if (Header->e_shnum == ELF::SHN_UNDEF && Header->e_shoff > 0) { + assert(SectionHeaderTable && "SectionHeaderTable not initialized!"); + return SectionHeaderTable->sh_size; + } + return Header->e_shnum; +} + +template +typename ELFFile::uintX_t ELFFile::getStringTableIndex() const { + if (Header->e_shnum == ELF::SHN_UNDEF) { + if (Header->e_shstrndx == ELF::SHN_HIRESERVE) + return SectionHeaderTable->sh_link; + if (Header->e_shstrndx >= getNumSections()) + return 0; + } + return Header->e_shstrndx; +} + +template +ELFFile::ELFFile(StringRef Object, std::error_code &EC) + : Buf(Object) { + const uint64_t FileSize = Buf.size(); + + if (sizeof(Elf_Ehdr) > FileSize) { + // File too short! + EC = object_error::parse_failed; + return; + } + + Header = reinterpret_cast(base()); + + if (Header->e_shoff == 0) + return; + + const uint64_t SectionTableOffset = Header->e_shoff; + + if (SectionTableOffset + sizeof(Elf_Shdr) > FileSize) { + // Section header table goes past end of file! + EC = object_error::parse_failed; + return; + } + + // The getNumSections() call below depends on SectionHeaderTable being set. + SectionHeaderTable = + reinterpret_cast(base() + SectionTableOffset); + const uint64_t SectionTableSize = getNumSections() * Header->e_shentsize; + + if (SectionTableOffset + SectionTableSize > FileSize) { + // Section table goes past end of file! + EC = object_error::parse_failed; + return; + } + + // Get string table sections. + uintX_t StringTableIndex = getStringTableIndex(); + if (StringTableIndex) { + ErrorOr StrTabSecOrErr = getSection(StringTableIndex); + if ((EC = StrTabSecOrErr.getError())) + return; + + ErrorOr StringTableOrErr = getStringTable(*StrTabSecOrErr); + if ((EC = StringTableOrErr.getError())) + return; + DotShstrtab = *StringTableOrErr; + } + + EC = std::error_code(); +} + +template +static bool compareAddr(uint64_t VAddr, const Elf_Phdr_Impl *Phdr) { + return VAddr < Phdr->p_vaddr; +} + +template +const typename ELFFile::Elf_Shdr *ELFFile::section_begin() const { + if (Header->e_shentsize != sizeof(Elf_Shdr)) + report_fatal_error( + "Invalid section header entry size (e_shentsize) in ELF header"); + return reinterpret_cast(base() + Header->e_shoff); +} + +template +const typename ELFFile::Elf_Shdr *ELFFile::section_end() const { + return section_begin() + getNumSections(); +} + +template +ErrorOr::Elf_Dyn *> +ELFFile::dynamic_table_begin(const Elf_Phdr *Phdr) const { + if (!Phdr) + return nullptr; + assert(Phdr->p_type == ELF::PT_DYNAMIC && "Got the wrong program header"); + uintX_t Offset = Phdr->p_offset; + if (Offset > Buf.size()) + return object_error::parse_failed; + return reinterpret_cast(base() + Offset); +} + +template +ErrorOr::Elf_Dyn *> +ELFFile::dynamic_table_end(const Elf_Phdr *Phdr) const { + if (!Phdr) + return nullptr; + assert(Phdr->p_type == ELF::PT_DYNAMIC && "Got the wrong program header"); + uintX_t Size = Phdr->p_filesz; + if (Size % sizeof(Elf_Dyn)) + return object_error::elf_invalid_dynamic_table_size; + // FIKME: Check for overflow? + uintX_t End = Phdr->p_offset + Size; + if (End > Buf.size()) + return object_error::parse_failed; + return reinterpret_cast(base() + End); +} + +template +template +const T *ELFFile::getEntry(uint32_t Section, uint32_t Entry) const { + ErrorOr Sec = getSection(Section); + if (std::error_code EC = Sec.getError()) + report_fatal_error(EC.message()); + return getEntry(*Sec, Entry); +} + +template +template +const T *ELFFile::getEntry(const Elf_Shdr *Section, + uint32_t Entry) const { + return reinterpret_cast(base() + Section->sh_offset + + (Entry * Section->sh_entsize)); +} + +template +ErrorOr::Elf_Shdr *> +ELFFile::getSection(uint32_t Index) const { + assert(SectionHeaderTable && "SectionHeaderTable not initialized!"); + if (Index >= getNumSections()) + return object_error::invalid_section_index; + + return reinterpret_cast( + reinterpret_cast(SectionHeaderTable) + + (Index * Header->e_shentsize)); +} + +template +ErrorOr +ELFFile::getStringTable(const Elf_Shdr *Section) const { + if (Section->sh_type != ELF::SHT_STRTAB) + return object_error::parse_failed; + uint64_t Offset = Section->sh_offset; + uint64_t Size = Section->sh_size; + if (Offset + Size > Buf.size()) + return object_error::parse_failed; + StringRef Data((const char *)base() + Section->sh_offset, Size); + if (Data[Size - 1] != '\0') + return object_error::string_table_non_null_end; + return Data; +} + +template +ErrorOr::Elf_Word>> +ELFFile::getSHNDXTable(const Elf_Shdr &Section) const { + assert(Section.sh_type == ELF::SHT_SYMTAB_SHNDX); + const Elf_Word *ShndxTableBegin = + reinterpret_cast(base() + Section.sh_offset); + uintX_t Size = Section.sh_size; + if (Size % sizeof(uint32_t)) + return object_error::parse_failed; + uintX_t NumSymbols = Size / sizeof(uint32_t); + const Elf_Word *ShndxTableEnd = ShndxTableBegin + NumSymbols; + if (reinterpret_cast(ShndxTableEnd) > Buf.end()) + return object_error::parse_failed; + ErrorOr SymTableOrErr = getSection(Section.sh_link); + if (std::error_code EC = SymTableOrErr.getError()) + return EC; + const Elf_Shdr &SymTable = **SymTableOrErr; + if (SymTable.sh_type != ELF::SHT_SYMTAB && + SymTable.sh_type != ELF::SHT_DYNSYM) + return object_error::parse_failed; + if (NumSymbols != (SymTable.sh_size / sizeof(Elf_Sym))) + return object_error::parse_failed; + return makeArrayRef(ShndxTableBegin, ShndxTableEnd); +} + +template +ErrorOr +ELFFile::getStringTableForSymtab(const Elf_Shdr &Sec) const { + if (Sec.sh_type != ELF::SHT_SYMTAB && Sec.sh_type != ELF::SHT_DYNSYM) + return object_error::parse_failed; + ErrorOr SectionOrErr = getSection(Sec.sh_link); + if (std::error_code EC = SectionOrErr.getError()) + return EC; + return getStringTable(*SectionOrErr); +} + +template +ErrorOr +ELFFile::getSectionName(const Elf_Shdr *Section) const { + uint32_t Offset = Section->sh_name; + if (Offset == 0) + return StringRef(); + if (Offset >= DotShstrtab.size()) + return object_error::parse_failed; + return StringRef(DotShstrtab.data() + Offset); +} + +/// This function returns the hash value for a symbol in the .dynsym section +/// Name of the API remains consistent as specified in the libelf +/// REF : http://www.sco.com/developers/gabi/latest/ch5.dynamic.html#hash +static inline unsigned elf_hash(StringRef &symbolName) { + unsigned h = 0, g; + for (unsigned i = 0, j = symbolName.size(); i < j; i++) { + h = (h << 4) + symbolName[i]; + g = h & 0xf0000000L; + if (g != 0) + h ^= g >> 24; + h &= ~g; + } + return h; +} +} // end namespace object +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/Object/ELFObjectFile.h b/llvm/include/llvm/Object/ELFObjectFile.h new file mode 100644 index 0000000..26836d6 --- /dev/null +++ b/llvm/include/llvm/Object/ELFObjectFile.h @@ -0,0 +1,940 @@ +//===- ELFObjectFile.h - ELF object file implementation ---------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the ELFObjectFile template class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_OBJECT_ELFOBJECTFILE_H +#define LLVM_OBJECT_ELFOBJECTFILE_H + +#include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/PointerIntPair.h" +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/StringSwitch.h" +#include "llvm/ADT/Triple.h" +#include "llvm/Object/ELF.h" +#include "llvm/Object/ObjectFile.h" +#include "llvm/Support/Casting.h" +#include "llvm/Support/ELF.h" +#include "llvm/Support/Endian.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/MemoryBuffer.h" +#include "llvm/Support/raw_ostream.h" +#include +#include +#include +#include + +namespace llvm_ks { +namespace object { + +class elf_symbol_iterator; +class ELFSymbolRef; +class ELFRelocationRef; + +class ELFObjectFileBase : public ObjectFile { + friend class ELFSymbolRef; + friend class ELFSectionRef; + friend class ELFRelocationRef; + +protected: + ELFObjectFileBase(unsigned int Type, MemoryBufferRef Source); + + virtual uint64_t getSymbolSize(DataRefImpl Symb) const = 0; + virtual uint8_t getSymbolOther(DataRefImpl Symb) const = 0; + virtual uint8_t getSymbolELFType(DataRefImpl Symb) const = 0; + + virtual uint32_t getSectionType(DataRefImpl Sec) const = 0; + virtual uint64_t getSectionFlags(DataRefImpl Sec) const = 0; + + virtual ErrorOr getRelocationAddend(DataRefImpl Rel) const = 0; +public: + + typedef iterator_range elf_symbol_iterator_range; + virtual elf_symbol_iterator_range getDynamicSymbolIterators() const = 0; + + elf_symbol_iterator_range symbols() const; + + static inline bool classof(const Binary *v) { return v->isELF(); } +}; + +class ELFSectionRef : public SectionRef { +public: + ELFSectionRef(const SectionRef &B) : SectionRef(B) { + assert(isa(SectionRef::getObject())); + } + + const ELFObjectFileBase *getObject() const { + return cast(SectionRef::getObject()); + } + + uint32_t getType() const { + return getObject()->getSectionType(getRawDataRefImpl()); + } + + uint64_t getFlags() const { + return getObject()->getSectionFlags(getRawDataRefImpl()); + } +}; + +class elf_section_iterator : public section_iterator { +public: + elf_section_iterator(const section_iterator &B) : section_iterator(B) { + assert(isa(B->getObject())); + } + + const ELFSectionRef *operator->() const { + return static_cast(section_iterator::operator->()); + } + + const ELFSectionRef &operator*() const { + return static_cast(section_iterator::operator*()); + } +}; + +class ELFSymbolRef : public SymbolRef { +public: + ELFSymbolRef(const SymbolRef &B) : SymbolRef(B) { + assert(isa(SymbolRef::getObject())); + } + + const ELFObjectFileBase *getObject() const { + return cast(BasicSymbolRef::getObject()); + } + + uint64_t getSize() const { + return getObject()->getSymbolSize(getRawDataRefImpl()); + } + + uint8_t getOther() const { + return getObject()->getSymbolOther(getRawDataRefImpl()); + } + + uint8_t getELFType() const { + return getObject()->getSymbolELFType(getRawDataRefImpl()); + } +}; + +class elf_symbol_iterator : public symbol_iterator { +public: + elf_symbol_iterator(const basic_symbol_iterator &B) + : symbol_iterator(SymbolRef(B->getRawDataRefImpl(), + cast(B->getObject()))) {} + + const ELFSymbolRef *operator->() const { + return static_cast(symbol_iterator::operator->()); + } + + const ELFSymbolRef &operator*() const { + return static_cast(symbol_iterator::operator*()); + } +}; + +class ELFRelocationRef : public RelocationRef { +public: + ELFRelocationRef(const RelocationRef &B) : RelocationRef(B) { + assert(isa(RelocationRef::getObject())); + } + + const ELFObjectFileBase *getObject() const { + return cast(RelocationRef::getObject()); + } + + ErrorOr getAddend() const { + return getObject()->getRelocationAddend(getRawDataRefImpl()); + } +}; + +class elf_relocation_iterator : public relocation_iterator { +public: + elf_relocation_iterator(const relocation_iterator &B) + : relocation_iterator(RelocationRef( + B->getRawDataRefImpl(), cast(B->getObject()))) {} + + const ELFRelocationRef *operator->() const { + return static_cast( + relocation_iterator::operator->()); + } + + const ELFRelocationRef &operator*() const { + return static_cast( + relocation_iterator::operator*()); + } +}; + +inline ELFObjectFileBase::elf_symbol_iterator_range +ELFObjectFileBase::symbols() const { + return elf_symbol_iterator_range(symbol_begin(), symbol_end()); +} + +template class ELFObjectFile : public ELFObjectFileBase { + uint64_t getSymbolSize(DataRefImpl Sym) const override; + +public: + LLVM_ELF_IMPORT_TYPES_ELFT(ELFT) + + typedef typename ELFFile::uintX_t uintX_t; + + typedef typename ELFFile::Elf_Sym Elf_Sym; + typedef typename ELFFile::Elf_Shdr Elf_Shdr; + typedef typename ELFFile::Elf_Ehdr Elf_Ehdr; + typedef typename ELFFile::Elf_Rel Elf_Rel; + typedef typename ELFFile::Elf_Rela Elf_Rela; + typedef typename ELFFile::Elf_Dyn Elf_Dyn; + +protected: + ELFFile EF; + + const Elf_Shdr *DotDynSymSec = nullptr; // Dynamic symbol table section. + const Elf_Shdr *DotSymtabSec = nullptr; // Symbol table section. + ArrayRef ShndxTable; + + void moveSymbolNext(DataRefImpl &Symb) const override; + ErrorOr getSymbolName(DataRefImpl Symb) const override; + ErrorOr getSymbolAddress(DataRefImpl Symb) const override; + uint64_t getSymbolValueImpl(DataRefImpl Symb) const override; + uint32_t getSymbolAlignment(DataRefImpl Symb) const override; + uint64_t getCommonSymbolSizeImpl(DataRefImpl Symb) const override; + uint32_t getSymbolFlags(DataRefImpl Symb) const override; + uint8_t getSymbolOther(DataRefImpl Symb) const override; + uint8_t getSymbolELFType(DataRefImpl Symb) const override; + SymbolRef::Type getSymbolType(DataRefImpl Symb) const override; + ErrorOr getSymbolSection(const Elf_Sym *Symb, + const Elf_Shdr *SymTab) const; + ErrorOr getSymbolSection(DataRefImpl Symb) const override; + + void moveSectionNext(DataRefImpl &Sec) const override; + std::error_code getSectionName(DataRefImpl Sec, + StringRef &Res) const override; + uint64_t getSectionAddress(DataRefImpl Sec) const override; + uint64_t getSectionSize(DataRefImpl Sec) const override; + std::error_code getSectionContents(DataRefImpl Sec, + StringRef &Res) const override; + uint64_t getSectionAlignment(DataRefImpl Sec) const override; + bool isSectionText(DataRefImpl Sec) const override; + bool isSectionData(DataRefImpl Sec) const override; + bool isSectionBSS(DataRefImpl Sec) const override; + bool isSectionVirtual(DataRefImpl Sec) const override; + relocation_iterator section_rel_begin(DataRefImpl Sec) const override; + relocation_iterator section_rel_end(DataRefImpl Sec) const override; + section_iterator getRelocatedSection(DataRefImpl Sec) const override; + + void moveRelocationNext(DataRefImpl &Rel) const override; + uint64_t getRelocationOffset(DataRefImpl Rel) const override; + symbol_iterator getRelocationSymbol(DataRefImpl Rel) const override; + uint64_t getRelocationType(DataRefImpl Rel) const override; + void getRelocationTypeName(DataRefImpl Rel, + SmallVectorImpl &Result) const override; + + uint32_t getSectionType(DataRefImpl Sec) const override; + uint64_t getSectionFlags(DataRefImpl Sec) const override; + StringRef getRelocationTypeName(uint32_t Type) const; + + /// \brief Get the relocation section that contains \a Rel. + const Elf_Shdr *getRelSection(DataRefImpl Rel) const { + return *EF.getSection(Rel.d.a); + } + + DataRefImpl toDRI(const Elf_Shdr *SymTable, unsigned SymbolNum) const { + DataRefImpl DRI; + if (!SymTable) { + DRI.d.a = 0; + DRI.d.b = 0; + return DRI; + } + assert(SymTable->sh_type == ELF::SHT_SYMTAB || + SymTable->sh_type == ELF::SHT_DYNSYM); + + uintptr_t SHT = reinterpret_cast(EF.section_begin()); + unsigned SymTableIndex = + (reinterpret_cast(SymTable) - SHT) / sizeof(Elf_Shdr); + + DRI.d.a = SymTableIndex; + DRI.d.b = SymbolNum; + return DRI; + } + + const Elf_Shdr *toELFShdrIter(DataRefImpl Sec) const { + return reinterpret_cast(Sec.p); + } + + DataRefImpl toDRI(const Elf_Shdr *Sec) const { + DataRefImpl DRI; + DRI.p = reinterpret_cast(Sec); + return DRI; + } + + DataRefImpl toDRI(const Elf_Dyn *Dyn) const { + DataRefImpl DRI; + DRI.p = reinterpret_cast(Dyn); + return DRI; + } + + bool isExportedToOtherDSO(const Elf_Sym *ESym) const { + unsigned char Binding = ESym->getBinding(); + unsigned char Visibility = ESym->getVisibility(); + + // A symbol is exported if its binding is either GLOBAL or WEAK, and its + // visibility is either DEFAULT or PROTECTED. All other symbols are not + // exported. + if ((Binding == ELF::STB_GLOBAL || Binding == ELF::STB_WEAK) && + (Visibility == ELF::STV_DEFAULT || Visibility == ELF::STV_PROTECTED)) + return true; + + return false; + } + + // This flag is used for classof, to distinguish ELFObjectFile from + // its subclass. If more subclasses will be created, this flag will + // have to become an enum. + bool isDyldELFObject; + +public: + ELFObjectFile(MemoryBufferRef Object, std::error_code &EC); + + const Elf_Rel *getRel(DataRefImpl Rel) const; + const Elf_Rela *getRela(DataRefImpl Rela) const; + + const Elf_Sym *getSymbol(DataRefImpl Sym) const { + return EF.template getEntry(Sym.d.a, Sym.d.b); + } + + const Elf_Shdr *getSection(DataRefImpl Sec) const { + return reinterpret_cast(Sec.p); + } + + basic_symbol_iterator symbol_begin_impl() const override; + basic_symbol_iterator symbol_end_impl() const override; + + elf_symbol_iterator dynamic_symbol_begin() const; + elf_symbol_iterator dynamic_symbol_end() const; + + section_iterator section_begin() const override; + section_iterator section_end() const override; + + ErrorOr getRelocationAddend(DataRefImpl Rel) const override; + + uint8_t getBytesInAddress() const override; + StringRef getFileFormatName() const override; + unsigned getArch() const override; + + std::error_code getPlatformFlags(unsigned &Result) const override { + Result = EF.getHeader()->e_flags; + return std::error_code(); + } + + const ELFFile *getELFFile() const { return &EF; } + + bool isDyldType() const { return isDyldELFObject; } + static inline bool classof(const Binary *v) { + return v->getType() == getELFType(ELFT::TargetEndianness == support::little, + ELFT::Is64Bits); + } + + elf_symbol_iterator_range getDynamicSymbolIterators() const override; + + bool isRelocatableObject() const override; +}; + +typedef ELFObjectFile> ELF32LEObjectFile; +typedef ELFObjectFile> ELF64LEObjectFile; +typedef ELFObjectFile> ELF32BEObjectFile; +typedef ELFObjectFile> ELF64BEObjectFile; + +template +void ELFObjectFile::moveSymbolNext(DataRefImpl &Sym) const { + ++Sym.d.b; +} + +template +ErrorOr ELFObjectFile::getSymbolName(DataRefImpl Sym) const { + const Elf_Sym *ESym = getSymbol(Sym); + const Elf_Shdr *SymTableSec = *EF.getSection(Sym.d.a); + const Elf_Shdr *StringTableSec = *EF.getSection(SymTableSec->sh_link); + StringRef SymTable = *EF.getStringTable(StringTableSec); + return ESym->getName(SymTable); +} + +template +uint64_t ELFObjectFile::getSectionFlags(DataRefImpl Sec) const { + return getSection(Sec)->sh_flags; +} + +template +uint32_t ELFObjectFile::getSectionType(DataRefImpl Sec) const { + return getSection(Sec)->sh_type; +} + +template +uint64_t ELFObjectFile::getSymbolValueImpl(DataRefImpl Symb) const { + const Elf_Sym *ESym = getSymbol(Symb); + uint64_t Ret = ESym->st_value; + if (ESym->st_shndx == ELF::SHN_ABS) + return Ret; + + const Elf_Ehdr *Header = EF.getHeader(); + // Clear the ARM/Thumb or microMIPS indicator flag. + if ((Header->e_machine == ELF::EM_ARM || Header->e_machine == ELF::EM_MIPS) && + ESym->getType() == ELF::STT_FUNC) + Ret &= ~1; + + return Ret; +} + +template +ErrorOr +ELFObjectFile::getSymbolAddress(DataRefImpl Symb) const { + uint64_t Result = getSymbolValue(Symb); + const Elf_Sym *ESym = getSymbol(Symb); + switch (ESym->st_shndx) { + case ELF::SHN_COMMON: + case ELF::SHN_UNDEF: + case ELF::SHN_ABS: + return Result; + } + + const Elf_Ehdr *Header = EF.getHeader(); + const Elf_Shdr *SymTab = *EF.getSection(Symb.d.a); + + if (Header->e_type == ELF::ET_REL) { + ErrorOr SectionOrErr = + EF.getSection(ESym, SymTab, ShndxTable); + if (std::error_code EC = SectionOrErr.getError()) + return EC; + const Elf_Shdr *Section = *SectionOrErr; + if (Section) + Result += Section->sh_addr; + } + + return Result; +} + +template +uint32_t ELFObjectFile::getSymbolAlignment(DataRefImpl Symb) const { + const Elf_Sym *Sym = getSymbol(Symb); + if (Sym->st_shndx == ELF::SHN_COMMON) + return Sym->st_value; + return 0; +} + +template +uint64_t ELFObjectFile::getSymbolSize(DataRefImpl Sym) const { + return getSymbol(Sym)->st_size; +} + +template +uint64_t ELFObjectFile::getCommonSymbolSizeImpl(DataRefImpl Symb) const { + return getSymbol(Symb)->st_size; +} + +template +uint8_t ELFObjectFile::getSymbolOther(DataRefImpl Symb) const { + return getSymbol(Symb)->st_other; +} + +template +uint8_t ELFObjectFile::getSymbolELFType(DataRefImpl Symb) const { + return getSymbol(Symb)->getType(); +} + +template +SymbolRef::Type ELFObjectFile::getSymbolType(DataRefImpl Symb) const { + const Elf_Sym *ESym = getSymbol(Symb); + + switch (ESym->getType()) { + case ELF::STT_NOTYPE: + return SymbolRef::ST_Unknown; + case ELF::STT_SECTION: + return SymbolRef::ST_Debug; + case ELF::STT_FILE: + return SymbolRef::ST_File; + case ELF::STT_FUNC: + return SymbolRef::ST_Function; + case ELF::STT_OBJECT: + case ELF::STT_COMMON: + case ELF::STT_TLS: + return SymbolRef::ST_Data; + default: + return SymbolRef::ST_Other; + } +} + +template +uint32_t ELFObjectFile::getSymbolFlags(DataRefImpl Sym) const { + const Elf_Sym *ESym = getSymbol(Sym); + + uint32_t Result = SymbolRef::SF_None; + + if (ESym->getBinding() != ELF::STB_LOCAL) + Result |= SymbolRef::SF_Global; + + if (ESym->getBinding() == ELF::STB_WEAK) + Result |= SymbolRef::SF_Weak; + + if (ESym->st_shndx == ELF::SHN_ABS) + Result |= SymbolRef::SF_Absolute; + + if (ESym->getType() == ELF::STT_FILE || ESym->getType() == ELF::STT_SECTION || + ESym == EF.symbol_begin(DotSymtabSec) || + ESym == EF.symbol_begin(DotDynSymSec)) + Result |= SymbolRef::SF_FormatSpecific; + + if (EF.getHeader()->e_machine == ELF::EM_ARM) { + if (ErrorOr NameOrErr = getSymbolName(Sym)) { + StringRef Name = *NameOrErr; + if (Name.startswith("$d") || Name.startswith("$t") || + Name.startswith("$a")) + Result |= SymbolRef::SF_FormatSpecific; + } + } + + if (ESym->st_shndx == ELF::SHN_UNDEF) + Result |= SymbolRef::SF_Undefined; + + if (ESym->getType() == ELF::STT_COMMON || ESym->st_shndx == ELF::SHN_COMMON) + Result |= SymbolRef::SF_Common; + + if (isExportedToOtherDSO(ESym)) + Result |= SymbolRef::SF_Exported; + + if (ESym->getVisibility() == ELF::STV_HIDDEN) + Result |= SymbolRef::SF_Hidden; + + return Result; +} + +template +ErrorOr +ELFObjectFile::getSymbolSection(const Elf_Sym *ESym, + const Elf_Shdr *SymTab) const { + ErrorOr ESecOrErr = EF.getSection(ESym, SymTab, ShndxTable); + if (std::error_code EC = ESecOrErr.getError()) + return EC; + + const Elf_Shdr *ESec = *ESecOrErr; + if (!ESec) + return section_end(); + + DataRefImpl Sec; + Sec.p = reinterpret_cast(ESec); + return section_iterator(SectionRef(Sec, this)); +} + +template +ErrorOr +ELFObjectFile::getSymbolSection(DataRefImpl Symb) const { + const Elf_Sym *Sym = getSymbol(Symb); + const Elf_Shdr *SymTab = *EF.getSection(Symb.d.a); + return getSymbolSection(Sym, SymTab); +} + +template +void ELFObjectFile::moveSectionNext(DataRefImpl &Sec) const { + const Elf_Shdr *ESec = getSection(Sec); + Sec = toDRI(++ESec); +} + +template +std::error_code ELFObjectFile::getSectionName(DataRefImpl Sec, + StringRef &Result) const { + ErrorOr Name = EF.getSectionName(&*getSection(Sec)); + if (!Name) + return Name.getError(); + Result = *Name; + return std::error_code(); +} + +template +uint64_t ELFObjectFile::getSectionAddress(DataRefImpl Sec) const { + return getSection(Sec)->sh_addr; +} + +template +uint64_t ELFObjectFile::getSectionSize(DataRefImpl Sec) const { + return getSection(Sec)->sh_size; +} + +template +std::error_code +ELFObjectFile::getSectionContents(DataRefImpl Sec, + StringRef &Result) const { + const Elf_Shdr *EShdr = getSection(Sec); + Result = StringRef((const char *)base() + EShdr->sh_offset, EShdr->sh_size); + return std::error_code(); +} + +template +uint64_t ELFObjectFile::getSectionAlignment(DataRefImpl Sec) const { + return getSection(Sec)->sh_addralign; +} + +template +bool ELFObjectFile::isSectionText(DataRefImpl Sec) const { + return getSection(Sec)->sh_flags & ELF::SHF_EXECINSTR; +} + +template +bool ELFObjectFile::isSectionData(DataRefImpl Sec) const { + const Elf_Shdr *EShdr = getSection(Sec); + return EShdr->sh_flags & (ELF::SHF_ALLOC | ELF::SHF_WRITE) && + EShdr->sh_type == ELF::SHT_PROGBITS; +} + +template +bool ELFObjectFile::isSectionBSS(DataRefImpl Sec) const { + const Elf_Shdr *EShdr = getSection(Sec); + return EShdr->sh_flags & (ELF::SHF_ALLOC | ELF::SHF_WRITE) && + EShdr->sh_type == ELF::SHT_NOBITS; +} + +template +bool ELFObjectFile::isSectionVirtual(DataRefImpl Sec) const { + return getSection(Sec)->sh_type == ELF::SHT_NOBITS; +} + +template +relocation_iterator +ELFObjectFile::section_rel_begin(DataRefImpl Sec) const { + DataRefImpl RelData; + uintptr_t SHT = reinterpret_cast(EF.section_begin()); + RelData.d.a = (Sec.p - SHT) / EF.getHeader()->e_shentsize; + RelData.d.b = 0; + + const Elf_Shdr *S = reinterpret_cast(Sec.p); + if (S->sh_type != ELF::SHT_RELA && S->sh_type != ELF::SHT_REL) + return relocation_iterator(RelocationRef(RelData, this)); + + const Elf_Shdr *RelSec = getRelSection(RelData); + ErrorOr SymSecOrErr = EF.getSection(RelSec->sh_link); + if (std::error_code EC = SymSecOrErr.getError()) + report_fatal_error(EC.message()); + const Elf_Shdr *SymSec = *SymSecOrErr; + uint32_t SymSecType = SymSec->sh_type; + if (SymSecType != ELF::SHT_SYMTAB && SymSecType != ELF::SHT_DYNSYM) + report_fatal_error("Invalid symbol table section type!"); + if (SymSecType == ELF::SHT_DYNSYM) + RelData.d.b = 1; + + return relocation_iterator(RelocationRef(RelData, this)); +} + +template +relocation_iterator +ELFObjectFile::section_rel_end(DataRefImpl Sec) const { + const Elf_Shdr *S = reinterpret_cast(Sec.p); + relocation_iterator Begin = section_rel_begin(Sec); + if (S->sh_type != ELF::SHT_RELA && S->sh_type != ELF::SHT_REL) + return Begin; + DataRefImpl RelData = Begin->getRawDataRefImpl(); + RelData.d.b += (S->sh_size / S->sh_entsize) << 1; + return relocation_iterator(RelocationRef(RelData, this)); +} + +template +section_iterator +ELFObjectFile::getRelocatedSection(DataRefImpl Sec) const { + if (EF.getHeader()->e_type != ELF::ET_REL) + return section_end(); + + const Elf_Shdr *EShdr = getSection(Sec); + uintX_t Type = EShdr->sh_type; + if (Type != ELF::SHT_REL && Type != ELF::SHT_RELA) + return section_end(); + + ErrorOr R = EF.getSection(EShdr->sh_info); + if (std::error_code EC = R.getError()) + report_fatal_error(EC.message()); + return section_iterator(SectionRef(toDRI(*R), this)); +} + +// Relocations +template +void ELFObjectFile::moveRelocationNext(DataRefImpl &Rel) const { + Rel.d.b += 2; +} + +template +symbol_iterator +ELFObjectFile::getRelocationSymbol(DataRefImpl Rel) const { + uint32_t symbolIdx; + const Elf_Shdr *sec = getRelSection(Rel); + if (sec->sh_type == ELF::SHT_REL) + symbolIdx = getRel(Rel)->getSymbol(EF.isMips64EL()); + else + symbolIdx = getRela(Rel)->getSymbol(EF.isMips64EL()); + if (!symbolIdx) + return symbol_end(); + + bool IsDyn = Rel.d.b & 1; + DataRefImpl SymbolData; + if (IsDyn) + SymbolData = toDRI(DotDynSymSec, symbolIdx); + else + SymbolData = toDRI(DotSymtabSec, symbolIdx); + return symbol_iterator(SymbolRef(SymbolData, this)); +} + +template +uint64_t ELFObjectFile::getRelocationOffset(DataRefImpl Rel) const { + assert(EF.getHeader()->e_type == ELF::ET_REL && + "Only relocatable object files have relocation offsets"); + const Elf_Shdr *sec = getRelSection(Rel); + if (sec->sh_type == ELF::SHT_REL) + return getRel(Rel)->r_offset; + + return getRela(Rel)->r_offset; +} + +template +uint64_t ELFObjectFile::getRelocationType(DataRefImpl Rel) const { + const Elf_Shdr *sec = getRelSection(Rel); + if (sec->sh_type == ELF::SHT_REL) + return getRel(Rel)->getType(EF.isMips64EL()); + else + return getRela(Rel)->getType(EF.isMips64EL()); +} + +template +StringRef ELFObjectFile::getRelocationTypeName(uint32_t Type) const { + return getELFRelocationTypeName(EF.getHeader()->e_machine, Type); +} + +template +void ELFObjectFile::getRelocationTypeName( + DataRefImpl Rel, SmallVectorImpl &Result) const { + uint32_t type = getRelocationType(Rel); + EF.getRelocationTypeName(type, Result); +} + +template +ErrorOr +ELFObjectFile::getRelocationAddend(DataRefImpl Rel) const { + if (getRelSection(Rel)->sh_type != ELF::SHT_RELA) + return object_error::parse_failed; + return (int64_t)getRela(Rel)->r_addend; +} + +template +const typename ELFObjectFile::Elf_Rel * +ELFObjectFile::getRel(DataRefImpl Rel) const { + assert(getRelSection(Rel)->sh_type == ELF::SHT_REL); + return EF.template getEntry(Rel.d.a, Rel.d.b >> 1); +} + +template +const typename ELFObjectFile::Elf_Rela * +ELFObjectFile::getRela(DataRefImpl Rela) const { + assert(getRelSection(Rela)->sh_type == ELF::SHT_RELA); + return EF.template getEntry(Rela.d.a, Rela.d.b >> 1); +} + +template +ELFObjectFile::ELFObjectFile(MemoryBufferRef Object, std::error_code &EC) + : ELFObjectFileBase( + getELFType(ELFT::TargetEndianness == support::little, ELFT::Is64Bits), + Object), + EF(Data.getBuffer(), EC) { + if (EC) + return; + for (const Elf_Shdr &Sec : EF.sections()) { + switch (Sec.sh_type) { + case ELF::SHT_DYNSYM: { + if (DotDynSymSec) { + // More than one .dynsym! + EC = object_error::parse_failed; + return; + } + DotDynSymSec = &Sec; + break; + } + case ELF::SHT_SYMTAB: { + if (DotSymtabSec) { + // More than one .dynsym! + EC = object_error::parse_failed; + return; + } + DotSymtabSec = &Sec; + break; + } + case ELF::SHT_SYMTAB_SHNDX: { + ErrorOr> TableOrErr = EF.getSHNDXTable(Sec); + if ((EC = TableOrErr.getError())) + return; + ShndxTable = *TableOrErr; + break; + } + } + } +} + +template +basic_symbol_iterator ELFObjectFile::symbol_begin_impl() const { + DataRefImpl Sym = toDRI(DotSymtabSec, 0); + return basic_symbol_iterator(SymbolRef(Sym, this)); +} + +template +basic_symbol_iterator ELFObjectFile::symbol_end_impl() const { + const Elf_Shdr *SymTab = DotSymtabSec; + if (!SymTab) + return symbol_begin_impl(); + DataRefImpl Sym = toDRI(SymTab, SymTab->sh_size / sizeof(Elf_Sym)); + return basic_symbol_iterator(SymbolRef(Sym, this)); +} + +template +elf_symbol_iterator ELFObjectFile::dynamic_symbol_begin() const { + DataRefImpl Sym = toDRI(DotDynSymSec, 0); + return symbol_iterator(SymbolRef(Sym, this)); +} + +template +elf_symbol_iterator ELFObjectFile::dynamic_symbol_end() const { + const Elf_Shdr *SymTab = DotDynSymSec; + DataRefImpl Sym = toDRI(SymTab, SymTab->sh_size / sizeof(Elf_Sym)); + return basic_symbol_iterator(SymbolRef(Sym, this)); +} + +template +section_iterator ELFObjectFile::section_begin() const { + return section_iterator(SectionRef(toDRI(EF.section_begin()), this)); +} + +template +section_iterator ELFObjectFile::section_end() const { + return section_iterator(SectionRef(toDRI(EF.section_end()), this)); +} + +template +uint8_t ELFObjectFile::getBytesInAddress() const { + return ELFT::Is64Bits ? 8 : 4; +} + +template +StringRef ELFObjectFile::getFileFormatName() const { + bool IsLittleEndian = ELFT::TargetEndianness == support::little; + switch (EF.getHeader()->e_ident[ELF::EI_CLASS]) { + case ELF::ELFCLASS32: + switch (EF.getHeader()->e_machine) { + case ELF::EM_386: + return "ELF32-i386"; + case ELF::EM_IAMCU: + return "ELF32-iamcu"; + case ELF::EM_X86_64: + return "ELF32-x86-64"; + case ELF::EM_ARM: + return (IsLittleEndian ? "ELF32-arm-little" : "ELF32-arm-big"); + case ELF::EM_AVR: + return "ELF32-avr"; + case ELF::EM_HEXAGON: + return "ELF32-hexagon"; + case ELF::EM_MIPS: + return "ELF32-mips"; + case ELF::EM_PPC: + return "ELF32-ppc"; + case ELF::EM_SPARC: + case ELF::EM_SPARC32PLUS: + return "ELF32-sparc"; + case ELF::EM_WEBASSEMBLY: + return "ELF32-wasm"; + default: + return "ELF32-unknown"; + } + case ELF::ELFCLASS64: + switch (EF.getHeader()->e_machine) { + case ELF::EM_386: + return "ELF64-i386"; + case ELF::EM_X86_64: + return "ELF64-x86-64"; + case ELF::EM_AARCH64: + return (IsLittleEndian ? "ELF64-aarch64-little" : "ELF64-aarch64-big"); + case ELF::EM_PPC64: + return "ELF64-ppc64"; + case ELF::EM_S390: + return "ELF64-s390"; + case ELF::EM_SPARCV9: + return "ELF64-sparc"; + case ELF::EM_MIPS: + return "ELF64-mips"; + case ELF::EM_WEBASSEMBLY: + return "ELF64-wasm"; + default: + return "ELF64-unknown"; + } + default: + // FIXME: Proper error handling. + report_fatal_error("Invalid ELFCLASS!"); + } +} + +template +unsigned ELFObjectFile::getArch() const { + bool IsLittleEndian = ELFT::TargetEndianness == support::little; + switch (EF.getHeader()->e_machine) { + case ELF::EM_386: + case ELF::EM_IAMCU: + return Triple::x86; + case ELF::EM_X86_64: + return Triple::x86_64; + case ELF::EM_AARCH64: + return Triple::aarch64; + case ELF::EM_ARM: + return Triple::arm; + case ELF::EM_AVR: + return Triple::avr; + case ELF::EM_HEXAGON: + return Triple::hexagon; + case ELF::EM_MIPS: + switch (EF.getHeader()->e_ident[ELF::EI_CLASS]) { + case ELF::ELFCLASS32: + return IsLittleEndian ? Triple::mipsel : Triple::mips; + case ELF::ELFCLASS64: + return IsLittleEndian ? Triple::mips64el : Triple::mips64; + default: + report_fatal_error("Invalid ELFCLASS!"); + } + case ELF::EM_PPC: + return Triple::ppc; + case ELF::EM_PPC64: + return IsLittleEndian ? Triple::ppc64le : Triple::ppc64; + case ELF::EM_S390: + return Triple::systemz; + + case ELF::EM_SPARC: + case ELF::EM_SPARC32PLUS: + return IsLittleEndian ? Triple::sparcel : Triple::sparc; + case ELF::EM_SPARCV9: + return Triple::sparcv9; + case ELF::EM_WEBASSEMBLY: + switch (EF.getHeader()->e_ident[ELF::EI_CLASS]) { + case ELF::ELFCLASS32: return Triple::wasm32; + case ELF::ELFCLASS64: return Triple::wasm64; + default: return Triple::UnknownArch; + } + + default: + return Triple::UnknownArch; + } +} + +template +ELFObjectFileBase::elf_symbol_iterator_range +ELFObjectFile::getDynamicSymbolIterators() const { + return make_range(dynamic_symbol_begin(), dynamic_symbol_end()); +} + +template bool ELFObjectFile::isRelocatableObject() const { + return EF.getHeader()->e_type == ELF::ET_REL; +} + +} +} + +#endif diff --git a/llvm/include/llvm/Object/ELFTypes.h b/llvm/include/llvm/Object/ELFTypes.h new file mode 100644 index 0000000..e1cbec3 --- /dev/null +++ b/llvm/include/llvm/Object/ELFTypes.h @@ -0,0 +1,567 @@ +//===- ELFTypes.h - Endian specific types for ELF ---------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_OBJECT_ELFTYPES_H +#define LLVM_OBJECT_ELFTYPES_H + +#include "llvm/ADT/ArrayRef.h" +#include "llvm/Object/Error.h" +#include "llvm/Support/ELF.h" +#include "llvm/Support/Endian.h" +#include "llvm/Support/ErrorOr.h" + +namespace llvm_ks { +namespace object { + +using support::endianness; + +template struct ELFType { + static const endianness TargetEndianness = target_endianness; + static const bool Is64Bits = is64Bits; +}; + +typedef ELFType ELF32LE; +typedef ELFType ELF32BE; +typedef ELFType ELF64LE; +typedef ELFType ELF64BE; + +// Use an alignment of 2 for the typedefs since that is the worst case for +// ELF files in archives. + +// Templates to choose Elf_Addr and Elf_Off depending on is64Bits. +template struct ELFDataTypeTypedefHelperCommon { + typedef support::detail::packed_endian_specific_integral< + uint16_t, target_endianness, 2> Elf_Half; + typedef support::detail::packed_endian_specific_integral< + uint32_t, target_endianness, 2> Elf_Word; + typedef support::detail::packed_endian_specific_integral< + int32_t, target_endianness, 2> Elf_Sword; + typedef support::detail::packed_endian_specific_integral< + uint64_t, target_endianness, 2> Elf_Xword; + typedef support::detail::packed_endian_specific_integral< + int64_t, target_endianness, 2> Elf_Sxword; +}; + +template struct ELFDataTypeTypedefHelper; + +/// ELF 32bit types. +template +struct ELFDataTypeTypedefHelper> + : ELFDataTypeTypedefHelperCommon { + typedef uint32_t value_type; + typedef support::detail::packed_endian_specific_integral< + value_type, TargetEndianness, 2> Elf_Addr; + typedef support::detail::packed_endian_specific_integral< + value_type, TargetEndianness, 2> Elf_Off; +}; + +/// ELF 64bit types. +template +struct ELFDataTypeTypedefHelper> + : ELFDataTypeTypedefHelperCommon { + typedef uint64_t value_type; + typedef support::detail::packed_endian_specific_integral< + value_type, TargetEndianness, 2> Elf_Addr; + typedef support::detail::packed_endian_specific_integral< + value_type, TargetEndianness, 2> Elf_Off; +}; + +// I really don't like doing this, but the alternative is copypasta. +#define LLVM_ELF_IMPORT_TYPES(E, W) \ + typedef typename ELFDataTypeTypedefHelper>::Elf_Addr Elf_Addr; \ + typedef typename ELFDataTypeTypedefHelper>::Elf_Off Elf_Off; \ + typedef typename ELFDataTypeTypedefHelper>::Elf_Half Elf_Half; \ + typedef typename ELFDataTypeTypedefHelper>::Elf_Word Elf_Word; \ + typedef \ + typename ELFDataTypeTypedefHelper>::Elf_Sword Elf_Sword; \ + typedef \ + typename ELFDataTypeTypedefHelper>::Elf_Xword Elf_Xword; \ + typedef \ + typename ELFDataTypeTypedefHelper>::Elf_Sxword Elf_Sxword; + +#define LLVM_ELF_IMPORT_TYPES_ELFT(ELFT) \ + LLVM_ELF_IMPORT_TYPES(ELFT::TargetEndianness, ELFT::Is64Bits) + +// Section header. +template struct Elf_Shdr_Base; + +template +struct Elf_Shdr_Base> { + LLVM_ELF_IMPORT_TYPES(TargetEndianness, false) + Elf_Word sh_name; // Section name (index into string table) + Elf_Word sh_type; // Section type (SHT_*) + Elf_Word sh_flags; // Section flags (SHF_*) + Elf_Addr sh_addr; // Address where section is to be loaded + Elf_Off sh_offset; // File offset of section data, in bytes + Elf_Word sh_size; // Size of section, in bytes + Elf_Word sh_link; // Section type-specific header table index link + Elf_Word sh_info; // Section type-specific extra information + Elf_Word sh_addralign; // Section address alignment + Elf_Word sh_entsize; // Size of records contained within the section +}; + +template +struct Elf_Shdr_Base> { + LLVM_ELF_IMPORT_TYPES(TargetEndianness, true) + Elf_Word sh_name; // Section name (index into string table) + Elf_Word sh_type; // Section type (SHT_*) + Elf_Xword sh_flags; // Section flags (SHF_*) + Elf_Addr sh_addr; // Address where section is to be loaded + Elf_Off sh_offset; // File offset of section data, in bytes + Elf_Xword sh_size; // Size of section, in bytes + Elf_Word sh_link; // Section type-specific header table index link + Elf_Word sh_info; // Section type-specific extra information + Elf_Xword sh_addralign; // Section address alignment + Elf_Xword sh_entsize; // Size of records contained within the section +}; + +template +struct Elf_Shdr_Impl : Elf_Shdr_Base { + using Elf_Shdr_Base::sh_entsize; + using Elf_Shdr_Base::sh_size; + + /// @brief Get the number of entities this section contains if it has any. + unsigned getEntityCount() const { + if (sh_entsize == 0) + return 0; + return sh_size / sh_entsize; + } +}; + +template struct Elf_Sym_Base; + +template +struct Elf_Sym_Base> { + LLVM_ELF_IMPORT_TYPES(TargetEndianness, false) + Elf_Word st_name; // Symbol name (index into string table) + Elf_Addr st_value; // Value or address associated with the symbol + Elf_Word st_size; // Size of the symbol + unsigned char st_info; // Symbol's type and binding attributes + unsigned char st_other; // Must be zero; reserved + Elf_Half st_shndx; // Which section (header table index) it's defined in +}; + +template +struct Elf_Sym_Base> { + LLVM_ELF_IMPORT_TYPES(TargetEndianness, true) + Elf_Word st_name; // Symbol name (index into string table) + unsigned char st_info; // Symbol's type and binding attributes + unsigned char st_other; // Must be zero; reserved + Elf_Half st_shndx; // Which section (header table index) it's defined in + Elf_Addr st_value; // Value or address associated with the symbol + Elf_Xword st_size; // Size of the symbol +}; + +template +struct Elf_Sym_Impl : Elf_Sym_Base { + using Elf_Sym_Base::st_info; + using Elf_Sym_Base::st_shndx; + using Elf_Sym_Base::st_other; + using Elf_Sym_Base::st_value; + + // These accessors and mutators correspond to the ELF32_ST_BIND, + // ELF32_ST_TYPE, and ELF32_ST_INFO macros defined in the ELF specification: + unsigned char getBinding() const { return st_info >> 4; } + unsigned char getType() const { return st_info & 0x0f; } + uint64_t getValue() const { return st_value; } + void setBinding(unsigned char b) { setBindingAndType(b, getType()); } + void setType(unsigned char t) { setBindingAndType(getBinding(), t); } + void setBindingAndType(unsigned char b, unsigned char t) { + st_info = (b << 4) + (t & 0x0f); + } + + /// Access to the STV_xxx flag stored in the first two bits of st_other. + /// STV_DEFAULT: 0 + /// STV_INTERNAL: 1 + /// STV_HIDDEN: 2 + /// STV_PROTECTED: 3 + unsigned char getVisibility() const { return st_other & 0x3; } + void setVisibility(unsigned char v) { + assert(v < 4 && "Invalid value for visibility"); + st_other = (st_other & ~0x3) | v; + } + + bool isAbsolute() const { return st_shndx == ELF::SHN_ABS; } + bool isCommon() const { + return getType() == ELF::STT_COMMON || st_shndx == ELF::SHN_COMMON; + } + bool isDefined() const { return !isUndefined(); } + bool isProcessorSpecific() const { + return st_shndx >= ELF::SHN_LOPROC && st_shndx <= ELF::SHN_HIPROC; + } + bool isOSSpecific() const { + return st_shndx >= ELF::SHN_LOOS && st_shndx <= ELF::SHN_HIOS; + } + bool isReserved() const { + // ELF::SHN_HIRESERVE is 0xffff so st_shndx <= ELF::SHN_HIRESERVE is always + // true and some compilers warn about it. + return st_shndx >= ELF::SHN_LORESERVE; + } + bool isUndefined() const { return st_shndx == ELF::SHN_UNDEF; } + bool isExternal() const { + return getBinding() != ELF::STB_LOCAL; + } + + ErrorOr getName(StringRef StrTab) const; +}; + +template +ErrorOr Elf_Sym_Impl::getName(StringRef StrTab) const { + uint32_t Offset = this->st_name; + if (Offset >= StrTab.size()) + return object_error::parse_failed; + return StringRef(StrTab.data() + Offset); +} + +/// Elf_Versym: This is the structure of entries in the SHT_GNU_versym section +/// (.gnu.version). This structure is identical for ELF32 and ELF64. +template +struct Elf_Versym_Impl { + LLVM_ELF_IMPORT_TYPES_ELFT(ELFT) + Elf_Half vs_index; // Version index with flags (e.g. VERSYM_HIDDEN) +}; + +template struct Elf_Verdaux_Impl; + +/// Elf_Verdef: This is the structure of entries in the SHT_GNU_verdef section +/// (.gnu.version_d). This structure is identical for ELF32 and ELF64. +template +struct Elf_Verdef_Impl { + LLVM_ELF_IMPORT_TYPES_ELFT(ELFT) + typedef Elf_Verdaux_Impl Elf_Verdaux; + Elf_Half vd_version; // Version of this structure (e.g. VER_DEF_CURRENT) + Elf_Half vd_flags; // Bitwise flags (VER_DEF_*) + Elf_Half vd_ndx; // Version index, used in .gnu.version entries + Elf_Half vd_cnt; // Number of Verdaux entries + Elf_Word vd_hash; // Hash of name + Elf_Word vd_aux; // Offset to the first Verdaux entry (in bytes) + Elf_Word vd_next; // Offset to the next Verdef entry (in bytes) + + /// Get the first Verdaux entry for this Verdef. + const Elf_Verdaux *getAux() const { + return reinterpret_cast((const char *)this + vd_aux); + } +}; + +/// Elf_Verdaux: This is the structure of auxiliary data in the SHT_GNU_verdef +/// section (.gnu.version_d). This structure is identical for ELF32 and ELF64. +template +struct Elf_Verdaux_Impl { + LLVM_ELF_IMPORT_TYPES_ELFT(ELFT) + Elf_Word vda_name; // Version name (offset in string table) + Elf_Word vda_next; // Offset to next Verdaux entry (in bytes) +}; + +/// Elf_Verneed: This is the structure of entries in the SHT_GNU_verneed +/// section (.gnu.version_r). This structure is identical for ELF32 and ELF64. +template +struct Elf_Verneed_Impl { + LLVM_ELF_IMPORT_TYPES_ELFT(ELFT) + Elf_Half vn_version; // Version of this structure (e.g. VER_NEED_CURRENT) + Elf_Half vn_cnt; // Number of associated Vernaux entries + Elf_Word vn_file; // Library name (string table offset) + Elf_Word vn_aux; // Offset to first Vernaux entry (in bytes) + Elf_Word vn_next; // Offset to next Verneed entry (in bytes) +}; + +/// Elf_Vernaux: This is the structure of auxiliary data in SHT_GNU_verneed +/// section (.gnu.version_r). This structure is identical for ELF32 and ELF64. +template +struct Elf_Vernaux_Impl { + LLVM_ELF_IMPORT_TYPES_ELFT(ELFT) + Elf_Word vna_hash; // Hash of dependency name + Elf_Half vna_flags; // Bitwise Flags (VER_FLAG_*) + Elf_Half vna_other; // Version index, used in .gnu.version entries + Elf_Word vna_name; // Dependency name + Elf_Word vna_next; // Offset to next Vernaux entry (in bytes) +}; + +/// Elf_Dyn_Base: This structure matches the form of entries in the dynamic +/// table section (.dynamic) look like. +template struct Elf_Dyn_Base; + +template +struct Elf_Dyn_Base> { + LLVM_ELF_IMPORT_TYPES(TargetEndianness, false) + Elf_Sword d_tag; + union { + Elf_Word d_val; + Elf_Addr d_ptr; + } d_un; +}; + +template +struct Elf_Dyn_Base> { + LLVM_ELF_IMPORT_TYPES(TargetEndianness, true) + Elf_Sxword d_tag; + union { + Elf_Xword d_val; + Elf_Addr d_ptr; + } d_un; +}; + +/// Elf_Dyn_Impl: This inherits from Elf_Dyn_Base, adding getters. +template +struct Elf_Dyn_Impl : Elf_Dyn_Base { + using Elf_Dyn_Base::d_tag; + using Elf_Dyn_Base::d_un; + typedef typename std::conditional::type intX_t; + typedef typename std::conditional::type uintX_t; + intX_t getTag() const { return d_tag; } + uintX_t getVal() const { return d_un.d_val; } + uintX_t getPtr() const { return d_un.d_ptr; } +}; + +// Elf_Rel: Elf Relocation +template struct Elf_Rel_Impl; + +template +struct Elf_Rel_Impl, false> { + LLVM_ELF_IMPORT_TYPES(TargetEndianness, false) + Elf_Addr r_offset; // Location (file byte offset, or program virtual addr) + Elf_Word r_info; // Symbol table index and type of relocation to apply + + uint32_t getRInfo(bool isMips64EL) const { + assert(!isMips64EL); + return r_info; + } + void setRInfo(uint32_t R, bool IsMips64EL) { + assert(!IsMips64EL); + r_info = R; + } + + // These accessors and mutators correspond to the ELF32_R_SYM, ELF32_R_TYPE, + // and ELF32_R_INFO macros defined in the ELF specification: + uint32_t getSymbol(bool isMips64EL) const { + return this->getRInfo(isMips64EL) >> 8; + } + unsigned char getType(bool isMips64EL) const { + return (unsigned char)(this->getRInfo(isMips64EL) & 0x0ff); + } + void setSymbol(uint32_t s, bool IsMips64EL) { + setSymbolAndType(s, getType(), IsMips64EL); + } + void setType(unsigned char t, bool IsMips64EL) { + setSymbolAndType(getSymbol(), t, IsMips64EL); + } + void setSymbolAndType(uint32_t s, unsigned char t, bool IsMips64EL) { + this->setRInfo((s << 8) + t, IsMips64EL); + } +}; + +template +struct Elf_Rel_Impl, true> + : public Elf_Rel_Impl, false> { + LLVM_ELF_IMPORT_TYPES(TargetEndianness, false) + Elf_Sword r_addend; // Compute value for relocatable field by adding this +}; + +template +struct Elf_Rel_Impl, false> { + LLVM_ELF_IMPORT_TYPES(TargetEndianness, true) + Elf_Addr r_offset; // Location (file byte offset, or program virtual addr) + Elf_Xword r_info; // Symbol table index and type of relocation to apply + + uint64_t getRInfo(bool isMips64EL) const { + uint64_t t = r_info; + if (!isMips64EL) + return t; + // Mips64 little endian has a "special" encoding of r_info. Instead of one + // 64 bit little endian number, it is a little endian 32 bit number followed + // by a 32 bit big endian number. + return (t << 32) | ((t >> 8) & 0xff000000) | ((t >> 24) & 0x00ff0000) | + ((t >> 40) & 0x0000ff00) | ((t >> 56) & 0x000000ff); + } + void setRInfo(uint64_t R, bool IsMips64EL) { + if (IsMips64EL) + r_info = (R >> 32) | ((R & 0xff000000) << 8) | ((R & 0x00ff0000) << 24) | + ((R & 0x0000ff00) << 40) | ((R & 0x000000ff) << 56); + else + r_info = R; + } + + // These accessors and mutators correspond to the ELF64_R_SYM, ELF64_R_TYPE, + // and ELF64_R_INFO macros defined in the ELF specification: + uint32_t getSymbol(bool isMips64EL) const { + return (uint32_t)(this->getRInfo(isMips64EL) >> 32); + } + uint32_t getType(bool isMips64EL) const { + return (uint32_t)(this->getRInfo(isMips64EL) & 0xffffffffL); + } + void setSymbol(uint32_t s, bool IsMips64EL) { + setSymbolAndType(s, getType(), IsMips64EL); + } + void setType(uint32_t t, bool IsMips64EL) { + setSymbolAndType(getSymbol(), t, IsMips64EL); + } + void setSymbolAndType(uint32_t s, uint32_t t, bool IsMips64EL) { + this->setRInfo(((uint64_t)s << 32) + (t & 0xffffffffL), IsMips64EL); + } +}; + +template +struct Elf_Rel_Impl, true> + : public Elf_Rel_Impl, false> { + LLVM_ELF_IMPORT_TYPES(TargetEndianness, true) + Elf_Sxword r_addend; // Compute value for relocatable field by adding this. +}; + +template +struct Elf_Ehdr_Impl { + LLVM_ELF_IMPORT_TYPES_ELFT(ELFT) + unsigned char e_ident[ELF::EI_NIDENT]; // ELF Identification bytes + Elf_Half e_type; // Type of file (see ET_*) + Elf_Half e_machine; // Required architecture for this file (see EM_*) + Elf_Word e_version; // Must be equal to 1 + Elf_Addr e_entry; // Address to jump to in order to start program + Elf_Off e_phoff; // Program header table's file offset, in bytes + Elf_Off e_shoff; // Section header table's file offset, in bytes + Elf_Word e_flags; // Processor-specific flags + Elf_Half e_ehsize; // Size of ELF header, in bytes + Elf_Half e_phentsize; // Size of an entry in the program header table + Elf_Half e_phnum; // Number of entries in the program header table + Elf_Half e_shentsize; // Size of an entry in the section header table + Elf_Half e_shnum; // Number of entries in the section header table + Elf_Half e_shstrndx; // Section header table index of section name + // string table + bool checkMagic() const { + return (memcmp(e_ident, ELF::ElfMagic, strlen(ELF::ElfMagic))) == 0; + } + unsigned char getFileClass() const { return e_ident[ELF::EI_CLASS]; } + unsigned char getDataEncoding() const { return e_ident[ELF::EI_DATA]; } +}; + +template struct Elf_Phdr_Impl; + +template +struct Elf_Phdr_Impl> { + LLVM_ELF_IMPORT_TYPES(TargetEndianness, false) + Elf_Word p_type; // Type of segment + Elf_Off p_offset; // FileOffset where segment is located, in bytes + Elf_Addr p_vaddr; // Virtual Address of beginning of segment + Elf_Addr p_paddr; // Physical address of beginning of segment (OS-specific) + Elf_Word p_filesz; // Num. of bytes in file image of segment (may be zero) + Elf_Word p_memsz; // Num. of bytes in mem image of segment (may be zero) + Elf_Word p_flags; // Segment flags + Elf_Word p_align; // Segment alignment constraint +}; + +template +struct Elf_Phdr_Impl> { + LLVM_ELF_IMPORT_TYPES(TargetEndianness, true) + Elf_Word p_type; // Type of segment + Elf_Word p_flags; // Segment flags + Elf_Off p_offset; // FileOffset where segment is located, in bytes + Elf_Addr p_vaddr; // Virtual Address of beginning of segment + Elf_Addr p_paddr; // Physical address of beginning of segment (OS-specific) + Elf_Xword p_filesz; // Num. of bytes in file image of segment (may be zero) + Elf_Xword p_memsz; // Num. of bytes in mem image of segment (may be zero) + Elf_Xword p_align; // Segment alignment constraint +}; + +// ELFT needed for endianess. +template +struct Elf_Hash_Impl { + LLVM_ELF_IMPORT_TYPES_ELFT(ELFT) + Elf_Word nbucket; + Elf_Word nchain; + + ArrayRef buckets() const { + return ArrayRef(&nbucket + 2, &nbucket + 2 + nbucket); + } + + ArrayRef chains() const { + return ArrayRef(&nbucket + 2 + nbucket, + &nbucket + 2 + nbucket + nchain); + } +}; + +// .gnu.hash section +template +struct Elf_GnuHash_Impl { + LLVM_ELF_IMPORT_TYPES_ELFT(ELFT) + Elf_Word nbuckets; + Elf_Word symndx; + Elf_Word maskwords; + Elf_Word shift2; + + ArrayRef filter() const { + return ArrayRef(reinterpret_cast(&shift2 + 1), + maskwords); + } + + ArrayRef buckets() const { + return ArrayRef( + reinterpret_cast(filter().end()), nbuckets); + } + + ArrayRef values(unsigned DynamicSymCount) const { + return ArrayRef(buckets().end(), DynamicSymCount - symndx); + } +}; + +// MIPS .reginfo section +template +struct Elf_Mips_RegInfo; + +template +struct Elf_Mips_RegInfo> { + LLVM_ELF_IMPORT_TYPES(TargetEndianness, false) + Elf_Word ri_gprmask; // bit-mask of used general registers + Elf_Word ri_cprmask[4]; // bit-mask of used co-processor registers + Elf_Addr ri_gp_value; // gp register value +}; + +template +struct Elf_Mips_RegInfo> { + LLVM_ELF_IMPORT_TYPES(TargetEndianness, true) + Elf_Word ri_gprmask; // bit-mask of used general registers + Elf_Word ri_pad; // unused padding field + Elf_Word ri_cprmask[4]; // bit-mask of used co-processor registers + Elf_Addr ri_gp_value; // gp register value +}; + +// .MIPS.options section +template struct Elf_Mips_Options { + LLVM_ELF_IMPORT_TYPES_ELFT(ELFT) + uint8_t kind; // Determines interpretation of variable part of descriptor + uint8_t size; // Byte size of descriptor, including this header + Elf_Half section; // Section header index of section affected, + // or 0 for global options + Elf_Word info; // Kind-specific information + + const Elf_Mips_RegInfo &getRegInfo() const { + assert(kind == llvm_ks::ELF::ODK_REGINFO); + return *reinterpret_cast *>( + (const uint8_t *)this + sizeof(Elf_Mips_Options)); + } +}; + +// .MIPS.abiflags section content +template struct Elf_Mips_ABIFlags { + LLVM_ELF_IMPORT_TYPES_ELFT(ELFT) + Elf_Half version; // Version of the structure + uint8_t isa_level; // ISA level: 1-5, 32, and 64 + uint8_t isa_rev; // ISA revision (0 for MIPS I - MIPS V) + uint8_t gpr_size; // General purpose registers size + uint8_t cpr1_size; // Co-processor 1 registers size + uint8_t cpr2_size; // Co-processor 2 registers size + uint8_t fp_abi; // Floating-point ABI flag + Elf_Word isa_ext; // Processor-specific extension + Elf_Word ases; // ASEs flags + Elf_Word flags1; // General flags + Elf_Word flags2; // General flags +}; + +} // end namespace object. +} // end namespace llvm_ks. + +#endif diff --git a/llvm/include/llvm/Object/Error.h b/llvm/include/llvm/Object/Error.h new file mode 100644 index 0000000..7dd9726 --- /dev/null +++ b/llvm/include/llvm/Object/Error.h @@ -0,0 +1,52 @@ +//===- Error.h - system_error extensions for Object -------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This declares a new error_category for the Object library. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_OBJECT_ERROR_H +#define LLVM_OBJECT_ERROR_H + +#include + +namespace llvm_ks { +namespace object { + +const std::error_category &object_category(); + +enum class object_error { + // Error code 0 is absent. Use std::error_code() instead. + arch_not_found = 1, + invalid_file_type, + parse_failed, + unexpected_eof, + string_table_non_null_end, + invalid_section_index, + bitcode_section_not_found, + elf_invalid_dynamic_table_size, + macho_small_load_command, + macho_load_segment_too_many_sections, + macho_load_segment_too_small, +}; + +inline std::error_code make_error_code(object_error e) { + return std::error_code(static_cast(e), object_category()); +} + +} // end namespace object. + +} // end namespace llvm_ks. + +namespace std { +template <> +struct is_error_code_enum : std::true_type {}; +} + +#endif diff --git a/llvm/include/llvm/Object/MachO.h b/llvm/include/llvm/Object/MachO.h new file mode 100644 index 0000000..b8ad5a7 --- /dev/null +++ b/llvm/include/llvm/Object/MachO.h @@ -0,0 +1,523 @@ +//===- MachO.h - MachO object file implementation ---------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the MachOObjectFile class, which implement the ObjectFile +// interface for MachO files. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_OBJECT_MACHO_H +#define LLVM_OBJECT_MACHO_H + +#include "llvm/ADT/ArrayRef.h" +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/Triple.h" +#include "llvm/Object/ObjectFile.h" +#include "llvm/Support/MachO.h" + +namespace llvm_ks { +namespace object { + +/// DiceRef - This is a value type class that represents a single +/// data in code entry in the table in a Mach-O object file. +class DiceRef { + DataRefImpl DicePimpl; + const ObjectFile *OwningObject; + +public: + DiceRef() : OwningObject(nullptr) { } + + DiceRef(DataRefImpl DiceP, const ObjectFile *Owner); + + bool operator==(const DiceRef &Other) const; + bool operator<(const DiceRef &Other) const; + + void moveNext(); + + std::error_code getOffset(uint32_t &Result) const; + std::error_code getLength(uint16_t &Result) const; + std::error_code getKind(uint16_t &Result) const; + + DataRefImpl getRawDataRefImpl() const; + const ObjectFile *getObjectFile() const; +}; +typedef content_iterator dice_iterator; + +/// ExportEntry encapsulates the current-state-of-the-walk used when doing a +/// non-recursive walk of the trie data structure. This allows you to iterate +/// across all exported symbols using: +/// for (const llvm_ks::object::ExportEntry &AnExport : Obj->exports()) { +/// } +class ExportEntry { +public: + ExportEntry(ArrayRef Trie); + + StringRef name() const; + uint64_t flags() const; + uint64_t address() const; + uint64_t other() const; + StringRef otherName() const; + uint32_t nodeOffset() const; + + bool operator==(const ExportEntry &) const; + + void moveNext(); + +private: + friend class MachOObjectFile; + void moveToFirst(); + void moveToEnd(); + uint64_t readULEB128(const uint8_t *&p); + void pushDownUntilBottom(); + void pushNode(uint64_t Offset); + + // Represents a node in the mach-o exports trie. + struct NodeState { + NodeState(const uint8_t *Ptr); + const uint8_t *Start; + const uint8_t *Current; + uint64_t Flags; + uint64_t Address; + uint64_t Other; + const char *ImportName; + unsigned ChildCount; + unsigned NextChildIndex; + unsigned ParentStringLength; + bool IsExportNode; + }; + + ArrayRef Trie; + SmallString<256> CumulativeString; + SmallVector Stack; + bool Malformed; + bool Done; +}; +typedef content_iterator export_iterator; + +/// MachORebaseEntry encapsulates the current state in the decompression of +/// rebasing opcodes. This allows you to iterate through the compressed table of +/// rebasing using: +/// for (const llvm_ks::object::MachORebaseEntry &Entry : Obj->rebaseTable()) { +/// } +class MachORebaseEntry { +public: + MachORebaseEntry(ArrayRef opcodes, bool is64Bit); + + uint32_t segmentIndex() const; + uint64_t segmentOffset() const; + StringRef typeName() const; + + bool operator==(const MachORebaseEntry &) const; + + void moveNext(); + +private: + friend class MachOObjectFile; + void moveToFirst(); + void moveToEnd(); + uint64_t readULEB128(); + + ArrayRef Opcodes; + const uint8_t *Ptr; + uint64_t SegmentOffset; + uint32_t SegmentIndex; + uint64_t RemainingLoopCount; + uint64_t AdvanceAmount; + uint8_t RebaseType; + uint8_t PointerSize; + bool Malformed; + bool Done; +}; +typedef content_iterator rebase_iterator; + +/// MachOBindEntry encapsulates the current state in the decompression of +/// binding opcodes. This allows you to iterate through the compressed table of +/// bindings using: +/// for (const llvm_ks::object::MachOBindEntry &Entry : Obj->bindTable()) { +/// } +class MachOBindEntry { +public: + enum class Kind { Regular, Lazy, Weak }; + + MachOBindEntry(ArrayRef Opcodes, bool is64Bit, MachOBindEntry::Kind); + + uint32_t segmentIndex() const; + uint64_t segmentOffset() const; + StringRef typeName() const; + StringRef symbolName() const; + uint32_t flags() const; + int64_t addend() const; + int ordinal() const; + + bool operator==(const MachOBindEntry &) const; + + void moveNext(); + +private: + friend class MachOObjectFile; + void moveToFirst(); + void moveToEnd(); + uint64_t readULEB128(); + int64_t readSLEB128(); + + ArrayRef Opcodes; + const uint8_t *Ptr; + uint64_t SegmentOffset; + uint32_t SegmentIndex; + StringRef SymbolName; + int Ordinal; + uint32_t Flags; + int64_t Addend; + uint64_t RemainingLoopCount; + uint64_t AdvanceAmount; + uint8_t BindType; + uint8_t PointerSize; + Kind TableKind; + bool Malformed; + bool Done; +}; +typedef content_iterator bind_iterator; + +class MachOObjectFile : public ObjectFile { +public: + struct LoadCommandInfo { + const char *Ptr; // Where in memory the load command is. + MachO::load_command C; // The command itself. + }; + typedef SmallVector LoadCommandList; + typedef LoadCommandList::const_iterator load_command_iterator; + + MachOObjectFile(MemoryBufferRef Object, bool IsLittleEndian, bool Is64Bits, + std::error_code &EC); + + void moveSymbolNext(DataRefImpl &Symb) const override; + + uint64_t getNValue(DataRefImpl Sym) const; + ErrorOr getSymbolName(DataRefImpl Symb) const override; + + // MachO specific. + std::error_code getIndirectName(DataRefImpl Symb, StringRef &Res) const; + unsigned getSectionType(SectionRef Sec) const; + + ErrorOr getSymbolAddress(DataRefImpl Symb) const override; + uint32_t getSymbolAlignment(DataRefImpl Symb) const override; + uint64_t getCommonSymbolSizeImpl(DataRefImpl Symb) const override; + SymbolRef::Type getSymbolType(DataRefImpl Symb) const override; + uint32_t getSymbolFlags(DataRefImpl Symb) const override; + ErrorOr getSymbolSection(DataRefImpl Symb) const override; + unsigned getSymbolSectionID(SymbolRef Symb) const; + unsigned getSectionID(SectionRef Sec) const; + + void moveSectionNext(DataRefImpl &Sec) const override; + std::error_code getSectionName(DataRefImpl Sec, + StringRef &Res) const override; + uint64_t getSectionAddress(DataRefImpl Sec) const override; + uint64_t getSectionSize(DataRefImpl Sec) const override; + std::error_code getSectionContents(DataRefImpl Sec, + StringRef &Res) const override; + uint64_t getSectionAlignment(DataRefImpl Sec) const override; + bool isSectionText(DataRefImpl Sec) const override; + bool isSectionData(DataRefImpl Sec) const override; + bool isSectionBSS(DataRefImpl Sec) const override; + bool isSectionVirtual(DataRefImpl Sec) const override; + relocation_iterator section_rel_begin(DataRefImpl Sec) const override; + relocation_iterator section_rel_end(DataRefImpl Sec) const override; + + void moveRelocationNext(DataRefImpl &Rel) const override; + uint64_t getRelocationOffset(DataRefImpl Rel) const override; + symbol_iterator getRelocationSymbol(DataRefImpl Rel) const override; + section_iterator getRelocationSection(DataRefImpl Rel) const; + uint64_t getRelocationType(DataRefImpl Rel) const override; + void getRelocationTypeName(DataRefImpl Rel, + SmallVectorImpl &Result) const override; + uint8_t getRelocationLength(DataRefImpl Rel) const; + + // MachO specific. + std::error_code getLibraryShortNameByIndex(unsigned Index, StringRef &) const; + + section_iterator getRelocationRelocatedSection(relocation_iterator Rel) const; + + // TODO: Would be useful to have an iterator based version + // of the load command interface too. + + basic_symbol_iterator symbol_begin_impl() const override; + basic_symbol_iterator symbol_end_impl() const override; + + // MachO specific. + basic_symbol_iterator getSymbolByIndex(unsigned Index) const; + + section_iterator section_begin() const override; + section_iterator section_end() const override; + + uint8_t getBytesInAddress() const override; + + StringRef getFileFormatName() const override; + unsigned getArch() const override; + Triple getArch(const char **McpuDefault, Triple *ThumbTriple) const; + + relocation_iterator section_rel_begin(unsigned Index) const; + relocation_iterator section_rel_end(unsigned Index) const; + + dice_iterator begin_dices() const; + dice_iterator end_dices() const; + + load_command_iterator begin_load_commands() const; + load_command_iterator end_load_commands() const; + iterator_range load_commands() const; + + /// For use iterating over all exported symbols. + iterator_range exports() const; + + /// For use examining a trie not in a MachOObjectFile. + static iterator_range exports(ArrayRef Trie); + + /// For use iterating over all rebase table entries. + iterator_range rebaseTable() const; + + /// For use examining rebase opcodes not in a MachOObjectFile. + static iterator_range rebaseTable(ArrayRef Opcodes, + bool is64); + + /// For use iterating over all bind table entries. + iterator_range bindTable() const; + + /// For use iterating over all lazy bind table entries. + iterator_range lazyBindTable() const; + + /// For use iterating over all lazy bind table entries. + iterator_range weakBindTable() const; + + /// For use examining bind opcodes not in a MachOObjectFile. + static iterator_range bindTable(ArrayRef Opcodes, + bool is64, + MachOBindEntry::Kind); + + + // In a MachO file, sections have a segment name. This is used in the .o + // files. They have a single segment, but this field specifies which segment + // a section should be put in in the final object. + StringRef getSectionFinalSegmentName(DataRefImpl Sec) const; + + // Names are stored as 16 bytes. These returns the raw 16 bytes without + // interpreting them as a C string. + ArrayRef getSectionRawName(DataRefImpl Sec) const; + ArrayRef getSectionRawFinalSegmentName(DataRefImpl Sec) const; + + // MachO specific Info about relocations. + bool isRelocationScattered(const MachO::any_relocation_info &RE) const; + unsigned getPlainRelocationSymbolNum( + const MachO::any_relocation_info &RE) const; + bool getPlainRelocationExternal(const MachO::any_relocation_info &RE) const; + bool getScatteredRelocationScattered( + const MachO::any_relocation_info &RE) const; + uint32_t getScatteredRelocationValue( + const MachO::any_relocation_info &RE) const; + uint32_t getScatteredRelocationType( + const MachO::any_relocation_info &RE) const; + unsigned getAnyRelocationAddress(const MachO::any_relocation_info &RE) const; + unsigned getAnyRelocationPCRel(const MachO::any_relocation_info &RE) const; + unsigned getAnyRelocationLength(const MachO::any_relocation_info &RE) const; + unsigned getAnyRelocationType(const MachO::any_relocation_info &RE) const; + SectionRef getAnyRelocationSection(const MachO::any_relocation_info &RE) const; + + // MachO specific structures. + MachO::section getSection(DataRefImpl DRI) const; + MachO::section_64 getSection64(DataRefImpl DRI) const; + MachO::section getSection(const LoadCommandInfo &L, unsigned Index) const; + MachO::section_64 getSection64(const LoadCommandInfo &L,unsigned Index) const; + MachO::nlist getSymbolTableEntry(DataRefImpl DRI) const; + MachO::nlist_64 getSymbol64TableEntry(DataRefImpl DRI) const; + + MachO::linkedit_data_command + getLinkeditDataLoadCommand(const LoadCommandInfo &L) const; + MachO::segment_command + getSegmentLoadCommand(const LoadCommandInfo &L) const; + MachO::segment_command_64 + getSegment64LoadCommand(const LoadCommandInfo &L) const; + MachO::linker_option_command + getLinkerOptionLoadCommand(const LoadCommandInfo &L) const; + MachO::version_min_command + getVersionMinLoadCommand(const LoadCommandInfo &L) const; + MachO::dylib_command + getDylibIDLoadCommand(const LoadCommandInfo &L) const; + MachO::dyld_info_command + getDyldInfoLoadCommand(const LoadCommandInfo &L) const; + MachO::dylinker_command + getDylinkerCommand(const LoadCommandInfo &L) const; + MachO::uuid_command + getUuidCommand(const LoadCommandInfo &L) const; + MachO::rpath_command + getRpathCommand(const LoadCommandInfo &L) const; + MachO::source_version_command + getSourceVersionCommand(const LoadCommandInfo &L) const; + MachO::entry_point_command + getEntryPointCommand(const LoadCommandInfo &L) const; + MachO::encryption_info_command + getEncryptionInfoCommand(const LoadCommandInfo &L) const; + MachO::encryption_info_command_64 + getEncryptionInfoCommand64(const LoadCommandInfo &L) const; + MachO::sub_framework_command + getSubFrameworkCommand(const LoadCommandInfo &L) const; + MachO::sub_umbrella_command + getSubUmbrellaCommand(const LoadCommandInfo &L) const; + MachO::sub_library_command + getSubLibraryCommand(const LoadCommandInfo &L) const; + MachO::sub_client_command + getSubClientCommand(const LoadCommandInfo &L) const; + MachO::routines_command + getRoutinesCommand(const LoadCommandInfo &L) const; + MachO::routines_command_64 + getRoutinesCommand64(const LoadCommandInfo &L) const; + MachO::thread_command + getThreadCommand(const LoadCommandInfo &L) const; + + MachO::any_relocation_info getRelocation(DataRefImpl Rel) const; + MachO::data_in_code_entry getDice(DataRefImpl Rel) const; + const MachO::mach_header &getHeader() const; + const MachO::mach_header_64 &getHeader64() const; + uint32_t + getIndirectSymbolTableEntry(const MachO::dysymtab_command &DLC, + unsigned Index) const; + MachO::data_in_code_entry getDataInCodeTableEntry(uint32_t DataOffset, + unsigned Index) const; + MachO::symtab_command getSymtabLoadCommand() const; + MachO::dysymtab_command getDysymtabLoadCommand() const; + MachO::linkedit_data_command getDataInCodeLoadCommand() const; + MachO::linkedit_data_command getLinkOptHintsLoadCommand() const; + ArrayRef getDyldInfoRebaseOpcodes() const; + ArrayRef getDyldInfoBindOpcodes() const; + ArrayRef getDyldInfoWeakBindOpcodes() const; + ArrayRef getDyldInfoLazyBindOpcodes() const; + ArrayRef getDyldInfoExportsTrie() const; + ArrayRef getUuid() const; + + StringRef getStringTableData() const; + bool is64Bit() const; + void ReadULEB128s(uint64_t Index, SmallVectorImpl &Out) const; + + static StringRef guessLibraryShortName(StringRef Name, bool &isFramework, + StringRef &Suffix); + + static Triple::ArchType getArch(uint32_t CPUType); + static Triple getArch(uint32_t CPUType, uint32_t CPUSubType, + const char **McpuDefault = nullptr); + static Triple getThumbArch(uint32_t CPUType, uint32_t CPUSubType, + const char **McpuDefault = nullptr); + static Triple getArch(uint32_t CPUType, uint32_t CPUSubType, + const char **McpuDefault, Triple *ThumbTriple); + static bool isValidArch(StringRef ArchFlag); + static Triple getHostArch(); + + bool isRelocatableObject() const override; + + bool hasPageZeroSegment() const { return HasPageZeroSegment; } + + static bool classof(const Binary *v) { + return v->isMachO(); + } + + static uint32_t + getVersionMinMajor(MachO::version_min_command &C, bool SDK) { + uint32_t VersionOrSDK = (SDK) ? C.sdk : C.version; + return (VersionOrSDK >> 16) & 0xffff; + } + + static uint32_t + getVersionMinMinor(MachO::version_min_command &C, bool SDK) { + uint32_t VersionOrSDK = (SDK) ? C.sdk : C.version; + return (VersionOrSDK >> 8) & 0xff; + } + + static uint32_t + getVersionMinUpdate(MachO::version_min_command &C, bool SDK) { + uint32_t VersionOrSDK = (SDK) ? C.sdk : C.version; + return VersionOrSDK & 0xff; + } + +private: + uint64_t getSymbolValueImpl(DataRefImpl Symb) const override; + + union { + MachO::mach_header_64 Header64; + MachO::mach_header Header; + }; + typedef SmallVector SectionList; + SectionList Sections; + typedef SmallVector LibraryList; + LibraryList Libraries; + LoadCommandList LoadCommands; + typedef SmallVector LibraryShortName; + mutable LibraryShortName LibrariesShortNames; + const char *SymtabLoadCmd; + const char *DysymtabLoadCmd; + const char *DataInCodeLoadCmd; + const char *LinkOptHintsLoadCmd; + const char *DyldInfoLoadCmd; + const char *UuidLoadCmd; + bool HasPageZeroSegment; +}; + +/// DiceRef +inline DiceRef::DiceRef(DataRefImpl DiceP, const ObjectFile *Owner) + : DicePimpl(DiceP) , OwningObject(Owner) {} + +inline bool DiceRef::operator==(const DiceRef &Other) const { + return DicePimpl == Other.DicePimpl; +} + +inline bool DiceRef::operator<(const DiceRef &Other) const { + return DicePimpl < Other.DicePimpl; +} + +inline void DiceRef::moveNext() { + const MachO::data_in_code_entry *P = + reinterpret_cast(DicePimpl.p); + DicePimpl.p = reinterpret_cast(P + 1); +} + +// Since a Mach-O data in code reference, a DiceRef, can only be created when +// the OwningObject ObjectFile is a MachOObjectFile a static_cast<> is used for +// the methods that get the values of the fields of the reference. + +inline std::error_code DiceRef::getOffset(uint32_t &Result) const { + const MachOObjectFile *MachOOF = + static_cast(OwningObject); + MachO::data_in_code_entry Dice = MachOOF->getDice(DicePimpl); + Result = Dice.offset; + return std::error_code(); +} + +inline std::error_code DiceRef::getLength(uint16_t &Result) const { + const MachOObjectFile *MachOOF = + static_cast(OwningObject); + MachO::data_in_code_entry Dice = MachOOF->getDice(DicePimpl); + Result = Dice.length; + return std::error_code(); +} + +inline std::error_code DiceRef::getKind(uint16_t &Result) const { + const MachOObjectFile *MachOOF = + static_cast(OwningObject); + MachO::data_in_code_entry Dice = MachOOF->getDice(DicePimpl); + Result = Dice.kind; + return std::error_code(); +} + +inline DataRefImpl DiceRef::getRawDataRefImpl() const { + return DicePimpl; +} + +inline const ObjectFile *DiceRef::getObjectFile() const { + return OwningObject; +} + +} +} + +#endif diff --git a/llvm/include/llvm/Object/ObjectFile.h b/llvm/include/llvm/Object/ObjectFile.h new file mode 100644 index 0000000..6083b9a --- /dev/null +++ b/llvm/include/llvm/Object/ObjectFile.h @@ -0,0 +1,458 @@ +//===- ObjectFile.h - File format independent object file -------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares a file format independent ObjectFile class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_OBJECT_OBJECTFILE_H +#define LLVM_OBJECT_OBJECTFILE_H + +#include "llvm/ADT/StringRef.h" +#include "llvm/Object/SymbolicFile.h" +#include "llvm/Support/DataTypes.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/FileSystem.h" +#include "llvm/Support/MemoryBuffer.h" +#include +#include + +namespace llvm_ks { +namespace object { + +class ObjectFile; +class COFFObjectFile; +class MachOObjectFile; + +class SymbolRef; +class symbol_iterator; +class SectionRef; +typedef content_iterator section_iterator; + +/// This is a value type class that represents a single relocation in the list +/// of relocations in the object file. +class RelocationRef { + DataRefImpl RelocationPimpl; + const ObjectFile *OwningObject; + +public: + RelocationRef() : OwningObject(nullptr) { } + + RelocationRef(DataRefImpl RelocationP, const ObjectFile *Owner); + + bool operator==(const RelocationRef &Other) const; + + void moveNext(); + + uint64_t getOffset() const; + symbol_iterator getSymbol() const; + uint64_t getType() const; + + /// @brief Get a string that represents the type of this relocation. + /// + /// This is for display purposes only. + void getTypeName(SmallVectorImpl &Result) const; + + DataRefImpl getRawDataRefImpl() const; + const ObjectFile *getObject() const; +}; +typedef content_iterator relocation_iterator; + +/// This is a value type class that represents a single section in the list of +/// sections in the object file. +class SectionRef { + friend class SymbolRef; + DataRefImpl SectionPimpl; + const ObjectFile *OwningObject; + +public: + SectionRef() : OwningObject(nullptr) { } + + SectionRef(DataRefImpl SectionP, const ObjectFile *Owner); + + bool operator==(const SectionRef &Other) const; + bool operator!=(const SectionRef &Other) const; + bool operator<(const SectionRef &Other) const; + + void moveNext(); + + std::error_code getName(StringRef &Result) const; + uint64_t getAddress() const; + uint64_t getSize() const; + std::error_code getContents(StringRef &Result) const; + + /// @brief Get the alignment of this section as the actual value (not log 2). + uint64_t getAlignment() const; + + bool isText() const; + bool isData() const; + bool isBSS() const; + bool isVirtual() const; + + bool containsSymbol(SymbolRef S) const; + + relocation_iterator relocation_begin() const; + relocation_iterator relocation_end() const; + iterator_range relocations() const { + return make_range(relocation_begin(), relocation_end()); + } + section_iterator getRelocatedSection() const; + + DataRefImpl getRawDataRefImpl() const; + const ObjectFile *getObject() const; +}; + +/// This is a value type class that represents a single symbol in the list of +/// symbols in the object file. +class SymbolRef : public BasicSymbolRef { + friend class SectionRef; + +public: + SymbolRef() : BasicSymbolRef() {} + + enum Type { + ST_Unknown, // Type not specified + ST_Data, + ST_Debug, + ST_File, + ST_Function, + ST_Other + }; + + SymbolRef(DataRefImpl SymbolP, const ObjectFile *Owner); + SymbolRef(const BasicSymbolRef &B) : BasicSymbolRef(B) { + assert(isa(BasicSymbolRef::getObject())); + } + + ErrorOr getName() const; + /// Returns the symbol virtual address (i.e. address at which it will be + /// mapped). + ErrorOr getAddress() const; + + /// Return the value of the symbol depending on the object this can be an + /// offset or a virtual address. + uint64_t getValue() const; + + /// @brief Get the alignment of this symbol as the actual value (not log 2). + uint32_t getAlignment() const; + uint64_t getCommonSize() const; + SymbolRef::Type getType() const; + + /// @brief Get section this symbol is defined in reference to. Result is + /// end_sections() if it is undefined or is an absolute symbol. + ErrorOr getSection() const; + + const ObjectFile *getObject() const; +}; + +class symbol_iterator : public basic_symbol_iterator { +public: + symbol_iterator(SymbolRef Sym) : basic_symbol_iterator(Sym) {} + symbol_iterator(const basic_symbol_iterator &B) + : basic_symbol_iterator(SymbolRef(B->getRawDataRefImpl(), + cast(B->getObject()))) {} + + const SymbolRef *operator->() const { + const BasicSymbolRef &P = basic_symbol_iterator::operator *(); + return static_cast(&P); + } + + const SymbolRef &operator*() const { + const BasicSymbolRef &P = basic_symbol_iterator::operator *(); + return static_cast(P); + } +}; + +/// This class is the base class for all object file types. Concrete instances +/// of this object are created by createObjectFile, which figures out which type +/// to create. +class ObjectFile : public SymbolicFile { + ObjectFile() = delete; + ObjectFile(const ObjectFile &other) = delete; + +protected: + ObjectFile(unsigned int Type, MemoryBufferRef Source); + + const uint8_t *base() const { + return reinterpret_cast(Data.getBufferStart()); + } + + // These functions are for SymbolRef to call internally. The main goal of + // this is to allow SymbolRef::SymbolPimpl to point directly to the symbol + // entry in the memory mapped object file. SymbolPimpl cannot contain any + // virtual functions because then it could not point into the memory mapped + // file. + // + // Implementations assume that the DataRefImpl is valid and has not been + // modified externally. It's UB otherwise. + friend class SymbolRef; + virtual ErrorOr getSymbolName(DataRefImpl Symb) const = 0; + std::error_code printSymbolName(raw_ostream &OS, + DataRefImpl Symb) const override; + virtual ErrorOr getSymbolAddress(DataRefImpl Symb) const = 0; + virtual uint64_t getSymbolValueImpl(DataRefImpl Symb) const = 0; + virtual uint32_t getSymbolAlignment(DataRefImpl Symb) const; + virtual uint64_t getCommonSymbolSizeImpl(DataRefImpl Symb) const = 0; + virtual SymbolRef::Type getSymbolType(DataRefImpl Symb) const = 0; + virtual ErrorOr + getSymbolSection(DataRefImpl Symb) const = 0; + + // Same as above for SectionRef. + friend class SectionRef; + virtual void moveSectionNext(DataRefImpl &Sec) const = 0; + virtual std::error_code getSectionName(DataRefImpl Sec, + StringRef &Res) const = 0; + virtual uint64_t getSectionAddress(DataRefImpl Sec) const = 0; + virtual uint64_t getSectionSize(DataRefImpl Sec) const = 0; + virtual std::error_code getSectionContents(DataRefImpl Sec, + StringRef &Res) const = 0; + virtual uint64_t getSectionAlignment(DataRefImpl Sec) const = 0; + virtual bool isSectionText(DataRefImpl Sec) const = 0; + virtual bool isSectionData(DataRefImpl Sec) const = 0; + virtual bool isSectionBSS(DataRefImpl Sec) const = 0; + // A section is 'virtual' if its contents aren't present in the object image. + virtual bool isSectionVirtual(DataRefImpl Sec) const = 0; + virtual relocation_iterator section_rel_begin(DataRefImpl Sec) const = 0; + virtual relocation_iterator section_rel_end(DataRefImpl Sec) const = 0; + virtual section_iterator getRelocatedSection(DataRefImpl Sec) const; + + // Same as above for RelocationRef. + friend class RelocationRef; + virtual void moveRelocationNext(DataRefImpl &Rel) const = 0; + virtual uint64_t getRelocationOffset(DataRefImpl Rel) const = 0; + virtual symbol_iterator getRelocationSymbol(DataRefImpl Rel) const = 0; + virtual uint64_t getRelocationType(DataRefImpl Rel) const = 0; + virtual void getRelocationTypeName(DataRefImpl Rel, + SmallVectorImpl &Result) const = 0; + + uint64_t getSymbolValue(DataRefImpl Symb) const; + +public: + uint64_t getCommonSymbolSize(DataRefImpl Symb) const { + assert(getSymbolFlags(Symb) & SymbolRef::SF_Common); + return getCommonSymbolSizeImpl(Symb); + } + + typedef iterator_range symbol_iterator_range; + symbol_iterator_range symbols() const { + return symbol_iterator_range(symbol_begin(), symbol_end()); + } + + virtual section_iterator section_begin() const = 0; + virtual section_iterator section_end() const = 0; + + typedef iterator_range section_iterator_range; + section_iterator_range sections() const { + return section_iterator_range(section_begin(), section_end()); + } + + /// @brief The number of bytes used to represent an address in this object + /// file format. + virtual uint8_t getBytesInAddress() const = 0; + + virtual StringRef getFileFormatName() const = 0; + virtual /* Triple::ArchType */ unsigned getArch() const = 0; + + /// Returns platform-specific object flags, if any. + virtual std::error_code getPlatformFlags(unsigned &Result) const { + Result = 0; + return object_error::invalid_file_type; + } + + /// True if this is a relocatable object (.o/.obj). + virtual bool isRelocatableObject() const = 0; + + /// @returns Pointer to ObjectFile subclass to handle this type of object. + /// @param ObjectPath The path to the object file. ObjectPath.isObject must + /// return true. + /// @brief Create ObjectFile from path. + static ErrorOr> + createObjectFile(StringRef ObjectPath); + + static ErrorOr> + createObjectFile(MemoryBufferRef Object, sys::fs::file_magic Type); + static ErrorOr> + createObjectFile(MemoryBufferRef Object) { + return createObjectFile(Object, sys::fs::file_magic::unknown); + } + + + static inline bool classof(const Binary *v) { + return v->isObject(); + } + + static ErrorOr> + createCOFFObjectFile(MemoryBufferRef Object); + + static ErrorOr> + createELFObjectFile(MemoryBufferRef Object); + + static ErrorOr> + createMachOObjectFile(MemoryBufferRef Object); +}; + +// Inline function definitions. +inline SymbolRef::SymbolRef(DataRefImpl SymbolP, const ObjectFile *Owner) + : BasicSymbolRef(SymbolP, Owner) {} + +inline ErrorOr SymbolRef::getName() const { + return getObject()->getSymbolName(getRawDataRefImpl()); +} + +inline ErrorOr SymbolRef::getAddress() const { + return getObject()->getSymbolAddress(getRawDataRefImpl()); +} + +inline uint64_t SymbolRef::getValue() const { + return getObject()->getSymbolValue(getRawDataRefImpl()); +} + +inline uint32_t SymbolRef::getAlignment() const { + return getObject()->getSymbolAlignment(getRawDataRefImpl()); +} + +inline uint64_t SymbolRef::getCommonSize() const { + return getObject()->getCommonSymbolSize(getRawDataRefImpl()); +} + +inline ErrorOr SymbolRef::getSection() const { + return getObject()->getSymbolSection(getRawDataRefImpl()); +} + +inline SymbolRef::Type SymbolRef::getType() const { + return getObject()->getSymbolType(getRawDataRefImpl()); +} + +inline const ObjectFile *SymbolRef::getObject() const { + const SymbolicFile *O = BasicSymbolRef::getObject(); + return cast(O); +} + + +/// SectionRef +inline SectionRef::SectionRef(DataRefImpl SectionP, + const ObjectFile *Owner) + : SectionPimpl(SectionP) + , OwningObject(Owner) {} + +inline bool SectionRef::operator==(const SectionRef &Other) const { + return SectionPimpl == Other.SectionPimpl; +} + +inline bool SectionRef::operator!=(const SectionRef &Other) const { + return SectionPimpl != Other.SectionPimpl; +} + +inline bool SectionRef::operator<(const SectionRef &Other) const { + return SectionPimpl < Other.SectionPimpl; +} + +inline void SectionRef::moveNext() { + return OwningObject->moveSectionNext(SectionPimpl); +} + +inline std::error_code SectionRef::getName(StringRef &Result) const { + return OwningObject->getSectionName(SectionPimpl, Result); +} + +inline uint64_t SectionRef::getAddress() const { + return OwningObject->getSectionAddress(SectionPimpl); +} + +inline uint64_t SectionRef::getSize() const { + return OwningObject->getSectionSize(SectionPimpl); +} + +inline std::error_code SectionRef::getContents(StringRef &Result) const { + return OwningObject->getSectionContents(SectionPimpl, Result); +} + +inline uint64_t SectionRef::getAlignment() const { + return OwningObject->getSectionAlignment(SectionPimpl); +} + +inline bool SectionRef::isText() const { + return OwningObject->isSectionText(SectionPimpl); +} + +inline bool SectionRef::isData() const { + return OwningObject->isSectionData(SectionPimpl); +} + +inline bool SectionRef::isBSS() const { + return OwningObject->isSectionBSS(SectionPimpl); +} + +inline bool SectionRef::isVirtual() const { + return OwningObject->isSectionVirtual(SectionPimpl); +} + +inline relocation_iterator SectionRef::relocation_begin() const { + return OwningObject->section_rel_begin(SectionPimpl); +} + +inline relocation_iterator SectionRef::relocation_end() const { + return OwningObject->section_rel_end(SectionPimpl); +} + +inline section_iterator SectionRef::getRelocatedSection() const { + return OwningObject->getRelocatedSection(SectionPimpl); +} + +inline DataRefImpl SectionRef::getRawDataRefImpl() const { + return SectionPimpl; +} + +inline const ObjectFile *SectionRef::getObject() const { + return OwningObject; +} + +/// RelocationRef +inline RelocationRef::RelocationRef(DataRefImpl RelocationP, + const ObjectFile *Owner) + : RelocationPimpl(RelocationP) + , OwningObject(Owner) {} + +inline bool RelocationRef::operator==(const RelocationRef &Other) const { + return RelocationPimpl == Other.RelocationPimpl; +} + +inline void RelocationRef::moveNext() { + return OwningObject->moveRelocationNext(RelocationPimpl); +} + +inline uint64_t RelocationRef::getOffset() const { + return OwningObject->getRelocationOffset(RelocationPimpl); +} + +inline symbol_iterator RelocationRef::getSymbol() const { + return OwningObject->getRelocationSymbol(RelocationPimpl); +} + +inline uint64_t RelocationRef::getType() const { + return OwningObject->getRelocationType(RelocationPimpl); +} + +inline void RelocationRef::getTypeName(SmallVectorImpl &Result) const { + return OwningObject->getRelocationTypeName(RelocationPimpl, Result); +} + +inline DataRefImpl RelocationRef::getRawDataRefImpl() const { + return RelocationPimpl; +} + +inline const ObjectFile *RelocationRef::getObject() const { + return OwningObject; +} + + +} // end namespace object +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/Object/SymbolicFile.h b/llvm/include/llvm/Object/SymbolicFile.h new file mode 100644 index 0000000..c21c9cb --- /dev/null +++ b/llvm/include/llvm/Object/SymbolicFile.h @@ -0,0 +1,207 @@ +//===- SymbolicFile.h - Interface that only provides symbols ----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the SymbolicFile interface. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_OBJECT_SYMBOLICFILE_H +#define LLVM_OBJECT_SYMBOLICFILE_H + +#include "llvm/Object/Binary.h" +#include "llvm/Support/Format.h" + +namespace llvm_ks { +namespace object { + +union DataRefImpl { + // This entire union should probably be a + // char[max(8, sizeof(uintptr_t))] and require the impl to cast. + struct { + uint32_t a, b; + } d; + uintptr_t p; + DataRefImpl() { std::memset(this, 0, sizeof(DataRefImpl)); } +}; + +template +OStream& operator<<(OStream &OS, const DataRefImpl &D) { + OS << "(" << format("0x%x8", D.p) << " (" << format("0x%x8", D.d.a) << ", " << format("0x%x8", D.d.b) << "))"; + return OS; +} + +inline bool operator==(const DataRefImpl &a, const DataRefImpl &b) { + // Check bitwise identical. This is the only legal way to compare a union w/o + // knowing which member is in use. + return std::memcmp(&a, &b, sizeof(DataRefImpl)) == 0; +} + +inline bool operator!=(const DataRefImpl &a, const DataRefImpl &b) { + return !operator==(a, b); +} + +inline bool operator<(const DataRefImpl &a, const DataRefImpl &b) { + // Check bitwise identical. This is the only legal way to compare a union w/o + // knowing which member is in use. + return std::memcmp(&a, &b, sizeof(DataRefImpl)) < 0; +} + +template +class content_iterator + : public std::iterator { + content_type Current; + +public: + content_iterator(content_type symb) : Current(symb) {} + + const content_type *operator->() const { return &Current; } + + const content_type &operator*() const { return Current; } + + bool operator==(const content_iterator &other) const { + return Current == other.Current; + } + + bool operator!=(const content_iterator &other) const { + return !(*this == other); + } + + content_iterator &operator++() { // preincrement + Current.moveNext(); + return *this; + } +}; + +class SymbolicFile; + +/// This is a value type class that represents a single symbol in the list of +/// symbols in the object file. +class BasicSymbolRef { + DataRefImpl SymbolPimpl; + const SymbolicFile *OwningObject; + +public: + // FIXME: should we add a SF_Text? + enum Flags : unsigned { + SF_None = 0, + SF_Undefined = 1U << 0, // Symbol is defined in another object file + SF_Global = 1U << 1, // Global symbol + SF_Weak = 1U << 2, // Weak symbol + SF_Absolute = 1U << 3, // Absolute symbol + SF_Common = 1U << 4, // Symbol has common linkage + SF_Indirect = 1U << 5, // Symbol is an alias to another symbol + SF_Exported = 1U << 6, // Symbol is visible to other DSOs + SF_FormatSpecific = 1U << 7, // Specific to the object file format + // (e.g. section symbols) + SF_Thumb = 1U << 8, // Thumb symbol in a 32-bit ARM binary + SF_Hidden = 1U << 9, // Symbol has hidden visibility + SF_Const = 1U << 10, // Symbol value is constant + }; + + BasicSymbolRef() : OwningObject(nullptr) { } + BasicSymbolRef(DataRefImpl SymbolP, const SymbolicFile *Owner); + + bool operator==(const BasicSymbolRef &Other) const; + bool operator<(const BasicSymbolRef &Other) const; + + void moveNext(); + + std::error_code printName(raw_ostream &OS) const; + + /// Get symbol flags (bitwise OR of SymbolRef::Flags) + uint32_t getFlags() const; + + DataRefImpl getRawDataRefImpl() const; + const SymbolicFile *getObject() const; +}; + +typedef content_iterator basic_symbol_iterator; + +class SymbolicFile : public Binary { +public: + ~SymbolicFile() override; + SymbolicFile(unsigned int Type, MemoryBufferRef Source); + + // virtual interface. + virtual void moveSymbolNext(DataRefImpl &Symb) const = 0; + + virtual std::error_code printSymbolName(raw_ostream &OS, + DataRefImpl Symb) const = 0; + + virtual uint32_t getSymbolFlags(DataRefImpl Symb) const = 0; + + virtual basic_symbol_iterator symbol_begin_impl() const = 0; + + virtual basic_symbol_iterator symbol_end_impl() const = 0; + + // convenience wrappers. + basic_symbol_iterator symbol_begin() const { + return symbol_begin_impl(); + } + basic_symbol_iterator symbol_end() const { + return symbol_end_impl(); + } + typedef iterator_range basic_symbol_iterator_range; + basic_symbol_iterator_range symbols() const { + return basic_symbol_iterator_range(symbol_begin(), symbol_end()); + } + + // construction aux. + static ErrorOr> + createSymbolicFile(MemoryBufferRef Object, sys::fs::file_magic Type, + LLVMContext *Context); + + static ErrorOr> + createSymbolicFile(MemoryBufferRef Object) { + return createSymbolicFile(Object, sys::fs::file_magic::unknown, nullptr); + } + static ErrorOr> + createSymbolicFile(StringRef ObjectPath); + + static inline bool classof(const Binary *v) { + return v->isSymbolic(); + } +}; + +inline BasicSymbolRef::BasicSymbolRef(DataRefImpl SymbolP, + const SymbolicFile *Owner) + : SymbolPimpl(SymbolP), OwningObject(Owner) {} + +inline bool BasicSymbolRef::operator==(const BasicSymbolRef &Other) const { + return SymbolPimpl == Other.SymbolPimpl; +} + +inline bool BasicSymbolRef::operator<(const BasicSymbolRef &Other) const { + return SymbolPimpl < Other.SymbolPimpl; +} + +inline void BasicSymbolRef::moveNext() { + return OwningObject->moveSymbolNext(SymbolPimpl); +} + +inline std::error_code BasicSymbolRef::printName(raw_ostream &OS) const { + return OwningObject->printSymbolName(OS, SymbolPimpl); +} + +inline uint32_t BasicSymbolRef::getFlags() const { + return OwningObject->getSymbolFlags(SymbolPimpl); +} + +inline DataRefImpl BasicSymbolRef::getRawDataRefImpl() const { + return SymbolPimpl; +} + +inline const SymbolicFile *BasicSymbolRef::getObject() const { + return OwningObject; +} + +} +} + +#endif diff --git a/llvm/include/llvm/Support/ARMBuildAttributes.h b/llvm/include/llvm/Support/ARMBuildAttributes.h new file mode 100644 index 0000000..d5a9b0d --- /dev/null +++ b/llvm/include/llvm/Support/ARMBuildAttributes.h @@ -0,0 +1,233 @@ +//===-- ARMBuildAttributes.h - ARM Build Attributes -------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains enumerations and support routines for ARM build attributes +// as defined in ARM ABI addenda document (ABI release 2.08). +// +// ELF for the ARM Architecture r2.09 - November 30, 2012 +// +// http://infocenter.arm.com/help/topic/com.arm.doc.ihi0044e/IHI0044E_aaelf.pdf +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_ARMBUILDATTRIBUTES_H +#define LLVM_SUPPORT_ARMBUILDATTRIBUTES_H + +namespace llvm_ks { +class StringRef; + +namespace ARMBuildAttrs { + +enum SpecialAttr { + // This is for the .cpu asm attr. It translates into one or more + // AttrType (below) entries in the .ARM.attributes section in the ELF. + SEL_CPU +}; + +enum AttrType { + // Rest correspond to ELF/.ARM.attributes + File = 1, + CPU_raw_name = 4, + CPU_name = 5, + CPU_arch = 6, + CPU_arch_profile = 7, + ARM_ISA_use = 8, + THUMB_ISA_use = 9, + FP_arch = 10, + WMMX_arch = 11, + Advanced_SIMD_arch = 12, + PCS_config = 13, + ABI_PCS_R9_use = 14, + ABI_PCS_RW_data = 15, + ABI_PCS_RO_data = 16, + ABI_PCS_GOT_use = 17, + ABI_PCS_wchar_t = 18, + ABI_FP_rounding = 19, + ABI_FP_denormal = 20, + ABI_FP_exceptions = 21, + ABI_FP_user_exceptions = 22, + ABI_FP_number_model = 23, + ABI_align_needed = 24, + ABI_align_preserved = 25, + ABI_enum_size = 26, + ABI_HardFP_use = 27, + ABI_VFP_args = 28, + ABI_WMMX_args = 29, + ABI_optimization_goals = 30, + ABI_FP_optimization_goals = 31, + compatibility = 32, + CPU_unaligned_access = 34, + FP_HP_extension = 36, + ABI_FP_16bit_format = 38, + MPextension_use = 42, // recoded from 70 (ABI r2.08) + DIV_use = 44, + DSP_extension = 46, + also_compatible_with = 65, + conformance = 67, + Virtualization_use = 68, + + /// Legacy Tags + Section = 2, // deprecated (ABI r2.09) + Symbol = 3, // deprecated (ABI r2.09) + ABI_align8_needed = 24, // renamed to ABI_align_needed (ABI r2.09) + ABI_align8_preserved = 25, // renamed to ABI_align_preserved (ABI r2.09) + nodefaults = 64, // deprecated (ABI r2.09) + T2EE_use = 66, // deprecated (ABI r2.09) + MPextension_use_old = 70 // recoded to MPextension_use (ABI r2.08) +}; + +StringRef AttrTypeAsString(unsigned Attr, bool HasTagPrefix = true); +StringRef AttrTypeAsString(AttrType Attr, bool HasTagPrefix = true); +int AttrTypeFromString(StringRef Tag); + +// Magic numbers for .ARM.attributes +enum AttrMagic { + Format_Version = 0x41 +}; + +// Legal Values for CPU_arch, (=6), uleb128 +enum CPUArch { + Pre_v4 = 0, + v4 = 1, // e.g. SA110 + v4T = 2, // e.g. ARM7TDMI + v5T = 3, // e.g. ARM9TDMI + v5TE = 4, // e.g. ARM946E_S + v5TEJ = 5, // e.g. ARM926EJ_S + v6 = 6, // e.g. ARM1136J_S + v6KZ = 7, // e.g. ARM1176JZ_S + v6T2 = 8, // e.g. ARM1156T2_S + v6K = 9, // e.g. ARM1176JZ_S + v7 = 10, // e.g. Cortex A8, Cortex M3 + v6_M = 11, // e.g. Cortex M1 + v6S_M = 12, // v6_M with the System extensions + v7E_M = 13, // v7_M with DSP extensions + v8_A = 14, // v8_A AArch32 + v8_M_Base= 16, // v8_M_Base AArch32 + v8_M_Main= 17, // v8_M_Main AArch32 +}; + +enum CPUArchProfile { // (=7), uleb128 + Not_Applicable = 0, // pre v7, or cross-profile code + ApplicationProfile = (0x41), // 'A' (e.g. for Cortex A8) + RealTimeProfile = (0x52), // 'R' (e.g. for Cortex R4) + MicroControllerProfile = (0x4D), // 'M' (e.g. for Cortex M3) + SystemProfile = (0x53) // 'S' Application or real-time profile +}; + +// The following have a lot of common use cases +enum { + Not_Allowed = 0, + Allowed = 1, + + // Tag_ARM_ISA_use (=8), uleb128 + + // Tag_THUMB_ISA_use, (=9), uleb128 + AllowThumb32 = 2, // 32-bit Thumb (implies 16-bit instructions) + AllowThumbDerived = 3, // Thumb allowed, derived from arch/profile + + // Tag_FP_arch (=10), uleb128 (formerly Tag_VFP_arch = 10) + AllowFPv2 = 2, // v2 FP ISA permitted (implies use of the v1 FP ISA) + AllowFPv3A = 3, // v3 FP ISA permitted (implies use of the v2 FP ISA) + AllowFPv3B = 4, // v3 FP ISA permitted, but only D0-D15, S0-S31 + AllowFPv4A = 5, // v4 FP ISA permitted (implies use of v3 FP ISA) + AllowFPv4B = 6, // v4 FP ISA was permitted, but only D0-D15, S0-S31 + AllowFPARMv8A = 7, // Use of the ARM v8-A FP ISA was permitted + AllowFPARMv8B = 8, // Use of the ARM v8-A FP ISA was permitted, but only + // D0-D15, S0-S31 + + // Tag_WMMX_arch, (=11), uleb128 + AllowWMMXv1 = 1, // The user permitted this entity to use WMMX v1 + AllowWMMXv2 = 2, // The user permitted this entity to use WMMX v2 + + // Tag_Advanced_SIMD_arch, (=12), uleb128 + AllowNeon = 1, // SIMDv1 was permitted + AllowNeon2 = 2, // SIMDv2 was permitted (Half-precision FP, MAC operations) + AllowNeonARMv8 = 3, // ARM v8-A SIMD was permitted + AllowNeonARMv8_1a = 4,// ARM v8.1-A SIMD was permitted (RDMA) + + // Tag_ABI_PCS_R9_use, (=14), uleb128 + R9IsGPR = 0, // R9 used as v6 (just another callee-saved register) + R9IsSB = 1, // R9 used as a global static base rgister + R9IsTLSPointer = 2, // R9 used as a thread local storage pointer + R9Reserved = 3, // R9 not used by code associated with attributed entity + + // Tag_ABI_PCS_RW_data, (=15), uleb128 + AddressRWPCRel = 1, // Address RW static data PC-relative + AddressRWSBRel = 2, // Address RW static data SB-relative + AddressRWNone = 3, // No RW static data permitted + + // Tag_ABI_PCS_RO_data, (=14), uleb128 + AddressROPCRel = 1, // Address RO static data PC-relative + AddressRONone = 2, // No RO static data permitted + + // Tag_ABI_PCS_GOT_use, (=17), uleb128 + AddressDirect = 1, // Address imported data directly + AddressGOT = 2, // Address imported data indirectly (via GOT) + + // Tag_ABI_PCS_wchar_t, (=18), uleb128 + WCharProhibited = 0, // wchar_t is not used + WCharWidth2Bytes = 2, // sizeof(wchar_t) == 2 + WCharWidth4Bytes = 4, // sizeof(wchar_t) == 4 + + // Tag_ABI_FP_denormal, (=20), uleb128 + PositiveZero = 0, + IEEEDenormals = 1, + PreserveFPSign = 2, // sign when flushed-to-zero is preserved + + // Tag_ABI_FP_number_model, (=23), uleb128 + AllowRTABI = 2, // numbers, infinities, and one quiet NaN (see [RTABI]) + AllowIEE754 = 3, // this code to use all the IEEE 754-defined FP encodings + + // Tag_ABI_enum_size, (=26), uleb128 + EnumProhibited = 0, // The user prohibited the use of enums when building + // this entity. + EnumSmallest = 1, // Enum is smallest container big enough to hold all + // values. + Enum32Bit = 2, // Enum is at least 32 bits. + Enum32BitABI = 3, // Every enumeration visible across an ABI-complying + // interface contains a value needing 32 bits to encode + // it; other enums can be containerized. + + // Tag_ABI_HardFP_use, (=27), uleb128 + HardFPImplied = 0, // FP use should be implied by Tag_FP_arch + HardFPSinglePrecision = 1, // Single-precision only + + // Tag_ABI_VFP_args, (=28), uleb128 + BaseAAPCS = 0, + HardFPAAPCS = 1, + + // Tag_FP_HP_extension, (=36), uleb128 + AllowHPFP = 1, // Allow use of Half Precision FP + + // Tag_FP_16bit_format, (=38), uleb128 + FP16FormatIEEE = 1, + + // Tag_MPextension_use, (=42), uleb128 + AllowMP = 1, // Allow use of MP extensions + + // Tag_DIV_use, (=44), uleb128 + // Note: AllowDIVExt must be emitted if and only if the permission to use + // hardware divide cannot be conveyed using AllowDIVIfExists or DisallowDIV + AllowDIVIfExists = 0, // Allow hardware divide if available in arch, or no + // info exists. + DisallowDIV = 1, // Hardware divide explicitly disallowed. + AllowDIVExt = 2, // Allow hardware divide as optional architecture + // extension above the base arch specified by + // Tag_CPU_arch and Tag_CPU_arch_profile. + + // Tag_Virtualization_use, (=68), uleb128 + AllowTZ = 1, + AllowVirtualization = 2, + AllowTZVirtualization = 3 +}; + +} // namespace ARMBuildAttrs +} // namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/Support/ARMEHABI.h b/llvm/include/llvm/Support/ARMEHABI.h new file mode 100644 index 0000000..0008c83 --- /dev/null +++ b/llvm/include/llvm/Support/ARMEHABI.h @@ -0,0 +1,134 @@ +//===--- ARMEHABI.h - ARM Exception Handling ABI ----------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the constants for the ARM unwind opcodes and exception +// handling table entry kinds. +// +// The enumerations and constants in this file reflect the ARM EHABI +// Specification as published by ARM. +// +// Exception Handling ABI for the ARM Architecture r2.09 - November 30, 2012 +// +// http://infocenter.arm.com/help/topic/com.arm.doc.ihi0038a/IHI0038A_ehabi.pdf +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_ARMEHABI_H +#define LLVM_SUPPORT_ARMEHABI_H + +namespace llvm_ks { +namespace ARM { +namespace EHABI { + /// ARM exception handling table entry kinds + enum EHTEntryKind { + EHT_GENERIC = 0x00, + EHT_COMPACT = 0x80 + }; + + enum { + /// Special entry for the function never unwind + EXIDX_CANTUNWIND = 0x1 + }; + + /// ARM-defined frame unwinding opcodes + enum UnwindOpcodes { + // Format: 00xxxxxx + // Purpose: vsp = vsp + ((x << 2) + 4) + UNWIND_OPCODE_INC_VSP = 0x00, + + // Format: 01xxxxxx + // Purpose: vsp = vsp - ((x << 2) + 4) + UNWIND_OPCODE_DEC_VSP = 0x40, + + // Format: 10000000 00000000 + // Purpose: refuse to unwind + UNWIND_OPCODE_REFUSE = 0x8000, + + // Format: 1000xxxx xxxxxxxx + // Purpose: pop r[15:12], r[11:4] + // Constraint: x != 0 + UNWIND_OPCODE_POP_REG_MASK_R4 = 0x8000, + + // Format: 1001xxxx + // Purpose: vsp = r[x] + // Constraint: x != 13 && x != 15 + UNWIND_OPCODE_SET_VSP = 0x90, + + // Format: 10100xxx + // Purpose: pop r[(4+x):4] + UNWIND_OPCODE_POP_REG_RANGE_R4 = 0xa0, + + // Format: 10101xxx + // Purpose: pop r14, r[(4+x):4] + UNWIND_OPCODE_POP_REG_RANGE_R4_R14 = 0xa8, + + // Format: 10110000 + // Purpose: finish + UNWIND_OPCODE_FINISH = 0xb0, + + // Format: 10110001 0000xxxx + // Purpose: pop r[3:0] + // Constraint: x != 0 + UNWIND_OPCODE_POP_REG_MASK = 0xb100, + + // Format: 10110010 x(uleb128) + // Purpose: vsp = vsp + ((x << 2) + 0x204) + UNWIND_OPCODE_INC_VSP_ULEB128 = 0xb2, + + // Format: 10110011 xxxxyyyy + // Purpose: pop d[(x+y):x] + UNWIND_OPCODE_POP_VFP_REG_RANGE_FSTMFDX = 0xb300, + + // Format: 10111xxx + // Purpose: pop d[(8+x):8] + UNWIND_OPCODE_POP_VFP_REG_RANGE_FSTMFDX_D8 = 0xb8, + + // Format: 11000xxx + // Purpose: pop wR[(10+x):10] + UNWIND_OPCODE_POP_WIRELESS_MMX_REG_RANGE_WR10 = 0xc0, + + // Format: 11000110 xxxxyyyy + // Purpose: pop wR[(x+y):x] + UNWIND_OPCODE_POP_WIRELESS_MMX_REG_RANGE = 0xc600, + + // Format: 11000111 0000xxxx + // Purpose: pop wCGR[3:0] + // Constraint: x != 0 + UNWIND_OPCODE_POP_WIRELESS_MMX_REG_MASK = 0xc700, + + // Format: 11001000 xxxxyyyy + // Purpose: pop d[(16+x+y):(16+x)] + UNWIND_OPCODE_POP_VFP_REG_RANGE_FSTMFDD_D16 = 0xc800, + + // Format: 11001001 xxxxyyyy + // Purpose: pop d[(x+y):x] + UNWIND_OPCODE_POP_VFP_REG_RANGE_FSTMFDD = 0xc900, + + // Format: 11010xxx + // Purpose: pop d[(8+x):8] + UNWIND_OPCODE_POP_VFP_REG_RANGE_FSTMFDD_D8 = 0xd0 + }; + + /// ARM-defined Personality Routine Index + enum PersonalityRoutineIndex { + // To make the exception handling table become more compact, ARM defined + // several personality routines in EHABI. There are 3 different + // personality routines in ARM EHABI currently. It is possible to have 16 + // pre-defined personality routines at most. + AEABI_UNWIND_CPP_PR0 = 0, + AEABI_UNWIND_CPP_PR1 = 1, + AEABI_UNWIND_CPP_PR2 = 2, + + NUM_PERSONALITY_INDEX + }; +} +} +} + +#endif diff --git a/llvm/include/llvm/Support/ARMTargetParser.def b/llvm/include/llvm/Support/ARMTargetParser.def new file mode 100644 index 0000000..6f2f86e --- /dev/null +++ b/llvm/include/llvm/Support/ARMTargetParser.def @@ -0,0 +1,229 @@ +//===- ARMTargetParser.def - ARM target parsing defines ---------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file provides defines to build up the ARM target parser's logic. +// +//===----------------------------------------------------------------------===// + +// NOTE: NO INCLUDE GUARD DESIRED! + +#ifndef ARM_FPU +#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) +#endif +ARM_FPU("invalid", FK_INVALID, FV_NONE, NS_None, FR_None) +ARM_FPU("none", FK_NONE, FV_NONE, NS_None, FR_None) +ARM_FPU("vfp", FK_VFP, FV_VFPV2, NS_None, FR_None) +ARM_FPU("vfpv2", FK_VFPV2, FV_VFPV2, NS_None, FR_None) +ARM_FPU("vfpv3", FK_VFPV3, FV_VFPV3, NS_None, FR_None) +ARM_FPU("vfpv3-fp16", FK_VFPV3_FP16, FV_VFPV3_FP16, NS_None, FR_None) +ARM_FPU("vfpv3-d16", FK_VFPV3_D16, FV_VFPV3, NS_None, FR_D16) +ARM_FPU("vfpv3-d16-fp16", FK_VFPV3_D16_FP16, FV_VFPV3_FP16, NS_None, FR_D16) +ARM_FPU("vfpv3xd", FK_VFPV3XD, FV_VFPV3, NS_None, FR_SP_D16) +ARM_FPU("vfpv3xd-fp16", FK_VFPV3XD_FP16, FV_VFPV3_FP16, NS_None, FR_SP_D16) +ARM_FPU("vfpv4", FK_VFPV4, FV_VFPV4, NS_None, FR_None) +ARM_FPU("vfpv4-d16", FK_VFPV4_D16, FV_VFPV4, NS_None, FR_D16) +ARM_FPU("fpv4-sp-d16", FK_FPV4_SP_D16, FV_VFPV4, NS_None, FR_SP_D16) +ARM_FPU("fpv5-d16", FK_FPV5_D16, FV_VFPV5, NS_None, FR_D16) +ARM_FPU("fpv5-sp-d16", FK_FPV5_SP_D16, FV_VFPV5, NS_None, FR_SP_D16) +ARM_FPU("fp-armv8", FK_FP_ARMV8, FV_VFPV5, NS_None, FR_None) +ARM_FPU("neon", FK_NEON, FV_VFPV3, NS_Neon, FR_None) +ARM_FPU("neon-fp16", FK_NEON_FP16, FV_VFPV3_FP16, NS_Neon, FR_None) +ARM_FPU("neon-vfpv4", FK_NEON_VFPV4, FV_VFPV4, NS_Neon, FR_None) +ARM_FPU("neon-fp-armv8", FK_NEON_FP_ARMV8, FV_VFPV5, NS_Neon, FR_None) +ARM_FPU("crypto-neon-fp-armv8", FK_CRYPTO_NEON_FP_ARMV8, FV_VFPV5, NS_Crypto, + FR_None) +ARM_FPU("softvfp", FK_SOFTVFP, FV_NONE, NS_None, FR_None) +#undef ARM_FPU + +#ifndef ARM_ARCH +#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) +#endif +ARM_ARCH("invalid", AK_INVALID, nullptr, nullptr, + ARMBuildAttrs::CPUArch::Pre_v4, FK_NONE, AEK_NONE) +ARM_ARCH("armv2", AK_ARMV2, "2", "v2", ARMBuildAttrs::CPUArch::Pre_v4, + FK_NONE, AEK_NONE) +ARM_ARCH("armv2a", AK_ARMV2A, "2A", "v2a", ARMBuildAttrs::CPUArch::Pre_v4, + FK_NONE, AEK_NONE) +ARM_ARCH("armv3", AK_ARMV3, "3", "v3", ARMBuildAttrs::CPUArch::Pre_v4, + FK_NONE, AEK_NONE) +ARM_ARCH("armv3m", AK_ARMV3M, "3M", "v3m", ARMBuildAttrs::CPUArch::Pre_v4, + FK_NONE, AEK_NONE) +ARM_ARCH("armv4", AK_ARMV4, "4", "v4", ARMBuildAttrs::CPUArch::v4, + FK_NONE, AEK_NONE) +ARM_ARCH("armv4t", AK_ARMV4T, "4T", "v4t", ARMBuildAttrs::CPUArch::v4T, + FK_NONE, AEK_NONE) +ARM_ARCH("armv5t", AK_ARMV5T, "5T", "v5", ARMBuildAttrs::CPUArch::v5T, + FK_NONE, AEK_NONE) +ARM_ARCH("armv5te", AK_ARMV5TE, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE, + FK_NONE, AEK_DSP) +ARM_ARCH("armv5tej", AK_ARMV5TEJ, "5TEJ", "v5e", ARMBuildAttrs::CPUArch::v5TEJ, + FK_NONE, AEK_DSP) +ARM_ARCH("armv6", AK_ARMV6, "6", "v6", ARMBuildAttrs::CPUArch::v6, + FK_VFPV2, AEK_DSP) +ARM_ARCH("armv6k", AK_ARMV6K, "6K", "v6k", ARMBuildAttrs::CPUArch::v6K, + FK_VFPV2, AEK_DSP) +ARM_ARCH("armv6t2", AK_ARMV6T2, "6T2", "v6t2", ARMBuildAttrs::CPUArch::v6T2, + FK_NONE, AEK_DSP) +ARM_ARCH("armv6kz", AK_ARMV6KZ, "6KZ", "v6kz", ARMBuildAttrs::CPUArch::v6KZ, + FK_VFPV2, (AEK_SEC | AEK_DSP)) +ARM_ARCH("armv6-m", AK_ARMV6M, "6-M", "v6m", ARMBuildAttrs::CPUArch::v6_M, + FK_NONE, AEK_NONE) +ARM_ARCH("armv7-a", AK_ARMV7A, "7-A", "v7", ARMBuildAttrs::CPUArch::v7, + FK_NEON, AEK_DSP) +ARM_ARCH("armv7-r", AK_ARMV7R, "7-R", "v7r", ARMBuildAttrs::CPUArch::v7, + FK_NONE, (AEK_HWDIV | AEK_DSP)) +ARM_ARCH("armv7-m", AK_ARMV7M, "7-M", "v7m", ARMBuildAttrs::CPUArch::v7, + FK_NONE, AEK_HWDIV) +ARM_ARCH("armv7e-m", AK_ARMV7EM, "7E-M", "v7em", ARMBuildAttrs::CPUArch::v7E_M, + FK_NONE, (AEK_HWDIV | AEK_DSP)) +ARM_ARCH("armv8-a", AK_ARMV8A, "8-A", "v8", ARMBuildAttrs::CPUArch::v8_A, + FK_CRYPTO_NEON_FP_ARMV8, (AEK_SEC | AEK_MP | AEK_VIRT | AEK_HWDIVARM | + AEK_HWDIV | AEK_DSP | AEK_CRC)) +ARM_ARCH("armv8.1-a", AK_ARMV8_1A, "8.1-A", "v8.1a", ARMBuildAttrs::CPUArch::v8_A, + FK_CRYPTO_NEON_FP_ARMV8, (AEK_SEC | AEK_MP | AEK_VIRT | AEK_HWDIVARM | + AEK_HWDIV | AEK_DSP | AEK_CRC)) +ARM_ARCH("armv8.2-a", AK_ARMV8_2A, "8.2-A", "v8.2a", ARMBuildAttrs::CPUArch::v8_A, + FK_CRYPTO_NEON_FP_ARMV8, (AEK_SEC | AEK_MP | AEK_VIRT | AEK_HWDIVARM | + AEK_HWDIV | AEK_DSP | AEK_CRC)) +ARM_ARCH("armv8-m.base", AK_ARMV8MBaseline, "8-M.Baseline", "v8m.base", + ARMBuildAttrs::CPUArch::v8_M_Base, FK_NONE, AEK_HWDIV) +ARM_ARCH("armv8-m.main", AK_ARMV8MMainline, "8-M.Mainline", "v8m.main", + ARMBuildAttrs::CPUArch::v8_M_Main, FK_FPV5_D16, AEK_HWDIV) +// Non-standard Arch names. +ARM_ARCH("iwmmxt", AK_IWMMXT, "iwmmxt", "", ARMBuildAttrs::CPUArch::v5TE, + FK_NONE, AEK_NONE) +ARM_ARCH("iwmmxt2", AK_IWMMXT2, "iwmmxt2", "", ARMBuildAttrs::CPUArch::v5TE, + FK_NONE, AEK_NONE) +ARM_ARCH("xscale", AK_XSCALE, "xscale", "v5e", ARMBuildAttrs::CPUArch::v5TE, + FK_NONE, AEK_NONE) +ARM_ARCH("armv7s", AK_ARMV7S, "7-S", "v7s", ARMBuildAttrs::CPUArch::v7, + FK_NEON_VFPV4, AEK_DSP) +ARM_ARCH("armv7k", AK_ARMV7K, "7-K", "v7k", ARMBuildAttrs::CPUArch::v7, + FK_NONE, AEK_DSP) +#undef ARM_ARCH + +#ifndef ARM_ARCH_EXT_NAME +#define ARM_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE) +#endif +// FIXME: This would be nicer were it tablegen +ARM_ARCH_EXT_NAME("invalid", AEK_INVALID, nullptr, nullptr) +ARM_ARCH_EXT_NAME("none", AEK_NONE, nullptr, nullptr) +ARM_ARCH_EXT_NAME("crc", AEK_CRC, "+crc", "-crc") +ARM_ARCH_EXT_NAME("crypto", AEK_CRYPTO, "+crypto","-crypto") +ARM_ARCH_EXT_NAME("dsp", AEK_DSP, "+dsp", "-dsp") +ARM_ARCH_EXT_NAME("fp", AEK_FP, nullptr, nullptr) +ARM_ARCH_EXT_NAME("idiv", (AEK_HWDIVARM | AEK_HWDIV), nullptr, nullptr) +ARM_ARCH_EXT_NAME("mp", AEK_MP, nullptr, nullptr) +ARM_ARCH_EXT_NAME("simd", AEK_SIMD, nullptr, nullptr) +ARM_ARCH_EXT_NAME("sec", AEK_SEC, nullptr, nullptr) +ARM_ARCH_EXT_NAME("virt", AEK_VIRT, nullptr, nullptr) +ARM_ARCH_EXT_NAME("fp16", AEK_FP16, "+fullfp16", "-fullfp16") +ARM_ARCH_EXT_NAME("os", AEK_OS, nullptr, nullptr) +ARM_ARCH_EXT_NAME("iwmmxt", AEK_IWMMXT, nullptr, nullptr) +ARM_ARCH_EXT_NAME("iwmmxt2", AEK_IWMMXT2, nullptr, nullptr) +ARM_ARCH_EXT_NAME("maverick", AEK_MAVERICK, nullptr, nullptr) +ARM_ARCH_EXT_NAME("xscale", AEK_XSCALE, nullptr, nullptr) +#undef ARM_ARCH_EXT_NAME + +#ifndef ARM_HW_DIV_NAME +#define ARM_HW_DIV_NAME(NAME, ID) +#endif +ARM_HW_DIV_NAME("invalid", AEK_INVALID) +ARM_HW_DIV_NAME("none", AEK_NONE) +ARM_HW_DIV_NAME("thumb", AEK_HWDIV) +ARM_HW_DIV_NAME("arm", AEK_HWDIVARM) +ARM_HW_DIV_NAME("arm,thumb", (AEK_HWDIVARM | AEK_HWDIV)) +#undef ARM_HW_DIV_NAME + +#ifndef ARM_CPU_NAME +#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) +#endif +ARM_CPU_NAME("arm2", AK_ARMV2, FK_NONE, true, AEK_NONE) +ARM_CPU_NAME("arm3", AK_ARMV2A, FK_NONE, true, AEK_NONE) +ARM_CPU_NAME("arm6", AK_ARMV3, FK_NONE, true, AEK_NONE) +ARM_CPU_NAME("arm7m", AK_ARMV3M, FK_NONE, true, AEK_NONE) +ARM_CPU_NAME("arm8", AK_ARMV4, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("arm810", AK_ARMV4, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("strongarm", AK_ARMV4, FK_NONE, true, AEK_NONE) +ARM_CPU_NAME("strongarm110", AK_ARMV4, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("strongarm1100", AK_ARMV4, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("strongarm1110", AK_ARMV4, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("arm7tdmi", AK_ARMV4T, FK_NONE, true, AEK_NONE) +ARM_CPU_NAME("arm7tdmi-s", AK_ARMV4T, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("arm710t", AK_ARMV4T, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("arm720t", AK_ARMV4T, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("arm9", AK_ARMV4T, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("arm9tdmi", AK_ARMV4T, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("arm920", AK_ARMV4T, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("arm920t", AK_ARMV4T, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("arm922t", AK_ARMV4T, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("arm9312", AK_ARMV4T, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("arm940t", AK_ARMV4T, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("ep9312", AK_ARMV4T, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("arm10tdmi", AK_ARMV5T, FK_NONE, true, AEK_NONE) +ARM_CPU_NAME("arm1020t", AK_ARMV5T, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("arm9e", AK_ARMV5TE, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("arm946e-s", AK_ARMV5TE, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("arm966e-s", AK_ARMV5TE, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("arm968e-s", AK_ARMV5TE, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("arm10e", AK_ARMV5TE, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("arm1020e", AK_ARMV5TE, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("arm1022e", AK_ARMV5TE, FK_NONE, true, AEK_NONE) +ARM_CPU_NAME("arm926ej-s", AK_ARMV5TEJ, FK_NONE, true, AEK_NONE) +ARM_CPU_NAME("arm1136j-s", AK_ARMV6, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("arm1136jf-s", AK_ARMV6, FK_VFPV2, true, AEK_NONE) +ARM_CPU_NAME("arm1136jz-s", AK_ARMV6, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("arm1176j-s", AK_ARMV6K, FK_NONE, true, AEK_NONE) +ARM_CPU_NAME("arm1176jz-s", AK_ARMV6KZ, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("mpcore", AK_ARMV6K, FK_VFPV2, false, AEK_NONE) +ARM_CPU_NAME("mpcorenovfp", AK_ARMV6K, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("arm1176jzf-s", AK_ARMV6KZ, FK_VFPV2, true, AEK_NONE) +ARM_CPU_NAME("arm1156t2-s", AK_ARMV6T2, FK_NONE, true, AEK_NONE) +ARM_CPU_NAME("arm1156t2f-s", AK_ARMV6T2, FK_VFPV2, false, AEK_NONE) +ARM_CPU_NAME("cortex-m0", AK_ARMV6M, FK_NONE, true, AEK_NONE) +ARM_CPU_NAME("cortex-m0plus", AK_ARMV6M, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("cortex-m1", AK_ARMV6M, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("sc000", AK_ARMV6M, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("cortex-a5", AK_ARMV7A, FK_NEON_VFPV4, false, (AEK_SEC | AEK_MP)) +ARM_CPU_NAME("cortex-a7", AK_ARMV7A, FK_NEON_VFPV4, false, + (AEK_SEC | AEK_MP | AEK_VIRT | AEK_HWDIVARM | AEK_HWDIV)) +ARM_CPU_NAME("cortex-a8", AK_ARMV7A, FK_NEON, true, AEK_SEC) +ARM_CPU_NAME("cortex-a9", AK_ARMV7A, FK_NEON_FP16, false, (AEK_SEC | AEK_MP)) +ARM_CPU_NAME("cortex-a12", AK_ARMV7A, FK_NEON_VFPV4, false, + (AEK_SEC | AEK_MP | AEK_VIRT | AEK_HWDIVARM | AEK_HWDIV)) +ARM_CPU_NAME("cortex-a15", AK_ARMV7A, FK_NEON_VFPV4, false, + (AEK_SEC | AEK_MP | AEK_VIRT | AEK_HWDIVARM | AEK_HWDIV)) +ARM_CPU_NAME("cortex-a17", AK_ARMV7A, FK_NEON_VFPV4, false, + (AEK_SEC | AEK_MP | AEK_VIRT | AEK_HWDIVARM | AEK_HWDIV)) +ARM_CPU_NAME("krait", AK_ARMV7A, FK_NEON_VFPV4, false, + (AEK_HWDIVARM | AEK_HWDIV)) +ARM_CPU_NAME("cortex-r4", AK_ARMV7R, FK_NONE, true, AEK_NONE) +ARM_CPU_NAME("cortex-r4f", AK_ARMV7R, FK_VFPV3_D16, false, AEK_NONE) +ARM_CPU_NAME("cortex-r5", AK_ARMV7R, FK_VFPV3_D16, false, + (AEK_MP | AEK_HWDIVARM)) +ARM_CPU_NAME("cortex-r7", AK_ARMV7R, FK_VFPV3_D16_FP16, false, + (AEK_MP | AEK_HWDIVARM)) +ARM_CPU_NAME("sc300", AK_ARMV7M, FK_NONE, false, AEK_NONE) +ARM_CPU_NAME("cortex-m3", AK_ARMV7M, FK_NONE, true, AEK_NONE) +ARM_CPU_NAME("cortex-m4", AK_ARMV7EM, FK_FPV4_SP_D16, true, AEK_NONE) +ARM_CPU_NAME("cortex-m7", AK_ARMV7EM, FK_FPV5_D16, false, AEK_NONE) +ARM_CPU_NAME("cortex-a35", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, AEK_CRC) +ARM_CPU_NAME("cortex-a53", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, true, AEK_CRC) +ARM_CPU_NAME("cortex-a57", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, AEK_CRC) +ARM_CPU_NAME("cortex-a72", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, AEK_CRC) +ARM_CPU_NAME("cyclone", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, AEK_CRC) +ARM_CPU_NAME("exynos-m1", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, AEK_CRC) +// Non-standard Arch names. +ARM_CPU_NAME("iwmmxt", AK_IWMMXT, FK_NONE, true, AEK_NONE) +ARM_CPU_NAME("xscale", AK_XSCALE, FK_NONE, true, AEK_NONE) +ARM_CPU_NAME("swift", AK_ARMV7S, FK_NEON_VFPV4, true, + (AEK_HWDIVARM | AEK_HWDIV)) +// Invalid CPU +ARM_CPU_NAME("invalid", AK_INVALID, FK_INVALID, true, AEK_INVALID) +#undef ARM_CPU_NAME diff --git a/llvm/include/llvm/Support/ARMWinEH.h b/llvm/include/llvm/Support/ARMWinEH.h new file mode 100644 index 0000000..16fe6cf --- /dev/null +++ b/llvm/include/llvm/Support/ARMWinEH.h @@ -0,0 +1,382 @@ +//===-- llvm/Support/WinARMEH.h - Windows on ARM EH Constants ---*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_ARMWINEH_H +#define LLVM_SUPPORT_ARMWINEH_H + +#include "llvm/ADT/ArrayRef.h" +#include "llvm/Support/Endian.h" + +namespace llvm_ks { +namespace ARM { +namespace WinEH { +enum class RuntimeFunctionFlag { + RFF_Unpacked, /// unpacked entry + RFF_Packed, /// packed entry + RFF_PackedFragment, /// packed entry representing a fragment + RFF_Reserved, /// reserved +}; + +enum class ReturnType { + RT_POP, /// return via pop {pc} (L flag must be set) + RT_B, /// 16-bit branch + RT_BW, /// 32-bit branch + RT_NoEpilogue, /// no epilogue (fragment) +}; + +/// RuntimeFunction - An entry in the table of procedure data (.pdata) +/// +/// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 +/// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +/// +---------------------------------------------------------------+ +/// | Function Start RVA | +/// +-------------------+-+-+-+-----+-+---+---------------------+---+ +/// | Stack Adjust |C|L|R| Reg |H|Ret| Function Length |Flg| +/// +-------------------+-+-+-+-----+-+---+---------------------+---+ +/// +/// Flag : 2-bit field with the following meanings: +/// - 00 = packed unwind data not used; reamining bits point to .xdata record +/// - 01 = packed unwind data +/// - 10 = packed unwind data, function assumed to have no prologue; useful +/// for function fragments that are discontiguous with the start of the +/// function +/// - 11 = reserved +/// Function Length : 11-bit field providing the length of the entire function +/// in bytes, divided by 2; if the function is greater than +/// 4KB, a full .xdata record must be used instead +/// Ret : 2-bit field indicating how the function returns +/// - 00 = return via pop {pc} (the L bit must be set) +/// - 01 = return via 16-bit branch +/// - 10 = return via 32-bit branch +/// - 11 = no epilogue; useful for function fragments that may only contain a +/// prologue but the epilogue is elsewhere +/// H : 1-bit flag indicating whether the function "homes" the integer parameter +/// registers (r0-r3), allocating 16-bytes on the stack +/// Reg : 3-bit field indicating the index of the last saved non-volatile +/// register. If the R bit is set to 0, then only integer registers are +/// saved (r4-rN, where N is 4 + Reg). If the R bit is set to 1, then +/// only floating-point registers are being saved (d8-dN, where N is +/// 8 + Reg). The special case of the R bit being set to 1 and Reg equal +/// to 7 indicates that no registers are saved. +/// R : 1-bit flag indicating whether the non-volatile registers are integer or +/// floating-point. 0 indicates integer, 1 indicates floating-point. The +/// special case of the R-flag being set and Reg being set to 7 indicates +/// that no non-volatile registers are saved. +/// L : 1-bit flag indicating whether the function saves/restores the link +/// register (LR) +/// C : 1-bit flag indicating whether the function includes extra instructions +/// to setup a frame chain for fast walking. If this flag is set, r11 is +/// implicitly added to the list of saved non-volatile integer registers. +/// Stack Adjust : 10-bit field indicating the number of bytes of stack that are +/// allocated for this function. Only values between 0x000 and +/// 0x3f3 can be directly encoded. If the value is 0x3f4 or +/// greater, then the low 4 bits have special meaning as follows: +/// - Bit 0-1 +/// indicate the number of words' of adjustment (1-4), minus 1 +/// - Bit 2 +/// indicates if the prologue combined adjustment into push +/// - Bit 3 +/// indicates if the epilogue combined adjustment into pop +/// +/// RESTRICTIONS: +/// - IF C is SET: +/// + L flag must be set since frame chaining requires r11 and lr +/// + r11 must NOT be included in the set of registers described by Reg +/// - IF Ret is 0: +/// + L flag must be set + +// NOTE: RuntimeFunction is meant to be a simple class that provides raw access +// to all fields in the structure. The accessor methods reflect the names of +// the bitfields that they correspond to. Although some obvious simplifications +// are possible via merging of methods, it would prevent the use of this class +// to fully inspect the contents of the data structure which is particularly +// useful for scenarios such as llvm-readobj to aid in testing. + +class RuntimeFunction { +public: + const support::ulittle32_t BeginAddress; + const support::ulittle32_t UnwindData; + + RuntimeFunction(const support::ulittle32_t *Data) + : BeginAddress(Data[0]), UnwindData(Data[1]) {} + + RuntimeFunction(const support::ulittle32_t BeginAddress, + const support::ulittle32_t UnwindData) + : BeginAddress(BeginAddress), UnwindData(UnwindData) {} + + RuntimeFunctionFlag Flag() const { + return RuntimeFunctionFlag(UnwindData & 0x3); + } + + uint32_t ExceptionInformationRVA() const { + assert(Flag() == RuntimeFunctionFlag::RFF_Unpacked && + "unpacked form required for this operation"); + return (UnwindData & ~0x3); + } + + uint32_t PackedUnwindData() const { + assert((Flag() == RuntimeFunctionFlag::RFF_Packed || + Flag() == RuntimeFunctionFlag::RFF_PackedFragment) && + "packed form required for this operation"); + return (UnwindData & ~0x3); + } + uint32_t FunctionLength() const { + assert((Flag() == RuntimeFunctionFlag::RFF_Packed || + Flag() == RuntimeFunctionFlag::RFF_PackedFragment) && + "packed form required for this operation"); + return (((UnwindData & 0x00001ffc) >> 2) << 1); + } + ReturnType Ret() const { + assert((Flag() == RuntimeFunctionFlag::RFF_Packed || + Flag() == RuntimeFunctionFlag::RFF_PackedFragment) && + "packed form required for this operation"); + assert(((UnwindData & 0x00006000) || L()) && "L must be set to 1"); + return ReturnType((UnwindData & 0x00006000) >> 13); + } + bool H() const { + assert((Flag() == RuntimeFunctionFlag::RFF_Packed || + Flag() == RuntimeFunctionFlag::RFF_PackedFragment) && + "packed form required for this operation"); + return ((UnwindData & 0x00008000) >> 15); + } + uint8_t Reg() const { + assert((Flag() == RuntimeFunctionFlag::RFF_Packed || + Flag() == RuntimeFunctionFlag::RFF_PackedFragment) && + "packed form required for this operation"); + return ((UnwindData & 0x00070000) >> 16); + } + bool R() const { + assert((Flag() == RuntimeFunctionFlag::RFF_Packed || + Flag() == RuntimeFunctionFlag::RFF_PackedFragment) && + "packed form required for this operation"); + return ((UnwindData & 0x00080000) >> 19); + } + bool L() const { + assert((Flag() == RuntimeFunctionFlag::RFF_Packed || + Flag() == RuntimeFunctionFlag::RFF_PackedFragment) && + "packed form required for this operation"); + return ((UnwindData & 0x00100000) >> 20); + } + bool C() const { + assert((Flag() == RuntimeFunctionFlag::RFF_Packed || + Flag() == RuntimeFunctionFlag::RFF_PackedFragment) && + "packed form required for this operation"); + assert(((~UnwindData & 0x00200000) || L()) && + "L flag must be set, chaining requires r11 and LR"); + assert(((~UnwindData & 0x00200000) || (Reg() < 7) || R()) && + "r11 must not be included in Reg; C implies r11"); + return ((UnwindData & 0x00200000) >> 21); + } + uint16_t StackAdjust() const { + assert((Flag() == RuntimeFunctionFlag::RFF_Packed || + Flag() == RuntimeFunctionFlag::RFF_PackedFragment) && + "packed form required for this operation"); + return ((UnwindData & 0xffc00000) >> 22); + } +}; + +/// PrologueFolding - pseudo-flag derived from Stack Adjust indicating that the +/// prologue has stack adjustment combined into the push +inline bool PrologueFolding(const RuntimeFunction &RF) { + return RF.StackAdjust() >= 0x3f4 && (RF.StackAdjust() & 0x4); +} +/// Epilogue - pseudo-flag derived from Stack Adjust indicating that the +/// epilogue has stack adjustment combined into the pop +inline bool EpilogueFolding(const RuntimeFunction &RF) { + return RF.StackAdjust() >= 0x3f4 && (RF.StackAdjust() & 0x8); +} +/// StackAdjustment - calculated stack adjustment in words. The stack +/// adjustment should be determined via this function to account for the special +/// handling the special encoding when the value is >= 0x3f4. +inline uint16_t StackAdjustment(const RuntimeFunction &RF) { + uint16_t Adjustment = RF.StackAdjust(); + if (Adjustment >= 0x3f4) + return (Adjustment & 0x3) ? ((Adjustment & 0x3) << 2) - 1 : 0; + return Adjustment; +} + +/// SavedRegisterMask - Utility function to calculate the set of saved general +/// purpose (r0-r15) and VFP (d0-d31) registers. +std::pair SavedRegisterMask(const RuntimeFunction &RF); + +/// ExceptionDataRecord - An entry in the table of exception data (.xdata) +/// +/// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 +/// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +/// +-------+---------+-+-+-+---+-----------------------------------+ +/// | C Wrd | Epi Cnt |F|E|X|Ver| Function Length | +/// +-------+--------+'-'-'-'---'---+-------------------------------+ +/// | Reserved |Ex. Code Words| (Extended Epilogue Count) | +/// +-------+--------+--------------+-------------------------------+ +/// +/// Function Length : 18-bit field indicating the total length of the function +/// in bytes divided by 2. If a function is larger than +/// 512KB, then multiple pdata and xdata records must be used. +/// Vers : 2-bit field describing the version of the remaining structure. Only +/// version 0 is currently defined (values 1-3 are not permitted). +/// X : 1-bit field indicating the presence of exception data +/// E : 1-bit field indicating that the single epilogue is packed into the +/// header +/// F : 1-bit field indicating that the record describes a function fragment +/// (implies that no prologue is present, and prologue processing should be +/// skipped) +/// Epilogue Count : 5-bit field that differs in meaning based on the E field. +/// +/// If E is set, then this field specifies the index of the +/// first unwind code describing the (only) epilogue. +/// +/// Otherwise, this field indicates the number of exception +/// scopes. If more than 31 scopes exist, then this field and +/// the Code Words field must both be set to 0 to indicate that +/// an extension word is required. +/// Code Words : 4-bit field that species the number of 32-bit words needed to +/// contain all the unwind codes. If more than 15 words (63 code +/// bytes) are required, then this field and the Epilogue Count +/// field must both be set to 0 to indicate that an extension word +/// is required. +/// Extended Epilogue Count, Extended Code Words : +/// Valid only if Epilog Count and Code Words are both +/// set to 0. Provides an 8-bit extended code word +/// count and 16-bits for epilogue count +/// +/// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 +/// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +/// +----------------+------+---+---+-------------------------------+ +/// | Ep Start Idx | Cond |Res| Epilogue Start Offset | +/// +----------------+------+---+-----------------------------------+ +/// +/// If the E bit is unset in the header, the header is followed by a series of +/// epilogue scopes, which are sorted by their offset. +/// +/// Epilogue Start Offset: 18-bit field encoding the offset of epilogue relative +/// to the start of the function in bytes divided by two +/// Res : 2-bit field reserved for future expansion (must be set to 0) +/// Condition : 4-bit field providing the condition under which the epilogue is +/// executed. Unconditional epilogues should set this field to 0xe. +/// Epilogues must be entirely conditional or unconditional, and in +/// Thumb-2 mode. The epilogue beings with the first instruction +/// after the IT opcode. +/// Epilogue Start Index : 8-bit field indicating the byte index of the first +/// unwind code describing the epilogue +/// +/// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 +/// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +/// +---------------+---------------+---------------+---------------+ +/// | Unwind Code 3 | Unwind Code 2 | Unwind Code 1 | Unwind Code 0 | +/// +---------------+---------------+---------------+---------------+ +/// +/// Following the epilogue scopes, the byte code describing the unwinding +/// follows. This is padded to align up to word alignment. Bytes are stored in +/// little endian. +/// +/// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 +/// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +/// +---------------------------------------------------------------+ +/// | Exception Handler RVA (requires X = 1) | +/// +---------------------------------------------------------------+ +/// | (possibly followed by data required for exception handler) | +/// +---------------------------------------------------------------+ +/// +/// If the X bit is set in the header, the unwind byte code is followed by the +/// exception handler information. This constants of one Exception Handler RVA +/// which is the address to the exception handler, followed immediately by the +/// variable length data associated with the exception handler. +/// + +struct EpilogueScope { + const support::ulittle32_t ES; + + EpilogueScope(const support::ulittle32_t Data) : ES(Data) {} + uint32_t EpilogueStartOffset() const { + return (ES & 0x0003ffff); + } + uint8_t Res() const { + return ((ES & 0x000c0000) >> 18); + } + uint8_t Condition() const { + return ((ES & 0x00f00000) >> 20); + } + uint8_t EpilogueStartIndex() const { + return ((ES & 0xff000000) >> 24); + } +}; + +struct ExceptionDataRecord; +inline size_t HeaderWords(const ExceptionDataRecord &XR); + +struct ExceptionDataRecord { + const support::ulittle32_t *Data; + + ExceptionDataRecord(const support::ulittle32_t *Data) : Data(Data) {} + + uint32_t FunctionLength() const { + return (Data[0] & 0x0003ffff); + } + + uint8_t Vers() const { + return (Data[0] & 0x000C0000) >> 18; + } + + bool X() const { + return ((Data[0] & 0x00100000) >> 20); + } + + bool E() const { + return ((Data[0] & 0x00200000) >> 21); + } + + bool F() const { + return ((Data[0] & 0x00400000) >> 22); + } + + uint8_t EpilogueCount() const { + if (HeaderWords(*this) == 1) + return (Data[0] & 0x0f800000) >> 23; + return Data[1] & 0x0000ffff; + } + + uint8_t CodeWords() const { + if (HeaderWords(*this) == 1) + return (Data[0] & 0xf0000000) >> 28; + return (Data[1] & 0x00ff0000) >> 16; + } + + ArrayRef EpilogueScopes() const { + assert(E() == 0 && "epilogue scopes are only present when the E bit is 0"); + size_t Offset = HeaderWords(*this); + return makeArrayRef(&Data[Offset], EpilogueCount()); + } + + ArrayRef UnwindByteCode() const { + const size_t Offset = HeaderWords(*this) + + (E() ? 0 : EpilogueCount()); + const uint8_t *ByteCode = + reinterpret_cast(&Data[Offset]); + return makeArrayRef(ByteCode, CodeWords() * sizeof(uint32_t)); + } + + uint32_t ExceptionHandlerRVA() const { + assert(X() && "Exception Handler RVA is only valid if the X bit is set"); + return Data[HeaderWords(*this) + EpilogueCount() + CodeWords()]; + } + + uint32_t ExceptionHandlerParameter() const { + assert(X() && "Exception Handler RVA is only valid if the X bit is set"); + return Data[HeaderWords(*this) + EpilogueCount() + CodeWords() + 1]; + } +}; + +inline size_t HeaderWords(const ExceptionDataRecord &XR) { + return (XR.Data[0] & 0xff800000) ? 1 : 2; +} +} +} +} + +#endif diff --git a/llvm/include/llvm/Support/AlignOf.h b/llvm/include/llvm/Support/AlignOf.h new file mode 100644 index 0000000..a909056 --- /dev/null +++ b/llvm/include/llvm/Support/AlignOf.h @@ -0,0 +1,259 @@ +//===--- AlignOf.h - Portable calculation of type alignment -----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the AlignOf function that computes alignments for +// arbitrary types. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_ALIGNOF_H +#define LLVM_SUPPORT_ALIGNOF_H + +#include "llvm/Support/Compiler.h" +#include +#include + +namespace llvm_ks { + +namespace detail { + +// For everything other than an abstract class we can calulate alignment by +// building a class with a single character and a member of the given type. +template ::value> +struct AlignmentCalcImpl { + char x; +#if defined(_MSC_VER) +// Disables "structure was padded due to __declspec(align())" warnings that are +// generated by any class using AlignOf with a manually specified alignment. +// Although the warning is disabled in the LLVM project we need this pragma +// as AlignOf.h is a published support header that's available for use +// out-of-tree, and we would like that to compile cleanly at /W4. +#pragma warning(suppress : 4324) +#endif + T t; +private: + AlignmentCalcImpl() = delete; +}; + +// Abstract base class helper, this will have the minimal alignment and size +// for any abstract class. We don't even define its destructor because this +// type should never be used in a way that requires it. +struct AlignmentCalcImplBase { + virtual ~AlignmentCalcImplBase() = 0; +}; + +// When we have an abstract class type, specialize the alignment computation +// engine to create another abstract class that derives from both an empty +// abstract base class and the provided type. This has the same effect as the +// above except that it handles the fact that we can't actually create a member +// of type T. +template +struct AlignmentCalcImpl : AlignmentCalcImplBase, T { + ~AlignmentCalcImpl() override = 0; +}; + +} // End detail namespace. + +/// AlignOf - A templated class that contains an enum value representing +/// the alignment of the template argument. For example, +/// AlignOf::Alignment represents the alignment of type "int". The +/// alignment calculated is the minimum alignment, and not necessarily +/// the "desired" alignment returned by GCC's __alignof__ (for example). Note +/// that because the alignment is an enum value, it can be used as a +/// compile-time constant (e.g., for template instantiation). +template +struct AlignOf { +#ifndef _MSC_VER + // Avoid warnings from GCC like: + // comparison between 'enum llvm_ks::AlignOf::' and 'enum + // llvm_ks::AlignOf::' [-Wenum-compare] + // by using constexpr instead of enum. + // (except on MSVC, since it doesn't support constexpr yet). + static constexpr unsigned Alignment = static_cast( + sizeof(detail::AlignmentCalcImpl) - sizeof(T)); +#else + enum { + Alignment = static_cast( + sizeof(::llvm_ks::detail::AlignmentCalcImpl) - sizeof(T)) + }; +#endif + enum { Alignment_GreaterEqual_2Bytes = Alignment >= 2 ? 1 : 0 }; + enum { Alignment_GreaterEqual_4Bytes = Alignment >= 4 ? 1 : 0 }; + enum { Alignment_GreaterEqual_8Bytes = Alignment >= 8 ? 1 : 0 }; + enum { Alignment_GreaterEqual_16Bytes = Alignment >= 16 ? 1 : 0 }; + + enum { Alignment_LessEqual_2Bytes = Alignment <= 2 ? 1 : 0 }; + enum { Alignment_LessEqual_4Bytes = Alignment <= 4 ? 1 : 0 }; + enum { Alignment_LessEqual_8Bytes = Alignment <= 8 ? 1 : 0 }; + enum { Alignment_LessEqual_16Bytes = Alignment <= 16 ? 1 : 0 }; +}; + +#ifndef _MSC_VER +template constexpr unsigned AlignOf::Alignment; +#endif + +/// alignOf - A templated function that returns the minimum alignment of +/// of a type. This provides no extra functionality beyond the AlignOf +/// class besides some cosmetic cleanliness. Example usage: +/// alignOf() returns the alignment of an int. +template +inline unsigned alignOf() { return AlignOf::Alignment; } + +/// \struct AlignedCharArray +/// \brief Helper for building an aligned character array type. +/// +/// This template is used to explicitly build up a collection of aligned +/// character array types. We have to build these up using a macro and explicit +/// specialization to cope with old versions of MSVC and GCC where only an +/// integer literal can be used to specify an alignment constraint. Once built +/// up here, we can then begin to indirect between these using normal C++ +/// template parameters. + +// MSVC requires special handling here. +#ifndef _MSC_VER + +#if __has_feature(cxx_alignas) +template +struct AlignedCharArray { + alignas(Alignment) char buffer[Size]; +}; + +#elif defined(__GNUC__) || defined(__IBM_ATTRIBUTES) +/// \brief Create a type with an aligned char buffer. +template +struct AlignedCharArray; + +#define LLVM_ALIGNEDCHARARRAY_TEMPLATE_ALIGNMENT(x) \ + template \ + struct AlignedCharArray { \ + __attribute__((aligned(x))) char buffer[Size]; \ + }; + +LLVM_ALIGNEDCHARARRAY_TEMPLATE_ALIGNMENT(1) +LLVM_ALIGNEDCHARARRAY_TEMPLATE_ALIGNMENT(2) +LLVM_ALIGNEDCHARARRAY_TEMPLATE_ALIGNMENT(4) +LLVM_ALIGNEDCHARARRAY_TEMPLATE_ALIGNMENT(8) +LLVM_ALIGNEDCHARARRAY_TEMPLATE_ALIGNMENT(16) +LLVM_ALIGNEDCHARARRAY_TEMPLATE_ALIGNMENT(32) +LLVM_ALIGNEDCHARARRAY_TEMPLATE_ALIGNMENT(64) +LLVM_ALIGNEDCHARARRAY_TEMPLATE_ALIGNMENT(128) + +#undef LLVM_ALIGNEDCHARARRAY_TEMPLATE_ALIGNMENT + +#else +# error No supported align as directive. +#endif + +#else // _MSC_VER + +/// \brief Create a type with an aligned char buffer. +template +struct AlignedCharArray; + +// We provide special variations of this template for the most common +// alignments because __declspec(align(...)) doesn't actually work when it is +// a member of a by-value function argument in MSVC, even if the alignment +// request is something reasonably like 8-byte or 16-byte. Note that we can't +// even include the declspec with the union that forces the alignment because +// MSVC warns on the existence of the declspec despite the union member forcing +// proper alignment. + +template +struct AlignedCharArray<1, Size> { + union { + char aligned; + char buffer[Size]; + }; +}; + +template +struct AlignedCharArray<2, Size> { + union { + short aligned; + char buffer[Size]; + }; +}; + +template +struct AlignedCharArray<4, Size> { + union { + int aligned; + char buffer[Size]; + }; +}; + +template +struct AlignedCharArray<8, Size> { + union { + double aligned; + char buffer[Size]; + }; +}; + + +// The rest of these are provided with a __declspec(align(...)) and we simply +// can't pass them by-value as function arguments on MSVC. + +#define LLVM_ALIGNEDCHARARRAY_TEMPLATE_ALIGNMENT(x) \ + template \ + struct AlignedCharArray { \ + __declspec(align(x)) char buffer[Size]; \ + }; + +LLVM_ALIGNEDCHARARRAY_TEMPLATE_ALIGNMENT(16) +LLVM_ALIGNEDCHARARRAY_TEMPLATE_ALIGNMENT(32) +LLVM_ALIGNEDCHARARRAY_TEMPLATE_ALIGNMENT(64) +LLVM_ALIGNEDCHARARRAY_TEMPLATE_ALIGNMENT(128) + +#undef LLVM_ALIGNEDCHARARRAY_TEMPLATE_ALIGNMENT + +#endif // _MSC_VER + +namespace detail { +template +class AlignerImpl { + T1 t1; T2 t2; T3 t3; T4 t4; T5 t5; T6 t6; T7 t7; T8 t8; T9 t9; T10 t10; + + AlignerImpl() = delete; +}; + +template +union SizerImpl { + char arr1[sizeof(T1)], arr2[sizeof(T2)], arr3[sizeof(T3)], arr4[sizeof(T4)], + arr5[sizeof(T5)], arr6[sizeof(T6)], arr7[sizeof(T7)], arr8[sizeof(T8)], + arr9[sizeof(T9)], arr10[sizeof(T10)]; +}; +} // end namespace detail + +/// \brief This union template exposes a suitably aligned and sized character +/// array member which can hold elements of any of up to ten types. +/// +/// These types may be arrays, structs, or any other types. The goal is to +/// expose a char array buffer member which can be used as suitable storage for +/// a placement new of any of these types. Support for more than ten types can +/// be added at the cost of more boilerplate. +template +struct AlignedCharArrayUnion : llvm_ks::AlignedCharArray< + AlignOf >::Alignment, + sizeof(::llvm_ks::detail::SizerImpl)> { +}; +} // end namespace llvm_ks + +#endif // LLVM_SUPPORT_ALIGNOF_H diff --git a/llvm/include/llvm/Support/Allocator.h b/llvm/include/llvm/Support/Allocator.h new file mode 100644 index 0000000..f494c80 --- /dev/null +++ b/llvm/include/llvm/Support/Allocator.h @@ -0,0 +1,435 @@ +//===--- Allocator.h - Simple memory allocation abstraction -----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +/// \file +/// +/// This file defines the MallocAllocator and BumpPtrAllocator interfaces. Both +/// of these conform to an LLVM "Allocator" concept which consists of an +/// Allocate method accepting a size and alignment, and a Deallocate accepting +/// a pointer and size. Further, the LLVM "Allocator" concept has overloads of +/// Allocate and Deallocate for setting size and alignment based on the final +/// type. These overloads are typically provided by a base class template \c +/// AllocatorBase. +/// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_ALLOCATOR_H +#define LLVM_SUPPORT_ALLOCATOR_H + +#include "llvm/ADT/SmallVector.h" +#include "llvm/Support/AlignOf.h" +#include "llvm/Support/DataTypes.h" +#include "llvm/Support/MathExtras.h" +#include "llvm/Support/Memory.h" +#include +#include +#include +#include + +namespace llvm_ks { + +/// \brief CRTP base class providing obvious overloads for the core \c +/// Allocate() methods of LLVM-style allocators. +/// +/// This base class both documents the full public interface exposed by all +/// LLVM-style allocators, and redirects all of the overloads to a single core +/// set of methods which the derived class must define. +template class AllocatorBase { +public: + /// \brief Allocate \a Size bytes of \a Alignment aligned memory. This method + /// must be implemented by \c DerivedT. + void *Allocate(size_t Size, size_t Alignment) { +#ifdef __clang__ + static_assert(static_cast( + &AllocatorBase::Allocate) != + static_cast( + &DerivedT::Allocate), + "Class derives from AllocatorBase without implementing the " + "core Allocate(size_t, size_t) overload!"); +#endif + return static_cast(this)->Allocate(Size, Alignment); + } + + /// \brief Deallocate \a Ptr to \a Size bytes of memory allocated by this + /// allocator. + void Deallocate(const void *Ptr, size_t Size) { +#ifdef __clang__ + static_assert(static_cast( + &AllocatorBase::Deallocate) != + static_cast( + &DerivedT::Deallocate), + "Class derives from AllocatorBase without implementing the " + "core Deallocate(void *) overload!"); +#endif + return static_cast(this)->Deallocate(Ptr, Size); + } + + // The rest of these methods are helpers that redirect to one of the above + // core methods. + + /// \brief Allocate space for a sequence of objects without constructing them. + template T *Allocate(size_t Num = 1) { + return static_cast(Allocate(Num * sizeof(T), AlignOf::Alignment)); + } + + /// \brief Deallocate space for a sequence of objects without constructing them. + template + typename std::enable_if< + !std::is_same::type, void>::value, void>::type + Deallocate(T *Ptr, size_t Num = 1) { + Deallocate(static_cast(Ptr), Num * sizeof(T)); + } +}; + +class MallocAllocator : public AllocatorBase { +public: + void Reset() {} + + LLVM_ATTRIBUTE_RETURNS_NONNULL void *Allocate(size_t Size, + size_t /*Alignment*/) { + return malloc(Size); + } + + // Pull in base class overloads. + using AllocatorBase::Allocate; + + void Deallocate(const void *Ptr, size_t /*Size*/) { + free(const_cast(Ptr)); + } + + // Pull in base class overloads. + using AllocatorBase::Deallocate; + + void PrintStats() const {} +}; + +namespace detail { + +// We call out to an external function to actually print the message as the +// printing code uses Allocator.h in its implementation. +void printBumpPtrAllocatorStats(unsigned NumSlabs, size_t BytesAllocated, + size_t TotalMemory); +} // End namespace detail. + +/// \brief Allocate memory in an ever growing pool, as if by bump-pointer. +/// +/// This isn't strictly a bump-pointer allocator as it uses backing slabs of +/// memory rather than relying on a boundless contiguous heap. However, it has +/// bump-pointer semantics in that it is a monotonically growing pool of memory +/// where every allocation is found by merely allocating the next N bytes in +/// the slab, or the next N bytes in the next slab. +/// +/// Note that this also has a threshold for forcing allocations above a certain +/// size into their own slab. +/// +/// The BumpPtrAllocatorImpl template defaults to using a MallocAllocator +/// object, which wraps malloc, to allocate memory, but it can be changed to +/// use a custom allocator. +template +class BumpPtrAllocatorImpl + : public AllocatorBase< + BumpPtrAllocatorImpl> { +public: + static_assert(SizeThreshold <= SlabSize, + "The SizeThreshold must be at most the SlabSize to ensure " + "that objects larger than a slab go into their own memory " + "allocation."); + + BumpPtrAllocatorImpl() + : CurPtr(nullptr), End(nullptr), BytesAllocated(0), Allocator() {} + template + BumpPtrAllocatorImpl(T &&Allocator) + : CurPtr(nullptr), End(nullptr), BytesAllocated(0), + Allocator(std::forward(Allocator)) {} + + // Manually implement a move constructor as we must clear the old allocator's + // slabs as a matter of correctness. + BumpPtrAllocatorImpl(BumpPtrAllocatorImpl &&Old) + : CurPtr(Old.CurPtr), End(Old.End), Slabs(std::move(Old.Slabs)), + CustomSizedSlabs(std::move(Old.CustomSizedSlabs)), + BytesAllocated(Old.BytesAllocated), + Allocator(std::move(Old.Allocator)) { + Old.CurPtr = Old.End = nullptr; + Old.BytesAllocated = 0; + Old.Slabs.clear(); + Old.CustomSizedSlabs.clear(); + } + + ~BumpPtrAllocatorImpl() { + DeallocateSlabs(Slabs.begin(), Slabs.end()); + DeallocateCustomSizedSlabs(); + } + + BumpPtrAllocatorImpl &operator=(BumpPtrAllocatorImpl &&RHS) { + DeallocateSlabs(Slabs.begin(), Slabs.end()); + DeallocateCustomSizedSlabs(); + + CurPtr = RHS.CurPtr; + End = RHS.End; + BytesAllocated = RHS.BytesAllocated; + Slabs = std::move(RHS.Slabs); + CustomSizedSlabs = std::move(RHS.CustomSizedSlabs); + Allocator = std::move(RHS.Allocator); + + RHS.CurPtr = RHS.End = nullptr; + RHS.BytesAllocated = 0; + RHS.Slabs.clear(); + RHS.CustomSizedSlabs.clear(); + return *this; + } + + /// \brief Deallocate all but the current slab and reset the current pointer + /// to the beginning of it, freeing all memory allocated so far. + void Reset() { + // Deallocate all but the first slab, and deallocate all custom-sized slabs. + DeallocateCustomSizedSlabs(); + CustomSizedSlabs.clear(); + + if (Slabs.empty()) + return; + + // Reset the state. + BytesAllocated = 0; + CurPtr = (char *)Slabs.front(); + End = CurPtr + SlabSize; + + __asan_poison_memory_region(*Slabs.begin(), computeSlabSize(0)); + DeallocateSlabs(std::next(Slabs.begin()), Slabs.end()); + Slabs.erase(std::next(Slabs.begin()), Slabs.end()); + } + + /// \brief Allocate space at the specified alignment. + LLVM_ATTRIBUTE_RETURNS_NONNULL LLVM_ATTRIBUTE_RETURNS_NOALIAS void * + Allocate(size_t Size, size_t Alignment) { + assert(Alignment > 0 && "0-byte alignnment is not allowed. Use 1 instead."); + + // Keep track of how many bytes we've allocated. + BytesAllocated += Size; + + size_t Adjustment = alignmentAdjustment(CurPtr, Alignment); + assert(Adjustment + Size >= Size && "Adjustment + Size must not overflow"); + + // Check if we have enough space. + if (Adjustment + Size <= size_t(End - CurPtr)) { + char *AlignedPtr = CurPtr + Adjustment; + CurPtr = AlignedPtr + Size; + // Update the allocation point of this memory block in MemorySanitizer. + // Without this, MemorySanitizer messages for values originated from here + // will point to the allocation of the entire slab. + __msan_allocated_memory(AlignedPtr, Size); + // Similarly, tell ASan about this space. + __asan_unpoison_memory_region(AlignedPtr, Size); + return AlignedPtr; + } + + // If Size is really big, allocate a separate slab for it. + size_t PaddedSize = Size + Alignment - 1; + if (PaddedSize > SizeThreshold) { + void *NewSlab = Allocator.Allocate(PaddedSize, 0); + // We own the new slab and don't want anyone reading anyting other than + // pieces returned from this method. So poison the whole slab. + __asan_poison_memory_region(NewSlab, PaddedSize); + CustomSizedSlabs.push_back(std::make_pair(NewSlab, PaddedSize)); + + uintptr_t AlignedAddr = alignAddr(NewSlab, Alignment); + assert(AlignedAddr + Size <= (uintptr_t)NewSlab + PaddedSize); + char *AlignedPtr = (char*)AlignedAddr; + __msan_allocated_memory(AlignedPtr, Size); + __asan_unpoison_memory_region(AlignedPtr, Size); + return AlignedPtr; + } + + // Otherwise, start a new slab and try again. + StartNewSlab(); + uintptr_t AlignedAddr = alignAddr(CurPtr, Alignment); + assert(AlignedAddr + Size <= (uintptr_t)End && + "Unable to allocate memory!"); + char *AlignedPtr = (char*)AlignedAddr; + CurPtr = AlignedPtr + Size; + __msan_allocated_memory(AlignedPtr, Size); + __asan_unpoison_memory_region(AlignedPtr, Size); + return AlignedPtr; + } + + // Pull in base class overloads. + using AllocatorBase::Allocate; + + void Deallocate(const void *Ptr, size_t Size) { + __asan_poison_memory_region(Ptr, Size); + } + + // Pull in base class overloads. + using AllocatorBase::Deallocate; + + size_t GetNumSlabs() const { return Slabs.size() + CustomSizedSlabs.size(); } + + size_t getTotalMemory() const { + size_t TotalMemory = 0; + for (auto I = Slabs.begin(), E = Slabs.end(); I != E; ++I) + TotalMemory += computeSlabSize(std::distance(Slabs.begin(), I)); + for (auto &PtrAndSize : CustomSizedSlabs) + TotalMemory += PtrAndSize.second; + return TotalMemory; + } + + void PrintStats() const { + detail::printBumpPtrAllocatorStats(Slabs.size(), BytesAllocated, + getTotalMemory()); + } + +private: + /// \brief The current pointer into the current slab. + /// + /// This points to the next free byte in the slab. + char *CurPtr; + + /// \brief The end of the current slab. + char *End; + + /// \brief The slabs allocated so far. + SmallVector Slabs; + + /// \brief Custom-sized slabs allocated for too-large allocation requests. + SmallVector, 0> CustomSizedSlabs; + + /// \brief How many bytes we've allocated. + /// + /// Used so that we can compute how much space was wasted. + size_t BytesAllocated; + + /// \brief The allocator instance we use to get slabs of memory. + AllocatorT Allocator; + + static size_t computeSlabSize(unsigned SlabIdx) { + // Scale the actual allocated slab size based on the number of slabs + // allocated. Every 128 slabs allocated, we double the allocated size to + // reduce allocation frequency, but saturate at multiplying the slab size by + // 2^30. + return SlabSize * ((size_t)1 << std::min(30, SlabIdx / 128)); + } + + /// \brief Allocate a new slab and move the bump pointers over into the new + /// slab, modifying CurPtr and End. + void StartNewSlab() { + size_t AllocatedSlabSize = computeSlabSize(Slabs.size()); + + void *NewSlab = Allocator.Allocate(AllocatedSlabSize, 0); + // We own the new slab and don't want anyone reading anything other than + // pieces returned from this method. So poison the whole slab. + __asan_poison_memory_region(NewSlab, AllocatedSlabSize); + + Slabs.push_back(NewSlab); + CurPtr = (char *)(NewSlab); + End = ((char *)NewSlab) + AllocatedSlabSize; + } + + /// \brief Deallocate a sequence of slabs. + void DeallocateSlabs(SmallVectorImpl::iterator I, + SmallVectorImpl::iterator E) { + for (; I != E; ++I) { + size_t AllocatedSlabSize = + computeSlabSize(std::distance(Slabs.begin(), I)); + Allocator.Deallocate(*I, AllocatedSlabSize); + } + } + + /// \brief Deallocate all memory for custom sized slabs. + void DeallocateCustomSizedSlabs() { + for (auto &PtrAndSize : CustomSizedSlabs) { + void *Ptr = PtrAndSize.first; + size_t Size = PtrAndSize.second; + Allocator.Deallocate(Ptr, Size); + } + } + + template friend class SpecificBumpPtrAllocator; +}; + +/// \brief The standard BumpPtrAllocator which just uses the default template +/// paramaters. +typedef BumpPtrAllocatorImpl<> BumpPtrAllocator; + +/// \brief A BumpPtrAllocator that allows only elements of a specific type to be +/// allocated. +/// +/// This allows calling the destructor in DestroyAll() and when the allocator is +/// destroyed. +template class SpecificBumpPtrAllocator { + BumpPtrAllocator Allocator; + +public: + SpecificBumpPtrAllocator() : Allocator() {} + SpecificBumpPtrAllocator(SpecificBumpPtrAllocator &&Old) + : Allocator(std::move(Old.Allocator)) {} + ~SpecificBumpPtrAllocator() { DestroyAll(); } + + SpecificBumpPtrAllocator &operator=(SpecificBumpPtrAllocator &&RHS) { + Allocator = std::move(RHS.Allocator); + return *this; + } + + /// Call the destructor of each allocated object and deallocate all but the + /// current slab and reset the current pointer to the beginning of it, freeing + /// all memory allocated so far. + void DestroyAll() { + auto DestroyElements = [](char *Begin, char *End) { + assert(Begin == (char*)alignAddr(Begin, alignOf())); + for (char *Ptr = Begin; Ptr + sizeof(T) <= End; Ptr += sizeof(T)) + reinterpret_cast(Ptr)->~T(); + }; + + for (auto I = Allocator.Slabs.begin(), E = Allocator.Slabs.end(); I != E; + ++I) { + size_t AllocatedSlabSize = BumpPtrAllocator::computeSlabSize( + std::distance(Allocator.Slabs.begin(), I)); + char *Begin = (char*)alignAddr(*I, alignOf()); + char *End = *I == Allocator.Slabs.back() ? Allocator.CurPtr + : (char *)*I + AllocatedSlabSize; + + DestroyElements(Begin, End); + } + + for (auto &PtrAndSize : Allocator.CustomSizedSlabs) { + void *Ptr = PtrAndSize.first; + size_t Size = PtrAndSize.second; + DestroyElements((char*)alignAddr(Ptr, alignOf()), (char *)Ptr + Size); + } + + Allocator.Reset(); + } + + /// \brief Allocate space for an array of objects without constructing them. + T *Allocate(size_t num = 1) { return Allocator.Allocate(num); } +}; + +} // end namespace llvm_ks + +template +void *operator new(size_t Size, + llvm_ks::BumpPtrAllocatorImpl &Allocator) { + struct S { + char c; + union { + double D; + long double LD; + long long L; + void *P; + } x; + }; + return Allocator.Allocate( + Size, std::min((size_t)llvm_ks::NextPowerOf2(Size), offsetof(S, x))); +} + +template +void operator delete( + void *, llvm_ks::BumpPtrAllocatorImpl &) { +} + +#endif // LLVM_SUPPORT_ALLOCATOR_H diff --git a/llvm/include/llvm/Support/CBindingWrapping.h b/llvm/include/llvm/Support/CBindingWrapping.h new file mode 100644 index 0000000..d4633aa --- /dev/null +++ b/llvm/include/llvm/Support/CBindingWrapping.h @@ -0,0 +1,47 @@ +//===- llvm/Support/CBindingWrapph.h - C Interface Wrapping -----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the wrapping macros for the C interface. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_CBINDINGWRAPPING_H +#define LLVM_SUPPORT_CBINDINGWRAPPING_H + +#include "llvm/Support/Casting.h" +#include "llvm-c/Types.h" + +#define DEFINE_SIMPLE_CONVERSION_FUNCTIONS(ty, ref) \ + inline ty *unwrap(ref P) { \ + return reinterpret_cast(P); \ + } \ + \ + inline ref wrap(const ty *P) { \ + return reinterpret_cast(const_cast(P)); \ + } + +#define DEFINE_ISA_CONVERSION_FUNCTIONS(ty, ref) \ + DEFINE_SIMPLE_CONVERSION_FUNCTIONS(ty, ref) \ + \ + template \ + inline T *unwrap(ref P) { \ + return cast(unwrap(P)); \ + } + +#define DEFINE_STDCXX_CONVERSION_FUNCTIONS(ty, ref) \ + DEFINE_SIMPLE_CONVERSION_FUNCTIONS(ty, ref) \ + \ + template \ + inline T *unwrap(ref P) { \ + T *Q = (T*)unwrap(P); \ + assert(Q && "Invalid cast!"); \ + return Q; \ + } + +#endif diff --git a/llvm/include/llvm/Support/COFF.h b/llvm/include/llvm/Support/COFF.h new file mode 100644 index 0000000..1d5ef09 --- /dev/null +++ b/llvm/include/llvm/Support/COFF.h @@ -0,0 +1,670 @@ +//===-- llvm/Support/COFF.h -------------------------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains an definitions used in Windows COFF Files. +// +// Structures and enums defined within this file where created using +// information from Microsoft's publicly available PE/COFF format document: +// +// Microsoft Portable Executable and Common Object File Format Specification +// Revision 8.1 - February 15, 2008 +// +// As of 5/2/2010, hosted by Microsoft at: +// http://www.microsoft.com/whdc/system/platform/firmware/pecoff.mspx +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_COFF_H +#define LLVM_SUPPORT_COFF_H + +#include "llvm/Support/DataTypes.h" +#include +#include + +namespace llvm_ks { +namespace COFF { + + // The maximum number of sections that a COFF object can have (inclusive). + const int32_t MaxNumberOfSections16 = 65279; + + // The PE signature bytes that follows the DOS stub header. + static const char PEMagic[] = { 'P', 'E', '\0', '\0' }; + + static const char BigObjMagic[] = { + '\xc7', '\xa1', '\xba', '\xd1', '\xee', '\xba', '\xa9', '\x4b', + '\xaf', '\x20', '\xfa', '\xf6', '\x6a', '\xa4', '\xdc', '\xb8', + }; + + // Sizes in bytes of various things in the COFF format. + enum { + Header16Size = 20, + Header32Size = 56, + NameSize = 8, + Symbol16Size = 18, + Symbol32Size = 20, + SectionSize = 40, + RelocationSize = 10 + }; + + struct header { + uint16_t Machine; + int32_t NumberOfSections; + uint32_t TimeDateStamp; + uint32_t PointerToSymbolTable; + uint32_t NumberOfSymbols; + uint16_t SizeOfOptionalHeader; + uint16_t Characteristics; + }; + + struct BigObjHeader { + enum : uint16_t { MinBigObjectVersion = 2 }; + + uint16_t Sig1; ///< Must be IMAGE_FILE_MACHINE_UNKNOWN (0). + uint16_t Sig2; ///< Must be 0xFFFF. + uint16_t Version; + uint16_t Machine; + uint32_t TimeDateStamp; + uint8_t UUID[16]; + uint32_t unused1; + uint32_t unused2; + uint32_t unused3; + uint32_t unused4; + uint32_t NumberOfSections; + uint32_t PointerToSymbolTable; + uint32_t NumberOfSymbols; + }; + + enum MachineTypes { + MT_Invalid = 0xffff, + + IMAGE_FILE_MACHINE_UNKNOWN = 0x0, + IMAGE_FILE_MACHINE_AM33 = 0x13, + IMAGE_FILE_MACHINE_AMD64 = 0x8664, + IMAGE_FILE_MACHINE_ARM = 0x1C0, + IMAGE_FILE_MACHINE_ARMNT = 0x1C4, + IMAGE_FILE_MACHINE_ARM64 = 0xAA64, + IMAGE_FILE_MACHINE_EBC = 0xEBC, + IMAGE_FILE_MACHINE_I386 = 0x14C, + IMAGE_FILE_MACHINE_IA64 = 0x200, + IMAGE_FILE_MACHINE_M32R = 0x9041, + IMAGE_FILE_MACHINE_MIPS16 = 0x266, + IMAGE_FILE_MACHINE_MIPSFPU = 0x366, + IMAGE_FILE_MACHINE_MIPSFPU16 = 0x466, + IMAGE_FILE_MACHINE_POWERPC = 0x1F0, + IMAGE_FILE_MACHINE_POWERPCFP = 0x1F1, + IMAGE_FILE_MACHINE_R4000 = 0x166, + IMAGE_FILE_MACHINE_SH3 = 0x1A2, + IMAGE_FILE_MACHINE_SH3DSP = 0x1A3, + IMAGE_FILE_MACHINE_SH4 = 0x1A6, + IMAGE_FILE_MACHINE_SH5 = 0x1A8, + IMAGE_FILE_MACHINE_THUMB = 0x1C2, + IMAGE_FILE_MACHINE_WCEMIPSV2 = 0x169 + }; + + enum Characteristics { + C_Invalid = 0, + + /// The file does not contain base relocations and must be loaded at its + /// preferred base. If this cannot be done, the loader will error. + IMAGE_FILE_RELOCS_STRIPPED = 0x0001, + /// The file is valid and can be run. + IMAGE_FILE_EXECUTABLE_IMAGE = 0x0002, + /// COFF line numbers have been stripped. This is deprecated and should be + /// 0. + IMAGE_FILE_LINE_NUMS_STRIPPED = 0x0004, + /// COFF symbol table entries for local symbols have been removed. This is + /// deprecated and should be 0. + IMAGE_FILE_LOCAL_SYMS_STRIPPED = 0x0008, + /// Aggressively trim working set. This is deprecated and must be 0. + IMAGE_FILE_AGGRESSIVE_WS_TRIM = 0x0010, + /// Image can handle > 2GiB addresses. + IMAGE_FILE_LARGE_ADDRESS_AWARE = 0x0020, + /// Little endian: the LSB precedes the MSB in memory. This is deprecated + /// and should be 0. + IMAGE_FILE_BYTES_REVERSED_LO = 0x0080, + /// Machine is based on a 32bit word architecture. + IMAGE_FILE_32BIT_MACHINE = 0x0100, + /// Debugging info has been removed. + IMAGE_FILE_DEBUG_STRIPPED = 0x0200, + /// If the image is on removable media, fully load it and copy it to swap. + IMAGE_FILE_REMOVABLE_RUN_FROM_SWAP = 0x0400, + /// If the image is on network media, fully load it and copy it to swap. + IMAGE_FILE_NET_RUN_FROM_SWAP = 0x0800, + /// The image file is a system file, not a user program. + IMAGE_FILE_SYSTEM = 0x1000, + /// The image file is a DLL. + IMAGE_FILE_DLL = 0x2000, + /// This file should only be run on a uniprocessor machine. + IMAGE_FILE_UP_SYSTEM_ONLY = 0x4000, + /// Big endian: the MSB precedes the LSB in memory. This is deprecated + /// and should be 0. + IMAGE_FILE_BYTES_REVERSED_HI = 0x8000 + }; + + struct symbol { + char Name[NameSize]; + uint32_t Value; + int32_t SectionNumber; + uint16_t Type; + uint8_t StorageClass; + uint8_t NumberOfAuxSymbols; + }; + + enum SymbolSectionNumber : int32_t { + IMAGE_SYM_DEBUG = -2, + IMAGE_SYM_ABSOLUTE = -1, + IMAGE_SYM_UNDEFINED = 0 + }; + + /// Storage class tells where and what the symbol represents + enum SymbolStorageClass { + SSC_Invalid = 0xff, + + IMAGE_SYM_CLASS_END_OF_FUNCTION = -1, ///< Physical end of function + IMAGE_SYM_CLASS_NULL = 0, ///< No symbol + IMAGE_SYM_CLASS_AUTOMATIC = 1, ///< Stack variable + IMAGE_SYM_CLASS_EXTERNAL = 2, ///< External symbol + IMAGE_SYM_CLASS_STATIC = 3, ///< Static + IMAGE_SYM_CLASS_REGISTER = 4, ///< Register variable + IMAGE_SYM_CLASS_EXTERNAL_DEF = 5, ///< External definition + IMAGE_SYM_CLASS_LABEL = 6, ///< Label + IMAGE_SYM_CLASS_UNDEFINED_LABEL = 7, ///< Undefined label + IMAGE_SYM_CLASS_MEMBER_OF_STRUCT = 8, ///< Member of structure + IMAGE_SYM_CLASS_ARGUMENT = 9, ///< Function argument + IMAGE_SYM_CLASS_STRUCT_TAG = 10, ///< Structure tag + IMAGE_SYM_CLASS_MEMBER_OF_UNION = 11, ///< Member of union + IMAGE_SYM_CLASS_UNION_TAG = 12, ///< Union tag + IMAGE_SYM_CLASS_TYPE_DEFINITION = 13, ///< Type definition + IMAGE_SYM_CLASS_UNDEFINED_STATIC = 14, ///< Undefined static + IMAGE_SYM_CLASS_ENUM_TAG = 15, ///< Enumeration tag + IMAGE_SYM_CLASS_MEMBER_OF_ENUM = 16, ///< Member of enumeration + IMAGE_SYM_CLASS_REGISTER_PARAM = 17, ///< Register parameter + IMAGE_SYM_CLASS_BIT_FIELD = 18, ///< Bit field + /// ".bb" or ".eb" - beginning or end of block + IMAGE_SYM_CLASS_BLOCK = 100, + /// ".bf" or ".ef" - beginning or end of function + IMAGE_SYM_CLASS_FUNCTION = 101, + IMAGE_SYM_CLASS_END_OF_STRUCT = 102, ///< End of structure + IMAGE_SYM_CLASS_FILE = 103, ///< File name + /// Line number, reformatted as symbol + IMAGE_SYM_CLASS_SECTION = 104, + IMAGE_SYM_CLASS_WEAK_EXTERNAL = 105, ///< Duplicate tag + /// External symbol in dmert public lib + IMAGE_SYM_CLASS_CLR_TOKEN = 107 + }; + + enum SymbolBaseType { + IMAGE_SYM_TYPE_NULL = 0, ///< No type information or unknown base type. + IMAGE_SYM_TYPE_VOID = 1, ///< Used with void pointers and functions. + IMAGE_SYM_TYPE_CHAR = 2, ///< A character (signed byte). + IMAGE_SYM_TYPE_SHORT = 3, ///< A 2-byte signed integer. + IMAGE_SYM_TYPE_INT = 4, ///< A natural integer type on the target. + IMAGE_SYM_TYPE_LONG = 5, ///< A 4-byte signed integer. + IMAGE_SYM_TYPE_FLOAT = 6, ///< A 4-byte floating-point number. + IMAGE_SYM_TYPE_DOUBLE = 7, ///< An 8-byte floating-point number. + IMAGE_SYM_TYPE_STRUCT = 8, ///< A structure. + IMAGE_SYM_TYPE_UNION = 9, ///< An union. + IMAGE_SYM_TYPE_ENUM = 10, ///< An enumerated type. + IMAGE_SYM_TYPE_MOE = 11, ///< A member of enumeration (a specific value). + IMAGE_SYM_TYPE_BYTE = 12, ///< A byte; unsigned 1-byte integer. + IMAGE_SYM_TYPE_WORD = 13, ///< A word; unsigned 2-byte integer. + IMAGE_SYM_TYPE_UINT = 14, ///< An unsigned integer of natural size. + IMAGE_SYM_TYPE_DWORD = 15 ///< An unsigned 4-byte integer. + }; + + enum SymbolComplexType { + IMAGE_SYM_DTYPE_NULL = 0, ///< No complex type; simple scalar variable. + IMAGE_SYM_DTYPE_POINTER = 1, ///< A pointer to base type. + IMAGE_SYM_DTYPE_FUNCTION = 2, ///< A function that returns a base type. + IMAGE_SYM_DTYPE_ARRAY = 3, ///< An array of base type. + + /// Type is formed as (base + (derived << SCT_COMPLEX_TYPE_SHIFT)) + SCT_COMPLEX_TYPE_SHIFT = 4 + }; + + enum AuxSymbolType { + IMAGE_AUX_SYMBOL_TYPE_TOKEN_DEF = 1 + }; + + struct section { + char Name[NameSize]; + uint32_t VirtualSize; + uint32_t VirtualAddress; + uint32_t SizeOfRawData; + uint32_t PointerToRawData; + uint32_t PointerToRelocations; + uint32_t PointerToLineNumbers; + uint16_t NumberOfRelocations; + uint16_t NumberOfLineNumbers; + uint32_t Characteristics; + }; + + enum SectionCharacteristics : uint32_t { + SC_Invalid = 0xffffffff, + + IMAGE_SCN_TYPE_NOLOAD = 0x00000002, + IMAGE_SCN_TYPE_NO_PAD = 0x00000008, + IMAGE_SCN_CNT_CODE = 0x00000020, + IMAGE_SCN_CNT_INITIALIZED_DATA = 0x00000040, + IMAGE_SCN_CNT_UNINITIALIZED_DATA = 0x00000080, + IMAGE_SCN_LNK_OTHER = 0x00000100, + IMAGE_SCN_LNK_INFO = 0x00000200, + IMAGE_SCN_LNK_REMOVE = 0x00000800, + IMAGE_SCN_LNK_COMDAT = 0x00001000, + IMAGE_SCN_GPREL = 0x00008000, + IMAGE_SCN_MEM_PURGEABLE = 0x00020000, + IMAGE_SCN_MEM_16BIT = 0x00020000, + IMAGE_SCN_MEM_LOCKED = 0x00040000, + IMAGE_SCN_MEM_PRELOAD = 0x00080000, + IMAGE_SCN_ALIGN_1BYTES = 0x00100000, + IMAGE_SCN_ALIGN_2BYTES = 0x00200000, + IMAGE_SCN_ALIGN_4BYTES = 0x00300000, + IMAGE_SCN_ALIGN_8BYTES = 0x00400000, + IMAGE_SCN_ALIGN_16BYTES = 0x00500000, + IMAGE_SCN_ALIGN_32BYTES = 0x00600000, + IMAGE_SCN_ALIGN_64BYTES = 0x00700000, + IMAGE_SCN_ALIGN_128BYTES = 0x00800000, + IMAGE_SCN_ALIGN_256BYTES = 0x00900000, + IMAGE_SCN_ALIGN_512BYTES = 0x00A00000, + IMAGE_SCN_ALIGN_1024BYTES = 0x00B00000, + IMAGE_SCN_ALIGN_2048BYTES = 0x00C00000, + IMAGE_SCN_ALIGN_4096BYTES = 0x00D00000, + IMAGE_SCN_ALIGN_8192BYTES = 0x00E00000, + IMAGE_SCN_LNK_NRELOC_OVFL = 0x01000000, + IMAGE_SCN_MEM_DISCARDABLE = 0x02000000, + IMAGE_SCN_MEM_NOT_CACHED = 0x04000000, + IMAGE_SCN_MEM_NOT_PAGED = 0x08000000, + IMAGE_SCN_MEM_SHARED = 0x10000000, + IMAGE_SCN_MEM_EXECUTE = 0x20000000, + IMAGE_SCN_MEM_READ = 0x40000000, + IMAGE_SCN_MEM_WRITE = 0x80000000 + }; + + struct relocation { + uint32_t VirtualAddress; + uint32_t SymbolTableIndex; + uint16_t Type; + }; + + enum RelocationTypeI386 { + IMAGE_REL_I386_ABSOLUTE = 0x0000, + IMAGE_REL_I386_DIR16 = 0x0001, + IMAGE_REL_I386_REL16 = 0x0002, + IMAGE_REL_I386_DIR32 = 0x0006, + IMAGE_REL_I386_DIR32NB = 0x0007, + IMAGE_REL_I386_SEG12 = 0x0009, + IMAGE_REL_I386_SECTION = 0x000A, + IMAGE_REL_I386_SECREL = 0x000B, + IMAGE_REL_I386_TOKEN = 0x000C, + IMAGE_REL_I386_SECREL7 = 0x000D, + IMAGE_REL_I386_REL32 = 0x0014 + }; + + enum RelocationTypeAMD64 { + IMAGE_REL_AMD64_ABSOLUTE = 0x0000, + IMAGE_REL_AMD64_ADDR64 = 0x0001, + IMAGE_REL_AMD64_ADDR32 = 0x0002, + IMAGE_REL_AMD64_ADDR32NB = 0x0003, + IMAGE_REL_AMD64_REL32 = 0x0004, + IMAGE_REL_AMD64_REL32_1 = 0x0005, + IMAGE_REL_AMD64_REL32_2 = 0x0006, + IMAGE_REL_AMD64_REL32_3 = 0x0007, + IMAGE_REL_AMD64_REL32_4 = 0x0008, + IMAGE_REL_AMD64_REL32_5 = 0x0009, + IMAGE_REL_AMD64_SECTION = 0x000A, + IMAGE_REL_AMD64_SECREL = 0x000B, + IMAGE_REL_AMD64_SECREL7 = 0x000C, + IMAGE_REL_AMD64_TOKEN = 0x000D, + IMAGE_REL_AMD64_SREL32 = 0x000E, + IMAGE_REL_AMD64_PAIR = 0x000F, + IMAGE_REL_AMD64_SSPAN32 = 0x0010 + }; + + enum RelocationTypesARM { + IMAGE_REL_ARM_ABSOLUTE = 0x0000, + IMAGE_REL_ARM_ADDR32 = 0x0001, + IMAGE_REL_ARM_ADDR32NB = 0x0002, + IMAGE_REL_ARM_BRANCH24 = 0x0003, + IMAGE_REL_ARM_BRANCH11 = 0x0004, + IMAGE_REL_ARM_TOKEN = 0x0005, + IMAGE_REL_ARM_BLX24 = 0x0008, + IMAGE_REL_ARM_BLX11 = 0x0009, + IMAGE_REL_ARM_SECTION = 0x000E, + IMAGE_REL_ARM_SECREL = 0x000F, + IMAGE_REL_ARM_MOV32A = 0x0010, + IMAGE_REL_ARM_MOV32T = 0x0011, + IMAGE_REL_ARM_BRANCH20T = 0x0012, + IMAGE_REL_ARM_BRANCH24T = 0x0014, + IMAGE_REL_ARM_BLX23T = 0x0015 + }; + + enum COMDATType { + IMAGE_COMDAT_SELECT_NODUPLICATES = 1, + IMAGE_COMDAT_SELECT_ANY, + IMAGE_COMDAT_SELECT_SAME_SIZE, + IMAGE_COMDAT_SELECT_EXACT_MATCH, + IMAGE_COMDAT_SELECT_ASSOCIATIVE, + IMAGE_COMDAT_SELECT_LARGEST, + IMAGE_COMDAT_SELECT_NEWEST + }; + + // Auxiliary Symbol Formats + struct AuxiliaryFunctionDefinition { + uint32_t TagIndex; + uint32_t TotalSize; + uint32_t PointerToLinenumber; + uint32_t PointerToNextFunction; + char unused[2]; + }; + + struct AuxiliarybfAndefSymbol { + uint8_t unused1[4]; + uint16_t Linenumber; + uint8_t unused2[6]; + uint32_t PointerToNextFunction; + uint8_t unused3[2]; + }; + + struct AuxiliaryWeakExternal { + uint32_t TagIndex; + uint32_t Characteristics; + uint8_t unused[10]; + }; + + /// These are not documented in the spec, but are located in WinNT.h. + enum WeakExternalCharacteristics { + IMAGE_WEAK_EXTERN_SEARCH_NOLIBRARY = 1, + IMAGE_WEAK_EXTERN_SEARCH_LIBRARY = 2, + IMAGE_WEAK_EXTERN_SEARCH_ALIAS = 3 + }; + + struct AuxiliarySectionDefinition { + uint32_t Length; + uint16_t NumberOfRelocations; + uint16_t NumberOfLinenumbers; + uint32_t CheckSum; + uint32_t Number; + uint8_t Selection; + char unused; + }; + + struct AuxiliaryCLRToken { + uint8_t AuxType; + uint8_t unused1; + uint32_t SymbolTableIndex; + char unused2[12]; + }; + + union Auxiliary { + AuxiliaryFunctionDefinition FunctionDefinition; + AuxiliarybfAndefSymbol bfAndefSymbol; + AuxiliaryWeakExternal WeakExternal; + AuxiliarySectionDefinition SectionDefinition; + }; + + /// @brief The Import Directory Table. + /// + /// There is a single array of these and one entry per imported DLL. + struct ImportDirectoryTableEntry { + uint32_t ImportLookupTableRVA; + uint32_t TimeDateStamp; + uint32_t ForwarderChain; + uint32_t NameRVA; + uint32_t ImportAddressTableRVA; + }; + + /// @brief The PE32 Import Lookup Table. + /// + /// There is an array of these for each imported DLL. It represents either + /// the ordinal to import from the target DLL, or a name to lookup and import + /// from the target DLL. + /// + /// This also happens to be the same format used by the Import Address Table + /// when it is initially written out to the image. + struct ImportLookupTableEntry32 { + uint32_t data; + + /// @brief Is this entry specified by ordinal, or name? + bool isOrdinal() const { return data & 0x80000000; } + + /// @brief Get the ordinal value of this entry. isOrdinal must be true. + uint16_t getOrdinal() const { + assert(isOrdinal() && "ILT entry is not an ordinal!"); + return data & 0xFFFF; + } + + /// @brief Set the ordinal value and set isOrdinal to true. + void setOrdinal(uint16_t o) { + data = o; + data |= 0x80000000; + } + + /// @brief Get the Hint/Name entry RVA. isOrdinal must be false. + uint32_t getHintNameRVA() const { + assert(!isOrdinal() && "ILT entry is not a Hint/Name RVA!"); + return data; + } + + /// @brief Set the Hint/Name entry RVA and set isOrdinal to false. + void setHintNameRVA(uint32_t rva) { data = rva; } + }; + + /// @brief The DOS compatible header at the front of all PEs. + struct DOSHeader { + uint16_t Magic; + uint16_t UsedBytesInTheLastPage; + uint16_t FileSizeInPages; + uint16_t NumberOfRelocationItems; + uint16_t HeaderSizeInParagraphs; + uint16_t MinimumExtraParagraphs; + uint16_t MaximumExtraParagraphs; + uint16_t InitialRelativeSS; + uint16_t InitialSP; + uint16_t Checksum; + uint16_t InitialIP; + uint16_t InitialRelativeCS; + uint16_t AddressOfRelocationTable; + uint16_t OverlayNumber; + uint16_t Reserved[4]; + uint16_t OEMid; + uint16_t OEMinfo; + uint16_t Reserved2[10]; + uint32_t AddressOfNewExeHeader; + }; + + struct PE32Header { + enum { + PE32 = 0x10b, + PE32_PLUS = 0x20b + }; + + uint16_t Magic; + uint8_t MajorLinkerVersion; + uint8_t MinorLinkerVersion; + uint32_t SizeOfCode; + uint32_t SizeOfInitializedData; + uint32_t SizeOfUninitializedData; + uint32_t AddressOfEntryPoint; // RVA + uint32_t BaseOfCode; // RVA + uint32_t BaseOfData; // RVA + uint32_t ImageBase; + uint32_t SectionAlignment; + uint32_t FileAlignment; + uint16_t MajorOperatingSystemVersion; + uint16_t MinorOperatingSystemVersion; + uint16_t MajorImageVersion; + uint16_t MinorImageVersion; + uint16_t MajorSubsystemVersion; + uint16_t MinorSubsystemVersion; + uint32_t Win32VersionValue; + uint32_t SizeOfImage; + uint32_t SizeOfHeaders; + uint32_t CheckSum; + uint16_t Subsystem; + // FIXME: This should be DllCharacteristics to match the COFF spec. + uint16_t DLLCharacteristics; + uint32_t SizeOfStackReserve; + uint32_t SizeOfStackCommit; + uint32_t SizeOfHeapReserve; + uint32_t SizeOfHeapCommit; + uint32_t LoaderFlags; + // FIXME: This should be NumberOfRvaAndSizes to match the COFF spec. + uint32_t NumberOfRvaAndSize; + }; + + struct DataDirectory { + uint32_t RelativeVirtualAddress; + uint32_t Size; + }; + + enum DataDirectoryIndex { + EXPORT_TABLE = 0, + IMPORT_TABLE, + RESOURCE_TABLE, + EXCEPTION_TABLE, + CERTIFICATE_TABLE, + BASE_RELOCATION_TABLE, + DEBUG, + ARCHITECTURE, + GLOBAL_PTR, + TLS_TABLE, + LOAD_CONFIG_TABLE, + BOUND_IMPORT, + IAT, + DELAY_IMPORT_DESCRIPTOR, + CLR_RUNTIME_HEADER, + + NUM_DATA_DIRECTORIES + }; + + enum WindowsSubsystem { + IMAGE_SUBSYSTEM_UNKNOWN = 0, ///< An unknown subsystem. + IMAGE_SUBSYSTEM_NATIVE = 1, ///< Device drivers and native Windows processes + IMAGE_SUBSYSTEM_WINDOWS_GUI = 2, ///< The Windows GUI subsystem. + IMAGE_SUBSYSTEM_WINDOWS_CUI = 3, ///< The Windows character subsystem. + IMAGE_SUBSYSTEM_OS2_CUI = 5, ///< The OS/2 character subsytem. + IMAGE_SUBSYSTEM_POSIX_CUI = 7, ///< The POSIX character subsystem. + IMAGE_SUBSYSTEM_NATIVE_WINDOWS = 8, ///< Native Windows 9x driver. + IMAGE_SUBSYSTEM_WINDOWS_CE_GUI = 9, ///< Windows CE. + IMAGE_SUBSYSTEM_EFI_APPLICATION = 10, ///< An EFI application. + IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER = 11, ///< An EFI driver with boot + /// services. + IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER = 12, ///< An EFI driver with run-time + /// services. + IMAGE_SUBSYSTEM_EFI_ROM = 13, ///< An EFI ROM image. + IMAGE_SUBSYSTEM_XBOX = 14, ///< XBOX. + IMAGE_SUBSYSTEM_WINDOWS_BOOT_APPLICATION = 16 ///< A BCD application. + }; + + enum DLLCharacteristics { + /// ASLR with 64 bit address space. + IMAGE_DLL_CHARACTERISTICS_HIGH_ENTROPY_VA = 0x0020, + /// DLL can be relocated at load time. + IMAGE_DLL_CHARACTERISTICS_DYNAMIC_BASE = 0x0040, + /// Code integrity checks are enforced. + IMAGE_DLL_CHARACTERISTICS_FORCE_INTEGRITY = 0x0080, + ///< Image is NX compatible. + IMAGE_DLL_CHARACTERISTICS_NX_COMPAT = 0x0100, + /// Isolation aware, but do not isolate the image. + IMAGE_DLL_CHARACTERISTICS_NO_ISOLATION = 0x0200, + /// Does not use structured exception handling (SEH). No SEH handler may be + /// called in this image. + IMAGE_DLL_CHARACTERISTICS_NO_SEH = 0x0400, + /// Do not bind the image. + IMAGE_DLL_CHARACTERISTICS_NO_BIND = 0x0800, + ///< Image should execute in an AppContainer. + IMAGE_DLL_CHARACTERISTICS_APPCONTAINER = 0x1000, + ///< A WDM driver. + IMAGE_DLL_CHARACTERISTICS_WDM_DRIVER = 0x2000, + ///< Image supports Control Flow Guard. + IMAGE_DLL_CHARACTERISTICS_GUARD_CF = 0x4000, + /// Terminal Server aware. + IMAGE_DLL_CHARACTERISTICS_TERMINAL_SERVER_AWARE = 0x8000 + }; + + enum DebugType { + IMAGE_DEBUG_TYPE_UNKNOWN = 0, + IMAGE_DEBUG_TYPE_COFF = 1, + IMAGE_DEBUG_TYPE_CODEVIEW = 2, + IMAGE_DEBUG_TYPE_FPO = 3, + IMAGE_DEBUG_TYPE_MISC = 4, + IMAGE_DEBUG_TYPE_EXCEPTION = 5, + IMAGE_DEBUG_TYPE_FIXUP = 6, + IMAGE_DEBUG_TYPE_OMAP_TO_SRC = 7, + IMAGE_DEBUG_TYPE_OMAP_FROM_SRC = 8, + IMAGE_DEBUG_TYPE_BORLAND = 9, + IMAGE_DEBUG_TYPE_CLSID = 11 + }; + + enum BaseRelocationType { + IMAGE_REL_BASED_ABSOLUTE = 0, + IMAGE_REL_BASED_HIGH = 1, + IMAGE_REL_BASED_LOW = 2, + IMAGE_REL_BASED_HIGHLOW = 3, + IMAGE_REL_BASED_HIGHADJ = 4, + IMAGE_REL_BASED_MIPS_JMPADDR = 5, + IMAGE_REL_BASED_ARM_MOV32A = 5, + IMAGE_REL_BASED_ARM_MOV32T = 7, + IMAGE_REL_BASED_MIPS_JMPADDR16 = 9, + IMAGE_REL_BASED_DIR64 = 10 + }; + + enum ImportType { + IMPORT_CODE = 0, + IMPORT_DATA = 1, + IMPORT_CONST = 2 + }; + + enum ImportNameType { + /// Import is by ordinal. This indicates that the value in the Ordinal/Hint + /// field of the import header is the import's ordinal. If this constant is + /// not specified, then the Ordinal/Hint field should always be interpreted + /// as the import's hint. + IMPORT_ORDINAL = 0, + /// The import name is identical to the public symbol name + IMPORT_NAME = 1, + /// The import name is the public symbol name, but skipping the leading ?, + /// @, or optionally _. + IMPORT_NAME_NOPREFIX = 2, + /// The import name is the public symbol name, but skipping the leading ?, + /// @, or optionally _, and truncating at the first @. + IMPORT_NAME_UNDECORATE = 3 + }; + + struct ImportHeader { + uint16_t Sig1; ///< Must be IMAGE_FILE_MACHINE_UNKNOWN (0). + uint16_t Sig2; ///< Must be 0xFFFF. + uint16_t Version; + uint16_t Machine; + uint32_t TimeDateStamp; + uint32_t SizeOfData; + uint16_t OrdinalHint; + uint16_t TypeInfo; + + ImportType getType() const { + return static_cast(TypeInfo & 0x3); + } + + ImportNameType getNameType() const { + return static_cast((TypeInfo & 0x1C) >> 3); + } + }; + + enum CodeViewIdentifiers { + DEBUG_SECTION_MAGIC = 0x4, + }; + + inline bool isReservedSectionNumber(int32_t SectionNumber) { + return SectionNumber <= 0; + } + +} // End namespace COFF. +} // End namespace llvm_ks. + +#endif diff --git a/llvm/include/llvm/Support/Capacity.h b/llvm/include/llvm/Support/Capacity.h new file mode 100644 index 0000000..7ef84df --- /dev/null +++ b/llvm/include/llvm/Support/Capacity.h @@ -0,0 +1,32 @@ +//===--- Capacity.h - Generic computation of ADT memory use -----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the capacity function that computes the amount of +// memory used by an ADT. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_CAPACITY_H +#define LLVM_SUPPORT_CAPACITY_H + +#include + +namespace llvm_ks { + +template +static inline size_t capacity_in_bytes(const T &x) { + // This default definition of capacity should work for things like std::vector + // and friends. More specialized versions will work for others. + return x.capacity() * sizeof(typename T::value_type); +} + +} // end namespace llvm_ks + +#endif + diff --git a/llvm/include/llvm/Support/Casting.h b/llvm/include/llvm/Support/Casting.h new file mode 100644 index 0000000..2ac89fd --- /dev/null +++ b/llvm/include/llvm/Support/Casting.h @@ -0,0 +1,326 @@ +//===-- llvm/Support/Casting.h - Allow flexible, checked, casts -*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the isa(), cast(), dyn_cast(), cast_or_null(), +// and dyn_cast_or_null() templates. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_CASTING_H +#define LLVM_SUPPORT_CASTING_H + +#include "llvm/Support/Compiler.h" +#include "llvm/Support/type_traits.h" +#include + +namespace llvm_ks { + +//===----------------------------------------------------------------------===// +// isa Support Templates +//===----------------------------------------------------------------------===// + +// Define a template that can be specialized by smart pointers to reflect the +// fact that they are automatically dereferenced, and are not involved with the +// template selection process... the default implementation is a noop. +// +template struct simplify_type { + typedef From SimpleType; // The real type this represents... + + // An accessor to get the real value... + static SimpleType &getSimplifiedValue(From &Val) { return Val; } +}; + +template struct simplify_type { + typedef typename simplify_type::SimpleType NonConstSimpleType; + typedef typename add_const_past_pointer::type + SimpleType; + typedef typename add_lvalue_reference_if_not_pointer::type + RetType; + static RetType getSimplifiedValue(const From& Val) { + return simplify_type::getSimplifiedValue(const_cast(Val)); + } +}; + +// The core of the implementation of isa is here; To and From should be +// the names of classes. This template can be specialized to customize the +// implementation of isa<> without rewriting it from scratch. +template +struct isa_impl { + static inline bool doit(const From &Val) { + return To::classof(&Val); + } +}; + +/// \brief Always allow upcasts, and perform no dynamic check for them. +template +struct isa_impl< + To, From, typename std::enable_if::value>::type> { + static inline bool doit(const From &) { return true; } +}; + +template struct isa_impl_cl { + static inline bool doit(const From &Val) { + return isa_impl::doit(Val); + } +}; + +template struct isa_impl_cl { + static inline bool doit(const From &Val) { + return isa_impl::doit(Val); + } +}; + +template struct isa_impl_cl { + static inline bool doit(const From *Val) { + assert(Val && "isa<> used on a null pointer"); + return isa_impl::doit(*Val); + } +}; + +template struct isa_impl_cl { + static inline bool doit(const From *Val) { + assert(Val && "isa<> used on a null pointer"); + return isa_impl::doit(*Val); + } +}; + +template struct isa_impl_cl { + static inline bool doit(const From *Val) { + assert(Val && "isa<> used on a null pointer"); + return isa_impl::doit(*Val); + } +}; + +template struct isa_impl_cl { + static inline bool doit(const From *Val) { + assert(Val && "isa<> used on a null pointer"); + return isa_impl::doit(*Val); + } +}; + +template +struct isa_impl_wrap { + // When From != SimplifiedType, we can simplify the type some more by using + // the simplify_type template. + static bool doit(const From &Val) { + return isa_impl_wrap::SimpleType>::doit( + simplify_type::getSimplifiedValue(Val)); + } +}; + +template +struct isa_impl_wrap { + // When From == SimpleType, we are as simple as we are going to get. + static bool doit(const FromTy &Val) { + return isa_impl_cl::doit(Val); + } +}; + +// isa - Return true if the parameter to the template is an instance of the +// template type argument. Used like this: +// +// if (isa(myVal)) { ... } +// +template +LLVM_ATTRIBUTE_UNUSED_RESULT inline bool isa(const Y &Val) { + return isa_impl_wrap::SimpleType>::doit(Val); +} + +//===----------------------------------------------------------------------===// +// cast Support Templates +//===----------------------------------------------------------------------===// + +template struct cast_retty; + + +// Calculate what type the 'cast' function should return, based on a requested +// type of To and a source type of From. +template struct cast_retty_impl { + typedef To& ret_type; // Normal case, return Ty& +}; +template struct cast_retty_impl { + typedef const To &ret_type; // Normal case, return Ty& +}; + +template struct cast_retty_impl { + typedef To* ret_type; // Pointer arg case, return Ty* +}; + +template struct cast_retty_impl { + typedef const To* ret_type; // Constant pointer arg case, return const Ty* +}; + +template struct cast_retty_impl { + typedef const To* ret_type; // Constant pointer arg case, return const Ty* +}; + + +template +struct cast_retty_wrap { + // When the simplified type and the from type are not the same, use the type + // simplifier to reduce the type, then reuse cast_retty_impl to get the + // resultant type. + typedef typename cast_retty::ret_type ret_type; +}; + +template +struct cast_retty_wrap { + // When the simplified type is equal to the from type, use it directly. + typedef typename cast_retty_impl::ret_type ret_type; +}; + +template +struct cast_retty { + typedef typename cast_retty_wrap::SimpleType>::ret_type ret_type; +}; + +// Ensure the non-simple values are converted using the simplify_type template +// that may be specialized by smart pointers... +// +template struct cast_convert_val { + // This is not a simple type, use the template to simplify it... + static typename cast_retty::ret_type doit(From &Val) { + return cast_convert_val::SimpleType>::doit( + simplify_type::getSimplifiedValue(Val)); + } +}; + +template struct cast_convert_val { + // This _is_ a simple type, just cast it. + static typename cast_retty::ret_type doit(const FromTy &Val) { + typename cast_retty::ret_type Res2 + = (typename cast_retty::ret_type)const_cast(Val); + return Res2; + } +}; + +template struct is_simple_type { + static const bool value = + std::is_same::SimpleType>::value; +}; + +// cast - Return the argument parameter cast to the specified type. This +// casting operator asserts that the type is correct, so it does not return null +// on failure. It does not allow a null argument (use cast_or_null for that). +// It is typically used like this: +// +// cast(myVal)->getParent() +// +template +inline typename std::enable_if::value, + typename cast_retty::ret_type>::type +cast(const Y &Val) { + assert(isa(Val) && "cast() argument of incompatible type!"); + return cast_convert_val< + X, const Y, typename simplify_type::SimpleType>::doit(Val); +} + +template +inline typename cast_retty::ret_type cast(Y &Val) { + assert(isa(Val) && "cast() argument of incompatible type!"); + return cast_convert_val::SimpleType>::doit(Val); +} + +template +inline typename cast_retty::ret_type cast(Y *Val) { + assert(isa(Val) && "cast() argument of incompatible type!"); + return cast_convert_val::SimpleType>::doit(Val); +} + +// cast_or_null - Functionally identical to cast, except that a null value is +// accepted. +// +template +LLVM_ATTRIBUTE_UNUSED_RESULT inline typename std::enable_if< + !is_simple_type::value, typename cast_retty::ret_type>::type +cast_or_null(const Y &Val) { + if (!Val) + return nullptr; + assert(isa(Val) && "cast_or_null() argument of incompatible type!"); + return cast(Val); +} + +template +LLVM_ATTRIBUTE_UNUSED_RESULT inline typename std::enable_if< + !is_simple_type::value, typename cast_retty::ret_type>::type +cast_or_null(Y &Val) { + if (!Val) + return nullptr; + assert(isa(Val) && "cast_or_null() argument of incompatible type!"); + return cast(Val); +} + +template +LLVM_ATTRIBUTE_UNUSED_RESULT inline typename cast_retty::ret_type +cast_or_null(Y *Val) { + if (!Val) return nullptr; + assert(isa(Val) && "cast_or_null() argument of incompatible type!"); + return cast(Val); +} + + +// dyn_cast - Return the argument parameter cast to the specified type. This +// casting operator returns null if the argument is of the wrong type, so it can +// be used to test for a type as well as cast if successful. This should be +// used in the context of an if statement like this: +// +// if (const Instruction *I = dyn_cast(myVal)) { ... } +// + +template +LLVM_ATTRIBUTE_UNUSED_RESULT inline typename std::enable_if< + !is_simple_type::value, typename cast_retty::ret_type>::type +dyn_cast(const Y &Val) { + return isa(Val) ? cast(Val) : nullptr; +} + +template +LLVM_ATTRIBUTE_UNUSED_RESULT inline typename cast_retty::ret_type +dyn_cast(Y &Val) { + return isa(Val) ? cast(Val) : nullptr; +} + +template +LLVM_ATTRIBUTE_UNUSED_RESULT inline typename cast_retty::ret_type +dyn_cast(Y *Val) { + return isa(Val) ? cast(Val) : nullptr; +} + +// dyn_cast_or_null - Functionally identical to dyn_cast, except that a null +// value is accepted. +// +template +LLVM_ATTRIBUTE_UNUSED_RESULT inline typename std::enable_if< + !is_simple_type::value, typename cast_retty::ret_type>::type +dyn_cast_or_null(const Y &Val) { + return (Val && isa(Val)) ? cast(Val) : nullptr; +} + +template +LLVM_ATTRIBUTE_UNUSED_RESULT inline typename std::enable_if< + !is_simple_type::value, typename cast_retty::ret_type>::type +dyn_cast_or_null(Y &Val) { + return (Val && isa(Val)) ? cast(Val) : nullptr; +} + +template +LLVM_ATTRIBUTE_UNUSED_RESULT inline typename cast_retty::ret_type +dyn_cast_or_null(Y *Val) { + return (Val && isa(Val)) ? cast(Val) : nullptr; +} + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/Support/Compiler.h b/llvm/include/llvm/Support/Compiler.h new file mode 100644 index 0000000..b3416bb --- /dev/null +++ b/llvm/include/llvm/Support/Compiler.h @@ -0,0 +1,448 @@ +//===-- llvm/Support/Compiler.h - Compiler abstraction support --*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines several macros, based on the current compiler. This allows +// use of compiler-specific features in a way that remains portable. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_COMPILER_H +#define LLVM_SUPPORT_COMPILER_H + +#include "llvm/Config/llvm-config.h" + +#ifndef __has_feature +# define __has_feature(x) 0 +#endif + +#ifndef __has_extension +# define __has_extension(x) 0 +#endif + +#ifndef __has_attribute +# define __has_attribute(x) 0 +#endif + +#ifndef __has_builtin +# define __has_builtin(x) 0 +#endif + +/// \macro LLVM_GNUC_PREREQ +/// \brief Extend the default __GNUC_PREREQ even if glibc's features.h isn't +/// available. +#ifndef LLVM_GNUC_PREREQ +# if defined(__GNUC__) && defined(__GNUC_MINOR__) && defined(__GNUC_PATCHLEVEL__) +# define LLVM_GNUC_PREREQ(maj, min, patch) \ + ((__GNUC__ << 20) + (__GNUC_MINOR__ << 10) + __GNUC_PATCHLEVEL__ >= \ + ((maj) << 20) + ((min) << 10) + (patch)) +# elif defined(__GNUC__) && defined(__GNUC_MINOR__) +# define LLVM_GNUC_PREREQ(maj, min, patch) \ + ((__GNUC__ << 20) + (__GNUC_MINOR__ << 10) >= ((maj) << 20) + ((min) << 10)) +# else +# define LLVM_GNUC_PREREQ(maj, min, patch) 0 +# endif +#endif + +/// \macro LLVM_MSC_PREREQ +/// \brief Is the compiler MSVC of at least the specified version? +/// The common \param version values to check for are: +/// * 1800: Microsoft Visual Studio 2013 / 12.0 +/// * 1900: Microsoft Visual Studio 2015 / 14.0 +#ifdef _MSC_VER +#define LLVM_MSC_PREREQ(version) (_MSC_VER >= (version)) + +// We require at least MSVC 2013. +#if !LLVM_MSC_PREREQ(1800) +#error LLVM requires at least MSVC 2013. +#endif + +#else +#define LLVM_MSC_PREREQ(version) 0 +#endif + +#if !defined(_MSC_VER) || defined(__clang__) || LLVM_MSC_PREREQ(1900) +#define LLVM_NOEXCEPT noexcept +#else +#define LLVM_NOEXCEPT throw() +#endif + +/// \brief Does the compiler support ref-qualifiers for *this? +/// +/// Sadly, this is separate from just rvalue reference support because GCC +/// and MSVC implemented this later than everything else. +#if __has_feature(cxx_rvalue_references) || LLVM_GNUC_PREREQ(4, 8, 1) +#define LLVM_HAS_RVALUE_REFERENCE_THIS 1 +#else +#define LLVM_HAS_RVALUE_REFERENCE_THIS 0 +#endif + +/// Expands to '&' if ref-qualifiers for *this are supported. +/// +/// This can be used to provide lvalue/rvalue overrides of member functions. +/// The rvalue override should be guarded by LLVM_HAS_RVALUE_REFERENCE_THIS +#if LLVM_HAS_RVALUE_REFERENCE_THIS +#define LLVM_LVALUE_FUNCTION & +#else +#define LLVM_LVALUE_FUNCTION +#endif + +#if __has_feature(cxx_constexpr) || defined(__GXX_EXPERIMENTAL_CXX0X__) +# define LLVM_CONSTEXPR constexpr +#else +# define LLVM_CONSTEXPR +#endif + +/// LLVM_LIBRARY_VISIBILITY - If a class marked with this attribute is linked +/// into a shared library, then the class should be private to the library and +/// not accessible from outside it. Can also be used to mark variables and +/// functions, making them private to any shared library they are linked into. +/// On PE/COFF targets, library visibility is the default, so this isn't needed. +#if (__has_attribute(visibility) || LLVM_GNUC_PREREQ(4, 0, 0)) && \ + !defined(__MINGW32__) && !defined(__CYGWIN__) && !defined(LLVM_ON_WIN32) +#define LLVM_LIBRARY_VISIBILITY __attribute__ ((visibility("hidden"))) +#else +#define LLVM_LIBRARY_VISIBILITY +#endif + +#if __has_attribute(sentinel) || LLVM_GNUC_PREREQ(3, 0, 0) +#define LLVM_END_WITH_NULL __attribute__((sentinel)) +#else +#define LLVM_END_WITH_NULL +#endif + +#if __has_attribute(used) || LLVM_GNUC_PREREQ(3, 1, 0) +#define LLVM_ATTRIBUTE_USED __attribute__((__used__)) +#else +#define LLVM_ATTRIBUTE_USED +#endif + +#if __has_attribute(warn_unused_result) || LLVM_GNUC_PREREQ(3, 4, 0) +#define LLVM_ATTRIBUTE_UNUSED_RESULT __attribute__((__warn_unused_result__)) +#else +#define LLVM_ATTRIBUTE_UNUSED_RESULT +#endif + +// Some compilers warn about unused functions. When a function is sometimes +// used or not depending on build settings (e.g. a function only called from +// within "assert"), this attribute can be used to suppress such warnings. +// +// However, it shouldn't be used for unused *variables*, as those have a much +// more portable solution: +// (void)unused_var_name; +// Prefer cast-to-void wherever it is sufficient. +#if __has_attribute(unused) || LLVM_GNUC_PREREQ(3, 1, 0) +#define LLVM_ATTRIBUTE_UNUSED __attribute__((__unused__)) +#else +#define LLVM_ATTRIBUTE_UNUSED +#endif + +// FIXME: Provide this for PE/COFF targets. +#if (__has_attribute(weak) || LLVM_GNUC_PREREQ(4, 0, 0)) && \ + (!defined(__MINGW32__) && !defined(__CYGWIN__) && !defined(LLVM_ON_WIN32)) +#define LLVM_ATTRIBUTE_WEAK __attribute__((__weak__)) +#else +#define LLVM_ATTRIBUTE_WEAK +#endif + +// Prior to clang 3.2, clang did not accept any spelling of +// __has_attribute(const), so assume it is supported. +#if defined(__clang__) || defined(__GNUC__) +// aka 'CONST' but following LLVM Conventions. +#define LLVM_READNONE __attribute__((__const__)) +#else +#define LLVM_READNONE +#endif + +#if __has_attribute(pure) || defined(__GNUC__) +// aka 'PURE' but following LLVM Conventions. +#define LLVM_READONLY __attribute__((__pure__)) +#else +#define LLVM_READONLY +#endif + +#if __has_builtin(__builtin_expect) || LLVM_GNUC_PREREQ(4, 0, 0) +#define LLVM_LIKELY(EXPR) __builtin_expect((bool)(EXPR), true) +#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false) +#else +#define LLVM_LIKELY(EXPR) (EXPR) +#define LLVM_UNLIKELY(EXPR) (EXPR) +#endif + +/// LLVM_ATTRIBUTE_NOINLINE - On compilers where we have a directive to do so, +/// mark a method "not for inlining". +#if __has_attribute(noinline) || LLVM_GNUC_PREREQ(3, 4, 0) +#define LLVM_ATTRIBUTE_NOINLINE __attribute__((noinline)) +#elif defined(_MSC_VER) +#define LLVM_ATTRIBUTE_NOINLINE __declspec(noinline) +#else +#define LLVM_ATTRIBUTE_NOINLINE +#endif + +/// LLVM_ATTRIBUTE_ALWAYS_INLINE - On compilers where we have a directive to do +/// so, mark a method "always inline" because it is performance sensitive. GCC +/// 3.4 supported this but is buggy in various cases and produces unimplemented +/// errors, just use it in GCC 4.0 and later. +#if __has_attribute(always_inline) || LLVM_GNUC_PREREQ(4, 0, 0) +#define LLVM_ATTRIBUTE_ALWAYS_INLINE __attribute__((always_inline)) +#elif defined(_MSC_VER) +#define LLVM_ATTRIBUTE_ALWAYS_INLINE __forceinline +#else +#define LLVM_ATTRIBUTE_ALWAYS_INLINE +#endif + +#ifdef __GNUC__ +#define LLVM_ATTRIBUTE_NORETURN __attribute__((noreturn)) +#elif defined(_MSC_VER) +#define LLVM_ATTRIBUTE_NORETURN __declspec(noreturn) +#else +#define LLVM_ATTRIBUTE_NORETURN +#endif + +#if __has_attribute(returns_nonnull) || LLVM_GNUC_PREREQ(4, 9, 0) +#define LLVM_ATTRIBUTE_RETURNS_NONNULL __attribute__((returns_nonnull)) +#else +#define LLVM_ATTRIBUTE_RETURNS_NONNULL +#endif + +/// \macro LLVM_ATTRIBUTE_RETURNS_NOALIAS Used to mark a function as returning a +/// pointer that does not alias any other valid pointer. +#ifdef __GNUC__ +#define LLVM_ATTRIBUTE_RETURNS_NOALIAS __attribute__((__malloc__)) +#elif defined(_MSC_VER) +#define LLVM_ATTRIBUTE_RETURNS_NOALIAS __declspec(restrict) +#else +#define LLVM_ATTRIBUTE_RETURNS_NOALIAS +#endif + +/// LLVM_EXTENSION - Support compilers where we have a keyword to suppress +/// pedantic diagnostics. +#ifdef __GNUC__ +#define LLVM_EXTENSION __extension__ +#else +#define LLVM_EXTENSION +#endif + +// LLVM_ATTRIBUTE_DEPRECATED(decl, "message") +#if __has_feature(attribute_deprecated_with_message) +# define LLVM_ATTRIBUTE_DEPRECATED(decl, message) \ + decl __attribute__((deprecated(message))) +#elif defined(__GNUC__) +# define LLVM_ATTRIBUTE_DEPRECATED(decl, message) \ + decl __attribute__((deprecated)) +#elif defined(_MSC_VER) +# define LLVM_ATTRIBUTE_DEPRECATED(decl, message) \ + __declspec(deprecated(message)) decl +#else +# define LLVM_ATTRIBUTE_DEPRECATED(decl, message) \ + decl +#endif + +/// LLVM_BUILTIN_UNREACHABLE - On compilers which support it, expands +/// to an expression which states that it is undefined behavior for the +/// compiler to reach this point. Otherwise is not defined. +#if __has_builtin(__builtin_unreachable) || LLVM_GNUC_PREREQ(4, 5, 0) +# define LLVM_BUILTIN_UNREACHABLE __builtin_unreachable() +#elif defined(_MSC_VER) +# define LLVM_BUILTIN_UNREACHABLE __assume(false) +#endif + +/// LLVM_BUILTIN_TRAP - On compilers which support it, expands to an expression +/// which causes the program to exit abnormally. +#if __has_builtin(__builtin_trap) || LLVM_GNUC_PREREQ(4, 3, 0) +# define LLVM_BUILTIN_TRAP __builtin_trap() +#elif defined(_MSC_VER) +// The __debugbreak intrinsic is supported by MSVC, does not require forward +// declarations involving platform-specific typedefs (unlike RaiseException), +// results in a call to vectored exception handlers, and encodes to a short +// instruction that still causes the trapping behavior we want. +# define LLVM_BUILTIN_TRAP __debugbreak() +#else +# define LLVM_BUILTIN_TRAP *(volatile int*)0x11 = 0 +#endif + +/// \macro LLVM_ASSUME_ALIGNED +/// \brief Returns a pointer with an assumed alignment. +#if __has_builtin(__builtin_assume_aligned) || LLVM_GNUC_PREREQ(4, 7, 0) +# define LLVM_ASSUME_ALIGNED(p, a) __builtin_assume_aligned(p, a) +#elif defined(LLVM_BUILTIN_UNREACHABLE) +// As of today, clang does not support __builtin_assume_aligned. +# define LLVM_ASSUME_ALIGNED(p, a) \ + (((uintptr_t(p) % (a)) == 0) ? (p) : (LLVM_BUILTIN_UNREACHABLE, (p))) +#else +# define LLVM_ASSUME_ALIGNED(p, a) (p) +#endif + +/// \macro LLVM_ALIGNAS +/// \brief Used to specify a minimum alignment for a structure or variable. The +/// alignment must be a constant integer. Use LLVM_PTR_SIZE to compute +/// alignments in terms of the size of a pointer. +/// +/// Note that __declspec(align) has special quirks, it's not legal to pass a +/// structure with __declspec(align) as a formal parameter. +#ifdef _MSC_VER +# define LLVM_ALIGNAS(x) __declspec(align(x)) +#elif __GNUC__ && !__has_feature(cxx_alignas) && !LLVM_GNUC_PREREQ(4, 8, 0) +# define LLVM_ALIGNAS(x) __attribute__((aligned(x))) +#else +# define LLVM_ALIGNAS(x) alignas(x) +#endif + +/// \macro LLVM_PACKED +/// \brief Used to specify a packed structure. +/// LLVM_PACKED( +/// struct A { +/// int i; +/// int j; +/// int k; +/// long long l; +/// }); +/// +/// LLVM_PACKED_START +/// struct B { +/// int i; +/// int j; +/// int k; +/// long long l; +/// }; +/// LLVM_PACKED_END +#ifdef _MSC_VER +# define LLVM_PACKED(d) __pragma(pack(push, 1)) d __pragma(pack(pop)) +# define LLVM_PACKED_START __pragma(pack(push, 1)) +# define LLVM_PACKED_END __pragma(pack(pop)) +#else +# define LLVM_PACKED(d) d __attribute__((packed)) +# define LLVM_PACKED_START _Pragma("pack(push, 1)") +# define LLVM_PACKED_END _Pragma("pack(pop)") +#endif + +/// \macro LLVM_PTR_SIZE +/// \brief A constant integer equivalent to the value of sizeof(void*). +/// Generally used in combination with LLVM_ALIGNAS or when doing computation in +/// the preprocessor. +#ifdef __SIZEOF_POINTER__ +# define LLVM_PTR_SIZE __SIZEOF_POINTER__ +#elif defined(_WIN64) +# define LLVM_PTR_SIZE 8 +#elif defined(_WIN32) +# define LLVM_PTR_SIZE 4 +#elif defined(_MSC_VER) +# error "could not determine LLVM_PTR_SIZE as a constant int for MSVC" +#else +# define LLVM_PTR_SIZE sizeof(void *) +#endif + +/// \macro LLVM_FUNCTION_NAME +/// \brief Expands to __func__ on compilers which support it. Otherwise, +/// expands to a compiler-dependent replacement. +#if defined(_MSC_VER) +# define LLVM_FUNCTION_NAME __FUNCTION__ +#else +# define LLVM_FUNCTION_NAME __func__ +#endif + +/// \macro LLVM_MEMORY_SANITIZER_BUILD +/// \brief Whether LLVM itself is built with MemorySanitizer instrumentation. +#if __has_feature(memory_sanitizer) +# define LLVM_MEMORY_SANITIZER_BUILD 1 +# include +#else +# define LLVM_MEMORY_SANITIZER_BUILD 0 +# define __msan_allocated_memory(p, size) +# define __msan_unpoison(p, size) +#endif + +/// \macro LLVM_ADDRESS_SANITIZER_BUILD +/// \brief Whether LLVM itself is built with AddressSanitizer instrumentation. +#if __has_feature(address_sanitizer) || defined(__SANITIZE_ADDRESS__) +# define LLVM_ADDRESS_SANITIZER_BUILD 1 +# include +#else +# define LLVM_ADDRESS_SANITIZER_BUILD 0 +# define __asan_poison_memory_region(p, size) +# define __asan_unpoison_memory_region(p, size) +#endif + +/// \macro LLVM_THREAD_SANITIZER_BUILD +/// \brief Whether LLVM itself is built with ThreadSanitizer instrumentation. +#if __has_feature(thread_sanitizer) || defined(__SANITIZE_THREAD__) +# define LLVM_THREAD_SANITIZER_BUILD 1 +#else +# define LLVM_THREAD_SANITIZER_BUILD 0 +#endif + +#if LLVM_THREAD_SANITIZER_BUILD +// Thread Sanitizer is a tool that finds races in code. +// See http://code.google.com/p/data-race-test/wiki/DynamicAnnotations . +// tsan detects these exact functions by name. +extern "C" { +void AnnotateHappensAfter(const char *file, int line, const volatile void *cv); +void AnnotateHappensBefore(const char *file, int line, const volatile void *cv); +void AnnotateIgnoreWritesBegin(const char *file, int line); +void AnnotateIgnoreWritesEnd(const char *file, int line); +} + +// This marker is used to define a happens-before arc. The race detector will +// infer an arc from the begin to the end when they share the same pointer +// argument. +# define TsanHappensBefore(cv) AnnotateHappensBefore(__FILE__, __LINE__, cv) + +// This marker defines the destination of a happens-before arc. +# define TsanHappensAfter(cv) AnnotateHappensAfter(__FILE__, __LINE__, cv) + +// Ignore any races on writes between here and the next TsanIgnoreWritesEnd. +# define TsanIgnoreWritesBegin() AnnotateIgnoreWritesBegin(__FILE__, __LINE__) + +// Resume checking for racy writes. +# define TsanIgnoreWritesEnd() AnnotateIgnoreWritesEnd(__FILE__, __LINE__) +#else +# define TsanHappensBefore(cv) +# define TsanHappensAfter(cv) +# define TsanIgnoreWritesBegin() +# define TsanIgnoreWritesEnd() +#endif + +/// \brief Mark debug helper function definitions like dump() that should not be +/// stripped from debug builds. +// FIXME: Move this to a private config.h as it's not usable in public headers. +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +#define LLVM_DUMP_METHOD LLVM_ATTRIBUTE_NOINLINE LLVM_ATTRIBUTE_USED +#else +#define LLVM_DUMP_METHOD LLVM_ATTRIBUTE_NOINLINE +#endif + +/// \macro LLVM_THREAD_LOCAL +/// \brief A thread-local storage specifier which can be used with globals, +/// extern globals, and static globals. +/// +/// This is essentially an extremely restricted analog to C++11's thread_local +/// support, and uses that when available. However, it falls back on +/// platform-specific or vendor-provided extensions when necessary. These +/// extensions don't support many of the C++11 thread_local's features. You +/// should only use this for PODs that you can statically initialize to +/// some constant value. In almost all circumstances this is most appropriate +/// for use with a pointer, integer, or small aggregation of pointers and +/// integers. +#if LLVM_ENABLE_THREADS +#if __has_feature(cxx_thread_local) +#define LLVM_THREAD_LOCAL thread_local +#elif defined(_MSC_VER) +// MSVC supports this with a __declspec. +#define LLVM_THREAD_LOCAL __declspec(thread) +#else +// Clang, GCC, and other compatible compilers used __thread prior to C++11 and +// we only need the restricted functionality that provides. +#define LLVM_THREAD_LOCAL __thread +#endif +#else // !LLVM_ENABLE_THREADS +// If threading is disabled entirely, this compiles to nothing and you get +// a normal global variable. +#define LLVM_THREAD_LOCAL +#endif + +#endif diff --git a/llvm/include/llvm/Support/DataExtractor.h b/llvm/include/llvm/Support/DataExtractor.h new file mode 100644 index 0000000..f50eb38 --- /dev/null +++ b/llvm/include/llvm/Support/DataExtractor.h @@ -0,0 +1,365 @@ +//===-- DataExtractor.h -----------------------------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_DATAEXTRACTOR_H +#define LLVM_SUPPORT_DATAEXTRACTOR_H + +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/DataTypes.h" + +namespace llvm_ks { +class DataExtractor { + StringRef Data; + uint8_t IsLittleEndian; + uint8_t AddressSize; +public: + /// Construct with a buffer that is owned by the caller. + /// + /// This constructor allows us to use data that is owned by the + /// caller. The data must stay around as long as this object is + /// valid. + DataExtractor(StringRef Data, bool IsLittleEndian, uint8_t AddressSize) + : Data(Data), IsLittleEndian(IsLittleEndian), AddressSize(AddressSize) {} + + /// \brief Get the data pointed to by this extractor. + StringRef getData() const { return Data; } + /// \brief Get the endianess for this extractor. + bool isLittleEndian() const { return IsLittleEndian; } + /// \brief Get the address size for this extractor. + uint8_t getAddressSize() const { return AddressSize; } + /// \brief Set the address size for this extractor. + void setAddressSize(uint8_t Size) { AddressSize = Size; } + + /// Extract a C string from \a *offset_ptr. + /// + /// Returns a pointer to a C String from the data at the offset + /// pointed to by \a offset_ptr. A variable length NULL terminated C + /// string will be extracted and the \a offset_ptr will be + /// updated with the offset of the byte that follows the NULL + /// terminator byte. + /// + /// @param[in,out] offset_ptr + /// A pointer to an offset within the data that will be advanced + /// by the appropriate number of bytes if the value is extracted + /// correctly. If the offset is out of bounds or there are not + /// enough bytes to extract this value, the offset will be left + /// unmodified. + /// + /// @return + /// A pointer to the C string value in the data. If the offset + /// pointed to by \a offset_ptr is out of bounds, or if the + /// offset plus the length of the C string is out of bounds, + /// NULL will be returned. + const char *getCStr(uint32_t *offset_ptr) const; + + /// Extract an unsigned integer of size \a byte_size from \a + /// *offset_ptr. + /// + /// Extract a single unsigned integer value and update the offset + /// pointed to by \a offset_ptr. The size of the extracted integer + /// is specified by the \a byte_size argument. \a byte_size should + /// have a value greater than or equal to one and less than or equal + /// to eight since the return value is 64 bits wide. Any + /// \a byte_size values less than 1 or greater than 8 will result in + /// nothing being extracted, and zero being returned. + /// + /// @param[in,out] offset_ptr + /// A pointer to an offset within the data that will be advanced + /// by the appropriate number of bytes if the value is extracted + /// correctly. If the offset is out of bounds or there are not + /// enough bytes to extract this value, the offset will be left + /// unmodified. + /// + /// @param[in] byte_size + /// The size in byte of the integer to extract. + /// + /// @return + /// The unsigned integer value that was extracted, or zero on + /// failure. + uint64_t getUnsigned(uint32_t *offset_ptr, uint32_t byte_size) const; + + /// Extract an signed integer of size \a byte_size from \a *offset_ptr. + /// + /// Extract a single signed integer value (sign extending if required) + /// and update the offset pointed to by \a offset_ptr. The size of + /// the extracted integer is specified by the \a byte_size argument. + /// \a byte_size should have a value greater than or equal to one + /// and less than or equal to eight since the return value is 64 + /// bits wide. Any \a byte_size values less than 1 or greater than + /// 8 will result in nothing being extracted, and zero being returned. + /// + /// @param[in,out] offset_ptr + /// A pointer to an offset within the data that will be advanced + /// by the appropriate number of bytes if the value is extracted + /// correctly. If the offset is out of bounds or there are not + /// enough bytes to extract this value, the offset will be left + /// unmodified. + /// + /// @param[in] size + /// The size in bytes of the integer to extract. + /// + /// @return + /// The sign extended signed integer value that was extracted, + /// or zero on failure. + int64_t getSigned(uint32_t *offset_ptr, uint32_t size) const; + + //------------------------------------------------------------------ + /// Extract an pointer from \a *offset_ptr. + /// + /// Extract a single pointer from the data and update the offset + /// pointed to by \a offset_ptr. The size of the extracted pointer + /// is \a getAddressSize(), so the address size has to be + /// set correctly prior to extracting any pointer values. + /// + /// @param[in,out] offset_ptr + /// A pointer to an offset within the data that will be advanced + /// by the appropriate number of bytes if the value is extracted + /// correctly. If the offset is out of bounds or there are not + /// enough bytes to extract this value, the offset will be left + /// unmodified. + /// + /// @return + /// The extracted pointer value as a 64 integer. + uint64_t getAddress(uint32_t *offset_ptr) const { + return getUnsigned(offset_ptr, AddressSize); + } + + /// Extract a uint8_t value from \a *offset_ptr. + /// + /// Extract a single uint8_t from the binary data at the offset + /// pointed to by \a offset_ptr, and advance the offset on success. + /// + /// @param[in,out] offset_ptr + /// A pointer to an offset within the data that will be advanced + /// by the appropriate number of bytes if the value is extracted + /// correctly. If the offset is out of bounds or there are not + /// enough bytes to extract this value, the offset will be left + /// unmodified. + /// + /// @return + /// The extracted uint8_t value. + uint8_t getU8(uint32_t *offset_ptr) const; + + /// Extract \a count uint8_t values from \a *offset_ptr. + /// + /// Extract \a count uint8_t values from the binary data at the + /// offset pointed to by \a offset_ptr, and advance the offset on + /// success. The extracted values are copied into \a dst. + /// + /// @param[in,out] offset_ptr + /// A pointer to an offset within the data that will be advanced + /// by the appropriate number of bytes if the value is extracted + /// correctly. If the offset is out of bounds or there are not + /// enough bytes to extract this value, the offset will be left + /// unmodified. + /// + /// @param[out] dst + /// A buffer to copy \a count uint8_t values into. \a dst must + /// be large enough to hold all requested data. + /// + /// @param[in] count + /// The number of uint8_t values to extract. + /// + /// @return + /// \a dst if all values were properly extracted and copied, + /// NULL otherise. + uint8_t *getU8(uint32_t *offset_ptr, uint8_t *dst, uint32_t count) const; + + //------------------------------------------------------------------ + /// Extract a uint16_t value from \a *offset_ptr. + /// + /// Extract a single uint16_t from the binary data at the offset + /// pointed to by \a offset_ptr, and update the offset on success. + /// + /// @param[in,out] offset_ptr + /// A pointer to an offset within the data that will be advanced + /// by the appropriate number of bytes if the value is extracted + /// correctly. If the offset is out of bounds or there are not + /// enough bytes to extract this value, the offset will be left + /// unmodified. + /// + /// @return + /// The extracted uint16_t value. + //------------------------------------------------------------------ + uint16_t getU16(uint32_t *offset_ptr) const; + + /// Extract \a count uint16_t values from \a *offset_ptr. + /// + /// Extract \a count uint16_t values from the binary data at the + /// offset pointed to by \a offset_ptr, and advance the offset on + /// success. The extracted values are copied into \a dst. + /// + /// @param[in,out] offset_ptr + /// A pointer to an offset within the data that will be advanced + /// by the appropriate number of bytes if the value is extracted + /// correctly. If the offset is out of bounds or there are not + /// enough bytes to extract this value, the offset will be left + /// unmodified. + /// + /// @param[out] dst + /// A buffer to copy \a count uint16_t values into. \a dst must + /// be large enough to hold all requested data. + /// + /// @param[in] count + /// The number of uint16_t values to extract. + /// + /// @return + /// \a dst if all values were properly extracted and copied, + /// NULL otherise. + uint16_t *getU16(uint32_t *offset_ptr, uint16_t *dst, uint32_t count) const; + + /// Extract a uint32_t value from \a *offset_ptr. + /// + /// Extract a single uint32_t from the binary data at the offset + /// pointed to by \a offset_ptr, and update the offset on success. + /// + /// @param[in,out] offset_ptr + /// A pointer to an offset within the data that will be advanced + /// by the appropriate number of bytes if the value is extracted + /// correctly. If the offset is out of bounds or there are not + /// enough bytes to extract this value, the offset will be left + /// unmodified. + /// + /// @return + /// The extracted uint32_t value. + uint32_t getU32(uint32_t *offset_ptr) const; + + /// Extract \a count uint32_t values from \a *offset_ptr. + /// + /// Extract \a count uint32_t values from the binary data at the + /// offset pointed to by \a offset_ptr, and advance the offset on + /// success. The extracted values are copied into \a dst. + /// + /// @param[in,out] offset_ptr + /// A pointer to an offset within the data that will be advanced + /// by the appropriate number of bytes if the value is extracted + /// correctly. If the offset is out of bounds or there are not + /// enough bytes to extract this value, the offset will be left + /// unmodified. + /// + /// @param[out] dst + /// A buffer to copy \a count uint32_t values into. \a dst must + /// be large enough to hold all requested data. + /// + /// @param[in] count + /// The number of uint32_t values to extract. + /// + /// @return + /// \a dst if all values were properly extracted and copied, + /// NULL otherise. + uint32_t *getU32(uint32_t *offset_ptr, uint32_t *dst, uint32_t count) const; + + /// Extract a uint64_t value from \a *offset_ptr. + /// + /// Extract a single uint64_t from the binary data at the offset + /// pointed to by \a offset_ptr, and update the offset on success. + /// + /// @param[in,out] offset_ptr + /// A pointer to an offset within the data that will be advanced + /// by the appropriate number of bytes if the value is extracted + /// correctly. If the offset is out of bounds or there are not + /// enough bytes to extract this value, the offset will be left + /// unmodified. + /// + /// @return + /// The extracted uint64_t value. + uint64_t getU64(uint32_t *offset_ptr) const; + + /// Extract \a count uint64_t values from \a *offset_ptr. + /// + /// Extract \a count uint64_t values from the binary data at the + /// offset pointed to by \a offset_ptr, and advance the offset on + /// success. The extracted values are copied into \a dst. + /// + /// @param[in,out] offset_ptr + /// A pointer to an offset within the data that will be advanced + /// by the appropriate number of bytes if the value is extracted + /// correctly. If the offset is out of bounds or there are not + /// enough bytes to extract this value, the offset will be left + /// unmodified. + /// + /// @param[out] dst + /// A buffer to copy \a count uint64_t values into. \a dst must + /// be large enough to hold all requested data. + /// + /// @param[in] count + /// The number of uint64_t values to extract. + /// + /// @return + /// \a dst if all values were properly extracted and copied, + /// NULL otherise. + uint64_t *getU64(uint32_t *offset_ptr, uint64_t *dst, uint32_t count) const; + + /// Extract a signed LEB128 value from \a *offset_ptr. + /// + /// Extracts an signed LEB128 number from this object's data + /// starting at the offset pointed to by \a offset_ptr. The offset + /// pointed to by \a offset_ptr will be updated with the offset of + /// the byte following the last extracted byte. + /// + /// @param[in,out] offset_ptr + /// A pointer to an offset within the data that will be advanced + /// by the appropriate number of bytes if the value is extracted + /// correctly. If the offset is out of bounds or there are not + /// enough bytes to extract this value, the offset will be left + /// unmodified. + /// + /// @return + /// The extracted signed integer value. + int64_t getSLEB128(uint32_t *offset_ptr) const; + + /// Extract a unsigned LEB128 value from \a *offset_ptr. + /// + /// Extracts an unsigned LEB128 number from this object's data + /// starting at the offset pointed to by \a offset_ptr. The offset + /// pointed to by \a offset_ptr will be updated with the offset of + /// the byte following the last extracted byte. + /// + /// @param[in,out] offset_ptr + /// A pointer to an offset within the data that will be advanced + /// by the appropriate number of bytes if the value is extracted + /// correctly. If the offset is out of bounds or there are not + /// enough bytes to extract this value, the offset will be left + /// unmodified. + /// + /// @return + /// The extracted unsigned integer value. + uint64_t getULEB128(uint32_t *offset_ptr) const; + + /// Test the validity of \a offset. + /// + /// @return + /// \b true if \a offset is a valid offset into the data in this + /// object, \b false otherwise. + bool isValidOffset(uint32_t offset) const { return Data.size() > offset; } + + /// Test the availability of \a length bytes of data from \a offset. + /// + /// @return + /// \b true if \a offset is a valid offset and there are \a + /// length bytes available at that offset, \b false otherwise. + bool isValidOffsetForDataOfSize(uint32_t offset, uint32_t length) const { + return offset + length >= offset && isValidOffset(offset + length - 1); + } + + /// Test the availability of enough bytes of data for a pointer from + /// \a offset. The size of a pointer is \a getAddressSize(). + /// + /// @return + /// \b true if \a offset is a valid offset and there are enough + /// bytes for a pointer available at that offset, \b false + /// otherwise. + bool isValidOffsetForAddress(uint32_t offset) const { + return isValidOffsetForDataOfSize(offset, AddressSize); + } +}; + +} // namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/Support/DataTypes.h.cmake b/llvm/include/llvm/Support/DataTypes.h.cmake new file mode 100644 index 0000000..cccd0bc --- /dev/null +++ b/llvm/include/llvm/Support/DataTypes.h.cmake @@ -0,0 +1,130 @@ +/*===-- include/Support/DataTypes.h - Define fixed size types -----*- C -*-===*\ +|* *| +|* The LLVM Compiler Infrastructure *| +|* *| +|* This file is distributed under the University of Illinois Open Source *| +|* License. See LICENSE.TXT for details. *| +|* *| +|*===----------------------------------------------------------------------===*| +|* *| +|* This file contains definitions to figure out the size of _HOST_ data types.*| +|* This file is important because different host OS's define different macros,*| +|* which makes portability tough. This file exports the following *| +|* definitions: *| +|* *| +|* [u]int(32|64)_t : typedefs for signed and unsigned 32/64 bit system types*| +|* [U]INT(8|16|32|64)_(MIN|MAX) : Constants for the min and max values. *| +|* *| +|* No library is required when using these functions. *| +|* *| +|*===----------------------------------------------------------------------===*/ + +/* Please leave this file C-compatible. */ + +#ifndef SUPPORT_DATATYPES_H +#define SUPPORT_DATATYPES_H + +#cmakedefine HAVE_INTTYPES_H ${HAVE_INTTYPES_H} +#cmakedefine HAVE_STDINT_H ${HAVE_STDINT_H} +#cmakedefine HAVE_UINT64_T ${HAVE_UINT64_T} +#cmakedefine HAVE_U_INT64_T ${HAVE_U_INT64_T} + +#ifdef __cplusplus +#include +#else +#include +#endif + +#ifdef HAVE_INTTYPES_H +#include +#endif + +#ifdef HAVE_STDINT_H +#include +#else +#error "Compiler must provide an implementation of stdint.h" +#endif + +#ifndef _MSC_VER + +/* Note that this header's correct operation depends on __STDC_LIMIT_MACROS + being defined. We would define it here, but in order to prevent Bad Things + happening when system headers or C++ STL headers include stdint.h before we + define it here, we define it on the g++ command line (in Makefile.rules). */ +#if !defined(__STDC_LIMIT_MACROS) +# error "Must #define __STDC_LIMIT_MACROS before #including Support/DataTypes.h" +#endif + +#if !defined(__STDC_CONSTANT_MACROS) +# error "Must #define __STDC_CONSTANT_MACROS before " \ + "#including Support/DataTypes.h" +#endif + +/* Note that includes , if this is a C99 system. */ +#include + +#ifdef _AIX +// GCC is strict about defining large constants: they must have LL modifier. +#undef INT64_MAX +#undef INT64_MIN +#endif + +/* Handle incorrect definition of uint64_t as u_int64_t */ +#ifndef HAVE_UINT64_T +#ifdef HAVE_U_INT64_T +typedef u_int64_t uint64_t; +#else +# error "Don't have a definition for uint64_t on this platform" +#endif +#endif + +#else /* _MSC_VER */ +#include +#include +#include +#ifdef __cplusplus +#include +#else +#include +#endif + +#if defined(_WIN64) +typedef signed __int64 ssize_t; +#else +typedef signed int ssize_t; +#endif /* _WIN64 */ + +#ifndef HAVE_INTTYPES_H +#define PRId64 "I64d" +#define PRIi64 "I64i" +#define PRIo64 "I64o" +#define PRIu64 "I64u" +#define PRIx64 "I64x" +#define PRIX64 "I64X" + +#define PRId32 "d" +#define PRIi32 "i" +#define PRIo32 "o" +#define PRIu32 "u" +#define PRIx32 "x" +#define PRIX32 "X" +#endif /* HAVE_INTTYPES_H */ + +#endif /* _MSC_VER */ + +/* Set defaults for constants which we cannot find. */ +#if !defined(INT64_MAX) +# define INT64_MAX 9223372036854775807LL +#endif +#if !defined(INT64_MIN) +# define INT64_MIN ((-INT64_MAX)-1) +#endif +#if !defined(UINT64_MAX) +# define UINT64_MAX 0xffffffffffffffffULL +#endif + +#ifndef HUGE_VALF +#define HUGE_VALF (float)HUGE_VAL +#endif + +#endif /* SUPPORT_DATATYPES_H */ diff --git a/llvm/include/llvm/Support/Debug.h b/llvm/include/llvm/Support/Debug.h new file mode 100644 index 0000000..d4bcfbe --- /dev/null +++ b/llvm/include/llvm/Support/Debug.h @@ -0,0 +1,89 @@ +//===- llvm/Support/Debug.h - Easy way to add debug output ------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements a handy way of adding debugging information to your +// code, without it being enabled all of the time, and without having to add +// command line options to enable it. +// +// In particular, just wrap your code with the DEBUG() macro, and it will be +// enabled automatically if you specify '-debug' on the command-line. +// DEBUG() requires the DEBUG_TYPE macro to be defined. Set it to "foo" specify +// that your debug code belongs to class "foo". Be careful that you only do +// this after including Debug.h and not around any #include of headers. Headers +// should define and undef the macro acround the code that needs to use the +// DEBUG() macro. Then, on the command line, you can specify '-debug-only=foo' +// to enable JUST the debug information for the foo class. +// +// When compiling without assertions, the -debug-* options and all code in +// DEBUG() statements disappears, so it does not affect the runtime of the code. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_DEBUG_H +#define LLVM_SUPPORT_DEBUG_H + +namespace llvm_ks { +class raw_ostream; + +#ifndef NDEBUG + +/// isCurrentDebugType - Return true if the specified string is the debug type +/// specified on the command line, or if none was specified on the command line +/// with the -debug-only=X option. +/// +bool isCurrentDebugType(const char *Type); + +/// setCurrentDebugType - Set the current debug type, as if the -debug-only=X +/// option were specified. Note that DebugFlag also needs to be set to true for +/// debug output to be produced. +/// +void setCurrentDebugType(const char *Type); + +/// DEBUG_WITH_TYPE macro - This macro should be used by passes to emit debug +/// information. In the '-debug' option is specified on the commandline, and if +/// this is a debug build, then the code specified as the option to the macro +/// will be executed. Otherwise it will not be. Example: +/// +/// DEBUG_WITH_TYPE("bitset", dbgs() << "Bitset contains: " << Bitset << "\n"); +/// +/// This will emit the debug information if -debug is present, and -debug-only +/// is not specified, or is specified as "bitset". +#define DEBUG_WITH_TYPE(TYPE, X) + +#else +#define isCurrentDebugType(X) (false) +#define setCurrentDebugType(X) +#define DEBUG_WITH_TYPE(TYPE, X) do { } while (0) +#endif + +/// EnableDebugBuffering - This defaults to false. If true, the debug +/// stream will install signal handlers to dump any buffered debug +/// output. It allows clients to selectively allow the debug stream +/// to install signal handlers if they are certain there will be no +/// conflict. +/// +extern bool EnableDebugBuffering; + +/// dbgs() - This returns a reference to a raw_ostream for debugging +/// messages. If debugging is disabled it returns errs(). Use it +/// like: dbgs() << "foo" << "bar"; +raw_ostream &dbgs(); + +// DEBUG macro - This macro should be used by passes to emit debug information. +// In the '-debug' option is specified on the commandline, and if this is a +// debug build, then the code specified as the option to the macro will be +// executed. Otherwise it will not be. Example: +// +// DEBUG(dbgs() << "Bitset contains: " << Bitset << "\n"); +// +#define DEBUG(X) DEBUG_WITH_TYPE(DEBUG_TYPE, X) + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/Support/Dwarf.def b/llvm/include/llvm/Support/Dwarf.def new file mode 100644 index 0000000..d1f3079 --- /dev/null +++ b/llvm/include/llvm/Support/Dwarf.def @@ -0,0 +1,353 @@ +//===- llvm/Support/Dwarf.def - Dwarf definitions ---------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// Macros for running through Dwarf enumerators. +// +//===----------------------------------------------------------------------===// + +// TODO: Add other DW-based macros. +#if !(defined HANDLE_DW_TAG || defined HANDLE_DW_OP || \ + defined HANDLE_DW_LANG || defined HANDLE_DW_ATE || \ + defined HANDLE_DW_VIRTUALITY) +#error "Missing macro definition of HANDLE_DW*" +#endif + +#ifndef HANDLE_DW_TAG +#define HANDLE_DW_TAG(ID, NAME) +#endif + +#ifndef HANDLE_DW_OP +#define HANDLE_DW_OP(ID, NAME) +#endif + +#ifndef HANDLE_DW_LANG +#define HANDLE_DW_LANG(ID, NAME) +#endif + +#ifndef HANDLE_DW_ATE +#define HANDLE_DW_ATE(ID, NAME) +#endif + +#ifndef HANDLE_DW_VIRTUALITY +#define HANDLE_DW_VIRTUALITY(ID, NAME) +#endif + +HANDLE_DW_TAG(0x0001, array_type) +HANDLE_DW_TAG(0x0002, class_type) +HANDLE_DW_TAG(0x0003, entry_point) +HANDLE_DW_TAG(0x0004, enumeration_type) +HANDLE_DW_TAG(0x0005, formal_parameter) +HANDLE_DW_TAG(0x0008, imported_declaration) +HANDLE_DW_TAG(0x000a, label) +HANDLE_DW_TAG(0x000b, lexical_block) +HANDLE_DW_TAG(0x000d, member) +HANDLE_DW_TAG(0x000f, pointer_type) +HANDLE_DW_TAG(0x0010, reference_type) +HANDLE_DW_TAG(0x0011, compile_unit) +HANDLE_DW_TAG(0x0012, string_type) +HANDLE_DW_TAG(0x0013, structure_type) +HANDLE_DW_TAG(0x0015, subroutine_type) +HANDLE_DW_TAG(0x0016, typedef) +HANDLE_DW_TAG(0x0017, union_type) +HANDLE_DW_TAG(0x0018, unspecified_parameters) +HANDLE_DW_TAG(0x0019, variant) +HANDLE_DW_TAG(0x001a, common_block) +HANDLE_DW_TAG(0x001b, common_inclusion) +HANDLE_DW_TAG(0x001c, inheritance) +HANDLE_DW_TAG(0x001d, inlined_subroutine) +HANDLE_DW_TAG(0x001e, module) +HANDLE_DW_TAG(0x001f, ptr_to_member_type) +HANDLE_DW_TAG(0x0020, set_type) +HANDLE_DW_TAG(0x0021, subrange_type) +HANDLE_DW_TAG(0x0022, with_stmt) +HANDLE_DW_TAG(0x0023, access_declaration) +HANDLE_DW_TAG(0x0024, base_type) +HANDLE_DW_TAG(0x0025, catch_block) +HANDLE_DW_TAG(0x0026, const_type) +HANDLE_DW_TAG(0x0027, constant) +HANDLE_DW_TAG(0x0028, enumerator) +HANDLE_DW_TAG(0x0029, file_type) +HANDLE_DW_TAG(0x002a, friend) +HANDLE_DW_TAG(0x002b, namelist) +HANDLE_DW_TAG(0x002c, namelist_item) +HANDLE_DW_TAG(0x002d, packed_type) +HANDLE_DW_TAG(0x002e, subprogram) +HANDLE_DW_TAG(0x002f, template_type_parameter) +HANDLE_DW_TAG(0x0030, template_value_parameter) +HANDLE_DW_TAG(0x0031, thrown_type) +HANDLE_DW_TAG(0x0032, try_block) +HANDLE_DW_TAG(0x0033, variant_part) +HANDLE_DW_TAG(0x0034, variable) +HANDLE_DW_TAG(0x0035, volatile_type) +HANDLE_DW_TAG(0x0036, dwarf_procedure) +HANDLE_DW_TAG(0x0037, restrict_type) +HANDLE_DW_TAG(0x0038, interface_type) +HANDLE_DW_TAG(0x0039, namespace) +HANDLE_DW_TAG(0x003a, imported_module) +HANDLE_DW_TAG(0x003b, unspecified_type) +HANDLE_DW_TAG(0x003c, partial_unit) +HANDLE_DW_TAG(0x003d, imported_unit) +HANDLE_DW_TAG(0x003f, condition) +HANDLE_DW_TAG(0x0040, shared_type) +HANDLE_DW_TAG(0x0041, type_unit) +HANDLE_DW_TAG(0x0042, rvalue_reference_type) +HANDLE_DW_TAG(0x0043, template_alias) + +// New in DWARF v5. +HANDLE_DW_TAG(0x0044, coarray_type) +HANDLE_DW_TAG(0x0045, generic_subrange) +HANDLE_DW_TAG(0x0046, dynamic_type) + +// User-defined tags. +HANDLE_DW_TAG(0x4081, MIPS_loop) +HANDLE_DW_TAG(0x4101, format_label) +HANDLE_DW_TAG(0x4102, function_template) +HANDLE_DW_TAG(0x4103, class_template) +HANDLE_DW_TAG(0x4106, GNU_template_template_param) +HANDLE_DW_TAG(0x4107, GNU_template_parameter_pack) +HANDLE_DW_TAG(0x4108, GNU_formal_parameter_pack) +HANDLE_DW_TAG(0x4200, APPLE_property) +HANDLE_DW_TAG(0xb000, BORLAND_property) +HANDLE_DW_TAG(0xb001, BORLAND_Delphi_string) +HANDLE_DW_TAG(0xb002, BORLAND_Delphi_dynamic_array) +HANDLE_DW_TAG(0xb003, BORLAND_Delphi_set) +HANDLE_DW_TAG(0xb004, BORLAND_Delphi_variant) + +HANDLE_DW_OP(0x03, addr) +HANDLE_DW_OP(0x06, deref) +HANDLE_DW_OP(0x08, const1u) +HANDLE_DW_OP(0x09, const1s) +HANDLE_DW_OP(0x0a, const2u) +HANDLE_DW_OP(0x0b, const2s) +HANDLE_DW_OP(0x0c, const4u) +HANDLE_DW_OP(0x0d, const4s) +HANDLE_DW_OP(0x0e, const8u) +HANDLE_DW_OP(0x0f, const8s) +HANDLE_DW_OP(0x10, constu) +HANDLE_DW_OP(0x11, consts) +HANDLE_DW_OP(0x12, dup) +HANDLE_DW_OP(0x13, drop) +HANDLE_DW_OP(0x14, over) +HANDLE_DW_OP(0x15, pick) +HANDLE_DW_OP(0x16, swap) +HANDLE_DW_OP(0x17, rot) +HANDLE_DW_OP(0x18, xderef) +HANDLE_DW_OP(0x19, abs) +HANDLE_DW_OP(0x1a, and) +HANDLE_DW_OP(0x1b, div) +HANDLE_DW_OP(0x1c, minus) +HANDLE_DW_OP(0x1d, mod) +HANDLE_DW_OP(0x1e, mul) +HANDLE_DW_OP(0x1f, neg) +HANDLE_DW_OP(0x20, not) +HANDLE_DW_OP(0x21, or ) +HANDLE_DW_OP(0x22, plus) +HANDLE_DW_OP(0x23, plus_uconst) +HANDLE_DW_OP(0x24, shl) +HANDLE_DW_OP(0x25, shr) +HANDLE_DW_OP(0x26, shra) +HANDLE_DW_OP(0x27, xor) +HANDLE_DW_OP(0x2f, skip) +HANDLE_DW_OP(0x28, bra) +HANDLE_DW_OP(0x29, eq) +HANDLE_DW_OP(0x2a, ge) +HANDLE_DW_OP(0x2b, gt) +HANDLE_DW_OP(0x2c, le) +HANDLE_DW_OP(0x2d, lt) +HANDLE_DW_OP(0x2e, ne) +HANDLE_DW_OP(0x30, lit0) +HANDLE_DW_OP(0x31, lit1) +HANDLE_DW_OP(0x32, lit2) +HANDLE_DW_OP(0x33, lit3) +HANDLE_DW_OP(0x34, lit4) +HANDLE_DW_OP(0x35, lit5) +HANDLE_DW_OP(0x36, lit6) +HANDLE_DW_OP(0x37, lit7) +HANDLE_DW_OP(0x38, lit8) +HANDLE_DW_OP(0x39, lit9) +HANDLE_DW_OP(0x3a, lit10) +HANDLE_DW_OP(0x3b, lit11) +HANDLE_DW_OP(0x3c, lit12) +HANDLE_DW_OP(0x3d, lit13) +HANDLE_DW_OP(0x3e, lit14) +HANDLE_DW_OP(0x3f, lit15) +HANDLE_DW_OP(0x40, lit16) +HANDLE_DW_OP(0x41, lit17) +HANDLE_DW_OP(0x42, lit18) +HANDLE_DW_OP(0x43, lit19) +HANDLE_DW_OP(0x44, lit20) +HANDLE_DW_OP(0x45, lit21) +HANDLE_DW_OP(0x46, lit22) +HANDLE_DW_OP(0x47, lit23) +HANDLE_DW_OP(0x48, lit24) +HANDLE_DW_OP(0x49, lit25) +HANDLE_DW_OP(0x4a, lit26) +HANDLE_DW_OP(0x4b, lit27) +HANDLE_DW_OP(0x4c, lit28) +HANDLE_DW_OP(0x4d, lit29) +HANDLE_DW_OP(0x4e, lit30) +HANDLE_DW_OP(0x4f, lit31) +HANDLE_DW_OP(0x50, reg0) +HANDLE_DW_OP(0x51, reg1) +HANDLE_DW_OP(0x52, reg2) +HANDLE_DW_OP(0x53, reg3) +HANDLE_DW_OP(0x54, reg4) +HANDLE_DW_OP(0x55, reg5) +HANDLE_DW_OP(0x56, reg6) +HANDLE_DW_OP(0x57, reg7) +HANDLE_DW_OP(0x58, reg8) +HANDLE_DW_OP(0x59, reg9) +HANDLE_DW_OP(0x5a, reg10) +HANDLE_DW_OP(0x5b, reg11) +HANDLE_DW_OP(0x5c, reg12) +HANDLE_DW_OP(0x5d, reg13) +HANDLE_DW_OP(0x5e, reg14) +HANDLE_DW_OP(0x5f, reg15) +HANDLE_DW_OP(0x60, reg16) +HANDLE_DW_OP(0x61, reg17) +HANDLE_DW_OP(0x62, reg18) +HANDLE_DW_OP(0x63, reg19) +HANDLE_DW_OP(0x64, reg20) +HANDLE_DW_OP(0x65, reg21) +HANDLE_DW_OP(0x66, reg22) +HANDLE_DW_OP(0x67, reg23) +HANDLE_DW_OP(0x68, reg24) +HANDLE_DW_OP(0x69, reg25) +HANDLE_DW_OP(0x6a, reg26) +HANDLE_DW_OP(0x6b, reg27) +HANDLE_DW_OP(0x6c, reg28) +HANDLE_DW_OP(0x6d, reg29) +HANDLE_DW_OP(0x6e, reg30) +HANDLE_DW_OP(0x6f, reg31) +HANDLE_DW_OP(0x70, breg0) +HANDLE_DW_OP(0x71, breg1) +HANDLE_DW_OP(0x72, breg2) +HANDLE_DW_OP(0x73, breg3) +HANDLE_DW_OP(0x74, breg4) +HANDLE_DW_OP(0x75, breg5) +HANDLE_DW_OP(0x76, breg6) +HANDLE_DW_OP(0x77, breg7) +HANDLE_DW_OP(0x78, breg8) +HANDLE_DW_OP(0x79, breg9) +HANDLE_DW_OP(0x7a, breg10) +HANDLE_DW_OP(0x7b, breg11) +HANDLE_DW_OP(0x7c, breg12) +HANDLE_DW_OP(0x7d, breg13) +HANDLE_DW_OP(0x7e, breg14) +HANDLE_DW_OP(0x7f, breg15) +HANDLE_DW_OP(0x80, breg16) +HANDLE_DW_OP(0x81, breg17) +HANDLE_DW_OP(0x82, breg18) +HANDLE_DW_OP(0x83, breg19) +HANDLE_DW_OP(0x84, breg20) +HANDLE_DW_OP(0x85, breg21) +HANDLE_DW_OP(0x86, breg22) +HANDLE_DW_OP(0x87, breg23) +HANDLE_DW_OP(0x88, breg24) +HANDLE_DW_OP(0x89, breg25) +HANDLE_DW_OP(0x8a, breg26) +HANDLE_DW_OP(0x8b, breg27) +HANDLE_DW_OP(0x8c, breg28) +HANDLE_DW_OP(0x8d, breg29) +HANDLE_DW_OP(0x8e, breg30) +HANDLE_DW_OP(0x8f, breg31) +HANDLE_DW_OP(0x90, regx) +HANDLE_DW_OP(0x91, fbreg) +HANDLE_DW_OP(0x92, bregx) +HANDLE_DW_OP(0x93, piece) +HANDLE_DW_OP(0x94, deref_size) +HANDLE_DW_OP(0x95, xderef_size) +HANDLE_DW_OP(0x96, nop) +HANDLE_DW_OP(0x97, push_object_address) +HANDLE_DW_OP(0x98, call2) +HANDLE_DW_OP(0x99, call4) +HANDLE_DW_OP(0x9a, call_ref) +HANDLE_DW_OP(0x9b, form_tls_address) +HANDLE_DW_OP(0x9c, call_frame_cfa) +HANDLE_DW_OP(0x9d, bit_piece) +HANDLE_DW_OP(0x9e, implicit_value) +HANDLE_DW_OP(0x9f, stack_value) + +// Extensions for GNU-style thread-local storage. +HANDLE_DW_OP(0xe0, GNU_push_tls_address) + +// Extensions for Fission proposal. +HANDLE_DW_OP(0xfb, GNU_addr_index) +HANDLE_DW_OP(0xfc, GNU_const_index) + +// DWARF languages. +HANDLE_DW_LANG(0x0001, C89) +HANDLE_DW_LANG(0x0002, C) +HANDLE_DW_LANG(0x0003, Ada83) +HANDLE_DW_LANG(0x0004, C_plus_plus) +HANDLE_DW_LANG(0x0005, Cobol74) +HANDLE_DW_LANG(0x0006, Cobol85) +HANDLE_DW_LANG(0x0007, Fortran77) +HANDLE_DW_LANG(0x0008, Fortran90) +HANDLE_DW_LANG(0x0009, Pascal83) +HANDLE_DW_LANG(0x000a, Modula2) +HANDLE_DW_LANG(0x000b, Java) +HANDLE_DW_LANG(0x000c, C99) +HANDLE_DW_LANG(0x000d, Ada95) +HANDLE_DW_LANG(0x000e, Fortran95) +HANDLE_DW_LANG(0x000f, PLI) +HANDLE_DW_LANG(0x0010, ObjC) +HANDLE_DW_LANG(0x0011, ObjC_plus_plus) +HANDLE_DW_LANG(0x0012, UPC) +HANDLE_DW_LANG(0x0013, D) + +// New in DWARF 5: +HANDLE_DW_LANG(0x0014, Python) +HANDLE_DW_LANG(0x0015, OpenCL) +HANDLE_DW_LANG(0x0016, Go) +HANDLE_DW_LANG(0x0017, Modula3) +HANDLE_DW_LANG(0x0018, Haskell) +HANDLE_DW_LANG(0x0019, C_plus_plus_03) +HANDLE_DW_LANG(0x001a, C_plus_plus_11) +HANDLE_DW_LANG(0x001b, OCaml) +HANDLE_DW_LANG(0x001c, Rust) +HANDLE_DW_LANG(0x001d, C11) +HANDLE_DW_LANG(0x001e, Swift) +HANDLE_DW_LANG(0x001f, Julia) +HANDLE_DW_LANG(0x0020, Dylan) +HANDLE_DW_LANG(0x0021, C_plus_plus_14) +HANDLE_DW_LANG(0x0022, Fortran03) +HANDLE_DW_LANG(0x0023, Fortran08) +HANDLE_DW_LANG(0x8001, Mips_Assembler) +HANDLE_DW_LANG(0x8e57, GOOGLE_RenderScript) +HANDLE_DW_LANG(0xb000, BORLAND_Delphi) + +// DWARF attribute type encodings. +HANDLE_DW_ATE(0x01, address) +HANDLE_DW_ATE(0x02, boolean) +HANDLE_DW_ATE(0x03, complex_float) +HANDLE_DW_ATE(0x04, float) +HANDLE_DW_ATE(0x05, signed) +HANDLE_DW_ATE(0x06, signed_char) +HANDLE_DW_ATE(0x07, unsigned) +HANDLE_DW_ATE(0x08, unsigned_char) +HANDLE_DW_ATE(0x09, imaginary_float) +HANDLE_DW_ATE(0x0a, packed_decimal) +HANDLE_DW_ATE(0x0b, numeric_string) +HANDLE_DW_ATE(0x0c, edited) +HANDLE_DW_ATE(0x0d, signed_fixed) +HANDLE_DW_ATE(0x0e, unsigned_fixed) +HANDLE_DW_ATE(0x0f, decimal_float) +HANDLE_DW_ATE(0x10, UTF) + +// DWARF virtuality codes. +HANDLE_DW_VIRTUALITY(0x00, none) +HANDLE_DW_VIRTUALITY(0x01, virtual) +HANDLE_DW_VIRTUALITY(0x02, pure_virtual) + +#undef HANDLE_DW_TAG +#undef HANDLE_DW_OP +#undef HANDLE_DW_LANG +#undef HANDLE_DW_ATE +#undef HANDLE_DW_VIRTUALITY diff --git a/llvm/include/llvm/Support/Dwarf.h b/llvm/include/llvm/Support/Dwarf.h new file mode 100644 index 0000000..6fb3490 --- /dev/null +++ b/llvm/include/llvm/Support/Dwarf.h @@ -0,0 +1,700 @@ +//===-- llvm/Support/Dwarf.h ---Dwarf Constants------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// \file +// \brief This file contains constants used for implementing Dwarf +// debug support. +// +// For details on the Dwarf specfication see the latest DWARF Debugging +// Information Format standard document on http://www.dwarfstd.org. This +// file often includes support for non-released standard features. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_DWARF_H +#define LLVM_SUPPORT_DWARF_H + +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/Compiler.h" +#include "llvm/Support/DataTypes.h" + +namespace llvm_ks { + +namespace dwarf { + +//===----------------------------------------------------------------------===// +// Dwarf constants as gleaned from the DWARF Debugging Information Format V.4 +// reference manual http://www.dwarfstd.org/. +// + +// Do not mix the following two enumerations sets. DW_TAG_invalid changes the +// enumeration base type. + +enum LLVMConstants : uint32_t { + // LLVM mock tags (see also llvm/Support/Dwarf.def). + DW_TAG_invalid = ~0U, // Tag for invalid results. + DW_VIRTUALITY_invalid = ~0U, // Virtuality for invalid results. + DW_MACINFO_invalid = ~0U, // Macinfo type for invalid results. + + // Other constants. + DWARF_VERSION = 4, // Default dwarf version we output. + DW_PUBTYPES_VERSION = 2, // Section version number for .debug_pubtypes. + DW_PUBNAMES_VERSION = 2, // Section version number for .debug_pubnames. + DW_ARANGES_VERSION = 2 // Section version number for .debug_aranges. +}; + +// Special ID values that distinguish a CIE from a FDE in DWARF CFI. +// Not inside an enum because a 64-bit value is needed. +const uint32_t DW_CIE_ID = UINT32_MAX; +const uint64_t DW64_CIE_ID = UINT64_MAX; + +enum Tag : uint16_t { +#define HANDLE_DW_TAG(ID, NAME) DW_TAG_##NAME = ID, +#include "llvm/Support/Dwarf.def" + DW_TAG_lo_user = 0x4080, + DW_TAG_hi_user = 0xffff, + DW_TAG_user_base = 0x1000 // Recommended base for user tags. +}; + +inline bool isType(Tag T) { + switch (T) { + case DW_TAG_array_type: + case DW_TAG_class_type: + case DW_TAG_interface_type: + case DW_TAG_enumeration_type: + case DW_TAG_pointer_type: + case DW_TAG_reference_type: + case DW_TAG_rvalue_reference_type: + case DW_TAG_string_type: + case DW_TAG_structure_type: + case DW_TAG_subroutine_type: + case DW_TAG_union_type: + case DW_TAG_ptr_to_member_type: + case DW_TAG_set_type: + case DW_TAG_subrange_type: + case DW_TAG_base_type: + case DW_TAG_const_type: + case DW_TAG_file_type: + case DW_TAG_packed_type: + case DW_TAG_volatile_type: + case DW_TAG_typedef: + return true; + default: + return false; + } +} + +enum Attribute : uint16_t { + // Attributes + DW_AT_sibling = 0x01, + DW_AT_location = 0x02, + DW_AT_name = 0x03, + DW_AT_ordering = 0x09, + DW_AT_byte_size = 0x0b, + DW_AT_bit_offset = 0x0c, + DW_AT_bit_size = 0x0d, + DW_AT_stmt_list = 0x10, + DW_AT_low_pc = 0x11, + DW_AT_high_pc = 0x12, + DW_AT_language = 0x13, + DW_AT_discr = 0x15, + DW_AT_discr_value = 0x16, + DW_AT_visibility = 0x17, + DW_AT_import = 0x18, + DW_AT_string_length = 0x19, + DW_AT_common_reference = 0x1a, + DW_AT_comp_dir = 0x1b, + DW_AT_const_value = 0x1c, + DW_AT_containing_type = 0x1d, + DW_AT_default_value = 0x1e, + DW_AT_inline = 0x20, + DW_AT_is_optional = 0x21, + DW_AT_lower_bound = 0x22, + DW_AT_producer = 0x25, + DW_AT_prototyped = 0x27, + DW_AT_return_addr = 0x2a, + DW_AT_start_scope = 0x2c, + DW_AT_bit_stride = 0x2e, + DW_AT_upper_bound = 0x2f, + DW_AT_abstract_origin = 0x31, + DW_AT_accessibility = 0x32, + DW_AT_address_class = 0x33, + DW_AT_artificial = 0x34, + DW_AT_base_types = 0x35, + DW_AT_calling_convention = 0x36, + DW_AT_count = 0x37, + DW_AT_data_member_location = 0x38, + DW_AT_decl_column = 0x39, + DW_AT_decl_file = 0x3a, + DW_AT_decl_line = 0x3b, + DW_AT_declaration = 0x3c, + DW_AT_discr_list = 0x3d, + DW_AT_encoding = 0x3e, + DW_AT_external = 0x3f, + DW_AT_frame_base = 0x40, + DW_AT_friend = 0x41, + DW_AT_identifier_case = 0x42, + DW_AT_macro_info = 0x43, + DW_AT_namelist_item = 0x44, + DW_AT_priority = 0x45, + DW_AT_segment = 0x46, + DW_AT_specification = 0x47, + DW_AT_static_link = 0x48, + DW_AT_type = 0x49, + DW_AT_use_location = 0x4a, + DW_AT_variable_parameter = 0x4b, + DW_AT_virtuality = 0x4c, + DW_AT_vtable_elem_location = 0x4d, + DW_AT_allocated = 0x4e, + DW_AT_associated = 0x4f, + DW_AT_data_location = 0x50, + DW_AT_byte_stride = 0x51, + DW_AT_entry_pc = 0x52, + DW_AT_use_UTF8 = 0x53, + DW_AT_extension = 0x54, + DW_AT_ranges = 0x55, + DW_AT_trampoline = 0x56, + DW_AT_call_column = 0x57, + DW_AT_call_file = 0x58, + DW_AT_call_line = 0x59, + DW_AT_description = 0x5a, + DW_AT_binary_scale = 0x5b, + DW_AT_decimal_scale = 0x5c, + DW_AT_small = 0x5d, + DW_AT_decimal_sign = 0x5e, + DW_AT_digit_count = 0x5f, + DW_AT_picture_string = 0x60, + DW_AT_mutable = 0x61, + DW_AT_threads_scaled = 0x62, + DW_AT_explicit = 0x63, + DW_AT_object_pointer = 0x64, + DW_AT_endianity = 0x65, + DW_AT_elemental = 0x66, + DW_AT_pure = 0x67, + DW_AT_recursive = 0x68, + DW_AT_signature = 0x69, + DW_AT_main_subprogram = 0x6a, + DW_AT_data_bit_offset = 0x6b, + DW_AT_const_expr = 0x6c, + DW_AT_enum_class = 0x6d, + DW_AT_linkage_name = 0x6e, + + // New in DWARF 5: + DW_AT_string_length_bit_size = 0x6f, + DW_AT_string_length_byte_size = 0x70, + DW_AT_rank = 0x71, + DW_AT_str_offsets_base = 0x72, + DW_AT_addr_base = 0x73, + DW_AT_ranges_base = 0x74, + DW_AT_dwo_id = 0x75, + DW_AT_dwo_name = 0x76, + DW_AT_reference = 0x77, + DW_AT_rvalue_reference = 0x78, + DW_AT_macros = 0x79, + + DW_AT_lo_user = 0x2000, + DW_AT_hi_user = 0x3fff, + + DW_AT_MIPS_loop_begin = 0x2002, + DW_AT_MIPS_tail_loop_begin = 0x2003, + DW_AT_MIPS_epilog_begin = 0x2004, + DW_AT_MIPS_loop_unroll_factor = 0x2005, + DW_AT_MIPS_software_pipeline_depth = 0x2006, + DW_AT_MIPS_linkage_name = 0x2007, + DW_AT_MIPS_stride = 0x2008, + DW_AT_MIPS_abstract_name = 0x2009, + DW_AT_MIPS_clone_origin = 0x200a, + DW_AT_MIPS_has_inlines = 0x200b, + DW_AT_MIPS_stride_byte = 0x200c, + DW_AT_MIPS_stride_elem = 0x200d, + DW_AT_MIPS_ptr_dopetype = 0x200e, + DW_AT_MIPS_allocatable_dopetype = 0x200f, + DW_AT_MIPS_assumed_shape_dopetype = 0x2010, + + // This one appears to have only been implemented by Open64 for + // fortran and may conflict with other extensions. + DW_AT_MIPS_assumed_size = 0x2011, + + // GNU extensions + DW_AT_sf_names = 0x2101, + DW_AT_src_info = 0x2102, + DW_AT_mac_info = 0x2103, + DW_AT_src_coords = 0x2104, + DW_AT_body_begin = 0x2105, + DW_AT_body_end = 0x2106, + DW_AT_GNU_vector = 0x2107, + DW_AT_GNU_template_name = 0x2110, + + DW_AT_GNU_odr_signature = 0x210f, + DW_AT_GNU_macros = 0x2119, + + // Extensions for Fission proposal. + DW_AT_GNU_dwo_name = 0x2130, + DW_AT_GNU_dwo_id = 0x2131, + DW_AT_GNU_ranges_base = 0x2132, + DW_AT_GNU_addr_base = 0x2133, + DW_AT_GNU_pubnames = 0x2134, + DW_AT_GNU_pubtypes = 0x2135, + DW_AT_GNU_discriminator = 0x2136, + + // Borland extensions. + DW_AT_BORLAND_property_read = 0x3b11, + DW_AT_BORLAND_property_write = 0x3b12, + DW_AT_BORLAND_property_implements = 0x3b13, + DW_AT_BORLAND_property_index = 0x3b14, + DW_AT_BORLAND_property_default = 0x3b15, + DW_AT_BORLAND_Delphi_unit = 0x3b20, + DW_AT_BORLAND_Delphi_class = 0x3b21, + DW_AT_BORLAND_Delphi_record = 0x3b22, + DW_AT_BORLAND_Delphi_metaclass = 0x3b23, + DW_AT_BORLAND_Delphi_constructor = 0x3b24, + DW_AT_BORLAND_Delphi_destructor = 0x3b25, + DW_AT_BORLAND_Delphi_anonymous_method = 0x3b26, + DW_AT_BORLAND_Delphi_interface = 0x3b27, + DW_AT_BORLAND_Delphi_ABI = 0x3b28, + DW_AT_BORLAND_Delphi_return = 0x3b29, + DW_AT_BORLAND_Delphi_frameptr = 0x3b30, + DW_AT_BORLAND_closure = 0x3b31, + + // LLVM project extensions. + DW_AT_LLVM_include_path = 0x3e00, + DW_AT_LLVM_config_macros = 0x3e01, + DW_AT_LLVM_isysroot = 0x3e02, + + // Apple extensions. + DW_AT_APPLE_optimized = 0x3fe1, + DW_AT_APPLE_flags = 0x3fe2, + DW_AT_APPLE_isa = 0x3fe3, + DW_AT_APPLE_block = 0x3fe4, + DW_AT_APPLE_major_runtime_vers = 0x3fe5, + DW_AT_APPLE_runtime_class = 0x3fe6, + DW_AT_APPLE_omit_frame_ptr = 0x3fe7, + DW_AT_APPLE_property_name = 0x3fe8, + DW_AT_APPLE_property_getter = 0x3fe9, + DW_AT_APPLE_property_setter = 0x3fea, + DW_AT_APPLE_property_attribute = 0x3feb, + DW_AT_APPLE_objc_complete_type = 0x3fec, + DW_AT_APPLE_property = 0x3fed +}; + +enum Form : uint16_t { + // Attribute form encodings + DW_FORM_addr = 0x01, + DW_FORM_block2 = 0x03, + DW_FORM_block4 = 0x04, + DW_FORM_data2 = 0x05, + DW_FORM_data4 = 0x06, + DW_FORM_data8 = 0x07, + DW_FORM_string = 0x08, + DW_FORM_block = 0x09, + DW_FORM_block1 = 0x0a, + DW_FORM_data1 = 0x0b, + DW_FORM_flag = 0x0c, + DW_FORM_sdata = 0x0d, + DW_FORM_strp = 0x0e, + DW_FORM_udata = 0x0f, + DW_FORM_ref_addr = 0x10, + DW_FORM_ref1 = 0x11, + DW_FORM_ref2 = 0x12, + DW_FORM_ref4 = 0x13, + DW_FORM_ref8 = 0x14, + DW_FORM_ref_udata = 0x15, + DW_FORM_indirect = 0x16, + DW_FORM_sec_offset = 0x17, + DW_FORM_exprloc = 0x18, + DW_FORM_flag_present = 0x19, + DW_FORM_ref_sig8 = 0x20, + + // Extensions for Fission proposal + DW_FORM_GNU_addr_index = 0x1f01, + DW_FORM_GNU_str_index = 0x1f02, + + // Alternate debug sections proposal (output of "dwz" tool). + DW_FORM_GNU_ref_alt = 0x1f20, + DW_FORM_GNU_strp_alt = 0x1f21 +}; + +enum LocationAtom { +#define HANDLE_DW_OP(ID, NAME) DW_OP_##NAME = ID, +#include "llvm/Support/Dwarf.def" + DW_OP_lo_user = 0xe0, + DW_OP_hi_user = 0xff +}; + +enum TypeKind { +#define HANDLE_DW_ATE(ID, NAME) DW_ATE_##NAME = ID, +#include "llvm/Support/Dwarf.def" + DW_ATE_lo_user = 0x80, + DW_ATE_hi_user = 0xff +}; + +enum DecimalSignEncoding { + // Decimal sign attribute values + DW_DS_unsigned = 0x01, + DW_DS_leading_overpunch = 0x02, + DW_DS_trailing_overpunch = 0x03, + DW_DS_leading_separate = 0x04, + DW_DS_trailing_separate = 0x05 +}; + +enum EndianityEncoding { + // Endianity attribute values + DW_END_default = 0x00, + DW_END_big = 0x01, + DW_END_little = 0x02, + DW_END_lo_user = 0x40, + DW_END_hi_user = 0xff +}; + +enum AccessAttribute { + // Accessibility codes + DW_ACCESS_public = 0x01, + DW_ACCESS_protected = 0x02, + DW_ACCESS_private = 0x03 +}; + +enum VisibilityAttribute { + // Visibility codes + DW_VIS_local = 0x01, + DW_VIS_exported = 0x02, + DW_VIS_qualified = 0x03 +}; + +enum VirtualityAttribute { +#define HANDLE_DW_VIRTUALITY(ID, NAME) DW_VIRTUALITY_##NAME = ID, +#include "llvm/Support/Dwarf.def" + DW_VIRTUALITY_max = 0x02 +}; + +enum SourceLanguage { +#define HANDLE_DW_LANG(ID, NAME) DW_LANG_##NAME = ID, +#include "llvm/Support/Dwarf.def" + DW_LANG_lo_user = 0x8000, + DW_LANG_hi_user = 0xffff +}; + +enum CaseSensitivity { + // Identifier case codes + DW_ID_case_sensitive = 0x00, + DW_ID_up_case = 0x01, + DW_ID_down_case = 0x02, + DW_ID_case_insensitive = 0x03 +}; + +enum CallingConvention { + // Calling convention codes + DW_CC_normal = 0x01, + DW_CC_program = 0x02, + DW_CC_nocall = 0x03, + DW_CC_lo_user = 0x40, + DW_CC_GNU_borland_fastcall_i386 = 0x41, + DW_CC_BORLAND_safecall = 0xb0, + DW_CC_BORLAND_stdcall = 0xb1, + DW_CC_BORLAND_pascal = 0xb2, + DW_CC_BORLAND_msfastcall = 0xb3, + DW_CC_BORLAND_msreturn = 0xb4, + DW_CC_BORLAND_thiscall = 0xb5, + DW_CC_BORLAND_fastcall = 0xb6, + DW_CC_hi_user = 0xff +}; + +enum InlineAttribute { + // Inline codes + DW_INL_not_inlined = 0x00, + DW_INL_inlined = 0x01, + DW_INL_declared_not_inlined = 0x02, + DW_INL_declared_inlined = 0x03 +}; + +enum ArrayDimensionOrdering { + // Array ordering + DW_ORD_row_major = 0x00, + DW_ORD_col_major = 0x01 +}; + +enum DiscriminantList { + // Discriminant descriptor values + DW_DSC_label = 0x00, + DW_DSC_range = 0x01 +}; + +enum LineNumberOps { + // Line Number Standard Opcode Encodings + DW_LNS_extended_op = 0x00, + DW_LNS_copy = 0x01, + DW_LNS_advance_pc = 0x02, + DW_LNS_advance_line = 0x03, + DW_LNS_set_file = 0x04, + DW_LNS_set_column = 0x05, + DW_LNS_negate_stmt = 0x06, + DW_LNS_set_basic_block = 0x07, + DW_LNS_const_add_pc = 0x08, + DW_LNS_fixed_advance_pc = 0x09, + DW_LNS_set_prologue_end = 0x0a, + DW_LNS_set_epilogue_begin = 0x0b, + DW_LNS_set_isa = 0x0c +}; + +enum LineNumberExtendedOps { + // Line Number Extended Opcode Encodings + DW_LNE_end_sequence = 0x01, + DW_LNE_set_address = 0x02, + DW_LNE_define_file = 0x03, + DW_LNE_set_discriminator = 0x04, + DW_LNE_lo_user = 0x80, + DW_LNE_hi_user = 0xff +}; + +enum MacinfoRecordType { + // Macinfo Type Encodings + DW_MACINFO_define = 0x01, + DW_MACINFO_undef = 0x02, + DW_MACINFO_start_file = 0x03, + DW_MACINFO_end_file = 0x04, + DW_MACINFO_vendor_ext = 0xff +}; + +enum MacroEntryType { + // Macro Information Entry Type Encodings + DW_MACRO_define = 0x01, + DW_MACRO_undef = 0x02, + DW_MACRO_start_file = 0x03, + DW_MACRO_end_file = 0x04, + DW_MACRO_define_indirect = 0x05, + DW_MACRO_undef_indirect = 0x06, + DW_MACRO_transparent_include = 0x07, + DW_MACRO_define_indirect_sup = 0x08, + DW_MACRO_undef_indirect_sup = 0x09, + DW_MACRO_transparent_include_sup = 0x0a, + DW_MACRO_define_indirectx = 0x0b, + DW_MACRO_undef_indirectx = 0x0c, + DW_MACRO_lo_user = 0xe0, + DW_MACRO_hi_user = 0xff +}; + +enum CallFrameInfo { + // Call frame instruction encodings + DW_CFA_extended = 0x00, + DW_CFA_nop = 0x00, + DW_CFA_advance_loc = 0x40, + DW_CFA_offset = 0x80, + DW_CFA_restore = 0xc0, + DW_CFA_set_loc = 0x01, + DW_CFA_advance_loc1 = 0x02, + DW_CFA_advance_loc2 = 0x03, + DW_CFA_advance_loc4 = 0x04, + DW_CFA_offset_extended = 0x05, + DW_CFA_restore_extended = 0x06, + DW_CFA_undefined = 0x07, + DW_CFA_same_value = 0x08, + DW_CFA_register = 0x09, + DW_CFA_remember_state = 0x0a, + DW_CFA_restore_state = 0x0b, + DW_CFA_def_cfa = 0x0c, + DW_CFA_def_cfa_register = 0x0d, + DW_CFA_def_cfa_offset = 0x0e, + DW_CFA_def_cfa_expression = 0x0f, + DW_CFA_expression = 0x10, + DW_CFA_offset_extended_sf = 0x11, + DW_CFA_def_cfa_sf = 0x12, + DW_CFA_def_cfa_offset_sf = 0x13, + DW_CFA_val_offset = 0x14, + DW_CFA_val_offset_sf = 0x15, + DW_CFA_val_expression = 0x16, + DW_CFA_MIPS_advance_loc8 = 0x1d, + DW_CFA_GNU_window_save = 0x2d, + DW_CFA_GNU_args_size = 0x2e, + DW_CFA_lo_user = 0x1c, + DW_CFA_hi_user = 0x3f +}; + +enum Constants { + // Children flag + DW_CHILDREN_no = 0x00, + DW_CHILDREN_yes = 0x01, + + DW_EH_PE_absptr = 0x00, + DW_EH_PE_omit = 0xff, + DW_EH_PE_uleb128 = 0x01, + DW_EH_PE_udata2 = 0x02, + DW_EH_PE_udata4 = 0x03, + DW_EH_PE_udata8 = 0x04, + DW_EH_PE_sleb128 = 0x09, + DW_EH_PE_sdata2 = 0x0A, + DW_EH_PE_sdata4 = 0x0B, + DW_EH_PE_sdata8 = 0x0C, + DW_EH_PE_signed = 0x08, + DW_EH_PE_pcrel = 0x10, + DW_EH_PE_textrel = 0x20, + DW_EH_PE_datarel = 0x30, + DW_EH_PE_funcrel = 0x40, + DW_EH_PE_aligned = 0x50, + DW_EH_PE_indirect = 0x80 +}; + +// Constants for debug_loc.dwo in the DWARF5 Split Debug Info Proposal +enum LocationListEntry : unsigned char { + DW_LLE_end_of_list_entry, + DW_LLE_base_address_selection_entry, + DW_LLE_start_end_entry, + DW_LLE_start_length_entry, + DW_LLE_offset_pair_entry +}; + +/// Contstants for the DW_APPLE_PROPERTY_attributes attribute. +/// Keep this list in sync with clang's DeclSpec.h ObjCPropertyAttributeKind. +enum ApplePropertyAttributes { + // Apple Objective-C Property Attributes + DW_APPLE_PROPERTY_readonly = 0x01, + DW_APPLE_PROPERTY_getter = 0x02, + DW_APPLE_PROPERTY_assign = 0x04, + DW_APPLE_PROPERTY_readwrite = 0x08, + DW_APPLE_PROPERTY_retain = 0x10, + DW_APPLE_PROPERTY_copy = 0x20, + DW_APPLE_PROPERTY_nonatomic = 0x40, + DW_APPLE_PROPERTY_setter = 0x80, + DW_APPLE_PROPERTY_atomic = 0x100, + DW_APPLE_PROPERTY_weak = 0x200, + DW_APPLE_PROPERTY_strong = 0x400, + DW_APPLE_PROPERTY_unsafe_unretained = 0x800 +}; + +// Constants for the DWARF5 Accelerator Table Proposal +enum AcceleratorTable { + // Data layout descriptors. + DW_ATOM_null = 0u, // Marker as the end of a list of atoms. + DW_ATOM_die_offset = 1u, // DIE offset in the debug_info section. + DW_ATOM_cu_offset = 2u, // Offset of the compile unit header that contains the + // item in question. + DW_ATOM_die_tag = 3u, // A tag entry. + DW_ATOM_type_flags = 4u, // Set of flags for a type. + + // DW_ATOM_type_flags values. + + // Always set for C++, only set for ObjC if this is the @implementation for a + // class. + DW_FLAG_type_implementation = 2u, + + // Hash functions. + + // Daniel J. Bernstein hash. + DW_hash_function_djb = 0u +}; + +// Constants for the GNU pubnames/pubtypes extensions supporting gdb index. +enum GDBIndexEntryKind { + GIEK_NONE, + GIEK_TYPE, + GIEK_VARIABLE, + GIEK_FUNCTION, + GIEK_OTHER, + GIEK_UNUSED5, + GIEK_UNUSED6, + GIEK_UNUSED7 +}; + +enum GDBIndexEntryLinkage { + GIEL_EXTERNAL, + GIEL_STATIC +}; + +/// \defgroup DwarfConstantsDumping Dwarf constants dumping functions +/// +/// All these functions map their argument's value back to the +/// corresponding enumerator name or return nullptr if the value isn't +/// known. +/// +/// @{ +const char *TagString(unsigned Tag); +const char *ChildrenString(unsigned Children); +const char *AttributeString(unsigned Attribute); +const char *FormEncodingString(unsigned Encoding); +const char *OperationEncodingString(unsigned Encoding); +const char *AttributeEncodingString(unsigned Encoding); +const char *DecimalSignString(unsigned Sign); +const char *EndianityString(unsigned Endian); +const char *AccessibilityString(unsigned Access); +const char *VisibilityString(unsigned Visibility); +const char *VirtualityString(unsigned Virtuality); +const char *LanguageString(unsigned Language); +const char *CaseString(unsigned Case); +const char *ConventionString(unsigned Convention); +const char *InlineCodeString(unsigned Code); +const char *ArrayOrderString(unsigned Order); +const char *DiscriminantString(unsigned Discriminant); +const char *LNStandardString(unsigned Standard); +const char *LNExtendedString(unsigned Encoding); +const char *MacinfoString(unsigned Encoding); +const char *CallFrameString(unsigned Encoding); +const char *ApplePropertyString(unsigned); +const char *AtomTypeString(unsigned Atom); +const char *GDBIndexEntryKindString(GDBIndexEntryKind Kind); +const char *GDBIndexEntryLinkageString(GDBIndexEntryLinkage Linkage); +/// @} + +/// \defgroup DwarfConstantsParsing Dwarf constants parsing functions +/// +/// These functions map their strings back to the corresponding enumeration +/// value or return 0 if there is none, except for these exceptions: +/// +/// \li \a getTag() returns \a DW_TAG_invalid on invalid input. +/// \li \a getVirtuality() returns \a DW_VIRTUALITY_invalid on invalid input. +/// \li \a getMacinfo() returns \a DW_MACINFO_invalid on invalid input. +/// +/// @{ +unsigned getTag(StringRef TagString); +unsigned getOperationEncoding(StringRef OperationEncodingString); +unsigned getVirtuality(StringRef VirtualityString); +unsigned getLanguage(StringRef LanguageString); +unsigned getAttributeEncoding(StringRef EncodingString); +unsigned getMacinfo(StringRef MacinfoString); +/// @} + +/// \brief Returns the symbolic string representing Val when used as a value +/// for attribute Attr. +const char *AttributeValueString(uint16_t Attr, unsigned Val); + +/// \brief Decsribes an entry of the various gnu_pub* debug sections. +/// +/// The gnu_pub* kind looks like: +/// +/// 0-3 reserved +/// 4-6 symbol kind +/// 7 0 == global, 1 == static +/// +/// A gdb_index descriptor includes the above kind, shifted 24 bits up with the +/// offset of the cu within the debug_info section stored in those 24 bits. +struct PubIndexEntryDescriptor { + GDBIndexEntryKind Kind; + GDBIndexEntryLinkage Linkage; + PubIndexEntryDescriptor(GDBIndexEntryKind Kind, GDBIndexEntryLinkage Linkage) + : Kind(Kind), Linkage(Linkage) {} + /* implicit */ PubIndexEntryDescriptor(GDBIndexEntryKind Kind) + : Kind(Kind), Linkage(GIEL_EXTERNAL) {} + explicit PubIndexEntryDescriptor(uint8_t Value) + : Kind(static_cast((Value & KIND_MASK) >> + KIND_OFFSET)), + Linkage(static_cast((Value & LINKAGE_MASK) >> + LINKAGE_OFFSET)) {} + uint8_t toBits() { return Kind << KIND_OFFSET | Linkage << LINKAGE_OFFSET; } + +private: + enum { + KIND_OFFSET = 4, + KIND_MASK = 7 << KIND_OFFSET, + LINKAGE_OFFSET = 7, + LINKAGE_MASK = 1 << LINKAGE_OFFSET + }; +}; + +} // End of namespace dwarf + +} // End of namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/Support/ELF.h b/llvm/include/llvm/Support/ELF.h new file mode 100644 index 0000000..2c618e1 --- /dev/null +++ b/llvm/include/llvm/Support/ELF.h @@ -0,0 +1,1307 @@ +//===-- llvm/Support/ELF.h - ELF constants and data structures --*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This header contains common, non-processor-specific data structures and +// constants for the ELF file format. +// +// The details of the ELF32 bits in this file are largely based on the Tool +// Interface Standard (TIS) Executable and Linking Format (ELF) Specification +// Version 1.2, May 1995. The ELF64 stuff is based on ELF-64 Object File Format +// Version 1.5, Draft 2, May 1998 as well as OpenBSD header files. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_ELF_H +#define LLVM_SUPPORT_ELF_H + +#include "llvm/Support/Compiler.h" +#include "llvm/Support/DataTypes.h" +#include + +namespace llvm_ks { + +namespace ELF { + +typedef uint32_t Elf32_Addr; // Program address +typedef uint32_t Elf32_Off; // File offset +typedef uint16_t Elf32_Half; +typedef uint32_t Elf32_Word; +typedef int32_t Elf32_Sword; + +typedef uint64_t Elf64_Addr; +typedef uint64_t Elf64_Off; +typedef uint16_t Elf64_Half; +typedef uint32_t Elf64_Word; +typedef int32_t Elf64_Sword; +typedef uint64_t Elf64_Xword; +typedef int64_t Elf64_Sxword; + +// Object file magic string. +static const char ElfMagic[] = { 0x7f, 'E', 'L', 'F', '\0' }; + +// e_ident size and indices. +enum { + EI_MAG0 = 0, // File identification index. + EI_MAG1 = 1, // File identification index. + EI_MAG2 = 2, // File identification index. + EI_MAG3 = 3, // File identification index. + EI_CLASS = 4, // File class. + EI_DATA = 5, // Data encoding. + EI_VERSION = 6, // File version. + EI_OSABI = 7, // OS/ABI identification. + EI_ABIVERSION = 8, // ABI version. + EI_PAD = 9, // Start of padding bytes. + EI_NIDENT = 16 // Number of bytes in e_ident. +}; + +struct Elf32_Ehdr { + unsigned char e_ident[EI_NIDENT]; // ELF Identification bytes + Elf32_Half e_type; // Type of file (see ET_* below) + Elf32_Half e_machine; // Required architecture for this file (see EM_*) + Elf32_Word e_version; // Must be equal to 1 + Elf32_Addr e_entry; // Address to jump to in order to start program + Elf32_Off e_phoff; // Program header table's file offset, in bytes + Elf32_Off e_shoff; // Section header table's file offset, in bytes + Elf32_Word e_flags; // Processor-specific flags + Elf32_Half e_ehsize; // Size of ELF header, in bytes + Elf32_Half e_phentsize; // Size of an entry in the program header table + Elf32_Half e_phnum; // Number of entries in the program header table + Elf32_Half e_shentsize; // Size of an entry in the section header table + Elf32_Half e_shnum; // Number of entries in the section header table + Elf32_Half e_shstrndx; // Sect hdr table index of sect name string table + bool checkMagic() const { + return (memcmp(e_ident, ElfMagic, strlen(ElfMagic))) == 0; + } + unsigned char getFileClass() const { return e_ident[EI_CLASS]; } + unsigned char getDataEncoding() const { return e_ident[EI_DATA]; } +}; + +// 64-bit ELF header. Fields are the same as for ELF32, but with different +// types (see above). +struct Elf64_Ehdr { + unsigned char e_ident[EI_NIDENT]; + Elf64_Half e_type; + Elf64_Half e_machine; + Elf64_Word e_version; + Elf64_Addr e_entry; + Elf64_Off e_phoff; + Elf64_Off e_shoff; + Elf64_Word e_flags; + Elf64_Half e_ehsize; + Elf64_Half e_phentsize; + Elf64_Half e_phnum; + Elf64_Half e_shentsize; + Elf64_Half e_shnum; + Elf64_Half e_shstrndx; + bool checkMagic() const { + return (memcmp(e_ident, ElfMagic, strlen(ElfMagic))) == 0; + } + unsigned char getFileClass() const { return e_ident[EI_CLASS]; } + unsigned char getDataEncoding() const { return e_ident[EI_DATA]; } +}; + +// File types +enum { + ET_NONE = 0, // No file type + ET_REL = 1, // Relocatable file + ET_EXEC = 2, // Executable file + ET_DYN = 3, // Shared object file + ET_CORE = 4, // Core file + ET_LOPROC = 0xff00, // Beginning of processor-specific codes + ET_HIPROC = 0xffff // Processor-specific +}; + +// Versioning +enum { + EV_NONE = 0, + EV_CURRENT = 1 +}; + +// Machine architectures +// See current registered ELF machine architectures at: +// http://www.uxsglobal.com/developers/gabi/latest/ch4.eheader.html +enum { + EM_NONE = 0, // No machine + EM_M32 = 1, // AT&T WE 32100 + EM_SPARC = 2, // SPARC + EM_386 = 3, // Intel 386 + EM_68K = 4, // Motorola 68000 + EM_88K = 5, // Motorola 88000 + EM_IAMCU = 6, // Intel MCU + EM_860 = 7, // Intel 80860 + EM_MIPS = 8, // MIPS R3000 + EM_S370 = 9, // IBM System/370 + EM_MIPS_RS3_LE = 10, // MIPS RS3000 Little-endian + EM_PARISC = 15, // Hewlett-Packard PA-RISC + EM_VPP500 = 17, // Fujitsu VPP500 + EM_SPARC32PLUS = 18, // Enhanced instruction set SPARC + EM_960 = 19, // Intel 80960 + EM_PPC = 20, // PowerPC + EM_PPC64 = 21, // PowerPC64 + EM_S390 = 22, // IBM System/390 + EM_SPU = 23, // IBM SPU/SPC + EM_V800 = 36, // NEC V800 + EM_FR20 = 37, // Fujitsu FR20 + EM_RH32 = 38, // TRW RH-32 + EM_RCE = 39, // Motorola RCE + EM_ARM = 40, // ARM + EM_ALPHA = 41, // DEC Alpha + EM_SH = 42, // Hitachi SH + EM_SPARCV9 = 43, // SPARC V9 + EM_TRICORE = 44, // Siemens TriCore + EM_ARC = 45, // Argonaut RISC Core + EM_H8_300 = 46, // Hitachi H8/300 + EM_H8_300H = 47, // Hitachi H8/300H + EM_H8S = 48, // Hitachi H8S + EM_H8_500 = 49, // Hitachi H8/500 + EM_IA_64 = 50, // Intel IA-64 processor architecture + EM_MIPS_X = 51, // Stanford MIPS-X + EM_COLDFIRE = 52, // Motorola ColdFire + EM_68HC12 = 53, // Motorola M68HC12 + EM_MMA = 54, // Fujitsu MMA Multimedia Accelerator + EM_PCP = 55, // Siemens PCP + EM_NCPU = 56, // Sony nCPU embedded RISC processor + EM_NDR1 = 57, // Denso NDR1 microprocessor + EM_STARCORE = 58, // Motorola Star*Core processor + EM_ME16 = 59, // Toyota ME16 processor + EM_ST100 = 60, // STMicroelectronics ST100 processor + EM_TINYJ = 61, // Advanced Logic Corp. TinyJ embedded processor family + EM_X86_64 = 62, // AMD x86-64 architecture + EM_PDSP = 63, // Sony DSP Processor + EM_PDP10 = 64, // Digital Equipment Corp. PDP-10 + EM_PDP11 = 65, // Digital Equipment Corp. PDP-11 + EM_FX66 = 66, // Siemens FX66 microcontroller + EM_ST9PLUS = 67, // STMicroelectronics ST9+ 8/16 bit microcontroller + EM_ST7 = 68, // STMicroelectronics ST7 8-bit microcontroller + EM_68HC16 = 69, // Motorola MC68HC16 Microcontroller + EM_68HC11 = 70, // Motorola MC68HC11 Microcontroller + EM_68HC08 = 71, // Motorola MC68HC08 Microcontroller + EM_68HC05 = 72, // Motorola MC68HC05 Microcontroller + EM_SVX = 73, // Silicon Graphics SVx + EM_ST19 = 74, // STMicroelectronics ST19 8-bit microcontroller + EM_VAX = 75, // Digital VAX + EM_CRIS = 76, // Axis Communications 32-bit embedded processor + EM_JAVELIN = 77, // Infineon Technologies 32-bit embedded processor + EM_FIREPATH = 78, // Element 14 64-bit DSP Processor + EM_ZSP = 79, // LSI Logic 16-bit DSP Processor + EM_MMIX = 80, // Donald Knuth's educational 64-bit processor + EM_HUANY = 81, // Harvard University machine-independent object files + EM_PRISM = 82, // SiTera Prism + EM_AVR = 83, // Atmel AVR 8-bit microcontroller + EM_FR30 = 84, // Fujitsu FR30 + EM_D10V = 85, // Mitsubishi D10V + EM_D30V = 86, // Mitsubishi D30V + EM_V850 = 87, // NEC v850 + EM_M32R = 88, // Mitsubishi M32R + EM_MN10300 = 89, // Matsushita MN10300 + EM_MN10200 = 90, // Matsushita MN10200 + EM_PJ = 91, // picoJava + EM_OPENRISC = 92, // OpenRISC 32-bit embedded processor + EM_ARC_COMPACT = 93, // ARC International ARCompact processor (old + // spelling/synonym: EM_ARC_A5) + EM_XTENSA = 94, // Tensilica Xtensa Architecture + EM_VIDEOCORE = 95, // Alphamosaic VideoCore processor + EM_TMM_GPP = 96, // Thompson Multimedia General Purpose Processor + EM_NS32K = 97, // National Semiconductor 32000 series + EM_TPC = 98, // Tenor Network TPC processor + EM_SNP1K = 99, // Trebia SNP 1000 processor + EM_ST200 = 100, // STMicroelectronics (www.st.com) ST200 + EM_IP2K = 101, // Ubicom IP2xxx microcontroller family + EM_MAX = 102, // MAX Processor + EM_CR = 103, // National Semiconductor CompactRISC microprocessor + EM_F2MC16 = 104, // Fujitsu F2MC16 + EM_MSP430 = 105, // Texas Instruments embedded microcontroller msp430 + EM_BLACKFIN = 106, // Analog Devices Blackfin (DSP) processor + EM_SE_C33 = 107, // S1C33 Family of Seiko Epson processors + EM_SEP = 108, // Sharp embedded microprocessor + EM_ARCA = 109, // Arca RISC Microprocessor + EM_UNICORE = 110, // Microprocessor series from PKU-Unity Ltd. and MPRC + // of Peking University + EM_EXCESS = 111, // eXcess: 16/32/64-bit configurable embedded CPU + EM_DXP = 112, // Icera Semiconductor Inc. Deep Execution Processor + EM_ALTERA_NIOS2 = 113, // Altera Nios II soft-core processor + EM_CRX = 114, // National Semiconductor CompactRISC CRX + EM_XGATE = 115, // Motorola XGATE embedded processor + EM_C166 = 116, // Infineon C16x/XC16x processor + EM_M16C = 117, // Renesas M16C series microprocessors + EM_DSPIC30F = 118, // Microchip Technology dsPIC30F Digital Signal + // Controller + EM_CE = 119, // Freescale Communication Engine RISC core + EM_M32C = 120, // Renesas M32C series microprocessors + EM_TSK3000 = 131, // Altium TSK3000 core + EM_RS08 = 132, // Freescale RS08 embedded processor + EM_SHARC = 133, // Analog Devices SHARC family of 32-bit DSP + // processors + EM_ECOG2 = 134, // Cyan Technology eCOG2 microprocessor + EM_SCORE7 = 135, // Sunplus S+core7 RISC processor + EM_DSP24 = 136, // New Japan Radio (NJR) 24-bit DSP Processor + EM_VIDEOCORE3 = 137, // Broadcom VideoCore III processor + EM_LATTICEMICO32 = 138, // RISC processor for Lattice FPGA architecture + EM_SE_C17 = 139, // Seiko Epson C17 family + EM_TI_C6000 = 140, // The Texas Instruments TMS320C6000 DSP family + EM_TI_C2000 = 141, // The Texas Instruments TMS320C2000 DSP family + EM_TI_C5500 = 142, // The Texas Instruments TMS320C55x DSP family + EM_MMDSP_PLUS = 160, // STMicroelectronics 64bit VLIW Data Signal Processor + EM_CYPRESS_M8C = 161, // Cypress M8C microprocessor + EM_R32C = 162, // Renesas R32C series microprocessors + EM_TRIMEDIA = 163, // NXP Semiconductors TriMedia architecture family + EM_HEXAGON = 164, // Qualcomm Hexagon processor + EM_8051 = 165, // Intel 8051 and variants + EM_STXP7X = 166, // STMicroelectronics STxP7x family of configurable + // and extensible RISC processors + EM_NDS32 = 167, // Andes Technology compact code size embedded RISC + // processor family + EM_ECOG1 = 168, // Cyan Technology eCOG1X family + EM_ECOG1X = 168, // Cyan Technology eCOG1X family + EM_MAXQ30 = 169, // Dallas Semiconductor MAXQ30 Core Micro-controllers + EM_XIMO16 = 170, // New Japan Radio (NJR) 16-bit DSP Processor + EM_MANIK = 171, // M2000 Reconfigurable RISC Microprocessor + EM_CRAYNV2 = 172, // Cray Inc. NV2 vector architecture + EM_RX = 173, // Renesas RX family + EM_METAG = 174, // Imagination Technologies META processor + // architecture + EM_MCST_ELBRUS = 175, // MCST Elbrus general purpose hardware architecture + EM_ECOG16 = 176, // Cyan Technology eCOG16 family + EM_CR16 = 177, // National Semiconductor CompactRISC CR16 16-bit + // microprocessor + EM_ETPU = 178, // Freescale Extended Time Processing Unit + EM_SLE9X = 179, // Infineon Technologies SLE9X core + EM_L10M = 180, // Intel L10M + EM_K10M = 181, // Intel K10M + EM_AARCH64 = 183, // ARM AArch64 + EM_AVR32 = 185, // Atmel Corporation 32-bit microprocessor family + EM_STM8 = 186, // STMicroeletronics STM8 8-bit microcontroller + EM_TILE64 = 187, // Tilera TILE64 multicore architecture family + EM_TILEPRO = 188, // Tilera TILEPro multicore architecture family + EM_CUDA = 190, // NVIDIA CUDA architecture + EM_TILEGX = 191, // Tilera TILE-Gx multicore architecture family + EM_CLOUDSHIELD = 192, // CloudShield architecture family + EM_COREA_1ST = 193, // KIPO-KAIST Core-A 1st generation processor family + EM_COREA_2ND = 194, // KIPO-KAIST Core-A 2nd generation processor family + EM_ARC_COMPACT2 = 195, // Synopsys ARCompact V2 + EM_OPEN8 = 196, // Open8 8-bit RISC soft processor core + EM_RL78 = 197, // Renesas RL78 family + EM_VIDEOCORE5 = 198, // Broadcom VideoCore V processor + EM_78KOR = 199, // Renesas 78KOR family + EM_56800EX = 200, // Freescale 56800EX Digital Signal Controller (DSC) + EM_BA1 = 201, // Beyond BA1 CPU architecture + EM_BA2 = 202, // Beyond BA2 CPU architecture + EM_XCORE = 203, // XMOS xCORE processor family + EM_MCHP_PIC = 204, // Microchip 8-bit PIC(r) family + EM_INTEL205 = 205, // Reserved by Intel + EM_INTEL206 = 206, // Reserved by Intel + EM_INTEL207 = 207, // Reserved by Intel + EM_INTEL208 = 208, // Reserved by Intel + EM_INTEL209 = 209, // Reserved by Intel + EM_KM32 = 210, // KM211 KM32 32-bit processor + EM_KMX32 = 211, // KM211 KMX32 32-bit processor + EM_KMX16 = 212, // KM211 KMX16 16-bit processor + EM_KMX8 = 213, // KM211 KMX8 8-bit processor + EM_KVARC = 214, // KM211 KVARC processor + EM_CDP = 215, // Paneve CDP architecture family + EM_COGE = 216, // Cognitive Smart Memory Processor + EM_COOL = 217, // iCelero CoolEngine + EM_NORC = 218, // Nanoradio Optimized RISC + EM_CSR_KALIMBA = 219, // CSR Kalimba architecture family + EM_AMDGPU = 224, // AMD GPU architecture + + // A request has been made to the maintainer of the official registry for + // such numbers for an official value for WebAssembly. As soon as one is + // allocated, this enum will be updated to use it. + EM_WEBASSEMBLY = 0x4157, // WebAssembly architecture +}; + +// Object file classes. +enum { + ELFCLASSNONE = 0, + ELFCLASS32 = 1, // 32-bit object file + ELFCLASS64 = 2 // 64-bit object file +}; + +// Object file byte orderings. +enum { + ELFDATANONE = 0, // Invalid data encoding. + ELFDATA2LSB = 1, // Little-endian object file + ELFDATA2MSB = 2 // Big-endian object file +}; + +// OS ABI identification. +enum { + ELFOSABI_NONE = 0, // UNIX System V ABI + ELFOSABI_HPUX = 1, // HP-UX operating system + ELFOSABI_NETBSD = 2, // NetBSD + ELFOSABI_GNU = 3, // GNU/Linux + ELFOSABI_LINUX = 3, // Historical alias for ELFOSABI_GNU. + ELFOSABI_HURD = 4, // GNU/Hurd + ELFOSABI_SOLARIS = 6, // Solaris + ELFOSABI_AIX = 7, // AIX + ELFOSABI_IRIX = 8, // IRIX + ELFOSABI_FREEBSD = 9, // FreeBSD + ELFOSABI_TRU64 = 10, // TRU64 UNIX + ELFOSABI_MODESTO = 11, // Novell Modesto + ELFOSABI_OPENBSD = 12, // OpenBSD + ELFOSABI_OPENVMS = 13, // OpenVMS + ELFOSABI_NSK = 14, // Hewlett-Packard Non-Stop Kernel + ELFOSABI_AROS = 15, // AROS + ELFOSABI_FENIXOS = 16, // FenixOS + ELFOSABI_CLOUDABI = 17, // Nuxi CloudABI + ELFOSABI_C6000_ELFABI = 64, // Bare-metal TMS320C6000 + ELFOSABI_AMDGPU_HSA = 64, // AMD HSA runtime + ELFOSABI_C6000_LINUX = 65, // Linux TMS320C6000 + ELFOSABI_ARM = 97, // ARM + ELFOSABI_STANDALONE = 255 // Standalone (embedded) application +}; + +#define ELF_RELOC(name, value) name = value, + +// X86_64 relocations. +enum { +#include "ELFRelocs/x86_64.def" +}; + +// i386 relocations. +enum { +#include "ELFRelocs/i386.def" +}; + +// ELF Relocation types for PPC32 +enum { +#include "ELFRelocs/PowerPC.def" +}; + +// Specific e_flags for PPC64 +enum { + // e_flags bits specifying ABI: + // 1 for original ABI using function descriptors, + // 2 for revised ABI without function descriptors, + // 0 for unspecified or not using any features affected by the differences. + EF_PPC64_ABI = 3 +}; + +// Special values for the st_other field in the symbol table entry for PPC64. +enum { + STO_PPC64_LOCAL_BIT = 5, + STO_PPC64_LOCAL_MASK = (7 << STO_PPC64_LOCAL_BIT) +}; +static inline int64_t +decodePPC64LocalEntryOffset(unsigned Other) { + unsigned Val = (Other & STO_PPC64_LOCAL_MASK) >> STO_PPC64_LOCAL_BIT; + return ((1 << Val) >> 2) << 2; +} +static inline unsigned +encodePPC64LocalEntryOffset(int64_t Offset) { + unsigned Val = (Offset >= 4 * 4 + ? (Offset >= 8 * 4 + ? (Offset >= 16 * 4 ? 6 : 5) + : 4) + : (Offset >= 2 * 4 + ? 3 + : (Offset >= 1 * 4 ? 2 : 0))); + return Val << STO_PPC64_LOCAL_BIT; +} + +// ELF Relocation types for PPC64 +enum { +#include "ELFRelocs/PowerPC64.def" +}; + +// ELF Relocation types for AArch64 +enum { +#include "ELFRelocs/AArch64.def" +}; + +// ARM Specific e_flags +enum : unsigned { + EF_ARM_SOFT_FLOAT = 0x00000200U, + EF_ARM_VFP_FLOAT = 0x00000400U, + EF_ARM_EABI_UNKNOWN = 0x00000000U, + EF_ARM_EABI_VER1 = 0x01000000U, + EF_ARM_EABI_VER2 = 0x02000000U, + EF_ARM_EABI_VER3 = 0x03000000U, + EF_ARM_EABI_VER4 = 0x04000000U, + EF_ARM_EABI_VER5 = 0x05000000U, + EF_ARM_EABIMASK = 0xFF000000U +}; + +// ELF Relocation types for ARM +enum { +#include "ELFRelocs/ARM.def" +}; + +// AVR specific e_flags +enum : unsigned { + EF_AVR_ARCH_AVR1 = 1, + EF_AVR_ARCH_AVR2 = 2, + EF_AVR_ARCH_AVR25 = 25, + EF_AVR_ARCH_AVR3 = 3, + EF_AVR_ARCH_AVR31 = 31, + EF_AVR_ARCH_AVR35 = 35, + EF_AVR_ARCH_AVR4 = 4, + EF_AVR_ARCH_AVR5 = 5, + EF_AVR_ARCH_AVR51 = 51, + EF_AVR_ARCH_AVR6 = 6, + EF_AVR_ARCH_AVRTINY = 100, + EF_AVR_ARCH_XMEGA1 = 101, + EF_AVR_ARCH_XMEGA2 = 102, + EF_AVR_ARCH_XMEGA3 = 103, + EF_AVR_ARCH_XMEGA4 = 104, + EF_AVR_ARCH_XMEGA5 = 105, + EF_AVR_ARCH_XMEGA6 = 106, + EF_AVR_ARCH_XMEGA7 = 107 +}; + +// ELF Relocation types for AVR +enum { +#include "ELFRelocs/AVR.def" +}; + +// Mips Specific e_flags +enum : unsigned { + EF_MIPS_NOREORDER = 0x00000001, // Don't reorder instructions + EF_MIPS_PIC = 0x00000002, // Position independent code + EF_MIPS_CPIC = 0x00000004, // Call object with Position independent code + EF_MIPS_ABI2 = 0x00000020, // File uses N32 ABI + EF_MIPS_32BITMODE = 0x00000100, // Code compiled for a 64-bit machine + // in 32-bit mode + EF_MIPS_FP64 = 0x00000200, // Code compiled for a 32-bit machine + // but uses 64-bit FP registers + EF_MIPS_NAN2008 = 0x00000400, // Uses IEE 754-2008 NaN encoding + + // ABI flags + EF_MIPS_ABI_O32 = 0x00001000, // This file follows the first MIPS 32 bit ABI + EF_MIPS_ABI_O64 = 0x00002000, // O32 ABI extended for 64-bit architecture. + EF_MIPS_ABI_EABI32 = 0x00003000, // EABI in 32 bit mode. + EF_MIPS_ABI_EABI64 = 0x00004000, // EABI in 64 bit mode. + EF_MIPS_ABI = 0x0000f000, // Mask for selecting EF_MIPS_ABI_ variant. + + // MIPS machine variant + EF_MIPS_MACH_3900 = 0x00810000, // Toshiba R3900 + EF_MIPS_MACH_4010 = 0x00820000, // LSI R4010 + EF_MIPS_MACH_4100 = 0x00830000, // NEC VR4100 + EF_MIPS_MACH_4650 = 0x00850000, // MIPS R4650 + EF_MIPS_MACH_4120 = 0x00870000, // NEC VR4120 + EF_MIPS_MACH_4111 = 0x00880000, // NEC VR4111/VR4181 + EF_MIPS_MACH_SB1 = 0x008a0000, // Broadcom SB-1 + EF_MIPS_MACH_OCTEON = 0x008b0000, // Cavium Networks Octeon + EF_MIPS_MACH_XLR = 0x008c0000, // RMI Xlr + EF_MIPS_MACH_OCTEON2 = 0x008d0000, // Cavium Networks Octeon2 + EF_MIPS_MACH_OCTEON3 = 0x008e0000, // Cavium Networks Octeon3 + EF_MIPS_MACH_5400 = 0x00910000, // NEC VR5400 + EF_MIPS_MACH_5900 = 0x00920000, // MIPS R5900 + EF_MIPS_MACH_5500 = 0x00980000, // NEC VR5500 + EF_MIPS_MACH_9000 = 0x00990000, // Unknown + EF_MIPS_MACH_LS2E = 0x00a00000, // ST Microelectronics Loongson 2E + EF_MIPS_MACH_LS2F = 0x00a10000, // ST Microelectronics Loongson 2F + EF_MIPS_MACH_LS3A = 0x00a20000, // Loongson 3A + EF_MIPS_MACH = 0x00ff0000, // EF_MIPS_MACH_xxx selection mask + + // ARCH_ASE + EF_MIPS_MICROMIPS = 0x02000000, // microMIPS + EF_MIPS_ARCH_ASE_M16 = + 0x04000000, // Has Mips-16 ISA extensions + EF_MIPS_ARCH_ASE_MDMX = + 0x08000000, // Has MDMX multimedia extensions + EF_MIPS_ARCH_ASE = 0x0f000000, // Mask for EF_MIPS_ARCH_ASE_xxx flags + + // ARCH + EF_MIPS_ARCH_1 = 0x00000000, // MIPS1 instruction set + EF_MIPS_ARCH_2 = 0x10000000, // MIPS2 instruction set + EF_MIPS_ARCH_3 = 0x20000000, // MIPS3 instruction set + EF_MIPS_ARCH_4 = 0x30000000, // MIPS4 instruction set + EF_MIPS_ARCH_5 = 0x40000000, // MIPS5 instruction set + EF_MIPS_ARCH_32 = 0x50000000, // MIPS32 instruction set per linux not elf.h + EF_MIPS_ARCH_64 = 0x60000000, // MIPS64 instruction set per linux not elf.h + EF_MIPS_ARCH_32R2 = 0x70000000, // mips32r2, mips32r3, mips32r5 + EF_MIPS_ARCH_64R2 = 0x80000000, // mips64r2, mips64r3, mips64r5 + EF_MIPS_ARCH_32R6 = 0x90000000, // mips32r6 + EF_MIPS_ARCH_64R6 = 0xa0000000, // mips64r6 + EF_MIPS_ARCH = 0xf0000000 // Mask for applying EF_MIPS_ARCH_ variant +}; + +// ELF Relocation types for Mips +enum { +#include "ELFRelocs/Mips.def" +}; + +// Special values for the st_other field in the symbol table entry for MIPS. +enum { + STO_MIPS_OPTIONAL = 0x04, // Symbol whose definition is optional + STO_MIPS_PLT = 0x08, // PLT entry related dynamic table record + STO_MIPS_PIC = 0x20, // PIC func in an object mixes PIC/non-PIC + STO_MIPS_MICROMIPS = 0x80, // MIPS Specific ISA for MicroMips + STO_MIPS_MIPS16 = 0xf0 // MIPS Specific ISA for Mips16 +}; + +// .MIPS.options section descriptor kinds +enum { + ODK_NULL = 0, // Undefined + ODK_REGINFO = 1, // Register usage information + ODK_EXCEPTIONS = 2, // Exception processing options + ODK_PAD = 3, // Section padding options + ODK_HWPATCH = 4, // Hardware patches applied + ODK_FILL = 5, // Linker fill value + ODK_TAGS = 6, // Space for tool identification + ODK_HWAND = 7, // Hardware AND patches applied + ODK_HWOR = 8, // Hardware OR patches applied + ODK_GP_GROUP = 9, // GP group to use for text/data sections + ODK_IDENT = 10, // ID information + ODK_PAGESIZE = 11 // Page size information +}; + +// Hexagon-specific e_flags +enum { + // Object processor version flags, bits[11:0] + EF_HEXAGON_MACH_V2 = 0x00000001, // Hexagon V2 + EF_HEXAGON_MACH_V3 = 0x00000002, // Hexagon V3 + EF_HEXAGON_MACH_V4 = 0x00000003, // Hexagon V4 + EF_HEXAGON_MACH_V5 = 0x00000004, // Hexagon V5 + EF_HEXAGON_MACH_V55 = 0x00000005, // Hexagon V55 + EF_HEXAGON_MACH_V60 = 0x00000060, // Hexagon V60 + + // Highest ISA version flags + EF_HEXAGON_ISA_MACH = 0x00000000, // Same as specified in bits[11:0] + // of e_flags + EF_HEXAGON_ISA_V2 = 0x00000010, // Hexagon V2 ISA + EF_HEXAGON_ISA_V3 = 0x00000020, // Hexagon V3 ISA + EF_HEXAGON_ISA_V4 = 0x00000030, // Hexagon V4 ISA + EF_HEXAGON_ISA_V5 = 0x00000040, // Hexagon V5 ISA + EF_HEXAGON_ISA_V55 = 0x00000050, // Hexagon V55 ISA + EF_HEXAGON_ISA_V60 = 0x00000060, // Hexagon V60 ISA +}; + +// Hexagon-specific section indexes for common small data +enum { + SHN_HEXAGON_SCOMMON = 0xff00, // Other access sizes + SHN_HEXAGON_SCOMMON_1 = 0xff01, // Byte-sized access + SHN_HEXAGON_SCOMMON_2 = 0xff02, // Half-word-sized access + SHN_HEXAGON_SCOMMON_4 = 0xff03, // Word-sized access + SHN_HEXAGON_SCOMMON_8 = 0xff04 // Double-word-size access +}; + +// ELF Relocation types for Hexagon +enum { +#include "ELFRelocs/Hexagon.def" +}; + +// ELF Relocation types for S390/zSeries +enum { +#include "ELFRelocs/SystemZ.def" +}; + +// ELF Relocation type for Sparc. +enum { +#include "ELFRelocs/Sparc.def" +}; + +// ELF Relocation types for WebAssembly +enum { +#include "ELFRelocs/WebAssembly.def" +}; + +#undef ELF_RELOC + +// Section header. +struct Elf32_Shdr { + Elf32_Word sh_name; // Section name (index into string table) + Elf32_Word sh_type; // Section type (SHT_*) + Elf32_Word sh_flags; // Section flags (SHF_*) + Elf32_Addr sh_addr; // Address where section is to be loaded + Elf32_Off sh_offset; // File offset of section data, in bytes + Elf32_Word sh_size; // Size of section, in bytes + Elf32_Word sh_link; // Section type-specific header table index link + Elf32_Word sh_info; // Section type-specific extra information + Elf32_Word sh_addralign; // Section address alignment + Elf32_Word sh_entsize; // Size of records contained within the section +}; + +// Section header for ELF64 - same fields as ELF32, different types. +struct Elf64_Shdr { + Elf64_Word sh_name; + Elf64_Word sh_type; + Elf64_Xword sh_flags; + Elf64_Addr sh_addr; + Elf64_Off sh_offset; + Elf64_Xword sh_size; + Elf64_Word sh_link; + Elf64_Word sh_info; + Elf64_Xword sh_addralign; + Elf64_Xword sh_entsize; +}; + +// Special section indices. +enum { + SHN_UNDEF = 0, // Undefined, missing, irrelevant, or meaningless + SHN_LORESERVE = 0xff00, // Lowest reserved index + SHN_LOPROC = 0xff00, // Lowest processor-specific index + SHN_HIPROC = 0xff1f, // Highest processor-specific index + SHN_LOOS = 0xff20, // Lowest operating system-specific index + SHN_HIOS = 0xff3f, // Highest operating system-specific index + SHN_ABS = 0xfff1, // Symbol has absolute value; does not need relocation + SHN_COMMON = 0xfff2, // FORTRAN COMMON or C external global variables + SHN_XINDEX = 0xffff, // Mark that the index is >= SHN_LORESERVE + SHN_HIRESERVE = 0xffff // Highest reserved index +}; + +// Section types. +enum : unsigned { + SHT_NULL = 0, // No associated section (inactive entry). + SHT_PROGBITS = 1, // Program-defined contents. + SHT_SYMTAB = 2, // Symbol table. + SHT_STRTAB = 3, // String table. + SHT_RELA = 4, // Relocation entries; explicit addends. + SHT_HASH = 5, // Symbol hash table. + SHT_DYNAMIC = 6, // Information for dynamic linking. + SHT_NOTE = 7, // Information about the file. + SHT_NOBITS = 8, // Data occupies no space in the file. + SHT_REL = 9, // Relocation entries; no explicit addends. + SHT_SHLIB = 10, // Reserved. + SHT_DYNSYM = 11, // Symbol table. + SHT_INIT_ARRAY = 14, // Pointers to initialization functions. + SHT_FINI_ARRAY = 15, // Pointers to termination functions. + SHT_PREINIT_ARRAY = 16, // Pointers to pre-init functions. + SHT_GROUP = 17, // Section group. + SHT_SYMTAB_SHNDX = 18, // Indices for SHN_XINDEX entries. + SHT_LOOS = 0x60000000, // Lowest operating system-specific type. + SHT_GNU_ATTRIBUTES= 0x6ffffff5, // Object attributes. + SHT_GNU_HASH = 0x6ffffff6, // GNU-style hash table. + SHT_GNU_verdef = 0x6ffffffd, // GNU version definitions. + SHT_GNU_verneed = 0x6ffffffe, // GNU version references. + SHT_GNU_versym = 0x6fffffff, // GNU symbol versions table. + SHT_HIOS = 0x6fffffff, // Highest operating system-specific type. + SHT_LOPROC = 0x70000000, // Lowest processor arch-specific type. + // Fixme: All this is duplicated in MCSectionELF. Why?? + // Exception Index table + SHT_ARM_EXIDX = 0x70000001U, + // BPABI DLL dynamic linking pre-emption map + SHT_ARM_PREEMPTMAP = 0x70000002U, + // Object file compatibility attributes + SHT_ARM_ATTRIBUTES = 0x70000003U, + SHT_ARM_DEBUGOVERLAY = 0x70000004U, + SHT_ARM_OVERLAYSECTION = 0x70000005U, + SHT_HEX_ORDERED = 0x70000000, // Link editor is to sort the entries in + // this section based on their sizes + SHT_X86_64_UNWIND = 0x70000001, // Unwind information + + SHT_MIPS_REGINFO = 0x70000006, // Register usage information + SHT_MIPS_OPTIONS = 0x7000000d, // General options + SHT_MIPS_ABIFLAGS = 0x7000002a, // ABI information. + + SHT_HIPROC = 0x7fffffff, // Highest processor arch-specific type. + SHT_LOUSER = 0x80000000, // Lowest type reserved for applications. + SHT_HIUSER = 0xffffffff // Highest type reserved for applications. +}; + +// Section flags. +enum : unsigned { + // Section data should be writable during execution. + SHF_WRITE = 0x1, + + // Section occupies memory during program execution. + SHF_ALLOC = 0x2, + + // Section contains executable machine instructions. + SHF_EXECINSTR = 0x4, + + // The data in this section may be merged. + SHF_MERGE = 0x10, + + // The data in this section is null-terminated strings. + SHF_STRINGS = 0x20, + + // A field in this section holds a section header table index. + SHF_INFO_LINK = 0x40U, + + // Adds special ordering requirements for link editors. + SHF_LINK_ORDER = 0x80U, + + // This section requires special OS-specific processing to avoid incorrect + // behavior. + SHF_OS_NONCONFORMING = 0x100U, + + // This section is a member of a section group. + SHF_GROUP = 0x200U, + + // This section holds Thread-Local Storage. + SHF_TLS = 0x400U, + + // This section is excluded from the final executable or shared library. + SHF_EXCLUDE = 0x80000000U, + + // Start of target-specific flags. + + /// XCORE_SHF_CP_SECTION - All sections with the "c" flag are grouped + /// together by the linker to form the constant pool and the cp register is + /// set to the start of the constant pool by the boot code. + XCORE_SHF_CP_SECTION = 0x800U, + + /// XCORE_SHF_DP_SECTION - All sections with the "d" flag are grouped + /// together by the linker to form the data section and the dp register is + /// set to the start of the section by the boot code. + XCORE_SHF_DP_SECTION = 0x1000U, + + SHF_MASKOS = 0x0ff00000, + + // Bits indicating processor-specific flags. + SHF_MASKPROC = 0xf0000000, + + // If an object file section does not have this flag set, then it may not hold + // more than 2GB and can be freely referred to in objects using smaller code + // models. Otherwise, only objects using larger code models can refer to them. + // For example, a medium code model object can refer to data in a section that + // sets this flag besides being able to refer to data in a section that does + // not set it; likewise, a small code model object can refer only to code in a + // section that does not set this flag. + SHF_X86_64_LARGE = 0x10000000, + + // All sections with the GPREL flag are grouped into a global data area + // for faster accesses + SHF_HEX_GPREL = 0x10000000, + + // Section contains text/data which may be replicated in other sections. + // Linker must retain only one copy. + SHF_MIPS_NODUPES = 0x01000000, + + // Linker must generate implicit hidden weak names. + SHF_MIPS_NAMES = 0x02000000, + + // Section data local to process. + SHF_MIPS_LOCAL = 0x04000000, + + // Do not strip this section. + SHF_MIPS_NOSTRIP = 0x08000000, + + // Section must be part of global data area. + SHF_MIPS_GPREL = 0x10000000, + + // This section should be merged. + SHF_MIPS_MERGE = 0x20000000, + + // Address size to be inferred from section entry size. + SHF_MIPS_ADDR = 0x40000000, + + // Section data is string data by default. + SHF_MIPS_STRING = 0x80000000, + + SHF_AMDGPU_HSA_GLOBAL = 0x00100000, + SHF_AMDGPU_HSA_READONLY = 0x00200000, + SHF_AMDGPU_HSA_CODE = 0x00400000, + SHF_AMDGPU_HSA_AGENT = 0x00800000 +}; + +// Section Group Flags +enum : unsigned { + GRP_COMDAT = 0x1, + GRP_MASKOS = 0x0ff00000, + GRP_MASKPROC = 0xf0000000 +}; + +// Symbol table entries for ELF32. +struct Elf32_Sym { + Elf32_Word st_name; // Symbol name (index into string table) + Elf32_Addr st_value; // Value or address associated with the symbol + Elf32_Word st_size; // Size of the symbol + unsigned char st_info; // Symbol's type and binding attributes + unsigned char st_other; // Must be zero; reserved + Elf32_Half st_shndx; // Which section (header table index) it's defined in + + // These accessors and mutators correspond to the ELF32_ST_BIND, + // ELF32_ST_TYPE, and ELF32_ST_INFO macros defined in the ELF specification: + unsigned char getBinding() const { return st_info >> 4; } + unsigned char getType() const { return st_info & 0x0f; } + void setBinding(unsigned char b) { setBindingAndType(b, getType()); } + void setType(unsigned char t) { setBindingAndType(getBinding(), t); } + void setBindingAndType(unsigned char b, unsigned char t) { + st_info = (b << 4) + (t & 0x0f); + } +}; + +// Symbol table entries for ELF64. +struct Elf64_Sym { + Elf64_Word st_name; // Symbol name (index into string table) + unsigned char st_info; // Symbol's type and binding attributes + unsigned char st_other; // Must be zero; reserved + Elf64_Half st_shndx; // Which section (header tbl index) it's defined in + Elf64_Addr st_value; // Value or address associated with the symbol + Elf64_Xword st_size; // Size of the symbol + + // These accessors and mutators are identical to those defined for ELF32 + // symbol table entries. + unsigned char getBinding() const { return st_info >> 4; } + unsigned char getType() const { return st_info & 0x0f; } + void setBinding(unsigned char b) { setBindingAndType(b, getType()); } + void setType(unsigned char t) { setBindingAndType(getBinding(), t); } + void setBindingAndType(unsigned char b, unsigned char t) { + st_info = (b << 4) + (t & 0x0f); + } +}; + +// The size (in bytes) of symbol table entries. +enum { + SYMENTRY_SIZE32 = 16, // 32-bit symbol entry size + SYMENTRY_SIZE64 = 24 // 64-bit symbol entry size. +}; + +// Symbol bindings. +enum { + STB_LOCAL = 0, // Local symbol, not visible outside obj file containing def + STB_GLOBAL = 1, // Global symbol, visible to all object files being combined + STB_WEAK = 2, // Weak symbol, like global but lower-precedence + STB_GNU_UNIQUE = 10, + STB_LOOS = 10, // Lowest operating system-specific binding type + STB_HIOS = 12, // Highest operating system-specific binding type + STB_LOPROC = 13, // Lowest processor-specific binding type + STB_HIPROC = 15 // Highest processor-specific binding type +}; + +// Symbol types. +enum { + STT_NOTYPE = 0, // Symbol's type is not specified + STT_OBJECT = 1, // Symbol is a data object (variable, array, etc.) + STT_FUNC = 2, // Symbol is executable code (function, etc.) + STT_SECTION = 3, // Symbol refers to a section + STT_FILE = 4, // Local, absolute symbol that refers to a file + STT_COMMON = 5, // An uninitialized common block + STT_TLS = 6, // Thread local data object + STT_GNU_IFUNC = 10, // GNU indirect function + STT_LOOS = 10, // Lowest operating system-specific symbol type + STT_HIOS = 12, // Highest operating system-specific symbol type + STT_LOPROC = 13, // Lowest processor-specific symbol type + STT_HIPROC = 15, // Highest processor-specific symbol type + + // AMDGPU symbol types + STT_AMDGPU_HSA_KERNEL = 10, + STT_AMDGPU_HSA_INDIRECT_FUNCTION = 11, + STT_AMDGPU_HSA_METADATA = 12 +}; + +enum { + STV_DEFAULT = 0, // Visibility is specified by binding type + STV_INTERNAL = 1, // Defined by processor supplements + STV_HIDDEN = 2, // Not visible to other components + STV_PROTECTED = 3 // Visible in other components but not preemptable +}; + +// Symbol number. +enum { + STN_UNDEF = 0 +}; + +// Special relocation symbols used in the MIPS64 ELF relocation entries +enum { + RSS_UNDEF = 0, // None + RSS_GP = 1, // Value of gp + RSS_GP0 = 2, // Value of gp used to create object being relocated + RSS_LOC = 3 // Address of location being relocated +}; + +// Relocation entry, without explicit addend. +struct Elf32_Rel { + Elf32_Addr r_offset; // Location (file byte offset, or program virtual addr) + Elf32_Word r_info; // Symbol table index and type of relocation to apply + + // These accessors and mutators correspond to the ELF32_R_SYM, ELF32_R_TYPE, + // and ELF32_R_INFO macros defined in the ELF specification: + Elf32_Word getSymbol() const { return (r_info >> 8); } + unsigned char getType() const { return (unsigned char) (r_info & 0x0ff); } + void setSymbol(Elf32_Word s) { setSymbolAndType(s, getType()); } + void setType(unsigned char t) { setSymbolAndType(getSymbol(), t); } + void setSymbolAndType(Elf32_Word s, unsigned char t) { + r_info = (s << 8) + t; + } +}; + +// Relocation entry with explicit addend. +struct Elf32_Rela { + Elf32_Addr r_offset; // Location (file byte offset, or program virtual addr) + Elf32_Word r_info; // Symbol table index and type of relocation to apply + Elf32_Sword r_addend; // Compute value for relocatable field by adding this + + // These accessors and mutators correspond to the ELF32_R_SYM, ELF32_R_TYPE, + // and ELF32_R_INFO macros defined in the ELF specification: + Elf32_Word getSymbol() const { return (r_info >> 8); } + unsigned char getType() const { return (unsigned char) (r_info & 0x0ff); } + void setSymbol(Elf32_Word s) { setSymbolAndType(s, getType()); } + void setType(unsigned char t) { setSymbolAndType(getSymbol(), t); } + void setSymbolAndType(Elf32_Word s, unsigned char t) { + r_info = (s << 8) + t; + } +}; + +// Relocation entry, without explicit addend. +struct Elf64_Rel { + Elf64_Addr r_offset; // Location (file byte offset, or program virtual addr). + Elf64_Xword r_info; // Symbol table index and type of relocation to apply. + + // These accessors and mutators correspond to the ELF64_R_SYM, ELF64_R_TYPE, + // and ELF64_R_INFO macros defined in the ELF specification: + Elf64_Word getSymbol() const { return (r_info >> 32); } + Elf64_Word getType() const { + return (Elf64_Word) (r_info & 0xffffffffL); + } + void setSymbol(Elf64_Word s) { setSymbolAndType(s, getType()); } + void setType(Elf64_Word t) { setSymbolAndType(getSymbol(), t); } + void setSymbolAndType(Elf64_Word s, Elf64_Word t) { + r_info = ((Elf64_Xword)s << 32) + (t&0xffffffffL); + } +}; + +// Relocation entry with explicit addend. +struct Elf64_Rela { + Elf64_Addr r_offset; // Location (file byte offset, or program virtual addr). + Elf64_Xword r_info; // Symbol table index and type of relocation to apply. + Elf64_Sxword r_addend; // Compute value for relocatable field by adding this. + + // These accessors and mutators correspond to the ELF64_R_SYM, ELF64_R_TYPE, + // and ELF64_R_INFO macros defined in the ELF specification: + Elf64_Word getSymbol() const { return (r_info >> 32); } + Elf64_Word getType() const { + return (Elf64_Word) (r_info & 0xffffffffL); + } + void setSymbol(Elf64_Word s) { setSymbolAndType(s, getType()); } + void setType(Elf64_Word t) { setSymbolAndType(getSymbol(), t); } + void setSymbolAndType(Elf64_Word s, Elf64_Word t) { + r_info = ((Elf64_Xword)s << 32) + (t&0xffffffffL); + } +}; + +// Program header for ELF32. +struct Elf32_Phdr { + Elf32_Word p_type; // Type of segment + Elf32_Off p_offset; // File offset where segment is located, in bytes + Elf32_Addr p_vaddr; // Virtual address of beginning of segment + Elf32_Addr p_paddr; // Physical address of beginning of segment (OS-specific) + Elf32_Word p_filesz; // Num. of bytes in file image of segment (may be zero) + Elf32_Word p_memsz; // Num. of bytes in mem image of segment (may be zero) + Elf32_Word p_flags; // Segment flags + Elf32_Word p_align; // Segment alignment constraint +}; + +// Program header for ELF64. +struct Elf64_Phdr { + Elf64_Word p_type; // Type of segment + Elf64_Word p_flags; // Segment flags + Elf64_Off p_offset; // File offset where segment is located, in bytes + Elf64_Addr p_vaddr; // Virtual address of beginning of segment + Elf64_Addr p_paddr; // Physical addr of beginning of segment (OS-specific) + Elf64_Xword p_filesz; // Num. of bytes in file image of segment (may be zero) + Elf64_Xword p_memsz; // Num. of bytes in mem image of segment (may be zero) + Elf64_Xword p_align; // Segment alignment constraint +}; + +// Segment types. +enum { + PT_NULL = 0, // Unused segment. + PT_LOAD = 1, // Loadable segment. + PT_DYNAMIC = 2, // Dynamic linking information. + PT_INTERP = 3, // Interpreter pathname. + PT_NOTE = 4, // Auxiliary information. + PT_SHLIB = 5, // Reserved. + PT_PHDR = 6, // The program header table itself. + PT_TLS = 7, // The thread-local storage template. + PT_LOOS = 0x60000000, // Lowest operating system-specific pt entry type. + PT_HIOS = 0x6fffffff, // Highest operating system-specific pt entry type. + PT_LOPROC = 0x70000000, // Lowest processor-specific program hdr entry type. + PT_HIPROC = 0x7fffffff, // Highest processor-specific program hdr entry type. + + // x86-64 program header types. + // These all contain stack unwind tables. + PT_GNU_EH_FRAME = 0x6474e550, + PT_SUNW_EH_FRAME = 0x6474e550, + PT_SUNW_UNWIND = 0x6464e550, + + PT_GNU_STACK = 0x6474e551, // Indicates stack executability. + PT_GNU_RELRO = 0x6474e552, // Read-only after relocation. + + // ARM program header types. + PT_ARM_ARCHEXT = 0x70000000, // Platform architecture compatibility info + // These all contain stack unwind tables. + PT_ARM_EXIDX = 0x70000001, + PT_ARM_UNWIND = 0x70000001, + + // MIPS program header types. + PT_MIPS_REGINFO = 0x70000000, // Register usage information. + PT_MIPS_RTPROC = 0x70000001, // Runtime procedure table. + PT_MIPS_OPTIONS = 0x70000002, // Options segment. + PT_MIPS_ABIFLAGS = 0x70000003, // Abiflags segment. + + // AMDGPU program header types. + PT_AMDGPU_HSA_LOAD_GLOBAL_PROGRAM = 0x60000000, + PT_AMDGPU_HSA_LOAD_GLOBAL_AGENT = 0x60000001, + PT_AMDGPU_HSA_LOAD_READONLY_AGENT = 0x60000002, + PT_AMDGPU_HSA_LOAD_CODE_AGENT = 0x60000003, + + // WebAssembly program header types. + PT_WEBASSEMBLY_FUNCTIONS = PT_LOPROC + 0, // Function definitions. +}; + +// Segment flag bits. +enum : unsigned { + PF_X = 1, // Execute + PF_W = 2, // Write + PF_R = 4, // Read + PF_MASKOS = 0x0ff00000,// Bits for operating system-specific semantics. + PF_MASKPROC = 0xf0000000 // Bits for processor-specific semantics. +}; + +// Dynamic table entry for ELF32. +struct Elf32_Dyn +{ + Elf32_Sword d_tag; // Type of dynamic table entry. + union + { + Elf32_Word d_val; // Integer value of entry. + Elf32_Addr d_ptr; // Pointer value of entry. + } d_un; +}; + +// Dynamic table entry for ELF64. +struct Elf64_Dyn +{ + Elf64_Sxword d_tag; // Type of dynamic table entry. + union + { + Elf64_Xword d_val; // Integer value of entry. + Elf64_Addr d_ptr; // Pointer value of entry. + } d_un; +}; + +// Dynamic table entry tags. +enum { + DT_NULL = 0, // Marks end of dynamic array. + DT_NEEDED = 1, // String table offset of needed library. + DT_PLTRELSZ = 2, // Size of relocation entries in PLT. + DT_PLTGOT = 3, // Address associated with linkage table. + DT_HASH = 4, // Address of symbolic hash table. + DT_STRTAB = 5, // Address of dynamic string table. + DT_SYMTAB = 6, // Address of dynamic symbol table. + DT_RELA = 7, // Address of relocation table (Rela entries). + DT_RELASZ = 8, // Size of Rela relocation table. + DT_RELAENT = 9, // Size of a Rela relocation entry. + DT_STRSZ = 10, // Total size of the string table. + DT_SYMENT = 11, // Size of a symbol table entry. + DT_INIT = 12, // Address of initialization function. + DT_FINI = 13, // Address of termination function. + DT_SONAME = 14, // String table offset of a shared objects name. + DT_RPATH = 15, // String table offset of library search path. + DT_SYMBOLIC = 16, // Changes symbol resolution algorithm. + DT_REL = 17, // Address of relocation table (Rel entries). + DT_RELSZ = 18, // Size of Rel relocation table. + DT_RELENT = 19, // Size of a Rel relocation entry. + DT_PLTREL = 20, // Type of relocation entry used for linking. + DT_DEBUG = 21, // Reserved for debugger. + DT_TEXTREL = 22, // Relocations exist for non-writable segments. + DT_JMPREL = 23, // Address of relocations associated with PLT. + DT_BIND_NOW = 24, // Process all relocations before execution. + DT_INIT_ARRAY = 25, // Pointer to array of initialization functions. + DT_FINI_ARRAY = 26, // Pointer to array of termination functions. + DT_INIT_ARRAYSZ = 27, // Size of DT_INIT_ARRAY. + DT_FINI_ARRAYSZ = 28, // Size of DT_FINI_ARRAY. + DT_RUNPATH = 29, // String table offset of lib search path. + DT_FLAGS = 30, // Flags. + DT_ENCODING = 32, // Values from here to DT_LOOS follow the rules + // for the interpretation of the d_un union. + + DT_PREINIT_ARRAY = 32, // Pointer to array of preinit functions. + DT_PREINIT_ARRAYSZ = 33, // Size of the DT_PREINIT_ARRAY array. + + DT_LOOS = 0x60000000, // Start of environment specific tags. + DT_HIOS = 0x6FFFFFFF, // End of environment specific tags. + DT_LOPROC = 0x70000000, // Start of processor specific tags. + DT_HIPROC = 0x7FFFFFFF, // End of processor specific tags. + + DT_GNU_HASH = 0x6FFFFEF5, // Reference to the GNU hash table. + DT_TLSDESC_PLT = 0x6FFFFEF6, // Location of PLT entry for TLS descriptor resolver calls. + DT_TLSDESC_GOT = 0x6FFFFEF7, // Location of GOT entry used by TLS descriptor resolver PLT entry. + DT_RELACOUNT = 0x6FFFFFF9, // ELF32_Rela count. + DT_RELCOUNT = 0x6FFFFFFA, // ELF32_Rel count. + + DT_FLAGS_1 = 0X6FFFFFFB, // Flags_1. + DT_VERSYM = 0x6FFFFFF0, // The address of .gnu.version section. + DT_VERDEF = 0X6FFFFFFC, // The address of the version definition table. + DT_VERDEFNUM = 0X6FFFFFFD, // The number of entries in DT_VERDEF. + DT_VERNEED = 0X6FFFFFFE, // The address of the version Dependency table. + DT_VERNEEDNUM = 0X6FFFFFFF, // The number of entries in DT_VERNEED. + + // Mips specific dynamic table entry tags. + DT_MIPS_RLD_VERSION = 0x70000001, // 32 bit version number for runtime + // linker interface. + DT_MIPS_TIME_STAMP = 0x70000002, // Time stamp. + DT_MIPS_ICHECKSUM = 0x70000003, // Checksum of external strings + // and common sizes. + DT_MIPS_IVERSION = 0x70000004, // Index of version string + // in string table. + DT_MIPS_FLAGS = 0x70000005, // 32 bits of flags. + DT_MIPS_BASE_ADDRESS = 0x70000006, // Base address of the segment. + DT_MIPS_MSYM = 0x70000007, // Address of .msym section. + DT_MIPS_CONFLICT = 0x70000008, // Address of .conflict section. + DT_MIPS_LIBLIST = 0x70000009, // Address of .liblist section. + DT_MIPS_LOCAL_GOTNO = 0x7000000a, // Number of local global offset + // table entries. + DT_MIPS_CONFLICTNO = 0x7000000b, // Number of entries + // in the .conflict section. + DT_MIPS_LIBLISTNO = 0x70000010, // Number of entries + // in the .liblist section. + DT_MIPS_SYMTABNO = 0x70000011, // Number of entries + // in the .dynsym section. + DT_MIPS_UNREFEXTNO = 0x70000012, // Index of first external dynamic symbol + // not referenced locally. + DT_MIPS_GOTSYM = 0x70000013, // Index of first dynamic symbol + // in global offset table. + DT_MIPS_HIPAGENO = 0x70000014, // Number of page table entries + // in global offset table. + DT_MIPS_RLD_MAP = 0x70000016, // Address of run time loader map, + // used for debugging. + DT_MIPS_DELTA_CLASS = 0x70000017, // Delta C++ class definition. + DT_MIPS_DELTA_CLASS_NO = 0x70000018, // Number of entries + // in DT_MIPS_DELTA_CLASS. + DT_MIPS_DELTA_INSTANCE = 0x70000019, // Delta C++ class instances. + DT_MIPS_DELTA_INSTANCE_NO = 0x7000001A, // Number of entries + // in DT_MIPS_DELTA_INSTANCE. + DT_MIPS_DELTA_RELOC = 0x7000001B, // Delta relocations. + DT_MIPS_DELTA_RELOC_NO = 0x7000001C, // Number of entries + // in DT_MIPS_DELTA_RELOC. + DT_MIPS_DELTA_SYM = 0x7000001D, // Delta symbols that Delta + // relocations refer to. + DT_MIPS_DELTA_SYM_NO = 0x7000001E, // Number of entries + // in DT_MIPS_DELTA_SYM. + DT_MIPS_DELTA_CLASSSYM = 0x70000020, // Delta symbols that hold + // class declarations. + DT_MIPS_DELTA_CLASSSYM_NO = 0x70000021, // Number of entries + // in DT_MIPS_DELTA_CLASSSYM. + DT_MIPS_CXX_FLAGS = 0x70000022, // Flags indicating information + // about C++ flavor. + DT_MIPS_PIXIE_INIT = 0x70000023, // Pixie information. + DT_MIPS_SYMBOL_LIB = 0x70000024, // Address of .MIPS.symlib + DT_MIPS_LOCALPAGE_GOTIDX = 0x70000025, // The GOT index of the first PTE + // for a segment + DT_MIPS_LOCAL_GOTIDX = 0x70000026, // The GOT index of the first PTE + // for a local symbol + DT_MIPS_HIDDEN_GOTIDX = 0x70000027, // The GOT index of the first PTE + // for a hidden symbol + DT_MIPS_PROTECTED_GOTIDX = 0x70000028, // The GOT index of the first PTE + // for a protected symbol + DT_MIPS_OPTIONS = 0x70000029, // Address of `.MIPS.options'. + DT_MIPS_INTERFACE = 0x7000002A, // Address of `.interface'. + DT_MIPS_DYNSTR_ALIGN = 0x7000002B, // Unknown. + DT_MIPS_INTERFACE_SIZE = 0x7000002C, // Size of the .interface section. + DT_MIPS_RLD_TEXT_RESOLVE_ADDR = 0x7000002D, // Size of rld_text_resolve + // function stored in the GOT. + DT_MIPS_PERF_SUFFIX = 0x7000002E, // Default suffix of DSO to be added + // by rld on dlopen() calls. + DT_MIPS_COMPACT_SIZE = 0x7000002F, // Size of compact relocation + // section (O32). + DT_MIPS_GP_VALUE = 0x70000030, // GP value for auxiliary GOTs. + DT_MIPS_AUX_DYNAMIC = 0x70000031, // Address of auxiliary .dynamic. + DT_MIPS_PLTGOT = 0x70000032, // Address of the base of the PLTGOT. + DT_MIPS_RWPLT = 0x70000034, // Points to the base + // of a writable PLT. + DT_MIPS_RLD_MAP_REL = 0x70000035, // Relative offset of run time loader + // map, used for debugging. + + // Sun machine-independent extensions. + DT_AUXILIARY = 0x7FFFFFFD, // Shared object to load before self + DT_FILTER = 0x7FFFFFFF // Shared object to get values from +}; + +// DT_FLAGS values. +enum { + DF_ORIGIN = 0x01, // The object may reference $ORIGIN. + DF_SYMBOLIC = 0x02, // Search the shared lib before searching the exe. + DF_TEXTREL = 0x04, // Relocations may modify a non-writable segment. + DF_BIND_NOW = 0x08, // Process all relocations on load. + DF_STATIC_TLS = 0x10 // Reject attempts to load dynamically. +}; + +// State flags selectable in the `d_un.d_val' element of the DT_FLAGS_1 entry. +enum { + DF_1_NOW = 0x00000001, // Set RTLD_NOW for this object. + DF_1_GLOBAL = 0x00000002, // Set RTLD_GLOBAL for this object. + DF_1_GROUP = 0x00000004, // Set RTLD_GROUP for this object. + DF_1_NODELETE = 0x00000008, // Set RTLD_NODELETE for this object. + DF_1_LOADFLTR = 0x00000010, // Trigger filtee loading at runtime. + DF_1_INITFIRST = 0x00000020, // Set RTLD_INITFIRST for this object. + DF_1_NOOPEN = 0x00000040, // Set RTLD_NOOPEN for this object. + DF_1_ORIGIN = 0x00000080, // $ORIGIN must be handled. + DF_1_DIRECT = 0x00000100, // Direct binding enabled. + DF_1_TRANS = 0x00000200, + DF_1_INTERPOSE = 0x00000400, // Object is used to interpose. + DF_1_NODEFLIB = 0x00000800, // Ignore default lib search path. + DF_1_NODUMP = 0x00001000, // Object can't be dldump'ed. + DF_1_CONFALT = 0x00002000, // Configuration alternative created. + DF_1_ENDFILTEE = 0x00004000, // Filtee terminates filters search. + DF_1_DISPRELDNE = 0x00008000, // Disp reloc applied at build time. + DF_1_DISPRELPND = 0x00010000, // Disp reloc applied at run-time. + DF_1_NODIRECT = 0x00020000, // Object has no-direct binding. + DF_1_IGNMULDEF = 0x00040000, + DF_1_NOKSYMS = 0x00080000, + DF_1_NOHDR = 0x00100000, + DF_1_EDITED = 0x00200000, // Object is modified after built. + DF_1_NORELOC = 0x00400000, + DF_1_SYMINTPOSE = 0x00800000, // Object has individual interposers. + DF_1_GLOBAUDIT = 0x01000000, // Global auditing required. + DF_1_SINGLETON = 0x02000000 // Singleton symbols are used. +}; + +// DT_MIPS_FLAGS values. +enum { + RHF_NONE = 0x00000000, // No flags. + RHF_QUICKSTART = 0x00000001, // Uses shortcut pointers. + RHF_NOTPOT = 0x00000002, // Hash size is not a power of two. + RHS_NO_LIBRARY_REPLACEMENT = 0x00000004, // Ignore LD_LIBRARY_PATH. + RHF_NO_MOVE = 0x00000008, // DSO address may not be relocated. + RHF_SGI_ONLY = 0x00000010, // SGI specific features. + RHF_GUARANTEE_INIT = 0x00000020, // Guarantee that .init will finish + // executing before any non-init + // code in DSO is called. + RHF_DELTA_C_PLUS_PLUS = 0x00000040, // Contains Delta C++ code. + RHF_GUARANTEE_START_INIT = 0x00000080, // Guarantee that .init will start + // executing before any non-init + // code in DSO is called. + RHF_PIXIE = 0x00000100, // Generated by pixie. + RHF_DEFAULT_DELAY_LOAD = 0x00000200, // Delay-load DSO by default. + RHF_REQUICKSTART = 0x00000400, // Object may be requickstarted + RHF_REQUICKSTARTED = 0x00000800, // Object has been requickstarted + RHF_CORD = 0x00001000, // Generated by cord. + RHF_NO_UNRES_UNDEF = 0x00002000, // Object contains no unresolved + // undef symbols. + RHF_RLD_ORDER_SAFE = 0x00004000 // Symbol table is in a safe order. +}; + +// ElfXX_VerDef structure version (GNU versioning) +enum { + VER_DEF_NONE = 0, + VER_DEF_CURRENT = 1 +}; + +// VerDef Flags (ElfXX_VerDef::vd_flags) +enum { + VER_FLG_BASE = 0x1, + VER_FLG_WEAK = 0x2, + VER_FLG_INFO = 0x4 +}; + +// Special constants for the version table. (SHT_GNU_versym/.gnu.version) +enum { + VER_NDX_LOCAL = 0, // Unversioned local symbol + VER_NDX_GLOBAL = 1, // Unversioned global symbol + VERSYM_VERSION = 0x7fff, // Version Index mask + VERSYM_HIDDEN = 0x8000 // Hidden bit (non-default version) +}; + +// ElfXX_VerNeed structure version (GNU versioning) +enum { + VER_NEED_NONE = 0, + VER_NEED_CURRENT = 1 +}; + +} // end namespace ELF + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/Support/ELFRelocs/AArch64.def b/llvm/include/llvm/Support/ELFRelocs/AArch64.def new file mode 100644 index 0000000..aa0c560 --- /dev/null +++ b/llvm/include/llvm/Support/ELFRelocs/AArch64.def @@ -0,0 +1,147 @@ + +#ifndef ELF_RELOC +#error "ELF_RELOC must be defined" +#endif + +// ABI release 1.0 +ELF_RELOC(R_AARCH64_NONE, 0) + +ELF_RELOC(R_AARCH64_ABS64, 0x101) +ELF_RELOC(R_AARCH64_ABS32, 0x102) +ELF_RELOC(R_AARCH64_ABS16, 0x103) +ELF_RELOC(R_AARCH64_PREL64, 0x104) +ELF_RELOC(R_AARCH64_PREL32, 0x105) +ELF_RELOC(R_AARCH64_PREL16, 0x106) + +ELF_RELOC(R_AARCH64_MOVW_UABS_G0, 0x107) +ELF_RELOC(R_AARCH64_MOVW_UABS_G0_NC, 0x108) +ELF_RELOC(R_AARCH64_MOVW_UABS_G1, 0x109) +ELF_RELOC(R_AARCH64_MOVW_UABS_G1_NC, 0x10a) +ELF_RELOC(R_AARCH64_MOVW_UABS_G2, 0x10b) +ELF_RELOC(R_AARCH64_MOVW_UABS_G2_NC, 0x10c) +ELF_RELOC(R_AARCH64_MOVW_UABS_G3, 0x10d) +ELF_RELOC(R_AARCH64_MOVW_SABS_G0, 0x10e) +ELF_RELOC(R_AARCH64_MOVW_SABS_G1, 0x10f) +ELF_RELOC(R_AARCH64_MOVW_SABS_G2, 0x110) + +ELF_RELOC(R_AARCH64_LD_PREL_LO19, 0x111) +ELF_RELOC(R_AARCH64_ADR_PREL_LO21, 0x112) +ELF_RELOC(R_AARCH64_ADR_PREL_PG_HI21, 0x113) +ELF_RELOC(R_AARCH64_ADR_PREL_PG_HI21_NC, 0x114) +ELF_RELOC(R_AARCH64_ADD_ABS_LO12_NC, 0x115) +ELF_RELOC(R_AARCH64_LDST8_ABS_LO12_NC, 0x116) + +ELF_RELOC(R_AARCH64_TSTBR14, 0x117) +ELF_RELOC(R_AARCH64_CONDBR19, 0x118) +ELF_RELOC(R_AARCH64_JUMP26, 0x11a) +ELF_RELOC(R_AARCH64_CALL26, 0x11b) + +ELF_RELOC(R_AARCH64_LDST16_ABS_LO12_NC, 0x11c) +ELF_RELOC(R_AARCH64_LDST32_ABS_LO12_NC, 0x11d) +ELF_RELOC(R_AARCH64_LDST64_ABS_LO12_NC, 0x11e) + +ELF_RELOC(R_AARCH64_MOVW_PREL_G0, 0x11f) +ELF_RELOC(R_AARCH64_MOVW_PREL_G0_NC, 0x120) +ELF_RELOC(R_AARCH64_MOVW_PREL_G1, 0x121) +ELF_RELOC(R_AARCH64_MOVW_PREL_G1_NC, 0x122) +ELF_RELOC(R_AARCH64_MOVW_PREL_G2, 0x123) +ELF_RELOC(R_AARCH64_MOVW_PREL_G2_NC, 0x124) +ELF_RELOC(R_AARCH64_MOVW_PREL_G3, 0x125) + +ELF_RELOC(R_AARCH64_LDST128_ABS_LO12_NC, 0x12b) + +ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G0, 0x12c) +ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G0_NC, 0x12d) +ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G1, 0x12e) +ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G1_NC, 0x12f) +ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G2, 0x130) +ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G2_NC, 0x131) +ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G3, 0x132) + +ELF_RELOC(R_AARCH64_GOTREL64, 0x133) +ELF_RELOC(R_AARCH64_GOTREL32, 0x134) + +ELF_RELOC(R_AARCH64_GOT_LD_PREL19, 0x135) +ELF_RELOC(R_AARCH64_LD64_GOTOFF_LO15, 0x136) +ELF_RELOC(R_AARCH64_ADR_GOT_PAGE, 0x137) +ELF_RELOC(R_AARCH64_LD64_GOT_LO12_NC, 0x138) +ELF_RELOC(R_AARCH64_LD64_GOTPAGE_LO15, 0x139) + +ELF_RELOC(R_AARCH64_TLSGD_ADR_PREL21, 0x200) +ELF_RELOC(R_AARCH64_TLSGD_ADR_PAGE21, 0x201) +ELF_RELOC(R_AARCH64_TLSGD_ADD_LO12_NC, 0x202) +ELF_RELOC(R_AARCH64_TLSGD_MOVW_G1, 0x203) +ELF_RELOC(R_AARCH64_TLSGD_MOVW_G0_NC, 0x204) + +ELF_RELOC(R_AARCH64_TLSLD_ADR_PREL21, 0x205) +ELF_RELOC(R_AARCH64_TLSLD_ADR_PAGE21, 0x206) +ELF_RELOC(R_AARCH64_TLSLD_ADD_LO12_NC, 0x207) +ELF_RELOC(R_AARCH64_TLSLD_MOVW_G1, 0x208) +ELF_RELOC(R_AARCH64_TLSLD_MOVW_G0_NC, 0x209) +ELF_RELOC(R_AARCH64_TLSLD_LD_PREL19, 0x20a) +ELF_RELOC(R_AARCH64_TLSLD_MOVW_DTPREL_G2, 0x20b) +ELF_RELOC(R_AARCH64_TLSLD_MOVW_DTPREL_G1, 0x20c) +ELF_RELOC(R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, 0x20d) +ELF_RELOC(R_AARCH64_TLSLD_MOVW_DTPREL_G0, 0x20e) +ELF_RELOC(R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC, 0x20f) +ELF_RELOC(R_AARCH64_TLSLD_ADD_DTPREL_HI12, 0x210) +ELF_RELOC(R_AARCH64_TLSLD_ADD_DTPREL_LO12, 0x211) +ELF_RELOC(R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC, 0x212) +ELF_RELOC(R_AARCH64_TLSLD_LDST8_DTPREL_LO12, 0x213) +ELF_RELOC(R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC, 0x214) +ELF_RELOC(R_AARCH64_TLSLD_LDST16_DTPREL_LO12, 0x215) +ELF_RELOC(R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC, 0x216) +ELF_RELOC(R_AARCH64_TLSLD_LDST32_DTPREL_LO12, 0x217) +ELF_RELOC(R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC, 0x218) +ELF_RELOC(R_AARCH64_TLSLD_LDST64_DTPREL_LO12, 0x219) +ELF_RELOC(R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC, 0x21a) + +ELF_RELOC(R_AARCH64_TLSIE_MOVW_GOTTPREL_G1, 0x21b) +ELF_RELOC(R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC, 0x21c) +ELF_RELOC(R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21, 0x21d) +ELF_RELOC(R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC, 0x21e) +ELF_RELOC(R_AARCH64_TLSIE_LD_GOTTPREL_PREL19, 0x21f) + +ELF_RELOC(R_AARCH64_TLSLE_MOVW_TPREL_G2, 0x220) +ELF_RELOC(R_AARCH64_TLSLE_MOVW_TPREL_G1, 0x221) +ELF_RELOC(R_AARCH64_TLSLE_MOVW_TPREL_G1_NC, 0x222) +ELF_RELOC(R_AARCH64_TLSLE_MOVW_TPREL_G0, 0x223) +ELF_RELOC(R_AARCH64_TLSLE_MOVW_TPREL_G0_NC, 0x224) +ELF_RELOC(R_AARCH64_TLSLE_ADD_TPREL_HI12, 0x225) +ELF_RELOC(R_AARCH64_TLSLE_ADD_TPREL_LO12, 0x226) +ELF_RELOC(R_AARCH64_TLSLE_ADD_TPREL_LO12_NC, 0x227) +ELF_RELOC(R_AARCH64_TLSLE_LDST8_TPREL_LO12, 0x228) +ELF_RELOC(R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC, 0x229) +ELF_RELOC(R_AARCH64_TLSLE_LDST16_TPREL_LO12, 0x22a) +ELF_RELOC(R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC, 0x22b) +ELF_RELOC(R_AARCH64_TLSLE_LDST32_TPREL_LO12, 0x22c) +ELF_RELOC(R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC, 0x22d) +ELF_RELOC(R_AARCH64_TLSLE_LDST64_TPREL_LO12, 0x22e) +ELF_RELOC(R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC, 0x22f) + +ELF_RELOC(R_AARCH64_TLSDESC_LD_PREL19, 0x230) +ELF_RELOC(R_AARCH64_TLSDESC_ADR_PREL21, 0x231) +ELF_RELOC(R_AARCH64_TLSDESC_ADR_PAGE21, 0x232) +ELF_RELOC(R_AARCH64_TLSDESC_LD64_LO12_NC, 0x233) +ELF_RELOC(R_AARCH64_TLSDESC_ADD_LO12_NC, 0x234) +ELF_RELOC(R_AARCH64_TLSDESC_OFF_G1, 0x235) +ELF_RELOC(R_AARCH64_TLSDESC_OFF_G0_NC, 0x236) +ELF_RELOC(R_AARCH64_TLSDESC_LDR, 0x237) +ELF_RELOC(R_AARCH64_TLSDESC_ADD, 0x238) +ELF_RELOC(R_AARCH64_TLSDESC_CALL, 0x239) + +ELF_RELOC(R_AARCH64_TLSLE_LDST128_TPREL_LO12, 0x23a) +ELF_RELOC(R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC, 0x23b) + +ELF_RELOC(R_AARCH64_TLSLD_LDST128_DTPREL_LO12, 0x23c) +ELF_RELOC(R_AARCH64_TLSLD_LDST128_DTPREL_LO12_NC, 0x23d) + +ELF_RELOC(R_AARCH64_COPY, 0x400) +ELF_RELOC(R_AARCH64_GLOB_DAT, 0x401) +ELF_RELOC(R_AARCH64_JUMP_SLOT, 0x402) +ELF_RELOC(R_AARCH64_RELATIVE, 0x403) +ELF_RELOC(R_AARCH64_TLS_DTPREL64, 0x404) +ELF_RELOC(R_AARCH64_TLS_DTPMOD64, 0x405) +ELF_RELOC(R_AARCH64_TLS_TPREL64, 0x406) +ELF_RELOC(R_AARCH64_TLSDESC, 0x407) +ELF_RELOC(R_AARCH64_IRELATIVE, 0x408) diff --git a/llvm/include/llvm/Support/ELFRelocs/ARM.def b/llvm/include/llvm/Support/ELFRelocs/ARM.def new file mode 100644 index 0000000..730fc5b --- /dev/null +++ b/llvm/include/llvm/Support/ELFRelocs/ARM.def @@ -0,0 +1,138 @@ + +#ifndef ELF_RELOC +#error "ELF_RELOC must be defined" +#endif + +// Meets 2.09 ABI Specs. +ELF_RELOC(R_ARM_NONE, 0x00) +ELF_RELOC(R_ARM_PC24, 0x01) +ELF_RELOC(R_ARM_ABS32, 0x02) +ELF_RELOC(R_ARM_REL32, 0x03) +ELF_RELOC(R_ARM_LDR_PC_G0, 0x04) +ELF_RELOC(R_ARM_ABS16, 0x05) +ELF_RELOC(R_ARM_ABS12, 0x06) +ELF_RELOC(R_ARM_THM_ABS5, 0x07) +ELF_RELOC(R_ARM_ABS8, 0x08) +ELF_RELOC(R_ARM_SBREL32, 0x09) +ELF_RELOC(R_ARM_THM_CALL, 0x0a) +ELF_RELOC(R_ARM_THM_PC8, 0x0b) +ELF_RELOC(R_ARM_BREL_ADJ, 0x0c) +ELF_RELOC(R_ARM_TLS_DESC, 0x0d) +ELF_RELOC(R_ARM_THM_SWI8, 0x0e) +ELF_RELOC(R_ARM_XPC25, 0x0f) +ELF_RELOC(R_ARM_THM_XPC22, 0x10) +ELF_RELOC(R_ARM_TLS_DTPMOD32, 0x11) +ELF_RELOC(R_ARM_TLS_DTPOFF32, 0x12) +ELF_RELOC(R_ARM_TLS_TPOFF32, 0x13) +ELF_RELOC(R_ARM_COPY, 0x14) +ELF_RELOC(R_ARM_GLOB_DAT, 0x15) +ELF_RELOC(R_ARM_JUMP_SLOT, 0x16) +ELF_RELOC(R_ARM_RELATIVE, 0x17) +ELF_RELOC(R_ARM_GOTOFF32, 0x18) +ELF_RELOC(R_ARM_BASE_PREL, 0x19) +ELF_RELOC(R_ARM_GOT_BREL, 0x1a) +ELF_RELOC(R_ARM_PLT32, 0x1b) +ELF_RELOC(R_ARM_CALL, 0x1c) +ELF_RELOC(R_ARM_JUMP24, 0x1d) +ELF_RELOC(R_ARM_THM_JUMP24, 0x1e) +ELF_RELOC(R_ARM_BASE_ABS, 0x1f) +ELF_RELOC(R_ARM_ALU_PCREL_7_0, 0x20) +ELF_RELOC(R_ARM_ALU_PCREL_15_8, 0x21) +ELF_RELOC(R_ARM_ALU_PCREL_23_15, 0x22) +ELF_RELOC(R_ARM_LDR_SBREL_11_0_NC, 0x23) +ELF_RELOC(R_ARM_ALU_SBREL_19_12_NC, 0x24) +ELF_RELOC(R_ARM_ALU_SBREL_27_20_CK, 0x25) +ELF_RELOC(R_ARM_TARGET1, 0x26) +ELF_RELOC(R_ARM_SBREL31, 0x27) +ELF_RELOC(R_ARM_V4BX, 0x28) +ELF_RELOC(R_ARM_TARGET2, 0x29) +ELF_RELOC(R_ARM_PREL31, 0x2a) +ELF_RELOC(R_ARM_MOVW_ABS_NC, 0x2b) +ELF_RELOC(R_ARM_MOVT_ABS, 0x2c) +ELF_RELOC(R_ARM_MOVW_PREL_NC, 0x2d) +ELF_RELOC(R_ARM_MOVT_PREL, 0x2e) +ELF_RELOC(R_ARM_THM_MOVW_ABS_NC, 0x2f) +ELF_RELOC(R_ARM_THM_MOVT_ABS, 0x30) +ELF_RELOC(R_ARM_THM_MOVW_PREL_NC, 0x31) +ELF_RELOC(R_ARM_THM_MOVT_PREL, 0x32) +ELF_RELOC(R_ARM_THM_JUMP19, 0x33) +ELF_RELOC(R_ARM_THM_JUMP6, 0x34) +ELF_RELOC(R_ARM_THM_ALU_PREL_11_0, 0x35) +ELF_RELOC(R_ARM_THM_PC12, 0x36) +ELF_RELOC(R_ARM_ABS32_NOI, 0x37) +ELF_RELOC(R_ARM_REL32_NOI, 0x38) +ELF_RELOC(R_ARM_ALU_PC_G0_NC, 0x39) +ELF_RELOC(R_ARM_ALU_PC_G0, 0x3a) +ELF_RELOC(R_ARM_ALU_PC_G1_NC, 0x3b) +ELF_RELOC(R_ARM_ALU_PC_G1, 0x3c) +ELF_RELOC(R_ARM_ALU_PC_G2, 0x3d) +ELF_RELOC(R_ARM_LDR_PC_G1, 0x3e) +ELF_RELOC(R_ARM_LDR_PC_G2, 0x3f) +ELF_RELOC(R_ARM_LDRS_PC_G0, 0x40) +ELF_RELOC(R_ARM_LDRS_PC_G1, 0x41) +ELF_RELOC(R_ARM_LDRS_PC_G2, 0x42) +ELF_RELOC(R_ARM_LDC_PC_G0, 0x43) +ELF_RELOC(R_ARM_LDC_PC_G1, 0x44) +ELF_RELOC(R_ARM_LDC_PC_G2, 0x45) +ELF_RELOC(R_ARM_ALU_SB_G0_NC, 0x46) +ELF_RELOC(R_ARM_ALU_SB_G0, 0x47) +ELF_RELOC(R_ARM_ALU_SB_G1_NC, 0x48) +ELF_RELOC(R_ARM_ALU_SB_G1, 0x49) +ELF_RELOC(R_ARM_ALU_SB_G2, 0x4a) +ELF_RELOC(R_ARM_LDR_SB_G0, 0x4b) +ELF_RELOC(R_ARM_LDR_SB_G1, 0x4c) +ELF_RELOC(R_ARM_LDR_SB_G2, 0x4d) +ELF_RELOC(R_ARM_LDRS_SB_G0, 0x4e) +ELF_RELOC(R_ARM_LDRS_SB_G1, 0x4f) +ELF_RELOC(R_ARM_LDRS_SB_G2, 0x50) +ELF_RELOC(R_ARM_LDC_SB_G0, 0x51) +ELF_RELOC(R_ARM_LDC_SB_G1, 0x52) +ELF_RELOC(R_ARM_LDC_SB_G2, 0x53) +ELF_RELOC(R_ARM_MOVW_BREL_NC, 0x54) +ELF_RELOC(R_ARM_MOVT_BREL, 0x55) +ELF_RELOC(R_ARM_MOVW_BREL, 0x56) +ELF_RELOC(R_ARM_THM_MOVW_BREL_NC, 0x57) +ELF_RELOC(R_ARM_THM_MOVT_BREL, 0x58) +ELF_RELOC(R_ARM_THM_MOVW_BREL, 0x59) +ELF_RELOC(R_ARM_TLS_GOTDESC, 0x5a) +ELF_RELOC(R_ARM_TLS_CALL, 0x5b) +ELF_RELOC(R_ARM_TLS_DESCSEQ, 0x5c) +ELF_RELOC(R_ARM_THM_TLS_CALL, 0x5d) +ELF_RELOC(R_ARM_PLT32_ABS, 0x5e) +ELF_RELOC(R_ARM_GOT_ABS, 0x5f) +ELF_RELOC(R_ARM_GOT_PREL, 0x60) +ELF_RELOC(R_ARM_GOT_BREL12, 0x61) +ELF_RELOC(R_ARM_GOTOFF12, 0x62) +ELF_RELOC(R_ARM_GOTRELAX, 0x63) +ELF_RELOC(R_ARM_GNU_VTENTRY, 0x64) +ELF_RELOC(R_ARM_GNU_VTINHERIT, 0x65) +ELF_RELOC(R_ARM_THM_JUMP11, 0x66) +ELF_RELOC(R_ARM_THM_JUMP8, 0x67) +ELF_RELOC(R_ARM_TLS_GD32, 0x68) +ELF_RELOC(R_ARM_TLS_LDM32, 0x69) +ELF_RELOC(R_ARM_TLS_LDO32, 0x6a) +ELF_RELOC(R_ARM_TLS_IE32, 0x6b) +ELF_RELOC(R_ARM_TLS_LE32, 0x6c) +ELF_RELOC(R_ARM_TLS_LDO12, 0x6d) +ELF_RELOC(R_ARM_TLS_LE12, 0x6e) +ELF_RELOC(R_ARM_TLS_IE12GP, 0x6f) +ELF_RELOC(R_ARM_PRIVATE_0, 0x70) +ELF_RELOC(R_ARM_PRIVATE_1, 0x71) +ELF_RELOC(R_ARM_PRIVATE_2, 0x72) +ELF_RELOC(R_ARM_PRIVATE_3, 0x73) +ELF_RELOC(R_ARM_PRIVATE_4, 0x74) +ELF_RELOC(R_ARM_PRIVATE_5, 0x75) +ELF_RELOC(R_ARM_PRIVATE_6, 0x76) +ELF_RELOC(R_ARM_PRIVATE_7, 0x77) +ELF_RELOC(R_ARM_PRIVATE_8, 0x78) +ELF_RELOC(R_ARM_PRIVATE_9, 0x79) +ELF_RELOC(R_ARM_PRIVATE_10, 0x7a) +ELF_RELOC(R_ARM_PRIVATE_11, 0x7b) +ELF_RELOC(R_ARM_PRIVATE_12, 0x7c) +ELF_RELOC(R_ARM_PRIVATE_13, 0x7d) +ELF_RELOC(R_ARM_PRIVATE_14, 0x7e) +ELF_RELOC(R_ARM_PRIVATE_15, 0x7f) +ELF_RELOC(R_ARM_ME_TOO, 0x80) +ELF_RELOC(R_ARM_THM_TLS_DESCSEQ16, 0x81) +ELF_RELOC(R_ARM_THM_TLS_DESCSEQ32, 0x82) +ELF_RELOC(R_ARM_IRELATIVE, 0xa0) diff --git a/llvm/include/llvm/Support/ELFRelocs/AVR.def b/llvm/include/llvm/Support/ELFRelocs/AVR.def new file mode 100644 index 0000000..5692d6c --- /dev/null +++ b/llvm/include/llvm/Support/ELFRelocs/AVR.def @@ -0,0 +1,40 @@ + +#ifndef ELF_RELOC +#error "ELF_RELOC must be defined" +#endif + +ELF_RELOC(R_AVR_NONE, 0) +ELF_RELOC(R_AVR_32, 1) +ELF_RELOC(R_AVR_7_PCREL, 2) +ELF_RELOC(R_AVR_13_PCREL, 3) +ELF_RELOC(R_AVR_16, 4) +ELF_RELOC(R_AVR_16_PM, 5) +ELF_RELOC(R_AVR_LO8_LDI, 6) +ELF_RELOC(R_AVR_HI8_LDI, 7) +ELF_RELOC(R_AVR_HH8_LDI, 8) +ELF_RELOC(R_AVR_LO8_LDI_NEG, 9) +ELF_RELOC(R_AVR_HI8_LDI_NEG, 10) +ELF_RELOC(R_AVR_HH8_LDI_NEG, 11) +ELF_RELOC(R_AVR_LO8_LDI_PM, 12) +ELF_RELOC(R_AVR_HI8_LDI_PM, 13) +ELF_RELOC(R_AVR_HH8_LDI_PM, 14) +ELF_RELOC(R_AVR_LO8_LDI_PM_NEG, 15) +ELF_RELOC(R_AVR_HI8_LDI_PM_NEG, 16) +ELF_RELOC(R_AVR_HH8_LDI_PM_NEG, 17) +ELF_RELOC(R_AVR_CALL, 18) +ELF_RELOC(R_AVR_LDI, 19) +ELF_RELOC(R_AVR_6, 20) +ELF_RELOC(R_AVR_6_ADIW, 21) +ELF_RELOC(R_AVR_MS8_LDI, 22) +ELF_RELOC(R_AVR_MS8_LDI_NEG, 23) +ELF_RELOC(R_AVR_LO8_LDI_GS, 24) +ELF_RELOC(R_AVR_HI8_LDI_GS, 25) +ELF_RELOC(R_AVR_8, 26) +ELF_RELOC(R_AVR_8_LO8, 27) +ELF_RELOC(R_AVR_8_HI8, 28) +ELF_RELOC(R_AVR_8_HLO8, 29) +ELF_RELOC(R_AVR_SYM_DIFF, 30) +ELF_RELOC(R_AVR_16_LDST, 31) +ELF_RELOC(R_AVR_LDS_STS_16, 33) +ELF_RELOC(R_AVR_PORT6, 34) +ELF_RELOC(R_AVR_PORT5, 35) diff --git a/llvm/include/llvm/Support/ELFRelocs/Hexagon.def b/llvm/include/llvm/Support/ELFRelocs/Hexagon.def new file mode 100644 index 0000000..a698ecb --- /dev/null +++ b/llvm/include/llvm/Support/ELFRelocs/Hexagon.def @@ -0,0 +1,100 @@ + +#ifndef ELF_RELOC +#error "ELF_RELOC must be defined" +#endif + +// Release 5 ABI +ELF_RELOC(R_HEX_NONE, 0) +ELF_RELOC(R_HEX_B22_PCREL, 1) +ELF_RELOC(R_HEX_B15_PCREL, 2) +ELF_RELOC(R_HEX_B7_PCREL, 3) +ELF_RELOC(R_HEX_LO16, 4) +ELF_RELOC(R_HEX_HI16, 5) +ELF_RELOC(R_HEX_32, 6) +ELF_RELOC(R_HEX_16, 7) +ELF_RELOC(R_HEX_8, 8) +ELF_RELOC(R_HEX_GPREL16_0, 9) +ELF_RELOC(R_HEX_GPREL16_1, 10) +ELF_RELOC(R_HEX_GPREL16_2, 11) +ELF_RELOC(R_HEX_GPREL16_3, 12) +ELF_RELOC(R_HEX_HL16, 13) +ELF_RELOC(R_HEX_B13_PCREL, 14) +ELF_RELOC(R_HEX_B9_PCREL, 15) +ELF_RELOC(R_HEX_B32_PCREL_X, 16) +ELF_RELOC(R_HEX_32_6_X, 17) +ELF_RELOC(R_HEX_B22_PCREL_X, 18) +ELF_RELOC(R_HEX_B15_PCREL_X, 19) +ELF_RELOC(R_HEX_B13_PCREL_X, 20) +ELF_RELOC(R_HEX_B9_PCREL_X, 21) +ELF_RELOC(R_HEX_B7_PCREL_X, 22) +ELF_RELOC(R_HEX_16_X, 23) +ELF_RELOC(R_HEX_12_X, 24) +ELF_RELOC(R_HEX_11_X, 25) +ELF_RELOC(R_HEX_10_X, 26) +ELF_RELOC(R_HEX_9_X, 27) +ELF_RELOC(R_HEX_8_X, 28) +ELF_RELOC(R_HEX_7_X, 29) +ELF_RELOC(R_HEX_6_X, 30) +ELF_RELOC(R_HEX_32_PCREL, 31) +ELF_RELOC(R_HEX_COPY, 32) +ELF_RELOC(R_HEX_GLOB_DAT, 33) +ELF_RELOC(R_HEX_JMP_SLOT, 34) +ELF_RELOC(R_HEX_RELATIVE, 35) +ELF_RELOC(R_HEX_PLT_B22_PCREL, 36) +ELF_RELOC(R_HEX_GOTREL_LO16, 37) +ELF_RELOC(R_HEX_GOTREL_HI16, 38) +ELF_RELOC(R_HEX_GOTREL_32, 39) +ELF_RELOC(R_HEX_GOT_LO16, 40) +ELF_RELOC(R_HEX_GOT_HI16, 41) +ELF_RELOC(R_HEX_GOT_32, 42) +ELF_RELOC(R_HEX_GOT_16, 43) +ELF_RELOC(R_HEX_DTPMOD_32, 44) +ELF_RELOC(R_HEX_DTPREL_LO16, 45) +ELF_RELOC(R_HEX_DTPREL_HI16, 46) +ELF_RELOC(R_HEX_DTPREL_32, 47) +ELF_RELOC(R_HEX_DTPREL_16, 48) +ELF_RELOC(R_HEX_GD_PLT_B22_PCREL, 49) +ELF_RELOC(R_HEX_GD_GOT_LO16, 50) +ELF_RELOC(R_HEX_GD_GOT_HI16, 51) +ELF_RELOC(R_HEX_GD_GOT_32, 52) +ELF_RELOC(R_HEX_GD_GOT_16, 53) +ELF_RELOC(R_HEX_IE_LO16, 54) +ELF_RELOC(R_HEX_IE_HI16, 55) +ELF_RELOC(R_HEX_IE_32, 56) +ELF_RELOC(R_HEX_IE_GOT_LO16, 57) +ELF_RELOC(R_HEX_IE_GOT_HI16, 58) +ELF_RELOC(R_HEX_IE_GOT_32, 59) +ELF_RELOC(R_HEX_IE_GOT_16, 60) +ELF_RELOC(R_HEX_TPREL_LO16, 61) +ELF_RELOC(R_HEX_TPREL_HI16, 62) +ELF_RELOC(R_HEX_TPREL_32, 63) +ELF_RELOC(R_HEX_TPREL_16, 64) +ELF_RELOC(R_HEX_6_PCREL_X, 65) +ELF_RELOC(R_HEX_GOTREL_32_6_X, 66) +ELF_RELOC(R_HEX_GOTREL_16_X, 67) +ELF_RELOC(R_HEX_GOTREL_11_X, 68) +ELF_RELOC(R_HEX_GOT_32_6_X, 69) +ELF_RELOC(R_HEX_GOT_16_X, 70) +ELF_RELOC(R_HEX_GOT_11_X, 71) +ELF_RELOC(R_HEX_DTPREL_32_6_X, 72) +ELF_RELOC(R_HEX_DTPREL_16_X, 73) +ELF_RELOC(R_HEX_DTPREL_11_X, 74) +ELF_RELOC(R_HEX_GD_GOT_32_6_X, 75) +ELF_RELOC(R_HEX_GD_GOT_16_X, 76) +ELF_RELOC(R_HEX_GD_GOT_11_X, 77) +ELF_RELOC(R_HEX_IE_32_6_X, 78) +ELF_RELOC(R_HEX_IE_16_X, 79) +ELF_RELOC(R_HEX_IE_GOT_32_6_X, 80) +ELF_RELOC(R_HEX_IE_GOT_16_X, 81) +ELF_RELOC(R_HEX_IE_GOT_11_X, 82) +ELF_RELOC(R_HEX_TPREL_32_6_X, 83) +ELF_RELOC(R_HEX_TPREL_16_X, 84) +ELF_RELOC(R_HEX_TPREL_11_X, 85) +ELF_RELOC(R_HEX_LD_PLT_B22_PCREL, 86) +ELF_RELOC(R_HEX_LD_GOT_LO16, 87) +ELF_RELOC(R_HEX_LD_GOT_HI16, 88) +ELF_RELOC(R_HEX_LD_GOT_32, 89) +ELF_RELOC(R_HEX_LD_GOT_16, 90) +ELF_RELOC(R_HEX_LD_GOT_32_6_X, 91) +ELF_RELOC(R_HEX_LD_GOT_16_X, 92) +ELF_RELOC(R_HEX_LD_GOT_11_X, 93) diff --git a/llvm/include/llvm/Support/ELFRelocs/Mips.def b/llvm/include/llvm/Support/ELFRelocs/Mips.def new file mode 100644 index 0000000..77e7f8e --- /dev/null +++ b/llvm/include/llvm/Support/ELFRelocs/Mips.def @@ -0,0 +1,117 @@ + +#ifndef ELF_RELOC +#error "ELF_RELOC must be defined" +#endif + +ELF_RELOC(R_MIPS_NONE, 0) +ELF_RELOC(R_MIPS_16, 1) +ELF_RELOC(R_MIPS_32, 2) +ELF_RELOC(R_MIPS_REL32, 3) +ELF_RELOC(R_MIPS_26, 4) +ELF_RELOC(R_MIPS_HI16, 5) +ELF_RELOC(R_MIPS_LO16, 6) +ELF_RELOC(R_MIPS_GPREL16, 7) +ELF_RELOC(R_MIPS_LITERAL, 8) +ELF_RELOC(R_MIPS_GOT16, 9) +ELF_RELOC(R_MIPS_PC16, 10) +ELF_RELOC(R_MIPS_CALL16, 11) +ELF_RELOC(R_MIPS_GPREL32, 12) +ELF_RELOC(R_MIPS_UNUSED1, 13) +ELF_RELOC(R_MIPS_UNUSED2, 14) +ELF_RELOC(R_MIPS_UNUSED3, 15) +ELF_RELOC(R_MIPS_SHIFT5, 16) +ELF_RELOC(R_MIPS_SHIFT6, 17) +ELF_RELOC(R_MIPS_64, 18) +ELF_RELOC(R_MIPS_GOT_DISP, 19) +ELF_RELOC(R_MIPS_GOT_PAGE, 20) +ELF_RELOC(R_MIPS_GOT_OFST, 21) +ELF_RELOC(R_MIPS_GOT_HI16, 22) +ELF_RELOC(R_MIPS_GOT_LO16, 23) +ELF_RELOC(R_MIPS_SUB, 24) +ELF_RELOC(R_MIPS_INSERT_A, 25) +ELF_RELOC(R_MIPS_INSERT_B, 26) +ELF_RELOC(R_MIPS_DELETE, 27) +ELF_RELOC(R_MIPS_HIGHER, 28) +ELF_RELOC(R_MIPS_HIGHEST, 29) +ELF_RELOC(R_MIPS_CALL_HI16, 30) +ELF_RELOC(R_MIPS_CALL_LO16, 31) +ELF_RELOC(R_MIPS_SCN_DISP, 32) +ELF_RELOC(R_MIPS_REL16, 33) +ELF_RELOC(R_MIPS_ADD_IMMEDIATE, 34) +ELF_RELOC(R_MIPS_PJUMP, 35) +ELF_RELOC(R_MIPS_RELGOT, 36) +ELF_RELOC(R_MIPS_JALR, 37) +ELF_RELOC(R_MIPS_TLS_DTPMOD32, 38) +ELF_RELOC(R_MIPS_TLS_DTPREL32, 39) +ELF_RELOC(R_MIPS_TLS_DTPMOD64, 40) +ELF_RELOC(R_MIPS_TLS_DTPREL64, 41) +ELF_RELOC(R_MIPS_TLS_GD, 42) +ELF_RELOC(R_MIPS_TLS_LDM, 43) +ELF_RELOC(R_MIPS_TLS_DTPREL_HI16, 44) +ELF_RELOC(R_MIPS_TLS_DTPREL_LO16, 45) +ELF_RELOC(R_MIPS_TLS_GOTTPREL, 46) +ELF_RELOC(R_MIPS_TLS_TPREL32, 47) +ELF_RELOC(R_MIPS_TLS_TPREL64, 48) +ELF_RELOC(R_MIPS_TLS_TPREL_HI16, 49) +ELF_RELOC(R_MIPS_TLS_TPREL_LO16, 50) +ELF_RELOC(R_MIPS_GLOB_DAT, 51) +ELF_RELOC(R_MIPS_PC21_S2, 60) +ELF_RELOC(R_MIPS_PC26_S2, 61) +ELF_RELOC(R_MIPS_PC18_S3, 62) +ELF_RELOC(R_MIPS_PC19_S2, 63) +ELF_RELOC(R_MIPS_PCHI16, 64) +ELF_RELOC(R_MIPS_PCLO16, 65) +ELF_RELOC(R_MIPS16_26, 100) +ELF_RELOC(R_MIPS16_GPREL, 101) +ELF_RELOC(R_MIPS16_GOT16, 102) +ELF_RELOC(R_MIPS16_CALL16, 103) +ELF_RELOC(R_MIPS16_HI16, 104) +ELF_RELOC(R_MIPS16_LO16, 105) +ELF_RELOC(R_MIPS16_TLS_GD, 106) +ELF_RELOC(R_MIPS16_TLS_LDM, 107) +ELF_RELOC(R_MIPS16_TLS_DTPREL_HI16, 108) +ELF_RELOC(R_MIPS16_TLS_DTPREL_LO16, 109) +ELF_RELOC(R_MIPS16_TLS_GOTTPREL, 110) +ELF_RELOC(R_MIPS16_TLS_TPREL_HI16, 111) +ELF_RELOC(R_MIPS16_TLS_TPREL_LO16, 112) +ELF_RELOC(R_MIPS_COPY, 126) +ELF_RELOC(R_MIPS_JUMP_SLOT, 127) +ELF_RELOC(R_MICROMIPS_26_S1, 133) +ELF_RELOC(R_MICROMIPS_HI16, 134) +ELF_RELOC(R_MICROMIPS_LO16, 135) +ELF_RELOC(R_MICROMIPS_GPREL16, 136) +ELF_RELOC(R_MICROMIPS_LITERAL, 137) +ELF_RELOC(R_MICROMIPS_GOT16, 138) +ELF_RELOC(R_MICROMIPS_PC7_S1, 139) +ELF_RELOC(R_MICROMIPS_PC10_S1, 140) +ELF_RELOC(R_MICROMIPS_PC16_S1, 141) +ELF_RELOC(R_MICROMIPS_CALL16, 142) +ELF_RELOC(R_MICROMIPS_GOT_DISP, 145) +ELF_RELOC(R_MICROMIPS_GOT_PAGE, 146) +ELF_RELOC(R_MICROMIPS_GOT_OFST, 147) +ELF_RELOC(R_MICROMIPS_GOT_HI16, 148) +ELF_RELOC(R_MICROMIPS_GOT_LO16, 149) +ELF_RELOC(R_MICROMIPS_SUB, 150) +ELF_RELOC(R_MICROMIPS_HIGHER, 151) +ELF_RELOC(R_MICROMIPS_HIGHEST, 152) +ELF_RELOC(R_MICROMIPS_CALL_HI16, 153) +ELF_RELOC(R_MICROMIPS_CALL_LO16, 154) +ELF_RELOC(R_MICROMIPS_SCN_DISP, 155) +ELF_RELOC(R_MICROMIPS_JALR, 156) +ELF_RELOC(R_MICROMIPS_HI0_LO16, 157) +ELF_RELOC(R_MICROMIPS_TLS_GD, 162) +ELF_RELOC(R_MICROMIPS_TLS_LDM, 163) +ELF_RELOC(R_MICROMIPS_TLS_DTPREL_HI16, 164) +ELF_RELOC(R_MICROMIPS_TLS_DTPREL_LO16, 165) +ELF_RELOC(R_MICROMIPS_TLS_GOTTPREL, 166) +ELF_RELOC(R_MICROMIPS_TLS_TPREL_HI16, 169) +ELF_RELOC(R_MICROMIPS_TLS_TPREL_LO16, 170) +ELF_RELOC(R_MICROMIPS_GPREL7_S2, 172) +ELF_RELOC(R_MICROMIPS_PC23_S2, 173) +ELF_RELOC(R_MICROMIPS_PC21_S2, 174) +ELF_RELOC(R_MICROMIPS_PC26_S2, 175) +ELF_RELOC(R_MICROMIPS_PC18_S3, 176) +ELF_RELOC(R_MICROMIPS_PC19_S2, 177) +ELF_RELOC(R_MIPS_NUM, 218) +ELF_RELOC(R_MIPS_PC32, 248) +ELF_RELOC(R_MIPS_EH, 249) diff --git a/llvm/include/llvm/Support/ELFRelocs/PowerPC.def b/llvm/include/llvm/Support/ELFRelocs/PowerPC.def new file mode 100644 index 0000000..e4f8ee0 --- /dev/null +++ b/llvm/include/llvm/Support/ELFRelocs/PowerPC.def @@ -0,0 +1,123 @@ + +#ifndef ELF_RELOC +#error "ELF_RELOC must be defined" +#endif + +// glibc's PowerPC asm/sigcontext.h, when compiling for PPC64, has the +// unfortunate behavior of including asm/elf.h, which defines R_PPC_NONE, etc. +// to their corresponding integer values. As a result, we need to undef them +// here before continuing. + +#undef R_PPC_NONE +#undef R_PPC_ADDR32 +#undef R_PPC_ADDR24 +#undef R_PPC_ADDR16 +#undef R_PPC_ADDR16_LO +#undef R_PPC_ADDR16_HI +#undef R_PPC_ADDR16_HA +#undef R_PPC_ADDR14 +#undef R_PPC_ADDR14_BRTAKEN +#undef R_PPC_ADDR14_BRNTAKEN +#undef R_PPC_REL24 +#undef R_PPC_REL14 +#undef R_PPC_REL14_BRTAKEN +#undef R_PPC_REL14_BRNTAKEN +#undef R_PPC_GOT16 +#undef R_PPC_GOT16_LO +#undef R_PPC_GOT16_HI +#undef R_PPC_GOT16_HA +#undef R_PPC_PLTREL24 +#undef R_PPC_JMP_SLOT +#undef R_PPC_LOCAL24PC +#undef R_PPC_REL32 +#undef R_PPC_TLS +#undef R_PPC_DTPMOD32 +#undef R_PPC_TPREL16 +#undef R_PPC_TPREL16_LO +#undef R_PPC_TPREL16_HI +#undef R_PPC_TPREL16_HA +#undef R_PPC_TPREL32 +#undef R_PPC_DTPREL16 +#undef R_PPC_DTPREL16_LO +#undef R_PPC_DTPREL16_HI +#undef R_PPC_DTPREL16_HA +#undef R_PPC_DTPREL32 +#undef R_PPC_GOT_TLSGD16 +#undef R_PPC_GOT_TLSGD16_LO +#undef R_PPC_GOT_TLSGD16_HI +#undef R_PPC_GOT_TLSGD16_HA +#undef R_PPC_GOT_TLSLD16 +#undef R_PPC_GOT_TLSLD16_LO +#undef R_PPC_GOT_TLSLD16_HI +#undef R_PPC_GOT_TLSLD16_HA +#undef R_PPC_GOT_TPREL16 +#undef R_PPC_GOT_TPREL16_LO +#undef R_PPC_GOT_TPREL16_HI +#undef R_PPC_GOT_TPREL16_HA +#undef R_PPC_GOT_DTPREL16 +#undef R_PPC_GOT_DTPREL16_LO +#undef R_PPC_GOT_DTPREL16_HI +#undef R_PPC_GOT_DTPREL16_HA +#undef R_PPC_TLSGD +#undef R_PPC_TLSLD +#undef R_PPC_REL16 +#undef R_PPC_REL16_LO +#undef R_PPC_REL16_HI +#undef R_PPC_REL16_HA + +ELF_RELOC(R_PPC_NONE, 0) /* No relocation. */ +ELF_RELOC(R_PPC_ADDR32, 1) +ELF_RELOC(R_PPC_ADDR24, 2) +ELF_RELOC(R_PPC_ADDR16, 3) +ELF_RELOC(R_PPC_ADDR16_LO, 4) +ELF_RELOC(R_PPC_ADDR16_HI, 5) +ELF_RELOC(R_PPC_ADDR16_HA, 6) +ELF_RELOC(R_PPC_ADDR14, 7) +ELF_RELOC(R_PPC_ADDR14_BRTAKEN, 8) +ELF_RELOC(R_PPC_ADDR14_BRNTAKEN, 9) +ELF_RELOC(R_PPC_REL24, 10) +ELF_RELOC(R_PPC_REL14, 11) +ELF_RELOC(R_PPC_REL14_BRTAKEN, 12) +ELF_RELOC(R_PPC_REL14_BRNTAKEN, 13) +ELF_RELOC(R_PPC_GOT16, 14) +ELF_RELOC(R_PPC_GOT16_LO, 15) +ELF_RELOC(R_PPC_GOT16_HI, 16) +ELF_RELOC(R_PPC_GOT16_HA, 17) +ELF_RELOC(R_PPC_PLTREL24, 18) +ELF_RELOC(R_PPC_JMP_SLOT, 21) +ELF_RELOC(R_PPC_LOCAL24PC, 23) +ELF_RELOC(R_PPC_REL32, 26) +ELF_RELOC(R_PPC_TLS, 67) +ELF_RELOC(R_PPC_DTPMOD32, 68) +ELF_RELOC(R_PPC_TPREL16, 69) +ELF_RELOC(R_PPC_TPREL16_LO, 70) +ELF_RELOC(R_PPC_TPREL16_HI, 71) +ELF_RELOC(R_PPC_TPREL16_HA, 72) +ELF_RELOC(R_PPC_TPREL32, 73) +ELF_RELOC(R_PPC_DTPREL16, 74) +ELF_RELOC(R_PPC_DTPREL16_LO, 75) +ELF_RELOC(R_PPC_DTPREL16_HI, 76) +ELF_RELOC(R_PPC_DTPREL16_HA, 77) +ELF_RELOC(R_PPC_DTPREL32, 78) +ELF_RELOC(R_PPC_GOT_TLSGD16, 79) +ELF_RELOC(R_PPC_GOT_TLSGD16_LO, 80) +ELF_RELOC(R_PPC_GOT_TLSGD16_HI, 81) +ELF_RELOC(R_PPC_GOT_TLSGD16_HA, 82) +ELF_RELOC(R_PPC_GOT_TLSLD16, 83) +ELF_RELOC(R_PPC_GOT_TLSLD16_LO, 84) +ELF_RELOC(R_PPC_GOT_TLSLD16_HI, 85) +ELF_RELOC(R_PPC_GOT_TLSLD16_HA, 86) +ELF_RELOC(R_PPC_GOT_TPREL16, 87) +ELF_RELOC(R_PPC_GOT_TPREL16_LO, 88) +ELF_RELOC(R_PPC_GOT_TPREL16_HI, 89) +ELF_RELOC(R_PPC_GOT_TPREL16_HA, 90) +ELF_RELOC(R_PPC_GOT_DTPREL16, 91) +ELF_RELOC(R_PPC_GOT_DTPREL16_LO, 92) +ELF_RELOC(R_PPC_GOT_DTPREL16_HI, 93) +ELF_RELOC(R_PPC_GOT_DTPREL16_HA, 94) +ELF_RELOC(R_PPC_TLSGD, 95) +ELF_RELOC(R_PPC_TLSLD, 96) +ELF_RELOC(R_PPC_REL16, 249) +ELF_RELOC(R_PPC_REL16_LO, 250) +ELF_RELOC(R_PPC_REL16_HI, 251) +ELF_RELOC(R_PPC_REL16_HA, 252) diff --git a/llvm/include/llvm/Support/ELFRelocs/PowerPC64.def b/llvm/include/llvm/Support/ELFRelocs/PowerPC64.def new file mode 100644 index 0000000..3a47c5a --- /dev/null +++ b/llvm/include/llvm/Support/ELFRelocs/PowerPC64.def @@ -0,0 +1,181 @@ + +#ifndef ELF_RELOC +#error "ELF_RELOC must be defined" +#endif + +// glibc's PowerPC asm/sigcontext.h, when compiling for PPC64, has the +// unfortunate behavior of including asm/elf.h, which defines R_PPC_NONE, etc. +// to their corresponding integer values. As a result, we need to undef them +// here before continuing. + +#undef R_PPC64_NONE +#undef R_PPC64_ADDR32 +#undef R_PPC64_ADDR24 +#undef R_PPC64_ADDR16 +#undef R_PPC64_ADDR16_LO +#undef R_PPC64_ADDR16_HI +#undef R_PPC64_ADDR16_HA +#undef R_PPC64_ADDR14 +#undef R_PPC64_ADDR14_BRTAKEN +#undef R_PPC64_ADDR14_BRNTAKEN +#undef R_PPC64_REL24 +#undef R_PPC64_REL14 +#undef R_PPC64_REL14_BRTAKEN +#undef R_PPC64_REL14_BRNTAKEN +#undef R_PPC64_GOT16 +#undef R_PPC64_GOT16_LO +#undef R_PPC64_GOT16_HI +#undef R_PPC64_GOT16_HA +#undef R_PPC64_GLOB_DAT +#undef R_PPC64_JMP_SLOT +#undef R_PPC64_RELATIVE +#undef R_PPC64_REL32 +#undef R_PPC64_ADDR64 +#undef R_PPC64_ADDR16_HIGHER +#undef R_PPC64_ADDR16_HIGHERA +#undef R_PPC64_ADDR16_HIGHEST +#undef R_PPC64_ADDR16_HIGHESTA +#undef R_PPC64_REL64 +#undef R_PPC64_TOC16 +#undef R_PPC64_TOC16_LO +#undef R_PPC64_TOC16_HI +#undef R_PPC64_TOC16_HA +#undef R_PPC64_TOC +#undef R_PPC64_ADDR16_DS +#undef R_PPC64_ADDR16_LO_DS +#undef R_PPC64_GOT16_DS +#undef R_PPC64_GOT16_LO_DS +#undef R_PPC64_TOC16_DS +#undef R_PPC64_TOC16_LO_DS +#undef R_PPC64_TLS +#undef R_PPC64_DTPMOD64 +#undef R_PPC64_TPREL16 +#undef R_PPC64_TPREL16_LO +#undef R_PPC64_TPREL16_HI +#undef R_PPC64_TPREL16_HA +#undef R_PPC64_TPREL64 +#undef R_PPC64_DTPREL16 +#undef R_PPC64_DTPREL16_LO +#undef R_PPC64_DTPREL16_HI +#undef R_PPC64_DTPREL16_HA +#undef R_PPC64_DTPREL64 +#undef R_PPC64_GOT_TLSGD16 +#undef R_PPC64_GOT_TLSGD16_LO +#undef R_PPC64_GOT_TLSGD16_HI +#undef R_PPC64_GOT_TLSGD16_HA +#undef R_PPC64_GOT_TLSLD16 +#undef R_PPC64_GOT_TLSLD16_LO +#undef R_PPC64_GOT_TLSLD16_HI +#undef R_PPC64_GOT_TLSLD16_HA +#undef R_PPC64_GOT_TPREL16_DS +#undef R_PPC64_GOT_TPREL16_LO_DS +#undef R_PPC64_GOT_TPREL16_HI +#undef R_PPC64_GOT_TPREL16_HA +#undef R_PPC64_GOT_DTPREL16_DS +#undef R_PPC64_GOT_DTPREL16_LO_DS +#undef R_PPC64_GOT_DTPREL16_HI +#undef R_PPC64_GOT_DTPREL16_HA +#undef R_PPC64_TPREL16_DS +#undef R_PPC64_TPREL16_LO_DS +#undef R_PPC64_TPREL16_HIGHER +#undef R_PPC64_TPREL16_HIGHERA +#undef R_PPC64_TPREL16_HIGHEST +#undef R_PPC64_TPREL16_HIGHESTA +#undef R_PPC64_DTPREL16_DS +#undef R_PPC64_DTPREL16_LO_DS +#undef R_PPC64_DTPREL16_HIGHER +#undef R_PPC64_DTPREL16_HIGHERA +#undef R_PPC64_DTPREL16_HIGHEST +#undef R_PPC64_DTPREL16_HIGHESTA +#undef R_PPC64_TLSGD +#undef R_PPC64_TLSLD +#undef R_PPC64_REL16 +#undef R_PPC64_REL16_LO +#undef R_PPC64_REL16_HI +#undef R_PPC64_REL16_HA + +ELF_RELOC(R_PPC64_NONE, 0) +ELF_RELOC(R_PPC64_ADDR32, 1) +ELF_RELOC(R_PPC64_ADDR24, 2) +ELF_RELOC(R_PPC64_ADDR16, 3) +ELF_RELOC(R_PPC64_ADDR16_LO, 4) +ELF_RELOC(R_PPC64_ADDR16_HI, 5) +ELF_RELOC(R_PPC64_ADDR16_HA, 6) +ELF_RELOC(R_PPC64_ADDR14, 7) +ELF_RELOC(R_PPC64_ADDR14_BRTAKEN, 8) +ELF_RELOC(R_PPC64_ADDR14_BRNTAKEN, 9) +ELF_RELOC(R_PPC64_REL24, 10) +ELF_RELOC(R_PPC64_REL14, 11) +ELF_RELOC(R_PPC64_REL14_BRTAKEN, 12) +ELF_RELOC(R_PPC64_REL14_BRNTAKEN, 13) +ELF_RELOC(R_PPC64_GOT16, 14) +ELF_RELOC(R_PPC64_GOT16_LO, 15) +ELF_RELOC(R_PPC64_GOT16_HI, 16) +ELF_RELOC(R_PPC64_GOT16_HA, 17) +ELF_RELOC(R_PPC64_GLOB_DAT, 20) +ELF_RELOC(R_PPC64_JMP_SLOT, 21) +ELF_RELOC(R_PPC64_RELATIVE, 22) +ELF_RELOC(R_PPC64_REL32, 26) +ELF_RELOC(R_PPC64_ADDR64, 38) +ELF_RELOC(R_PPC64_ADDR16_HIGHER, 39) +ELF_RELOC(R_PPC64_ADDR16_HIGHERA, 40) +ELF_RELOC(R_PPC64_ADDR16_HIGHEST, 41) +ELF_RELOC(R_PPC64_ADDR16_HIGHESTA, 42) +ELF_RELOC(R_PPC64_REL64, 44) +ELF_RELOC(R_PPC64_TOC16, 47) +ELF_RELOC(R_PPC64_TOC16_LO, 48) +ELF_RELOC(R_PPC64_TOC16_HI, 49) +ELF_RELOC(R_PPC64_TOC16_HA, 50) +ELF_RELOC(R_PPC64_TOC, 51) +ELF_RELOC(R_PPC64_ADDR16_DS, 56) +ELF_RELOC(R_PPC64_ADDR16_LO_DS, 57) +ELF_RELOC(R_PPC64_GOT16_DS, 58) +ELF_RELOC(R_PPC64_GOT16_LO_DS, 59) +ELF_RELOC(R_PPC64_TOC16_DS, 63) +ELF_RELOC(R_PPC64_TOC16_LO_DS, 64) +ELF_RELOC(R_PPC64_TLS, 67) +ELF_RELOC(R_PPC64_DTPMOD64, 68) +ELF_RELOC(R_PPC64_TPREL16, 69) +ELF_RELOC(R_PPC64_TPREL16_LO, 70) +ELF_RELOC(R_PPC64_TPREL16_HI, 71) +ELF_RELOC(R_PPC64_TPREL16_HA, 72) +ELF_RELOC(R_PPC64_TPREL64, 73) +ELF_RELOC(R_PPC64_DTPREL16, 74) +ELF_RELOC(R_PPC64_DTPREL16_LO, 75) +ELF_RELOC(R_PPC64_DTPREL16_HI, 76) +ELF_RELOC(R_PPC64_DTPREL16_HA, 77) +ELF_RELOC(R_PPC64_DTPREL64, 78) +ELF_RELOC(R_PPC64_GOT_TLSGD16, 79) +ELF_RELOC(R_PPC64_GOT_TLSGD16_LO, 80) +ELF_RELOC(R_PPC64_GOT_TLSGD16_HI, 81) +ELF_RELOC(R_PPC64_GOT_TLSGD16_HA, 82) +ELF_RELOC(R_PPC64_GOT_TLSLD16, 83) +ELF_RELOC(R_PPC64_GOT_TLSLD16_LO, 84) +ELF_RELOC(R_PPC64_GOT_TLSLD16_HI, 85) +ELF_RELOC(R_PPC64_GOT_TLSLD16_HA, 86) +ELF_RELOC(R_PPC64_GOT_TPREL16_DS, 87) +ELF_RELOC(R_PPC64_GOT_TPREL16_LO_DS, 88) +ELF_RELOC(R_PPC64_GOT_TPREL16_HI, 89) +ELF_RELOC(R_PPC64_GOT_TPREL16_HA, 90) +ELF_RELOC(R_PPC64_GOT_DTPREL16_DS, 91) +ELF_RELOC(R_PPC64_GOT_DTPREL16_LO_DS, 92) +ELF_RELOC(R_PPC64_GOT_DTPREL16_HI, 93) +ELF_RELOC(R_PPC64_GOT_DTPREL16_HA, 94) +ELF_RELOC(R_PPC64_TPREL16_DS, 95) +ELF_RELOC(R_PPC64_TPREL16_LO_DS, 96) +ELF_RELOC(R_PPC64_TPREL16_HIGHER, 97) +ELF_RELOC(R_PPC64_TPREL16_HIGHERA, 98) +ELF_RELOC(R_PPC64_TPREL16_HIGHEST, 99) +ELF_RELOC(R_PPC64_TPREL16_HIGHESTA, 100) +ELF_RELOC(R_PPC64_DTPREL16_DS, 101) +ELF_RELOC(R_PPC64_DTPREL16_LO_DS, 102) +ELF_RELOC(R_PPC64_DTPREL16_HIGHER, 103) +ELF_RELOC(R_PPC64_DTPREL16_HIGHERA, 104) +ELF_RELOC(R_PPC64_DTPREL16_HIGHEST, 105) +ELF_RELOC(R_PPC64_DTPREL16_HIGHESTA, 106) +ELF_RELOC(R_PPC64_TLSGD, 107) +ELF_RELOC(R_PPC64_TLSLD, 108) +ELF_RELOC(R_PPC64_REL16, 249) +ELF_RELOC(R_PPC64_REL16_LO, 250) +ELF_RELOC(R_PPC64_REL16_HI, 251) +ELF_RELOC(R_PPC64_REL16_HA, 252) diff --git a/llvm/include/llvm/Support/ELFRelocs/Sparc.def b/llvm/include/llvm/Support/ELFRelocs/Sparc.def new file mode 100644 index 0000000..7e01a4a --- /dev/null +++ b/llvm/include/llvm/Support/ELFRelocs/Sparc.def @@ -0,0 +1,89 @@ + +#ifndef ELF_RELOC +#error "ELF_RELOC must be defined" +#endif + +ELF_RELOC(R_SPARC_NONE, 0) +ELF_RELOC(R_SPARC_8, 1) +ELF_RELOC(R_SPARC_16, 2) +ELF_RELOC(R_SPARC_32, 3) +ELF_RELOC(R_SPARC_DISP8, 4) +ELF_RELOC(R_SPARC_DISP16, 5) +ELF_RELOC(R_SPARC_DISP32, 6) +ELF_RELOC(R_SPARC_WDISP30, 7) +ELF_RELOC(R_SPARC_WDISP22, 8) +ELF_RELOC(R_SPARC_HI22, 9) +ELF_RELOC(R_SPARC_22, 10) +ELF_RELOC(R_SPARC_13, 11) +ELF_RELOC(R_SPARC_LO10, 12) +ELF_RELOC(R_SPARC_GOT10, 13) +ELF_RELOC(R_SPARC_GOT13, 14) +ELF_RELOC(R_SPARC_GOT22, 15) +ELF_RELOC(R_SPARC_PC10, 16) +ELF_RELOC(R_SPARC_PC22, 17) +ELF_RELOC(R_SPARC_WPLT30, 18) +ELF_RELOC(R_SPARC_COPY, 19) +ELF_RELOC(R_SPARC_GLOB_DAT, 20) +ELF_RELOC(R_SPARC_JMP_SLOT, 21) +ELF_RELOC(R_SPARC_RELATIVE, 22) +ELF_RELOC(R_SPARC_UA32, 23) +ELF_RELOC(R_SPARC_PLT32, 24) +ELF_RELOC(R_SPARC_HIPLT22, 25) +ELF_RELOC(R_SPARC_LOPLT10, 26) +ELF_RELOC(R_SPARC_PCPLT32, 27) +ELF_RELOC(R_SPARC_PCPLT22, 28) +ELF_RELOC(R_SPARC_PCPLT10, 29) +ELF_RELOC(R_SPARC_10, 30) +ELF_RELOC(R_SPARC_11, 31) +ELF_RELOC(R_SPARC_64, 32) +ELF_RELOC(R_SPARC_OLO10, 33) +ELF_RELOC(R_SPARC_HH22, 34) +ELF_RELOC(R_SPARC_HM10, 35) +ELF_RELOC(R_SPARC_LM22, 36) +ELF_RELOC(R_SPARC_PC_HH22, 37) +ELF_RELOC(R_SPARC_PC_HM10, 38) +ELF_RELOC(R_SPARC_PC_LM22, 39) +ELF_RELOC(R_SPARC_WDISP16, 40) +ELF_RELOC(R_SPARC_WDISP19, 41) +ELF_RELOC(R_SPARC_7, 43) +ELF_RELOC(R_SPARC_5, 44) +ELF_RELOC(R_SPARC_6, 45) +ELF_RELOC(R_SPARC_DISP64, 46) +ELF_RELOC(R_SPARC_PLT64, 47) +ELF_RELOC(R_SPARC_HIX22, 48) +ELF_RELOC(R_SPARC_LOX10, 49) +ELF_RELOC(R_SPARC_H44, 50) +ELF_RELOC(R_SPARC_M44, 51) +ELF_RELOC(R_SPARC_L44, 52) +ELF_RELOC(R_SPARC_REGISTER, 53) +ELF_RELOC(R_SPARC_UA64, 54) +ELF_RELOC(R_SPARC_UA16, 55) +ELF_RELOC(R_SPARC_TLS_GD_HI22, 56) +ELF_RELOC(R_SPARC_TLS_GD_LO10, 57) +ELF_RELOC(R_SPARC_TLS_GD_ADD, 58) +ELF_RELOC(R_SPARC_TLS_GD_CALL, 59) +ELF_RELOC(R_SPARC_TLS_LDM_HI22, 60) +ELF_RELOC(R_SPARC_TLS_LDM_LO10, 61) +ELF_RELOC(R_SPARC_TLS_LDM_ADD, 62) +ELF_RELOC(R_SPARC_TLS_LDM_CALL, 63) +ELF_RELOC(R_SPARC_TLS_LDO_HIX22, 64) +ELF_RELOC(R_SPARC_TLS_LDO_LOX10, 65) +ELF_RELOC(R_SPARC_TLS_LDO_ADD, 66) +ELF_RELOC(R_SPARC_TLS_IE_HI22, 67) +ELF_RELOC(R_SPARC_TLS_IE_LO10, 68) +ELF_RELOC(R_SPARC_TLS_IE_LD, 69) +ELF_RELOC(R_SPARC_TLS_IE_LDX, 70) +ELF_RELOC(R_SPARC_TLS_IE_ADD, 71) +ELF_RELOC(R_SPARC_TLS_LE_HIX22, 72) +ELF_RELOC(R_SPARC_TLS_LE_LOX10, 73) +ELF_RELOC(R_SPARC_TLS_DTPMOD32, 74) +ELF_RELOC(R_SPARC_TLS_DTPMOD64, 75) +ELF_RELOC(R_SPARC_TLS_DTPOFF32, 76) +ELF_RELOC(R_SPARC_TLS_DTPOFF64, 77) +ELF_RELOC(R_SPARC_TLS_TPOFF32, 78) +ELF_RELOC(R_SPARC_TLS_TPOFF64, 79) +ELF_RELOC(R_SPARC_GOTDATA_HIX22, 80) +ELF_RELOC(R_SPARC_GOTDATA_LOX10, 81) +ELF_RELOC(R_SPARC_GOTDATA_OP_HIX22, 82) +ELF_RELOC(R_SPARC_GOTDATA_OP_LOX10, 83) +ELF_RELOC(R_SPARC_GOTDATA_OP, 84) diff --git a/llvm/include/llvm/Support/ELFRelocs/SystemZ.def b/llvm/include/llvm/Support/ELFRelocs/SystemZ.def new file mode 100644 index 0000000..711f940 --- /dev/null +++ b/llvm/include/llvm/Support/ELFRelocs/SystemZ.def @@ -0,0 +1,67 @@ + +#ifndef ELF_RELOC +#error "ELF_RELOC must be defined" +#endif + +ELF_RELOC(R_390_NONE, 0) +ELF_RELOC(R_390_8, 1) +ELF_RELOC(R_390_12, 2) +ELF_RELOC(R_390_16, 3) +ELF_RELOC(R_390_32, 4) +ELF_RELOC(R_390_PC32, 5) +ELF_RELOC(R_390_GOT12, 6) +ELF_RELOC(R_390_GOT32, 7) +ELF_RELOC(R_390_PLT32, 8) +ELF_RELOC(R_390_COPY, 9) +ELF_RELOC(R_390_GLOB_DAT, 10) +ELF_RELOC(R_390_JMP_SLOT, 11) +ELF_RELOC(R_390_RELATIVE, 12) +ELF_RELOC(R_390_GOTOFF, 13) +ELF_RELOC(R_390_GOTPC, 14) +ELF_RELOC(R_390_GOT16, 15) +ELF_RELOC(R_390_PC16, 16) +ELF_RELOC(R_390_PC16DBL, 17) +ELF_RELOC(R_390_PLT16DBL, 18) +ELF_RELOC(R_390_PC32DBL, 19) +ELF_RELOC(R_390_PLT32DBL, 20) +ELF_RELOC(R_390_GOTPCDBL, 21) +ELF_RELOC(R_390_64, 22) +ELF_RELOC(R_390_PC64, 23) +ELF_RELOC(R_390_GOT64, 24) +ELF_RELOC(R_390_PLT64, 25) +ELF_RELOC(R_390_GOTENT, 26) +ELF_RELOC(R_390_GOTOFF16, 27) +ELF_RELOC(R_390_GOTOFF64, 28) +ELF_RELOC(R_390_GOTPLT12, 29) +ELF_RELOC(R_390_GOTPLT16, 30) +ELF_RELOC(R_390_GOTPLT32, 31) +ELF_RELOC(R_390_GOTPLT64, 32) +ELF_RELOC(R_390_GOTPLTENT, 33) +ELF_RELOC(R_390_PLTOFF16, 34) +ELF_RELOC(R_390_PLTOFF32, 35) +ELF_RELOC(R_390_PLTOFF64, 36) +ELF_RELOC(R_390_TLS_LOAD, 37) +ELF_RELOC(R_390_TLS_GDCALL, 38) +ELF_RELOC(R_390_TLS_LDCALL, 39) +ELF_RELOC(R_390_TLS_GD32, 40) +ELF_RELOC(R_390_TLS_GD64, 41) +ELF_RELOC(R_390_TLS_GOTIE12, 42) +ELF_RELOC(R_390_TLS_GOTIE32, 43) +ELF_RELOC(R_390_TLS_GOTIE64, 44) +ELF_RELOC(R_390_TLS_LDM32, 45) +ELF_RELOC(R_390_TLS_LDM64, 46) +ELF_RELOC(R_390_TLS_IE32, 47) +ELF_RELOC(R_390_TLS_IE64, 48) +ELF_RELOC(R_390_TLS_IEENT, 49) +ELF_RELOC(R_390_TLS_LE32, 50) +ELF_RELOC(R_390_TLS_LE64, 51) +ELF_RELOC(R_390_TLS_LDO32, 52) +ELF_RELOC(R_390_TLS_LDO64, 53) +ELF_RELOC(R_390_TLS_DTPMOD, 54) +ELF_RELOC(R_390_TLS_DTPOFF, 55) +ELF_RELOC(R_390_TLS_TPOFF, 56) +ELF_RELOC(R_390_20, 57) +ELF_RELOC(R_390_GOT20, 58) +ELF_RELOC(R_390_GOTPLT20, 59) +ELF_RELOC(R_390_TLS_GOTIE20, 60) +ELF_RELOC(R_390_IRELATIVE, 61) diff --git a/llvm/include/llvm/Support/ELFRelocs/WebAssembly.def b/llvm/include/llvm/Support/ELFRelocs/WebAssembly.def new file mode 100644 index 0000000..9a34349 --- /dev/null +++ b/llvm/include/llvm/Support/ELFRelocs/WebAssembly.def @@ -0,0 +1,8 @@ + +#ifndef ELF_RELOC +#error "ELF_RELOC must be defined" +#endif + +ELF_RELOC(R_WEBASSEMBLY_NONE, 0) +ELF_RELOC(R_WEBASSEMBLY_DATA, 1) +ELF_RELOC(R_WEBASSEMBLY_FUNCTION, 2) diff --git a/llvm/include/llvm/Support/ELFRelocs/i386.def b/llvm/include/llvm/Support/ELFRelocs/i386.def new file mode 100644 index 0000000..45eae7f --- /dev/null +++ b/llvm/include/llvm/Support/ELFRelocs/i386.def @@ -0,0 +1,47 @@ + +#ifndef ELF_RELOC +#error "ELF_RELOC must be defined" +#endif + +// TODO: this is just a subset +ELF_RELOC(R_386_NONE, 0) +ELF_RELOC(R_386_32, 1) +ELF_RELOC(R_386_PC32, 2) +ELF_RELOC(R_386_GOT32, 3) +ELF_RELOC(R_386_PLT32, 4) +ELF_RELOC(R_386_COPY, 5) +ELF_RELOC(R_386_GLOB_DAT, 6) +ELF_RELOC(R_386_JUMP_SLOT, 7) +ELF_RELOC(R_386_RELATIVE, 8) +ELF_RELOC(R_386_GOTOFF, 9) +ELF_RELOC(R_386_GOTPC, 10) +ELF_RELOC(R_386_32PLT, 11) +ELF_RELOC(R_386_TLS_TPOFF, 14) +ELF_RELOC(R_386_TLS_IE, 15) +ELF_RELOC(R_386_TLS_GOTIE, 16) +ELF_RELOC(R_386_TLS_LE, 17) +ELF_RELOC(R_386_TLS_GD, 18) +ELF_RELOC(R_386_TLS_LDM, 19) +ELF_RELOC(R_386_16, 20) +ELF_RELOC(R_386_PC16, 21) +ELF_RELOC(R_386_8, 22) +ELF_RELOC(R_386_PC8, 23) +ELF_RELOC(R_386_TLS_GD_32, 24) +ELF_RELOC(R_386_TLS_GD_PUSH, 25) +ELF_RELOC(R_386_TLS_GD_CALL, 26) +ELF_RELOC(R_386_TLS_GD_POP, 27) +ELF_RELOC(R_386_TLS_LDM_32, 28) +ELF_RELOC(R_386_TLS_LDM_PUSH, 29) +ELF_RELOC(R_386_TLS_LDM_CALL, 30) +ELF_RELOC(R_386_TLS_LDM_POP, 31) +ELF_RELOC(R_386_TLS_LDO_32, 32) +ELF_RELOC(R_386_TLS_IE_32, 33) +ELF_RELOC(R_386_TLS_LE_32, 34) +ELF_RELOC(R_386_TLS_DTPMOD32, 35) +ELF_RELOC(R_386_TLS_DTPOFF32, 36) +ELF_RELOC(R_386_TLS_TPOFF32, 37) +ELF_RELOC(R_386_TLS_GOTDESC, 39) +ELF_RELOC(R_386_TLS_DESC_CALL, 40) +ELF_RELOC(R_386_TLS_DESC, 41) +ELF_RELOC(R_386_IRELATIVE, 42) +ELF_RELOC(R_386_NUM, 43) diff --git a/llvm/include/llvm/Support/ELFRelocs/x86_64.def b/llvm/include/llvm/Support/ELFRelocs/x86_64.def new file mode 100644 index 0000000..36ad061 --- /dev/null +++ b/llvm/include/llvm/Support/ELFRelocs/x86_64.def @@ -0,0 +1,44 @@ + +#ifndef ELF_RELOC +#error "ELF_RELOC must be defined" +#endif + +ELF_RELOC(R_X86_64_NONE, 0) +ELF_RELOC(R_X86_64_64, 1) +ELF_RELOC(R_X86_64_PC32, 2) +ELF_RELOC(R_X86_64_GOT32, 3) +ELF_RELOC(R_X86_64_PLT32, 4) +ELF_RELOC(R_X86_64_COPY, 5) +ELF_RELOC(R_X86_64_GLOB_DAT, 6) +ELF_RELOC(R_X86_64_JUMP_SLOT, 7) +ELF_RELOC(R_X86_64_RELATIVE, 8) +ELF_RELOC(R_X86_64_GOTPCREL, 9) +ELF_RELOC(R_X86_64_32, 10) +ELF_RELOC(R_X86_64_32S, 11) +ELF_RELOC(R_X86_64_16, 12) +ELF_RELOC(R_X86_64_PC16, 13) +ELF_RELOC(R_X86_64_8, 14) +ELF_RELOC(R_X86_64_PC8, 15) +ELF_RELOC(R_X86_64_DTPMOD64, 16) +ELF_RELOC(R_X86_64_DTPOFF64, 17) +ELF_RELOC(R_X86_64_TPOFF64, 18) +ELF_RELOC(R_X86_64_TLSGD, 19) +ELF_RELOC(R_X86_64_TLSLD, 20) +ELF_RELOC(R_X86_64_DTPOFF32, 21) +ELF_RELOC(R_X86_64_GOTTPOFF, 22) +ELF_RELOC(R_X86_64_TPOFF32, 23) +ELF_RELOC(R_X86_64_PC64, 24) +ELF_RELOC(R_X86_64_GOTOFF64, 25) +ELF_RELOC(R_X86_64_GOTPC32, 26) +ELF_RELOC(R_X86_64_GOT64, 27) +ELF_RELOC(R_X86_64_GOTPCREL64, 28) +ELF_RELOC(R_X86_64_GOTPC64, 29) +ELF_RELOC(R_X86_64_GOTPLT64, 30) +ELF_RELOC(R_X86_64_PLTOFF64, 31) +ELF_RELOC(R_X86_64_SIZE32, 32) +ELF_RELOC(R_X86_64_SIZE64, 33) +ELF_RELOC(R_X86_64_GOTPC32_TLSDESC, 34) +ELF_RELOC(R_X86_64_TLSDESC_CALL, 35) +ELF_RELOC(R_X86_64_TLSDESC, 36) +ELF_RELOC(R_X86_64_IRELATIVE, 37) + diff --git a/llvm/include/llvm/Support/Endian.h b/llvm/include/llvm/Support/Endian.h new file mode 100644 index 0000000..59c59b4 --- /dev/null +++ b/llvm/include/llvm/Support/Endian.h @@ -0,0 +1,349 @@ +//===- Endian.h - Utilities for IO with endian specific data ----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares generic functions to read and write endian specific data. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_ENDIAN_H +#define LLVM_SUPPORT_ENDIAN_H + +#include "llvm/Support/AlignOf.h" +#include "llvm/Support/Host.h" +#include "llvm/Support/SwapByteOrder.h" + +namespace llvm_ks { +namespace support { +enum endianness {big, little, native}; + +// These are named values for common alignments. +enum {aligned = 0, unaligned = 1}; + +namespace detail { + /// \brief ::value is either alignment, or alignof(T) if alignment is 0. + template + struct PickAlignment { + enum {value = alignment == 0 ? AlignOf::Alignment : alignment}; + }; +} // end namespace detail + +namespace endian { +/// Swap the bytes of value to match the given endianness. +template +inline value_type byte_swap(value_type value) { + if (endian != native && sys::IsBigEndianHost != (endian == big)) + sys::swapByteOrder(value); + return value; +} + +/// Read a value of a particular endianness from memory. +template +inline value_type read(const void *memory) { + value_type ret; + + memcpy(&ret, + LLVM_ASSUME_ALIGNED(memory, + (detail::PickAlignment::value)), + sizeof(value_type)); + return byte_swap(ret); +} + +/// Read a value of a particular endianness from a buffer, and increment the +/// buffer past that value. +template +inline value_type readNext(const CharT *&memory) { + value_type ret = read(memory); + memory += sizeof(value_type); + return ret; +} + +/// Write a value to memory with a particular endianness. +template +inline void write(void *memory, value_type value) { + value = byte_swap(value); + memcpy(LLVM_ASSUME_ALIGNED(memory, + (detail::PickAlignment::value)), + &value, + sizeof(value_type)); +} + +template +using make_unsigned_t = typename std::make_unsigned::type; + +/// Read a value of a particular endianness from memory, for a location +/// that starts at the given bit offset within the first byte. +template +inline value_type readAtBitAlignment(const void *memory, uint64_t startBit) { + assert(startBit < 8); + if (startBit == 0) + return read(memory); + else { + // Read two values and compose the result from them. + value_type val[2]; + memcpy(&val[0], + LLVM_ASSUME_ALIGNED( + memory, (detail::PickAlignment::value)), + sizeof(value_type) * 2); + val[0] = byte_swap(val[0]); + val[1] = byte_swap(val[1]); + + // Shift bits from the lower value into place. + make_unsigned_t lowerVal = val[0] >> startBit; + // Mask off upper bits after right shift in case of signed type. + make_unsigned_t numBitsFirstVal = + (sizeof(value_type) * 8) - startBit; + lowerVal &= ((make_unsigned_t)1 << numBitsFirstVal) - 1; + + // Get the bits from the upper value. + make_unsigned_t upperVal = + val[1] & (((make_unsigned_t)1 << startBit) - 1); + // Shift them in to place. + upperVal <<= numBitsFirstVal; + + return lowerVal | upperVal; + } +} + +/// Write a value to memory with a particular endianness, for a location +/// that starts at the given bit offset within the first byte. +template +inline void writeAtBitAlignment(void *memory, value_type value, + uint64_t startBit) { + assert(startBit < 8); + if (startBit == 0) + write(memory, value); + else { + // Read two values and shift the result into them. + value_type val[2]; + memcpy(&val[0], + LLVM_ASSUME_ALIGNED( + memory, (detail::PickAlignment::value)), + sizeof(value_type) * 2); + val[0] = byte_swap(val[0]); + val[1] = byte_swap(val[1]); + + // Mask off any existing bits in the upper part of the lower value that + // we want to replace. + val[0] &= ((make_unsigned_t)1 << startBit) - 1; + make_unsigned_t numBitsFirstVal = + (sizeof(value_type) * 8) - startBit; + make_unsigned_t lowerVal = value; + if (startBit > 0) { + // Mask off the upper bits in the new value that are not going to go into + // the lower value. This avoids a left shift of a negative value, which + // is undefined behavior. + lowerVal &= (((make_unsigned_t)1 << numBitsFirstVal) - 1); + // Now shift the new bits into place + lowerVal <<= startBit; + } + val[0] |= lowerVal; + + // Mask off any existing bits in the lower part of the upper value that + // we want to replace. + val[1] &= ~(((make_unsigned_t)1 << startBit) - 1); + // Next shift the bits that go into the upper value into position. + make_unsigned_t upperVal = value >> numBitsFirstVal; + // Mask off upper bits after right shift in case of signed type. + upperVal &= ((make_unsigned_t)1 << startBit) - 1; + val[1] |= upperVal; + + // Finally, rewrite values. + val[0] = byte_swap(val[0]); + val[1] = byte_swap(val[1]); + memcpy(LLVM_ASSUME_ALIGNED( + memory, (detail::PickAlignment::value)), + &val[0], sizeof(value_type) * 2); + } +} +} // end namespace endian + +namespace detail { +template +struct packed_endian_specific_integral { + packed_endian_specific_integral() = default; + + explicit packed_endian_specific_integral(value_type val) { *this = val; } + + operator value_type() const { + return endian::read( + (const void*)Value.buffer); + } + + void operator=(value_type newValue) { + endian::write( + (void*)Value.buffer, newValue); + } + + packed_endian_specific_integral &operator+=(value_type newValue) { + *this = *this + newValue; + return *this; + } + + packed_endian_specific_integral &operator-=(value_type newValue) { + *this = *this - newValue; + return *this; + } + + packed_endian_specific_integral &operator|=(value_type newValue) { + *this = *this | newValue; + return *this; + } + + packed_endian_specific_integral &operator&=(value_type newValue) { + *this = *this & newValue; + return *this; + } + +private: + AlignedCharArray::value, + sizeof(value_type)> Value; + +public: + struct ref { + explicit ref(void *Ptr) : Ptr(Ptr) {} + + operator value_type() const { + return endian::read(Ptr); + } + + void operator=(value_type NewValue) { + endian::write(Ptr, NewValue); + } + + private: + void *Ptr; + }; +}; + +} // end namespace detail + +typedef detail::packed_endian_specific_integral + ulittle16_t; +typedef detail::packed_endian_specific_integral + ulittle32_t; +typedef detail::packed_endian_specific_integral + ulittle64_t; + +typedef detail::packed_endian_specific_integral + little16_t; +typedef detail::packed_endian_specific_integral + little32_t; +typedef detail::packed_endian_specific_integral + little64_t; + +typedef detail::packed_endian_specific_integral + aligned_ulittle16_t; +typedef detail::packed_endian_specific_integral + aligned_ulittle32_t; +typedef detail::packed_endian_specific_integral + aligned_ulittle64_t; + +typedef detail::packed_endian_specific_integral + aligned_little16_t; +typedef detail::packed_endian_specific_integral + aligned_little32_t; +typedef detail::packed_endian_specific_integral + aligned_little64_t; + +typedef detail::packed_endian_specific_integral + ubig16_t; +typedef detail::packed_endian_specific_integral + ubig32_t; +typedef detail::packed_endian_specific_integral + ubig64_t; + +typedef detail::packed_endian_specific_integral + big16_t; +typedef detail::packed_endian_specific_integral + big32_t; +typedef detail::packed_endian_specific_integral + big64_t; + +typedef detail::packed_endian_specific_integral + aligned_ubig16_t; +typedef detail::packed_endian_specific_integral + aligned_ubig32_t; +typedef detail::packed_endian_specific_integral + aligned_ubig64_t; + +typedef detail::packed_endian_specific_integral + aligned_big16_t; +typedef detail::packed_endian_specific_integral + aligned_big32_t; +typedef detail::packed_endian_specific_integral + aligned_big64_t; + +typedef detail::packed_endian_specific_integral + unaligned_uint16_t; +typedef detail::packed_endian_specific_integral + unaligned_uint32_t; +typedef detail::packed_endian_specific_integral + unaligned_uint64_t; + +typedef detail::packed_endian_specific_integral + unaligned_int16_t; +typedef detail::packed_endian_specific_integral + unaligned_int32_t; +typedef detail::packed_endian_specific_integral + unaligned_int64_t; + +namespace endian { +template inline T read(const void *P) { + return *(const detail::packed_endian_specific_integral *)P; +} + +template inline uint16_t read16(const void *P) { + return read(P); +} +template inline uint32_t read32(const void *P) { + return read(P); +} +template inline uint64_t read64(const void *P) { + return read(P); +} + +inline uint16_t read16le(const void *P) { return read16(P); } +inline uint32_t read32le(const void *P) { return read32(P); } +inline uint64_t read64le(const void *P) { return read64(P); } +inline uint16_t read16be(const void *P) { return read16(P); } +inline uint32_t read32be(const void *P) { return read32(P); } +inline uint64_t read64be(const void *P) { return read64(P); } + +template inline void write(void *P, T V) { + *(detail::packed_endian_specific_integral *)P = V; +} + +template inline void write16(void *P, uint16_t V) { + write(P, V); +} +template inline void write32(void *P, uint32_t V) { + write(P, V); +} +template inline void write64(void *P, uint64_t V) { + write(P, V); +} + +inline void write16le(void *P, uint16_t V) { write16(P, V); } +inline void write32le(void *P, uint32_t V) { write32(P, V); } +inline void write64le(void *P, uint64_t V) { write64(P, V); } +inline void write16be(void *P, uint16_t V) { write16(P, V); } +inline void write32be(void *P, uint32_t V) { write32(P, V); } +inline void write64be(void *P, uint64_t V) { write64(P, V); } +} // end namespace endian +} // end namespace support +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/Support/EndianStream.h b/llvm/include/llvm/Support/EndianStream.h new file mode 100644 index 0000000..35200c1 --- /dev/null +++ b/llvm/include/llvm/Support/EndianStream.h @@ -0,0 +1,69 @@ +//===- EndianStream.h - Stream ops with endian specific data ----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines utilities for operating on streams that have endian +// specific data. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_ENDIANSTREAM_H +#define LLVM_SUPPORT_ENDIANSTREAM_H + +#include "llvm/ADT/ArrayRef.h" +#include "llvm/Support/Endian.h" +#include "llvm/Support/raw_ostream.h" + +namespace llvm_ks { +namespace support { + +namespace endian { +/// Adapter to write values to a stream in a particular byte order. +template struct Writer { + raw_ostream &OS; + Writer(raw_ostream &OS) : OS(OS) {} + template void write(ArrayRef Vals) { + for (value_type V : Vals) + write(V); + } + template void write(value_type Val) { + Val = byte_swap(Val); + OS.write((const char *)&Val, sizeof(value_type)); + } +}; + +template <> +template <> +inline void Writer::write(float Val) { + write(FloatToBits(Val)); +} + +template <> +template <> +inline void Writer::write(double Val) { + write(DoubleToBits(Val)); +} + +template <> +template <> +inline void Writer::write(float Val) { + write(FloatToBits(Val)); +} + +template <> +template <> +inline void Writer::write(double Val) { + write(DoubleToBits(Val)); +} + +} // end namespace endian + +} // end namespace support +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/Support/Errc.h b/llvm/include/llvm/Support/Errc.h new file mode 100644 index 0000000..a0f6e08 --- /dev/null +++ b/llvm/include/llvm/Support/Errc.h @@ -0,0 +1,86 @@ +//===- llvm/Support/Errc.h - Defines the llvm_ks::errc enum --------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// While std::error_code works OK on all platforms we use, there are some +// some problems with std::errc that can be avoided by using our own +// enumeration: +// +// * std::errc is a namespace in some implementations. That meas that ADL +// doesn't work and it is sometimes necessary to write std::make_error_code +// or in templates: +// using std::make_error_code; +// make_error_code(...); +// +// with this enum it is safe to always just use make_error_code. +// +// * Some implementations define fewer names than others. This header has +// the intersection of all the ones we support. +// +// * std::errc is just marked with is_error_condition_enum. This means that +// common patters like AnErrorCode == errc::no_such_file_or_directory take +// 4 virtual calls instead of two comparisons. +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_ERRC_H +#define LLVM_SUPPORT_ERRC_H + +#include + +namespace llvm_ks { +enum class errc { + argument_list_too_long = int(std::errc::argument_list_too_long), + argument_out_of_domain = int(std::errc::argument_out_of_domain), + bad_address = int(std::errc::bad_address), + bad_file_descriptor = int(std::errc::bad_file_descriptor), + broken_pipe = int(std::errc::broken_pipe), + device_or_resource_busy = int(std::errc::device_or_resource_busy), + directory_not_empty = int(std::errc::directory_not_empty), + executable_format_error = int(std::errc::executable_format_error), + file_exists = int(std::errc::file_exists), + file_too_large = int(std::errc::file_too_large), + filename_too_long = int(std::errc::filename_too_long), + function_not_supported = int(std::errc::function_not_supported), + illegal_byte_sequence = int(std::errc::illegal_byte_sequence), + inappropriate_io_control_operation = + int(std::errc::inappropriate_io_control_operation), + interrupted = int(std::errc::interrupted), + invalid_argument = int(std::errc::invalid_argument), + invalid_seek = int(std::errc::invalid_seek), + io_error = int(std::errc::io_error), + is_a_directory = int(std::errc::is_a_directory), + no_child_process = int(std::errc::no_child_process), + no_lock_available = int(std::errc::no_lock_available), + no_space_on_device = int(std::errc::no_space_on_device), + no_such_device_or_address = int(std::errc::no_such_device_or_address), + no_such_device = int(std::errc::no_such_device), + no_such_file_or_directory = int(std::errc::no_such_file_or_directory), + no_such_process = int(std::errc::no_such_process), + not_a_directory = int(std::errc::not_a_directory), + not_enough_memory = int(std::errc::not_enough_memory), + operation_not_permitted = int(std::errc::operation_not_permitted), + permission_denied = int(std::errc::permission_denied), + read_only_file_system = int(std::errc::read_only_file_system), + resource_deadlock_would_occur = int(std::errc::resource_deadlock_would_occur), + resource_unavailable_try_again = + int(std::errc::resource_unavailable_try_again), + result_out_of_range = int(std::errc::result_out_of_range), + too_many_files_open_in_system = int(std::errc::too_many_files_open_in_system), + too_many_files_open = int(std::errc::too_many_files_open), + too_many_links = int(std::errc::too_many_links) +}; + +inline std::error_code make_error_code(errc E) { + return std::error_code(static_cast(E), std::generic_category()); +} +} + +namespace std { +template <> struct is_error_code_enum : std::true_type {}; +} +#endif diff --git a/llvm/include/llvm/Support/Errno.h b/llvm/include/llvm/Support/Errno.h new file mode 100644 index 0000000..931b733 --- /dev/null +++ b/llvm/include/llvm/Support/Errno.h @@ -0,0 +1,34 @@ +//===- llvm/Support/Errno.h - Portable+convenient errno handling -*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares some portable and convenient functions to deal with errno. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_ERRNO_H +#define LLVM_SUPPORT_ERRNO_H + +#include + +namespace llvm_ks { +namespace sys { + +/// Returns a string representation of the errno value, using whatever +/// thread-safe variant of strerror() is available. Be sure to call this +/// immediately after the function that set errno, or errno may have been +/// overwritten by an intervening call. +std::string StrError(); + +/// Like the no-argument version above, but uses \p errnum instead of errno. +std::string StrError(int errnum); + +} // namespace sys +} // namespace llvm_ks + +#endif // LLVM_SYSTEM_ERRNO_H diff --git a/llvm/include/llvm/Support/ErrorHandling.h b/llvm/include/llvm/Support/ErrorHandling.h new file mode 100644 index 0000000..89a11df --- /dev/null +++ b/llvm/include/llvm/Support/ErrorHandling.h @@ -0,0 +1,106 @@ +//===- llvm/Support/ErrorHandling.h - Fatal error handling ------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines an API used to indicate fatal error conditions. Non-fatal +// errors (most of them) should be handled through LLVMContext. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_ERRORHANDLING_H +#define LLVM_SUPPORT_ERRORHANDLING_H + +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/Compiler.h" +#include + +namespace llvm_ks { + class Twine; + + /// An error handler callback. + typedef void (*fatal_error_handler_t)(void *user_data, + const std::string& reason, + bool gen_crash_diag); + + /// install_fatal_error_handler - Installs a new error handler to be used + /// whenever a serious (non-recoverable) error is encountered by LLVM. + /// + /// If no error handler is installed the default is to print the error message + /// to stderr, and call exit(1). If an error handler is installed then it is + /// the handler's responsibility to log the message, it will no longer be + /// printed to stderr. If the error handler returns, then exit(1) will be + /// called. + /// + /// It is dangerous to naively use an error handler which throws an exception. + /// Even though some applications desire to gracefully recover from arbitrary + /// faults, blindly throwing exceptions through unfamiliar code isn't a way to + /// achieve this. + /// + /// \param user_data - An argument which will be passed to the install error + /// handler. + void install_fatal_error_handler(fatal_error_handler_t handler, + void *user_data = nullptr); + + /// Restores default error handling behaviour. + void remove_fatal_error_handler(); + + /// ScopedFatalErrorHandler - This is a simple helper class which just + /// calls install_fatal_error_handler in its constructor and + /// remove_fatal_error_handler in its destructor. + struct ScopedFatalErrorHandler { + explicit ScopedFatalErrorHandler(fatal_error_handler_t handler, + void *user_data = nullptr) { + install_fatal_error_handler(handler, user_data); + } + + ~ScopedFatalErrorHandler() { remove_fatal_error_handler(); } + }; + +/// Reports a serious error, calling any installed error handler. These +/// functions are intended to be used for error conditions which are outside +/// the control of the compiler (I/O errors, invalid user input, etc.) +/// +/// If no error handler is installed the default is to print the message to +/// standard error, followed by a newline. +/// After the error handler is called this function will call exit(1), it +/// does not return. +LLVM_ATTRIBUTE_NORETURN void report_fatal_error(const char *reason, + bool gen_crash_diag = true); +LLVM_ATTRIBUTE_NORETURN void report_fatal_error(const std::string &reason, + bool gen_crash_diag = true); +LLVM_ATTRIBUTE_NORETURN void report_fatal_error(StringRef reason, + bool gen_crash_diag = true); +LLVM_ATTRIBUTE_NORETURN void report_fatal_error(const Twine &reason, + bool gen_crash_diag = true); + + /// This function calls abort(), and prints the optional message to stderr. + /// Use the llvm_unreachable macro (that adds location info), instead of + /// calling this function directly. + LLVM_ATTRIBUTE_NORETURN void + llvm_unreachable_internal(const char *msg=nullptr, const char *file=nullptr, + unsigned line=0); +} + +/// Marks that the current location is not supposed to be reachable. +/// In !NDEBUG builds, prints the message and location info to stderr. +/// In NDEBUG builds, becomes an optimizer hint that the current location +/// is not supposed to be reachable. On compilers that don't support +/// such hints, prints a reduced message instead. +/// +/// Use this instead of assert(0). It conveys intent more clearly and +/// allows compilers to omit some unnecessary code. +#ifndef NDEBUG +#define llvm_unreachable(msg) \ + ::llvm_ks::llvm_unreachable_internal(msg, __FILE__, __LINE__) +#elif defined(LLVM_BUILTIN_UNREACHABLE) +#define llvm_unreachable(msg) LLVM_BUILTIN_UNREACHABLE +#else +#define llvm_unreachable(msg) ::llvm_ks::llvm_unreachable_internal() +#endif + +#endif diff --git a/llvm/include/llvm/Support/ErrorOr.h b/llvm/include/llvm/Support/ErrorOr.h new file mode 100644 index 0000000..618bcb8 --- /dev/null +++ b/llvm/include/llvm/Support/ErrorOr.h @@ -0,0 +1,297 @@ +//===- llvm/Support/ErrorOr.h - Error Smart Pointer -------------*- C++ -*-===// +// +// The LLVM Linker +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +/// +/// \file +/// +/// Provides ErrorOr smart pointer. +/// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_ERROROR_H +#define LLVM_SUPPORT_ERROROR_H + +#include "llvm/ADT/PointerIntPair.h" +#include "llvm/Support/AlignOf.h" +#include +#include +#include + +namespace llvm_ks { +template +typename std::enable_if< std::is_constructible::value + , typename std::remove_reference::type>::type && + moveIfMoveConstructible(V &Val) { + return std::move(Val); +} + +template +typename std::enable_if< !std::is_constructible::value + , typename std::remove_reference::type>::type & +moveIfMoveConstructible(V &Val) { + return Val; +} + +/// \brief Stores a reference that can be changed. +template +class ReferenceStorage { + T *Storage; + +public: + ReferenceStorage(T &Ref) : Storage(&Ref) {} + + operator T &() const { return *Storage; } + T &get() const { return *Storage; } +}; + +/// \brief Represents either an error or a value T. +/// +/// ErrorOr is a pointer-like class that represents the result of an +/// operation. The result is either an error, or a value of type T. This is +/// designed to emulate the usage of returning a pointer where nullptr indicates +/// failure. However instead of just knowing that the operation failed, we also +/// have an error_code and optional user data that describes why it failed. +/// +/// It is used like the following. +/// \code +/// ErrorOr getBuffer(); +/// +/// auto buffer = getBuffer(); +/// if (error_code ec = buffer.getError()) +/// return ec; +/// buffer->write("adena"); +/// \endcode +/// +/// +/// Implicit conversion to bool returns true if there is a usable value. The +/// unary * and -> operators provide pointer like access to the value. Accessing +/// the value when there is an error has undefined behavior. +/// +/// When T is a reference type the behaivor is slightly different. The reference +/// is held in a std::reference_wrapper::type>, and +/// there is special handling to make operator -> work as if T was not a +/// reference. +/// +/// T cannot be a rvalue reference. +template +class ErrorOr { + template friend class ErrorOr; + static const bool isRef = std::is_reference::value; + typedef ReferenceStorage::type> wrap; + +public: + typedef typename std::conditional::type storage_type; + +private: + typedef typename std::remove_reference::type &reference; + typedef const typename std::remove_reference::type &const_reference; + typedef typename std::remove_reference::type *pointer; + typedef const typename std::remove_reference::type *const_pointer; + +public: + template + ErrorOr(E ErrorCode, + typename std::enable_if::value || + std::is_error_condition_enum::value, + void *>::type = nullptr) + : HasError(true) { + new (getErrorStorage()) std::error_code(make_error_code(ErrorCode)); + } + + ErrorOr(std::error_code EC) : HasError(true) { + new (getErrorStorage()) std::error_code(EC); + } + + ErrorOr(T Val) : HasError(false) { + new (getStorage()) storage_type(moveIfMoveConstructible(Val)); + } + + ErrorOr(const ErrorOr &Other) { + copyConstruct(Other); + } + + template + ErrorOr( + const ErrorOr &Other, + typename std::enable_if::value>::type * = + nullptr) { + copyConstruct(Other); + } + + template + explicit ErrorOr( + const ErrorOr &Other, + typename std::enable_if< + !std::is_convertible::value>::type * = nullptr) { + copyConstruct(Other); + } + + ErrorOr(ErrorOr &&Other) { + moveConstruct(std::move(Other)); + } + + template + ErrorOr( + ErrorOr &&Other, + typename std::enable_if::value>::type * = + nullptr) { + moveConstruct(std::move(Other)); + } + + // This might eventually need SFINAE but it's more complex than is_convertible + // & I'm too lazy to write it right now. + template + explicit ErrorOr( + ErrorOr &&Other, + typename std::enable_if::value>::type * = + nullptr) { + moveConstruct(std::move(Other)); + } + + ErrorOr &operator=(const ErrorOr &Other) { + copyAssign(Other); + return *this; + } + + ErrorOr &operator=(ErrorOr &&Other) { + moveAssign(std::move(Other)); + return *this; + } + + ~ErrorOr() { + if (!HasError) + getStorage()->~storage_type(); + } + + /// \brief Return false if there is an error. + explicit operator bool() const { + return !HasError; + } + + reference get() { return *getStorage(); } + const_reference get() const { return const_cast *>(this)->get(); } + + std::error_code getError() const { + return HasError ? *getErrorStorage() : std::error_code(); + } + + pointer operator ->() { + return toPointer(getStorage()); + } + + const_pointer operator->() const { return toPointer(getStorage()); } + + reference operator *() { + return *getStorage(); + } + + const_reference operator*() const { return *getStorage(); } + +private: + template + void copyConstruct(const ErrorOr &Other) { + if (!Other.HasError) { + // Get the other value. + HasError = false; + new (getStorage()) storage_type(*Other.getStorage()); + } else { + // Get other's error. + HasError = true; + new (getErrorStorage()) std::error_code(Other.getError()); + } + } + + template + static bool compareThisIfSameType(const T1 &a, const T1 &b) { + return &a == &b; + } + + template + static bool compareThisIfSameType(const T1 &a, const T2 &b) { + return false; + } + + template + void copyAssign(const ErrorOr &Other) { + if (compareThisIfSameType(*this, Other)) + return; + + this->~ErrorOr(); + new (this) ErrorOr(Other); + } + + template + void moveConstruct(ErrorOr &&Other) { + if (!Other.HasError) { + // Get the other value. + HasError = false; + new (getStorage()) storage_type(std::move(*Other.getStorage())); + } else { + // Get other's error. + HasError = true; + new (getErrorStorage()) std::error_code(Other.getError()); + } + } + + template + void moveAssign(ErrorOr &&Other) { + if (compareThisIfSameType(*this, Other)) + return; + + this->~ErrorOr(); + new (this) ErrorOr(std::move(Other)); + } + + pointer toPointer(pointer Val) { + return Val; + } + + const_pointer toPointer(const_pointer Val) const { return Val; } + + pointer toPointer(wrap *Val) { + return &Val->get(); + } + + const_pointer toPointer(const wrap *Val) const { return &Val->get(); } + + storage_type *getStorage() { + assert(!HasError && "Cannot get value when an error exists!"); + return reinterpret_cast(TStorage.buffer); + } + + const storage_type *getStorage() const { + assert(!HasError && "Cannot get value when an error exists!"); + return reinterpret_cast(TStorage.buffer); + } + + std::error_code *getErrorStorage() { + assert(HasError && "Cannot get error when a value exists!"); + return reinterpret_cast(ErrorStorage.buffer); + } + + const std::error_code *getErrorStorage() const { + return const_cast *>(this)->getErrorStorage(); + } + + union { + AlignedCharArrayUnion TStorage; + AlignedCharArrayUnion ErrorStorage; + }; + bool HasError : 1; +}; + +template +typename std::enable_if::value || + std::is_error_condition_enum::value, + bool>::type +operator==(const ErrorOr &Err, E Code) { + return Err.getError() == Code; +} +} // end namespace llvm_ks + +#endif // LLVM_SUPPORT_ERROROR_H diff --git a/llvm/include/llvm/Support/FileSystem.h b/llvm/include/llvm/Support/FileSystem.h new file mode 100644 index 0000000..afb1009 --- /dev/null +++ b/llvm/include/llvm/Support/FileSystem.h @@ -0,0 +1,894 @@ +//===- llvm/Support/FileSystem.h - File System OS Concept -------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the llvm_ks::sys::fs namespace. It is designed after +// TR2/boost filesystem (v3), but modified to remove exception handling and the +// path class. +// +// All functions return an error_code and their actual work via the last out +// argument. The out argument is defined if and only if errc::success is +// returned. A function may return any error code in the generic or system +// category. However, they shall be equivalent to any error conditions listed +// in each functions respective documentation if the condition applies. [ note: +// this does not guarantee that error_code will be in the set of explicitly +// listed codes, but it does guarantee that if any of the explicitly listed +// errors occur, the correct error_code will be used ]. All functions may +// return errc::not_enough_memory if there is not enough memory to complete the +// operation. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_FILESYSTEM_H +#define LLVM_SUPPORT_FILESYSTEM_H + +#include "llvm/ADT/IntrusiveRefCntPtr.h" +#include "llvm/ADT/SmallString.h" +#include "llvm/ADT/Twine.h" +#include "llvm/Support/DataTypes.h" +#include "llvm/Support/ErrorHandling.h" +#include +#include +#include +#include +#include +#include +#include + +#ifdef HAVE_SYS_STAT_H +#include +#endif + +namespace llvm_ks { +namespace sys { +namespace fs { + +/// An enumeration for the file system's view of the type. +enum class file_type { + status_error, + file_not_found, + regular_file, + directory_file, + symlink_file, + block_file, + character_file, + fifo_file, + socket_file, + type_unknown +}; + +/// space_info - Self explanatory. +struct space_info { + uint64_t capacity; + uint64_t free; + uint64_t available; +}; + +enum perms { + no_perms = 0, + owner_read = 0400, + owner_write = 0200, + owner_exe = 0100, + owner_all = owner_read | owner_write | owner_exe, + group_read = 040, + group_write = 020, + group_exe = 010, + group_all = group_read | group_write | group_exe, + others_read = 04, + others_write = 02, + others_exe = 01, + others_all = others_read | others_write | others_exe, + all_read = owner_read | group_read | others_read, + all_write = owner_write | group_write | others_write, + all_exe = owner_exe | group_exe | others_exe, + all_all = owner_all | group_all | others_all, + set_uid_on_exe = 04000, + set_gid_on_exe = 02000, + sticky_bit = 01000, + perms_not_known = 0xFFFF +}; + +// Helper functions so that you can use & and | to manipulate perms bits: +inline perms operator|(perms l, perms r) { + return static_cast(static_cast(l) | + static_cast(r)); +} +inline perms operator&(perms l, perms r) { + return static_cast(static_cast(l) & + static_cast(r)); +} +inline perms &operator|=(perms &l, perms r) { + l = l | r; + return l; +} +inline perms &operator&=(perms &l, perms r) { + l = l & r; + return l; +} +inline perms operator~(perms x) { + return static_cast(~static_cast(x)); +} + +class UniqueID { + uint64_t Device; + uint64_t File; + +public: + UniqueID() = default; + UniqueID(uint64_t Device, uint64_t File) : Device(Device), File(File) {} + bool operator==(const UniqueID &Other) const { + return Device == Other.Device && File == Other.File; + } + bool operator!=(const UniqueID &Other) const { return !(*this == Other); } + bool operator<(const UniqueID &Other) const { + return std::tie(Device, File) < std::tie(Other.Device, Other.File); + } + uint64_t getDevice() const { return Device; } + uint64_t getFile() const { return File; } +}; + +/// file_status - Represents the result of a call to stat and friends. It has +/// a platform-specific member to store the result. +class file_status +{ + #if defined(LLVM_ON_UNIX) + dev_t fs_st_dev; + ino_t fs_st_ino; + time_t fs_st_mtime; + uid_t fs_st_uid; + gid_t fs_st_gid; + off_t fs_st_size; + #elif defined (LLVM_ON_WIN32) + uint32_t LastWriteTimeHigh; + uint32_t LastWriteTimeLow; + uint32_t VolumeSerialNumber; + uint32_t FileSizeHigh; + uint32_t FileSizeLow; + uint32_t FileIndexHigh; + uint32_t FileIndexLow; + #endif + friend bool equivalent(file_status A, file_status B); + file_type Type; + perms Perms; + +public: + #if defined(LLVM_ON_UNIX) + file_status() : fs_st_dev(0), fs_st_ino(0), fs_st_mtime(0), + fs_st_uid(0), fs_st_gid(0), fs_st_size(0), + Type(file_type::status_error), Perms(perms_not_known) {} + + file_status(file_type Type) : fs_st_dev(0), fs_st_ino(0), fs_st_mtime(0), + fs_st_uid(0), fs_st_gid(0), fs_st_size(0), Type(Type), + Perms(perms_not_known) {} + + file_status(file_type Type, perms Perms, dev_t Dev, ino_t Ino, time_t MTime, + uid_t UID, gid_t GID, off_t Size) + : fs_st_dev(Dev), fs_st_ino(Ino), fs_st_mtime(MTime), fs_st_uid(UID), + fs_st_gid(GID), fs_st_size(Size), Type(Type), Perms(Perms) {} + #elif defined(LLVM_ON_WIN32) + file_status() : LastWriteTimeHigh(0), LastWriteTimeLow(0), + VolumeSerialNumber(0), FileSizeHigh(0), FileSizeLow(0), + FileIndexHigh(0), FileIndexLow(0), Type(file_type::status_error), + Perms(perms_not_known) {} + + file_status(file_type Type) : LastWriteTimeHigh(0), LastWriteTimeLow(0), + VolumeSerialNumber(0), FileSizeHigh(0), FileSizeLow(0), + FileIndexHigh(0), FileIndexLow(0), Type(Type), + Perms(perms_not_known) {} + + file_status(file_type Type, uint32_t LastWriteTimeHigh, + uint32_t LastWriteTimeLow, uint32_t VolumeSerialNumber, + uint32_t FileSizeHigh, uint32_t FileSizeLow, + uint32_t FileIndexHigh, uint32_t FileIndexLow) + : LastWriteTimeHigh(LastWriteTimeHigh), + LastWriteTimeLow(LastWriteTimeLow), + VolumeSerialNumber(VolumeSerialNumber), FileSizeHigh(FileSizeHigh), + FileSizeLow(FileSizeLow), FileIndexHigh(FileIndexHigh), + FileIndexLow(FileIndexLow), Type(Type), Perms(perms_not_known) {} + #endif + + // getters + file_type type() const { return Type; } + perms permissions() const { return Perms; } + UniqueID getUniqueID() const; + + #if defined(LLVM_ON_UNIX) + uint32_t getUser() const { return fs_st_uid; } + uint32_t getGroup() const { return fs_st_gid; } + uint64_t getSize() const { return fs_st_size; } + #elif defined (LLVM_ON_WIN32) + uint32_t getUser() const { + return 9999; // Not applicable to Windows, so... + } + uint32_t getGroup() const { + return 9999; // Not applicable to Windows, so... + } + uint64_t getSize() const { + return (uint64_t(FileSizeHigh) << 32) + FileSizeLow; + } + #endif + + // setters + void type(file_type v) { Type = v; } + void permissions(perms p) { Perms = p; } +}; + +/// file_magic - An "enum class" enumeration of file types based on magic (the first +/// N bytes of the file). +struct file_magic { + enum Impl { + unknown = 0, ///< Unrecognized file + bitcode, ///< Bitcode file + archive, ///< ar style archive file + elf, ///< ELF Unknown type + elf_relocatable, ///< ELF Relocatable object file + elf_executable, ///< ELF Executable image + elf_shared_object, ///< ELF dynamically linked shared lib + elf_core, ///< ELF core image + macho_object, ///< Mach-O Object file + macho_executable, ///< Mach-O Executable + macho_fixed_virtual_memory_shared_lib, ///< Mach-O Shared Lib, FVM + macho_core, ///< Mach-O Core File + macho_preload_executable, ///< Mach-O Preloaded Executable + macho_dynamically_linked_shared_lib, ///< Mach-O dynlinked shared lib + macho_dynamic_linker, ///< The Mach-O dynamic linker + macho_bundle, ///< Mach-O Bundle file + macho_dynamically_linked_shared_lib_stub, ///< Mach-O Shared lib stub + macho_dsym_companion, ///< Mach-O dSYM companion file + macho_kext_bundle, ///< Mach-O kext bundle file + macho_universal_binary, ///< Mach-O universal binary + coff_object, ///< COFF object file + coff_import_library, ///< COFF import library + pecoff_executable, ///< PECOFF executable file + windows_resource ///< Windows compiled resource file (.rc) + }; + + bool is_object() const { + return V == unknown ? false : true; + } + + file_magic() : V(unknown) {} + file_magic(Impl V) : V(V) {} + operator Impl() const { return V; } + +private: + Impl V; +}; + +/// @} +/// @name Physical Operators +/// @{ + +/// @brief Make \a path an absolute path. +/// +/// Makes \a path absolute using the \a current_directory if it is not already. +/// An empty \a path will result in the \a current_directory. +/// +/// /absolute/path => /absolute/path +/// relative/../path => /relative/../path +/// +/// @param path A path that is modified to be an absolute path. +/// @returns errc::success if \a path has been made absolute, otherwise a +/// platform-specific error_code. +std::error_code make_absolute(const Twine ¤t_directory, + SmallVectorImpl &path); + +/// @brief Make \a path an absolute path. +/// +/// Makes \a path absolute using the current directory if it is not already. An +/// empty \a path will result in the current directory. +/// +/// /absolute/path => /absolute/path +/// relative/../path => /relative/../path +/// +/// @param path A path that is modified to be an absolute path. +/// @returns errc::success if \a path has been made absolute, otherwise a +/// platform-specific error_code. +std::error_code make_absolute(SmallVectorImpl &path); + +/// @brief Create all the non-existent directories in path. +/// +/// @param path Directories to create. +/// @returns errc::success if is_directory(path), otherwise a platform +/// specific error_code. If IgnoreExisting is false, also returns +/// error if the directory already existed. +std::error_code create_directories(const Twine &path, + bool IgnoreExisting = true, + perms Perms = owner_all | group_all); + +/// @brief Create the directory in path. +/// +/// @param path Directory to create. +/// @returns errc::success if is_directory(path), otherwise a platform +/// specific error_code. If IgnoreExisting is false, also returns +/// error if the directory already existed. +std::error_code create_directory(const Twine &path, bool IgnoreExisting = true, + perms Perms = owner_all | group_all); + +/// @brief Create a link from \a from to \a to. +/// +/// The link may be a soft or a hard link, depending on the platform. The caller +/// may not assume which one. Currently on windows it creates a hard link since +/// soft links require extra privileges. On unix, it creates a soft link since +/// hard links don't work on SMB file systems. +/// +/// @param to The path to hard link to. +/// @param from The path to hard link from. This is created. +/// @returns errc::success if the link was created, otherwise a platform +/// specific error_code. +std::error_code create_link(const Twine &to, const Twine &from); + +/// @brief Get the current path. +/// +/// @param result Holds the current path on return. +/// @returns errc::success if the current path has been stored in result, +/// otherwise a platform-specific error_code. +std::error_code current_path(SmallVectorImpl &result); + +/// @brief Remove path. Equivalent to POSIX remove(). +/// +/// @param path Input path. +/// @returns errc::success if path has been removed or didn't exist, otherwise a +/// platform-specific error code. If IgnoreNonExisting is false, also +/// returns error if the file didn't exist. +std::error_code remove(const Twine &path, bool IgnoreNonExisting = true); + +/// @brief Rename \a from to \a to. Files are renamed as if by POSIX rename(). +/// +/// @param from The path to rename from. +/// @param to The path to rename to. This is created. +std::error_code rename(const Twine &from, const Twine &to); + +/// @brief Copy the contents of \a From to \a To. +/// +/// @param From The path to copy from. +/// @param To The path to copy to. This is created. +std::error_code copy_file(const Twine &From, const Twine &To); + +/// @brief Resize path to size. File is resized as if by POSIX truncate(). +/// +/// @param FD Input file descriptor. +/// @param Size Size to resize to. +/// @returns errc::success if \a path has been resized to \a size, otherwise a +/// platform-specific error_code. +std::error_code resize_file(int FD, uint64_t Size); + +/// @} +/// @name Physical Observers +/// @{ + +/// @brief Does file exist? +/// +/// @param status A file_status previously returned from stat. +/// @returns True if the file represented by status exists, false if it does +/// not. +bool exists(file_status status); + +enum class AccessMode { Exist, Write, Execute }; + +/// @brief Can the file be accessed? +/// +/// @param Path Input path. +/// @returns errc::success if the path can be accessed, otherwise a +/// platform-specific error_code. +std::error_code access(const Twine &Path, AccessMode Mode); + +/// @brief Does file exist? +/// +/// @param Path Input path. +/// @returns True if it exists, false otherwise. +inline bool exists(const Twine &Path) { + return !access(Path, AccessMode::Exist); +} + +/// @brief Can we execute this file? +/// +/// @param Path Input path. +/// @returns True if we can execute it, false otherwise. +bool can_execute(const Twine &Path); + +/// @brief Can we write this file? +/// +/// @param Path Input path. +/// @returns True if we can write to it, false otherwise. +inline bool can_write(const Twine &Path) { + return !access(Path, AccessMode::Write); +} + +/// @brief Do file_status's represent the same thing? +/// +/// @param A Input file_status. +/// @param B Input file_status. +/// +/// assert(status_known(A) || status_known(B)); +/// +/// @returns True if A and B both represent the same file system entity, false +/// otherwise. +bool equivalent(file_status A, file_status B); + +/// @brief Do paths represent the same thing? +/// +/// assert(status_known(A) || status_known(B)); +/// +/// @param A Input path A. +/// @param B Input path B. +/// @param result Set to true if stat(A) and stat(B) have the same device and +/// inode (or equivalent). +/// @returns errc::success if result has been successfully set, otherwise a +/// platform-specific error_code. +std::error_code equivalent(const Twine &A, const Twine &B, bool &result); + +/// @brief Simpler version of equivalent for clients that don't need to +/// differentiate between an error and false. +inline bool equivalent(const Twine &A, const Twine &B) { + bool result; + return !equivalent(A, B, result) && result; +} + +/// @brief Does status represent a directory? +/// +/// @param status A file_status previously returned from status. +/// @returns status.type() == file_type::directory_file. +bool is_directory(file_status status); + +/// @brief Is path a directory? +/// +/// @param path Input path. +/// @param result Set to true if \a path is a directory, false if it is not. +/// Undefined otherwise. +/// @returns errc::success if result has been successfully set, otherwise a +/// platform-specific error_code. +std::error_code is_directory(const Twine &path, bool &result); + +/// @brief Simpler version of is_directory for clients that don't need to +/// differentiate between an error and false. +inline bool is_directory(const Twine &Path) { + bool Result; + return !is_directory(Path, Result) && Result; +} + +/// @brief Does status represent a regular file? +/// +/// @param status A file_status previously returned from status. +/// @returns status_known(status) && status.type() == file_type::regular_file. +bool is_regular_file(file_status status); + +/// @brief Is path a regular file? +/// +/// @param path Input path. +/// @param result Set to true if \a path is a regular file, false if it is not. +/// Undefined otherwise. +/// @returns errc::success if result has been successfully set, otherwise a +/// platform-specific error_code. +std::error_code is_regular_file(const Twine &path, bool &result); + +/// @brief Simpler version of is_regular_file for clients that don't need to +/// differentiate between an error and false. +inline bool is_regular_file(const Twine &Path) { + bool Result; + if (is_regular_file(Path, Result)) + return false; + return Result; +} + +/// @brief Does this status represent something that exists but is not a +/// directory, regular file, or symlink? +/// +/// @param status A file_status previously returned from status. +/// @returns exists(s) && !is_regular_file(s) && !is_directory(s) +bool is_other(file_status status); + +/// @brief Is path something that exists but is not a directory, +/// regular file, or symlink? +/// +/// @param path Input path. +/// @param result Set to true if \a path exists, but is not a directory, regular +/// file, or a symlink, false if it does not. Undefined otherwise. +/// @returns errc::success if result has been successfully set, otherwise a +/// platform-specific error_code. +std::error_code is_other(const Twine &path, bool &result); + +/// @brief Get file status as if by POSIX stat(). +/// +/// @param path Input path. +/// @param result Set to the file status. +/// @returns errc::success if result has been successfully set, otherwise a +/// platform-specific error_code. +std::error_code status(const Twine &path, file_status &result); + +/// @brief A version for when a file descriptor is already available. +std::error_code status(int FD, file_status &Result); + +/// @brief Get file size. +/// +/// @param Path Input path. +/// @param Result Set to the size of the file in \a Path. +/// @returns errc::success if result has been successfully set, otherwise a +/// platform-specific error_code. +inline std::error_code file_size(const Twine &Path, uint64_t &Result) { + file_status Status; + std::error_code EC = status(Path, Status); + if (EC) + return EC; + Result = Status.getSize(); + return std::error_code(); +} + +/// @brief Is status available? +/// +/// @param s Input file status. +/// @returns True if status() != status_error. +bool status_known(file_status s); + +/// @brief Is status available? +/// +/// @param path Input path. +/// @param result Set to true if status() != status_error. +/// @returns errc::success if result has been successfully set, otherwise a +/// platform-specific error_code. +std::error_code status_known(const Twine &path, bool &result); + +/// @brief Create a uniquely named file. +/// +/// Generates a unique path suitable for a temporary file and then opens it as a +/// file. The name is based on \a model with '%' replaced by a random char in +/// [0-9a-f]. If \a model is not an absolute path, the temporary file will be +/// created in the current directory. +/// +/// Example: clang-%%-%%-%%-%%-%%.s => clang-a0-b1-c2-d3-e4.s +/// +/// This is an atomic operation. Either the file is created and opened, or the +/// file system is left untouched. +/// +/// The intended use is for files that are to be kept, possibly after +/// renaming them. For example, when running 'clang -c foo.o', the file can +/// be first created as foo-abc123.o and then renamed. +/// +/// @param Model Name to base unique path off of. +/// @param ResultFD Set to the opened file's file descriptor. +/// @param ResultPath Set to the opened file's absolute path. +/// @returns errc::success if Result{FD,Path} have been successfully set, +/// otherwise a platform-specific error_code. +std::error_code createUniqueFile(const Twine &Model, int &ResultFD, + SmallVectorImpl &ResultPath, + unsigned Mode = all_read | all_write); + +/// @brief Simpler version for clients that don't want an open file. +std::error_code createUniqueFile(const Twine &Model, + SmallVectorImpl &ResultPath); + +/// @brief Create a file in the system temporary directory. +/// +/// The filename is of the form prefix-random_chars.suffix. Since the directory +/// is not know to the caller, Prefix and Suffix cannot have path separators. +/// The files are created with mode 0600. +/// +/// This should be used for things like a temporary .s that is removed after +/// running the assembler. +std::error_code createTemporaryFile(const Twine &Prefix, StringRef Suffix, + int &ResultFD, + SmallVectorImpl &ResultPath); + +/// @brief Simpler version for clients that don't want an open file. +std::error_code createTemporaryFile(const Twine &Prefix, StringRef Suffix, + SmallVectorImpl &ResultPath); + +std::error_code createUniqueDirectory(const Twine &Prefix, + SmallVectorImpl &ResultPath); + +enum OpenFlags : unsigned { + F_None = 0, + + /// F_Excl - When opening a file, this flag makes raw_fd_ostream + /// report an error if the file already exists. + F_Excl = 1, + + /// F_Append - When opening a file, if it already exists append to the + /// existing file instead of returning an error. This may not be specified + /// with F_Excl. + F_Append = 2, + + /// The file should be opened in text mode on platforms that make this + /// distinction. + F_Text = 4, + + /// Open the file for read and write. + F_RW = 8 +}; + +inline OpenFlags operator|(OpenFlags A, OpenFlags B) { + return OpenFlags(unsigned(A) | unsigned(B)); +} + +inline OpenFlags &operator|=(OpenFlags &A, OpenFlags B) { + A = A | B; + return A; +} + +std::error_code openFileForWrite(const Twine &Name, int &ResultFD, + OpenFlags Flags, unsigned Mode = 0666); + +std::error_code openFileForRead(const Twine &Name, int &ResultFD); + +/// @brief Identify the type of a binary file based on how magical it is. +file_magic identify_magic(StringRef magic); + +/// @brief Get and identify \a path's type based on its content. +/// +/// @param path Input path. +/// @param result Set to the type of file, or file_magic::unknown. +/// @returns errc::success if result has been successfully set, otherwise a +/// platform-specific error_code. +std::error_code identify_magic(const Twine &path, file_magic &result); + +std::error_code getUniqueID(const Twine Path, UniqueID &Result); + +/// This class represents a memory mapped file. It is based on +/// boost::iostreams::mapped_file. +class mapped_file_region { + mapped_file_region() = delete; + mapped_file_region(mapped_file_region&) = delete; + mapped_file_region &operator =(mapped_file_region&) = delete; + +public: + enum mapmode { + readonly, ///< May only access map via const_data as read only. + readwrite, ///< May access map via data and modify it. Written to path. + priv ///< May modify via data, but changes are lost on destruction. + }; + +private: + /// Platform-specific mapping state. + uint64_t Size; + void *Mapping; + + std::error_code init(int FD, uint64_t Offset, mapmode Mode); + +public: + /// \param fd An open file descriptor to map. mapped_file_region takes + /// ownership if closefd is true. It must have been opended in the correct + /// mode. + mapped_file_region(int fd, mapmode mode, uint64_t length, uint64_t offset, + std::error_code &ec); + + ~mapped_file_region(); + + uint64_t size() const; + char *data() const; + + /// Get a const view of the data. Modifying this memory has undefined + /// behavior. + const char *const_data() const; + + /// \returns The minimum alignment offset must be. + static int alignment(); +}; + +/// Return the path to the main executable, given the value of argv[0] from +/// program startup and the address of main itself. In extremis, this function +/// may fail and return an empty path. +std::string getMainExecutable(const char *argv0, void *MainExecAddr); + +/// @} +/// @name Iterators +/// @{ + +/// directory_entry - A single entry in a directory. Caches the status either +/// from the result of the iteration syscall, or the first time status is +/// called. +class directory_entry { + std::string Path; + mutable file_status Status; + +public: + explicit directory_entry(const Twine &path, file_status st = file_status()) + : Path(path.str()) + , Status(st) {} + + directory_entry() {} + + void assign(const Twine &path, file_status st = file_status()) { + Path = path.str(); + Status = st; + } + + void replace_filename(const Twine &filename, file_status st = file_status()); + + const std::string &path() const { return Path; } + std::error_code status(file_status &result) const; + + bool operator==(const directory_entry& rhs) const { return Path == rhs.Path; } + bool operator!=(const directory_entry& rhs) const { return !(*this == rhs); } + bool operator< (const directory_entry& rhs) const; + bool operator<=(const directory_entry& rhs) const; + bool operator> (const directory_entry& rhs) const; + bool operator>=(const directory_entry& rhs) const; +}; + +namespace detail { + struct DirIterState; + + std::error_code directory_iterator_construct(DirIterState &, StringRef); + std::error_code directory_iterator_increment(DirIterState &); + std::error_code directory_iterator_destruct(DirIterState &); + + /// DirIterState - Keeps state for the directory_iterator. It is reference + /// counted in order to preserve InputIterator semantics on copy. + struct DirIterState : public RefCountedBase { + DirIterState() + : IterationHandle(0) {} + + ~DirIterState() { + directory_iterator_destruct(*this); + } + + intptr_t IterationHandle; + directory_entry CurrentEntry; + }; +} + +/// directory_iterator - Iterates through the entries in path. There is no +/// operator++ because we need an error_code. If it's really needed we can make +/// it call report_fatal_error on error. +class directory_iterator { + IntrusiveRefCntPtr State; + +public: + explicit directory_iterator(const Twine &path, std::error_code &ec) { + State = new detail::DirIterState; + SmallString<128> path_storage; + ec = detail::directory_iterator_construct(*State, + path.toStringRef(path_storage)); + } + + explicit directory_iterator(const directory_entry &de, std::error_code &ec) { + State = new detail::DirIterState; + ec = detail::directory_iterator_construct(*State, de.path()); + } + + /// Construct end iterator. + directory_iterator() : State(nullptr) {} + + // No operator++ because we need error_code. + directory_iterator &increment(std::error_code &ec) { + ec = directory_iterator_increment(*State); + return *this; + } + + const directory_entry &operator*() const { return State->CurrentEntry; } + const directory_entry *operator->() const { return &State->CurrentEntry; } + + bool operator==(const directory_iterator &RHS) const { + if (State == RHS.State) + return true; + if (!RHS.State) + return State->CurrentEntry == directory_entry(); + if (!State) + return RHS.State->CurrentEntry == directory_entry(); + return State->CurrentEntry == RHS.State->CurrentEntry; + } + + bool operator!=(const directory_iterator &RHS) const { + return !(*this == RHS); + } + // Other members as required by + // C++ Std, 24.1.1 Input iterators [input.iterators] +}; + +namespace detail { + /// RecDirIterState - Keeps state for the recursive_directory_iterator. It is + /// reference counted in order to preserve InputIterator semantics on copy. + struct RecDirIterState : public RefCountedBase { + RecDirIterState() + : Level(0) + , HasNoPushRequest(false) {} + + std::stack > Stack; + uint16_t Level; + bool HasNoPushRequest; + }; +} + +/// recursive_directory_iterator - Same as directory_iterator except for it +/// recurses down into child directories. +class recursive_directory_iterator { + IntrusiveRefCntPtr State; + +public: + recursive_directory_iterator() {} + explicit recursive_directory_iterator(const Twine &path, std::error_code &ec) + : State(new detail::RecDirIterState) { + State->Stack.push(directory_iterator(path, ec)); + if (State->Stack.top() == directory_iterator()) + State.reset(); + } + // No operator++ because we need error_code. + recursive_directory_iterator &increment(std::error_code &ec) { + const directory_iterator end_itr; + + if (State->HasNoPushRequest) + State->HasNoPushRequest = false; + else { + file_status st; + if ((ec = State->Stack.top()->status(st))) return *this; + if (is_directory(st)) { + State->Stack.push(directory_iterator(*State->Stack.top(), ec)); + if (ec) return *this; + if (State->Stack.top() != end_itr) { + ++State->Level; + return *this; + } + State->Stack.pop(); + } + } + + while (!State->Stack.empty() + && State->Stack.top().increment(ec) == end_itr) { + State->Stack.pop(); + --State->Level; + } + + // Check if we are done. If so, create an end iterator. + if (State->Stack.empty()) + State.reset(); + + return *this; + } + + const directory_entry &operator*() const { return *State->Stack.top(); } + const directory_entry *operator->() const { return &*State->Stack.top(); } + + // observers + /// Gets the current level. Starting path is at level 0. + int level() const { return State->Level; } + + /// Returns true if no_push has been called for this directory_entry. + bool no_push_request() const { return State->HasNoPushRequest; } + + // modifiers + /// Goes up one level if Level > 0. + void pop() { + assert(State && "Cannot pop an end iterator!"); + assert(State->Level > 0 && "Cannot pop an iterator with level < 1"); + + const directory_iterator end_itr; + std::error_code ec; + do { + if (ec) + report_fatal_error("Error incrementing directory iterator."); + State->Stack.pop(); + --State->Level; + } while (!State->Stack.empty() + && State->Stack.top().increment(ec) == end_itr); + + // Check if we are done. If so, create an end iterator. + if (State->Stack.empty()) + State.reset(); + } + + /// Does not go down into the current directory_entry. + void no_push() { State->HasNoPushRequest = true; } + + bool operator==(const recursive_directory_iterator &RHS) const { + return State == RHS.State; + } + + bool operator!=(const recursive_directory_iterator &RHS) const { + return !(*this == RHS); + } + // Other members as required by + // C++ Std, 24.1.1 Input iterators [input.iterators] +}; + +/// @} + +} // end namespace fs +} // end namespace sys +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/Support/Format.h b/llvm/include/llvm/Support/Format.h new file mode 100644 index 0000000..391a87a --- /dev/null +++ b/llvm/include/llvm/Support/Format.h @@ -0,0 +1,195 @@ +//===- Format.h - Efficient printf-style formatting for streams -*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the format() function, which can be used with other +// LLVM subsystems to provide printf-style formatting. This gives all the power +// and risk of printf. This can be used like this (with raw_ostreams as an +// example): +// +// OS << "mynumber: " << format("%4.5f", 1234.412) << '\n'; +// +// Or if you prefer: +// +// OS << format("mynumber: %4.5f\n", 1234.412); +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_FORMAT_H +#define LLVM_SUPPORT_FORMAT_H + +#include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/DataTypes.h" +#include +#include +#include + +namespace llvm_ks { + +/// This is a helper class used for handling formatted output. It is the +/// abstract base class of a templated derived class. +class format_object_base { +protected: + const char *Fmt; + ~format_object_base() = default; // Disallow polymorphic deletion. + format_object_base(const format_object_base &) = default; + virtual void home(); // Out of line virtual method. + + /// Call snprintf() for this object, on the given buffer and size. + virtual int snprint(char *Buffer, unsigned BufferSize) const = 0; + +public: + format_object_base(const char *fmt) : Fmt(fmt) {} + + /// Format the object into the specified buffer. On success, this returns + /// the length of the formatted string. If the buffer is too small, this + /// returns a length to retry with, which will be larger than BufferSize. + unsigned print(char *Buffer, unsigned BufferSize) const { + assert(BufferSize && "Invalid buffer size!"); + + // Print the string, leaving room for the terminating null. + int N = snprint(Buffer, BufferSize); + + // VC++ and old GlibC return negative on overflow, just double the size. + if (N < 0) + return BufferSize * 2; + + // Other implementations yield number of bytes needed, not including the + // final '\0'. + if (unsigned(N) >= BufferSize) + return N + 1; + + // Otherwise N is the length of output (not including the final '\0'). + return N; + } +}; + +/// These are templated helper classes used by the format function that +/// capture the object to be formated and the format string. When actually +/// printed, this synthesizes the string into a temporary buffer provided and +/// returns whether or not it is big enough. + +template +class format_object final : public format_object_base { + std::tuple Vals; + + template + int snprint_tuple(char *Buffer, unsigned BufferSize, + index_sequence) const { +#ifdef _MSC_VER + return _snprintf(Buffer, BufferSize, Fmt, std::get(Vals)...); +#else + return snprintf(Buffer, BufferSize, Fmt, std::get(Vals)...); +#endif + } + +public: + format_object(const char *fmt, const Ts &... vals) + : format_object_base(fmt), Vals(vals...) {} + + int snprint(char *Buffer, unsigned BufferSize) const override { + return snprint_tuple(Buffer, BufferSize, index_sequence_for()); + } +}; + +/// These are helper functions used to produce formatted output. They use +/// template type deduction to construct the appropriate instance of the +/// format_object class to simplify their construction. +/// +/// This is typically used like: +/// \code +/// OS << format("%0.4f", myfloat) << '\n'; +/// \endcode + +template +inline format_object format(const char *Fmt, const Ts &... Vals) { + return format_object(Fmt, Vals...); +} + +/// This is a helper class used for left_justify() and right_justify(). +class FormattedString { + StringRef Str; + unsigned Width; + bool RightJustify; + friend class raw_ostream; + +public: + FormattedString(StringRef S, unsigned W, bool R) + : Str(S), Width(W), RightJustify(R) { } +}; + +/// left_justify - append spaces after string so total output is +/// \p Width characters. If \p Str is larger that \p Width, full string +/// is written with no padding. +inline FormattedString left_justify(StringRef Str, unsigned Width) { + return FormattedString(Str, Width, false); +} + +/// right_justify - add spaces before string so total output is +/// \p Width characters. If \p Str is larger that \p Width, full string +/// is written with no padding. +inline FormattedString right_justify(StringRef Str, unsigned Width) { + return FormattedString(Str, Width, true); +} + +/// This is a helper class used for format_hex() and format_decimal(). +class FormattedNumber { + uint64_t HexValue; + int64_t DecValue; + unsigned Width; + bool Hex; + bool Upper; + bool HexPrefix; + friend class raw_ostream; + +public: + FormattedNumber(uint64_t HV, int64_t DV, unsigned W, bool H, bool U, + bool Prefix) + : HexValue(HV), DecValue(DV), Width(W), Hex(H), Upper(U), + HexPrefix(Prefix) {} +}; + +/// format_hex - Output \p N as a fixed width hexadecimal. If number will not +/// fit in width, full number is still printed. Examples: +/// OS << format_hex(255, 4) => 0xff +/// OS << format_hex(255, 4, true) => 0xFF +/// OS << format_hex(255, 6) => 0x00ff +/// OS << format_hex(255, 2) => 0xff +inline FormattedNumber format_hex(uint64_t N, unsigned Width, + bool Upper = false) { + assert(Width <= 18 && "hex width must be <= 18"); + return FormattedNumber(N, 0, Width, true, Upper, true); +} + +/// format_hex_no_prefix - Output \p N as a fixed width hexadecimal. Does not +/// prepend '0x' to the outputted string. If number will not fit in width, +/// full number is still printed. Examples: +/// OS << format_hex_no_prefix(255, 4) => ff +/// OS << format_hex_no_prefix(255, 4, true) => FF +/// OS << format_hex_no_prefix(255, 6) => 00ff +/// OS << format_hex_no_prefix(255, 2) => ff +inline FormattedNumber format_hex_no_prefix(uint64_t N, unsigned Width, + bool Upper = false) { + assert(Width <= 18 && "hex width must be <= 18"); + return FormattedNumber(N, 0, Width, true, Upper, false); +} + +/// format_decimal - Output \p N as a right justified, fixed-width decimal. If +/// number will not fit in width, full number is still printed. Examples: +/// OS << format_decimal(0, 5) => " 0" +/// OS << format_decimal(255, 5) => " 255" +/// OS << format_decimal(-1, 3) => " -1" +/// OS << format_decimal(12345, 3) => "12345" +inline FormattedNumber format_decimal(int64_t N, unsigned Width) { + return FormattedNumber(0, N, Width, false, false, false); +} + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/Support/FormattedStream.h b/llvm/include/llvm/Support/FormattedStream.h new file mode 100644 index 0000000..987d487 --- /dev/null +++ b/llvm/include/llvm/Support/FormattedStream.h @@ -0,0 +1,162 @@ +//===-- llvm/Support/FormattedStream.h - Formatted streams ------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains raw_ostream implementations for streams to do +// things like pretty-print comments. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_FORMATTEDSTREAM_H +#define LLVM_SUPPORT_FORMATTEDSTREAM_H + +#include "llvm/Support/raw_ostream.h" +#include + +namespace llvm_ks { + +/// formatted_raw_ostream - A raw_ostream that wraps another one and keeps track +/// of line and column position, allowing padding out to specific column +/// boundaries and querying the number of lines written to the stream. +/// +class formatted_raw_ostream : public raw_ostream { + /// TheStream - The real stream we output to. We set it to be + /// unbuffered, since we're already doing our own buffering. + /// + raw_ostream *TheStream; + + /// Position - The current output column and line of the data that's + /// been flushed and the portion of the buffer that's been + /// scanned. The line and column scheme is zero-based. + /// + std::pair Position; + + /// Scanned - This points to one past the last character in the + /// buffer we've scanned. + /// + const char *Scanned; + + void write_impl(const char *Ptr, size_t Size) override; + + /// current_pos - Return the current position within the stream, + /// not counting the bytes currently in the buffer. + uint64_t current_pos() const override { + // Our current position in the stream is all the contents which have been + // written to the underlying stream (*not* the current position of the + // underlying stream). + return TheStream->tell(); + } + + /// ComputePosition - Examine the given output buffer and figure out the new + /// position after output. + /// + void ComputePosition(const char *Ptr, size_t size); + + void setStream(raw_ostream &Stream) { + releaseStream(); + + TheStream = &Stream; + + // This formatted_raw_ostream inherits from raw_ostream, so it'll do its + // own buffering, and it doesn't need or want TheStream to do another + // layer of buffering underneath. Resize the buffer to what TheStream + // had been using, and tell TheStream not to do its own buffering. + if (size_t BufferSize = TheStream->GetBufferSize()) + SetBufferSize(BufferSize); + else + SetUnbuffered(); + TheStream->SetUnbuffered(); + + Scanned = nullptr; + } + +public: + /// formatted_raw_ostream - Open the specified file for + /// writing. If an error occurs, information about the error is + /// put into ErrorInfo, and the stream should be immediately + /// destroyed; the string will be empty if no error occurred. + /// + /// As a side effect, the given Stream is set to be Unbuffered. + /// This is because formatted_raw_ostream does its own buffering, + /// so it doesn't want another layer of buffering to be happening + /// underneath it. + /// + formatted_raw_ostream(raw_ostream &Stream) + : TheStream(nullptr), Position(0, 0) { + setStream(Stream); + } + explicit formatted_raw_ostream() : TheStream(nullptr), Position(0, 0) { + Scanned = nullptr; + } + + ~formatted_raw_ostream() override { + flush(); + releaseStream(); + } + + /// PadToColumn - Align the output to some column number. If the current + /// column is already equal to or more than NewCol, PadToColumn inserts one + /// space. + /// + /// \param NewCol - The column to move to. + formatted_raw_ostream &PadToColumn(unsigned NewCol); + + /// getColumn - Return the column number + unsigned getColumn() { return Position.first; } + + /// getLine - Return the line number + unsigned getLine() { return Position.second; } + + raw_ostream &resetColor() override { + TheStream->resetColor(); + return *this; + } + + raw_ostream &reverseColor() override { + TheStream->reverseColor(); + return *this; + } + + raw_ostream &changeColor(enum Colors Color, bool Bold, bool BG) override { + TheStream->changeColor(Color, Bold, BG); + return *this; + } + + bool is_displayed() const override { + return TheStream->is_displayed(); + } + +private: + void releaseStream() { + // Transfer the buffer settings from this raw_ostream back to the underlying + // stream. + if (!TheStream) + return; + if (size_t BufferSize = GetBufferSize()) + TheStream->SetBufferSize(BufferSize); + else + TheStream->SetUnbuffered(); + } +}; + +/// fouts() - This returns a reference to a formatted_raw_ostream for +/// standard output. Use it like: fouts() << "foo" << "bar"; +formatted_raw_ostream &fouts(); + +/// ferrs() - This returns a reference to a formatted_raw_ostream for +/// standard error. Use it like: ferrs() << "foo" << "bar"; +formatted_raw_ostream &ferrs(); + +/// fdbgs() - This returns a reference to a formatted_raw_ostream for +/// debug output. Use it like: fdbgs() << "foo" << "bar"; +formatted_raw_ostream &fdbgs(); + +} // end llvm namespace + + +#endif diff --git a/llvm/include/llvm/Support/Host.h b/llvm/include/llvm/Support/Host.h new file mode 100644 index 0000000..7785ec0 --- /dev/null +++ b/llvm/include/llvm/Support/Host.h @@ -0,0 +1,74 @@ +//===- llvm/Support/Host.h - Host machine characteristics --------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// Methods for querying the nature of the host machine. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_HOST_H +#define LLVM_SUPPORT_HOST_H + +#include "llvm/ADT/StringMap.h" + +#if defined(__linux__) || defined(__GNU__) +#include +#else +#if !defined(BYTE_ORDER) && !defined(LLVM_ON_WIN32) +#include +#endif +#endif + +#include + +namespace llvm_ks { +namespace sys { + +#if defined(BYTE_ORDER) && defined(BIG_ENDIAN) && BYTE_ORDER == BIG_ENDIAN + static const bool IsBigEndianHost = true; +#else + static const bool IsBigEndianHost = false; +#endif + + static const bool IsLittleEndianHost = !IsBigEndianHost; + + /// getDefaultTargetTriple() - Return the default target triple the compiler + /// has been configured to produce code for. + /// + /// The target triple is a string in the format of: + /// CPU_TYPE-VENDOR-OPERATING_SYSTEM + /// or + /// CPU_TYPE-VENDOR-KERNEL-OPERATING_SYSTEM + std::string getDefaultTargetTriple(); + + /// getProcessTriple() - Return an appropriate target triple for generating + /// code to be loaded into the current process, e.g. when using the JIT. + std::string getProcessTriple(); + + /// getHostCPUName - Get the LLVM name for the host CPU. The particular format + /// of the name is target dependent, and suitable for passing as -mcpu to the + /// target which matches the host. + /// + /// \return - The host CPU name, or empty if the CPU could not be determined. + StringRef getHostCPUName(); + + /// getHostCPUFeatures - Get the LLVM names for the host CPU features. + /// The particular format of the names are target dependent, and suitable for + /// passing as -mattr to the target which matches the host. + /// + /// \param Features - A string mapping feature names to either + /// true (if enabled) or false (if disabled). This routine makes no guarantees + /// about exactly which features may appear in this map, except that they are + /// all valid LLVM feature names. + /// + /// \return - True on success. + bool getHostCPUFeatures(StringMap &Features); +} +} + +#endif diff --git a/llvm/include/llvm/Support/LEB128.h b/llvm/include/llvm/Support/LEB128.h new file mode 100644 index 0000000..7a79050 --- /dev/null +++ b/llvm/include/llvm/Support/LEB128.h @@ -0,0 +1,121 @@ +//===- llvm/Support/LEB128.h - [SU]LEB128 utility functions -----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares some utility functions for encoding SLEB128 and +// ULEB128 values. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_LEB128_H +#define LLVM_SUPPORT_LEB128_H + +#include "llvm/Support/raw_ostream.h" + +namespace llvm_ks { + +/// Utility function to encode a SLEB128 value to an output stream. +inline void encodeSLEB128(int64_t Value, raw_ostream &OS) { + bool More; + do { + uint8_t Byte = Value & 0x7f; + // NOTE: this assumes that this signed shift is an arithmetic right shift. + Value >>= 7; + More = !((((Value == 0 ) && ((Byte & 0x40) == 0)) || + ((Value == -1) && ((Byte & 0x40) != 0)))); + if (More) + Byte |= 0x80; // Mark this byte to show that more bytes will follow. + OS << char(Byte); + } while (More); +} + +/// Utility function to encode a ULEB128 value to an output stream. +inline void encodeULEB128(uint64_t Value, raw_ostream &OS, + unsigned Padding = 0) { + do { + uint8_t Byte = Value & 0x7f; + Value >>= 7; + if (Value != 0 || Padding != 0) + Byte |= 0x80; // Mark this byte to show that more bytes will follow. + OS << char(Byte); + } while (Value != 0); + + // Pad with 0x80 and emit a null byte at the end. + if (Padding != 0) { + for (; Padding != 1; --Padding) + OS << '\x80'; + OS << '\x00'; + } +} + +/// Utility function to encode a ULEB128 value to a buffer. Returns +/// the length in bytes of the encoded value. +inline unsigned encodeULEB128(uint64_t Value, uint8_t *p, + unsigned Padding = 0) { + uint8_t *orig_p = p; + do { + uint8_t Byte = Value & 0x7f; + Value >>= 7; + if (Value != 0 || Padding != 0) + Byte |= 0x80; // Mark this byte to show that more bytes will follow. + *p++ = Byte; + } while (Value != 0); + + // Pad with 0x80 and emit a null byte at the end. + if (Padding != 0) { + for (; Padding != 1; --Padding) + *p++ = '\x80'; + *p++ = '\x00'; + } + return (unsigned)(p - orig_p); +} + + +/// Utility function to decode a ULEB128 value. +inline uint64_t decodeULEB128(const uint8_t *p, unsigned *n = nullptr) { + const uint8_t *orig_p = p; + uint64_t Value = 0; + unsigned Shift = 0; + do { + Value += uint64_t(*p & 0x7f) << Shift; + Shift += 7; + } while (*p++ >= 128); + if (n) + *n = (unsigned)(p - orig_p); + return Value; +} + +/// Utility function to decode a SLEB128 value. +inline int64_t decodeSLEB128(const uint8_t *p, unsigned *n = nullptr) { + const uint8_t *orig_p = p; + int64_t Value = 0; + unsigned Shift = 0; + uint8_t Byte; + do { + Byte = *p++; + Value |= ((Byte & 0x7f) << Shift); + Shift += 7; + } while (Byte >= 128); + // Sign extend negative numbers. + if (Byte & 0x40) + Value |= (-1ULL) << Shift; + if (n) + *n = (unsigned)(p - orig_p); + return Value; +} + + +/// Utility function to get the size of the ULEB128-encoded value. +extern unsigned getULEB128Size(uint64_t Value); + +/// Utility function to get the size of the SLEB128-encoded value. +extern unsigned getSLEB128Size(int64_t Value); + +} // namespace llvm_ks + +#endif // LLVM_SYSTEM_LEB128_H diff --git a/llvm/include/llvm/Support/LICENSE.TXT b/llvm/include/llvm/Support/LICENSE.TXT new file mode 100644 index 0000000..3479b3f --- /dev/null +++ b/llvm/include/llvm/Support/LICENSE.TXT @@ -0,0 +1,6 @@ +LLVM System Interface Library +------------------------------------------------------------------------------- +The LLVM System Interface Library is licensed under the Illinois Open Source +License and has the following additional copyright: + +Copyright (C) 2004 eXtensible Systems, Inc. diff --git a/llvm/include/llvm/Support/MachO.h b/llvm/include/llvm/Support/MachO.h new file mode 100644 index 0000000..074da37 --- /dev/null +++ b/llvm/include/llvm/Support/MachO.h @@ -0,0 +1,1675 @@ +//===-- llvm/Support/MachO.h - The MachO file format ------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines manifest constants for the MachO object file format. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_MACHO_H +#define LLVM_SUPPORT_MACHO_H + +#include "llvm/Support/Compiler.h" +#include "llvm/Support/DataTypes.h" +#include "llvm/Support/Host.h" + +namespace llvm_ks { + namespace MachO { + // Enums from + enum : uint32_t { + // Constants for the "magic" field in llvm_ks::MachO::mach_header and + // llvm_ks::MachO::mach_header_64 + MH_MAGIC = 0xFEEDFACEu, + MH_CIGAM = 0xCEFAEDFEu, + MH_MAGIC_64 = 0xFEEDFACFu, + MH_CIGAM_64 = 0xCFFAEDFEu, + FAT_MAGIC = 0xCAFEBABEu, + FAT_CIGAM = 0xBEBAFECAu + }; + + enum HeaderFileType { + // Constants for the "filetype" field in llvm_ks::MachO::mach_header and + // llvm_ks::MachO::mach_header_64 + MH_OBJECT = 0x1u, + MH_EXECUTE = 0x2u, + MH_FVMLIB = 0x3u, + MH_CORE = 0x4u, + MH_PRELOAD = 0x5u, + MH_DYLIB = 0x6u, + MH_DYLINKER = 0x7u, + MH_BUNDLE = 0x8u, + MH_DYLIB_STUB = 0x9u, + MH_DSYM = 0xAu, + MH_KEXT_BUNDLE = 0xBu + }; + + enum { + // Constant bits for the "flags" field in llvm_ks::MachO::mach_header and + // llvm_ks::MachO::mach_header_64 + MH_NOUNDEFS = 0x00000001u, + MH_INCRLINK = 0x00000002u, + MH_DYLDLINK = 0x00000004u, + MH_BINDATLOAD = 0x00000008u, + MH_PREBOUND = 0x00000010u, + MH_SPLIT_SEGS = 0x00000020u, + MH_LAZY_INIT = 0x00000040u, + MH_TWOLEVEL = 0x00000080u, + MH_FORCE_FLAT = 0x00000100u, + MH_NOMULTIDEFS = 0x00000200u, + MH_NOFIXPREBINDING = 0x00000400u, + MH_PREBINDABLE = 0x00000800u, + MH_ALLMODSBOUND = 0x00001000u, + MH_SUBSECTIONS_VIA_SYMBOLS = 0x00002000u, + MH_CANONICAL = 0x00004000u, + MH_WEAK_DEFINES = 0x00008000u, + MH_BINDS_TO_WEAK = 0x00010000u, + MH_ALLOW_STACK_EXECUTION = 0x00020000u, + MH_ROOT_SAFE = 0x00040000u, + MH_SETUID_SAFE = 0x00080000u, + MH_NO_REEXPORTED_DYLIBS = 0x00100000u, + MH_PIE = 0x00200000u, + MH_DEAD_STRIPPABLE_DYLIB = 0x00400000u, + MH_HAS_TLV_DESCRIPTORS = 0x00800000u, + MH_NO_HEAP_EXECUTION = 0x01000000u, + MH_APP_EXTENSION_SAFE = 0x02000000u + }; + + enum : uint32_t { + // Flags for the "cmd" field in llvm_ks::MachO::load_command + LC_REQ_DYLD = 0x80000000u + }; + + enum LoadCommandType : uint32_t { + // Constants for the "cmd" field in llvm_ks::MachO::load_command + LC_SEGMENT = 0x00000001u, + LC_SYMTAB = 0x00000002u, + LC_SYMSEG = 0x00000003u, + LC_THREAD = 0x00000004u, + LC_UNIXTHREAD = 0x00000005u, + LC_LOADFVMLIB = 0x00000006u, + LC_IDFVMLIB = 0x00000007u, + LC_IDENT = 0x00000008u, + LC_FVMFILE = 0x00000009u, + LC_PREPAGE = 0x0000000Au, + LC_DYSYMTAB = 0x0000000Bu, + LC_LOAD_DYLIB = 0x0000000Cu, + LC_ID_DYLIB = 0x0000000Du, + LC_LOAD_DYLINKER = 0x0000000Eu, + LC_ID_DYLINKER = 0x0000000Fu, + LC_PREBOUND_DYLIB = 0x00000010u, + LC_ROUTINES = 0x00000011u, + LC_SUB_FRAMEWORK = 0x00000012u, + LC_SUB_UMBRELLA = 0x00000013u, + LC_SUB_CLIENT = 0x00000014u, + LC_SUB_LIBRARY = 0x00000015u, + LC_TWOLEVEL_HINTS = 0x00000016u, + LC_PREBIND_CKSUM = 0x00000017u, + LC_LOAD_WEAK_DYLIB = 0x80000018u, + LC_SEGMENT_64 = 0x00000019u, + LC_ROUTINES_64 = 0x0000001Au, + LC_UUID = 0x0000001Bu, + LC_RPATH = 0x8000001Cu, + LC_CODE_SIGNATURE = 0x0000001Du, + LC_SEGMENT_SPLIT_INFO = 0x0000001Eu, + LC_REEXPORT_DYLIB = 0x8000001Fu, + LC_LAZY_LOAD_DYLIB = 0x00000020u, + LC_ENCRYPTION_INFO = 0x00000021u, + LC_DYLD_INFO = 0x00000022u, + LC_DYLD_INFO_ONLY = 0x80000022u, + LC_LOAD_UPWARD_DYLIB = 0x80000023u, + LC_VERSION_MIN_MACOSX = 0x00000024u, + LC_VERSION_MIN_IPHONEOS = 0x00000025u, + LC_FUNCTION_STARTS = 0x00000026u, + LC_DYLD_ENVIRONMENT = 0x00000027u, + LC_MAIN = 0x80000028u, + LC_DATA_IN_CODE = 0x00000029u, + LC_SOURCE_VERSION = 0x0000002Au, + LC_DYLIB_CODE_SIGN_DRS = 0x0000002Bu, + LC_ENCRYPTION_INFO_64 = 0x0000002Cu, + LC_LINKER_OPTION = 0x0000002Du, + LC_LINKER_OPTIMIZATION_HINT = 0x0000002Eu, + LC_VERSION_MIN_TVOS = 0x0000002Fu, + LC_VERSION_MIN_WATCHOS = 0x00000030u, + }; + + enum : uint32_t { + // Constant bits for the "flags" field in llvm_ks::MachO::segment_command + SG_HIGHVM = 0x1u, + SG_FVMLIB = 0x2u, + SG_NORELOC = 0x4u, + SG_PROTECTED_VERSION_1 = 0x8u, + + // Constant masks for the "flags" field in llvm_ks::MachO::section and + // llvm_ks::MachO::section_64 + SECTION_TYPE = 0x000000ffu, // SECTION_TYPE + SECTION_ATTRIBUTES = 0xffffff00u, // SECTION_ATTRIBUTES + SECTION_ATTRIBUTES_USR = 0xff000000u, // SECTION_ATTRIBUTES_USR + SECTION_ATTRIBUTES_SYS = 0x00ffff00u // SECTION_ATTRIBUTES_SYS + }; + + /// These are the section type and attributes fields. A MachO section can + /// have only one Type, but can have any of the attributes specified. + enum SectionType : uint32_t { + // Constant masks for the "flags[7:0]" field in llvm_ks::MachO::section and + // llvm_ks::MachO::section_64 (mask "flags" with SECTION_TYPE) + + /// S_REGULAR - Regular section. + S_REGULAR = 0x00u, + /// S_ZEROFILL - Zero fill on demand section. + S_ZEROFILL = 0x01u, + /// S_CSTRING_LITERALS - Section with literal C strings. + S_CSTRING_LITERALS = 0x02u, + /// S_4BYTE_LITERALS - Section with 4 byte literals. + S_4BYTE_LITERALS = 0x03u, + /// S_8BYTE_LITERALS - Section with 8 byte literals. + S_8BYTE_LITERALS = 0x04u, + /// S_LITERAL_POINTERS - Section with pointers to literals. + S_LITERAL_POINTERS = 0x05u, + /// S_NON_LAZY_SYMBOL_POINTERS - Section with non-lazy symbol pointers. + S_NON_LAZY_SYMBOL_POINTERS = 0x06u, + /// S_LAZY_SYMBOL_POINTERS - Section with lazy symbol pointers. + S_LAZY_SYMBOL_POINTERS = 0x07u, + /// S_SYMBOL_STUBS - Section with symbol stubs, byte size of stub in + /// the Reserved2 field. + S_SYMBOL_STUBS = 0x08u, + /// S_MOD_INIT_FUNC_POINTERS - Section with only function pointers for + /// initialization. + S_MOD_INIT_FUNC_POINTERS = 0x09u, + /// S_MOD_TERM_FUNC_POINTERS - Section with only function pointers for + /// termination. + S_MOD_TERM_FUNC_POINTERS = 0x0au, + /// S_COALESCED - Section contains symbols that are to be coalesced. + S_COALESCED = 0x0bu, + /// S_GB_ZEROFILL - Zero fill on demand section (that can be larger than 4 + /// gigabytes). + S_GB_ZEROFILL = 0x0cu, + /// S_INTERPOSING - Section with only pairs of function pointers for + /// interposing. + S_INTERPOSING = 0x0du, + /// S_16BYTE_LITERALS - Section with only 16 byte literals. + S_16BYTE_LITERALS = 0x0eu, + /// S_DTRACE_DOF - Section contains DTrace Object Format. + S_DTRACE_DOF = 0x0fu, + /// S_LAZY_DYLIB_SYMBOL_POINTERS - Section with lazy symbol pointers to + /// lazy loaded dylibs. + S_LAZY_DYLIB_SYMBOL_POINTERS = 0x10u, + /// S_THREAD_LOCAL_REGULAR - Thread local data section. + S_THREAD_LOCAL_REGULAR = 0x11u, + /// S_THREAD_LOCAL_ZEROFILL - Thread local zerofill section. + S_THREAD_LOCAL_ZEROFILL = 0x12u, + /// S_THREAD_LOCAL_VARIABLES - Section with thread local variable + /// structure data. + S_THREAD_LOCAL_VARIABLES = 0x13u, + /// S_THREAD_LOCAL_VARIABLE_POINTERS - Section with pointers to thread + /// local structures. + S_THREAD_LOCAL_VARIABLE_POINTERS = 0x14u, + /// S_THREAD_LOCAL_INIT_FUNCTION_POINTERS - Section with thread local + /// variable initialization pointers to functions. + S_THREAD_LOCAL_INIT_FUNCTION_POINTERS = 0x15u, + + LAST_KNOWN_SECTION_TYPE = S_THREAD_LOCAL_INIT_FUNCTION_POINTERS + }; + + enum : uint32_t { + // Constant masks for the "flags[31:24]" field in llvm_ks::MachO::section and + // llvm_ks::MachO::section_64 (mask "flags" with SECTION_ATTRIBUTES_USR) + + /// S_ATTR_PURE_INSTRUCTIONS - Section contains only true machine + /// instructions. + S_ATTR_PURE_INSTRUCTIONS = 0x80000000u, + /// S_ATTR_NO_TOC - Section contains coalesced symbols that are not to be + /// in a ranlib table of contents. + S_ATTR_NO_TOC = 0x40000000u, + /// S_ATTR_STRIP_STATIC_SYMS - Ok to strip static symbols in this section + /// in files with the MY_DYLDLINK flag. + S_ATTR_STRIP_STATIC_SYMS = 0x20000000u, + /// S_ATTR_NO_DEAD_STRIP - No dead stripping. + S_ATTR_NO_DEAD_STRIP = 0x10000000u, + /// S_ATTR_LIVE_SUPPORT - Blocks are live if they reference live blocks. + S_ATTR_LIVE_SUPPORT = 0x08000000u, + /// S_ATTR_SELF_MODIFYING_CODE - Used with i386 code stubs written on by + /// dyld. + S_ATTR_SELF_MODIFYING_CODE = 0x04000000u, + /// S_ATTR_DEBUG - A debug section. + S_ATTR_DEBUG = 0x02000000u, + + // Constant masks for the "flags[23:8]" field in llvm_ks::MachO::section and + // llvm_ks::MachO::section_64 (mask "flags" with SECTION_ATTRIBUTES_SYS) + + /// S_ATTR_SOME_INSTRUCTIONS - Section contains some machine instructions. + S_ATTR_SOME_INSTRUCTIONS = 0x00000400u, + /// S_ATTR_EXT_RELOC - Section has external relocation entries. + S_ATTR_EXT_RELOC = 0x00000200u, + /// S_ATTR_LOC_RELOC - Section has local relocation entries. + S_ATTR_LOC_RELOC = 0x00000100u, + + // Constant masks for the value of an indirect symbol in an indirect + // symbol table + INDIRECT_SYMBOL_LOCAL = 0x80000000u, + INDIRECT_SYMBOL_ABS = 0x40000000u + }; + + enum DataRegionType { + // Constants for the "kind" field in a data_in_code_entry structure + DICE_KIND_DATA = 1u, + DICE_KIND_JUMP_TABLE8 = 2u, + DICE_KIND_JUMP_TABLE16 = 3u, + DICE_KIND_JUMP_TABLE32 = 4u, + DICE_KIND_ABS_JUMP_TABLE32 = 5u + }; + + enum RebaseType { + REBASE_TYPE_POINTER = 1u, + REBASE_TYPE_TEXT_ABSOLUTE32 = 2u, + REBASE_TYPE_TEXT_PCREL32 = 3u + }; + + enum { + REBASE_OPCODE_MASK = 0xF0u, + REBASE_IMMEDIATE_MASK = 0x0Fu + }; + + enum RebaseOpcode { + REBASE_OPCODE_DONE = 0x00u, + REBASE_OPCODE_SET_TYPE_IMM = 0x10u, + REBASE_OPCODE_SET_SEGMENT_AND_OFFSET_ULEB = 0x20u, + REBASE_OPCODE_ADD_ADDR_ULEB = 0x30u, + REBASE_OPCODE_ADD_ADDR_IMM_SCALED = 0x40u, + REBASE_OPCODE_DO_REBASE_IMM_TIMES = 0x50u, + REBASE_OPCODE_DO_REBASE_ULEB_TIMES = 0x60u, + REBASE_OPCODE_DO_REBASE_ADD_ADDR_ULEB = 0x70u, + REBASE_OPCODE_DO_REBASE_ULEB_TIMES_SKIPPING_ULEB = 0x80u + }; + + enum BindType { + BIND_TYPE_POINTER = 1u, + BIND_TYPE_TEXT_ABSOLUTE32 = 2u, + BIND_TYPE_TEXT_PCREL32 = 3u + }; + + enum BindSpecialDylib { + BIND_SPECIAL_DYLIB_SELF = 0, + BIND_SPECIAL_DYLIB_MAIN_EXECUTABLE = -1, + BIND_SPECIAL_DYLIB_FLAT_LOOKUP = -2 + }; + + enum { + BIND_SYMBOL_FLAGS_WEAK_IMPORT = 0x1u, + BIND_SYMBOL_FLAGS_NON_WEAK_DEFINITION = 0x8u, + + BIND_OPCODE_MASK = 0xF0u, + BIND_IMMEDIATE_MASK = 0x0Fu + }; + + enum BindOpcode { + BIND_OPCODE_DONE = 0x00u, + BIND_OPCODE_SET_DYLIB_ORDINAL_IMM = 0x10u, + BIND_OPCODE_SET_DYLIB_ORDINAL_ULEB = 0x20u, + BIND_OPCODE_SET_DYLIB_SPECIAL_IMM = 0x30u, + BIND_OPCODE_SET_SYMBOL_TRAILING_FLAGS_IMM = 0x40u, + BIND_OPCODE_SET_TYPE_IMM = 0x50u, + BIND_OPCODE_SET_ADDEND_SLEB = 0x60u, + BIND_OPCODE_SET_SEGMENT_AND_OFFSET_ULEB = 0x70u, + BIND_OPCODE_ADD_ADDR_ULEB = 0x80u, + BIND_OPCODE_DO_BIND = 0x90u, + BIND_OPCODE_DO_BIND_ADD_ADDR_ULEB = 0xA0u, + BIND_OPCODE_DO_BIND_ADD_ADDR_IMM_SCALED = 0xB0u, + BIND_OPCODE_DO_BIND_ULEB_TIMES_SKIPPING_ULEB = 0xC0u + }; + + enum { + EXPORT_SYMBOL_FLAGS_KIND_MASK = 0x03u, + EXPORT_SYMBOL_FLAGS_WEAK_DEFINITION = 0x04u, + EXPORT_SYMBOL_FLAGS_REEXPORT = 0x08u, + EXPORT_SYMBOL_FLAGS_STUB_AND_RESOLVER = 0x10u + }; + + enum ExportSymbolKind { + EXPORT_SYMBOL_FLAGS_KIND_REGULAR = 0x00u, + EXPORT_SYMBOL_FLAGS_KIND_THREAD_LOCAL = 0x01u, + EXPORT_SYMBOL_FLAGS_KIND_ABSOLUTE = 0x02u + }; + + enum { + // Constant masks for the "n_type" field in llvm_ks::MachO::nlist and + // llvm_ks::MachO::nlist_64 + N_STAB = 0xe0, + N_PEXT = 0x10, + N_TYPE = 0x0e, + N_EXT = 0x01 + }; + + enum NListType { + // Constants for the "n_type & N_TYPE" llvm_ks::MachO::nlist and + // llvm_ks::MachO::nlist_64 + N_UNDF = 0x0u, + N_ABS = 0x2u, + N_SECT = 0xeu, + N_PBUD = 0xcu, + N_INDR = 0xau + }; + + enum SectionOrdinal { + // Constants for the "n_sect" field in llvm_ks::MachO::nlist and + // llvm_ks::MachO::nlist_64 + NO_SECT = 0u, + MAX_SECT = 0xffu + }; + + enum { + // Constant masks for the "n_desc" field in llvm_ks::MachO::nlist and + // llvm_ks::MachO::nlist_64 + // The low 3 bits are the for the REFERENCE_TYPE. + REFERENCE_TYPE = 0x7, + REFERENCE_FLAG_UNDEFINED_NON_LAZY = 0, + REFERENCE_FLAG_UNDEFINED_LAZY = 1, + REFERENCE_FLAG_DEFINED = 2, + REFERENCE_FLAG_PRIVATE_DEFINED = 3, + REFERENCE_FLAG_PRIVATE_UNDEFINED_NON_LAZY = 4, + REFERENCE_FLAG_PRIVATE_UNDEFINED_LAZY = 5, + // Flag bits (some overlap with the library ordinal bits). + N_ARM_THUMB_DEF = 0x0008u, + REFERENCED_DYNAMICALLY = 0x0010u, + N_NO_DEAD_STRIP = 0x0020u, + N_WEAK_REF = 0x0040u, + N_WEAK_DEF = 0x0080u, + N_SYMBOL_RESOLVER = 0x0100u, + N_ALT_ENTRY = 0x0200u, + // For undefined symbols coming from libraries, see GET_LIBRARY_ORDINAL() + // as these are in the top 8 bits. + SELF_LIBRARY_ORDINAL = 0x0, + MAX_LIBRARY_ORDINAL = 0xfd, + DYNAMIC_LOOKUP_ORDINAL = 0xfe, + EXECUTABLE_ORDINAL = 0xff + }; + + enum StabType { + // Constant values for the "n_type" field in llvm_ks::MachO::nlist and + // llvm_ks::MachO::nlist_64 when "(n_type & N_STAB) != 0" + N_GSYM = 0x20u, + N_FNAME = 0x22u, + N_FUN = 0x24u, + N_STSYM = 0x26u, + N_LCSYM = 0x28u, + N_BNSYM = 0x2Eu, + N_PC = 0x30u, + N_AST = 0x32u, + N_OPT = 0x3Cu, + N_RSYM = 0x40u, + N_SLINE = 0x44u, + N_ENSYM = 0x4Eu, + N_SSYM = 0x60u, + N_SO = 0x64u, + N_OSO = 0x66u, + N_LSYM = 0x80u, + N_BINCL = 0x82u, + N_SOL = 0x84u, + N_PARAMS = 0x86u, + N_VERSION = 0x88u, + N_OLEVEL = 0x8Au, + N_PSYM = 0xA0u, + N_EINCL = 0xA2u, + N_ENTRY = 0xA4u, + N_LBRAC = 0xC0u, + N_EXCL = 0xC2u, + N_RBRAC = 0xE0u, + N_BCOMM = 0xE2u, + N_ECOMM = 0xE4u, + N_ECOML = 0xE8u, + N_LENG = 0xFEu + }; + + enum : uint32_t { + // Constant values for the r_symbolnum field in an + // llvm_ks::MachO::relocation_info structure when r_extern is 0. + R_ABS = 0, + + // Constant bits for the r_address field in an + // llvm_ks::MachO::relocation_info structure. + R_SCATTERED = 0x80000000 + }; + + enum RelocationInfoType { + // Constant values for the r_type field in an + // llvm_ks::MachO::relocation_info or llvm_ks::MachO::scattered_relocation_info + // structure. + GENERIC_RELOC_VANILLA = 0, + GENERIC_RELOC_PAIR = 1, + GENERIC_RELOC_SECTDIFF = 2, + GENERIC_RELOC_PB_LA_PTR = 3, + GENERIC_RELOC_LOCAL_SECTDIFF = 4, + GENERIC_RELOC_TLV = 5, + + // Constant values for the r_type field in a PowerPC architecture + // llvm_ks::MachO::relocation_info or llvm_ks::MachO::scattered_relocation_info + // structure. + PPC_RELOC_VANILLA = GENERIC_RELOC_VANILLA, + PPC_RELOC_PAIR = GENERIC_RELOC_PAIR, + PPC_RELOC_BR14 = 2, + PPC_RELOC_BR24 = 3, + PPC_RELOC_HI16 = 4, + PPC_RELOC_LO16 = 5, + PPC_RELOC_HA16 = 6, + PPC_RELOC_LO14 = 7, + PPC_RELOC_SECTDIFF = 8, + PPC_RELOC_PB_LA_PTR = 9, + PPC_RELOC_HI16_SECTDIFF = 10, + PPC_RELOC_LO16_SECTDIFF = 11, + PPC_RELOC_HA16_SECTDIFF = 12, + PPC_RELOC_JBSR = 13, + PPC_RELOC_LO14_SECTDIFF = 14, + PPC_RELOC_LOCAL_SECTDIFF = 15, + + // Constant values for the r_type field in an ARM architecture + // llvm_ks::MachO::relocation_info or llvm_ks::MachO::scattered_relocation_info + // structure. + ARM_RELOC_VANILLA = GENERIC_RELOC_VANILLA, + ARM_RELOC_PAIR = GENERIC_RELOC_PAIR, + ARM_RELOC_SECTDIFF = GENERIC_RELOC_SECTDIFF, + ARM_RELOC_LOCAL_SECTDIFF = 3, + ARM_RELOC_PB_LA_PTR = 4, + ARM_RELOC_BR24 = 5, + ARM_THUMB_RELOC_BR22 = 6, + ARM_THUMB_32BIT_BRANCH = 7, // obsolete + ARM_RELOC_HALF = 8, + ARM_RELOC_HALF_SECTDIFF = 9, + + // Constant values for the r_type field in an ARM64 architecture + // llvm_ks::MachO::relocation_info or llvm_ks::MachO::scattered_relocation_info + // structure. + + // For pointers. + ARM64_RELOC_UNSIGNED = 0, + // Must be followed by an ARM64_RELOC_UNSIGNED + ARM64_RELOC_SUBTRACTOR = 1, + // A B/BL instruction with 26-bit displacement. + ARM64_RELOC_BRANCH26 = 2, + // PC-rel distance to page of target. + ARM64_RELOC_PAGE21 = 3, + // Offset within page, scaled by r_length. + ARM64_RELOC_PAGEOFF12 = 4, + // PC-rel distance to page of GOT slot. + ARM64_RELOC_GOT_LOAD_PAGE21 = 5, + // Offset within page of GOT slot, scaled by r_length. + ARM64_RELOC_GOT_LOAD_PAGEOFF12 = 6, + // For pointers to GOT slots. + ARM64_RELOC_POINTER_TO_GOT = 7, + // PC-rel distance to page of TLVP slot. + ARM64_RELOC_TLVP_LOAD_PAGE21 = 8, + // Offset within page of TLVP slot, scaled by r_length. + ARM64_RELOC_TLVP_LOAD_PAGEOFF12 = 9, + // Must be followed by ARM64_RELOC_PAGE21 or ARM64_RELOC_PAGEOFF12. + ARM64_RELOC_ADDEND = 10, + + // Constant values for the r_type field in an x86_64 architecture + // llvm_ks::MachO::relocation_info or llvm_ks::MachO::scattered_relocation_info + // structure + X86_64_RELOC_UNSIGNED = 0, + X86_64_RELOC_SIGNED = 1, + X86_64_RELOC_BRANCH = 2, + X86_64_RELOC_GOT_LOAD = 3, + X86_64_RELOC_GOT = 4, + X86_64_RELOC_SUBTRACTOR = 5, + X86_64_RELOC_SIGNED_1 = 6, + X86_64_RELOC_SIGNED_2 = 7, + X86_64_RELOC_SIGNED_4 = 8, + X86_64_RELOC_TLV = 9 + }; + + // Values for segment_command.initprot. + // From + enum { + VM_PROT_READ = 0x1, + VM_PROT_WRITE = 0x2, + VM_PROT_EXECUTE = 0x4 + }; + + // Structs from + + struct mach_header { + uint32_t magic; + uint32_t cputype; + uint32_t cpusubtype; + uint32_t filetype; + uint32_t ncmds; + uint32_t sizeofcmds; + uint32_t flags; + }; + + struct mach_header_64 { + uint32_t magic; + uint32_t cputype; + uint32_t cpusubtype; + uint32_t filetype; + uint32_t ncmds; + uint32_t sizeofcmds; + uint32_t flags; + uint32_t reserved; + }; + + struct load_command { + uint32_t cmd; + uint32_t cmdsize; + }; + + struct segment_command { + uint32_t cmd; + uint32_t cmdsize; + char segname[16]; + uint32_t vmaddr; + uint32_t vmsize; + uint32_t fileoff; + uint32_t filesize; + uint32_t maxprot; + uint32_t initprot; + uint32_t nsects; + uint32_t flags; + }; + + struct segment_command_64 { + uint32_t cmd; + uint32_t cmdsize; + char segname[16]; + uint64_t vmaddr; + uint64_t vmsize; + uint64_t fileoff; + uint64_t filesize; + uint32_t maxprot; + uint32_t initprot; + uint32_t nsects; + uint32_t flags; + }; + + struct section { + char sectname[16]; + char segname[16]; + uint32_t addr; + uint32_t size; + uint32_t offset; + uint32_t align; + uint32_t reloff; + uint32_t nreloc; + uint32_t flags; + uint32_t reserved1; + uint32_t reserved2; + }; + + struct section_64 { + char sectname[16]; + char segname[16]; + uint64_t addr; + uint64_t size; + uint32_t offset; + uint32_t align; + uint32_t reloff; + uint32_t nreloc; + uint32_t flags; + uint32_t reserved1; + uint32_t reserved2; + uint32_t reserved3; + }; + + struct fvmlib { + uint32_t name; + uint32_t minor_version; + uint32_t header_addr; + }; + + struct fvmlib_command { + uint32_t cmd; + uint32_t cmdsize; + struct fvmlib fvmlib; + }; + + struct dylib { + uint32_t name; + uint32_t timestamp; + uint32_t current_version; + uint32_t compatibility_version; + }; + + struct dylib_command { + uint32_t cmd; + uint32_t cmdsize; + struct dylib dylib; + }; + + struct sub_framework_command { + uint32_t cmd; + uint32_t cmdsize; + uint32_t umbrella; + }; + + struct sub_client_command { + uint32_t cmd; + uint32_t cmdsize; + uint32_t client; + }; + + struct sub_umbrella_command { + uint32_t cmd; + uint32_t cmdsize; + uint32_t sub_umbrella; + }; + + struct sub_library_command { + uint32_t cmd; + uint32_t cmdsize; + uint32_t sub_library; + }; + + struct prebound_dylib_command { + uint32_t cmd; + uint32_t cmdsize; + uint32_t name; + uint32_t nmodules; + uint32_t linked_modules; + }; + + struct dylinker_command { + uint32_t cmd; + uint32_t cmdsize; + uint32_t name; + }; + + struct thread_command { + uint32_t cmd; + uint32_t cmdsize; + }; + + struct routines_command { + uint32_t cmd; + uint32_t cmdsize; + uint32_t init_address; + uint32_t init_module; + uint32_t reserved1; + uint32_t reserved2; + uint32_t reserved3; + uint32_t reserved4; + uint32_t reserved5; + uint32_t reserved6; + }; + + struct routines_command_64 { + uint32_t cmd; + uint32_t cmdsize; + uint64_t init_address; + uint64_t init_module; + uint64_t reserved1; + uint64_t reserved2; + uint64_t reserved3; + uint64_t reserved4; + uint64_t reserved5; + uint64_t reserved6; + }; + + struct symtab_command { + uint32_t cmd; + uint32_t cmdsize; + uint32_t symoff; + uint32_t nsyms; + uint32_t stroff; + uint32_t strsize; + }; + + struct dysymtab_command { + uint32_t cmd; + uint32_t cmdsize; + uint32_t ilocalsym; + uint32_t nlocalsym; + uint32_t iextdefsym; + uint32_t nextdefsym; + uint32_t iundefsym; + uint32_t nundefsym; + uint32_t tocoff; + uint32_t ntoc; + uint32_t modtaboff; + uint32_t nmodtab; + uint32_t extrefsymoff; + uint32_t nextrefsyms; + uint32_t indirectsymoff; + uint32_t nindirectsyms; + uint32_t extreloff; + uint32_t nextrel; + uint32_t locreloff; + uint32_t nlocrel; + }; + + struct dylib_table_of_contents { + uint32_t symbol_index; + uint32_t module_index; + }; + + struct dylib_module { + uint32_t module_name; + uint32_t iextdefsym; + uint32_t nextdefsym; + uint32_t irefsym; + uint32_t nrefsym; + uint32_t ilocalsym; + uint32_t nlocalsym; + uint32_t iextrel; + uint32_t nextrel; + uint32_t iinit_iterm; + uint32_t ninit_nterm; + uint32_t objc_module_info_addr; + uint32_t objc_module_info_size; + }; + + struct dylib_module_64 { + uint32_t module_name; + uint32_t iextdefsym; + uint32_t nextdefsym; + uint32_t irefsym; + uint32_t nrefsym; + uint32_t ilocalsym; + uint32_t nlocalsym; + uint32_t iextrel; + uint32_t nextrel; + uint32_t iinit_iterm; + uint32_t ninit_nterm; + uint32_t objc_module_info_size; + uint64_t objc_module_info_addr; + }; + + struct dylib_reference { + uint32_t isym:24, + flags:8; + }; + + struct twolevel_hints_command { + uint32_t cmd; + uint32_t cmdsize; + uint32_t offset; + uint32_t nhints; + }; + + struct twolevel_hint { + uint32_t isub_image:8, + itoc:24; + }; + + struct prebind_cksum_command { + uint32_t cmd; + uint32_t cmdsize; + uint32_t cksum; + }; + + struct uuid_command { + uint32_t cmd; + uint32_t cmdsize; + uint8_t uuid[16]; + }; + + struct rpath_command { + uint32_t cmd; + uint32_t cmdsize; + uint32_t path; + }; + + struct linkedit_data_command { + uint32_t cmd; + uint32_t cmdsize; + uint32_t dataoff; + uint32_t datasize; + }; + + struct data_in_code_entry { + uint32_t offset; + uint16_t length; + uint16_t kind; + }; + + struct source_version_command { + uint32_t cmd; + uint32_t cmdsize; + uint64_t version; + }; + + struct encryption_info_command { + uint32_t cmd; + uint32_t cmdsize; + uint32_t cryptoff; + uint32_t cryptsize; + uint32_t cryptid; + }; + + struct encryption_info_command_64 { + uint32_t cmd; + uint32_t cmdsize; + uint32_t cryptoff; + uint32_t cryptsize; + uint32_t cryptid; + uint32_t pad; + }; + + struct version_min_command { + uint32_t cmd; // LC_VERSION_MIN_MACOSX or + // LC_VERSION_MIN_IPHONEOS + uint32_t cmdsize; // sizeof(struct version_min_command) + uint32_t version; // X.Y.Z is encoded in nibbles xxxx.yy.zz + uint32_t sdk; // X.Y.Z is encoded in nibbles xxxx.yy.zz + }; + + struct dyld_info_command { + uint32_t cmd; + uint32_t cmdsize; + uint32_t rebase_off; + uint32_t rebase_size; + uint32_t bind_off; + uint32_t bind_size; + uint32_t weak_bind_off; + uint32_t weak_bind_size; + uint32_t lazy_bind_off; + uint32_t lazy_bind_size; + uint32_t export_off; + uint32_t export_size; + }; + + struct linker_option_command { + uint32_t cmd; + uint32_t cmdsize; + uint32_t count; + }; + + struct symseg_command { + uint32_t cmd; + uint32_t cmdsize; + uint32_t offset; + uint32_t size; + }; + + struct ident_command { + uint32_t cmd; + uint32_t cmdsize; + }; + + struct fvmfile_command { + uint32_t cmd; + uint32_t cmdsize; + uint32_t name; + uint32_t header_addr; + }; + + struct tlv_descriptor_32 { + uint32_t thunk; + uint32_t key; + uint32_t offset; + }; + + struct tlv_descriptor_64 { + uint64_t thunk; + uint64_t key; + uint64_t offset; + }; + + struct tlv_descriptor { + uintptr_t thunk; + uintptr_t key; + uintptr_t offset; + }; + + struct entry_point_command { + uint32_t cmd; + uint32_t cmdsize; + uint64_t entryoff; + uint64_t stacksize; + }; + + // Structs from + struct fat_header { + uint32_t magic; + uint32_t nfat_arch; + }; + + struct fat_arch { + uint32_t cputype; + uint32_t cpusubtype; + uint32_t offset; + uint32_t size; + uint32_t align; + }; + + // Structs from + struct relocation_info { + int32_t r_address; + uint32_t r_symbolnum:24, + r_pcrel:1, + r_length:2, + r_extern:1, + r_type:4; + }; + + struct scattered_relocation_info { +#if defined(BYTE_ORDER) && defined(BIG_ENDIAN) && (BYTE_ORDER == BIG_ENDIAN) + uint32_t r_scattered:1, + r_pcrel:1, + r_length:2, + r_type:4, + r_address:24; +#else + uint32_t r_address:24, + r_type:4, + r_length:2, + r_pcrel:1, + r_scattered:1; +#endif + int32_t r_value; + }; + + // Structs NOT from , but that make LLVM's life easier + struct any_relocation_info { + uint32_t r_word0, r_word1; + }; + + // Structs from + struct nlist_base { + uint32_t n_strx; + uint8_t n_type; + uint8_t n_sect; + uint16_t n_desc; + }; + + struct nlist { + uint32_t n_strx; + uint8_t n_type; + uint8_t n_sect; + int16_t n_desc; + uint32_t n_value; + }; + + struct nlist_64 { + uint32_t n_strx; + uint8_t n_type; + uint8_t n_sect; + uint16_t n_desc; + uint64_t n_value; + }; + + // Byte order swapping functions for MachO structs + + inline void swapStruct(mach_header &mh) { + sys::swapByteOrder(mh.magic); + sys::swapByteOrder(mh.cputype); + sys::swapByteOrder(mh.cpusubtype); + sys::swapByteOrder(mh.filetype); + sys::swapByteOrder(mh.ncmds); + sys::swapByteOrder(mh.sizeofcmds); + sys::swapByteOrder(mh.flags); + } + + inline void swapStruct(mach_header_64 &H) { + sys::swapByteOrder(H.magic); + sys::swapByteOrder(H.cputype); + sys::swapByteOrder(H.cpusubtype); + sys::swapByteOrder(H.filetype); + sys::swapByteOrder(H.ncmds); + sys::swapByteOrder(H.sizeofcmds); + sys::swapByteOrder(H.flags); + sys::swapByteOrder(H.reserved); + } + + inline void swapStruct(load_command &lc) { + sys::swapByteOrder(lc.cmd); + sys::swapByteOrder(lc.cmdsize); + } + + inline void swapStruct(symtab_command &lc) { + sys::swapByteOrder(lc.cmd); + sys::swapByteOrder(lc.cmdsize); + sys::swapByteOrder(lc.symoff); + sys::swapByteOrder(lc.nsyms); + sys::swapByteOrder(lc.stroff); + sys::swapByteOrder(lc.strsize); + } + + inline void swapStruct(segment_command_64 &seg) { + sys::swapByteOrder(seg.cmd); + sys::swapByteOrder(seg.cmdsize); + sys::swapByteOrder(seg.vmaddr); + sys::swapByteOrder(seg.vmsize); + sys::swapByteOrder(seg.fileoff); + sys::swapByteOrder(seg.filesize); + sys::swapByteOrder(seg.maxprot); + sys::swapByteOrder(seg.initprot); + sys::swapByteOrder(seg.nsects); + sys::swapByteOrder(seg.flags); + } + + inline void swapStruct(segment_command &seg) { + sys::swapByteOrder(seg.cmd); + sys::swapByteOrder(seg.cmdsize); + sys::swapByteOrder(seg.vmaddr); + sys::swapByteOrder(seg.vmsize); + sys::swapByteOrder(seg.fileoff); + sys::swapByteOrder(seg.filesize); + sys::swapByteOrder(seg.maxprot); + sys::swapByteOrder(seg.initprot); + sys::swapByteOrder(seg.nsects); + sys::swapByteOrder(seg.flags); + } + + inline void swapStruct(section_64 §) { + sys::swapByteOrder(sect.addr); + sys::swapByteOrder(sect.size); + sys::swapByteOrder(sect.offset); + sys::swapByteOrder(sect.align); + sys::swapByteOrder(sect.reloff); + sys::swapByteOrder(sect.nreloc); + sys::swapByteOrder(sect.flags); + sys::swapByteOrder(sect.reserved1); + sys::swapByteOrder(sect.reserved2); + } + + inline void swapStruct(section §) { + sys::swapByteOrder(sect.addr); + sys::swapByteOrder(sect.size); + sys::swapByteOrder(sect.offset); + sys::swapByteOrder(sect.align); + sys::swapByteOrder(sect.reloff); + sys::swapByteOrder(sect.nreloc); + sys::swapByteOrder(sect.flags); + sys::swapByteOrder(sect.reserved1); + sys::swapByteOrder(sect.reserved2); + } + + inline void swapStruct(dyld_info_command &info) { + sys::swapByteOrder(info.cmd); + sys::swapByteOrder(info.cmdsize); + sys::swapByteOrder(info.rebase_off); + sys::swapByteOrder(info.rebase_size); + sys::swapByteOrder(info.bind_off); + sys::swapByteOrder(info.bind_size); + sys::swapByteOrder(info.weak_bind_off); + sys::swapByteOrder(info.weak_bind_size); + sys::swapByteOrder(info.lazy_bind_off); + sys::swapByteOrder(info.lazy_bind_size); + sys::swapByteOrder(info.export_off); + sys::swapByteOrder(info.export_size); + } + + inline void swapStruct(dylib_command &d) { + sys::swapByteOrder(d.cmd); + sys::swapByteOrder(d.cmdsize); + sys::swapByteOrder(d.dylib.name); + sys::swapByteOrder(d.dylib.timestamp); + sys::swapByteOrder(d.dylib.current_version); + sys::swapByteOrder(d.dylib.compatibility_version); + } + + inline void swapStruct(sub_framework_command &s) { + sys::swapByteOrder(s.cmd); + sys::swapByteOrder(s.cmdsize); + sys::swapByteOrder(s.umbrella); + } + + inline void swapStruct(sub_umbrella_command &s) { + sys::swapByteOrder(s.cmd); + sys::swapByteOrder(s.cmdsize); + sys::swapByteOrder(s.sub_umbrella); + } + + inline void swapStruct(sub_library_command &s) { + sys::swapByteOrder(s.cmd); + sys::swapByteOrder(s.cmdsize); + sys::swapByteOrder(s.sub_library); + } + + inline void swapStruct(sub_client_command &s) { + sys::swapByteOrder(s.cmd); + sys::swapByteOrder(s.cmdsize); + sys::swapByteOrder(s.client); + } + + inline void swapStruct(routines_command &r) { + sys::swapByteOrder(r.cmd); + sys::swapByteOrder(r.cmdsize); + sys::swapByteOrder(r.init_address); + sys::swapByteOrder(r.init_module); + sys::swapByteOrder(r.reserved1); + sys::swapByteOrder(r.reserved2); + sys::swapByteOrder(r.reserved3); + sys::swapByteOrder(r.reserved4); + sys::swapByteOrder(r.reserved5); + sys::swapByteOrder(r.reserved6); + } + + inline void swapStruct(routines_command_64 &r) { + sys::swapByteOrder(r.cmd); + sys::swapByteOrder(r.cmdsize); + sys::swapByteOrder(r.init_address); + sys::swapByteOrder(r.init_module); + sys::swapByteOrder(r.reserved1); + sys::swapByteOrder(r.reserved2); + sys::swapByteOrder(r.reserved3); + sys::swapByteOrder(r.reserved4); + sys::swapByteOrder(r.reserved5); + sys::swapByteOrder(r.reserved6); + } + + inline void swapStruct(thread_command &t) { + sys::swapByteOrder(t.cmd); + sys::swapByteOrder(t.cmdsize); + } + + inline void swapStruct(dylinker_command &d) { + sys::swapByteOrder(d.cmd); + sys::swapByteOrder(d.cmdsize); + sys::swapByteOrder(d.name); + } + + inline void swapStruct(uuid_command &u) { + sys::swapByteOrder(u.cmd); + sys::swapByteOrder(u.cmdsize); + } + + inline void swapStruct(rpath_command &r) { + sys::swapByteOrder(r.cmd); + sys::swapByteOrder(r.cmdsize); + sys::swapByteOrder(r.path); + } + + inline void swapStruct(source_version_command &s) { + sys::swapByteOrder(s.cmd); + sys::swapByteOrder(s.cmdsize); + sys::swapByteOrder(s.version); + } + + inline void swapStruct(entry_point_command &e) { + sys::swapByteOrder(e.cmd); + sys::swapByteOrder(e.cmdsize); + sys::swapByteOrder(e.entryoff); + sys::swapByteOrder(e.stacksize); + } + + inline void swapStruct(encryption_info_command &e) { + sys::swapByteOrder(e.cmd); + sys::swapByteOrder(e.cmdsize); + sys::swapByteOrder(e.cryptoff); + sys::swapByteOrder(e.cryptsize); + sys::swapByteOrder(e.cryptid); + } + + inline void swapStruct(encryption_info_command_64 &e) { + sys::swapByteOrder(e.cmd); + sys::swapByteOrder(e.cmdsize); + sys::swapByteOrder(e.cryptoff); + sys::swapByteOrder(e.cryptsize); + sys::swapByteOrder(e.cryptid); + sys::swapByteOrder(e.pad); + } + + inline void swapStruct(dysymtab_command &dst) { + sys::swapByteOrder(dst.cmd); + sys::swapByteOrder(dst.cmdsize); + sys::swapByteOrder(dst.ilocalsym); + sys::swapByteOrder(dst.nlocalsym); + sys::swapByteOrder(dst.iextdefsym); + sys::swapByteOrder(dst.nextdefsym); + sys::swapByteOrder(dst.iundefsym); + sys::swapByteOrder(dst.nundefsym); + sys::swapByteOrder(dst.tocoff); + sys::swapByteOrder(dst.ntoc); + sys::swapByteOrder(dst.modtaboff); + sys::swapByteOrder(dst.nmodtab); + sys::swapByteOrder(dst.extrefsymoff); + sys::swapByteOrder(dst.nextrefsyms); + sys::swapByteOrder(dst.indirectsymoff); + sys::swapByteOrder(dst.nindirectsyms); + sys::swapByteOrder(dst.extreloff); + sys::swapByteOrder(dst.nextrel); + sys::swapByteOrder(dst.locreloff); + sys::swapByteOrder(dst.nlocrel); + } + + inline void swapStruct(any_relocation_info &reloc) { + sys::swapByteOrder(reloc.r_word0); + sys::swapByteOrder(reloc.r_word1); + } + + inline void swapStruct(nlist_base &S) { + sys::swapByteOrder(S.n_strx); + sys::swapByteOrder(S.n_desc); + } + + inline void swapStruct(nlist &sym) { + sys::swapByteOrder(sym.n_strx); + sys::swapByteOrder(sym.n_desc); + sys::swapByteOrder(sym.n_value); + } + + inline void swapStruct(nlist_64 &sym) { + sys::swapByteOrder(sym.n_strx); + sys::swapByteOrder(sym.n_desc); + sys::swapByteOrder(sym.n_value); + } + + inline void swapStruct(linkedit_data_command &C) { + sys::swapByteOrder(C.cmd); + sys::swapByteOrder(C.cmdsize); + sys::swapByteOrder(C.dataoff); + sys::swapByteOrder(C.datasize); + } + + inline void swapStruct(linker_option_command &C) { + sys::swapByteOrder(C.cmd); + sys::swapByteOrder(C.cmdsize); + sys::swapByteOrder(C.count); + } + + inline void swapStruct(version_min_command&C) { + sys::swapByteOrder(C.cmd); + sys::swapByteOrder(C.cmdsize); + sys::swapByteOrder(C.version); + sys::swapByteOrder(C.sdk); + } + + inline void swapStruct(data_in_code_entry &C) { + sys::swapByteOrder(C.offset); + sys::swapByteOrder(C.length); + sys::swapByteOrder(C.kind); + } + + inline void swapStruct(uint32_t &C) { + sys::swapByteOrder(C); + } + + // Get/Set functions from + + static inline uint16_t GET_LIBRARY_ORDINAL(uint16_t n_desc) { + return (((n_desc) >> 8u) & 0xffu); + } + + static inline void SET_LIBRARY_ORDINAL(uint16_t &n_desc, uint8_t ordinal) { + n_desc = (((n_desc) & 0x00ff) | (((ordinal) & 0xff) << 8)); + } + + static inline uint8_t GET_COMM_ALIGN (uint16_t n_desc) { + return (n_desc >> 8u) & 0x0fu; + } + + static inline void SET_COMM_ALIGN (uint16_t &n_desc, uint8_t align) { + n_desc = ((n_desc & 0xf0ffu) | ((align & 0x0fu) << 8u)); + } + + // Enums from + enum : uint32_t { + // Capability bits used in the definition of cpu_type. + CPU_ARCH_MASK = 0xff000000, // Mask for architecture bits + CPU_ARCH_ABI64 = 0x01000000 // 64 bit ABI + }; + + // Constants for the cputype field. + enum CPUType { + CPU_TYPE_ANY = -1, + CPU_TYPE_X86 = 7, + CPU_TYPE_I386 = CPU_TYPE_X86, + CPU_TYPE_X86_64 = CPU_TYPE_X86 | CPU_ARCH_ABI64, + /* CPU_TYPE_MIPS = 8, */ + CPU_TYPE_MC98000 = 10, // Old Motorola PowerPC + CPU_TYPE_ARM = 12, + CPU_TYPE_ARM64 = CPU_TYPE_ARM | CPU_ARCH_ABI64, + CPU_TYPE_SPARC = 14, + CPU_TYPE_POWERPC = 18, + CPU_TYPE_POWERPC64 = CPU_TYPE_POWERPC | CPU_ARCH_ABI64 + }; + + enum : uint32_t { + // Capability bits used in the definition of cpusubtype. + CPU_SUBTYPE_MASK = 0xff000000, // Mask for architecture bits + CPU_SUBTYPE_LIB64 = 0x80000000, // 64 bit libraries + + // Special CPU subtype constants. + CPU_SUBTYPE_MULTIPLE = ~0u + }; + + // Constants for the cpusubtype field. + enum CPUSubTypeX86 { + CPU_SUBTYPE_I386_ALL = 3, + CPU_SUBTYPE_386 = 3, + CPU_SUBTYPE_486 = 4, + CPU_SUBTYPE_486SX = 0x84, + CPU_SUBTYPE_586 = 5, + CPU_SUBTYPE_PENT = CPU_SUBTYPE_586, + CPU_SUBTYPE_PENTPRO = 0x16, + CPU_SUBTYPE_PENTII_M3 = 0x36, + CPU_SUBTYPE_PENTII_M5 = 0x56, + CPU_SUBTYPE_CELERON = 0x67, + CPU_SUBTYPE_CELERON_MOBILE = 0x77, + CPU_SUBTYPE_PENTIUM_3 = 0x08, + CPU_SUBTYPE_PENTIUM_3_M = 0x18, + CPU_SUBTYPE_PENTIUM_3_XEON = 0x28, + CPU_SUBTYPE_PENTIUM_M = 0x09, + CPU_SUBTYPE_PENTIUM_4 = 0x0a, + CPU_SUBTYPE_PENTIUM_4_M = 0x1a, + CPU_SUBTYPE_ITANIUM = 0x0b, + CPU_SUBTYPE_ITANIUM_2 = 0x1b, + CPU_SUBTYPE_XEON = 0x0c, + CPU_SUBTYPE_XEON_MP = 0x1c, + + CPU_SUBTYPE_X86_ALL = 3, + CPU_SUBTYPE_X86_64_ALL = 3, + CPU_SUBTYPE_X86_ARCH1 = 4, + CPU_SUBTYPE_X86_64_H = 8 + }; + static inline int CPU_SUBTYPE_INTEL(int Family, int Model) { + return Family | (Model << 4); + } + static inline int CPU_SUBTYPE_INTEL_FAMILY(CPUSubTypeX86 ST) { + return ((int)ST) & 0x0f; + } + static inline int CPU_SUBTYPE_INTEL_MODEL(CPUSubTypeX86 ST) { + return ((int)ST) >> 4; + } + enum { + CPU_SUBTYPE_INTEL_FAMILY_MAX = 15, + CPU_SUBTYPE_INTEL_MODEL_ALL = 0 + }; + + enum CPUSubTypeARM { + CPU_SUBTYPE_ARM_ALL = 0, + CPU_SUBTYPE_ARM_V4T = 5, + CPU_SUBTYPE_ARM_V6 = 6, + CPU_SUBTYPE_ARM_V5 = 7, + CPU_SUBTYPE_ARM_V5TEJ = 7, + CPU_SUBTYPE_ARM_XSCALE = 8, + CPU_SUBTYPE_ARM_V7 = 9, + // unused ARM_V7F = 10, + CPU_SUBTYPE_ARM_V7S = 11, + CPU_SUBTYPE_ARM_V7K = 12, + CPU_SUBTYPE_ARM_V6M = 14, + CPU_SUBTYPE_ARM_V7M = 15, + CPU_SUBTYPE_ARM_V7EM = 16 + }; + + enum CPUSubTypeARM64 { + CPU_SUBTYPE_ARM64_ALL = 0 + }; + + enum CPUSubTypeSPARC { + CPU_SUBTYPE_SPARC_ALL = 0 + }; + + enum CPUSubTypePowerPC { + CPU_SUBTYPE_POWERPC_ALL = 0, + CPU_SUBTYPE_POWERPC_601 = 1, + CPU_SUBTYPE_POWERPC_602 = 2, + CPU_SUBTYPE_POWERPC_603 = 3, + CPU_SUBTYPE_POWERPC_603e = 4, + CPU_SUBTYPE_POWERPC_603ev = 5, + CPU_SUBTYPE_POWERPC_604 = 6, + CPU_SUBTYPE_POWERPC_604e = 7, + CPU_SUBTYPE_POWERPC_620 = 8, + CPU_SUBTYPE_POWERPC_750 = 9, + CPU_SUBTYPE_POWERPC_7400 = 10, + CPU_SUBTYPE_POWERPC_7450 = 11, + CPU_SUBTYPE_POWERPC_970 = 100, + + CPU_SUBTYPE_MC980000_ALL = CPU_SUBTYPE_POWERPC_ALL, + CPU_SUBTYPE_MC98601 = CPU_SUBTYPE_POWERPC_601 + }; + + struct x86_thread_state64_t { + uint64_t rax; + uint64_t rbx; + uint64_t rcx; + uint64_t rdx; + uint64_t rdi; + uint64_t rsi; + uint64_t rbp; + uint64_t rsp; + uint64_t r8; + uint64_t r9; + uint64_t r10; + uint64_t r11; + uint64_t r12; + uint64_t r13; + uint64_t r14; + uint64_t r15; + uint64_t rip; + uint64_t rflags; + uint64_t cs; + uint64_t fs; + uint64_t gs; + }; + + enum x86_fp_control_precis { + x86_FP_PREC_24B = 0, + x86_FP_PREC_53B = 2, + x86_FP_PREC_64B = 3 + }; + + enum x86_fp_control_rc { + x86_FP_RND_NEAR = 0, + x86_FP_RND_DOWN = 1, + x86_FP_RND_UP = 2, + x86_FP_CHOP = 3 + }; + + struct fp_control_t { + unsigned short + invalid :1, + denorm :1, + zdiv :1, + ovrfl :1, + undfl :1, + precis :1, + :2, + pc :2, + rc :2, + :1, + :3; + }; + + struct fp_status_t { + unsigned short + invalid :1, + denorm :1, + zdiv :1, + ovrfl :1, + undfl :1, + precis :1, + stkflt :1, + errsumm :1, + c0 :1, + c1 :1, + c2 :1, + tos :3, + c3 :1, + busy :1; + }; + + struct mmst_reg_t { + char mmst_reg[10]; + char mmst_rsrv[6]; + }; + + struct xmm_reg_t { + char xmm_reg[16]; + }; + + struct x86_float_state64_t { + int32_t fpu_reserved[2]; + fp_control_t fpu_fcw; + fp_status_t fpu_fsw; + uint8_t fpu_ftw; + uint8_t fpu_rsrv1; + uint16_t fpu_fop; + uint32_t fpu_ip; + uint16_t fpu_cs; + uint16_t fpu_rsrv2; + uint32_t fpu_dp; + uint16_t fpu_ds; + uint16_t fpu_rsrv3; + uint32_t fpu_mxcsr; + uint32_t fpu_mxcsrmask; + mmst_reg_t fpu_stmm0; + mmst_reg_t fpu_stmm1; + mmst_reg_t fpu_stmm2; + mmst_reg_t fpu_stmm3; + mmst_reg_t fpu_stmm4; + mmst_reg_t fpu_stmm5; + mmst_reg_t fpu_stmm6; + mmst_reg_t fpu_stmm7; + xmm_reg_t fpu_xmm0; + xmm_reg_t fpu_xmm1; + xmm_reg_t fpu_xmm2; + xmm_reg_t fpu_xmm3; + xmm_reg_t fpu_xmm4; + xmm_reg_t fpu_xmm5; + xmm_reg_t fpu_xmm6; + xmm_reg_t fpu_xmm7; + xmm_reg_t fpu_xmm8; + xmm_reg_t fpu_xmm9; + xmm_reg_t fpu_xmm10; + xmm_reg_t fpu_xmm11; + xmm_reg_t fpu_xmm12; + xmm_reg_t fpu_xmm13; + xmm_reg_t fpu_xmm14; + xmm_reg_t fpu_xmm15; + char fpu_rsrv4[6*16]; + uint32_t fpu_reserved1; + }; + + struct x86_exception_state64_t { + uint16_t trapno; + uint16_t cpu; + uint32_t err; + uint64_t faultvaddr; + }; + + inline void swapStruct(x86_thread_state64_t &x) { + sys::swapByteOrder(x.rax); + sys::swapByteOrder(x.rbx); + sys::swapByteOrder(x.rcx); + sys::swapByteOrder(x.rdx); + sys::swapByteOrder(x.rdi); + sys::swapByteOrder(x.rsi); + sys::swapByteOrder(x.rbp); + sys::swapByteOrder(x.rsp); + sys::swapByteOrder(x.r8); + sys::swapByteOrder(x.r9); + sys::swapByteOrder(x.r10); + sys::swapByteOrder(x.r11); + sys::swapByteOrder(x.r12); + sys::swapByteOrder(x.r13); + sys::swapByteOrder(x.r14); + sys::swapByteOrder(x.r15); + sys::swapByteOrder(x.rip); + sys::swapByteOrder(x.rflags); + sys::swapByteOrder(x.cs); + sys::swapByteOrder(x.fs); + sys::swapByteOrder(x.gs); + } + + inline void swapStruct(x86_float_state64_t &x) { + sys::swapByteOrder(x.fpu_reserved[0]); + sys::swapByteOrder(x.fpu_reserved[1]); + // TODO swap: fp_control_t fpu_fcw; + // TODO swap: fp_status_t fpu_fsw; + sys::swapByteOrder(x.fpu_fop); + sys::swapByteOrder(x.fpu_ip); + sys::swapByteOrder(x.fpu_cs); + sys::swapByteOrder(x.fpu_rsrv2); + sys::swapByteOrder(x.fpu_dp); + sys::swapByteOrder(x.fpu_ds); + sys::swapByteOrder(x.fpu_rsrv3); + sys::swapByteOrder(x.fpu_mxcsr); + sys::swapByteOrder(x.fpu_mxcsrmask); + sys::swapByteOrder(x.fpu_reserved1); + } + + inline void swapStruct(x86_exception_state64_t &x) { + sys::swapByteOrder(x.trapno); + sys::swapByteOrder(x.cpu); + sys::swapByteOrder(x.err); + sys::swapByteOrder(x.faultvaddr); + } + + struct x86_state_hdr_t { + uint32_t flavor; + uint32_t count; + }; + + struct x86_thread_state_t { + x86_state_hdr_t tsh; + union { + x86_thread_state64_t ts64; + } uts; + }; + + struct x86_float_state_t { + x86_state_hdr_t fsh; + union { + x86_float_state64_t fs64; + } ufs; + }; + + struct x86_exception_state_t { + x86_state_hdr_t esh; + union { + x86_exception_state64_t es64; + } ues; + }; + + inline void swapStruct(x86_state_hdr_t &x) { + sys::swapByteOrder(x.flavor); + sys::swapByteOrder(x.count); + } + + enum X86ThreadFlavors { + x86_THREAD_STATE32 = 1, + x86_FLOAT_STATE32 = 2, + x86_EXCEPTION_STATE32 = 3, + x86_THREAD_STATE64 = 4, + x86_FLOAT_STATE64 = 5, + x86_EXCEPTION_STATE64 = 6, + x86_THREAD_STATE = 7, + x86_FLOAT_STATE = 8, + x86_EXCEPTION_STATE = 9, + x86_DEBUG_STATE32 = 10, + x86_DEBUG_STATE64 = 11, + x86_DEBUG_STATE = 12 + }; + + inline void swapStruct(x86_thread_state_t &x) { + swapStruct(x.tsh); + if (x.tsh.flavor == x86_THREAD_STATE64) + swapStruct(x.uts.ts64); + } + + inline void swapStruct(x86_float_state_t &x) { + swapStruct(x.fsh); + if (x.fsh.flavor == x86_FLOAT_STATE64) + swapStruct(x.ufs.fs64); + } + + inline void swapStruct(x86_exception_state_t &x) { + swapStruct(x.esh); + if (x.esh.flavor == x86_EXCEPTION_STATE64) + swapStruct(x.ues.es64); + } + + const uint32_t x86_THREAD_STATE64_COUNT = + sizeof(x86_thread_state64_t) / sizeof(uint32_t); + const uint32_t x86_FLOAT_STATE64_COUNT = + sizeof(x86_float_state64_t) / sizeof(uint32_t); + const uint32_t x86_EXCEPTION_STATE64_COUNT = + sizeof(x86_exception_state64_t) / sizeof(uint32_t); + + const uint32_t x86_THREAD_STATE_COUNT = + sizeof(x86_thread_state_t) / sizeof(uint32_t); + const uint32_t x86_FLOAT_STATE_COUNT = + sizeof(x86_float_state_t) / sizeof(uint32_t); + const uint32_t x86_EXCEPTION_STATE_COUNT = + sizeof(x86_exception_state_t) / sizeof(uint32_t); + + } // end namespace MachO +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/Support/MathExtras.h b/llvm/include/llvm/Support/MathExtras.h new file mode 100644 index 0000000..ead45df --- /dev/null +++ b/llvm/include/llvm/Support/MathExtras.h @@ -0,0 +1,741 @@ +//===-- llvm/Support/MathExtras.h - Useful math functions -------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains some functions that are useful for math stuff. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_MATHEXTRAS_H +#define LLVM_SUPPORT_MATHEXTRAS_H + +#include "llvm/Support/Compiler.h" +#include "llvm/Support/SwapByteOrder.h" +#include +#include +#include + +#ifdef _MSC_VER +#include +#endif + +#ifdef __ANDROID_NDK__ +#include +#endif + +namespace llvm_ks { +/// \brief The behavior an operation has on an input of 0. +enum ZeroBehavior { + /// \brief The returned value is undefined. + ZB_Undefined, + /// \brief The returned value is numeric_limits::max() + ZB_Max, + /// \brief The returned value is numeric_limits::digits + ZB_Width +}; + +namespace detail { +template struct TrailingZerosCounter { + static std::size_t count(T Val, ZeroBehavior) { + if (!Val) + return std::numeric_limits::digits; + if (Val & 0x1) + return 0; + + // Bisection method. + std::size_t ZeroBits = 0; + T Shift = std::numeric_limits::digits >> 1; + T Mask = std::numeric_limits::max() >> Shift; + while (Shift) { + if ((Val & Mask) == 0) { + Val >>= Shift; + ZeroBits |= Shift; + } + Shift >>= 1; + Mask >>= Shift; + } + return ZeroBits; + } +}; + +#if __GNUC__ >= 4 || defined(_MSC_VER) +template struct TrailingZerosCounter { + static std::size_t count(T Val, ZeroBehavior ZB) { + if (ZB != ZB_Undefined && Val == 0) + return 32; + +#if __has_builtin(__builtin_ctz) || LLVM_GNUC_PREREQ(4, 0, 0) + return __builtin_ctz(Val); +#elif defined(_MSC_VER) + unsigned long Index; + _BitScanForward(&Index, Val); + return Index; +#endif + } +}; + +#if !defined(_MSC_VER) || defined(_M_X64) +template struct TrailingZerosCounter { + static std::size_t count(T Val, ZeroBehavior ZB) { + if (ZB != ZB_Undefined && Val == 0) + return 64; + +#if __has_builtin(__builtin_ctzll) || LLVM_GNUC_PREREQ(4, 0, 0) + return __builtin_ctzll(Val); +#elif defined(_MSC_VER) + unsigned long Index; + _BitScanForward64(&Index, Val); + return Index; +#endif + } +}; +#endif +#endif +} // namespace detail + +/// \brief Count number of 0's from the least significant bit to the most +/// stopping at the first 1. +/// +/// Only unsigned integral types are allowed. +/// +/// \param ZB the behavior on an input of 0. Only ZB_Width and ZB_Undefined are +/// valid arguments. +template +std::size_t countTrailingZeros(T Val, ZeroBehavior ZB = ZB_Width) { + static_assert(std::numeric_limits::is_integer && + !std::numeric_limits::is_signed, + "Only unsigned integral types are allowed."); + return detail::TrailingZerosCounter::count(Val, ZB); +} + +namespace detail { +template struct LeadingZerosCounter { + static std::size_t count(T Val, ZeroBehavior) { + if (!Val) + return std::numeric_limits::digits; + + // Bisection method. + std::size_t ZeroBits = 0; + for (T Shift = std::numeric_limits::digits >> 1; Shift; Shift >>= 1) { + T Tmp = Val >> Shift; + if (Tmp) + Val = Tmp; + else + ZeroBits |= Shift; + } + return ZeroBits; + } +}; + +#if __GNUC__ >= 4 || defined(_MSC_VER) +template struct LeadingZerosCounter { + static std::size_t count(T Val, ZeroBehavior ZB) { + if (ZB != ZB_Undefined && Val == 0) + return 32; + +#if __has_builtin(__builtin_clz) || LLVM_GNUC_PREREQ(4, 0, 0) + return __builtin_clz(Val); +#elif defined(_MSC_VER) + unsigned long Index; + _BitScanReverse(&Index, Val); + return Index ^ 31; +#endif + } +}; + +#if !defined(_MSC_VER) || defined(_M_X64) +template struct LeadingZerosCounter { + static std::size_t count(T Val, ZeroBehavior ZB) { + if (ZB != ZB_Undefined && Val == 0) + return 64; + +#if __has_builtin(__builtin_clzll) || LLVM_GNUC_PREREQ(4, 0, 0) + return __builtin_clzll(Val); +#elif defined(_MSC_VER) + unsigned long Index; + _BitScanReverse64(&Index, Val); + return Index ^ 63; +#endif + } +}; +#endif +#endif +} // namespace detail + +/// \brief Count number of 0's from the most significant bit to the least +/// stopping at the first 1. +/// +/// Only unsigned integral types are allowed. +/// +/// \param ZB the behavior on an input of 0. Only ZB_Width and ZB_Undefined are +/// valid arguments. +template +std::size_t countLeadingZeros(T Val, ZeroBehavior ZB = ZB_Width) { + static_assert(std::numeric_limits::is_integer && + !std::numeric_limits::is_signed, + "Only unsigned integral types are allowed."); + return detail::LeadingZerosCounter::count(Val, ZB); +} + +/// \brief Get the index of the first set bit starting from the least +/// significant bit. +/// +/// Only unsigned integral types are allowed. +/// +/// \param ZB the behavior on an input of 0. Only ZB_Max and ZB_Undefined are +/// valid arguments. +template T findFirstSet(T Val, ZeroBehavior ZB = ZB_Max) { + if (ZB == ZB_Max && Val == 0) + return std::numeric_limits::max(); + + return countTrailingZeros(Val, ZB_Undefined); +} + +/// \brief Get the index of the last set bit starting from the least +/// significant bit. +/// +/// Only unsigned integral types are allowed. +/// +/// \param ZB the behavior on an input of 0. Only ZB_Max and ZB_Undefined are +/// valid arguments. +template T findLastSet(T Val, ZeroBehavior ZB = ZB_Max) { + if (ZB == ZB_Max && Val == 0) + return std::numeric_limits::max(); + + // Use ^ instead of - because both gcc and llvm can remove the associated ^ + // in the __builtin_clz intrinsic on x86. + return countLeadingZeros(Val, ZB_Undefined) ^ + (std::numeric_limits::digits - 1); +} + +/// \brief Macro compressed bit reversal table for 256 bits. +/// +/// http://graphics.stanford.edu/~seander/bithacks.html#BitReverseTable +static const unsigned char BitReverseTable256[256] = { +#define R2(n) n, n + 2 * 64, n + 1 * 64, n + 3 * 64 +#define R4(n) R2(n), R2(n + 2 * 16), R2(n + 1 * 16), R2(n + 3 * 16) +#define R6(n) R4(n), R4(n + 2 * 4), R4(n + 1 * 4), R4(n + 3 * 4) + R6(0), R6(2), R6(1), R6(3) +#undef R2 +#undef R4 +#undef R6 +}; + +/// \brief Reverse the bits in \p Val. +template +T reverseBits(T Val) { + unsigned char in[sizeof(Val)]; + unsigned char out[sizeof(Val)]; + std::memcpy(in, &Val, sizeof(Val)); + for (unsigned i = 0; i < sizeof(Val); ++i) + out[(sizeof(Val) - i) - 1] = BitReverseTable256[in[i]]; + std::memcpy(&Val, out, sizeof(Val)); + return Val; +} + +// NOTE: The following support functions use the _32/_64 extensions instead of +// type overloading so that signed and unsigned integers can be used without +// ambiguity. + +/// Hi_32 - This function returns the high 32 bits of a 64 bit value. +inline uint32_t Hi_32(uint64_t Value) { + return static_cast(Value >> 32); +} + +/// Lo_32 - This function returns the low 32 bits of a 64 bit value. +inline uint32_t Lo_32(uint64_t Value) { + return static_cast(Value); +} + +/// Make_64 - This functions makes a 64-bit integer from a high / low pair of +/// 32-bit integers. +inline uint64_t Make_64(uint32_t High, uint32_t Low) { + return ((uint64_t)High << 32) | (uint64_t)Low; +} + +/// isInt - Checks if an integer fits into the given bit width. +template +inline bool isInt(int64_t x) { + return N >= 64 || (-(INT64_C(1)<<(N-1)) <= x && x < (INT64_C(1)<<(N-1))); +} +// Template specializations to get better code for common cases. +template<> +inline bool isInt<8>(int64_t x) { + return static_cast(x) == x; +} +template<> +inline bool isInt<16>(int64_t x) { + return static_cast(x) == x; +} +template<> +inline bool isInt<32>(int64_t x) { + return static_cast(x) == x; +} + +/// isShiftedInt - Checks if a signed integer is an N bit number shifted +/// left by S. +template +inline bool isShiftedInt(int64_t x) { + return isInt(x) && (x % (1< +inline bool isUInt(uint64_t x) { + return N >= 64 || x < (UINT64_C(1)<<(N)); +} +// Template specializations to get better code for common cases. +template<> +inline bool isUInt<8>(uint64_t x) { + return static_cast(x) == x; +} +template<> +inline bool isUInt<16>(uint64_t x) { + return static_cast(x) == x; +} +template<> +inline bool isUInt<32>(uint64_t x) { + return static_cast(x) == x; +} + +/// isShiftedUInt - Checks if a unsigned integer is an N bit number shifted +/// left by S. +template +inline bool isShiftedUInt(uint64_t x) { + return isUInt(x) && (x % (1<= 64 || x < (UINT64_C(1)<<(N)); +} + +/// isIntN - Checks if an signed integer fits into the given (dynamic) +/// bit width. +inline bool isIntN(unsigned N, int64_t x) { + return N >= 64 || (-(INT64_C(1)<<(N-1)) <= x && x < (INT64_C(1)<<(N-1))); +} + +/// isMask_32 - This function returns true if the argument is a non-empty +/// sequence of ones starting at the least significant bit with the remainder +/// zero (32 bit version). Ex. isMask_32(0x0000FFFFU) == true. +inline bool isMask_32(uint32_t Value) { + return Value && ((Value + 1) & Value) == 0; +} + +/// isMask_64 - This function returns true if the argument is a non-empty +/// sequence of ones starting at the least significant bit with the remainder +/// zero (64 bit version). +inline bool isMask_64(uint64_t Value) { + return Value && ((Value + 1) & Value) == 0; +} + +/// isShiftedMask_32 - This function returns true if the argument contains a +/// non-empty sequence of ones with the remainder zero (32 bit version.) +/// Ex. isShiftedMask_32(0x0000FF00U) == true. +inline bool isShiftedMask_32(uint32_t Value) { + return Value && isMask_32((Value - 1) | Value); +} + +/// isShiftedMask_64 - This function returns true if the argument contains a +/// non-empty sequence of ones with the remainder zero (64 bit version.) +inline bool isShiftedMask_64(uint64_t Value) { + return Value && isMask_64((Value - 1) | Value); +} + +/// isPowerOf2_32 - This function returns true if the argument is a power of +/// two > 0. Ex. isPowerOf2_32(0x00100000U) == true (32 bit edition.) +inline bool isPowerOf2_32(uint32_t Value) { + return Value && !(Value & (Value - 1)); +} + +/// isPowerOf2_64 - This function returns true if the argument is a power of two +/// > 0 (64 bit edition.) +inline bool isPowerOf2_64(uint64_t Value) { + return Value && !(Value & (Value - int64_t(1L))); +} + +/// ByteSwap_16 - This function returns a byte-swapped representation of the +/// 16-bit argument, Value. +inline uint16_t ByteSwap_16(uint16_t Value) { + return sys::SwapByteOrder_16(Value); +} + +/// ByteSwap_32 - This function returns a byte-swapped representation of the +/// 32-bit argument, Value. +inline uint32_t ByteSwap_32(uint32_t Value) { + return sys::SwapByteOrder_32(Value); +} + +/// ByteSwap_64 - This function returns a byte-swapped representation of the +/// 64-bit argument, Value. +inline uint64_t ByteSwap_64(uint64_t Value) { + return sys::SwapByteOrder_64(Value); +} + +/// \brief Count the number of ones from the most significant bit to the first +/// zero bit. +/// +/// Ex. CountLeadingOnes(0xFF0FFF00) == 8. +/// Only unsigned integral types are allowed. +/// +/// \param ZB the behavior on an input of all ones. Only ZB_Width and +/// ZB_Undefined are valid arguments. +template +std::size_t countLeadingOnes(T Value, ZeroBehavior ZB = ZB_Width) { + static_assert(std::numeric_limits::is_integer && + !std::numeric_limits::is_signed, + "Only unsigned integral types are allowed."); + return countLeadingZeros(~Value, ZB); +} + +/// \brief Count the number of ones from the least significant bit to the first +/// zero bit. +/// +/// Ex. countTrailingOnes(0x00FF00FF) == 8. +/// Only unsigned integral types are allowed. +/// +/// \param ZB the behavior on an input of all ones. Only ZB_Width and +/// ZB_Undefined are valid arguments. +template +std::size_t countTrailingOnes(T Value, ZeroBehavior ZB = ZB_Width) { + static_assert(std::numeric_limits::is_integer && + !std::numeric_limits::is_signed, + "Only unsigned integral types are allowed."); + return countTrailingZeros(~Value, ZB); +} + +namespace detail { +template struct PopulationCounter { + static unsigned count(T Value) { + // Generic version, forward to 32 bits. + static_assert(SizeOfT <= 4, "Not implemented!"); +#if __GNUC__ >= 4 + return __builtin_popcount(Value); +#else + uint32_t v = Value; + v = v - ((v >> 1) & 0x55555555); + v = (v & 0x33333333) + ((v >> 2) & 0x33333333); + return ((v + (v >> 4) & 0xF0F0F0F) * 0x1010101) >> 24; +#endif + } +}; + +template struct PopulationCounter { + static unsigned count(T Value) { +#if __GNUC__ >= 4 + return __builtin_popcountll(Value); +#else + uint64_t v = Value; + v = v - ((v >> 1) & 0x5555555555555555ULL); + v = (v & 0x3333333333333333ULL) + ((v >> 2) & 0x3333333333333333ULL); + v = (v + (v >> 4)) & 0x0F0F0F0F0F0F0F0FULL; + return unsigned((uint64_t)(v * 0x0101010101010101ULL) >> 56); +#endif + } +}; +} // namespace detail + +/// \brief Count the number of set bits in a value. +/// Ex. countPopulation(0xF000F000) = 8 +/// Returns 0 if the word is zero. +template +inline unsigned countPopulation(T Value) { + static_assert(std::numeric_limits::is_integer && + !std::numeric_limits::is_signed, + "Only unsigned integral types are allowed."); + return detail::PopulationCounter::count(Value); +} + +/// Log2 - This function returns the log base 2 of the specified value +inline double Log2(double Value) { +#if defined(__ANDROID_API__) && __ANDROID_API__ < 18 + return __builtin_log(Value) / __builtin_log(2.0); +#else + return log2(Value); +#endif +} + +/// Log2_32 - This function returns the floor log base 2 of the specified value, +/// -1 if the value is zero. (32 bit edition.) +/// Ex. Log2_32(32) == 5, Log2_32(1) == 0, Log2_32(0) == -1, Log2_32(6) == 2 +inline unsigned Log2_32(uint32_t Value) { + return 31 - countLeadingZeros(Value); +} + +/// Log2_64 - This function returns the floor log base 2 of the specified value, +/// -1 if the value is zero. (64 bit edition.) +inline unsigned Log2_64(uint64_t Value) { + return 63 - countLeadingZeros(Value); +} + +/// Log2_32_Ceil - This function returns the ceil log base 2 of the specified +/// value, 32 if the value is zero. (32 bit edition). +/// Ex. Log2_32_Ceil(32) == 5, Log2_32_Ceil(1) == 0, Log2_32_Ceil(6) == 3 +inline unsigned Log2_32_Ceil(uint32_t Value) { + return 32 - countLeadingZeros(Value - 1); +} + +/// Log2_64_Ceil - This function returns the ceil log base 2 of the specified +/// value, 64 if the value is zero. (64 bit edition.) +inline unsigned Log2_64_Ceil(uint64_t Value) { + return 64 - countLeadingZeros(Value - 1); +} + +/// GreatestCommonDivisor64 - Return the greatest common divisor of the two +/// values using Euclid's algorithm. +inline uint64_t GreatestCommonDivisor64(uint64_t A, uint64_t B) { + while (B) { + uint64_t T = B; + B = A % B; + A = T; + } + return A; +} + +/// BitsToDouble - This function takes a 64-bit integer and returns the bit +/// equivalent double. +inline double BitsToDouble(uint64_t Bits) { + union { + uint64_t L; + double D; + } T; + T.L = Bits; + return T.D; +} + +/// BitsToFloat - This function takes a 32-bit integer and returns the bit +/// equivalent float. +inline float BitsToFloat(uint32_t Bits) { + union { + uint32_t I; + float F; + } T; + T.I = Bits; + return T.F; +} + +/// DoubleToBits - This function takes a double and returns the bit +/// equivalent 64-bit integer. Note that copying doubles around +/// changes the bits of NaNs on some hosts, notably x86, so this +/// routine cannot be used if these bits are needed. +inline uint64_t DoubleToBits(double Double) { + union { + uint64_t L; + double D; + } T; + T.D = Double; + return T.L; +} + +/// FloatToBits - This function takes a float and returns the bit +/// equivalent 32-bit integer. Note that copying floats around +/// changes the bits of NaNs on some hosts, notably x86, so this +/// routine cannot be used if these bits are needed. +inline uint32_t FloatToBits(float Float) { + union { + uint32_t I; + float F; + } T; + T.F = Float; + return T.I; +} + +/// MinAlign - A and B are either alignments or offsets. Return the minimum +/// alignment that may be assumed after adding the two together. +inline uint64_t MinAlign(uint64_t A, uint64_t B) { + // The largest power of 2 that divides both A and B. + // + // Replace "-Value" by "1+~Value" in the following commented code to avoid + // MSVC warning C4146 + // return (A | B) & -(A | B); + return (A | B) & (1 + ~(A | B)); +} + +/// \brief Aligns \c Addr to \c Alignment bytes, rounding up. +/// +/// Alignment should be a power of two. This method rounds up, so +/// alignAddr(7, 4) == 8 and alignAddr(8, 4) == 8. +inline uintptr_t alignAddr(const void *Addr, size_t Alignment) { + assert(Alignment && isPowerOf2_64((uint64_t)Alignment) && + "Alignment is not a power of two!"); + + assert((uintptr_t)Addr + Alignment - 1 >= (uintptr_t)Addr); + + return (((uintptr_t)Addr + Alignment - 1) & ~(uintptr_t)(Alignment - 1)); +} + +/// \brief Returns the necessary adjustment for aligning \c Ptr to \c Alignment +/// bytes, rounding up. +inline size_t alignmentAdjustment(const void *Ptr, size_t Alignment) { + return alignAddr(Ptr, Alignment) - (uintptr_t)Ptr; +} + +/// NextPowerOf2 - Returns the next power of two (in 64-bits) +/// that is strictly greater than A. Returns zero on overflow. +inline uint64_t NextPowerOf2(uint64_t A) { + A |= (A >> 1); + A |= (A >> 2); + A |= (A >> 4); + A |= (A >> 8); + A |= (A >> 16); + A |= (A >> 32); + return A + 1; +} + +/// Returns the power of two which is less than or equal to the given value. +/// Essentially, it is a floor operation across the domain of powers of two. +inline uint64_t PowerOf2Floor(uint64_t A) { + if (!A) return 0; + return 1ull << (63 - countLeadingZeros(A, ZB_Undefined)); +} + +/// Returns the next integer (mod 2**64) that is greater than or equal to +/// \p Value and is a multiple of \p Align. \p Align must be non-zero. +/// +/// If non-zero \p Skew is specified, the return value will be a minimal +/// integer that is greater than or equal to \p Value and equal to +/// \p Align * N + \p Skew for some integer N. If \p Skew is larger than +/// \p Align, its value is adjusted to '\p Skew mod \p Align'. +/// +/// Examples: +/// \code +/// alignTo(5, 8) = 8 +/// alignTo(17, 8) = 24 +/// alignTo(~0LL, 8) = 0 +/// alignTo(321, 255) = 510 +/// +/// alignTo(5, 8, 7) = 7 +/// alignTo(17, 8, 1) = 17 +/// alignTo(~0LL, 8, 3) = 3 +/// alignTo(321, 255, 42) = 552 +/// \endcode +inline uint64_t alignTo(uint64_t Value, uint64_t Align, uint64_t Skew = 0) { + Skew %= Align; + return (Value + Align - 1 - Skew) / Align * Align + Skew; +} + +/// Returns the offset to the next integer (mod 2**64) that is greater than +/// or equal to \p Value and is a multiple of \p Align. \p Align must be +/// non-zero. +inline uint64_t OffsetToAlignment(uint64_t Value, uint64_t Align) { + return alignTo(Value, Align) - Value; +} + +/// SignExtend32 - Sign extend B-bit number x to 32-bit int. +/// Usage int32_t r = SignExtend32<5>(x); +template inline int32_t SignExtend32(uint32_t x) { + return int32_t(x << (32 - B)) >> (32 - B); +} + +/// \brief Sign extend number in the bottom B bits of X to a 32-bit int. +/// Requires 0 < B <= 32. +inline int32_t SignExtend32(uint32_t X, unsigned B) { + return int32_t(X << (32 - B)) >> (32 - B); +} + +/// SignExtend64 - Sign extend B-bit number x to 64-bit int. +/// Usage int64_t r = SignExtend64<5>(x); +template inline int64_t SignExtend64(uint64_t x) { + return int64_t(x << (64 - B)) >> (64 - B); +} + +/// \brief Sign extend number in the bottom B bits of X to a 64-bit int. +/// Requires 0 < B <= 64. +inline int64_t SignExtend64(uint64_t X, unsigned B) { + return int64_t(X << (64 - B)) >> (64 - B); +} + +/// \brief Add two unsigned integers, X and Y, of type T. +/// Clamp the result to the maximum representable value of T on overflow. +/// ResultOverflowed indicates if the result is larger than the maximum +/// representable value of type T. +template +typename std::enable_if::value, T>::type +SaturatingAdd(T X, T Y, bool *ResultOverflowed = nullptr) { + bool Dummy; + bool &Overflowed = ResultOverflowed ? *ResultOverflowed : Dummy; + // Hacker's Delight, p. 29 + T Z = X + Y; + Overflowed = (Z < X || Z < Y); + if (Overflowed) + return std::numeric_limits::max(); + else + return Z; +} + +/// \brief Multiply two unsigned integers, X and Y, of type T. +/// Clamp the result to the maximum representable value of T on overflow. +/// ResultOverflowed indicates if the result is larger than the maximum +/// representable value of type T. +template +typename std::enable_if::value, T>::type +SaturatingMultiply(T X, T Y, bool *ResultOverflowed = nullptr) { + bool Dummy; + bool &Overflowed = ResultOverflowed ? *ResultOverflowed : Dummy; + + // Hacker's Delight, p. 30 has a different algorithm, but we don't use that + // because it fails for uint16_t (where multiplication can have undefined + // behavior due to promotion to int), and requires a division in addition + // to the multiplication. + + Overflowed = false; + + // Log2(Z) would be either Log2Z or Log2Z + 1. + // Special case: if X or Y is 0, Log2_64 gives -1, and Log2Z + // will necessarily be less than Log2Max as desired. + int Log2Z = Log2_64(X) + Log2_64(Y); + const T Max = std::numeric_limits::max(); + int Log2Max = Log2_64(Max); + if (Log2Z < Log2Max) { + return X * Y; + } + if (Log2Z > Log2Max) { + Overflowed = true; + return Max; + } + + // We're going to use the top bit, and maybe overflow one + // bit past it. Multiply all but the bottom bit then add + // that on at the end. + T Z = (X >> 1) * Y; + if (Z & ~(Max >> 1)) { + Overflowed = true; + return Max; + } + Z <<= 1; + if (X & 1) + return SaturatingAdd(Z, Y, ResultOverflowed); + + return Z; +} + +/// \brief Multiply two unsigned integers, X and Y, and add the unsigned +/// integer, A to the product. Clamp the result to the maximum representable +/// value of T on overflow. ResultOverflowed indicates if the result is larger +/// than the maximum representable value of type T. +/// Note that this is purely a convenience function as there is no distinction +/// where overflow occurred in a 'fused' multiply-add for unsigned numbers. +template +typename std::enable_if::value, T>::type +SaturatingMultiplyAdd(T X, T Y, T A, bool *ResultOverflowed = nullptr) { + bool Dummy; + bool &Overflowed = ResultOverflowed ? *ResultOverflowed : Dummy; + + T Product = SaturatingMultiply(X, Y, &Overflowed); + if (Overflowed) + return Product; + + return SaturatingAdd(A, Product, &Overflowed); +} + +extern const float huge_valf; +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/Support/Memory.h b/llvm/include/llvm/Support/Memory.h new file mode 100644 index 0000000..7e5f8ee --- /dev/null +++ b/llvm/include/llvm/Support/Memory.h @@ -0,0 +1,186 @@ +//===- llvm/Support/Memory.h - Memory Support -------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the llvm_ks::sys::Memory class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_MEMORY_H +#define LLVM_SUPPORT_MEMORY_H + +#include "llvm/Support/DataTypes.h" +#include +#include + +namespace llvm_ks { +namespace sys { + + /// This class encapsulates the notion of a memory block which has an address + /// and a size. It is used by the Memory class (a friend) as the result of + /// various memory allocation operations. + /// @see Memory + /// @brief Memory block abstraction. + class MemoryBlock { + public: + MemoryBlock() : Address(nullptr), Size(0) { } + MemoryBlock(void *addr, size_t size) : Address(addr), Size(size) { } + void *base() const { return Address; } + size_t size() const { return Size; } + + private: + void *Address; ///< Address of first byte of memory area + size_t Size; ///< Size, in bytes of the memory area + friend class Memory; + }; + + /// This class provides various memory handling functions that manipulate + /// MemoryBlock instances. + /// @since 1.4 + /// @brief An abstraction for memory operations. + class Memory { + public: + enum ProtectionFlags { + MF_READ = 0x1000000, + MF_WRITE = 0x2000000, + MF_EXEC = 0x4000000 + }; + + /// This method allocates a block of memory that is suitable for loading + /// dynamically generated code (e.g. JIT). An attempt to allocate + /// \p NumBytes bytes of virtual memory is made. + /// \p NearBlock may point to an existing allocation in which case + /// an attempt is made to allocate more memory near the existing block. + /// The actual allocated address is not guaranteed to be near the requested + /// address. + /// \p Flags is used to set the initial protection flags for the block + /// of the memory. + /// \p EC [out] returns an object describing any error that occurs. + /// + /// This method may allocate more than the number of bytes requested. The + /// actual number of bytes allocated is indicated in the returned + /// MemoryBlock. + /// + /// The start of the allocated block must be aligned with the + /// system allocation granularity (64K on Windows, page size on Linux). + /// If the address following \p NearBlock is not so aligned, it will be + /// rounded up to the next allocation granularity boundary. + /// + /// \r a non-null MemoryBlock if the function was successful, + /// otherwise a null MemoryBlock is with \p EC describing the error. + /// + /// @brief Allocate mapped memory. + static MemoryBlock allocateMappedMemory(size_t NumBytes, + const MemoryBlock *const NearBlock, + unsigned Flags, + std::error_code &EC); + + /// This method releases a block of memory that was allocated with the + /// allocateMappedMemory method. It should not be used to release any + /// memory block allocated any other way. + /// \p Block describes the memory to be released. + /// + /// \r error_success if the function was successful, or an error_code + /// describing the failure if an error occurred. + /// + /// @brief Release mapped memory. + static std::error_code releaseMappedMemory(MemoryBlock &Block); + + /// This method sets the protection flags for a block of memory to the + /// state specified by /p Flags. The behavior is not specified if the + /// memory was not allocated using the allocateMappedMemory method. + /// \p Block describes the memory block to be protected. + /// \p Flags specifies the new protection state to be assigned to the block. + /// \p ErrMsg [out] returns a string describing any error that occurred. + /// + /// If \p Flags is MF_WRITE, the actual behavior varies + /// with the operating system (i.e. MF_READ | MF_WRITE on Windows) and the + /// target architecture (i.e. MF_WRITE -> MF_READ | MF_WRITE on i386). + /// + /// \r error_success if the function was successful, or an error_code + /// describing the failure if an error occurred. + /// + /// @brief Set memory protection state. + static std::error_code protectMappedMemory(const MemoryBlock &Block, + unsigned Flags); + + /// This method allocates a block of Read/Write/Execute memory that is + /// suitable for executing dynamically generated code (e.g. JIT). An + /// attempt to allocate \p NumBytes bytes of virtual memory is made. + /// \p NearBlock may point to an existing allocation in which case + /// an attempt is made to allocate more memory near the existing block. + /// + /// On success, this returns a non-null memory block, otherwise it returns + /// a null memory block and fills in *ErrMsg. + /// + /// @brief Allocate Read/Write/Execute memory. + static MemoryBlock AllocateRWX(size_t NumBytes, + const MemoryBlock *NearBlock, + std::string *ErrMsg = nullptr); + + /// This method releases a block of Read/Write/Execute memory that was + /// allocated with the AllocateRWX method. It should not be used to + /// release any memory block allocated any other way. + /// + /// On success, this returns false, otherwise it returns true and fills + /// in *ErrMsg. + /// @brief Release Read/Write/Execute memory. + static bool ReleaseRWX(MemoryBlock &block, std::string *ErrMsg = nullptr); + + /// InvalidateInstructionCache - Before the JIT can run a block of code + /// that has been emitted it must invalidate the instruction cache on some + /// platforms. + static void InvalidateInstructionCache(const void *Addr, size_t Len); + + /// setExecutable - Before the JIT can run a block of code, it has to be + /// given read and executable privilege. Return true if it is already r-x + /// or the system is able to change its previlege. + static bool setExecutable(MemoryBlock &M, std::string *ErrMsg = nullptr); + + /// setWritable - When adding to a block of code, the JIT may need + /// to mark a block of code as RW since the protections are on page + /// boundaries, and the JIT internal allocations are not page aligned. + static bool setWritable(MemoryBlock &M, std::string *ErrMsg = nullptr); + + /// setRangeExecutable - Mark the page containing a range of addresses + /// as executable. + static bool setRangeExecutable(const void *Addr, size_t Size); + + /// setRangeWritable - Mark the page containing a range of addresses + /// as writable. + static bool setRangeWritable(const void *Addr, size_t Size); + }; + + /// Owning version of MemoryBlock. + class OwningMemoryBlock { + public: + OwningMemoryBlock() = default; + explicit OwningMemoryBlock(MemoryBlock M) : M(M) {} + OwningMemoryBlock(OwningMemoryBlock &&Other) { + M = Other.M; + Other.M = MemoryBlock(); + } + OwningMemoryBlock& operator=(OwningMemoryBlock &&Other) { + M = Other.M; + Other.M = MemoryBlock(); + return *this; + } + ~OwningMemoryBlock() { + Memory::releaseMappedMemory(M); + } + void *base() const { return M.base(); } + size_t size() const { return M.size(); } + MemoryBlock getMemoryBlock() const { return M; } + private: + MemoryBlock M; + }; + +} +} + +#endif diff --git a/llvm/include/llvm/Support/MemoryBuffer.h b/llvm/include/llvm/Support/MemoryBuffer.h new file mode 100644 index 0000000..837fba6 --- /dev/null +++ b/llvm/include/llvm/Support/MemoryBuffer.h @@ -0,0 +1,173 @@ +//===--- MemoryBuffer.h - Memory Buffer Interface ---------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the MemoryBuffer interface. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_MEMORYBUFFER_H +#define LLVM_SUPPORT_MEMORYBUFFER_H + +#include "llvm/ADT/Twine.h" +#include "llvm/Support/CBindingWrapping.h" +#include "llvm/Support/DataTypes.h" +#include "llvm/Support/ErrorOr.h" +#include + +namespace llvm_ks { +class MemoryBufferRef; + +/// This interface provides simple read-only access to a block of memory, and +/// provides simple methods for reading files and standard input into a memory +/// buffer. In addition to basic access to the characters in the file, this +/// interface guarantees you can read one character past the end of the file, +/// and that this character will read as '\0'. +/// +/// The '\0' guarantee is needed to support an optimization -- it's intended to +/// be more efficient for clients which are reading all the data to stop +/// reading when they encounter a '\0' than to continually check the file +/// position to see if it has reached the end of the file. +class MemoryBuffer { + const char *BufferStart; // Start of the buffer. + const char *BufferEnd; // End of the buffer. + + MemoryBuffer(const MemoryBuffer &) = delete; + MemoryBuffer &operator=(const MemoryBuffer &) = delete; +protected: + MemoryBuffer() {} + void init(const char *BufStart, const char *BufEnd, + bool RequiresNullTerminator); +public: + virtual ~MemoryBuffer(); + + const char *getBufferStart() const { return BufferStart; } + const char *getBufferEnd() const { return BufferEnd; } + size_t getBufferSize() const { return BufferEnd-BufferStart; } + + StringRef getBuffer() const { + return StringRef(BufferStart, getBufferSize()); + } + + /// Return an identifier for this buffer, typically the filename it was read + /// from. + virtual const char *getBufferIdentifier() const { + return "Unknown buffer"; + } + + /// Open the specified file as a MemoryBuffer, returning a new MemoryBuffer + /// if successful, otherwise returning null. If FileSize is specified, this + /// means that the client knows that the file exists and that it has the + /// specified size. + /// + /// \param IsVolatileSize Set to true to indicate that the file size may be + /// changing, e.g. when libclang tries to parse while the user is + /// editing/updating the file. + static ErrorOr> + getFile(const Twine &Filename, int64_t FileSize = -1, + bool RequiresNullTerminator = true, bool IsVolatileSize = false); + + /// Given an already-open file descriptor, map some slice of it into a + /// MemoryBuffer. The slice is specified by an \p Offset and \p MapSize. + /// Since this is in the middle of a file, the buffer is not null terminated. + static ErrorOr> + getOpenFileSlice(int FD, const Twine &Filename, uint64_t MapSize, + int64_t Offset); + + /// Given an already-open file descriptor, read the file and return a + /// MemoryBuffer. + /// + /// \param IsVolatileSize Set to true to indicate that the file size may be + /// changing, e.g. when libclang tries to parse while the user is + /// editing/updating the file. + static ErrorOr> + getOpenFile(int FD, const Twine &Filename, uint64_t FileSize, + bool RequiresNullTerminator = true, bool IsVolatileSize = false); + + /// Open the specified memory range as a MemoryBuffer. Note that InputData + /// must be null terminated if RequiresNullTerminator is true. + static std::unique_ptr + getMemBuffer(StringRef InputData, StringRef BufferName = "", + bool RequiresNullTerminator = true); + + static std::unique_ptr + getMemBuffer(MemoryBufferRef Ref, bool RequiresNullTerminator = true); + + /// Open the specified memory range as a MemoryBuffer, copying the contents + /// and taking ownership of it. InputData does not have to be null terminated. + static std::unique_ptr + getMemBufferCopy(StringRef InputData, const Twine &BufferName = ""); + + /// Allocate a new zero-initialized MemoryBuffer of the specified size. Note + /// that the caller need not initialize the memory allocated by this method. + /// The memory is owned by the MemoryBuffer object. + static std::unique_ptr + getNewMemBuffer(size_t Size, StringRef BufferName = ""); + + /// Allocate a new MemoryBuffer of the specified size that is not initialized. + /// Note that the caller should initialize the memory allocated by this + /// method. The memory is owned by the MemoryBuffer object. + static std::unique_ptr + getNewUninitMemBuffer(size_t Size, const Twine &BufferName = ""); + + /// Read all of stdin into a file buffer, and return it. + static ErrorOr> getSTDIN(); + + /// Open the specified file as a MemoryBuffer, or open stdin if the Filename + /// is "-". + static ErrorOr> + getFileOrSTDIN(const Twine &Filename, int64_t FileSize = -1, + bool RequiresNullTerminator = true); + + /// Map a subrange of the specified file as a MemoryBuffer. + static ErrorOr> + getFileSlice(const Twine &Filename, uint64_t MapSize, uint64_t Offset); + + //===--------------------------------------------------------------------===// + // Provided for performance analysis. + //===--------------------------------------------------------------------===// + + /// The kind of memory backing used to support the MemoryBuffer. + enum BufferKind { + MemoryBuffer_Malloc, + MemoryBuffer_MMap + }; + + /// Return information on the memory mechanism used to support the + /// MemoryBuffer. + virtual BufferKind getBufferKind() const = 0; + + MemoryBufferRef getMemBufferRef() const; +}; + +class MemoryBufferRef { + StringRef Buffer; + StringRef Identifier; + +public: + MemoryBufferRef() {} + MemoryBufferRef(MemoryBuffer& Buffer) + : Buffer(Buffer.getBuffer()), Identifier(Buffer.getBufferIdentifier()) {} + MemoryBufferRef(StringRef Buffer, StringRef Identifier) + : Buffer(Buffer), Identifier(Identifier) {} + + StringRef getBuffer() const { return Buffer; } + + StringRef getBufferIdentifier() const { return Identifier; } + + const char *getBufferStart() const { return Buffer.begin(); } + const char *getBufferEnd() const { return Buffer.end(); } + size_t getBufferSize() const { return Buffer.size(); } +}; + +// Create wrappers for C Binding types (see CBindingWrapping.h). +DEFINE_SIMPLE_CONVERSION_FUNCTIONS(MemoryBuffer, LLVMMemoryBufferRef) + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/Support/MemoryObject.h b/llvm/include/llvm/Support/MemoryObject.h new file mode 100644 index 0000000..e215872 --- /dev/null +++ b/llvm/include/llvm/Support/MemoryObject.h @@ -0,0 +1,68 @@ +//===- MemoryObject.h - Abstract memory interface ---------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_MEMORYOBJECT_H +#define LLVM_SUPPORT_MEMORYOBJECT_H + +#include "llvm/Support/DataTypes.h" + +namespace llvm_ks { + +/// Interface to data which might be streamed. Streamability has 2 important +/// implications/restrictions. First, the data might not yet exist in memory +/// when the request is made. This just means that readByte/readBytes might have +/// to block or do some work to get it. More significantly, the exact size of +/// the object might not be known until it has all been fetched. This means that +/// to return the right result, getExtent must also wait for all the data to +/// arrive; therefore it should not be called on objects which are actually +/// streamed (this would defeat the purpose of streaming). Instead, +/// isValidAddress can be used to test addresses without knowing the exact size +/// of the stream. Finally, getPointer can be used instead of readBytes to avoid +/// extra copying. +class MemoryObject { +public: + virtual ~MemoryObject(); + + /// Returns the size of the region in bytes. (The region is contiguous, so + /// the highest valid address of the region is getExtent() - 1). + /// + /// @result - The size of the region. + virtual uint64_t getExtent() const = 0; + + /// Tries to read a contiguous range of bytes from the region, up to the end + /// of the region. + /// + /// @param Buf - A pointer to a buffer to be filled in. Must be non-NULL + /// and large enough to hold size bytes. + /// @param Size - The number of bytes to copy. + /// @param Address - The address of the first byte, in the same space as + /// getBase(). + /// @result - The number of bytes read. + virtual uint64_t readBytes(uint8_t *Buf, uint64_t Size, + uint64_t Address) const = 0; + + /// Ensures that the requested data is in memory, and returns a pointer to it. + /// More efficient than using readBytes if the data is already in memory. May + /// block until (address - base + size) bytes have been read + /// @param address - address of the byte, in the same space as getBase() + /// @param size - amount of data that must be available on return + /// @result - valid pointer to the requested data + virtual const uint8_t *getPointer(uint64_t address, uint64_t size) const = 0; + + /// Returns true if the address is within the object (i.e. between base and + /// base + extent - 1 inclusive). May block until (address - base) bytes have + /// been read + /// @param address - address of the byte, in the same space as getBase() + /// @result - true if the address may be read with readByte() + virtual bool isValidAddress(uint64_t address) const = 0; +}; + +} + +#endif diff --git a/llvm/include/llvm/Support/MipsABIFlags.h b/llvm/include/llvm/Support/MipsABIFlags.h new file mode 100644 index 0000000..2e8ca36 --- /dev/null +++ b/llvm/include/llvm/Support/MipsABIFlags.h @@ -0,0 +1,102 @@ +//===--- MipsABIFlags.h - MIPS ABI flags ----------------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the constants for the ABI flags structure contained +// in the .MIPS.abiflags section. +// +// https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_MIPSABIFLAGS_H +#define LLVM_SUPPORT_MIPSABIFLAGS_H + +namespace llvm_ks { +namespace Mips { + +// Values for the xxx_size bytes of an ABI flags structure. +enum AFL_REG { + AFL_REG_NONE = 0x00, // No registers + AFL_REG_32 = 0x01, // 32-bit registers + AFL_REG_64 = 0x02, // 64-bit registers + AFL_REG_128 = 0x03 // 128-bit registers +}; + +// Masks for the ases word of an ABI flags structure. +enum AFL_ASE { + AFL_ASE_DSP = 0x00000001, // DSP ASE + AFL_ASE_DSPR2 = 0x00000002, // DSP R2 ASE + AFL_ASE_EVA = 0x00000004, // Enhanced VA Scheme + AFL_ASE_MCU = 0x00000008, // MCU (MicroController) ASE + AFL_ASE_MDMX = 0x00000010, // MDMX ASE + AFL_ASE_MIPS3D = 0x00000020, // MIPS-3D ASE + AFL_ASE_MT = 0x00000040, // MT ASE + AFL_ASE_SMARTMIPS = 0x00000080, // SmartMIPS ASE + AFL_ASE_VIRT = 0x00000100, // VZ ASE + AFL_ASE_MSA = 0x00000200, // MSA ASE + AFL_ASE_MIPS16 = 0x00000400, // MIPS16 ASE + AFL_ASE_MICROMIPS = 0x00000800, // MICROMIPS ASE + AFL_ASE_XPA = 0x00001000 // XPA ASE +}; + +// Values for the isa_ext word of an ABI flags structure. +enum AFL_EXT { + AFL_EXT_NONE = 0, // None + AFL_EXT_XLR = 1, // RMI Xlr instruction + AFL_EXT_OCTEON2 = 2, // Cavium Networks Octeon2 + AFL_EXT_OCTEONP = 3, // Cavium Networks OcteonP + AFL_EXT_LOONGSON_3A = 4, // Loongson 3A + AFL_EXT_OCTEON = 5, // Cavium Networks Octeon + AFL_EXT_5900 = 6, // MIPS R5900 instruction + AFL_EXT_4650 = 7, // MIPS R4650 instruction + AFL_EXT_4010 = 8, // LSI R4010 instruction + AFL_EXT_4100 = 9, // NEC VR4100 instruction + AFL_EXT_3900 = 10, // Toshiba R3900 instruction + AFL_EXT_10000 = 11, // MIPS R10000 instruction + AFL_EXT_SB1 = 12, // Broadcom SB-1 instruction + AFL_EXT_4111 = 13, // NEC VR4111/VR4181 instruction + AFL_EXT_4120 = 14, // NEC VR4120 instruction + AFL_EXT_5400 = 15, // NEC VR5400 instruction + AFL_EXT_5500 = 16, // NEC VR5500 instruction + AFL_EXT_LOONGSON_2E = 17, // ST Microelectronics Loongson 2E + AFL_EXT_LOONGSON_2F = 18, // ST Microelectronics Loongson 2F + AFL_EXT_OCTEON3 = 19 // Cavium Networks Octeon3 +}; + +// Values for the flags1 word of an ABI flags structure. +enum AFL_FLAGS1 { AFL_FLAGS1_ODDSPREG = 1 }; + +// MIPS object attribute tags +enum { + Tag_GNU_MIPS_ABI_FP = 4, // Floating-point ABI used by this object file + Tag_GNU_MIPS_ABI_MSA = 8, // MSA ABI used by this object file +}; + +// Values for the fp_abi word of an ABI flags structure +// and for the Tag_GNU_MIPS_ABI_FP attribute tag. +enum Val_GNU_MIPS_ABI_FP { + Val_GNU_MIPS_ABI_FP_ANY = 0, // not tagged + Val_GNU_MIPS_ABI_FP_DOUBLE = 1, // hard float / -mdouble-float + Val_GNU_MIPS_ABI_FP_SINGLE = 2, // hard float / -msingle-float + Val_GNU_MIPS_ABI_FP_SOFT = 3, // soft float + Val_GNU_MIPS_ABI_FP_OLD_64 = 4, // -mips32r2 -mfp64 + Val_GNU_MIPS_ABI_FP_XX = 5, // -mfpxx + Val_GNU_MIPS_ABI_FP_64 = 6, // -mips32r2 -mfp64 + Val_GNU_MIPS_ABI_FP_64A = 7 // -mips32r2 -mfp64 -mno-odd-spreg +}; + +// Values for the Tag_GNU_MIPS_ABI_MSA attribute tag. +enum Val_GNU_MIPS_ABI_MSA { + Val_GNU_MIPS_ABI_MSA_ANY = 0, // not tagged + Val_GNU_MIPS_ABI_MSA_128 = 1 // 128-bit MSA +}; +} +} + +#endif diff --git a/llvm/include/llvm/Support/Mutex.h b/llvm/include/llvm/Support/Mutex.h new file mode 100644 index 0000000..c2ac545 --- /dev/null +++ b/llvm/include/llvm/Support/Mutex.h @@ -0,0 +1,157 @@ +//===- llvm/Support/Mutex.h - Mutex Operating System Concept -----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the llvm_ks::sys::Mutex class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_MUTEX_H +#define LLVM_SUPPORT_MUTEX_H + +#include "llvm/Support/Compiler.h" +#include + +namespace llvm_ks +{ + namespace sys + { + /// @brief Platform agnostic Mutex class. + class MutexImpl + { + /// @name Constructors + /// @{ + public: + + /// Initializes the lock but doesn't acquire it. if \p recursive is set + /// to false, the lock will not be recursive which makes it cheaper but + /// also more likely to deadlock (same thread can't acquire more than + /// once). + /// @brief Default Constructor. + explicit MutexImpl(bool recursive = true); + + /// Releases and removes the lock + /// @brief Destructor + ~MutexImpl(); + + /// @} + /// @name Methods + /// @{ + public: + + /// Attempts to unconditionally acquire the lock. If the lock is held by + /// another thread, this method will wait until it can acquire the lock. + /// @returns false if any kind of error occurs, true otherwise. + /// @brief Unconditionally acquire the lock. + bool acquire(); + + /// Attempts to release the lock. If the lock is held by the current + /// thread, the lock is released allowing other threads to acquire the + /// lock. + /// @returns false if any kind of error occurs, true otherwise. + /// @brief Unconditionally release the lock. + bool release(); + + /// Attempts to acquire the lock without blocking. If the lock is not + /// available, this function returns false quickly (without blocking). If + /// the lock is available, it is acquired. + /// @returns false if any kind of error occurs or the lock is not + /// available, true otherwise. + /// @brief Try to acquire the lock. + bool tryacquire(); + + //@} + /// @name Platform Dependent Data + /// @{ + private: +#if defined(LLVM_ENABLE_THREADS) && LLVM_ENABLE_THREADS != 0 + void* data_; ///< We don't know what the data will be +#endif + + /// @} + /// @name Do Not Implement + /// @{ + private: + MutexImpl(const MutexImpl &) = delete; + void operator=(const MutexImpl &) = delete; + /// @} + }; + + + /// SmartMutex - A mutex with a compile time constant parameter that + /// indicates whether this mutex should become a no-op when we're not + /// running in multithreaded mode. + template + class SmartMutex { + MutexImpl impl; + unsigned acquired; + bool recursive; + public: + explicit SmartMutex(bool rec = true) : + impl(rec), acquired(0), recursive(rec) { } + + bool lock() { + if (!mt_only) { + return impl.acquire(); + } else { + // Single-threaded debugging code. This would be racy in + // multithreaded mode, but provides not sanity checks in single + // threaded mode. + assert((recursive || acquired == 0) && "Lock already acquired!!"); + ++acquired; + return true; + } + } + + bool unlock() { + if (!mt_only) { + return impl.release(); + } else { + // Single-threaded debugging code. This would be racy in + // multithreaded mode, but provides not sanity checks in single + // threaded mode. + assert(((recursive && acquired) || (acquired == 1)) && + "Lock not acquired before release!"); + --acquired; + return true; + } + } + + bool try_lock() { + if (!mt_only) + return impl.tryacquire(); + else return true; + } + + private: + SmartMutex(const SmartMutex & original); + void operator=(const SmartMutex &); + }; + + /// Mutex - A standard, always enforced mutex. + typedef SmartMutex Mutex; + + template + class SmartScopedLock { + SmartMutex& mtx; + + public: + SmartScopedLock(SmartMutex& m) : mtx(m) { + mtx.lock(); + } + + ~SmartScopedLock() { + mtx.unlock(); + } + }; + + typedef SmartScopedLock ScopedLock; + } +} + +#endif diff --git a/llvm/include/llvm/Support/MutexGuard.h b/llvm/include/llvm/Support/MutexGuard.h new file mode 100644 index 0000000..773dcad --- /dev/null +++ b/llvm/include/llvm/Support/MutexGuard.h @@ -0,0 +1,41 @@ +//===-- Support/MutexGuard.h - Acquire/Release Mutex In Scope ---*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines a guard for a block of code that ensures a Mutex is locked +// upon construction and released upon destruction. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_MUTEXGUARD_H +#define LLVM_SUPPORT_MUTEXGUARD_H + +#include "llvm/Support/Mutex.h" + +namespace llvm_ks { + /// Instances of this class acquire a given Mutex Lock when constructed and + /// hold that lock until destruction. The intention is to instantiate one of + /// these on the stack at the top of some scope to be assured that C++ + /// destruction of the object will always release the Mutex and thus avoid + /// a host of nasty multi-threading problems in the face of exceptions, etc. + /// @brief Guard a section of code with a Mutex. + class MutexGuard { + sys::Mutex &M; + MutexGuard(const MutexGuard &) = delete; + void operator=(const MutexGuard &) = delete; + public: + MutexGuard(sys::Mutex &m) : M(m) { M.lock(); } + ~MutexGuard() { M.unlock(); } + /// holds - Returns true if this locker instance holds the specified lock. + /// This is mostly used in assertions to validate that the correct mutex + /// is held. + bool holds(const sys::Mutex& lock) const { return &M == &lock; } + }; +} + +#endif // LLVM_SUPPORT_MUTEXGUARD_H diff --git a/llvm/include/llvm/Support/Path.h b/llvm/include/llvm/Support/Path.h new file mode 100644 index 0000000..df8a40b --- /dev/null +++ b/llvm/include/llvm/Support/Path.h @@ -0,0 +1,437 @@ +//===- llvm/Support/Path.h - Path Operating System Concept ------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the llvm_ks::sys::path namespace. It is designed after +// TR2/boost filesystem (v3), but modified to remove exception handling and the +// path class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_PATH_H +#define LLVM_SUPPORT_PATH_H + +#include "llvm/ADT/SmallString.h" +#include "llvm/ADT/Twine.h" +#include "llvm/Support/DataTypes.h" +#include + +namespace llvm_ks { +namespace sys { +namespace path { + +/// @name Lexical Component Iterator +/// @{ + +/// @brief Path iterator. +/// +/// This is an input iterator that iterates over the individual components in +/// \a path. The traversal order is as follows: +/// * The root-name element, if present. +/// * The root-directory element, if present. +/// * Each successive filename element, if present. +/// * Dot, if one or more trailing non-root slash characters are present. +/// Traversing backwards is possible with \a reverse_iterator +/// +/// Iteration examples. Each component is separated by ',': +/// @code +/// / => / +/// /foo => /,foo +/// foo/ => foo,. +/// /foo/bar => /,foo,bar +/// ../ => ..,. +/// C:\foo\bar => C:,/,foo,bar +/// @endcode +class const_iterator + : public std::iterator { + StringRef Path; ///< The entire path. + StringRef Component; ///< The current component. Not necessarily in Path. + size_t Position; ///< The iterators current position within Path. + + // An end iterator has Position = Path.size() + 1. + friend const_iterator begin(StringRef path); + friend const_iterator end(StringRef path); + +public: + reference operator*() const { return Component; } + pointer operator->() const { return &Component; } + const_iterator &operator++(); // preincrement + bool operator==(const const_iterator &RHS) const; + bool operator!=(const const_iterator &RHS) const { return !(*this == RHS); } + + /// @brief Difference in bytes between this and RHS. + ptrdiff_t operator-(const const_iterator &RHS) const; +}; + +/// @brief Reverse path iterator. +/// +/// This is an input iterator that iterates over the individual components in +/// \a path in reverse order. The traversal order is exactly reversed from that +/// of \a const_iterator +class reverse_iterator + : public std::iterator { + StringRef Path; ///< The entire path. + StringRef Component; ///< The current component. Not necessarily in Path. + size_t Position; ///< The iterators current position within Path. + + friend reverse_iterator rbegin(StringRef path); + friend reverse_iterator rend(StringRef path); + +public: + reference operator*() const { return Component; } + pointer operator->() const { return &Component; } + reverse_iterator &operator++(); // preincrement + bool operator==(const reverse_iterator &RHS) const; + bool operator!=(const reverse_iterator &RHS) const { return !(*this == RHS); } +}; + +/// @brief Get begin iterator over \a path. +/// @param path Input path. +/// @returns Iterator initialized with the first component of \a path. +const_iterator begin(StringRef path); + +/// @brief Get end iterator over \a path. +/// @param path Input path. +/// @returns Iterator initialized to the end of \a path. +const_iterator end(StringRef path); + +/// @brief Get reverse begin iterator over \a path. +/// @param path Input path. +/// @returns Iterator initialized with the first reverse component of \a path. +reverse_iterator rbegin(StringRef path); + +/// @brief Get reverse end iterator over \a path. +/// @param path Input path. +/// @returns Iterator initialized to the reverse end of \a path. +reverse_iterator rend(StringRef path); + +/// @} +/// @name Lexical Modifiers +/// @{ + +/// @brief Remove the last component from \a path unless it is the root dir. +/// +/// @code +/// directory/filename.cpp => directory/ +/// directory/ => directory +/// filename.cpp => +/// / => / +/// @endcode +/// +/// @param path A path that is modified to not have a file component. +void remove_filename(SmallVectorImpl &path); + +/// @brief Replace the file extension of \a path with \a extension. +/// +/// @code +/// ./filename.cpp => ./filename.extension +/// ./filename => ./filename.extension +/// ./ => ./.extension +/// @endcode +/// +/// @param path A path that has its extension replaced with \a extension. +/// @param extension The extension to be added. It may be empty. It may also +/// optionally start with a '.', if it does not, one will be +/// prepended. +void replace_extension(SmallVectorImpl &path, const Twine &extension); + +/// @brief Append to path. +/// +/// @code +/// /foo + bar/f => /foo/bar/f +/// /foo/ + bar/f => /foo/bar/f +/// foo + bar/f => foo/bar/f +/// @endcode +/// +/// @param path Set to \a path + \a component. +/// @param a The component to be appended to \a path. +void append(SmallVectorImpl &path, const Twine &a, + const Twine &b = "", + const Twine &c = "", + const Twine &d = ""); + +/// @brief Append to path. +/// +/// @code +/// /foo + [bar,f] => /foo/bar/f +/// /foo/ + [bar,f] => /foo/bar/f +/// foo + [bar,f] => foo/bar/f +/// @endcode +/// +/// @param path Set to \a path + [\a begin, \a end). +/// @param begin Start of components to append. +/// @param end One past the end of components to append. +void append(SmallVectorImpl &path, + const_iterator begin, const_iterator end); + +/// @} +/// @name Transforms (or some other better name) +/// @{ + +/// Convert path to the native form. This is used to give paths to users and +/// operating system calls in the platform's normal way. For example, on Windows +/// all '/' are converted to '\'. +/// +/// @param path A path that is transformed to native format. +/// @param result Holds the result of the transformation. +void native(const Twine &path, SmallVectorImpl &result); + +/// Convert path to the native form in place. This is used to give paths to +/// users and operating system calls in the platform's normal way. For example, +/// on Windows all '/' are converted to '\'. +/// +/// @param path A path that is transformed to native format. +void native(SmallVectorImpl &path); + +/// @} +/// @name Lexical Observers +/// @{ + +/// @brief Get root name. +/// +/// @code +/// //net/hello => //net +/// c:/hello => c: (on Windows, on other platforms nothing) +/// /hello => +/// @endcode +/// +/// @param path Input path. +/// @result The root name of \a path if it has one, otherwise "". +StringRef root_name(StringRef path); + +/// @brief Get root directory. +/// +/// @code +/// /goo/hello => / +/// c:/hello => / +/// d/file.txt => +/// @endcode +/// +/// @param path Input path. +/// @result The root directory of \a path if it has one, otherwise +/// "". +StringRef root_directory(StringRef path); + +/// @brief Get root path. +/// +/// Equivalent to root_name + root_directory. +/// +/// @param path Input path. +/// @result The root path of \a path if it has one, otherwise "". +StringRef root_path(StringRef path); + +/// @brief Get relative path. +/// +/// @code +/// C:\hello\world => hello\world +/// foo/bar => foo/bar +/// /foo/bar => foo/bar +/// @endcode +/// +/// @param path Input path. +/// @result The path starting after root_path if one exists, otherwise "". +StringRef relative_path(StringRef path); + +/// @brief Get parent path. +/// +/// @code +/// / => +/// /foo => / +/// foo/../bar => foo/.. +/// @endcode +/// +/// @param path Input path. +/// @result The parent path of \a path if one exists, otherwise "". +StringRef parent_path(StringRef path); + +/// @brief Get filename. +/// +/// @code +/// /foo.txt => foo.txt +/// . => . +/// .. => .. +/// / => / +/// @endcode +/// +/// @param path Input path. +/// @result The filename part of \a path. This is defined as the last component +/// of \a path. +StringRef filename(StringRef path); + +/// @brief Get stem. +/// +/// If filename contains a dot but not solely one or two dots, result is the +/// substring of filename ending at (but not including) the last dot. Otherwise +/// it is filename. +/// +/// @code +/// /foo/bar.txt => bar +/// /foo/bar => bar +/// /foo/.txt => +/// /foo/. => . +/// /foo/.. => .. +/// @endcode +/// +/// @param path Input path. +/// @result The stem of \a path. +StringRef stem(StringRef path); + +/// @brief Get extension. +/// +/// If filename contains a dot but not solely one or two dots, result is the +/// substring of filename starting at (and including) the last dot, and ending +/// at the end of \a path. Otherwise "". +/// +/// @code +/// /foo/bar.txt => .txt +/// /foo/bar => +/// /foo/.txt => .txt +/// @endcode +/// +/// @param path Input path. +/// @result The extension of \a path. +StringRef extension(StringRef path); + +/// @brief Check whether the given char is a path separator on the host OS. +/// +/// @param value a character +/// @result true if \a value is a path separator character on the host OS +bool is_separator(char value); + +/// @brief Return the preferred separator for this platform. +/// +/// @result StringRef of the preferred separator, null-terminated. +StringRef get_separator(); + +/// @brief Get the typical temporary directory for the system, e.g., +/// "/var/tmp" or "C:/TEMP" +/// +/// @param erasedOnReboot Whether to favor a path that is erased on reboot +/// rather than one that potentially persists longer. This parameter will be +/// ignored if the user or system has set the typical environment variable +/// (e.g., TEMP on Windows, TMPDIR on *nix) to specify a temporary directory. +/// +/// @param result Holds the resulting path name. +void system_temp_directory(bool erasedOnReboot, SmallVectorImpl &result); + +/// @brief Get the user's home directory. +/// +/// @param result Holds the resulting path name. +/// @result True if a home directory is set, false otherwise. +bool home_directory(SmallVectorImpl &result); + +/// @brief Get the user's cache directory. +/// +/// Expect the resulting path to be a directory shared with other +/// applications/services used by the user. Params \p Path1 to \p Path3 can be +/// used to append additional directory names to the resulting path. Recommended +/// pattern is //. +/// +/// @param Result Holds the resulting path. +/// @param Path1 Additional path to be appended to the user's cache directory +/// path. "" can be used to append nothing. +/// @param Path2 Second additional path to be appended. +/// @param Path3 Third additional path to be appended. +/// @result True if a cache directory path is set, false otherwise. +bool user_cache_directory(SmallVectorImpl &Result, const Twine &Path1, + const Twine &Path2 = "", const Twine &Path3 = ""); + +/// @brief Has root name? +/// +/// root_name != "" +/// +/// @param path Input path. +/// @result True if the path has a root name, false otherwise. +bool has_root_name(const Twine &path); + +/// @brief Has root directory? +/// +/// root_directory != "" +/// +/// @param path Input path. +/// @result True if the path has a root directory, false otherwise. +bool has_root_directory(const Twine &path); + +/// @brief Has root path? +/// +/// root_path != "" +/// +/// @param path Input path. +/// @result True if the path has a root path, false otherwise. +bool has_root_path(const Twine &path); + +/// @brief Has relative path? +/// +/// relative_path != "" +/// +/// @param path Input path. +/// @result True if the path has a relative path, false otherwise. +bool has_relative_path(const Twine &path); + +/// @brief Has parent path? +/// +/// parent_path != "" +/// +/// @param path Input path. +/// @result True if the path has a parent path, false otherwise. +bool has_parent_path(const Twine &path); + +/// @brief Has filename? +/// +/// filename != "" +/// +/// @param path Input path. +/// @result True if the path has a filename, false otherwise. +bool has_filename(const Twine &path); + +/// @brief Has stem? +/// +/// stem != "" +/// +/// @param path Input path. +/// @result True if the path has a stem, false otherwise. +bool has_stem(const Twine &path); + +/// @brief Has extension? +/// +/// extension != "" +/// +/// @param path Input path. +/// @result True if the path has a extension, false otherwise. +bool has_extension(const Twine &path); + +/// @brief Is path absolute? +/// +/// @param path Input path. +/// @result True if the path is absolute, false if it is not. +bool is_absolute(const Twine &path); + +/// @brief Is path relative? +/// +/// @param path Input path. +/// @result True if the path is relative, false if it is not. +bool is_relative(const Twine &path); + +/// @brief Remove redundant leading "./" pieces and consecutive separators. +/// +/// @param path Input path. +/// @result The cleaned-up \a path. +StringRef remove_leading_dotslash(StringRef path); + +/// @brief In-place remove any './' and optionally '../' components from a path. +/// +/// @param path processed path +/// @param remove_dot_dot specify if '../' should be removed +/// @result True if path was changed +bool remove_dots(SmallVectorImpl &path, bool remove_dot_dot = false); + +} // end namespace path +} // end namespace sys +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/Support/PointerLikeTypeTraits.h b/llvm/include/llvm/Support/PointerLikeTypeTraits.h new file mode 100644 index 0000000..a4e9a39 --- /dev/null +++ b/llvm/include/llvm/Support/PointerLikeTypeTraits.h @@ -0,0 +1,92 @@ +//===- llvm/Support/PointerLikeTypeTraits.h - Pointer Traits ----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the PointerLikeTypeTraits class. This allows data +// structures to reason about pointers and other things that are pointer sized. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_POINTERLIKETYPETRAITS_H +#define LLVM_SUPPORT_POINTERLIKETYPETRAITS_H + +#include "llvm/Support/AlignOf.h" +#include "llvm/Support/DataTypes.h" + +namespace llvm_ks { + +/// A traits type that is used to handle pointer types and things that are just +/// wrappers for pointers as a uniform entity. +template class PointerLikeTypeTraits { + // getAsVoidPointer + // getFromVoidPointer + // getNumLowBitsAvailable +}; + +namespace detail { +/// A tiny meta function to compute the log2 of a compile time constant. +template +struct ConstantLog2 + : std::integral_constant::value + 1> {}; +template <> struct ConstantLog2<1> : std::integral_constant {}; +} + +// Provide PointerLikeTypeTraits for non-cvr pointers. +template struct PointerLikeTypeTraits { + static inline void *getAsVoidPointer(T *P) { return P; } + static inline T *getFromVoidPointer(void *P) { return static_cast(P); } + + enum { + NumLowBitsAvailable = detail::ConstantLog2::Alignment>::value + }; +}; + +template <> struct PointerLikeTypeTraits { + static inline void *getAsVoidPointer(void *P) { return P; } + static inline void *getFromVoidPointer(void *P) { return P; } + + /// Note, we assume here that void* is related to raw malloc'ed memory and + /// that malloc returns objects at least 4-byte aligned. However, this may be + /// wrong, or pointers may be from something other than malloc. In this case, + /// you should specify a real typed pointer or avoid this template. + /// + /// All clients should use assertions to do a run-time check to ensure that + /// this is actually true. + enum { NumLowBitsAvailable = 2 }; +}; + +// Provide PointerLikeTypeTraits for const pointers. +template class PointerLikeTypeTraits { + typedef PointerLikeTypeTraits NonConst; + +public: + static inline const void *getAsVoidPointer(const T *P) { + return NonConst::getAsVoidPointer(const_cast(P)); + } + static inline const T *getFromVoidPointer(const void *P) { + return NonConst::getFromVoidPointer(const_cast(P)); + } + enum { NumLowBitsAvailable = NonConst::NumLowBitsAvailable }; +}; + +// Provide PointerLikeTypeTraits for uintptr_t. +template <> class PointerLikeTypeTraits { +public: + static inline void *getAsVoidPointer(uintptr_t P) { + return reinterpret_cast(P); + } + static inline uintptr_t getFromVoidPointer(void *P) { + return reinterpret_cast(P); + } + // No bits are available! + enum { NumLowBitsAvailable = 0 }; +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/Support/RWMutex.h b/llvm/include/llvm/Support/RWMutex.h new file mode 100644 index 0000000..776587e --- /dev/null +++ b/llvm/include/llvm/Support/RWMutex.h @@ -0,0 +1,177 @@ +//===- RWMutex.h - Reader/Writer Mutual Exclusion Lock ----------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the llvm_ks::sys::RWMutex class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_RWMUTEX_H +#define LLVM_SUPPORT_RWMUTEX_H + +#include "llvm/Support/Compiler.h" +#include "llvm/Support/Threading.h" +#include + +namespace llvm_ks +{ + namespace sys + { + /// @brief Platform agnostic RWMutex class. + class RWMutexImpl + { + /// @name Constructors + /// @{ + public: + + /// Initializes the lock but doesn't acquire it. + /// @brief Default Constructor. + explicit RWMutexImpl(); + + /// Releases and removes the lock + /// @brief Destructor + ~RWMutexImpl(); + + /// @} + /// @name Methods + /// @{ + public: + + /// Attempts to unconditionally acquire the lock in reader mode. If the + /// lock is held by a writer, this method will wait until it can acquire + /// the lock. + /// @returns false if any kind of error occurs, true otherwise. + /// @brief Unconditionally acquire the lock in reader mode. + bool reader_acquire(); + + /// Attempts to release the lock in reader mode. + /// @returns false if any kind of error occurs, true otherwise. + /// @brief Unconditionally release the lock in reader mode. + bool reader_release(); + + /// Attempts to unconditionally acquire the lock in reader mode. If the + /// lock is held by any readers, this method will wait until it can + /// acquire the lock. + /// @returns false if any kind of error occurs, true otherwise. + /// @brief Unconditionally acquire the lock in writer mode. + bool writer_acquire(); + + /// Attempts to release the lock in writer mode. + /// @returns false if any kind of error occurs, true otherwise. + /// @brief Unconditionally release the lock in write mode. + bool writer_release(); + + //@} + /// @name Platform Dependent Data + /// @{ + private: +#if defined(LLVM_ENABLE_THREADS) && LLVM_ENABLE_THREADS != 0 + void* data_; ///< We don't know what the data will be +#endif + + /// @} + /// @name Do Not Implement + /// @{ + private: + RWMutexImpl(const RWMutexImpl & original) = delete; + void operator=(const RWMutexImpl &) = delete; + /// @} + }; + + /// SmartMutex - An R/W mutex with a compile time constant parameter that + /// indicates whether this mutex should become a no-op when we're not + /// running in multithreaded mode. + template + class SmartRWMutex { + RWMutexImpl impl; + unsigned readers, writers; + public: + explicit SmartRWMutex() : impl(), readers(0), writers(0) { } + + bool lock_shared() { + if (!mt_only) + return impl.reader_acquire(); + + // Single-threaded debugging code. This would be racy in multithreaded + // mode, but provides not sanity checks in single threaded mode. + ++readers; + return true; + } + + bool unlock_shared() { + if (!mt_only) + return impl.reader_release(); + + // Single-threaded debugging code. This would be racy in multithreaded + // mode, but provides not sanity checks in single threaded mode. + assert(readers > 0 && "Reader lock not acquired before release!"); + --readers; + return true; + } + + bool lock() { + if (!mt_only) + return impl.writer_acquire(); + + // Single-threaded debugging code. This would be racy in multithreaded + // mode, but provides not sanity checks in single threaded mode. + assert(writers == 0 && "Writer lock already acquired!"); + ++writers; + return true; + } + + bool unlock() { + if (!mt_only) + return impl.writer_release(); + + // Single-threaded debugging code. This would be racy in multithreaded + // mode, but provides not sanity checks in single threaded mode. + assert(writers == 1 && "Writer lock not acquired before release!"); + --writers; + return true; + } + + private: + SmartRWMutex(const SmartRWMutex & original); + void operator=(const SmartRWMutex &); + }; + typedef SmartRWMutex RWMutex; + + /// ScopedReader - RAII acquisition of a reader lock + template + struct SmartScopedReader { + SmartRWMutex& mutex; + + explicit SmartScopedReader(SmartRWMutex& m) : mutex(m) { + mutex.lock_shared(); + } + + ~SmartScopedReader() { + mutex.unlock_shared(); + } + }; + typedef SmartScopedReader ScopedReader; + + /// ScopedWriter - RAII acquisition of a writer lock + template + struct SmartScopedWriter { + SmartRWMutex& mutex; + + explicit SmartScopedWriter(SmartRWMutex& m) : mutex(m) { + mutex.lock(); + } + + ~SmartScopedWriter() { + mutex.unlock(); + } + }; + typedef SmartScopedWriter ScopedWriter; + } +} + +#endif diff --git a/llvm/include/llvm/Support/RandomNumberGenerator.h b/llvm/include/llvm/Support/RandomNumberGenerator.h new file mode 100644 index 0000000..7ab54e7 --- /dev/null +++ b/llvm/include/llvm/Support/RandomNumberGenerator.h @@ -0,0 +1,58 @@ +//==- llvm/Support/RandomNumberGenerator.h - RNG for diversity ---*- C++ -*-==// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines an abstraction for deterministic random number +// generation (RNG). Note that the current implementation is not +// cryptographically secure as it uses the C++11 facilities. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_RANDOMNUMBERGENERATOR_H_ +#define LLVM_SUPPORT_RANDOMNUMBERGENERATOR_H_ + +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/Compiler.h" +#include "llvm/Support/DataTypes.h" // Needed for uint64_t on Windows. +#include + +namespace llvm_ks { + +/// A random number generator. +/// +/// Instances of this class should not be shared across threads. The +/// seed should be set by passing the -rng-seed= option. Use +/// Module::createRNG to create a new RNG instance for use with that +/// module. +class RandomNumberGenerator { +public: + /// Returns a random number in the range [0, Max). + uint_fast64_t operator()(); + +private: + /// Seeds and salts the underlying RNG engine. + /// + /// This constructor should not be used directly. Instead use + /// Module::createRNG to create a new RNG salted with the Module ID. + RandomNumberGenerator(StringRef Salt); + + // 64-bit Mersenne Twister by Matsumoto and Nishimura, 2000 + // http://en.cppreference.com/w/cpp/numeric/random/mersenne_twister_engine + // This RNG is deterministically portable across C++11 + // implementations. + std::mt19937_64 Generator; + + // Noncopyable. + RandomNumberGenerator(const RandomNumberGenerator &other) = delete; + RandomNumberGenerator &operator=(const RandomNumberGenerator &other) = delete; + + friend class Module; +}; +} + +#endif diff --git a/llvm/include/llvm/Support/Regex.h b/llvm/include/llvm/Support/Regex.h new file mode 100644 index 0000000..6a00708 --- /dev/null +++ b/llvm/include/llvm/Support/Regex.h @@ -0,0 +1,105 @@ +//===-- Regex.h - Regular Expression matcher implementation -*- C++ -*-----===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements a POSIX regular expression matcher. Both Basic and +// Extended POSIX regular expressions (ERE) are supported. EREs were extended +// to support backreferences in matches. +// This implementation also supports matching strings with embedded NUL chars. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_REGEX_H +#define LLVM_SUPPORT_REGEX_H + +#include + +struct llvm_regex; + +namespace llvm_ks { + class StringRef; + template class SmallVectorImpl; + + class Regex { + public: + enum { + NoFlags=0, + /// Compile for matching that ignores upper/lower case distinctions. + IgnoreCase=1, + /// Compile for newline-sensitive matching. With this flag '[^' bracket + /// expressions and '.' never match newline. A ^ anchor matches the + /// null string after any newline in the string in addition to its normal + /// function, and the $ anchor matches the null string before any + /// newline in the string in addition to its normal function. + Newline=2, + /// By default, the POSIX extended regular expression (ERE) syntax is + /// assumed. Pass this flag to turn on basic regular expressions (BRE) + /// instead. + BasicRegex=4 + }; + + /// Compiles the given regular expression \p Regex. + Regex(StringRef Regex, unsigned Flags = NoFlags); + Regex(const Regex &) = delete; + Regex &operator=(Regex regex) { + std::swap(preg, regex.preg); + std::swap(error, regex.error); + return *this; + } + Regex(Regex &®ex) { + preg = regex.preg; + error = regex.error; + regex.preg = nullptr; + } + ~Regex(); + + /// isValid - returns the error encountered during regex compilation, or + /// matching, if any. + bool isValid(std::string &Error); + + /// getNumMatches - In a valid regex, return the number of parenthesized + /// matches it contains. The number filled in by match will include this + /// many entries plus one for the whole regex (as element 0). + unsigned getNumMatches() const; + + /// matches - Match the regex against a given \p String. + /// + /// \param Matches - If given, on a successful match this will be filled in + /// with references to the matched group expressions (inside \p String), + /// the first group is always the entire pattern. + /// + /// This returns true on a successful match. + bool match(StringRef String, SmallVectorImpl *Matches = nullptr); + + /// sub - Return the result of replacing the first match of the regex in + /// \p String with the \p Repl string. Backreferences like "\0" in the + /// replacement string are replaced with the appropriate match substring. + /// + /// Note that the replacement string has backslash escaping performed on + /// it. Invalid backreferences are ignored (replaced by empty strings). + /// + /// \param Error If non-null, any errors in the substitution (invalid + /// backreferences, trailing backslashes) will be recorded as a non-empty + /// string. + std::string sub(StringRef Repl, StringRef String, + std::string *Error = nullptr); + + /// \brief If this function returns true, ^Str$ is an extended regular + /// expression that matches Str and only Str. + static bool isLiteralERE(StringRef Str); + + /// \brief Turn String into a regex by escaping its special characters. + static std::string escape(StringRef String); + + private: + struct llvm_regex *preg; + int error; + }; +} + +#endif // LLVM_SUPPORT_REGEX_H diff --git a/llvm/include/llvm/Support/Registry.h b/llvm/include/llvm/Support/Registry.h new file mode 100644 index 0000000..4910c4d --- /dev/null +++ b/llvm/include/llvm/Support/Registry.h @@ -0,0 +1,129 @@ +//=== Registry.h - Linker-supported plugin registries -----------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// Defines a registry template for discovering pluggable modules. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_REGISTRY_H +#define LLVM_SUPPORT_REGISTRY_H + +#include "llvm/ADT/iterator_range.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/Support/Compiler.h" +#include + +namespace llvm_ks { + /// A simple registry entry which provides only a name, description, and + /// no-argument constructor. + template + class SimpleRegistryEntry { + const char *Name, *Desc; + std::unique_ptr (*Ctor)(); + + public: + SimpleRegistryEntry(const char *N, const char *D, std::unique_ptr (*C)()) + : Name(N), Desc(D), Ctor(C) + {} + + const char *getName() const { return Name; } + const char *getDesc() const { return Desc; } + std::unique_ptr instantiate() const { return Ctor(); } + }; + + /// A global registry used in conjunction with static constructors to make + /// pluggable components (like targets or garbage collectors) "just work" when + /// linked with an executable. + template + class Registry { + public: + typedef SimpleRegistryEntry entry; + + class node; + class iterator; + + private: + Registry() = delete; + + friend class node; + static node *Head, *Tail; + + public: + /// Node in linked list of entries. + /// + class node { + friend class iterator; + + node *Next; + const entry& Val; + + public: + node(const entry& V) : Next(nullptr), Val(V) { + if (Tail) + Tail->Next = this; + else + Head = this; + Tail = this; + } + }; + + /// Iterators for registry entries. + /// + class iterator { + const node *Cur; + + public: + explicit iterator(const node *N) : Cur(N) {} + + bool operator==(const iterator &That) const { return Cur == That.Cur; } + bool operator!=(const iterator &That) const { return Cur != That.Cur; } + iterator &operator++() { Cur = Cur->Next; return *this; } + const entry &operator*() const { return Cur->Val; } + const entry *operator->() const { return &Cur->Val; } + }; + + static iterator begin() { return iterator(Head); } + static iterator end() { return iterator(nullptr); } + + static iterator_range entries() { + return make_range(begin(), end()); + } + + /// A static registration template. Use like such: + /// + /// Registry::Add + /// X("fancy-gc", "Newfangled garbage collector."); + /// + /// Use of this template requires that: + /// + /// 1. The registered subclass has a default constructor. + template + class Add { + entry Entry; + node Node; + + static std::unique_ptr CtorFn() { return make_unique(); } + + public: + Add(const char *Name, const char *Desc) + : Entry(Name, Desc, CtorFn), Node(Entry) {} + }; + }; + + + // Since these are defined in a header file, plugins must be sure to export + // these symbols. + template + typename Registry::node *Registry::Head; + + template + typename Registry::node *Registry::Tail; +} // end namespace llvm_ks + +#endif // LLVM_SUPPORT_REGISTRY_H diff --git a/llvm/include/llvm/Support/SMLoc.h b/llvm/include/llvm/Support/SMLoc.h new file mode 100644 index 0000000..3d5d4c6 --- /dev/null +++ b/llvm/include/llvm/Support/SMLoc.h @@ -0,0 +1,63 @@ +//===- SMLoc.h - Source location for use with diagnostics -------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the SMLoc class. This class encapsulates a location in +// source code for use in diagnostics. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_SMLOC_H +#define LLVM_SUPPORT_SMLOC_H + +#include + +namespace llvm_ks { + +/// Represents a location in source code. +class SMLoc { + const char *Ptr; + +public: + SMLoc() : Ptr(nullptr) {} + + bool isValid() const { return Ptr != nullptr; } + + bool operator==(const SMLoc &RHS) const { return RHS.Ptr == Ptr; } + bool operator!=(const SMLoc &RHS) const { return RHS.Ptr != Ptr; } + + const char *getPointer() const { return Ptr; } + + static SMLoc getFromPointer(const char *Ptr) { + SMLoc L; + L.Ptr = Ptr; + return L; + } +}; + +/// Represents a range in source code. +/// +/// SMRange is implemented using a half-open range, as is the convention in C++. +/// In the string "abc", the range (1,3] represents the substring "bc", and the +/// range (2,2] represents an empty range between the characters "b" and "c". +class SMRange { +public: + SMLoc Start, End; + + SMRange() {} + SMRange(SMLoc St, SMLoc En) : Start(St), End(En) { + assert(Start.isValid() == End.isValid() && + "Start and end should either both be valid or both be invalid!"); + } + + bool isValid() const { return Start.isValid(); } +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/Support/ScaledNumber.h b/llvm/include/llvm/Support/ScaledNumber.h new file mode 100644 index 0000000..3cc9d65 --- /dev/null +++ b/llvm/include/llvm/Support/ScaledNumber.h @@ -0,0 +1,899 @@ +//===- llvm/Support/ScaledNumber.h - Support for scaled numbers -*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains functions (and a class) useful for working with scaled +// numbers -- in particular, pairs of integers where one represents digits and +// another represents a scale. The functions are helpers and live in the +// namespace ScaledNumbers. The class ScaledNumber is useful for modelling +// certain cost metrics that need simple, integer-like semantics that are easy +// to reason about. +// +// These might remind you of soft-floats. If you want one of those, you're in +// the wrong place. Look at include/llvm/ADT/APFloat.h instead. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_SCALEDNUMBER_H +#define LLVM_SUPPORT_SCALEDNUMBER_H + +#include "llvm/Support/MathExtras.h" +#include +#include +#include +#include +#include +#include + +namespace llvm_ks { +namespace ScaledNumbers { + +/// \brief Maximum scale; same as APFloat for easy debug printing. +const int32_t MaxScale = 16383; + +/// \brief Maximum scale; same as APFloat for easy debug printing. +const int32_t MinScale = -16382; + +/// \brief Get the width of a number. +template inline int getWidth() { return sizeof(DigitsT) * 8; } + +/// \brief Conditionally round up a scaled number. +/// +/// Given \c Digits and \c Scale, round up iff \c ShouldRound is \c true. +/// Always returns \c Scale unless there's an overflow, in which case it +/// returns \c 1+Scale. +/// +/// \pre adding 1 to \c Scale will not overflow INT16_MAX. +template +inline std::pair getRounded(DigitsT Digits, int16_t Scale, + bool ShouldRound) { + static_assert(!std::numeric_limits::is_signed, "expected unsigned"); + + if (ShouldRound) + if (!++Digits) + // Overflow. + return std::make_pair(DigitsT(1) << (getWidth() - 1), Scale + 1); + return std::make_pair(Digits, Scale); +} + +/// \brief Convenience helper for 32-bit rounding. +inline std::pair getRounded32(uint32_t Digits, int16_t Scale, + bool ShouldRound) { + return getRounded(Digits, Scale, ShouldRound); +} + +/// \brief Convenience helper for 64-bit rounding. +inline std::pair getRounded64(uint64_t Digits, int16_t Scale, + bool ShouldRound) { + return getRounded(Digits, Scale, ShouldRound); +} + +/// \brief Adjust a 64-bit scaled number down to the appropriate width. +/// +/// \pre Adding 64 to \c Scale will not overflow INT16_MAX. +template +inline std::pair getAdjusted(uint64_t Digits, + int16_t Scale = 0) { + static_assert(!std::numeric_limits::is_signed, "expected unsigned"); + + const int Width = getWidth(); + if (Width == 64 || Digits <= std::numeric_limits::max()) + return std::make_pair(Digits, Scale); + + // Shift right and round. + int Shift = 64 - Width - countLeadingZeros(Digits); + return getRounded(Digits >> Shift, Scale + Shift, + Digits & (UINT64_C(1) << (Shift - 1))); +} + +/// \brief Convenience helper for adjusting to 32 bits. +inline std::pair getAdjusted32(uint64_t Digits, + int16_t Scale = 0) { + return getAdjusted(Digits, Scale); +} + +/// \brief Convenience helper for adjusting to 64 bits. +inline std::pair getAdjusted64(uint64_t Digits, + int16_t Scale = 0) { + return getAdjusted(Digits, Scale); +} + +/// \brief Multiply two 64-bit integers to create a 64-bit scaled number. +/// +/// Implemented with four 64-bit integer multiplies. +std::pair multiply64(uint64_t LHS, uint64_t RHS); + +/// \brief Multiply two 32-bit integers to create a 32-bit scaled number. +/// +/// Implemented with one 64-bit integer multiply. +template +inline std::pair getProduct(DigitsT LHS, DigitsT RHS) { + static_assert(!std::numeric_limits::is_signed, "expected unsigned"); + + if (getWidth() <= 32 || (LHS <= UINT32_MAX && RHS <= UINT32_MAX)) + return getAdjusted(uint64_t(LHS) * RHS); + + return multiply64(LHS, RHS); +} + +/// \brief Convenience helper for 32-bit product. +inline std::pair getProduct32(uint32_t LHS, uint32_t RHS) { + return getProduct(LHS, RHS); +} + +/// \brief Convenience helper for 64-bit product. +inline std::pair getProduct64(uint64_t LHS, uint64_t RHS) { + return getProduct(LHS, RHS); +} + +/// \brief Divide two 64-bit integers to create a 64-bit scaled number. +/// +/// Implemented with long division. +/// +/// \pre \c Dividend and \c Divisor are non-zero. +std::pair divide64(uint64_t Dividend, uint64_t Divisor); + +/// \brief Divide two 32-bit integers to create a 32-bit scaled number. +/// +/// Implemented with one 64-bit integer divide/remainder pair. +/// +/// \pre \c Dividend and \c Divisor are non-zero. +std::pair divide32(uint32_t Dividend, uint32_t Divisor); + +/// \brief Divide two 32-bit numbers to create a 32-bit scaled number. +/// +/// Implemented with one 64-bit integer divide/remainder pair. +/// +/// Returns \c (DigitsT_MAX, MaxScale) for divide-by-zero (0 for 0/0). +template +std::pair getQuotient(DigitsT Dividend, DigitsT Divisor) { + static_assert(!std::numeric_limits::is_signed, "expected unsigned"); + static_assert(sizeof(DigitsT) == 4 || sizeof(DigitsT) == 8, + "expected 32-bit or 64-bit digits"); + + // Check for zero. + if (!Dividend) + return std::make_pair(0, 0); + if (!Divisor) + return std::make_pair(std::numeric_limits::max(), MaxScale); + + if (getWidth() == 64) + return divide64(Dividend, Divisor); + return divide32(Dividend, Divisor); +} + +/// \brief Convenience helper for 32-bit quotient. +inline std::pair getQuotient32(uint32_t Dividend, + uint32_t Divisor) { + return getQuotient(Dividend, Divisor); +} + +/// \brief Convenience helper for 64-bit quotient. +inline std::pair getQuotient64(uint64_t Dividend, + uint64_t Divisor) { + return getQuotient(Dividend, Divisor); +} + +/// \brief Implementation of getLg() and friends. +/// +/// Returns the rounded lg of \c Digits*2^Scale and an int specifying whether +/// this was rounded up (1), down (-1), or exact (0). +/// +/// Returns \c INT32_MIN when \c Digits is zero. +template +inline std::pair getLgImpl(DigitsT Digits, int16_t Scale) { + static_assert(!std::numeric_limits::is_signed, "expected unsigned"); + + if (!Digits) + return std::make_pair(INT32_MIN, 0); + + // Get the floor of the lg of Digits. + int32_t LocalFloor = sizeof(Digits) * 8 - countLeadingZeros(Digits) - 1; + + // Get the actual floor. + int32_t Floor = Scale + LocalFloor; + if (Digits == UINT64_C(1) << LocalFloor) + return std::make_pair(Floor, 0); + + // Round based on the next digit. + assert(LocalFloor >= 1); + bool Round = Digits & UINT64_C(1) << (LocalFloor - 1); + return std::make_pair(Floor + Round, Round ? 1 : -1); +} + +/// \brief Get the lg (rounded) of a scaled number. +/// +/// Get the lg of \c Digits*2^Scale. +/// +/// Returns \c INT32_MIN when \c Digits is zero. +template int32_t getLg(DigitsT Digits, int16_t Scale) { + return getLgImpl(Digits, Scale).first; +} + +/// \brief Get the lg floor of a scaled number. +/// +/// Get the floor of the lg of \c Digits*2^Scale. +/// +/// Returns \c INT32_MIN when \c Digits is zero. +template int32_t getLgFloor(DigitsT Digits, int16_t Scale) { + auto Lg = getLgImpl(Digits, Scale); + return Lg.first - (Lg.second > 0); +} + +/// \brief Get the lg ceiling of a scaled number. +/// +/// Get the ceiling of the lg of \c Digits*2^Scale. +/// +/// Returns \c INT32_MIN when \c Digits is zero. +template int32_t getLgCeiling(DigitsT Digits, int16_t Scale) { + auto Lg = getLgImpl(Digits, Scale); + return Lg.first + (Lg.second < 0); +} + +/// \brief Implementation for comparing scaled numbers. +/// +/// Compare two 64-bit numbers with different scales. Given that the scale of +/// \c L is higher than that of \c R by \c ScaleDiff, compare them. Return -1, +/// 1, and 0 for less than, greater than, and equal, respectively. +/// +/// \pre 0 <= ScaleDiff < 64. +int compareImpl(uint64_t L, uint64_t R, int ScaleDiff); + +/// \brief Compare two scaled numbers. +/// +/// Compare two scaled numbers. Returns 0 for equal, -1 for less than, and 1 +/// for greater than. +template +int compare(DigitsT LDigits, int16_t LScale, DigitsT RDigits, int16_t RScale) { + static_assert(!std::numeric_limits::is_signed, "expected unsigned"); + + // Check for zero. + if (!LDigits) + return RDigits ? -1 : 0; + if (!RDigits) + return 1; + + // Check for the scale. Use getLgFloor to be sure that the scale difference + // is always lower than 64. + int32_t lgL = getLgFloor(LDigits, LScale), lgR = getLgFloor(RDigits, RScale); + if (lgL != lgR) + return lgL < lgR ? -1 : 1; + + // Compare digits. + if (LScale < RScale) + return compareImpl(LDigits, RDigits, RScale - LScale); + + return -compareImpl(RDigits, LDigits, LScale - RScale); +} + +/// \brief Match scales of two numbers. +/// +/// Given two scaled numbers, match up their scales. Change the digits and +/// scales in place. Shift the digits as necessary to form equivalent numbers, +/// losing precision only when necessary. +/// +/// If the output value of \c LDigits (\c RDigits) is \c 0, the output value of +/// \c LScale (\c RScale) is unspecified. +/// +/// As a convenience, returns the matching scale. If the output value of one +/// number is zero, returns the scale of the other. If both are zero, which +/// scale is returned is unspecified. +template +int16_t matchScales(DigitsT &LDigits, int16_t &LScale, DigitsT &RDigits, + int16_t &RScale) { + static_assert(!std::numeric_limits::is_signed, "expected unsigned"); + + if (LScale < RScale) + // Swap arguments. + return matchScales(RDigits, RScale, LDigits, LScale); + if (!LDigits) + return RScale; + if (!RDigits || LScale == RScale) + return LScale; + + // Now LScale > RScale. Get the difference. + int32_t ScaleDiff = int32_t(LScale) - RScale; + if (ScaleDiff >= 2 * getWidth()) { + // Don't bother shifting. RDigits will get zero-ed out anyway. + RDigits = 0; + return LScale; + } + + // Shift LDigits left as much as possible, then shift RDigits right. + int32_t ShiftL = std::min(countLeadingZeros(LDigits), ScaleDiff); + assert(ShiftL < getWidth() && "can't shift more than width"); + + int32_t ShiftR = ScaleDiff - ShiftL; + if (ShiftR >= getWidth()) { + // Don't bother shifting. RDigits will get zero-ed out anyway. + RDigits = 0; + return LScale; + } + + LDigits <<= ShiftL; + RDigits >>= ShiftR; + + LScale -= ShiftL; + RScale += ShiftR; + assert(LScale == RScale && "scales should match"); + return LScale; +} + +/// \brief Get the sum of two scaled numbers. +/// +/// Get the sum of two scaled numbers with as much precision as possible. +/// +/// \pre Adding 1 to \c LScale (or \c RScale) will not overflow INT16_MAX. +template +std::pair getSum(DigitsT LDigits, int16_t LScale, + DigitsT RDigits, int16_t RScale) { + static_assert(!std::numeric_limits::is_signed, "expected unsigned"); + + // Check inputs up front. This is only relevant if addition overflows, but + // testing here should catch more bugs. + assert(LScale < INT16_MAX && "scale too large"); + assert(RScale < INT16_MAX && "scale too large"); + + // Normalize digits to match scales. + int16_t Scale = matchScales(LDigits, LScale, RDigits, RScale); + + // Compute sum. + DigitsT Sum = LDigits + RDigits; + if (Sum >= RDigits) + return std::make_pair(Sum, Scale); + + // Adjust sum after arithmetic overflow. + DigitsT HighBit = DigitsT(1) << (getWidth() - 1); + return std::make_pair(HighBit | Sum >> 1, Scale + 1); +} + +/// \brief Convenience helper for 32-bit sum. +inline std::pair getSum32(uint32_t LDigits, int16_t LScale, + uint32_t RDigits, int16_t RScale) { + return getSum(LDigits, LScale, RDigits, RScale); +} + +/// \brief Convenience helper for 64-bit sum. +inline std::pair getSum64(uint64_t LDigits, int16_t LScale, + uint64_t RDigits, int16_t RScale) { + return getSum(LDigits, LScale, RDigits, RScale); +} + +/// \brief Get the difference of two scaled numbers. +/// +/// Get LHS minus RHS with as much precision as possible. +/// +/// Returns \c (0, 0) if the RHS is larger than the LHS. +template +std::pair getDifference(DigitsT LDigits, int16_t LScale, + DigitsT RDigits, int16_t RScale) { + static_assert(!std::numeric_limits::is_signed, "expected unsigned"); + + // Normalize digits to match scales. + const DigitsT SavedRDigits = RDigits; + const int16_t SavedRScale = RScale; + matchScales(LDigits, LScale, RDigits, RScale); + + // Compute difference. + if (LDigits <= RDigits) + return std::make_pair(0, 0); + if (RDigits || !SavedRDigits) + return std::make_pair(LDigits - RDigits, LScale); + + // Check if RDigits just barely lost its last bit. E.g., for 32-bit: + // + // 1*2^32 - 1*2^0 == 0xffffffff != 1*2^32 + const auto RLgFloor = getLgFloor(SavedRDigits, SavedRScale); + if (!compare(LDigits, LScale, DigitsT(1), RLgFloor + getWidth())) + return std::make_pair(std::numeric_limits::max(), RLgFloor); + + return std::make_pair(LDigits, LScale); +} + +/// \brief Convenience helper for 32-bit difference. +inline std::pair getDifference32(uint32_t LDigits, + int16_t LScale, + uint32_t RDigits, + int16_t RScale) { + return getDifference(LDigits, LScale, RDigits, RScale); +} + +/// \brief Convenience helper for 64-bit difference. +inline std::pair getDifference64(uint64_t LDigits, + int16_t LScale, + uint64_t RDigits, + int16_t RScale) { + return getDifference(LDigits, LScale, RDigits, RScale); +} + +} // end namespace ScaledNumbers +} // end namespace llvm_ks + +namespace llvm_ks { + +class raw_ostream; +class ScaledNumberBase { +public: + static const int DefaultPrecision = 10; + + static void dump(uint64_t D, int16_t E, int Width); + static raw_ostream &print(raw_ostream &OS, uint64_t D, int16_t E, int Width, + unsigned Precision); + static std::string toString(uint64_t D, int16_t E, int Width, + unsigned Precision); + static int countLeadingZeros32(uint32_t N) { return countLeadingZeros(N); } + static int countLeadingZeros64(uint64_t N) { return countLeadingZeros(N); } + static uint64_t getHalf(uint64_t N) { return (N >> 1) + (N & 1); } + + static std::pair splitSigned(int64_t N) { + if (N >= 0) + return std::make_pair(N, false); + uint64_t Unsigned = N == INT64_MIN ? UINT64_C(1) << 63 : uint64_t(-N); + return std::make_pair(Unsigned, true); + } + static int64_t joinSigned(uint64_t U, bool IsNeg) { + if (U > uint64_t(INT64_MAX)) + return IsNeg ? INT64_MIN : INT64_MAX; + return IsNeg ? -int64_t(U) : int64_t(U); + } +}; + +/// \brief Simple representation of a scaled number. +/// +/// ScaledNumber is a number represented by digits and a scale. It uses simple +/// saturation arithmetic and every operation is well-defined for every value. +/// It's somewhat similar in behaviour to a soft-float, but is *not* a +/// replacement for one. If you're doing numerics, look at \a APFloat instead. +/// Nevertheless, we've found these semantics useful for modelling certain cost +/// metrics. +/// +/// The number is split into a signed scale and unsigned digits. The number +/// represented is \c getDigits()*2^getScale(). In this way, the digits are +/// much like the mantissa in the x87 long double, but there is no canonical +/// form so the same number can be represented by many bit representations. +/// +/// ScaledNumber is templated on the underlying integer type for digits, which +/// is expected to be unsigned. +/// +/// Unlike APFloat, ScaledNumber does not model architecture floating point +/// behaviour -- while this might make it a little faster and easier to reason +/// about, it certainly makes it more dangerous for general numerics. +/// +/// ScaledNumber is totally ordered. However, there is no canonical form, so +/// there are multiple representations of most scalars. E.g.: +/// +/// ScaledNumber(8u, 0) == ScaledNumber(4u, 1) +/// ScaledNumber(4u, 1) == ScaledNumber(2u, 2) +/// ScaledNumber(2u, 2) == ScaledNumber(1u, 3) +/// +/// ScaledNumber implements most arithmetic operations. Precision is kept +/// where possible. Uses simple saturation arithmetic, so that operations +/// saturate to 0.0 or getLargest() rather than under or overflowing. It has +/// some extra arithmetic for unit inversion. 0.0/0.0 is defined to be 0.0. +/// Any other division by 0.0 is defined to be getLargest(). +/// +/// As a convenience for modifying the exponent, left and right shifting are +/// both implemented, and both interpret negative shifts as positive shifts in +/// the opposite direction. +/// +/// Scales are limited to the range accepted by x87 long double. This makes +/// it trivial to add functionality to convert to APFloat (this is already +/// relied on for the implementation of printing). +/// +/// Possible (and conflicting) future directions: +/// +/// 1. Turn this into a wrapper around \a APFloat. +/// 2. Share the algorithm implementations with \a APFloat. +/// 3. Allow \a ScaledNumber to represent a signed number. +template class ScaledNumber : ScaledNumberBase { +public: + static_assert(!std::numeric_limits::is_signed, + "only unsigned floats supported"); + + typedef DigitsT DigitsType; + +private: + typedef std::numeric_limits DigitsLimits; + + static const int Width = sizeof(DigitsType) * 8; + static_assert(Width <= 64, "invalid integer width for digits"); + +private: + DigitsType Digits; + int16_t Scale; + +public: + ScaledNumber() : Digits(0), Scale(0) {} + + ScaledNumber(DigitsType Digits, int16_t Scale) + : Digits(Digits), Scale(Scale) {} + +private: + ScaledNumber(const std::pair &X) + : Digits(X.first), Scale(X.second) {} + +public: + static ScaledNumber getZero() { return ScaledNumber(0, 0); } + static ScaledNumber getOne() { return ScaledNumber(1, 0); } + static ScaledNumber getLargest() { + return ScaledNumber(DigitsLimits::max(), ScaledNumbers::MaxScale); + } + static ScaledNumber get(uint64_t N) { return adjustToWidth(N, 0); } + static ScaledNumber getInverse(uint64_t N) { + return get(N).invert(); + } + static ScaledNumber getFraction(DigitsType N, DigitsType D) { + return getQuotient(N, D); + } + + int16_t getScale() const { return Scale; } + DigitsType getDigits() const { return Digits; } + + /// \brief Convert to the given integer type. + /// + /// Convert to \c IntT using simple saturating arithmetic, truncating if + /// necessary. + template IntT toInt() const; + + bool isZero() const { return !Digits; } + bool isLargest() const { return *this == getLargest(); } + bool isOne() const { + if (Scale > 0 || Scale <= -Width) + return false; + return Digits == DigitsType(1) << -Scale; + } + + /// \brief The log base 2, rounded. + /// + /// Get the lg of the scalar. lg 0 is defined to be INT32_MIN. + int32_t lg() const { return ScaledNumbers::getLg(Digits, Scale); } + + /// \brief The log base 2, rounded towards INT32_MIN. + /// + /// Get the lg floor. lg 0 is defined to be INT32_MIN. + int32_t lgFloor() const { return ScaledNumbers::getLgFloor(Digits, Scale); } + + /// \brief The log base 2, rounded towards INT32_MAX. + /// + /// Get the lg ceiling. lg 0 is defined to be INT32_MIN. + int32_t lgCeiling() const { + return ScaledNumbers::getLgCeiling(Digits, Scale); + } + + bool operator==(const ScaledNumber &X) const { return compare(X) == 0; } + bool operator<(const ScaledNumber &X) const { return compare(X) < 0; } + bool operator!=(const ScaledNumber &X) const { return compare(X) != 0; } + bool operator>(const ScaledNumber &X) const { return compare(X) > 0; } + bool operator<=(const ScaledNumber &X) const { return compare(X) <= 0; } + bool operator>=(const ScaledNumber &X) const { return compare(X) >= 0; } + + bool operator!() const { return isZero(); } + + /// \brief Convert to a decimal representation in a string. + /// + /// Convert to a string. Uses scientific notation for very large/small + /// numbers. Scientific notation is used roughly for numbers outside of the + /// range 2^-64 through 2^64. + /// + /// \c Precision indicates the number of decimal digits of precision to use; + /// 0 requests the maximum available. + /// + /// As a special case to make debugging easier, if the number is small enough + /// to convert without scientific notation and has more than \c Precision + /// digits before the decimal place, it's printed accurately to the first + /// digit past zero. E.g., assuming 10 digits of precision: + /// + /// 98765432198.7654... => 98765432198.8 + /// 8765432198.7654... => 8765432198.8 + /// 765432198.7654... => 765432198.8 + /// 65432198.7654... => 65432198.77 + /// 5432198.7654... => 5432198.765 + std::string toString(unsigned Precision = DefaultPrecision) { + return ScaledNumberBase::toString(Digits, Scale, Width, Precision); + } + + /// \brief Print a decimal representation. + /// + /// Print a string. See toString for documentation. + raw_ostream &print(raw_ostream &OS, + unsigned Precision = DefaultPrecision) const { + return ScaledNumberBase::print(OS, Digits, Scale, Width, Precision); + } + void dump() const { return ScaledNumberBase::dump(Digits, Scale, Width); } + + ScaledNumber &operator+=(const ScaledNumber &X) { + std::tie(Digits, Scale) = + ScaledNumbers::getSum(Digits, Scale, X.Digits, X.Scale); + // Check for exponent past MaxScale. + if (Scale > ScaledNumbers::MaxScale) + *this = getLargest(); + return *this; + } + ScaledNumber &operator-=(const ScaledNumber &X) { + std::tie(Digits, Scale) = + ScaledNumbers::getDifference(Digits, Scale, X.Digits, X.Scale); + return *this; + } + ScaledNumber &operator*=(const ScaledNumber &X); + ScaledNumber &operator/=(const ScaledNumber &X); + ScaledNumber &operator<<=(int16_t Shift) { + shiftLeft(Shift); + return *this; + } + ScaledNumber &operator>>=(int16_t Shift) { + shiftRight(Shift); + return *this; + } + +private: + void shiftLeft(int32_t Shift); + void shiftRight(int32_t Shift); + + /// \brief Adjust two floats to have matching exponents. + /// + /// Adjust \c this and \c X to have matching exponents. Returns the new \c X + /// by value. Does nothing if \a isZero() for either. + /// + /// The value that compares smaller will lose precision, and possibly become + /// \a isZero(). + ScaledNumber matchScales(ScaledNumber X) { + ScaledNumbers::matchScales(Digits, Scale, X.Digits, X.Scale); + return X; + } + +public: + /// \brief Scale a large number accurately. + /// + /// Scale N (multiply it by this). Uses full precision multiplication, even + /// if Width is smaller than 64, so information is not lost. + uint64_t scale(uint64_t N) const; + uint64_t scaleByInverse(uint64_t N) const { + // TODO: implement directly, rather than relying on inverse. Inverse is + // expensive. + return inverse().scale(N); + } + int64_t scale(int64_t N) const { + std::pair Unsigned = splitSigned(N); + return joinSigned(scale(Unsigned.first), Unsigned.second); + } + int64_t scaleByInverse(int64_t N) const { + std::pair Unsigned = splitSigned(N); + return joinSigned(scaleByInverse(Unsigned.first), Unsigned.second); + } + + int compare(const ScaledNumber &X) const { + return ScaledNumbers::compare(Digits, Scale, X.Digits, X.Scale); + } + int compareTo(uint64_t N) const { + return ScaledNumbers::compare(Digits, Scale, N, 0); + } + int compareTo(int64_t N) const { return N < 0 ? 1 : compareTo(uint64_t(N)); } + + ScaledNumber &invert() { return *this = ScaledNumber::get(1) / *this; } + ScaledNumber inverse() const { return ScaledNumber(*this).invert(); } + +private: + static ScaledNumber getProduct(DigitsType LHS, DigitsType RHS) { + return ScaledNumbers::getProduct(LHS, RHS); + } + static ScaledNumber getQuotient(DigitsType Dividend, DigitsType Divisor) { + return ScaledNumbers::getQuotient(Dividend, Divisor); + } + + static int countLeadingZerosWidth(DigitsType Digits) { + if (Width == 64) + return countLeadingZeros64(Digits); + if (Width == 32) + return countLeadingZeros32(Digits); + return countLeadingZeros32(Digits) + Width - 32; + } + + /// \brief Adjust a number to width, rounding up if necessary. + /// + /// Should only be called for \c Shift close to zero. + /// + /// \pre Shift >= MinScale && Shift + 64 <= MaxScale. + static ScaledNumber adjustToWidth(uint64_t N, int32_t Shift) { + assert(Shift >= ScaledNumbers::MinScale && "Shift should be close to 0"); + assert(Shift <= ScaledNumbers::MaxScale - 64 && + "Shift should be close to 0"); + auto Adjusted = ScaledNumbers::getAdjusted(N, Shift); + return Adjusted; + } + + static ScaledNumber getRounded(ScaledNumber P, bool Round) { + // Saturate. + if (P.isLargest()) + return P; + + return ScaledNumbers::getRounded(P.Digits, P.Scale, Round); + } +}; + +#define SCALED_NUMBER_BOP(op, base) \ + template \ + ScaledNumber operator op(const ScaledNumber &L, \ + const ScaledNumber &R) { \ + return ScaledNumber(L) base R; \ + } +SCALED_NUMBER_BOP(+, += ) +SCALED_NUMBER_BOP(-, -= ) +SCALED_NUMBER_BOP(*, *= ) +SCALED_NUMBER_BOP(/, /= ) +#undef SCALED_NUMBER_BOP + +template +ScaledNumber operator<<(const ScaledNumber &L, + int16_t Shift) { + return ScaledNumber(L) <<= Shift; +} + +template +ScaledNumber operator>>(const ScaledNumber &L, + int16_t Shift) { + return ScaledNumber(L) >>= Shift; +} + +template +raw_ostream &operator<<(raw_ostream &OS, const ScaledNumber &X) { + return X.print(OS, 10); +} + +#define SCALED_NUMBER_COMPARE_TO_TYPE(op, T1, T2) \ + template \ + bool operator op(const ScaledNumber &L, T1 R) { \ + return L.compareTo(T2(R)) op 0; \ + } \ + template \ + bool operator op(T1 L, const ScaledNumber &R) { \ + return 0 op R.compareTo(T2(L)); \ + } +#define SCALED_NUMBER_COMPARE_TO(op) \ + SCALED_NUMBER_COMPARE_TO_TYPE(op, uint64_t, uint64_t) \ + SCALED_NUMBER_COMPARE_TO_TYPE(op, uint32_t, uint64_t) \ + SCALED_NUMBER_COMPARE_TO_TYPE(op, int64_t, int64_t) \ + SCALED_NUMBER_COMPARE_TO_TYPE(op, int32_t, int64_t) +SCALED_NUMBER_COMPARE_TO(< ) +SCALED_NUMBER_COMPARE_TO(> ) +SCALED_NUMBER_COMPARE_TO(== ) +SCALED_NUMBER_COMPARE_TO(!= ) +SCALED_NUMBER_COMPARE_TO(<= ) +SCALED_NUMBER_COMPARE_TO(>= ) +#undef SCALED_NUMBER_COMPARE_TO +#undef SCALED_NUMBER_COMPARE_TO_TYPE + +template +uint64_t ScaledNumber::scale(uint64_t N) const { + if (Width == 64 || N <= DigitsLimits::max()) + return (get(N) * *this).template toInt(); + + // Defer to the 64-bit version. + return ScaledNumber(Digits, Scale).scale(N); +} + +template +template +IntT ScaledNumber::toInt() const { + typedef std::numeric_limits Limits; + if (*this < 1) + return 0; + if (*this >= Limits::max()) + return Limits::max(); + + IntT N = Digits; + if (Scale > 0) { + assert(size_t(Scale) < sizeof(IntT) * 8); + return N << Scale; + } + if (Scale < 0) { + assert(size_t(-Scale) < sizeof(IntT) * 8); + return N >> -Scale; + } + return N; +} + +template +ScaledNumber &ScaledNumber:: +operator*=(const ScaledNumber &X) { + if (isZero()) + return *this; + if (X.isZero()) + return *this = X; + + // Save the exponents. + int32_t Scales = int32_t(Scale) + int32_t(X.Scale); + + // Get the raw product. + *this = getProduct(Digits, X.Digits); + + // Combine with exponents. + return *this <<= Scales; +} +template +ScaledNumber &ScaledNumber:: +operator/=(const ScaledNumber &X) { + if (isZero()) + return *this; + if (X.isZero()) + return *this = getLargest(); + + // Save the exponents. + int32_t Scales = int32_t(Scale) - int32_t(X.Scale); + + // Get the raw quotient. + *this = getQuotient(Digits, X.Digits); + + // Combine with exponents. + return *this <<= Scales; +} +template void ScaledNumber::shiftLeft(int32_t Shift) { + if (!Shift || isZero()) + return; + assert(Shift != INT32_MIN); + if (Shift < 0) { + shiftRight(-Shift); + return; + } + + // Shift as much as we can in the exponent. + int32_t ScaleShift = std::min(Shift, ScaledNumbers::MaxScale - Scale); + Scale += ScaleShift; + if (ScaleShift == Shift) + return; + + // Check this late, since it's rare. + if (isLargest()) + return; + + // Shift the digits themselves. + Shift -= ScaleShift; + if (Shift > countLeadingZerosWidth(Digits)) { + // Saturate. + *this = getLargest(); + return; + } + + Digits <<= Shift; + return; +} + +template void ScaledNumber::shiftRight(int32_t Shift) { + if (!Shift || isZero()) + return; + assert(Shift != INT32_MIN); + if (Shift < 0) { + shiftLeft(-Shift); + return; + } + + // Shift as much as we can in the exponent. + int32_t ScaleShift = std::min(Shift, Scale - ScaledNumbers::MinScale); + Scale -= ScaleShift; + if (ScaleShift == Shift) + return; + + // Shift the digits themselves. + Shift -= ScaleShift; + if (Shift >= Width) { + // Saturate. + *this = getZero(); + return; + } + + Digits >>= Shift; + return; +} + +template struct isPodLike; +template struct isPodLike> { + static const bool value = true; +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/Support/Solaris.h b/llvm/include/llvm/Support/Solaris.h new file mode 100644 index 0000000..b082285 --- /dev/null +++ b/llvm/include/llvm/Support/Solaris.h @@ -0,0 +1,49 @@ +/*===- llvm/Support/Solaris.h ------------------------------------*- C++ -*-===* + * + * The LLVM Compiler Infrastructure + * + * This file is distributed under the University of Illinois Open Source + * License. See LICENSE.TXT for details. + * + *===----------------------------------------------------------------------===* + * + * This file contains portability fixes for Solaris hosts. + * + *===----------------------------------------------------------------------===*/ + +#ifndef LLVM_SUPPORT_SOLARIS_H +#define LLVM_SUPPORT_SOLARIS_H + +#include +#include + +/* Solaris doesn't have endian.h. SPARC is the only supported big-endian ISA. */ +#define BIG_ENDIAN 4321 +#define LITTLE_ENDIAN 1234 +#if defined(__sparc) || defined(__sparc__) +#define BYTE_ORDER BIG_ENDIAN +#else +#define BYTE_ORDER LITTLE_ENDIAN +#endif + +#undef CS +#undef DS +#undef ES +#undef FS +#undef GS +#undef SS +#undef EAX +#undef ECX +#undef EDX +#undef EBX +#undef ESP +#undef EBP +#undef ESI +#undef EDI +#undef EIP +#undef UESP +#undef EFL +#undef ERR +#undef TRAPNO + +#endif diff --git a/llvm/include/llvm/Support/SourceMgr.h b/llvm/include/llvm/Support/SourceMgr.h new file mode 100644 index 0000000..aced088 --- /dev/null +++ b/llvm/include/llvm/Support/SourceMgr.h @@ -0,0 +1,289 @@ +//===- SourceMgr.h - Manager for Source Buffers & Diagnostics ---*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the SMDiagnostic and SourceMgr classes. This +// provides a simple substrate for diagnostics, #include handling, and other low +// level things for simple parsers. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_SOURCEMGR_H +#define LLVM_SUPPORT_SOURCEMGR_H + +#include "llvm/ADT/ArrayRef.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/ADT/Twine.h" +#include "llvm/Support/MemoryBuffer.h" +#include "llvm/Support/SMLoc.h" +#include + +namespace llvm_ks { + class SourceMgr; + class SMDiagnostic; + class SMFixIt; + class Twine; + class raw_ostream; + +/// This owns the files read by a parser, handles include stacks, +/// and handles diagnostic wrangling. +class SourceMgr { +public: + enum DiagKind { + DK_Error, + DK_Warning, + DK_Note + }; + + /// Clients that want to handle their own diagnostics in a custom way can + /// register a function pointer+context as a diagnostic handler. + /// It gets called each time PrintMessage is invoked. + typedef void (*DiagHandlerTy)(const SMDiagnostic &, void *Context); +private: + struct SrcBuffer { + /// The memory buffer for the file. + std::unique_ptr Buffer; + + /// This is the location of the parent include, or null if at the top level. + SMLoc IncludeLoc; + + SrcBuffer() {} + + SrcBuffer(SrcBuffer &&O) + : Buffer(std::move(O.Buffer)), IncludeLoc(O.IncludeLoc) {} + }; + + /// This is all of the buffers that we are reading from. + std::vector Buffers; + + // This is the list of directories we should search for include files in. + std::vector IncludeDirectories; + + /// This is a cache for line number queries, its implementation is really + /// private to SourceMgr.cpp. + mutable void *LineNoCache; + + DiagHandlerTy DiagHandler; + void *DiagContext; + + bool isValidBufferID(unsigned i) const { return i && i <= Buffers.size(); } + + SourceMgr(const SourceMgr&) = delete; + void operator=(const SourceMgr&) = delete; +public: + SourceMgr() + : LineNoCache(nullptr), DiagHandler(nullptr), DiagContext(nullptr) {} + ~SourceMgr(); + + void setIncludeDirs(const std::vector &Dirs) { + IncludeDirectories = Dirs; + } + + /// Specify a diagnostic handler to be invoked every time PrintMessage is + /// called. \p Ctx is passed into the handler when it is invoked. + void setDiagHandler(DiagHandlerTy DH, void *Ctx = nullptr) { + DiagHandler = DH; + DiagContext = Ctx; + } + + DiagHandlerTy getDiagHandler() const { return DiagHandler; } + void *getDiagContext() const { return DiagContext; } + + const SrcBuffer &getBufferInfo(unsigned i) const { + assert(isValidBufferID(i)); + return Buffers[i - 1]; + } + + const MemoryBuffer *getMemoryBuffer(unsigned i) const { + assert(isValidBufferID(i)); + return Buffers[i - 1].Buffer.get(); + } + + unsigned getNumBuffers() const { + return Buffers.size(); + } + + unsigned getMainFileID() const { + assert(getNumBuffers()); + return 1; + } + + SMLoc getParentIncludeLoc(unsigned i) const { + assert(isValidBufferID(i)); + return Buffers[i - 1].IncludeLoc; + } + + void clearBuffers() { + Buffers.clear(); + } + + /// Add a new source buffer to this source manager. This takes ownership of + /// the memory buffer. + unsigned AddNewSourceBuffer(std::unique_ptr F, + SMLoc IncludeLoc) { + SrcBuffer NB; + NB.Buffer = std::move(F); + NB.IncludeLoc = IncludeLoc; + Buffers.push_back(std::move(NB)); + return Buffers.size(); + } + + /// Search for a file with the specified name in the current directory or in + /// one of the IncludeDirs. + /// + /// If no file is found, this returns 0, otherwise it returns the buffer ID + /// of the stacked file. The full path to the included file can be found in + /// \p IncludedFile. + unsigned AddIncludeFile(const std::string &Filename, SMLoc IncludeLoc, + std::string &IncludedFile); + + /// Return the ID of the buffer containing the specified location. + /// + /// 0 is returned if the buffer is not found. + unsigned FindBufferContainingLoc(SMLoc Loc) const; + + /// Find the line number for the specified location in the specified file. + /// This is not a fast method. + unsigned FindLineNumber(SMLoc Loc, unsigned BufferID = 0) const { + return getLineAndColumn(Loc, BufferID).first; + } + + /// Find the line and column number for the specified location in the + /// specified file. This is not a fast method. + std::pair getLineAndColumn(SMLoc Loc, + unsigned BufferID = 0) const; + + /// Emit a message about the specified location with the specified string. + /// + /// \param ShowColors Display colored messages if output is a terminal and + /// the default error handler is used. + void PrintMessage(raw_ostream &OS, SMLoc Loc, DiagKind Kind, + const Twine &Msg, + ArrayRef Ranges = None, + ArrayRef FixIts = None, + bool ShowColors = true) const; + + /// Emits a diagnostic to llvm_ks::errs(). + void PrintMessage(SMLoc Loc, DiagKind Kind, const Twine &Msg, + ArrayRef Ranges = None, + ArrayRef FixIts = None, + bool ShowColors = true) const; + + /// Emits a manually-constructed diagnostic to the given output stream. + /// + /// \param ShowColors Display colored messages if output is a terminal and + /// the default error handler is used. + void PrintMessage(raw_ostream &OS, const SMDiagnostic &Diagnostic, + bool ShowColors = true) const; + + /// Return an SMDiagnostic at the specified location with the specified + /// string. + /// + /// \param Msg If non-null, the kind of message (e.g., "error") which is + /// prefixed to the message. + SMDiagnostic GetMessage(SMLoc Loc, DiagKind Kind, const Twine &Msg, + ArrayRef Ranges = None, + ArrayRef FixIts = None) const; + + /// Prints the names of included files and the line of the file they were + /// included from. A diagnostic handler can use this before printing its + /// custom formatted message. + /// + /// \param IncludeLoc The location of the include. + /// \param OS the raw_ostream to print on. + void PrintIncludeStack(SMLoc IncludeLoc, raw_ostream &OS) const; +}; + + +/// Represents a single fixit, a replacement of one range of text with another. +class SMFixIt { + SMRange Range; + + std::string Text; + +public: + // FIXME: Twine.str() is not very efficient. + SMFixIt(SMLoc Loc, const Twine &Insertion) + : Range(Loc, Loc), Text(Insertion.str()) { + assert(Loc.isValid()); + } + + // FIXME: Twine.str() is not very efficient. + SMFixIt(SMRange R, const Twine &Replacement) + : Range(R), Text(Replacement.str()) { + assert(R.isValid()); + } + + StringRef getText() const { return Text; } + SMRange getRange() const { return Range; } + + bool operator<(const SMFixIt &Other) const { + if (Range.Start.getPointer() != Other.Range.Start.getPointer()) + return Range.Start.getPointer() < Other.Range.Start.getPointer(); + if (Range.End.getPointer() != Other.Range.End.getPointer()) + return Range.End.getPointer() < Other.Range.End.getPointer(); + return Text < Other.Text; + } +}; + + +/// Instances of this class encapsulate one diagnostic report, allowing +/// printing to a raw_ostream as a caret diagnostic. +class SMDiagnostic { + const SourceMgr *SM; + SMLoc Loc; + std::string Filename; + int LineNo, ColumnNo; + SourceMgr::DiagKind Kind; + std::string Message, LineContents; + std::vector > Ranges; + SmallVector FixIts; + +public: + // Null diagnostic. + SMDiagnostic() + : SM(nullptr), LineNo(0), ColumnNo(0), Kind(SourceMgr::DK_Error) {} + // Diagnostic with no location (e.g. file not found, command line arg error). + SMDiagnostic(StringRef filename, SourceMgr::DiagKind Knd, StringRef Msg) + : SM(nullptr), Filename(filename), LineNo(-1), ColumnNo(-1), Kind(Knd), + Message(Msg) {} + + // Diagnostic with a location. + SMDiagnostic(const SourceMgr &sm, SMLoc L, StringRef FN, + int Line, int Col, SourceMgr::DiagKind Kind, + StringRef Msg, StringRef LineStr, + ArrayRef > Ranges, + ArrayRef FixIts = None); + + const SourceMgr *getSourceMgr() const { return SM; } + SMLoc getLoc() const { return Loc; } + StringRef getFilename() const { return Filename; } + int getLineNo() const { return LineNo; } + int getColumnNo() const { return ColumnNo; } + SourceMgr::DiagKind getKind() const { return Kind; } + StringRef getMessage() const { return Message; } + StringRef getLineContents() const { return LineContents; } + ArrayRef > getRanges() const { + return Ranges; + } + + void addFixIt(const SMFixIt &Hint) { + FixIts.push_back(Hint); + } + + ArrayRef getFixIts() const { + return FixIts; + } + + void print(const char *ProgName, raw_ostream &S, bool ShowColors = true, + bool ShowKindLabel = true) const; +}; + +} // end llvm namespace + +#endif diff --git a/llvm/include/llvm/Support/StringPool.h b/llvm/include/llvm/Support/StringPool.h new file mode 100644 index 0000000..1ac9227 --- /dev/null +++ b/llvm/include/llvm/Support/StringPool.h @@ -0,0 +1,138 @@ +//===-- StringPool.h - Interned string pool ---------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares an interned string pool, which helps reduce the cost of +// strings by using the same storage for identical strings. +// +// To intern a string: +// +// StringPool Pool; +// PooledStringPtr Str = Pool.intern("wakka wakka"); +// +// To use the value of an interned string, use operator bool and operator*: +// +// if (Str) +// cerr << "the string is" << *Str << "\n"; +// +// Pooled strings are immutable, but you can change a PooledStringPtr to point +// to another instance. So that interned strings can eventually be freed, +// strings in the string pool are reference-counted (automatically). +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_STRINGPOOL_H +#define LLVM_SUPPORT_STRINGPOOL_H + +#include "llvm/ADT/StringMap.h" +#include + +namespace llvm_ks { + + class PooledStringPtr; + + /// StringPool - An interned string pool. Use the intern method to add a + /// string. Strings are removed automatically as PooledStringPtrs are + /// destroyed. + class StringPool { + /// PooledString - This is the value of an entry in the pool's interning + /// table. + struct PooledString { + StringPool *Pool; ///< So the string can remove itself. + unsigned Refcount; ///< Number of referencing PooledStringPtrs. + + public: + PooledString() : Pool(nullptr), Refcount(0) { } + }; + + friend class PooledStringPtr; + + typedef StringMap table_t; + typedef StringMapEntry entry_t; + table_t InternTable; + + public: + StringPool(); + ~StringPool(); + + /// intern - Adds a string to the pool and returns a reference-counted + /// pointer to it. No additional memory is allocated if the string already + /// exists in the pool. + PooledStringPtr intern(StringRef Str); + + /// empty - Checks whether the pool is empty. Returns true if so. + /// + inline bool empty() const { return InternTable.empty(); } + }; + + /// PooledStringPtr - A pointer to an interned string. Use operator bool to + /// test whether the pointer is valid, and operator * to get the string if so. + /// This is a lightweight value class with storage requirements equivalent to + /// a single pointer, but it does have reference-counting overhead when + /// copied. + class PooledStringPtr { + typedef StringPool::entry_t entry_t; + entry_t *S; + + public: + PooledStringPtr() : S(nullptr) {} + + explicit PooledStringPtr(entry_t *E) : S(E) { + if (S) ++S->getValue().Refcount; + } + + PooledStringPtr(const PooledStringPtr &That) : S(That.S) { + if (S) ++S->getValue().Refcount; + } + + PooledStringPtr &operator=(const PooledStringPtr &That) { + if (S != That.S) { + clear(); + S = That.S; + if (S) ++S->getValue().Refcount; + } + return *this; + } + + void clear() { + if (!S) + return; + if (--S->getValue().Refcount == 0) { + S->getValue().Pool->InternTable.remove(S); + S->Destroy(); + } + S = nullptr; + } + + ~PooledStringPtr() { clear(); } + + inline const char *begin() const { + assert(*this && "Attempt to dereference empty PooledStringPtr!"); + return S->getKeyData(); + } + + inline const char *end() const { + assert(*this && "Attempt to dereference empty PooledStringPtr!"); + return S->getKeyData() + S->getKeyLength(); + } + + inline unsigned size() const { + assert(*this && "Attempt to dereference empty PooledStringPtr!"); + return S->getKeyLength(); + } + + inline const char *operator*() const { return begin(); } + inline explicit operator bool() const { return S != nullptr; } + + inline bool operator==(const PooledStringPtr &That) const { return S == That.S; } + inline bool operator!=(const PooledStringPtr &That) const { return S != That.S; } + }; + +} // End llvm namespace + +#endif diff --git a/llvm/include/llvm/Support/StringSaver.h b/llvm/include/llvm/Support/StringSaver.h new file mode 100644 index 0000000..184859c --- /dev/null +++ b/llvm/include/llvm/Support/StringSaver.h @@ -0,0 +1,32 @@ +//===- llvm/Support/StringSaver.h -------------------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_STRINGSAVER_H +#define LLVM_SUPPORT_STRINGSAVER_H + +#include "llvm/ADT/StringRef.h" +#include "llvm/ADT/Twine.h" +#include "llvm/Support/Allocator.h" + +namespace llvm_ks { + +/// \brief Saves strings in the inheritor's stable storage and returns a stable +/// raw character pointer. +class StringSaver final { + BumpPtrAllocator &Alloc; + +public: + StringSaver(BumpPtrAllocator &Alloc) : Alloc(Alloc) {} + const char *save(const char *S) { return save(StringRef(S)); } + const char *save(StringRef S); + const char *save(const Twine &S) { return save(StringRef(S.str())); } + const char *save(std::string &S) { return save(StringRef(S)); } +}; +} +#endif diff --git a/llvm/include/llvm/Support/SwapByteOrder.h b/llvm/include/llvm/Support/SwapByteOrder.h new file mode 100644 index 0000000..c341c7d --- /dev/null +++ b/llvm/include/llvm/Support/SwapByteOrder.h @@ -0,0 +1,125 @@ +//===- SwapByteOrder.h - Generic and optimized byte swaps -------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares generic and optimized functions to swap the byte order of +// an integral type. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_SWAPBYTEORDER_H +#define LLVM_SUPPORT_SWAPBYTEORDER_H + +#include "llvm/Support/Compiler.h" +#include "llvm/Support/DataTypes.h" +#include +#include + +namespace llvm_ks { +namespace sys { + +/// SwapByteOrder_16 - This function returns a byte-swapped representation of +/// the 16-bit argument. +inline uint16_t SwapByteOrder_16(uint16_t value) { +#if defined(_MSC_VER) && !defined(_DEBUG) + // The DLL version of the runtime lacks these functions (bug!?), but in a + // release build they're replaced with BSWAP instructions anyway. + return _byteswap_ushort(value); +#else + uint16_t Hi = value << 8; + uint16_t Lo = value >> 8; + return Hi | Lo; +#endif +} + +/// SwapByteOrder_32 - This function returns a byte-swapped representation of +/// the 32-bit argument. +inline uint32_t SwapByteOrder_32(uint32_t value) { +#if defined(__llvm__) || (LLVM_GNUC_PREREQ(4, 3, 0) && !defined(__ICC)) + return __builtin_bswap32(value); +#elif defined(_MSC_VER) && !defined(_DEBUG) + return _byteswap_ulong(value); +#else + uint32_t Byte0 = value & 0x000000FF; + uint32_t Byte1 = value & 0x0000FF00; + uint32_t Byte2 = value & 0x00FF0000; + uint32_t Byte3 = value & 0xFF000000; + return (Byte0 << 24) | (Byte1 << 8) | (Byte2 >> 8) | (Byte3 >> 24); +#endif +} + +/// SwapByteOrder_64 - This function returns a byte-swapped representation of +/// the 64-bit argument. +inline uint64_t SwapByteOrder_64(uint64_t value) { +#if defined(__llvm__) || (LLVM_GNUC_PREREQ(4, 3, 0) && !defined(__ICC)) + return __builtin_bswap64(value); +#elif defined(_MSC_VER) && !defined(_DEBUG) + return _byteswap_uint64(value); +#else + uint64_t Hi = SwapByteOrder_32(uint32_t(value)); + uint32_t Lo = SwapByteOrder_32(uint32_t(value >> 32)); + return (Hi << 32) | Lo; +#endif +} + +inline unsigned char getSwappedBytes(unsigned char C) { return C; } +inline signed char getSwappedBytes(signed char C) { return C; } +inline char getSwappedBytes(char C) { return C; } + +inline unsigned short getSwappedBytes(unsigned short C) { return SwapByteOrder_16(C); } +inline signed short getSwappedBytes( signed short C) { return SwapByteOrder_16(C); } + +inline unsigned int getSwappedBytes(unsigned int C) { return SwapByteOrder_32(C); } +inline signed int getSwappedBytes( signed int C) { return SwapByteOrder_32(C); } + +#if __LONG_MAX__ == __INT_MAX__ +inline unsigned long getSwappedBytes(unsigned long C) { return SwapByteOrder_32(C); } +inline signed long getSwappedBytes( signed long C) { return SwapByteOrder_32(C); } +#elif __LONG_MAX__ == __LONG_LONG_MAX__ +inline unsigned long getSwappedBytes(unsigned long C) { return SwapByteOrder_64(C); } +inline signed long getSwappedBytes( signed long C) { return SwapByteOrder_64(C); } +#else +#error "Unknown long size!" +#endif + +inline unsigned long long getSwappedBytes(unsigned long long C) { + return SwapByteOrder_64(C); +} +inline signed long long getSwappedBytes(signed long long C) { + return SwapByteOrder_64(C); +} + +inline float getSwappedBytes(float C) { + union { + uint32_t i; + float f; + } in, out; + in.f = C; + out.i = SwapByteOrder_32(in.i); + return out.f; +} + +inline double getSwappedBytes(double C) { + union { + uint64_t i; + double d; + } in, out; + in.d = C; + out.i = SwapByteOrder_64(in.i); + return out.d; +} + +template +inline void swapByteOrder(T &Value) { + Value = getSwappedBytes(Value); +} + +} // end namespace sys +} // end namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/Support/TargetParser.h b/llvm/include/llvm/Support/TargetParser.h new file mode 100644 index 0000000..2c10cbc --- /dev/null +++ b/llvm/include/llvm/Support/TargetParser.h @@ -0,0 +1,145 @@ +//===-- TargetParser - Parser for target features ---------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements a target parser to recognise hardware features such as +// FPU/CPU/ARCH names as well as specific support such as HDIV, etc. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_TARGETPARSER_H +#define LLVM_SUPPORT_TARGETPARSER_H + +// FIXME: vector is used because that's what clang uses for subtarget feature +// lists, but SmallVector would probably be better +#include + +namespace llvm_ks { +class StringRef; + +// Target specific information into their own namespaces. These should be +// generated from TableGen because the information is already there, and there +// is where new information about targets will be added. +// FIXME: To TableGen this we need to make some table generated files available +// even if the back-end is not compiled with LLVM, plus we need to create a new +// back-end to TableGen to create these clean tables. +namespace ARM { + +// FPU names. +enum FPUKind { +#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) KIND, +#include "ARMTargetParser.def" + FK_LAST +}; + +// FPU Version +enum FPUVersion { + FV_NONE = 0, + FV_VFPV2, + FV_VFPV3, + FV_VFPV3_FP16, + FV_VFPV4, + FV_VFPV5 +}; + +// An FPU name implies one of three levels of Neon support: +enum NeonSupportLevel { + NS_None = 0, ///< No Neon + NS_Neon, ///< Neon + NS_Crypto ///< Neon with Crypto +}; + +// An FPU name restricts the FPU in one of three ways: +enum FPURestriction { + FR_None = 0, ///< No restriction + FR_D16, ///< Only 16 D registers + FR_SP_D16 ///< Only single-precision instructions, with 16 D registers +}; + +// Arch names. +enum ArchKind { +#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) ID, +#include "ARMTargetParser.def" + AK_LAST +}; + +// Arch extension modifiers for CPUs. +enum ArchExtKind : unsigned { + AEK_INVALID = 0x0, + AEK_NONE = 0x1, + AEK_CRC = 0x2, + AEK_CRYPTO = 0x4, + AEK_FP = 0x8, + AEK_HWDIV = 0x10, + AEK_HWDIVARM = 0x20, + AEK_MP = 0x40, + AEK_SIMD = 0x80, + AEK_SEC = 0x100, + AEK_VIRT = 0x200, + AEK_DSP = 0x400, + AEK_FP16 = 0x800, + // Unsupported extensions. + AEK_OS = 0x8000000, + AEK_IWMMXT = 0x10000000, + AEK_IWMMXT2 = 0x20000000, + AEK_MAVERICK = 0x40000000, + AEK_XSCALE = 0x80000000, +}; + +// ISA kinds. +enum ISAKind { IK_INVALID = 0, IK_ARM, IK_THUMB, IK_AARCH64 }; + +// Endianness +// FIXME: BE8 vs. BE32? +enum EndianKind { EK_INVALID = 0, EK_LITTLE, EK_BIG }; + +// v6/v7/v8 Profile +enum ProfileKind { PK_INVALID = 0, PK_A, PK_R, PK_M }; + +StringRef getCanonicalArchName(StringRef Arch); + +// Information by ID +StringRef getFPUName(unsigned FPUKind); +unsigned getFPUVersion(unsigned FPUKind); +unsigned getFPUNeonSupportLevel(unsigned FPUKind); +unsigned getFPURestriction(unsigned FPUKind); + +// FIXME: These should be moved to TargetTuple once it exists +bool getFPUFeatures(unsigned FPUKind, std::vector &Features); +bool getHWDivFeatures(unsigned HWDivKind, std::vector &Features); +bool getExtensionFeatures(unsigned Extensions, + std::vector &Features); + +StringRef getArchName(unsigned ArchKind); +unsigned getArchAttr(unsigned ArchKind); +StringRef getCPUAttr(unsigned ArchKind); +StringRef getSubArch(unsigned ArchKind); +StringRef getArchExtName(unsigned ArchExtKind); +const char *getArchExtFeature(StringRef ArchExt); +StringRef getHWDivName(unsigned HWDivKind); + +// Information by Name +unsigned getDefaultFPU(StringRef CPU, unsigned ArchKind); +unsigned getDefaultExtensions(StringRef CPU, unsigned ArchKind); +StringRef getDefaultCPU(StringRef Arch); + +// Parser +unsigned parseHWDiv(StringRef HWDiv); +unsigned parseFPU(StringRef FPU); +unsigned parseArch(StringRef Arch); +unsigned parseArchExt(StringRef ArchExt); +unsigned parseCPUArch(StringRef CPU); +unsigned parseArchISA(StringRef Arch); +unsigned parseArchEndian(StringRef Arch); +unsigned parseArchProfile(StringRef Arch); +unsigned parseArchVersion(StringRef Arch); + +} // namespace ARM +} // namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/Support/TargetRegistry.h b/llvm/include/llvm/Support/TargetRegistry.h new file mode 100644 index 0000000..3d4b5bf --- /dev/null +++ b/llvm/include/llvm/Support/TargetRegistry.h @@ -0,0 +1,941 @@ +//===-- Support/TargetRegistry.h - Target Registration ----------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file exposes the TargetRegistry interface, which tools can use to access +// the appropriate target specific classes (TargetMachine, AsmPrinter, etc.) +// which have been registered. +// +// Target specific class implementations should register themselves using the +// appropriate TargetRegistry interfaces. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_TARGETREGISTRY_H +#define LLVM_SUPPORT_TARGETREGISTRY_H + +#include "llvm/ADT/Triple.h" +#include "llvm/Support/FormattedStream.h" +#include +#include +#include + +namespace llvm_ks { +class AsmPrinter; +class MCAsmBackend; +class MCAsmInfo; +class MCAsmParser; +class MCCodeEmitter; +class MCContext; +class MCInstrAnalysis; +class MCInstrInfo; +class MCRegisterInfo; +class MCStreamer; +class MCSubtargetInfo; +class MCSymbolizer; +class MCRelocationInfo; +class MCTargetAsmParser; +class MCTargetOptions; +class MCTargetStreamer; +class TargetMachine; +class TargetOptions; +class raw_ostream; +class raw_pwrite_stream; +class formatted_raw_ostream; + +MCStreamer *createNullStreamer(MCContext &Ctx); +MCStreamer *createAsmStreamer(MCContext &Ctx, + std::unique_ptr OS, + MCCodeEmitter *CE, + MCAsmBackend *TAB); + +/// Takes ownership of \p TAB and \p CE. +MCStreamer *createELFStreamer(MCContext &Ctx, MCAsmBackend &TAB, + raw_pwrite_stream &OS, MCCodeEmitter *CE, + bool RelaxAll); +MCRelocationInfo *createMCRelocationInfo(const Triple &TT, MCContext &Ctx); + +/// Target - Wrapper for Target specific information. +/// +/// For registration purposes, this is a POD type so that targets can be +/// registered without the use of static constructors. +/// +/// Targets should implement a single global instance of this class (which +/// will be zero initialized), and pass that instance to the TargetRegistry as +/// part of their initialization. +class Target { +public: + friend struct TargetRegistry; + + typedef bool (*ArchMatchFnTy)(Triple::ArchType Arch); + + typedef MCAsmInfo *(*MCAsmInfoCtorFnTy)(const MCRegisterInfo &MRI, + const Triple &TT); + typedef MCInstrInfo *(*MCInstrInfoCtorFnTy)(void); + typedef MCInstrAnalysis *(*MCInstrAnalysisCtorFnTy)(const MCInstrInfo *Info); + typedef MCRegisterInfo *(*MCRegInfoCtorFnTy)(const Triple &TT); + typedef MCSubtargetInfo *(*MCSubtargetInfoCtorFnTy)(const Triple &TT, + StringRef CPU, + StringRef Features); + typedef TargetMachine *(*TargetMachineCtorTy)( + const Target &T, const Triple &TT, StringRef CPU, StringRef Features, + const TargetOptions &Options); + // If it weren't for layering issues (this header is in llvm/Support, but + // depends on MC?) this should take the Streamer by value rather than rvalue + // reference. + typedef AsmPrinter *(*AsmPrinterCtorTy)( + TargetMachine &TM, std::unique_ptr &&Streamer); + typedef MCAsmBackend *(*MCAsmBackendCtorTy)(const Target &T, + const MCRegisterInfo &MRI, + const Triple &TT, StringRef CPU); + typedef MCTargetAsmParser *(*MCAsmParserCtorTy)( + const MCSubtargetInfo &STI, MCAsmParser &P, const MCInstrInfo &MII, + const MCTargetOptions &Options); + typedef MCCodeEmitter *(*MCCodeEmitterCtorTy)(const MCInstrInfo &II, + const MCRegisterInfo &MRI, + MCContext &Ctx); + typedef MCStreamer *(*ELFStreamerCtorTy)(const Triple &T, MCContext &Ctx, + MCAsmBackend &TAB, + raw_pwrite_stream &OS, + MCCodeEmitter *Emitter, + bool RelaxAll); + typedef MCStreamer *(*MachOStreamerCtorTy)(MCContext &Ctx, MCAsmBackend &TAB, + raw_pwrite_stream &OS, + MCCodeEmitter *Emitter, + bool RelaxAll, + bool DWARFMustBeAtTheEnd); + typedef MCTargetStreamer *(*NullTargetStreamerCtorTy)(MCStreamer &S); + typedef MCTargetStreamer *(*AsmTargetStreamerCtorTy)( + MCStreamer &S, formatted_raw_ostream &OS); + typedef MCTargetStreamer *(*ObjectTargetStreamerCtorTy)( + MCStreamer &S, const MCSubtargetInfo &STI); + typedef MCRelocationInfo *(*MCRelocationInfoCtorTy)(const Triple &TT, + MCContext &Ctx); +private: + /// Next - The next registered target in the linked list, maintained by the + /// TargetRegistry. + Target *Next; + + /// The target function for checking if an architecture is supported. + ArchMatchFnTy ArchMatchFn; + + /// Name - The target name. + const char *Name; + + /// ShortDesc - A short description of the target. + const char *ShortDesc; + + /// MCAsmInfoCtorFn - Constructor function for this target's MCAsmInfo, if + /// registered. + MCAsmInfoCtorFnTy MCAsmInfoCtorFn; + + /// MCInstrInfoCtorFn - Constructor function for this target's MCInstrInfo, + /// if registered. + MCInstrInfoCtorFnTy MCInstrInfoCtorFn; + + /// MCInstrAnalysisCtorFn - Constructor function for this target's + /// MCInstrAnalysis, if registered. + MCInstrAnalysisCtorFnTy MCInstrAnalysisCtorFn; + + /// MCRegInfoCtorFn - Constructor function for this target's MCRegisterInfo, + /// if registered. + MCRegInfoCtorFnTy MCRegInfoCtorFn; + + /// MCSubtargetInfoCtorFn - Constructor function for this target's + /// MCSubtargetInfo, if registered. + MCSubtargetInfoCtorFnTy MCSubtargetInfoCtorFn; + + /// TargetMachineCtorFn - Construction function for this target's + /// TargetMachine, if registered. + TargetMachineCtorTy TargetMachineCtorFn; + + /// MCAsmBackendCtorFn - Construction function for this target's + /// MCAsmBackend, if registered. + MCAsmBackendCtorTy MCAsmBackendCtorFn; + + /// MCAsmParserCtorFn - Construction function for this target's + /// MCTargetAsmParser, if registered. + MCAsmParserCtorTy MCAsmParserCtorFn; + + /// AsmPrinterCtorFn - Construction function for this target's AsmPrinter, + /// if registered. + AsmPrinterCtorTy AsmPrinterCtorFn; + + /// MCCodeEmitterCtorFn - Construction function for this target's + /// CodeEmitter, if registered. + MCCodeEmitterCtorTy MCCodeEmitterCtorFn; + + // Construction functions for the various object formats, if registered. + ELFStreamerCtorTy ELFStreamerCtorFn; + + /// Construction function for this target's null TargetStreamer, if + /// registered (default = nullptr). + NullTargetStreamerCtorTy NullTargetStreamerCtorFn; + + /// Construction function for this target's asm TargetStreamer, if + /// registered (default = nullptr). + AsmTargetStreamerCtorTy AsmTargetStreamerCtorFn; + + /// Construction function for this target's obj TargetStreamer, if + /// registered (default = nullptr). + ObjectTargetStreamerCtorTy ObjectTargetStreamerCtorFn; + + /// MCRelocationInfoCtorFn - Construction function for this target's + /// MCRelocationInfo, if registered (default = llvm_ks::createMCRelocationInfo) + MCRelocationInfoCtorTy MCRelocationInfoCtorFn; + +public: + Target() + : ELFStreamerCtorFn(nullptr), NullTargetStreamerCtorFn(nullptr), + AsmTargetStreamerCtorFn(nullptr), ObjectTargetStreamerCtorFn(nullptr), + MCRelocationInfoCtorFn(nullptr) {} + + /// @name Target Information + /// @{ + + // getNext - Return the next registered target. + const Target *getNext() const { return Next; } + + /// getName - Get the target name. + const char *getName() const { return Name; } + + /// getShortDescription - Get a short description of the target. + const char *getShortDescription() const { return ShortDesc; } + + /// @} + /// @name Feature Predicates + /// @{ + + /// hasTargetMachine - Check if this target supports code generation. + bool hasTargetMachine() const { return TargetMachineCtorFn != nullptr; } + + /// hasMCAsmBackend - Check if this target supports .o generation. + bool hasMCAsmBackend() const { return MCAsmBackendCtorFn != nullptr; } + + /// @} + /// @name Feature Constructors + /// @{ + + /// createMCAsmInfo - Create a MCAsmInfo implementation for the specified + /// target triple. + /// + /// \param TheTriple This argument is used to determine the target machine + /// feature set; it should always be provided. Generally this should be + /// either the target triple from the module, or the target triple of the + /// host if that does not exist. + MCAsmInfo *createMCAsmInfo(const MCRegisterInfo &MRI, + StringRef TheTriple) const { + if (!MCAsmInfoCtorFn) + return nullptr; + return MCAsmInfoCtorFn(MRI, Triple(TheTriple)); + } + + /// createMCInstrInfo - Create a MCInstrInfo implementation. + /// + MCInstrInfo *createMCInstrInfo() const { + if (!MCInstrInfoCtorFn) + return nullptr; + return MCInstrInfoCtorFn(); + } + + /// createMCInstrAnalysis - Create a MCInstrAnalysis implementation. + /// + MCInstrAnalysis *createMCInstrAnalysis(const MCInstrInfo *Info) const { + if (!MCInstrAnalysisCtorFn) + return nullptr; + return MCInstrAnalysisCtorFn(Info); + } + + /// createMCRegInfo - Create a MCRegisterInfo implementation. + /// + MCRegisterInfo *createMCRegInfo(StringRef TT) const { + if (!MCRegInfoCtorFn) + return nullptr; + return MCRegInfoCtorFn(Triple(TT)); + } + + /// createMCSubtargetInfo - Create a MCSubtargetInfo implementation. + /// + /// \param TheTriple This argument is used to determine the target machine + /// feature set; it should always be provided. Generally this should be + /// either the target triple from the module, or the target triple of the + /// host if that does not exist. + /// \param CPU This specifies the name of the target CPU. + /// \param Features This specifies the string representation of the + /// additional target features. + MCSubtargetInfo *createMCSubtargetInfo(StringRef TheTriple, StringRef CPU, + StringRef Features) const { + if (!MCSubtargetInfoCtorFn) + return nullptr; + return MCSubtargetInfoCtorFn(Triple(TheTriple), CPU, Features); + } + + /// createTargetMachine - Create a target specific machine implementation + /// for the specified \p Triple. + /// + /// \param TT This argument is used to determine the target machine + /// feature set; it should always be provided. Generally this should be + /// either the target triple from the module, or the target triple of the + /// host if that does not exist. + TargetMachine * + createTargetMachine(StringRef TT, StringRef CPU, StringRef Features, + const TargetOptions &Options) const { + if (!TargetMachineCtorFn) + return nullptr; + return TargetMachineCtorFn(*this, Triple(TT), CPU, Features, Options); + } + + /// createMCAsmBackend - Create a target specific assembly parser. + /// + /// \param TheTriple The target triple string. + MCAsmBackend *createMCAsmBackend(const MCRegisterInfo &MRI, + StringRef TheTriple, StringRef CPU) const { + if (!MCAsmBackendCtorFn) + return nullptr; + return MCAsmBackendCtorFn(*this, MRI, Triple(TheTriple), CPU); + } + + /// createMCAsmParser - Create a target specific assembly parser. + /// + /// \param Parser The target independent parser implementation to use for + /// parsing and lexing. + MCTargetAsmParser *createMCAsmParser(const MCSubtargetInfo &STI, + MCAsmParser &Parser, + const MCInstrInfo &MII, + const MCTargetOptions &Options) const { + if (!MCAsmParserCtorFn) + return nullptr; + return MCAsmParserCtorFn(STI, Parser, MII, Options); + } + + /// createAsmPrinter - Create a target specific assembly printer pass. This + /// takes ownership of the MCStreamer object. + AsmPrinter *createAsmPrinter(TargetMachine &TM, + std::unique_ptr &&Streamer) const { + if (!AsmPrinterCtorFn) + return nullptr; + return AsmPrinterCtorFn(TM, std::move(Streamer)); + } + + /// createMCCodeEmitter - Create a target specific code emitter. + MCCodeEmitter *createMCCodeEmitter(const MCInstrInfo &II, + const MCRegisterInfo &MRI, + MCContext &Ctx) const { + if (!MCCodeEmitterCtorFn) + return nullptr; + return MCCodeEmitterCtorFn(II, MRI, Ctx); + } + + /// Create a target specific MCStreamer. + /// + /// \param T The target triple. + /// \param Ctx The target context. + /// \param TAB The target assembler backend object. Takes ownership. + /// \param OS The stream object. + /// \param Emitter The target independent assembler object.Takes ownership. + /// \param RelaxAll Relax all fixups? + MCStreamer *createMCObjectStreamer(const Triple &T, MCContext &Ctx, + MCAsmBackend &TAB, raw_pwrite_stream &OS, + MCCodeEmitter *Emitter, + const MCSubtargetInfo &STI, bool RelaxAll, + bool DWARFMustBeAtTheEnd) const { + MCStreamer *S; + switch (T.getObjectFormat()) { + default: + llvm_unreachable("Unknown object format"); + case Triple::ELF: + if (ELFStreamerCtorFn) + S = ELFStreamerCtorFn(T, Ctx, TAB, OS, Emitter, RelaxAll); + else + S = createELFStreamer(Ctx, TAB, OS, Emitter, RelaxAll); + break; + } + if (ObjectTargetStreamerCtorFn) + ObjectTargetStreamerCtorFn(*S, STI); + return S; + } + + MCStreamer *createAsmStreamer(MCContext &Ctx, + std::unique_ptr OS, + MCCodeEmitter *CE, + MCAsmBackend *TAB) const { + formatted_raw_ostream &OSRef = *OS; + MCStreamer *S = llvm_ks::createAsmStreamer(Ctx, std::move(OS), CE, TAB); + createAsmTargetStreamer(*S, OSRef); + return S; + } + + MCTargetStreamer *createAsmTargetStreamer(MCStreamer &S, + formatted_raw_ostream &OS) const { + if (AsmTargetStreamerCtorFn) + return AsmTargetStreamerCtorFn(S, OS); + return nullptr; + } + + MCStreamer *createNullStreamer(MCContext &Ctx) const { + MCStreamer *S = llvm_ks::createNullStreamer(Ctx); + return S; + } + + /// createMCRelocationInfo - Create a target specific MCRelocationInfo. + /// + /// \param TT The target triple. + /// \param Ctx The target context. + MCRelocationInfo *createMCRelocationInfo(StringRef TT, MCContext &Ctx) const { + MCRelocationInfoCtorTy Fn = MCRelocationInfoCtorFn + ? MCRelocationInfoCtorFn + : llvm_ks::createMCRelocationInfo; + return Fn(Triple(TT), Ctx); + } + + /// @} +}; + +/// TargetRegistry - Generic interface to target specific features. +struct TargetRegistry { + // FIXME: Make this a namespace, probably just move all the Register* + // functions into Target (currently they all just set members on the Target + // anyway, and Target friends this class so those functions can... + // function). + TargetRegistry() = delete; + + class iterator + : public std::iterator { + const Target *Current; + explicit iterator(Target *T) : Current(T) {} + friend struct TargetRegistry; + + public: + iterator() : Current(nullptr) {} + + bool operator==(const iterator &x) const { return Current == x.Current; } + bool operator!=(const iterator &x) const { return !operator==(x); } + + // Iterator traversal: forward iteration only + iterator &operator++() { // Preincrement + assert(Current && "Cannot increment end iterator!"); + Current = Current->getNext(); + return *this; + } + iterator operator++(int) { // Postincrement + iterator tmp = *this; + ++*this; + return tmp; + } + + const Target &operator*() const { + assert(Current && "Cannot dereference end iterator!"); + return *Current; + } + + const Target *operator->() const { return &operator*(); } + }; + + /// printRegisteredTargetsForVersion - Print the registered targets + /// appropriately for inclusion in a tool's version output. + static void printRegisteredTargetsForVersion(); + + /// @name Registry Access + /// @{ + + static iterator_range targets(); + + /// lookupTarget - Lookup a target based on a target triple. + /// + /// \param Triple - The triple to use for finding a target. + /// \param Error - On failure, an error string describing why no target was + /// found. + static const Target *lookupTarget(const std::string &Triple, + std::string &Error); + + /// lookupTarget - Lookup a target based on an architecture name + /// and a target triple. If the architecture name is non-empty, + /// then the lookup is done by architecture. Otherwise, the target + /// triple is used. + /// + /// \param ArchName - The architecture to use for finding a target. + /// \param TheTriple - The triple to use for finding a target. The + /// triple is updated with canonical architecture name if a lookup + /// by architecture is done. + /// \param Error - On failure, an error string describing why no target was + /// found. + static const Target *lookupTarget(const std::string &ArchName, + Triple &TheTriple, std::string &Error); + + /// @} + /// @name Target Registration + /// @{ + + /// RegisterTarget - Register the given target. Attempts to register a + /// target which has already been registered will be ignored. + /// + /// Clients are responsible for ensuring that registration doesn't occur + /// while another thread is attempting to access the registry. Typically + /// this is done by initializing all targets at program startup. + /// + /// @param T - The target being registered. + /// @param Name - The target name. This should be a static string. + /// @param ShortDesc - A short target description. This should be a static + /// string. + /// @param ArchMatchFn - The arch match checking function for this target. + static void RegisterTarget(Target &T, const char *Name, const char *ShortDesc, + Target::ArchMatchFnTy ArchMatchFn); + + /// RegisterMCAsmInfo - Register a MCAsmInfo implementation for the + /// given target. + /// + /// Clients are responsible for ensuring that registration doesn't occur + /// while another thread is attempting to access the registry. Typically + /// this is done by initializing all targets at program startup. + /// + /// @param T - The target being registered. + /// @param Fn - A function to construct a MCAsmInfo for the target. + static void RegisterMCAsmInfo(Target &T, Target::MCAsmInfoCtorFnTy Fn) { + T.MCAsmInfoCtorFn = Fn; + } + + /// RegisterMCInstrInfo - Register a MCInstrInfo implementation for the + /// given target. + /// + /// Clients are responsible for ensuring that registration doesn't occur + /// while another thread is attempting to access the registry. Typically + /// this is done by initializing all targets at program startup. + /// + /// @param T - The target being registered. + /// @param Fn - A function to construct a MCInstrInfo for the target. + static void RegisterMCInstrInfo(Target &T, Target::MCInstrInfoCtorFnTy Fn) { + T.MCInstrInfoCtorFn = Fn; + } + + /// RegisterMCInstrAnalysis - Register a MCInstrAnalysis implementation for + /// the given target. + static void RegisterMCInstrAnalysis(Target &T, + Target::MCInstrAnalysisCtorFnTy Fn) { + T.MCInstrAnalysisCtorFn = Fn; + } + + /// RegisterMCRegInfo - Register a MCRegisterInfo implementation for the + /// given target. + /// + /// Clients are responsible for ensuring that registration doesn't occur + /// while another thread is attempting to access the registry. Typically + /// this is done by initializing all targets at program startup. + /// + /// @param T - The target being registered. + /// @param Fn - A function to construct a MCRegisterInfo for the target. + static void RegisterMCRegInfo(Target &T, Target::MCRegInfoCtorFnTy Fn) { + T.MCRegInfoCtorFn = Fn; + } + + /// RegisterMCSubtargetInfo - Register a MCSubtargetInfo implementation for + /// the given target. + /// + /// Clients are responsible for ensuring that registration doesn't occur + /// while another thread is attempting to access the registry. Typically + /// this is done by initializing all targets at program startup. + /// + /// @param T - The target being registered. + /// @param Fn - A function to construct a MCSubtargetInfo for the target. + static void RegisterMCSubtargetInfo(Target &T, + Target::MCSubtargetInfoCtorFnTy Fn) { + T.MCSubtargetInfoCtorFn = Fn; + } + + /// RegisterTargetMachine - Register a TargetMachine implementation for the + /// given target. + /// + /// Clients are responsible for ensuring that registration doesn't occur + /// while another thread is attempting to access the registry. Typically + /// this is done by initializing all targets at program startup. + /// + /// @param T - The target being registered. + /// @param Fn - A function to construct a TargetMachine for the target. + static void RegisterTargetMachine(Target &T, Target::TargetMachineCtorTy Fn) { + T.TargetMachineCtorFn = Fn; + } + + /// RegisterMCAsmBackend - Register a MCAsmBackend implementation for the + /// given target. + /// + /// Clients are responsible for ensuring that registration doesn't occur + /// while another thread is attempting to access the registry. Typically + /// this is done by initializing all targets at program startup. + /// + /// @param T - The target being registered. + /// @param Fn - A function to construct an AsmBackend for the target. + static void RegisterMCAsmBackend(Target &T, Target::MCAsmBackendCtorTy Fn) { + T.MCAsmBackendCtorFn = Fn; + } + + /// RegisterMCAsmParser - Register a MCTargetAsmParser implementation for + /// the given target. + /// + /// Clients are responsible for ensuring that registration doesn't occur + /// while another thread is attempting to access the registry. Typically + /// this is done by initializing all targets at program startup. + /// + /// @param T - The target being registered. + /// @param Fn - A function to construct an MCTargetAsmParser for the target. + static void RegisterMCAsmParser(Target &T, Target::MCAsmParserCtorTy Fn) { + T.MCAsmParserCtorFn = Fn; + } + + /// RegisterAsmPrinter - Register an AsmPrinter implementation for the given + /// target. + /// + /// Clients are responsible for ensuring that registration doesn't occur + /// while another thread is attempting to access the registry. Typically + /// this is done by initializing all targets at program startup. + /// + /// @param T - The target being registered. + /// @param Fn - A function to construct an AsmPrinter for the target. + static void RegisterAsmPrinter(Target &T, Target::AsmPrinterCtorTy Fn) { + T.AsmPrinterCtorFn = Fn; + } + + /// RegisterMCCodeEmitter - Register a MCCodeEmitter implementation for the + /// given target. + /// + /// Clients are responsible for ensuring that registration doesn't occur + /// while another thread is attempting to access the registry. Typically + /// this is done by initializing all targets at program startup. + /// + /// @param T - The target being registered. + /// @param Fn - A function to construct an MCCodeEmitter for the target. + static void RegisterMCCodeEmitter(Target &T, Target::MCCodeEmitterCtorTy Fn) { + T.MCCodeEmitterCtorFn = Fn; + } + + static void RegisterELFStreamer(Target &T, Target::ELFStreamerCtorTy Fn) { + T.ELFStreamerCtorFn = Fn; + } + + static void RegisterNullTargetStreamer(Target &T, + Target::NullTargetStreamerCtorTy Fn) { + T.NullTargetStreamerCtorFn = Fn; + } + + static void RegisterAsmTargetStreamer(Target &T, + Target::AsmTargetStreamerCtorTy Fn) { + T.AsmTargetStreamerCtorFn = Fn; + } + + static void + RegisterObjectTargetStreamer(Target &T, + Target::ObjectTargetStreamerCtorTy Fn) { + T.ObjectTargetStreamerCtorFn = Fn; + } + + /// RegisterMCRelocationInfo - Register an MCRelocationInfo + /// implementation for the given target. + /// + /// Clients are responsible for ensuring that registration doesn't occur + /// while another thread is attempting to access the registry. Typically + /// this is done by initializing all targets at program startup. + /// + /// @param T - The target being registered. + /// @param Fn - A function to construct an MCRelocationInfo for the target. + static void RegisterMCRelocationInfo(Target &T, + Target::MCRelocationInfoCtorTy Fn) { + T.MCRelocationInfoCtorFn = Fn; + } + + /// @} +}; + +//===--------------------------------------------------------------------===// + +/// RegisterTarget - Helper template for registering a target, for use in the +/// target's initialization function. Usage: +/// +/// +/// Target TheFooTarget; // The global target instance. +/// +/// extern "C" void LLVMInitializeFooTargetInfo() { +/// RegisterTarget X(TheFooTarget, "foo", "Foo description"); +/// } +template +struct RegisterTarget { + RegisterTarget(Target &T, const char *Name, const char *Desc) { + TargetRegistry::RegisterTarget(T, Name, Desc, &getArchMatch); + } + + static bool getArchMatch(Triple::ArchType Arch) { + return Arch == TargetArchType; + } +}; + +/// RegisterMCAsmInfo - Helper template for registering a target assembly info +/// implementation. This invokes the static "Create" method on the class to +/// actually do the construction. Usage: +/// +/// extern "C" void LLVMInitializeFooTarget() { +/// extern Target TheFooTarget; +/// RegisterMCAsmInfo X(TheFooTarget); +/// } +template struct RegisterMCAsmInfo { + RegisterMCAsmInfo(Target &T) { + TargetRegistry::RegisterMCAsmInfo(T, &Allocator); + } + +private: + static MCAsmInfo *Allocator(const MCRegisterInfo & /*MRI*/, + const Triple &TT) { + return new MCAsmInfoImpl(TT); + } +}; + +/// RegisterMCAsmInfoFn - Helper template for registering a target assembly info +/// implementation. This invokes the specified function to do the +/// construction. Usage: +/// +/// extern "C" void LLVMInitializeFooTarget() { +/// extern Target TheFooTarget; +/// RegisterMCAsmInfoFn X(TheFooTarget, TheFunction); +/// } +struct RegisterMCAsmInfoFn { + RegisterMCAsmInfoFn(Target &T, Target::MCAsmInfoCtorFnTy Fn) { + TargetRegistry::RegisterMCAsmInfo(T, Fn); + } +}; + +/// RegisterMCInstrInfo - Helper template for registering a target instruction +/// info implementation. This invokes the static "Create" method on the class +/// to actually do the construction. Usage: +/// +/// extern "C" void LLVMInitializeFooTarget() { +/// extern Target TheFooTarget; +/// RegisterMCInstrInfo X(TheFooTarget); +/// } +template struct RegisterMCInstrInfo { + RegisterMCInstrInfo(Target &T) { + TargetRegistry::RegisterMCInstrInfo(T, &Allocator); + } + +private: + static MCInstrInfo *Allocator() { return new MCInstrInfoImpl(); } +}; + +/// RegisterMCInstrInfoFn - Helper template for registering a target +/// instruction info implementation. This invokes the specified function to +/// do the construction. Usage: +/// +/// extern "C" void LLVMInitializeFooTarget() { +/// extern Target TheFooTarget; +/// RegisterMCInstrInfoFn X(TheFooTarget, TheFunction); +/// } +struct RegisterMCInstrInfoFn { + RegisterMCInstrInfoFn(Target &T, Target::MCInstrInfoCtorFnTy Fn) { + TargetRegistry::RegisterMCInstrInfo(T, Fn); + } +}; + +/// RegisterMCInstrAnalysis - Helper template for registering a target +/// instruction analyzer implementation. This invokes the static "Create" +/// method on the class to actually do the construction. Usage: +/// +/// extern "C" void LLVMInitializeFooTarget() { +/// extern Target TheFooTarget; +/// RegisterMCInstrAnalysis X(TheFooTarget); +/// } +template struct RegisterMCInstrAnalysis { + RegisterMCInstrAnalysis(Target &T) { + TargetRegistry::RegisterMCInstrAnalysis(T, &Allocator); + } + +private: + static MCInstrAnalysis *Allocator(const MCInstrInfo *Info) { + return new MCInstrAnalysisImpl(Info); + } +}; + +/// RegisterMCInstrAnalysisFn - Helper template for registering a target +/// instruction analyzer implementation. This invokes the specified function +/// to do the construction. Usage: +/// +/// extern "C" void LLVMInitializeFooTarget() { +/// extern Target TheFooTarget; +/// RegisterMCInstrAnalysisFn X(TheFooTarget, TheFunction); +/// } +struct RegisterMCInstrAnalysisFn { + RegisterMCInstrAnalysisFn(Target &T, Target::MCInstrAnalysisCtorFnTy Fn) { + TargetRegistry::RegisterMCInstrAnalysis(T, Fn); + } +}; + +/// RegisterMCRegInfo - Helper template for registering a target register info +/// implementation. This invokes the static "Create" method on the class to +/// actually do the construction. Usage: +/// +/// extern "C" void LLVMInitializeFooTarget() { +/// extern Target TheFooTarget; +/// RegisterMCRegInfo X(TheFooTarget); +/// } +template struct RegisterMCRegInfo { + RegisterMCRegInfo(Target &T) { + TargetRegistry::RegisterMCRegInfo(T, &Allocator); + } + +private: + static MCRegisterInfo *Allocator(const Triple & /*TT*/) { + return new MCRegisterInfoImpl(); + } +}; + +/// RegisterMCRegInfoFn - Helper template for registering a target register +/// info implementation. This invokes the specified function to do the +/// construction. Usage: +/// +/// extern "C" void LLVMInitializeFooTarget() { +/// extern Target TheFooTarget; +/// RegisterMCRegInfoFn X(TheFooTarget, TheFunction); +/// } +struct RegisterMCRegInfoFn { + RegisterMCRegInfoFn(Target &T, Target::MCRegInfoCtorFnTy Fn) { + TargetRegistry::RegisterMCRegInfo(T, Fn); + } +}; + +/// RegisterMCSubtargetInfo - Helper template for registering a target +/// subtarget info implementation. This invokes the static "Create" method +/// on the class to actually do the construction. Usage: +/// +/// extern "C" void LLVMInitializeFooTarget() { +/// extern Target TheFooTarget; +/// RegisterMCSubtargetInfo X(TheFooTarget); +/// } +template struct RegisterMCSubtargetInfo { + RegisterMCSubtargetInfo(Target &T) { + TargetRegistry::RegisterMCSubtargetInfo(T, &Allocator); + } + +private: + static MCSubtargetInfo *Allocator(const Triple & /*TT*/, StringRef /*CPU*/, + StringRef /*FS*/) { + return new MCSubtargetInfoImpl(); + } +}; + +/// RegisterMCSubtargetInfoFn - Helper template for registering a target +/// subtarget info implementation. This invokes the specified function to +/// do the construction. Usage: +/// +/// extern "C" void LLVMInitializeFooTarget() { +/// extern Target TheFooTarget; +/// RegisterMCSubtargetInfoFn X(TheFooTarget, TheFunction); +/// } +struct RegisterMCSubtargetInfoFn { + RegisterMCSubtargetInfoFn(Target &T, Target::MCSubtargetInfoCtorFnTy Fn) { + TargetRegistry::RegisterMCSubtargetInfo(T, Fn); + } +}; + +/// RegisterTargetMachine - Helper template for registering a target machine +/// implementation, for use in the target machine initialization +/// function. Usage: +/// +/// extern "C" void LLVMInitializeFooTarget() { +/// extern Target TheFooTarget; +/// RegisterTargetMachine X(TheFooTarget); +/// } +template struct RegisterTargetMachine { + RegisterTargetMachine(Target &T) { + TargetRegistry::RegisterTargetMachine(T, &Allocator); + } + +private: + static TargetMachine *Allocator(const Target &T, const Triple &TT, + StringRef CPU, StringRef FS, + const TargetOptions &Options) { + return new TargetMachineImpl(T, TT, CPU, FS, Options); + } +}; + +/// RegisterMCAsmBackend - Helper template for registering a target specific +/// assembler backend. Usage: +/// +/// extern "C" void LLVMInitializeFooMCAsmBackend() { +/// extern Target TheFooTarget; +/// RegisterMCAsmBackend X(TheFooTarget); +/// } +template struct RegisterMCAsmBackend { + RegisterMCAsmBackend(Target &T) { + TargetRegistry::RegisterMCAsmBackend(T, &Allocator); + } + +private: + static MCAsmBackend *Allocator(const Target &T, const MCRegisterInfo &MRI, + const Triple &TheTriple, StringRef CPU) { + return new MCAsmBackendImpl(T, MRI, TheTriple, CPU); + } +}; + +/// RegisterMCAsmParser - Helper template for registering a target specific +/// assembly parser, for use in the target machine initialization +/// function. Usage: +/// +/// extern "C" void LLVMInitializeFooMCAsmParser() { +/// extern Target TheFooTarget; +/// RegisterMCAsmParser X(TheFooTarget); +/// } +template struct RegisterMCAsmParser { + RegisterMCAsmParser(Target &T) { + TargetRegistry::RegisterMCAsmParser(T, &Allocator); + } + +private: + static MCTargetAsmParser *Allocator(const MCSubtargetInfo &STI, + MCAsmParser &P, const MCInstrInfo &MII, + const MCTargetOptions &Options) { + return new MCAsmParserImpl(STI, P, MII, Options); + } +}; + +/// RegisterAsmPrinter - Helper template for registering a target specific +/// assembly printer, for use in the target machine initialization +/// function. Usage: +/// +/// extern "C" void LLVMInitializeFooAsmPrinter() { +/// extern Target TheFooTarget; +/// RegisterAsmPrinter X(TheFooTarget); +/// } +template struct RegisterAsmPrinter { + RegisterAsmPrinter(Target &T) { + TargetRegistry::RegisterAsmPrinter(T, &Allocator); + } + +private: + static AsmPrinter *Allocator(TargetMachine &TM, + std::unique_ptr &&Streamer) { + return new AsmPrinterImpl(TM, std::move(Streamer)); + } +}; + +/// RegisterMCCodeEmitter - Helper template for registering a target specific +/// machine code emitter, for use in the target initialization +/// function. Usage: +/// +/// extern "C" void LLVMInitializeFooMCCodeEmitter() { +/// extern Target TheFooTarget; +/// RegisterMCCodeEmitter X(TheFooTarget); +/// } +template struct RegisterMCCodeEmitter { + RegisterMCCodeEmitter(Target &T) { + TargetRegistry::RegisterMCCodeEmitter(T, &Allocator); + } + +private: + static MCCodeEmitter *Allocator(const MCInstrInfo & /*II*/, + const MCRegisterInfo & /*MRI*/, + MCContext & /*Ctx*/) { + return new MCCodeEmitterImpl(); + } +}; +} + +#endif diff --git a/llvm/include/llvm/Support/TargetSelect.h b/llvm/include/llvm/Support/TargetSelect.h new file mode 100644 index 0000000..1289c36 --- /dev/null +++ b/llvm/include/llvm/Support/TargetSelect.h @@ -0,0 +1,131 @@ +//===- TargetSelect.h - Target Selection & Registration ---------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file provides utilities to make sure that certain classes of targets are +// linked into the main application executable, and initialize them as +// appropriate. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_TARGETSELECT_H +#define LLVM_SUPPORT_TARGETSELECT_H + +#include "llvm/Config/llvm-config.h" + +extern "C" { + // Declare all of the target-initialization functions that are available. +#define LLVM_TARGET(TargetName) void LLVMInitialize##TargetName##TargetInfo(); +#include "llvm/Config/Targets.def" + +#define LLVM_TARGET(TargetName) void LLVMInitialize##TargetName##Target(); +#include "llvm/Config/Targets.def" + + // Declare all of the target-MC-initialization functions that are available. +#define LLVM_TARGET(TargetName) void LLVMInitialize##TargetName##TargetMC(); +#include "llvm/Config/Targets.def" + + // Declare all of the available assembly parser initialization functions. +#define LLVM_ASM_PARSER(TargetName) void LLVMInitialize##TargetName##AsmParser(); +#include "llvm/Config/AsmParsers.def" +} + +namespace llvm_ks { + /// InitializeAllTargetInfos - The main program should call this function if + /// it wants access to all available targets that LLVM is configured to + /// support, to make them available via the TargetRegistry. + /// + /// It is legal for a client to make multiple calls to this function. + inline void InitializeAllTargetInfos() { +#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetInfo(); +#include "llvm/Config/Targets.def" + } + + /// InitializeAllTargets - The main program should call this function if it + /// wants access to all available target machines that LLVM is configured to + /// support, to make them available via the TargetRegistry. + /// + /// It is legal for a client to make multiple calls to this function. + inline void InitializeAllTargets() { + // FIXME: Remove this, clients should do it. + InitializeAllTargetInfos(); + +#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##Target(); +#include "llvm/Config/Targets.def" + } + + /// InitializeAllTargetMCs - The main program should call this function if it + /// wants access to all available target MC that LLVM is configured to + /// support, to make them available via the TargetRegistry. + /// + /// It is legal for a client to make multiple calls to this function. + inline void InitializeAllTargetMCs() { +#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetMC(); +#include "llvm/Config/Targets.def" + } + + /// InitializeAllAsmPrinters - The main program should call this function if + /// it wants all asm printers that LLVM is configured to support, to make them + /// available via the TargetRegistry. + /// + /// It is legal for a client to make multiple calls to this function. + inline void InitializeAllAsmPrinters() { + } + + /// InitializeAllAsmParsers - The main program should call this function if it + /// wants all asm parsers that LLVM is configured to support, to make them + /// available via the TargetRegistry. + /// + /// It is legal for a client to make multiple calls to this function. + inline void InitializeAllAsmParsers() { +#define LLVM_ASM_PARSER(TargetName) LLVMInitialize##TargetName##AsmParser(); +#include "llvm/Config/AsmParsers.def" + } + + /// InitializeNativeTarget - The main program should call this function to + /// initialize the native target corresponding to the host. This is useful + /// for JIT applications to ensure that the target gets linked in correctly. + /// + /// It is legal for a client to make multiple calls to this function. + inline bool InitializeNativeTarget() { + // If we have a native target, initialize it to ensure it is linked in. +#ifdef LLVM_NATIVE_TARGET + LLVM_NATIVE_TARGETINFO(); + LLVM_NATIVE_TARGET(); + LLVM_NATIVE_TARGETMC(); + return false; +#else + return true; +#endif + } + + /// InitializeNativeTargetAsmPrinter - The main program should call + /// this function to initialize the native target asm printer. + inline bool InitializeNativeTargetAsmPrinter() { + // If we have a native target, initialize the corresponding asm printer. +#ifdef LLVM_NATIVE_ASMPRINTER + return false; +#else + return true; +#endif + } + + /// InitializeNativeTargetAsmParser - The main program should call + /// this function to initialize the native target asm parser. + inline bool InitializeNativeTargetAsmParser() { + // If we have a native target, initialize the corresponding asm parser. +#ifdef LLVM_NATIVE_ASMPARSER + LLVM_NATIVE_ASMPARSER(); + return false; +#else + return true; +#endif + } +} + +#endif diff --git a/llvm/include/llvm/Support/Win64EH.h b/llvm/include/llvm/Support/Win64EH.h new file mode 100644 index 0000000..3ba4628 --- /dev/null +++ b/llvm/include/llvm/Support/Win64EH.h @@ -0,0 +1,147 @@ +//===-- llvm/Support/Win64EH.h ---Win64 EH Constants-------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains constants and structures used for implementing +// exception handling on Win64 platforms. For more information, see +// http://msdn.microsoft.com/en-us/library/1eyas8tf.aspx +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_WIN64EH_H +#define LLVM_SUPPORT_WIN64EH_H + +#include "llvm/Support/DataTypes.h" +#include "llvm/Support/Endian.h" + +namespace llvm_ks { +namespace Win64EH { + +/// UnwindOpcodes - Enumeration whose values specify a single operation in +/// the prolog of a function. +enum UnwindOpcodes { + UOP_PushNonVol = 0, + UOP_AllocLarge, + UOP_AllocSmall, + UOP_SetFPReg, + UOP_SaveNonVol, + UOP_SaveNonVolBig, + UOP_SaveXMM128 = 8, + UOP_SaveXMM128Big, + UOP_PushMachFrame +}; + +/// UnwindCode - This union describes a single operation in a function prolog, +/// or part thereof. +union UnwindCode { + struct { + uint8_t CodeOffset; + uint8_t UnwindOpAndOpInfo; + } u; + support::ulittle16_t FrameOffset; + + uint8_t getUnwindOp() const { + return u.UnwindOpAndOpInfo & 0x0F; + } + uint8_t getOpInfo() const { + return (u.UnwindOpAndOpInfo >> 4) & 0x0F; + } +}; + +enum { + /// UNW_ExceptionHandler - Specifies that this function has an exception + /// handler. + UNW_ExceptionHandler = 0x01, + /// UNW_TerminateHandler - Specifies that this function has a termination + /// handler. + UNW_TerminateHandler = 0x02, + /// UNW_ChainInfo - Specifies that this UnwindInfo structure is chained to + /// another one. + UNW_ChainInfo = 0x04 +}; + +/// RuntimeFunction - An entry in the table of functions with unwind info. +struct RuntimeFunction { + support::ulittle32_t StartAddress; + support::ulittle32_t EndAddress; + support::ulittle32_t UnwindInfoOffset; +}; + +/// UnwindInfo - An entry in the exception table. +struct UnwindInfo { + uint8_t VersionAndFlags; + uint8_t PrologSize; + uint8_t NumCodes; + uint8_t FrameRegisterAndOffset; + UnwindCode UnwindCodes[1]; + + uint8_t getVersion() const { + return VersionAndFlags & 0x07; + } + uint8_t getFlags() const { + return (VersionAndFlags >> 3) & 0x1f; + } + uint8_t getFrameRegister() const { + return FrameRegisterAndOffset & 0x0f; + } + uint8_t getFrameOffset() const { + return (FrameRegisterAndOffset >> 4) & 0x0f; + } + + // The data after unwindCodes depends on flags. + // If UNW_ExceptionHandler or UNW_TerminateHandler is set then follows + // the address of the language-specific exception handler. + // If UNW_ChainInfo is set then follows a RuntimeFunction which defines + // the chained unwind info. + // For more information please see MSDN at: + // http://msdn.microsoft.com/en-us/library/ddssxxy8.aspx + + /// \brief Return pointer to language specific data part of UnwindInfo. + void *getLanguageSpecificData() { + return reinterpret_cast(&UnwindCodes[(NumCodes+1) & ~1]); + } + + /// \brief Return pointer to language specific data part of UnwindInfo. + const void *getLanguageSpecificData() const { + return reinterpret_cast(&UnwindCodes[(NumCodes + 1) & ~1]); + } + + /// \brief Return image-relative offset of language-specific exception handler. + uint32_t getLanguageSpecificHandlerOffset() const { + return *reinterpret_cast( + getLanguageSpecificData()); + } + + /// \brief Set image-relative offset of language-specific exception handler. + void setLanguageSpecificHandlerOffset(uint32_t offset) { + *reinterpret_cast(getLanguageSpecificData()) = + offset; + } + + /// \brief Return pointer to exception-specific data. + void *getExceptionData() { + return reinterpret_cast(reinterpret_cast( + getLanguageSpecificData())+1); + } + + /// \brief Return pointer to chained unwind info. + RuntimeFunction *getChainedFunctionEntry() { + return reinterpret_cast(getLanguageSpecificData()); + } + + /// \brief Return pointer to chained unwind info. + const RuntimeFunction *getChainedFunctionEntry() const { + return reinterpret_cast(getLanguageSpecificData()); + } +}; + + +} // End of namespace Win64EH +} // End of namespace llvm_ks + +#endif diff --git a/llvm/include/llvm/Support/WindowsError.h b/llvm/include/llvm/Support/WindowsError.h new file mode 100644 index 0000000..6cf7ec3 --- /dev/null +++ b/llvm/include/llvm/Support/WindowsError.h @@ -0,0 +1,19 @@ +//===-- WindowsError.h - Support for mapping windows errors to posix-------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_WINDOWSERROR_H +#define LLVM_SUPPORT_WINDOWSERROR_H + +#include + +namespace llvm_ks { +std::error_code mapWindowsError(unsigned EV); +} + +#endif diff --git a/llvm/include/llvm/Support/circular_raw_ostream.h b/llvm/include/llvm/Support/circular_raw_ostream.h new file mode 100644 index 0000000..3475e9b --- /dev/null +++ b/llvm/include/llvm/Support/circular_raw_ostream.h @@ -0,0 +1,156 @@ +//===-- llvm/Support/circular_raw_ostream.h - Buffered streams --*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains raw_ostream implementations for streams to do circular +// buffering of their output. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_CIRCULAR_RAW_OSTREAM_H +#define LLVM_SUPPORT_CIRCULAR_RAW_OSTREAM_H + +#include "llvm/Support/raw_ostream.h" + +namespace llvm_ks { + /// circular_raw_ostream - A raw_ostream which *can* save its data + /// to a circular buffer, or can pass it through directly to an + /// underlying stream if specified with a buffer of zero. + /// + class circular_raw_ostream : public raw_ostream { + public: + /// TAKE_OWNERSHIP - Tell this stream that it owns the underlying + /// stream and is responsible for cleanup, memory management + /// issues, etc. + /// + static const bool TAKE_OWNERSHIP = true; + + /// REFERENCE_ONLY - Tell this stream it should not manage the + /// held stream. + /// + static const bool REFERENCE_ONLY = false; + + private: + /// TheStream - The real stream we output to. We set it to be + /// unbuffered, since we're already doing our own buffering. + /// + raw_ostream *TheStream; + + /// OwnsStream - Are we responsible for managing the underlying + /// stream? + /// + bool OwnsStream; + + /// BufferSize - The size of the buffer in bytes. + /// + size_t BufferSize; + + /// BufferArray - The actual buffer storage. + /// + char *BufferArray; + + /// Cur - Pointer to the current output point in BufferArray. + /// + char *Cur; + + /// Filled - Indicate whether the buffer has been completely + /// filled. This helps avoid garbage output. + /// + bool Filled; + + /// Banner - A pointer to a banner to print before dumping the + /// log. + /// + const char *Banner; + + /// flushBuffer - Dump the contents of the buffer to Stream. + /// + void flushBuffer() { + if (Filled) + // Write the older portion of the buffer. + TheStream->write(Cur, BufferArray + BufferSize - Cur); + // Write the newer portion of the buffer. + TheStream->write(BufferArray, Cur - BufferArray); + Cur = BufferArray; + Filled = false; + } + + void write_impl(const char *Ptr, size_t Size) override; + + /// current_pos - Return the current position within the stream, + /// not counting the bytes currently in the buffer. + /// + uint64_t current_pos() const override { + // This has the same effect as calling TheStream.current_pos(), + // but that interface is private. + return TheStream->tell() - TheStream->GetNumBytesInBuffer(); + } + + public: + /// circular_raw_ostream - Construct an optionally + /// circular-buffered stream, handing it an underlying stream to + /// do the "real" output. + /// + /// As a side effect, if BuffSize is nonzero, the given Stream is + /// set to be Unbuffered. This is because circular_raw_ostream + /// does its own buffering, so it doesn't want another layer of + /// buffering to be happening underneath it. + /// + /// "Owns" tells the circular_raw_ostream whether it is + /// responsible for managing the held stream, doing memory + /// management of it, etc. + /// + circular_raw_ostream(raw_ostream &Stream, const char *Header, + size_t BuffSize = 0, bool Owns = REFERENCE_ONLY) + : raw_ostream(/*unbuffered*/ true), TheStream(nullptr), + OwnsStream(Owns), BufferSize(BuffSize), BufferArray(nullptr), + Filled(false), Banner(Header) { + if (BufferSize != 0) + BufferArray = new char[BufferSize]; + Cur = BufferArray; + setStream(Stream, Owns); + } + + ~circular_raw_ostream() override { + flush(); + flushBufferWithBanner(); + releaseStream(); + delete[] BufferArray; + } + + /// setStream - Tell the circular_raw_ostream to output a + /// different stream. "Owns" tells circular_raw_ostream whether + /// it should take responsibility for managing the underlying + /// stream. + /// + void setStream(raw_ostream &Stream, bool Owns = REFERENCE_ONLY) { + releaseStream(); + TheStream = &Stream; + OwnsStream = Owns; + } + + /// flushBufferWithBanner - Force output of the buffer along with + /// a small header. + /// + void flushBufferWithBanner(); + + private: + /// releaseStream - Delete the held stream if needed. Otherwise, + /// transfer the buffer settings from this circular_raw_ostream + /// back to the underlying stream. + /// + void releaseStream() { + if (!TheStream) + return; + if (OwnsStream) + delete TheStream; + } + }; +} // end llvm namespace + +#endif diff --git a/llvm/include/llvm/Support/raw_ostream.h b/llvm/include/llvm/Support/raw_ostream.h new file mode 100644 index 0000000..8a0bfe3 --- /dev/null +++ b/llvm/include/llvm/Support/raw_ostream.h @@ -0,0 +1,530 @@ +//===--- raw_ostream.h - Raw output stream ----------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines the raw_ostream class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_RAW_OSTREAM_H +#define LLVM_SUPPORT_RAW_OSTREAM_H + +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/DataTypes.h" +#include + +namespace llvm_ks { +class format_object_base; +class FormattedString; +class FormattedNumber; +template class SmallVectorImpl; + +namespace sys { +namespace fs { +enum OpenFlags : unsigned; +} +} + +/// This class implements an extremely fast bulk output stream that can *only* +/// output to a stream. It does not support seeking, reopening, rewinding, line +/// buffered disciplines etc. It is a simple buffer that outputs +/// a chunk at a time. +class raw_ostream { +private: + void operator=(const raw_ostream &) = delete; + raw_ostream(const raw_ostream &) = delete; + + /// The buffer is handled in such a way that the buffer is + /// uninitialized, unbuffered, or out of space when OutBufCur >= + /// OutBufEnd. Thus a single comparison suffices to determine if we + /// need to take the slow path to write a single character. + /// + /// The buffer is in one of three states: + /// 1. Unbuffered (BufferMode == Unbuffered) + /// 1. Uninitialized (BufferMode != Unbuffered && OutBufStart == 0). + /// 2. Buffered (BufferMode != Unbuffered && OutBufStart != 0 && + /// OutBufEnd - OutBufStart >= 1). + /// + /// If buffered, then the raw_ostream owns the buffer if (BufferMode == + /// InternalBuffer); otherwise the buffer has been set via SetBuffer and is + /// managed by the subclass. + /// + /// If a subclass installs an external buffer using SetBuffer then it can wait + /// for a \see write_impl() call to handle the data which has been put into + /// this buffer. + char *OutBufStart, *OutBufEnd, *OutBufCur; + + enum BufferKind { + Unbuffered = 0, + InternalBuffer, + ExternalBuffer + } BufferMode; + +public: + // color order matches ANSI escape sequence, don't change + enum Colors { + BLACK=0, + RED, + GREEN, + YELLOW, + BLUE, + MAGENTA, + CYAN, + WHITE, + SAVEDCOLOR + }; + + explicit raw_ostream(bool unbuffered = false) + : BufferMode(unbuffered ? Unbuffered : InternalBuffer) { + // Start out ready to flush. + OutBufStart = OutBufEnd = OutBufCur = nullptr; + } + + virtual ~raw_ostream(); + + /// tell - Return the current offset with the file. + uint64_t tell() const { return current_pos() + GetNumBytesInBuffer(); } + + //===--------------------------------------------------------------------===// + // Configuration Interface + //===--------------------------------------------------------------------===// + + /// Set the stream to be buffered, with an automatically determined buffer + /// size. + void SetBuffered(); + + /// Set the stream to be buffered, using the specified buffer size. + void SetBufferSize(size_t Size) { + flush(); + SetBufferAndMode(new char[Size], Size, InternalBuffer); + } + + size_t GetBufferSize() const { + // If we're supposed to be buffered but haven't actually gotten around + // to allocating the buffer yet, return the value that would be used. + if (BufferMode != Unbuffered && OutBufStart == nullptr) + return preferred_buffer_size(); + + // Otherwise just return the size of the allocated buffer. + return OutBufEnd - OutBufStart; + } + + /// Set the stream to be unbuffered. When unbuffered, the stream will flush + /// after every write. This routine will also flush the buffer immediately + /// when the stream is being set to unbuffered. + void SetUnbuffered() { + flush(); + SetBufferAndMode(nullptr, 0, Unbuffered); + } + + size_t GetNumBytesInBuffer() const { + return OutBufCur - OutBufStart; + } + + //===--------------------------------------------------------------------===// + // Data Output Interface + //===--------------------------------------------------------------------===// + + void flush() { + if (OutBufCur != OutBufStart) + flush_nonempty(); + } + + raw_ostream &operator<<(char C) { + if (OutBufCur >= OutBufEnd) + return write(C); + *OutBufCur++ = C; + return *this; + } + + raw_ostream &operator<<(unsigned char C) { + if (OutBufCur >= OutBufEnd) + return write(C); + *OutBufCur++ = C; + return *this; + } + + raw_ostream &operator<<(signed char C) { + if (OutBufCur >= OutBufEnd) + return write(C); + *OutBufCur++ = C; + return *this; + } + + raw_ostream &operator<<(StringRef Str) { + // Inline fast path, particularly for strings with a known length. + size_t Size = Str.size(); + + // Make sure we can use the fast path. + if (Size > (size_t)(OutBufEnd - OutBufCur)) + return write(Str.data(), Size); + + if (Size) { + memcpy(OutBufCur, Str.data(), Size); + OutBufCur += Size; + } + return *this; + } + + raw_ostream &operator<<(const char *Str) { + // Inline fast path, particularly for constant strings where a sufficiently + // smart compiler will simplify strlen. + + return this->operator<<(StringRef(Str)); + } + + raw_ostream &operator<<(const std::string &Str) { + // Avoid the fast path, it would only increase code size for a marginal win. + return write(Str.data(), Str.length()); + } + + raw_ostream &operator<<(const llvm_ks::SmallVectorImpl &Str) { + return write(Str.data(), Str.size()); + } + + raw_ostream &operator<<(unsigned long N); + raw_ostream &operator<<(long N); + raw_ostream &operator<<(unsigned long long N); + raw_ostream &operator<<(long long N); + raw_ostream &operator<<(const void *P); + raw_ostream &operator<<(unsigned int N) { + return this->operator<<(static_cast(N)); + } + + raw_ostream &operator<<(int N) { + return this->operator<<(static_cast(N)); + } + + raw_ostream &operator<<(double N); + + /// Output \p N in hexadecimal, without any prefix or padding. + raw_ostream &write_hex(unsigned long long N); + + /// Output \p Str, turning '\\', '\t', '\n', '"', and anything that doesn't + /// satisfy std::isprint into an escape sequence. + raw_ostream &write_escaped(StringRef Str, bool UseHexEscapes = false); + + raw_ostream &write(unsigned char C); + raw_ostream &write(const char *Ptr, size_t Size); + + // Formatted output, see the format() function in Support/Format.h. + raw_ostream &operator<<(const format_object_base &Fmt); + + // Formatted output, see the leftJustify() function in Support/Format.h. + raw_ostream &operator<<(const FormattedString &); + + // Formatted output, see the formatHex() function in Support/Format.h. + raw_ostream &operator<<(const FormattedNumber &); + + /// indent - Insert 'NumSpaces' spaces. + raw_ostream &indent(unsigned NumSpaces); + + /// Changes the foreground color of text that will be output from this point + /// forward. + /// @param Color ANSI color to use, the special SAVEDCOLOR can be used to + /// change only the bold attribute, and keep colors untouched + /// @param Bold bold/brighter text, default false + /// @param BG if true change the background, default: change foreground + /// @returns itself so it can be used within << invocations + virtual raw_ostream &changeColor(enum Colors Color, + bool Bold = false, + bool BG = false) { + (void)Color; + (void)Bold; + (void)BG; + return *this; + } + + /// Resets the colors to terminal defaults. Call this when you are done + /// outputting colored text, or before program exit. + virtual raw_ostream &resetColor() { return *this; } + + /// Reverses the foreground and background colors. + virtual raw_ostream &reverseColor() { return *this; } + + /// This function determines if this stream is connected to a "tty" or + /// "console" window. That is, the output would be displayed to the user + /// rather than being put on a pipe or stored in a file. + virtual bool is_displayed() const { return false; } + + /// This function determines if this stream is displayed and supports colors. + virtual bool has_colors() const { return is_displayed(); } + + //===--------------------------------------------------------------------===// + // Subclass Interface + //===--------------------------------------------------------------------===// + +private: + /// The is the piece of the class that is implemented by subclasses. This + /// writes the \p Size bytes starting at + /// \p Ptr to the underlying stream. + /// + /// This function is guaranteed to only be called at a point at which it is + /// safe for the subclass to install a new buffer via SetBuffer. + /// + /// \param Ptr The start of the data to be written. For buffered streams this + /// is guaranteed to be the start of the buffer. + /// + /// \param Size The number of bytes to be written. + /// + /// \invariant { Size > 0 } + virtual void write_impl(const char *Ptr, size_t Size) = 0; + + // An out of line virtual method to provide a home for the class vtable. + virtual void handle(); + + /// Return the current position within the stream, not counting the bytes + /// currently in the buffer. + virtual uint64_t current_pos() const = 0; + +protected: + /// Use the provided buffer as the raw_ostream buffer. This is intended for + /// use only by subclasses which can arrange for the output to go directly + /// into the desired output buffer, instead of being copied on each flush. + void SetBuffer(char *BufferStart, size_t Size) { + SetBufferAndMode(BufferStart, Size, ExternalBuffer); + } + + /// Return an efficient buffer size for the underlying output mechanism. + virtual size_t preferred_buffer_size() const; + + /// Return the beginning of the current stream buffer, or 0 if the stream is + /// unbuffered. + const char *getBufferStart() const { return OutBufStart; } + + //===--------------------------------------------------------------------===// + // Private Interface + //===--------------------------------------------------------------------===// +private: + /// Install the given buffer and mode. + void SetBufferAndMode(char *BufferStart, size_t Size, BufferKind Mode); + + /// Flush the current buffer, which is known to be non-empty. This outputs the + /// currently buffered data and resets the buffer to empty. + void flush_nonempty(); + + /// Copy data into the buffer. Size must not be greater than the number of + /// unused bytes in the buffer. + void copy_to_buffer(const char *Ptr, size_t Size); +}; + +/// An abstract base class for streams implementations that also support a +/// pwrite operation. This is useful for code that can mostly stream out data, +/// but needs to patch in a header that needs to know the output size. +class raw_pwrite_stream : public raw_ostream { + virtual void pwrite_impl(const char *Ptr, size_t Size, uint64_t Offset) = 0; + +public: + explicit raw_pwrite_stream(bool Unbuffered = false) + : raw_ostream(Unbuffered) {} + void pwrite(const char *Ptr, size_t Size, uint64_t Offset) { +#ifndef NDBEBUG + uint64_t Pos = tell(); + // /dev/null always reports a pos of 0, so we cannot perform this check + // in that case. + if (Pos) + assert(Size + Offset <= Pos && "We don't support extending the stream"); +#endif + pwrite_impl(Ptr, Size, Offset); + } +}; + +//===----------------------------------------------------------------------===// +// File Output Streams +//===----------------------------------------------------------------------===// + +/// A raw_ostream that writes to a file descriptor. +/// +class raw_fd_ostream : public raw_pwrite_stream { + int FD; + bool ShouldClose; + + /// Error This flag is true if an error of any kind has been detected. + /// + bool Error; + + uint64_t pos; + + bool SupportsSeeking; + + /// See raw_ostream::write_impl. + void write_impl(const char *Ptr, size_t Size) override; + + void pwrite_impl(const char *Ptr, size_t Size, uint64_t Offset) override; + + /// Return the current position within the stream, not counting the bytes + /// currently in the buffer. + uint64_t current_pos() const override { return pos; } + + /// Determine an efficient buffer size. + size_t preferred_buffer_size() const override; + + /// Set the flag indicating that an output error has been encountered. + void error_detected() { Error = true; } + +public: + /// Open the specified file for writing. If an error occurs, information + /// about the error is put into EC, and the stream should be immediately + /// destroyed; + /// \p Flags allows optional flags to control how the file will be opened. + /// + /// As a special case, if Filename is "-", then the stream will use + /// STDOUT_FILENO instead of opening a file. Note that it will still consider + /// itself to own the file descriptor. In particular, it will close the + /// file descriptor when it is done (this is necessary to detect + /// output errors). + raw_fd_ostream(StringRef Filename, std::error_code &EC, + sys::fs::OpenFlags Flags); + + /// FD is the file descriptor that this writes to. If ShouldClose is true, + /// this closes the file when the stream is destroyed. + raw_fd_ostream(int fd, bool shouldClose, bool unbuffered=false); + + ~raw_fd_ostream() override; + + /// Manually flush the stream and close the file. Note that this does not call + /// fsync. + void close(); + + bool supportsSeeking() { return SupportsSeeking; } + + /// Flushes the stream and repositions the underlying file descriptor position + /// to the offset specified from the beginning of the file. + uint64_t seek(uint64_t off); + + raw_ostream &changeColor(enum Colors colors, bool bold=false, + bool bg=false) override; + raw_ostream &resetColor() override; + + raw_ostream &reverseColor() override; + + bool is_displayed() const override; + + bool has_colors() const override; + + /// Return the value of the flag in this raw_fd_ostream indicating whether an + /// output error has been encountered. + /// This doesn't implicitly flush any pending output. Also, it doesn't + /// guarantee to detect all errors unless the stream has been closed. + bool has_error() const { + return Error; + } + + /// Set the flag read by has_error() to false. If the error flag is set at the + /// time when this raw_ostream's destructor is called, report_fatal_error is + /// called to report the error. Use clear_error() after handling the error to + /// avoid this behavior. + /// + /// "Errors should never pass silently. + /// Unless explicitly silenced." + /// - from The Zen of Python, by Tim Peters + /// + void clear_error() { + Error = false; + } +}; + +/// This returns a reference to a raw_ostream for standard output. Use it like: +/// outs() << "foo" << "bar"; +raw_ostream &outs(); + +/// This returns a reference to a raw_ostream for standard error. Use it like: +/// errs() << "foo" << "bar"; +raw_ostream &errs(); + +/// This returns a reference to a raw_ostream which simply discards output. +raw_ostream &nulls(); + +//===----------------------------------------------------------------------===// +// Output Stream Adaptors +//===----------------------------------------------------------------------===// + +/// A raw_ostream that writes to an std::string. This is a simple adaptor +/// class. This class does not encounter output errors. +class raw_string_ostream : public raw_ostream { + std::string &OS; + + /// See raw_ostream::write_impl. + void write_impl(const char *Ptr, size_t Size) override; + + /// Return the current position within the stream, not counting the bytes + /// currently in the buffer. + uint64_t current_pos() const override { return OS.size(); } + +public: + explicit raw_string_ostream(std::string &O) : OS(O) {} + ~raw_string_ostream() override; + + /// Flushes the stream contents to the target string and returns the string's + /// reference. + std::string& str() { + flush(); + return OS; + } +}; + +/// A raw_ostream that writes to an SmallVector or SmallString. This is a +/// simple adaptor class. This class does not encounter output errors. +/// raw_svector_ostream operates without a buffer, delegating all memory +/// management to the SmallString. Thus the SmallString is always up-to-date, +/// may be used directly and there is no need to call flush(). +class raw_svector_ostream : public raw_pwrite_stream { + SmallVectorImpl &OS; + + /// See raw_ostream::write_impl. + void write_impl(const char *Ptr, size_t Size) override; + + void pwrite_impl(const char *Ptr, size_t Size, uint64_t Offset) override; + + /// Return the current position within the stream. + uint64_t current_pos() const override; + +public: + /// Construct a new raw_svector_ostream. + /// + /// \param O The vector to write to; this should generally have at least 128 + /// bytes free to avoid any extraneous memory overhead. + explicit raw_svector_ostream(SmallVectorImpl &O) : OS(O) { + SetUnbuffered(); + } + ~raw_svector_ostream() override {} + + void flush() = delete; + + /// Return a StringRef for the vector contents. + StringRef str() { return StringRef(OS.data(), OS.size()); } +}; + +/// A raw_ostream that discards all output. +class raw_null_ostream : public raw_pwrite_stream { + /// See raw_ostream::write_impl. + void write_impl(const char *Ptr, size_t size) override; + void pwrite_impl(const char *Ptr, size_t Size, uint64_t Offset) override; + + /// Return the current position within the stream, not counting the bytes + /// currently in the buffer. + uint64_t current_pos() const override; + +public: + explicit raw_null_ostream() {} + ~raw_null_ostream() override; +}; + +class buffer_ostream : public raw_svector_ostream { + raw_ostream &OS; + SmallVector Buffer; + +public: + buffer_ostream(raw_ostream &OS) : raw_svector_ostream(Buffer), OS(OS) {} + ~buffer_ostream() override { OS << str(); } +}; + +} // end llvm namespace + +#endif // LLVM_SUPPORT_RAW_OSTREAM_H diff --git a/llvm/include/llvm/Support/type_traits.h b/llvm/include/llvm/Support/type_traits.h new file mode 100644 index 0000000..0f75bb1 --- /dev/null +++ b/llvm/include/llvm/Support/type_traits.h @@ -0,0 +1,109 @@ +//===- llvm/Support/type_traits.h - Simplfied type traits -------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file provides useful additions to the standard type_traits library. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_TYPE_TRAITS_H +#define LLVM_SUPPORT_TYPE_TRAITS_H + +#include +#include + +#ifndef __has_feature +#define LLVM_DEFINED_HAS_FEATURE +#define __has_feature(x) 0 +#endif + +namespace llvm_ks { + +/// isPodLike - This is a type trait that is used to determine whether a given +/// type can be copied around with memcpy instead of running ctors etc. +template +struct isPodLike { + // std::is_trivially_copyable is available in libc++ with clang, libstdc++ + // that comes with GCC 5. +#if (__has_feature(is_trivially_copyable) && defined(_LIBCPP_VERSION)) || \ + (defined(__GNUC__) && __GNUC__ >= 5) + // If the compiler supports the is_trivially_copyable trait use it, as it + // matches the definition of isPodLike closely. + static const bool value = std::is_trivially_copyable::value; +#elif __has_feature(is_trivially_copyable) + // Use the internal name if the compiler supports is_trivially_copyable but we + // don't know if the standard library does. This is the case for clang in + // conjunction with libstdc++ from GCC 4.x. + static const bool value = __is_trivially_copyable(T); +#else + // If we don't know anything else, we can (at least) assume that all non-class + // types are PODs. + static const bool value = !std::is_class::value; +#endif +}; + +// std::pair's are pod-like if their elements are. +template +struct isPodLike > { + static const bool value = isPodLike::value && isPodLike::value; +}; + +/// \brief Metafunction that determines whether the given type is either an +/// integral type or an enumeration type. +/// +/// Note that this accepts potentially more integral types than is_integral +/// because it is based on merely being convertible implicitly to an integral +/// type. +template class is_integral_or_enum { + typedef typename std::remove_reference::type UnderlyingT; + +public: + static const bool value = + !std::is_class::value && // Filter conversion operators. + !std::is_pointer::value && + !std::is_floating_point::value && + std::is_convertible::value; +}; + +/// \brief If T is a pointer, just return it. If it is not, return T&. +template +struct add_lvalue_reference_if_not_pointer { typedef T &type; }; + +template +struct add_lvalue_reference_if_not_pointer< + T, typename std::enable_if::value>::type> { + typedef T type; +}; + +/// \brief If T is a pointer to X, return a pointer to const X. If it is not, +/// return const T. +template +struct add_const_past_pointer { typedef const T type; }; + +template +struct add_const_past_pointer< + T, typename std::enable_if::value>::type> { + typedef const typename std::remove_pointer::type *type; +}; + +} + +// If the compiler supports detecting whether a class is final, define +// an LLVM_IS_FINAL macro. If it cannot be defined properly, this +// macro will be left undefined. +#if __cplusplus >= 201402L +#define LLVM_IS_FINAL(Ty) std::is_final() +#elif __has_feature(is_final) || LLVM_GNUC_PREREQ(4, 7, 0) +#define LLVM_IS_FINAL(Ty) __is_final(Ty) +#endif + +#ifdef LLVM_DEFINED_HAS_FEATURE +#undef __has_feature +#endif + +#endif diff --git a/llvm/include/llvm/module.modulemap.build b/llvm/include/llvm/module.modulemap.build new file mode 100644 index 0000000..7150fe9 --- /dev/null +++ b/llvm/include/llvm/module.modulemap.build @@ -0,0 +1,5 @@ +// This is copied into the build area for a $src != $build compilation. +module LLVM_Support_DataTypes { + header "Support/DataTypes.h" + export * +} diff --git a/llvm/keystone/CMakeLists.txt b/llvm/keystone/CMakeLists.txt new file mode 100644 index 0000000..719485a --- /dev/null +++ b/llvm/keystone/CMakeLists.txt @@ -0,0 +1,69 @@ +# CMakeLists.txt for Keystone linking. + +file(GLOB_RECURSE src_MC "../lib/MC/*.cpp") +file(GLOB src_Support "../lib/Support/*.c*") +file(GLOB src_Target "../lib/Target/*.cpp") + +set(src_core + ${src_MC} + ${src_Support} + ${src_Target} +) + +file(GLOB_RECURSE src_AArch64 "../lib/Target/AArch64/*.cpp") +file(GLOB_RECURSE src_ARM "../lib/Target/ARM/*.cpp") +file(GLOB_RECURSE src_Hexagon "../lib/Target/Hexagon/*.cpp") +file(GLOB_RECURSE src_Mips "../lib/Target/Mips/*.cpp") +file(GLOB_RECURSE src_PowerPC "../lib/Target/PowerPC/*.cpp") +file(GLOB_RECURSE src_Sparc "../lib/Target/Sparc/*.cpp") +file(GLOB_RECURSE src_SystemZ "../lib/Target/SystemZ/*.cpp") +file(GLOB_RECURSE src_X86 "../lib/Target/X86/*.cpp") + +set(src_all ${src_core}) + +foreach(t ${LLVM_TARGETS_TO_BUILD}) + set(src_all ${src_all} ${src_${t}}) +endforeach(t) + +include_directories( + "../../include" + "../lib/Target/AArch64" + "../lib/Target/ARM" + "../lib/Target/Hexagon" + "../lib/Target/Mips" + "../lib/Target/PowerPC" + "../lib/Target/Sparc" + "../lib/Target/SystemZ" + "../lib/Target/X86" +) + +add_library(keystone + ${src_all} + ks.cpp + EVMMapping.cpp +) + +install(TARGETS keystone DESTINATION lib${LLVM_LIBDIR_SUFFIX}) + +set_target_properties( + keystone + PROPERTIES + archive_output_directory ${CMAKE_CURRENT_BINARY_DIR}/lib + COMPILER_FLAGS "/EHsc" + SOVERSION ${KEYSTONE_VERSION_MAJOR} +) + +if(NOT BUILD_SHARED_LIBS) + target_compile_definitions( + keystone + PUBLIC + KEYSTONE_STATIC + ) +endif() + +if (APPLE) + set_target_properties(keystone + PROPERTIES + INSTALL_RPATH "") +endif() + diff --git a/llvm/keystone/EVMMapping.cpp b/llvm/keystone/EVMMapping.cpp new file mode 100644 index 0000000..b1695ad --- /dev/null +++ b/llvm/keystone/EVMMapping.cpp @@ -0,0 +1,294 @@ +/* Capstone Disassembly Engine */ +/* By Nguyen Anh Quynh, 2018 */ + +#include + +#include "EVMMapping.h" +#include "evm.h" + +#define ARR_SIZE(a) (sizeof(a)/sizeof(a[0])) + +// map id to string +typedef struct name_map { + unsigned short id; + const char *name; +} name_map; + +static name_map insn_name_maps[] = { + { EVM_INS_STOP, "stop" }, + { EVM_INS_ADD, "add" }, + { EVM_INS_MUL, "mul" }, + { EVM_INS_SUB, "sub" }, + { EVM_INS_DIV, "div" }, + { EVM_INS_SDIV, "sdiv" }, + { EVM_INS_MOD, "mod" }, + { EVM_INS_SMOD, "smod" }, + { EVM_INS_ADDMOD, "addmod" }, + { EVM_INS_MULMOD, "mulmod" }, + { EVM_INS_EXP, "exp" }, + { EVM_INS_SIGNEXTEND, "signextend" }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_LT, "lt" }, + { EVM_INS_GT, "gt" }, + { EVM_INS_SLT, "slt" }, + { EVM_INS_SGT, "sgt" }, + { EVM_INS_EQ, "eq" }, + { EVM_INS_ISZERO, "iszero" }, + { EVM_INS_AND, "and" }, + { EVM_INS_OR, "or" }, + { EVM_INS_XOR, "xor" }, + { EVM_INS_NOT, "not" }, + { EVM_INS_BYTE, "byte" }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_SHA3, "sha3" }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_ADDRESS, "address" }, + { EVM_INS_BALANCE, "balance" }, + { EVM_INS_ORIGIN, "origin" }, + { EVM_INS_CALLER, "caller" }, + { EVM_INS_CALLVALUE, "callvalue" }, + { EVM_INS_CALLDATALOAD, "calldataload" }, + { EVM_INS_CALLDATASIZE, "calldatasize" }, + { EVM_INS_CALLDATACOPY, "calldatacopy" }, + { EVM_INS_CODESIZE, "codesize" }, + { EVM_INS_CODECOPY, "codecopy" }, + { EVM_INS_GASPRICE, "gasprice" }, + { EVM_INS_EXTCODESIZE, "extcodesize" }, + { EVM_INS_EXTCODECOPY, "extcodecopy" }, + { EVM_INS_RETURNDATASIZE, "returndatasize" }, + { EVM_INS_RETURNDATACOPY, "returndatacopy" }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_BLOCKHASH, "blockhash" }, + { EVM_INS_COINBASE, "coinbase" }, + { EVM_INS_TIMESTAMP, "timestamp" }, + { EVM_INS_NUMBER, "number" }, + { EVM_INS_DIFFICULTY, "difficulty" }, + { EVM_INS_GASLIMIT, "gaslimit" }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_POP, "pop" }, + { EVM_INS_MLOAD, "mload" }, + { EVM_INS_MSTORE, "mstore" }, + { EVM_INS_MSTORE8, "mstore8" }, + { EVM_INS_SLOAD, "sload" }, + { EVM_INS_SSTORE, "sstore" }, + { EVM_INS_JUMP, "jump" }, + { EVM_INS_JUMPI, "jumpi" }, + { EVM_INS_PC, "pc" }, + { EVM_INS_MSIZE, "msize" }, + { EVM_INS_GAS, "gas" }, + { EVM_INS_JUMPDEST, "jumpdest" }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_PUSH1, "push1" }, + { EVM_INS_PUSH2, "push2" }, + { EVM_INS_PUSH3, "push3" }, + { EVM_INS_PUSH4, "push4" }, + { EVM_INS_PUSH5, "push5" }, + { EVM_INS_PUSH6, "push6" }, + { EVM_INS_PUSH7, "push7" }, + { EVM_INS_PUSH8, "push8" }, + { EVM_INS_PUSH9, "push9" }, + { EVM_INS_PUSH10, "push10" }, + { EVM_INS_PUSH11, "push11" }, + { EVM_INS_PUSH12, "push12" }, + { EVM_INS_PUSH13, "push13" }, + { EVM_INS_PUSH14, "push14" }, + { EVM_INS_PUSH15, "push15" }, + { EVM_INS_PUSH16, "push16" }, + { EVM_INS_PUSH17, "push17" }, + { EVM_INS_PUSH18, "push18" }, + { EVM_INS_PUSH19, "push19" }, + { EVM_INS_PUSH20, "push20" }, + { EVM_INS_PUSH21, "push21" }, + { EVM_INS_PUSH22, "push22" }, + { EVM_INS_PUSH23, "push23" }, + { EVM_INS_PUSH24, "push24" }, + { EVM_INS_PUSH25, "push25" }, + { EVM_INS_PUSH26, "push26" }, + { EVM_INS_PUSH27, "push27" }, + { EVM_INS_PUSH28, "push28" }, + { EVM_INS_PUSH29, "push29" }, + { EVM_INS_PUSH30, "push30" }, + { EVM_INS_PUSH31, "push31" }, + { EVM_INS_PUSH32, "push32" }, + { EVM_INS_DUP1, "dup1" }, + { EVM_INS_DUP2, "dup2" }, + { EVM_INS_DUP3, "dup3" }, + { EVM_INS_DUP4, "dup4" }, + { EVM_INS_DUP5, "dup5" }, + { EVM_INS_DUP6, "dup6" }, + { EVM_INS_DUP7, "dup7" }, + { EVM_INS_DUP8, "dup8" }, + { EVM_INS_DUP9, "dup9" }, + { EVM_INS_DUP10, "dup10" }, + { EVM_INS_DUP11, "dup11" }, + { EVM_INS_DUP12, "dup12" }, + { EVM_INS_DUP13, "dup13" }, + { EVM_INS_DUP14, "dup14" }, + { EVM_INS_DUP15, "dup15" }, + { EVM_INS_DUP16, "dup16" }, + { EVM_INS_SWAP1, "swap1" }, + { EVM_INS_SWAP2, "swap2" }, + { EVM_INS_SWAP3, "swap3" }, + { EVM_INS_SWAP4, "swap4" }, + { EVM_INS_SWAP5, "swap5" }, + { EVM_INS_SWAP6, "swap6" }, + { EVM_INS_SWAP7, "swap7" }, + { EVM_INS_SWAP8, "swap8" }, + { EVM_INS_SWAP9, "swap9" }, + { EVM_INS_SWAP10, "swap10" }, + { EVM_INS_SWAP11, "swap11" }, + { EVM_INS_SWAP12, "swap12" }, + { EVM_INS_SWAP13, "swap13" }, + { EVM_INS_SWAP14, "swap14" }, + { EVM_INS_SWAP15, "swap15" }, + { EVM_INS_SWAP16, "swap16" }, + { EVM_INS_LOG0, "log0" }, + { EVM_INS_LOG1, "log1" }, + { EVM_INS_LOG2, "log2" }, + { EVM_INS_LOG3, "log3" }, + { EVM_INS_LOG4, "log4" }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_CREATE, "create" }, + { EVM_INS_CALL, "call" }, + { EVM_INS_CALLCODE, "callcode" }, + { EVM_INS_RETURN, "return" }, + { EVM_INS_DELEGATECALL, "delegatecall" }, + { EVM_INS_CALLBLACKBOX, "callblackbox" }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_STATICCALL, "staticcall" }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_REVERT, "revert" }, + { EVM_INS_INVALID, NULL }, + { EVM_INS_SUICIDE, "suicide" }, +}; + +#if defined(_WIN32) || defined(_WIN64) +#define strcasecmp _stricmp +#endif + +#include + +// find opcode of this mnemonic, or return -1 on failure +unsigned short EVM_opcode(const char *mnemonic) +{ + unsigned int i; + + for(i = 0; i < ARR_SIZE(insn_name_maps); i++) { + if (insn_name_maps[i].name && !strcasecmp(insn_name_maps[i].name, mnemonic)) { + return (unsigned short)insn_name_maps[i].id; + } + } + + return (unsigned short)-1; +} diff --git a/llvm/keystone/EVMMapping.h b/llvm/keystone/EVMMapping.h new file mode 100644 index 0000000..61086da --- /dev/null +++ b/llvm/keystone/EVMMapping.h @@ -0,0 +1,7 @@ +#ifndef KS_EVMMAPPING_H +#define KS_EVMMAPPING_H + +// find opcode of this mnemonic, or return -1 on failure +unsigned short EVM_opcode(const char *mnemonic); + +#endif diff --git a/llvm/keystone/LICENSE b/llvm/keystone/LICENSE new file mode 100644 index 0000000..24f0978 --- /dev/null +++ b/llvm/keystone/LICENSE @@ -0,0 +1,2 @@ +Code in this directory use the license of Keystone project. +See ../../README.md for further information. diff --git a/llvm/keystone/LLVMBuild.txt b/llvm/keystone/LLVMBuild.txt new file mode 100644 index 0000000..d2dc89c --- /dev/null +++ b/llvm/keystone/LLVMBuild.txt @@ -0,0 +1,14 @@ +;===------------------------------------------------------------------------===; +; +; This is an LLVMBuild description file for the Keystone library +; +; For more information on the LLVMBuild system, please see: +; +; http://llvm.org/docs/LLVMBuild.html +; +;===------------------------------------------------------------------------===; + +[component_0] +type = Library +name = keystone +parent = Libraries diff --git a/llvm/keystone/evm.h b/llvm/keystone/evm.h new file mode 100644 index 0000000..4b37d73 --- /dev/null +++ b/llvm/keystone/evm.h @@ -0,0 +1,160 @@ +#ifndef CAPSTONE_EVM_H +#define CAPSTONE_EVM_H + +/* Copied from Capstone Disassembly Engine */ +/* By Nguyen Anh Quynh , 2013-2018 */ + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef _MSC_VER +#pragma warning(disable:4201) +#endif + +//> EVM instruction +typedef enum evm_insn { + EVM_INS_STOP = 0, + EVM_INS_ADD = 1, + EVM_INS_MUL = 2, + EVM_INS_SUB = 3, + EVM_INS_DIV = 4, + EVM_INS_SDIV = 5, + EVM_INS_MOD = 6, + EVM_INS_SMOD = 7, + EVM_INS_ADDMOD = 8, + EVM_INS_MULMOD = 9, + EVM_INS_EXP = 10, + EVM_INS_SIGNEXTEND = 11, + EVM_INS_LT = 16, + EVM_INS_GT = 17, + EVM_INS_SLT = 18, + EVM_INS_SGT = 19, + EVM_INS_EQ = 20, + EVM_INS_ISZERO = 21, + EVM_INS_AND = 22, + EVM_INS_OR = 23, + EVM_INS_XOR = 24, + EVM_INS_NOT = 25, + EVM_INS_BYTE = 26, + EVM_INS_SHA3 = 32, + EVM_INS_ADDRESS = 48, + EVM_INS_BALANCE = 49, + EVM_INS_ORIGIN = 50, + EVM_INS_CALLER = 51, + EVM_INS_CALLVALUE = 52, + EVM_INS_CALLDATALOAD = 53, + EVM_INS_CALLDATASIZE = 54, + EVM_INS_CALLDATACOPY = 55, + EVM_INS_CODESIZE = 56, + EVM_INS_CODECOPY = 57, + EVM_INS_GASPRICE = 58, + EVM_INS_EXTCODESIZE = 59, + EVM_INS_EXTCODECOPY = 60, + EVM_INS_RETURNDATASIZE = 61, + EVM_INS_RETURNDATACOPY = 62, + EVM_INS_BLOCKHASH = 64, + EVM_INS_COINBASE = 65, + EVM_INS_TIMESTAMP = 66, + EVM_INS_NUMBER = 67, + EVM_INS_DIFFICULTY = 68, + EVM_INS_GASLIMIT = 69, + EVM_INS_POP = 80, + EVM_INS_MLOAD = 81, + EVM_INS_MSTORE = 82, + EVM_INS_MSTORE8 = 83, + EVM_INS_SLOAD = 84, + EVM_INS_SSTORE = 85, + EVM_INS_JUMP = 86, + EVM_INS_JUMPI = 87, + EVM_INS_PC = 88, + EVM_INS_MSIZE = 89, + EVM_INS_GAS = 90, + EVM_INS_JUMPDEST = 91, + EVM_INS_PUSH1 = 96, + EVM_INS_PUSH2 = 97, + EVM_INS_PUSH3 = 98, + EVM_INS_PUSH4 = 99, + EVM_INS_PUSH5 = 100, + EVM_INS_PUSH6 = 101, + EVM_INS_PUSH7 = 102, + EVM_INS_PUSH8 = 103, + EVM_INS_PUSH9 = 104, + EVM_INS_PUSH10 = 105, + EVM_INS_PUSH11 = 106, + EVM_INS_PUSH12 = 107, + EVM_INS_PUSH13 = 108, + EVM_INS_PUSH14 = 109, + EVM_INS_PUSH15 = 110, + EVM_INS_PUSH16 = 111, + EVM_INS_PUSH17 = 112, + EVM_INS_PUSH18 = 113, + EVM_INS_PUSH19 = 114, + EVM_INS_PUSH20 = 115, + EVM_INS_PUSH21 = 116, + EVM_INS_PUSH22 = 117, + EVM_INS_PUSH23 = 118, + EVM_INS_PUSH24 = 119, + EVM_INS_PUSH25 = 120, + EVM_INS_PUSH26 = 121, + EVM_INS_PUSH27 = 122, + EVM_INS_PUSH28 = 123, + EVM_INS_PUSH29 = 124, + EVM_INS_PUSH30 = 125, + EVM_INS_PUSH31 = 126, + EVM_INS_PUSH32 = 127, + EVM_INS_DUP1 = 128, + EVM_INS_DUP2 = 129, + EVM_INS_DUP3 = 130, + EVM_INS_DUP4 = 131, + EVM_INS_DUP5 = 132, + EVM_INS_DUP6 = 133, + EVM_INS_DUP7 = 134, + EVM_INS_DUP8 = 135, + EVM_INS_DUP9 = 136, + EVM_INS_DUP10 = 137, + EVM_INS_DUP11 = 138, + EVM_INS_DUP12 = 139, + EVM_INS_DUP13 = 140, + EVM_INS_DUP14 = 141, + EVM_INS_DUP15 = 142, + EVM_INS_DUP16 = 143, + EVM_INS_SWAP1 = 144, + EVM_INS_SWAP2 = 145, + EVM_INS_SWAP3 = 146, + EVM_INS_SWAP4 = 147, + EVM_INS_SWAP5 = 148, + EVM_INS_SWAP6 = 149, + EVM_INS_SWAP7 = 150, + EVM_INS_SWAP8 = 151, + EVM_INS_SWAP9 = 152, + EVM_INS_SWAP10 = 153, + EVM_INS_SWAP11 = 154, + EVM_INS_SWAP12 = 155, + EVM_INS_SWAP13 = 156, + EVM_INS_SWAP14 = 157, + EVM_INS_SWAP15 = 158, + EVM_INS_SWAP16 = 159, + EVM_INS_LOG0 = 160, + EVM_INS_LOG1 = 161, + EVM_INS_LOG2 = 162, + EVM_INS_LOG3 = 163, + EVM_INS_LOG4 = 164, + EVM_INS_CREATE = 240, + EVM_INS_CALL = 241, + EVM_INS_CALLCODE = 242, + EVM_INS_RETURN = 243, + EVM_INS_DELEGATECALL = 244, + EVM_INS_CALLBLACKBOX = 245, + EVM_INS_STATICCALL = 250, + EVM_INS_REVERT = 253, + EVM_INS_SUICIDE = 255, + + EVM_INS_INVALID = 512, +} evm_insn; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/llvm/keystone/ks.cpp b/llvm/keystone/ks.cpp new file mode 100644 index 0000000..453df77 --- /dev/null +++ b/llvm/keystone/ks.cpp @@ -0,0 +1,684 @@ +/* Keystone Assembler Engine */ +/* By Nguyen Anh Quynh , 2016 */ + +#if defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64) +#pragma warning(disable:4996) +#endif +#if defined(KEYSTONE_HAS_OSXKERNEL) +#include +#else +#include +#endif + +#include "llvm/MC/MCObjectFileInfo.h" +#include "llvm/MC/MCCodeEmitter.h" + +// FIXME: setup this with CMake +#define LLVM_ENABLE_ARCH_EVM +#include "EVMMapping.h" + +// DEBUG +//#include + +#include "ks_priv.h" + +using namespace llvm_ks; + + +KEYSTONE_EXPORT +unsigned int ks_version(unsigned int *major, unsigned int *minor) +{ + if (major != NULL && minor != NULL) { + *major = KS_API_MAJOR; + *minor = KS_API_MINOR; + } + + return (KS_API_MAJOR << 8) + KS_API_MINOR; +} + + +KEYSTONE_EXPORT +ks_err ks_errno(ks_engine *ks) +{ + return (ks_err)ks->errnum; +} + + +KEYSTONE_EXPORT +const char *ks_strerror(ks_err code) +{ + switch(code) { + default: + return "Unknown error"; // FIXME + case KS_ERR_OK: + return "OK (KS_ERR_OK)"; + case KS_ERR_NOMEM: + return "No memory available or memory not present (KS_ERR_NOMEM)"; + case KS_ERR_ARCH: + return "Invalid/unsupported architecture (KS_ERR_ARCH)"; + case KS_ERR_HANDLE: + return "Invalid handle (KS_ERR_HANDLE)"; + case KS_ERR_MODE: + return "Invalid mode (KS_ERR_MODE)"; + case KS_ERR_VERSION: + return "Different API version between core & binding (KS_ERR_VERSION)"; + case KS_ERR_OPT_INVALID: + return "Invalid option (KS_ERR_OPT_INVALID)"; + case KS_ERR_ASM_INVALIDOPERAND: + return "Invalid operand (KS_ERR_ASM_INVALIDOPERAND)"; + case KS_ERR_ASM_MISSINGFEATURE: + return "Missing CPU feature (KS_ERR_ASM_MISSINGFEATURE)"; + case KS_ERR_ASM_MNEMONICFAIL: + return "Invalid mnemonic (KS_ERR_ASM_MNEMONICFAIL)"; + + // generic input assembly errors - parser specific + case KS_ERR_ASM_EXPR_TOKEN: // unknown token in expression + return "Unknown token in expression (KS_ERR_ASM_EXPR_TOKEN)"; + case KS_ERR_ASM_DIRECTIVE_VALUE_RANGE: // literal value out of range for directive + return "Literal value out of range for directive (KS_ERR_ASM_DIRECTIVE_VALUE_RANGE)"; + case KS_ERR_ASM_DIRECTIVE_ID: // expected identifier in directive + return "Expected identifier in directive (KS_ERR_ASM_DIRECTIVE_ID)"; + case KS_ERR_ASM_DIRECTIVE_TOKEN: // unexpected token in directive + return "Unexpected token in directive (KS_ERR_ASM_DIRECTIVE_TOKEN)"; + case KS_ERR_ASM_DIRECTIVE_STR: // expected string in directive + return "Expected string in directive (KS_ERR_ASM_DIRECTIVE_STR)"; + case KS_ERR_ASM_DIRECTIVE_COMMA: // expected comma in directive + return "Expected comma in directive (KS_ERR_ASM_DIRECTIVE_COMMA)"; + //case KS_ERR_ASM_DIRECTIVE_RELOC_NAME: // expected relocation name in directive + // return "Expected relocation name in directive (KS_ERR_ASM_DIRECTIVE_RELOC_NAME)"; + //case KS_ERR_ASM_DIRECTIVE_RELOC_TOKEN: // unexpected token in .reloc directive + // return "Unexpected token in .reloc directive (KS_ERR_ASM_DIRECTIVE_RELOC_TOKEN)"; + case KS_ERR_ASM_DIRECTIVE_FPOINT: // invalid floating point in directive + return "Invalid floating point in directive (KS_ERR_ASM_DIRECTIVE_FPOINT)"; + case KS_ERR_ASM_VARIANT_INVALID: // invalid variant + return "Invalid variant (KS_ERR_ASM_VARIANT_INVALID)"; + case KS_ERR_ASM_DIRECTIVE_EQU: + return "Invalid equal directive (KS_ERR_ASM_DIRECTIVE_EQU)"; + case KS_ERR_ASM_EXPR_BRACKET: // brackets expression not supported on this target + return "Brackets expression not supported (KS_ERR_ASM_EXPR_BRACKET)"; + case KS_ERR_ASM_SYMBOL_MODIFIER: // unexpected symbol modifier following '@' + return "Unexpected symbol modifier following '@' (KS_ERR_ASM_SYMBOL_MODIFIER)"; + case KS_ERR_ASM_SYMBOL_REDEFINED: + return "Invalid symbol redefined (KS_ERR_ASM_SYMBOL_REDEFINED)"; + case KS_ERR_ASM_SYMBOL_MISSING: + return "Cannot find a symbol (KS_ERR_ASM_SYMBOL_MISSING)"; + case KS_ERR_ASM_RPAREN: // expected ')' in parentheses expression + return "Expected ')' (KS_ERR_ASM_RPAREN)"; + case KS_ERR_ASM_STAT_TOKEN: // unexpected token at start of statement + return "Unexpected token at start of statement (KS_ERR_ASM_STAT_TOKEN)"; + case KS_ERR_ASM_UNSUPPORTED: // unsupported token yet + return "Unsupported token yet (KS_ERR_ASM_UNSUPPORTED)"; + case KS_ERR_ASM_MACRO_TOKEN: // unexpected token in macro instantiation + return "Unexpected token in macro instantiation (KS_ERR_ASM_MACRO_TOKEN)"; + case KS_ERR_ASM_MACRO_PAREN: // unbalanced parentheses in macro argument + return "Unbalanced parentheses in macro argument (KS_ERR_ASM_MACRO_PAREN)"; + case KS_ERR_ASM_MACRO_EQU: // expected '=' after formal parameter identifier + return "Expected '=' after formal parameter identifier (KS_ERR_ASM_MACRO_EQU)"; + case KS_ERR_ASM_MACRO_ARGS: // too many positional arguments + return "Too many positional arguments (KS_ERR_ASM_MACRO_ARGS)"; + case KS_ERR_ASM_MACRO_LEVELS_EXCEED: // macros cannot be nested more than 20 levels deep + return "Macros cannot be nested more than 20 levels deep (KS_ERR_ASM_MACRO_LEVELS_EXCEED)"; + case KS_ERR_ASM_MACRO_STR: // invalid macro string + return "Invalid macro string (KS_ERR_ASM_MACRO_STR)"; + case KS_ERR_ASM_MACRO_INVALID: // invalid macro string + return "Invalid macro (KS_ERR_ASM_MACRO_INVALID)"; + case KS_ERR_ASM_ESC_BACKSLASH: // unexpected backslash at end of escaped string + return "Unexpected backslash at end of escaped string (KS_ERR_ASM_ESC_BACKSLASH)"; + case KS_ERR_ASM_ESC_OCTAL: // invalid octal escape sequence (out of range) + return "Invalid octal escape sequence (KS_ERR_ASM_ESC_OCTAL)"; + case KS_ERR_ASM_ESC_SEQUENCE: // invalid escape sequence (unrecognized character) + return "Invalid escape sequence (KS_ERR_ASM_ESC_SEQUENCE)"; + case KS_ERR_ASM_ESC_STR: // broken escape string + return "Invalid escape string (KS_ERR_ASM_ESC_STR)"; + case KS_ERR_ASM_TOKEN_INVALID: // invalid token from input assembly + return "Invalid input token (KS_ERR_ASM_TOKEN_INVALID)"; + case KS_ERR_ASM_INSN_UNSUPPORTED: + return "Instruction is unsupported in this mode (KS_ERR_ASM_INSN_UNSUPPORTED)"; + case KS_ERR_ASM_DIRECTIVE_UNKNOWN: + return "Unknown directive (KS_ERR_ASM_DIRECTIVE_UNKNOWN)"; + case KS_ERR_ASM_FIXUP_INVALID: + return "Invalid fixup (KS_ERR_ASM_FIXUP_INVALID)"; + case KS_ERR_ASM_LABEL_INVALID: + return "Invalid label (KS_ERR_ASM_LABEL_INVALID)"; + case KS_ERR_ASM_FRAGMENT_INVALID: + return "Invalid fragment (KS_ERR_ASM_FRAGMENT_INVALID)"; + case KS_ERR_ASM_DIRECTIVE_INVALID: + return "Invalid directive (KS_ERR_ASM_DIRECTIVE_INVALID)"; + } +} + + +KEYSTONE_EXPORT +bool ks_arch_supported(ks_arch arch) +{ + switch (arch) { +#ifdef LLVM_ENABLE_ARCH_ARM + case KS_ARCH_ARM: return true; +#endif +#ifdef LLVM_ENABLE_ARCH_AArch64 + case KS_ARCH_ARM64: return true; +#endif +#ifdef LLVM_ENABLE_ARCH_Mips + case KS_ARCH_MIPS: return true; +#endif +#ifdef LLVM_ENABLE_ARCH_PowerPC + case KS_ARCH_PPC: return true; +#endif +#ifdef LLVM_ENABLE_ARCH_Sparc + case KS_ARCH_SPARC: return true; +#endif +#ifdef LLVM_ENABLE_ARCH_X86 + case KS_ARCH_X86: return true; +#endif +#ifdef LLVM_ENABLE_ARCH_Hexagon + case KS_ARCH_HEXAGON: return true; +#endif +#ifdef LLVM_ENABLE_ARCH_SystemZ + case KS_ARCH_SYSTEMZ: return true; +#endif +#ifdef LLVM_ENABLE_ARCH_EVM + case KS_ARCH_EVM: return true; +#endif + /* Invalid or disabled arch */ + default: return false; + } +} + + +static const Target *GetTarget(std::string TripleName) +{ + // Figure out the target triple. + Triple TheTriple(TripleName); + + // Get the target specific parser. + std::string Error; + + return TargetRegistry::lookupTarget("", TheTriple, Error); +} + + +static ks_err InitKs(int arch, ks_engine *ks, std::string TripleName) +{ + static bool initialized = false; + std::string MCPU = ""; + + if (!initialized) { + initialized = true; + // Initialize targets and assembly parsers. + llvm_ks::InitializeAllTargetInfos(); + llvm_ks::InitializeAllTargetMCs(); + llvm_ks::InitializeAllAsmParsers(); + } + + ks->TripleName = Triple::normalize(TripleName); + ks->TheTarget = GetTarget(ks->TripleName); + if (!ks->TheTarget) + return KS_ERR_MODE; // FIXME + + // Now that GetTarget() has (potentially) replaced TripleName, it's safe to + // construct the Triple object. + Triple TheTriple(ks->TripleName); + + ks->MRI = ks->TheTarget->createMCRegInfo(ks->TripleName); + assert(ks->MRI && "Unable to create target register info!"); + + // Package up features to be passed to target/subtarget +#if 0 + if (MAttrs.size()) { + SubtargetFeatures Features; + for (unsigned i = 0; i != MAttrs.size(); ++i) + Features.AddFeature(MAttrs[i]); + ks->FeaturesStr = Features.getString(); + } +#endif + + ks->MAI = ks->TheTarget->createMCAsmInfo(*ks->MRI, ks->TripleName); + assert(ks->MAI && "Unable to create target asm info!"); + + // enable Knights Landing architecture for X86 + if (ks->arch == KS_ARCH_X86) + MCPU = "knl"; + + ks->MCII = ks->TheTarget->createMCInstrInfo(); + ks->STI = ks->TheTarget->createMCSubtargetInfo(ks->TripleName, MCPU, ks->FeaturesStr); + ks->MAB = ks->TheTarget->createMCAsmBackend(*ks->MRI, ks->TripleName, MCPU); + ks->MAB->setArch(arch); + ks->MCOptions = InitMCTargetOptionsFromFlags(); + + return KS_ERR_OK; +} + + +KEYSTONE_EXPORT +ks_err ks_open(ks_arch arch, int mode, ks_engine **result) +{ + struct ks_struct *ks; + std::string TripleName = ""; + + if (arch < KS_ARCH_MAX) { + // LLVM-based architectures + ks = new (std::nothrow) ks_struct(arch, mode, KS_ERR_OK, KS_OPT_SYNTAX_INTEL); + + if (!ks) { + // memory insufficient + return KS_ERR_NOMEM; + } + + switch(arch) { + default: break; + +#ifdef LLVM_ENABLE_ARCH_ARM + case KS_ARCH_ARM: + if (mode & ~KS_MODE_ARM_MASK) { + delete ks; + return KS_ERR_MODE; + } + + switch(mode) { + default: + return KS_ERR_MODE; + // big-endian + case KS_MODE_BIG_ENDIAN | KS_MODE_V8 | KS_MODE_ARM: + TripleName = "armv8eb"; + break; + case KS_MODE_BIG_ENDIAN | KS_MODE_V8 | KS_MODE_THUMB: + TripleName = "thumbv8eb"; + break; + case KS_MODE_BIG_ENDIAN | KS_MODE_ARM: + TripleName = "armv7eb"; + break; + case KS_MODE_BIG_ENDIAN | KS_MODE_THUMB: + TripleName = "thumbebv7"; + break; + + // little-endian + case KS_MODE_LITTLE_ENDIAN | KS_MODE_V8 | KS_MODE_ARM: + TripleName = "armv8"; + break; + case KS_MODE_LITTLE_ENDIAN | KS_MODE_V8 | KS_MODE_THUMB: + TripleName = "thumbv8"; + break; + case KS_MODE_LITTLE_ENDIAN | KS_MODE_ARM: + TripleName = "armv7"; + break; + case KS_MODE_LITTLE_ENDIAN | KS_MODE_THUMB: + TripleName = "thumbv7"; + break; + } + + InitKs(arch, ks, TripleName); + + //ks->init_arch = arm_ks_init; + break; +#endif + +#ifdef LLVM_ENABLE_ARCH_AArch64 + case KS_ARCH_ARM64: + if (mode != KS_MODE_LITTLE_ENDIAN) { + delete ks; + return KS_ERR_MODE; + } + + TripleName = "aarch64"; + InitKs(arch, ks, TripleName); + + //ks->init_arch = arm64_ks_init; + break; +#endif + +#ifdef LLVM_ENABLE_ARCH_Hexagon + case KS_ARCH_HEXAGON: + if (mode & ~KS_MODE_HEXAGON_MASK) { + delete ks; + return KS_ERR_MODE; + } + + TripleName = "hexagon"; + + InitKs(arch, ks, TripleName); + + //ks->init_arch = arm_ks_init; + break; +#endif + +#ifdef LLVM_ENABLE_ARCH_SystemZ + case KS_ARCH_SYSTEMZ: + if (mode & ~KS_MODE_SYSTEMZ_MASK) { + delete ks; + return KS_ERR_MODE; + } + + TripleName = "s390x"; + + InitKs(arch, ks, TripleName); + + //ks->init_arch = arm_ks_init; + break; +#endif + +#ifdef LLVM_ENABLE_ARCH_Sparc + case KS_ARCH_SPARC: + if ((mode & ~KS_MODE_SPARC_MASK) || + !(mode & (KS_MODE_SPARC32|KS_MODE_SPARC64))) { + delete ks; + return KS_ERR_MODE; + } + if (mode & KS_MODE_BIG_ENDIAN) { + // big endian + if (mode & KS_MODE_SPARC64) + TripleName = "sparc64"; + else + TripleName = "sparc"; + } else { + // little endian + if (mode & KS_MODE_SPARC64) { + // TripleName = "sparc64el"; + // FIXME + delete ks; + return KS_ERR_MODE; + } else + TripleName = "sparcel"; + } + + InitKs(arch, ks, TripleName); + + break; +#endif + +#ifdef LLVM_ENABLE_ARCH_Mips + case KS_ARCH_MIPS: + if ((mode & ~KS_MODE_MIPS_MASK) || + !(mode & (KS_MODE_MIPS32|KS_MODE_MIPS64))) { + delete ks; + return KS_ERR_MODE; + } + if (mode & KS_MODE_BIG_ENDIAN) { + // big endian + if (mode & KS_MODE_MIPS32) + TripleName = "mips"; + if (mode & KS_MODE_MIPS64) + TripleName = "mips64"; + } else { // little endian + if (mode & KS_MODE_MIPS32) + TripleName = "mipsel"; + if (mode & KS_MODE_MIPS64) + TripleName = "mips64el"; + } + + InitKs(arch, ks, TripleName); + + break; +#endif + +#ifdef LLVM_ENABLE_ARCH_PowerPC + case KS_ARCH_PPC: + if ((mode & ~KS_MODE_PPC_MASK) || + !(mode & (KS_MODE_PPC32|KS_MODE_PPC64))) { + delete ks; + return KS_ERR_MODE; + } + + if (mode & KS_MODE_BIG_ENDIAN) { + // big endian + if (mode & KS_MODE_PPC32) + TripleName = "ppc32"; + if (mode & KS_MODE_PPC64) + TripleName = "ppc64"; + } else { // little endian + if (mode & KS_MODE_PPC32) { + // do not support this mode + delete ks; + return KS_ERR_MODE; + } + if (mode & KS_MODE_MIPS64) + TripleName = "ppc64le"; + } + + InitKs(arch, ks, TripleName); + + //ks->init_arch = ppc_ks_init; + break; +#endif + +#ifdef LLVM_ENABLE_ARCH_X86 + case KS_ARCH_X86: { + if ((mode & ~KS_MODE_X86_MASK) || + (mode & KS_MODE_BIG_ENDIAN) || + !(mode & (KS_MODE_16|KS_MODE_32|KS_MODE_64))) { + delete ks; + return KS_ERR_MODE; + } + + switch(mode) { + default: break; + case KS_MODE_16: + // FIXME + TripleName = "i386-unknown-unknown-code16"; + break; + case KS_MODE_32: + // FIXME + TripleName = "i386"; + break; + case KS_MODE_64: + // FIXME + TripleName = "x86_64"; + break; + } + + InitKs(arch, ks, TripleName); + + //ks->init_arch = x86_ks_init; + break; + } +#endif +#ifdef LLVM_ENABLE_ARCH_EVM + case KS_ARCH_EVM: { + *result = ks; + return KS_ERR_OK; + } +#endif + } + + if (TripleName.empty()) { + // this arch is not supported + delete ks; + return KS_ERR_ARCH; + } + + *result = ks; + + return KS_ERR_OK; + } else + return KS_ERR_ARCH; +} + + +KEYSTONE_EXPORT +ks_err ks_close(ks_engine *ks) +{ + if (!ks) + return KS_ERR_HANDLE; + + if (ks->arch == KS_ARCH_EVM) { + // handle EVM differently + delete ks; + return KS_ERR_OK; + } + + // LLVM-based architectures + delete ks->STI; + delete ks->MCII; + delete ks->MAI; + delete ks->MRI; + delete ks->MAB; + + // finally, free ks itself. + delete ks; + + return KS_ERR_OK; +} + + +KEYSTONE_EXPORT +ks_err ks_option(ks_engine *ks, ks_opt_type type, size_t value) +{ + ks->MAI->setRadix(16); + switch(type) { + case KS_OPT_SYNTAX: + if (ks->arch != KS_ARCH_X86) + return KS_ERR_OPT_INVALID; + switch(value) { + default: + return KS_ERR_OPT_INVALID; + case KS_OPT_SYNTAX_RADIX16: // default syntax is Intel + case KS_OPT_SYNTAX_NASM | KS_OPT_SYNTAX_RADIX16: + case KS_OPT_SYNTAX_INTEL | KS_OPT_SYNTAX_RADIX16: + ks->MAI->setRadix(16); + case KS_OPT_SYNTAX_NASM: + case KS_OPT_SYNTAX_INTEL: + ks->syntax = (ks_opt_value)value; + ks->MAI->setAssemblerDialect(1); + break; + case KS_OPT_SYNTAX_GAS | KS_OPT_SYNTAX_RADIX16: + case KS_OPT_SYNTAX_ATT | KS_OPT_SYNTAX_RADIX16: + ks->MAI->setRadix(16); + case KS_OPT_SYNTAX_GAS: + case KS_OPT_SYNTAX_ATT: + ks->syntax = (ks_opt_value)value; + ks->MAI->setAssemblerDialect(0); + break; + } + + return KS_ERR_OK; + case KS_OPT_SYM_RESOLVER: + ks->sym_resolver = (ks_sym_resolver)value; + return KS_ERR_OK; + } + + return KS_ERR_OPT_INVALID; +} + + +KEYSTONE_EXPORT +void ks_free(unsigned char *p) +{ + free(p); +} + +/* + @return: 0 on success, or -1 on failure. + On failure, call ks_errno() for error code. +*/ +KEYSTONE_EXPORT +int ks_asm(ks_engine *ks, + const char *assembly, + uint64_t address, + unsigned char **insn, size_t *insn_size, + size_t *stat_count) +{ + MCCodeEmitter *CE; + MCStreamer *Streamer; + unsigned char *encoding; + SmallString<1024> Msg; + raw_svector_ostream OS(Msg); + + if (ks->arch == KS_ARCH_EVM) { + // handle EVM differently + unsigned short opcode = EVM_opcode(assembly); + if (opcode == (unsigned short)-1) { + // invalid instruction + return -1; + } + + *insn_size = 1; + *stat_count = 1; + encoding = (unsigned char *)malloc(*insn_size); + encoding[0] = opcode; + *insn = encoding; + return 0; + } + + *insn = NULL; + *insn_size = 0; + + MCContext Ctx(ks->MAI, ks->MRI, &ks->MOFI, &ks->SrcMgr, true, address); + ks->MOFI.InitMCObjectFileInfo(Triple(ks->TripleName), Ctx); + CE = ks->TheTarget->createMCCodeEmitter(*ks->MCII, *ks->MRI, Ctx); + if (!CE) { + // memory insufficient + return KS_ERR_NOMEM; + } + Streamer = ks->TheTarget->createMCObjectStreamer( + Triple(ks->TripleName), Ctx, *ks->MAB, OS, CE, *ks->STI, ks->MCOptions.MCRelaxAll, + /*DWARFMustBeAtTheEnd*/ false); + + if (!Streamer) { + // memory insufficient + delete CE; + return KS_ERR_NOMEM; + } + + // Tell SrcMgr about this buffer, which is what the parser will pick up. + ErrorOr> BufferPtr = MemoryBuffer::getMemBuffer(assembly); + if (BufferPtr.getError()) { + delete Streamer; + delete CE; + return KS_ERR_NOMEM; + } + + ks->SrcMgr.clearBuffers(); + ks->SrcMgr.AddNewSourceBuffer(std::move(*BufferPtr), SMLoc()); + + Streamer->setSymResolver((void *)(ks->sym_resolver)); + + MCAsmParser *Parser = createMCAsmParser(ks->SrcMgr, Ctx, *Streamer, *ks->MAI); + if (!Parser) { + delete Streamer; + delete CE; + // memory insufficient + return KS_ERR_NOMEM; + } + MCTargetAsmParser *TAP = ks->TheTarget->createMCAsmParser(*ks->STI, *Parser, *ks->MCII, ks->MCOptions); + if (!TAP) { + // memory insufficient + delete Parser; + delete Streamer; + delete CE; + return KS_ERR_NOMEM; + } + TAP->KsSyntax = ks->syntax; + + Parser->setTargetParser(*TAP); + + // TODO: optimize this to avoid setting up NASM every time we call ks_asm() + if (ks->arch == KS_ARCH_X86 && ks->syntax == KS_OPT_SYNTAX_NASM) { + Parser->initializeDirectiveKindMap(KS_OPT_SYNTAX_NASM); + ks->MAI->setCommentString(";"); + } + + *stat_count = Parser->Run(false, address); + + // PPC counts empty statement + if (ks->arch == KS_ARCH_PPC) + *stat_count = *stat_count / 2; + + ks->errnum = Parser->KsError; + + delete TAP; + delete Parser; + delete CE; + delete Streamer; + + if (ks->errnum >= KS_ERR_ASM) + return -1; + else { + *insn_size = Msg.size(); + encoding = (unsigned char *)malloc(*insn_size); + if (!encoding) { + return KS_ERR_NOMEM; + } + memcpy(encoding, Msg.data(), *insn_size); + *insn = encoding; + return 0; + } +} diff --git a/llvm/keystone/ks_priv.h b/llvm/keystone/ks_priv.h new file mode 100644 index 0000000..aa1446a --- /dev/null +++ b/llvm/keystone/ks_priv.h @@ -0,0 +1,65 @@ +/* Keystone Assembler Engine */ +/* By Nguyen Anh Quynh , 2016 */ + +#ifndef KS_PRIV_H +#define KS_PRIV_H + +#include + +#include "../../include/keystone/keystone.h" + +#include "llvm/MC/MCAsmBackend.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCInstrInfo.h" +#include "llvm/MC/MCParser/MCTargetAsmParser.h" +#include "llvm/MC/MCTargetOptionsCommandFlags.h" +#include "llvm/Support/SourceMgr.h" +#include "llvm/Support/TargetRegistry.h" +#include "llvm/Support/TargetSelect.h" + +// These are masks of supported modes for each cpu/arch. +// They should be updated when changes are made to the ks_mode enum typedef. +#define KS_MODE_ARM_MASK (KS_MODE_ARM|KS_MODE_THUMB|KS_MODE_LITTLE_ENDIAN|KS_MODE_BIG_ENDIAN|KS_MODE_V8) +#define KS_MODE_MIPS_MASK (KS_MODE_MIPS32|KS_MODE_MIPS64|KS_MODE_LITTLE_ENDIAN|KS_MODE_BIG_ENDIAN) +#define KS_MODE_X86_MASK (KS_MODE_16|KS_MODE_32|KS_MODE_64|KS_MODE_LITTLE_ENDIAN) +#define KS_MODE_PPC_MASK (KS_MODE_PPC32|KS_MODE_PPC64|KS_MODE_LITTLE_ENDIAN|KS_MODE_BIG_ENDIAN) +#define KS_MODE_SPARC_MASK (KS_MODE_V9|KS_MODE_SPARC32|KS_MODE_SPARC64|KS_MODE_LITTLE_ENDIAN|KS_MODE_BIG_ENDIAN) +#define KS_MODE_HEXAGON_MASK (KS_MODE_BIG_ENDIAN) +#define KS_MODE_SYSTEMZ_MASK (KS_MODE_BIG_ENDIAN) +#define KS_MODE_ARM64_MASK (KS_MODE_LITTLE_ENDIAN) +#define KS_MODE_M68K_MASK (KS_MODE_BIG_ENDIAN) + +#define ARR_SIZE(a) (sizeof(a)/sizeof(a[0])) + +struct ks_struct; + +// return 0 on success, -1 on failure +typedef void (*ks_args_ks_t)(struct ks_struct*); + +struct ks_struct { + ks_arch arch; + int mode; + unsigned int errnum; + ks_opt_value syntax; + + ks_args_ks_t init_arch = nullptr; + const Target *TheTarget = nullptr; + std::string TripleName; + SourceMgr SrcMgr; + MCAsmBackend *MAB = nullptr; + MCTargetOptions MCOptions; + MCRegisterInfo *MRI = nullptr; + MCAsmInfo *MAI = nullptr; + MCInstrInfo *MCII = nullptr; + std::string FeaturesStr; + MCSubtargetInfo *STI = nullptr; + MCObjectFileInfo MOFI; + ks_sym_resolver sym_resolver = nullptr; + + ks_struct(ks_arch arch, int mode, unsigned int errnum, ks_opt_value syntax) + : arch(arch), mode(mode), errnum(errnum), syntax(syntax) { } +}; + + +#endif diff --git a/llvm/lib/CMakeLists.txt b/llvm/lib/CMakeLists.txt new file mode 100644 index 0000000..354d27d --- /dev/null +++ b/llvm/lib/CMakeLists.txt @@ -0,0 +1,4 @@ +# `Support' and `TableGen' libraries are added on the top-level CMakeLists.txt + +add_subdirectory(MC) +add_subdirectory(Target) diff --git a/llvm/lib/LLVMBuild.txt b/llvm/lib/LLVMBuild.txt new file mode 100644 index 0000000..b0d70cf --- /dev/null +++ b/llvm/lib/LLVMBuild.txt @@ -0,0 +1,27 @@ +;===- ./lib/LLVMBuild.txt --------------------------------------*- Conf -*--===; +; +; The LLVM Compiler Infrastructure +; +; This file is distributed under the University of Illinois Open Source +; License. See LICENSE.TXT for details. +; +;===------------------------------------------------------------------------===; +; +; This is an LLVMBuild description file for the components in this subdirectory. +; +; For more information on the LLVMBuild system, please see: +; +; http://llvm.org/docs/LLVMBuild.html +; +;===------------------------------------------------------------------------===; + +[common] +subdirectories = + MC + Support + Target + +[component_0] +type = Group +name = Libraries +parent = $ROOT diff --git a/llvm/lib/MC/CMakeLists.txt b/llvm/lib/MC/CMakeLists.txt new file mode 100644 index 0000000..e69de29 diff --git a/llvm/lib/MC/ConstantPools.cpp b/llvm/lib/MC/ConstantPools.cpp new file mode 100644 index 0000000..9ef1253 --- /dev/null +++ b/llvm/lib/MC/ConstantPools.cpp @@ -0,0 +1,97 @@ +//===- ConstantPools.cpp - ConstantPool class --*- C++ -*---------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the ConstantPool and AssemblerConstantPools classes. +// +//===----------------------------------------------------------------------===// +#include "llvm/ADT/MapVector.h" +#include "llvm/MC/ConstantPools.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCStreamer.h" + +using namespace llvm_ks; +// +// ConstantPool implementation +// +// Emit the contents of the constant pool using the provided streamer. +void ConstantPool::emitEntries(MCStreamer &Streamer) { + if (Entries.empty()) + return; + Streamer.EmitDataRegion(MCDR_DataRegion); + for (EntryVecTy::const_iterator I = Entries.begin(), E = Entries.end(); + I != E; ++I) { + Streamer.EmitCodeAlignment(I->Size); // align naturally + Streamer.EmitLabel(I->Label); + Streamer.EmitValue(I->Value, I->Size, I->Loc); + } + Streamer.EmitDataRegion(MCDR_DataRegionEnd); + Entries.clear(); +} + +const MCExpr *ConstantPool::addEntry(const MCExpr *Value, MCContext &Context, + unsigned Size, SMLoc Loc) { + MCSymbol *CPEntryLabel = Context.createTempSymbol(); + + Entries.push_back(ConstantPoolEntry(CPEntryLabel, Value, Size, Loc)); + return MCSymbolRefExpr::create(CPEntryLabel, Context); +} + +bool ConstantPool::empty() { return Entries.empty(); } + +// +// AssemblerConstantPools implementation +// +ConstantPool *AssemblerConstantPools::getConstantPool(MCSection *Section) { + ConstantPoolMapTy::iterator CP = ConstantPools.find(Section); + if (CP == ConstantPools.end()) + return nullptr; + + return &CP->second; +} + +ConstantPool & +AssemblerConstantPools::getOrCreateConstantPool(MCSection *Section) { + return ConstantPools[Section]; +} + +static void emitConstantPool(MCStreamer &Streamer, MCSection *Section, + ConstantPool &CP) { + if (!CP.empty()) { + Streamer.SwitchSection(Section); + CP.emitEntries(Streamer); + } +} + +void AssemblerConstantPools::emitAll(MCStreamer &Streamer) { + // Dump contents of assembler constant pools. + for (ConstantPoolMapTy::iterator CPI = ConstantPools.begin(), + CPE = ConstantPools.end(); + CPI != CPE; ++CPI) { + MCSection *Section = CPI->first; + ConstantPool &CP = CPI->second; + + emitConstantPool(Streamer, Section, CP); + } +} + +void AssemblerConstantPools::emitForCurrentSection(MCStreamer &Streamer) { + MCSection *Section = Streamer.getCurrentSection().first; + if (ConstantPool *CP = getConstantPool(Section)) { + emitConstantPool(Streamer, Section, *CP); + } +} + +const MCExpr *AssemblerConstantPools::addEntry(MCStreamer &Streamer, + const MCExpr *Expr, + unsigned Size, SMLoc Loc) { + MCSection *Section = Streamer.getCurrentSection().first; + return getOrCreateConstantPool(Section).addEntry(Expr, Streamer.getContext(), + Size, Loc); +} diff --git a/llvm/lib/MC/ELFObjectWriter.cpp b/llvm/lib/MC/ELFObjectWriter.cpp new file mode 100644 index 0000000..1f26516 --- /dev/null +++ b/llvm/lib/MC/ELFObjectWriter.cpp @@ -0,0 +1,1273 @@ +//===- lib/MC/ELFObjectWriter.cpp - ELF File Writer -----------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements ELF object file writer information. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCELFObjectWriter.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/SmallPtrSet.h" +#include "llvm/ADT/SmallString.h" +#include "llvm/ADT/StringMap.h" +#include "llvm/MC/MCAsmBackend.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCAsmLayout.h" +#include "llvm/MC/MCAssembler.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCFixupKindInfo.h" +#include "llvm/MC/MCObjectWriter.h" +#include "llvm/MC/MCSectionELF.h" +#include "llvm/MC/MCSymbolELF.h" +#include "llvm/MC/MCValue.h" +#include "llvm/MC/StringTableBuilder.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/ELF.h" +#include "llvm/Support/Endian.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/StringSaver.h" +#include +using namespace llvm_ks; + +#undef DEBUG_TYPE +#define DEBUG_TYPE "reloc-info" + +namespace { + +typedef DenseMap SectionIndexMapTy; + +class ELFObjectWriter; + +class SymbolTableWriter { + ELFObjectWriter &EWriter; + bool Is64Bit; + + // indexes we are going to write to .symtab_shndx. + std::vector ShndxIndexes; + + // The numbel of symbols written so far. + unsigned NumWritten; + + void createSymtabShndx(); + + template void write(T Value); + +public: + SymbolTableWriter(ELFObjectWriter &EWriter, bool Is64Bit); + + void writeSymbol(uint32_t name, uint8_t info, uint64_t value, uint64_t size, + uint8_t other, uint32_t shndx, bool Reserved); + + ArrayRef getShndxIndexes() const { return ShndxIndexes; } +}; + +class ELFObjectWriter : public MCObjectWriter { + static uint64_t SymbolValue(const MCSymbol &Sym, const MCAsmLayout &Layout); + static bool isInSymtab(const MCAsmLayout &Layout, const MCSymbolELF &Symbol, + bool Used, bool Renamed); + + /// Helper struct for containing some precomputed information on symbols. + struct ELFSymbolData { + const MCSymbolELF *Symbol; + uint32_t SectionIndex; + StringRef Name; + + // Support lexicographic sorting. + bool operator<(const ELFSymbolData &RHS) const { + unsigned LHSType = Symbol->getType(); + unsigned RHSType = RHS.Symbol->getType(); + if (LHSType == ELF::STT_SECTION && RHSType != ELF::STT_SECTION) + return false; + if (LHSType != ELF::STT_SECTION && RHSType == ELF::STT_SECTION) + return true; + if (LHSType == ELF::STT_SECTION && RHSType == ELF::STT_SECTION) + return SectionIndex < RHS.SectionIndex; + return Name < RHS.Name; + } + }; + + /// The target specific ELF writer instance. + std::unique_ptr TargetObjectWriter; + + DenseMap Renames; + + llvm_ks::DenseMap> + Relocations; + + /// @} + /// @name Symbol Table Data + /// @{ + + BumpPtrAllocator Alloc; + StringSaver VersionSymSaver{Alloc}; + StringTableBuilder StrTabBuilder{StringTableBuilder::ELF}; + + /// @} + + // This holds the symbol table index of the last local symbol. + unsigned LastLocalSymbolIndex; + // This holds the .strtab section index. + unsigned StringTableIndex; + // This holds the .symtab section index. + unsigned SymbolTableIndex; + + // Sections in the order they are to be output in the section table. + std::vector SectionTable; + unsigned addToSectionTable(const MCSectionELF *Sec); + + // TargetObjectWriter wrappers. + bool is64Bit() const { return TargetObjectWriter->is64Bit(); } + bool hasRelocationAddend() const { + // Keystone doesn't want relocation addends. + /* return TargetObjectWriter->hasRelocationAddend(); */ + return false; + } + unsigned getRelocType(MCContext &Ctx, const MCValue &Target, + const MCFixup &Fixup, bool IsPCRel) const { + return TargetObjectWriter->getRelocType(Ctx, Target, Fixup, IsPCRel); + } + + void align(unsigned Alignment); + + public: + ELFObjectWriter(MCELFObjectTargetWriter *MOTW, raw_pwrite_stream &OS, + bool IsLittleEndian) + : MCObjectWriter(OS, IsLittleEndian), TargetObjectWriter(MOTW) {} + + void reset() override { + Renames.clear(); + Relocations.clear(); + StrTabBuilder.clear(); + SectionTable.clear(); + MCObjectWriter::reset(); + } + + ~ELFObjectWriter() override; + + void WriteWord(uint64_t W) { + if (is64Bit()) + write64(W); + else + write32(W); + } + + template void write(T Val) { + if (IsLittleEndian) + support::endian::Writer(getStream()).write(Val); + else + support::endian::Writer(getStream()).write(Val); + } + + void writeSymbol(SymbolTableWriter &Writer, uint32_t StringIndex, + ELFSymbolData &MSD, const MCAsmLayout &Layout); + + // Start and end offset of each section + typedef std::map> + SectionOffsetsTy; + + bool shouldRelocateWithSymbol(const MCAssembler &Asm, + const MCSymbolRefExpr *RefA, + const MCSymbol *Sym, uint64_t C, + unsigned Type) const; + + void recordRelocation(MCAssembler &Asm, const MCAsmLayout &Layout, + const MCFragment *Fragment, const MCFixup &Fixup, + MCValue Target, bool &IsPCRel, + uint64_t &FixedValue) override; + + // Map from a signature symbol to the group section index + typedef DenseMap RevGroupMapTy; + + /// Compute the symbol table data + /// + /// \param Asm - The assembler. + /// \param SectionIndexMap - Maps a section to its index. + /// \param RevGroupMap - Maps a signature symbol to the group section. + void computeSymbolTable(MCAssembler &Asm, const MCAsmLayout &Layout, + const SectionIndexMapTy &SectionIndexMap, + const RevGroupMapTy &RevGroupMap, + SectionOffsetsTy &SectionOffsets); + + MCSectionELF *createRelocationSection(MCContext &Ctx, + const MCSectionELF &Sec); + + const MCSectionELF *createStringTable(MCContext &Ctx); + + void executePostLayoutBinding(MCAssembler &Asm, + const MCAsmLayout &Layout) override; + + void writeSectionHeader(const MCAsmLayout &Layout, + const SectionIndexMapTy &SectionIndexMap, + const SectionOffsetsTy &SectionOffsets); + + void writeSectionData(const MCAssembler &Asm, MCSection &Sec, + const MCAsmLayout &Layout); + + void WriteSecHdrEntry(uint32_t Name, uint32_t Type, uint64_t Flags, + uint64_t Address, uint64_t Offset, uint64_t Size, + uint32_t Link, uint32_t Info, uint64_t Alignment, + uint64_t EntrySize); + + void writeRelocations(const MCAssembler &Asm, const MCSectionELF &Sec); + + bool isSymbolRefDifferenceFullyResolvedImpl(const MCAssembler &Asm, + const MCSymbol &SymA, + const MCFragment &FB, + bool InSet, + bool IsPCRel) const override; + + bool isWeak(const MCSymbol &Sym) const override; + + void writeObject(MCAssembler &Asm, const MCAsmLayout &Layout) override; + void writeSection(const SectionIndexMapTy &SectionIndexMap, + uint32_t GroupSymbolIndex, uint64_t Offset, uint64_t Size, + const MCSectionELF &Section); + }; +} + +void ELFObjectWriter::align(unsigned Alignment) { + uint64_t Padding = OffsetToAlignment(getStream().tell(), Alignment); + WriteZeros(Padding); +} + +unsigned ELFObjectWriter::addToSectionTable(const MCSectionELF *Sec) { + SectionTable.push_back(Sec); + StrTabBuilder.add(Sec->getSectionName()); + return SectionTable.size(); +} + +void SymbolTableWriter::createSymtabShndx() { + if (!ShndxIndexes.empty()) + return; + + ShndxIndexes.resize(NumWritten); +} + +template void SymbolTableWriter::write(T Value) { + EWriter.write(Value); +} + +SymbolTableWriter::SymbolTableWriter(ELFObjectWriter &EWriter, bool Is64Bit) + : EWriter(EWriter), Is64Bit(Is64Bit), NumWritten(0) {} + +void SymbolTableWriter::writeSymbol(uint32_t name, uint8_t info, uint64_t value, + uint64_t size, uint8_t other, + uint32_t shndx, bool Reserved) { + bool LargeIndex = shndx >= ELF::SHN_LORESERVE && !Reserved; + + if (LargeIndex) + createSymtabShndx(); + + if (!ShndxIndexes.empty()) { + if (LargeIndex) + ShndxIndexes.push_back(shndx); + else + ShndxIndexes.push_back(0); + } + + uint16_t Index = LargeIndex ? uint16_t(ELF::SHN_XINDEX) : shndx; + + if (Is64Bit) { + write(name); // st_name + write(info); // st_info + write(other); // st_other + write(Index); // st_shndx + write(value); // st_value + write(size); // st_size + } else { + write(name); // st_name + write(uint32_t(value)); // st_value + write(uint32_t(size)); // st_size + write(info); // st_info + write(other); // st_other + write(Index); // st_shndx + } + + ++NumWritten; +} + +ELFObjectWriter::~ELFObjectWriter() +{} + +uint64_t ELFObjectWriter::SymbolValue(const MCSymbol &Sym, + const MCAsmLayout &Layout) { + if (Sym.isCommon() && Sym.isExternal()) + return Sym.getCommonAlignment(); + + uint64_t Res; + bool valid; + if (!Layout.getSymbolOffset(Sym, Res, valid)) + return 0; + + if (Layout.getAssembler().isThumbFunc(&Sym)) + Res |= 1; + + return Res; +} + +void ELFObjectWriter::executePostLayoutBinding(MCAssembler &Asm, + const MCAsmLayout &Layout) { + // The presence of symbol versions causes undefined symbols and + // versions declared with @@@ to be renamed. + + for (const MCSymbol &A : Asm.symbols()) { + const auto &Alias = cast(A); + // Not an alias. + if (!Alias.isVariable()) + continue; + auto *Ref = dyn_cast(Alias.getVariableValue()); + if (!Ref) + continue; + const auto &Symbol = cast(Ref->getSymbol()); + + StringRef AliasName = Alias.getName(); + size_t Pos = AliasName.find('@'); + if (Pos == StringRef::npos) + continue; + + // Aliases defined with .symvar copy the binding from the symbol they alias. + // This is the first place we are able to copy this information. + Alias.setExternal(Symbol.isExternal()); + Alias.setBinding(Symbol.getBinding()); + + StringRef Rest = AliasName.substr(Pos); + if (!Symbol.isUndefined() && !Rest.startswith("@@@")) + continue; + + // FIXME: produce a better error message. + if (Symbol.isUndefined() && Rest.startswith("@@") && + !Rest.startswith("@@@")) + report_fatal_error("A @@ version cannot be undefined"); + + Renames.insert(std::make_pair(&Symbol, &Alias)); + } +} + +static uint8_t mergeTypeForSet(uint8_t origType, uint8_t newType) { + uint8_t Type = newType; + + // Propagation rules: + // IFUNC > FUNC > OBJECT > NOTYPE + // TLS_OBJECT > OBJECT > NOTYPE + // + // dont let the new type degrade the old type + switch (origType) { + default: + break; + case ELF::STT_GNU_IFUNC: + if (Type == ELF::STT_FUNC || Type == ELF::STT_OBJECT || + Type == ELF::STT_NOTYPE || Type == ELF::STT_TLS) + Type = ELF::STT_GNU_IFUNC; + break; + case ELF::STT_FUNC: + if (Type == ELF::STT_OBJECT || Type == ELF::STT_NOTYPE || + Type == ELF::STT_TLS) + Type = ELF::STT_FUNC; + break; + case ELF::STT_OBJECT: + if (Type == ELF::STT_NOTYPE) + Type = ELF::STT_OBJECT; + break; + case ELF::STT_TLS: + if (Type == ELF::STT_OBJECT || Type == ELF::STT_NOTYPE || + Type == ELF::STT_GNU_IFUNC || Type == ELF::STT_FUNC) + Type = ELF::STT_TLS; + break; + } + + return Type; +} + +void ELFObjectWriter::writeSymbol(SymbolTableWriter &Writer, + uint32_t StringIndex, ELFSymbolData &MSD, + const MCAsmLayout &Layout) { + const auto &Symbol = cast(*MSD.Symbol); + const MCSymbolELF *Base = + cast_or_null(Layout.getBaseSymbol(Symbol)); + + // This has to be in sync with when computeSymbolTable uses SHN_ABS or + // SHN_COMMON. + bool IsReserved = !Base || Symbol.isCommon(); + + // Binding and Type share the same byte as upper and lower nibbles + uint8_t Binding = Symbol.getBinding(); + uint8_t Type = Symbol.getType(); + if (Base) { + Type = mergeTypeForSet(Type, Base->getType()); + } + uint8_t Info = (Binding << 4) | Type; + + // Other and Visibility share the same byte with Visibility using the lower + // 2 bits + uint8_t Visibility = Symbol.getVisibility(); + uint8_t Other = Symbol.getOther() | Visibility; + + uint64_t Value = SymbolValue(*MSD.Symbol, Layout); + uint64_t Size = 0; + + const MCExpr *ESize = MSD.Symbol->getSize(); + if (!ESize && Base) + ESize = Base->getSize(); + + if (ESize) { + int64_t Res; + if (!ESize->evaluateKnownAbsolute(Res, Layout)) + report_fatal_error("Size expression must be absolute."); + Size = Res; + } + + // Write out the symbol table entry + Writer.writeSymbol(StringIndex, Info, Value, Size, Other, MSD.SectionIndex, + IsReserved); +} + +// It is always valid to create a relocation with a symbol. It is preferable +// to use a relocation with a section if that is possible. Using the section +// allows us to omit some local symbols from the symbol table. +bool ELFObjectWriter::shouldRelocateWithSymbol(const MCAssembler &Asm, + const MCSymbolRefExpr *RefA, + const MCSymbol *S, uint64_t C, + unsigned Type) const { + const auto *Sym = cast_or_null(S); + // A PCRel relocation to an absolute value has no symbol (or section). We + // represent that with a relocation to a null section. + if (!RefA) + return false; + + MCSymbolRefExpr::VariantKind Kind = RefA->getKind(); + switch (Kind) { + default: + break; + // The .odp creation emits a relocation against the symbol ".TOC." which + // create a R_PPC64_TOC relocation. However the relocation symbol name + // in final object creation should be NULL, since the symbol does not + // really exist, it is just the reference to TOC base for the current + // object file. Since the symbol is undefined, returning false results + // in a relocation with a null section which is the desired result. + case MCSymbolRefExpr::VK_PPC_TOCBASE: + return false; + + // These VariantKind cause the relocation to refer to something other than + // the symbol itself, like a linker generated table. Since the address of + // symbol is not relevant, we cannot replace the symbol with the + // section and patch the difference in the addend. + case MCSymbolRefExpr::VK_GOT: + case MCSymbolRefExpr::VK_PLT: + case MCSymbolRefExpr::VK_GOTPCREL: + case MCSymbolRefExpr::VK_Mips_GOT: + case MCSymbolRefExpr::VK_PPC_GOT_LO: + case MCSymbolRefExpr::VK_PPC_GOT_HI: + case MCSymbolRefExpr::VK_PPC_GOT_HA: + return true; + } + + // An undefined symbol is not in any section, so the relocation has to point + // to the symbol itself. + assert(Sym && "Expected a symbol"); + if (Sym->isUndefined()) + return true; + + unsigned Binding = Sym->getBinding(); + switch(Binding) { + default: + llvm_unreachable("Invalid Binding"); + case ELF::STB_LOCAL: + break; + case ELF::STB_WEAK: + // If the symbol is weak, it might be overridden by a symbol in another + // file. The relocation has to point to the symbol so that the linker + // can update it. + return true; + case ELF::STB_GLOBAL: + // Global ELF symbols can be preempted by the dynamic linker. The relocation + // has to point to the symbol for a reason analogous to the STB_WEAK case. + return true; + } + + // If a relocation points to a mergeable section, we have to be careful. + // If the offset is zero, a relocation with the section will encode the + // same information. With a non-zero offset, the situation is different. + // For example, a relocation can point 42 bytes past the end of a string. + // If we change such a relocation to use the section, the linker would think + // that it pointed to another string and subtracting 42 at runtime will + // produce the wrong value. + auto &Sec = cast(Sym->getSection()); + unsigned Flags = Sec.getFlags(); + if (Flags & ELF::SHF_MERGE) { + if (C != 0) + return true; + + // It looks like gold has a bug (http://sourceware.org/PR16794) and can + // only handle section relocations to mergeable sections if using RELA. + if (!hasRelocationAddend()) + return true; + } + + // Most TLS relocations use a got, so they need the symbol. Even those that + // are just an offset (@tpoff), require a symbol in gold versions before + // 5efeedf61e4fe720fd3e9a08e6c91c10abb66d42 (2014-09-26) which fixed + // http://sourceware.org/PR16773. + if (Flags & ELF::SHF_TLS) + return true; + + // If the symbol is a thumb function the final relocation must set the lowest + // bit. With a symbol that is done by just having the symbol have that bit + // set, so we would lose the bit if we relocated with the section. + // FIXME: We could use the section but add the bit to the relocation value. + if (Asm.isThumbFunc(Sym)) + return true; + + if (TargetObjectWriter->needsRelocateWithSymbol(*Sym, Type)) + return true; + return false; +} + +// True if the assembler knows nothing about the final value of the symbol. +// This doesn't cover the comdat issues, since in those cases the assembler +// can at least know that all symbols in the section will move together. +static bool isWeak(const MCSymbolELF &Sym) { + if (Sym.getType() == ELF::STT_GNU_IFUNC) + return true; + + switch (Sym.getBinding()) { + default: + llvm_unreachable("Unknown binding"); + case ELF::STB_LOCAL: + return false; + case ELF::STB_GLOBAL: + return false; + case ELF::STB_WEAK: + case ELF::STB_GNU_UNIQUE: + return true; + } +} + +void ELFObjectWriter::recordRelocation(MCAssembler &Asm, + const MCAsmLayout &Layout, + const MCFragment *Fragment, + const MCFixup &Fixup, MCValue Target, + bool &IsPCRel, uint64_t &FixedValue) +{ + const MCSectionELF &FixupSection = cast(*Fragment->getParent()); + uint64_t C = Target.getConstant(); + bool valid; + uint64_t FixupOffset = Layout.getFragmentOffset(Fragment, valid) + Fixup.getOffset(); + MCContext &Ctx = Asm.getContext(); + + if (const MCSymbolRefExpr *RefB = Target.getSymB()) { + assert(RefB->getKind() == MCSymbolRefExpr::VK_None && + "Should not have constructed this"); + + // Let A, B and C being the components of Target and R be the location of + // the fixup. If the fixup is not pcrel, we want to compute (A - B + C). + // If it is pcrel, we want to compute (A - B + C - R). + + // In general, ELF has no relocations for -B. It can only represent (A + C) + // or (A + C - R). If B = R + K and the relocation is not pcrel, we can + // replace B to implement it: (A - R - K + C) + if (IsPCRel) { + Ctx.reportError( + Fixup.getLoc(), + "No relocation available to represent this relative expression"); + return; + } + + const auto &SymB = cast(RefB->getSymbol()); + + if (SymB.isUndefined()) { + Ctx.reportError(Fixup.getLoc(), + Twine("symbol '") + SymB.getName() + + "' can not be undefined in a subtraction expression"); + return; + } + + assert(!SymB.isAbsolute() && "Should have been folded"); + const MCSection &SecB = SymB.getSection(); + if (&SecB != &FixupSection) { + Ctx.reportError(Fixup.getLoc(), + "Cannot represent a difference across sections"); + return; + } + + bool valid; + uint64_t SymBOffset = Layout.getSymbolOffset(SymB, valid); + uint64_t K = SymBOffset - FixupOffset; + IsPCRel = true; + C -= K; + } + + // We either rejected the fixup or folded B into C at this point. + const MCSymbolRefExpr *RefA = Target.getSymA(); + const auto *SymA = RefA ? cast(&RefA->getSymbol()) : nullptr; + + bool ViaWeakRef = false; + if (SymA && SymA->isVariable()) { + const MCExpr *Expr = SymA->getVariableValue(); + if (const auto *Inner = dyn_cast(Expr)) { + if (Inner->getKind() == MCSymbolRefExpr::VK_WEAKREF) { + SymA = cast(&Inner->getSymbol()); + ViaWeakRef = true; + } + } + } + + unsigned Type = getRelocType(Ctx, Target, Fixup, IsPCRel); + bool RelocateWithSymbol = shouldRelocateWithSymbol(Asm, RefA, SymA, C, Type); + if (!RelocateWithSymbol && SymA && !SymA->isUndefined()) { + bool valid; + C += Layout.getSymbolOffset(*SymA, valid); + } + + uint64_t Addend = 0; + if (hasRelocationAddend()) { + Addend = C; + C = 0; + } + + FixedValue = C; + + if (!RelocateWithSymbol) { + const MCSection *SecA = + (SymA && !SymA->isUndefined()) ? &SymA->getSection() : nullptr; + auto *ELFSec = cast_or_null(SecA); + const auto *SectionSymbol = + ELFSec ? cast(ELFSec->getBeginSymbol()) : nullptr; + if (SectionSymbol) + SectionSymbol->setUsedInReloc(); + ELFRelocationEntry Rec(FixupOffset, SectionSymbol, Type, Addend); + Relocations[&FixupSection].push_back(Rec); + return; + } + + if (SymA) { + if (const MCSymbolELF *R = Renames.lookup(SymA)) + SymA = R; + + if (ViaWeakRef) + SymA->setIsWeakrefUsedInReloc(); + else + SymA->setUsedInReloc(); + } + ELFRelocationEntry Rec(FixupOffset, SymA, Type, Addend); + Relocations[&FixupSection].push_back(Rec); + return; +} + +bool ELFObjectWriter::isInSymtab(const MCAsmLayout &Layout, + const MCSymbolELF &Symbol, bool Used, + bool Renamed) { + if (Symbol.isVariable()) { + const MCExpr *Expr = Symbol.getVariableValue(); + if (const MCSymbolRefExpr *Ref = dyn_cast(Expr)) { + if (Ref->getKind() == MCSymbolRefExpr::VK_WEAKREF) + return false; + } + } + + if (Used) + return true; + + if (Renamed) + return false; + + if (Symbol.isVariable() && Symbol.isUndefined()) { + // FIXME: this is here just to diagnose the case of a var = commmon_sym. + Layout.getBaseSymbol(Symbol); + return false; + } + + if (Symbol.isUndefined() && !Symbol.isBindingSet()) + return false; + + if (Symbol.isTemporary()) + return false; + + if (Symbol.getType() == ELF::STT_SECTION) + return false; + + return true; +} + +void ELFObjectWriter::computeSymbolTable( + MCAssembler &Asm, const MCAsmLayout &Layout, + const SectionIndexMapTy &SectionIndexMap, const RevGroupMapTy &RevGroupMap, + SectionOffsetsTy &SectionOffsets) { + MCContext &Ctx = Asm.getContext(); + SymbolTableWriter Writer(*this, is64Bit()); + + // Symbol table + unsigned EntrySize = is64Bit() ? ELF::SYMENTRY_SIZE64 : ELF::SYMENTRY_SIZE32; + MCSectionELF *SymtabSection = + Ctx.getELFSection(".symtab", ELF::SHT_SYMTAB, 0, EntrySize, ""); + SymtabSection->setAlignment(is64Bit() ? 8 : 4); + SymbolTableIndex = addToSectionTable(SymtabSection); + + align(SymtabSection->getAlignment()); + uint64_t SecStart = getStream().tell(); + + // The first entry is the undefined symbol entry. + Writer.writeSymbol(0, 0, 0, 0, 0, 0, false); + + std::vector LocalSymbolData; + std::vector ExternalSymbolData; + + // Add the data for the symbols. + bool HasLargeSectionIndex = false; + for (const MCSymbol &S : Asm.symbols()) { + const auto &Symbol = cast(S); + bool Used = Symbol.isUsedInReloc(); + bool WeakrefUsed = Symbol.isWeakrefUsedInReloc(); + bool isSignature = Symbol.isSignature(); + + if (!isInSymtab(Layout, Symbol, Used || WeakrefUsed || isSignature, + Renames.count(&Symbol))) + continue; + + if (Symbol.isTemporary() && Symbol.isUndefined()) { + Ctx.reportError(SMLoc(), "Undefined temporary symbol"); + continue; + } + + ELFSymbolData MSD; + MSD.Symbol = cast(&Symbol); + + bool Local = Symbol.getBinding() == ELF::STB_LOCAL; + assert(Local || !Symbol.isTemporary()); + + if (Symbol.isAbsolute()) { + MSD.SectionIndex = ELF::SHN_ABS; + } else if (Symbol.isCommon()) { + assert(!Local); + MSD.SectionIndex = ELF::SHN_COMMON; + } else if (Symbol.isUndefined()) { + if (isSignature && !Used) { + MSD.SectionIndex = RevGroupMap.lookup(&Symbol); + if (MSD.SectionIndex >= ELF::SHN_LORESERVE) + HasLargeSectionIndex = true; + } else { + MSD.SectionIndex = ELF::SHN_UNDEF; + } + } else { + const MCSectionELF &Section = + static_cast(Symbol.getSection()); + MSD.SectionIndex = SectionIndexMap.lookup(&Section); + assert(MSD.SectionIndex && "Invalid section index!"); + if (MSD.SectionIndex >= ELF::SHN_LORESERVE) + HasLargeSectionIndex = true; + } + + // The @@@ in symbol version is replaced with @ in undefined symbols and @@ + // in defined ones. + // + // FIXME: All name handling should be done before we get to the writer, + // including dealing with GNU-style version suffixes. Fixing this isn't + // trivial. + // + // We thus have to be careful to not perform the symbol version replacement + // blindly: + // + // The ELF format is used on Windows by the MCJIT engine. Thus, on + // Windows, the ELFObjectWriter can encounter symbols mangled using the MS + // Visual Studio C++ name mangling scheme. Symbols mangled using the MSVC + // C++ name mangling can legally have "@@@" as a sub-string. In that case, + // the EFLObjectWriter should not interpret the "@@@" sub-string as + // specifying GNU-style symbol versioning. The ELFObjectWriter therefore + // checks for the MSVC C++ name mangling prefix which is either "?", "@?", + // "__imp_?" or "__imp_@?". + // + // It would have been interesting to perform the MS mangling prefix check + // only when the target triple is of the form *-pc-windows-elf. But, it + // seems that this information is not easily accessible from the + // ELFObjectWriter. + StringRef Name = Symbol.getName(); + SmallString<32> Buf; + if (!Name.startswith("?") && !Name.startswith("@?") && + !Name.startswith("__imp_?") && !Name.startswith("__imp_@?")) { + // This symbol isn't following the MSVC C++ name mangling convention. We + // can thus safely interpret the @@@ in symbol names as specifying symbol + // versioning. + size_t Pos = Name.find("@@@"); + if (Pos != StringRef::npos) { + Buf += Name.substr(0, Pos); + unsigned Skip = MSD.SectionIndex == ELF::SHN_UNDEF ? 2 : 1; + Buf += Name.substr(Pos + Skip); + Name = VersionSymSaver.save(Buf.c_str()); + } + } + + // Sections have their own string table + if (Symbol.getType() != ELF::STT_SECTION) { + MSD.Name = Name; + StrTabBuilder.add(Name); + } + + if (Local) + LocalSymbolData.push_back(MSD); + else + ExternalSymbolData.push_back(MSD); + } + + // This holds the .symtab_shndx section index. + unsigned SymtabShndxSectionIndex = 0; + + if (HasLargeSectionIndex) { + MCSectionELF *SymtabShndxSection = + Ctx.getELFSection(".symtab_shndxr", ELF::SHT_SYMTAB_SHNDX, 0, 4, ""); + SymtabShndxSectionIndex = addToSectionTable(SymtabShndxSection); + SymtabShndxSection->setAlignment(4); + } + + ArrayRef FileNames = Asm.getFileNames(); + for (const std::string &Name : FileNames) + StrTabBuilder.add(Name); + + StrTabBuilder.finalize(); + + for (const std::string &Name : FileNames) + Writer.writeSymbol(StrTabBuilder.getOffset(Name), + ELF::STT_FILE | ELF::STB_LOCAL, 0, 0, ELF::STV_DEFAULT, + ELF::SHN_ABS, true); + + // Symbols are required to be in lexicographic order. + array_pod_sort(LocalSymbolData.begin(), LocalSymbolData.end()); + array_pod_sort(ExternalSymbolData.begin(), ExternalSymbolData.end()); + + // Set the symbol indices. Local symbols must come before all other + // symbols with non-local bindings. + unsigned Index = FileNames.size() + 1; + + for (ELFSymbolData &MSD : LocalSymbolData) { + unsigned StringIndex = MSD.Symbol->getType() == ELF::STT_SECTION + ? 0 + : StrTabBuilder.getOffset(MSD.Name); + MSD.Symbol->setIndex(Index++); + writeSymbol(Writer, StringIndex, MSD, Layout); + } + + // Write the symbol table entries. + LastLocalSymbolIndex = Index; + + for (ELFSymbolData &MSD : ExternalSymbolData) { + unsigned StringIndex = StrTabBuilder.getOffset(MSD.Name); + MSD.Symbol->setIndex(Index++); + writeSymbol(Writer, StringIndex, MSD, Layout); + assert(MSD.Symbol->getBinding() != ELF::STB_LOCAL); + } + + uint64_t SecEnd = getStream().tell(); + SectionOffsets[SymtabSection] = std::make_pair(SecStart, SecEnd); + + ArrayRef ShndxIndexes = Writer.getShndxIndexes(); + if (ShndxIndexes.empty()) { + assert(SymtabShndxSectionIndex == 0); + return; + } + assert(SymtabShndxSectionIndex != 0); + + SecStart = getStream().tell(); + const MCSectionELF *SymtabShndxSection = + SectionTable[SymtabShndxSectionIndex - 1]; + for (uint32_t Index : ShndxIndexes) + write(Index); + SecEnd = getStream().tell(); + SectionOffsets[SymtabShndxSection] = std::make_pair(SecStart, SecEnd); +} + +MCSectionELF * +ELFObjectWriter::createRelocationSection(MCContext &Ctx, + const MCSectionELF &Sec) { + if (Relocations[&Sec].empty()) + return nullptr; + + const StringRef SectionName = Sec.getSectionName(); + std::string RelaSectionName = hasRelocationAddend() ? ".rela" : ".rel"; + RelaSectionName += SectionName; + + unsigned EntrySize; + if (hasRelocationAddend()) + EntrySize = is64Bit() ? sizeof(ELF::Elf64_Rela) : sizeof(ELF::Elf32_Rela); + else + EntrySize = is64Bit() ? sizeof(ELF::Elf64_Rel) : sizeof(ELF::Elf32_Rel); + + unsigned Flags = 0; + if (Sec.getFlags() & ELF::SHF_GROUP) + Flags = ELF::SHF_GROUP; + + MCSectionELF *RelaSection = Ctx.createELFRelSection( + RelaSectionName, hasRelocationAddend() ? ELF::SHT_RELA : ELF::SHT_REL, + Flags, EntrySize, Sec.getGroup(), &Sec); + RelaSection->setAlignment(is64Bit() ? 8 : 4); + return RelaSection; +} + +void ELFObjectWriter::writeSectionData(const MCAssembler &Asm, MCSection &Sec, + const MCAsmLayout &Layout) { + MCSectionELF &Section = static_cast(Sec); + StringRef SectionName = Section.getSectionName(); + + // Compressing debug_frame requires handling alignment fragments which is + // more work (possibly generalizing MCAssembler.cpp:writeFragment to allow + // for writing to arbitrary buffers) for little benefit. + if (!Asm.getContext().getAsmInfo()->compressDebugSections() || + !SectionName.startswith(".debug_") || SectionName == ".debug_frame") { + Asm.writeSectionData(&Section, Layout); + return; + } + + SmallVector UncompressedData; + raw_svector_ostream VecOS(UncompressedData); + raw_pwrite_stream &OldStream = getStream(); + setStream(VecOS); + Asm.writeSectionData(&Section, Layout); + setStream(OldStream); + +#if 0 + SmallVector CompressedContents; + zlib::Status Success = zlib::compress( + StringRef(UncompressedData.data(), UncompressedData.size()), + CompressedContents); + if (Success != zlib::StatusOK) { + getStream() << UncompressedData; + return; + } + + if (!prependCompressionHeader(UncompressedData.size(), CompressedContents)) { + getStream() << UncompressedData; + return; + } + Asm.getContext().renameELFSection(&Section, + (".z" + SectionName.drop_front(1)).str()); + getStream() << CompressedContents; +#endif +} + +void ELFObjectWriter::WriteSecHdrEntry(uint32_t Name, uint32_t Type, + uint64_t Flags, uint64_t Address, + uint64_t Offset, uint64_t Size, + uint32_t Link, uint32_t Info, + uint64_t Alignment, + uint64_t EntrySize) { + write32(Name); // sh_name: index into string table + write32(Type); // sh_type + WriteWord(Flags); // sh_flags + WriteWord(Address); // sh_addr + WriteWord(Offset); // sh_offset + WriteWord(Size); // sh_size + write32(Link); // sh_link + write32(Info); // sh_info + WriteWord(Alignment); // sh_addralign + WriteWord(EntrySize); // sh_entsize +} + +void ELFObjectWriter::writeRelocations(const MCAssembler &Asm, + const MCSectionELF &Sec) { + std::vector &Relocs = Relocations[&Sec]; + + // We record relocations by pushing to the end of a vector. Reverse the vector + // to get the relocations in the order they were created. + // In most cases that is not important, but it can be for special sections + // (.eh_frame) or specific relocations (TLS optimizations on SystemZ). + std::reverse(Relocs.begin(), Relocs.end()); + + // Sort the relocation entries. MIPS needs this. + TargetObjectWriter->sortRelocs(Asm, Relocs); + + for (unsigned i = 0, e = Relocs.size(); i != e; ++i) { + const ELFRelocationEntry &Entry = Relocs[e - i - 1]; + unsigned Index = Entry.Symbol ? Entry.Symbol->getIndex() : 0; + + if (is64Bit()) { + write(Entry.Offset); + if (TargetObjectWriter->isN64()) { + write(uint32_t(Index)); + + write(TargetObjectWriter->getRSsym(Entry.Type)); + write(TargetObjectWriter->getRType3(Entry.Type)); + write(TargetObjectWriter->getRType2(Entry.Type)); + write(TargetObjectWriter->getRType(Entry.Type)); + } else { + struct ELF::Elf64_Rela ERE64; + ERE64.setSymbolAndType(Index, Entry.Type); + write(ERE64.r_info); + } + if (hasRelocationAddend()) + write(Entry.Addend); + } else { + write(uint32_t(Entry.Offset)); + + struct ELF::Elf32_Rela ERE32; + ERE32.setSymbolAndType(Index, Entry.Type); + write(ERE32.r_info); + + if (hasRelocationAddend()) + write(uint32_t(Entry.Addend)); + } + } +} + +const MCSectionELF *ELFObjectWriter::createStringTable(MCContext &Ctx) { + const MCSectionELF *StrtabSection = SectionTable[StringTableIndex - 1]; + getStream() << StrTabBuilder.data(); + return StrtabSection; +} + +void ELFObjectWriter::writeSection(const SectionIndexMapTy &SectionIndexMap, + uint32_t GroupSymbolIndex, uint64_t Offset, + uint64_t Size, const MCSectionELF &Section) { + uint64_t sh_link = 0; + uint64_t sh_info = 0; + + switch(Section.getType()) { + default: + // Nothing to do. + break; + + case ELF::SHT_DYNAMIC: + llvm_unreachable("SHT_DYNAMIC in a relocatable object"); + + case ELF::SHT_REL: + case ELF::SHT_RELA: { + sh_link = SymbolTableIndex; + assert(sh_link && ".symtab not found"); + const MCSectionELF *InfoSection = Section.getAssociatedSection(); + sh_info = SectionIndexMap.lookup(InfoSection); + break; + } + + case ELF::SHT_SYMTAB: + case ELF::SHT_DYNSYM: + sh_link = StringTableIndex; + sh_info = LastLocalSymbolIndex; + break; + + case ELF::SHT_SYMTAB_SHNDX: + sh_link = SymbolTableIndex; + break; + + case ELF::SHT_GROUP: + sh_link = SymbolTableIndex; + sh_info = GroupSymbolIndex; + break; + } + + if (TargetObjectWriter->getEMachine() == ELF::EM_ARM && + Section.getType() == ELF::SHT_ARM_EXIDX) + sh_link = SectionIndexMap.lookup(Section.getAssociatedSection()); + + WriteSecHdrEntry(StrTabBuilder.getOffset(Section.getSectionName()), + Section.getType(), Section.getFlags(), 0, Offset, Size, + sh_link, sh_info, Section.getAlignment(), + Section.getEntrySize()); +} + +void ELFObjectWriter::writeSectionHeader( + const MCAsmLayout &Layout, const SectionIndexMapTy &SectionIndexMap, + const SectionOffsetsTy &SectionOffsets) { + const unsigned NumSections = SectionTable.size(); + + // Null section first. + uint64_t FirstSectionSize = + (NumSections + 1) >= ELF::SHN_LORESERVE ? NumSections + 1 : 0; + WriteSecHdrEntry(0, 0, 0, 0, 0, FirstSectionSize, 0, 0, 0, 0); + + for (const MCSectionELF *Section : SectionTable) { + uint32_t GroupSymbolIndex; + unsigned Type = Section->getType(); + if (Type != ELF::SHT_GROUP) + GroupSymbolIndex = 0; + else + GroupSymbolIndex = Section->getGroup()->getIndex(); + + const std::pair &Offsets = + SectionOffsets.find(Section)->second; + uint64_t Size; + if (Type == ELF::SHT_NOBITS) + Size = Layout.getSectionAddressSize(Section); + else + Size = Offsets.second - Offsets.first; + + writeSection(SectionIndexMap, GroupSymbolIndex, Offsets.first, Size, + *Section); + } +} + +void ELFObjectWriter::writeObject(MCAssembler &Asm, + const MCAsmLayout &Layout) +{ + MCContext &Ctx = Asm.getContext(); + MCSectionELF *StrtabSection = + Ctx.getELFSection(".strtab", ELF::SHT_STRTAB, 0); + StringTableIndex = addToSectionTable(StrtabSection); + + RevGroupMapTy RevGroupMap; + SectionIndexMapTy SectionIndexMap; + + std::map> GroupMembers; + + // ... then the sections ... + SectionOffsetsTy SectionOffsets; + std::vector Groups; + std::vector Relocations; + for (MCSection &Sec : Asm) { + MCSectionELF &Section = static_cast(Sec); + + align(Section.getAlignment()); + + // Remember the offset into the file for this section. + uint64_t SecStart = getStream().tell(); + + const MCSymbolELF *SignatureSymbol = Section.getGroup(); + writeSectionData(Asm, Section, Layout); + if (Asm.getError()) + return; + + uint64_t SecEnd = getStream().tell(); + SectionOffsets[&Section] = std::make_pair(SecStart, SecEnd); + + MCSectionELF *RelSection = createRelocationSection(Ctx, Section); + + if (SignatureSymbol) { + Asm.registerSymbol(*SignatureSymbol); + unsigned &GroupIdx = RevGroupMap[SignatureSymbol]; + if (!GroupIdx) { + MCSectionELF *Group = Ctx.createELFGroupSection(SignatureSymbol); + GroupIdx = addToSectionTable(Group); + Group->setAlignment(4); + Groups.push_back(Group); + } + std::vector &Members = + GroupMembers[SignatureSymbol]; + Members.push_back(&Section); + if (RelSection) + Members.push_back(RelSection); + } + + SectionIndexMap[&Section] = addToSectionTable(&Section); + if (RelSection) { + SectionIndexMap[RelSection] = addToSectionTable(RelSection); + Relocations.push_back(RelSection); + } + } + +return; + + for (MCSectionELF *Group : Groups) { + align(Group->getAlignment()); + + // Remember the offset into the file for this section. + uint64_t SecStart = getStream().tell(); + + const MCSymbol *SignatureSymbol = Group->getGroup(); + assert(SignatureSymbol); + write(uint32_t(ELF::GRP_COMDAT)); + for (const MCSectionELF *Member : GroupMembers[SignatureSymbol]) { + uint32_t SecIndex = SectionIndexMap.lookup(Member); + write(SecIndex); + } + + uint64_t SecEnd = getStream().tell(); + SectionOffsets[Group] = std::make_pair(SecStart, SecEnd); + } + + // Compute symbol table information. + computeSymbolTable(Asm, Layout, SectionIndexMap, RevGroupMap, SectionOffsets); + + for (MCSectionELF *RelSection : Relocations) { + align(RelSection->getAlignment()); + + // Remember the offset into the file for this section. + uint64_t SecStart = getStream().tell(); + + writeRelocations(Asm, *RelSection->getAssociatedSection()); // qq + + uint64_t SecEnd = getStream().tell(); + SectionOffsets[RelSection] = std::make_pair(SecStart, SecEnd); + } + + { + uint64_t SecStart = getStream().tell(); + const MCSectionELF *Sec = createStringTable(Ctx); + uint64_t SecEnd = getStream().tell(); + SectionOffsets[Sec] = std::make_pair(SecStart, SecEnd); + } + + uint64_t NaturalAlignment = is64Bit() ? 8 : 4; + align(NaturalAlignment); + + const uint64_t SectionHeaderOffset = getStream().tell(); + + // ... then the section header table ... + writeSectionHeader(Layout, SectionIndexMap, SectionOffsets); + + uint16_t NumSections = (SectionTable.size() + 1 >= ELF::SHN_LORESERVE) + ? (uint16_t)ELF::SHN_UNDEF + : SectionTable.size() + 1; + if (sys::IsLittleEndianHost != IsLittleEndian) + sys::swapByteOrder(NumSections); + unsigned NumSectionsOffset; + + if (is64Bit()) { + uint64_t Val = SectionHeaderOffset; + if (sys::IsLittleEndianHost != IsLittleEndian) + sys::swapByteOrder(Val); + getStream().pwrite(reinterpret_cast(&Val), sizeof(Val), + offsetof(ELF::Elf64_Ehdr, e_shoff)); + NumSectionsOffset = offsetof(ELF::Elf64_Ehdr, e_shnum); + } else { + uint32_t Val = SectionHeaderOffset; + if (sys::IsLittleEndianHost != IsLittleEndian) + sys::swapByteOrder(Val); + getStream().pwrite(reinterpret_cast(&Val), sizeof(Val), + offsetof(ELF::Elf32_Ehdr, e_shoff)); + NumSectionsOffset = offsetof(ELF::Elf32_Ehdr, e_shnum); + } + getStream().pwrite(reinterpret_cast(&NumSections), + sizeof(NumSections), NumSectionsOffset); +} + +bool ELFObjectWriter::isSymbolRefDifferenceFullyResolvedImpl( + const MCAssembler &Asm, const MCSymbol &SA, const MCFragment &FB, + bool InSet, bool IsPCRel) const { + const auto &SymA = cast(SA); + if (IsPCRel) { + assert(!InSet); + if (::isWeak(SymA)) + return false; + } + return MCObjectWriter::isSymbolRefDifferenceFullyResolvedImpl(Asm, SymA, FB, + InSet, IsPCRel); +} + +bool ELFObjectWriter::isWeak(const MCSymbol &S) const { + const auto &Sym = cast(S); + if (::isWeak(Sym)) + return true; + + // It is invalid to replace a reference to a global in a comdat + // with a reference to a local since out of comdat references + // to a local are forbidden. + // We could try to return false for more cases, like the reference + // being in the same comdat or Sym being an alias to another global, + // but it is not clear if it is worth the effort. + if (Sym.getBinding() != ELF::STB_GLOBAL) + return false; + + if (!Sym.isInSection()) + return false; + + const auto &Sec = cast(Sym.getSection()); + return Sec.getGroup(); +} + +MCObjectWriter *llvm_ks::createELFObjectWriter(MCELFObjectTargetWriter *MOTW, + raw_pwrite_stream &OS, + bool IsLittleEndian) { + return new ELFObjectWriter(MOTW, OS, IsLittleEndian); +} diff --git a/llvm/lib/MC/LLVMBuild.txt b/llvm/lib/MC/LLVMBuild.txt new file mode 100644 index 0000000..e69de29 diff --git a/llvm/lib/MC/MCAsmBackend.cpp b/llvm/lib/MC/MCAsmBackend.cpp new file mode 100644 index 0000000..d6348c0 --- /dev/null +++ b/llvm/lib/MC/MCAsmBackend.cpp @@ -0,0 +1,53 @@ +//===-- MCAsmBackend.cpp - Target MC Assembly Backend ----------------------==// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCAsmBackend.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/MC/MCFixupKindInfo.h" +using namespace llvm_ks; + +MCAsmBackend::MCAsmBackend() : HasDataInCodeSupport(false) {} + +MCAsmBackend::~MCAsmBackend() {} + +Optional MCAsmBackend::getFixupKind(StringRef Name) const { + return None; +} + +const MCFixupKindInfo &MCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const { + static const MCFixupKindInfo Builtins[] = { + {"FK_Data_1", 0, 8, 0}, + {"FK_Data_2", 0, 16, 0}, + {"FK_Data_4", 0, 32, 0}, + {"FK_Data_8", 0, 64, 0}, + {"FK_PCRel_1", 0, 8, MCFixupKindInfo::FKF_IsPCRel}, + {"FK_PCRel_2", 0, 16, MCFixupKindInfo::FKF_IsPCRel}, + {"FK_PCRel_4", 0, 32, MCFixupKindInfo::FKF_IsPCRel}, + {"FK_PCRel_8", 0, 64, MCFixupKindInfo::FKF_IsPCRel}, + {"FK_GPRel_1", 0, 8, 0}, + {"FK_GPRel_2", 0, 16, 0}, + {"FK_GPRel_4", 0, 32, 0}, + {"FK_GPRel_8", 0, 64, 0}, + {"FK_SecRel_1", 0, 8, 0}, + {"FK_SecRel_2", 0, 16, 0}, + {"FK_SecRel_4", 0, 32, 0}, + {"FK_SecRel_8", 0, 64, 0}}; + + assert((size_t)Kind <= array_lengthof(Builtins) && "Unknown fixup kind"); + return Builtins[Kind]; +} + +bool MCAsmBackend::fixupNeedsRelaxationAdvanced( + const MCFixup &Fixup, bool Resolved, uint64_t Value, + const MCRelaxableFragment *DF, const MCAsmLayout &Layout) const { + if (!Resolved) + return true; + unsigned KsError; + return fixupNeedsRelaxation(Fixup, Value, DF, Layout, KsError); +} diff --git a/llvm/lib/MC/MCAsmInfo.cpp b/llvm/lib/MC/MCAsmInfo.cpp new file mode 100644 index 0000000..0939eb8 --- /dev/null +++ b/llvm/lib/MC/MCAsmInfo.cpp @@ -0,0 +1,165 @@ +//===-- MCAsmInfo.cpp - Asm Info -------------------------------------------==// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines target asm properties related what form asm statements +// should take. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCStreamer.h" +#include "llvm/Support/DataTypes.h" +#include "llvm/Support/Dwarf.h" +#include +#include +using namespace llvm_ks; + +MCAsmInfo::MCAsmInfo() { + PointerSize = 4; + CalleeSaveStackSlotSize = 4; + + IsLittleEndian = true; + StackGrowsUp = false; + HasSubsectionsViaSymbols = false; + HasMachoZeroFillDirective = false; + HasMachoTBSSDirective = false; + HasStaticCtorDtorReferenceInStaticMode = false; + MaxInstLength = 4; + MinInstAlignment = 1; + DollarIsPC = false; + SeparatorString = ";"; + CommentString = "#"; + LabelSuffix = ":"; + UseAssignmentForEHBegin = false; + NeedsLocalForSize = false; + PrivateGlobalPrefix = "L"; + PrivateLabelPrefix = PrivateGlobalPrefix; + LinkerPrivateGlobalPrefix = ""; + InlineAsmStart = "APP"; + InlineAsmEnd = "NO_APP"; + Code16Directive = ".code16"; + Code32Directive = ".code32"; + Code64Directive = ".code64"; + AssemblerDialect = 0; + AllowAtInName = false; + SupportsQuotedNames = true; + UseDataRegionDirectives = false; + ZeroDirective = "\t.zero\t"; + AsciiDirective = "\t.ascii\t"; + AscizDirective = "\t.asciz\t"; + Data8bitsDirective = "\t.byte\t"; + Data16bitsDirective = "\t.short\t"; + Data32bitsDirective = "\t.long\t"; + Data64bitsDirective = "\t.quad\t"; + SunStyleELFSectionSwitchSyntax = false; + UsesELFSectionDirectiveForBSS = false; + AlignmentIsInBytes = true; + TextAlignFillValue = 0; + GPRel64Directive = nullptr; + GPRel32Directive = nullptr; + GlobalDirective = "\t.globl\t"; + SetDirectiveSuppressesReloc = false; + HasAggressiveSymbolFolding = true; + COMMDirectiveAlignmentIsInBytes = true; + LCOMMDirectiveAlignmentType = LCOMM::NoAlignment; + HasFunctionAlignment = true; + HasDotTypeDotSizeDirective = true; + HasSingleParameterDotFile = true; + HasIdentDirective = false; + HasNoDeadStrip = false; + WeakDirective = "\t.weak\t"; + WeakRefDirective = nullptr; + HasWeakDefDirective = false; + HasWeakDefCanBeHiddenDirective = false; + HasLinkOnceDirective = false; + HiddenVisibilityAttr = MCSA_Hidden; + HiddenDeclarationVisibilityAttr = MCSA_Hidden; + ProtectedVisibilityAttr = MCSA_Protected; + SupportsDebugInformation = false; + ExceptionsType = ExceptionHandling::None; + WinEHEncodingType = WinEH::EncodingType::Invalid; + DwarfUsesRelocationsAcrossSections = true; + DwarfFDESymbolsUseAbsDiff = false; + DwarfRegNumForCFI = false; + NeedsDwarfSectionOffsetDirective = false; + UseParensForSymbolVariant = false; + UseLogicalShr = true; + + // FIXME: Clang's logic should be synced with the logic used to initialize + // this member and the two implementations should be merged. + // For reference: + // - Solaris always enables the integrated assembler by default + // - SparcELFMCAsmInfo and X86ELFMCAsmInfo are handling this case + // - Windows always enables the integrated assembler by default + // - MCAsmInfoCOFF is handling this case, should it be MCAsmInfoMicrosoft? + // - MachO targets always enables the integrated assembler by default + // - MCAsmInfoDarwin is handling this case + // - Generic_GCC toolchains enable the integrated assembler on a per + // architecture basis. + // - The target subclasses for AArch64, ARM, and X86 handle these cases + UseIntegratedAssembler = false; + + CompressDebugSections = false; +} + +MCAsmInfo::~MCAsmInfo() { +} + +bool MCAsmInfo::isSectionAtomizableBySymbols(const MCSection &Section) const { + return false; +} + +const MCExpr * +MCAsmInfo::getExprForPersonalitySymbol(const MCSymbol *Sym, + unsigned Encoding, + MCStreamer &Streamer) const { + return getExprForFDESymbol(Sym, Encoding, Streamer); +} + +const MCExpr * +MCAsmInfo::getExprForFDESymbol(const MCSymbol *Sym, + unsigned Encoding, + MCStreamer &Streamer) const { + if (!(Encoding & dwarf::DW_EH_PE_pcrel)) + return MCSymbolRefExpr::create(Sym, Streamer.getContext()); + + MCContext &Context = Streamer.getContext(); + const MCExpr *Res = MCSymbolRefExpr::create(Sym, Context); + MCSymbol *PCSym = Context.createTempSymbol(); + Streamer.EmitLabel(PCSym); + const MCExpr *PC = MCSymbolRefExpr::create(PCSym, Context); + return MCBinaryExpr::createSub(Res, PC, Context); +} + +static bool isAcceptableChar(char C) { + return (C >= 'a' && C <= 'z') || (C >= 'A' && C <= 'Z') || + (C >= '0' && C <= '9') || C == '_' || C == '$' || C == '.' || C == '@'; +} + +bool MCAsmInfo::isValidUnquotedName(StringRef Name) const { + if (Name.empty()) + return false; + + // If any of the characters in the string is an unacceptable character, force + // quotes. + for (char C : Name) { + if (!isAcceptableChar(C)) + return false; + } + + return true; +} + +bool MCAsmInfo::shouldOmitSectionDirective(StringRef SectionName) const { + // FIXME: Does .section .bss/.data/.text work everywhere?? + return SectionName == ".text" || SectionName == ".data" || + (SectionName == ".bss" && !usesELFSectionDirectiveForBSS()); +} diff --git a/llvm/lib/MC/MCAsmInfoCOFF.cpp b/llvm/lib/MC/MCAsmInfoCOFF.cpp new file mode 100644 index 0000000..443a763 --- /dev/null +++ b/llvm/lib/MC/MCAsmInfoCOFF.cpp @@ -0,0 +1,47 @@ +//===-- MCAsmInfoCOFF.cpp - COFF asm properties -----------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines target asm properties related what form asm statements +// should take in general on COFF-based targets +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCAsmInfoCOFF.h" +using namespace llvm_ks; + +MCAsmInfoCOFF::MCAsmInfoCOFF() { + // MingW 4.5 and later support .comm with log2 alignment, but .lcomm uses byte + // alignment. + COMMDirectiveAlignmentIsInBytes = false; + LCOMMDirectiveAlignmentType = LCOMM::ByteAlignment; + HasDotTypeDotSizeDirective = false; + HasSingleParameterDotFile = false; + WeakRefDirective = "\t.weak\t"; + HasLinkOnceDirective = true; + + // Doesn't support visibility: + HiddenVisibilityAttr = HiddenDeclarationVisibilityAttr = MCSA_Invalid; + ProtectedVisibilityAttr = MCSA_Invalid; + + // Set up DWARF directives + SupportsDebugInformation = true; + NeedsDwarfSectionOffsetDirective = true; + + UseIntegratedAssembler = true; + + // At least MSVC inline-asm does AShr. + UseLogicalShr = false; +} + +MCAsmInfoMicrosoft::MCAsmInfoMicrosoft() { +} + +MCAsmInfoGNUCOFF::MCAsmInfoGNUCOFF() { + +} diff --git a/llvm/lib/MC/MCAsmInfoDarwin.cpp b/llvm/lib/MC/MCAsmInfoDarwin.cpp new file mode 100644 index 0000000..61ab1c1 --- /dev/null +++ b/llvm/lib/MC/MCAsmInfoDarwin.cpp @@ -0,0 +1,96 @@ +//===-- MCAsmInfoDarwin.cpp - Darwin asm properties -------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines target asm properties related what form asm statements +// should take in general on Darwin-based targets +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCAsmInfoDarwin.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCSectionMachO.h" +using namespace llvm_ks; + +bool MCAsmInfoDarwin::isSectionAtomizableBySymbols( + const MCSection &Section) const { + const MCSectionMachO &SMO = static_cast(Section); + + // Sections holding 1 byte strings are atomized based on the data they + // contain. + // Sections holding 2 byte strings require symbols in order to be atomized. + // There is no dedicated section for 4 byte strings. + if (SMO.getType() == MachO::S_CSTRING_LITERALS) + return false; + + if (SMO.getSegmentName() == "__DATA" && SMO.getSectionName() == "__cfstring") + return false; + + if (SMO.getSegmentName() == "__DATA" && + SMO.getSectionName() == "__objc_classrefs") + return false; + + switch (SMO.getType()) { + default: + return true; + + // These sections are atomized at the element boundaries without using + // symbols. + case MachO::S_4BYTE_LITERALS: + case MachO::S_8BYTE_LITERALS: + case MachO::S_16BYTE_LITERALS: + case MachO::S_LITERAL_POINTERS: + case MachO::S_NON_LAZY_SYMBOL_POINTERS: + case MachO::S_LAZY_SYMBOL_POINTERS: + case MachO::S_MOD_INIT_FUNC_POINTERS: + case MachO::S_MOD_TERM_FUNC_POINTERS: + case MachO::S_INTERPOSING: + return false; + } +} + +MCAsmInfoDarwin::MCAsmInfoDarwin() { + // Common settings for all Darwin targets. + // Syntax: + LinkerPrivateGlobalPrefix = "l"; + HasSingleParameterDotFile = false; + HasSubsectionsViaSymbols = true; + + AlignmentIsInBytes = false; + COMMDirectiveAlignmentIsInBytes = false; + LCOMMDirectiveAlignmentType = LCOMM::Log2Alignment; + InlineAsmStart = " InlineAsm Start"; + InlineAsmEnd = " InlineAsm End"; + + // Directives: + HasWeakDefDirective = true; + HasWeakDefCanBeHiddenDirective = true; + WeakRefDirective = "\t.weak_reference "; + ZeroDirective = "\t.space\t"; // ".space N" emits N zeros. + HasMachoZeroFillDirective = true; // Uses .zerofill + HasMachoTBSSDirective = true; // Uses .tbss + HasStaticCtorDtorReferenceInStaticMode = true; + + // FIXME: Change this once MC is the system assembler. + HasAggressiveSymbolFolding = false; + + HiddenVisibilityAttr = MCSA_PrivateExtern; + HiddenDeclarationVisibilityAttr = MCSA_Invalid; + + // Doesn't support protected visibility. + ProtectedVisibilityAttr = MCSA_Invalid; + + HasDotTypeDotSizeDirective = false; + HasNoDeadStrip = true; + + DwarfUsesRelocationsAcrossSections = false; + + UseIntegratedAssembler = true; + SetDirectiveSuppressesReloc = true; +} diff --git a/llvm/lib/MC/MCAsmInfoELF.cpp b/llvm/lib/MC/MCAsmInfoELF.cpp new file mode 100644 index 0000000..e4f9e36 --- /dev/null +++ b/llvm/lib/MC/MCAsmInfoELF.cpp @@ -0,0 +1,33 @@ +//===-- MCAsmInfoELF.cpp - ELF asm properties -------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines target asm properties related what form asm statements +// should take in general on ELF-based targets +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCAsmInfoELF.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCSectionELF.h" +#include "llvm/Support/ELF.h" +using namespace llvm_ks; + +MCSection *MCAsmInfoELF::getNonexecutableStackSection(MCContext &Ctx) const { + if (!UsesNonexecutableStackSection) + return nullptr; + return Ctx.getELFSection(".note.GNU-stack", ELF::SHT_PROGBITS, 0); +} + +MCAsmInfoELF::MCAsmInfoELF() { + HasIdentDirective = true; + WeakRefDirective = "\t.weak\t"; + PrivateGlobalPrefix = ".L"; + PrivateLabelPrefix = ".L"; + UsesNonexecutableStackSection = true; +} diff --git a/llvm/lib/MC/MCAssembler.cpp b/llvm/lib/MC/MCAssembler.cpp new file mode 100644 index 0000000..2e656e7 --- /dev/null +++ b/llvm/lib/MC/MCAssembler.cpp @@ -0,0 +1,936 @@ +//===- lib/MC/MCAssembler.cpp - Assembler Backend Implementation ----------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCAssembler.h" +#include "llvm/ADT/StringExtras.h" +#include "llvm/ADT/Twine.h" +#include "llvm/MC/MCAsmBackend.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCAsmLayout.h" +#include "llvm/MC/MCCodeEmitter.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCDwarf.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCFixupKindInfo.h" +#include "llvm/MC/MCObjectWriter.h" +#include "llvm/MC/MCSection.h" +#include "llvm/MC/MCSectionELF.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/MC/MCValue.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/LEB128.h" +#include "llvm/Support/TargetRegistry.h" +#include "llvm/Support/raw_ostream.h" +#include + +#include "keystone/keystone.h" + +using namespace llvm_ks; + +#define DEBUG_TYPE "assembler" + +// FIXME FIXME FIXME: There are number of places in this file where we convert +// what is a 64-bit assembler value used for computation into a value in the +// object file, which may truncate it. We should detect that truncation where +// invalid and report errors back. + +/* *** */ + +MCAssembler::MCAssembler(MCContext &Context_, MCAsmBackend &Backend_, + MCCodeEmitter &Emitter_, MCObjectWriter &Writer_) + : Context(Context_), Backend(Backend_), Emitter(Emitter_), Writer(Writer_), + BundleAlignSize(0), RelaxAll(false), SubsectionsViaSymbols(false), + IncrementalLinkerCompatible(false), ELFHeaderEFlags(0) { + VersionMinInfo.Major = 0; // Major version == 0 for "none specified" +} + +MCAssembler::~MCAssembler() { +} + +void MCAssembler::reset() { + Sections.clear(); + Symbols.clear(); + IndirectSymbols.clear(); + DataRegions.clear(); + LinkerOptions.clear(); + FileNames.clear(); + ThumbFuncs.clear(); + BundleAlignSize = 0; + RelaxAll = false; + SubsectionsViaSymbols = false; + IncrementalLinkerCompatible = false; + ELFHeaderEFlags = 0; + LOHContainer.reset(); + VersionMinInfo.Major = 0; + + // reset objects owned by us + getBackend().reset(); + getEmitter().reset(); + getWriter().reset(); + getLOHContainer().reset(); +} + +bool MCAssembler::registerSection(MCSection &Section) { + if (Section.isRegistered()) + return false; + Sections.push_back(&Section); + Section.setIsRegistered(true); + return true; +} + +bool MCAssembler::isThumbFunc(const MCSymbol *Symbol) const { + if (ThumbFuncs.count(Symbol)) + return true; + + if (!Symbol->isVariable()) + return false; + + // FIXME: It looks like gas supports some cases of the form "foo + 2". It + // is not clear if that is a bug or a feature. + const MCExpr *Expr = Symbol->getVariableValue(); + const MCSymbolRefExpr *Ref = dyn_cast(Expr); + if (!Ref) + return false; + + if (Ref->getKind() != MCSymbolRefExpr::VK_None) + return false; + + const MCSymbol &Sym = Ref->getSymbol(); + if (!isThumbFunc(&Sym)) + return false; + + ThumbFuncs.insert(Symbol); // Cache it. + return true; +} + +bool MCAssembler::isSymbolLinkerVisible(const MCSymbol &Symbol) const { + // Non-temporary labels should always be visible to the linker. + if (!Symbol.isTemporary()) + return true; + + // Absolute temporary labels are never visible. + if (!Symbol.isInSection()) + return false; + + if (Symbol.isUsedInReloc()) + return true; + + return false; +} + +const MCSymbol *MCAssembler::getAtom(const MCSymbol &S) const { + // Linker visible symbols define atoms. + if (isSymbolLinkerVisible(S)) + return &S; + + // Absolute and undefined symbols have no defining atom. + if (!S.isInSection()) + return nullptr; + + // Non-linker visible symbols in sections which can't be atomized have no + // defining atom. + if (!getContext().getAsmInfo()->isSectionAtomizableBySymbols( + *S.getFragment()->getParent())) + return nullptr; + + // Otherwise, return the atom for the containing fragment. + return S.getFragment()->getAtom(); +} + +bool MCAssembler::evaluateFixup(const MCAsmLayout &Layout, + const MCFixup &Fixup, const MCFragment *DF, + MCValue &Target, uint64_t &Value, unsigned int &KsError) const +{ + KsError = 0; + + // FIXME: This code has some duplication with recordRelocation. We should + // probably merge the two into a single callback that tries to evaluate a + // fixup and records a relocation if one is needed. + const MCExpr *Expr = Fixup.getValue(); + if (!Expr->evaluateAsRelocatable(Target, &Layout, &Fixup)) { + // getContext().reportError(Fixup.getLoc(), "expected relocatable expression"); + // Claim to have completely evaluated the fixup, to prevent any further + // processing from being done. + // return true; + Value = 0; + KsError = KS_ERR_ASM_INVALIDOPERAND; + return false; + } + + bool IsPCRel = Backend.getFixupKindInfo( + Fixup.getKind()).Flags & MCFixupKindInfo::FKF_IsPCRel; + + bool IsResolved; + if (IsPCRel) { + if (Target.getSymB()) { + IsResolved = false; + } else if (!Target.getSymA()) { + if (getBackend().getArch() == KS_ARCH_X86) + IsResolved = true; + else + IsResolved = false; + } else { + const MCSymbolRefExpr *A = Target.getSymA(); + const MCSymbol &SA = A->getSymbol(); + if (A->getKind() != MCSymbolRefExpr::VK_None || SA.isUndefined()) { + IsResolved = false; + } else { + IsResolved = getWriter().isSymbolRefDifferenceFullyResolvedImpl( + *this, SA, *DF, false, true); + } + } + } else { + IsResolved = Target.isAbsolute(); + } + + Value = Target.getConstant(); + + if (const MCSymbolRefExpr *A = Target.getSymA()) { + const MCSymbol &Sym = A->getSymbol(); + bool valid; + if (Sym.isDefined()) { + Value += Layout.getSymbolOffset(Sym, valid); + if (!valid) { + KsError = KS_ERR_ASM_FIXUP_INVALID; + return false; + } + } else { + // a missing symbol. is there any resolver registered? + if (KsSymResolver) { + uint64_t imm; + ks_sym_resolver resolver = (ks_sym_resolver)KsSymResolver; + if (resolver(Sym.getName().str().c_str(), &imm)) { + // resolver handled this symbol + Value = imm; + IsResolved = true; + } else { + // resolver did not handle this symbol + KsError = KS_ERR_ASM_SYMBOL_MISSING; + return false; + } + } else { + // no resolver registered + KsError = KS_ERR_ASM_SYMBOL_MISSING; + return false; + } + } + } + + if (const MCSymbolRefExpr *B = Target.getSymB()) { + const MCSymbol &Sym = B->getSymbol(); + bool valid; + if (Sym.isDefined()) { + Value -= Layout.getSymbolOffset(Sym, valid); + if (!valid) { + KsError = KS_ERR_ASM_FIXUP_INVALID; + return false; + } + } + } + + bool ShouldAlignPC = Backend.getFixupKindInfo(Fixup.getKind()).Flags & + MCFixupKindInfo::FKF_IsAlignedDownTo32Bits; + assert((ShouldAlignPC ? IsPCRel : true) && + "FKF_IsAlignedDownTo32Bits is only allowed on PC-relative fixups!"); + + if (IsPCRel) { + bool valid; + uint64_t Offset = Layout.getFragmentOffset(DF, valid) + Fixup.getOffset(); + if (!valid) { + KsError = KS_ERR_ASM_FRAGMENT_INVALID; + return false; + } + + // A number of ARM fixups in Thumb mode require that the effective PC + // address be determined as the 32-bit aligned version of the actual offset. + if (ShouldAlignPC) Offset &= ~0x3; + Value -= Offset; + } + + // Let the backend adjust the fixup value if necessary, including whether + // we need a relocation. + Backend.processFixupValue(*this, Layout, Fixup, DF, Target, Value, + IsResolved); + + return IsResolved; +} + +uint64_t MCAssembler::computeFragmentSize(const MCAsmLayout &Layout, + const MCFragment &F, bool &valid) const +{ + valid = true; + switch (F.getKind()) { + case MCFragment::FT_Data: + return cast(F).getContents().size(); + case MCFragment::FT_Relaxable: + return cast(F).getContents().size(); + case MCFragment::FT_CompactEncodedInst: + return cast(F).getContents().size(); + case MCFragment::FT_Fill: + return cast(F).getSize(); + + case MCFragment::FT_LEB: + return cast(F).getContents().size(); + + case MCFragment::FT_SafeSEH: + return 4; + + case MCFragment::FT_Align: { + const MCAlignFragment &AF = cast(F); + unsigned Offset = Layout.getFragmentOffset(&AF, valid); + if (!valid) { + return 0; + } + unsigned Size = OffsetToAlignment(Offset, AF.getAlignment()); + // If we are padding with nops, force the padding to be larger than the + // minimum nop size. + if (Size > 0 && AF.hasEmitNops()) { + while (Size % getBackend().getMinimumNopSize()) + Size += AF.getAlignment(); + } + if (Size > AF.getMaxBytesToEmit()) + return 0; + return Size; + } + + case MCFragment::FT_Org: { + const MCOrgFragment &OF = cast(F); + MCValue Value; + if (!OF.getOffset().evaluateAsValue(Value, Layout)) { + //report_fatal_error("expected assembly-time absolute expression"); + valid = false; + return 0; + } + + // FIXME: We need a way to communicate this error. + uint64_t FragmentOffset = Layout.getFragmentOffset(&OF, valid); + if (!valid) { + return 0; + } + int64_t TargetLocation = Value.getConstant(); + if (const MCSymbolRefExpr *A = Value.getSymA()) { + uint64_t Val; + if (!Layout.getSymbolOffset(A->getSymbol(), Val, valid)) { + //report_fatal_error("expected absolute expression"); + valid = false; + return 0; + } + TargetLocation += Val; + } + int64_t Size = TargetLocation - FragmentOffset; + if (Size < 0 || Size >= 0x40000000) { + //report_fatal_error("invalid .org offset '" + Twine(TargetLocation) + + // "' (at offset '" + Twine(FragmentOffset) + "')"); + valid = false; + return 0; + } + return Size; + } + + case MCFragment::FT_Dwarf: + return cast(F).getContents().size(); + case MCFragment::FT_DwarfFrame: + return cast(F).getContents().size(); + case MCFragment::FT_Dummy: + llvm_unreachable("Should not have been added"); + } + + llvm_unreachable("invalid fragment kind"); +} + +bool MCAsmLayout::layoutFragment(MCFragment *F) +{ + MCFragment *Prev = F->getPrevNode(); + + // We should never try to recompute something which is valid. + //assert(!isFragmentValid(F) && "Attempt to recompute a valid fragment!"); + if (isFragmentValid(F)) + return true; + + // We should never try to compute the fragment layout if its predecessor + // isn't valid. + //assert((!Prev || isFragmentValid(Prev)) && + // "Attempt to compute fragment before its predecessor!"); + if (Prev && !isFragmentValid(Prev)) + return true; + + bool valid = true; + // Compute fragment offset and size. + if (Prev) + F->Offset = Prev->Offset + getAssembler().computeFragmentSize(*this, *Prev, valid); + else + F->Offset = getAssembler().getContext().getBaseAddress(); + if (!valid) { + return false; + } + LastValidFragment[F->getParent()] = F; + + // If bundling is enabled and this fragment has instructions in it, it has to + // obey the bundling restrictions. With padding, we'll have: + // + // + // BundlePadding + // ||| + // ------------------------------------- + // Prev |##########| F | + // ------------------------------------- + // ^ + // | + // F->Offset + // + // The fragment's offset will point to after the padding, and its computed + // size won't include the padding. + // + // When the -mc-relax-all flag is used, we optimize bundling by writting the + // padding directly into fragments when the instructions are emitted inside + // the streamer. When the fragment is larger than the bundle size, we need to + // ensure that it's bundle aligned. This means that if we end up with + // multiple fragments, we must emit bundle padding between fragments. + // + // ".align N" is an example of a directive that introduces multiple + // fragments. We could add a special case to handle ".align N" by emitting + // within-fragment padding (which would produce less padding when N is less + // than the bundle size), but for now we don't. + // + if (Assembler.isBundlingEnabled() && F->hasInstructions()) { + assert(isa(F) && + "Only MCEncodedFragment implementations have instructions"); + if (!isa(F)) + return true; + + bool valid; + uint64_t FSize = Assembler.computeFragmentSize(*this, *F, valid); + if (!valid) + return true; + + if (!Assembler.getRelaxAll() && FSize > Assembler.getBundleAlignSize()) + //report_fatal_error("Fragment can't be larger than a bundle size"); + return true; + + uint64_t RequiredBundlePadding = computeBundlePadding(Assembler, F, + F->Offset, FSize); + if (RequiredBundlePadding > UINT8_MAX) + //report_fatal_error("Padding cannot exceed 255 bytes"); + return true; + + F->setBundlePadding(static_cast(RequiredBundlePadding)); + F->Offset += RequiredBundlePadding; + } + + return false; +} + +void MCAssembler::registerSymbol(const MCSymbol &Symbol, bool *Created) { + bool New = !Symbol.isRegistered(); + if (Created) + *Created = New; + if (New) { + Symbol.setIsRegistered(true); + Symbols.push_back(&Symbol); + } +} + +void MCAssembler::writeFragmentPadding(const MCFragment &F, uint64_t FSize, + MCObjectWriter *OW) const { + // Should NOP padding be written out before this fragment? + unsigned BundlePadding = F.getBundlePadding(); + if (BundlePadding > 0) { + assert(isBundlingEnabled() && + "Writing bundle padding with disabled bundling"); + assert(F.hasInstructions() && + "Writing bundle padding for a fragment without instructions"); + + unsigned TotalLength = BundlePadding + static_cast(FSize); + if (F.alignToBundleEnd() && TotalLength > getBundleAlignSize()) { + // If the padding itself crosses a bundle boundary, it must be emitted + // in 2 pieces, since even nop instructions must not cross boundaries. + // v--------------v <- BundleAlignSize + // v---------v <- BundlePadding + // ---------------------------- + // | Prev |####|####| F | + // ---------------------------- + // ^-------------------^ <- TotalLength + unsigned DistanceToBoundary = TotalLength - getBundleAlignSize(); + if (!getBackend().writeNopData(DistanceToBoundary, OW)) + report_fatal_error("unable to write NOP sequence of " + + Twine(DistanceToBoundary) + " bytes"); + BundlePadding -= DistanceToBoundary; + } + if (!getBackend().writeNopData(BundlePadding, OW)) + report_fatal_error("unable to write NOP sequence of " + + Twine(BundlePadding) + " bytes"); + } +} + +/// \brief Write the fragment \p F to the output file. +static void writeFragment(const MCAssembler &Asm, const MCAsmLayout &Layout, + const MCFragment &F) +{ + if (Asm.getError()) + return; + + MCObjectWriter *OW = &Asm.getWriter(); + + bool valid; + // FIXME: Embed in fragments instead? + uint64_t FragmentSize = Asm.computeFragmentSize(Layout, F, valid); + if (!valid) { + Asm.setError(KS_ERR_ASM_FRAGMENT_INVALID); + return; + } + + Asm.writeFragmentPadding(F, FragmentSize, OW); + + // This variable (and its dummy usage) is to participate in the assert at + // the end of the function. + uint64_t Start = OW->getStream().tell(); + (void) Start; + + switch (F.getKind()) { + case MCFragment::FT_Align: { + const MCAlignFragment &AF = cast(F); + assert(AF.getValueSize() && "Invalid virtual align in concrete fragment!"); + + uint64_t Count = FragmentSize / AF.getValueSize(); + + // FIXME: This error shouldn't actually occur (the front end should emit + // multiple .align directives to enforce the semantics it wants), but is + // severe enough that we want to report it. How to handle this? + if (Count * AF.getValueSize() != FragmentSize) + report_fatal_error("undefined .align directive, value size '" + + Twine(AF.getValueSize()) + + "' is not a divisor of padding size '" + + Twine(FragmentSize) + "'"); + + // See if we are aligning with nops, and if so do that first to try to fill + // the Count bytes. Then if that did not fill any bytes or there are any + // bytes left to fill use the Value and ValueSize to fill the rest. + // If we are aligning with nops, ask that target to emit the right data. + if (AF.hasEmitNops()) { + if (!Asm.getBackend().writeNopData(Count, OW)) + report_fatal_error("unable to write nop sequence of " + + Twine(Count) + " bytes"); + break; + } + + // Otherwise, write out in multiples of the value size. + for (uint64_t i = 0; i != Count; ++i) { + switch (AF.getValueSize()) { + default: llvm_unreachable("Invalid size!"); + case 1: OW->write8 (uint8_t (AF.getValue())); break; + case 2: OW->write16(uint16_t(AF.getValue())); break; + case 4: OW->write32(uint32_t(AF.getValue())); break; + case 8: OW->write64(uint64_t(AF.getValue())); break; + } + } + break; + } + + case MCFragment::FT_Data: + OW->writeBytes(cast(F).getContents()); + break; + + case MCFragment::FT_Relaxable: + OW->writeBytes(cast(F).getContents()); + break; + + case MCFragment::FT_CompactEncodedInst: + OW->writeBytes(cast(F).getContents()); + break; + + case MCFragment::FT_Fill: { + const MCFillFragment &FF = cast(F); + uint8_t V = FF.getValue(); + const unsigned MaxChunkSize = 16; + char Data[MaxChunkSize]; + memcpy(Data, &V, 1); + for (unsigned I = 1; I < MaxChunkSize; ++I) + Data[I] = Data[0]; + + uint64_t Size = FF.getSize(); + for (unsigned ChunkSize = MaxChunkSize; ChunkSize; ChunkSize /= 2) { + StringRef Ref(Data, ChunkSize); + for (uint64_t I = 0, E = Size / ChunkSize; I != E; ++I) + OW->writeBytes(Ref); + Size = Size % ChunkSize; + } + break; + } + + case MCFragment::FT_LEB: { + const MCLEBFragment &LF = cast(F); + OW->writeBytes(LF.getContents()); + break; + } + + case MCFragment::FT_SafeSEH: { + const MCSafeSEHFragment &SF = cast(F); + OW->write32(SF.getSymbol()->getIndex()); + break; + } + + case MCFragment::FT_Org: { + const MCOrgFragment &OF = cast(F); + + for (uint64_t i = 0, e = FragmentSize; i != e; ++i) + OW->write8(uint8_t(OF.getValue())); + + break; + } + + case MCFragment::FT_Dwarf: { + const MCDwarfLineAddrFragment &OF = cast(F); + OW->writeBytes(OF.getContents()); + break; + } + case MCFragment::FT_DwarfFrame: { + const MCDwarfCallFrameFragment &CF = cast(F); + OW->writeBytes(CF.getContents()); + break; + } + case MCFragment::FT_Dummy: + llvm_unreachable("Should not have been added"); + } + + assert(OW->getStream().tell() - Start == FragmentSize && + "The stream should advance by fragment size"); +} + +void MCAssembler::writeSectionData(const MCSection *Sec, + const MCAsmLayout &Layout) const +{ + // Ignore virtual sections. + if (Sec->isVirtualSection()) { + assert(Layout.getSectionFileSize(Sec) == 0 && "Invalid size for section!"); + + // Check that contents are only things legal inside a virtual section. + for (const MCFragment &F : *Sec) { + switch (F.getKind()) { + default: llvm_unreachable("Invalid fragment in virtual section!"); + case MCFragment::FT_Data: { + // Check that we aren't trying to write a non-zero contents (or fixups) + // into a virtual section. This is to support clients which use standard + // directives to fill the contents of virtual sections. + const MCDataFragment &DF = cast(F); + assert(DF.fixup_begin() == DF.fixup_end() && + "Cannot have fixups in virtual section!"); + for (unsigned i = 0, e = DF.getContents().size(); i != e; ++i) + if (DF.getContents()[i]) { + if (auto *ELFSec = dyn_cast(Sec)) + report_fatal_error("non-zero initializer found in section '" + + ELFSec->getSectionName() + "'"); + else + report_fatal_error("non-zero initializer found in virtual section"); + } + break; + } + case MCFragment::FT_Align: + // Check that we aren't trying to write a non-zero value into a virtual + // section. + assert((cast(F).getValueSize() == 0 || + cast(F).getValue() == 0) && + "Invalid align in virtual section!"); + break; + case MCFragment::FT_Fill: + assert((cast(F).getValue() == 0) && + "Invalid fill in virtual section!"); + break; + } + } + + return; + } + + uint64_t Start = getWriter().getStream().tell(); + (void)Start; + + setError(0); + for (const MCFragment &F : *Sec) + writeFragment(*this, Layout, F); + + //assert(getWriter().getStream().tell() - Start == + // Layout.getSectionAddressSize(Sec)); +} + +std::pair MCAssembler::handleFixup(const MCAsmLayout &Layout, + MCFragment &F, + const MCFixup &Fixup, unsigned int &KsError) { + // Evaluate the fixup. + MCValue Target; + uint64_t FixedValue; + bool IsPCRel = Backend.getFixupKindInfo(Fixup.getKind()).Flags & + MCFixupKindInfo::FKF_IsPCRel; + if (!evaluateFixup(Layout, Fixup, &F, Target, FixedValue, KsError)) { + if (KsError) { + // return a dummy value + return std::make_pair(0, false); + } + // The fixup was unresolved, we need a relocation. Inform the object + // writer of the relocation, and give it an opportunity to adjust the + // fixup value if need be. + if (const MCSymbolRefExpr *RefB = Target.getSymB()) { + if (RefB->getKind() != MCSymbolRefExpr::VK_None) { + KsError = KS_ERR_ASM_FIXUP_INVALID; + // return a dummy value + return std::make_pair(0, false); + } + } + getWriter().recordRelocation(*this, Layout, &F, Fixup, Target, IsPCRel, + FixedValue); + } + + return std::make_pair(FixedValue, IsPCRel); +} + +void MCAssembler::layout(MCAsmLayout &Layout, unsigned int &KsError) +{ + DEBUG_WITH_TYPE("mc-dump", { + llvm_ks::errs() << "assembler backend - pre-layout\n--\n"; + dump(); }); + + // Create dummy fragments and assign section ordinals. + unsigned SectionIndex = 0; + for (MCSection &Sec : *this) { + // Create dummy fragments to eliminate any empty sections, this simplifies + // layout. + if (Sec.getFragmentList().empty()) + new MCDataFragment(&Sec); + + Sec.setOrdinal(SectionIndex++); + } + + // Assign layout order indices to sections and fragments. + for (unsigned i = 0, e = Layout.getSectionOrder().size(); i != e; ++i) { + MCSection *Sec = Layout.getSectionOrder()[i]; + Sec->setLayoutOrder(i); + + unsigned FragmentIndex = 0; + for (MCFragment &Frag : *Sec) + Frag.setLayoutOrder(FragmentIndex++); + } + + // Layout until everything fits. + while (layoutOnce(Layout)) + continue; + + DEBUG_WITH_TYPE("mc-dump", { + llvm_ks::errs() << "assembler backend - post-relaxation\n--\n"; + dump(); }); + + // Finalize the layout, including fragment lowering. + finishLayout(Layout); + + DEBUG_WITH_TYPE("mc-dump", { + llvm_ks::errs() << "assembler backend - final-layout\n--\n"; + dump(); }); + + // Allow the object writer a chance to perform post-layout binding (for + // example, to set the index fields in the symbol data). + getWriter().executePostLayoutBinding(*this, Layout); + + // Evaluate and apply the fixups, generating relocation entries as necessary. + for (MCSection &Sec : *this) { + for (MCFragment &Frag : Sec) { + MCEncodedFragment *F = dyn_cast(&Frag); + // Data and relaxable fragments both have fixups. So only process + // those here. + // FIXME: Is there a better way to do this? MCEncodedFragmentWithFixups + // being templated makes this tricky. + if (!F || isa(F)) + continue; + ArrayRef Fixups; + MutableArrayRef Contents; + if (auto *FragWithFixups = dyn_cast(F)) { + Fixups = FragWithFixups->getFixups(); + Contents = FragWithFixups->getContents(); + } else if (auto *FragWithFixups = dyn_cast(F)) { + Fixups = FragWithFixups->getFixups(); + Contents = FragWithFixups->getContents(); + } else + llvm_unreachable("Unknown fragment with fixups!"); + for (const MCFixup &Fixup : Fixups) { + uint64_t FixedValue; + bool IsPCRel; + std::tie(FixedValue, IsPCRel) = handleFixup(Layout, *F, Fixup, KsError); + if (KsError) + return; + getBackend().applyFixup(Fixup, Contents.data(), + Contents.size(), FixedValue, IsPCRel, KsError); + if (KsError) + return; + } + } + } +} + +void MCAssembler::Finish(unsigned int &KsError) { + // Create the layout object. + MCAsmLayout Layout(*this); + layout(Layout, KsError); + + // Write the object file. + if (!KsError) { + getWriter().writeObject(*this, Layout); + KsError = getError(); + } +} + +bool MCAssembler::fixupNeedsRelaxation(const MCFixup &Fixup, + const MCRelaxableFragment *DF, + const MCAsmLayout &Layout, unsigned &KsError) const +{ + MCValue Target; + uint64_t Value; + bool Resolved = evaluateFixup(Layout, Fixup, DF, Target, Value, KsError); + if (KsError) { + KsError = KS_ERR_ASM_FIXUP_INVALID; + // return a dummy value + return false; + } + return getBackend().fixupNeedsRelaxationAdvanced(Fixup, Resolved, Value, DF, + Layout); +} + +bool MCAssembler::fragmentNeedsRelaxation(const MCRelaxableFragment *F, + const MCAsmLayout &Layout, unsigned &KsError) const +{ + // If this inst doesn't ever need relaxation, ignore it. This occurs when we + // are intentionally pushing out inst fragments, or because we relaxed a + // previous instruction to one that doesn't need relaxation. + if (!getBackend().mayNeedRelaxation(F->getInst())) + return false; + + for (const MCFixup &Fixup : F->getFixups()) + if (fixupNeedsRelaxation(Fixup, F, Layout, KsError)) + return true; + + return false; +} + +bool MCAssembler::relaxInstruction(MCAsmLayout &Layout, + MCRelaxableFragment &F) +{ + unsigned KsError = 0; + if (!fragmentNeedsRelaxation(&F, Layout, KsError)) + return false; + + // FIXME-PERF: We could immediately lower out instructions if we can tell + // they are fully resolved, to avoid retesting on later passes. + + // Relax the fragment. + + MCInst Relaxed; + getBackend().relaxInstruction(F.getInst(), Relaxed); + + // Encode the new instruction. + // + // FIXME-PERF: If it matters, we could let the target do this. It can + // probably do so more efficiently in many cases. + SmallVector Fixups; + SmallString<256> Code; + raw_svector_ostream VecOS(Code); + getEmitter().encodeInstruction(Relaxed, VecOS, Fixups, F.getSubtargetInfo(), KsError); + + // Update the fragment. + F.setInst(Relaxed); + F.getContents() = Code; + F.getFixups() = Fixups; + + return true; +} + +bool MCAssembler::relaxLEB(MCAsmLayout &Layout, MCLEBFragment &LF) { + uint64_t OldSize = LF.getContents().size(); + int64_t Value; + bool Abs = LF.getValue().evaluateKnownAbsolute(Value, Layout); + if (!Abs) + report_fatal_error("sleb128 and uleb128 expressions must be absolute"); + SmallString<8> &Data = LF.getContents(); + Data.clear(); + raw_svector_ostream OSE(Data); + if (LF.isSigned()) + encodeSLEB128(Value, OSE); + else + encodeULEB128(Value, OSE); + return OldSize != LF.getContents().size(); +} + +bool MCAssembler::relaxDwarfLineAddr(MCAsmLayout &Layout, + MCDwarfLineAddrFragment &DF) { + return false; +} + +bool MCAssembler::relaxDwarfCallFrameFragment(MCAsmLayout &Layout, + MCDwarfCallFrameFragment &DF) { + return false; +} + +bool MCAssembler::layoutSectionOnce(MCAsmLayout &Layout, MCSection &Sec) +{ + // Holds the first fragment which needed relaxing during this layout. It will + // remain NULL if none were relaxed. + // When a fragment is relaxed, all the fragments following it should get + // invalidated because their offset is going to change. + MCFragment *FirstRelaxedFragment = nullptr; + + // Attempt to relax all the fragments in the section. + for (MCSection::iterator I = Sec.begin(), IE = Sec.end(); I != IE; ++I) { + // Check if this is a fragment that needs relaxation. + bool RelaxedFrag = false; + switch(I->getKind()) { + default: + break; + case MCFragment::FT_Relaxable: + assert(!getRelaxAll() && + "Did not expect a MCRelaxableFragment in RelaxAll mode"); + RelaxedFrag = relaxInstruction(Layout, *cast(I)); + break; + case MCFragment::FT_Dwarf: + RelaxedFrag = relaxDwarfLineAddr(Layout, + *cast(I)); + break; + case MCFragment::FT_DwarfFrame: + RelaxedFrag = + relaxDwarfCallFrameFragment(Layout, + *cast(I)); + break; + case MCFragment::FT_LEB: + RelaxedFrag = relaxLEB(Layout, *cast(I)); + break; + } + if (RelaxedFrag && !FirstRelaxedFragment) + FirstRelaxedFragment = &*I; + } + if (FirstRelaxedFragment) { + Layout.invalidateFragmentsFrom(FirstRelaxedFragment); + return true; + } + return false; +} + +bool MCAssembler::layoutOnce(MCAsmLayout &Layout) +{ + bool WasRelaxed = false; + for (iterator it = begin(), ie = end(); it != ie; ++it) { + MCSection &Sec = *it; + while (layoutSectionOnce(Layout, Sec)) + WasRelaxed = true; + } + + return WasRelaxed; +} + +void MCAssembler::finishLayout(MCAsmLayout &Layout) { + // The layout is done. Mark every fragment as valid. + for (unsigned int i = 0, n = Layout.getSectionOrder().size(); i != n; ++i) { + bool valid; + Layout.getFragmentOffset(&*Layout.getSectionOrder()[i]->rbegin(), valid); + } +} diff --git a/llvm/lib/MC/MCCodeEmitter.cpp b/llvm/lib/MC/MCCodeEmitter.cpp new file mode 100644 index 0000000..ae77411 --- /dev/null +++ b/llvm/lib/MC/MCCodeEmitter.cpp @@ -0,0 +1,18 @@ +//===-- MCCodeEmitter.cpp - Instruction Encoding --------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCCodeEmitter.h" + +using namespace llvm_ks; + +MCCodeEmitter::MCCodeEmitter() { +} + +MCCodeEmitter::~MCCodeEmitter() { +} diff --git a/llvm/lib/MC/MCContext.cpp b/llvm/lib/MC/MCContext.cpp new file mode 100644 index 0000000..24d5f9e --- /dev/null +++ b/llvm/lib/MC/MCContext.cpp @@ -0,0 +1,526 @@ +//===- lib/MC/MCContext.cpp - Machine Code Context ------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCContext.h" +#include "llvm/ADT/SmallString.h" +#include "llvm/ADT/Twine.h" +#include "llvm/MC/MCAssembler.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCCodeView.h" +#include "llvm/MC/MCDwarf.h" +#include "llvm/MC/MCLabel.h" +#include "llvm/MC/MCObjectFileInfo.h" +#include "llvm/MC/MCRegisterInfo.h" +#include "llvm/MC/MCSectionCOFF.h" +#include "llvm/MC/MCSectionELF.h" +#include "llvm/MC/MCSectionMachO.h" +#include "llvm/MC/MCStreamer.h" +#include "llvm/MC/MCSymbolCOFF.h" +#include "llvm/MC/MCSymbolELF.h" +#include "llvm/MC/MCSymbolMachO.h" +#include "llvm/Support/COFF.h" +#include "llvm/Support/ELF.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/FileSystem.h" +#include "llvm/Support/MemoryBuffer.h" +#include "llvm/Support/SourceMgr.h" +#include + +using namespace llvm_ks; + +MCContext::MCContext(const MCAsmInfo *mai, const MCRegisterInfo *mri, + const MCObjectFileInfo *mofi, const SourceMgr *mgr, + bool DoAutoReset, uint64_t BaseAddr) + : SrcMgr(mgr), MAI(mai), MRI(mri), MOFI(mofi), Allocator(), + Symbols(Allocator), UsedNames(Allocator), + CurrentDwarfLoc(0, 0, 0, DWARF2_FLAG_IS_STMT, 0, 0), DwarfLocSeen(false), + GenDwarfForAssembly(false), GenDwarfFileNumber(0), DwarfVersion(4), + AllowTemporaryLabels(true), DwarfCompileUnitID(0), + AutoReset(DoAutoReset), HadError(false), BaseAddress(BaseAddr) { + + std::error_code EC = llvm_ks::sys::fs::current_path(CompilationDir); + if (EC) + CompilationDir.clear(); + + SecureLogFile = getenv("AS_SECURE_LOG_FILE"); + SecureLog = nullptr; + SecureLogUsed = false; + + if (SrcMgr && SrcMgr->getNumBuffers()) + MainFileName = + SrcMgr->getMemoryBuffer(SrcMgr->getMainFileID())->getBufferIdentifier(); +} + +MCContext::~MCContext() { + if (AutoReset) + reset(); + + // NOTE: The symbols are all allocated out of a bump pointer allocator, + // we don't need to free them here. +} + +//===----------------------------------------------------------------------===// +// Module Lifetime Management +//===----------------------------------------------------------------------===// + +void MCContext::reset() { + // Call the destructors so the fragments are freed + COFFAllocator.DestroyAll(); + ELFAllocator.DestroyAll(); + MachOAllocator.DestroyAll(); + + MCSubtargetAllocator.DestroyAll(); + UsedNames.clear(); + Symbols.clear(); + SectionSymbols.clear(); + Allocator.Reset(); + Instances.clear(); + CompilationDir.clear(); + MainFileName.clear(); + MCDwarfLineTablesCUMap.clear(); + SectionsForRanges.clear(); + MCGenDwarfLabelEntries.clear(); + DwarfDebugFlags = StringRef(); + DwarfCompileUnitID = 0; + CurrentDwarfLoc = MCDwarfLoc(0, 0, 0, DWARF2_FLAG_IS_STMT, 0, 0); + + MachOUniquingMap.clear(); + ELFUniquingMap.clear(); + COFFUniquingMap.clear(); + + NextID.clear(); + AllowTemporaryLabels = true; + DwarfLocSeen = false; + GenDwarfForAssembly = false; + GenDwarfFileNumber = 0; + + HadError = false; +} + +//===----------------------------------------------------------------------===// +// Symbol Manipulation +//===----------------------------------------------------------------------===// + +MCSymbol *MCContext::getOrCreateSymbol(const Twine &Name) { + SmallString<128> NameSV; + StringRef NameRef = Name.toStringRef(NameSV); + + assert(!NameRef.empty() && "Normal symbols cannot be unnamed!"); + + MCSymbol *&Sym = Symbols[NameRef]; + if (!Sym) + Sym = createSymbol(NameRef, false, false); + + return Sym; +} + +MCSymbolELF *MCContext::getOrCreateSectionSymbol(const MCSectionELF &Section) { + MCSymbolELF *&Sym = SectionSymbols[&Section]; + if (Sym) + return Sym; + + StringRef Name = Section.getSectionName(); + + MCSymbol *&OldSym = Symbols[Name]; + if (OldSym && OldSym->isUndefined()) { + Sym = cast(OldSym); + return Sym; + } + + auto NameIter = UsedNames.insert(std::make_pair(Name, true)).first; + Sym = new (&*NameIter, *this) MCSymbolELF(&*NameIter, /*isTemporary*/ false); + + if (!OldSym) + OldSym = Sym; + + return Sym; +} + +MCSymbol *MCContext::getOrCreateFrameAllocSymbol(StringRef FuncName, + unsigned Idx) { + return getOrCreateSymbol(Twine(MAI->getPrivateGlobalPrefix()) + FuncName + + "$frame_escape_" + Twine(Idx)); +} + +MCSymbol *MCContext::getOrCreateParentFrameOffsetSymbol(StringRef FuncName) { + return getOrCreateSymbol(Twine(MAI->getPrivateGlobalPrefix()) + FuncName + + "$parent_frame_offset"); +} + +MCSymbol *MCContext::getOrCreateLSDASymbol(StringRef FuncName) { + return getOrCreateSymbol(Twine(MAI->getPrivateGlobalPrefix()) + "__ehtable$" + + FuncName); +} + +MCSymbol *MCContext::createSymbolImpl(const StringMapEntry *Name, + bool IsTemporary) { + if (MOFI) { + switch (MOFI->getObjectFileType()) { + case MCObjectFileInfo::IsCOFF: + return new (Name, *this) MCSymbolCOFF(Name, IsTemporary); + case MCObjectFileInfo::IsELF: + return new (Name, *this) MCSymbolELF(Name, IsTemporary); + case MCObjectFileInfo::IsMachO: + return new (Name, *this) MCSymbolMachO(Name, IsTemporary); + } + } + return new (Name, *this) MCSymbol(MCSymbol::SymbolKindUnset, Name, + IsTemporary); +} + +MCSymbol *MCContext::createSymbol(StringRef Name, bool AlwaysAddSuffix, + bool CanBeUnnamed) { + if (CanBeUnnamed && !UseNamesOnTempLabels) + return createSymbolImpl(nullptr, true); + + // Determine whether this is an user writter assembler temporary or normal + // label, if used. + bool IsTemporary = CanBeUnnamed; + if (AllowTemporaryLabels && !IsTemporary) + IsTemporary = Name.startswith(MAI->getPrivateGlobalPrefix()); + + SmallString<128> NewName = Name; + bool AddSuffix = AlwaysAddSuffix; + unsigned &NextUniqueID = NextID[Name]; + for (;;) { + if (AddSuffix) { + NewName.resize(Name.size()); + raw_svector_ostream(NewName) << NextUniqueID++; + } + auto NameEntry = UsedNames.insert(std::make_pair(NewName, true)); + if (NameEntry.second) { + // Ok, we found a name. Have the MCSymbol object itself refer to the copy + // of the string that is embedded in the UsedNames entry. + return createSymbolImpl(&*NameEntry.first, IsTemporary); + } + assert(IsTemporary && "Cannot rename non-temporary symbols"); + AddSuffix = true; + } + llvm_unreachable("Infinite loop"); +} + +MCSymbol *MCContext::createTempSymbol(const Twine &Name, bool AlwaysAddSuffix, + bool CanBeUnnamed) { + SmallString<128> NameSV; + raw_svector_ostream(NameSV) << MAI->getPrivateGlobalPrefix() << Name; + return createSymbol(NameSV, AlwaysAddSuffix, CanBeUnnamed); +} + +MCSymbol *MCContext::createLinkerPrivateTempSymbol() { + SmallString<128> NameSV; + raw_svector_ostream(NameSV) << MAI->getLinkerPrivateGlobalPrefix() << "tmp"; + return createSymbol(NameSV, true, false); +} + +MCSymbol *MCContext::createTempSymbol(bool CanBeUnnamed) { + return createTempSymbol("tmp", true, CanBeUnnamed); +} + +unsigned MCContext::NextInstance(unsigned LocalLabelVal, bool &valid) +{ + if (LocalLabelVal >= Instances.size()) { + valid = false; + return 0; + } + MCLabel *&Label = Instances[LocalLabelVal]; + if (!Label) + Label = new (*this) MCLabel(0); + return Label->incInstance(); +} + +unsigned MCContext::GetInstance(unsigned LocalLabelVal, bool &valid) +{ + if (LocalLabelVal >= Instances.size()) { + valid = false; + return 0; + } + MCLabel *&Label = Instances[LocalLabelVal]; + if (!Label) + Label = new (*this) MCLabel(0); + return Label->getInstance(); +} + +MCSymbol *MCContext::getOrCreateDirectionalLocalSymbol(unsigned LocalLabelVal, + unsigned Instance) { + MCSymbol *&Sym = LocalSymbols[std::make_pair(LocalLabelVal, Instance)]; + if (!Sym) + Sym = createTempSymbol(false); + return Sym; +} + +MCSymbol *MCContext::createDirectionalLocalSymbol(unsigned LocalLabelVal, bool &valid) +{ + valid = true; + unsigned Instance = NextInstance(LocalLabelVal, valid); + if (!valid) + return nullptr; + return getOrCreateDirectionalLocalSymbol(LocalLabelVal, Instance); +} + +MCSymbol *MCContext::getDirectionalLocalSymbol(unsigned LocalLabelVal, + bool Before, bool &valid) +{ + valid = true; + unsigned Instance = GetInstance(LocalLabelVal, valid); + if (!valid) + return nullptr; + if (!Before) + ++Instance; + return getOrCreateDirectionalLocalSymbol(LocalLabelVal, Instance); +} + +MCSymbol *MCContext::lookupSymbol(const Twine &Name) const { + SmallString<128> NameSV; + StringRef NameRef = Name.toStringRef(NameSV); + return Symbols.lookup(NameRef); +} + +//===----------------------------------------------------------------------===// +// Section Management +//===----------------------------------------------------------------------===// + +MCSectionMachO *MCContext::getMachOSection(StringRef Segment, StringRef Section, + unsigned TypeAndAttributes, + unsigned Reserved2, SectionKind Kind, + const char *BeginSymName) { + + // We unique sections by their segment/section pair. The returned section + // may not have the same flags as the requested section, if so this should be + // diagnosed by the client as an error. + + // Form the name to look up. + SmallString<64> Name; + Name += Segment; + Name.push_back(','); + Name += Section; + + // Do the lookup, if we have a hit, return it. + MCSectionMachO *&Entry = MachOUniquingMap[Name]; + if (Entry) + return Entry; + + MCSymbol *Begin = nullptr; + if (BeginSymName) + Begin = createTempSymbol(BeginSymName, false); + + // Otherwise, return a new section. + return Entry = new (MachOAllocator.Allocate()) MCSectionMachO( + Segment, Section, TypeAndAttributes, Reserved2, Kind, Begin); +} + +void MCContext::renameELFSection(MCSectionELF *Section, StringRef Name) { + StringRef GroupName; + if (const MCSymbol *Group = Section->getGroup()) + GroupName = Group->getName(); + + unsigned UniqueID = Section->getUniqueID(); + ELFUniquingMap.erase( + ELFSectionKey{Section->getSectionName(), GroupName, UniqueID}); + auto I = ELFUniquingMap.insert(std::make_pair( + ELFSectionKey{Name, GroupName, UniqueID}, + Section)) + .first; + StringRef CachedName = I->first.SectionName; + const_cast(Section)->setSectionName(CachedName); +} + +MCSectionELF *MCContext::createELFRelSection(StringRef Name, unsigned Type, + unsigned Flags, unsigned EntrySize, + const MCSymbolELF *Group, + const MCSectionELF *Associated) { + StringMap::iterator I; + bool Inserted; + std::tie(I, Inserted) = ELFRelSecNames.insert(std::make_pair(Name, true)); + + return new (ELFAllocator.Allocate()) + MCSectionELF(I->getKey(), Type, Flags, SectionKind::getReadOnly(), + EntrySize, Group, true, nullptr, Associated); +} + +MCSectionELF *MCContext::getELFSection(StringRef Section, unsigned Type, + unsigned Flags, unsigned EntrySize, + StringRef Group, unsigned UniqueID, + const char *BeginSymName) { + MCSymbolELF *GroupSym = nullptr; + if (!Group.empty()) + GroupSym = cast(getOrCreateSymbol(Group)); + + return getELFSection(Section, Type, Flags, EntrySize, GroupSym, UniqueID, + BeginSymName, nullptr); +} + +MCSectionELF *MCContext::getELFSection(StringRef Section, unsigned Type, + unsigned Flags, unsigned EntrySize, + const MCSymbolELF *GroupSym, + unsigned UniqueID, + const char *BeginSymName, + const MCSectionELF *Associated) { + StringRef Group = ""; + if (GroupSym) + Group = GroupSym->getName(); + // Do the lookup, if we have a hit, return it. + auto IterBool = ELFUniquingMap.insert( + std::make_pair(ELFSectionKey{Section, Group, UniqueID}, nullptr)); + auto &Entry = *IterBool.first; + if (!IterBool.second) + return Entry.second; + + StringRef CachedName = Entry.first.SectionName; + + SectionKind Kind; + if (Flags & ELF::SHF_EXECINSTR) + Kind = SectionKind::getText(); + else + Kind = SectionKind::getReadOnly(); + + MCSymbol *Begin = nullptr; + if (BeginSymName) + Begin = createTempSymbol(BeginSymName, false); + + MCSectionELF *Result = new (ELFAllocator.Allocate()) + MCSectionELF(CachedName, Type, Flags, Kind, EntrySize, GroupSym, UniqueID, + Begin, Associated); + Entry.second = Result; + return Result; +} + +MCSectionELF *MCContext::createELFGroupSection(const MCSymbolELF *Group) { + MCSectionELF *Result = new (ELFAllocator.Allocate()) + MCSectionELF(".group", ELF::SHT_GROUP, 0, SectionKind::getReadOnly(), 4, + Group, ~0, nullptr, nullptr); + return Result; +} + +MCSectionCOFF *MCContext::getCOFFSection(StringRef Section, + unsigned Characteristics, + SectionKind Kind, + StringRef COMDATSymName, int Selection, + const char *BeginSymName) { + MCSymbol *COMDATSymbol = nullptr; + if (!COMDATSymName.empty()) { + COMDATSymbol = getOrCreateSymbol(COMDATSymName); + COMDATSymName = COMDATSymbol->getName(); + } + + // Do the lookup, if we have a hit, return it. + COFFSectionKey T{Section, COMDATSymName, Selection}; + auto IterBool = COFFUniquingMap.insert(std::make_pair(T, nullptr)); + auto Iter = IterBool.first; + if (!IterBool.second) + return Iter->second; + + MCSymbol *Begin = nullptr; + if (BeginSymName) + Begin = createTempSymbol(BeginSymName, false); + + StringRef CachedName = Iter->first.SectionName; + MCSectionCOFF *Result = new (COFFAllocator.Allocate()) MCSectionCOFF( + CachedName, Characteristics, COMDATSymbol, Selection, Kind, Begin); + + Iter->second = Result; + return Result; +} + +MCSectionCOFF *MCContext::getCOFFSection(StringRef Section, + unsigned Characteristics, + SectionKind Kind, + const char *BeginSymName) { + return getCOFFSection(Section, Characteristics, Kind, "", 0, BeginSymName); +} + +MCSectionCOFF *MCContext::getCOFFSection(StringRef Section) { + COFFSectionKey T{Section, "", 0}; + auto Iter = COFFUniquingMap.find(T); + if (Iter == COFFUniquingMap.end()) + return nullptr; + return Iter->second; +} + +MCSectionCOFF *MCContext::getAssociativeCOFFSection(MCSectionCOFF *Sec, + const MCSymbol *KeySym) { + // Return the normal section if we don't have to be associative. + if (!KeySym) + return Sec; + + // Make an associative section with the same name and kind as the normal + // section. + unsigned Characteristics = + Sec->getCharacteristics() | COFF::IMAGE_SCN_LNK_COMDAT; + return getCOFFSection(Sec->getSectionName(), Characteristics, Sec->getKind(), + KeySym->getName(), + COFF::IMAGE_COMDAT_SELECT_ASSOCIATIVE); +} + +MCSubtargetInfo &MCContext::getSubtargetCopy(const MCSubtargetInfo &STI) { + return *new (MCSubtargetAllocator.Allocate()) MCSubtargetInfo(STI); +} + +//===----------------------------------------------------------------------===// +// Dwarf Management +//===----------------------------------------------------------------------===// + +/// getDwarfFile - takes a file name an number to place in the dwarf file and +/// directory tables. If the file number has already been allocated it is an +/// error and zero is returned and the client reports the error, else the +/// allocated file number is returned. The file numbers may be in any order. +unsigned MCContext::getDwarfFile(StringRef Directory, StringRef FileName, + unsigned FileNumber, unsigned CUID) { + return 0; +} + +/// isValidDwarfFileNumber - takes a dwarf file number and returns true if it +/// currently is assigned and false otherwise. +bool MCContext::isValidDwarfFileNumber(unsigned FileNumber, unsigned CUID) { + const SmallVectorImpl &MCDwarfFiles = getMCDwarfFiles(CUID); + if (FileNumber == 0 || FileNumber >= MCDwarfFiles.size()) + return false; + + return !MCDwarfFiles[FileNumber].Name.empty(); +} + +/// Remove empty sections from SectionStartEndSyms, to avoid generating +/// useless debug info for them. +void MCContext::finalizeDwarfSections(MCStreamer &MCOS) { + SectionsForRanges.remove_if( + [&](MCSection *Sec) { return !MCOS.mayHaveInstructions(*Sec); }); +} + +unsigned MCContext::getCVFile(StringRef FileName, unsigned FileNumber) { + return 0; +} + +bool MCContext::isValidCVFileNumber(unsigned FileNumber) { + return true; +} + +//===----------------------------------------------------------------------===// +// Error Reporting +//===----------------------------------------------------------------------===// + +void MCContext::reportError(SMLoc Loc, const Twine &Msg) { + HadError = true; + + // If we have a source manager use it. Otherwise just use the generic + // report_fatal_error(). + if (!SrcMgr) + report_fatal_error(Msg, false); + + // Use the source manager to print the message. + SrcMgr->PrintMessage(Loc, SourceMgr::DK_Error, Msg); +} + +void MCContext::reportFatalError(SMLoc Loc, const Twine &Msg) { + reportError(Loc, Msg); + + // If we reached here, we are failing ungracefully. Run the interrupt handlers + // to make sure any special cleanups get done, in particular that we remove + // files registered with RemoveFileOnSignal. + // sys::RunInterruptHandlers(); + exit(1); +} diff --git a/llvm/lib/MC/MCELFObjectTargetWriter.cpp b/llvm/lib/MC/MCELFObjectTargetWriter.cpp new file mode 100644 index 0000000..3e48664 --- /dev/null +++ b/llvm/lib/MC/MCELFObjectTargetWriter.cpp @@ -0,0 +1,35 @@ +//===-- MCELFObjectTargetWriter.cpp - ELF Target Writer Subclass ----------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/STLExtras.h" +#include "llvm/MC/MCELFObjectWriter.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCValue.h" + +using namespace llvm_ks; + +MCELFObjectTargetWriter::MCELFObjectTargetWriter(bool Is64Bit_, + uint8_t OSABI_, + uint16_t EMachine_, + bool HasRelocationAddend_, + bool IsN64_) + : OSABI(OSABI_), EMachine(EMachine_), + HasRelocationAddend(HasRelocationAddend_), Is64Bit(Is64Bit_), + IsN64(IsN64_){ +} + +bool MCELFObjectTargetWriter::needsRelocateWithSymbol(const MCSymbol &Sym, + unsigned Type) const { + return false; +} + +void +MCELFObjectTargetWriter::sortRelocs(const MCAssembler &Asm, + std::vector &Relocs) { +} diff --git a/llvm/lib/MC/MCELFStreamer.cpp b/llvm/lib/MC/MCELFStreamer.cpp new file mode 100644 index 0000000..c48114c --- /dev/null +++ b/llvm/lib/MC/MCELFStreamer.cpp @@ -0,0 +1,684 @@ +//===- lib/MC/MCELFStreamer.cpp - ELF Object Output -----------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file assembles .s files and emits ELF .o object files. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCELFStreamer.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/SmallPtrSet.h" +#include "llvm/MC/MCAsmBackend.h" +#include "llvm/MC/MCAsmLayout.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCAssembler.h" +#include "llvm/MC/MCCodeEmitter.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCInst.h" +#include "llvm/MC/MCObjectFileInfo.h" +#include "llvm/MC/MCObjectStreamer.h" +#include "llvm/MC/MCObjectWriter.h" +#include "llvm/MC/MCSection.h" +#include "llvm/MC/MCSectionELF.h" +#include "llvm/MC/MCSymbolELF.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/MC/MCValue.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/ELF.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/TargetRegistry.h" +#include "llvm/Support/raw_ostream.h" + +//#include + +using namespace llvm_ks; + +bool MCELFStreamer::isBundleLocked() const { + return getCurrentSectionOnly()->isBundleLocked(); +} + +MCELFStreamer::~MCELFStreamer() { +} + +void MCELFStreamer::mergeFragment(MCDataFragment *DF, + MCDataFragment *EF) { + MCAssembler &Assembler = getAssembler(); + + if (Assembler.isBundlingEnabled() && Assembler.getRelaxAll()) { + uint64_t FSize = EF->getContents().size(); + + if (FSize > Assembler.getBundleAlignSize()) + report_fatal_error("Fragment can't be larger than a bundle size"); + + uint64_t RequiredBundlePadding = computeBundlePadding( + Assembler, EF, DF->getContents().size(), FSize); + + if (RequiredBundlePadding > UINT8_MAX) + report_fatal_error("Padding cannot exceed 255 bytes"); + + if (RequiredBundlePadding > 0) { + SmallString<256> Code; + raw_svector_ostream VecOS(Code); + MCObjectWriter *OW = Assembler.getBackend().createObjectWriter(VecOS); + + EF->setBundlePadding(static_cast(RequiredBundlePadding)); + + Assembler.writeFragmentPadding(*EF, FSize, OW); + delete OW; + + DF->getContents().append(Code.begin(), Code.end()); + } + } + + flushPendingLabels(DF, DF->getContents().size()); + + for (unsigned i = 0, e = EF->getFixups().size(); i != e; ++i) { + EF->getFixups()[i].setOffset(EF->getFixups()[i].getOffset() + + DF->getContents().size()); + DF->getFixups().push_back(EF->getFixups()[i]); + } + DF->setHasInstructions(true); + DF->getContents().append(EF->getContents().begin(), EF->getContents().end()); +} + +void MCELFStreamer::InitSections(bool NoExecStack) { + MCContext &Ctx = getContext(); + SwitchSection(Ctx.getObjectFileInfo()->getTextSection()); + + if (NoExecStack) + SwitchSection(Ctx.getAsmInfo()->getNonexecutableStackSection(Ctx)); +} + +void MCELFStreamer::EmitLabel(MCSymbol *S) { + auto *Symbol = cast(S); + assert(Symbol->isUndefined() && "Cannot define a symbol twice!"); + + MCObjectStreamer::EmitLabel(Symbol); + + const MCSectionELF &Section = + static_cast(*getCurrentSectionOnly()); + if (Section.getFlags() & ELF::SHF_TLS) + Symbol->setType(ELF::STT_TLS); +} + +void MCELFStreamer::EmitAssemblerFlag(MCAssemblerFlag Flag) { + // Let the target do whatever target specific stuff it needs to do. + getAssembler().getBackend().handleAssemblerFlag(Flag); + // Do any generic stuff we need to do. + switch (Flag) { + case MCAF_SyntaxUnified: return; // no-op here. + case MCAF_Code16: return; // Change parsing mode; no-op here. + case MCAF_Code32: return; // Change parsing mode; no-op here. + case MCAF_Code64: return; // Change parsing mode; no-op here. + case MCAF_SubsectionsViaSymbols: + getAssembler().setSubsectionsViaSymbols(true); + return; + } + + llvm_unreachable("invalid assembler flag!"); +} + +// If bundle alignment is used and there are any instructions in the section, it +// needs to be aligned to at least the bundle size. +static void setSectionAlignmentForBundling(const MCAssembler &Assembler, + MCSection *Section) { + if (Section && Assembler.isBundlingEnabled() && Section->hasInstructions() && + Section->getAlignment() < Assembler.getBundleAlignSize()) + Section->setAlignment(Assembler.getBundleAlignSize()); +} + +void MCELFStreamer::ChangeSection(MCSection *Section, + const MCExpr *Subsection) { + MCSection *CurSection = getCurrentSectionOnly(); + if (CurSection && isBundleLocked()) + report_fatal_error("Unterminated .bundle_lock when changing a section"); + + MCAssembler &Asm = getAssembler(); + // Ensure the previous section gets aligned if necessary. + setSectionAlignmentForBundling(Asm, CurSection); + auto *SectionELF = static_cast(Section); + const MCSymbol *Grp = SectionELF->getGroup(); + if (Grp) + Asm.registerSymbol(*Grp); + + this->MCObjectStreamer::ChangeSection(Section, Subsection); + MCContext &Ctx = getContext(); + auto *Begin = cast_or_null(Section->getBeginSymbol()); + if (!Begin) { + Begin = Ctx.getOrCreateSectionSymbol(*SectionELF); + Section->setBeginSymbol(Begin); + } + if (Begin->isUndefined()) { + Asm.registerSymbol(*Begin); + Begin->setType(ELF::STT_SECTION); + } +} + +void MCELFStreamer::EmitWeakReference(MCSymbol *Alias, const MCSymbol *Symbol) { // qq + getAssembler().registerSymbol(*Symbol); + const MCExpr *Value = MCSymbolRefExpr::create( + Symbol, MCSymbolRefExpr::VK_WEAKREF, getContext()); + bool valid; + Alias->setVariableValue(Value, valid); + if (!valid) + return; +} + +// When GNU as encounters more than one .type declaration for an object it seems +// to use a mechanism similar to the one below to decide which type is actually +// used in the object file. The greater of T1 and T2 is selected based on the +// following ordering: +// STT_NOTYPE < STT_OBJECT < STT_FUNC < STT_GNU_IFUNC < STT_TLS < anything else +// If neither T1 < T2 nor T2 < T1 according to this ordering, use T2 (the user +// provided type). +static unsigned CombineSymbolTypes(unsigned T1, unsigned T2) { + for (unsigned Type : {ELF::STT_NOTYPE, ELF::STT_OBJECT, ELF::STT_FUNC, + ELF::STT_GNU_IFUNC, ELF::STT_TLS}) { + if (T1 == Type) + return T2; + if (T2 == Type) + return T1; + } + + return T2; +} + +bool MCELFStreamer::EmitSymbolAttribute(MCSymbol *S, MCSymbolAttr Attribute) { + auto *Symbol = cast(S); + // Indirect symbols are handled differently, to match how 'as' handles + // them. This makes writing matching .o files easier. + if (Attribute == MCSA_IndirectSymbol) { + // Note that we intentionally cannot use the symbol data here; this is + // important for matching the string table that 'as' generates. + IndirectSymbolData ISD; + ISD.Symbol = Symbol; + ISD.Section = getCurrentSectionOnly(); + getAssembler().getIndirectSymbols().push_back(ISD); + return true; + } + + // Adding a symbol attribute always introduces the symbol, note that an + // important side effect of calling registerSymbol here is to register + // the symbol with the assembler. + getAssembler().registerSymbol(*Symbol); + + // The implementation of symbol attributes is designed to match 'as', but it + // leaves much to desired. It doesn't really make sense to arbitrarily add and + // remove flags, but 'as' allows this (in particular, see .desc). + // + // In the future it might be worth trying to make these operations more well + // defined. + switch (Attribute) { + case MCSA_LazyReference: + case MCSA_Reference: + case MCSA_SymbolResolver: + case MCSA_PrivateExtern: + case MCSA_WeakDefinition: + case MCSA_WeakDefAutoPrivate: + case MCSA_Invalid: + case MCSA_IndirectSymbol: + return false; + + case MCSA_NoDeadStrip: + // Ignore for now. + break; + + case MCSA_ELF_TypeGnuUniqueObject: + Symbol->setType(CombineSymbolTypes(Symbol->getType(), ELF::STT_OBJECT)); + Symbol->setBinding(ELF::STB_GNU_UNIQUE); + Symbol->setExternal(true); + break; + + case MCSA_Global: + Symbol->setBinding(ELF::STB_GLOBAL); + Symbol->setExternal(true); + break; + + case MCSA_WeakReference: + case MCSA_Weak: + Symbol->setBinding(ELF::STB_WEAK); + Symbol->setExternal(true); + break; + + case MCSA_Local: + Symbol->setBinding(ELF::STB_LOCAL); + Symbol->setExternal(false); + break; + + case MCSA_ELF_TypeFunction: + Symbol->setType(CombineSymbolTypes(Symbol->getType(), ELF::STT_FUNC)); + break; + + case MCSA_ELF_TypeIndFunction: + Symbol->setType(CombineSymbolTypes(Symbol->getType(), ELF::STT_GNU_IFUNC)); + break; + + case MCSA_ELF_TypeObject: + Symbol->setType(CombineSymbolTypes(Symbol->getType(), ELF::STT_OBJECT)); + break; + + case MCSA_ELF_TypeTLS: + Symbol->setType(CombineSymbolTypes(Symbol->getType(), ELF::STT_TLS)); + break; + + case MCSA_ELF_TypeCommon: + // TODO: Emit these as a common symbol. + Symbol->setType(CombineSymbolTypes(Symbol->getType(), ELF::STT_OBJECT)); + break; + + case MCSA_ELF_TypeNoType: + Symbol->setType(CombineSymbolTypes(Symbol->getType(), ELF::STT_NOTYPE)); + break; + + case MCSA_Protected: + Symbol->setVisibility(ELF::STV_PROTECTED); + break; + + case MCSA_Hidden: + Symbol->setVisibility(ELF::STV_HIDDEN); + break; + + case MCSA_Internal: + Symbol->setVisibility(ELF::STV_INTERNAL); + break; + } + + return true; +} + +void MCELFStreamer::EmitCommonSymbol(MCSymbol *S, uint64_t Size, + unsigned ByteAlignment) { + auto *Symbol = cast(S); + getAssembler().registerSymbol(*Symbol); + + if (!Symbol->isBindingSet()) { + Symbol->setBinding(ELF::STB_GLOBAL); + Symbol->setExternal(true); + } + + Symbol->setType(ELF::STT_OBJECT); + + if (Symbol->getBinding() == ELF::STB_LOCAL) { + MCSection &Section = *getAssembler().getContext().getELFSection( + ".bss", ELF::SHT_NOBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); + MCSectionSubPair P = getCurrentSection(); + SwitchSection(&Section); + + EmitValueToAlignment(ByteAlignment, 0, 1, 0); + EmitLabel(Symbol); + EmitZeros(Size); + + // Update the maximum alignment of the section if necessary. + if (ByteAlignment > Section.getAlignment()) + Section.setAlignment(ByteAlignment); + + SwitchSection(P.first, P.second); + } else { + if(Symbol->declareCommon(Size, ByteAlignment)) + report_fatal_error("Symbol: " + Symbol->getName() + + " redeclared as different type"); + } + + cast(Symbol) + ->setSize(MCConstantExpr::create(Size, getContext())); +} + +void MCELFStreamer::emitELFSize(MCSymbolELF *Symbol, const MCExpr *Value) { + Symbol->setSize(Value); +} + +void MCELFStreamer::EmitLocalCommonSymbol(MCSymbol *S, uint64_t Size, + unsigned ByteAlignment) { + auto *Symbol = cast(S); + // FIXME: Should this be caught and done earlier? + getAssembler().registerSymbol(*Symbol); + Symbol->setBinding(ELF::STB_LOCAL); + Symbol->setExternal(false); + EmitCommonSymbol(Symbol, Size, ByteAlignment); +} + +void MCELFStreamer::EmitValueImpl(const MCExpr *Value, unsigned Size, + SMLoc Loc) { + if (isBundleLocked()) + report_fatal_error("Emitting values inside a locked bundle is forbidden"); + fixSymbolsInTLSFixups(Value); + MCObjectStreamer::EmitValueImpl(Value, Size, Loc); +} + +void MCELFStreamer::EmitValueToAlignment(unsigned ByteAlignment, + int64_t Value, + unsigned ValueSize, + unsigned MaxBytesToEmit) { + if (isBundleLocked()) + report_fatal_error("Emitting values inside a locked bundle is forbidden"); + MCObjectStreamer::EmitValueToAlignment(ByteAlignment, Value, + ValueSize, MaxBytesToEmit); +} + +// Add a symbol for the file name of this module. They start after the +// null symbol and don't count as normal symbol, i.e. a non-STT_FILE symbol +// with the same name may appear. +void MCELFStreamer::EmitFileDirective(StringRef Filename) { + getAssembler().addFileName(Filename); +} + +void MCELFStreamer::EmitIdent(StringRef IdentString) { + bool Error; + MCSection *Comment = getAssembler().getContext().getELFSection( + ".comment", ELF::SHT_PROGBITS, ELF::SHF_MERGE | ELF::SHF_STRINGS, 1, ""); + PushSection(); + SwitchSection(Comment); + if (!SeenIdent) { + EmitIntValue(0, 1, Error); + SeenIdent = true; + } + EmitBytes(IdentString); + EmitIntValue(0, 1, Error); + PopSection(); +} + +void MCELFStreamer::fixSymbolsInTLSFixups(const MCExpr *expr) { + switch (expr->getKind()) { + case MCExpr::Target: + cast(expr)->fixELFSymbolsInTLSFixups(getAssembler()); + break; + case MCExpr::Constant: + break; + + case MCExpr::Binary: { + const MCBinaryExpr *be = cast(expr); + fixSymbolsInTLSFixups(be->getLHS()); + fixSymbolsInTLSFixups(be->getRHS()); + break; + } + + case MCExpr::SymbolRef: { + const MCSymbolRefExpr &symRef = *cast(expr); + switch (symRef.getKind()) { + default: + return; + case MCSymbolRefExpr::VK_GOTTPOFF: + case MCSymbolRefExpr::VK_INDNTPOFF: + case MCSymbolRefExpr::VK_NTPOFF: + case MCSymbolRefExpr::VK_GOTNTPOFF: + case MCSymbolRefExpr::VK_TLSGD: + case MCSymbolRefExpr::VK_TLSLD: + case MCSymbolRefExpr::VK_TLSLDM: + case MCSymbolRefExpr::VK_TPOFF: + case MCSymbolRefExpr::VK_TPREL: + case MCSymbolRefExpr::VK_DTPOFF: + case MCSymbolRefExpr::VK_DTPREL: + case MCSymbolRefExpr::VK_Mips_TLSGD: + case MCSymbolRefExpr::VK_Mips_GOTTPREL: + case MCSymbolRefExpr::VK_Mips_TPREL_HI: + case MCSymbolRefExpr::VK_Mips_TPREL_LO: + case MCSymbolRefExpr::VK_PPC_DTPMOD: + case MCSymbolRefExpr::VK_PPC_TPREL_LO: + case MCSymbolRefExpr::VK_PPC_TPREL_HI: + case MCSymbolRefExpr::VK_PPC_TPREL_HA: + case MCSymbolRefExpr::VK_PPC_TPREL_HIGHER: + case MCSymbolRefExpr::VK_PPC_TPREL_HIGHERA: + case MCSymbolRefExpr::VK_PPC_TPREL_HIGHEST: + case MCSymbolRefExpr::VK_PPC_TPREL_HIGHESTA: + case MCSymbolRefExpr::VK_PPC_DTPREL_LO: + case MCSymbolRefExpr::VK_PPC_DTPREL_HI: + case MCSymbolRefExpr::VK_PPC_DTPREL_HA: + case MCSymbolRefExpr::VK_PPC_DTPREL_HIGHER: + case MCSymbolRefExpr::VK_PPC_DTPREL_HIGHERA: + case MCSymbolRefExpr::VK_PPC_DTPREL_HIGHEST: + case MCSymbolRefExpr::VK_PPC_DTPREL_HIGHESTA: + case MCSymbolRefExpr::VK_PPC_GOT_TPREL: + case MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO: + case MCSymbolRefExpr::VK_PPC_GOT_TPREL_HI: + case MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA: + case MCSymbolRefExpr::VK_PPC_GOT_DTPREL: + case MCSymbolRefExpr::VK_PPC_GOT_DTPREL_LO: + case MCSymbolRefExpr::VK_PPC_GOT_DTPREL_HI: + case MCSymbolRefExpr::VK_PPC_GOT_DTPREL_HA: + case MCSymbolRefExpr::VK_PPC_TLS: + case MCSymbolRefExpr::VK_PPC_GOT_TLSGD: + case MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO: + case MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HI: + case MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA: + case MCSymbolRefExpr::VK_PPC_TLSGD: + case MCSymbolRefExpr::VK_PPC_GOT_TLSLD: + case MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO: + case MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HI: + case MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA: + case MCSymbolRefExpr::VK_PPC_TLSLD: + break; + } + getAssembler().registerSymbol(symRef.getSymbol()); + cast(symRef.getSymbol()).setType(ELF::STT_TLS); + break; + } + + case MCExpr::Unary: + fixSymbolsInTLSFixups(cast(expr)->getSubExpr()); + break; + } +} + +void MCELFStreamer::EmitInstToFragment(MCInst &Inst, + const MCSubtargetInfo &STI) { + this->MCObjectStreamer::EmitInstToFragment(Inst, STI); + MCRelaxableFragment &F = *cast(getCurrentFragment()); + + for (unsigned i = 0, e = F.getFixups().size(); i != e; ++i) + fixSymbolsInTLSFixups(F.getFixups()[i].getValue()); +} + +void MCELFStreamer::EmitInstToData(MCInst &Inst, + const MCSubtargetInfo &STI, + unsigned int &KsError) +{ + MCAssembler &Assembler = getAssembler(); + SmallVector Fixups; + SmallString<256> Code; + raw_svector_ostream VecOS(Code); + Assembler.getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI, KsError); + if (KsError) + return; + + for (unsigned i = 0, e = Fixups.size(); i != e; ++i) + fixSymbolsInTLSFixups(Fixups[i].getValue()); + + // There are several possibilities here: + // + // If bundling is disabled, append the encoded instruction to the current data + // fragment (or create a new such fragment if the current fragment is not a + // data fragment). + // + // If bundling is enabled: + // - If we're not in a bundle-locked group, emit the instruction into a + // fragment of its own. If there are no fixups registered for the + // instruction, emit a MCCompactEncodedInstFragment. Otherwise, emit a + // MCDataFragment. + // - If we're in a bundle-locked group, append the instruction to the current + // data fragment because we want all the instructions in a group to get into + // the same fragment. Be careful not to do that for the first instruction in + // the group, though. + MCDataFragment *DF; + + if (Assembler.isBundlingEnabled()) { + MCSection &Sec = *getCurrentSectionOnly(); + if (Assembler.getRelaxAll() && isBundleLocked()) + // If the -mc-relax-all flag is used and we are bundle-locked, we re-use + // the current bundle group. + DF = BundleGroups.back(); + else if (Assembler.getRelaxAll() && !isBundleLocked()) + // When not in a bundle-locked group and the -mc-relax-all flag is used, + // we create a new temporary fragment which will be later merged into + // the current fragment. + DF = new MCDataFragment(); + else if (isBundleLocked() && !Sec.isBundleGroupBeforeFirstInst()) + // If we are bundle-locked, we re-use the current fragment. + // The bundle-locking directive ensures this is a new data fragment. + DF = cast(getCurrentFragment()); + else if (!isBundleLocked() && Fixups.size() == 0) { + // Optimize memory usage by emitting the instruction to a + // MCCompactEncodedInstFragment when not in a bundle-locked group and + // there are no fixups registered. + MCCompactEncodedInstFragment *CEIF = new MCCompactEncodedInstFragment(); + insert(CEIF); + CEIF->getContents().append(Code.begin(), Code.end()); + return; + } else { + DF = new MCDataFragment(); + insert(DF); + } + if (Sec.getBundleLockState() == MCSection::BundleLockedAlignToEnd) { + // If this fragment is for a group marked "align_to_end", set a flag + // in the fragment. This can happen after the fragment has already been + // created if there are nested bundle_align groups and an inner one + // is the one marked align_to_end. + DF->setAlignToBundleEnd(true); + } + + // We're now emitting an instruction in a bundle group, so this flag has + // to be turned off. + Sec.setBundleGroupBeforeFirstInst(false); + } else { + DF = getOrCreateDataFragment(); + } + + // Add the fixups and data. + for (unsigned i = 0, e = Fixups.size(); i != e; ++i) { + Fixups[i].setOffset(Fixups[i].getOffset() + DF->getContents().size()); + DF->getFixups().push_back(Fixups[i]); + } + DF->setHasInstructions(true); + DF->getContents().append(Code.begin(), Code.end()); + + if (Assembler.isBundlingEnabled() && Assembler.getRelaxAll()) { + if (!isBundleLocked()) { + mergeFragment(getOrCreateDataFragment(), DF); + delete DF; + } + } +} + +void MCELFStreamer::EmitBundleAlignMode(unsigned AlignPow2) { + assert(AlignPow2 <= 30 && "Invalid bundle alignment"); + MCAssembler &Assembler = getAssembler(); + if (AlignPow2 > 0 && (Assembler.getBundleAlignSize() == 0 || + Assembler.getBundleAlignSize() == 1U << AlignPow2)) + Assembler.setBundleAlignSize(1U << AlignPow2); + else + report_fatal_error(".bundle_align_mode cannot be changed once set"); +} + +void MCELFStreamer::EmitBundleLock(bool AlignToEnd) { + MCSection &Sec = *getCurrentSectionOnly(); + + // Sanity checks + // + if (!getAssembler().isBundlingEnabled()) + report_fatal_error(".bundle_lock forbidden when bundling is disabled"); + + if (!isBundleLocked()) + Sec.setBundleGroupBeforeFirstInst(true); + + if (getAssembler().getRelaxAll() && !isBundleLocked()) { + // TODO: drop the lock state and set directly in the fragment + MCDataFragment *DF = new MCDataFragment(); + BundleGroups.push_back(DF); + } + + Sec.setBundleLockState(AlignToEnd ? MCSection::BundleLockedAlignToEnd + : MCSection::BundleLocked); +} + +void MCELFStreamer::EmitBundleUnlock() { + MCSection &Sec = *getCurrentSectionOnly(); + + // Sanity checks + if (!getAssembler().isBundlingEnabled()) + report_fatal_error(".bundle_unlock forbidden when bundling is disabled"); + else if (!isBundleLocked()) + report_fatal_error(".bundle_unlock without matching lock"); + else if (Sec.isBundleGroupBeforeFirstInst()) + report_fatal_error("Empty bundle-locked group is forbidden"); + + // When the -mc-relax-all flag is used, we emit instructions to fragments + // stored on a stack. When the bundle unlock is emitted, we pop a fragment + // from the stack a merge it to the one below. + if (getAssembler().getRelaxAll()) { + assert(!BundleGroups.empty() && "There are no bundle groups"); + MCDataFragment *DF = BundleGroups.back(); + + // FIXME: Use BundleGroups to track the lock state instead. + Sec.setBundleLockState(MCSection::NotBundleLocked); + + // FIXME: Use more separate fragments for nested groups. + if (!isBundleLocked()) { + mergeFragment(getOrCreateDataFragment(), DF); + BundleGroups.pop_back(); + delete DF; + } + + if (Sec.getBundleLockState() != MCSection::BundleLockedAlignToEnd) + getOrCreateDataFragment()->setAlignToBundleEnd(false); + } else + Sec.setBundleLockState(MCSection::NotBundleLocked); +} + +unsigned int MCELFStreamer::FinishImpl() +{ + // Ensure the last section gets aligned if necessary. + MCSection *CurSection = getCurrentSectionOnly(); + setSectionAlignmentForBundling(getAssembler(), CurSection); + + EmitFrames(nullptr); + return this->MCObjectStreamer::FinishImpl(); +} + +MCStreamer *llvm_ks::createELFStreamer(MCContext &Context, MCAsmBackend &MAB, + raw_pwrite_stream &OS, MCCodeEmitter *CE, + bool RelaxAll) { + MCELFStreamer *S = new MCELFStreamer(Context, MAB, OS, CE); + if (RelaxAll) + S->getAssembler().setRelaxAll(true); + return S; +} + +void MCELFStreamer::EmitThumbFunc(MCSymbol *Func) { + llvm_unreachable("Generic ELF doesn't support this directive"); +} + +void MCELFStreamer::EmitSymbolDesc(MCSymbol *Symbol, unsigned DescValue) { + llvm_unreachable("ELF doesn't support this directive"); +} + +void MCELFStreamer::BeginCOFFSymbolDef(const MCSymbol *Symbol) { + llvm_unreachable("ELF doesn't support this directive"); +} + +void MCELFStreamer::EmitCOFFSymbolStorageClass(int StorageClass) { + llvm_unreachable("ELF doesn't support this directive"); +} + +void MCELFStreamer::EmitCOFFSymbolType(int Type) { + llvm_unreachable("ELF doesn't support this directive"); +} + +void MCELFStreamer::EndCOFFSymbolDef() { + llvm_unreachable("ELF doesn't support this directive"); +} + +void MCELFStreamer::EmitZerofill(MCSection *Section, MCSymbol *Symbol, + uint64_t Size, unsigned ByteAlignment) { + llvm_unreachable("ELF doesn't support this directive"); +} + +void MCELFStreamer::EmitTBSSSymbol(MCSection *Section, MCSymbol *Symbol, + uint64_t Size, unsigned ByteAlignment) { + llvm_unreachable("ELF doesn't support this directive"); +} diff --git a/llvm/lib/MC/MCExpr.cpp b/llvm/lib/MC/MCExpr.cpp new file mode 100644 index 0000000..b6ed688 --- /dev/null +++ b/llvm/lib/MC/MCExpr.cpp @@ -0,0 +1,839 @@ +//===- MCExpr.cpp - Assembly Level Expression Implementation --------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCExpr.h" +#include "llvm/ADT/StringSwitch.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCAsmLayout.h" +#include "llvm/MC/MCAssembler.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCObjectWriter.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/MC/MCValue.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/raw_ostream.h" +using namespace llvm_ks; + +#define DEBUG_TYPE "mcexpr" + + +void MCExpr::print(raw_ostream &OS, const MCAsmInfo *MAI) const { + switch (getKind()) { + case MCExpr::Target: + return cast(this)->printImpl(OS, MAI); + case MCExpr::Constant: + OS << cast(*this).getValue(); + return; + + case MCExpr::SymbolRef: { + const MCSymbolRefExpr &SRE = cast(*this); + const MCSymbol &Sym = SRE.getSymbol(); + // Parenthesize names that start with $ so that they don't look like + // absolute names. + bool UseParens = Sym.getName().size() && Sym.getName()[0] == '$'; + if (UseParens) { + OS << '('; + Sym.print(OS, MAI); + OS << ')'; + } else + Sym.print(OS, MAI); + + if (SRE.getKind() != MCSymbolRefExpr::VK_None) + SRE.printVariantKind(OS); + + return; + } + + case MCExpr::Unary: { + const MCUnaryExpr &UE = cast(*this); + switch (UE.getOpcode()) { + case MCUnaryExpr::LNot: OS << '!'; break; + case MCUnaryExpr::Minus: OS << '-'; break; + case MCUnaryExpr::Not: OS << '~'; break; + case MCUnaryExpr::Plus: OS << '+'; break; + } + UE.getSubExpr()->print(OS, MAI); + return; + } + + case MCExpr::Binary: { + const MCBinaryExpr &BE = cast(*this); + + // Only print parens around the LHS if it is non-trivial. + if (isa(BE.getLHS()) || isa(BE.getLHS())) { + BE.getLHS()->print(OS, MAI); + } else { + OS << '('; + BE.getLHS()->print(OS, MAI); + OS << ')'; + } + + switch (BE.getOpcode()) { + case MCBinaryExpr::Add: + // Print "X-42" instead of "X+-42". + if (const MCConstantExpr *RHSC = dyn_cast(BE.getRHS())) { + if (RHSC->getValue() < 0) { + OS << RHSC->getValue(); + return; + } + } + + OS << '+'; + break; + case MCBinaryExpr::AShr: OS << ">>"; break; + case MCBinaryExpr::And: OS << '&'; break; + case MCBinaryExpr::Div: OS << '/'; break; + case MCBinaryExpr::EQ: OS << "=="; break; + case MCBinaryExpr::GT: OS << '>'; break; + case MCBinaryExpr::GTE: OS << ">="; break; + case MCBinaryExpr::LAnd: OS << "&&"; break; + case MCBinaryExpr::LOr: OS << "||"; break; + case MCBinaryExpr::LShr: OS << ">>"; break; + case MCBinaryExpr::LT: OS << '<'; break; + case MCBinaryExpr::LTE: OS << "<="; break; + case MCBinaryExpr::Mod: OS << '%'; break; + case MCBinaryExpr::Mul: OS << '*'; break; + case MCBinaryExpr::NE: OS << "!="; break; + case MCBinaryExpr::Or: OS << '|'; break; + case MCBinaryExpr::Shl: OS << "<<"; break; + case MCBinaryExpr::Sub: OS << '-'; break; + case MCBinaryExpr::Xor: OS << '^'; break; + } + + // Only print parens around the LHS if it is non-trivial. + if (isa(BE.getRHS()) || isa(BE.getRHS())) { + BE.getRHS()->print(OS, MAI); + } else { + OS << '('; + BE.getRHS()->print(OS, MAI); + OS << ')'; + } + return; + } + } + + llvm_unreachable("Invalid expression kind!"); +} + +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +LLVM_DUMP_METHOD void MCExpr::dump() const { +} +#endif + +/* *** */ + +const MCBinaryExpr *MCBinaryExpr::create(Opcode Opc, const MCExpr *LHS, + const MCExpr *RHS, MCContext &Ctx) { + return new (Ctx) MCBinaryExpr(Opc, LHS, RHS); +} + +const MCUnaryExpr *MCUnaryExpr::create(Opcode Opc, const MCExpr *Expr, + MCContext &Ctx) { + return new (Ctx) MCUnaryExpr(Opc, Expr); +} + +const MCConstantExpr *MCConstantExpr::create(int64_t Value, MCContext &Ctx) { + return new (Ctx) MCConstantExpr(Value); +} + +/* *** */ + +MCSymbolRefExpr::MCSymbolRefExpr(const MCSymbol *Symbol, VariantKind Kind, + const MCAsmInfo *MAI) + : MCExpr(MCExpr::SymbolRef), Kind(Kind), + UseParensForSymbolVariant(MAI->useParensForSymbolVariant()), + HasSubsectionsViaSymbols(MAI->hasSubsectionsViaSymbols()), + Symbol(Symbol) { + assert(Symbol); +} + +const MCSymbolRefExpr *MCSymbolRefExpr::create(const MCSymbol *Sym, + VariantKind Kind, + MCContext &Ctx) { + return new (Ctx) MCSymbolRefExpr(Sym, Kind, Ctx.getAsmInfo()); +} + +const MCSymbolRefExpr *MCSymbolRefExpr::create(StringRef Name, VariantKind Kind, + MCContext &Ctx) { + return create(Ctx.getOrCreateSymbol(Name), Kind, Ctx); +} + +StringRef MCSymbolRefExpr::getVariantKindName(VariantKind Kind) { + switch (Kind) { + case VK_Invalid: return "<>"; + case VK_None: return "<>"; + + case VK_GOT: return "GOT"; + case VK_GOTOFF: return "GOTOFF"; + case VK_GOTPCREL: return "GOTPCREL"; + case VK_GOTTPOFF: return "GOTTPOFF"; + case VK_INDNTPOFF: return "INDNTPOFF"; + case VK_NTPOFF: return "NTPOFF"; + case VK_GOTNTPOFF: return "GOTNTPOFF"; + case VK_PLT: return "PLT"; + case VK_TLSGD: return "TLSGD"; + case VK_TLSLD: return "TLSLD"; + case VK_TLSLDM: return "TLSLDM"; + case VK_TPOFF: return "TPOFF"; + case VK_DTPOFF: return "DTPOFF"; + case VK_TLVP: return "TLVP"; + case VK_TLVPPAGE: return "TLVPPAGE"; + case VK_TLVPPAGEOFF: return "TLVPPAGEOFF"; + case VK_PAGE: return "PAGE"; + case VK_PAGEOFF: return "PAGEOFF"; + case VK_GOTPAGE: return "GOTPAGE"; + case VK_GOTPAGEOFF: return "GOTPAGEOFF"; + case VK_SECREL: return "SECREL32"; + case VK_SIZE: return "SIZE"; + case VK_WEAKREF: return "WEAKREF"; + case VK_ARM_NONE: return "none"; + case VK_ARM_GOT_PREL: return "GOT_PREL"; + case VK_ARM_TARGET1: return "target1"; + case VK_ARM_TARGET2: return "target2"; + case VK_ARM_PREL31: return "prel31"; + case VK_ARM_SBREL: return "sbrel"; + case VK_ARM_TLSLDO: return "tlsldo"; + case VK_ARM_TLSCALL: return "tlscall"; + case VK_ARM_TLSDESC: return "tlsdesc"; + case VK_ARM_TLSDESCSEQ: return "tlsdescseq"; + case VK_PPC_LO: return "l"; + case VK_PPC_HI: return "h"; + case VK_PPC_HA: return "ha"; + case VK_PPC_HIGHER: return "higher"; + case VK_PPC_HIGHERA: return "highera"; + case VK_PPC_HIGHEST: return "highest"; + case VK_PPC_HIGHESTA: return "highesta"; + case VK_PPC_GOT_LO: return "got@l"; + case VK_PPC_GOT_HI: return "got@h"; + case VK_PPC_GOT_HA: return "got@ha"; + case VK_PPC_TOCBASE: return "tocbase"; + case VK_PPC_TOC: return "toc"; + case VK_PPC_TOC_LO: return "toc@l"; + case VK_PPC_TOC_HI: return "toc@h"; + case VK_PPC_TOC_HA: return "toc@ha"; + case VK_PPC_DTPMOD: return "dtpmod"; + case VK_PPC_TPREL: return "tprel"; + case VK_PPC_TPREL_LO: return "tprel@l"; + case VK_PPC_TPREL_HI: return "tprel@h"; + case VK_PPC_TPREL_HA: return "tprel@ha"; + case VK_PPC_TPREL_HIGHER: return "tprel@higher"; + case VK_PPC_TPREL_HIGHERA: return "tprel@highera"; + case VK_PPC_TPREL_HIGHEST: return "tprel@highest"; + case VK_PPC_TPREL_HIGHESTA: return "tprel@highesta"; + case VK_PPC_DTPREL: return "dtprel"; + case VK_PPC_DTPREL_LO: return "dtprel@l"; + case VK_PPC_DTPREL_HI: return "dtprel@h"; + case VK_PPC_DTPREL_HA: return "dtprel@ha"; + case VK_PPC_DTPREL_HIGHER: return "dtprel@higher"; + case VK_PPC_DTPREL_HIGHERA: return "dtprel@highera"; + case VK_PPC_DTPREL_HIGHEST: return "dtprel@highest"; + case VK_PPC_DTPREL_HIGHESTA: return "dtprel@highesta"; + case VK_PPC_GOT_TPREL: return "got@tprel"; + case VK_PPC_GOT_TPREL_LO: return "got@tprel@l"; + case VK_PPC_GOT_TPREL_HI: return "got@tprel@h"; + case VK_PPC_GOT_TPREL_HA: return "got@tprel@ha"; + case VK_PPC_GOT_DTPREL: return "got@dtprel"; + case VK_PPC_GOT_DTPREL_LO: return "got@dtprel@l"; + case VK_PPC_GOT_DTPREL_HI: return "got@dtprel@h"; + case VK_PPC_GOT_DTPREL_HA: return "got@dtprel@ha"; + case VK_PPC_TLS: return "tls"; + case VK_PPC_GOT_TLSGD: return "got@tlsgd"; + case VK_PPC_GOT_TLSGD_LO: return "got@tlsgd@l"; + case VK_PPC_GOT_TLSGD_HI: return "got@tlsgd@h"; + case VK_PPC_GOT_TLSGD_HA: return "got@tlsgd@ha"; + case VK_PPC_TLSGD: return "tlsgd"; + case VK_PPC_GOT_TLSLD: return "got@tlsld"; + case VK_PPC_GOT_TLSLD_LO: return "got@tlsld@l"; + case VK_PPC_GOT_TLSLD_HI: return "got@tlsld@h"; + case VK_PPC_GOT_TLSLD_HA: return "got@tlsld@ha"; + case VK_PPC_TLSLD: return "tlsld"; + case VK_PPC_LOCAL: return "local"; + case VK_Mips_GPREL: return "GPREL"; + case VK_Mips_GOT_CALL: return "GOT_CALL"; + case VK_Mips_GOT16: return "GOT16"; + case VK_Mips_GOT: return "GOT"; + case VK_Mips_ABS_HI: return "ABS_HI"; + case VK_Mips_ABS_LO: return "ABS_LO"; + case VK_Mips_TLSGD: return "TLSGD"; + case VK_Mips_TLSLDM: return "TLSLDM"; + case VK_Mips_DTPREL_HI: return "DTPREL_HI"; + case VK_Mips_DTPREL_LO: return "DTPREL_LO"; + case VK_Mips_GOTTPREL: return "GOTTPREL"; + case VK_Mips_TPREL_HI: return "TPREL_HI"; + case VK_Mips_TPREL_LO: return "TPREL_LO"; + case VK_Mips_GPOFF_HI: return "GPOFF_HI"; + case VK_Mips_GPOFF_LO: return "GPOFF_LO"; + case VK_Mips_GOT_DISP: return "GOT_DISP"; + case VK_Mips_GOT_PAGE: return "GOT_PAGE"; + case VK_Mips_GOT_OFST: return "GOT_OFST"; + case VK_Mips_HIGHER: return "HIGHER"; + case VK_Mips_HIGHEST: return "HIGHEST"; + case VK_Mips_GOT_HI16: return "GOT_HI16"; + case VK_Mips_GOT_LO16: return "GOT_LO16"; + case VK_Mips_CALL_HI16: return "CALL_HI16"; + case VK_Mips_CALL_LO16: return "CALL_LO16"; + case VK_Mips_PCREL_HI16: return "PCREL_HI16"; + case VK_Mips_PCREL_LO16: return "PCREL_LO16"; + case VK_COFF_IMGREL32: return "IMGREL"; + case VK_Hexagon_PCREL: return "PCREL"; + case VK_Hexagon_LO16: return "LO16"; + case VK_Hexagon_HI16: return "HI16"; + case VK_Hexagon_GPREL: return "GPREL"; + case VK_Hexagon_GD_GOT: return "GDGOT"; + case VK_Hexagon_LD_GOT: return "LDGOT"; + case VK_Hexagon_GD_PLT: return "GDPLT"; + case VK_Hexagon_LD_PLT: return "LDPLT"; + case VK_Hexagon_IE: return "IE"; + case VK_Hexagon_IE_GOT: return "IEGOT"; + case VK_WebAssembly_FUNCTION: return "FUNCTION"; + case VK_TPREL: return "tprel"; + case VK_DTPREL: return "dtprel"; + } + llvm_unreachable("Invalid variant kind"); +} + +MCSymbolRefExpr::VariantKind +MCSymbolRefExpr::getVariantKindForName(StringRef Name) { + return StringSwitch(Name.lower()) + .Case("got", VK_GOT) + .Case("gotoff", VK_GOTOFF) + .Case("gotpcrel", VK_GOTPCREL) + .Case("gottpoff", VK_GOTTPOFF) + .Case("indntpoff", VK_INDNTPOFF) + .Case("ntpoff", VK_NTPOFF) + .Case("gotntpoff", VK_GOTNTPOFF) + .Case("plt", VK_PLT) + .Case("tlsgd", VK_TLSGD) + .Case("tlsld", VK_TLSLD) + .Case("tlsldm", VK_TLSLDM) + .Case("tpoff", VK_TPOFF) + .Case("dtpoff", VK_DTPOFF) + .Case("tlvp", VK_TLVP) + .Case("tlvppage", VK_TLVPPAGE) + .Case("tlvppageoff", VK_TLVPPAGEOFF) + .Case("page", VK_PAGE) + .Case("pageoff", VK_PAGEOFF) + .Case("gotpage", VK_GOTPAGE) + .Case("gotpageoff", VK_GOTPAGEOFF) + .Case("imgrel", VK_COFF_IMGREL32) + .Case("secrel32", VK_SECREL) + .Case("size", VK_SIZE) + .Case("l", VK_PPC_LO) + .Case("h", VK_PPC_HI) + .Case("ha", VK_PPC_HA) + .Case("higher", VK_PPC_HIGHER) + .Case("highera", VK_PPC_HIGHERA) + .Case("highest", VK_PPC_HIGHEST) + .Case("highesta", VK_PPC_HIGHESTA) + .Case("got@l", VK_PPC_GOT_LO) + .Case("got@h", VK_PPC_GOT_HI) + .Case("got@ha", VK_PPC_GOT_HA) + .Case("local", VK_PPC_LOCAL) + .Case("tocbase", VK_PPC_TOCBASE) + .Case("toc", VK_PPC_TOC) + .Case("toc@l", VK_PPC_TOC_LO) + .Case("toc@h", VK_PPC_TOC_HI) + .Case("toc@ha", VK_PPC_TOC_HA) + .Case("tls", VK_PPC_TLS) + .Case("dtpmod", VK_PPC_DTPMOD) + .Case("tprel", VK_PPC_TPREL) + .Case("tprel@l", VK_PPC_TPREL_LO) + .Case("tprel@h", VK_PPC_TPREL_HI) + .Case("tprel@ha", VK_PPC_TPREL_HA) + .Case("tprel@higher", VK_PPC_TPREL_HIGHER) + .Case("tprel@highera", VK_PPC_TPREL_HIGHERA) + .Case("tprel@highest", VK_PPC_TPREL_HIGHEST) + .Case("tprel@highesta", VK_PPC_TPREL_HIGHESTA) + .Case("dtprel", VK_PPC_DTPREL) + .Case("dtprel@l", VK_PPC_DTPREL_LO) + .Case("dtprel@h", VK_PPC_DTPREL_HI) + .Case("dtprel@ha", VK_PPC_DTPREL_HA) + .Case("dtprel@higher", VK_PPC_DTPREL_HIGHER) + .Case("dtprel@highera", VK_PPC_DTPREL_HIGHERA) + .Case("dtprel@highest", VK_PPC_DTPREL_HIGHEST) + .Case("dtprel@highesta", VK_PPC_DTPREL_HIGHESTA) + .Case("got@tprel", VK_PPC_GOT_TPREL) + .Case("got@tprel@l", VK_PPC_GOT_TPREL_LO) + .Case("got@tprel@h", VK_PPC_GOT_TPREL_HI) + .Case("got@tprel@ha", VK_PPC_GOT_TPREL_HA) + .Case("got@dtprel", VK_PPC_GOT_DTPREL) + .Case("got@dtprel@l", VK_PPC_GOT_DTPREL_LO) + .Case("got@dtprel@h", VK_PPC_GOT_DTPREL_HI) + .Case("got@dtprel@ha", VK_PPC_GOT_DTPREL_HA) + .Case("got@tlsgd", VK_PPC_GOT_TLSGD) + .Case("got@tlsgd@l", VK_PPC_GOT_TLSGD_LO) + .Case("got@tlsgd@h", VK_PPC_GOT_TLSGD_HI) + .Case("got@tlsgd@ha", VK_PPC_GOT_TLSGD_HA) + .Case("got@tlsld", VK_PPC_GOT_TLSLD) + .Case("got@tlsld@l", VK_PPC_GOT_TLSLD_LO) + .Case("got@tlsld@h", VK_PPC_GOT_TLSLD_HI) + .Case("got@tlsld@ha", VK_PPC_GOT_TLSLD_HA) + .Case("gdgot", VK_Hexagon_GD_GOT) + .Case("gdplt", VK_Hexagon_GD_PLT) + .Case("iegot", VK_Hexagon_IE_GOT) + .Case("ie", VK_Hexagon_IE) + .Case("ldgot", VK_Hexagon_LD_GOT) + .Case("ldplt", VK_Hexagon_LD_PLT) + .Case("pcrel", VK_Hexagon_PCREL) + .Case("none", VK_ARM_NONE) + .Case("got_prel", VK_ARM_GOT_PREL) + .Case("target1", VK_ARM_TARGET1) + .Case("target2", VK_ARM_TARGET2) + .Case("prel31", VK_ARM_PREL31) + .Case("sbrel", VK_ARM_SBREL) + .Case("tlsldo", VK_ARM_TLSLDO) + .Case("tlscall", VK_ARM_TLSCALL) + .Case("tlsdesc", VK_ARM_TLSDESC) + .Default(VK_Invalid); +} + +void MCSymbolRefExpr::printVariantKind(raw_ostream &OS) const { + if (UseParensForSymbolVariant) + OS << '(' << MCSymbolRefExpr::getVariantKindName(getKind()) << ')'; + else + OS << '@' << MCSymbolRefExpr::getVariantKindName(getKind()); +} + +/* *** */ + +bool MCExpr::evaluateAsAbsolute(int64_t &Res) const { + return evaluateAsAbsolute(Res, nullptr, nullptr, nullptr); +} + +bool MCExpr::evaluateAsAbsolute(int64_t &Res, + const MCAsmLayout &Layout) const { + return evaluateAsAbsolute(Res, &Layout.getAssembler(), &Layout, nullptr); +} + +bool MCExpr::evaluateAsAbsolute(int64_t &Res, + const MCAsmLayout &Layout, + const SectionAddrMap &Addrs) const { + return evaluateAsAbsolute(Res, &Layout.getAssembler(), &Layout, &Addrs); +} + +bool MCExpr::evaluateAsAbsolute(int64_t &Res, const MCAssembler &Asm) const { + return evaluateAsAbsolute(Res, &Asm, nullptr, nullptr); +} + +bool MCExpr::evaluateKnownAbsolute(int64_t &Res, + const MCAsmLayout &Layout) const { + return evaluateAsAbsolute(Res, &Layout.getAssembler(), &Layout, nullptr, + true); +} + +bool MCExpr::evaluateAsAbsolute(int64_t &Res, const MCAssembler *Asm, + const MCAsmLayout *Layout, + const SectionAddrMap *Addrs) const { + // FIXME: The use if InSet = Addrs is a hack. Setting InSet causes us + // absolutize differences across sections and that is what the MachO writer + // uses Addrs for. + return evaluateAsAbsolute(Res, Asm, Layout, Addrs, Addrs); +} + +bool MCExpr::evaluateAsAbsolute(int64_t &Res, const MCAssembler *Asm, + const MCAsmLayout *Layout, + const SectionAddrMap *Addrs, bool InSet) const +{ + MCValue Value; + + // Fast path constants. + if (const MCConstantExpr *CE = dyn_cast(this)) { + Res = CE->getValue(); + return true; + } + + bool valid; + bool IsRelocatable = + evaluateAsRelocatableImpl(Value, Asm, Layout, nullptr, Addrs, InSet, valid); + + // Record the current value. + Res = Value.getConstant(); + + return IsRelocatable && Value.isAbsolute(); +} + +/// \brief Helper method for \see EvaluateSymbolAdd(). +static void AttemptToFoldSymbolOffsetDifference( + const MCAssembler *Asm, const MCAsmLayout *Layout, + const SectionAddrMap *Addrs, bool InSet, const MCSymbolRefExpr *&A, + const MCSymbolRefExpr *&B, int64_t &Addend, bool &valid) { + valid = true; + if (!A || !B) + return; + + const MCSymbol &SA = A->getSymbol(); + const MCSymbol &SB = B->getSymbol(); + + if (SA.isUndefined() || SB.isUndefined()) + return; + + if (!Asm->getWriter().isSymbolRefDifferenceFullyResolved(*Asm, A, B, InSet, valid)) + return; + if (!valid) + return; + + if (SA.getFragment() == SB.getFragment() && !SA.isVariable() && + !SB.isVariable()) { + Addend += (SA.getOffset() - SB.getOffset()); + + // Pointers to Thumb symbols need to have their low-bit set to allow + // for interworking. + if (Asm->isThumbFunc(&SA)) + Addend |= 1; + + // Clear the symbol expr pointers to indicate we have folded these + // operands. + A = B = nullptr; + return; + } + + if (!Layout) + return; + + const MCSection &SecA = *SA.getFragment()->getParent(); + const MCSection &SecB = *SB.getFragment()->getParent(); + + if ((&SecA != &SecB) && !Addrs) + return; + + // Eagerly evaluate. + bool valid1, valid2; + Addend += Layout->getSymbolOffset(A->getSymbol(), valid1) - + Layout->getSymbolOffset(B->getSymbol(), valid2); + if (Addrs && (&SecA != &SecB)) + Addend += (Addrs->lookup(&SecA) - Addrs->lookup(&SecB)); + + // Pointers to Thumb symbols need to have their low-bit set to allow + // for interworking. + if (Asm->isThumbFunc(&SA)) + Addend |= 1; + + // Clear the symbol expr pointers to indicate we have folded these + // operands. + A = B = nullptr; +} + +/// \brief Evaluate the result of an add between (conceptually) two MCValues. +/// +/// This routine conceptually attempts to construct an MCValue: +/// Result = (Result_A - Result_B + Result_Cst) +/// from two MCValue's LHS and RHS where +/// Result = LHS + RHS +/// and +/// Result = (LHS_A - LHS_B + LHS_Cst) + (RHS_A - RHS_B + RHS_Cst). +/// +/// This routine attempts to aggresively fold the operands such that the result +/// is representable in an MCValue, but may not always succeed. +/// +/// \returns True on success, false if the result is not representable in an +/// MCValue. + +/// NOTE: It is really important to have both the Asm and Layout arguments. +/// They might look redundant, but this function can be used before layout +/// is done (see the object streamer for example) and having the Asm argument +/// lets us avoid relaxations early. +static bool +EvaluateSymbolicAdd(const MCAssembler *Asm, const MCAsmLayout *Layout, + const SectionAddrMap *Addrs, bool InSet, const MCValue &LHS, + const MCSymbolRefExpr *RHS_A, const MCSymbolRefExpr *RHS_B, + int64_t RHS_Cst, MCValue &Res, bool &valid) +{ + // FIXME: This routine (and other evaluation parts) are *incredibly* sloppy + // about dealing with modifiers. This will ultimately bite us, one day. + const MCSymbolRefExpr *LHS_A = LHS.getSymA(); + const MCSymbolRefExpr *LHS_B = LHS.getSymB(); + int64_t LHS_Cst = LHS.getConstant(); + + // Fold the result constant immediately. + int64_t Result_Cst = LHS_Cst + RHS_Cst; + + assert((!Layout || Asm) && + "Must have an assembler object if layout is given!"); + + // If we have a layout, we can fold resolved differences. + if (Asm) { + // First, fold out any differences which are fully resolved. By + // reassociating terms in + // Result = (LHS_A - LHS_B + LHS_Cst) + (RHS_A - RHS_B + RHS_Cst). + // we have the four possible differences: + // (LHS_A - LHS_B), + // (LHS_A - RHS_B), + // (RHS_A - LHS_B), + // (RHS_A - RHS_B). + // Since we are attempting to be as aggressive as possible about folding, we + // attempt to evaluate each possible alternative. + AttemptToFoldSymbolOffsetDifference(Asm, Layout, Addrs, InSet, LHS_A, LHS_B, + Result_Cst, valid); + if (!valid) + return false; + AttemptToFoldSymbolOffsetDifference(Asm, Layout, Addrs, InSet, LHS_A, RHS_B, + Result_Cst, valid); + if (!valid) + return false; + AttemptToFoldSymbolOffsetDifference(Asm, Layout, Addrs, InSet, RHS_A, LHS_B, + Result_Cst, valid); + if (!valid) + return false; + AttemptToFoldSymbolOffsetDifference(Asm, Layout, Addrs, InSet, RHS_A, RHS_B, + Result_Cst, valid); + if (!valid) + return false; + } + + // We can't represent the addition or subtraction of two symbols. + if ((LHS_A && RHS_A) || (LHS_B && RHS_B)) + return false; + + // At this point, we have at most one additive symbol and one subtractive + // symbol -- find them. + const MCSymbolRefExpr *A = LHS_A ? LHS_A : RHS_A; + const MCSymbolRefExpr *B = LHS_B ? LHS_B : RHS_B; + + Res = MCValue::get(A, B, Result_Cst); + return true; +} + +bool MCExpr::evaluateAsRelocatable(MCValue &Res, + const MCAsmLayout *Layout, + const MCFixup *Fixup) const +{ + MCAssembler *Assembler = Layout ? &Layout->getAssembler() : nullptr; + bool valid; + return evaluateAsRelocatableImpl(Res, Assembler, Layout, Fixup, nullptr, + false, valid); +} + +bool MCExpr::evaluateAsValue(MCValue &Res, const MCAsmLayout &Layout) const +{ + MCAssembler *Assembler = &Layout.getAssembler(); + bool valid; + return evaluateAsRelocatableImpl(Res, Assembler, &Layout, nullptr, nullptr, + true, valid); +} + +static bool canExpand(const MCSymbol &Sym, bool InSet) { + const MCExpr *Expr = Sym.getVariableValue(); + const auto *Inner = dyn_cast(Expr); + if (Inner) { + if (Inner->getKind() == MCSymbolRefExpr::VK_WEAKREF) + return false; + } + + if (InSet) + return true; + return !Sym.isInSection(); +} + +bool MCExpr::evaluateAsRelocatableImpl(MCValue &Res, const MCAssembler *Asm, + const MCAsmLayout *Layout, + const MCFixup *Fixup, + const SectionAddrMap *Addrs, + bool InSet, bool &valid) const +{ + switch (getKind()) { + case Target: + return cast(this)->evaluateAsRelocatableImpl(Res, Layout, + Fixup); + + case Constant: + Res = MCValue::get(cast(this)->getValue()); + return true; + + case SymbolRef: { + const MCSymbolRefExpr *SRE = cast(this); + const MCSymbol &Sym = SRE->getSymbol(); + + // Evaluate recursively if this is a variable. + if (Sym.isVariable() && SRE->getKind() == MCSymbolRefExpr::VK_None && + canExpand(Sym, InSet)) { + bool IsMachO = SRE->hasSubsectionsViaSymbols(); + bool valid; + if (Sym.getVariableValue()->evaluateAsRelocatableImpl( + Res, Asm, Layout, Fixup, Addrs, InSet || IsMachO, valid)) { + if (!IsMachO) + return true; + + const MCSymbolRefExpr *A = Res.getSymA(); + const MCSymbolRefExpr *B = Res.getSymB(); + // FIXME: This is small hack. Given + // a = b + 4 + // .long a + // the OS X assembler will completely drop the 4. We should probably + // include it in the relocation or produce an error if that is not + // possible. + if (!A && !B) + return true; + } + } + + Res = MCValue::get(SRE, nullptr, 0); + return true; + } + + case Unary: { + const MCUnaryExpr *AUE = cast(this); + MCValue Value; + + bool valid; + if (!AUE->getSubExpr()->evaluateAsRelocatableImpl(Value, Asm, Layout, Fixup, + Addrs, InSet, valid)) + return false; + + switch (AUE->getOpcode()) { + case MCUnaryExpr::LNot: + if (!Value.isAbsolute()) + return false; + Res = MCValue::get(!Value.getConstant()); + break; + case MCUnaryExpr::Minus: + /// -(a - b + const) ==> (b - a - const) + if (Value.getSymA() && !Value.getSymB()) + return false; + Res = MCValue::get(Value.getSymB(), Value.getSymA(), + -Value.getConstant()); + break; + case MCUnaryExpr::Not: + if (!Value.isAbsolute()) + return false; + Res = MCValue::get(~Value.getConstant()); + break; + case MCUnaryExpr::Plus: + Res = Value; + break; + } + + return true; + } + + case Binary: { + const MCBinaryExpr *ABE = cast(this); + MCValue LHSValue, RHSValue; + bool valid; + + if (!ABE->getLHS()->evaluateAsRelocatableImpl(LHSValue, Asm, Layout, Fixup, + Addrs, InSet, valid) || + !ABE->getRHS()->evaluateAsRelocatableImpl(RHSValue, Asm, Layout, Fixup, + Addrs, InSet, valid)) + return false; + + // We only support a few operations on non-constant expressions, handle + // those first. + if (!LHSValue.isAbsolute() || !RHSValue.isAbsolute()) { + switch (ABE->getOpcode()) { + default: + return false; + case MCBinaryExpr::Sub: + // Negate RHS and add. + return EvaluateSymbolicAdd(Asm, Layout, Addrs, InSet, LHSValue, + RHSValue.getSymB(), RHSValue.getSymA(), + -RHSValue.getConstant(), Res, valid); + + case MCBinaryExpr::Add: + return EvaluateSymbolicAdd(Asm, Layout, Addrs, InSet, LHSValue, + RHSValue.getSymA(), RHSValue.getSymB(), + RHSValue.getConstant(), Res, valid); + } + } + + // FIXME: We need target hooks for the evaluation. It may be limited in + // width, and gas defines the result of comparisons differently from + // Apple as. + int64_t LHS = LHSValue.getConstant(), RHS = RHSValue.getConstant(); + int64_t Result = 0; + switch (ABE->getOpcode()) { + case MCBinaryExpr::AShr: Result = LHS >> RHS; break; + case MCBinaryExpr::Add: Result = LHS + RHS; break; + case MCBinaryExpr::And: Result = LHS & RHS; break; + case MCBinaryExpr::Div: + // Handle division by zero. gas just emits a warning and keeps going, + // we try to be stricter. + // FIXME: Currently the caller of this function has no way to understand + // we're bailing out because of 'division by zero'. Therefore, it will + // emit a 'expected relocatable expression' error. It would be nice to + // change this code to emit a better diagnostic. + if (RHS == 0) + return false; + Result = LHS / RHS; + break; + case MCBinaryExpr::EQ: Result = LHS == RHS; break; + case MCBinaryExpr::GT: Result = LHS > RHS; break; + case MCBinaryExpr::GTE: Result = LHS >= RHS; break; + case MCBinaryExpr::LAnd: Result = LHS && RHS; break; + case MCBinaryExpr::LOr: Result = LHS || RHS; break; + case MCBinaryExpr::LShr: Result = uint64_t(LHS) >> uint64_t(RHS); break; + case MCBinaryExpr::LT: Result = LHS < RHS; break; + case MCBinaryExpr::LTE: Result = LHS <= RHS; break; + case MCBinaryExpr::Mod: + // Handle division by zero. gas just emits a warning and keeps going, + // we try to be stricter. + // FIXME: Currently the caller of this function has no way to understand + // we're bailing out because of 'division by zero'. Therefore, it will + // emit a 'expected relocatable expression' error. It would be nice to + // change this code to emit a better diagnostic. + if (RHS == 0) + return false; + Result = LHS % RHS; + break; + case MCBinaryExpr::Mul: Result = LHS * RHS; break; + case MCBinaryExpr::NE: Result = LHS != RHS; break; + case MCBinaryExpr::Or: Result = LHS | RHS; break; + case MCBinaryExpr::Shl: Result = uint64_t(LHS) << uint64_t(RHS); break; + case MCBinaryExpr::Sub: Result = LHS - RHS; break; + case MCBinaryExpr::Xor: Result = LHS ^ RHS; break; + } + + Res = MCValue::get(Result); + return true; + } + } + + llvm_unreachable("Invalid assembly expression kind!"); +} + +MCFragment *MCExpr::findAssociatedFragment() const { + switch (getKind()) { + case Target: + // We never look through target specific expressions. + return cast(this)->findAssociatedFragment(); + + case Constant: + return MCSymbol::AbsolutePseudoFragment; + + case SymbolRef: { + const MCSymbolRefExpr *SRE = cast(this); + const MCSymbol &Sym = SRE->getSymbol(); + return Sym.getFragment(); + } + + case Unary: + return cast(this)->getSubExpr()->findAssociatedFragment(); + + case Binary: { + const MCBinaryExpr *BE = cast(this); + MCFragment *LHS_F = BE->getLHS()->findAssociatedFragment(); + MCFragment *RHS_F = BE->getRHS()->findAssociatedFragment(); + + // If either is absolute, return the other. + if (LHS_F == MCSymbol::AbsolutePseudoFragment) + return RHS_F; + if (RHS_F == MCSymbol::AbsolutePseudoFragment) + return LHS_F; + + // Not always correct, but probably the best we can do without more context. + if (BE->getOpcode() == MCBinaryExpr::Sub) + return MCSymbol::AbsolutePseudoFragment; + + // Otherwise, return the first non-null fragment. + return LHS_F ? LHS_F : RHS_F; + } + } + + llvm_unreachable("Invalid assembly expression kind!"); +} diff --git a/llvm/lib/MC/MCFragment.cpp b/llvm/lib/MC/MCFragment.cpp new file mode 100644 index 0000000..80a90ee --- /dev/null +++ b/llvm/lib/MC/MCFragment.cpp @@ -0,0 +1,485 @@ +//===- lib/MC/MCFragment.cpp - Assembler Fragment Implementation ----------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCFragment.h" +#include "llvm/ADT/StringExtras.h" +#include "llvm/ADT/Twine.h" +#include "llvm/MC/MCAsmBackend.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCAsmLayout.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCDwarf.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCFixupKindInfo.h" +#include "llvm/MC/MCSection.h" +#include "llvm/MC/MCSectionELF.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/MC/MCValue.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/LEB128.h" +#include "llvm/Support/TargetRegistry.h" +#include "llvm/Support/raw_ostream.h" +#include +using namespace llvm_ks; + +MCAsmLayout::MCAsmLayout(MCAssembler &Asm) + : Assembler(Asm), LastValidFragment() + { + // Compute the section layout order. Virtual sections must go last. + for (MCSection &Sec : Asm) + if (!Sec.isVirtualSection()) + SectionOrder.push_back(&Sec); + for (MCSection &Sec : Asm) + if (Sec.isVirtualSection()) + SectionOrder.push_back(&Sec); +} + +bool MCAsmLayout::isFragmentValid(const MCFragment *F) const { + const MCSection *Sec = F->getParent(); + const MCFragment *LastValid = LastValidFragment.lookup(Sec); + if (!LastValid) + return false; + assert(LastValid->getParent() == Sec); + return F->getLayoutOrder() <= LastValid->getLayoutOrder(); +} + +void MCAsmLayout::invalidateFragmentsFrom(MCFragment *F) { + // If this fragment wasn't already valid, we don't need to do anything. + if (!isFragmentValid(F)) + return; + + // Otherwise, reset the last valid fragment to the previous fragment + // (if this is the first fragment, it will be NULL). + LastValidFragment[F->getParent()] = F->getPrevNode(); +} + +bool MCAsmLayout::ensureValid(const MCFragment *F) const +{ + MCSection *Sec = F->getParent(); + MCSection::iterator I; + if (MCFragment *Cur = LastValidFragment[Sec]) + I = ++MCSection::iterator(Cur); + else + I = Sec->begin(); + + // Advance the layout position until the fragment is valid. + while (!isFragmentValid(F)) { + //assert(I != Sec->end() && "Layout bookkeeping error"); + if (I == Sec->end()) + return false; + if (const_cast(this)->layoutFragment(&*I)) + return false; + ++I; + } + + return true; +} + +uint64_t MCAsmLayout::getFragmentOffset(const MCFragment *F, bool &valid) const +{ + valid = true; + if (!ensureValid(F)) { + valid = false; + return 0; + } + //assert(F->Offset != ~UINT64_C(0) && "Address not set!"); + if (F->Offset == ~UINT64_C(0)) { + valid = false; + return 0; + } + + return F->Offset; +} + +// Simple getSymbolOffset helper for the non-varibale case. +static bool getLabelOffset(const MCAsmLayout &Layout, const MCSymbol &S, + bool ReportError, uint64_t &Val) +{ + if (!S.getFragment()) { + if (ReportError) + report_fatal_error("unable to evaluate offset to undefined symbol '" + + S.getName() + "'"); + return false; + } + + bool valid; + Val = Layout.getFragmentOffset(S.getFragment(), valid) + S.getOffset(); + + return valid; +} + +static bool getSymbolOffsetImpl(const MCAsmLayout &Layout, const MCSymbol &S, + bool ReportError, uint64_t &Val, bool &valid) +{ + valid = true; + if (!S.isVariable()) + return getLabelOffset(Layout, S, ReportError, Val); + + // If SD is a variable, evaluate it. + MCValue Target; + if (!S.getVariableValue()->evaluateAsValue(Target, Layout)) { + //report_fatal_error("unable to evaluate offset for variable '" + + // S.getName() + "'"); + valid = false; + return false; + } + + uint64_t Offset = Target.getConstant(); + + const MCSymbolRefExpr *A = Target.getSymA(); + if (A) { + uint64_t ValA; + if (!getLabelOffset(Layout, A->getSymbol(), ReportError, ValA)) + return false; + Offset += ValA; + } + + const MCSymbolRefExpr *B = Target.getSymB(); + if (B) { + uint64_t ValB; + if (!getLabelOffset(Layout, B->getSymbol(), ReportError, ValB)) + return false; + Offset -= ValB; + } + + Val = Offset; + return true; +} + +bool MCAsmLayout::getSymbolOffset(const MCSymbol &S, uint64_t &Val, bool &valid) const +{ + return getSymbolOffsetImpl(*this, S, false, Val, valid); +} + +uint64_t MCAsmLayout::getSymbolOffset(const MCSymbol &S, bool &valid) const +{ + uint64_t Val; + getSymbolOffsetImpl(*this, S, true, Val, valid); + return Val; +} + +const MCSymbol *MCAsmLayout::getBaseSymbol(const MCSymbol &Symbol) const { + if (!Symbol.isVariable()) + return &Symbol; + + const MCExpr *Expr = Symbol.getVariableValue(); + MCValue Value; + if (!Expr->evaluateAsValue(Value, *this)) { + Assembler.getContext().reportError( + SMLoc(), "expression could not be evaluated"); + return nullptr; + } + + const MCSymbolRefExpr *RefB = Value.getSymB(); + if (RefB) { + Assembler.getContext().reportError( + SMLoc(), Twine("symbol '") + RefB->getSymbol().getName() + + "' could not be evaluated in a subtraction expression"); + return nullptr; + } + + const MCSymbolRefExpr *A = Value.getSymA(); + if (!A) + return nullptr; + + const MCSymbol &ASym = A->getSymbol(); + const MCAssembler &Asm = getAssembler(); + if (ASym.isCommon()) { + // FIXME: we should probably add a SMLoc to MCExpr. + Asm.getContext().reportError(SMLoc(), + "Common symbol '" + ASym.getName() + + "' cannot be used in assignment expr"); + return nullptr; + } + + return &ASym; +} + +uint64_t MCAsmLayout::getSectionAddressSize(const MCSection *Sec) const +{ + // The size is the last fragment's end offset. + const MCFragment &F = Sec->getFragmentList().back(); + bool valid, valid2; + return getFragmentOffset(&F, valid2) + getAssembler().computeFragmentSize(*this, F, valid); +} + +uint64_t MCAsmLayout::getSectionFileSize(const MCSection *Sec) const { + // Virtual sections have no file size. + if (Sec->isVirtualSection()) + return 0; + + // Otherwise, the file size is the same as the address space size. + return getSectionAddressSize(Sec); +} + +uint64_t llvm_ks::computeBundlePadding(const MCAssembler &Assembler, + const MCFragment *F, + uint64_t FOffset, uint64_t FSize) { + uint64_t BundleSize = Assembler.getBundleAlignSize(); + assert(BundleSize > 0 && + "computeBundlePadding should only be called if bundling is enabled"); + uint64_t BundleMask = BundleSize - 1; + uint64_t OffsetInBundle = FOffset & BundleMask; + uint64_t EndOfFragment = OffsetInBundle + FSize; + + // There are two kinds of bundling restrictions: + // + // 1) For alignToBundleEnd(), add padding to ensure that the fragment will + // *end* on a bundle boundary. + // 2) Otherwise, check if the fragment would cross a bundle boundary. If it + // would, add padding until the end of the bundle so that the fragment + // will start in a new one. + if (F->alignToBundleEnd()) { + // Three possibilities here: + // + // A) The fragment just happens to end at a bundle boundary, so we're good. + // B) The fragment ends before the current bundle boundary: pad it just + // enough to reach the boundary. + // C) The fragment ends after the current bundle boundary: pad it until it + // reaches the end of the next bundle boundary. + // + // Note: this code could be made shorter with some modulo trickery, but it's + // intentionally kept in its more explicit form for simplicity. + if (EndOfFragment == BundleSize) + return 0; + else if (EndOfFragment < BundleSize) + return BundleSize - EndOfFragment; + else { // EndOfFragment > BundleSize + return 2 * BundleSize - EndOfFragment; + } + } else if (OffsetInBundle > 0 && EndOfFragment > BundleSize) + return BundleSize - OffsetInBundle; + else + return 0; +} + +/* *** */ + +void ilist_node_traits::deleteNode(MCFragment *V) { + V->destroy(); +} + +MCFragment::MCFragment() : Kind(FragmentType(~0)), HasInstructions(false), + AlignToBundleEnd(false), BundlePadding(0) { +} + +MCFragment::~MCFragment() { } + +MCFragment::MCFragment(FragmentType Kind, bool HasInstructions, + uint8_t BundlePadding, MCSection *Parent) + : Kind(Kind), HasInstructions(HasInstructions), AlignToBundleEnd(false), + BundlePadding(BundlePadding), Parent(Parent), Atom(nullptr), + Offset(~UINT64_C(0)) { + if (Parent && !isDummy()) + Parent->getFragmentList().push_back(this); +} + +void MCFragment::destroy() { + // First check if we are the sentinal. + if (Kind == FragmentType(~0)) { + delete this; + return; + } + + switch (Kind) { + case FT_Align: + delete cast(this); + return; + case FT_Data: + delete cast(this); + return; + case FT_CompactEncodedInst: + delete cast(this); + return; + case FT_Fill: + delete cast(this); + return; + case FT_Relaxable: + delete cast(this); + return; + case FT_Org: + delete cast(this); + return; + case FT_Dwarf: + delete cast(this); + return; + case FT_DwarfFrame: + delete cast(this); + return; + case FT_LEB: + delete cast(this); + return; + case FT_SafeSEH: + delete cast(this); + return; + case FT_Dummy: + delete cast(this); + return; + } +} + +/* *** */ + +// Debugging methods + +namespace llvm_ks { + +raw_ostream &operator<<(raw_ostream &OS, const MCFixup &AF) { + OS << ""; + return OS; +} + +} + +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +LLVM_DUMP_METHOD void MCFragment::dump() { + raw_ostream &OS = llvm_ks::errs(); + + OS << "<"; + switch (getKind()) { + case MCFragment::FT_Align: OS << "MCAlignFragment"; break; + case MCFragment::FT_Data: OS << "MCDataFragment"; break; + case MCFragment::FT_CompactEncodedInst: + OS << "MCCompactEncodedInstFragment"; break; + case MCFragment::FT_Fill: OS << "MCFillFragment"; break; + case MCFragment::FT_Relaxable: OS << "MCRelaxableFragment"; break; + case MCFragment::FT_Org: OS << "MCOrgFragment"; break; + case MCFragment::FT_Dwarf: OS << "MCDwarfFragment"; break; + case MCFragment::FT_DwarfFrame: OS << "MCDwarfCallFrameFragment"; break; + case MCFragment::FT_LEB: OS << "MCLEBFragment"; break; + case MCFragment::FT_SafeSEH: OS << "MCSafeSEHFragment"; break; + case MCFragment::FT_Dummy: + OS << "MCDummyFragment"; + break; + } + + OS << "(getBundlePadding()) << ">"; + + switch (getKind()) { + case MCFragment::FT_Align: { + const MCAlignFragment *AF = cast(this); + if (AF->hasEmitNops()) + OS << " (emit nops)"; + OS << "\n "; + OS << " Alignment:" << AF->getAlignment() + << " Value:" << AF->getValue() << " ValueSize:" << AF->getValueSize() + << " MaxBytesToEmit:" << AF->getMaxBytesToEmit() << ">"; + break; + } + case MCFragment::FT_Data: { + const MCDataFragment *DF = cast(this); + OS << "\n "; + OS << " Contents:["; + const SmallVectorImpl &Contents = DF->getContents(); + for (unsigned i = 0, e = Contents.size(); i != e; ++i) { + if (i) OS << ","; + OS << hexdigit((Contents[i] >> 4) & 0xF) << hexdigit(Contents[i] & 0xF); + } + OS << "] (" << Contents.size() << " bytes)"; + + if (DF->fixup_begin() != DF->fixup_end()) { + OS << ",\n "; + OS << " Fixups:["; + for (MCDataFragment::const_fixup_iterator it = DF->fixup_begin(), + ie = DF->fixup_end(); it != ie; ++it) { + if (it != DF->fixup_begin()) OS << ",\n "; + OS << *it; + } + OS << "]"; + } + break; + } + case MCFragment::FT_CompactEncodedInst: { + const MCCompactEncodedInstFragment *CEIF = + cast(this); + OS << "\n "; + OS << " Contents:["; + const SmallVectorImpl &Contents = CEIF->getContents(); + for (unsigned i = 0, e = Contents.size(); i != e; ++i) { + if (i) OS << ","; + OS << hexdigit((Contents[i] >> 4) & 0xF) << hexdigit(Contents[i] & 0xF); + } + OS << "] (" << Contents.size() << " bytes)"; + break; + } + case MCFragment::FT_Fill: { + const MCFillFragment *FF = cast(this); + OS << " Value:" << FF->getValue() << " Size:" << FF->getSize(); + break; + } + case MCFragment::FT_Relaxable: { + // const MCRelaxableFragment *F = cast(this); + OS << "\n "; + OS << " Inst:"; + break; + } + case MCFragment::FT_Org: { + const MCOrgFragment *OF = cast(this); + OS << "\n "; + OS << " Offset:" << OF->getOffset() << " Value:" << OF->getValue(); + break; + } + case MCFragment::FT_Dwarf: { + const MCDwarfLineAddrFragment *OF = cast(this); + OS << "\n "; + OS << " AddrDelta:" << OF->getAddrDelta() + << " LineDelta:" << OF->getLineDelta(); + break; + } + case MCFragment::FT_DwarfFrame: { + const MCDwarfCallFrameFragment *CF = cast(this); + OS << "\n "; + OS << " AddrDelta:" << CF->getAddrDelta(); + break; + } + case MCFragment::FT_LEB: { + const MCLEBFragment *LF = cast(this); + OS << "\n "; + OS << " Value:" << LF->getValue() << " Signed:" << LF->isSigned(); + break; + } + case MCFragment::FT_SafeSEH: { + const MCSafeSEHFragment *F = cast(this); + OS << "\n "; + OS << " Sym:" << F->getSymbol(); + break; + } + case MCFragment::FT_Dummy: + break; + } + OS << ">"; +} + +LLVM_DUMP_METHOD void MCAssembler::dump() { + raw_ostream &OS = llvm_ks::errs(); + + OS << "dump(); + } + OS << "],\n"; + OS << " Symbols:["; + + for (symbol_iterator it = symbol_begin(), ie = symbol_end(); it != ie; ++it) { + if (it != symbol_begin()) OS << ",\n "; + OS << "("; + it->dump(); + OS << ", Index:" << it->getIndex() << ", "; + OS << ")"; + } + OS << "]>\n"; +} +#endif diff --git a/llvm/lib/MC/MCInst.cpp b/llvm/lib/MC/MCInst.cpp new file mode 100644 index 0000000..114c412 --- /dev/null +++ b/llvm/lib/MC/MCInst.cpp @@ -0,0 +1,53 @@ +//===- lib/MC/MCInst.cpp - MCInst implementation --------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCInst.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/raw_ostream.h" + +using namespace llvm_ks; + +void MCOperand::print(raw_ostream &OS) const { + OS << ""; +} + +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +LLVM_DUMP_METHOD void MCOperand::dump() const { +} +#endif + +void MCInst::print(raw_ostream &OS) const { + OS << ""; +} + +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +LLVM_DUMP_METHOD void MCInst::dump() const { +} +#endif diff --git a/llvm/lib/MC/MCInstrDesc.cpp b/llvm/lib/MC/MCInstrDesc.cpp new file mode 100644 index 0000000..7dd2d84 --- /dev/null +++ b/llvm/lib/MC/MCInstrDesc.cpp @@ -0,0 +1,32 @@ +//===------ llvm/MC/MCInstrDesc.cpp- Instruction Descriptors --------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines methods on the MCOperandInfo and MCInstrDesc classes, which +// are used to describe target instructions and their operands. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCInstrDesc.h" +#include "llvm/MC/MCInst.h" +#include "llvm/MC/MCRegisterInfo.h" +#include "llvm/MC/MCSubtargetInfo.h" + +using namespace llvm_ks; + +bool MCInstrDesc::getDeprecatedInfo(MCInst &MI, const MCSubtargetInfo &STI, + std::string &Info) const { + if (ComplexDeprecationInfo) + return ComplexDeprecationInfo(MI, STI, Info); + if (DeprecatedFeature != -1 && STI.getFeatureBits()[DeprecatedFeature]) { + // FIXME: it would be nice to include the subtarget feature here. + Info = "deprecated"; + return true; + } + return false; +} diff --git a/llvm/lib/MC/MCLabel.cpp b/llvm/lib/MC/MCLabel.cpp new file mode 100644 index 0000000..7dd7f83 --- /dev/null +++ b/llvm/lib/MC/MCLabel.cpp @@ -0,0 +1,23 @@ +//===- lib/MC/MCLabel.cpp - MCLabel implementation ----------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCLabel.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/raw_ostream.h" +using namespace llvm_ks; + +void MCLabel::print(raw_ostream &OS) const { + OS << '"' << getInstance() << '"'; +} + +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +LLVM_DUMP_METHOD void MCLabel::dump() const { +// print(dbgs()); +} +#endif diff --git a/llvm/lib/MC/MCObjectFileInfo.cpp b/llvm/lib/MC/MCObjectFileInfo.cpp new file mode 100644 index 0000000..effd61f --- /dev/null +++ b/llvm/lib/MC/MCObjectFileInfo.cpp @@ -0,0 +1,764 @@ +//===-- MCObjectFileInfo.cpp - Object File Information --------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCObjectFileInfo.h" +#include "llvm/ADT/StringExtras.h" +#include "llvm/ADT/Triple.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCSection.h" +#include "llvm/MC/MCSectionCOFF.h" +#include "llvm/MC/MCSectionELF.h" +#include "llvm/MC/MCSectionMachO.h" +#include "llvm/Support/COFF.h" + +using namespace llvm_ks; + +static bool useCompactUnwind(const Triple &T) { + // Only on darwin. + if (!T.isOSDarwin()) + return false; + + // aarch64 always has it. + if (T.getArch() == Triple::aarch64) + return true; + + // armv7k always has it. + if (T.isWatchABI()) + return true; + + // Use it on newer version of OS X. + if (T.isMacOSX() && !T.isMacOSXVersionLT(10, 6)) + return true; + + // And the iOS simulator. + if (T.isiOS() && + (T.getArch() == Triple::x86_64 || T.getArch() == Triple::x86)) + return true; + + return false; +} + +void MCObjectFileInfo::initMachOMCObjectFileInfo(Triple T) { + // MachO + SupportsWeakOmittedEHFrame = false; + + EHFrameSection = Ctx->getMachOSection( + "__TEXT", "__eh_frame", + MachO::S_COALESCED | MachO::S_ATTR_NO_TOC | + MachO::S_ATTR_STRIP_STATIC_SYMS | MachO::S_ATTR_LIVE_SUPPORT, + SectionKind::getReadOnly()); + + if (T.isOSDarwin() && T.getArch() == Triple::aarch64) + SupportsCompactUnwindWithoutEHFrame = true; + + if (T.isWatchABI()) + OmitDwarfIfHaveCompactUnwind = true; + + PersonalityEncoding = dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel + | dwarf::DW_EH_PE_sdata4; + LSDAEncoding = FDECFIEncoding = dwarf::DW_EH_PE_pcrel; + TTypeEncoding = dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel | + dwarf::DW_EH_PE_sdata4; + + // .comm doesn't support alignment before Leopard. + if (T.isMacOSX() && T.isMacOSXVersionLT(10, 5)) + CommDirectiveSupportsAlignment = false; + + TextSection // .text + = Ctx->getMachOSection("__TEXT", "__text", + MachO::S_ATTR_PURE_INSTRUCTIONS, + SectionKind::getText()); + DataSection // .data + = Ctx->getMachOSection("__DATA", "__data", 0, SectionKind::getData()); + + // BSSSection might not be expected initialized on msvc. + BSSSection = nullptr; + + TLSDataSection // .tdata + = Ctx->getMachOSection("__DATA", "__thread_data", + MachO::S_THREAD_LOCAL_REGULAR, + SectionKind::getData()); + TLSBSSSection // .tbss + = Ctx->getMachOSection("__DATA", "__thread_bss", + MachO::S_THREAD_LOCAL_ZEROFILL, + SectionKind::getThreadBSS()); + + // TODO: Verify datarel below. + TLSTLVSection // .tlv + = Ctx->getMachOSection("__DATA", "__thread_vars", + MachO::S_THREAD_LOCAL_VARIABLES, + SectionKind::getData()); + + TLSThreadInitSection = Ctx->getMachOSection( + "__DATA", "__thread_init", MachO::S_THREAD_LOCAL_INIT_FUNCTION_POINTERS, + SectionKind::getData()); + + CStringSection // .cstring + = Ctx->getMachOSection("__TEXT", "__cstring", + MachO::S_CSTRING_LITERALS, + SectionKind::getMergeable1ByteCString()); + UStringSection + = Ctx->getMachOSection("__TEXT","__ustring", 0, + SectionKind::getMergeable2ByteCString()); + FourByteConstantSection // .literal4 + = Ctx->getMachOSection("__TEXT", "__literal4", + MachO::S_4BYTE_LITERALS, + SectionKind::getMergeableConst4()); + EightByteConstantSection // .literal8 + = Ctx->getMachOSection("__TEXT", "__literal8", + MachO::S_8BYTE_LITERALS, + SectionKind::getMergeableConst8()); + + SixteenByteConstantSection // .literal16 + = Ctx->getMachOSection("__TEXT", "__literal16", + MachO::S_16BYTE_LITERALS, + SectionKind::getMergeableConst16()); + + ReadOnlySection // .const + = Ctx->getMachOSection("__TEXT", "__const", 0, + SectionKind::getReadOnly()); + + // If the target is not powerpc, map the coal sections to the non-coal + // sections. + // + // "__TEXT/__textcoal_nt" => section "__TEXT/__text" + // "__TEXT/__const_coal" => section "__TEXT/__const" + // "__DATA/__datacoal_nt" => section "__DATA/__data" + Triple::ArchType ArchTy = T.getArch(); + + if (ArchTy == Triple::ppc || ArchTy == Triple::ppc64) { + TextCoalSection + = Ctx->getMachOSection("__TEXT", "__textcoal_nt", + MachO::S_COALESCED | + MachO::S_ATTR_PURE_INSTRUCTIONS, + SectionKind::getText()); + ConstTextCoalSection + = Ctx->getMachOSection("__TEXT", "__const_coal", + MachO::S_COALESCED, + SectionKind::getReadOnly()); + DataCoalSection = Ctx->getMachOSection( + "__DATA", "__datacoal_nt", MachO::S_COALESCED, SectionKind::getData()); + } else { + TextCoalSection = TextSection; + ConstTextCoalSection = ReadOnlySection; + DataCoalSection = DataSection; + } + + ConstDataSection // .const_data + = Ctx->getMachOSection("__DATA", "__const", 0, + SectionKind::getReadOnlyWithRel()); + DataCommonSection + = Ctx->getMachOSection("__DATA","__common", + MachO::S_ZEROFILL, + SectionKind::getBSS()); + DataBSSSection + = Ctx->getMachOSection("__DATA","__bss", MachO::S_ZEROFILL, + SectionKind::getBSS()); + + + LazySymbolPointerSection + = Ctx->getMachOSection("__DATA", "__la_symbol_ptr", + MachO::S_LAZY_SYMBOL_POINTERS, + SectionKind::getMetadata()); + NonLazySymbolPointerSection + = Ctx->getMachOSection("__DATA", "__nl_symbol_ptr", + MachO::S_NON_LAZY_SYMBOL_POINTERS, + SectionKind::getMetadata()); + + // Exception Handling. + LSDASection = Ctx->getMachOSection("__TEXT", "__gcc_except_tab", 0, + SectionKind::getReadOnlyWithRel()); + + COFFDebugSymbolsSection = nullptr; + COFFDebugTypesSection = nullptr; + + if (useCompactUnwind(T)) { + CompactUnwindSection = + Ctx->getMachOSection("__LD", "__compact_unwind", MachO::S_ATTR_DEBUG, + SectionKind::getReadOnly()); + + if (T.getArch() == Triple::x86_64 || T.getArch() == Triple::x86) + CompactUnwindDwarfEHFrameOnly = 0x04000000; // UNWIND_X86_64_MODE_DWARF + else if (T.getArch() == Triple::aarch64) + CompactUnwindDwarfEHFrameOnly = 0x03000000; // UNWIND_ARM64_MODE_DWARF + else if (T.getArch() == Triple::arm || T.getArch() == Triple::thumb) + CompactUnwindDwarfEHFrameOnly = 0x04000000; // UNWIND_ARM_MODE_DWARF + } + + // Debug Information. + DwarfAccelNamesSection = + Ctx->getMachOSection("__DWARF", "__apple_names", MachO::S_ATTR_DEBUG, + SectionKind::getMetadata(), "names_begin"); + DwarfAccelObjCSection = + Ctx->getMachOSection("__DWARF", "__apple_objc", MachO::S_ATTR_DEBUG, + SectionKind::getMetadata(), "objc_begin"); + // 16 character section limit... + DwarfAccelNamespaceSection = + Ctx->getMachOSection("__DWARF", "__apple_namespac", MachO::S_ATTR_DEBUG, + SectionKind::getMetadata(), "namespac_begin"); + DwarfAccelTypesSection = + Ctx->getMachOSection("__DWARF", "__apple_types", MachO::S_ATTR_DEBUG, + SectionKind::getMetadata(), "types_begin"); + + DwarfAbbrevSection = + Ctx->getMachOSection("__DWARF", "__debug_abbrev", MachO::S_ATTR_DEBUG, + SectionKind::getMetadata(), "section_abbrev"); + DwarfInfoSection = + Ctx->getMachOSection("__DWARF", "__debug_info", MachO::S_ATTR_DEBUG, + SectionKind::getMetadata(), "section_info"); + DwarfLineSection = + Ctx->getMachOSection("__DWARF", "__debug_line", MachO::S_ATTR_DEBUG, + SectionKind::getMetadata(), "section_line"); + DwarfFrameSection = + Ctx->getMachOSection("__DWARF", "__debug_frame", MachO::S_ATTR_DEBUG, + SectionKind::getMetadata()); + DwarfPubNamesSection = + Ctx->getMachOSection("__DWARF", "__debug_pubnames", MachO::S_ATTR_DEBUG, + SectionKind::getMetadata()); + DwarfPubTypesSection = + Ctx->getMachOSection("__DWARF", "__debug_pubtypes", MachO::S_ATTR_DEBUG, + SectionKind::getMetadata()); + DwarfGnuPubNamesSection = + Ctx->getMachOSection("__DWARF", "__debug_gnu_pubn", MachO::S_ATTR_DEBUG, + SectionKind::getMetadata()); + DwarfGnuPubTypesSection = + Ctx->getMachOSection("__DWARF", "__debug_gnu_pubt", MachO::S_ATTR_DEBUG, + SectionKind::getMetadata()); + DwarfStrSection = + Ctx->getMachOSection("__DWARF", "__debug_str", MachO::S_ATTR_DEBUG, + SectionKind::getMetadata(), "info_string"); + DwarfLocSection = + Ctx->getMachOSection("__DWARF", "__debug_loc", MachO::S_ATTR_DEBUG, + SectionKind::getMetadata(), "section_debug_loc"); + DwarfARangesSection = + Ctx->getMachOSection("__DWARF", "__debug_aranges", MachO::S_ATTR_DEBUG, + SectionKind::getMetadata()); + DwarfRangesSection = + Ctx->getMachOSection("__DWARF", "__debug_ranges", MachO::S_ATTR_DEBUG, + SectionKind::getMetadata(), "debug_range"); + DwarfMacinfoSection = + Ctx->getMachOSection("__DWARF", "__debug_macinfo", MachO::S_ATTR_DEBUG, + SectionKind::getMetadata(), "debug_macinfo"); + DwarfDebugInlineSection = + Ctx->getMachOSection("__DWARF", "__debug_inlined", MachO::S_ATTR_DEBUG, + SectionKind::getMetadata()); + DwarfCUIndexSection = + Ctx->getMachOSection("__DWARF", "__debug_cu_index", MachO::S_ATTR_DEBUG, + SectionKind::getMetadata()); + DwarfTUIndexSection = + Ctx->getMachOSection("__DWARF", "__debug_tu_index", MachO::S_ATTR_DEBUG, + SectionKind::getMetadata()); + StackMapSection = Ctx->getMachOSection("__LLVM_STACKMAPS", "__llvm_stackmaps", + 0, SectionKind::getMetadata()); + + FaultMapSection = Ctx->getMachOSection("__LLVM_FAULTMAPS", "__llvm_faultmaps", + 0, SectionKind::getMetadata()); + + TLSExtraDataSection = TLSTLVSection; +} + +void MCObjectFileInfo::initELFMCObjectFileInfo(Triple T) { + switch (T.getArch()) { + case Triple::mips: + case Triple::mipsel: + FDECFIEncoding = dwarf::DW_EH_PE_sdata4; + break; + case Triple::mips64: + case Triple::mips64el: + FDECFIEncoding = dwarf::DW_EH_PE_sdata8; + break; + case Triple::x86_64: + break; + default: + FDECFIEncoding = dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4; + break; + } + + switch (T.getArch()) { + case Triple::arm: + case Triple::armeb: + case Triple::thumb: + case Triple::thumbeb: + if (Ctx->getAsmInfo()->getExceptionHandlingType() == ExceptionHandling::ARM) + break; + // Fallthrough if not using EHABI + case Triple::ppc: + case Triple::x86: + break; + case Triple::x86_64: + break; + case Triple::aarch64: + case Triple::aarch64_be: + // The small model guarantees static code/data size < 4GB, but not where it + // will be in memory. Most of these could end up >2GB away so even a signed + // pc-relative 32-bit address is insufficient, theoretically. + break; + case Triple::mips: + case Triple::mipsel: + case Triple::mips64: + case Triple::mips64el: + // MIPS uses indirect pointer to refer personality functions and types, so + // that the eh_frame section can be read-only. DW.ref.personality will be + // generated for relocation. + PersonalityEncoding = dwarf::DW_EH_PE_indirect; + // FIXME: The N64 ABI probably ought to use DW_EH_PE_sdata8 but we can't + // identify N64 from just a triple. + TTypeEncoding = dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel | + dwarf::DW_EH_PE_sdata4; + // We don't support PC-relative LSDA references in GAS so we use the default + // DW_EH_PE_absptr for those. + break; + case Triple::ppc64: + case Triple::ppc64le: + PersonalityEncoding = dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel | + dwarf::DW_EH_PE_udata8; + LSDAEncoding = dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_udata8; + TTypeEncoding = dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel | + dwarf::DW_EH_PE_udata8; + break; + case Triple::sparcel: + case Triple::sparc: + break; + case Triple::sparcv9: + LSDAEncoding = dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4; + break; + case Triple::systemz: + // All currently-defined code models guarantee that 4-byte PC-relative + // values will be in range. + break; + default: + break; + } + + unsigned EHSectionType = T.getArch() == Triple::x86_64 + ? ELF::SHT_X86_64_UNWIND + : ELF::SHT_PROGBITS; + + // Solaris requires different flags for .eh_frame to seemingly every other + // platform. + unsigned EHSectionFlags = ELF::SHF_ALLOC; + if (T.isOSSolaris() && T.getArch() != Triple::x86_64) + EHSectionFlags |= ELF::SHF_WRITE; + + // ELF + BSSSection = Ctx->getELFSection(".bss", ELF::SHT_NOBITS, + ELF::SHF_WRITE | ELF::SHF_ALLOC); + + TextSection = Ctx->getELFSection(".text", ELF::SHT_PROGBITS, + ELF::SHF_EXECINSTR | ELF::SHF_ALLOC); + + DataSection = Ctx->getELFSection(".data", ELF::SHT_PROGBITS, + ELF::SHF_WRITE | ELF::SHF_ALLOC); + + ReadOnlySection = + Ctx->getELFSection(".rodata", ELF::SHT_PROGBITS, ELF::SHF_ALLOC); + + TLSDataSection = + Ctx->getELFSection(".tdata", ELF::SHT_PROGBITS, + ELF::SHF_ALLOC | ELF::SHF_TLS | ELF::SHF_WRITE); + + TLSBSSSection = Ctx->getELFSection( + ".tbss", ELF::SHT_NOBITS, ELF::SHF_ALLOC | ELF::SHF_TLS | ELF::SHF_WRITE); + + DataRelROSection = Ctx->getELFSection(".data.rel.ro", ELF::SHT_PROGBITS, + ELF::SHF_ALLOC | ELF::SHF_WRITE); + + MergeableConst4Section = + Ctx->getELFSection(".rodata.cst4", ELF::SHT_PROGBITS, + ELF::SHF_ALLOC | ELF::SHF_MERGE, 4, ""); + + MergeableConst8Section = + Ctx->getELFSection(".rodata.cst8", ELF::SHT_PROGBITS, + ELF::SHF_ALLOC | ELF::SHF_MERGE, 8, ""); + + MergeableConst16Section = + Ctx->getELFSection(".rodata.cst16", ELF::SHT_PROGBITS, + ELF::SHF_ALLOC | ELF::SHF_MERGE, 16, ""); + + StaticCtorSection = Ctx->getELFSection(".ctors", ELF::SHT_PROGBITS, + ELF::SHF_ALLOC | ELF::SHF_WRITE); + + StaticDtorSection = Ctx->getELFSection(".dtors", ELF::SHT_PROGBITS, + ELF::SHF_ALLOC | ELF::SHF_WRITE); + + // Exception Handling Sections. + + // FIXME: We're emitting LSDA info into a readonly section on ELF, even though + // it contains relocatable pointers. In PIC mode, this is probably a big + // runtime hit for C++ apps. Either the contents of the LSDA need to be + // adjusted or this should be a data section. + LSDASection = Ctx->getELFSection(".gcc_except_table", ELF::SHT_PROGBITS, + ELF::SHF_ALLOC); + + COFFDebugSymbolsSection = nullptr; + COFFDebugTypesSection = nullptr; + + // Debug Info Sections. + DwarfAbbrevSection = Ctx->getELFSection(".debug_abbrev", ELF::SHT_PROGBITS, 0, + "section_abbrev"); + DwarfInfoSection = + Ctx->getELFSection(".debug_info", ELF::SHT_PROGBITS, 0, "section_info"); + DwarfLineSection = Ctx->getELFSection(".debug_line", ELF::SHT_PROGBITS, 0); + DwarfFrameSection = Ctx->getELFSection(".debug_frame", ELF::SHT_PROGBITS, 0); + DwarfPubNamesSection = + Ctx->getELFSection(".debug_pubnames", ELF::SHT_PROGBITS, 0); + DwarfPubTypesSection = + Ctx->getELFSection(".debug_pubtypes", ELF::SHT_PROGBITS, 0); + DwarfGnuPubNamesSection = + Ctx->getELFSection(".debug_gnu_pubnames", ELF::SHT_PROGBITS, 0); + DwarfGnuPubTypesSection = + Ctx->getELFSection(".debug_gnu_pubtypes", ELF::SHT_PROGBITS, 0); + DwarfStrSection = + Ctx->getELFSection(".debug_str", ELF::SHT_PROGBITS, + ELF::SHF_MERGE | ELF::SHF_STRINGS, 1, ""); + DwarfLocSection = Ctx->getELFSection(".debug_loc", ELF::SHT_PROGBITS, 0); + DwarfARangesSection = + Ctx->getELFSection(".debug_aranges", ELF::SHT_PROGBITS, 0); + DwarfRangesSection = + Ctx->getELFSection(".debug_ranges", ELF::SHT_PROGBITS, 0, "debug_range"); + DwarfMacinfoSection = Ctx->getELFSection(".debug_macinfo", ELF::SHT_PROGBITS, + 0, "debug_macinfo"); + + // DWARF5 Experimental Debug Info + + // Accelerator Tables + DwarfAccelNamesSection = + Ctx->getELFSection(".apple_names", ELF::SHT_PROGBITS, 0, "names_begin"); + DwarfAccelObjCSection = + Ctx->getELFSection(".apple_objc", ELF::SHT_PROGBITS, 0, "objc_begin"); + DwarfAccelNamespaceSection = Ctx->getELFSection( + ".apple_namespaces", ELF::SHT_PROGBITS, 0, "namespac_begin"); + DwarfAccelTypesSection = + Ctx->getELFSection(".apple_types", ELF::SHT_PROGBITS, 0, "types_begin"); + + // Fission Sections + DwarfInfoDWOSection = + Ctx->getELFSection(".debug_info.dwo", ELF::SHT_PROGBITS, 0); + DwarfTypesDWOSection = + Ctx->getELFSection(".debug_types.dwo", ELF::SHT_PROGBITS, 0); + DwarfAbbrevDWOSection = + Ctx->getELFSection(".debug_abbrev.dwo", ELF::SHT_PROGBITS, 0); + DwarfStrDWOSection = + Ctx->getELFSection(".debug_str.dwo", ELF::SHT_PROGBITS, + ELF::SHF_MERGE | ELF::SHF_STRINGS, 1, ""); + DwarfLineDWOSection = + Ctx->getELFSection(".debug_line.dwo", ELF::SHT_PROGBITS, 0); + DwarfLocDWOSection = + Ctx->getELFSection(".debug_loc.dwo", ELF::SHT_PROGBITS, 0, "skel_loc"); + DwarfStrOffDWOSection = + Ctx->getELFSection(".debug_str_offsets.dwo", ELF::SHT_PROGBITS, 0); + DwarfAddrSection = + Ctx->getELFSection(".debug_addr", ELF::SHT_PROGBITS, 0, "addr_sec"); + + // DWP Sections + DwarfCUIndexSection = + Ctx->getELFSection(".debug_cu_index", ELF::SHT_PROGBITS, 0); + DwarfTUIndexSection = + Ctx->getELFSection(".debug_tu_index", ELF::SHT_PROGBITS, 0); + + StackMapSection = + Ctx->getELFSection(".llvm_stackmaps", ELF::SHT_PROGBITS, ELF::SHF_ALLOC); + + FaultMapSection = + Ctx->getELFSection(".llvm_faultmaps", ELF::SHT_PROGBITS, ELF::SHF_ALLOC); + + EHFrameSection = + Ctx->getELFSection(".eh_frame", EHSectionType, EHSectionFlags); +} + +void MCObjectFileInfo::initCOFFMCObjectFileInfo(Triple T) { + EHFrameSection = Ctx->getCOFFSection( + ".eh_frame", COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ | COFF::IMAGE_SCN_MEM_WRITE, + SectionKind::getData()); + + bool IsWoA = T.getArch() == Triple::arm || T.getArch() == Triple::thumb; + + CommDirectiveSupportsAlignment = true; + + // COFF + BSSSection = Ctx->getCOFFSection( + ".bss", COFF::IMAGE_SCN_CNT_UNINITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ | COFF::IMAGE_SCN_MEM_WRITE, + SectionKind::getBSS()); + TextSection = Ctx->getCOFFSection( + ".text", + (IsWoA ? COFF::IMAGE_SCN_MEM_16BIT : (COFF::SectionCharacteristics)0) | + COFF::IMAGE_SCN_CNT_CODE | COFF::IMAGE_SCN_MEM_EXECUTE | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getText()); + DataSection = Ctx->getCOFFSection( + ".data", COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | COFF::IMAGE_SCN_MEM_READ | + COFF::IMAGE_SCN_MEM_WRITE, + SectionKind::getData()); + ReadOnlySection = Ctx->getCOFFSection( + ".rdata", COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | COFF::IMAGE_SCN_MEM_READ, + SectionKind::getReadOnly()); + + if (T.isKnownWindowsMSVCEnvironment() || T.isWindowsItaniumEnvironment()) { + StaticCtorSection = + Ctx->getCOFFSection(".CRT$XCU", COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getReadOnly()); + StaticDtorSection = + Ctx->getCOFFSection(".CRT$XTX", COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getReadOnly()); + } else { + StaticCtorSection = Ctx->getCOFFSection( + ".ctors", COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ | COFF::IMAGE_SCN_MEM_WRITE, + SectionKind::getData()); + StaticDtorSection = Ctx->getCOFFSection( + ".dtors", COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ | COFF::IMAGE_SCN_MEM_WRITE, + SectionKind::getData()); + } + + // FIXME: We're emitting LSDA info into a readonly section on COFF, even + // though it contains relocatable pointers. In PIC mode, this is probably a + // big runtime hit for C++ apps. Either the contents of the LSDA need to be + // adjusted or this should be a data section. + if (T.getArch() == Triple::x86_64) { + // On Windows 64 with SEH, the LSDA is emitted into the .xdata section + LSDASection = nullptr; + } else { + LSDASection = Ctx->getCOFFSection(".gcc_except_table", + COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getReadOnly()); + } + + // Debug info. + COFFDebugSymbolsSection = + Ctx->getCOFFSection(".debug$S", (COFF::IMAGE_SCN_MEM_DISCARDABLE | + COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ), + SectionKind::getMetadata()); + COFFDebugTypesSection = + Ctx->getCOFFSection(".debug$T", (COFF::IMAGE_SCN_MEM_DISCARDABLE | + COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ), + SectionKind::getMetadata()); + + DwarfAbbrevSection = Ctx->getCOFFSection( + ".debug_abbrev", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata(), "section_abbrev"); + DwarfInfoSection = Ctx->getCOFFSection( + ".debug_info", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata(), "section_info"); + DwarfLineSection = Ctx->getCOFFSection( + ".debug_line", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata(), "section_line"); + + DwarfFrameSection = Ctx->getCOFFSection( + ".debug_frame", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata()); + DwarfPubNamesSection = Ctx->getCOFFSection( + ".debug_pubnames", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata()); + DwarfPubTypesSection = Ctx->getCOFFSection( + ".debug_pubtypes", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata()); + DwarfGnuPubNamesSection = Ctx->getCOFFSection( + ".debug_gnu_pubnames", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata()); + DwarfGnuPubTypesSection = Ctx->getCOFFSection( + ".debug_gnu_pubtypes", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata()); + DwarfStrSection = Ctx->getCOFFSection( + ".debug_str", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata(), "info_string"); + DwarfLocSection = Ctx->getCOFFSection( + ".debug_loc", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata(), "section_debug_loc"); + DwarfARangesSection = Ctx->getCOFFSection( + ".debug_aranges", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata()); + DwarfRangesSection = Ctx->getCOFFSection( + ".debug_ranges", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata(), "debug_range"); + DwarfMacinfoSection = Ctx->getCOFFSection( + ".debug_macinfo", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata(), "debug_macinfo"); + DwarfInfoDWOSection = Ctx->getCOFFSection( + ".debug_info.dwo", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata(), "section_info_dwo"); + DwarfTypesDWOSection = Ctx->getCOFFSection( + ".debug_types.dwo", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata(), "section_types_dwo"); + DwarfAbbrevDWOSection = Ctx->getCOFFSection( + ".debug_abbrev.dwo", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata(), "section_abbrev_dwo"); + DwarfStrDWOSection = Ctx->getCOFFSection( + ".debug_str.dwo", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata(), "skel_string"); + DwarfLineDWOSection = Ctx->getCOFFSection( + ".debug_line.dwo", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata()); + DwarfLocDWOSection = Ctx->getCOFFSection( + ".debug_loc.dwo", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata(), "skel_loc"); + DwarfStrOffDWOSection = Ctx->getCOFFSection( + ".debug_str_offsets.dwo", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata()); + DwarfAddrSection = Ctx->getCOFFSection( + ".debug_addr", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata(), "addr_sec"); + DwarfCUIndexSection = Ctx->getCOFFSection( + ".debug_cu_index", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata()); + DwarfTUIndexSection = Ctx->getCOFFSection( + ".debug_tu_index", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata()); + DwarfAccelNamesSection = Ctx->getCOFFSection( + ".apple_names", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata(), "names_begin"); + DwarfAccelNamespaceSection = Ctx->getCOFFSection( + ".apple_namespaces", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata(), "namespac_begin"); + DwarfAccelTypesSection = Ctx->getCOFFSection( + ".apple_types", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata(), "types_begin"); + DwarfAccelObjCSection = Ctx->getCOFFSection( + ".apple_objc", + COFF::IMAGE_SCN_MEM_DISCARDABLE | COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getMetadata(), "objc_begin"); + + DrectveSection = Ctx->getCOFFSection( + ".drectve", COFF::IMAGE_SCN_LNK_INFO | COFF::IMAGE_SCN_LNK_REMOVE, + SectionKind::getMetadata()); + + PDataSection = Ctx->getCOFFSection( + ".pdata", COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | COFF::IMAGE_SCN_MEM_READ, + SectionKind::getData()); + + XDataSection = Ctx->getCOFFSection( + ".xdata", COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | COFF::IMAGE_SCN_MEM_READ, + SectionKind::getData()); + + SXDataSection = Ctx->getCOFFSection(".sxdata", COFF::IMAGE_SCN_LNK_INFO, + SectionKind::getMetadata()); + + TLSDataSection = Ctx->getCOFFSection( + ".tls$", COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | COFF::IMAGE_SCN_MEM_READ | + COFF::IMAGE_SCN_MEM_WRITE, + SectionKind::getData()); + + StackMapSection = Ctx->getCOFFSection(".llvm_stackmaps", + COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ, + SectionKind::getReadOnly()); +} + +void MCObjectFileInfo::InitMCObjectFileInfo(const Triple &TheTriple, + MCContext &ctx) { + Ctx = &ctx; + + // Common. + CommDirectiveSupportsAlignment = true; + SupportsWeakOmittedEHFrame = true; + SupportsCompactUnwindWithoutEHFrame = false; + OmitDwarfIfHaveCompactUnwind = false; + + PersonalityEncoding = LSDAEncoding = FDECFIEncoding = TTypeEncoding = + dwarf::DW_EH_PE_absptr; + + CompactUnwindDwarfEHFrameOnly = 0; + + EHFrameSection = nullptr; // Created on demand. + CompactUnwindSection = nullptr; // Used only by selected targets. + DwarfAccelNamesSection = nullptr; // Used only by selected targets. + DwarfAccelObjCSection = nullptr; // Used only by selected targets. + DwarfAccelNamespaceSection = nullptr; // Used only by selected targets. + DwarfAccelTypesSection = nullptr; // Used only by selected targets. + + TT = TheTriple; + + switch (TT.getObjectFormat()) { + case Triple::MachO: + Env = IsMachO; + initMachOMCObjectFileInfo(TT); + break; + case Triple::COFF: + if (!TT.isOSWindows()) + report_fatal_error( + "Cannot initialize MC for non-Windows COFF object files."); + + Env = IsCOFF; + initCOFFMCObjectFileInfo(TT); + break; + case Triple::ELF: + Env = IsELF; + initELFMCObjectFileInfo(TT); + break; + case Triple::UnknownObjectFormat: + report_fatal_error("Cannot initialize MC for unknown object file format."); + break; + } +} + +MCSection *MCObjectFileInfo::getDwarfTypesSection(uint64_t Hash) const { + return Ctx->getELFSection(".debug_types", ELF::SHT_PROGBITS, ELF::SHF_GROUP, + 0, utostr(Hash)); +} diff --git a/llvm/lib/MC/MCObjectStreamer.cpp b/llvm/lib/MC/MCObjectStreamer.cpp new file mode 100644 index 0000000..6628a8e --- /dev/null +++ b/llvm/lib/MC/MCObjectStreamer.cpp @@ -0,0 +1,535 @@ +//===- lib/MC/MCObjectStreamer.cpp - Object File MCStreamer Interface -----===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCObjectStreamer.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/MC/MCAsmBackend.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCAssembler.h" +#include "llvm/MC/MCCodeEmitter.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCDwarf.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCObjectWriter.h" +#include "llvm/MC/MCSection.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/TargetRegistry.h" + +//#include + +using namespace llvm_ks; + +MCObjectStreamer::MCObjectStreamer(MCContext &Context, MCAsmBackend &TAB, + raw_pwrite_stream &OS, + MCCodeEmitter *Emitter_) + : MCStreamer(Context), + Assembler(new MCAssembler(Context, TAB, *Emitter_, + *TAB.createObjectWriter(OS))), + EmitEHFrame(true), EmitDebugFrame(false) {} + +MCObjectStreamer::~MCObjectStreamer() { + delete &Assembler->getWriter(); + delete Assembler; +} + +void MCObjectStreamer::flushPendingLabels(MCFragment *F, uint64_t FOffset) { + if (PendingLabels.empty()) + return; + if (!F) { + F = new MCDataFragment(); + MCSection *CurSection = getCurrentSectionOnly(); + CurSection->getFragmentList().insert(CurInsertionPoint, F); + F->setParent(CurSection); + } + for (MCSymbol *Sym : PendingLabels) { + Sym->setFragment(F); + Sym->setOffset(FOffset); + } + PendingLabels.clear(); +} + +void MCObjectStreamer::emitAbsoluteSymbolDiff(const MCSymbol *Hi, + const MCSymbol *Lo, + unsigned Size) { + bool Error; + // If not assigned to the same (valid) fragment, fallback. + if (!Hi->getFragment() || Hi->getFragment() != Lo->getFragment() || + Hi->isVariable() || Lo->isVariable()) { + MCStreamer::emitAbsoluteSymbolDiff(Hi, Lo, Size); + return; + } + + // TODO: hande Error? + EmitIntValue(Hi->getOffset() - Lo->getOffset(), Size, Error); +} + +void MCObjectStreamer::reset() { + if (Assembler) + Assembler->reset(); + CurInsertionPoint = MCSection::iterator(); + EmitEHFrame = true; + EmitDebugFrame = false; + PendingLabels.clear(); + MCStreamer::reset(); +} + +void MCObjectStreamer::EmitFrames(MCAsmBackend *MAB) { +#if 0 + if (!getNumFrameInfos()) + return; + + if (EmitEHFrame) + MCDwarfFrameEmitter::Emit(*this, MAB, true); + + if (EmitDebugFrame) + MCDwarfFrameEmitter::Emit(*this, MAB, false); +#endif +} + +MCFragment *MCObjectStreamer::getCurrentFragment() const { + assert(getCurrentSectionOnly() && "No current section!"); + + if (CurInsertionPoint != getCurrentSectionOnly()->getFragmentList().begin()) + return &*std::prev(CurInsertionPoint); + + return nullptr; +} + +MCDataFragment *MCObjectStreamer::getOrCreateDataFragment() { + MCDataFragment *F = dyn_cast_or_null(getCurrentFragment()); + // When bundling is enabled, we don't want to add data to a fragment that + // already has instructions (see MCELFStreamer::EmitInstToData for details) + if (!F || (Assembler->isBundlingEnabled() && !Assembler->getRelaxAll() && + F->hasInstructions())) { + F = new MCDataFragment(); + insert(F); + } + return F; +} + +void MCObjectStreamer::visitUsedSymbol(const MCSymbol &Sym) { + Assembler->registerSymbol(Sym); +} + +void MCObjectStreamer::EmitCFISections(bool EH, bool Debug) { + MCStreamer::EmitCFISections(EH, Debug); + EmitEHFrame = EH; + EmitDebugFrame = Debug; +} + +void MCObjectStreamer::EmitValueImpl(const MCExpr *Value, unsigned Size, + SMLoc Loc) +{ + MCStreamer::EmitValueImpl(Value, Size, Loc); + MCDataFragment *DF = getOrCreateDataFragment(); + flushPendingLabels(DF, DF->getContents().size()); + + // This makes the symbol's name (label) end up literally in the output stream + //if (Value->getKind() == MCExpr::SymbolRef) { + // // Keystone: record data in the same section + // const MCSymbolRefExpr &SRE = cast(*Value); + // const StringRef Sym = SRE.getSymbol().getName(); + // DF->getContents().append(Sym.begin(), Sym.end()); + // + // return; + //} + + //MCCVLineEntry::Make(this); + //MCDwarfLineEntry::Make(this, getCurrentSection().first); + + // Avoid fixups when possible. + int64_t AbsValue; + bool Error; + if (Value->evaluateAsAbsolute(AbsValue, getAssembler())) { + // TODO: hande Error? + EmitIntValue(AbsValue, Size, Error); + return; + } + DF->getFixups().push_back( + MCFixup::create(DF->getContents().size(), Value, + MCFixup::getKindForSize(Size, false), Loc)); + DF->getContents().resize(DF->getContents().size() + Size, 0); +} + +void MCObjectStreamer::EmitCFIStartProcImpl(MCDwarfFrameInfo &Frame) { + // We need to create a local symbol to avoid relocations. + Frame.Begin = getContext().createTempSymbol(); + EmitLabel(Frame.Begin); +} + +void MCObjectStreamer::EmitCFIEndProcImpl(MCDwarfFrameInfo &Frame) { + Frame.End = getContext().createTempSymbol(); + EmitLabel(Frame.End); +} + +void MCObjectStreamer::EmitLabel(MCSymbol *Symbol) { + MCStreamer::EmitLabel(Symbol); + + getAssembler().registerSymbol(*Symbol); + + // If there is a current fragment, mark the symbol as pointing into it. + // Otherwise queue the label and set its fragment pointer when we emit the + // next fragment. + auto *F = dyn_cast_or_null(getCurrentFragment()); + if (F && !(getAssembler().isBundlingEnabled() && + getAssembler().getRelaxAll())) { + Symbol->setFragment(F); + Symbol->setOffset(F->getContents().size()); + } else { + PendingLabels.push_back(Symbol); + } +} + +void MCObjectStreamer::EmitULEB128Value(const MCExpr *Value) { + int64_t IntValue; + if (Value->evaluateAsAbsolute(IntValue, getAssembler())) { + EmitULEB128IntValue(IntValue); + return; + } + insert(new MCLEBFragment(*Value, false)); +} + +void MCObjectStreamer::EmitSLEB128Value(const MCExpr *Value) { + int64_t IntValue; + if (Value->evaluateAsAbsolute(IntValue, getAssembler())) { + EmitSLEB128IntValue(IntValue); + return; + } + insert(new MCLEBFragment(*Value, true)); +} + +void MCObjectStreamer::EmitWeakReference(MCSymbol *Alias, + const MCSymbol *Symbol) { + report_fatal_error("This file format doesn't support weak aliases."); +} + +void MCObjectStreamer::ChangeSection(MCSection *Section, + const MCExpr *Subsection) { + changeSectionImpl(Section, Subsection); +} + +bool MCObjectStreamer::changeSectionImpl(MCSection *Section, + const MCExpr *Subsection) { + assert(Section && "Cannot switch to a null section!"); + flushPendingLabels(nullptr); + + bool Created = getAssembler().registerSection(*Section); + + int64_t IntSubsection = 0; + if (Subsection && + !Subsection->evaluateAsAbsolute(IntSubsection, getAssembler())) + report_fatal_error("Cannot evaluate subsection number"); + if (IntSubsection < 0 || IntSubsection > 8192) + report_fatal_error("Subsection number out of range"); + CurInsertionPoint = + Section->getSubsectionInsertionPoint(unsigned(IntSubsection)); + return Created; +} + +bool MCObjectStreamer::EmitAssignment(MCSymbol *Symbol, const MCExpr *Value) { + getAssembler().registerSymbol(*Symbol); + return MCStreamer::EmitAssignment(Symbol, Value); +} + +bool MCObjectStreamer::mayHaveInstructions(MCSection &Sec) const { + return Sec.hasInstructions(); +} + +void MCObjectStreamer::EmitInstruction(MCInst &Inst, + const MCSubtargetInfo &STI, + unsigned int &KsError) +{ + MCStreamer::EmitInstruction(Inst, STI, KsError); + + MCSection *Sec = getCurrentSectionOnly(); + Sec->setHasInstructions(true); + + // Now that a machine instruction has been assembled into this section, make + // a line entry for any .loc directive that has been seen. + //MCCVLineEntry::Make(this); + //MCDwarfLineEntry::Make(this, getCurrentSection().first); + + // If this instruction doesn't need relaxation, just emit it as data. + MCAssembler &Assembler = getAssembler(); + if (!Assembler.getBackend().mayNeedRelaxation(Inst)) { + EmitInstToData(Inst, STI, KsError); + return; + } + + // Otherwise, relax and emit it as data if either: + // - The RelaxAll flag was passed + // - Bundling is enabled and this instruction is inside a bundle-locked + // group. We want to emit all such instructions into the same data + // fragment. + if (Assembler.getRelaxAll() || + (Assembler.isBundlingEnabled() && Sec->isBundleLocked())) { + MCInst Relaxed(Inst.getAddress()); + getAssembler().getBackend().relaxInstruction(Inst, Relaxed); + while (getAssembler().getBackend().mayNeedRelaxation(Relaxed)) + getAssembler().getBackend().relaxInstruction(Relaxed, Relaxed); + EmitInstToData(Relaxed, STI, KsError); + return; + } + + // Otherwise emit to a separate fragment. + EmitInstToFragment(Inst, STI); +} + +void MCObjectStreamer::EmitInstToFragment(MCInst &Inst, + const MCSubtargetInfo &STI) +{ + if (getAssembler().getRelaxAll() && getAssembler().isBundlingEnabled()) + llvm_unreachable("All instructions should have already been relaxed"); + + // Always create a new, separate fragment here, because its size can change + // during relaxation. + MCRelaxableFragment *IF = new MCRelaxableFragment(Inst, STI); + insert(IF); + + SmallString<128> Code; + raw_svector_ostream VecOS(Code); + unsigned int KsError; + getAssembler().getEmitter().encodeInstruction(Inst, VecOS, IF->getFixups(), + STI, KsError); + IF->getContents().append(Code.begin(), Code.end()); +} + +#ifndef NDEBUG +static const char *const BundlingNotImplementedMsg = + "Aligned bundling is not implemented for this object format"; +#endif + +void MCObjectStreamer::EmitBundleAlignMode(unsigned AlignPow2) { + llvm_unreachable(BundlingNotImplementedMsg); +} + +void MCObjectStreamer::EmitBundleLock(bool AlignToEnd) { + llvm_unreachable(BundlingNotImplementedMsg); +} + +void MCObjectStreamer::EmitBundleUnlock() { + llvm_unreachable(BundlingNotImplementedMsg); +} + +void MCObjectStreamer::EmitDwarfLocDirective(unsigned FileNo, unsigned Line, + unsigned Column, unsigned Flags, + unsigned Isa, + unsigned Discriminator, + StringRef FileName) { + // In case we see two .loc directives in a row, make sure the + // first one gets a line entry. + //MCDwarfLineEntry::Make(this, getCurrentSection().first); + + this->MCStreamer::EmitDwarfLocDirective(FileNo, Line, Column, Flags, + Isa, Discriminator, FileName); +} + +#if 0 +static const MCExpr *buildSymbolDiff(MCObjectStreamer &OS, const MCSymbol *A, + const MCSymbol *B) { + MCContext &Context = OS.getContext(); + MCSymbolRefExpr::VariantKind Variant = MCSymbolRefExpr::VK_None; + const MCExpr *ARef = MCSymbolRefExpr::create(A, Variant, Context); + const MCExpr *BRef = MCSymbolRefExpr::create(B, Variant, Context); + const MCExpr *AddrDelta = + MCBinaryExpr::create(MCBinaryExpr::Sub, ARef, BRef, Context); + return AddrDelta; +} +#endif + +#if 0 +static void emitDwarfSetLineAddr(MCObjectStreamer &OS, + MCDwarfLineTableParams Params, + int64_t LineDelta, const MCSymbol *Label, + int PointerSize) { + // emit the sequence to set the address + OS.EmitIntValue(dwarf::DW_LNS_extended_op, 1); + OS.EmitULEB128IntValue(PointerSize + 1); + OS.EmitIntValue(dwarf::DW_LNE_set_address, 1); + OS.EmitSymbolValue(Label, PointerSize); + + // emit the sequence for the LineDelta (from 1) and a zero address delta. + //MCDwarfLineAddr::Emit(&OS, Params, LineDelta, 0); +} +#endif + +void MCObjectStreamer::EmitDwarfAdvanceLineAddr(int64_t LineDelta, + const MCSymbol *LastLabel, + const MCSymbol *Label, + unsigned PointerSize) { +#if 0 + if (!LastLabel) { + emitDwarfSetLineAddr(*this, Assembler->getDWARFLinetableParams(), LineDelta, + Label, PointerSize); + return; + } + const MCExpr *AddrDelta = buildSymbolDiff(*this, Label, LastLabel); + int64_t Res; + if (AddrDelta->evaluateAsAbsolute(Res, getAssembler())) { + MCDwarfLineAddr::Emit(this, Assembler->getDWARFLinetableParams(), LineDelta, + Res); + return; + } + insert(new MCDwarfLineAddrFragment(LineDelta, *AddrDelta)); +#endif +} + +void MCObjectStreamer::EmitDwarfAdvanceFrameAddr(const MCSymbol *LastLabel, + const MCSymbol *Label) { +#if 0 + const MCExpr *AddrDelta = buildSymbolDiff(*this, Label, LastLabel); + int64_t Res; + if (AddrDelta->evaluateAsAbsolute(Res, getAssembler())) { + MCDwarfFrameEmitter::EmitAdvanceLoc(*this, Res); + return; + } + insert(new MCDwarfCallFrameFragment(*AddrDelta)); +#endif +} + +void MCObjectStreamer::EmitCVLocDirective(unsigned FunctionId, unsigned FileNo, + unsigned Line, unsigned Column, + bool PrologueEnd, bool IsStmt, + StringRef FileName) { + // In case we see two .cv_loc directives in a row, make sure the + // first one gets a line entry. + //MCCVLineEntry::Make(this); + + this->MCStreamer::EmitCVLocDirective(FunctionId, FileNo, Line, Column, + PrologueEnd, IsStmt, FileName); +} + +void MCObjectStreamer::EmitCVLinetableDirective(unsigned FunctionId, + const MCSymbol *Begin, + const MCSymbol *End) { + this->MCStreamer::EmitCVLinetableDirective(FunctionId, Begin, End); +} + +void MCObjectStreamer::EmitCVInlineLinetableDirective( + unsigned PrimaryFunctionId, unsigned SourceFileId, unsigned SourceLineNum, + ArrayRef SecondaryFunctionIds) { + this->MCStreamer::EmitCVInlineLinetableDirective( + PrimaryFunctionId, SourceFileId, SourceLineNum, SecondaryFunctionIds); +} + +void MCObjectStreamer::EmitCVStringTableDirective() { +} +void MCObjectStreamer::EmitCVFileChecksumsDirective() { +} + + +void MCObjectStreamer::EmitBytes(StringRef Data) { + //MCCVLineEntry::Make(this); + //MCDwarfLineEntry::Make(this, getCurrentSection().first); + MCDataFragment *DF = getOrCreateDataFragment(); + flushPendingLabels(DF, DF->getContents().size()); + DF->getContents().append(Data.begin(), Data.end()); +} + +void MCObjectStreamer::EmitValueToAlignment(unsigned ByteAlignment, + int64_t Value, + unsigned ValueSize, + unsigned MaxBytesToEmit) { + if (MaxBytesToEmit == 0) + MaxBytesToEmit = ByteAlignment; + insert(new MCAlignFragment(ByteAlignment, Value, ValueSize, MaxBytesToEmit)); + + // Update the maximum alignment on the current section if necessary. + MCSection *CurSec = getCurrentSection().first; + if (ByteAlignment > CurSec->getAlignment()) + CurSec->setAlignment(ByteAlignment); +} + +void MCObjectStreamer::EmitCodeAlignment(unsigned ByteAlignment, + unsigned MaxBytesToEmit) { + EmitValueToAlignment(ByteAlignment, 0, 1, MaxBytesToEmit); + cast(getCurrentFragment())->setEmitNops(true); +} + +void MCObjectStreamer::emitValueToOffset(const MCExpr *Offset, + unsigned char Value) { + insert(new MCOrgFragment(*Offset, Value)); +} + +// Associate GPRel32 fixup with data and resize data area +void MCObjectStreamer::EmitGPRel32Value(const MCExpr *Value) { + MCDataFragment *DF = getOrCreateDataFragment(); + flushPendingLabels(DF, DF->getContents().size()); + + DF->getFixups().push_back(MCFixup::create(DF->getContents().size(), + Value, FK_GPRel_4)); + DF->getContents().resize(DF->getContents().size() + 4, 0); +} + +// Associate GPRel32 fixup with data and resize data area +void MCObjectStreamer::EmitGPRel64Value(const MCExpr *Value) { + MCDataFragment *DF = getOrCreateDataFragment(); + flushPendingLabels(DF, DF->getContents().size()); + + DF->getFixups().push_back(MCFixup::create(DF->getContents().size(), + Value, FK_GPRel_4)); + DF->getContents().resize(DF->getContents().size() + 8, 0); +} + +bool MCObjectStreamer::EmitRelocDirective(const MCExpr &Offset, StringRef Name, + const MCExpr *Expr, SMLoc Loc) { + int64_t OffsetValue; + if (!Offset.evaluateAsAbsolute(OffsetValue)) + llvm_unreachable("Offset is not absolute"); + + if (OffsetValue < 0) + llvm_unreachable("Offset is negative"); + + MCDataFragment *DF = getOrCreateDataFragment(); + flushPendingLabels(DF, DF->getContents().size()); + + Optional MaybeKind = Assembler->getBackend().getFixupKind(Name); + if (!MaybeKind.hasValue()) + return true; + + MCFixupKind Kind = *MaybeKind; + + if (Expr == nullptr) + Expr = + MCSymbolRefExpr::create(getContext().createTempSymbol(), getContext()); + DF->getFixups().push_back(MCFixup::create(OffsetValue, Expr, Kind, Loc)); + return false; +} + +void MCObjectStreamer::EmitFill(uint64_t NumBytes, uint8_t FillValue) { + const MCSection *Sec = getCurrentSection().first; + (void)Sec; + assert(Sec && "need a section"); + insert(new MCFillFragment(FillValue, NumBytes)); +} + +unsigned int MCObjectStreamer::FinishImpl() +{ + unsigned int KsError = 0; + // If we are generating dwarf for assembly source files dump out the sections. + //if (getContext().getGenDwarfForAssembly()) + // MCGenDwarfInfo::Emit(this); + + // Dump out the dwarf file & directory tables and line tables. + //MCDwarfLineTable::Emit(this, getAssembler().getDWARFLinetableParams()); + + flushPendingLabels(nullptr); + getAssembler().setSymResolver(getSymResolver()); + getAssembler().Finish(KsError); + + return KsError; +} + +uint64_t MCObjectStreamer::getCurrentFragmentSize() { + auto *F = dyn_cast_or_null(getCurrentFragment()); + if (nullptr != F) + return F->getContents().size(); + return 0; +} diff --git a/llvm/lib/MC/MCObjectWriter.cpp b/llvm/lib/MC/MCObjectWriter.cpp new file mode 100644 index 0000000..41ae7e5 --- /dev/null +++ b/llvm/lib/MC/MCObjectWriter.cpp @@ -0,0 +1,61 @@ +//===- lib/MC/MCObjectWriter.cpp - MCObjectWriter implementation ----------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCAssembler.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCObjectWriter.h" +#include "llvm/MC/MCSymbol.h" + +using namespace llvm_ks; + +MCObjectWriter::~MCObjectWriter() { +} + +bool MCObjectWriter::isSymbolRefDifferenceFullyResolved( + const MCAssembler &Asm, const MCSymbolRefExpr *A, const MCSymbolRefExpr *B, + bool InSet, bool &valid) const +{ + valid = true; + // Modified symbol references cannot be resolved. + if (A->getKind() != MCSymbolRefExpr::VK_None || + B->getKind() != MCSymbolRefExpr::VK_None) + return false; + + const MCSymbol &SA = A->getSymbol(); + const MCSymbol &SB = B->getSymbol(); + if (SA.isUndefined() || SB.isUndefined()) + return false; + + if (!SA.getFragment() || !SB.getFragment()) + return false; + + if (!SA.isInSection()) { + valid = false; + return false; + } + return isSymbolRefDifferenceFullyResolvedImpl(Asm, SA, SB, InSet); +} + +bool MCObjectWriter::isSymbolRefDifferenceFullyResolvedImpl( + const MCAssembler &Asm, const MCSymbol &A, const MCSymbol &B, + bool InSet) const { + return isSymbolRefDifferenceFullyResolvedImpl(Asm, A, *B.getFragment(), InSet, + false); +} + +bool MCObjectWriter::isSymbolRefDifferenceFullyResolvedImpl( + const MCAssembler &Asm, const MCSymbol &SymA, const MCFragment &FB, + bool InSet, bool IsPCRel) const { + const MCSection &SecA = SymA.getSection(); + const MCSection &SecB = *FB.getParent(); + // On ELF and COFF A - B is absolute if A and B are in the same section. + return &SecA == &SecB; +} + +bool MCObjectWriter::isWeak(const MCSymbol &) const { return false; } diff --git a/llvm/lib/MC/MCParser/AsmLexer.cpp b/llvm/lib/MC/MCParser/AsmLexer.cpp new file mode 100644 index 0000000..4cfe92b --- /dev/null +++ b/llvm/lib/MC/MCParser/AsmLexer.cpp @@ -0,0 +1,623 @@ +//===- AsmLexer.cpp - Lexer for Assembly Files ----------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This class implements the lexer for assembly files. +// +//===----------------------------------------------------------------------===// +// +#include "llvm/MC/MCParser/AsmLexer.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/Support/MemoryBuffer.h" +#include "llvm/Support/SMLoc.h" +#include +#include +#include +#include +using namespace llvm_ks; + +AsmLexer::AsmLexer(const MCAsmInfo &MAI) : MAI(MAI) { + CurPtr = nullptr; + isAtStartOfLine = true; + AllowAtInIdentifier = !StringRef(MAI.getCommentString()).startswith("@"); + defaultRadix = MAI.getRadix(); +} + +AsmLexer::~AsmLexer() { +} + +void AsmLexer::setBuffer(StringRef Buf, const char *ptr) { + CurBuf = Buf; + + if (ptr) + CurPtr = ptr; + else + CurPtr = CurBuf.begin(); + + TokStart = nullptr; +} + +/// ReturnError - Set the error to the specified string at the specified +/// location. This is defined to always return AsmToken::Error. +AsmToken AsmLexer::ReturnError(const char *Loc, const std::string &Msg) +{ + //SetError(SMLoc::getFromPointer(Loc), Msg); + + return AsmToken(AsmToken::Error, StringRef(Loc, 0)); +} + +int AsmLexer::getNextChar() { + char CurChar = *CurPtr++; + switch (CurChar) { + default: + return (unsigned char)CurChar; + case 0: + // A nul character in the stream is either the end of the current buffer or + // a random nul in the file. Disambiguate that here. + if (CurPtr - 1 != CurBuf.end()) + return 0; // Just whitespace. + + // Otherwise, return end of file. + --CurPtr; // Another call to lex will return EOF again. + return EOF; + } +} + +/// LexFloatLiteral: [0-9]*[.][0-9]*([eE][+-]?[0-9]*)? +/// +/// The leading integral digit sequence and dot should have already been +/// consumed, some or all of the fractional digit sequence *can* have been +/// consumed. +AsmToken AsmLexer::LexFloatLiteral() { + // Skip the fractional digit sequence. + while (isdigit(*CurPtr)) + ++CurPtr; + + // Check for exponent; we intentionally accept a slighlty wider set of + // literals here and rely on the upstream client to reject invalid ones (e.g., + // "1e+"). + if (*CurPtr == 'e' || *CurPtr == 'E') { + ++CurPtr; + if (*CurPtr == '-' || *CurPtr == '+') + ++CurPtr; + while (isdigit(*CurPtr)) + ++CurPtr; + } + + return AsmToken(AsmToken::Real, + StringRef(TokStart, CurPtr - TokStart)); +} + +/// LexHexFloatLiteral matches essentially (.[0-9a-fA-F]*)?[pP][+-]?[0-9a-fA-F]+ +/// while making sure there are enough actual digits around for the constant to +/// be valid. +/// +/// The leading "0x[0-9a-fA-F]*" (i.e. integer part) has already been consumed +/// before we get here. +AsmToken AsmLexer::LexHexFloatLiteral(bool NoIntDigits) +{ + assert((*CurPtr == 'p' || *CurPtr == 'P' || *CurPtr == '.') && + "unexpected parse state in floating hex"); + bool NoFracDigits = true; + + // Skip the fractional part if there is one + if (*CurPtr == '.') { + ++CurPtr; + + const char *FracStart = CurPtr; + while (isxdigit(*CurPtr)) + ++CurPtr; + + NoFracDigits = CurPtr == FracStart; + } + + if (NoIntDigits && NoFracDigits) + return ReturnError(TokStart, "invalid hexadecimal floating-point constant: " + "expected at least one significand digit"); + + // Make sure we do have some kind of proper exponent part + if (*CurPtr != 'p' && *CurPtr != 'P') + return ReturnError(TokStart, "invalid hexadecimal floating-point constant: " + "expected exponent part 'p'"); + ++CurPtr; + + if (*CurPtr == '+' || *CurPtr == '-') + ++CurPtr; + + // N.b. exponent digits are *not* hex + const char *ExpStart = CurPtr; + while (isdigit(*CurPtr)) + ++CurPtr; + + if (CurPtr == ExpStart) + return ReturnError(TokStart, "invalid hexadecimal floating-point constant: " + "expected at least one exponent digit"); + + return AsmToken(AsmToken::Real, StringRef(TokStart, CurPtr - TokStart)); +} + +/// LexIdentifier: [a-zA-Z_.][a-zA-Z0-9_$.@?]* +static bool IsIdentifierChar(char c, bool AllowAt) { + return isalnum(c) || c == '_' || c == '$' || c == '.' || + (c == '@' && AllowAt) || c == '?'; +} +AsmToken AsmLexer::LexIdentifier() { + // Check for floating point literals. + if (CurPtr[-1] == '.' && isdigit(*CurPtr)) { + // Disambiguate a .1243foo identifier from a floating literal. + while (isdigit(*CurPtr)) + ++CurPtr; + if (*CurPtr == 'e' || *CurPtr == 'E' || + !IsIdentifierChar(*CurPtr, AllowAtInIdentifier)) + return LexFloatLiteral(); + } + + while (IsIdentifierChar(*CurPtr, AllowAtInIdentifier)) + ++CurPtr; + + // Handle . as a special case. + if (CurPtr == TokStart+1 && TokStart[0] == '.') + return AsmToken(AsmToken::Dot, StringRef(TokStart, 1)); + + return AsmToken(AsmToken::Identifier, StringRef(TokStart, CurPtr - TokStart)); +} + +/// LexSlash: Slash: / +/// C-Style Comment: /* ... */ +AsmToken AsmLexer::LexSlash() +{ + switch (*CurPtr) { + case '*': break; // C style comment. + case '/': return ++CurPtr, LexLineComment(); + default: return AsmToken(AsmToken::Slash, StringRef(CurPtr-1, 1)); + } + + // C Style comment. + ++CurPtr; // skip the star. + while (1) { + int CurChar = getNextChar(); + switch (CurChar) { + case EOF: + return ReturnError(TokStart, "unterminated comment"); + case '*': + // End of the comment? + if (CurPtr[0] != '/') break; + + ++CurPtr; // End the */. + return LexToken(); + } + } +} + +/// LexLineComment: Comment: #[^\n]* +/// : //[^\n]* +AsmToken AsmLexer::LexLineComment() { + // FIXME: This is broken if we happen to a comment at the end of a file, which + // was .included, and which doesn't end with a newline. + int CurChar = getNextChar(); + while (CurChar != '\n' && CurChar != '\r' && CurChar != EOF) + CurChar = getNextChar(); + + if (CurChar == EOF) + return AsmToken(AsmToken::Eof, StringRef(TokStart, 0)); + return AsmToken(AsmToken::EndOfStatement, StringRef(TokStart, 0)); +} + +static void SkipIgnoredIntegerSuffix(const char *&CurPtr) { + // Skip ULL, UL, U, L and LL suffices. + if (CurPtr[0] == 'U') + ++CurPtr; + if (CurPtr[0] == 'L') + ++CurPtr; + if (CurPtr[0] == 'L') + ++CurPtr; +} + +// Look ahead to search for first non-hex digit, if it's [hH], then we treat the +// integer as a hexadecimal, possibly with leading zeroes. +static unsigned doLookAhead(const char *&CurPtr, unsigned DefaultRadix) { + const char *FirstHex = nullptr; + const char *LookAhead = CurPtr; + while (1) { + if (isdigit(*LookAhead)) { + ++LookAhead; + } else if (isxdigit(*LookAhead)) { + if (!FirstHex) + FirstHex = LookAhead; + ++LookAhead; + } else { + break; + } + } + bool isHex = *LookAhead == 'h' || *LookAhead == 'H'; + CurPtr = isHex || !FirstHex ? LookAhead : FirstHex; + if (isHex) + return 16; + return DefaultRadix; +} + +static AsmToken intToken(StringRef Ref, APInt &Value) +{ + if (Value.isIntN(64)) + return AsmToken(AsmToken::Integer, Ref, Value); + return AsmToken(AsmToken::BigNum, Ref, Value); +} + +/// LexDigit: First character is [0-9]. +/// Local Label: [0-9][:] +/// Forward/Backward Label: [0-9][fb] +/// Binary integer: 0b[01]+ +/// Octal integer: 0[0-7]+ +/// Hex integer: 0x[0-9a-fA-F]+ or [0x]?[0-9][0-9a-fA-F]*[hH] +/// Decimal integer: [1-9][0-9]* +AsmToken AsmLexer::LexDigit() +{ + // Decimal integer: [1-9][0-9]* + if (CurPtr[-1] != '0' || CurPtr[0] == '.') { + unsigned Radix = doLookAhead(CurPtr, 10); + + if (defaultRadix == 16) + Radix = 16; + + bool isHex = Radix == 16; + // Check for floating point literals. + if (!isHex && (*CurPtr == '.' || *CurPtr == 'e')) { + ++CurPtr; + return LexFloatLiteral(); + } + + StringRef Result(TokStart, CurPtr - TokStart); + + APInt Value(128, 0, true); + if (Result.getAsInteger(Radix, Value)) + return ReturnError(TokStart, !isHex ? "invalid decimal number" : + "invalid hexdecimal number"); + + // Consume the [bB][hH]. + if (defaultRadix != 16) { + if (Radix == 2 || Radix == 16) + ++CurPtr; + } + + // The darwin/x86 (and x86-64) assembler accepts and ignores type + // suffices on integer literals. + SkipIgnoredIntegerSuffix(CurPtr); + + return intToken(Result, Value); + } + + if (*CurPtr == 'b') { + ++CurPtr; + // See if we actually have "0b" as part of something like "jmp 0b\n" + if (!isdigit(CurPtr[0])) { + --CurPtr; + StringRef Result(TokStart, CurPtr - TokStart); + return AsmToken(AsmToken::Integer, Result, 0); + } + const char *NumStart = CurPtr; + while (CurPtr[0] == '0' || CurPtr[0] == '1') + ++CurPtr; + + // Requires at least one binary digit. + if (CurPtr == NumStart) + return ReturnError(TokStart, "invalid binary number"); + + StringRef Result(TokStart, CurPtr - TokStart); + + APInt Value(128, 0, true); + if (Result.substr(2).getAsInteger(2, Value)) + return ReturnError(TokStart, "invalid binary number"); + + // The darwin/x86 (and x86-64) assembler accepts and ignores ULL and LL + // suffixes on integer literals. + SkipIgnoredIntegerSuffix(CurPtr); + + return intToken(Result, Value); + } + + if (*CurPtr == 'x' || *CurPtr == 'X') { + ++CurPtr; + const char *NumStart = CurPtr; + while (isxdigit(CurPtr[0])) + ++CurPtr; + + // "0x.0p0" is valid, and "0x0p0" (but not "0xp0" for example, which will be + // diagnosed by LexHexFloatLiteral). + if (CurPtr[0] == '.' || CurPtr[0] == 'p' || CurPtr[0] == 'P') + return LexHexFloatLiteral(NumStart == CurPtr); + + // Otherwise requires at least one hex digit. + if (CurPtr == NumStart) + return ReturnError(CurPtr-2, "invalid hexadecimal number"); + + APInt Result(128, 0); + if (StringRef(TokStart, CurPtr - TokStart).getAsInteger(0, Result)) + return ReturnError(TokStart, "invalid hexadecimal number"); + + // Consume the optional [hH]. + if (*CurPtr == 'h' || *CurPtr == 'H') + ++CurPtr; + + // The darwin/x86 (and x86-64) assembler accepts and ignores ULL and LL + // suffixes on integer literals. + SkipIgnoredIntegerSuffix(CurPtr); + + return intToken(StringRef(TokStart, CurPtr - TokStart), Result); + } + + // Either octal or hexadecimal. + APInt Value(128, 0, true); + unsigned Radix = doLookAhead(CurPtr, 8); + bool isHex = Radix == 16; + StringRef Result(TokStart, CurPtr - TokStart); + if (Result.getAsInteger(Radix, Value)) + return ReturnError(TokStart, !isHex ? "invalid octal number" : + "invalid hexdecimal number"); + + // Consume the [hH]. + if (Radix == 16) + ++CurPtr; + + // The darwin/x86 (and x86-64) assembler accepts and ignores ULL and LL + // suffixes on integer literals. + SkipIgnoredIntegerSuffix(CurPtr); + + return intToken(Result, Value); +} + +/// LexSingleQuote: Integer: 'b' +AsmToken AsmLexer::LexSingleQuote() +{ + int CurChar = getNextChar(); + + if (CurChar == '\\') + CurChar = getNextChar(); + + if (CurChar == EOF) + return ReturnError(TokStart, "unterminated single quote"); + + CurChar = getNextChar(); + + if (CurChar != '\'') + return ReturnError(TokStart, "single quote way too long"); + + // The idea here being that 'c' is basically just an integral + // constant. + StringRef Res = StringRef(TokStart,CurPtr - TokStart); + long long Value; + + if (Res.startswith("\'\\")) { + char theChar = Res[2]; + switch (theChar) { + default: Value = theChar; break; + case '\'': Value = '\''; break; + case 't': Value = '\t'; break; + case 'n': Value = '\n'; break; + case 'b': Value = '\b'; break; + } + } else + Value = TokStart[1]; + + return AsmToken(AsmToken::Integer, Res, Value); +} + + +/// LexQuote: String: "..." +AsmToken AsmLexer::LexQuote() +{ + int CurChar = getNextChar(); + // TODO: does gas allow multiline string constants? + while (CurChar != '"') { + if (CurChar == '\\') { + // Allow \", etc. + CurChar = getNextChar(); + } + + if (CurChar == EOF) + return ReturnError(TokStart, "unterminated string constant"); + + CurChar = getNextChar(); + } + + return AsmToken(AsmToken::String, StringRef(TokStart, CurPtr - TokStart)); +} + +StringRef AsmLexer::LexUntilEndOfStatement() { + TokStart = CurPtr; + + while (!isAtStartOfComment(CurPtr) && // Start of line comment. + !isAtStatementSeparator(CurPtr) && // End of statement marker. + *CurPtr != '\n' && *CurPtr != '\r' && + (*CurPtr != 0 || CurPtr != CurBuf.end())) { + ++CurPtr; + } + return StringRef(TokStart, CurPtr-TokStart); +} + +StringRef AsmLexer::LexUntilEndOfLine() { + TokStart = CurPtr; + + while (*CurPtr != '\n' && *CurPtr != '\r' && + (*CurPtr != 0 || CurPtr != CurBuf.end())) { + ++CurPtr; + } + return StringRef(TokStart, CurPtr-TokStart); +} + +size_t AsmLexer::peekTokens(MutableArrayRef Buf, + bool ShouldSkipSpace) +{ + const char *SavedTokStart = TokStart; + const char *SavedCurPtr = CurPtr; + bool SavedAtStartOfLine = isAtStartOfLine; + bool SavedSkipSpace = SkipSpace; + + std::string SavedErr = getErr(); + SMLoc SavedErrLoc = getErrLoc(); + + SkipSpace = ShouldSkipSpace; + + size_t ReadCount; + for (ReadCount = 0; ReadCount < Buf.size(); ++ReadCount) { + AsmToken Token = LexToken(); + + Buf[ReadCount] = Token; + + if (Token.is(AsmToken::Eof)) + break; + } + + SetError(SavedErrLoc, SavedErr); + + SkipSpace = SavedSkipSpace; + isAtStartOfLine = SavedAtStartOfLine; + CurPtr = SavedCurPtr; + TokStart = SavedTokStart; + + return ReadCount; +} + +bool AsmLexer::isAtStartOfComment(const char *Ptr) { + const char *CommentString = MAI.getCommentString(); + + if (CommentString[1] == '\0') + return CommentString[0] == Ptr[0]; + + // FIXME: special case for the bogus "##" comment string in X86MCAsmInfoDarwin + if (CommentString[1] == '#') + return CommentString[0] == Ptr[0]; + + return strncmp(Ptr, CommentString, strlen(CommentString)) == 0; +} + +bool AsmLexer::isAtStatementSeparator(const char *Ptr) { + return strncmp(Ptr, MAI.getSeparatorString(), + strlen(MAI.getSeparatorString())) == 0; +} + +AsmToken AsmLexer::LexToken() +{ + TokStart = CurPtr; + // This always consumes at least one character. + int CurChar = getNextChar(); + + if (isAtStartOfComment(TokStart)) { + // If this comment starts with a '#', then return the Hash token and let + // the assembler parser see if it can be parsed as a cpp line filename + // comment. We do this only if we are at the start of a line. + if (CurChar == '#' && isAtStartOfLine) + return AsmToken(AsmToken::Hash, StringRef(TokStart, 1)); + isAtStartOfLine = true; + return LexLineComment(); + } + if (isAtStatementSeparator(TokStart)) { + CurPtr += strlen(MAI.getSeparatorString()) - 1; + return AsmToken(AsmToken::EndOfStatement, + StringRef(TokStart, strlen(MAI.getSeparatorString()))); + } + + // If we're missing a newline at EOF, make sure we still get an + // EndOfStatement token before the Eof token. + if (CurChar == EOF && !isAtStartOfLine) { + isAtStartOfLine = true; + return AsmToken(AsmToken::EndOfStatement, StringRef(TokStart, 1)); + } + + isAtStartOfLine = false; + switch (CurChar) { + default: + // Handle identifier: [a-zA-Z_.][a-zA-Z0-9_$.@]* + if (isalpha(CurChar) || CurChar == '_' || CurChar == '.') + return LexIdentifier(); + + // Unknown character, emit an error. + return ReturnError(TokStart, "invalid character in input"); + case EOF: return AsmToken(AsmToken::Eof, StringRef(TokStart, 0)); + case 0: + case ' ': + case '\t': + if (SkipSpace) { + // Ignore whitespace. + return LexToken(); + } else { + int len = 1; + while (*CurPtr==' ' || *CurPtr=='\t') { + CurPtr++; + len++; + } + return AsmToken(AsmToken::Space, StringRef(TokStart, len)); + } + case '\n': // FALL THROUGH. + case '\r': + isAtStartOfLine = true; + return AsmToken(AsmToken::EndOfStatement, StringRef(TokStart, 1)); + case ':': return AsmToken(AsmToken::Colon, StringRef(TokStart, 1)); + case '+': return AsmToken(AsmToken::Plus, StringRef(TokStart, 1)); + case '-': return AsmToken(AsmToken::Minus, StringRef(TokStart, 1)); + case '~': return AsmToken(AsmToken::Tilde, StringRef(TokStart, 1)); + case '(': return AsmToken(AsmToken::LParen, StringRef(TokStart, 1)); + case ')': return AsmToken(AsmToken::RParen, StringRef(TokStart, 1)); + case '[': return AsmToken(AsmToken::LBrac, StringRef(TokStart, 1)); + case ']': return AsmToken(AsmToken::RBrac, StringRef(TokStart, 1)); + case '{': return AsmToken(AsmToken::LCurly, StringRef(TokStart, 1)); + case '}': return AsmToken(AsmToken::RCurly, StringRef(TokStart, 1)); + case '*': return AsmToken(AsmToken::Star, StringRef(TokStart, 1)); + case ',': return AsmToken(AsmToken::Comma, StringRef(TokStart, 1)); + case '$': return AsmToken(AsmToken::Dollar, StringRef(TokStart, 1)); + case '@': return AsmToken(AsmToken::At, StringRef(TokStart, 1)); + case '\\': return AsmToken(AsmToken::BackSlash, StringRef(TokStart, 1)); + case '=': + if (*CurPtr == '=') + return ++CurPtr, AsmToken(AsmToken::EqualEqual, StringRef(TokStart, 2)); + return AsmToken(AsmToken::Equal, StringRef(TokStart, 1)); + case '|': + if (*CurPtr == '|') + return ++CurPtr, AsmToken(AsmToken::PipePipe, StringRef(TokStart, 2)); + return AsmToken(AsmToken::Pipe, StringRef(TokStart, 1)); + case '^': return AsmToken(AsmToken::Caret, StringRef(TokStart, 1)); + case '&': + if (*CurPtr == '&') + return ++CurPtr, AsmToken(AsmToken::AmpAmp, StringRef(TokStart, 2)); + return AsmToken(AsmToken::Amp, StringRef(TokStart, 1)); + case '!': + if (*CurPtr == '=') + return ++CurPtr, AsmToken(AsmToken::ExclaimEqual, StringRef(TokStart, 2)); + return AsmToken(AsmToken::Exclaim, StringRef(TokStart, 1)); + case '%': return AsmToken(AsmToken::Percent, StringRef(TokStart, 1)); + case '/': return LexSlash(); + case '#': return AsmToken(AsmToken::Hash, StringRef(TokStart, 1)); + case '\'': return LexSingleQuote(); + case '"': return LexQuote(); + case '0': case '1': case '2': case '3': case '4': + case '5': case '6': case '7': case '8': case '9': + return LexDigit(); + case '<': + switch (*CurPtr) { + case '<': return ++CurPtr, AsmToken(AsmToken::LessLess, + StringRef(TokStart, 2)); + case '=': return ++CurPtr, AsmToken(AsmToken::LessEqual, + StringRef(TokStart, 2)); + case '>': return ++CurPtr, AsmToken(AsmToken::LessGreater, + StringRef(TokStart, 2)); + default: return AsmToken(AsmToken::Less, StringRef(TokStart, 1)); + } + case '>': + switch (*CurPtr) { + case '>': return ++CurPtr, AsmToken(AsmToken::GreaterGreater, + StringRef(TokStart, 2)); + case '=': return ++CurPtr, AsmToken(AsmToken::GreaterEqual, + StringRef(TokStart, 2)); + default: return AsmToken(AsmToken::Greater, StringRef(TokStart, 1)); + } + + // TODO: Quoted identifiers (objc methods etc) + // local labels: [0-9][:] + // Forward/backward labels: [0-9][fb] + // Integers, fp constants, character constants. + } +} diff --git a/llvm/lib/MC/MCParser/AsmParser.cpp b/llvm/lib/MC/MCParser/AsmParser.cpp new file mode 100644 index 0000000..7cf8e78 --- /dev/null +++ b/llvm/lib/MC/MCParser/AsmParser.cpp @@ -0,0 +1,6146 @@ +//===- AsmParser.cpp - Parser for Assembly Files --------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This class implements the parser for assembly files. +// +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/APFloat.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/SmallString.h" +#include "llvm/ADT/StringMap.h" +#include "llvm/ADT/Twine.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCDwarf.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCInstrInfo.h" +#include "llvm/MC/MCObjectFileInfo.h" +#include "llvm/MC/MCParser/AsmCond.h" +#include "llvm/MC/MCParser/AsmLexer.h" +#include "llvm/MC/MCParser/MCAsmParser.h" +#include "llvm/MC/MCParser/MCAsmParserUtils.h" +#include "llvm/MC/MCParser/MCParsedAsmOperand.h" +#include "llvm/MC/MCParser/MCTargetAsmParser.h" +#include "llvm/MC/MCRegisterInfo.h" +#include "llvm/MC/MCSectionMachO.h" +#include "llvm/MC/MCStreamer.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/MC/MCValue.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/MathExtras.h" +#include "llvm/Support/MemoryBuffer.h" +#include "llvm/Support/SourceMgr.h" +#include "llvm/Support/raw_ostream.h" +#include +#include +#include +#include +#include + +#include +//#include + +using namespace llvm_ks; + +MCAsmParserSemaCallback::~MCAsmParserSemaCallback() {} + +namespace { +/// \brief Helper types for tracking macro definitions. +typedef std::vector MCAsmMacroArgument; +typedef std::vector MCAsmMacroArguments; + +struct MCAsmMacroParameter { + StringRef Name; + MCAsmMacroArgument Value; + bool Required; + bool Vararg; + + MCAsmMacroParameter() : Required(false), Vararg(false) {} +}; + +typedef std::vector MCAsmMacroParameters; + +struct MCAsmMacro { + StringRef Name; + StringRef Body; + MCAsmMacroParameters Parameters; + +public: + MCAsmMacro(StringRef N, StringRef B, MCAsmMacroParameters P) + : Name(N), Body(B), Parameters(std::move(P)) {} +}; + +/// \brief Helper class for storing information about an active macro +/// instantiation. +struct MacroInstantiation { + /// The location of the instantiation. + SMLoc InstantiationLoc; + + /// The buffer where parsing should resume upon instantiation completion. + int ExitBuffer; + + /// The location where parsing should resume upon instantiation completion. + SMLoc ExitLoc; + + /// The depth of TheCondStack at the start of the instantiation. + size_t CondStackDepth; + +public: + MacroInstantiation(SMLoc IL, int EB, SMLoc EL, size_t CondStackDepth); +}; + +struct ParseStatementInfo { + // error code for Keystone + unsigned int KsError; + + /// \brief The parsed operands from the last parsed statement. + SmallVector, 8> ParsedOperands; + + /// \brief The opcode from the last parsed instruction. + unsigned Opcode; + + /// \brief Was there an error parsing the inline assembly? + bool ParseError; + + SmallVectorImpl *AsmRewrites; + + ParseStatementInfo() : KsError(0), Opcode(~0U), ParseError(false), AsmRewrites(nullptr) {} + ParseStatementInfo(SmallVectorImpl *rewrites) + : Opcode(~0), ParseError(false), AsmRewrites(rewrites) {} +}; + +/// \brief The concrete assembly parser instance. +class AsmParser : public MCAsmParser { + AsmParser(const AsmParser &) = delete; + void operator=(const AsmParser &) = delete; +private: + AsmLexer Lexer; + MCContext &Ctx; + MCStreamer &Out; + const MCAsmInfo &MAI; + SourceMgr &SrcMgr; + SourceMgr::DiagHandlerTy SavedDiagHandler; + void *SavedDiagContext; + std::unique_ptr PlatformParser; + + /// This is the current buffer index we're lexing from as managed by the + /// SourceMgr object. + unsigned CurBuffer; + + AsmCond TheCondState; + std::vector TheCondStack; + + /// \brief maps directive names to handler methods in parser + /// extensions. Extensions register themselves in this map by calling + /// addDirectiveHandler. + StringMap ExtensionDirectiveMap; + + /// \brief Map of currently defined macros. + StringMap MacroMap; + + /// \brief Stack of active macro instantiations. + std::vector ActiveMacros; + + /// \brief List of bodies of anonymous macros. + std::deque MacroLikeBodies; + + /// Boolean tracking whether macro substitution is enabled. + unsigned MacrosEnabledFlag : 1; + + /// \brief Keeps track of how many .macro's have been instantiated. + unsigned NumOfMacroInstantiations; + + /// Flag tracking whether any errors have been encountered. + bool HadError; + + /// The values from the last parsed cpp hash file line comment if any. + StringRef CppHashFilename; + int64_t CppHashLineNumber; + SMLoc CppHashLoc; + unsigned CppHashBuf; + /// When generating dwarf for assembly source files we need to calculate the + /// logical line number based on the last parsed cpp hash file line comment + /// and current line. Since this is slow and messes up the SourceMgr's + /// cache we save the last info we queried with SrcMgr.FindLineNumber(). + SMLoc LastQueryIDLoc; + + /// AssemblerDialect. ~OU means unset value and use value provided by MAI. + unsigned AssemblerDialect; + + /// \brief is Darwin compatibility enabled? + bool IsDarwin; + + /// \brief Are we parsing ms-style inline assembly? + bool ParsingInlineAsm; + + /// \brief Should we use PC relative offsets by default? + bool NasmDefaultRel; + + // Keystone syntax support + int KsSyntax; + +public: + AsmParser(SourceMgr &SM, MCContext &Ctx, MCStreamer &Out, + const MCAsmInfo &MAI); + ~AsmParser() override; + + size_t Run(bool NoInitialTextSection, uint64_t Address, bool NoFinalize = false) override; + + void addDirectiveHandler(StringRef Directive, + ExtensionDirectiveHandler Handler) override { + ExtensionDirectiveMap[Directive] = Handler; + } + + void addAliasForDirective(StringRef Directive, StringRef Alias) override { + DirectiveKindMap[Directive] = DirectiveKindMap[Alias]; + } + +public: + /// @name MCAsmParser Interface + /// { + + SourceMgr &getSourceManager() override { return SrcMgr; } + MCAsmLexer &getLexer() override { return Lexer; } + MCContext &getContext() override { return Ctx; } + MCStreamer &getStreamer() override { return Out; } + unsigned getAssemblerDialect() override { + if (AssemblerDialect == ~0U) + return MAI.getAssemblerDialect(); + else + return AssemblerDialect; + } + void setAssemblerDialect(unsigned i) override { + AssemblerDialect = i; + } + + void Note(SMLoc L, const Twine &Msg, + ArrayRef Ranges = None) override; + bool Warning(SMLoc L, const Twine &Msg, + ArrayRef Ranges = None) override; + bool Error(SMLoc L, const Twine &Msg, + ArrayRef Ranges = None) override; + + const AsmToken &Lex() override; + + void setParsingInlineAsm(bool V) override { ParsingInlineAsm = V; } + bool isParsingInlineAsm() override { return ParsingInlineAsm; } + + void setNasmDefaultRel(bool V) override { NasmDefaultRel = V; } + bool isNasmDefaultRel() override { return NasmDefaultRel; } + + bool parseMSInlineAsm(void *AsmLoc, std::string &AsmString, + unsigned &NumOutputs, unsigned &NumInputs, + SmallVectorImpl > &OpDecls, + SmallVectorImpl &Constraints, + SmallVectorImpl &Clobbers, + const MCInstrInfo *MII, + MCAsmParserSemaCallback &SI, uint64_t &Address) override; + + bool parseExpression(const MCExpr *&Res); + bool parseExpression(const MCExpr *&Res, SMLoc &EndLoc) override; + bool parsePrimaryExprAux(const MCExpr *&Res, SMLoc &EndLoc, unsigned int depth); + bool parsePrimaryExpr(const MCExpr *&Res, SMLoc &EndLoc) override; + bool parseParenExpression(const MCExpr *&Res, SMLoc &EndLoc) override; + bool parseParenExprOfDepth(unsigned ParenDepth, const MCExpr *&Res, + SMLoc &EndLoc) override; + bool parseAbsoluteExpression(int64_t &Res) override; + + /// \brief Parse an identifier or string (as a quoted identifier) + /// and set \p Res to the identifier contents. + bool parseIdentifier(StringRef &Res) override; + void eatToEndOfStatement() override; + + void checkForValidSection() override; + + void initializeDirectiveKindMap(int syntax) override; // Keystone NASM support + /// } + +private: + + bool parseStatement(ParseStatementInfo &Info, + MCAsmParserSemaCallback *SI, uint64_t &Address); + void eatToEndOfLine(); + bool parseCppHashLineFilenameComment(SMLoc L); + + void checkForBadMacro(SMLoc DirectiveLoc, StringRef Name, StringRef Body, + ArrayRef Parameters); + bool expandMacro(raw_svector_ostream &OS, StringRef Body, + ArrayRef Parameters, + ArrayRef A, bool EnableAtPseudoVariable, + SMLoc L); + + /// \brief Are macros enabled in the parser? + bool areMacrosEnabled() {return MacrosEnabledFlag;} + + /// \brief Control a flag in the parser that enables or disables macros. + void setMacrosEnabled(bool Flag) {MacrosEnabledFlag = Flag;} + + /// \brief Lookup a previously defined macro. + /// \param Name Macro name. + /// \returns Pointer to macro. NULL if no such macro was defined. + const MCAsmMacro* lookupMacro(StringRef Name); + + /// \brief Define a new macro with the given name and information. + void defineMacro(StringRef Name, MCAsmMacro Macro); + + /// \brief Undefine a macro. If no such macro was defined, it's a no-op. + void undefineMacro(StringRef Name); + + /// \brief Are we inside a macro instantiation? + bool isInsideMacroInstantiation() {return !ActiveMacros.empty();} + + /// \brief Handle entry to macro instantiation. + /// + /// \param M The macro. + /// \param NameLoc Instantiation location. + bool handleMacroEntry(const MCAsmMacro *M, SMLoc NameLoc); + + /// \brief Handle exit from macro instantiation. + void handleMacroExit(); + + /// \brief Extract AsmTokens for a macro argument. + bool parseMacroArgument(MCAsmMacroArgument &MA, bool Vararg); + + /// \brief Parse all macro arguments for a given macro. + bool parseMacroArguments(const MCAsmMacro *M, MCAsmMacroArguments &A); + + void printMacroInstantiations(); + void printMessage(SMLoc Loc, SourceMgr::DiagKind Kind, const Twine &Msg, + ArrayRef Ranges = None) const { + SrcMgr.PrintMessage(Loc, Kind, Msg, Ranges); + } + static void DiagHandler(const SMDiagnostic &Diag, void *Context); + + /// \brief Enter the specified file. This returns true on failure. + bool enterIncludeFile(const std::string &Filename); + + /// \brief Process the specified file for the .incbin directive. + /// This returns true on failure. + bool processIncbinFile(const std::string &Filename); + + /// \brief Reset the current lexer position to that given by \p Loc. The + /// current token is not set; clients should ensure Lex() is called + /// subsequently. + /// + /// \param InBuffer If not 0, should be the known buffer id that contains the + /// location. + void jumpToLoc(SMLoc Loc, unsigned InBuffer = 0); + + /// \brief Parse up to the end of statement and a return the contents from the + /// current token until the end of the statement; the current token on exit + /// will be either the EndOfStatement or EOF. + StringRef parseStringToEndOfStatement() override; + + /// \brief Parse until the end of a statement or a comma is encountered, + /// return the contents from the current token up to the end or comma. + StringRef parseStringToComma(); + + bool parseAssignment(StringRef Name, bool allow_redef, + bool NoDeadStrip = false); + + unsigned getBinOpPrecedence(AsmToken::TokenKind K, + MCBinaryExpr::Opcode &Kind); + + bool parseBinOpRHS(unsigned Precedence, const MCExpr *&Res, SMLoc &EndLoc); + bool parseParenExpr(const MCExpr *&Res, SMLoc &EndLoc); + bool parseBracketExpr(const MCExpr *&Res, SMLoc &EndLoc); + + bool parseRegisterOrRegisterNumber(int64_t &Register, SMLoc DirectiveLoc); + + // Generic (target and platform independent) directive parsing. + enum DirectiveKind { + DK_NO_DIRECTIVE, // Placeholder + DK_SET, DK_EQU, DK_EQUIV, DK_ASCII, DK_ASCIZ, DK_STRING, DK_BYTE, DK_SHORT, + DK_RELOC, + DK_VALUE, DK_2BYTE, DK_LONG, DK_INT, DK_4BYTE, DK_QUAD, DK_8BYTE, DK_OCTA, + DK_SINGLE, DK_FLOAT, DK_DOUBLE, DK_ALIGN, DK_ALIGN32, DK_BALIGN, DK_BALIGNW, + DK_BALIGNL, DK_P2ALIGN, DK_P2ALIGNW, DK_P2ALIGNL, DK_ORG, DK_FILL, DK_ENDR, + DK_BUNDLE_ALIGN_MODE, DK_BUNDLE_LOCK, DK_BUNDLE_UNLOCK, + DK_ZERO, DK_EXTERN, DK_GLOBL, DK_GLOBAL, + DK_LAZY_REFERENCE, DK_NO_DEAD_STRIP, DK_SYMBOL_RESOLVER, DK_PRIVATE_EXTERN, + DK_REFERENCE, DK_WEAK_DEFINITION, DK_WEAK_REFERENCE, + DK_WEAK_DEF_CAN_BE_HIDDEN, DK_COMM, DK_COMMON, DK_LCOMM, DK_ABORT, + DK_INCLUDE, DK_INCBIN, DK_CODE16, DK_CODE16GCC, DK_REPT, DK_IRP, DK_IRPC, + DK_IF, DK_IFEQ, DK_IFGE, DK_IFGT, DK_IFLE, DK_IFLT, DK_IFNE, DK_IFB, + DK_IFNB, DK_IFC, DK_IFEQS, DK_IFNC, DK_IFNES, DK_IFDEF, DK_IFNDEF, + DK_IFNOTDEF, DK_ELSEIF, DK_ELSE, DK_ENDIF, + DK_SPACE, DK_SKIP, DK_FILE, DK_LINE, DK_LOC, DK_STABS, + DK_CV_FILE, DK_CV_LOC, DK_CV_LINETABLE, DK_CV_INLINE_LINETABLE, + DK_CV_STRINGTABLE, DK_CV_FILECHECKSUMS, + DK_CFI_SECTIONS, DK_CFI_STARTPROC, DK_CFI_ENDPROC, DK_CFI_DEF_CFA, + DK_CFI_DEF_CFA_OFFSET, DK_CFI_ADJUST_CFA_OFFSET, DK_CFI_DEF_CFA_REGISTER, + DK_CFI_OFFSET, DK_CFI_REL_OFFSET, DK_CFI_PERSONALITY, DK_CFI_LSDA, + DK_CFI_REMEMBER_STATE, DK_CFI_RESTORE_STATE, DK_CFI_SAME_VALUE, + DK_CFI_RESTORE, DK_CFI_ESCAPE, DK_CFI_SIGNAL_FRAME, DK_CFI_UNDEFINED, + DK_CFI_REGISTER, DK_CFI_WINDOW_SAVE, + DK_MACROS_ON, DK_MACROS_OFF, + DK_MACRO, DK_EXITM, DK_ENDM, DK_ENDMACRO, DK_PURGEM, + DK_SLEB128, DK_ULEB128, + DK_ERR, DK_ERROR, DK_WARNING, + DK_NASM_BITS, // NASM directive 'bits' + DK_NASM_DEFAULT, // NASM directive 'default' + DK_NASM_USE32, // NASM directive 'use32' + DK_END + }; + + /// \brief Maps directive name --> DirectiveKind enum, for + /// directives parsed by this class. + StringMap DirectiveKindMap; + + // ".ascii", ".asciz", ".string" + bool parseDirectiveAscii(StringRef IDVal, bool ZeroTerminated); + bool parseDirectiveReloc(SMLoc DirectiveLoc); // ".reloc" + bool parseDirectiveValue(unsigned Size, unsigned int &KsError); // ".byte", ".long", ... + bool parseDirectiveOctaValue(unsigned int &KsError); // ".octa" + bool parseDirectiveRealValue(const fltSemantics &); // ".single", ... + bool parseDirectiveFill(); // ".fill" + bool parseDirectiveZero(); // ".zero" + // ".set", ".equ", ".equiv" + bool parseDirectiveSet(StringRef IDVal, bool allow_redef); + bool parseDirectiveOrg(); // ".org" + // ".align{,32}", ".p2align{,w,l}" + bool parseDirectiveAlign(bool IsPow2, unsigned ValueSize); + + // ".file", ".line", ".loc", ".stabs" + bool parseDirectiveFile(SMLoc DirectiveLoc); + bool parseDirectiveLine(); + bool parseDirectiveLoc(); + bool parseDirectiveStabs(); + + // ".cv_file", ".cv_loc", ".cv_linetable", "cv_inline_linetable" + bool parseDirectiveCVFile(); + bool parseDirectiveCVLoc(); + bool parseDirectiveCVLinetable(); + bool parseDirectiveCVInlineLinetable(); + bool parseDirectiveCVStringTable(); + bool parseDirectiveCVFileChecksums(); + + // .cfi directives + bool parseDirectiveCFIRegister(SMLoc DirectiveLoc); + bool parseDirectiveCFIWindowSave(); + bool parseDirectiveCFISections(); + bool parseDirectiveCFIStartProc(); + bool parseDirectiveCFIEndProc(); + bool parseDirectiveCFIDefCfaOffset(); + bool parseDirectiveCFIDefCfa(SMLoc DirectiveLoc); + bool parseDirectiveCFIAdjustCfaOffset(); + bool parseDirectiveCFIDefCfaRegister(SMLoc DirectiveLoc); + bool parseDirectiveCFIOffset(SMLoc DirectiveLoc); + bool parseDirectiveCFIRelOffset(SMLoc DirectiveLoc); + bool parseDirectiveCFIPersonalityOrLsda(bool IsPersonality); + bool parseDirectiveCFIRememberState(); + bool parseDirectiveCFIRestoreState(); + bool parseDirectiveCFISameValue(SMLoc DirectiveLoc); + bool parseDirectiveCFIRestore(SMLoc DirectiveLoc); + bool parseDirectiveCFIEscape(); + bool parseDirectiveCFISignalFrame(); + bool parseDirectiveCFIUndefined(SMLoc DirectiveLoc); + + // macro directives + bool parseDirectivePurgeMacro(SMLoc DirectiveLoc); + bool parseDirectiveExitMacro(StringRef Directive); + bool parseDirectiveEndMacro(StringRef Directive); + bool parseDirectiveMacro(SMLoc DirectiveLoc); + bool parseDirectiveMacrosOnOff(StringRef Directive); + + // ".bundle_align_mode" + bool parseDirectiveBundleAlignMode(); + // ".bundle_lock" + bool parseDirectiveBundleLock(); + // ".bundle_unlock" + bool parseDirectiveBundleUnlock(); + + // ".space", ".skip" + bool parseDirectiveSpace(StringRef IDVal); + + // .sleb128 (Signed=true) and .uleb128 (Signed=false) + bool parseDirectiveLEB128(bool Signed); + + /// \brief Parse a directive like ".globl" which + /// accepts a single symbol (which should be a label or an external). + bool parseDirectiveSymbolAttribute(MCSymbolAttr Attr); + + bool parseDirectiveComm(bool IsLocal); // ".comm" and ".lcomm" + + bool parseDirectiveAbort(); // ".abort" + bool parseDirectiveInclude(); // ".include" + bool parseDirectiveIncbin(); // ".incbin" + + // ".if", ".ifeq", ".ifge", ".ifgt" , ".ifle", ".iflt" or ".ifne" + bool parseDirectiveIf(SMLoc DirectiveLoc, DirectiveKind DirKind); + // ".ifb" or ".ifnb", depending on ExpectBlank. + bool parseDirectiveIfb(SMLoc DirectiveLoc, bool ExpectBlank); + // ".ifc" or ".ifnc", depending on ExpectEqual. + bool parseDirectiveIfc(SMLoc DirectiveLoc, bool ExpectEqual); + // ".ifeqs" or ".ifnes", depending on ExpectEqual. + bool parseDirectiveIfeqs(SMLoc DirectiveLoc, bool ExpectEqual); + // ".ifdef" or ".ifndef", depending on expect_defined + bool parseDirectiveIfdef(SMLoc DirectiveLoc, bool expect_defined); + bool parseDirectiveElseIf(SMLoc DirectiveLoc); // ".elseif" + bool parseDirectiveElse(SMLoc DirectiveLoc); // ".else" + bool parseDirectiveEndIf(SMLoc DirectiveLoc); // .endif + bool parseEscapedString(std::string &Data) override; + + const MCExpr *applyModifierToExpr(const MCExpr *E, + MCSymbolRefExpr::VariantKind Variant); + + // Macro-like directives + MCAsmMacro *parseMacroLikeBody(SMLoc DirectiveLoc); + void instantiateMacroLikeBody(MCAsmMacro *M, SMLoc DirectiveLoc, + raw_svector_ostream &OS); + bool parseDirectiveRept(SMLoc DirectiveLoc, StringRef Directive); + bool parseDirectiveIrp(SMLoc DirectiveLoc); // ".irp" + bool parseDirectiveIrpc(SMLoc DirectiveLoc); // ".irpc" + bool parseDirectiveEndr(SMLoc DirectiveLoc); // ".endr" + + // "_emit" or "__emit" + bool parseDirectiveMSEmit(SMLoc DirectiveLoc, ParseStatementInfo &Info, + size_t Len); + + // "align" + bool parseDirectiveMSAlign(SMLoc DirectiveLoc, ParseStatementInfo &Info); + + // "end" + bool parseDirectiveEnd(SMLoc DirectiveLoc); + + // ".err" or ".error" + bool parseDirectiveError(SMLoc DirectiveLoc, bool WithMessage); + + // ".warning" + bool parseDirectiveWarning(SMLoc DirectiveLoc); + + // "bits" (Nasm) + bool parseNasmDirectiveBits(); + + // "use32" (Nasm) + bool parseNasmDirectiveUse32(); + + // "default" (Nasm) + bool parseNasmDirectiveDefault(); + + bool isNasmDirective(StringRef str); // is this str a NASM directive? + bool isDirective(StringRef str); // is this str a directive? +}; +} + +namespace llvm_ks { + +extern MCAsmParserExtension *createDarwinAsmParser(); +extern MCAsmParserExtension *createELFAsmParser(); +extern MCAsmParserExtension *createCOFFAsmParser(); + +} + +enum { DEFAULT_ADDRSPACE = 0 }; + +AsmParser::AsmParser(SourceMgr &SM, MCContext &Ctx, MCStreamer &Out, + const MCAsmInfo &MAI) + : Lexer(MAI), Ctx(Ctx), Out(Out), MAI(MAI), SrcMgr(SM), + PlatformParser(nullptr), CurBuffer(SM.getMainFileID()), + MacrosEnabledFlag(true), HadError(false), CppHashLineNumber(0), + AssemblerDialect(~0U), IsDarwin(false), ParsingInlineAsm(false), + NasmDefaultRel(false) { + // Save the old handler. + SavedDiagHandler = SrcMgr.getDiagHandler(); + SavedDiagContext = SrcMgr.getDiagContext(); + // Set our own handler which calls the saved handler. + SrcMgr.setDiagHandler(DiagHandler, this); + Lexer.setBuffer(SrcMgr.getMemoryBuffer(CurBuffer)->getBuffer()); + + // Initialize the platform / file format parser. + PlatformParser.reset(createDarwinAsmParser()); + IsDarwin = true; +#if 0 + switch (Ctx.getObjectFileInfo()->getObjectFileType()) { + case MCObjectFileInfo::IsCOFF: + PlatformParser.reset(createCOFFAsmParser()); + break; + case MCObjectFileInfo::IsMachO: + PlatformParser.reset(createDarwinAsmParser()); + IsDarwin = true; + break; + case MCObjectFileInfo::IsELF: + PlatformParser.reset(createELFAsmParser()); + break; + } +#endif + + PlatformParser->Initialize(*this); + initializeDirectiveKindMap(0); + + NumOfMacroInstantiations = 0; +} + +AsmParser::~AsmParser() { + assert((HadError || ActiveMacros.empty()) && + "Unexpected active macro instantiation!"); + + // Restore the saved diagnostics handler and context for use during + // finalization + SrcMgr.setDiagHandler(SavedDiagHandler, SavedDiagContext); +} + +void AsmParser::printMacroInstantiations() { + // Print the active macro instantiation stack. + for (std::vector::const_reverse_iterator + it = ActiveMacros.rbegin(), + ie = ActiveMacros.rend(); + it != ie; ++it) + printMessage((*it)->InstantiationLoc, SourceMgr::DK_Note, + "while in macro instantiation"); +} + +void AsmParser::Note(SMLoc L, const Twine &Msg, ArrayRef Ranges) { + printMessage(L, SourceMgr::DK_Note, Msg, Ranges); + printMacroInstantiations(); +} + +bool AsmParser::Warning(SMLoc L, const Twine &Msg, ArrayRef Ranges) { + if(getTargetParser().getTargetOptions().MCNoWarn) + return false; + if (getTargetParser().getTargetOptions().MCFatalWarnings) + return Error(L, Msg, Ranges); + printMessage(L, SourceMgr::DK_Warning, Msg, Ranges); + printMacroInstantiations(); + return false; +} + +bool AsmParser::Error(SMLoc L, const Twine &Msg, ArrayRef Ranges) { + HadError = true; + printMessage(L, SourceMgr::DK_Error, Msg, Ranges); + printMacroInstantiations(); + return true; +} + +bool AsmParser::enterIncludeFile(const std::string &Filename) { + std::string IncludedFile; + unsigned NewBuf = + SrcMgr.AddIncludeFile(Filename, Lexer.getLoc(), IncludedFile); + if (!NewBuf) + return true; + + CurBuffer = NewBuf; + Lexer.setBuffer(SrcMgr.getMemoryBuffer(CurBuffer)->getBuffer()); + return false; +} + +/// Process the specified .incbin file by searching for it in the include paths +/// then just emitting the byte contents of the file to the streamer. This +/// returns true on failure. +bool AsmParser::processIncbinFile(const std::string &Filename) { + std::string IncludedFile; + unsigned NewBuf = + SrcMgr.AddIncludeFile(Filename, Lexer.getLoc(), IncludedFile); + if (!NewBuf) + return true; + + // Pick up the bytes from the file and emit them. + getStreamer().EmitBytes(SrcMgr.getMemoryBuffer(NewBuf)->getBuffer()); + return false; +} + +void AsmParser::jumpToLoc(SMLoc Loc, unsigned InBuffer) { + CurBuffer = InBuffer ? InBuffer : SrcMgr.FindBufferContainingLoc(Loc); + Lexer.setBuffer(SrcMgr.getMemoryBuffer(CurBuffer)->getBuffer(), + Loc.getPointer()); +} + +const AsmToken &AsmParser::Lex() { + const AsmToken *tok = &Lexer.Lex(); + + if (tok->is(AsmToken::Eof)) { + // If this is the end of an included file, pop the parent file off the + // include stack. + SMLoc ParentIncludeLoc = SrcMgr.getParentIncludeLoc(CurBuffer); + if (ParentIncludeLoc != SMLoc()) { + jumpToLoc(ParentIncludeLoc); + tok = &Lexer.Lex(); // qq + } + } + + //if (tok->is(AsmToken::Error)) + // Error(Lexer.getErrLoc(), Lexer.getErr()); + + return *tok; +} + +size_t AsmParser::Run(bool NoInitialTextSection, uint64_t Address, bool NoFinalize) +{ + // count number of statement + size_t count = 0; + + // Create the initial section, if requested. + if (!NoInitialTextSection) + Out.InitSections(false); + + // Prime the lexer. + Lex(); + if (!Lexer.isNot(AsmToken::Error)) { + KsError = KS_ERR_ASM_TOKEN_INVALID; + return 0; + } + + HadError = false; + AsmCond StartingCondState = TheCondState; + + // If we are generating dwarf for assembly source files save the initial text + // section and generate a .file directive. + if (getContext().getGenDwarfForAssembly()) { + MCSection *Sec = getStreamer().getCurrentSection().first; + if (!Sec->getBeginSymbol()) { + MCSymbol *SectionStartSym = getContext().createTempSymbol(); + getStreamer().EmitLabel(SectionStartSym); + Sec->setBeginSymbol(SectionStartSym); + } + bool InsertResult = getContext().addGenDwarfSection(Sec); + assert(InsertResult && ".text section should not have debug info yet"); + (void)InsertResult; + getContext().setGenDwarfFileNumber(getStreamer().EmitDwarfFileDirective( + 0, StringRef(), getContext().getMainFileName())); + } + + // While we have input, parse each statement. + while (Lexer.isNot(AsmToken::Eof)) { + ParseStatementInfo Info; + if (!parseStatement(Info, nullptr, Address)) { + count++; + continue; + } + + //printf(">> 222 error = %u\n", Info.KsError); + if (!KsError) { + KsError = Info.KsError; + return 0; + } + + // We had an error, validate that one was emitted and recover by skipping to + // the next line. + // assert(HadError && "Parse statement returned an error, but none emitted!"); + + //eatToEndOfStatement(); + } + + if (TheCondState.TheCond != StartingCondState.TheCond || + TheCondState.Ignore != StartingCondState.Ignore) { + //return TokError("unmatched .ifs or .elses"); + KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; + return 0; + } + + // Check to see that all assembler local symbols were actually defined. + // Targets that don't do subsections via symbols may not want this, though, + // so conservatively exclude them. Only do this if we're finalizing, though, + // as otherwise we won't necessarilly have seen everything yet. + if (!NoFinalize && MAI.hasSubsectionsViaSymbols()) { + for (const auto &TableEntry : getContext().getSymbols()) { + MCSymbol *Sym = TableEntry.getValue(); + // Variable symbols may not be marked as defined, so check those + // explicitly. If we know it's a variable, we have a definition for + // the purposes of this check. + if (Sym->isTemporary() && !Sym->isVariable() && !Sym->isDefined()) { + // FIXME: We would really like to refer back to where the symbol was + // first referenced for a source location. We need to add something + // to track that. Currently, we just point to the end of the file. + //return Error(getLexer().getLoc(), "assembler local symbol '" + + // Sym->getName() + "' not defined"); // qq: set KsError, then return 0 + KsError = KS_ERR_ASM_SYMBOL_MISSING; + return 0; + } + } + } + + // Finalize the output stream if there are no errors and if the client wants + // us to. + if (!KsError) { + if (!HadError && !NoFinalize) + KsError = Out.Finish(); + } else + Out.Finish(); + + //return HadError || getContext().hadError(); + return count; +} + +void AsmParser::checkForValidSection() +{ +#if 0 + if (!ParsingInlineAsm && !getStreamer().getCurrentSection().first) { + TokError("expected section directive before assembly directive"); + Out.InitSections(false); + } +#endif +} + +/// \brief Throw away the rest of the line for testing purposes. +void AsmParser::eatToEndOfStatement() +{ + while (Lexer.isNot(AsmToken::EndOfStatement) && Lexer.isNot(AsmToken::Eof)) + Lex(); + + // Eat EOL. + if (Lexer.is(AsmToken::EndOfStatement)) + Lex(); +} + +StringRef AsmParser::parseStringToEndOfStatement() { + const char *Start = getTok().getLoc().getPointer(); + + while (Lexer.isNot(AsmToken::EndOfStatement) && Lexer.isNot(AsmToken::Eof)) + Lex(); + + const char *End = getTok().getLoc().getPointer(); + return StringRef(Start, End - Start); +} + +StringRef AsmParser::parseStringToComma() { + const char *Start = getTok().getLoc().getPointer(); + + while (Lexer.isNot(AsmToken::EndOfStatement) && + Lexer.isNot(AsmToken::Comma) && Lexer.isNot(AsmToken::Eof)) + Lex(); + + const char *End = getTok().getLoc().getPointer(); + return StringRef(Start, End - Start); +} + +/// \brief Parse a paren expression and return it. +/// NOTE: This assumes the leading '(' has already been consumed. +/// +/// parenexpr ::= expr) +/// +bool AsmParser::parseParenExpr(const MCExpr *&Res, SMLoc &EndLoc) { + if (parseExpression(Res)) + return true; + if (Lexer.isNot(AsmToken::RParen)) + //return TokError("expected ')' in parentheses expression"); + return true; + EndLoc = Lexer.getTok().getEndLoc(); + Lex(); + return false; +} + +/// \brief Parse a bracket expression and return it. +/// NOTE: This assumes the leading '[' has already been consumed. +/// +/// bracketexpr ::= expr] +/// +bool AsmParser::parseBracketExpr(const MCExpr *&Res, SMLoc &EndLoc) { + if (parseExpression(Res)) + return true; + if (Lexer.isNot(AsmToken::RBrac)) { + //return TokError("expected ']' in brackets expression"); + KsError = KS_ERR_ASM_INVALIDOPERAND; + return true; + } + EndLoc = Lexer.getTok().getEndLoc(); + Lex(); + return false; +} + +bool AsmParser::parsePrimaryExprAux(const MCExpr *&Res, SMLoc &EndLoc, unsigned int depth) +{ + if (depth > 0x100) { + KsError = KS_ERR_ASM_EXPR_TOKEN; + return true; + } + SMLoc FirstTokenLoc = getLexer().getLoc(); + AsmToken::TokenKind FirstTokenKind = Lexer.getKind(); + switch (FirstTokenKind) { + default: + //return TokError("unknown token in expression"); + KsError = KS_ERR_ASM_EXPR_TOKEN; + return true; + // If we have an error assume that we've already handled it. + case AsmToken::Error: + return true; + case AsmToken::Exclaim: + Lex(); // Eat the operator. + if (parsePrimaryExprAux(Res, EndLoc, depth+1)) + return true; + Res = MCUnaryExpr::createLNot(Res, getContext()); + return false; + case AsmToken::Dollar: + case AsmToken::At: + case AsmToken::String: + case AsmToken::Identifier: { + StringRef Identifier; + if (parseIdentifier(Identifier)) { + if (FirstTokenKind == AsmToken::Dollar) { + if (Lexer.getMAI().getDollarIsPC()) { + // This is a '$' reference, which references the current PC. Emit a + // temporary label to the streamer and refer to it. + MCSymbol *Sym = Ctx.createTempSymbol(); + Out.EmitLabel(Sym); + Res = MCSymbolRefExpr::create(Sym, MCSymbolRefExpr::VK_None, + getContext()); + EndLoc = FirstTokenLoc; + return false; + } + //return Error(FirstTokenLoc, "invalid token in expression"); + KsError = KS_ERR_ASM_INVALIDOPERAND; + return true; + } + } + // Parse symbol variant + std::pair Split; + if (!MAI.useParensForSymbolVariant()) { + if (FirstTokenKind == AsmToken::String) { + if (Lexer.is(AsmToken::At)) { + Lexer.Lex(); // eat @ + //SMLoc AtLoc = getLexer().getLoc(); + StringRef VName; + if (parseIdentifier(VName)) { + //return Error(AtLoc, "expected symbol variant after '@'"); + KsError = KS_ERR_ASM_INVALIDOPERAND; + return true; + } + + Split = std::make_pair(Identifier, VName); + } + } else { + Split = Identifier.split('@'); + } + } else if (Lexer.is(AsmToken::LParen)) { + Lexer.Lex(); // eat ( + StringRef VName; + parseIdentifier(VName); + if (Lexer.isNot(AsmToken::RParen)) { + //return Error(Lexer.getTok().getLoc(), + // "unexpected token in variant, expected ')'"); + KsError = KS_ERR_ASM_INVALIDOPERAND; + return true; + } + Lexer.Lex(); // eat ) + Split = std::make_pair(Identifier, VName); + } + + EndLoc = SMLoc::getFromPointer(Identifier.end()); + + // This is a symbol reference. + StringRef SymbolName = Identifier; + MCSymbolRefExpr::VariantKind Variant = MCSymbolRefExpr::VK_None; + + // Lookup the symbol variant if used. + if (Split.second.size()) { + Variant = MCSymbolRefExpr::getVariantKindForName(Split.second); + if (Variant != MCSymbolRefExpr::VK_Invalid) { + SymbolName = Split.first; + } else if (MAI.doesAllowAtInName() && !MAI.useParensForSymbolVariant()) { + Variant = MCSymbolRefExpr::VK_None; + } else { + //return Error(SMLoc::getFromPointer(Split.second.begin()), + // "invalid variant '" + Split.second + "'"); + KsError = KS_ERR_ASM_INVALIDOPERAND; + return true; + } + } + + if (SymbolName.empty()) { + return true; + } + MCSymbol *Sym = getContext().getOrCreateSymbol(SymbolName); + + // If this is an absolute variable reference, substitute it now to preserve + // semantics in the face of reassignment. + if (Sym->isVariable() && + isa(Sym->getVariableValue(/*SetUsed*/ false))) { + if (Variant) { + //return Error(EndLoc, "unexpected modifier on variable reference"); + KsError = KS_ERR_ASM_INVALIDOPERAND; + return true; + } + + Res = Sym->getVariableValue(/*SetUsed*/ false); + return false; + } + + // Otherwise create a symbol ref. + Res = MCSymbolRefExpr::create(Sym, Variant, getContext()); + return false; + } + case AsmToken::BigNum: + // return TokError("literal value out of range for directive"); + KsError = KS_ERR_ASM_DIRECTIVE_VALUE_RANGE; + return true; + case AsmToken::Integer: { + //SMLoc Loc = getTok().getLoc(); + bool valid; + int64_t IntVal = getTok().getIntVal(valid); + if (!valid) { + return true; + } + Res = MCConstantExpr::create(IntVal, getContext()); + EndLoc = Lexer.getTok().getEndLoc(); + Lex(); // Eat token. + // Look for 'b' or 'f' following an Integer as a directional label + if (Lexer.getKind() == AsmToken::Identifier) { + StringRef IDVal = getTok().getString(); + // Lookup the symbol variant if used. + std::pair Split = IDVal.split('@'); + MCSymbolRefExpr::VariantKind Variant = MCSymbolRefExpr::VK_None; + if (Split.first.size() != IDVal.size()) { + Variant = MCSymbolRefExpr::getVariantKindForName(Split.second); + if (Variant == MCSymbolRefExpr::VK_Invalid) { + // return TokError("invalid variant '" + Split.second + "'"); + KsError = KS_ERR_ASM_VARIANT_INVALID; + return true; + } + IDVal = Split.first; + } + if (IDVal == "f" || IDVal == "b") { + bool valid; + MCSymbol *Sym = + Ctx.getDirectionalLocalSymbol(IntVal, IDVal == "b", valid); + if (!valid) + return true; + Res = MCSymbolRefExpr::create(Sym, Variant, getContext()); + if (IDVal == "b" && Sym->isUndefined()) { + //return Error(Loc, "invalid reference to undefined symbol"); + KsError = KS_ERR_ASM_INVALIDOPERAND; + return true; + } + EndLoc = Lexer.getTok().getEndLoc(); + Lex(); // Eat identifier. + } + } + return false; + } + case AsmToken::Real: { + APFloat RealVal(APFloat::IEEEdouble, getTok().getString()); + uint64_t IntVal = RealVal.bitcastToAPInt().getZExtValue(); + Res = MCConstantExpr::create(IntVal, getContext()); + EndLoc = Lexer.getTok().getEndLoc(); + Lex(); // Eat token. + return false; + } + case AsmToken::Dot: { + // This is a '.' reference, which references the current PC. Emit a + // temporary label to the streamer and refer to it. + MCSymbol *Sym = Ctx.createTempSymbol(); + Out.EmitLabel(Sym); + Res = MCSymbolRefExpr::create(Sym, MCSymbolRefExpr::VK_None, getContext()); + EndLoc = Lexer.getTok().getEndLoc(); + Lex(); // Eat identifier. + return false; + } + case AsmToken::LParen: + Lex(); // Eat the '('. + return parseParenExpr(Res, EndLoc); + case AsmToken::LBrac: + if (!PlatformParser->HasBracketExpressions()) { + // return TokError("brackets expression not supported on this target"); + KsError = KS_ERR_ASM_EXPR_BRACKET; + return true; + } + Lex(); // Eat the '['. + return parseBracketExpr(Res, EndLoc); + case AsmToken::Minus: + Lex(); // Eat the operator. + if (parsePrimaryExprAux(Res, EndLoc, depth+1)) + return true; + Res = MCUnaryExpr::createMinus(Res, getContext()); + return false; + case AsmToken::Plus: + Lex(); // Eat the operator. + if (parsePrimaryExprAux(Res, EndLoc, depth+1)) + return true; + Res = MCUnaryExpr::createPlus(Res, getContext()); + return false; + case AsmToken::Tilde: + Lex(); // Eat the operator. + if (parsePrimaryExprAux(Res, EndLoc, depth+1)) + return true; + Res = MCUnaryExpr::createNot(Res, getContext()); + return false; + } +} + +/// \brief Parse a primary expression and return it. +/// primaryexpr ::= (parenexpr +/// primaryexpr ::= symbol +/// primaryexpr ::= number +/// primaryexpr ::= '.' +/// primaryexpr ::= ~,+,- primaryexpr +bool AsmParser::parsePrimaryExpr(const MCExpr *&Res, SMLoc &EndLoc) +{ + return parsePrimaryExprAux(Res, EndLoc, 0); +} + +bool AsmParser::parseExpression(const MCExpr *&Res) { + SMLoc EndLoc; + return parseExpression(Res, EndLoc); +} + +const MCExpr * +AsmParser::applyModifierToExpr(const MCExpr *E, + MCSymbolRefExpr::VariantKind Variant) { + // Ask the target implementation about this expression first. + const MCExpr *NewE = getTargetParser().applyModifierToExpr(E, Variant, Ctx); + if (NewE) + return NewE; + // Recurse over the given expression, rebuilding it to apply the given variant + // if there is exactly one symbol. + switch (E->getKind()) { + case MCExpr::Target: + case MCExpr::Constant: + return nullptr; + + case MCExpr::SymbolRef: { + const MCSymbolRefExpr *SRE = cast(E); + + if (SRE->getKind() != MCSymbolRefExpr::VK_None) { + //TokError("invalid variant on expression '" + getTok().getIdentifier() + + // "' (already modified)"); + return E; + } + + return MCSymbolRefExpr::create(&SRE->getSymbol(), Variant, getContext()); + } + + case MCExpr::Unary: { + const MCUnaryExpr *UE = cast(E); + const MCExpr *Sub = applyModifierToExpr(UE->getSubExpr(), Variant); + if (!Sub) + return nullptr; + return MCUnaryExpr::create(UE->getOpcode(), Sub, getContext()); + } + + case MCExpr::Binary: { + const MCBinaryExpr *BE = cast(E); + const MCExpr *LHS = applyModifierToExpr(BE->getLHS(), Variant); + const MCExpr *RHS = applyModifierToExpr(BE->getRHS(), Variant); + + if (!LHS && !RHS) + return nullptr; + + if (!LHS) + LHS = BE->getLHS(); + if (!RHS) + RHS = BE->getRHS(); + + return MCBinaryExpr::create(BE->getOpcode(), LHS, RHS, getContext()); + } + } + + llvm_unreachable("Invalid expression kind!"); +} + +/// \brief Parse an expression and return it. +/// +/// expr ::= expr &&,|| expr -> lowest. +/// expr ::= expr |,^,&,! expr +/// expr ::= expr ==,!=,<>,<,<=,>,>= expr +/// expr ::= expr <<,>> expr +/// expr ::= expr +,- expr +/// expr ::= expr *,/,% expr -> highest. +/// expr ::= primaryexpr +/// +bool AsmParser::parseExpression(const MCExpr *&Res, SMLoc &EndLoc) { + // Parse the expression. + Res = nullptr; + if (parsePrimaryExpr(Res, EndLoc) || parseBinOpRHS(1, Res, EndLoc)) + return true; + + // As a special case, we support 'a op b @ modifier' by rewriting the + // expression to include the modifier. This is inefficient, but in general we + // expect users to use 'a@modifier op b'. + if (Lexer.getKind() == AsmToken::At) { + Lex(); + + if (Lexer.isNot(AsmToken::Identifier)) { + // return TokError("unexpected symbol modifier following '@'"); + KsError = KS_ERR_ASM_SYMBOL_MODIFIER; + return true; + } + + MCSymbolRefExpr::VariantKind Variant = + MCSymbolRefExpr::getVariantKindForName(getTok().getIdentifier()); + if (Variant == MCSymbolRefExpr::VK_Invalid) { + // return TokError("invalid variant '" + getTok().getIdentifier() + "'"); + KsError = KS_ERR_ASM_VARIANT_INVALID; + return true; + } + + const MCExpr *ModifiedRes = applyModifierToExpr(Res, Variant); + if (!ModifiedRes) { + // return TokError("invalid modifier '" + getTok().getIdentifier() + + // "' (no symbols present)"); + KsError = KS_ERR_ASM_VARIANT_INVALID; + return true; + } + + Res = ModifiedRes; + Lex(); + } + + // Try to constant fold it up front, if possible. + int64_t Value; + if (Res->evaluateAsAbsolute(Value)) + Res = MCConstantExpr::create(Value, getContext()); + + return false; +} + +bool AsmParser::parseParenExpression(const MCExpr *&Res, SMLoc &EndLoc) { + Res = nullptr; + return parseParenExpr(Res, EndLoc) || parseBinOpRHS(1, Res, EndLoc); +} + +bool AsmParser::parseParenExprOfDepth(unsigned ParenDepth, const MCExpr *&Res, + SMLoc &EndLoc) { + if (parseParenExpr(Res, EndLoc)) + return true; + + for (; ParenDepth > 0; --ParenDepth) { + if (parseBinOpRHS(1, Res, EndLoc)) + return true; + + // We don't Lex() the last RParen. + // This is the same behavior as parseParenExpression(). + if (ParenDepth - 1 > 0) { + if (Lexer.isNot(AsmToken::RParen)) { + // return TokError("expected ')' in parentheses expression"); + KsError = KS_ERR_ASM_RPAREN; + return true; + } + EndLoc = Lexer.getTok().getEndLoc(); + Lex(); + } + } + return false; +} + +bool AsmParser::parseAbsoluteExpression(int64_t &Res) { + const MCExpr *Expr; + + //SMLoc StartLoc = Lexer.getLoc(); + if (parseExpression(Expr)) + return true; + + if (!Expr->evaluateAsAbsolute(Res)) { + //return Error(StartLoc, "expected absolute expression"); + KsError = KS_ERR_ASM_INVALIDOPERAND; + return true; + } + + return false; +} + +static unsigned getDarwinBinOpPrecedence(AsmToken::TokenKind K, + MCBinaryExpr::Opcode &Kind, + bool ShouldUseLogicalShr) { + switch (K) { + default: + return 0; // not a binop. + + // Lowest Precedence: &&, || + case AsmToken::AmpAmp: + Kind = MCBinaryExpr::LAnd; + return 1; + case AsmToken::PipePipe: + Kind = MCBinaryExpr::LOr; + return 1; + + // Low Precedence: |, &, ^ + // + // FIXME: gas seems to support '!' as an infix operator? + case AsmToken::Pipe: + Kind = MCBinaryExpr::Or; + return 2; + case AsmToken::Caret: + Kind = MCBinaryExpr::Xor; + return 2; + case AsmToken::Amp: + Kind = MCBinaryExpr::And; + return 2; + + // Low Intermediate Precedence: ==, !=, <>, <, <=, >, >= + case AsmToken::EqualEqual: + Kind = MCBinaryExpr::EQ; + return 3; + case AsmToken::ExclaimEqual: + case AsmToken::LessGreater: + Kind = MCBinaryExpr::NE; + return 3; + case AsmToken::Less: + Kind = MCBinaryExpr::LT; + return 3; + case AsmToken::LessEqual: + Kind = MCBinaryExpr::LTE; + return 3; + case AsmToken::Greater: + Kind = MCBinaryExpr::GT; + return 3; + case AsmToken::GreaterEqual: + Kind = MCBinaryExpr::GTE; + return 3; + + // Intermediate Precedence: <<, >> + case AsmToken::LessLess: + Kind = MCBinaryExpr::Shl; + return 4; + case AsmToken::GreaterGreater: + Kind = ShouldUseLogicalShr ? MCBinaryExpr::LShr : MCBinaryExpr::AShr; + return 4; + + // High Intermediate Precedence: +, - + case AsmToken::Plus: + Kind = MCBinaryExpr::Add; + return 5; + case AsmToken::Minus: + Kind = MCBinaryExpr::Sub; + return 5; + + // Highest Precedence: *, /, % + case AsmToken::Star: + Kind = MCBinaryExpr::Mul; + return 6; + case AsmToken::Slash: + Kind = MCBinaryExpr::Div; + return 6; + case AsmToken::Percent: + Kind = MCBinaryExpr::Mod; + return 6; + } +} + +static unsigned getGNUBinOpPrecedence(AsmToken::TokenKind K, + MCBinaryExpr::Opcode &Kind, + bool ShouldUseLogicalShr) { + switch (K) { + default: + return 0; // not a binop. + + // Lowest Precedence: &&, || + case AsmToken::AmpAmp: + Kind = MCBinaryExpr::LAnd; + return 2; + case AsmToken::PipePipe: + Kind = MCBinaryExpr::LOr; + return 1; + + // Low Precedence: ==, !=, <>, <, <=, >, >= + case AsmToken::EqualEqual: + Kind = MCBinaryExpr::EQ; + return 3; + case AsmToken::ExclaimEqual: + case AsmToken::LessGreater: + Kind = MCBinaryExpr::NE; + return 3; + case AsmToken::Less: + Kind = MCBinaryExpr::LT; + return 3; + case AsmToken::LessEqual: + Kind = MCBinaryExpr::LTE; + return 3; + case AsmToken::Greater: + Kind = MCBinaryExpr::GT; + return 3; + case AsmToken::GreaterEqual: + Kind = MCBinaryExpr::GTE; + return 3; + + // Low Intermediate Precedence: +, - + case AsmToken::Plus: + Kind = MCBinaryExpr::Add; + return 4; + case AsmToken::Minus: + Kind = MCBinaryExpr::Sub; + return 4; + + // High Intermediate Precedence: |, &, ^ + // + // FIXME: gas seems to support '!' as an infix operator? + case AsmToken::Pipe: + Kind = MCBinaryExpr::Or; + return 5; + case AsmToken::Caret: + Kind = MCBinaryExpr::Xor; + return 5; + case AsmToken::Amp: + Kind = MCBinaryExpr::And; + return 5; + + // Highest Precedence: *, /, %, <<, >> + case AsmToken::Star: + Kind = MCBinaryExpr::Mul; + return 6; + case AsmToken::Slash: + Kind = MCBinaryExpr::Div; + return 6; + case AsmToken::Percent: + Kind = MCBinaryExpr::Mod; + return 6; + case AsmToken::LessLess: + Kind = MCBinaryExpr::Shl; + return 6; + case AsmToken::GreaterGreater: + Kind = ShouldUseLogicalShr ? MCBinaryExpr::LShr : MCBinaryExpr::AShr; + return 6; + } +} + +unsigned AsmParser::getBinOpPrecedence(AsmToken::TokenKind K, + MCBinaryExpr::Opcode &Kind) { + bool ShouldUseLogicalShr = MAI.shouldUseLogicalShr(); + return IsDarwin ? getDarwinBinOpPrecedence(K, Kind, ShouldUseLogicalShr) + : getGNUBinOpPrecedence(K, Kind, ShouldUseLogicalShr); +} + +/// \brief Parse all binary operators with precedence >= 'Precedence'. +/// Res contains the LHS of the expression on input. +bool AsmParser::parseBinOpRHS(unsigned Precedence, const MCExpr *&Res, + SMLoc &EndLoc) { + while (1) { + MCBinaryExpr::Opcode Kind = MCBinaryExpr::Add; + unsigned TokPrec = getBinOpPrecedence(Lexer.getKind(), Kind); + + // If the next token is lower precedence than we are allowed to eat, return + // successfully with what we ate already. + if (TokPrec < Precedence) + return false; + + Lex(); + + // Eat the next primary expression. + const MCExpr *RHS; + if (parsePrimaryExpr(RHS, EndLoc)) + return true; + + // If BinOp binds less tightly with RHS than the operator after RHS, let + // the pending operator take RHS as its LHS. + MCBinaryExpr::Opcode Dummy; + unsigned NextTokPrec = getBinOpPrecedence(Lexer.getKind(), Dummy); + if (TokPrec < NextTokPrec && parseBinOpRHS(TokPrec + 1, RHS, EndLoc)) + return true; + + // Merge LHS and RHS according to operator. + Res = MCBinaryExpr::create(Kind, Res, RHS, getContext()); + } +} + +bool AsmParser::isNasmDirective(StringRef IDVal) +{ + return (DirectiveKindMap.find(IDVal.lower()) != DirectiveKindMap.end()); +} + +bool AsmParser::isDirective(StringRef IDVal) +{ + if (KsSyntax == KS_OPT_SYNTAX_NASM) + return isNasmDirective(IDVal); + else // Directives start with "." + return (!IDVal.empty() && IDVal[0] == '.' && IDVal != "."); +} + +/// ParseStatement: +/// ::= EndOfStatement +/// ::= Label* Directive ...Operands... EndOfStatement +/// ::= Label* Identifier OperandList* EndOfStatement +// return true on error +bool AsmParser::parseStatement(ParseStatementInfo &Info, + MCAsmParserSemaCallback *SI, uint64_t &Address) +{ + KsError = 0; + if (Lexer.is(AsmToken::EndOfStatement)) { + Out.AddBlankLine(); + Lex(); + return false; + } + + // Statements always start with an identifier or are a full line comment. + AsmToken ID = getTok(); + //printf(">>> parseStatement:ID = %s\n", ID.getString().str().c_str()); + SMLoc IDLoc = ID.getLoc(); + StringRef IDVal; + int64_t LocalLabelVal = -1; + // A full line comment is a '#' as the first token. + if (Lexer.is(AsmToken::Hash)) + return parseCppHashLineFilenameComment(IDLoc); + + // Allow an integer followed by a ':' as a directional local label. + if (Lexer.is(AsmToken::Integer)) { + bool valid; + LocalLabelVal = getTok().getIntVal(valid); + if (!valid) { + return true; + } + if (LocalLabelVal < 0) { + if (!TheCondState.Ignore) { + // return TokError("unexpected token at start of statement"); + Info.KsError = KS_ERR_ASM_STAT_TOKEN; + return true; + } + IDVal = ""; + } else { + IDVal = getTok().getString(); + Lex(); // Consume the integer token to be used as an identifier token. + if (Lexer.getKind() != AsmToken::Colon) { + if (!TheCondState.Ignore) { + // return TokError("unexpected token at start of statement"); + Info.KsError = KS_ERR_ASM_STAT_TOKEN; + return true; + } + } + } + } else if (Lexer.is(AsmToken::Dot)) { + // Treat '.' as a valid identifier in this context. + Lex(); + IDVal = "."; + } else if (Lexer.is(AsmToken::LCurly)) { + // Treat '{' as a valid identifier in this context. + Lex(); + IDVal = "{"; + } else if (Lexer.is(AsmToken::RCurly)) { + // Treat '}' as a valid identifier in this context. + Lex(); + IDVal = "}"; + } else if (KsSyntax == KS_OPT_SYNTAX_NASM && Lexer.is(AsmToken::LBrac)) { + // [bits xx] + Lex(); + ID = Lexer.getTok(); + if (ID.getString().lower() == "bits") { + Lex(); + if (parseNasmDirectiveBits()) { + Info.KsError = KS_ERR_ASM_DIRECTIVE_ID; + return true; + } else { + return false; + } + } else { + Info.KsError = KS_ERR_ASM_DIRECTIVE_ID; + return true; + } + } else if (KsSyntax == KS_OPT_SYNTAX_NASM && isNasmDirective(ID.getString())) { + Lex(); + IDVal = ID.getString(); + } else if (parseIdentifier(IDVal)) { + if (!TheCondState.Ignore) { + // return TokError("unexpected token at start of statement"); + Info.KsError = KS_ERR_ASM_STAT_TOKEN; + return true; + } + IDVal = ""; + } + + // Handle conditional assembly here before checking for skipping. We + // have to do this so that .endif isn't skipped in a ".if 0" block for + // example. + + StringMap::const_iterator DirKindIt = + DirectiveKindMap.find(IDVal.lower()); + DirectiveKind DirKind = (DirKindIt == DirectiveKindMap.end()) + ? DK_NO_DIRECTIVE + : DirKindIt->getValue(); + switch (DirKind) { + default: + break; + case DK_IF: + case DK_IFEQ: + case DK_IFGE: + case DK_IFGT: + case DK_IFLE: + case DK_IFLT: + case DK_IFNE: + return parseDirectiveIf(IDLoc, DirKind); + case DK_IFB: + return parseDirectiveIfb(IDLoc, true); + case DK_IFNB: + return parseDirectiveIfb(IDLoc, false); + case DK_IFC: + return parseDirectiveIfc(IDLoc, true); + case DK_IFEQS: + return parseDirectiveIfeqs(IDLoc, true); + case DK_IFNC: + return parseDirectiveIfc(IDLoc, false); + case DK_IFNES: + return parseDirectiveIfeqs(IDLoc, false); + case DK_IFDEF: + return parseDirectiveIfdef(IDLoc, true); + case DK_IFNDEF: + case DK_IFNOTDEF: + return parseDirectiveIfdef(IDLoc, false); + case DK_ELSEIF: + return parseDirectiveElseIf(IDLoc); + case DK_ELSE: + return parseDirectiveElse(IDLoc); + case DK_ENDIF: + return parseDirectiveEndIf(IDLoc); + } + + // Ignore the statement if in the middle of inactive conditional + // (e.g. ".if 0"). + if (TheCondState.Ignore) { + eatToEndOfStatement(); + return false; + } + + // FIXME: Recurse on local labels? + + // See what kind of statement we have. + switch (Lexer.getKind()) { + case AsmToken::Colon: { + bool valid; + if (!getTargetParser().isLabel(ID, valid)) + break; + if (!valid) { + Info.KsError = KS_ERR_ASM_LABEL_INVALID; + return true; + } + checkForValidSection(); + + // identifier ':' -> Label. + Lex(); + + // Diagnose attempt to use '.' as a label. + if (IDVal == ".") { + //return Error(IDLoc, "invalid use of pseudo-symbol '.' as a label"); + KsError = KS_ERR_ASM_INVALIDOPERAND; + return true; + } + + // Diagnose attempt to use a variable as a label. + // + // FIXME: Diagnostics. Note the location of the definition as a label. + // FIXME: This doesn't diagnose assignment to a symbol which has been + // implicitly marked as external. + MCSymbol *Sym; + if (LocalLabelVal == -1) { + if (ParsingInlineAsm && SI) { + StringRef RewrittenLabel = + SI->LookupInlineAsmLabel(IDVal, getSourceManager(), IDLoc, true); + assert(RewrittenLabel.size() && + "We should have an internal name here."); + Info.AsmRewrites->emplace_back(AOK_Label, IDLoc, IDVal.size(), + RewrittenLabel); + IDVal = RewrittenLabel; + } + if (IDVal.empty()) { + return true; + } + Sym = getContext().getOrCreateSymbol(IDVal); + } else { + bool valid; + Sym = Ctx.createDirectionalLocalSymbol(LocalLabelVal, valid); + if (!valid) { + Info.KsError = KS_ERR_ASM_LABEL_INVALID; + return true; + } + } + + Sym->redefineIfPossible(); + + if (!Sym->isUndefined() || Sym->isVariable()) { + //return Error(IDLoc, "invalid symbol redefinition"); + Info.KsError = KS_ERR_ASM_SYMBOL_REDEFINED; + return true; + } + + // Emit the label. + if (!ParsingInlineAsm) + Out.EmitLabel(Sym); + + getTargetParser().onLabelParsed(Sym); + + // Consume any end of statement token, if present, to avoid spurious + // AddBlankLine calls(). + if (Lexer.is(AsmToken::EndOfStatement)) { + Lex(); + if (Lexer.is(AsmToken::Eof)) + return false; + } + + return false; + } + + case AsmToken::Equal: + if (!getTargetParser().equalIsAsmAssignment()) + break; + // identifier '=' ... -> assignment statement + Lex(); + + if (parseAssignment(IDVal, true)) { + Info.KsError = KS_ERR_ASM_DIRECTIVE_EQU; + return true; + } + return false; + + default: // Normal instruction or directive. + break; + } + + // If macros are enabled, check to see if this is a macro instantiation. + if (areMacrosEnabled()) + if (const MCAsmMacro *M = lookupMacro(IDVal)) { + return handleMacroEntry(M, IDLoc); + } + + // Otherwise, we have a normal instruction or directive. + if (isDirective(IDVal)) { + // There are several entities interested in parsing directives: + // + // 1. The target-specific assembly parser. Some directives are target + // specific or may potentially behave differently on certain targets. + // 2. Asm parser extensions. For example, platform-specific parsers + // (like the ELF parser) register themselves as extensions. + // 3. The generic directive parser implemented by this class. These are + // all the directives that behave in a target and platform independent + // manner, or at least have a default behavior that's shared between + // all targets and platforms. + + // First query the target-specific parser. It will return 'true' if it + // isn't interested in this directive. + uint64_t BytesInFragment = getStreamer().getCurrentFragmentSize(); + if (!getTargetParser().ParseDirective(ID)){ + // increment the address for the next statement if the directive + // has emitted any value to the streamer. + Address += getStreamer().getCurrentFragmentSize() - BytesInFragment; + return false; + } + + // Next, check the extension directive map to see if any extension has + // registered itself to parse this directive. + std::pair Handler = + ExtensionDirectiveMap.lookup(IDVal); + if (Handler.first) + return (*Handler.second)(Handler.first, IDVal, IDLoc); + + // Finally, if no one else is interested in this directive, it must be + // generic and familiar to this class. + switch (DirKind) { + default: + break; + case DK_SET: + case DK_EQU: + return parseDirectiveSet(IDVal, true); + case DK_EQUIV: + return parseDirectiveSet(IDVal, false); + case DK_ASCII: + return parseDirectiveAscii(IDVal, false); + case DK_ASCIZ: + case DK_STRING: + return parseDirectiveAscii(IDVal, true); + case DK_BYTE: + return parseDirectiveValue(1, Info.KsError); + case DK_SHORT: + case DK_VALUE: + case DK_2BYTE: + return parseDirectiveValue(2, Info.KsError); + case DK_LONG: + case DK_INT: + case DK_4BYTE: + return parseDirectiveValue(4, Info.KsError); + case DK_QUAD: + case DK_8BYTE: + return parseDirectiveValue(8, Info.KsError); + case DK_OCTA: + return parseDirectiveOctaValue(Info.KsError); + case DK_SINGLE: + case DK_FLOAT: + return parseDirectiveRealValue(APFloat::IEEEsingle); + case DK_DOUBLE: + return parseDirectiveRealValue(APFloat::IEEEdouble); + case DK_ALIGN: { + bool IsPow2 = !getContext().getAsmInfo()->getAlignmentIsInBytes(); + return parseDirectiveAlign(IsPow2, /*ExprSize=*/1); + } + case DK_ALIGN32: { + bool IsPow2 = !getContext().getAsmInfo()->getAlignmentIsInBytes(); + return parseDirectiveAlign(IsPow2, /*ExprSize=*/4); + } + case DK_BALIGN: + return parseDirectiveAlign(/*IsPow2=*/false, /*ExprSize=*/1); + case DK_BALIGNW: + return parseDirectiveAlign(/*IsPow2=*/false, /*ExprSize=*/2); + case DK_BALIGNL: + return parseDirectiveAlign(/*IsPow2=*/false, /*ExprSize=*/4); + case DK_P2ALIGN: + return parseDirectiveAlign(/*IsPow2=*/true, /*ExprSize=*/1); + case DK_P2ALIGNW: + return parseDirectiveAlign(/*IsPow2=*/true, /*ExprSize=*/2); + case DK_P2ALIGNL: + return parseDirectiveAlign(/*IsPow2=*/true, /*ExprSize=*/4); + case DK_ORG: + return parseDirectiveOrg(); + case DK_FILL: + return parseDirectiveFill(); + case DK_ZERO: + return parseDirectiveZero(); + case DK_EXTERN: + eatToEndOfStatement(); // .extern is the default, ignore it. + return false; + case DK_GLOBL: + case DK_GLOBAL: + return parseDirectiveSymbolAttribute(MCSA_Global); + case DK_LAZY_REFERENCE: + return parseDirectiveSymbolAttribute(MCSA_LazyReference); + case DK_NO_DEAD_STRIP: + return parseDirectiveSymbolAttribute(MCSA_NoDeadStrip); + case DK_SYMBOL_RESOLVER: + return parseDirectiveSymbolAttribute(MCSA_SymbolResolver); + case DK_PRIVATE_EXTERN: + return parseDirectiveSymbolAttribute(MCSA_PrivateExtern); + case DK_REFERENCE: + return parseDirectiveSymbolAttribute(MCSA_Reference); + case DK_WEAK_DEFINITION: + return parseDirectiveSymbolAttribute(MCSA_WeakDefinition); + case DK_WEAK_REFERENCE: + return parseDirectiveSymbolAttribute(MCSA_WeakReference); + case DK_WEAK_DEF_CAN_BE_HIDDEN: + return parseDirectiveSymbolAttribute(MCSA_WeakDefAutoPrivate); + case DK_COMM: + case DK_COMMON: + return parseDirectiveComm(/*IsLocal=*/false); + case DK_LCOMM: + return parseDirectiveComm(/*IsLocal=*/true); + case DK_ABORT: + return parseDirectiveAbort(); + case DK_INCLUDE: + return parseDirectiveInclude(); + case DK_INCBIN: + return parseDirectiveIncbin(); + case DK_CODE16: + case DK_CODE16GCC: + // return TokError(Twine(IDVal) + " not supported yet"); + Info.KsError = KS_ERR_ASM_UNSUPPORTED; + return true; + case DK_REPT: + return parseDirectiveRept(IDLoc, IDVal); + case DK_IRP: + return parseDirectiveIrp(IDLoc); + case DK_IRPC: + return parseDirectiveIrpc(IDLoc); + case DK_ENDR: + return parseDirectiveEndr(IDLoc); + case DK_BUNDLE_ALIGN_MODE: + return parseDirectiveBundleAlignMode(); + case DK_BUNDLE_LOCK: + return parseDirectiveBundleLock(); + case DK_BUNDLE_UNLOCK: + return parseDirectiveBundleUnlock(); + case DK_SLEB128: + return parseDirectiveLEB128(true); + case DK_ULEB128: + return parseDirectiveLEB128(false); + case DK_SPACE: + case DK_SKIP: + return parseDirectiveSpace(IDVal); + case DK_FILE: + return parseDirectiveFile(IDLoc); + case DK_LINE: + return parseDirectiveLine(); + case DK_LOC: + return parseDirectiveLoc(); + case DK_STABS: + return parseDirectiveStabs(); + case DK_CV_FILE: + return parseDirectiveCVFile(); + case DK_CV_LOC: + return parseDirectiveCVLoc(); + case DK_CV_LINETABLE: + return parseDirectiveCVLinetable(); + case DK_CV_INLINE_LINETABLE: + return parseDirectiveCVInlineLinetable(); + case DK_CV_STRINGTABLE: + return parseDirectiveCVStringTable(); + case DK_CV_FILECHECKSUMS: + return parseDirectiveCVFileChecksums(); + case DK_CFI_SECTIONS: + return parseDirectiveCFISections(); + case DK_CFI_STARTPROC: + return parseDirectiveCFIStartProc(); + case DK_CFI_ENDPROC: + return parseDirectiveCFIEndProc(); + case DK_CFI_DEF_CFA: + return parseDirectiveCFIDefCfa(IDLoc); + case DK_CFI_DEF_CFA_OFFSET: + return parseDirectiveCFIDefCfaOffset(); + case DK_CFI_ADJUST_CFA_OFFSET: + return parseDirectiveCFIAdjustCfaOffset(); + case DK_CFI_DEF_CFA_REGISTER: + return parseDirectiveCFIDefCfaRegister(IDLoc); + case DK_CFI_OFFSET: + return parseDirectiveCFIOffset(IDLoc); + case DK_CFI_REL_OFFSET: + return parseDirectiveCFIRelOffset(IDLoc); + case DK_CFI_PERSONALITY: + return parseDirectiveCFIPersonalityOrLsda(true); + case DK_CFI_LSDA: + return parseDirectiveCFIPersonalityOrLsda(false); + case DK_CFI_REMEMBER_STATE: + return parseDirectiveCFIRememberState(); + case DK_CFI_RESTORE_STATE: + return parseDirectiveCFIRestoreState(); + case DK_CFI_SAME_VALUE: + return parseDirectiveCFISameValue(IDLoc); + case DK_CFI_RESTORE: + return parseDirectiveCFIRestore(IDLoc); + case DK_CFI_ESCAPE: + return parseDirectiveCFIEscape(); + case DK_CFI_SIGNAL_FRAME: + return parseDirectiveCFISignalFrame(); + case DK_CFI_UNDEFINED: + return parseDirectiveCFIUndefined(IDLoc); + case DK_CFI_REGISTER: + return parseDirectiveCFIRegister(IDLoc); + case DK_CFI_WINDOW_SAVE: + return parseDirectiveCFIWindowSave(); + case DK_MACROS_ON: + case DK_MACROS_OFF: + return parseDirectiveMacrosOnOff(IDVal); + case DK_MACRO: + return parseDirectiveMacro(IDLoc); + case DK_EXITM: + return parseDirectiveExitMacro(IDVal); + case DK_ENDM: + case DK_ENDMACRO: + return parseDirectiveEndMacro(IDVal); + case DK_PURGEM: + return parseDirectivePurgeMacro(IDLoc); + case DK_END: + return parseDirectiveEnd(IDLoc); + case DK_ERR: + return parseDirectiveError(IDLoc, false); + case DK_ERROR: + return parseDirectiveError(IDLoc, true); + case DK_WARNING: + return parseDirectiveWarning(IDLoc); + case DK_RELOC: + return parseDirectiveReloc(IDLoc); + case DK_NASM_BITS: + if (parseNasmDirectiveBits()) { + Info.KsError = KS_ERR_ASM_DIRECTIVE_ID; + return true; + } else { + return false; + } + case DK_NASM_USE32: + return parseNasmDirectiveUse32(); + case DK_NASM_DEFAULT: + if (parseNasmDirectiveDefault()) { + Info.KsError = KS_ERR_ASM_DIRECTIVE_ID; + return true; + } else { + return false; + } + } + + //return Error(IDLoc, "unknown directive"); + KsError = KS_ERR_ASM_DIRECTIVE_UNKNOWN; + return true; + } + + // __asm _emit or __asm __emit + if (ParsingInlineAsm && (IDVal == "_emit" || IDVal == "__emit" || + IDVal == "_EMIT" || IDVal == "__EMIT")) + return parseDirectiveMSEmit(IDLoc, Info, IDVal.size()); + + // __asm align + if (ParsingInlineAsm && (IDVal == "align" || IDVal == "ALIGN")) + return parseDirectiveMSAlign(IDLoc, Info); + + if (ParsingInlineAsm && (IDVal == "even")) + Info.AsmRewrites->emplace_back(AOK_EVEN, IDLoc, 4); + checkForValidSection(); + + // Canonicalize the opcode to lower case. + std::string OpcodeStr = IDVal.lower(); + ParseInstructionInfo IInfo(Info.AsmRewrites); + //printf(">> Going to ParseInstruction()\n"); + bool HadError = getTargetParser().ParseInstruction(IInfo, OpcodeStr, ID, + Info.ParsedOperands, Info.KsError); + Info.ParseError = HadError; + + // If parsing succeeded, match the instruction. + if (!HadError) { + uint64_t ErrorInfo; + //printf(">> Going to MatchAndEmitInstruction()\n"); + return getTargetParser().MatchAndEmitInstruction(IDLoc, Info.Opcode, + Info.ParsedOperands, Out, + ErrorInfo, ParsingInlineAsm, + Info.KsError, Address); + } + + return true; +} + +/// eatToEndOfLine uses the Lexer to eat the characters to the end of the line +/// since they may not be able to be tokenized to get to the end of line token. +void AsmParser::eatToEndOfLine() +{ + if (!Lexer.is(AsmToken::EndOfStatement)) + Lexer.LexUntilEndOfLine(); + // Eat EOL. + Lex(); +} + +/// parseCppHashLineFilenameComment as this: +/// ::= # number "filename" +/// or just as a full line comment if it doesn't have a number and a string. +bool AsmParser::parseCppHashLineFilenameComment(SMLoc L) { + Lex(); // Eat the hash token. + + if (getLexer().isNot(AsmToken::Integer)) { + // Consume the line since in cases it is not a well-formed line directive, + // as if were simply a full line comment. + eatToEndOfLine(); + return false; + } + + bool valid; + int64_t LineNumber = getTok().getIntVal(valid); + if (!valid) { + return true; + } + Lex(); + + if (getLexer().isNot(AsmToken::String)) { + eatToEndOfLine(); + return false; + } + + StringRef Filename = getTok().getString(); + // Get rid of the enclosing quotes. + Filename = Filename.substr(1, Filename.size() - 2); + + // Save the SMLoc, Filename and LineNumber for later use by diagnostics. + CppHashLoc = L; + CppHashFilename = Filename; + CppHashLineNumber = LineNumber; + CppHashBuf = CurBuffer; + + // Ignore any trailing characters, they're just comment. + eatToEndOfLine(); + return false; +} + +/// \brief will use the last parsed cpp hash line filename comment +/// for the Filename and LineNo if any in the diagnostic. +void AsmParser::DiagHandler(const SMDiagnostic &Diag, void *Context) { + const AsmParser *Parser = static_cast(Context); + raw_ostream &OS = errs(); + + const SourceMgr &DiagSrcMgr = *Diag.getSourceMgr(); + SMLoc DiagLoc = Diag.getLoc(); + unsigned DiagBuf = DiagSrcMgr.FindBufferContainingLoc(DiagLoc); + unsigned CppHashBuf = + Parser->SrcMgr.FindBufferContainingLoc(Parser->CppHashLoc); + + // Like SourceMgr::printMessage() we need to print the include stack if any + // before printing the message. + unsigned DiagCurBuffer = DiagSrcMgr.FindBufferContainingLoc(DiagLoc); + if (!Parser->SavedDiagHandler && DiagCurBuffer && + DiagCurBuffer != DiagSrcMgr.getMainFileID()) { + SMLoc ParentIncludeLoc = DiagSrcMgr.getParentIncludeLoc(DiagCurBuffer); + DiagSrcMgr.PrintIncludeStack(ParentIncludeLoc, OS); + } + + // If we have not parsed a cpp hash line filename comment or the source + // manager changed or buffer changed (like in a nested include) then just + // print the normal diagnostic using its Filename and LineNo. + if (!Parser->CppHashLineNumber || &DiagSrcMgr != &Parser->SrcMgr || + DiagBuf != CppHashBuf) { + if (Parser->SavedDiagHandler) + Parser->SavedDiagHandler(Diag, Parser->SavedDiagContext); + else + Diag.print(nullptr, OS); + return; + } + + // Use the CppHashFilename and calculate a line number based on the + // CppHashLoc and CppHashLineNumber relative to this Diag's SMLoc for + // the diagnostic. + const std::string &Filename = Parser->CppHashFilename; + + int DiagLocLineNo = DiagSrcMgr.FindLineNumber(DiagLoc, DiagBuf); + int CppHashLocLineNo = + Parser->SrcMgr.FindLineNumber(Parser->CppHashLoc, CppHashBuf); + int LineNo = + Parser->CppHashLineNumber - 1 + (DiagLocLineNo - CppHashLocLineNo); + + SMDiagnostic NewDiag(*Diag.getSourceMgr(), Diag.getLoc(), Filename, LineNo, + Diag.getColumnNo(), Diag.getKind(), Diag.getMessage(), + Diag.getLineContents(), Diag.getRanges()); + + if (Parser->SavedDiagHandler) + Parser->SavedDiagHandler(NewDiag, Parser->SavedDiagContext); + else + NewDiag.print(nullptr, OS); +} + +// FIXME: This is mostly duplicated from the function in AsmLexer.cpp. The +// difference being that that function accepts '@' as part of identifiers and +// we can't do that. AsmLexer.cpp should probably be changed to handle +// '@' as a special case when needed. +static bool isIdentifierChar(char c) { + return isalnum(static_cast(c)) || c == '_' || c == '$' || + c == '.'; +} + +bool AsmParser::expandMacro(raw_svector_ostream &OS, StringRef Body, + ArrayRef Parameters, + ArrayRef A, + bool EnableAtPseudoVariable, SMLoc L) +{ + unsigned NParameters = Parameters.size(); + bool HasVararg = NParameters ? Parameters.back().Vararg : false; + if ((!IsDarwin || NParameters != 0) && NParameters != A.size()) + //return Error(L, "Wrong number of arguments"); + return true; + + // A macro without parameters is handled differently on Darwin: + // gas accepts no arguments and does no substitutions + while (!Body.empty()) { + // Scan for the next substitution. + std::size_t End = Body.size(), Pos = 0; + for (; Pos != End; ++Pos) { + // Check for a substitution or escape. + if (IsDarwin && !NParameters) { + // This macro has no parameters, look for $0, $1, etc. + if (Body[Pos] != '$' || Pos + 1 == End) + continue; + + char Next = Body[Pos + 1]; + if (Next == '$' || Next == 'n' || + isdigit(static_cast(Next))) + break; + } else { + // This macro has parameters, look for \foo, \bar, etc. + if (Body[Pos] == '\\' && Pos + 1 != End) + break; + } + } + + // Add the prefix. + OS << Body.slice(0, Pos); + + // Check if we reached the end. + if (Pos == End) + break; + + if (IsDarwin && !NParameters) { + switch (Body[Pos + 1]) { + // $$ => $ + case '$': + OS << '$'; + break; + + // $n => number of arguments + case 'n': + OS << A.size(); + break; + + // $[0-9] => argument + default: { + // Missing arguments are ignored. + unsigned Index = Body[Pos + 1] - '0'; + if (Index >= A.size()) + break; + + // Otherwise substitute with the token values, with spaces eliminated. + for (const AsmToken &Token : A[Index]) + OS << Token.getString(); + break; + } + } + Pos += 2; + } else { + unsigned I = Pos + 1; + + // Check for the \@ pseudo-variable. + if (EnableAtPseudoVariable && Body[I] == '@' && I + 1 != End) + ++I; + else + while (isIdentifierChar(Body[I]) && I + 1 != End) + ++I; + + const char *Begin = Body.data() + Pos + 1; + StringRef Argument(Begin, I - (Pos + 1)); + unsigned Index = 0; + + if (Argument == "@") { + OS << NumOfMacroInstantiations; + Pos += 2; + } else { + for (; Index < NParameters; ++Index) + if (Parameters[Index].Name == Argument) + break; + + if (Index == NParameters) { + if (Body[Pos + 1] == '(' && Body[Pos + 2] == ')') + Pos += 3; + else { + OS << '\\' << Argument; + Pos = I; + } + } else { + bool VarargParameter = HasVararg && Index == (NParameters - 1); + for (const AsmToken &Token : A[Index]) + // We expect no quotes around the string's contents when + // parsing for varargs. + if (Token.getKind() != AsmToken::String || VarargParameter) + OS << Token.getString(); + else { + bool valid; + OS << Token.getStringContents(valid); + if (!valid) { + return true; + } + } + + Pos += 1 + Argument.size(); + } + } + } + // Update the scan point. + Body = Body.substr(Pos); + } + + return false; +} + +MacroInstantiation::MacroInstantiation(SMLoc IL, int EB, SMLoc EL, + size_t CondStackDepth) + : InstantiationLoc(IL), ExitBuffer(EB), ExitLoc(EL), + CondStackDepth(CondStackDepth) {} + +static bool isOperator(AsmToken::TokenKind kind) { + switch (kind) { + default: + return false; + case AsmToken::Plus: + case AsmToken::Minus: + case AsmToken::Tilde: + case AsmToken::Slash: + case AsmToken::Star: + case AsmToken::Dot: + case AsmToken::Equal: + case AsmToken::EqualEqual: + case AsmToken::Pipe: + case AsmToken::PipePipe: + case AsmToken::Caret: + case AsmToken::Amp: + case AsmToken::AmpAmp: + case AsmToken::Exclaim: + case AsmToken::ExclaimEqual: + case AsmToken::Percent: + case AsmToken::Less: + case AsmToken::LessEqual: + case AsmToken::LessLess: + case AsmToken::LessGreater: + case AsmToken::Greater: + case AsmToken::GreaterEqual: + case AsmToken::GreaterGreater: + return true; + } +} + +namespace { +class AsmLexerSkipSpaceRAII { +public: + AsmLexerSkipSpaceRAII(AsmLexer &Lexer, bool SkipSpace) : Lexer(Lexer) { + Lexer.setSkipSpace(SkipSpace); + } + + ~AsmLexerSkipSpaceRAII() { + Lexer.setSkipSpace(true); + } + +private: + AsmLexer &Lexer; +}; +} + +bool AsmParser::parseMacroArgument(MCAsmMacroArgument &MA, bool Vararg) +{ + + if (Vararg) { + if (Lexer.isNot(AsmToken::EndOfStatement)) { + StringRef Str = parseStringToEndOfStatement(); + MA.emplace_back(AsmToken::String, Str); + } + return false; + } + + unsigned ParenLevel = 0; + unsigned AddTokens = 0; + + // Darwin doesn't use spaces to delmit arguments. + AsmLexerSkipSpaceRAII ScopedSkipSpace(Lexer, IsDarwin); + + for (;;) { + if (Lexer.is(AsmToken::Eof) || Lexer.is(AsmToken::Equal)) { + // return TokError("unexpected token in macro instantiation"); + KsError = KS_ERR_ASM_MACRO_TOKEN; + return true; + } + + if (ParenLevel == 0 && Lexer.is(AsmToken::Comma)) + break; + + if (Lexer.is(AsmToken::Space)) { + Lex(); // Eat spaces + + // Spaces can delimit parameters, but could also be part an expression. + // If the token after a space is an operator, add the token and the next + // one into this argument + if (!IsDarwin) { + if (isOperator(Lexer.getKind())) { + // Check to see whether the token is used as an operator, + // or part of an identifier + const char *NextChar = getTok().getEndLoc().getPointer(); + if (*NextChar == ' ') + AddTokens = 2; + } + + if (!AddTokens && ParenLevel == 0) { + break; + } + } + } + + // handleMacroEntry relies on not advancing the lexer here + // to be able to fill in the remaining default parameter values + if (Lexer.is(AsmToken::EndOfStatement)) + break; + + // Adjust the current parentheses level. + if (Lexer.is(AsmToken::LParen)) + ++ParenLevel; + else if (Lexer.is(AsmToken::RParen) && ParenLevel) + --ParenLevel; + + // Append the token to the current argument list. + MA.push_back(getTok()); + if (AddTokens) + AddTokens--; + Lex(); + } + + if (ParenLevel != 0) { + // return TokError("unbalanced parentheses in macro argument"); + KsError = KS_ERR_ASM_MACRO_PAREN; + return true; + } + return false; +} + +// Parse the macro instantiation arguments. +bool AsmParser::parseMacroArguments(const MCAsmMacro *M, + MCAsmMacroArguments &A) +{ + const unsigned NParameters = M ? M->Parameters.size() : 0; + bool NamedParametersFound = false; + SmallVector FALocs; + + A.resize(NParameters); + FALocs.resize(NParameters); + + // Parse two kinds of macro invocations: + // - macros defined without any parameters accept an arbitrary number of them + // - macros defined with parameters accept at most that many of them + bool HasVararg = NParameters ? M->Parameters.back().Vararg : false; + for (unsigned Parameter = 0; !NParameters || Parameter < NParameters; + ++Parameter) { + //SMLoc IDLoc = Lexer.getLoc(); + MCAsmMacroParameter FA; + + if (Lexer.is(AsmToken::Identifier) && Lexer.peekTok().is(AsmToken::Equal)) { + if (parseIdentifier(FA.Name)) { + //Error(IDLoc, "invalid argument identifier for formal argument"); + eatToEndOfStatement(); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (!Lexer.is(AsmToken::Equal)) { + //TokError("expected '=' after formal parameter identifier"); + eatToEndOfStatement(); + KsError = KS_ERR_ASM_MACRO_EQU; + return true; + } + Lex(); + + NamedParametersFound = true; + } + + if (NamedParametersFound && FA.Name.empty()) { + //Error(IDLoc, "cannot mix positional and keyword arguments"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + eatToEndOfStatement(); + return true; + } + + bool Vararg = HasVararg && Parameter == (NParameters - 1); + if (parseMacroArgument(FA.Value, Vararg)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + unsigned PI = Parameter; + if (!FA.Name.empty()) { + unsigned FAI = 0; + for (FAI = 0; FAI < NParameters; ++FAI) + if (M->Parameters[FAI].Name == FA.Name) + break; + + if (FAI >= NParameters) { + //assert(M && "expected macro to be defined"); + //Error(IDLoc, + // "parameter named '" + FA.Name + "' does not exist for macro '" + + // M->Name + "'"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + PI = FAI; + } + + if (!FA.Value.empty()) { + if (A.size() <= PI) + A.resize(PI + 1); + A[PI] = FA.Value; + + if (FALocs.size() <= PI) + FALocs.resize(PI + 1); + + FALocs[PI] = Lexer.getLoc(); + } + + // At the end of the statement, fill in remaining arguments that have + // default values. If there aren't any, then the next argument is + // required but missing + if (Lexer.is(AsmToken::EndOfStatement)) { + bool Failure = false; + for (unsigned FAI = 0; FAI < NParameters; ++FAI) { + if (A[FAI].empty()) { + if (M->Parameters[FAI].Required) { + //Error(FALocs[FAI].isValid() ? FALocs[FAI] : Lexer.getLoc(), + // "missing value for required parameter " + // "'" + M->Parameters[FAI].Name + "' in macro '" + M->Name + "'"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + Failure = true; + } + + if (!M->Parameters[FAI].Value.empty()) + A[FAI] = M->Parameters[FAI].Value; + } + } + return Failure; + } + + if (Lexer.is(AsmToken::Comma)) + Lex(); + } + + // return TokError("too many positional arguments"); + KsError = KS_ERR_ASM_MACRO_ARGS; + return true; +} + +const MCAsmMacro *AsmParser::lookupMacro(StringRef Name) { + StringMap::iterator I = MacroMap.find(Name); + return (I == MacroMap.end()) ? nullptr : &I->getValue(); +} + +void AsmParser::defineMacro(StringRef Name, MCAsmMacro Macro) { + MacroMap.insert(std::make_pair(Name, std::move(Macro))); +} + +void AsmParser::undefineMacro(StringRef Name) { MacroMap.erase(Name); } + +bool AsmParser::handleMacroEntry(const MCAsmMacro *M, SMLoc NameLoc) +{ + // Arbitrarily limit macro nesting depth, to match 'as'. We can eliminate + // this, although we should protect against infinite loops. + if (ActiveMacros.size() == 20) { + // return TokError("macros cannot be nested more than 20 levels deep"); + KsError = KS_ERR_ASM_MACRO_LEVELS_EXCEED; + return true; + } + + MCAsmMacroArguments A; + if (parseMacroArguments(M, A)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // Macro instantiation is lexical, unfortunately. We construct a new buffer + // to hold the macro body with substitutions. + SmallString<256> Buf; + StringRef Body = M->Body; + raw_svector_ostream OS(Buf); + + if (expandMacro(OS, Body, M->Parameters, A, true, getTok().getLoc())) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // We include the .endmacro in the buffer as our cue to exit the macro + // instantiation. + OS << ".endmacro\n"; + + std::unique_ptr Instantiation = + MemoryBuffer::getMemBufferCopy(OS.str(), ""); + + // Create the macro instantiation object and add to the current macro + // instantiation stack. + MacroInstantiation *MI = new MacroInstantiation( + NameLoc, CurBuffer, getTok().getLoc(), TheCondStack.size()); + ActiveMacros.push_back(MI); + + ++NumOfMacroInstantiations; + + // Jump to the macro instantiation and prime the lexer. + CurBuffer = SrcMgr.AddNewSourceBuffer(std::move(Instantiation), SMLoc()); + Lexer.setBuffer(SrcMgr.getMemoryBuffer(CurBuffer)->getBuffer()); + Lex(); + + return false; +} + +void AsmParser::handleMacroExit() { + // Jump to the EndOfStatement we should return to, and consume it. + jumpToLoc(ActiveMacros.back()->ExitLoc, ActiveMacros.back()->ExitBuffer); + Lex(); + + // Pop the instantiation entry. + delete ActiveMacros.back(); + ActiveMacros.pop_back(); +} + +bool AsmParser::parseAssignment(StringRef Name, bool allow_redef, + bool NoDeadStrip) { + MCSymbol *Sym; + const MCExpr *Value; + if (MCParserUtils::parseAssignmentExpression(Name, allow_redef, *this, Sym, + Value)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (!Sym) { + // In the case where we parse an expression starting with a '.', we will + // not generate an error, nor will we create a symbol. In this case we + // should just return out. + return false; + } + + // Do the assignment. + if (!Out.EmitAssignment(Sym, Value)) { + KsError = KS_ERR_ASM_DIRECTIVE_ID; + return true; + } + if (NoDeadStrip) + Out.EmitSymbolAttribute(Sym, MCSA_NoDeadStrip); + + return false; +} + +/// parseIdentifier: +/// ::= identifier +/// ::= string +bool AsmParser::parseIdentifier(StringRef &Res) +{ + // The assembler has relaxed rules for accepting identifiers, in particular we + // allow things like '.globl $foo' and '.def @feat.00', which would normally be + // separate tokens. At this level, we have already lexed so we cannot (currently) + // handle this as a context dependent token, instead we detect adjacent tokens + // and return the combined identifier. + if (Lexer.is(AsmToken::Dollar) || Lexer.is(AsmToken::At)) { + SMLoc PrefixLoc = getLexer().getLoc(); + + // Consume the prefix character, and check for a following identifier. + Lex(); + if (Lexer.isNot(AsmToken::Identifier)) { + KsError = KS_ERR_ASM_MACRO_INVALID; + return true; + } + + // We have a '$' or '@' followed by an identifier, make sure they are adjacent. + if (PrefixLoc.getPointer() + 1 != getTok().getLoc().getPointer()) { + KsError = KS_ERR_ASM_MACRO_INVALID; + return true; + } + + // Construct the joined identifier and consume the token. + Res = + StringRef(PrefixLoc.getPointer(), getTok().getIdentifier().size() + 1); + Lex(); + return false; + } + + if (Lexer.isNot(AsmToken::Identifier) && Lexer.isNot(AsmToken::String)) { + KsError = KS_ERR_ASM_MACRO_INVALID; + return true; + } + + Res = getTok().getIdentifier(); + + Lex(); // Consume the identifier token. + + return false; +} + +/// parseDirectiveSet: +/// ::= .equ identifier ',' expression +/// ::= .equiv identifier ',' expression +/// ::= .set identifier ',' expression +bool AsmParser::parseDirectiveSet(StringRef IDVal, bool allow_redef) { + StringRef Name; + + if (parseIdentifier(Name)) { + // return TokError("expected identifier after '" + Twine(IDVal) + "'"); + KsError = KS_ERR_ASM_DIRECTIVE_ID; + return true; + } + + if (getLexer().isNot(AsmToken::Comma)) { + // return TokError("unexpected token in '" + Twine(IDVal) + "'"); + KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; + return true; + } + Lex(); + + return parseAssignment(Name, allow_redef, true); +} + +bool AsmParser::parseEscapedString(std::string &Data) +{ + if (!getLexer().is(AsmToken::String)) { + KsError = KS_ERR_ASM_ESC_STR; + return true; + } + + Data = ""; + bool valid; + StringRef Str = getTok().getStringContents(valid); + if (!valid) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + for (unsigned i = 0, e = Str.size(); i != e; ++i) { + if (Str[i] != '\\') { + Data += Str[i]; + continue; + } + + // Recognize escaped characters. Note that this escape semantics currently + // loosely follows Darwin 'as'. Notably, it doesn't support hex escapes. + ++i; + if (i == e) { + // return TokError("unexpected backslash at end of string"); + KsError = KS_ERR_ASM_ESC_BACKSLASH; + return true; + } + + // Recognize octal sequences. + if ((unsigned)(Str[i] - '0') <= 7) { + // Consume up to three octal characters. + unsigned Value = Str[i] - '0'; + + if (i + 1 != e && ((unsigned)(Str[i + 1] - '0')) <= 7) { + ++i; + Value = Value * 8 + (Str[i] - '0'); + + if (i + 1 != e && ((unsigned)(Str[i + 1] - '0')) <= 7) { + ++i; + Value = Value * 8 + (Str[i] - '0'); + } + } + + if (Value > 255) { + // return TokError("invalid octal escape sequence (out of range)"); + KsError = KS_ERR_ASM_ESC_BACKSLASH; + return true; + } + + Data += (unsigned char)Value; + continue; + } + + // Otherwise recognize individual escapes. + switch (Str[i]) { + default: + // Just reject invalid escape sequences for now. + // return TokError("invalid escape sequence (unrecognized character)"); + KsError = KS_ERR_ASM_ESC_SEQUENCE; + return true; + + case 'b': Data += '\b'; break; + case 'f': Data += '\f'; break; + case 'n': Data += '\n'; break; + case 'r': Data += '\r'; break; + case 't': Data += '\t'; break; + case '"': Data += '"'; break; + case '\\': Data += '\\'; break; + } + } + + return false; +} + +/// parseDirectiveAscii: +/// ::= ( .ascii | .asciz | .string ) [ "string" ( , "string" )* ] +bool AsmParser::parseDirectiveAscii(StringRef IDVal, bool ZeroTerminated) +{ + if (getLexer().isNot(AsmToken::EndOfStatement)) { + checkForValidSection(); + + for (;;) { + if (getLexer().isNot(AsmToken::String)) { + // return TokError("expected string in '" + Twine(IDVal) + "' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_STR; + return true; + } + + std::string Data; + if (parseEscapedString(Data)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + getStreamer().EmitBytes(Data); + if (ZeroTerminated) + getStreamer().EmitBytes(StringRef("\0", 1)); + + Lex(); + + if (getLexer().is(AsmToken::EndOfStatement)) + break; + + if (getLexer().isNot(AsmToken::Comma)) { + // return TokError("unexpected token in '" + Twine(IDVal) + "' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; + return true; + } + Lex(); + } + } + + Lex(); + return false; +} + +/// parseDirectiveReloc +/// ::= .reloc expression , identifier [ , expression ] +bool AsmParser::parseDirectiveReloc(SMLoc DirectiveLoc) +{ + const MCExpr *Offset; + const MCExpr *Expr = nullptr; + + //SMLoc OffsetLoc = Lexer.getTok().getLoc(); + if (parseExpression(Offset)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // We can only deal with constant expressions at the moment. + int64_t OffsetValue; + if (!Offset->evaluateAsAbsolute(OffsetValue)) { + //return Error(OffsetLoc, "expression is not a constant value"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (OffsetValue < 0) { + //return Error(OffsetLoc, "expression is negative"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (Lexer.isNot(AsmToken::Comma)) { + // return TokError("expected comma"); + KsError = KS_ERR_ASM_DIRECTIVE_COMMA; + return true; + } + Lexer.Lex(); + + if (Lexer.isNot(AsmToken::Identifier)) { + // return TokError("expected relocation name"); + KsError = KS_ERR_ASM_DIRECTIVE_RELOC_NAME; + return true; + } + //SMLoc NameLoc = Lexer.getTok().getLoc(); + StringRef Name = Lexer.getTok().getIdentifier(); + Lexer.Lex(); + + if (Lexer.is(AsmToken::Comma)) { + Lexer.Lex(); + //SMLoc ExprLoc = Lexer.getLoc(); + if (parseExpression(Expr)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + MCValue Value; + if (!Expr->evaluateAsRelocatable(Value, nullptr, nullptr)) { + //return Error(ExprLoc, "expression must be relocatable"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + } + + if (Lexer.isNot(AsmToken::EndOfStatement)) { + // return TokError("unexpected token in .reloc directive"); + KsError = KS_ERR_ASM_DIRECTIVE_RELOC_TOKEN; + return true; + } + + if (getStreamer().EmitRelocDirective(*Offset, Name, Expr, DirectiveLoc)) { + //return Error(NameLoc, "unknown relocation name"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + return false; +} + +/// parseDirectiveValue +/// ::= (.byte | .short | ... ) [ expression (, expression)* ] +bool AsmParser::parseDirectiveValue(unsigned Size, unsigned int &KsError) +{ + if (getLexer().isNot(AsmToken::EndOfStatement)) { + checkForValidSection(); + + for (;;) { + const MCExpr *Value; + SMLoc ExprLoc = getLexer().getLoc(); + if (parseExpression(Value)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // Special case constant expressions to match code generator. + if (const MCConstantExpr *MCE = dyn_cast(Value)) { + assert(Size <= 8 && "Invalid size"); + uint64_t IntValue = MCE->getValue(); + if (!isUIntN(8 * Size, IntValue) && !isIntN(8 * Size, IntValue)) { + // return Error(ExprLoc, "literal value out of range for directive"); + KsError = KS_ERR_ASM_DIRECTIVE_VALUE_RANGE; + return true; + } + bool Error; + getStreamer().EmitIntValue(IntValue, Size, Error); + if (Error) { + KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; + return true; + } + } else + getStreamer().EmitValue(Value, Size, ExprLoc); + + if (getLexer().is(AsmToken::EndOfStatement)) + break; + + // FIXME: Improve diagnostic. + if (getLexer().isNot(AsmToken::Comma)) { + // return TokError("unexpected token in directive"); + KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; + return true; + } + Lex(); + } + } + + Lex(); + return false; +} + +/// ParseDirectiveOctaValue +/// ::= .octa [ hexconstant (, hexconstant)* ] +bool AsmParser::parseDirectiveOctaValue(unsigned int &KsError) +{ + if (getLexer().isNot(AsmToken::EndOfStatement)) { + checkForValidSection(); + + for (;;) { + if (Lexer.getKind() == AsmToken::Error) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + if (Lexer.getKind() != AsmToken::Integer && + Lexer.getKind() != AsmToken::BigNum) { + // return TokError("unknown token in expression"); + KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; + return true; + } + + // SMLoc ExprLoc = getLexer().getLoc(); + bool valid; + APInt IntValue = getTok().getAPIntVal(valid); + if (!valid) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + Lex(); + + uint64_t hi, lo; + if (IntValue.isIntN(64)) { + hi = 0; + lo = IntValue.getZExtValue(); + } else if (IntValue.isIntN(128)) { + // It might actually have more than 128 bits, but the top ones are zero. + hi = IntValue.getHiBits(IntValue.getBitWidth() - 64).getZExtValue(); + lo = IntValue.getLoBits(64).getZExtValue(); + } else { + // return Error(ExprLoc, "literal value out of range for directive"); + KsError = KS_ERR_ASM_DIRECTIVE_VALUE_RANGE; + return true; + } + + bool Error; + if (MAI.isLittleEndian()) { + getStreamer().EmitIntValue(lo, 8, Error); + getStreamer().EmitIntValue(hi, 8, Error); + } else { + getStreamer().EmitIntValue(hi, 8, Error); + getStreamer().EmitIntValue(lo, 8, Error); + } + + if (getLexer().is(AsmToken::EndOfStatement)) + break; + + // FIXME: Improve diagnostic. + if (getLexer().isNot(AsmToken::Comma)) { + // return TokError("unexpected token in directive"); + KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; + return true; + } + Lex(); + } + } + + Lex(); + return false; +} + +/// parseDirectiveRealValue +/// ::= (.single | .double) [ expression (, expression)* ] +bool AsmParser::parseDirectiveRealValue(const fltSemantics &Semantics) +{ + if (getLexer().isNot(AsmToken::EndOfStatement)) { + checkForValidSection(); + + for (;;) { + // We don't truly support arithmetic on floating point expressions, so we + // have to manually parse unary prefixes. + bool IsNeg = false; + if (getLexer().is(AsmToken::Minus)) { + Lex(); + IsNeg = true; + } else if (getLexer().is(AsmToken::Plus)) + Lex(); + + if (getLexer().isNot(AsmToken::Integer) && + getLexer().isNot(AsmToken::Real) && + getLexer().isNot(AsmToken::Identifier)) { + // return TokError("unexpected token in directive"); + KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; + return true; + } + + // Convert to an APFloat. + APFloat Value(Semantics); + StringRef IDVal = getTok().getString(); + if (getLexer().is(AsmToken::Identifier)) { + if (!IDVal.compare_lower("infinity") || !IDVal.compare_lower("inf")) + Value = APFloat::getInf(Semantics); + else if (!IDVal.compare_lower("nan")) + Value = APFloat::getNaN(Semantics, false, ~0); + else { + // return TokError("invalid floating point literal"); + KsError = KS_ERR_ASM_DIRECTIVE_FPOINT; + return true; + } + } else if (Value.convertFromString(IDVal, APFloat::rmNearestTiesToEven) == + APFloat::opInvalidOp) { + // return TokError("invalid floating point literal"); + KsError = KS_ERR_ASM_DIRECTIVE_FPOINT; + return true; + } + if (IsNeg) + Value.changeSign(); + + // Consume the numeric token. + Lex(); + + // Emit the value as an integer. + APInt AsInt = Value.bitcastToAPInt(); + bool Error; + getStreamer().EmitIntValue(AsInt.getLimitedValue(), + AsInt.getBitWidth() / 8, Error); + if (Error) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (getLexer().is(AsmToken::EndOfStatement)) + break; + + if (getLexer().isNot(AsmToken::Comma)) { + // return TokError("unexpected token in directive"); + KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; + return true; + } + Lex(); + } + } + + Lex(); + return false; +} + +/// parseDirectiveZero +/// ::= .zero expression +bool AsmParser::parseDirectiveZero() +{ + checkForValidSection(); + + int64_t NumBytes; + if (parseAbsoluteExpression(NumBytes)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + int64_t Val = 0; + if (getLexer().is(AsmToken::Comma)) { + Lex(); + if (parseAbsoluteExpression(Val)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + } + + if (getLexer().isNot(AsmToken::EndOfStatement)) { + // return TokError("unexpected token in '.zero' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; + return true; + } + + Lex(); + + getStreamer().EmitFill(NumBytes, Val); + + return false; +} + +/// parseDirectiveFill +/// ::= .fill expression [ , expression [ , expression ] ] +bool AsmParser::parseDirectiveFill() +{ + checkForValidSection(); + + SMLoc RepeatLoc = getLexer().getLoc(); + int64_t NumValues; + if (parseAbsoluteExpression(NumValues)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (NumValues < 0) { + Warning(RepeatLoc, + "'.fill' directive with negative repeat count has no effect"); + NumValues = 0; + } + + int64_t FillSize = 1; + int64_t FillExpr = 0; + + SMLoc SizeLoc, ExprLoc; + if (getLexer().isNot(AsmToken::EndOfStatement)) { + if (getLexer().isNot(AsmToken::Comma)) { + // return TokError("unexpected token in '.fill' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; + return true; + } + Lex(); + + SizeLoc = getLexer().getLoc(); + if (parseAbsoluteExpression(FillSize)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (getLexer().isNot(AsmToken::EndOfStatement)) { + if (getLexer().isNot(AsmToken::Comma)) { + // return TokError("unexpected token in '.fill' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; + return true; + } + Lex(); + + ExprLoc = getLexer().getLoc(); + if (parseAbsoluteExpression(FillExpr)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (getLexer().isNot(AsmToken::EndOfStatement)) { + // return TokError("unexpected token in '.fill' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; + return true; + } + + Lex(); + } + } + + if (FillSize < 0) { + Warning(SizeLoc, "'.fill' directive with negative size has no effect"); + NumValues = 0; + } + if (FillSize > 8) { + Warning(SizeLoc, "'.fill' directive with size greater than 8 has been truncated to 8"); + FillSize = 8; + } + + if (!isUInt<32>(FillExpr) && FillSize > 4) + Warning(ExprLoc, "'.fill' directive pattern has been truncated to 32-bits"); + + if (NumValues > 0) { + int64_t NonZeroFillSize = FillSize > 4 ? 4 : FillSize; + FillExpr &= ~0ULL >> (64 - NonZeroFillSize * 8); + bool Error; + for (uint64_t i = 0, e = NumValues; i != e; ++i) { + getStreamer().EmitIntValue(FillExpr, NonZeroFillSize, Error); + if (Error) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + if (NonZeroFillSize < FillSize) { + getStreamer().EmitIntValue(0, FillSize - NonZeroFillSize, Error); + if (Error) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + } + } + } + + return false; +} + +/// parseDirectiveOrg +/// ::= .org expression [ , expression ] +bool AsmParser::parseDirectiveOrg() { + checkForValidSection(); + + const MCExpr *Offset; + if (parseExpression(Offset)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // Parse optional fill expression. + int64_t FillExpr = 0; + if (getLexer().isNot(AsmToken::EndOfStatement)) { + if (getLexer().isNot(AsmToken::Comma)) { + // return TokError("unexpected token in '.org' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; + return true; + } + Lex(); + + if (parseAbsoluteExpression(FillExpr)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (getLexer().isNot(AsmToken::EndOfStatement)) { + // return TokError("unexpected token in '.org' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; + return true; + } + } + + Lex(); + getStreamer().emitValueToOffset(Offset, FillExpr); + return false; +} + +/// parseDirectiveAlign +/// ::= {.align, ...} expression [ , expression [ , expression ]] +bool AsmParser::parseDirectiveAlign(bool IsPow2, unsigned ValueSize) +{ + checkForValidSection(); + + //SMLoc AlignmentLoc = getLexer().getLoc(); + int64_t Alignment; + if (parseAbsoluteExpression(Alignment)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + SMLoc MaxBytesLoc; + bool HasFillExpr = false; + int64_t FillExpr = 0; + int64_t MaxBytesToFill = 0; + if (getLexer().isNot(AsmToken::EndOfStatement)) { + if (getLexer().isNot(AsmToken::Comma)) { + // return TokError("unexpected token in directive"); + KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; + return true; + } + Lex(); + + // The fill expression can be omitted while specifying a maximum number of + // alignment bytes, e.g: + // .align 3,,4 + if (getLexer().isNot(AsmToken::Comma)) { + HasFillExpr = true; + if (parseAbsoluteExpression(FillExpr)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + } + + if (getLexer().isNot(AsmToken::EndOfStatement)) { + if (getLexer().isNot(AsmToken::Comma)) { + // return TokError("unexpected token in directive"); + KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; + return true; + } + Lex(); + + MaxBytesLoc = getLexer().getLoc(); + if (parseAbsoluteExpression(MaxBytesToFill)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (getLexer().isNot(AsmToken::EndOfStatement)) { + // return TokError("unexpected token in directive"); + KsError = KS_ERR_ASM_DIRECTIVE_TOKEN; + return true; + } + } + } + + Lex(); + + if (!HasFillExpr) + FillExpr = 0; + + // Compute alignment in bytes. + if (IsPow2) { + // FIXME: Diagnose overflow. + if (Alignment >= 32) { + //Error(AlignmentLoc, "invalid alignment value"); + Alignment = 31; + } + + Alignment = 1ULL << Alignment; + } else { + // Reject alignments that aren't either a power of two or zero, + // for gas compatibility. Alignment of zero is silently rounded + // up to one. + if (Alignment == 0) + Alignment = 1; + if (!isPowerOf2_64(Alignment)) { + //Error(AlignmentLoc, "alignment must be a power of 2"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + } + + // Diagnose non-sensical max bytes to align. + if (MaxBytesLoc.isValid()) { + if (MaxBytesToFill < 1) { + //Error(MaxBytesLoc, "alignment directive can never be satisfied in this " + // "many bytes, ignoring maximum bytes expression"); + MaxBytesToFill = 0; + } + + if (MaxBytesToFill >= Alignment) { + Warning(MaxBytesLoc, "maximum bytes expression exceeds alignment and " + "has no effect"); + MaxBytesToFill = 0; + } + } + + // Check whether we should use optimal code alignment for this .align + // directive. + const MCSection *Section = getStreamer().getCurrentSection().first; + assert(Section && "must have section to emit alignment"); + bool UseCodeAlign = Section->UseCodeAlign(); + if ((!HasFillExpr || Lexer.getMAI().getTextAlignFillValue() == FillExpr) && + ValueSize == 1 && UseCodeAlign) { + getStreamer().EmitCodeAlignment(Alignment, MaxBytesToFill); + } else { + // FIXME: Target specific behavior about how the "extra" bytes are filled. + getStreamer().EmitValueToAlignment(Alignment, FillExpr, ValueSize, + MaxBytesToFill); + } + + return false; +} + +/// parseDirectiveFile +/// ::= .file [number] filename +/// ::= .file number directory filename +bool AsmParser::parseDirectiveFile(SMLoc DirectiveLoc) +{ + // FIXME: I'm not sure what this is. + int64_t FileNumber = -1; + //SMLoc FileNumberLoc = getLexer().getLoc(); + if (getLexer().is(AsmToken::Integer)) { + bool valid; + FileNumber = getTok().getIntVal(valid); + if (!valid) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + Lex(); + + if (FileNumber < 1) { + //return TokError("file number less than one"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + } + + if (getLexer().isNot(AsmToken::String)) { + //return TokError("unexpected token in '.file' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // Usually the directory and filename together, otherwise just the directory. + // Allow the strings to have escaped octal character sequence. + std::string Path = getTok().getString(); + if (parseEscapedString(Path)) + return true; + Lex(); + + StringRef Directory; + StringRef Filename; + std::string FilenameData; + if (getLexer().is(AsmToken::String)) { + if (FileNumber == -1) + //return TokError("explicit path specified, but no file number"); + return true; + if (parseEscapedString(FilenameData)) + return true; + Filename = FilenameData; + Directory = Path; + Lex(); + } else { + Filename = Path; + } + + if (getLexer().isNot(AsmToken::EndOfStatement)) + //return TokError("unexpected token in '.file' directive"); + return true; + + if (FileNumber == -1) + getStreamer().EmitFileDirective(Filename); + else { + if (getContext().getGenDwarfForAssembly()) + //Error(DirectiveLoc, + // "input can't have .file dwarf directives when -g is " + // "used to generate dwarf debug info for assembly code"); + return true; + + if (getStreamer().EmitDwarfFileDirective(FileNumber, Directory, Filename) == + 0) + //Error(FileNumberLoc, "file number already allocated"); + return true; + } + + return false; +} + +/// parseDirectiveLine +/// ::= .line [number] +bool AsmParser::parseDirectiveLine() +{ + if (getLexer().isNot(AsmToken::EndOfStatement)) { + if (getLexer().isNot(AsmToken::Integer)) { + //return TokError("unexpected token in '.line' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + bool valid; + int64_t LineNumber = getTok().getIntVal(valid); + if (!valid) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + (void)LineNumber; + Lex(); + + // FIXME: Do something with the .line. + } + + if (getLexer().isNot(AsmToken::EndOfStatement)) { + //return TokError("unexpected token in '.line' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + return false; +} + +/// parseDirectiveLoc +/// ::= .loc FileNumber [LineNumber] [ColumnPos] [basic_block] [prologue_end] +/// [epilogue_begin] [is_stmt VALUE] [isa VALUE] +/// The first number is a file number, must have been previously assigned with +/// a .file directive, the second number is the line number and optionally the +/// third number is a column position (zero if not specified). The remaining +/// optional items are .loc sub-directives. +bool AsmParser::parseDirectiveLoc() +{ + if (getLexer().isNot(AsmToken::Integer)) { + //return TokError("unexpected token in '.loc' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + bool valid; + int64_t FileNumber = getTok().getIntVal(valid); + if (!valid) { + return true; + } + if (FileNumber < 1) { + //return TokError("file number less than one in '.loc' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + if (!getContext().isValidDwarfFileNumber(FileNumber)) { + //return TokError("unassigned file number in '.loc' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + Lex(); + + int64_t LineNumber = 0; + if (getLexer().is(AsmToken::Integer)) { + bool valid; + LineNumber = getTok().getIntVal(valid); + if (!valid) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + if (LineNumber < 0) { + //return TokError("line number less than zero in '.loc' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + Lex(); + } + + int64_t ColumnPos = 0; + if (getLexer().is(AsmToken::Integer)) { + bool valid; + ColumnPos = getTok().getIntVal(valid); + if (!valid) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + if (ColumnPos < 0) { + //return TokError("column position less than zero in '.loc' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + Lex(); + } + + unsigned Flags = DWARF2_LINE_DEFAULT_IS_STMT ? DWARF2_FLAG_IS_STMT : 0; + unsigned Isa = 0; + int64_t Discriminator = 0; + if (getLexer().isNot(AsmToken::EndOfStatement)) { + for (;;) { + if (getLexer().is(AsmToken::EndOfStatement)) + break; + + StringRef Name; + SMLoc Loc = getTok().getLoc(); + if (parseIdentifier(Name)) { + //return TokError("unexpected token in '.loc' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (Name == "basic_block") + Flags |= DWARF2_FLAG_BASIC_BLOCK; + else if (Name == "prologue_end") + Flags |= DWARF2_FLAG_PROLOGUE_END; + else if (Name == "epilogue_begin") + Flags |= DWARF2_FLAG_EPILOGUE_BEGIN; + else if (Name == "is_stmt") { + Loc = getTok().getLoc(); + const MCExpr *Value; + if (parseExpression(Value)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + // The expression must be the constant 0 or 1. + if (const MCConstantExpr *MCE = dyn_cast(Value)) { + int Value = MCE->getValue(); + if (Value == 0) + Flags &= ~DWARF2_FLAG_IS_STMT; + else if (Value == 1) + Flags |= DWARF2_FLAG_IS_STMT; + else { + //return Error(Loc, "is_stmt value not 0 or 1"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + } else { + //return Error(Loc, "is_stmt value not the constant value of 0 or 1"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + } else if (Name == "isa") { + Loc = getTok().getLoc(); + const MCExpr *Value; + if (parseExpression(Value)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + // The expression must be a constant greater or equal to 0. + if (const MCConstantExpr *MCE = dyn_cast(Value)) { + int Value = MCE->getValue(); + if (Value < 0) { + //return Error(Loc, "isa number less than zero"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + Isa = Value; + } else { + //return Error(Loc, "isa number not a constant value"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + } else if (Name == "discriminator") { + if (parseAbsoluteExpression(Discriminator)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + } else { + //return Error(Loc, "unknown sub-directive in '.loc' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (getLexer().is(AsmToken::EndOfStatement)) + break; + } + } + + getStreamer().EmitDwarfLocDirective(FileNumber, LineNumber, ColumnPos, Flags, + Isa, Discriminator, StringRef()); + + return false; +} + +/// parseDirectiveStabs +/// ::= .stabs string, number, number, number +bool AsmParser::parseDirectiveStabs() +{ + //return TokError("unsupported directive '.stabs'"); + return true; +} + +/// parseDirectiveCVFile +/// ::= .cv_file number filename +bool AsmParser::parseDirectiveCVFile() +{ + //SMLoc FileNumberLoc = getLexer().getLoc(); + if (getLexer().isNot(AsmToken::Integer)) + //return TokError("expected file number in '.cv_file' directive"); + return true; + + bool valid; + int64_t FileNumber = getTok().getIntVal(valid); + if (!valid) { + return true; + } + Lex(); + + if (FileNumber < 1) + //return TokError("file number less than one"); + return true; + + if (getLexer().isNot(AsmToken::String)) + //return TokError("unexpected token in '.cv_file' directive"); + return true; + + // Usually the directory and filename together, otherwise just the directory. + // Allow the strings to have escaped octal character sequence. + std::string Filename; + if (parseEscapedString(Filename)) + return true; + Lex(); + + if (getLexer().isNot(AsmToken::EndOfStatement)) + //return TokError("unexpected token in '.cv_file' directive"); + return true; + + if (getStreamer().EmitCVFileDirective(FileNumber, Filename) == 0) + //Error(FileNumberLoc, "file number already allocated"); + return true; + + return false; +} + +/// parseDirectiveCVLoc +/// ::= .cv_loc FunctionId FileNumber [LineNumber] [ColumnPos] [prologue_end] +/// [is_stmt VALUE] +/// The first number is a file number, must have been previously assigned with +/// a .file directive, the second number is the line number and optionally the +/// third number is a column position (zero if not specified). The remaining +/// optional items are .loc sub-directives. +bool AsmParser::parseDirectiveCVLoc() +{ + if (getLexer().isNot(AsmToken::Integer)) + //return TokError("unexpected token in '.cv_loc' directive"); + return true; + + bool valid; + int64_t FunctionId = getTok().getIntVal(valid); + if (!valid) { + return true; + } + if (FunctionId < 0) + //return TokError("function id less than zero in '.cv_loc' directive"); + return true; + Lex(); + + int64_t FileNumber = getTok().getIntVal(valid); + if (!valid) { + return true; + } + if (FileNumber < 1) + //return TokError("file number less than one in '.cv_loc' directive"); + return true; + if (!getContext().isValidCVFileNumber(FileNumber)) + //return TokError("unassigned file number in '.cv_loc' directive"); + return true; + Lex(); + + int64_t LineNumber = 0; + if (getLexer().is(AsmToken::Integer)) { + LineNumber = getTok().getIntVal(valid); + if (!valid) { + return true; + } + if (LineNumber < 0) + //return TokError("line number less than zero in '.cv_loc' directive"); + return true; + Lex(); + } + + int64_t ColumnPos = 0; + if (getLexer().is(AsmToken::Integer)) { + ColumnPos = getTok().getIntVal(valid); + if (!valid) { + return true; + } + if (ColumnPos < 0) + //return TokError("column position less than zero in '.cv_loc' directive"); + return true; + Lex(); + } + + bool PrologueEnd = false; + uint64_t IsStmt = 0; + while (getLexer().isNot(AsmToken::EndOfStatement)) { + StringRef Name; + SMLoc Loc = getTok().getLoc(); + if (parseIdentifier(Name)) + //return TokError("unexpected token in '.cv_loc' directive"); + return true; + + if (Name == "prologue_end") + PrologueEnd = true; + else if (Name == "is_stmt") { + Loc = getTok().getLoc(); + const MCExpr *Value; + if (parseExpression(Value)) + return true; + // The expression must be the constant 0 or 1. + IsStmt = ~0ULL; + if (const auto *MCE = dyn_cast(Value)) + IsStmt = MCE->getValue(); + + if (IsStmt > 1) + //return Error(Loc, "is_stmt value not 0 or 1"); + return true; + } else { + //return Error(Loc, "unknown sub-directive in '.cv_loc' directive"); + return true; + } + } + + getStreamer().EmitCVLocDirective(FunctionId, FileNumber, LineNumber, + ColumnPos, PrologueEnd, IsStmt, StringRef()); + return false; +} + +/// parseDirectiveCVLinetable +/// ::= .cv_linetable FunctionId, FnStart, FnEnd +bool AsmParser::parseDirectiveCVLinetable() +{ + bool valid; + int64_t FunctionId = getTok().getIntVal(valid); + if (!valid) { + return true; + } + if (FunctionId < 0) + //return TokError("function id less than zero in '.cv_linetable' directive"); + return true; + Lex(); + + if (Lexer.isNot(AsmToken::Comma)) + //return TokError("unexpected token in '.cv_linetable' directive"); + return true; + Lex(); + + SMLoc Loc = getLexer().getLoc(); + StringRef FnStartName; + if (parseIdentifier(FnStartName)) + //return Error(Loc, "expected identifier in directive"); + return true; + + if (Lexer.isNot(AsmToken::Comma)) + //return TokError("unexpected token in '.cv_linetable' directive"); + return true; + Lex(); + + Loc = getLexer().getLoc(); + StringRef FnEndName; + if (parseIdentifier(FnEndName)) + //return Error(Loc, "expected identifier in directive"); + return true; + + if (FnStartName.empty() || FnEndName.empty()) { + return true; + } + MCSymbol *FnStartSym = getContext().getOrCreateSymbol(FnStartName); + MCSymbol *FnEndSym = getContext().getOrCreateSymbol(FnEndName); + + getStreamer().EmitCVLinetableDirective(FunctionId, FnStartSym, FnEndSym); + return false; +} + +/// parseDirectiveCVInlineLinetable +/// ::= .cv_inline_linetable PrimaryFunctionId FileId LineNum +/// ("contains" SecondaryFunctionId+)? +bool AsmParser::parseDirectiveCVInlineLinetable() +{ + bool valid; + int64_t PrimaryFunctionId = getTok().getIntVal(valid); + if (!valid) { + return true; + } + if (PrimaryFunctionId < 0) + //return TokError( + // "function id less than zero in '.cv_inline_linetable' directive"); + return true; + Lex(); + + int64_t SourceFileId = getTok().getIntVal(valid); + if (!valid) { + return true; + } + if (SourceFileId <= 0) + //return TokError( + // "File id less than zero in '.cv_inline_linetable' directive"); + return true; + Lex(); + + int64_t SourceLineNum = getTok().getIntVal(valid); + if (!valid) { + return true; + } + if (SourceLineNum < 0) + //return TokError( + // "Line number less than zero in '.cv_inline_linetable' directive"); + return true; + Lex(); + + SmallVector SecondaryFunctionIds; + if (getLexer().is(AsmToken::Identifier)) { + if (getTok().getIdentifier() != "contains") + //return TokError( + // "unexpected identifier in '.cv_inline_linetable' directive"); + return true; + Lex(); + + while (getLexer().isNot(AsmToken::EndOfStatement)) { + int64_t SecondaryFunctionId = getTok().getIntVal(valid); + if (!valid) { + return true; + } + if (SecondaryFunctionId < 0) + //return TokError( + // "function id less than zero in '.cv_inline_linetable' directive"); + return true; + Lex(); + + SecondaryFunctionIds.push_back(SecondaryFunctionId); + } + } + + getStreamer().EmitCVInlineLinetableDirective( + PrimaryFunctionId, SourceFileId, SourceLineNum, SecondaryFunctionIds); + return false; +} + +/// parseDirectiveCVStringTable +/// ::= .cv_stringtable +bool AsmParser::parseDirectiveCVStringTable() { + getStreamer().EmitCVStringTableDirective(); + return false; +} + +/// parseDirectiveCVFileChecksums +/// ::= .cv_filechecksums +bool AsmParser::parseDirectiveCVFileChecksums() { + getStreamer().EmitCVFileChecksumsDirective(); + return false; +} + +/// parseDirectiveCFISections +/// ::= .cfi_sections section [, section] +bool AsmParser::parseDirectiveCFISections() +{ + StringRef Name; + bool EH = false; + bool Debug = false; + + if (parseIdentifier(Name)) + //return TokError("Expected an identifier"); + return true; + + if (Name == ".eh_frame") + EH = true; + else if (Name == ".debug_frame") + Debug = true; + + if (getLexer().is(AsmToken::Comma)) { + Lex(); + + if (parseIdentifier(Name)) + //return TokError("Expected an identifier"); + return true; + + if (Name == ".eh_frame") + EH = true; + else if (Name == ".debug_frame") + Debug = true; + } + + getStreamer().EmitCFISections(EH, Debug); + return false; +} + +/// parseDirectiveCFIStartProc +/// ::= .cfi_startproc [simple] +bool AsmParser::parseDirectiveCFIStartProc() +{ + StringRef Simple; + if (getLexer().isNot(AsmToken::EndOfStatement)) + if (parseIdentifier(Simple) || Simple != "simple") + //return TokError("unexpected token in .cfi_startproc directive"); + return true; + + getStreamer().EmitCFIStartProc(!Simple.empty()); + return false; +} + +/// parseDirectiveCFIEndProc +/// ::= .cfi_endproc +bool AsmParser::parseDirectiveCFIEndProc() { + getStreamer().EmitCFIEndProc(); + return false; +} + +/// \brief parse register name or number. +bool AsmParser::parseRegisterOrRegisterNumber(int64_t &Register, + SMLoc DirectiveLoc) { + unsigned RegNo; + unsigned int ErrorCode; + + if (getLexer().isNot(AsmToken::Integer)) { + if (getTargetParser().ParseRegister(RegNo, DirectiveLoc, DirectiveLoc, ErrorCode)) + return true; + Register = getContext().getRegisterInfo()->getDwarfRegNum(RegNo, true); + } else + return parseAbsoluteExpression(Register); + + return false; +} + +/// parseDirectiveCFIDefCfa +/// ::= .cfi_def_cfa register, offset +bool AsmParser::parseDirectiveCFIDefCfa(SMLoc DirectiveLoc) +{ + int64_t Register = 0; + if (parseRegisterOrRegisterNumber(Register, DirectiveLoc)) + return true; + + if (getLexer().isNot(AsmToken::Comma)) + //return TokError("unexpected token in directive"); + return true; + Lex(); + + int64_t Offset = 0; + if (parseAbsoluteExpression(Offset)) + return true; + + getStreamer().EmitCFIDefCfa(Register, Offset); + return false; +} + +/// parseDirectiveCFIDefCfaOffset +/// ::= .cfi_def_cfa_offset offset +bool AsmParser::parseDirectiveCFIDefCfaOffset() { + int64_t Offset = 0; + if (parseAbsoluteExpression(Offset)) + return true; + + getStreamer().EmitCFIDefCfaOffset(Offset); + return false; +} + +/// parseDirectiveCFIRegister +/// ::= .cfi_register register, register +bool AsmParser::parseDirectiveCFIRegister(SMLoc DirectiveLoc) +{ + int64_t Register1 = 0; + if (parseRegisterOrRegisterNumber(Register1, DirectiveLoc)) + return true; + + if (getLexer().isNot(AsmToken::Comma)) + //return TokError("unexpected token in directive"); + return true; + Lex(); + + int64_t Register2 = 0; + if (parseRegisterOrRegisterNumber(Register2, DirectiveLoc)) + return true; + + getStreamer().EmitCFIRegister(Register1, Register2); + return false; +} + +/// parseDirectiveCFIWindowSave +/// ::= .cfi_window_save +bool AsmParser::parseDirectiveCFIWindowSave() { + getStreamer().EmitCFIWindowSave(); + return false; +} + +/// parseDirectiveCFIAdjustCfaOffset +/// ::= .cfi_adjust_cfa_offset adjustment +bool AsmParser::parseDirectiveCFIAdjustCfaOffset() { + int64_t Adjustment = 0; + if (parseAbsoluteExpression(Adjustment)) + return true; + + getStreamer().EmitCFIAdjustCfaOffset(Adjustment); + return false; +} + +/// parseDirectiveCFIDefCfaRegister +/// ::= .cfi_def_cfa_register register +bool AsmParser::parseDirectiveCFIDefCfaRegister(SMLoc DirectiveLoc) { + int64_t Register = 0; + if (parseRegisterOrRegisterNumber(Register, DirectiveLoc)) + return true; + + getStreamer().EmitCFIDefCfaRegister(Register); + return false; +} + +/// parseDirectiveCFIOffset +/// ::= .cfi_offset register, offset +bool AsmParser::parseDirectiveCFIOffset(SMLoc DirectiveLoc) +{ + int64_t Register = 0; + int64_t Offset = 0; + + if (parseRegisterOrRegisterNumber(Register, DirectiveLoc)) + return true; + + if (getLexer().isNot(AsmToken::Comma)) + //return TokError("unexpected token in directive"); + return true; + Lex(); + + if (parseAbsoluteExpression(Offset)) + return true; + + getStreamer().EmitCFIOffset(Register, Offset); + return false; +} + +/// parseDirectiveCFIRelOffset +/// ::= .cfi_rel_offset register, offset +bool AsmParser::parseDirectiveCFIRelOffset(SMLoc DirectiveLoc) { + int64_t Register = 0; + + if (parseRegisterOrRegisterNumber(Register, DirectiveLoc)) + return true; + + if (getLexer().isNot(AsmToken::Comma)) + //return TokError("unexpected token in directive"); + return true; + Lex(); + + int64_t Offset = 0; + if (parseAbsoluteExpression(Offset)) + return true; + + getStreamer().EmitCFIRelOffset(Register, Offset); + return false; +} + +static bool isValidEncoding(int64_t Encoding) { + if (Encoding & ~0xff) + return false; + + if (Encoding == dwarf::DW_EH_PE_omit) + return true; + + const unsigned Format = Encoding & 0xf; + if (Format != dwarf::DW_EH_PE_absptr && Format != dwarf::DW_EH_PE_udata2 && + Format != dwarf::DW_EH_PE_udata4 && Format != dwarf::DW_EH_PE_udata8 && + Format != dwarf::DW_EH_PE_sdata2 && Format != dwarf::DW_EH_PE_sdata4 && + Format != dwarf::DW_EH_PE_sdata8 && Format != dwarf::DW_EH_PE_signed) + return false; + + const unsigned Application = Encoding & 0x70; + if (Application != dwarf::DW_EH_PE_absptr && + Application != dwarf::DW_EH_PE_pcrel) + return false; + + return true; +} + +/// parseDirectiveCFIPersonalityOrLsda +/// IsPersonality true for cfi_personality, false for cfi_lsda +/// ::= .cfi_personality encoding, [symbol_name] +/// ::= .cfi_lsda encoding, [symbol_name] +bool AsmParser::parseDirectiveCFIPersonalityOrLsda(bool IsPersonality) { + int64_t Encoding = 0; + if (parseAbsoluteExpression(Encoding)) + return true; + if (Encoding == dwarf::DW_EH_PE_omit) + return false; + + if (!isValidEncoding(Encoding)) + //return TokError("unsupported encoding."); + return true; + + if (getLexer().isNot(AsmToken::Comma)) + //return TokError("unexpected token in directive"); + return true; + Lex(); + + StringRef Name; + if (parseIdentifier(Name)) + //return TokError("expected identifier in directive"); + return true; + + if (Name.empty()) { + return true; + } + MCSymbol *Sym = getContext().getOrCreateSymbol(Name); + + if (IsPersonality) + getStreamer().EmitCFIPersonality(Sym, Encoding); + else + getStreamer().EmitCFILsda(Sym, Encoding); + return false; +} + +/// parseDirectiveCFIRememberState +/// ::= .cfi_remember_state +bool AsmParser::parseDirectiveCFIRememberState() { + getStreamer().EmitCFIRememberState(); + return false; +} + +/// parseDirectiveCFIRestoreState +/// ::= .cfi_remember_state +bool AsmParser::parseDirectiveCFIRestoreState() { + getStreamer().EmitCFIRestoreState(); + return false; +} + +/// parseDirectiveCFISameValue +/// ::= .cfi_same_value register +bool AsmParser::parseDirectiveCFISameValue(SMLoc DirectiveLoc) { + int64_t Register = 0; + + if (parseRegisterOrRegisterNumber(Register, DirectiveLoc)) + return true; + + getStreamer().EmitCFISameValue(Register); + return false; +} + +/// parseDirectiveCFIRestore +/// ::= .cfi_restore register +bool AsmParser::parseDirectiveCFIRestore(SMLoc DirectiveLoc) { + int64_t Register = 0; + if (parseRegisterOrRegisterNumber(Register, DirectiveLoc)) + return true; + + getStreamer().EmitCFIRestore(Register); + return false; +} + +/// parseDirectiveCFIEscape +/// ::= .cfi_escape expression[,...] +bool AsmParser::parseDirectiveCFIEscape() { + std::string Values; + int64_t CurrValue; + if (parseAbsoluteExpression(CurrValue)) + return true; + + Values.push_back((uint8_t)CurrValue); + + while (getLexer().is(AsmToken::Comma)) { + Lex(); + + if (parseAbsoluteExpression(CurrValue)) + return true; + + Values.push_back((uint8_t)CurrValue); + } + + getStreamer().EmitCFIEscape(Values); + return false; +} + +/// parseDirectiveCFISignalFrame +/// ::= .cfi_signal_frame +bool AsmParser::parseDirectiveCFISignalFrame() { + if (getLexer().isNot(AsmToken::EndOfStatement)) + //return Error(getLexer().getLoc(), + // "unexpected token in '.cfi_signal_frame'"); + return true; + + getStreamer().EmitCFISignalFrame(); + return false; +} + +/// parseDirectiveCFIUndefined +/// ::= .cfi_undefined register +bool AsmParser::parseDirectiveCFIUndefined(SMLoc DirectiveLoc) { + int64_t Register = 0; + + if (parseRegisterOrRegisterNumber(Register, DirectiveLoc)) + return true; + + getStreamer().EmitCFIUndefined(Register); + return false; +} + +/// parseDirectiveMacrosOnOff +/// ::= .macros_on +/// ::= .macros_off +bool AsmParser::parseDirectiveMacrosOnOff(StringRef Directive) { + if (getLexer().isNot(AsmToken::EndOfStatement)) + //return Error(getLexer().getLoc(), + // "unexpected token in '" + Directive + "' directive"); + return true; + + setMacrosEnabled(Directive == ".macros_on"); + return false; +} + +/// parseDirectiveMacro +/// ::= .macro name[,] [parameters] +bool AsmParser::parseDirectiveMacro(SMLoc DirectiveLoc) +{ + StringRef Name; + if (parseIdentifier(Name)) { + //return TokError("expected identifier in '.macro' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (getLexer().is(AsmToken::Comma)) + Lex(); + + MCAsmMacroParameters Parameters; + while (getLexer().isNot(AsmToken::EndOfStatement)) { + + if (!Parameters.empty() && Parameters.back().Vararg) { + //return Error(Lexer.getLoc(), + // "Vararg parameter '" + Parameters.back().Name + + // "' should be last one in the list of parameters."); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + MCAsmMacroParameter Parameter; + if (parseIdentifier(Parameter.Name)) { + //return TokError("expected identifier in '.macro' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (Lexer.is(AsmToken::Colon)) { + Lex(); // consume ':' + + SMLoc QualLoc; + StringRef Qualifier; + + QualLoc = Lexer.getLoc(); + if (parseIdentifier(Qualifier)) { + //return Error(QualLoc, "missing parameter qualifier for " + // "'" + Parameter.Name + "' in macro '" + Name + "'"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (Qualifier == "req") + Parameter.Required = true; + else if (Qualifier == "vararg") + Parameter.Vararg = true; + else { + //return Error(QualLoc, Qualifier + " is not a valid parameter qualifier " + // "for '" + Parameter.Name + "' in macro '" + Name + "'"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + } + + if (getLexer().is(AsmToken::Equal)) { + Lex(); + + SMLoc ParamLoc; + + ParamLoc = Lexer.getLoc(); + if (parseMacroArgument(Parameter.Value, /*Vararg=*/false )) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (Parameter.Required) + Warning(ParamLoc, "pointless default value for required parameter " + "'" + Parameter.Name + "' in macro '" + Name + "'"); + } + + Parameters.push_back(std::move(Parameter)); + + if (getLexer().is(AsmToken::Comma)) + Lex(); + } + + // Eat the end of statement. + Lex(); + + AsmToken EndToken, StartToken = getTok(); + unsigned MacroDepth = 0; + + // Lex the macro definition. + for (;;) { + // Check whether we have reached the end of the file. + if (getLexer().is(AsmToken::Eof)) { + //return Error(DirectiveLoc, "no matching '.endmacro' in definition"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // Otherwise, check whether we have reach the .endmacro. + if (getLexer().is(AsmToken::Identifier)) { + if (getTok().getIdentifier() == ".endm" || + getTok().getIdentifier() == ".endmacro") { + if (MacroDepth == 0) { // Outermost macro. + EndToken = getTok(); + Lex(); + if (getLexer().isNot(AsmToken::EndOfStatement)) { + //return TokError("unexpected token in '" + EndToken.getIdentifier() + + // "' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + break; + } else { + // Otherwise we just found the end of an inner macro. + --MacroDepth; + } + } else if (getTok().getIdentifier() == ".macro") { + // We allow nested macros. Those aren't instantiated until the outermost + // macro is expanded so just ignore them for now. + ++MacroDepth; + } + } + + // Otherwise, scan til the end of the statement. + eatToEndOfStatement(); + } + + if (lookupMacro(Name)) { + //return Error(DirectiveLoc, "macro '" + Name + "' is already defined"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + const char *BodyStart = StartToken.getLoc().getPointer(); + const char *BodyEnd = EndToken.getLoc().getPointer(); + StringRef Body = StringRef(BodyStart, BodyEnd - BodyStart); + checkForBadMacro(DirectiveLoc, Name, Body, Parameters); + defineMacro(Name, MCAsmMacro(Name, Body, std::move(Parameters))); + return false; +} + +/// checkForBadMacro +/// +/// With the support added for named parameters there may be code out there that +/// is transitioning from positional parameters. In versions of gas that did +/// not support named parameters they would be ignored on the macro definition. +/// But to support both styles of parameters this is not possible so if a macro +/// definition has named parameters but does not use them and has what appears +/// to be positional parameters, strings like $1, $2, ... and $n, then issue a +/// warning that the positional parameter found in body which have no effect. +/// Hoping the developer will either remove the named parameters from the macro +/// definition so the positional parameters get used if that was what was +/// intended or change the macro to use the named parameters. It is possible +/// this warning will trigger when the none of the named parameters are used +/// and the strings like $1 are infact to simply to be passed trough unchanged. +void AsmParser::checkForBadMacro(SMLoc DirectiveLoc, StringRef Name, + StringRef Body, + ArrayRef Parameters) { + // If this macro is not defined with named parameters the warning we are + // checking for here doesn't apply. + unsigned NParameters = Parameters.size(); + if (NParameters == 0) + return; + + bool NamedParametersFound = false; + bool PositionalParametersFound = false; + + // Look at the body of the macro for use of both the named parameters and what + // are likely to be positional parameters. This is what expandMacro() is + // doing when it finds the parameters in the body. + while (!Body.empty()) { + // Scan for the next possible parameter. + std::size_t End = Body.size(), Pos = 0; + for (; Pos != End; ++Pos) { + // Check for a substitution or escape. + // This macro is defined with parameters, look for \foo, \bar, etc. + if (Body[Pos] == '\\' && Pos + 1 != End) + break; + + // This macro should have parameters, but look for $0, $1, ..., $n too. + if (Body[Pos] != '$' || Pos + 1 == End) + continue; + char Next = Body[Pos + 1]; + if (Next == '$' || Next == 'n' || + isdigit(static_cast(Next))) + break; + } + + // Check if we reached the end. + if (Pos == End) + break; + + if (Body[Pos] == '$') { + switch (Body[Pos + 1]) { + // $$ => $ + case '$': + break; + + // $n => number of arguments + case 'n': + PositionalParametersFound = true; + break; + + // $[0-9] => argument + default: { + PositionalParametersFound = true; + break; + } + } + Pos += 2; + } else { + unsigned I = Pos + 1; + while (isIdentifierChar(Body[I]) && I + 1 != End) + ++I; + + const char *Begin = Body.data() + Pos + 1; + StringRef Argument(Begin, I - (Pos + 1)); + unsigned Index = 0; + for (; Index < NParameters; ++Index) + if (Parameters[Index].Name == Argument) + break; + + if (Index == NParameters) { + if (Body[Pos + 1] == '(' && Body[Pos + 2] == ')') + Pos += 3; + else { + Pos = I; + } + } else { + NamedParametersFound = true; + Pos += 1 + Argument.size(); + } + } + // Update the scan point. + Body = Body.substr(Pos); + } + + if (!NamedParametersFound && PositionalParametersFound) + Warning(DirectiveLoc, "macro defined with named parameters which are not " + "used in macro body, possible positional parameter " + "found in body which will have no effect"); +} + +/// parseDirectiveExitMacro +/// ::= .exitm +bool AsmParser::parseDirectiveExitMacro(StringRef Directive) +{ + if (getLexer().isNot(AsmToken::EndOfStatement)) { + //return TokError("unexpected token in '" + Directive + "' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (!isInsideMacroInstantiation()) { + //return TokError("unexpected '" + Directive + "' in file, " + // "no current macro definition"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // Exit all conditionals that are active in the current macro. + while (TheCondStack.size() != ActiveMacros.back()->CondStackDepth) { + TheCondState = TheCondStack.back(); + TheCondStack.pop_back(); + } + + handleMacroExit(); + return false; +} + +/// parseDirectiveEndMacro +/// ::= .endm +/// ::= .endmacro +bool AsmParser::parseDirectiveEndMacro(StringRef Directive) +{ + if (getLexer().isNot(AsmToken::EndOfStatement)) { + //return TokError("unexpected token in '" + Directive + "' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // If we are inside a macro instantiation, terminate the current + // instantiation. + if (isInsideMacroInstantiation()) { + handleMacroExit(); + return false; + } + + // Otherwise, this .endmacro is a stray entry in the file; well formed + // .endmacro directives are handled during the macro definition parsing. + //return TokError("unexpected '" + Directive + "' in file, " + // "no current macro definition"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; +} + +/// parseDirectivePurgeMacro +/// ::= .purgem +bool AsmParser::parseDirectivePurgeMacro(SMLoc DirectiveLoc) +{ + StringRef Name; + if (parseIdentifier(Name)) { + //return TokError("expected identifier in '.purgem' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (getLexer().isNot(AsmToken::EndOfStatement)) { + //return TokError("unexpected token in '.purgem' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (!lookupMacro(Name)) { + //return Error(DirectiveLoc, "macro '" + Name + "' is not defined"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + undefineMacro(Name); + return false; +} + +/// parseDirectiveBundleAlignMode +/// ::= {.bundle_align_mode} expression +bool AsmParser::parseDirectiveBundleAlignMode() +{ + checkForValidSection(); + + // Expect a single argument: an expression that evaluates to a constant + // in the inclusive range 0-30. + //SMLoc ExprLoc = getLexer().getLoc(); + int64_t AlignSizePow2; + if (parseAbsoluteExpression(AlignSizePow2)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } else if (getLexer().isNot(AsmToken::EndOfStatement)) { + //return TokError("unexpected token after expression in" + // " '.bundle_align_mode' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } else if (AlignSizePow2 < 0 || AlignSizePow2 > 30) { + //return Error(ExprLoc, + // "invalid bundle alignment size (expected between 0 and 30)"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + Lex(); + + // Because of AlignSizePow2's verified range we can safely truncate it to + // unsigned. + getStreamer().EmitBundleAlignMode(static_cast(AlignSizePow2)); + return false; +} + +/// parseDirectiveBundleLock +/// ::= {.bundle_lock} [align_to_end] +bool AsmParser::parseDirectiveBundleLock() +{ + checkForValidSection(); + bool AlignToEnd = false; + + if (getLexer().isNot(AsmToken::EndOfStatement)) { + StringRef Option; + //SMLoc Loc = getTok().getLoc(); + //const char *kInvalidOptionError = + // "invalid option for '.bundle_lock' directive"; + + if (parseIdentifier(Option)) { + //return Error(Loc, kInvalidOptionError); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (Option != "align_to_end") { + //return Error(Loc, kInvalidOptionError); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } else if (getLexer().isNot(AsmToken::EndOfStatement)) { + //return Error(Loc, + // "unexpected token after '.bundle_lock' directive option"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + AlignToEnd = true; + } + + Lex(); + + getStreamer().EmitBundleLock(AlignToEnd); + return false; +} + +/// parseDirectiveBundleLock +/// ::= {.bundle_lock} +bool AsmParser::parseDirectiveBundleUnlock() +{ + checkForValidSection(); + + if (getLexer().isNot(AsmToken::EndOfStatement)) { + //return TokError("unexpected token in '.bundle_unlock' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + Lex(); + + getStreamer().EmitBundleUnlock(); + return false; +} + +/// parseDirectiveSpace +/// ::= (.skip | .space) expression [ , expression ] +bool AsmParser::parseDirectiveSpace(StringRef IDVal) +{ + checkForValidSection(); + + int64_t NumBytes; + if (parseAbsoluteExpression(NumBytes)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + int64_t FillExpr = 0; + if (getLexer().isNot(AsmToken::EndOfStatement)) { + if (getLexer().isNot(AsmToken::Comma)) { + //return TokError("unexpected token in '" + Twine(IDVal) + "' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + Lex(); + + if (parseAbsoluteExpression(FillExpr)) + return true; + + if (getLexer().isNot(AsmToken::EndOfStatement)) + //return TokError("unexpected token in '" + Twine(IDVal) + "' directive"); + return true; + } + + Lex(); + + if (NumBytes <= 0) { + //return TokError("invalid number of bytes in '" + Twine(IDVal) + + // "' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // FIXME: Sometimes the fill expr is 'nop' if it isn't supplied, instead of 0. + getStreamer().EmitFill(NumBytes, FillExpr); + + return false; +} + +/// parseDirectiveLEB128 +/// ::= (.sleb128 | .uleb128) [ expression (, expression)* ] +bool AsmParser::parseDirectiveLEB128(bool Signed) +{ + checkForValidSection(); + const MCExpr *Value; + + for (;;) { + if (parseExpression(Value)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (Signed) + getStreamer().EmitSLEB128Value(Value); + else + getStreamer().EmitULEB128Value(Value); + + if (getLexer().is(AsmToken::EndOfStatement)) + break; + + if (getLexer().isNot(AsmToken::Comma)) { + //return TokError("unexpected token in directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + Lex(); + } + + return false; +} + +/// parseDirectiveSymbolAttribute +/// ::= { ".globl", ".weak", ... } [ identifier ( , identifier )* ] +bool AsmParser::parseDirectiveSymbolAttribute(MCSymbolAttr Attr) +{ + if (getLexer().isNot(AsmToken::EndOfStatement)) { + for (;;) { + StringRef Name; + //SMLoc Loc = getTok().getLoc(); + + if (parseIdentifier(Name)) { + //return Error(Loc, "expected identifier in directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (Name.empty()) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + MCSymbol *Sym = getContext().getOrCreateSymbol(Name); + + // Assembler local symbols don't make any sense here. Complain loudly. + if (Sym->isTemporary()) { + //return Error(Loc, "non-local symbol required in directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (!getStreamer().EmitSymbolAttribute(Sym, Attr)) { + //return Error(Loc, "unable to emit symbol attribute"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (getLexer().is(AsmToken::EndOfStatement)) + break; + + if (getLexer().isNot(AsmToken::Comma)) { + //return TokError("unexpected token in directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + Lex(); + } + } + + Lex(); + return false; +} + +/// parseDirectiveComm +/// ::= ( .comm | .lcomm ) identifier , size_expression [ , align_expression ] +bool AsmParser::parseDirectiveComm(bool IsLocal) +{ + checkForValidSection(); + + //SMLoc IDLoc = getLexer().getLoc(); + StringRef Name; + if (parseIdentifier(Name)) { + //return TokError("expected identifier in directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (Name.empty()) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + // Handle the identifier as the key symbol. + MCSymbol *Sym = getContext().getOrCreateSymbol(Name); + + if (getLexer().isNot(AsmToken::Comma)) { + //return TokError("unexpected token in directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + Lex(); + + int64_t Size; + //SMLoc SizeLoc = getLexer().getLoc(); + if (parseAbsoluteExpression(Size)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + int64_t Pow2Alignment = 0; + SMLoc Pow2AlignmentLoc; + if (getLexer().is(AsmToken::Comma)) { + Lex(); + Pow2AlignmentLoc = getLexer().getLoc(); + if (parseAbsoluteExpression(Pow2Alignment)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + LCOMM::LCOMMType LCOMM = Lexer.getMAI().getLCOMMDirectiveAlignmentType(); + if (IsLocal && LCOMM == LCOMM::NoAlignment) { + //return Error(Pow2AlignmentLoc, "alignment not supported on this target"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // If this target takes alignments in bytes (not log) validate and convert. + if ((!IsLocal && Lexer.getMAI().getCOMMDirectiveAlignmentIsInBytes()) || + (IsLocal && LCOMM == LCOMM::ByteAlignment)) { + if (!isPowerOf2_64(Pow2Alignment)) { + //return Error(Pow2AlignmentLoc, "alignment must be a power of 2"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + Pow2Alignment = Log2_64(Pow2Alignment); + } + } + + if (getLexer().isNot(AsmToken::EndOfStatement)) { + //return TokError("unexpected token in '.comm' or '.lcomm' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + Lex(); + + // NOTE: a size of zero for a .comm should create a undefined symbol + // but a size of .lcomm creates a bss symbol of size zero. + if (Size < 0) { + //return Error(SizeLoc, "invalid '.comm' or '.lcomm' directive size, can't " + // "be less than zero"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // NOTE: The alignment in the directive is a power of 2 value, the assembler + // may internally end up wanting an alignment in bytes. + // FIXME: Diagnose overflow. + if (Pow2Alignment < 0) { + //return Error(Pow2AlignmentLoc, "invalid '.comm' or '.lcomm' directive " + // "alignment, can't be less than zero"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (!Sym->isUndefined()) { + //return Error(IDLoc, "invalid symbol redefinition"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // Create the Symbol as a common or local common with Size and Pow2Alignment + if (IsLocal) { + getStreamer().EmitLocalCommonSymbol(Sym, Size, 1 << Pow2Alignment); + return false; + } + + getStreamer().EmitCommonSymbol(Sym, Size, 1 << Pow2Alignment); + return false; +} + +/// parseDirectiveAbort +/// ::= .abort [... message ...] +bool AsmParser::parseDirectiveAbort() +{ + // FIXME: Use loc from directive. + //SMLoc Loc = getLexer().getLoc(); + + StringRef Str = parseStringToEndOfStatement(); + if (getLexer().isNot(AsmToken::EndOfStatement)) { + //return TokError("unexpected token in '.abort' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + Lex(); + + if (Str.empty()) { + //Error(Loc, ".abort detected. Assembly stopping."); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } else { + //Error(Loc, ".abort '" + Str + "' detected. Assembly stopping."); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // FIXME: Actually abort assembly here. + + return false; +} + +/// parseDirectiveInclude +/// ::= .include "filename" +bool AsmParser::parseDirectiveInclude() +{ + if (getLexer().isNot(AsmToken::String)) { + //return TokError("expected string in '.include' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // Allow the strings to have escaped octal character sequence. + std::string Filename; + if (parseEscapedString(Filename)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + //SMLoc IncludeLoc = getLexer().getLoc(); + Lex(); + + if (getLexer().isNot(AsmToken::EndOfStatement)) { + //return TokError("unexpected token in '.include' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // Attempt to switch the lexer to the included file before consuming the end + // of statement to avoid losing it when we switch. + if (enterIncludeFile(Filename)) { + //Error(IncludeLoc, "Could not find include file '" + Filename + "'"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + return false; +} + +/// parseDirectiveIncbin +/// ::= .incbin "filename" +bool AsmParser::parseDirectiveIncbin() +{ + if (getLexer().isNot(AsmToken::String)) { + //return TokError("expected string in '.incbin' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // Allow the strings to have escaped octal character sequence. + std::string Filename; + if (parseEscapedString(Filename)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + //SMLoc IncbinLoc = getLexer().getLoc(); + Lex(); + + if (getLexer().isNot(AsmToken::EndOfStatement)) { + //return TokError("unexpected token in '.incbin' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // Attempt to process the included file. + if (processIncbinFile(Filename)) { + //Error(IncbinLoc, "Could not find incbin file '" + Filename + "'"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + return false; +} + +/// parseDirectiveIf +/// ::= .if{,eq,ge,gt,le,lt,ne} expression +bool AsmParser::parseDirectiveIf(SMLoc DirectiveLoc, DirectiveKind DirKind) +{ + TheCondStack.push_back(TheCondState); + TheCondState.TheCond = AsmCond::IfCond; + if (TheCondState.Ignore) { + eatToEndOfStatement(); + } else { + int64_t ExprValue; + if (parseAbsoluteExpression(ExprValue)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (getLexer().isNot(AsmToken::EndOfStatement)) { + //return TokError("unexpected token in '.if' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + Lex(); + + switch (DirKind) { + default: + llvm_unreachable("unsupported directive"); + case DK_IF: + case DK_IFNE: + break; + case DK_IFEQ: + ExprValue = ExprValue == 0; + break; + case DK_IFGE: + ExprValue = ExprValue >= 0; + break; + case DK_IFGT: + ExprValue = ExprValue > 0; + break; + case DK_IFLE: + ExprValue = ExprValue <= 0; + break; + case DK_IFLT: + ExprValue = ExprValue < 0; + break; + } + + TheCondState.CondMet = ExprValue; + TheCondState.Ignore = !TheCondState.CondMet; + } + + return false; +} + +/// parseDirectiveIfb +/// ::= .ifb string +bool AsmParser::parseDirectiveIfb(SMLoc DirectiveLoc, bool ExpectBlank) +{ + TheCondStack.push_back(TheCondState); + TheCondState.TheCond = AsmCond::IfCond; + + if (TheCondState.Ignore) { + eatToEndOfStatement(); + } else { + StringRef Str = parseStringToEndOfStatement(); + + if (getLexer().isNot(AsmToken::EndOfStatement)) { + //return TokError("unexpected token in '.ifb' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + Lex(); + + TheCondState.CondMet = ExpectBlank == Str.empty(); + TheCondState.Ignore = !TheCondState.CondMet; + } + + return false; +} + +/// parseDirectiveIfc +/// ::= .ifc string1, string2 +/// ::= .ifnc string1, string2 +bool AsmParser::parseDirectiveIfc(SMLoc DirectiveLoc, bool ExpectEqual) +{ + TheCondStack.push_back(TheCondState); + TheCondState.TheCond = AsmCond::IfCond; + + if (TheCondState.Ignore) { + eatToEndOfStatement(); + } else { + StringRef Str1 = parseStringToComma(); + + if (getLexer().isNot(AsmToken::Comma)) { + //return TokError("unexpected token in '.ifc' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + Lex(); + + StringRef Str2 = parseStringToEndOfStatement(); + + if (getLexer().isNot(AsmToken::EndOfStatement)) { + //return TokError("unexpected token in '.ifc' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + Lex(); + + TheCondState.CondMet = ExpectEqual == (Str1.trim() == Str2.trim()); + TheCondState.Ignore = !TheCondState.CondMet; + } + + return false; +} + +/// parseDirectiveIfeqs +/// ::= .ifeqs string1, string2 +bool AsmParser::parseDirectiveIfeqs(SMLoc DirectiveLoc, bool ExpectEqual) +{ + if (Lexer.isNot(AsmToken::String)) { + //if (ExpectEqual) + // TokError("expected string parameter for '.ifeqs' directive"); + //else + // TokError("expected string parameter for '.ifnes' directive"); + eatToEndOfStatement(); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + bool valid; + StringRef String1 = getTok().getStringContents(valid); + if (!valid) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + Lex(); + + if (Lexer.isNot(AsmToken::Comma)) { + //if (ExpectEqual) + // TokError("expected comma after first string for '.ifeqs' directive"); + //else + // TokError("expected comma after first string for '.ifnes' directive"); + eatToEndOfStatement(); + return true; + } + + Lex(); + + if (Lexer.isNot(AsmToken::String)) { + //if (ExpectEqual) + // TokError("expected string parameter for '.ifeqs' directive"); + //else + // TokError("expected string parameter for '.ifnes' directive"); + eatToEndOfStatement(); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + StringRef String2 = getTok().getStringContents(valid); + if (!valid) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + Lex(); + + TheCondStack.push_back(TheCondState); + TheCondState.TheCond = AsmCond::IfCond; + TheCondState.CondMet = ExpectEqual == (String1 == String2); + TheCondState.Ignore = !TheCondState.CondMet; + + return false; +} + +/// parseDirectiveIfdef +/// ::= .ifdef symbol +bool AsmParser::parseDirectiveIfdef(SMLoc DirectiveLoc, bool expect_defined) { + StringRef Name; + TheCondStack.push_back(TheCondState); + TheCondState.TheCond = AsmCond::IfCond; + + if (TheCondState.Ignore) { + eatToEndOfStatement(); + } else { + if (parseIdentifier(Name)) { + //return TokError("expected identifier after '.ifdef'"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + Lex(); + + MCSymbol *Sym = getContext().lookupSymbol(Name); + + if (expect_defined) + TheCondState.CondMet = (Sym && !Sym->isUndefined()); + else + TheCondState.CondMet = (!Sym || Sym->isUndefined()); + TheCondState.Ignore = !TheCondState.CondMet; + } + + return false; +} + +/// parseDirectiveElseIf +/// ::= .elseif expression +bool AsmParser::parseDirectiveElseIf(SMLoc DirectiveLoc) +{ + if (TheCondState.TheCond != AsmCond::IfCond && + TheCondState.TheCond != AsmCond::ElseIfCond) { + //Error(DirectiveLoc, "Encountered a .elseif that doesn't follow a .if or " + // " an .elseif"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + TheCondState.TheCond = AsmCond::ElseIfCond; + + bool LastIgnoreState = false; + if (!TheCondStack.empty()) + LastIgnoreState = TheCondStack.back().Ignore; + if (LastIgnoreState || TheCondState.CondMet) { + TheCondState.Ignore = true; + eatToEndOfStatement(); + } else { + int64_t ExprValue; + if (parseAbsoluteExpression(ExprValue)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (getLexer().isNot(AsmToken::EndOfStatement)) + //return TokError("unexpected token in '.elseif' directive"); + return true; + + Lex(); + TheCondState.CondMet = ExprValue; + TheCondState.Ignore = !TheCondState.CondMet; + } + + return false; +} + +/// parseDirectiveElse +/// ::= .else +bool AsmParser::parseDirectiveElse(SMLoc DirectiveLoc) +{ + if (getLexer().isNot(AsmToken::EndOfStatement)) { + //return TokError("unexpected token in '.else' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + Lex(); + + if (TheCondState.TheCond != AsmCond::IfCond && + TheCondState.TheCond != AsmCond::ElseIfCond) { + //Error(DirectiveLoc, "Encountered a .else that doesn't follow a .if or an " + // ".elseif"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + TheCondState.TheCond = AsmCond::ElseCond; + bool LastIgnoreState = false; + if (!TheCondStack.empty()) + LastIgnoreState = TheCondStack.back().Ignore; + if (LastIgnoreState || TheCondState.CondMet) + TheCondState.Ignore = true; + else + TheCondState.Ignore = false; + + return false; +} + +/// parseDirectiveEnd +/// ::= .end +bool AsmParser::parseDirectiveEnd(SMLoc DirectiveLoc) +{ + if (getLexer().isNot(AsmToken::EndOfStatement)) { + //return TokError("unexpected token in '.end' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + Lex(); + + while (Lexer.isNot(AsmToken::Eof)) + Lex(); + + return false; +} + +/// parseDirectiveError +/// ::= .err +/// ::= .error [string] +bool AsmParser::parseDirectiveError(SMLoc L, bool WithMessage) +{ + if (!TheCondStack.empty()) { + if (TheCondStack.back().Ignore) { + eatToEndOfStatement(); + return false; + } + } + + if (!WithMessage) { + //return Error(L, ".err encountered"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + StringRef Message = ".error directive invoked in source file"; + if (Lexer.isNot(AsmToken::EndOfStatement)) { + if (Lexer.isNot(AsmToken::String)) { + //TokError(".error argument must be a string"); + eatToEndOfStatement(); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + bool valid; + Message = getTok().getStringContents(valid); + if (!valid) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + Lex(); + } + + //Error(L, Message); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; +} + +/// parseDirectiveWarning +/// ::= .warning [string] +bool AsmParser::parseDirectiveWarning(SMLoc L) +{ + if (!TheCondStack.empty()) { + if (TheCondStack.back().Ignore) { + eatToEndOfStatement(); + return false; + } + } + + StringRef Message = ".warning directive invoked in source file"; + if (Lexer.isNot(AsmToken::EndOfStatement)) { + if (Lexer.isNot(AsmToken::String)) { + //TokError(".warning argument must be a string"); + eatToEndOfStatement(); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + bool valid; + Message = getTok().getStringContents(valid); + if (!valid) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + Lex(); + } + + Warning(L, Message); + return false; +} + +bool AsmParser::parseNasmDirectiveBits() +{ + int64_t bits = 0; + + if (parseAbsoluteExpression(bits)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + switch(bits) { + default: // invalid parameter + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + case 16: { + AsmToken bits(AsmToken::Identifier, StringRef(".code16"), 0); + getTargetParser().ParseDirective(bits); + break; + } + case 32: { + AsmToken bits(AsmToken::Identifier, StringRef(".code32"), 0); + getTargetParser().ParseDirective(bits); + break; + } + case 64: { + AsmToken bits(AsmToken::Identifier, StringRef(".code64"), 0); + getTargetParser().ParseDirective(bits); + break; + } + } + + return false; +} + +bool AsmParser::parseNasmDirectiveUse32() +{ + AsmToken bits(AsmToken::Identifier, StringRef(".code32"), 0); + return getTargetParser().ParseDirective(bits); +} + +bool AsmParser::parseNasmDirectiveDefault() +{ + std::string flag = parseStringToEndOfStatement().lower(); + if (flag == "rel") { + setNasmDefaultRel(true); + return false; + } else if (flag == "abs") { + setNasmDefaultRel(false); + return false; + } + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; +} + +/// parseDirectiveEndIf +/// ::= .endif +bool AsmParser::parseDirectiveEndIf(SMLoc DirectiveLoc) +{ + if (getLexer().isNot(AsmToken::EndOfStatement)) { + //return TokError("unexpected token in '.endif' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + Lex(); + + if ((TheCondState.TheCond == AsmCond::NoCond) || TheCondStack.empty()) { + //Error(DirectiveLoc, "Encountered a .endif that doesn't follow a .if or " + // ".else"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + if (!TheCondStack.empty()) { + TheCondState = TheCondStack.back(); + TheCondStack.pop_back(); + } + + return false; +} + +void AsmParser::initializeDirectiveKindMap(int syntax) +{ + KsSyntax = syntax; + if (syntax == KS_OPT_SYNTAX_NASM) { + // NASM syntax + DirectiveKindMap.clear(); + DirectiveKindMap["db"] = DK_BYTE; + DirectiveKindMap["dw"] = DK_SHORT; + DirectiveKindMap["dd"] = DK_INT; + DirectiveKindMap["dq"] = DK_QUAD; + DirectiveKindMap["use16"] = DK_CODE16; + DirectiveKindMap["use32"] = DK_NASM_USE32; + DirectiveKindMap["global"] = DK_GLOBAL; + DirectiveKindMap["bits"] = DK_NASM_BITS; + DirectiveKindMap["default"] = DK_NASM_DEFAULT; + } else { + // default LLVM syntax + DirectiveKindMap.clear(); + DirectiveKindMap[".set"] = DK_SET; + DirectiveKindMap[".equ"] = DK_EQU; + DirectiveKindMap[".equiv"] = DK_EQUIV; + DirectiveKindMap[".ascii"] = DK_ASCII; + DirectiveKindMap[".asciz"] = DK_ASCIZ; + DirectiveKindMap[".string"] = DK_STRING; + DirectiveKindMap[".byte"] = DK_BYTE; + DirectiveKindMap[".short"] = DK_SHORT; + DirectiveKindMap[".value"] = DK_VALUE; + DirectiveKindMap[".2byte"] = DK_2BYTE; + DirectiveKindMap[".long"] = DK_LONG; + DirectiveKindMap[".int"] = DK_INT; + DirectiveKindMap[".4byte"] = DK_4BYTE; + DirectiveKindMap[".quad"] = DK_QUAD; + DirectiveKindMap[".8byte"] = DK_8BYTE; + DirectiveKindMap[".octa"] = DK_OCTA; + DirectiveKindMap[".single"] = DK_SINGLE; + DirectiveKindMap[".float"] = DK_FLOAT; + DirectiveKindMap[".double"] = DK_DOUBLE; + DirectiveKindMap[".align"] = DK_ALIGN; + DirectiveKindMap[".align32"] = DK_ALIGN32; + DirectiveKindMap[".balign"] = DK_BALIGN; + DirectiveKindMap[".balignw"] = DK_BALIGNW; + DirectiveKindMap[".balignl"] = DK_BALIGNL; + DirectiveKindMap[".p2align"] = DK_P2ALIGN; + DirectiveKindMap[".p2alignw"] = DK_P2ALIGNW; + DirectiveKindMap[".p2alignl"] = DK_P2ALIGNL; + DirectiveKindMap[".org"] = DK_ORG; + DirectiveKindMap[".fill"] = DK_FILL; + DirectiveKindMap[".zero"] = DK_ZERO; + DirectiveKindMap[".extern"] = DK_EXTERN; + DirectiveKindMap[".globl"] = DK_GLOBL; + DirectiveKindMap[".global"] = DK_GLOBAL; + DirectiveKindMap[".lazy_reference"] = DK_LAZY_REFERENCE; + DirectiveKindMap[".no_dead_strip"] = DK_NO_DEAD_STRIP; + DirectiveKindMap[".symbol_resolver"] = DK_SYMBOL_RESOLVER; + DirectiveKindMap[".private_extern"] = DK_PRIVATE_EXTERN; + DirectiveKindMap[".reference"] = DK_REFERENCE; + DirectiveKindMap[".weak_definition"] = DK_WEAK_DEFINITION; + DirectiveKindMap[".weak_reference"] = DK_WEAK_REFERENCE; + DirectiveKindMap[".weak_def_can_be_hidden"] = DK_WEAK_DEF_CAN_BE_HIDDEN; + DirectiveKindMap[".comm"] = DK_COMM; + DirectiveKindMap[".common"] = DK_COMMON; + DirectiveKindMap[".lcomm"] = DK_LCOMM; + DirectiveKindMap[".abort"] = DK_ABORT; + DirectiveKindMap[".include"] = DK_INCLUDE; + DirectiveKindMap[".incbin"] = DK_INCBIN; + DirectiveKindMap[".code16"] = DK_CODE16; + DirectiveKindMap[".code16gcc"] = DK_CODE16GCC; + DirectiveKindMap[".rept"] = DK_REPT; + DirectiveKindMap[".rep"] = DK_REPT; + DirectiveKindMap[".irp"] = DK_IRP; + DirectiveKindMap[".irpc"] = DK_IRPC; + DirectiveKindMap[".endr"] = DK_ENDR; + DirectiveKindMap[".bundle_align_mode"] = DK_BUNDLE_ALIGN_MODE; + DirectiveKindMap[".bundle_lock"] = DK_BUNDLE_LOCK; + DirectiveKindMap[".bundle_unlock"] = DK_BUNDLE_UNLOCK; + DirectiveKindMap[".if"] = DK_IF; + DirectiveKindMap[".ifeq"] = DK_IFEQ; + DirectiveKindMap[".ifge"] = DK_IFGE; + DirectiveKindMap[".ifgt"] = DK_IFGT; + DirectiveKindMap[".ifle"] = DK_IFLE; + DirectiveKindMap[".iflt"] = DK_IFLT; + DirectiveKindMap[".ifne"] = DK_IFNE; + DirectiveKindMap[".ifb"] = DK_IFB; + DirectiveKindMap[".ifnb"] = DK_IFNB; + DirectiveKindMap[".ifc"] = DK_IFC; + DirectiveKindMap[".ifeqs"] = DK_IFEQS; + DirectiveKindMap[".ifnc"] = DK_IFNC; + DirectiveKindMap[".ifnes"] = DK_IFNES; + DirectiveKindMap[".ifdef"] = DK_IFDEF; + DirectiveKindMap[".ifndef"] = DK_IFNDEF; + DirectiveKindMap[".ifnotdef"] = DK_IFNOTDEF; + DirectiveKindMap[".elseif"] = DK_ELSEIF; + DirectiveKindMap[".else"] = DK_ELSE; + DirectiveKindMap[".end"] = DK_END; + DirectiveKindMap[".endif"] = DK_ENDIF; + DirectiveKindMap[".skip"] = DK_SKIP; + DirectiveKindMap[".space"] = DK_SPACE; + DirectiveKindMap[".file"] = DK_FILE; + DirectiveKindMap[".line"] = DK_LINE; + DirectiveKindMap[".loc"] = DK_LOC; + DirectiveKindMap[".stabs"] = DK_STABS; + DirectiveKindMap[".cv_file"] = DK_CV_FILE; + DirectiveKindMap[".cv_loc"] = DK_CV_LOC; + DirectiveKindMap[".cv_linetable"] = DK_CV_LINETABLE; + DirectiveKindMap[".cv_inline_linetable"] = DK_CV_INLINE_LINETABLE; + DirectiveKindMap[".cv_stringtable"] = DK_CV_STRINGTABLE; + DirectiveKindMap[".cv_filechecksums"] = DK_CV_FILECHECKSUMS; + DirectiveKindMap[".sleb128"] = DK_SLEB128; + DirectiveKindMap[".uleb128"] = DK_ULEB128; + DirectiveKindMap[".cfi_sections"] = DK_CFI_SECTIONS; + DirectiveKindMap[".cfi_startproc"] = DK_CFI_STARTPROC; + DirectiveKindMap[".cfi_endproc"] = DK_CFI_ENDPROC; + DirectiveKindMap[".cfi_def_cfa"] = DK_CFI_DEF_CFA; + DirectiveKindMap[".cfi_def_cfa_offset"] = DK_CFI_DEF_CFA_OFFSET; + DirectiveKindMap[".cfi_adjust_cfa_offset"] = DK_CFI_ADJUST_CFA_OFFSET; + DirectiveKindMap[".cfi_def_cfa_register"] = DK_CFI_DEF_CFA_REGISTER; + DirectiveKindMap[".cfi_offset"] = DK_CFI_OFFSET; + DirectiveKindMap[".cfi_rel_offset"] = DK_CFI_REL_OFFSET; + DirectiveKindMap[".cfi_personality"] = DK_CFI_PERSONALITY; + DirectiveKindMap[".cfi_lsda"] = DK_CFI_LSDA; + DirectiveKindMap[".cfi_remember_state"] = DK_CFI_REMEMBER_STATE; + DirectiveKindMap[".cfi_restore_state"] = DK_CFI_RESTORE_STATE; + DirectiveKindMap[".cfi_same_value"] = DK_CFI_SAME_VALUE; + DirectiveKindMap[".cfi_restore"] = DK_CFI_RESTORE; + DirectiveKindMap[".cfi_escape"] = DK_CFI_ESCAPE; + DirectiveKindMap[".cfi_signal_frame"] = DK_CFI_SIGNAL_FRAME; + DirectiveKindMap[".cfi_undefined"] = DK_CFI_UNDEFINED; + DirectiveKindMap[".cfi_register"] = DK_CFI_REGISTER; + DirectiveKindMap[".cfi_window_save"] = DK_CFI_WINDOW_SAVE; + DirectiveKindMap[".macros_on"] = DK_MACROS_ON; + DirectiveKindMap[".macros_off"] = DK_MACROS_OFF; + DirectiveKindMap[".macro"] = DK_MACRO; + DirectiveKindMap[".exitm"] = DK_EXITM; + DirectiveKindMap[".endm"] = DK_ENDM; + DirectiveKindMap[".endmacro"] = DK_ENDMACRO; + DirectiveKindMap[".purgem"] = DK_PURGEM; + DirectiveKindMap[".err"] = DK_ERR; + DirectiveKindMap[".error"] = DK_ERROR; + DirectiveKindMap[".warning"] = DK_WARNING; + DirectiveKindMap[".reloc"] = DK_RELOC; + } +} + +MCAsmMacro *AsmParser::parseMacroLikeBody(SMLoc DirectiveLoc) { + AsmToken EndToken, StartToken = getTok(); + + unsigned NestLevel = 0; + for (;;) { + // Check whether we have reached the end of the file. + if (getLexer().is(AsmToken::Eof)) { + //Error(DirectiveLoc, "no matching '.endr' in definition"); + return nullptr; + } + + if (Lexer.is(AsmToken::Identifier) && + (getTok().getIdentifier() == ".rept")) { + ++NestLevel; + } + + // Otherwise, check whether we have reached the .endr. + if (Lexer.is(AsmToken::Identifier) && getTok().getIdentifier() == ".endr") { + if (NestLevel == 0) { + EndToken = getTok(); + Lex(); + if (Lexer.isNot(AsmToken::EndOfStatement)) { + //TokError("unexpected token in '.endr' directive"); + return nullptr; + } + break; + } + --NestLevel; + } + + // Otherwise, scan till the end of the statement. + eatToEndOfStatement(); + } + + const char *BodyStart = StartToken.getLoc().getPointer(); + const char *BodyEnd = EndToken.getLoc().getPointer(); + StringRef Body = StringRef(BodyStart, BodyEnd - BodyStart); + + // We Are Anonymous. + MacroLikeBodies.emplace_back(StringRef(), Body, MCAsmMacroParameters()); + return &MacroLikeBodies.back(); +} + +void AsmParser::instantiateMacroLikeBody(MCAsmMacro *M, SMLoc DirectiveLoc, + raw_svector_ostream &OS) { + OS << ".endr\n"; + + std::unique_ptr Instantiation = + MemoryBuffer::getMemBufferCopy(OS.str(), ""); + + // Create the macro instantiation object and add to the current macro + // instantiation stack. + MacroInstantiation *MI = new MacroInstantiation( + DirectiveLoc, CurBuffer, getTok().getLoc(), TheCondStack.size()); + ActiveMacros.push_back(MI); + + // Jump to the macro instantiation and prime the lexer. + CurBuffer = SrcMgr.AddNewSourceBuffer(std::move(Instantiation), SMLoc()); + Lexer.setBuffer(SrcMgr.getMemoryBuffer(CurBuffer)->getBuffer()); + Lex(); +} + +/// parseDirectiveRept +/// ::= .rep | .rept count +bool AsmParser::parseDirectiveRept(SMLoc DirectiveLoc, StringRef Dir) +{ + const MCExpr *CountExpr; + //SMLoc CountLoc = getTok().getLoc(); + if (parseExpression(CountExpr)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + int64_t Count; + if (!CountExpr->evaluateAsAbsolute(Count)) { + eatToEndOfStatement(); + //return Error(CountLoc, "unexpected token in '" + Dir + "' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (Count < 0) { + //return Error(CountLoc, "Count is negative"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (Lexer.isNot(AsmToken::EndOfStatement)) { + //return TokError("unexpected token in '" + Dir + "' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // Eat the end of statement. + Lex(); + + // Lex the rept definition. + MCAsmMacro *M = parseMacroLikeBody(DirectiveLoc); + if (!M) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // Macro instantiation is lexical, unfortunately. We construct a new buffer + // to hold the macro body with substitutions. + SmallString<256> Buf; + raw_svector_ostream OS(Buf); + while (Count--) { + // Note that the AtPseudoVariable is disabled for instantiations of .rep(t). + if (expandMacro(OS, M->Body, None, None, false, getTok().getLoc())) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + } + instantiateMacroLikeBody(M, DirectiveLoc, OS); + + return false; +} + +/// parseDirectiveIrp +/// ::= .irp symbol,values +bool AsmParser::parseDirectiveIrp(SMLoc DirectiveLoc) +{ + MCAsmMacroParameter Parameter; + + if (parseIdentifier(Parameter.Name)) { + //return TokError("expected identifier in '.irp' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (Lexer.isNot(AsmToken::Comma)) { + //return TokError("expected comma in '.irp' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + Lex(); + + MCAsmMacroArguments A; + if (parseMacroArguments(nullptr, A)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // Eat the end of statement. + Lex(); + + // Lex the irp definition. + MCAsmMacro *M = parseMacroLikeBody(DirectiveLoc); + if (!M) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // Macro instantiation is lexical, unfortunately. We construct a new buffer + // to hold the macro body with substitutions. + SmallString<256> Buf; + raw_svector_ostream OS(Buf); + + for (const MCAsmMacroArgument &Arg : A) { + // Note that the AtPseudoVariable is enabled for instantiations of .irp. + // This is undocumented, but GAS seems to support it. + if (expandMacro(OS, M->Body, Parameter, Arg, true, getTok().getLoc())) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + } + + instantiateMacroLikeBody(M, DirectiveLoc, OS); + + return false; +} + +/// parseDirectiveIrpc +/// ::= .irpc symbol,values +bool AsmParser::parseDirectiveIrpc(SMLoc DirectiveLoc) +{ + MCAsmMacroParameter Parameter; + + if (parseIdentifier(Parameter.Name)) { + //return TokError("expected identifier in '.irpc' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (Lexer.isNot(AsmToken::Comma)) { + //return TokError("expected comma in '.irpc' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + Lex(); + + MCAsmMacroArguments A; + if (parseMacroArguments(nullptr, A)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + if (A.size() != 1 || A.front().size() != 1) { + //return TokError("unexpected token in '.irpc' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // Eat the end of statement. + Lex(); + + // Lex the irpc definition. + MCAsmMacro *M = parseMacroLikeBody(DirectiveLoc); + if (!M) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // Macro instantiation is lexical, unfortunately. We construct a new buffer + // to hold the macro body with substitutions. + SmallString<256> Buf; + raw_svector_ostream OS(Buf); + + StringRef Values = A.front().front().getString(); + for (std::size_t I = 0, End = Values.size(); I != End; ++I) { + MCAsmMacroArgument Arg; + Arg.emplace_back(AsmToken::Identifier, Values.slice(I, I + 1)); + + // Note that the AtPseudoVariable is enabled for instantiations of .irpc. + // This is undocumented, but GAS seems to support it. + if (expandMacro(OS, M->Body, Parameter, Arg, true, getTok().getLoc())) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + } + + instantiateMacroLikeBody(M, DirectiveLoc, OS); + + return false; +} + +bool AsmParser::parseDirectiveEndr(SMLoc DirectiveLoc) +{ + if (ActiveMacros.empty()) { + //return TokError("unmatched '.endr' directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + // The only .repl that should get here are the ones created by + // instantiateMacroLikeBody. + assert(getLexer().is(AsmToken::EndOfStatement)); + + handleMacroExit(); + return false; +} + +bool AsmParser::parseDirectiveMSEmit(SMLoc IDLoc, ParseStatementInfo &Info, + size_t Len) +{ + const MCExpr *Value; + //SMLoc ExprLoc = getLexer().getLoc(); + if (parseExpression(Value)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + const MCConstantExpr *MCE = dyn_cast(Value); + if (!MCE) { + //return Error(ExprLoc, "unexpected expression in _emit"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + uint64_t IntValue = MCE->getValue(); + if (!isUInt<8>(IntValue) && !isInt<8>(IntValue)) { + //return Error(ExprLoc, "literal value out of range for directive"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + Info.AsmRewrites->emplace_back(AOK_Emit, IDLoc, Len); + return false; +} + +bool AsmParser::parseDirectiveMSAlign(SMLoc IDLoc, ParseStatementInfo &Info) +{ + const MCExpr *Value; + //SMLoc ExprLoc = getLexer().getLoc(); + if (parseExpression(Value)) { + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + const MCConstantExpr *MCE = dyn_cast(Value); + if (!MCE) { + //return Error(ExprLoc, "unexpected expression in align"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + uint64_t IntValue = MCE->getValue(); + if (!isPowerOf2_64(IntValue)) { + //return Error(ExprLoc, "literal value not a power of two greater then zero"); + KsError = KS_ERR_ASM_DIRECTIVE_INVALID; + return true; + } + + Info.AsmRewrites->emplace_back(AOK_Align, IDLoc, 5, Log2_64(IntValue)); + return false; +} + +// We are comparing pointers, but the pointers are relative to a single string. +// Thus, this should always be deterministic. +static int rewritesSort(const AsmRewrite *AsmRewriteA, + const AsmRewrite *AsmRewriteB) { + if (AsmRewriteA->Loc.getPointer() < AsmRewriteB->Loc.getPointer()) + return -1; + if (AsmRewriteB->Loc.getPointer() < AsmRewriteA->Loc.getPointer()) + return 1; + + // It's possible to have a SizeDirective, Imm/ImmPrefix and an Input/Output + // rewrite to the same location. Make sure the SizeDirective rewrite is + // performed first, then the Imm/ImmPrefix and finally the Input/Output. This + // ensures the sort algorithm is stable. + if (AsmRewritePrecedence[AsmRewriteA->Kind] > + AsmRewritePrecedence[AsmRewriteB->Kind]) + return -1; + + if (AsmRewritePrecedence[AsmRewriteA->Kind] < + AsmRewritePrecedence[AsmRewriteB->Kind]) + return 1; + llvm_unreachable("Unstable rewrite sort."); +} + +bool AsmParser::parseMSInlineAsm( + void *AsmLoc, std::string &AsmString, unsigned &NumOutputs, + unsigned &NumInputs, SmallVectorImpl > &OpDecls, + SmallVectorImpl &Constraints, + SmallVectorImpl &Clobbers, const MCInstrInfo *MII, + MCAsmParserSemaCallback &SI, uint64_t &Address) +{ + SmallVector InputDecls; + SmallVector OutputDecls; + SmallVector InputDeclsAddressOf; + SmallVector OutputDeclsAddressOf; + SmallVector InputConstraints; + SmallVector OutputConstraints; + SmallVector ClobberRegs; + + SmallVector AsmStrRewrites; + + // Prime the lexer. + Lex(); + + // While we have input, parse each statement. + unsigned InputIdx = 0; + unsigned OutputIdx = 0; + while (getLexer().isNot(AsmToken::Eof)) { + ParseStatementInfo Info(&AsmStrRewrites); + if (parseStatement(Info, &SI, Address)) + return true; + + if (Info.ParseError) + return true; + + if (Info.Opcode == ~0U) + continue; + + const MCInstrDesc &Desc = MII->get(Info.Opcode); + + // Build the list of clobbers, outputs and inputs. + for (unsigned i = 1, e = Info.ParsedOperands.size(); i != e; ++i) { + MCParsedAsmOperand &Operand = *Info.ParsedOperands[i]; + + // Immediate. + if (Operand.isImm()) + continue; + + // Register operand. + if (Operand.isReg() && !Operand.needAddressOf() && + !getTargetParser().OmitRegisterFromClobberLists(Operand.getReg())) { + unsigned NumDefs = Desc.getNumDefs(); + // Clobber. + if (NumDefs && Operand.getMCOperandNum() < NumDefs) + ClobberRegs.push_back(Operand.getReg()); + continue; + } + + // Expr/Input or Output. + StringRef SymName = Operand.getSymName(); + if (SymName.empty()) + continue; + + void *OpDecl = Operand.getOpDecl(); + if (!OpDecl) + continue; + + bool isOutput = (i == 1) && Desc.mayStore(); + SMLoc Start = SMLoc::getFromPointer(SymName.data()); + if (isOutput) { + ++InputIdx; + OutputDecls.push_back(OpDecl); + OutputDeclsAddressOf.push_back(Operand.needAddressOf()); + OutputConstraints.push_back(("=" + Operand.getConstraint()).str()); + AsmStrRewrites.emplace_back(AOK_Output, Start, SymName.size()); + } else { + InputDecls.push_back(OpDecl); + InputDeclsAddressOf.push_back(Operand.needAddressOf()); + InputConstraints.push_back(Operand.getConstraint().str()); + AsmStrRewrites.emplace_back(AOK_Input, Start, SymName.size()); + } + } + + // Consider implicit defs to be clobbers. Think of cpuid and push. + ArrayRef ImpDefs(Desc.getImplicitDefs(), + Desc.getNumImplicitDefs()); + ClobberRegs.insert(ClobberRegs.end(), ImpDefs.begin(), ImpDefs.end()); + } + + // Set the number of Outputs and Inputs. + NumOutputs = OutputDecls.size(); + NumInputs = InputDecls.size(); + + // Set the unique clobbers. + array_pod_sort(ClobberRegs.begin(), ClobberRegs.end()); + ClobberRegs.erase(std::unique(ClobberRegs.begin(), ClobberRegs.end()), + ClobberRegs.end()); + Clobbers.assign(ClobberRegs.size(), std::string()); + for (unsigned I = 0, E = ClobberRegs.size(); I != E; ++I) { + raw_string_ostream OS(Clobbers[I]); + //IP->printRegName(OS, ClobberRegs[I]); + } + + // Merge the various outputs and inputs. Output are expected first. + if (NumOutputs || NumInputs) { + unsigned NumExprs = NumOutputs + NumInputs; + OpDecls.resize(NumExprs); + Constraints.resize(NumExprs); + for (unsigned i = 0; i < NumOutputs; ++i) { + OpDecls[i] = std::make_pair(OutputDecls[i], OutputDeclsAddressOf[i]); + Constraints[i] = OutputConstraints[i]; + } + for (unsigned i = 0, j = NumOutputs; i < NumInputs; ++i, ++j) { + OpDecls[j] = std::make_pair(InputDecls[i], InputDeclsAddressOf[i]); + Constraints[j] = InputConstraints[i]; + } + } + + // Build the IR assembly string. + std::string AsmStringIR; + raw_string_ostream OS(AsmStringIR); + StringRef ASMString = + SrcMgr.getMemoryBuffer(SrcMgr.getMainFileID())->getBuffer(); + const char *AsmStart = ASMString.begin(); + const char *AsmEnd = ASMString.end(); + array_pod_sort(AsmStrRewrites.begin(), AsmStrRewrites.end(), rewritesSort); + for (const AsmRewrite &AR : AsmStrRewrites) { + AsmRewriteKind Kind = AR.Kind; + if (Kind == AOK_Delete) + continue; + + const char *Loc = AR.Loc.getPointer(); + assert(Loc >= AsmStart && "Expected Loc to be at or after Start!"); + + // Emit everything up to the immediate/expression. + if (unsigned Len = Loc - AsmStart) + OS << StringRef(AsmStart, Len); + + // Skip the original expression. + if (Kind == AOK_Skip) { + AsmStart = Loc + AR.Len; + continue; + } + + unsigned AdditionalSkip = 0; + // Rewrite expressions in $N notation. + switch (Kind) { + default: + break; + case AOK_Imm: + OS << "$$" << AR.Val; + break; + case AOK_ImmPrefix: + OS << "$$"; + break; + case AOK_Label: + OS << Ctx.getAsmInfo()->getPrivateLabelPrefix() << AR.Label; + break; + case AOK_Input: + OS << '$' << InputIdx++; + break; + case AOK_Output: + OS << '$' << OutputIdx++; + break; + case AOK_SizeDirective: + switch (AR.Val) { + default: break; + case 8: OS << "byte ptr "; break; + case 16: OS << "word ptr "; break; + case 32: OS << "dword ptr "; break; + case 64: OS << "qword ptr "; break; + case 80: OS << "xword ptr "; break; + case 128: OS << "xmmword ptr "; break; + case 256: OS << "ymmword ptr "; break; + } + break; + case AOK_Emit: + OS << ".byte"; + break; + case AOK_Align: { + // MS alignment directives are measured in bytes. If the native assembler + // measures alignment in bytes, we can pass it straight through. + OS << ".align"; + if (getContext().getAsmInfo()->getAlignmentIsInBytes()) + break; + + // Alignment is in log2 form, so print that instead and skip the original + // immediate. + unsigned Val = AR.Val; + OS << ' ' << Val; + assert(Val < 10 && "Expected alignment less then 2^10."); + AdditionalSkip = (Val < 4) ? 2 : Val < 7 ? 3 : 4; + break; + } + case AOK_EVEN: + OS << ".even"; + break; + case AOK_DotOperator: + // Insert the dot if the user omitted it. + OS.flush(); + if (AsmStringIR.back() != '.') + OS << '.'; + OS << AR.Val; + break; + } + + // Skip the original expression. + AsmStart = Loc + AR.Len + AdditionalSkip; + } + + // Emit the remainder of the asm string. + if (AsmStart != AsmEnd) + OS << StringRef(AsmStart, AsmEnd - AsmStart); + + AsmString = OS.str(); + return false; +} + +namespace llvm_ks { +namespace MCParserUtils { + +/// Returns whether the given symbol is used anywhere in the given expression, +/// or subexpressions. +static bool isSymbolUsedInExpression(const MCSymbol *Sym, const MCExpr *Value) { + switch (Value->getKind()) { + case MCExpr::Binary: { + const MCBinaryExpr *BE = static_cast(Value); + return isSymbolUsedInExpression(Sym, BE->getLHS()) || + isSymbolUsedInExpression(Sym, BE->getRHS()); + } + case MCExpr::Target: + case MCExpr::Constant: + return false; + case MCExpr::SymbolRef: { + const MCSymbol &S = + static_cast(Value)->getSymbol(); + if (S.isVariable()) + return isSymbolUsedInExpression(Sym, S.getVariableValue()); + return &S == Sym; + } + case MCExpr::Unary: + return isSymbolUsedInExpression( + Sym, static_cast(Value)->getSubExpr()); + } + + llvm_unreachable("Unknown expr kind!"); +} + +bool parseAssignmentExpression(StringRef Name, bool allow_redef, + MCAsmParser &Parser, MCSymbol *&Sym, + const MCExpr *&Value) +{ + MCAsmLexer &Lexer = Parser.getLexer(); + + // FIXME: Use better location, we should use proper tokens. + //SMLoc EqualLoc = Lexer.getLoc(); + + if (Parser.parseExpression(Value)) { + //Parser.TokError("missing expression"); + Parser.eatToEndOfStatement(); + return true; + } + + // Note: we don't count b as used in "a = b". This is to allow + // a = b + // b = c + + if (Lexer.isNot(AsmToken::EndOfStatement)) + //return Parser.TokError("unexpected token in assignment"); + return true; + + // Eat the end of statement marker. + Parser.Lex(); + + // Validate that the LHS is allowed to be a variable (either it has not been + // used as a symbol, or it is an absolute symbol). + Sym = Parser.getContext().lookupSymbol(Name); + if (Sym) { + // Diagnose assignment to a label. + // + // FIXME: Diagnostics. Note the location of the definition as a label. + // FIXME: Diagnose assignment to protected identifier (e.g., register name). + if (isSymbolUsedInExpression(Sym, Value)) + //return Parser.Error(EqualLoc, "Recursive use of '" + Name + "'"); + return true; + else if (Sym->isUndefined(/*SetUsed*/ false) && !Sym->isUsed() && + !Sym->isVariable()) + ; // Allow redefinitions of undefined symbols only used in directives. + else if (Sym->isVariable() && !Sym->isUsed() && allow_redef) + ; // Allow redefinitions of variables that haven't yet been used. + else if (!Sym->isUndefined() && (!Sym->isVariable() || !allow_redef)) + //return Parser.Error(EqualLoc, "redefinition of '" + Name + "'"); + return true; + else if (!Sym->isVariable()) + //return Parser.Error(EqualLoc, "invalid assignment to '" + Name + "'"); + return true; + else if (!isa(Sym->getVariableValue())) + //return Parser.Error(EqualLoc, + // "invalid reassignment of non-absolute variable '" + + // Name + "'"); + return true; + } else if (Name == ".") { + Parser.getStreamer().emitValueToOffset(Value, 0); + return false; + } else { + if (Name.empty()) { + return true; + } + Sym = Parser.getContext().getOrCreateSymbol(Name); + } + + Sym->setRedefinable(allow_redef); + + return false; +} + +} // namespace MCParserUtils +} // namespace llvm_ks + +/// \brief Create an MCAsmParser instance. +MCAsmParser *llvm_ks::createMCAsmParser(SourceMgr &SM, MCContext &C, + MCStreamer &Out, const MCAsmInfo &MAI) { + return new AsmParser(SM, C, Out, MAI); +} diff --git a/llvm/lib/MC/MCParser/CMakeLists.txt b/llvm/lib/MC/MCParser/CMakeLists.txt new file mode 100644 index 0000000..99fdd01 --- /dev/null +++ b/llvm/lib/MC/MCParser/CMakeLists.txt @@ -0,0 +1,14 @@ +add_llvm_library(LLVMMCParser + AsmLexer.cpp + AsmParser.cpp + COFFAsmParser.cpp + DarwinAsmParser.cpp + ELFAsmParser.cpp + MCAsmLexer.cpp + MCAsmParser.cpp + MCAsmParserExtension.cpp + MCTargetAsmParser.cpp + + ADDITIONAL_HEADER_DIRS + ${LLVM_MAIN_INCLUDE_DIR}/llvm/MC/MCParser + ) diff --git a/llvm/lib/MC/MCParser/COFFAsmParser.cpp b/llvm/lib/MC/MCParser/COFFAsmParser.cpp new file mode 100644 index 0000000..df2e50a --- /dev/null +++ b/llvm/lib/MC/MCParser/COFFAsmParser.cpp @@ -0,0 +1,802 @@ +//===- COFFAsmParser.cpp - COFF Assembly Parser ---------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCParser/MCAsmParserExtension.h" +#include "llvm/ADT/StringSwitch.h" +#include "llvm/ADT/Twine.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCObjectFileInfo.h" +#include "llvm/MC/MCParser/MCAsmLexer.h" +#include "llvm/MC/MCParser/MCTargetAsmParser.h" +#include "llvm/MC/MCRegisterInfo.h" +#include "llvm/MC/MCSectionCOFF.h" +#include "llvm/MC/MCStreamer.h" +#include "llvm/Support/COFF.h" +using namespace llvm_ks; + +namespace { + +class COFFAsmParser : public MCAsmParserExtension { + template + void addDirectiveHandler(StringRef Directive) { + MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( + this, HandleDirective); + getParser().addDirectiveHandler(Directive, Handler); + } + + bool ParseSectionSwitch(StringRef Section, + unsigned Characteristics, + SectionKind Kind); + + bool ParseSectionSwitch(StringRef Section, unsigned Characteristics, + SectionKind Kind, StringRef COMDATSymName, + COFF::COMDATType Type); + + bool ParseSectionName(StringRef &SectionName); + bool ParseSectionFlags(StringRef FlagsString, unsigned* Flags); + + void Initialize(MCAsmParser &Parser) override { + // Call the base implementation. + MCAsmParserExtension::Initialize(Parser); + + addDirectiveHandler<&COFFAsmParser::ParseSectionDirectiveText>(".text"); + addDirectiveHandler<&COFFAsmParser::ParseSectionDirectiveData>(".data"); + addDirectiveHandler<&COFFAsmParser::ParseSectionDirectiveBSS>(".bss"); + addDirectiveHandler<&COFFAsmParser::ParseDirectiveSection>(".section"); + addDirectiveHandler<&COFFAsmParser::ParseDirectiveDef>(".def"); + addDirectiveHandler<&COFFAsmParser::ParseDirectiveScl>(".scl"); + addDirectiveHandler<&COFFAsmParser::ParseDirectiveType>(".type"); + addDirectiveHandler<&COFFAsmParser::ParseDirectiveEndef>(".endef"); + addDirectiveHandler<&COFFAsmParser::ParseDirectiveSecRel32>(".secrel32"); + addDirectiveHandler<&COFFAsmParser::ParseDirectiveSecIdx>(".secidx"); + addDirectiveHandler<&COFFAsmParser::ParseDirectiveSafeSEH>(".safeseh"); + addDirectiveHandler<&COFFAsmParser::ParseDirectiveLinkOnce>(".linkonce"); + + // Win64 EH directives. + addDirectiveHandler<&COFFAsmParser::ParseSEHDirectiveStartProc>( + ".seh_proc"); + addDirectiveHandler<&COFFAsmParser::ParseSEHDirectiveEndProc>( + ".seh_endproc"); + addDirectiveHandler<&COFFAsmParser::ParseSEHDirectiveStartChained>( + ".seh_startchained"); + addDirectiveHandler<&COFFAsmParser::ParseSEHDirectiveEndChained>( + ".seh_endchained"); + addDirectiveHandler<&COFFAsmParser::ParseSEHDirectiveHandler>( + ".seh_handler"); + addDirectiveHandler<&COFFAsmParser::ParseSEHDirectiveHandlerData>( + ".seh_handlerdata"); + addDirectiveHandler<&COFFAsmParser::ParseSEHDirectivePushReg>( + ".seh_pushreg"); + addDirectiveHandler<&COFFAsmParser::ParseSEHDirectiveSetFrame>( + ".seh_setframe"); + addDirectiveHandler<&COFFAsmParser::ParseSEHDirectiveAllocStack>( + ".seh_stackalloc"); + addDirectiveHandler<&COFFAsmParser::ParseSEHDirectiveSaveReg>( + ".seh_savereg"); + addDirectiveHandler<&COFFAsmParser::ParseSEHDirectiveSaveXMM>( + ".seh_savexmm"); + addDirectiveHandler<&COFFAsmParser::ParseSEHDirectivePushFrame>( + ".seh_pushframe"); + addDirectiveHandler<&COFFAsmParser::ParseSEHDirectiveEndProlog>( + ".seh_endprologue"); + addDirectiveHandler<&COFFAsmParser::ParseDirectiveSymbolAttribute>(".weak"); + } + + bool ParseSectionDirectiveText(StringRef, SMLoc) { + return ParseSectionSwitch(".text", + COFF::IMAGE_SCN_CNT_CODE + | COFF::IMAGE_SCN_MEM_EXECUTE + | COFF::IMAGE_SCN_MEM_READ, + SectionKind::getText()); + } + bool ParseSectionDirectiveData(StringRef, SMLoc) { + return ParseSectionSwitch(".data", COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ | + COFF::IMAGE_SCN_MEM_WRITE, + SectionKind::getData()); + } + bool ParseSectionDirectiveBSS(StringRef, SMLoc) { + return ParseSectionSwitch(".bss", + COFF::IMAGE_SCN_CNT_UNINITIALIZED_DATA + | COFF::IMAGE_SCN_MEM_READ + | COFF::IMAGE_SCN_MEM_WRITE, + SectionKind::getBSS()); + } + + bool ParseDirectiveSection(StringRef, SMLoc); + bool ParseDirectiveDef(StringRef, SMLoc); + bool ParseDirectiveScl(StringRef, SMLoc); + bool ParseDirectiveType(StringRef, SMLoc); + bool ParseDirectiveEndef(StringRef, SMLoc); + bool ParseDirectiveSecRel32(StringRef, SMLoc); + bool ParseDirectiveSecIdx(StringRef, SMLoc); + bool ParseDirectiveSafeSEH(StringRef, SMLoc); + bool parseCOMDATType(COFF::COMDATType &Type); + bool ParseDirectiveLinkOnce(StringRef, SMLoc); + + // Win64 EH directives. + bool ParseSEHDirectiveStartProc(StringRef, SMLoc); + bool ParseSEHDirectiveEndProc(StringRef, SMLoc); + bool ParseSEHDirectiveStartChained(StringRef, SMLoc); + bool ParseSEHDirectiveEndChained(StringRef, SMLoc); + bool ParseSEHDirectiveHandler(StringRef, SMLoc); + bool ParseSEHDirectiveHandlerData(StringRef, SMLoc); + bool ParseSEHDirectivePushReg(StringRef, SMLoc); + bool ParseSEHDirectiveSetFrame(StringRef, SMLoc); + bool ParseSEHDirectiveAllocStack(StringRef, SMLoc); + bool ParseSEHDirectiveSaveReg(StringRef, SMLoc); + bool ParseSEHDirectiveSaveXMM(StringRef, SMLoc); + bool ParseSEHDirectivePushFrame(StringRef, SMLoc); + bool ParseSEHDirectiveEndProlog(StringRef, SMLoc); + + bool ParseAtUnwindOrAtExcept(bool &unwind, bool &except); + bool ParseSEHRegisterNumber(unsigned &RegNo); + bool ParseDirectiveSymbolAttribute(StringRef Directive, SMLoc); +public: + COFFAsmParser() {} +}; + +} // end annonomous namespace. + +static SectionKind computeSectionKind(unsigned Flags) { + if (Flags & COFF::IMAGE_SCN_MEM_EXECUTE) + return SectionKind::getText(); + if (Flags & COFF::IMAGE_SCN_MEM_READ && + (Flags & COFF::IMAGE_SCN_MEM_WRITE) == 0) + return SectionKind::getReadOnly(); + return SectionKind::getData(); +} + +bool COFFAsmParser::ParseSectionFlags(StringRef FlagsString, unsigned* Flags) { + enum { + None = 0, + Alloc = 1 << 0, + Code = 1 << 1, + Load = 1 << 2, + InitData = 1 << 3, + Shared = 1 << 4, + NoLoad = 1 << 5, + NoRead = 1 << 6, + NoWrite = 1 << 7 + }; + + bool ReadOnlyRemoved = false; + unsigned SecFlags = None; + + for (char FlagChar : FlagsString) { + switch (FlagChar) { + case 'a': + // Ignored. + break; + + case 'b': // bss section + SecFlags |= Alloc; + if (SecFlags & InitData) + return TokError("conflicting section flags 'b' and 'd'."); + SecFlags &= ~Load; + break; + + case 'd': // data section + SecFlags |= InitData; + if (SecFlags & Alloc) + return TokError("conflicting section flags 'b' and 'd'."); + SecFlags &= ~NoWrite; + if ((SecFlags & NoLoad) == 0) + SecFlags |= Load; + break; + + case 'n': // section is not loaded + SecFlags |= NoLoad; + SecFlags &= ~Load; + break; + + case 'r': // read-only + ReadOnlyRemoved = false; + SecFlags |= NoWrite; + if ((SecFlags & Code) == 0) + SecFlags |= InitData; + if ((SecFlags & NoLoad) == 0) + SecFlags |= Load; + break; + + case 's': // shared section + SecFlags |= Shared | InitData; + SecFlags &= ~NoWrite; + if ((SecFlags & NoLoad) == 0) + SecFlags |= Load; + break; + + case 'w': // writable + SecFlags &= ~NoWrite; + ReadOnlyRemoved = true; + break; + + case 'x': // executable section + SecFlags |= Code; + if ((SecFlags & NoLoad) == 0) + SecFlags |= Load; + if (!ReadOnlyRemoved) + SecFlags |= NoWrite; + break; + + case 'y': // not readable + SecFlags |= NoRead | NoWrite; + break; + + default: + return TokError("unknown flag"); + } + } + + *Flags = 0; + + if (SecFlags == None) + SecFlags = InitData; + + if (SecFlags & Code) + *Flags |= COFF::IMAGE_SCN_CNT_CODE | COFF::IMAGE_SCN_MEM_EXECUTE; + if (SecFlags & InitData) + *Flags |= COFF::IMAGE_SCN_CNT_INITIALIZED_DATA; + if ((SecFlags & Alloc) && (SecFlags & Load) == 0) + *Flags |= COFF::IMAGE_SCN_CNT_UNINITIALIZED_DATA; + if (SecFlags & NoLoad) + *Flags |= COFF::IMAGE_SCN_LNK_REMOVE; + if ((SecFlags & NoRead) == 0) + *Flags |= COFF::IMAGE_SCN_MEM_READ; + if ((SecFlags & NoWrite) == 0) + *Flags |= COFF::IMAGE_SCN_MEM_WRITE; + if (SecFlags & Shared) + *Flags |= COFF::IMAGE_SCN_MEM_SHARED; + + return false; +} + +/// ParseDirectiveSymbolAttribute +/// ::= { ".weak", ... } [ identifier ( , identifier )* ] +bool COFFAsmParser::ParseDirectiveSymbolAttribute(StringRef Directive, SMLoc) { + MCSymbolAttr Attr = StringSwitch(Directive) + .Case(".weak", MCSA_Weak) + .Default(MCSA_Invalid); + assert(Attr != MCSA_Invalid && "unexpected symbol attribute directive!"); + if (getLexer().isNot(AsmToken::EndOfStatement)) { + for (;;) { + StringRef Name; + + if (getParser().parseIdentifier(Name)) + return TokError("expected identifier in directive"); + + MCSymbol *Sym = getContext().getOrCreateSymbol(Name); + + getStreamer().EmitSymbolAttribute(Sym, Attr); + + if (getLexer().is(AsmToken::EndOfStatement)) + break; + + if (getLexer().isNot(AsmToken::Comma)) + return TokError("unexpected token in directive"); + Lex(); + } + } + + Lex(); + return false; +} + +bool COFFAsmParser::ParseSectionSwitch(StringRef Section, + unsigned Characteristics, + SectionKind Kind) { + return ParseSectionSwitch(Section, Characteristics, Kind, "", (COFF::COMDATType)0); +} + +bool COFFAsmParser::ParseSectionSwitch(StringRef Section, + unsigned Characteristics, + SectionKind Kind, + StringRef COMDATSymName, + COFF::COMDATType Type) { + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in section switching directive"); + Lex(); + + getStreamer().SwitchSection(getContext().getCOFFSection( + Section, Characteristics, Kind, COMDATSymName, Type)); + + return false; +} + +bool COFFAsmParser::ParseSectionName(StringRef &SectionName) { + if (!getLexer().is(AsmToken::Identifier)) + return true; + + SectionName = getTok().getIdentifier(); + Lex(); + return false; +} + +// .section name [, "flags"] [, identifier [ identifier ], identifier] +// +// Supported flags: +// a: Ignored. +// b: BSS section (uninitialized data) +// d: data section (initialized data) +// n: Discardable section +// r: Readable section +// s: Shared section +// w: Writable section +// x: Executable section +// y: Not-readable section (clears 'r') +// +// Subsections are not supported. +bool COFFAsmParser::ParseDirectiveSection(StringRef, SMLoc) +{ + StringRef SectionName; + + if (ParseSectionName(SectionName)) + return TokError("expected identifier in directive"); + + unsigned Flags = COFF::IMAGE_SCN_CNT_INITIALIZED_DATA | + COFF::IMAGE_SCN_MEM_READ | + COFF::IMAGE_SCN_MEM_WRITE; + + if (getLexer().is(AsmToken::Comma)) { + Lex(); + + if (getLexer().isNot(AsmToken::String)) + return TokError("expected string in directive"); + + bool valid; + StringRef FlagsStr = getTok().getStringContents(valid); + if (!valid) + return true; + + Lex(); + + if (ParseSectionFlags(FlagsStr, &Flags)) + return true; + } + + COFF::COMDATType Type = (COFF::COMDATType)0; + StringRef COMDATSymName; + if (getLexer().is(AsmToken::Comma)) { + Type = COFF::IMAGE_COMDAT_SELECT_ANY; + Lex(); + + Flags |= COFF::IMAGE_SCN_LNK_COMDAT; + + if (!getLexer().is(AsmToken::Identifier)) + return TokError("expected comdat type such as 'discard' or 'largest' " + "after protection bits"); + + if (parseCOMDATType(Type)) + return true; + + if (getLexer().isNot(AsmToken::Comma)) + return TokError("expected comma in directive"); + Lex(); + + if (getParser().parseIdentifier(COMDATSymName)) + return TokError("expected identifier in directive"); + } + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in directive"); + + SectionKind Kind = computeSectionKind(Flags); + if (Kind.isText()) { + const Triple &T = getContext().getObjectFileInfo()->getTargetTriple(); + if (T.getArch() == Triple::arm || T.getArch() == Triple::thumb) + Flags |= COFF::IMAGE_SCN_MEM_16BIT; + } + ParseSectionSwitch(SectionName, Flags, Kind, COMDATSymName, Type); + return false; +} + +bool COFFAsmParser::ParseDirectiveDef(StringRef, SMLoc) { + StringRef SymbolName; + + if (getParser().parseIdentifier(SymbolName)) + return TokError("expected identifier in directive"); + + MCSymbol *Sym = getContext().getOrCreateSymbol(SymbolName); + + getStreamer().BeginCOFFSymbolDef(Sym); + + Lex(); + return false; +} + +bool COFFAsmParser::ParseDirectiveScl(StringRef, SMLoc) { + int64_t SymbolStorageClass; + if (getParser().parseAbsoluteExpression(SymbolStorageClass)) + return true; + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in directive"); + + Lex(); + getStreamer().EmitCOFFSymbolStorageClass(SymbolStorageClass); + return false; +} + +bool COFFAsmParser::ParseDirectiveType(StringRef, SMLoc) { + int64_t Type; + if (getParser().parseAbsoluteExpression(Type)) + return true; + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in directive"); + + Lex(); + getStreamer().EmitCOFFSymbolType(Type); + return false; +} + +bool COFFAsmParser::ParseDirectiveEndef(StringRef, SMLoc) { + Lex(); + getStreamer().EndCOFFSymbolDef(); + return false; +} + +bool COFFAsmParser::ParseDirectiveSecRel32(StringRef, SMLoc) { + StringRef SymbolID; + if (getParser().parseIdentifier(SymbolID)) + return TokError("expected identifier in directive"); + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in directive"); + + MCSymbol *Symbol = getContext().getOrCreateSymbol(SymbolID); + + Lex(); + getStreamer().EmitCOFFSecRel32(Symbol); + return false; +} + +bool COFFAsmParser::ParseDirectiveSafeSEH(StringRef, SMLoc) { + StringRef SymbolID; + if (getParser().parseIdentifier(SymbolID)) + return TokError("expected identifier in directive"); + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in directive"); + + MCSymbol *Symbol = getContext().getOrCreateSymbol(SymbolID); + + Lex(); + getStreamer().EmitCOFFSafeSEH(Symbol); + return false; +} + +bool COFFAsmParser::ParseDirectiveSecIdx(StringRef, SMLoc) { + StringRef SymbolID; + if (getParser().parseIdentifier(SymbolID)) + return TokError("expected identifier in directive"); + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in directive"); + + MCSymbol *Symbol = getContext().getOrCreateSymbol(SymbolID); + + Lex(); + getStreamer().EmitCOFFSectionIndex(Symbol); + return false; +} + +/// ::= [ identifier ] +bool COFFAsmParser::parseCOMDATType(COFF::COMDATType &Type) { + StringRef TypeId = getTok().getIdentifier(); + + Type = StringSwitch(TypeId) + .Case("one_only", COFF::IMAGE_COMDAT_SELECT_NODUPLICATES) + .Case("discard", COFF::IMAGE_COMDAT_SELECT_ANY) + .Case("same_size", COFF::IMAGE_COMDAT_SELECT_SAME_SIZE) + .Case("same_contents", COFF::IMAGE_COMDAT_SELECT_EXACT_MATCH) + .Case("associative", COFF::IMAGE_COMDAT_SELECT_ASSOCIATIVE) + .Case("largest", COFF::IMAGE_COMDAT_SELECT_LARGEST) + .Case("newest", COFF::IMAGE_COMDAT_SELECT_NEWEST) + .Default((COFF::COMDATType)0); + + if (Type == 0) + return TokError(Twine("unrecognized COMDAT type '" + TypeId + "'")); + + Lex(); + + return false; +} + +/// ParseDirectiveLinkOnce +/// ::= .linkonce [ identifier ] +bool COFFAsmParser::ParseDirectiveLinkOnce(StringRef, SMLoc Loc) { + COFF::COMDATType Type = COFF::IMAGE_COMDAT_SELECT_ANY; + if (getLexer().is(AsmToken::Identifier)) + if (parseCOMDATType(Type)) + return true; + + const MCSectionCOFF *Current = static_cast( + getStreamer().getCurrentSection().first); + + if (Type == COFF::IMAGE_COMDAT_SELECT_ASSOCIATIVE) + return Error(Loc, "cannot make section associative with .linkonce"); + + if (Current->getCharacteristics() & COFF::IMAGE_SCN_LNK_COMDAT) + return Error(Loc, Twine("section '") + Current->getSectionName() + + "' is already linkonce"); + + Current->setSelection(Type); + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in directive"); + + return false; +} + +bool COFFAsmParser::ParseSEHDirectiveStartProc(StringRef, SMLoc) { + StringRef SymbolID; + if (getParser().parseIdentifier(SymbolID)) + return true; + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in directive"); + + MCSymbol *Symbol = getContext().getOrCreateSymbol(SymbolID); + + Lex(); + getStreamer().EmitWinCFIStartProc(Symbol); + return false; +} + +bool COFFAsmParser::ParseSEHDirectiveEndProc(StringRef, SMLoc) { + Lex(); + getStreamer().EmitWinCFIEndProc(); + return false; +} + +bool COFFAsmParser::ParseSEHDirectiveStartChained(StringRef, SMLoc) { + Lex(); + getStreamer().EmitWinCFIStartChained(); + return false; +} + +bool COFFAsmParser::ParseSEHDirectiveEndChained(StringRef, SMLoc) { + Lex(); + getStreamer().EmitWinCFIEndChained(); + return false; +} + +bool COFFAsmParser::ParseSEHDirectiveHandler(StringRef, SMLoc) { + StringRef SymbolID; + if (getParser().parseIdentifier(SymbolID)) + return true; + + if (getLexer().isNot(AsmToken::Comma)) + return TokError("you must specify one or both of @unwind or @except"); + Lex(); + bool unwind = false, except = false; + if (ParseAtUnwindOrAtExcept(unwind, except)) + return true; + if (getLexer().is(AsmToken::Comma)) { + Lex(); + if (ParseAtUnwindOrAtExcept(unwind, except)) + return true; + } + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in directive"); + + MCSymbol *handler = getContext().getOrCreateSymbol(SymbolID); + + Lex(); + getStreamer().EmitWinEHHandler(handler, unwind, except); + return false; +} + +bool COFFAsmParser::ParseSEHDirectiveHandlerData(StringRef, SMLoc) { + Lex(); + getStreamer().EmitWinEHHandlerData(); + return false; +} + +bool COFFAsmParser::ParseSEHDirectivePushReg(StringRef, SMLoc L) { + unsigned Reg = 0; + if (ParseSEHRegisterNumber(Reg)) + return true; + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in directive"); + + Lex(); + getStreamer().EmitWinCFIPushReg(Reg); + return false; +} + +bool COFFAsmParser::ParseSEHDirectiveSetFrame(StringRef, SMLoc L) { + unsigned Reg = 0; + int64_t Off; + if (ParseSEHRegisterNumber(Reg)) + return true; + if (getLexer().isNot(AsmToken::Comma)) + return TokError("you must specify a stack pointer offset"); + + Lex(); + SMLoc startLoc = getLexer().getLoc(); + if (getParser().parseAbsoluteExpression(Off)) + return true; + + if (Off & 0x0F) + return Error(startLoc, "offset is not a multiple of 16"); + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in directive"); + + Lex(); + getStreamer().EmitWinCFISetFrame(Reg, Off); + return false; +} + +bool COFFAsmParser::ParseSEHDirectiveAllocStack(StringRef, SMLoc) { + int64_t Size; + SMLoc startLoc = getLexer().getLoc(); + if (getParser().parseAbsoluteExpression(Size)) + return true; + + if (Size & 7) + return Error(startLoc, "size is not a multiple of 8"); + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in directive"); + + Lex(); + getStreamer().EmitWinCFIAllocStack(Size); + return false; +} + +bool COFFAsmParser::ParseSEHDirectiveSaveReg(StringRef, SMLoc L) { + unsigned Reg = 0; + int64_t Off; + if (ParseSEHRegisterNumber(Reg)) + return true; + if (getLexer().isNot(AsmToken::Comma)) + return TokError("you must specify an offset on the stack"); + + Lex(); + SMLoc startLoc = getLexer().getLoc(); + if (getParser().parseAbsoluteExpression(Off)) + return true; + + if (Off & 7) + return Error(startLoc, "size is not a multiple of 8"); + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in directive"); + + Lex(); + // FIXME: Err on %xmm* registers + getStreamer().EmitWinCFISaveReg(Reg, Off); + return false; +} + +// FIXME: This method is inherently x86-specific. It should really be in the +// x86 backend. +bool COFFAsmParser::ParseSEHDirectiveSaveXMM(StringRef, SMLoc L) { + unsigned Reg = 0; + int64_t Off; + if (ParseSEHRegisterNumber(Reg)) + return true; + if (getLexer().isNot(AsmToken::Comma)) + return TokError("you must specify an offset on the stack"); + + Lex(); + SMLoc startLoc = getLexer().getLoc(); + if (getParser().parseAbsoluteExpression(Off)) + return true; + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in directive"); + + if (Off & 0x0F) + return Error(startLoc, "offset is not a multiple of 16"); + + Lex(); + // FIXME: Err on non-%xmm* registers + getStreamer().EmitWinCFISaveXMM(Reg, Off); + return false; +} + +bool COFFAsmParser::ParseSEHDirectivePushFrame(StringRef, SMLoc) { + bool Code = false; + StringRef CodeID; + if (getLexer().is(AsmToken::At)) { + SMLoc startLoc = getLexer().getLoc(); + Lex(); + if (!getParser().parseIdentifier(CodeID)) { + if (CodeID != "code") + return Error(startLoc, "expected @code"); + Code = true; + } + } + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in directive"); + + Lex(); + getStreamer().EmitWinCFIPushFrame(Code); + return false; +} + +bool COFFAsmParser::ParseSEHDirectiveEndProlog(StringRef, SMLoc) { + Lex(); + getStreamer().EmitWinCFIEndProlog(); + return false; +} + +bool COFFAsmParser::ParseAtUnwindOrAtExcept(bool &unwind, bool &except) { + StringRef identifier; + if (getLexer().isNot(AsmToken::At)) + return TokError("a handler attribute must begin with '@'"); + SMLoc startLoc = getLexer().getLoc(); + Lex(); + if (getParser().parseIdentifier(identifier)) + return Error(startLoc, "expected @unwind or @except"); + if (identifier == "unwind") + unwind = true; + else if (identifier == "except") + except = true; + else + return Error(startLoc, "expected @unwind or @except"); + return false; +} + +bool COFFAsmParser::ParseSEHRegisterNumber(unsigned &RegNo) { + SMLoc startLoc = getLexer().getLoc(); + if (getLexer().is(AsmToken::Percent)) { + const MCRegisterInfo *MRI = getContext().getRegisterInfo(); + SMLoc endLoc; + unsigned LLVMRegNo; + unsigned int ErrorCode; + if (getParser().getTargetParser().ParseRegister(LLVMRegNo,startLoc,endLoc, ErrorCode)) + return true; + +#if 0 + // FIXME: TargetAsmInfo::getCalleeSavedRegs() commits a serious layering + // violation so this validation code is disabled. + + // Check that this is a non-volatile register. + const unsigned *NVRegs = TAI.getCalleeSavedRegs(); + unsigned i; + for (i = 0; NVRegs[i] != 0; ++i) + if (NVRegs[i] == LLVMRegNo) + break; + if (NVRegs[i] == 0) + return Error(startLoc, "expected non-volatile register"); +#endif + + int SEHRegNo = MRI->getSEHRegNum(LLVMRegNo); + if (SEHRegNo < 0) + return Error(startLoc,"register can't be represented in SEH unwind info"); + RegNo = SEHRegNo; + } + else { + int64_t n; + if (getParser().parseAbsoluteExpression(n)) + return true; + if (n > 15) + return Error(startLoc, "register number is too high"); + RegNo = n; + } + + return false; +} + +namespace llvm_ks { + +MCAsmParserExtension *createCOFFAsmParser() { + return new COFFAsmParser; +} + +} diff --git a/llvm/lib/MC/MCParser/DarwinAsmParser.cpp b/llvm/lib/MC/MCParser/DarwinAsmParser.cpp new file mode 100644 index 0000000..d0451e1 --- /dev/null +++ b/llvm/lib/MC/MCParser/DarwinAsmParser.cpp @@ -0,0 +1,968 @@ +//===- DarwinAsmParser.cpp - Darwin (Mach-O) Assembly Parser --------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCParser/MCAsmParserExtension.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/ADT/StringSwitch.h" +#include "llvm/ADT/Triple.h" +#include "llvm/ADT/Twine.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCObjectFileInfo.h" +#include "llvm/MC/MCParser/MCAsmLexer.h" +#include "llvm/MC/MCParser/MCAsmParser.h" +#include "llvm/MC/MCSectionMachO.h" +#include "llvm/MC/MCStreamer.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/Support/FileSystem.h" +#include "llvm/Support/MemoryBuffer.h" +#include "llvm/Support/SourceMgr.h" +using namespace llvm_ks; + +namespace { + +/// \brief Implementation of directive handling which is shared across all +/// Darwin targets. +class DarwinAsmParser : public MCAsmParserExtension { + template + void addDirectiveHandler(StringRef Directive) { + MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( + this, HandleDirective); + getParser().addDirectiveHandler(Directive, Handler); + } + + bool parseSectionSwitch(const char *Segment, const char *Section, + unsigned TAA = 0, unsigned ImplicitAlign = 0, + unsigned StubSize = 0); + + SMLoc LastVersionMinDirective; + +public: + DarwinAsmParser() {} + + void Initialize(MCAsmParser &Parser) override { + // Call the base implementation. + this->MCAsmParserExtension::Initialize(Parser); + + addDirectiveHandler<&DarwinAsmParser::parseDirectiveDesc>(".desc"); + addDirectiveHandler<&DarwinAsmParser::parseDirectiveIndirectSymbol>( + ".indirect_symbol"); + addDirectiveHandler<&DarwinAsmParser::parseDirectiveLsym>(".lsym"); + addDirectiveHandler<&DarwinAsmParser::parseDirectiveSubsectionsViaSymbols>( + ".subsections_via_symbols"); + addDirectiveHandler<&DarwinAsmParser::parseDirectiveDumpOrLoad>(".dump"); + addDirectiveHandler<&DarwinAsmParser::parseDirectiveDumpOrLoad>(".load"); + addDirectiveHandler<&DarwinAsmParser::parseDirectiveSection>(".section"); + addDirectiveHandler<&DarwinAsmParser::parseDirectivePushSection>( + ".pushsection"); + addDirectiveHandler<&DarwinAsmParser::parseDirectivePopSection>( + ".popsection"); + addDirectiveHandler<&DarwinAsmParser::parseDirectivePrevious>(".previous"); + addDirectiveHandler<&DarwinAsmParser::parseDirectiveSecureLogUnique>( + ".secure_log_unique"); + addDirectiveHandler<&DarwinAsmParser::parseDirectiveSecureLogReset>( + ".secure_log_reset"); + addDirectiveHandler<&DarwinAsmParser::parseDirectiveTBSS>(".tbss"); + addDirectiveHandler<&DarwinAsmParser::parseDirectiveZerofill>(".zerofill"); + + addDirectiveHandler<&DarwinAsmParser::parseDirectiveDataRegion>( + ".data_region"); + addDirectiveHandler<&DarwinAsmParser::parseDirectiveDataRegionEnd>( + ".end_data_region"); + + // Special section directives. + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveBss>(".bss"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveConst>(".const"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveConstData>( + ".const_data"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveConstructor>( + ".constructor"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveCString>( + ".cstring"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveData>(".data"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveDestructor>( + ".destructor"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveDyld>(".dyld"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveFVMLibInit0>( + ".fvmlib_init0"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveFVMLibInit1>( + ".fvmlib_init1"); + addDirectiveHandler< + &DarwinAsmParser::parseSectionDirectiveLazySymbolPointers>( + ".lazy_symbol_pointer"); + addDirectiveHandler<&DarwinAsmParser::parseDirectiveLinkerOption>( + ".linker_option"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveLiteral16>( + ".literal16"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveLiteral4>( + ".literal4"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveLiteral8>( + ".literal8"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveModInitFunc>( + ".mod_init_func"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveModTermFunc>( + ".mod_term_func"); + addDirectiveHandler< + &DarwinAsmParser::parseSectionDirectiveNonLazySymbolPointers>( + ".non_lazy_symbol_pointer"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCCatClsMeth>( + ".objc_cat_cls_meth"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCCatInstMeth>( + ".objc_cat_inst_meth"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCCategory>( + ".objc_category"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCClass>( + ".objc_class"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCClassNames>( + ".objc_class_names"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCClassVars>( + ".objc_class_vars"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCClsMeth>( + ".objc_cls_meth"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCClsRefs>( + ".objc_cls_refs"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCInstMeth>( + ".objc_inst_meth"); + addDirectiveHandler< + &DarwinAsmParser::parseSectionDirectiveObjCInstanceVars>( + ".objc_instance_vars"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCMessageRefs>( + ".objc_message_refs"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCMetaClass>( + ".objc_meta_class"); + addDirectiveHandler< + &DarwinAsmParser::parseSectionDirectiveObjCMethVarNames>( + ".objc_meth_var_names"); + addDirectiveHandler< + &DarwinAsmParser::parseSectionDirectiveObjCMethVarTypes>( + ".objc_meth_var_types"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCModuleInfo>( + ".objc_module_info"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCProtocol>( + ".objc_protocol"); + addDirectiveHandler< + &DarwinAsmParser::parseSectionDirectiveObjCSelectorStrs>( + ".objc_selector_strs"); + addDirectiveHandler< + &DarwinAsmParser::parseSectionDirectiveObjCStringObject>( + ".objc_string_object"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveObjCSymbols>( + ".objc_symbols"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectivePICSymbolStub>( + ".picsymbol_stub"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveStaticConst>( + ".static_const"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveStaticData>( + ".static_data"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveSymbolStub>( + ".symbol_stub"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveTData>(".tdata"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveText>(".text"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveThreadInitFunc>( + ".thread_init_func"); + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveTLV>(".tlv"); + + addDirectiveHandler<&DarwinAsmParser::parseSectionDirectiveIdent>(".ident"); + addDirectiveHandler<&DarwinAsmParser::parseVersionMin>( + ".watchos_version_min"); + addDirectiveHandler<&DarwinAsmParser::parseVersionMin>(".tvos_version_min"); + addDirectiveHandler<&DarwinAsmParser::parseVersionMin>(".ios_version_min"); + addDirectiveHandler<&DarwinAsmParser::parseVersionMin>( + ".macosx_version_min"); + + LastVersionMinDirective = SMLoc(); + } + + bool parseDirectiveDesc(StringRef, SMLoc); + bool parseDirectiveIndirectSymbol(StringRef, SMLoc); + bool parseDirectiveDumpOrLoad(StringRef, SMLoc); + bool parseDirectiveLsym(StringRef, SMLoc); + bool parseDirectiveLinkerOption(StringRef, SMLoc); + bool parseDirectiveSection(StringRef, SMLoc); + bool parseDirectivePushSection(StringRef, SMLoc); + bool parseDirectivePopSection(StringRef, SMLoc); + bool parseDirectivePrevious(StringRef, SMLoc); + bool parseDirectiveSecureLogReset(StringRef, SMLoc); + bool parseDirectiveSecureLogUnique(StringRef, SMLoc); + bool parseDirectiveSubsectionsViaSymbols(StringRef, SMLoc); + bool parseDirectiveTBSS(StringRef, SMLoc); + bool parseDirectiveZerofill(StringRef, SMLoc); + bool parseDirectiveDataRegion(StringRef, SMLoc); + bool parseDirectiveDataRegionEnd(StringRef, SMLoc); + + // Named Section Directive + bool parseSectionDirectiveBss(StringRef, SMLoc) { + return parseSectionSwitch("__DATA", "__bss"); + } + + bool parseSectionDirectiveConst(StringRef, SMLoc) { + return parseSectionSwitch("__TEXT", "__const"); + } + bool parseSectionDirectiveStaticConst(StringRef, SMLoc) { + return parseSectionSwitch("__TEXT", "__static_const"); + } + bool parseSectionDirectiveCString(StringRef, SMLoc) { + return parseSectionSwitch("__TEXT","__cstring", + MachO::S_CSTRING_LITERALS); + } + bool parseSectionDirectiveLiteral4(StringRef, SMLoc) { + return parseSectionSwitch("__TEXT", "__literal4", + MachO::S_4BYTE_LITERALS, 4); + } + bool parseSectionDirectiveLiteral8(StringRef, SMLoc) { + return parseSectionSwitch("__TEXT", "__literal8", + MachO::S_8BYTE_LITERALS, 8); + } + bool parseSectionDirectiveLiteral16(StringRef, SMLoc) { + return parseSectionSwitch("__TEXT","__literal16", + MachO::S_16BYTE_LITERALS, 16); + } + bool parseSectionDirectiveConstructor(StringRef, SMLoc) { + return parseSectionSwitch("__TEXT","__constructor"); + } + bool parseSectionDirectiveDestructor(StringRef, SMLoc) { + return parseSectionSwitch("__TEXT","__destructor"); + } + bool parseSectionDirectiveFVMLibInit0(StringRef, SMLoc) { + return parseSectionSwitch("__TEXT","__fvmlib_init0"); + } + bool parseSectionDirectiveFVMLibInit1(StringRef, SMLoc) { + return parseSectionSwitch("__TEXT","__fvmlib_init1"); + } + bool parseSectionDirectiveSymbolStub(StringRef, SMLoc) { + return parseSectionSwitch("__TEXT","__symbol_stub", + MachO::S_SYMBOL_STUBS | + MachO::S_ATTR_PURE_INSTRUCTIONS, + // FIXME: Different on PPC and ARM. + 0, 16); + } + bool parseSectionDirectivePICSymbolStub(StringRef, SMLoc) { + return parseSectionSwitch("__TEXT","__picsymbol_stub", + MachO::S_SYMBOL_STUBS | + MachO::S_ATTR_PURE_INSTRUCTIONS, 0, 26); + } + bool parseSectionDirectiveData(StringRef, SMLoc) { + return parseSectionSwitch("__DATA", "__data"); + } + bool parseSectionDirectiveStaticData(StringRef, SMLoc) { + return parseSectionSwitch("__DATA", "__static_data"); + } + bool parseSectionDirectiveNonLazySymbolPointers(StringRef, SMLoc) { + return parseSectionSwitch("__DATA", "__nl_symbol_ptr", + MachO::S_NON_LAZY_SYMBOL_POINTERS, 4); + } + bool parseSectionDirectiveLazySymbolPointers(StringRef, SMLoc) { + return parseSectionSwitch("__DATA", "__la_symbol_ptr", + MachO::S_LAZY_SYMBOL_POINTERS, 4); + } + bool parseSectionDirectiveDyld(StringRef, SMLoc) { + return parseSectionSwitch("__DATA", "__dyld"); + } + bool parseSectionDirectiveModInitFunc(StringRef, SMLoc) { + return parseSectionSwitch("__DATA", "__mod_init_func", + MachO::S_MOD_INIT_FUNC_POINTERS, 4); + } + bool parseSectionDirectiveModTermFunc(StringRef, SMLoc) { + return parseSectionSwitch("__DATA", "__mod_term_func", + MachO::S_MOD_TERM_FUNC_POINTERS, 4); + } + bool parseSectionDirectiveConstData(StringRef, SMLoc) { + return parseSectionSwitch("__DATA", "__const"); + } + bool parseSectionDirectiveObjCClass(StringRef, SMLoc) { + return parseSectionSwitch("__OBJC", "__class", + MachO::S_ATTR_NO_DEAD_STRIP); + } + bool parseSectionDirectiveObjCMetaClass(StringRef, SMLoc) { + return parseSectionSwitch("__OBJC", "__meta_class", + MachO::S_ATTR_NO_DEAD_STRIP); + } + bool parseSectionDirectiveObjCCatClsMeth(StringRef, SMLoc) { + return parseSectionSwitch("__OBJC", "__cat_cls_meth", + MachO::S_ATTR_NO_DEAD_STRIP); + } + bool parseSectionDirectiveObjCCatInstMeth(StringRef, SMLoc) { + return parseSectionSwitch("__OBJC", "__cat_inst_meth", + MachO::S_ATTR_NO_DEAD_STRIP); + } + bool parseSectionDirectiveObjCProtocol(StringRef, SMLoc) { + return parseSectionSwitch("__OBJC", "__protocol", + MachO::S_ATTR_NO_DEAD_STRIP); + } + bool parseSectionDirectiveObjCStringObject(StringRef, SMLoc) { + return parseSectionSwitch("__OBJC", "__string_object", + MachO::S_ATTR_NO_DEAD_STRIP); + } + bool parseSectionDirectiveObjCClsMeth(StringRef, SMLoc) { + return parseSectionSwitch("__OBJC", "__cls_meth", + MachO::S_ATTR_NO_DEAD_STRIP); + } + bool parseSectionDirectiveObjCInstMeth(StringRef, SMLoc) { + return parseSectionSwitch("__OBJC", "__inst_meth", + MachO::S_ATTR_NO_DEAD_STRIP); + } + bool parseSectionDirectiveObjCClsRefs(StringRef, SMLoc) { + return parseSectionSwitch("__OBJC", "__cls_refs", + MachO::S_ATTR_NO_DEAD_STRIP | + MachO::S_LITERAL_POINTERS, 4); + } + bool parseSectionDirectiveObjCMessageRefs(StringRef, SMLoc) { + return parseSectionSwitch("__OBJC", "__message_refs", + MachO::S_ATTR_NO_DEAD_STRIP | + MachO::S_LITERAL_POINTERS, 4); + } + bool parseSectionDirectiveObjCSymbols(StringRef, SMLoc) { + return parseSectionSwitch("__OBJC", "__symbols", + MachO::S_ATTR_NO_DEAD_STRIP); + } + bool parseSectionDirectiveObjCCategory(StringRef, SMLoc) { + return parseSectionSwitch("__OBJC", "__category", + MachO::S_ATTR_NO_DEAD_STRIP); + } + bool parseSectionDirectiveObjCClassVars(StringRef, SMLoc) { + return parseSectionSwitch("__OBJC", "__class_vars", + MachO::S_ATTR_NO_DEAD_STRIP); + } + bool parseSectionDirectiveObjCInstanceVars(StringRef, SMLoc) { + return parseSectionSwitch("__OBJC", "__instance_vars", + MachO::S_ATTR_NO_DEAD_STRIP); + } + bool parseSectionDirectiveObjCModuleInfo(StringRef, SMLoc) { + return parseSectionSwitch("__OBJC", "__module_info", + MachO::S_ATTR_NO_DEAD_STRIP); + } + bool parseSectionDirectiveObjCClassNames(StringRef, SMLoc) { + return parseSectionSwitch("__TEXT", "__cstring", + MachO::S_CSTRING_LITERALS); + } + bool parseSectionDirectiveObjCMethVarTypes(StringRef, SMLoc) { + return parseSectionSwitch("__TEXT", "__cstring", + MachO::S_CSTRING_LITERALS); + } + bool parseSectionDirectiveObjCMethVarNames(StringRef, SMLoc) { + return parseSectionSwitch("__TEXT", "__cstring", + MachO::S_CSTRING_LITERALS); + } + bool parseSectionDirectiveObjCSelectorStrs(StringRef, SMLoc) { + return parseSectionSwitch("__OBJC", "__selector_strs", + MachO::S_CSTRING_LITERALS); + } + bool parseSectionDirectiveTData(StringRef, SMLoc) { + return parseSectionSwitch("__DATA", "__thread_data", + MachO::S_THREAD_LOCAL_REGULAR); + } + bool parseSectionDirectiveText(StringRef, SMLoc) { + return parseSectionSwitch("__TEXT", "__text", + MachO::S_ATTR_PURE_INSTRUCTIONS); + } + bool parseSectionDirectiveTLV(StringRef, SMLoc) { + return parseSectionSwitch("__DATA", "__thread_vars", + MachO::S_THREAD_LOCAL_VARIABLES); + } + bool parseSectionDirectiveIdent(StringRef, SMLoc) { + // Darwin silently ignores the .ident directive. + getParser().eatToEndOfStatement(); + return false; + } + bool parseSectionDirectiveThreadInitFunc(StringRef, SMLoc) { + return parseSectionSwitch("__DATA", "__thread_init", + MachO::S_THREAD_LOCAL_INIT_FUNCTION_POINTERS); + } + bool parseVersionMin(StringRef, SMLoc); + +}; + +} // end anonymous namespace + +bool DarwinAsmParser::parseSectionSwitch(const char *Segment, + const char *Section, + unsigned TAA, unsigned Align, + unsigned StubSize) { + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in section switching directive"); + Lex(); + + // FIXME: Arch specific. + bool isText = TAA & MachO::S_ATTR_PURE_INSTRUCTIONS; + getStreamer().SwitchSection(getContext().getMachOSection( + Segment, Section, TAA, StubSize, + isText ? SectionKind::getText() : SectionKind::getData())); + + // Set the implicit alignment, if any. + // + // FIXME: This isn't really what 'as' does; I think it just uses the implicit + // alignment on the section (e.g., if one manually inserts bytes into the + // section, then just issuing the section switch directive will not realign + // the section. However, this is arguably more reasonable behavior, and there + // is no good reason for someone to intentionally emit incorrectly sized + // values into the implicitly aligned sections. + if (Align) + getStreamer().EmitValueToAlignment(Align); + + return false; +} + +/// parseDirectiveDesc +/// ::= .desc identifier , expression +bool DarwinAsmParser::parseDirectiveDesc(StringRef, SMLoc) { + StringRef Name; + if (getParser().parseIdentifier(Name)) + return TokError("expected identifier in directive"); + + // Handle the identifier as the key symbol. + MCSymbol *Sym = getContext().getOrCreateSymbol(Name); + + if (getLexer().isNot(AsmToken::Comma)) + return TokError("unexpected token in '.desc' directive"); + Lex(); + + int64_t DescValue; + if (getParser().parseAbsoluteExpression(DescValue)) + return true; + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in '.desc' directive"); + + Lex(); + + // Set the n_desc field of this Symbol to this DescValue + getStreamer().EmitSymbolDesc(Sym, DescValue); + + return false; +} + +/// parseDirectiveIndirectSymbol +/// ::= .indirect_symbol identifier +bool DarwinAsmParser::parseDirectiveIndirectSymbol(StringRef, SMLoc Loc) { + const MCSectionMachO *Current = static_cast( + getStreamer().getCurrentSection().first); + MachO::SectionType SectionType = Current->getType(); + if (SectionType != MachO::S_NON_LAZY_SYMBOL_POINTERS && + SectionType != MachO::S_LAZY_SYMBOL_POINTERS && + SectionType != MachO::S_SYMBOL_STUBS) + return Error(Loc, "indirect symbol not in a symbol pointer or stub " + "section"); + + StringRef Name; + if (getParser().parseIdentifier(Name)) + return TokError("expected identifier in .indirect_symbol directive"); + + MCSymbol *Sym = getContext().getOrCreateSymbol(Name); + + // Assembler local symbols don't make any sense here. Complain loudly. + if (Sym->isTemporary()) + return TokError("non-local symbol required in directive"); + + if (!getStreamer().EmitSymbolAttribute(Sym, MCSA_IndirectSymbol)) + return TokError("unable to emit indirect symbol attribute for: " + Name); + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in '.indirect_symbol' directive"); + + Lex(); + + return false; +} + +/// parseDirectiveDumpOrLoad +/// ::= ( .dump | .load ) "filename" +bool DarwinAsmParser::parseDirectiveDumpOrLoad(StringRef Directive, + SMLoc IDLoc) { + bool IsDump = Directive == ".dump"; + if (getLexer().isNot(AsmToken::String)) + return TokError("expected string in '.dump' or '.load' directive"); + + Lex(); + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in '.dump' or '.load' directive"); + + Lex(); + + // FIXME: If/when .dump and .load are implemented they will be done in the + // the assembly parser and not have any need for an MCStreamer API. + if (IsDump) + return Warning(IDLoc, "ignoring directive .dump for now"); + else + return Warning(IDLoc, "ignoring directive .load for now"); +} + +/// ParseDirectiveLinkerOption +/// ::= .linker_option "string" ( , "string" )* +bool DarwinAsmParser::parseDirectiveLinkerOption(StringRef IDVal, SMLoc) { + SmallVector Args; + for (;;) { + if (getLexer().isNot(AsmToken::String)) + return TokError("expected string in '" + Twine(IDVal) + "' directive"); + + std::string Data; + if (getParser().parseEscapedString(Data)) + return true; + + Args.push_back(Data); + + Lex(); + if (getLexer().is(AsmToken::EndOfStatement)) + break; + + if (getLexer().isNot(AsmToken::Comma)) + return TokError("unexpected token in '" + Twine(IDVal) + "' directive"); + Lex(); + } + + getStreamer().EmitLinkerOptions(Args); + return false; +} + +/// parseDirectiveLsym +/// ::= .lsym identifier , expression +bool DarwinAsmParser::parseDirectiveLsym(StringRef, SMLoc) { + StringRef Name; + if (getParser().parseIdentifier(Name)) + return TokError("expected identifier in directive"); + + // Handle the identifier as the key symbol. + MCSymbol *Sym = getContext().getOrCreateSymbol(Name); + + if (getLexer().isNot(AsmToken::Comma)) + return TokError("unexpected token in '.lsym' directive"); + Lex(); + + const MCExpr *Value; + if (getParser().parseExpression(Value)) + return true; + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in '.lsym' directive"); + + Lex(); + + // We don't currently support this directive. + // + // FIXME: Diagnostic location! + (void) Sym; + return TokError("directive '.lsym' is unsupported"); +} + +/// parseDirectiveSection: +/// ::= .section identifier (',' identifier)* +bool DarwinAsmParser::parseDirectiveSection(StringRef, SMLoc) { + SMLoc Loc = getLexer().getLoc(); + + StringRef SectionName; + if (getParser().parseIdentifier(SectionName)) + return Error(Loc, "expected identifier after '.section' directive"); + + // Verify there is a following comma. + if (!getLexer().is(AsmToken::Comma)) + return TokError("unexpected token in '.section' directive"); + + std::string SectionSpec = SectionName; + SectionSpec += ","; + + // Add all the tokens until the end of the line, ParseSectionSpecifier will + // handle this. + StringRef EOL = getLexer().LexUntilEndOfStatement(); + SectionSpec.append(EOL.begin(), EOL.end()); + + Lex(); + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in '.section' directive"); + Lex(); + + + StringRef Segment, Section; + unsigned StubSize; + unsigned TAA; + bool TAAParsed; + std::string ErrorStr = + MCSectionMachO::ParseSectionSpecifier(SectionSpec, Segment, Section, + TAA, TAAParsed, StubSize); + + if (!ErrorStr.empty()) + return Error(Loc, ErrorStr.c_str()); + + // Issue a warning if the target is not powerpc and Section is a *coal* section. + Triple TT = getParser().getContext().getObjectFileInfo()->getTargetTriple(); + Triple::ArchType ArchTy = TT.getArch(); + + if (ArchTy != Triple::ppc && ArchTy != Triple::ppc64) { + StringRef NonCoalSection = StringSwitch(Section) + .Case("__textcoal_nt", "__text") + .Case("__const_coal", "__const") + .Case("__datacoal_nt", "__data") + .Default(Section); + + if (!Section.equals(NonCoalSection)) { + StringRef SectionVal(Loc.getPointer()); + size_t B = SectionVal.find(',') + 1, E = SectionVal.find(',', B); + SMLoc BLoc = SMLoc::getFromPointer(SectionVal.data() + B); + SMLoc ELoc = SMLoc::getFromPointer(SectionVal.data() + E); + getParser().Warning(Loc, "section \"" + Section + "\" is deprecated", + SMRange(BLoc, ELoc)); + getParser().Note(Loc, "change section name to \"" + NonCoalSection + + "\"", SMRange(BLoc, ELoc)); + } + } + + // FIXME: Arch specific. + bool isText = Segment == "__TEXT"; // FIXME: Hack. + getStreamer().SwitchSection(getContext().getMachOSection( + Segment, Section, TAA, StubSize, + isText ? SectionKind::getText() : SectionKind::getData())); + return false; +} + +/// ParseDirectivePushSection: +/// ::= .pushsection identifier (',' identifier)* +bool DarwinAsmParser::parseDirectivePushSection(StringRef S, SMLoc Loc) { + getStreamer().PushSection(); + + if (parseDirectiveSection(S, Loc)) { + getStreamer().PopSection(); + return true; + } + + return false; +} + +/// ParseDirectivePopSection: +/// ::= .popsection +bool DarwinAsmParser::parseDirectivePopSection(StringRef, SMLoc) { + if (!getStreamer().PopSection()) + return TokError(".popsection without corresponding .pushsection"); + return false; +} + +/// ParseDirectivePrevious: +/// ::= .previous +bool DarwinAsmParser::parseDirectivePrevious(StringRef DirName, SMLoc) { + MCSectionSubPair PreviousSection = getStreamer().getPreviousSection(); + if (!PreviousSection.first) + return TokError(".previous without corresponding .section"); + getStreamer().SwitchSection(PreviousSection.first, PreviousSection.second); + return false; +} + +/// ParseDirectiveSecureLogUnique +/// ::= .secure_log_unique ... message ... +bool DarwinAsmParser::parseDirectiveSecureLogUnique(StringRef, SMLoc IDLoc) { + StringRef LogMessage = getParser().parseStringToEndOfStatement(); + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in '.secure_log_unique' directive"); + + if (getContext().getSecureLogUsed()) + return Error(IDLoc, ".secure_log_unique specified multiple times"); + + // Get the secure log path. + const char *SecureLogFile = getContext().getSecureLogFile(); + if (!SecureLogFile) + return Error(IDLoc, ".secure_log_unique used but AS_SECURE_LOG_FILE " + "environment variable unset."); + + // Open the secure log file if we haven't already. + raw_fd_ostream *OS = getContext().getSecureLog(); + if (!OS) { + std::error_code EC; + auto NewOS = llvm_ks::make_unique( + SecureLogFile, EC, sys::fs::F_Append | sys::fs::F_Text); + if (EC) + return Error(IDLoc, Twine("can't open secure log file: ") + + SecureLogFile + " (" + EC.message() + ")"); + OS = NewOS.get(); + getContext().setSecureLog(std::move(NewOS)); + } + + // Write the message. + unsigned CurBuf = getSourceManager().FindBufferContainingLoc(IDLoc); + *OS << getSourceManager().getBufferInfo(CurBuf).Buffer->getBufferIdentifier() + << ":" << getSourceManager().FindLineNumber(IDLoc, CurBuf) << ":" + << LogMessage + "\n"; + + getContext().setSecureLogUsed(true); + + return false; +} + +/// ParseDirectiveSecureLogReset +/// ::= .secure_log_reset +bool DarwinAsmParser::parseDirectiveSecureLogReset(StringRef, SMLoc IDLoc) { + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in '.secure_log_reset' directive"); + + Lex(); + + getContext().setSecureLogUsed(false); + + return false; +} + +/// parseDirectiveSubsectionsViaSymbols +/// ::= .subsections_via_symbols +bool DarwinAsmParser::parseDirectiveSubsectionsViaSymbols(StringRef, SMLoc) { + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in '.subsections_via_symbols' directive"); + + Lex(); + + getStreamer().EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); + + return false; +} + +/// ParseDirectiveTBSS +/// ::= .tbss identifier, size, align +bool DarwinAsmParser::parseDirectiveTBSS(StringRef, SMLoc) { + SMLoc IDLoc = getLexer().getLoc(); + StringRef Name; + if (getParser().parseIdentifier(Name)) + return TokError("expected identifier in directive"); + + // Handle the identifier as the key symbol. + MCSymbol *Sym = getContext().getOrCreateSymbol(Name); + + if (getLexer().isNot(AsmToken::Comma)) + return TokError("unexpected token in directive"); + Lex(); + + int64_t Size; + SMLoc SizeLoc = getLexer().getLoc(); + if (getParser().parseAbsoluteExpression(Size)) + return true; + + int64_t Pow2Alignment = 0; + SMLoc Pow2AlignmentLoc; + if (getLexer().is(AsmToken::Comma)) { + Lex(); + Pow2AlignmentLoc = getLexer().getLoc(); + if (getParser().parseAbsoluteExpression(Pow2Alignment)) + return true; + } + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in '.tbss' directive"); + + Lex(); + + if (Size < 0) + return Error(SizeLoc, "invalid '.tbss' directive size, can't be less than" + "zero"); + + // FIXME: Diagnose overflow. + if (Pow2Alignment < 0) + return Error(Pow2AlignmentLoc, "invalid '.tbss' alignment, can't be less" + "than zero"); + + if (!Sym->isUndefined()) + return Error(IDLoc, "invalid symbol redefinition"); + + getStreamer().EmitTBSSSymbol(getContext().getMachOSection( + "__DATA", "__thread_bss", + MachO::S_THREAD_LOCAL_ZEROFILL, + 0, SectionKind::getThreadBSS()), + Sym, Size, 1 << Pow2Alignment); + + return false; +} + +/// ParseDirectiveZerofill +/// ::= .zerofill segname , sectname [, identifier , size_expression [ +/// , align_expression ]] +bool DarwinAsmParser::parseDirectiveZerofill(StringRef, SMLoc) { + StringRef Segment; + if (getParser().parseIdentifier(Segment)) + return TokError("expected segment name after '.zerofill' directive"); + + if (getLexer().isNot(AsmToken::Comma)) + return TokError("unexpected token in directive"); + Lex(); + + StringRef Section; + if (getParser().parseIdentifier(Section)) + return TokError("expected section name after comma in '.zerofill' " + "directive"); + + // If this is the end of the line all that was wanted was to create the + // the section but with no symbol. + if (getLexer().is(AsmToken::EndOfStatement)) { + // Create the zerofill section but no symbol + getStreamer().EmitZerofill(getContext().getMachOSection( + Segment, Section, MachO::S_ZEROFILL, + 0, SectionKind::getBSS())); + return false; + } + + if (getLexer().isNot(AsmToken::Comma)) + return TokError("unexpected token in directive"); + Lex(); + + SMLoc IDLoc = getLexer().getLoc(); + StringRef IDStr; + if (getParser().parseIdentifier(IDStr)) + return TokError("expected identifier in directive"); + + // handle the identifier as the key symbol. + MCSymbol *Sym = getContext().getOrCreateSymbol(IDStr); + + if (getLexer().isNot(AsmToken::Comma)) + return TokError("unexpected token in directive"); + Lex(); + + int64_t Size; + SMLoc SizeLoc = getLexer().getLoc(); + if (getParser().parseAbsoluteExpression(Size)) + return true; + + int64_t Pow2Alignment = 0; + SMLoc Pow2AlignmentLoc; + if (getLexer().is(AsmToken::Comma)) { + Lex(); + Pow2AlignmentLoc = getLexer().getLoc(); + if (getParser().parseAbsoluteExpression(Pow2Alignment)) + return true; + } + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in '.zerofill' directive"); + + Lex(); + + if (Size < 0) + return Error(SizeLoc, "invalid '.zerofill' directive size, can't be less " + "than zero"); + + // NOTE: The alignment in the directive is a power of 2 value, the assembler + // may internally end up wanting an alignment in bytes. + // FIXME: Diagnose overflow. + if (Pow2Alignment < 0) + return Error(Pow2AlignmentLoc, "invalid '.zerofill' directive alignment, " + "can't be less than zero"); + + if (!Sym->isUndefined()) + return Error(IDLoc, "invalid symbol redefinition"); + + // Create the zerofill Symbol with Size and Pow2Alignment + // + // FIXME: Arch specific. + getStreamer().EmitZerofill(getContext().getMachOSection( + Segment, Section, MachO::S_ZEROFILL, + 0, SectionKind::getBSS()), + Sym, Size, 1 << Pow2Alignment); + + return false; +} + +/// ParseDirectiveDataRegion +/// ::= .data_region [ ( jt8 | jt16 | jt32 ) ] +bool DarwinAsmParser::parseDirectiveDataRegion(StringRef, SMLoc) { + if (getLexer().is(AsmToken::EndOfStatement)) { + Lex(); + getStreamer().EmitDataRegion(MCDR_DataRegion); + return false; + } + StringRef RegionType; + SMLoc Loc = getParser().getTok().getLoc(); + if (getParser().parseIdentifier(RegionType)) + return TokError("expected region type after '.data_region' directive"); + int Kind = StringSwitch(RegionType) + .Case("jt8", MCDR_DataRegionJT8) + .Case("jt16", MCDR_DataRegionJT16) + .Case("jt32", MCDR_DataRegionJT32) + .Default(-1); + if (Kind == -1) + return Error(Loc, "unknown region type in '.data_region' directive"); + Lex(); + + getStreamer().EmitDataRegion((MCDataRegionType)Kind); + return false; +} + +/// ParseDirectiveDataRegionEnd +/// ::= .end_data_region +bool DarwinAsmParser::parseDirectiveDataRegionEnd(StringRef, SMLoc) { + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in '.end_data_region' directive"); + + Lex(); + getStreamer().EmitDataRegion(MCDR_DataRegionEnd); + return false; +} + +/// parseVersionMin +/// ::= .ios_version_min major,minor[,update] +/// ::= .macosx_version_min major,minor[,update] +bool DarwinAsmParser::parseVersionMin(StringRef Directive, SMLoc Loc) { + int64_t Major = 0, Minor = 0, Update = 0; + int Kind = StringSwitch(Directive) + .Case(".watchos_version_min", MCVM_WatchOSVersionMin) + .Case(".tvos_version_min", MCVM_TvOSVersionMin) + .Case(".ios_version_min", MCVM_IOSVersionMin) + .Case(".macosx_version_min", MCVM_OSXVersionMin); + // Get the major version number. + if (getLexer().isNot(AsmToken::Integer)) + return TokError("invalid OS major version number"); + bool valid; + Major = getLexer().getTok().getIntVal(valid); + if (Major > 65535 || Major <= 0) + return TokError("invalid OS major version number"); + Lex(); + if (getLexer().isNot(AsmToken::Comma)) + return TokError("minor OS version number required, comma expected"); + Lex(); + // Get the minor version number. + if (getLexer().isNot(AsmToken::Integer)) + return TokError("invalid OS minor version number"); + Minor = getLexer().getTok().getIntVal(valid); + if (Minor > 255 || Minor < 0) + return TokError("invalid OS minor version number"); + Lex(); + // Get the update level, if specified + if (getLexer().isNot(AsmToken::EndOfStatement)) { + if (getLexer().isNot(AsmToken::Comma)) + return TokError("invalid update specifier, comma expected"); + Lex(); + if (getLexer().isNot(AsmToken::Integer)) + return TokError("invalid OS update number"); + Update = getLexer().getTok().getIntVal(valid); + if (Update > 255 || Update < 0) + return TokError("invalid OS update number"); + Lex(); + } + + const Triple &T = getContext().getObjectFileInfo()->getTargetTriple(); + Triple::OSType ExpectedOS = Triple::UnknownOS; + switch ((MCVersionMinType)Kind) { + case MCVM_WatchOSVersionMin: ExpectedOS = Triple::WatchOS; break; + case MCVM_TvOSVersionMin: ExpectedOS = Triple::TvOS; break; + case MCVM_IOSVersionMin: ExpectedOS = Triple::IOS; break; + case MCVM_OSXVersionMin: ExpectedOS = Triple::MacOSX; break; + } + if (T.getOS() != ExpectedOS) + Warning(Loc, Directive + " should only be used for " + + Triple::getOSTypeName(ExpectedOS) + " targets"); + + if (LastVersionMinDirective.isValid()) { + Warning(Loc, "overriding previous version_min directive"); + Note(LastVersionMinDirective, "previous definition is here"); + } + LastVersionMinDirective = Loc; + + // We've parsed a correct version specifier, so send it to the streamer. + getStreamer().EmitVersionMin((MCVersionMinType)Kind, Major, Minor, Update); + + return false; +} + +namespace llvm_ks { + +MCAsmParserExtension *createDarwinAsmParser() { + return new DarwinAsmParser; +} + +} // end llvm namespace diff --git a/llvm/lib/MC/MCParser/ELFAsmParser.cpp b/llvm/lib/MC/MCParser/ELFAsmParser.cpp new file mode 100644 index 0000000..696d4f1 --- /dev/null +++ b/llvm/lib/MC/MCParser/ELFAsmParser.cpp @@ -0,0 +1,746 @@ +//===- ELFAsmParser.cpp - ELF Assembly Parser -----------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCParser/MCAsmParserExtension.h" +#include "llvm/ADT/StringSwitch.h" +#include "llvm/ADT/Twine.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCParser/MCAsmLexer.h" +#include "llvm/MC/MCSectionELF.h" +#include "llvm/MC/MCStreamer.h" +#include "llvm/MC/MCSymbolELF.h" +#include "llvm/Support/ELF.h" +using namespace llvm_ks; + +namespace { + +class ELFAsmParser : public MCAsmParserExtension { + template + void addDirectiveHandler(StringRef Directive) { + MCAsmParser::ExtensionDirectiveHandler Handler = std::make_pair( + this, HandleDirective); + + getParser().addDirectiveHandler(Directive, Handler); + } + + bool ParseSectionSwitch(StringRef Section, unsigned Type, unsigned Flags, + SectionKind Kind); + +public: + ELFAsmParser() { BracketExpressionsSupported = true; } + + void Initialize(MCAsmParser &Parser) override { + // Call the base implementation. + this->MCAsmParserExtension::Initialize(Parser); + + addDirectiveHandler<&ELFAsmParser::ParseSectionDirectiveData>(".data"); + addDirectiveHandler<&ELFAsmParser::ParseSectionDirectiveText>(".text"); + addDirectiveHandler<&ELFAsmParser::ParseSectionDirectiveBSS>(".bss"); + addDirectiveHandler<&ELFAsmParser::ParseSectionDirectiveRoData>(".rodata"); + addDirectiveHandler<&ELFAsmParser::ParseSectionDirectiveTData>(".tdata"); + addDirectiveHandler<&ELFAsmParser::ParseSectionDirectiveTBSS>(".tbss"); + addDirectiveHandler< + &ELFAsmParser::ParseSectionDirectiveDataRel>(".data.rel"); + addDirectiveHandler< + &ELFAsmParser::ParseSectionDirectiveDataRelRo>(".data.rel.ro"); + addDirectiveHandler< + &ELFAsmParser::ParseSectionDirectiveEhFrame>(".eh_frame"); + addDirectiveHandler<&ELFAsmParser::ParseDirectiveSection>(".section"); + addDirectiveHandler< + &ELFAsmParser::ParseDirectivePushSection>(".pushsection"); + addDirectiveHandler<&ELFAsmParser::ParseDirectivePopSection>(".popsection"); + addDirectiveHandler<&ELFAsmParser::ParseDirectiveSize>(".size"); + addDirectiveHandler<&ELFAsmParser::ParseDirectivePrevious>(".previous"); + addDirectiveHandler<&ELFAsmParser::ParseDirectiveType>(".type"); + addDirectiveHandler<&ELFAsmParser::ParseDirectiveIdent>(".ident"); + addDirectiveHandler<&ELFAsmParser::ParseDirectiveSymver>(".symver"); + addDirectiveHandler<&ELFAsmParser::ParseDirectiveVersion>(".version"); + addDirectiveHandler<&ELFAsmParser::ParseDirectiveWeakref>(".weakref"); + addDirectiveHandler<&ELFAsmParser::ParseDirectiveSymbolAttribute>(".weak"); + addDirectiveHandler<&ELFAsmParser::ParseDirectiveSymbolAttribute>(".local"); + addDirectiveHandler< + &ELFAsmParser::ParseDirectiveSymbolAttribute>(".protected"); + addDirectiveHandler< + &ELFAsmParser::ParseDirectiveSymbolAttribute>(".internal"); + addDirectiveHandler< + &ELFAsmParser::ParseDirectiveSymbolAttribute>(".hidden"); + addDirectiveHandler<&ELFAsmParser::ParseDirectiveSubsection>(".subsection"); + } + + // FIXME: Part of this logic is duplicated in the MCELFStreamer. What is + // the best way for us to get access to it? + bool ParseSectionDirectiveData(StringRef, SMLoc) { + return ParseSectionSwitch(".data", ELF::SHT_PROGBITS, + ELF::SHF_WRITE | ELF::SHF_ALLOC, + SectionKind::getData()); + } + bool ParseSectionDirectiveText(StringRef, SMLoc) { + return ParseSectionSwitch(".text", ELF::SHT_PROGBITS, + ELF::SHF_EXECINSTR | + ELF::SHF_ALLOC, SectionKind::getText()); + } + bool ParseSectionDirectiveBSS(StringRef, SMLoc) { + return ParseSectionSwitch(".bss", ELF::SHT_NOBITS, + ELF::SHF_WRITE | + ELF::SHF_ALLOC, SectionKind::getBSS()); + } + bool ParseSectionDirectiveRoData(StringRef, SMLoc) { + return ParseSectionSwitch(".rodata", ELF::SHT_PROGBITS, + ELF::SHF_ALLOC, + SectionKind::getReadOnly()); + } + bool ParseSectionDirectiveTData(StringRef, SMLoc) { + return ParseSectionSwitch(".tdata", ELF::SHT_PROGBITS, + ELF::SHF_ALLOC | + ELF::SHF_TLS | ELF::SHF_WRITE, + SectionKind::getThreadData()); + } + bool ParseSectionDirectiveTBSS(StringRef, SMLoc) { + return ParseSectionSwitch(".tbss", ELF::SHT_NOBITS, + ELF::SHF_ALLOC | + ELF::SHF_TLS | ELF::SHF_WRITE, + SectionKind::getThreadBSS()); + } + bool ParseSectionDirectiveDataRel(StringRef, SMLoc) { + return ParseSectionSwitch(".data.rel", ELF::SHT_PROGBITS, + ELF::SHF_ALLOC | ELF::SHF_WRITE, + SectionKind::getData()); + } + bool ParseSectionDirectiveDataRelRo(StringRef, SMLoc) { + return ParseSectionSwitch(".data.rel.ro", ELF::SHT_PROGBITS, + ELF::SHF_ALLOC | + ELF::SHF_WRITE, + SectionKind::getReadOnlyWithRel()); + } + bool ParseSectionDirectiveEhFrame(StringRef, SMLoc) { + return ParseSectionSwitch(".eh_frame", ELF::SHT_PROGBITS, + ELF::SHF_ALLOC | ELF::SHF_WRITE, + SectionKind::getData()); + } + bool ParseDirectivePushSection(StringRef, SMLoc); + bool ParseDirectivePopSection(StringRef, SMLoc); + bool ParseDirectiveSection(StringRef, SMLoc); + bool ParseDirectiveSize(StringRef, SMLoc); + bool ParseDirectivePrevious(StringRef, SMLoc); + bool ParseDirectiveType(StringRef, SMLoc); + bool ParseDirectiveIdent(StringRef, SMLoc); + bool ParseDirectiveSymver(StringRef, SMLoc); + bool ParseDirectiveVersion(StringRef, SMLoc); + bool ParseDirectiveWeakref(StringRef, SMLoc); + bool ParseDirectiveSymbolAttribute(StringRef, SMLoc); + bool ParseDirectiveSubsection(StringRef, SMLoc); + +private: + bool ParseSectionName(StringRef &SectionName); + bool ParseSectionArguments(bool IsPush, SMLoc loc); + unsigned parseSunStyleSectionFlags(); +}; + +} + +/// ParseDirectiveSymbolAttribute +/// ::= { ".local", ".weak", ... } [ identifier ( , identifier )* ] +bool ELFAsmParser::ParseDirectiveSymbolAttribute(StringRef Directive, SMLoc) { + MCSymbolAttr Attr = StringSwitch(Directive) + .Case(".weak", MCSA_Weak) + .Case(".local", MCSA_Local) + .Case(".hidden", MCSA_Hidden) + .Case(".internal", MCSA_Internal) + .Case(".protected", MCSA_Protected) + .Default(MCSA_Invalid); + assert(Attr != MCSA_Invalid && "unexpected symbol attribute directive!"); + if (getLexer().isNot(AsmToken::EndOfStatement)) { + for (;;) { + StringRef Name; + + if (getParser().parseIdentifier(Name)) + return TokError("expected identifier in directive"); + + MCSymbol *Sym = getContext().getOrCreateSymbol(Name); + + getStreamer().EmitSymbolAttribute(Sym, Attr); + + if (getLexer().is(AsmToken::EndOfStatement)) + break; + + if (getLexer().isNot(AsmToken::Comma)) + return TokError("unexpected token in directive"); + Lex(); + } + } + + Lex(); + return false; +} + +bool ELFAsmParser::ParseSectionSwitch(StringRef Section, unsigned Type, + unsigned Flags, SectionKind Kind) { + const MCExpr *Subsection = nullptr; + if (getLexer().isNot(AsmToken::EndOfStatement)) { + if (getParser().parseExpression(Subsection)) + return true; + } + + getStreamer().SwitchSection(getContext().getELFSection(Section, Type, Flags), + Subsection); + + return false; +} + +bool ELFAsmParser::ParseDirectiveSize(StringRef, SMLoc) { + StringRef Name; + if (getParser().parseIdentifier(Name)) + return TokError("expected identifier in directive"); + MCSymbolELF *Sym = cast(getContext().getOrCreateSymbol(Name)); + + if (getLexer().isNot(AsmToken::Comma)) + return TokError("unexpected token in directive"); + Lex(); + + const MCExpr *Expr; + if (getParser().parseExpression(Expr)) + return true; + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in directive"); + + getStreamer().emitELFSize(Sym, Expr); + return false; +} + +bool ELFAsmParser::ParseSectionName(StringRef &SectionName) { + // A section name can contain -, so we cannot just use + // parseIdentifier. + SMLoc FirstLoc = getLexer().getLoc(); + unsigned Size = 0; + + if (getLexer().is(AsmToken::String)) { + SectionName = getTok().getIdentifier(); + Lex(); + return false; + } + + for (;;) { + unsigned CurSize; + + SMLoc PrevLoc = getLexer().getLoc(); + if (getLexer().is(AsmToken::Minus)) { + CurSize = 1; + Lex(); // Consume the "-". + } else if (getLexer().is(AsmToken::String)) { + CurSize = getTok().getIdentifier().size() + 2; + Lex(); + } else if (getLexer().is(AsmToken::Identifier)) { + CurSize = getTok().getIdentifier().size(); + Lex(); + } else { + break; + } + + Size += CurSize; + SectionName = StringRef(FirstLoc.getPointer(), Size); + + // Make sure the following token is adjacent. + if (PrevLoc.getPointer() + CurSize != getTok().getLoc().getPointer()) + break; + } + if (Size == 0) + return true; + + return false; +} + +static unsigned parseSectionFlags(StringRef flagsStr, bool *UseLastGroup) { + unsigned flags = 0; + + for (unsigned i = 0; i < flagsStr.size(); i++) { + switch (flagsStr[i]) { + case 'a': + flags |= ELF::SHF_ALLOC; + break; + case 'e': + flags |= ELF::SHF_EXCLUDE; + break; + case 'x': + flags |= ELF::SHF_EXECINSTR; + break; + case 'w': + flags |= ELF::SHF_WRITE; + break; + case 'M': + flags |= ELF::SHF_MERGE; + break; + case 'S': + flags |= ELF::SHF_STRINGS; + break; + case 'T': + flags |= ELF::SHF_TLS; + break; + case 'c': + flags |= ELF::XCORE_SHF_CP_SECTION; + break; + case 'd': + flags |= ELF::XCORE_SHF_DP_SECTION; + break; + case 'G': + flags |= ELF::SHF_GROUP; + break; + case '?': + *UseLastGroup = true; + break; + default: + return -1U; + } + } + + return flags; +} + +unsigned ELFAsmParser::parseSunStyleSectionFlags() { + unsigned flags = 0; + while (getLexer().is(AsmToken::Hash)) { + Lex(); // Eat the #. + + if (!getLexer().is(AsmToken::Identifier)) + return -1U; + + StringRef flagId = getTok().getIdentifier(); + if (flagId == "alloc") + flags |= ELF::SHF_ALLOC; + else if (flagId == "execinstr") + flags |= ELF::SHF_EXECINSTR; + else if (flagId == "write") + flags |= ELF::SHF_WRITE; + else if (flagId == "tls") + flags |= ELF::SHF_TLS; + else + return -1U; + + Lex(); // Eat the flag. + + if (!getLexer().is(AsmToken::Comma)) + break; + Lex(); // Eat the comma. + } + return flags; +} + + +bool ELFAsmParser::ParseDirectivePushSection(StringRef s, SMLoc loc) { + getStreamer().PushSection(); + + if (ParseSectionArguments(/*IsPush=*/true, loc)) { + getStreamer().PopSection(); + return true; + } + + return false; +} + +bool ELFAsmParser::ParseDirectivePopSection(StringRef, SMLoc) { + if (!getStreamer().PopSection()) + return TokError(".popsection without corresponding .pushsection"); + return false; +} + +// FIXME: This is a work in progress. +bool ELFAsmParser::ParseDirectiveSection(StringRef, SMLoc loc) { + return ParseSectionArguments(/*IsPush=*/false, loc); +} + +bool ELFAsmParser::ParseSectionArguments(bool IsPush, SMLoc loc) +{ + StringRef SectionName; + + if (ParseSectionName(SectionName)) + return TokError("expected identifier in directive"); + + StringRef TypeName; + int64_t Size = 0; + StringRef GroupName; + unsigned Flags = 0; + const MCExpr *Subsection = nullptr; + bool UseLastGroup = false; + StringRef UniqueStr; + int64_t UniqueID = ~0; + + // Set the defaults first. + if (SectionName == ".fini" || SectionName == ".init" || + SectionName == ".rodata") + Flags |= ELF::SHF_ALLOC; + if (SectionName == ".fini" || SectionName == ".init") + Flags |= ELF::SHF_EXECINSTR; + + if (getLexer().is(AsmToken::Comma)) { + Lex(); + + if (IsPush && getLexer().isNot(AsmToken::String)) { + if (getParser().parseExpression(Subsection)) + return true; + if (getLexer().isNot(AsmToken::Comma)) + goto EndStmt; + Lex(); + } + + unsigned extraFlags; + + if (getLexer().isNot(AsmToken::String)) { + if (!getContext().getAsmInfo()->usesSunStyleELFSectionSwitchSyntax() + || getLexer().isNot(AsmToken::Hash)) + return TokError("expected string in directive"); + extraFlags = parseSunStyleSectionFlags(); + } else { + bool valid; + StringRef FlagsStr = getTok().getStringContents(valid); + if (!valid) + return true; + Lex(); + extraFlags = parseSectionFlags(FlagsStr, &UseLastGroup); + } + + if (extraFlags == -1U) + return TokError("unknown flag"); + Flags |= extraFlags; + + bool Mergeable = Flags & ELF::SHF_MERGE; + bool Group = Flags & ELF::SHF_GROUP; + if (Group && UseLastGroup) + return TokError("Section cannot specify a group name while also acting " + "as a member of the last group"); + + if (getLexer().isNot(AsmToken::Comma)) { + if (Mergeable) + return TokError("Mergeable section must specify the type"); + if (Group) + return TokError("Group section must specify the type"); + } else { + Lex(); + if (getLexer().is(AsmToken::At) || getLexer().is(AsmToken::Percent) || + getLexer().is(AsmToken::String)) { + if (!getLexer().is(AsmToken::String)) + Lex(); + } else + return TokError("expected '@', '%' or \"\""); + + if (getParser().parseIdentifier(TypeName)) + return TokError("expected identifier in directive"); + + if (Mergeable) { + if (getLexer().isNot(AsmToken::Comma)) + return TokError("expected the entry size"); + Lex(); + if (getParser().parseAbsoluteExpression(Size)) + return true; + if (Size <= 0) + return TokError("entry size must be positive"); + } + + if (Group) { + if (getLexer().isNot(AsmToken::Comma)) + return TokError("expected group name"); + Lex(); + if (getParser().parseIdentifier(GroupName)) + return true; + if (getLexer().is(AsmToken::Comma)) { + Lex(); + StringRef Linkage; + if (getParser().parseIdentifier(Linkage)) + return true; + if (Linkage != "comdat") + return TokError("Linkage must be 'comdat'"); + } + } + if (getLexer().is(AsmToken::Comma)) { + Lex(); + if (getParser().parseIdentifier(UniqueStr)) + return TokError("expected identifier in directive"); + if (UniqueStr != "unique") + return TokError("expected 'unique'"); + if (getLexer().isNot(AsmToken::Comma)) + return TokError("expected commma"); + Lex(); + if (getParser().parseAbsoluteExpression(UniqueID)) + return true; + if (UniqueID < 0) + return TokError("unique id must be positive"); + if (!isUInt<32>(UniqueID) || UniqueID == ~0U) + return TokError("unique id is too large"); + } + } + } + +EndStmt: + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in directive"); + + unsigned Type = ELF::SHT_PROGBITS; + + if (TypeName.empty()) { + if (SectionName.startswith(".note")) + Type = ELF::SHT_NOTE; + else if (SectionName == ".init_array") + Type = ELF::SHT_INIT_ARRAY; + else if (SectionName == ".fini_array") + Type = ELF::SHT_FINI_ARRAY; + else if (SectionName == ".preinit_array") + Type = ELF::SHT_PREINIT_ARRAY; + } else { + if (TypeName == "init_array") + Type = ELF::SHT_INIT_ARRAY; + else if (TypeName == "fini_array") + Type = ELF::SHT_FINI_ARRAY; + else if (TypeName == "preinit_array") + Type = ELF::SHT_PREINIT_ARRAY; + else if (TypeName == "nobits") + Type = ELF::SHT_NOBITS; + else if (TypeName == "progbits") + Type = ELF::SHT_PROGBITS; + else if (TypeName == "note") + Type = ELF::SHT_NOTE; + else if (TypeName == "unwind") + Type = ELF::SHT_X86_64_UNWIND; + else + return TokError("unknown section type"); + } + + if (UseLastGroup) { + MCSectionSubPair CurrentSection = getStreamer().getCurrentSection(); + if (const MCSectionELF *Section = + cast_or_null(CurrentSection.first)) + if (const MCSymbol *Group = Section->getGroup()) { + GroupName = Group->getName(); + Flags |= ELF::SHF_GROUP; + } + } + + MCSection *ELFSection = getContext().getELFSection(SectionName, Type, Flags, + Size, GroupName, UniqueID); + getStreamer().SwitchSection(ELFSection, Subsection); + + if (getContext().getGenDwarfForAssembly()) { + bool InsertResult = getContext().addGenDwarfSection(ELFSection); + if (InsertResult) { + if (getContext().getDwarfVersion() <= 2) + Warning(loc, "DWARF2 only supports one section per compilation unit"); + + if (!ELFSection->getBeginSymbol()) { + MCSymbol *SectionStartSymbol = getContext().createTempSymbol(); + getStreamer().EmitLabel(SectionStartSymbol); + ELFSection->setBeginSymbol(SectionStartSymbol); + } + } + } + + return false; +} + +bool ELFAsmParser::ParseDirectivePrevious(StringRef DirName, SMLoc) { + MCSectionSubPair PreviousSection = getStreamer().getPreviousSection(); + if (PreviousSection.first == nullptr) + return TokError(".previous without corresponding .section"); + getStreamer().SwitchSection(PreviousSection.first, PreviousSection.second); + + return false; +} + +static MCSymbolAttr MCAttrForString(StringRef Type) { + return StringSwitch(Type) + .Cases("STT_FUNC", "function", MCSA_ELF_TypeFunction) + .Cases("STT_OBJECT", "object", MCSA_ELF_TypeObject) + .Cases("STT_TLS", "tls_object", MCSA_ELF_TypeTLS) + .Cases("STT_COMMON", "common", MCSA_ELF_TypeCommon) + .Cases("STT_NOTYPE", "notype", MCSA_ELF_TypeNoType) + .Cases("STT_GNU_IFUNC", "gnu_indirect_function", + MCSA_ELF_TypeIndFunction) + .Case("gnu_unique_object", MCSA_ELF_TypeGnuUniqueObject) + .Default(MCSA_Invalid); +} + +/// ParseDirectiveELFType +/// ::= .type identifier , STT_ +/// ::= .type identifier , #attribute +/// ::= .type identifier , @attribute +/// ::= .type identifier , %attribute +/// ::= .type identifier , "attribute" +bool ELFAsmParser::ParseDirectiveType(StringRef, SMLoc) { + StringRef Name; + if (getParser().parseIdentifier(Name)) + return TokError("expected identifier in directive"); + + // Handle the identifier as the key symbol. + MCSymbol *Sym = getContext().getOrCreateSymbol(Name); + + // NOTE the comma is optional in all cases. It is only documented as being + // optional in the first case, however, GAS will silently treat the comma as + // optional in all cases. Furthermore, although the documentation states that + // the first form only accepts STT_, in reality, GAS + // accepts both the upper case name as well as the lower case aliases. + if (getLexer().is(AsmToken::Comma)) + Lex(); + + if (getLexer().isNot(AsmToken::Identifier) && + getLexer().isNot(AsmToken::Hash) && + getLexer().isNot(AsmToken::Percent) && + getLexer().isNot(AsmToken::String)) { + if (!getLexer().getAllowAtInIdentifier()) + return TokError("expected STT_, '#', " + "'%' or \"\""); + else if (getLexer().isNot(AsmToken::At)) + return TokError("expected STT_, '#', '@', " + "'%' or \"\""); + } + + if (getLexer().isNot(AsmToken::String) && + getLexer().isNot(AsmToken::Identifier)) + Lex(); + + SMLoc TypeLoc = getLexer().getLoc(); + + StringRef Type; + if (getParser().parseIdentifier(Type)) + return TokError("expected symbol type in directive"); + + MCSymbolAttr Attr = MCAttrForString(Type); + if (Attr == MCSA_Invalid) + return Error(TypeLoc, "unsupported attribute in '.type' directive"); + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in '.type' directive"); + Lex(); + + getStreamer().EmitSymbolAttribute(Sym, Attr); + + return false; +} + +/// ParseDirectiveIdent +/// ::= .ident string +bool ELFAsmParser::ParseDirectiveIdent(StringRef, SMLoc) { + if (getLexer().isNot(AsmToken::String)) + return TokError("unexpected token in '.ident' directive"); + + StringRef Data = getTok().getIdentifier(); + + Lex(); + + getStreamer().EmitIdent(Data); + return false; +} + +/// ParseDirectiveSymver +/// ::= .symver foo, bar2@zed +bool ELFAsmParser::ParseDirectiveSymver(StringRef, SMLoc) { + StringRef Name; + if (getParser().parseIdentifier(Name)) + return TokError("expected identifier in directive"); + + if (getLexer().isNot(AsmToken::Comma)) + return TokError("expected a comma"); + + // ARM assembly uses @ for a comment... + // except when parsing the second parameter of the .symver directive. + // Force the next symbol to allow @ in the identifier, which is + // required for this directive and then reset it to its initial state. + const bool AllowAtInIdentifier = getLexer().getAllowAtInIdentifier(); + getLexer().setAllowAtInIdentifier(true); + Lex(); + getLexer().setAllowAtInIdentifier(AllowAtInIdentifier); + + StringRef AliasName; + if (getParser().parseIdentifier(AliasName)) + return TokError("expected identifier in directive"); + + if (AliasName.find('@') == StringRef::npos) + return TokError("expected a '@' in the name"); + + MCSymbol *Alias = getContext().getOrCreateSymbol(AliasName); + MCSymbol *Sym = getContext().getOrCreateSymbol(Name); + const MCExpr *Value = MCSymbolRefExpr::create(Sym, getContext()); + + getStreamer().EmitAssignment(Alias, Value); + return false; +} + +/// ParseDirectiveVersion +/// ::= .version string +bool ELFAsmParser::ParseDirectiveVersion(StringRef, SMLoc) +{ + bool Error; + if (getLexer().isNot(AsmToken::String)) + return TokError("unexpected token in '.version' directive"); + + StringRef Data = getTok().getIdentifier(); + + Lex(); + + MCSection *Note = getContext().getELFSection(".note", ELF::SHT_NOTE, 0); + + getStreamer().PushSection(); + getStreamer().SwitchSection(Note); + getStreamer().EmitIntValue(Data.size()+1, 4, Error); // namesz. + if (Error) + return true; + getStreamer().EmitIntValue(0, 4, Error); // descsz = 0 (no description). + getStreamer().EmitIntValue(1, 4, Error); // type = NT_VERSION. + getStreamer().EmitBytes(Data); // name. + getStreamer().EmitIntValue(0, 1, Error); // terminate the string. + getStreamer().EmitValueToAlignment(4); // ensure 4 byte alignment. + getStreamer().PopSection(); + return false; +} + +/// ParseDirectiveWeakref +/// ::= .weakref foo, bar +bool ELFAsmParser::ParseDirectiveWeakref(StringRef, SMLoc) { + // FIXME: Share code with the other alias building directives. + + StringRef AliasName; + if (getParser().parseIdentifier(AliasName)) + return TokError("expected identifier in directive"); + + if (getLexer().isNot(AsmToken::Comma)) + return TokError("expected a comma"); + + Lex(); + + StringRef Name; + if (getParser().parseIdentifier(Name)) + return TokError("expected identifier in directive"); + + MCSymbol *Alias = getContext().getOrCreateSymbol(AliasName); + + MCSymbol *Sym = getContext().getOrCreateSymbol(Name); + + getStreamer().EmitWeakReference(Alias, Sym); + return false; +} + +bool ELFAsmParser::ParseDirectiveSubsection(StringRef, SMLoc) { + const MCExpr *Subsection = nullptr; + if (getLexer().isNot(AsmToken::EndOfStatement)) { + if (getParser().parseExpression(Subsection)) + return true; + } + + if (getLexer().isNot(AsmToken::EndOfStatement)) + return TokError("unexpected token in directive"); + + getStreamer().SubSection(Subsection); + return false; +} + +namespace llvm_ks { + +MCAsmParserExtension *createELFAsmParser() { + return new ELFAsmParser; +} + +} diff --git a/llvm/lib/MC/MCParser/LLVMBuild.txt b/llvm/lib/MC/MCParser/LLVMBuild.txt new file mode 100644 index 0000000..bcb0feb --- /dev/null +++ b/llvm/lib/MC/MCParser/LLVMBuild.txt @@ -0,0 +1,22 @@ +;===- ./lib/MC/MCParser/LLVMBuild.txt --------------------------*- Conf -*--===; +; +; The LLVM Compiler Infrastructure +; +; This file is distributed under the University of Illinois Open Source +; License. See LICENSE.TXT for details. +; +;===------------------------------------------------------------------------===; +; +; This is an LLVMBuild description file for the components in this subdirectory. +; +; For more information on the LLVMBuild system, please see: +; +; http://llvm.org/docs/LLVMBuild.html +; +;===------------------------------------------------------------------------===; + +[component_0] +type = Library +name = MCParser +parent = MC +required_libraries = MC Support diff --git a/llvm/lib/MC/MCParser/MCAsmLexer.cpp b/llvm/lib/MC/MCParser/MCAsmLexer.cpp new file mode 100644 index 0000000..a812e33 --- /dev/null +++ b/llvm/lib/MC/MCParser/MCAsmLexer.cpp @@ -0,0 +1,36 @@ +//===-- MCAsmLexer.cpp - Abstract Asm Lexer Interface ---------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCParser/MCAsmLexer.h" +#include "llvm/Support/SourceMgr.h" + +using namespace llvm_ks; + +MCAsmLexer::MCAsmLexer() : TokStart(nullptr), SkipSpace(true) { + CurTok.emplace_back(AsmToken::Error, StringRef()); +} + +MCAsmLexer::~MCAsmLexer() { +} + +SMLoc MCAsmLexer::getLoc() const { + return SMLoc::getFromPointer(TokStart); +} + +SMLoc AsmToken::getLoc() const { + return SMLoc::getFromPointer(Str.data()); +} + +SMLoc AsmToken::getEndLoc() const { + return SMLoc::getFromPointer(Str.data() + Str.size()); +} + +SMRange AsmToken::getLocRange() const { + return SMRange(getLoc(), getEndLoc()); +} diff --git a/llvm/lib/MC/MCParser/MCAsmParser.cpp b/llvm/lib/MC/MCParser/MCAsmParser.cpp new file mode 100644 index 0000000..dcd1638 --- /dev/null +++ b/llvm/lib/MC/MCParser/MCAsmParser.cpp @@ -0,0 +1,47 @@ +//===-- MCAsmParser.cpp - Abstract Asm Parser Interface -------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCParser/MCAsmParser.h" +#include "llvm/ADT/Twine.h" +#include "llvm/MC/MCParser/MCAsmLexer.h" +#include "llvm/MC/MCParser/MCParsedAsmOperand.h" +#include "llvm/MC/MCParser/MCTargetAsmParser.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/SourceMgr.h" +#include "llvm/Support/raw_ostream.h" +using namespace llvm_ks; + +MCAsmParser::MCAsmParser() : TargetParser(nullptr), KsError(0) { +} + +MCAsmParser::~MCAsmParser() { +} + +void MCAsmParser::setTargetParser(MCTargetAsmParser &P) { + assert(!TargetParser && "Target parser is already initialized!"); + TargetParser = &P; + TargetParser->Initialize(*this); +} + +const AsmToken &MCAsmParser::getTok() const { + return getLexer().getTok(); +} + +bool MCAsmParser::TokError(const Twine &Msg, ArrayRef Ranges) { + Error(getLexer().getLoc(), Msg, Ranges); + return true; +} + +bool MCAsmParser::parseExpression(const MCExpr *&Res) { + SMLoc L; + return parseExpression(Res, L); +} + +LLVM_DUMP_METHOD void MCParsedAsmOperand::dump() const { +} diff --git a/llvm/lib/MC/MCParser/MCAsmParserExtension.cpp b/llvm/lib/MC/MCParser/MCAsmParserExtension.cpp new file mode 100644 index 0000000..6552d4e --- /dev/null +++ b/llvm/lib/MC/MCParser/MCAsmParserExtension.cpp @@ -0,0 +1,22 @@ +//===-- MCAsmParserExtension.cpp - Asm Parser Hooks -----------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCParser/MCAsmParserExtension.h" +using namespace llvm_ks; + +MCAsmParserExtension::MCAsmParserExtension() : + BracketExpressionsSupported(false) { +} + +MCAsmParserExtension::~MCAsmParserExtension() { +} + +void MCAsmParserExtension::Initialize(MCAsmParser &Parser) { + this->Parser = &Parser; +} diff --git a/llvm/lib/MC/MCParser/MCTargetAsmParser.cpp b/llvm/lib/MC/MCParser/MCTargetAsmParser.cpp new file mode 100644 index 0000000..f884316 --- /dev/null +++ b/llvm/lib/MC/MCParser/MCTargetAsmParser.cpp @@ -0,0 +1,32 @@ +//===-- MCTargetAsmParser.cpp - Target Assembly Parser ---------------------==// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCParser/MCTargetAsmParser.h" +#include "llvm/MC/MCContext.h" +using namespace llvm_ks; + +MCTargetAsmParser::MCTargetAsmParser(MCTargetOptions const &MCOptions, + const MCSubtargetInfo &STI) + : AvailableFeatures(0), ParsingInlineAsm(false), MCOptions(MCOptions), + STI(&STI) +{ +} + +MCTargetAsmParser::~MCTargetAsmParser() { +} + +MCSubtargetInfo &MCTargetAsmParser::copySTI() { + MCSubtargetInfo &STICopy = getContext().getSubtargetCopy(getSTI()); + STI = &STICopy; + return STICopy; +} + +const MCSubtargetInfo &MCTargetAsmParser::getSTI() const { + return *STI; +} diff --git a/llvm/lib/MC/MCRegisterInfo.cpp b/llvm/lib/MC/MCRegisterInfo.cpp new file mode 100644 index 0000000..f2c1cca --- /dev/null +++ b/llvm/lib/MC/MCRegisterInfo.cpp @@ -0,0 +1,86 @@ +//=== MC/MCRegisterInfo.cpp - Target Register Description -------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements MCRegisterInfo functions. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCRegisterInfo.h" + +using namespace llvm_ks; + +unsigned MCRegisterInfo::getMatchingSuperReg(unsigned Reg, unsigned SubIdx, + const MCRegisterClass *RC) const { + for (MCSuperRegIterator Supers(Reg, this); Supers.isValid(); ++Supers) + if (RC->contains(*Supers) && Reg == getSubReg(*Supers, SubIdx)) + return *Supers; + return 0; +} + +unsigned MCRegisterInfo::getSubReg(unsigned Reg, unsigned Idx) const { + assert(Idx && Idx < getNumSubRegIndices() && + "This is not a subregister index"); + // Get a pointer to the corresponding SubRegIndices list. This list has the + // name of each sub-register in the same order as MCSubRegIterator. + const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices; + for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI) + if (*SRI == Idx) + return *Subs; + return 0; +} + +unsigned MCRegisterInfo::getSubRegIndex(unsigned Reg, unsigned SubReg) const { + assert(SubReg && SubReg < getNumRegs() && "This is not a register"); + // Get a pointer to the corresponding SubRegIndices list. This list has the + // name of each sub-register in the same order as MCSubRegIterator. + const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices; + for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI) + if (*Subs == SubReg) + return *SRI; + return 0; +} + +unsigned MCRegisterInfo::getSubRegIdxSize(unsigned Idx) const { + assert(Idx && Idx < getNumSubRegIndices() && + "This is not a subregister index"); + return SubRegIdxRanges[Idx].Size; +} + +unsigned MCRegisterInfo::getSubRegIdxOffset(unsigned Idx) const { + assert(Idx && Idx < getNumSubRegIndices() && + "This is not a subregister index"); + return SubRegIdxRanges[Idx].Offset; +} + +int MCRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const { + const DwarfLLVMRegPair *M = isEH ? EHL2DwarfRegs : L2DwarfRegs; + unsigned Size = isEH ? EHL2DwarfRegsSize : L2DwarfRegsSize; + + DwarfLLVMRegPair Key = { RegNum, 0 }; + const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key); + if (I == M+Size || I->FromReg != RegNum) + return -1; + return I->ToReg; +} + +int MCRegisterInfo::getLLVMRegNum(unsigned RegNum, bool isEH) const { + const DwarfLLVMRegPair *M = isEH ? EHDwarf2LRegs : Dwarf2LRegs; + unsigned Size = isEH ? EHDwarf2LRegsSize : Dwarf2LRegsSize; + + DwarfLLVMRegPair Key = { RegNum, 0 }; + const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key); + assert(I != M+Size && I->FromReg == RegNum && "Invalid RegNum"); + return I->ToReg; +} + +int MCRegisterInfo::getSEHRegNum(unsigned RegNum) const { + const DenseMap::const_iterator I = L2SEHRegs.find(RegNum); + if (I == L2SEHRegs.end()) return (int)RegNum; + return I->second; +} diff --git a/llvm/lib/MC/MCSection.cpp b/llvm/lib/MC/MCSection.cpp new file mode 100644 index 0000000..8889aaf --- /dev/null +++ b/llvm/lib/MC/MCSection.cpp @@ -0,0 +1,109 @@ +//===- lib/MC/MCSection.cpp - Machine Code Section Representation ---------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCSection.h" +#include "llvm/MC/MCAssembler.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/Support/raw_ostream.h" +using namespace llvm_ks; + +//===----------------------------------------------------------------------===// +// MCSection +//===----------------------------------------------------------------------===// + +MCSection::MCSection(SectionVariant V, SectionKind K, MCSymbol *Begin) + : Begin(Begin), BundleGroupBeforeFirstInst(false), HasInstructions(false), + IsRegistered(false), DummyFragment(this), Variant(V), Kind(K) {} + +MCSymbol *MCSection::getEndSymbol(MCContext &Ctx) { + if (!End) + End = Ctx.createTempSymbol("sec_end", true); + return End; +} + +bool MCSection::hasEnded() const { return End && End->isInSection(); } + +MCSection::~MCSection() { +} + +void MCSection::setBundleLockState(BundleLockStateType NewState) { + if (NewState == NotBundleLocked) { + if (BundleLockNestingDepth == 0) { + report_fatal_error("Mismatched bundle_lock/unlock directives"); + } + if (--BundleLockNestingDepth == 0) { + BundleLockState = NotBundleLocked; + } + return; + } + + // If any of the directives is an align_to_end directive, the whole nested + // group is align_to_end. So don't downgrade from align_to_end to just locked. + if (BundleLockState != BundleLockedAlignToEnd) { + BundleLockState = NewState; + } + ++BundleLockNestingDepth; +} + +MCSection::iterator +MCSection::getSubsectionInsertionPoint(unsigned Subsection) { + if (Subsection == 0 && SubsectionFragmentMap.empty()) + return end(); + + SmallVectorImpl>::iterator MI = + std::lower_bound(SubsectionFragmentMap.begin(), + SubsectionFragmentMap.end(), + std::make_pair(Subsection, (MCFragment *)nullptr)); + bool ExactMatch = false; + if (MI != SubsectionFragmentMap.end()) { + ExactMatch = MI->first == Subsection; + if (ExactMatch) + ++MI; + } + iterator IP; + if (MI == SubsectionFragmentMap.end()) + IP = end(); + else + IP = MI->second->getIterator(); + if (!ExactMatch && Subsection != 0) { + // The GNU as documentation claims that subsections have an alignment of 4, + // although this appears not to be the case. + MCFragment *F = new MCDataFragment(); + SubsectionFragmentMap.insert(MI, std::make_pair(Subsection, F)); + getFragmentList().insert(IP, F); + F->setParent(this); + } + + return IP; +} + +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +LLVM_DUMP_METHOD void MCSection::dump() { + raw_ostream &OS = llvm_ks::errs(); + + OS << "dump(); + } + OS << "]>"; +} +#endif + +MCSection::iterator MCSection::begin() { return Fragments.begin(); } + +MCSection::iterator MCSection::end() { return Fragments.end(); } + +MCSection::reverse_iterator MCSection::rbegin() { return Fragments.rbegin(); } + +MCSection::reverse_iterator MCSection::rend() { return Fragments.rend(); } diff --git a/llvm/lib/MC/MCSectionCOFF.cpp b/llvm/lib/MC/MCSectionCOFF.cpp new file mode 100644 index 0000000..3ebee26 --- /dev/null +++ b/llvm/lib/MC/MCSectionCOFF.cpp @@ -0,0 +1,109 @@ +//===- lib/MC/MCSectionCOFF.cpp - COFF Code Section Representation --------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCSectionCOFF.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/Support/COFF.h" +#include "llvm/Support/raw_ostream.h" +using namespace llvm_ks; + +MCSectionCOFF::~MCSectionCOFF() {} // anchor. + +// ShouldOmitSectionDirective - Decides whether a '.section' directive +// should be printed before the section name +bool MCSectionCOFF::ShouldOmitSectionDirective(StringRef Name, + const MCAsmInfo &MAI) const { + if (COMDATSymbol) + return false; + + // FIXME: Does .section .bss/.data/.text work everywhere?? + if (Name == ".text" || Name == ".data" || Name == ".bss") + return true; + + return false; +} + +void MCSectionCOFF::setSelection(int Selection) const { + assert(Selection != 0 && "invalid COMDAT selection type"); + this->Selection = Selection; + Characteristics |= COFF::IMAGE_SCN_LNK_COMDAT; +} + +void MCSectionCOFF::PrintSwitchToSection(const MCAsmInfo &MAI, + raw_ostream &OS, + const MCExpr *Subsection) const { + + // standard sections don't require the '.section' + if (ShouldOmitSectionDirective(SectionName, MAI)) { + OS << '\t' << getSectionName() << '\n'; + return; + } + + OS << "\t.section\t" << getSectionName() << ",\""; + if (getCharacteristics() & COFF::IMAGE_SCN_CNT_INITIALIZED_DATA) + OS << 'd'; + if (getCharacteristics() & COFF::IMAGE_SCN_CNT_UNINITIALIZED_DATA) + OS << 'b'; + if (getCharacteristics() & COFF::IMAGE_SCN_MEM_EXECUTE) + OS << 'x'; + if (getCharacteristics() & COFF::IMAGE_SCN_MEM_WRITE) + OS << 'w'; + else if (getCharacteristics() & COFF::IMAGE_SCN_MEM_READ) + OS << 'r'; + else + OS << 'y'; + if (getCharacteristics() & COFF::IMAGE_SCN_LNK_REMOVE) + OS << 'n'; + if (getCharacteristics() & COFF::IMAGE_SCN_MEM_SHARED) + OS << 's'; + OS << '"'; + + if (getCharacteristics() & COFF::IMAGE_SCN_LNK_COMDAT) { + OS << ","; + switch (Selection) { + case COFF::IMAGE_COMDAT_SELECT_NODUPLICATES: + OS << "one_only,"; + break; + case COFF::IMAGE_COMDAT_SELECT_ANY: + OS << "discard,"; + break; + case COFF::IMAGE_COMDAT_SELECT_SAME_SIZE: + OS << "same_size,"; + break; + case COFF::IMAGE_COMDAT_SELECT_EXACT_MATCH: + OS << "same_contents,"; + break; + case COFF::IMAGE_COMDAT_SELECT_ASSOCIATIVE: + OS << "associative,"; + break; + case COFF::IMAGE_COMDAT_SELECT_LARGEST: + OS << "largest,"; + break; + case COFF::IMAGE_COMDAT_SELECT_NEWEST: + OS << "newest,"; + break; + default: + assert (0 && "unsupported COFF selection type"); + break; + } + assert(COMDATSymbol); + COMDATSymbol->print(OS, &MAI); + } + OS << '\n'; +} + +bool MCSectionCOFF::UseCodeAlign() const { + return getKind().isText(); +} + +bool MCSectionCOFF::isVirtualSection() const { + return getCharacteristics() & COFF::IMAGE_SCN_CNT_UNINITIALIZED_DATA; +} diff --git a/llvm/lib/MC/MCSectionELF.cpp b/llvm/lib/MC/MCSectionELF.cpp new file mode 100644 index 0000000..9f5d386 --- /dev/null +++ b/llvm/lib/MC/MCSectionELF.cpp @@ -0,0 +1,168 @@ +//===- lib/MC/MCSectionELF.cpp - ELF Code Section Representation ----------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCSectionELF.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/Support/ELF.h" +#include "llvm/Support/raw_ostream.h" + +using namespace llvm_ks; + +MCSectionELF::~MCSectionELF() {} // anchor. + +// Decides whether a '.section' directive +// should be printed before the section name. +bool MCSectionELF::ShouldOmitSectionDirective(StringRef Name, + const MCAsmInfo &MAI) const { + + if (isUnique()) + return false; + + return MAI.shouldOmitSectionDirective(Name); +} + +static void printName(raw_ostream &OS, StringRef Name) { + if (Name.find_first_not_of("0123456789_." + "abcdefghijklmnopqrstuvwxyz" + "ABCDEFGHIJKLMNOPQRSTUVWXYZ") == Name.npos) { + OS << Name; + return; + } + OS << '"'; + for (const char *B = Name.begin(), *E = Name.end(); B < E; ++B) { + if (*B == '"') // Unquoted " + OS << "\\\""; + else if (*B != '\\') // Neither " or backslash + OS << *B; + else if (B + 1 == E) // Trailing backslash + OS << "\\\\"; + else { + OS << B[0] << B[1]; // Quoted character + ++B; + } + } + OS << '"'; +} + +void MCSectionELF::PrintSwitchToSection(const MCAsmInfo &MAI, + raw_ostream &OS, + const MCExpr *Subsection) const { + + if (ShouldOmitSectionDirective(SectionName, MAI)) { + OS << '\t' << getSectionName(); + if (Subsection) { + OS << '\t'; + Subsection->print(OS, &MAI); + } + OS << '\n'; + return; + } + + OS << "\t.section\t"; + printName(OS, getSectionName()); + + // Handle the weird solaris syntax if desired. + if (MAI.usesSunStyleELFSectionSwitchSyntax() && + !(Flags & ELF::SHF_MERGE)) { + if (Flags & ELF::SHF_ALLOC) + OS << ",#alloc"; + if (Flags & ELF::SHF_EXECINSTR) + OS << ",#execinstr"; + if (Flags & ELF::SHF_WRITE) + OS << ",#write"; + if (Flags & ELF::SHF_EXCLUDE) + OS << ",#exclude"; + if (Flags & ELF::SHF_TLS) + OS << ",#tls"; + OS << '\n'; + return; + } + + OS << ",\""; + if (Flags & ELF::SHF_ALLOC) + OS << 'a'; + if (Flags & ELF::SHF_EXCLUDE) + OS << 'e'; + if (Flags & ELF::SHF_EXECINSTR) + OS << 'x'; + if (Flags & ELF::SHF_GROUP) + OS << 'G'; + if (Flags & ELF::SHF_WRITE) + OS << 'w'; + if (Flags & ELF::SHF_MERGE) + OS << 'M'; + if (Flags & ELF::SHF_STRINGS) + OS << 'S'; + if (Flags & ELF::SHF_TLS) + OS << 'T'; + + // If there are target-specific flags, print them. + if (Flags & ELF::XCORE_SHF_CP_SECTION) + OS << 'c'; + if (Flags & ELF::XCORE_SHF_DP_SECTION) + OS << 'd'; + + OS << '"'; + + OS << ','; + + // If comment string is '@', e.g. as on ARM - use '%' instead + if (MAI.getCommentString()[0] == '@') + OS << '%'; + else + OS << '@'; + + if (Type == ELF::SHT_INIT_ARRAY) + OS << "init_array"; + else if (Type == ELF::SHT_FINI_ARRAY) + OS << "fini_array"; + else if (Type == ELF::SHT_PREINIT_ARRAY) + OS << "preinit_array"; + else if (Type == ELF::SHT_NOBITS) + OS << "nobits"; + else if (Type == ELF::SHT_NOTE) + OS << "note"; + else if (Type == ELF::SHT_PROGBITS) + OS << "progbits"; + else if (Type == ELF::SHT_X86_64_UNWIND) + OS << "unwind"; + + if (EntrySize) { + assert(Flags & ELF::SHF_MERGE); + OS << "," << EntrySize; + } + + if (Flags & ELF::SHF_GROUP) { + OS << ","; + printName(OS, Group->getName()); + OS << ",comdat"; + } + + if (isUnique()) + OS << ",unique," << UniqueID; + + OS << '\n'; + + if (Subsection) { + OS << "\t.subsection\t"; + Subsection->print(OS, &MAI); + OS << '\n'; + } +} + +bool MCSectionELF::UseCodeAlign() const { + return getFlags() & ELF::SHF_EXECINSTR; +} + +bool MCSectionELF::isVirtualSection() const { + return getType() == ELF::SHT_NOBITS; +} diff --git a/llvm/lib/MC/MCSectionMachO.cpp b/llvm/lib/MC/MCSectionMachO.cpp new file mode 100644 index 0000000..c1cd99a --- /dev/null +++ b/llvm/lib/MC/MCSectionMachO.cpp @@ -0,0 +1,272 @@ +//===- lib/MC/MCSectionMachO.cpp - MachO Code Section Representation ------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCSectionMachO.h" +#include "llvm/MC/MCContext.h" +#include "llvm/Support/raw_ostream.h" +#include +using namespace llvm_ks; + +/// SectionTypeDescriptors - These are strings that describe the various section +/// types. This *must* be kept in order with and stay synchronized with the +/// section type list. +static const struct { + const char *AssemblerName, *EnumName; +} SectionTypeDescriptors[MachO::LAST_KNOWN_SECTION_TYPE+1] = { + { "regular", "S_REGULAR" }, // 0x00 + { nullptr, "S_ZEROFILL" }, // 0x01 + { "cstring_literals", "S_CSTRING_LITERALS" }, // 0x02 + { "4byte_literals", "S_4BYTE_LITERALS" }, // 0x03 + { "8byte_literals", "S_8BYTE_LITERALS" }, // 0x04 + { "literal_pointers", "S_LITERAL_POINTERS" }, // 0x05 + { "non_lazy_symbol_pointers", "S_NON_LAZY_SYMBOL_POINTERS" }, // 0x06 + { "lazy_symbol_pointers", "S_LAZY_SYMBOL_POINTERS" }, // 0x07 + { "symbol_stubs", "S_SYMBOL_STUBS" }, // 0x08 + { "mod_init_funcs", "S_MOD_INIT_FUNC_POINTERS" }, // 0x09 + { "mod_term_funcs", "S_MOD_TERM_FUNC_POINTERS" }, // 0x0A + { "coalesced", "S_COALESCED" }, // 0x0B + { nullptr, /*FIXME??*/ "S_GB_ZEROFILL" }, // 0x0C + { "interposing", "S_INTERPOSING" }, // 0x0D + { "16byte_literals", "S_16BYTE_LITERALS" }, // 0x0E + { nullptr, /*FIXME??*/ "S_DTRACE_DOF" }, // 0x0F + { nullptr, /*FIXME??*/ "S_LAZY_DYLIB_SYMBOL_POINTERS" }, // 0x10 + { "thread_local_regular", "S_THREAD_LOCAL_REGULAR" }, // 0x11 + { "thread_local_zerofill", "S_THREAD_LOCAL_ZEROFILL" }, // 0x12 + { "thread_local_variables", "S_THREAD_LOCAL_VARIABLES" }, // 0x13 + { "thread_local_variable_pointers", + "S_THREAD_LOCAL_VARIABLE_POINTERS" }, // 0x14 + { "thread_local_init_function_pointers", + "S_THREAD_LOCAL_INIT_FUNCTION_POINTERS"}, // 0x15 +}; + + +/// SectionAttrDescriptors - This is an array of descriptors for section +/// attributes. Unlike the SectionTypeDescriptors, this is not directly indexed +/// by attribute, instead it is searched. +static const struct { + unsigned AttrFlag; + const char *AssemblerName, *EnumName; +} SectionAttrDescriptors[] = { +#define ENTRY(ASMNAME, ENUM) \ + { MachO::ENUM, ASMNAME, #ENUM }, +ENTRY("pure_instructions", S_ATTR_PURE_INSTRUCTIONS) +ENTRY("no_toc", S_ATTR_NO_TOC) +ENTRY("strip_static_syms", S_ATTR_STRIP_STATIC_SYMS) +ENTRY("no_dead_strip", S_ATTR_NO_DEAD_STRIP) +ENTRY("live_support", S_ATTR_LIVE_SUPPORT) +ENTRY("self_modifying_code", S_ATTR_SELF_MODIFYING_CODE) +ENTRY("debug", S_ATTR_DEBUG) +ENTRY(nullptr /*FIXME*/, S_ATTR_SOME_INSTRUCTIONS) +ENTRY(nullptr /*FIXME*/, S_ATTR_EXT_RELOC) +ENTRY(nullptr /*FIXME*/, S_ATTR_LOC_RELOC) +#undef ENTRY + { 0, "none", nullptr }, // used if section has no attributes but has a stub size +}; + +MCSectionMachO::MCSectionMachO(StringRef Segment, StringRef Section, + unsigned TAA, unsigned reserved2, SectionKind K, + MCSymbol *Begin) + : MCSection(SV_MachO, K, Begin), TypeAndAttributes(TAA), + Reserved2(reserved2) { + assert(Segment.size() <= 16 && Section.size() <= 16 && + "Segment or section string too long"); + for (unsigned i = 0; i != 16; ++i) { + if (i < Segment.size()) + SegmentName[i] = Segment[i]; + else + SegmentName[i] = 0; + + if (i < Section.size()) + SectionName[i] = Section[i]; + else + SectionName[i] = 0; + } +} + +void MCSectionMachO::PrintSwitchToSection(const MCAsmInfo &MAI, + raw_ostream &OS, + const MCExpr *Subsection) const { + OS << "\t.section\t" << getSegmentName() << ',' << getSectionName(); + + // Get the section type and attributes. + unsigned TAA = getTypeAndAttributes(); + if (TAA == 0) { + OS << '\n'; + return; + } + + MachO::SectionType SectionType = getType(); + assert(SectionType <= MachO::LAST_KNOWN_SECTION_TYPE && + "Invalid SectionType specified!"); + + if (SectionTypeDescriptors[SectionType].AssemblerName) { + OS << ','; + OS << SectionTypeDescriptors[SectionType].AssemblerName; + } else { + // If we have no name for the attribute, stop here. + OS << '\n'; + return; + } + + // If we don't have any attributes, we're done. + unsigned SectionAttrs = TAA & MachO::SECTION_ATTRIBUTES; + if (SectionAttrs == 0) { + // If we have a S_SYMBOL_STUBS size specified, print it along with 'none' as + // the attribute specifier. + if (Reserved2 != 0) + OS << ",none," << Reserved2; + OS << '\n'; + return; + } + + // Check each attribute to see if we have it. + char Separator = ','; + for (unsigned i = 0; + SectionAttrs != 0 && SectionAttrDescriptors[i].AttrFlag; + ++i) { + // Check to see if we have this attribute. + if ((SectionAttrDescriptors[i].AttrFlag & SectionAttrs) == 0) + continue; + + // Yep, clear it and print it. + SectionAttrs &= ~SectionAttrDescriptors[i].AttrFlag; + + OS << Separator; + if (SectionAttrDescriptors[i].AssemblerName) + OS << SectionAttrDescriptors[i].AssemblerName; + else + OS << "<<" << SectionAttrDescriptors[i].EnumName << ">>"; + Separator = '+'; + } + + assert(SectionAttrs == 0 && "Unknown section attributes!"); + + // If we have a S_SYMBOL_STUBS size specified, print it. + if (Reserved2 != 0) + OS << ',' << Reserved2; + OS << '\n'; +} + +bool MCSectionMachO::UseCodeAlign() const { + return hasAttribute(MachO::S_ATTR_PURE_INSTRUCTIONS); +} + +bool MCSectionMachO::isVirtualSection() const { + return (getType() == MachO::S_ZEROFILL || + getType() == MachO::S_GB_ZEROFILL || + getType() == MachO::S_THREAD_LOCAL_ZEROFILL); +} + +/// ParseSectionSpecifier - Parse the section specifier indicated by "Spec". +/// This is a string that can appear after a .section directive in a mach-o +/// flavored .s file. If successful, this fills in the specified Out +/// parameters and returns an empty string. When an invalid section +/// specifier is present, this returns a string indicating the problem. +std::string MCSectionMachO::ParseSectionSpecifier(StringRef Spec, // In. + StringRef &Segment, // Out. + StringRef &Section, // Out. + unsigned &TAA, // Out. + bool &TAAParsed, // Out. + unsigned &StubSize) { // Out. + TAAParsed = false; + + SmallVector SplitSpec; + Spec.split(SplitSpec, ','); + // Remove leading and trailing whitespace. + auto GetEmptyOrTrim = [&SplitSpec](size_t Idx) -> StringRef { + return SplitSpec.size() > Idx ? SplitSpec[Idx].trim() : StringRef(); + }; + Segment = GetEmptyOrTrim(0); + Section = GetEmptyOrTrim(1); + StringRef SectionType = GetEmptyOrTrim(2); + StringRef Attrs = GetEmptyOrTrim(3); + StringRef StubSizeStr = GetEmptyOrTrim(4); + + // Verify that the segment is present and not too long. + if (Segment.empty() || Segment.size() > 16) + return "mach-o section specifier requires a segment whose length is " + "between 1 and 16 characters"; + + // Verify that the section is present and not too long. + if (Section.empty()) + return "mach-o section specifier requires a segment and section " + "separated by a comma"; + + if (Section.size() > 16) + return "mach-o section specifier requires a section whose length is " + "between 1 and 16 characters"; + + // If there is no comma after the section, we're done. + TAA = 0; + StubSize = 0; + if (SectionType.empty()) + return ""; + + // Figure out which section type it is. + auto TypeDescriptor = std::find_if( + std::begin(SectionTypeDescriptors), std::end(SectionTypeDescriptors), + [&](decltype(*SectionTypeDescriptors) &Descriptor) { + return Descriptor.AssemblerName && + SectionType == Descriptor.AssemblerName; + }); + + // If we didn't find the section type, reject it. + if (TypeDescriptor == std::end(SectionTypeDescriptors)) + return "mach-o section specifier uses an unknown section type"; + + // Remember the TypeID. + TAA = TypeDescriptor - std::begin(SectionTypeDescriptors); + TAAParsed = true; + + // If we have no comma after the section type, there are no attributes. + if (Attrs.empty()) { + // S_SYMBOL_STUBS always require a symbol stub size specifier. + if (TAA == MachO::S_SYMBOL_STUBS) + return "mach-o section specifier of type 'symbol_stubs' requires a size " + "specifier"; + return ""; + } + + // The attribute list is a '+' separated list of attributes. + SmallVector SectionAttrs; + Attrs.split(SectionAttrs, '+', /*MaxSplit=*/-1, /*KeepEmpty=*/false); + + for (StringRef &SectionAttr : SectionAttrs) { + auto AttrDescriptorI = std::find_if( + std::begin(SectionAttrDescriptors), std::end(SectionAttrDescriptors), + [&](decltype(*SectionAttrDescriptors) &Descriptor) { + return Descriptor.AssemblerName && + SectionAttr.trim() == Descriptor.AssemblerName; + }); + if (AttrDescriptorI == std::end(SectionAttrDescriptors)) + return "mach-o section specifier has invalid attribute"; + + TAA |= AttrDescriptorI->AttrFlag; + } + + // Okay, we've parsed the section attributes, see if we have a stub size spec. + if (StubSizeStr.empty()) { + // S_SYMBOL_STUBS always require a symbol stub size specifier. + if (TAA == MachO::S_SYMBOL_STUBS) + return "mach-o section specifier of type 'symbol_stubs' requires a size " + "specifier"; + return ""; + } + + // If we have a stub size spec, we must have a sectiontype of S_SYMBOL_STUBS. + if ((TAA & MachO::SECTION_TYPE) != MachO::S_SYMBOL_STUBS) + return "mach-o section specifier cannot have a stub size specified because " + "it does not have type 'symbol_stubs'"; + + // Convert the stub size from a string to an integer. + if (StubSizeStr.getAsInteger(0, StubSize)) + return "mach-o section specifier has a malformed stub size"; + + return ""; +} diff --git a/llvm/lib/MC/MCStreamer.cpp b/llvm/lib/MC/MCStreamer.cpp new file mode 100644 index 0000000..dca20ec --- /dev/null +++ b/llvm/lib/MC/MCStreamer.cpp @@ -0,0 +1,763 @@ +//===- lib/MC/MCStreamer.cpp - Streaming Machine Code Output --------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCStreamer.h" +#include "llvm/ADT/SmallString.h" +#include "llvm/ADT/Twine.h" +#include "llvm/MC/MCAsmBackend.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCInst.h" +#include "llvm/MC/MCObjectFileInfo.h" +#include "llvm/MC/MCObjectWriter.h" +#include "llvm/MC/MCSection.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/MC/MCWin64EH.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/LEB128.h" +#include "llvm/Support/raw_ostream.h" +#include + +//#include + +using namespace llvm_ks; + +// Pin the vtables to this file. +MCTargetStreamer::~MCTargetStreamer() {} + +MCTargetStreamer::MCTargetStreamer(MCStreamer &S) : Streamer(S) { + S.setTargetStreamer(this); +} + +void MCTargetStreamer::emitLabel(MCSymbol *Symbol) {} + +void MCTargetStreamer::finish() {} + +void MCTargetStreamer::emitAssignment(MCSymbol *Symbol, const MCExpr *Value) {} + +MCStreamer::MCStreamer(MCContext &Ctx) + : Context(Ctx), CurrentWinFrameInfo(nullptr) { + SectionStack.push_back(std::pair()); +} + +MCStreamer::~MCStreamer() { + for (unsigned i = 0; i < getNumWinFrameInfos(); ++i) + delete WinFrameInfos[i]; +} + +void MCStreamer::reset() { + DwarfFrameInfos.clear(); + for (unsigned i = 0; i < getNumWinFrameInfos(); ++i) + delete WinFrameInfos[i]; + WinFrameInfos.clear(); + CurrentWinFrameInfo = nullptr; + SymbolOrdering.clear(); + SectionStack.clear(); + SectionStack.push_back(std::pair()); +} + +raw_ostream &MCStreamer::GetCommentOS() { + // By default, discard comments. + return nulls(); +} + +void MCStreamer::emitRawComment(const Twine &T, bool TabPrefix) {} + +void MCStreamer::generateCompactUnwindEncodings(MCAsmBackend *MAB) { + for (auto &FI : DwarfFrameInfos) + FI.CompactUnwindEncoding = + (MAB ? MAB->generateCompactUnwindEncoding(FI.Instructions) : 0); +} + +/// EmitIntValue - Special case of EmitValue that avoids the client having to +/// pass in a MCExpr for constant integers. +void MCStreamer::EmitIntValue(uint64_t Value, unsigned Size, bool &Error) +{ + Error = false; + //assert(1 <= Size && Size <= 8 && "Invalid size"); + if (1 > Size || Size > 8) { + Error = true; + return; + } + //assert((isUIntN(8 * Size, Value) || isIntN(8 * Size, Value)) && + // "Invalid size"); + if (!isUIntN(8 * Size, Value) && !isIntN(8 * Size, Value)) { + Error = true; + return; + } + char buf[8]; + const bool isLittleEndian = Context.getAsmInfo()->isLittleEndian(); + for (unsigned i = 0; i != Size; ++i) { + unsigned index = isLittleEndian ? i : (Size - i - 1); + buf[i] = uint8_t(Value >> (index * 8)); + } + EmitBytes(StringRef(buf, Size)); +} + +/// EmitULEB128Value - Special case of EmitULEB128Value that avoids the +/// client having to pass in a MCExpr for constant integers. +void MCStreamer::EmitULEB128IntValue(uint64_t Value, unsigned Padding) { + SmallString<128> Tmp; + raw_svector_ostream OSE(Tmp); + encodeULEB128(Value, OSE, Padding); + EmitBytes(OSE.str()); +} + +/// EmitSLEB128Value - Special case of EmitSLEB128Value that avoids the +/// client having to pass in a MCExpr for constant integers. +void MCStreamer::EmitSLEB128IntValue(int64_t Value) { + SmallString<128> Tmp; + raw_svector_ostream OSE(Tmp); + encodeSLEB128(Value, OSE); + EmitBytes(OSE.str()); +} + +void MCStreamer::EmitValue(const MCExpr *Value, unsigned Size, SMLoc Loc) { + EmitValueImpl(Value, Size, Loc); +} + +void MCStreamer::EmitSymbolValue(const MCSymbol *Sym, unsigned Size, + bool IsSectionRelative) { + assert((!IsSectionRelative || Size == 4) && + "SectionRelative value requires 4-bytes"); + + if (!IsSectionRelative) + EmitValueImpl(MCSymbolRefExpr::create(Sym, getContext()), Size); + else + EmitCOFFSecRel32(Sym); +} + +void MCStreamer::EmitGPRel64Value(const MCExpr *Value) { + report_fatal_error("unsupported directive in streamer"); +} + +void MCStreamer::EmitGPRel32Value(const MCExpr *Value) { + report_fatal_error("unsupported directive in streamer"); +} + +/// EmitFill - Emit NumBytes bytes worth of the value specified by +/// FillValue. This implements directives such as '.space'. +void MCStreamer::EmitFill(uint64_t NumBytes, uint8_t FillValue) { + const MCExpr *E = MCConstantExpr::create(FillValue, getContext()); + for (uint64_t i = 0, e = NumBytes; i != e; ++i) + EmitValue(E, 1); +} + +/// The implementation in this class just redirects to EmitFill. +void MCStreamer::EmitZeros(uint64_t NumBytes) { + EmitFill(NumBytes, 0); +} + +unsigned MCStreamer::EmitDwarfFileDirective(unsigned FileNo, + StringRef Directory, + StringRef Filename, unsigned CUID) { + return getContext().getDwarfFile(Directory, Filename, FileNo, CUID); +} + +void MCStreamer::EmitDwarfLocDirective(unsigned FileNo, unsigned Line, + unsigned Column, unsigned Flags, + unsigned Isa, + unsigned Discriminator, + StringRef FileName) { + getContext().setCurrentDwarfLoc(FileNo, Line, Column, Flags, Isa, + Discriminator); +} + +MCSymbol *MCStreamer::getDwarfLineTableSymbol(unsigned CUID) { + MCDwarfLineTable &Table = getContext().getMCDwarfLineTable(CUID); + if (!Table.getLabel()) { + StringRef Prefix = Context.getAsmInfo()->getPrivateGlobalPrefix(); + Table.setLabel( + Context.getOrCreateSymbol(Prefix + "line_table_start" + Twine(CUID))); + } + return Table.getLabel(); +} + +MCDwarfFrameInfo *MCStreamer::getCurrentDwarfFrameInfo() { + if (DwarfFrameInfos.empty()) + return nullptr; + return &DwarfFrameInfos.back(); +} + +void MCStreamer::EnsureValidDwarfFrame() { + MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo(); + if (!CurFrame || CurFrame->End) + report_fatal_error("No open frame"); +} + +unsigned MCStreamer::EmitCVFileDirective(unsigned FileNo, StringRef Filename) { + return getContext().getCVFile(Filename, FileNo); +} + +void MCStreamer::EmitCVLocDirective(unsigned FunctionId, unsigned FileNo, + unsigned Line, unsigned Column, + bool PrologueEnd, bool IsStmt, + StringRef FileName) { + getContext().setCurrentCVLoc(FunctionId, FileNo, Line, Column, PrologueEnd, + IsStmt); +} + +void MCStreamer::EmitCVLinetableDirective(unsigned FunctionId, + const MCSymbol *Begin, + const MCSymbol *End) {} + +void MCStreamer::EmitCVInlineLinetableDirective( + unsigned PrimaryFunctionId, unsigned SourceFileId, unsigned SourceLineNum, + ArrayRef SecondaryFunctionIds) {} + +void MCStreamer::EmitEHSymAttributes(const MCSymbol *Symbol, + MCSymbol *EHSymbol) { +} + +void MCStreamer::InitSections(bool NoExecStack) { + SwitchSection(getContext().getObjectFileInfo()->getTextSection()); +} + +void MCStreamer::AssignFragment(MCSymbol *Symbol, MCFragment *Fragment) { + assert(Fragment); + Symbol->setFragment(Fragment); + + // As we emit symbols into a section, track the order so that they can + // be sorted upon later. Zero is reserved to mean 'unemitted'. + SymbolOrdering[Symbol] = 1 + SymbolOrdering.size(); +} + +void MCStreamer::EmitLabel(MCSymbol *Symbol) { + assert(!Symbol->isVariable() && "Cannot emit a variable symbol!"); + assert(getCurrentSection().first && "Cannot emit before setting section!"); + assert(!Symbol->getFragment() && "Unexpected fragment on symbol data!"); + Symbol->setFragment(&getCurrentSectionOnly()->getDummyFragment()); + + MCTargetStreamer *TS = getTargetStreamer(); + if (TS) + TS->emitLabel(Symbol); +} + +void MCStreamer::EmitCFISections(bool EH, bool Debug) { + assert(EH || Debug); +} + +void MCStreamer::EmitCFIStartProc(bool IsSimple) { + MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo(); + if (CurFrame && !CurFrame->End) + report_fatal_error("Starting a frame before finishing the previous one!"); + + MCDwarfFrameInfo Frame; + Frame.IsSimple = IsSimple; + EmitCFIStartProcImpl(Frame); + + const MCAsmInfo* MAI = Context.getAsmInfo(); + if (MAI) { + for (const MCCFIInstruction& Inst : MAI->getInitialFrameState()) { + if (Inst.getOperation() == MCCFIInstruction::OpDefCfa || + Inst.getOperation() == MCCFIInstruction::OpDefCfaRegister) { + Frame.CurrentCfaRegister = Inst.getRegister(); + } + } + } + + DwarfFrameInfos.push_back(Frame); +} + +void MCStreamer::EmitCFIStartProcImpl(MCDwarfFrameInfo &Frame) { +} + +void MCStreamer::EmitCFIEndProc() { + EnsureValidDwarfFrame(); + MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo(); + EmitCFIEndProcImpl(*CurFrame); +} + +void MCStreamer::EmitCFIEndProcImpl(MCDwarfFrameInfo &Frame) { + // Put a dummy non-null value in Frame.End to mark that this frame has been + // closed. + Frame.End = (MCSymbol *) 1; +} + +MCSymbol *MCStreamer::EmitCFICommon() { + EnsureValidDwarfFrame(); + MCSymbol *Label = getContext().createTempSymbol(); + EmitLabel(Label); + return Label; +} + +void MCStreamer::EmitCFIDefCfa(int64_t Register, int64_t Offset) { + MCSymbol *Label = EmitCFICommon(); + MCCFIInstruction Instruction = + MCCFIInstruction::createDefCfa(Label, Register, Offset); + MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo(); + CurFrame->Instructions.push_back(Instruction); + CurFrame->CurrentCfaRegister = static_cast(Register); +} + +void MCStreamer::EmitCFIDefCfaOffset(int64_t Offset) { + MCSymbol *Label = EmitCFICommon(); + MCCFIInstruction Instruction = + MCCFIInstruction::createDefCfaOffset(Label, Offset); + MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo(); + CurFrame->Instructions.push_back(Instruction); +} + +void MCStreamer::EmitCFIAdjustCfaOffset(int64_t Adjustment) { + MCSymbol *Label = EmitCFICommon(); + MCCFIInstruction Instruction = + MCCFIInstruction::createAdjustCfaOffset(Label, Adjustment); + MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo(); + CurFrame->Instructions.push_back(Instruction); +} + +void MCStreamer::EmitCFIDefCfaRegister(int64_t Register) { + MCSymbol *Label = EmitCFICommon(); + MCCFIInstruction Instruction = + MCCFIInstruction::createDefCfaRegister(Label, Register); + MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo(); + CurFrame->Instructions.push_back(Instruction); + CurFrame->CurrentCfaRegister = static_cast(Register); +} + +void MCStreamer::EmitCFIOffset(int64_t Register, int64_t Offset) { + MCSymbol *Label = EmitCFICommon(); + MCCFIInstruction Instruction = + MCCFIInstruction::createOffset(Label, Register, Offset); + MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo(); + CurFrame->Instructions.push_back(Instruction); +} + +void MCStreamer::EmitCFIRelOffset(int64_t Register, int64_t Offset) { + MCSymbol *Label = EmitCFICommon(); + MCCFIInstruction Instruction = + MCCFIInstruction::createRelOffset(Label, Register, Offset); + MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo(); + CurFrame->Instructions.push_back(Instruction); +} + +void MCStreamer::EmitCFIPersonality(const MCSymbol *Sym, + unsigned Encoding) { + EnsureValidDwarfFrame(); + MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo(); + CurFrame->Personality = Sym; + CurFrame->PersonalityEncoding = Encoding; +} + +void MCStreamer::EmitCFILsda(const MCSymbol *Sym, unsigned Encoding) { + EnsureValidDwarfFrame(); + MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo(); + CurFrame->Lsda = Sym; + CurFrame->LsdaEncoding = Encoding; +} + +void MCStreamer::EmitCFIRememberState() { + MCSymbol *Label = EmitCFICommon(); + MCCFIInstruction Instruction = MCCFIInstruction::createRememberState(Label); + MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo(); + CurFrame->Instructions.push_back(Instruction); +} + +void MCStreamer::EmitCFIRestoreState() { + // FIXME: Error if there is no matching cfi_remember_state. + MCSymbol *Label = EmitCFICommon(); + MCCFIInstruction Instruction = MCCFIInstruction::createRestoreState(Label); + MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo(); + CurFrame->Instructions.push_back(Instruction); +} + +void MCStreamer::EmitCFISameValue(int64_t Register) { + MCSymbol *Label = EmitCFICommon(); + MCCFIInstruction Instruction = + MCCFIInstruction::createSameValue(Label, Register); + MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo(); + CurFrame->Instructions.push_back(Instruction); +} + +void MCStreamer::EmitCFIRestore(int64_t Register) { + MCSymbol *Label = EmitCFICommon(); + MCCFIInstruction Instruction = + MCCFIInstruction::createRestore(Label, Register); + MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo(); + CurFrame->Instructions.push_back(Instruction); +} + +void MCStreamer::EmitCFIEscape(StringRef Values) { + MCSymbol *Label = EmitCFICommon(); + MCCFIInstruction Instruction = MCCFIInstruction::createEscape(Label, Values); + MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo(); + CurFrame->Instructions.push_back(Instruction); +} + +void MCStreamer::EmitCFIGnuArgsSize(int64_t Size) { + MCSymbol *Label = EmitCFICommon(); + MCCFIInstruction Instruction = + MCCFIInstruction::createGnuArgsSize(Label, Size); + MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo(); + CurFrame->Instructions.push_back(Instruction); +} + +void MCStreamer::EmitCFISignalFrame() { + EnsureValidDwarfFrame(); + MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo(); + CurFrame->IsSignalFrame = true; +} + +void MCStreamer::EmitCFIUndefined(int64_t Register) { + MCSymbol *Label = EmitCFICommon(); + MCCFIInstruction Instruction = + MCCFIInstruction::createUndefined(Label, Register); + MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo(); + CurFrame->Instructions.push_back(Instruction); +} + +void MCStreamer::EmitCFIRegister(int64_t Register1, int64_t Register2) { + MCSymbol *Label = EmitCFICommon(); + MCCFIInstruction Instruction = + MCCFIInstruction::createRegister(Label, Register1, Register2); + MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo(); + CurFrame->Instructions.push_back(Instruction); +} + +void MCStreamer::EmitCFIWindowSave() { + MCSymbol *Label = EmitCFICommon(); + MCCFIInstruction Instruction = + MCCFIInstruction::createWindowSave(Label); + MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo(); + CurFrame->Instructions.push_back(Instruction); +} + +void MCStreamer::EnsureValidWinFrameInfo() { + const MCAsmInfo *MAI = Context.getAsmInfo(); + if (!MAI->usesWindowsCFI()) + report_fatal_error(".seh_* directives are not supported on this target"); + if (!CurrentWinFrameInfo || CurrentWinFrameInfo->End) + report_fatal_error("No open Win64 EH frame function!"); +} + +void MCStreamer::EmitWinCFIStartProc(const MCSymbol *Symbol) { + const MCAsmInfo *MAI = Context.getAsmInfo(); + if (!MAI->usesWindowsCFI()) + report_fatal_error(".seh_* directives are not supported on this target"); + if (CurrentWinFrameInfo && !CurrentWinFrameInfo->End) + report_fatal_error("Starting a function before ending the previous one!"); + + MCSymbol *StartProc = getContext().createTempSymbol(); + EmitLabel(StartProc); + + WinFrameInfos.push_back(new WinEH::FrameInfo(Symbol, StartProc)); + CurrentWinFrameInfo = WinFrameInfos.back(); +} + +void MCStreamer::EmitWinCFIEndProc() { + EnsureValidWinFrameInfo(); + if (CurrentWinFrameInfo->ChainedParent) + report_fatal_error("Not all chained regions terminated!"); + + MCSymbol *Label = getContext().createTempSymbol(); + EmitLabel(Label); + CurrentWinFrameInfo->End = Label; +} + +void MCStreamer::EmitWinCFIStartChained() { + EnsureValidWinFrameInfo(); + + MCSymbol *StartProc = getContext().createTempSymbol(); + EmitLabel(StartProc); + + WinFrameInfos.push_back(new WinEH::FrameInfo(CurrentWinFrameInfo->Function, + StartProc, CurrentWinFrameInfo)); + CurrentWinFrameInfo = WinFrameInfos.back(); +} + +void MCStreamer::EmitWinCFIEndChained() { + EnsureValidWinFrameInfo(); + if (!CurrentWinFrameInfo->ChainedParent) + report_fatal_error("End of a chained region outside a chained region!"); + + MCSymbol *Label = getContext().createTempSymbol(); + EmitLabel(Label); + + CurrentWinFrameInfo->End = Label; + CurrentWinFrameInfo = + const_cast(CurrentWinFrameInfo->ChainedParent); +} + +void MCStreamer::EmitWinEHHandler(const MCSymbol *Sym, bool Unwind, + bool Except) { + EnsureValidWinFrameInfo(); + if (CurrentWinFrameInfo->ChainedParent) + report_fatal_error("Chained unwind areas can't have handlers!"); + CurrentWinFrameInfo->ExceptionHandler = Sym; + if (!Except && !Unwind) + report_fatal_error("Don't know what kind of handler this is!"); + if (Unwind) + CurrentWinFrameInfo->HandlesUnwind = true; + if (Except) + CurrentWinFrameInfo->HandlesExceptions = true; +} + +void MCStreamer::EmitWinEHHandlerData() { + EnsureValidWinFrameInfo(); + if (CurrentWinFrameInfo->ChainedParent) + report_fatal_error("Chained unwind areas can't have handlers!"); +} + +void MCStreamer::EmitSyntaxDirective() {} + +void MCStreamer::EmitWinCFIPushReg(unsigned Register) { + EnsureValidWinFrameInfo(); + + MCSymbol *Label = getContext().createTempSymbol(); + EmitLabel(Label); + + WinEH::Instruction Inst = Win64EH::Instruction::PushNonVol(Label, Register); + CurrentWinFrameInfo->Instructions.push_back(Inst); +} + +void MCStreamer::EmitWinCFISetFrame(unsigned Register, unsigned Offset) { + EnsureValidWinFrameInfo(); + if (CurrentWinFrameInfo->LastFrameInst >= 0) + report_fatal_error("Frame register and offset already specified!"); + if (Offset & 0x0F) + report_fatal_error("Misaligned frame pointer offset!"); + if (Offset > 240) + report_fatal_error("Frame offset must be less than or equal to 240!"); + + MCSymbol *Label = getContext().createTempSymbol(); + EmitLabel(Label); + + WinEH::Instruction Inst = + Win64EH::Instruction::SetFPReg(Label, Register, Offset); + CurrentWinFrameInfo->LastFrameInst = CurrentWinFrameInfo->Instructions.size(); + CurrentWinFrameInfo->Instructions.push_back(Inst); +} + +void MCStreamer::EmitWinCFIAllocStack(unsigned Size) { + EnsureValidWinFrameInfo(); + if (Size == 0) + report_fatal_error("Allocation size must be non-zero!"); + if (Size & 7) + report_fatal_error("Misaligned stack allocation!"); + + MCSymbol *Label = getContext().createTempSymbol(); + EmitLabel(Label); + + WinEH::Instruction Inst = Win64EH::Instruction::Alloc(Label, Size); + CurrentWinFrameInfo->Instructions.push_back(Inst); +} + +void MCStreamer::EmitWinCFISaveReg(unsigned Register, unsigned Offset) { + EnsureValidWinFrameInfo(); + if (Offset & 7) + report_fatal_error("Misaligned saved register offset!"); + + MCSymbol *Label = getContext().createTempSymbol(); + EmitLabel(Label); + + WinEH::Instruction Inst = + Win64EH::Instruction::SaveNonVol(Label, Register, Offset); + CurrentWinFrameInfo->Instructions.push_back(Inst); +} + +void MCStreamer::EmitWinCFISaveXMM(unsigned Register, unsigned Offset) { + EnsureValidWinFrameInfo(); + if (Offset & 0x0F) + report_fatal_error("Misaligned saved vector register offset!"); + + MCSymbol *Label = getContext().createTempSymbol(); + EmitLabel(Label); + + WinEH::Instruction Inst = + Win64EH::Instruction::SaveXMM(Label, Register, Offset); + CurrentWinFrameInfo->Instructions.push_back(Inst); +} + +void MCStreamer::EmitWinCFIPushFrame(bool Code) { + EnsureValidWinFrameInfo(); + if (CurrentWinFrameInfo->Instructions.size() > 0) + report_fatal_error("If present, PushMachFrame must be the first UOP"); + + MCSymbol *Label = getContext().createTempSymbol(); + EmitLabel(Label); + + WinEH::Instruction Inst = Win64EH::Instruction::PushMachFrame(Label, Code); + CurrentWinFrameInfo->Instructions.push_back(Inst); +} + +void MCStreamer::EmitWinCFIEndProlog() { + EnsureValidWinFrameInfo(); + + MCSymbol *Label = getContext().createTempSymbol(); + EmitLabel(Label); + + CurrentWinFrameInfo->PrologEnd = Label; +} + +void MCStreamer::EmitCOFFSafeSEH(MCSymbol const *Symbol) { +} + +void MCStreamer::EmitCOFFSectionIndex(MCSymbol const *Symbol) { +} + +void MCStreamer::EmitCOFFSecRel32(MCSymbol const *Symbol) { +} + +/// EmitRawText - If this file is backed by an assembly streamer, this dumps +/// the specified string in the output .s file. This capability is +/// indicated by the hasRawTextSupport() predicate. +void MCStreamer::EmitRawTextImpl(StringRef String) { + errs() << "EmitRawText called on an MCStreamer that doesn't support it, " + " something must not be fully mc'ized\n"; + abort(); +} + +void MCStreamer::EmitRawText(const Twine &T) { + SmallString<128> Str; + EmitRawTextImpl(T.toStringRef(Str)); +} + +void MCStreamer::EmitWindowsUnwindTables() { +} + +unsigned int MCStreamer::Finish() { + if (!DwarfFrameInfos.empty() && !DwarfFrameInfos.back().End) + report_fatal_error("Unfinished frame!"); + + MCTargetStreamer *TS = getTargetStreamer(); + if (TS) + TS->finish(); + + return FinishImpl(); +} + +bool MCStreamer::EmitAssignment(MCSymbol *Symbol, const MCExpr *Value) { + visitUsedExpr(*Value); + bool valid; + Symbol->setVariableValue(Value, valid); + if (!valid) + return false; + + MCTargetStreamer *TS = getTargetStreamer(); + if (TS) + TS->emitAssignment(Symbol, Value); + + return true; +} + +void MCStreamer::visitUsedSymbol(const MCSymbol &Sym) { +} + +void MCStreamer::visitUsedExpr(const MCExpr &Expr) { + switch (Expr.getKind()) { + case MCExpr::Target: + cast(Expr).visitUsedExpr(*this); + break; + + case MCExpr::Constant: + break; + + case MCExpr::Binary: { + const MCBinaryExpr &BE = cast(Expr); + visitUsedExpr(*BE.getLHS()); + visitUsedExpr(*BE.getRHS()); + break; + } + + case MCExpr::SymbolRef: + visitUsedSymbol(cast(Expr).getSymbol()); + break; + + case MCExpr::Unary: + visitUsedExpr(*cast(Expr).getSubExpr()); + break; + } +} + +void MCStreamer::EmitInstruction(MCInst &Inst, + const MCSubtargetInfo &STI, + unsigned int &KsError) { + // Scan for values. + for (unsigned i = Inst.getNumOperands(); i--;) + if (Inst.getOperand(i).isExpr()) + visitUsedExpr(*Inst.getOperand(i).getExpr()); +} + +void MCStreamer::emitAbsoluteSymbolDiff(const MCSymbol *Hi, const MCSymbol *Lo, + unsigned Size) { + // Get the Hi-Lo expression. + const MCExpr *Diff = + MCBinaryExpr::createSub(MCSymbolRefExpr::create(Hi, Context), + MCSymbolRefExpr::create(Lo, Context), Context); + + const MCAsmInfo *MAI = Context.getAsmInfo(); + if (!MAI->doesSetDirectiveSuppressesReloc()) { + EmitValue(Diff, Size); + return; + } + + // Otherwise, emit with .set (aka assignment). + MCSymbol *SetLabel = Context.createTempSymbol("set", true); + EmitAssignment(SetLabel, Diff); + EmitSymbolValue(SetLabel, Size); +} + +void MCStreamer::EmitAssemblerFlag(MCAssemblerFlag Flag) {} +void MCStreamer::EmitThumbFunc(MCSymbol *Func) {} +void MCStreamer::EmitSymbolDesc(MCSymbol *Symbol, unsigned DescValue) {} +void MCStreamer::BeginCOFFSymbolDef(const MCSymbol *Symbol) {} +void MCStreamer::EndCOFFSymbolDef() {} +void MCStreamer::EmitFileDirective(StringRef Filename) {} +void MCStreamer::EmitCOFFSymbolStorageClass(int StorageClass) {} +void MCStreamer::EmitCOFFSymbolType(int Type) {} +void MCStreamer::emitELFSize(MCSymbolELF *Symbol, const MCExpr *Value) {} +void MCStreamer::EmitLocalCommonSymbol(MCSymbol *Symbol, uint64_t Size, + unsigned ByteAlignment) {} +void MCStreamer::EmitTBSSSymbol(MCSection *Section, MCSymbol *Symbol, + uint64_t Size, unsigned ByteAlignment) {} +void MCStreamer::ChangeSection(MCSection *, const MCExpr *) {} +void MCStreamer::EmitWeakReference(MCSymbol *Alias, const MCSymbol *Symbol) {} +void MCStreamer::EmitBytes(StringRef Data) {} +void MCStreamer::EmitValueImpl(const MCExpr *Value, unsigned Size, SMLoc Loc) { + visitUsedExpr(*Value); +} +void MCStreamer::EmitULEB128Value(const MCExpr *Value) {} +void MCStreamer::EmitSLEB128Value(const MCExpr *Value) {} +void MCStreamer::EmitValueToAlignment(unsigned ByteAlignment, int64_t Value, + unsigned ValueSize, + unsigned MaxBytesToEmit) {} +void MCStreamer::EmitCodeAlignment(unsigned ByteAlignment, + unsigned MaxBytesToEmit) {} +void MCStreamer::emitValueToOffset(const MCExpr *Offset, unsigned char Value) {} +void MCStreamer::EmitBundleAlignMode(unsigned AlignPow2) {} +void MCStreamer::EmitBundleLock(bool AlignToEnd) {} +unsigned int MCStreamer::FinishImpl() { return 0; } +void MCStreamer::EmitBundleUnlock() {} + +void MCStreamer::SwitchSection(MCSection *Section, const MCExpr *Subsection) { + assert(Section && "Cannot switch to a null section!"); + MCSectionSubPair curSection = SectionStack.back().first; + SectionStack.back().second = curSection; + if (MCSectionSubPair(Section, Subsection) != curSection) { + ChangeSection(Section, Subsection); + SectionStack.back().first = MCSectionSubPair(Section, Subsection); + assert(!Section->hasEnded() && "Section already ended"); + MCSymbol *Sym = Section->getBeginSymbol(); + if (Sym && !Sym->isInSection()) + EmitLabel(Sym); + } +} + +MCSymbol *MCStreamer::endSection(MCSection *Section) { + // TODO: keep track of the last subsection so that this symbol appears in the + // correct place. + MCSymbol *Sym = Section->getEndSymbol(Context); + if (Sym->isInSection()) + return Sym; + + SwitchSection(Section); + EmitLabel(Sym); + return Sym; +} diff --git a/llvm/lib/MC/MCSubtargetInfo.cpp b/llvm/lib/MC/MCSubtargetInfo.cpp new file mode 100644 index 0000000..4354605 --- /dev/null +++ b/llvm/lib/MC/MCSubtargetInfo.cpp @@ -0,0 +1,95 @@ +//===-- MCSubtargetInfo.cpp - Subtarget Information -----------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/ADT/Triple.h" +#include "llvm/MC/SubtargetFeature.h" +#include "llvm/Support/raw_ostream.h" +#include + +using namespace llvm_ks; + +static FeatureBitset getFeatures(StringRef CPU, StringRef FS, + ArrayRef ProcDesc, + ArrayRef ProcFeatures) { + SubtargetFeatures Features(FS); + return Features.getFeatureBits(CPU, ProcDesc, ProcFeatures); +} + +void MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef FS) { + FeatureBits = getFeatures(CPU, FS, ProcDesc, ProcFeatures); + if (!CPU.empty() && ProcSchedModels) + CPUSchedModel = &getSchedModelForCPU(CPU); +} + +void MCSubtargetInfo::setDefaultFeatures(StringRef CPU, StringRef FS) { + FeatureBits = getFeatures(CPU, FS, ProcDesc, ProcFeatures); +} + +MCSubtargetInfo::MCSubtargetInfo( + const Triple &TT, StringRef C, StringRef FS, + ArrayRef PF, ArrayRef PD, + const SubtargetInfoKV *ProcSched) + : TargetTriple(TT), CPU(C), ProcFeatures(PF), ProcDesc(PD), + ProcSchedModels(ProcSched) { + InitMCProcessorInfo(CPU, FS); +} + +/// ToggleFeature - Toggle a feature and returns the re-computed feature +/// bits. This version does not change the implied bits. +FeatureBitset MCSubtargetInfo::ToggleFeature(uint64_t FB) { + FeatureBits.flip(FB); + return FeatureBits; +} + +FeatureBitset MCSubtargetInfo::ToggleFeature(const FeatureBitset &FB) { + FeatureBits ^= FB; + return FeatureBits; +} + +/// ToggleFeature - Toggle a feature and returns the re-computed feature +/// bits. This version will also change all implied bits. +FeatureBitset MCSubtargetInfo::ToggleFeature(StringRef FS) { + SubtargetFeatures::ToggleFeature(FeatureBits, FS, ProcFeatures); + return FeatureBits; +} + +FeatureBitset MCSubtargetInfo::ApplyFeatureFlag(StringRef FS) { + SubtargetFeatures::ApplyFeatureFlag(FeatureBits, FS, ProcFeatures); + return FeatureBits; +} + +const MCSchedModel &MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const { + assert(ProcSchedModels && "Processor machine model not available!"); + + ArrayRef SchedModels(ProcSchedModels, ProcDesc.size()); + + assert(std::is_sorted(SchedModels.begin(), SchedModels.end(), + [](const SubtargetInfoKV &LHS, const SubtargetInfoKV &RHS) { + return strcmp(LHS.Key, RHS.Key) < 0; + }) && + "Processor machine model table is not sorted"); + + // Find entry + auto Found = + std::lower_bound(SchedModels.begin(), SchedModels.end(), CPU); +#if 0 + if (Found == SchedModels.end() || StringRef(Found->Key) != CPU) { + if (CPU != "help") // Don't error if the user asked for help. + errs() << "'" << CPU + << "' is not a recognized processor for this target" + << " (ignoring processor)\n"; + return MCSchedModel::GetDefaultSchedModel(); + } +#endif + assert(Found->Value && "Missing processor SchedModel value"); + return *(const MCSchedModel *)Found->Value; +} + diff --git a/llvm/lib/MC/MCSymbol.cpp b/llvm/lib/MC/MCSymbol.cpp new file mode 100644 index 0000000..58c2802 --- /dev/null +++ b/llvm/lib/MC/MCSymbol.cpp @@ -0,0 +1,87 @@ +//===- lib/MC/MCSymbol.cpp - MCSymbol implementation ----------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCSymbol.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/raw_ostream.h" +using namespace llvm_ks; + +// Only the address of this fragment is ever actually used. +static MCDummyFragment SentinelFragment(nullptr); + +// Sentinel value for the absolute pseudo fragment. +MCFragment *MCSymbol::AbsolutePseudoFragment = &SentinelFragment; + +void *MCSymbol::operator new(size_t s, const StringMapEntry *Name, + MCContext &Ctx) { + // We may need more space for a Name to account for alignment. So allocate + // space for the storage type and not the name pointer. + size_t Size = s + (Name ? sizeof(NameEntryStorageTy) : 0); + + // For safety, ensure that the alignment of a pointer is enough for an + // MCSymbol. This also ensures we don't need padding between the name and + // symbol. + static_assert((unsigned)AlignOf::Alignment <= + AlignOf::Alignment, + "Bad alignment of MCSymbol"); + void *Storage = Ctx.allocate(Size, alignOf()); + NameEntryStorageTy *Start = static_cast(Storage); + NameEntryStorageTy *End = Start + (Name ? 1 : 0); + return End; +} + +void MCSymbol::setVariableValue(const MCExpr *Value, bool &valid) { + valid = true; + //assert(!IsUsed && "Cannot set a variable that has already been used."); + //assert(Value && "Invalid variable value!"); + //assert((SymbolContents == SymContentsUnset || + // SymbolContents == SymContentsVariable) && + // "Cannot give common/offset symbol a variable value"); + if (IsUsed || !Value || (SymbolContents != SymContentsUnset && + SymbolContents != SymContentsVariable)) { + valid = false; + return; + } + this->Value = Value; + SymbolContents = SymContentsVariable; + setUndefined(); +} + +void MCSymbol::print(raw_ostream &OS, const MCAsmInfo *MAI) const { + // The name for this MCSymbol is required to be a valid target name. However, + // some targets support quoting names with funny characters. If the name + // contains a funny character, then print it quoted. + StringRef Name = getName(); + if (!MAI || MAI->isValidUnquotedName(Name)) { + OS << Name; + return; + } + + if (MAI && !MAI->supportsNameQuoting()) + report_fatal_error("Symbol name with unsupported characters"); + + OS << '"'; + for (char C : Name) { + if (C == '\n') + OS << "\\n"; + else if (C == '"') + OS << "\\\""; + else + OS << C; + } + OS << '"'; +} + +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +LLVM_DUMP_METHOD void MCSymbol::dump() const { } +#endif diff --git a/llvm/lib/MC/MCSymbolELF.cpp b/llvm/lib/MC/MCSymbolELF.cpp new file mode 100644 index 0000000..afe4a7d --- /dev/null +++ b/llvm/lib/MC/MCSymbolELF.cpp @@ -0,0 +1,201 @@ +//===- lib/MC/MCSymbolELF.cpp ---------------------------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCAssembler.h" +#include "llvm/MC/MCSymbolELF.h" +#include "llvm/MC/MCFixupKindInfo.h" +#include "llvm/Support/ELF.h" + +namespace llvm_ks { + +namespace { +enum { + // Shift value for STT_* flags. 7 possible values. 3 bits. + ELF_STT_Shift = 0, + + // Shift value for STB_* flags. 4 possible values, 2 bits. + ELF_STB_Shift = 3, + + // Shift value for STV_* flags. 4 possible values, 2 bits. + ELF_STV_Shift = 5, + + // Shift value for STO_* flags. 3 bits. All the values are between 0x20 and + // 0xe0, so we shift right by 5 before storing. + ELF_STO_Shift = 7, + + // One bit. + ELF_IsSignature_Shift = 10, + + // One bit. + ELF_WeakrefUsedInReloc_Shift = 11, + + // One bit. + ELF_BindingSet_Shift = 12 +}; +} + +void MCSymbolELF::setBinding(unsigned Binding) const { + setIsBindingSet(); + unsigned Val; + switch (Binding) { + default: + llvm_unreachable("Unsupported Binding"); + case ELF::STB_LOCAL: + Val = 0; + break; + case ELF::STB_GLOBAL: + Val = 1; + break; + case ELF::STB_WEAK: + Val = 2; + break; + case ELF::STB_GNU_UNIQUE: + Val = 3; + break; + } + uint32_t OtherFlags = getFlags() & ~(0x3 << ELF_STB_Shift); + setFlags(OtherFlags | (Val << ELF_STB_Shift)); +} + +unsigned MCSymbolELF::getBinding() const { + if (isBindingSet()) { + uint32_t Val = (getFlags() & (0x3 << ELF_STB_Shift)) >> ELF_STB_Shift; + switch (Val) { + default: + llvm_unreachable("Invalid value"); + case 0: + return ELF::STB_LOCAL; + case 1: + return ELF::STB_GLOBAL; + case 2: + return ELF::STB_WEAK; + case 3: + return ELF::STB_GNU_UNIQUE; + } + } + + if (isDefined()) + return ELF::STB_LOCAL; + if (isUsedInReloc()) + return ELF::STB_GLOBAL; + if (isWeakrefUsedInReloc()) + return ELF::STB_WEAK; + if (isSignature()) + return ELF::STB_LOCAL; + return ELF::STB_GLOBAL; +} + +void MCSymbolELF::setType(unsigned Type) const { + unsigned Val; + switch (Type) { + default: + llvm_unreachable("Unsupported Binding"); + case ELF::STT_NOTYPE: + Val = 0; + break; + case ELF::STT_OBJECT: + Val = 1; + break; + case ELF::STT_FUNC: + Val = 2; + break; + case ELF::STT_SECTION: + Val = 3; + break; + case ELF::STT_COMMON: + Val = 4; + break; + case ELF::STT_TLS: + Val = 5; + break; + case ELF::STT_GNU_IFUNC: + Val = 6; + break; + } + uint32_t OtherFlags = getFlags() & ~(0x7 << ELF_STT_Shift); + setFlags(OtherFlags | (Val << ELF_STT_Shift)); +} + +unsigned MCSymbolELF::getType() const { + uint32_t Val = (getFlags() & (0x7 << ELF_STT_Shift)) >> ELF_STT_Shift; + switch (Val) { + default: + llvm_unreachable("Invalid value"); + case 0: + return ELF::STT_NOTYPE; + case 1: + return ELF::STT_OBJECT; + case 2: + return ELF::STT_FUNC; + case 3: + return ELF::STT_SECTION; + case 4: + return ELF::STT_COMMON; + case 5: + return ELF::STT_TLS; + case 6: + return ELF::STT_GNU_IFUNC; + } +} + +void MCSymbolELF::setVisibility(unsigned Visibility) { + assert(Visibility == ELF::STV_DEFAULT || Visibility == ELF::STV_INTERNAL || + Visibility == ELF::STV_HIDDEN || Visibility == ELF::STV_PROTECTED); + + uint32_t OtherFlags = getFlags() & ~(0x3 << ELF_STV_Shift); + setFlags(OtherFlags | (Visibility << ELF_STV_Shift)); +} + +unsigned MCSymbolELF::getVisibility() const { + unsigned Visibility = (getFlags() & (0x3 << ELF_STV_Shift)) >> ELF_STV_Shift; + assert(Visibility == ELF::STV_DEFAULT || Visibility == ELF::STV_INTERNAL || + Visibility == ELF::STV_HIDDEN || Visibility == ELF::STV_PROTECTED); + return Visibility; +} + +void MCSymbolELF::setOther(unsigned Other) { + assert((Other & 0x1f) == 0); + Other >>= 5; + assert(Other <= 0x7); + uint32_t OtherFlags = getFlags() & ~(0x7 << ELF_STO_Shift); + setFlags(OtherFlags | (Other << ELF_STO_Shift)); +} + +unsigned MCSymbolELF::getOther() const { + unsigned Other = (getFlags() & (0x7 << ELF_STO_Shift)) >> ELF_STO_Shift; + return Other << 5; +} + +void MCSymbolELF::setIsWeakrefUsedInReloc() const { + uint32_t OtherFlags = getFlags() & ~(0x1 << ELF_WeakrefUsedInReloc_Shift); + setFlags(OtherFlags | (1 << ELF_WeakrefUsedInReloc_Shift)); +} + +bool MCSymbolELF::isWeakrefUsedInReloc() const { + return getFlags() & (0x1 << ELF_WeakrefUsedInReloc_Shift); +} + +void MCSymbolELF::setIsSignature() const { + uint32_t OtherFlags = getFlags() & ~(0x1 << ELF_IsSignature_Shift); + setFlags(OtherFlags | (1 << ELF_IsSignature_Shift)); +} + +bool MCSymbolELF::isSignature() const { + return getFlags() & (0x1 << ELF_IsSignature_Shift); +} + +void MCSymbolELF::setIsBindingSet() const { + uint32_t OtherFlags = getFlags() & ~(0x1 << ELF_BindingSet_Shift); + setFlags(OtherFlags | (1 << ELF_BindingSet_Shift)); +} + +bool MCSymbolELF::isBindingSet() const { + return getFlags() & (0x1 << ELF_BindingSet_Shift); +} +} diff --git a/llvm/lib/MC/MCTargetOptions.cpp b/llvm/lib/MC/MCTargetOptions.cpp new file mode 100644 index 0000000..2a291d7 --- /dev/null +++ b/llvm/lib/MC/MCTargetOptions.cpp @@ -0,0 +1,24 @@ +//===- lib/MC/MCTargetOptions.cpp - MC Target Options --------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/StringRef.h" +#include "llvm/MC/MCTargetOptions.h" + +namespace llvm_ks { + +MCTargetOptions::MCTargetOptions() + : MCRelaxAll(false), + MCFatalWarnings(false), MCNoWarn(false), + DwarfVersion(0), ABIName() {} + +StringRef MCTargetOptions::getABIName() const { + return ABIName; +} + +} // end namespace llvm_ks diff --git a/llvm/lib/MC/MCValue.cpp b/llvm/lib/MC/MCValue.cpp new file mode 100644 index 0000000..7a739c6 --- /dev/null +++ b/llvm/lib/MC/MCValue.cpp @@ -0,0 +1,60 @@ +//===- lib/MC/MCValue.cpp - MCValue implementation ------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCValue.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/raw_ostream.h" + +using namespace llvm_ks; + +void MCValue::print(raw_ostream &OS) const { + if (isAbsolute()) { + OS << getConstant(); + return; + } + + // FIXME: prints as a number, which isn't ideal. But the meaning will be + // target-specific anyway. + if (getRefKind()) + OS << ':' << getRefKind() << ':'; + + OS << *getSymA(); + + if (getSymB()) { + OS << " - "; + OS << *getSymB(); + } + + if (getConstant()) + OS << " + " << getConstant(); +} + +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +LLVM_DUMP_METHOD void MCValue::dump() const { +} +#endif + +MCSymbolRefExpr::VariantKind MCValue::getAccessVariant() const { + const MCSymbolRefExpr *B = getSymB(); + if (B) { + if (B->getKind() != MCSymbolRefExpr::VK_None) + llvm_unreachable("unsupported"); + } + + const MCSymbolRefExpr *A = getSymA(); + if (!A) + return MCSymbolRefExpr::VK_None; + + MCSymbolRefExpr::VariantKind Kind = A->getKind(); + if (Kind == MCSymbolRefExpr::VK_WEAKREF) + return MCSymbolRefExpr::VK_None; + return Kind; +} diff --git a/llvm/lib/MC/StringTableBuilder.cpp b/llvm/lib/MC/StringTableBuilder.cpp new file mode 100644 index 0000000..6c02320 --- /dev/null +++ b/llvm/lib/MC/StringTableBuilder.cpp @@ -0,0 +1,183 @@ +//===-- StringTableBuilder.cpp - String table building utility ------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/StringTableBuilder.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/Support/COFF.h" +#include "llvm/Support/Endian.h" + +#include + +using namespace llvm_ks; + +StringTableBuilder::StringTableBuilder(Kind K) : K(K) { + // Account for leading bytes in table so that offsets returned from add are + // correct. + switch (K) { + case RAW: + Size = 0; + break; + case MachO: + case ELF: + Size = 1; + break; + case WinCOFF: + Size = 4; + break; + } +} + +typedef std::pair StringPair; + +// Returns the character at Pos from end of a string. +static int charTailAt(StringPair *P, size_t Pos) { + StringRef S = P->first; + if (Pos >= S.size()) + return -1; + return (unsigned char)S[S.size() - Pos - 1]; +} + +// Three-way radix quicksort. This is much faster than std::sort with strcmp +// because it does not compare characters that we already know the same. +static void multikey_qsort(StringPair **Begin, StringPair **End, int Pos) { +tailcall: + if (End - Begin <= 1) + return; + + // Partition items. Items in [Begin, P) are greater than the pivot, + // [P, Q) are the same as the pivot, and [Q, End) are less than the pivot. + int Pivot = charTailAt(*Begin, Pos); + StringPair **P = Begin; + StringPair **Q = End; + for (StringPair **R = Begin + 1; R < Q;) { + int C = charTailAt(*R, Pos); + if (C > Pivot) + std::swap(*P++, *R++); + else if (C < Pivot) + std::swap(*--Q, *R); + else + R++; + } + + multikey_qsort(Begin, P, Pos); + multikey_qsort(Q, End, Pos); + if (Pivot != -1) { + // qsort(P, Q, Pos + 1), but with tail call optimization. + Begin = P; + End = Q; + ++Pos; + goto tailcall; + } +} + +void StringTableBuilder::finalize() { + finalizeStringTable(/*Optimize=*/true); +} + +void StringTableBuilder::finalizeInOrder() { + finalizeStringTable(/*Optimize=*/false); +} + +void StringTableBuilder::finalizeStringTable(bool Optimize) { + typedef std::pair StringOffsetPair; + std::vector Strings; + Strings.reserve(StringIndexMap.size()); + for (StringOffsetPair &P : StringIndexMap) + Strings.push_back(&P); + + if (!Strings.empty()) { + // If we're optimizing, sort by name. If not, sort by previously assigned + // offset. + if (Optimize) { + multikey_qsort(&Strings[0], &Strings[0] + Strings.size(), 0); + } else { + std::sort(Strings.begin(), Strings.end(), + [](const StringOffsetPair *LHS, const StringOffsetPair *RHS) { + return LHS->second < RHS->second; + }); + } + } + + switch (K) { + case RAW: + break; + case ELF: + case MachO: + // Start the table with a NUL byte. + StringTable += '\x00'; + break; + case WinCOFF: + // Make room to write the table size later. + StringTable.append(4, '\x00'); + break; + } + + StringRef Previous; + for (StringOffsetPair *P : Strings) { + StringRef S = P->first; + if (K == WinCOFF) + assert(S.size() > COFF::NameSize && "Short string in COFF string table!"); + + if (Optimize && Previous.endswith(S)) { + P->second = StringTable.size() - S.size() - (K != RAW); + continue; + } + + if (Optimize) + P->second = StringTable.size(); + else + assert(P->second == StringTable.size() && + "different strtab offset after finalization"); + + StringTable += S; + if (K != RAW) + StringTable += '\x00'; + Previous = S; + } + + switch (K) { + case RAW: + case ELF: + break; + case MachO: + // Pad to multiple of 4. + while (StringTable.size() % 4) + StringTable += '\x00'; + break; + case WinCOFF: + // Write the table size in the first word. + assert(StringTable.size() <= std::numeric_limits::max()); + uint32_t Size = static_cast(StringTable.size()); + support::endian::write( + StringTable.data(), Size); + break; + } + + Size = StringTable.size(); +} + +void StringTableBuilder::clear() { + StringTable.clear(); + StringIndexMap.clear(); +} + +size_t StringTableBuilder::getOffset(StringRef S) const { + assert(isFinalized()); + auto I = StringIndexMap.find(S); + assert(I != StringIndexMap.end() && "String is not in table!"); + return I->second; +} + +size_t StringTableBuilder::add(StringRef S) { + assert(!isFinalized()); + auto P = StringIndexMap.insert(std::make_pair(S, Size)); + if (P.second) + Size += S.size() + (K != RAW); + return P.first->second; +} diff --git a/llvm/lib/MC/SubtargetFeature.cpp b/llvm/lib/MC/SubtargetFeature.cpp new file mode 100644 index 0000000..f5cab7c --- /dev/null +++ b/llvm/lib/MC/SubtargetFeature.cpp @@ -0,0 +1,308 @@ +//===- SubtargetFeature.cpp - CPU characteristics Implementation ----------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the SubtargetFeature interface. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/SubtargetFeature.h" +#include "llvm/ADT/StringExtras.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/Format.h" +#include "llvm/Support/raw_ostream.h" +#include +#include +#include +#include +using namespace llvm_ks; + +//===----------------------------------------------------------------------===// +// Static Helper Functions +//===----------------------------------------------------------------------===// + +/// hasFlag - Determine if a feature has a flag; '+' or '-' +/// +static inline bool hasFlag(StringRef Feature) { + assert(!Feature.empty() && "Empty string"); + // Get first character + char Ch = Feature[0]; + // Check if first character is '+' or '-' flag + return Ch == '+' || Ch =='-'; +} + +/// StripFlag - Return string stripped of flag. +/// +static inline std::string StripFlag(StringRef Feature) { + return hasFlag(Feature) ? Feature.substr(1) : Feature; +} + +/// isEnabled - Return true if enable flag; '+'. +/// +static inline bool isEnabled(StringRef Feature) { + assert(!Feature.empty() && "Empty string"); + // Get first character + char Ch = Feature[0]; + // Check if first character is '+' for enabled + return Ch == '+'; +} + +/// Split - Splits a string of comma separated items in to a vector of strings. +/// +static void Split(std::vector &V, StringRef S) { + SmallVector Tmp; + S.split(Tmp, ',', -1, false /* KeepEmpty */); + V.assign(Tmp.begin(), Tmp.end()); +} + +/// Adding features. +void SubtargetFeatures::AddFeature(StringRef String, bool Enable) { + // Don't add empty features. + if (!String.empty()) + // Convert to lowercase, prepend flag if we don't already have a flag. + Features.push_back(hasFlag(String) ? String.lower() + : (Enable ? "+" : "-") + String.lower()); +} + +/// Find KV in array using binary search. +static const SubtargetFeatureKV *Find(StringRef S, + ArrayRef A) { + // Binary search the array + auto F = std::lower_bound(A.begin(), A.end(), S); + // If not found then return NULL + if (F == A.end() || StringRef(F->Key) != S) return nullptr; + // Return the found array item + return F; +} + +/// getLongestEntryLength - Return the length of the longest entry in the table. +/// +static size_t getLongestEntryLength(ArrayRef Table) { + size_t MaxLen = 0; + for (auto &I : Table) + MaxLen = std::max(MaxLen, std::strlen(I.Key)); + return MaxLen; +} + +/// Display help for feature choices. +/// +static void Help(ArrayRef CPUTable, + ArrayRef FeatTable) { + // Determine the length of the longest CPU and Feature entries. + unsigned MaxCPULen = getLongestEntryLength(CPUTable); + unsigned MaxFeatLen = getLongestEntryLength(FeatTable); + + // Print the CPU table. + errs() << "Available CPUs for this target:\n\n"; + for (auto &CPU : CPUTable) + errs() << format(" %-*s - %s.\n", MaxCPULen, CPU.Key, CPU.Desc); + errs() << '\n'; + + // Print the Feature table. + errs() << "Available features for this target:\n\n"; + for (auto &Feature : FeatTable) + errs() << format(" %-*s - %s.\n", MaxFeatLen, Feature.Key, Feature.Desc); + errs() << '\n'; + + errs() << "Use +feature to enable a feature, or -feature to disable it.\n" + "For example, llc -mcpu=mycpu -mattr=+feature1,-feature2\n"; +} + +//===----------------------------------------------------------------------===// +// SubtargetFeatures Implementation +//===----------------------------------------------------------------------===// + +SubtargetFeatures::SubtargetFeatures(StringRef Initial) { + // Break up string into separate features + Split(Features, Initial); +} + + +std::string SubtargetFeatures::getString() const { + return join(Features.begin(), Features.end(), ","); +} + +/// SetImpliedBits - For each feature that is (transitively) implied by this +/// feature, set it. +/// +static +void SetImpliedBits(FeatureBitset &Bits, const SubtargetFeatureKV *FeatureEntry, + ArrayRef FeatureTable) { + for (auto &FE : FeatureTable) { + if (FeatureEntry->Value == FE.Value) continue; + + if ((FeatureEntry->Implies & FE.Value).any()) { + Bits |= FE.Value; + SetImpliedBits(Bits, &FE, FeatureTable); + } + } +} + +/// ClearImpliedBits - For each feature that (transitively) implies this +/// feature, clear it. +/// +static +void ClearImpliedBits(FeatureBitset &Bits, + const SubtargetFeatureKV *FeatureEntry, + ArrayRef FeatureTable) { + for (auto &FE : FeatureTable) { + if (FeatureEntry->Value == FE.Value) continue; + + if ((FE.Implies & FeatureEntry->Value).any()) { + Bits &= ~FE.Value; + ClearImpliedBits(Bits, &FE, FeatureTable); + } + } +} + +/// ToggleFeature - Toggle a feature and update the feature bits. +void +SubtargetFeatures::ToggleFeature(FeatureBitset &Bits, StringRef Feature, + ArrayRef FeatureTable) { + + // Find feature in table. + const SubtargetFeatureKV *FeatureEntry = + Find(StripFlag(Feature), FeatureTable); + // If there is a match + if (FeatureEntry) { + if ((Bits & FeatureEntry->Value) == FeatureEntry->Value) { + Bits &= ~FeatureEntry->Value; + // For each feature that implies this, clear it. + ClearImpliedBits(Bits, FeatureEntry, FeatureTable); + } else { + Bits |= FeatureEntry->Value; + + // For each feature that this implies, set it. + SetImpliedBits(Bits, FeatureEntry, FeatureTable); + } + } else { + errs() << "'" << Feature + << "' is not a recognized feature for this target" + << " (ignoring feature)\n"; + } +} + +void SubtargetFeatures::ApplyFeatureFlag(FeatureBitset &Bits, StringRef Feature, + ArrayRef FeatureTable) { + + assert(hasFlag(Feature)); + + // Find feature in table. + const SubtargetFeatureKV *FeatureEntry = + Find(StripFlag(Feature), FeatureTable); + // If there is a match + if (FeatureEntry) { + // Enable/disable feature in bits + if (isEnabled(Feature)) { + Bits |= FeatureEntry->Value; + + // For each feature that this implies, set it. + SetImpliedBits(Bits, FeatureEntry, FeatureTable); + } else { + Bits &= ~FeatureEntry->Value; + + // For each feature that implies this, clear it. + ClearImpliedBits(Bits, FeatureEntry, FeatureTable); + } + } else { + errs() << "'" << Feature + << "' is not a recognized feature for this target" + << " (ignoring feature)\n"; + } +} + + +/// getFeatureBits - Get feature bits a CPU. +/// +FeatureBitset +SubtargetFeatures::getFeatureBits(StringRef CPU, + ArrayRef CPUTable, + ArrayRef FeatureTable) { + + if (CPUTable.empty() || FeatureTable.empty()) + return FeatureBitset(); + +#ifndef NDEBUG + assert(std::is_sorted(std::begin(CPUTable), std::end(CPUTable)) && + "CPU table is not sorted"); + assert(std::is_sorted(std::begin(FeatureTable), std::end(FeatureTable)) && + "CPU features table is not sorted"); +#endif + // Resulting bits + FeatureBitset Bits; + + // Check if help is needed + if (CPU == "help") + Help(CPUTable, FeatureTable); + + // Find CPU entry if CPU name is specified. + else if (!CPU.empty()) { + const SubtargetFeatureKV *CPUEntry = Find(CPU, CPUTable); + + // If there is a match + if (CPUEntry) { + // Set base feature bits + Bits = CPUEntry->Value; + + // Set the feature implied by this CPU feature, if any. + for (auto &FE : FeatureTable) { + if ((CPUEntry->Value & FE.Value).any()) + SetImpliedBits(Bits, &FE, FeatureTable); + } + } else { + errs() << "'" << CPU + << "' is not a recognized processor for this target" + << " (ignoring processor)\n"; + } + } + + // Iterate through each feature + for (auto &Feature : Features) { + // Check for help + if (Feature == "+help") + Help(CPUTable, FeatureTable); + + ApplyFeatureFlag(Bits, Feature, FeatureTable); + } + + return Bits; +} + +/// print - Print feature string. +/// +void SubtargetFeatures::print(raw_ostream &OS) const { + for (auto &F : Features) + OS << F << " "; + OS << "\n"; +} + +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) +/// dump - Dump feature info. +/// +LLVM_DUMP_METHOD void SubtargetFeatures::dump() const { +} +#endif + +/// Adds the default features for the specified target triple. +/// +/// FIXME: This is an inelegant way of specifying the features of a +/// subtarget. It would be better if we could encode this information +/// into the IR. See . +/// +void SubtargetFeatures::getDefaultSubtargetFeatures(const Triple& Triple) { + if (Triple.getVendor() == Triple::Apple) { + if (Triple.getArch() == Triple::ppc) { + // powerpc-apple-* + AddFeature("altivec"); + } else if (Triple.getArch() == Triple::ppc64) { + // powerpc64-apple-* + AddFeature("64bit"); + AddFeature("altivec"); + } + } +} diff --git a/llvm/lib/Support/APFloat.cpp b/llvm/lib/Support/APFloat.cpp new file mode 100644 index 0000000..873e114 --- /dev/null +++ b/llvm/lib/Support/APFloat.cpp @@ -0,0 +1,3998 @@ +//===-- APFloat.cpp - Implement APFloat class -----------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements a class to represent arbitrary precision floating +// point values and provide a variety of arithmetic operations on them. +// +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/APFloat.h" +#include "llvm/ADT/APSInt.h" +#include "llvm/ADT/FoldingSet.h" +#include "llvm/ADT/Hashing.h" +#include "llvm/ADT/StringExtras.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/MathExtras.h" +#include +#include + +using namespace llvm_ks; + +/// A macro used to combine two fcCategory enums into one key which can be used +/// in a switch statement to classify how the interaction of two APFloat's +/// categories affects an operation. +/// +/// TODO: If clang source code is ever allowed to use constexpr in its own +/// codebase, change this into a static inline function. +#define PackCategoriesIntoKey(_lhs, _rhs) ((_lhs) * 4 + (_rhs)) + +/* Assumed in hexadecimal significand parsing, and conversion to + hexadecimal strings. */ +static_assert(integerPartWidth % 4 == 0, "Part width must be divisible by 4!"); + +namespace llvm_ks { + + /* Represents floating point arithmetic semantics. */ + struct fltSemantics { + /* The largest E such that 2^E is representable; this matches the + definition of IEEE 754. */ + APFloat::ExponentType maxExponent; + + /* The smallest E such that 2^E is a normalized number; this + matches the definition of IEEE 754. */ + APFloat::ExponentType minExponent; + + /* Number of bits in the significand. This includes the integer + bit. */ + unsigned int precision; + + /* Number of bits actually used in the semantics. */ + unsigned int sizeInBits; + }; + + const fltSemantics APFloat::IEEEhalf = { 15, -14, 11, 16 }; + const fltSemantics APFloat::IEEEsingle = { 127, -126, 24, 32 }; + const fltSemantics APFloat::IEEEdouble = { 1023, -1022, 53, 64 }; + const fltSemantics APFloat::IEEEquad = { 16383, -16382, 113, 128 }; + const fltSemantics APFloat::x87DoubleExtended = { 16383, -16382, 64, 80 }; + const fltSemantics APFloat::Bogus = { 0, 0, 0, 0 }; + + /* The PowerPC format consists of two doubles. It does not map cleanly + onto the usual format above. It is approximated using twice the + mantissa bits. Note that for exponents near the double minimum, + we no longer can represent the full 106 mantissa bits, so those + will be treated as denormal numbers. + + FIXME: While this approximation is equivalent to what GCC uses for + compile-time arithmetic on PPC double-double numbers, it is not able + to represent all possible values held by a PPC double-double number, + for example: (long double) 1.0 + (long double) 0x1p-106 + Should this be replaced by a full emulation of PPC double-double? */ + const fltSemantics APFloat::PPCDoubleDouble = { 1023, -1022 + 53, 53 + 53, 128 }; + + /* A tight upper bound on number of parts required to hold the value + pow(5, power) is + + power * 815 / (351 * integerPartWidth) + 1 + + However, whilst the result may require only this many parts, + because we are multiplying two values to get it, the + multiplication may require an extra part with the excess part + being zero (consider the trivial case of 1 * 1, tcFullMultiply + requires two parts to hold the single-part result). So we add an + extra one to guarantee enough space whilst multiplying. */ + const unsigned int maxExponent = 16383; + const unsigned int maxPrecision = 113; + const unsigned int maxPowerOfFiveExponent = maxExponent + maxPrecision - 1; + const unsigned int maxPowerOfFiveParts = 2 + ((maxPowerOfFiveExponent * 815) + / (351 * integerPartWidth)); +} + +/* A bunch of private, handy routines. */ + +static inline unsigned int +partCountForBits(unsigned int bits) +{ + return ((bits) + integerPartWidth - 1) / integerPartWidth; +} + +/* Returns 0U-9U. Return values >= 10U are not digits. */ +static inline unsigned int +decDigitValue(unsigned int c) +{ + return c - '0'; +} + +/* Return the value of a decimal exponent of the form + [+-]ddddddd. + + If the exponent overflows, returns a large exponent with the + appropriate sign. */ +static int +readExponent(StringRef::iterator begin, StringRef::iterator end, APFloat::opStatus &fp) +{ + bool isNegative; + unsigned int absExponent; + const unsigned int overlargeExponent = 24000; /* FIXME. */ + StringRef::iterator p = begin; + + fp = APFloat::opOK; + + //assert(p != end && "Exponent has no digits"); // qq + if (p == end) { + fp = APFloat::opInvalidOp; + return 0; + } + + isNegative = (*p == '-'); + if (*p == '-' || *p == '+') { + p++; + //assert(p != end && "Exponent has no digits"); + if (p == end) { + fp = APFloat::opInvalidOp; + return 0; + } + } + + absExponent = decDigitValue(*p++); + //assert(absExponent < 10U && "Invalid character in exponent"); + if (absExponent >= 10U) { + fp = APFloat::opInvalidOp; + return 0; + } + + for (; p != end; ++p) { + unsigned int value; + + value = decDigitValue(*p); + //assert(value < 10U && "Invalid character in exponent"); + if (value >= 10U) { + fp = APFloat::opInvalidOp; + return 0; + } + + value += absExponent * 10; + if (absExponent >= overlargeExponent) { + absExponent = overlargeExponent; + p = end; /* outwit assert below */ + break; + } + absExponent = value; + } + + //assert(p == end && "Invalid exponent in exponent"); + if (p != end) { + fp = APFloat::opInvalidOp; + return 0; + } + + if (isNegative) + return -(int) absExponent; + else + return (int) absExponent; +} + +/* This is ugly and needs cleaning up, but I don't immediately see + how whilst remaining safe. */ +static int +totalExponent(StringRef::iterator p, StringRef::iterator end, + int exponentAdjustment) +{ + int unsignedExponent; + bool negative, overflow; + int exponent = 0; + + assert(p != end && "Exponent has no digits"); + + negative = *p == '-'; + if (*p == '-' || *p == '+') { + p++; + assert(p != end && "Exponent has no digits"); + } + + unsignedExponent = 0; + overflow = false; + for (; p != end; ++p) { + unsigned int value; + + value = decDigitValue(*p); + assert(value < 10U && "Invalid character in exponent"); + + unsignedExponent = unsignedExponent * 10 + value; + if (unsignedExponent > 32767) { + overflow = true; + break; + } + } + + if (exponentAdjustment > 32767 || exponentAdjustment < -32768) + overflow = true; + + if (!overflow) { + exponent = unsignedExponent; + if (negative) + exponent = -exponent; + exponent += exponentAdjustment; + if (exponent > 32767 || exponent < -32768) + overflow = true; + } + + if (overflow) + exponent = negative ? -32768: 32767; + + return exponent; +} + +static StringRef::iterator +skipLeadingZeroesAndAnyDot(StringRef::iterator begin, StringRef::iterator end, + StringRef::iterator *dot) +{ + StringRef::iterator p = begin; + *dot = end; + while (p != end && *p == '0') + p++; + + if (p != end && *p == '.') { + *dot = p++; + + assert(end - begin != 1 && "Significand has no digits"); + + while (p != end && *p == '0') + p++; + } + + return p; +} + +/* Given a normal decimal floating point number of the form + + dddd.dddd[eE][+-]ddd + + where the decimal point and exponent are optional, fill out the + structure D. Exponent is appropriate if the significand is + treated as an integer, and normalizedExponent if the significand + is taken to have the decimal point after a single leading + non-zero digit. + + If the value is zero, V->firstSigDigit points to a non-digit, and + the return exponent is zero. +*/ +struct decimalInfo { + const char *firstSigDigit; + const char *lastSigDigit; + int exponent; + int normalizedExponent; +}; + +APFloat::opStatus +interpretDecimal(StringRef::iterator begin, StringRef::iterator end, + decimalInfo *D) +{ + StringRef::iterator dot = end; + StringRef::iterator p = skipLeadingZeroesAndAnyDot (begin, end, &dot); + APFloat::opStatus fp; + + D->firstSigDigit = p; + D->exponent = 0; + D->normalizedExponent = 0; + + for (; p != end; ++p) { + if (*p == '.') { + //assert(dot == end && "String contains multiple dots"); + if (dot != end) + return APFloat::opInvalidOp; + dot = p++; + if (p == end) + break; + } + if (decDigitValue(*p) >= 10U) + break; + } + + if (p != end) { + //assert((*p == 'e' || *p == 'E') && "Invalid character in significand"); + if (*p != 'e' && *p != 'E') + return APFloat::opInvalidOp; + //assert(p != begin && "Significand has no digits"); + if (p == begin) + return APFloat::opInvalidOp; + //assert((dot == end || p - begin != 1) && "Significand has no digits"); + if (dot != end && p - begin == 1) + return APFloat::opInvalidOp; + + /* p points to the first non-digit in the string */ + D->exponent = readExponent(p + 1, end, fp); // qq + if (fp) + return fp; + + /* Implied decimal point? */ + if (dot == end) + dot = p; + } + + /* If number is all zeroes accept any exponent. */ + if (p != D->firstSigDigit) { + /* Drop insignificant trailing zeroes. */ + if (p != begin) { + do + do + p--; + while (p != begin && *p == '0'); + while (p != begin && *p == '.'); + } + + /* Adjust the exponents for any decimal point. */ + D->exponent += static_cast((dot - p) - (dot > p)); + D->normalizedExponent = (D->exponent + + static_cast((p - D->firstSigDigit) + - (dot > D->firstSigDigit && dot < p))); + } + + D->lastSigDigit = p; + + return APFloat::opOK; +} + +/* Return the trailing fraction of a hexadecimal number. + DIGITVALUE is the first hex digit of the fraction, P points to + the next digit. */ +static lostFraction +trailingHexadecimalFraction(StringRef::iterator p, StringRef::iterator end, + unsigned int digitValue) +{ + unsigned int hexDigit; + + /* If the first trailing digit isn't 0 or 8 we can work out the + fraction immediately. */ + if (digitValue > 8) + return lfMoreThanHalf; + else if (digitValue < 8 && digitValue > 0) + return lfLessThanHalf; + + // Otherwise we need to find the first non-zero digit. + while (p != end && (*p == '0' || *p == '.')) + p++; + + assert(p != end && "Invalid trailing hexadecimal fraction!"); + + hexDigit = hexDigitValue(*p); + + /* If we ran off the end it is exactly zero or one-half, otherwise + a little more. */ + if (hexDigit == -1U) + return digitValue == 0 ? lfExactlyZero: lfExactlyHalf; + else + return digitValue == 0 ? lfLessThanHalf: lfMoreThanHalf; +} + +/* Return the fraction lost were a bignum truncated losing the least + significant BITS bits. */ +static lostFraction +lostFractionThroughTruncation(const integerPart *parts, + unsigned int partCount, + unsigned int bits) +{ + unsigned int lsb; + + lsb = APInt::tcLSB(parts, partCount); + + /* Note this is guaranteed true if bits == 0, or LSB == -1U. */ + if (bits <= lsb) + return lfExactlyZero; + if (bits == lsb + 1) + return lfExactlyHalf; + if (bits <= partCount * integerPartWidth && + APInt::tcExtractBit(parts, bits - 1)) + return lfMoreThanHalf; + + return lfLessThanHalf; +} + +/* Shift DST right BITS bits noting lost fraction. */ +static lostFraction +shiftRight(integerPart *dst, unsigned int parts, unsigned int bits) +{ + lostFraction lost_fraction; + + lost_fraction = lostFractionThroughTruncation(dst, parts, bits); + + APInt::tcShiftRight(dst, parts, bits); + + return lost_fraction; +} + +/* Combine the effect of two lost fractions. */ +static lostFraction +combineLostFractions(lostFraction moreSignificant, + lostFraction lessSignificant) +{ + if (lessSignificant != lfExactlyZero) { + if (moreSignificant == lfExactlyZero) + moreSignificant = lfLessThanHalf; + else if (moreSignificant == lfExactlyHalf) + moreSignificant = lfMoreThanHalf; + } + + return moreSignificant; +} + +/* The error from the true value, in half-ulps, on multiplying two + floating point numbers, which differ from the value they + approximate by at most HUE1 and HUE2 half-ulps, is strictly less + than the returned value. + + See "How to Read Floating Point Numbers Accurately" by William D + Clinger. */ +static unsigned int +HUerrBound(bool inexactMultiply, unsigned int HUerr1, unsigned int HUerr2) +{ + assert(HUerr1 < 2 || HUerr2 < 2 || (HUerr1 + HUerr2 < 8)); + + if (HUerr1 + HUerr2 == 0) + return inexactMultiply * 2; /* <= inexactMultiply half-ulps. */ + else + return inexactMultiply + 2 * (HUerr1 + HUerr2); +} + +/* The number of ulps from the boundary (zero, or half if ISNEAREST) + when the least significant BITS are truncated. BITS cannot be + zero. */ +static integerPart +ulpsFromBoundary(const integerPart *parts, unsigned int bits, bool isNearest) +{ + unsigned int count, partBits; + integerPart part, boundary; + + assert(bits != 0); + + bits--; + count = bits / integerPartWidth; + partBits = bits % integerPartWidth + 1; + + part = parts[count] & (~(integerPart) 0 >> (integerPartWidth - partBits)); + + if (isNearest) + boundary = (integerPart) 1 << (partBits - 1); + else + boundary = 0; + + if (count == 0) { + if (part - boundary <= boundary - part) + return part - boundary; + else + return boundary - part; + } + + if (part == boundary) { + while (--count) + if (parts[count]) + return ~(integerPart) 0; /* A lot. */ + + return parts[0]; + } else if (part == boundary - 1) { + while (--count) + if (~parts[count]) + return ~(integerPart) 0; /* A lot. */ + + return -parts[0]; + } + + return ~(integerPart) 0; /* A lot. */ +} + +/* Place pow(5, power) in DST, and return the number of parts used. + DST must be at least one part larger than size of the answer. */ +static unsigned int +powerOf5(integerPart *dst, unsigned int power) +{ + static const integerPart firstEightPowers[] = { 1, 5, 25, 125, 625, 3125, + 15625, 78125 }; + integerPart pow5s[maxPowerOfFiveParts * 2 + 5]; + pow5s[0] = 78125 * 5; + + unsigned int partsCount[16] = { 1 }; + integerPart scratch[maxPowerOfFiveParts], *p1, *p2, *pow5; + unsigned int result; + assert(power <= maxExponent); + + p1 = dst; + p2 = scratch; + + *p1 = firstEightPowers[power & 7]; + power >>= 3; + + result = 1; + pow5 = pow5s; + + for (unsigned int n = 0; power; power >>= 1, n++) { + unsigned int pc; + + pc = partsCount[n]; + + /* Calculate pow(5,pow(2,n+3)) if we haven't yet. */ + if (pc == 0) { + pc = partsCount[n - 1]; + APInt::tcFullMultiply(pow5, pow5 - pc, pow5 - pc, pc, pc); + pc *= 2; + if (pow5[pc - 1] == 0) + pc--; + partsCount[n] = pc; + } + + if (power & 1) { + integerPart *tmp; + + APInt::tcFullMultiply(p2, p1, pow5, result, pc); + result += pc; + if (p2[result - 1] == 0) + result--; + + /* Now result is in p1 with partsCount parts and p2 is scratch + space. */ + tmp = p1, p1 = p2, p2 = tmp; + } + + pow5 += pc; + } + + if (p1 != dst) + APInt::tcAssign(dst, p1, result); + + return result; +} + +/* Zero at the end to avoid modular arithmetic when adding one; used + when rounding up during hexadecimal output. */ +static const char hexDigitsLower[] = "0123456789abcdef0"; +static const char hexDigitsUpper[] = "0123456789ABCDEF0"; +static const char infinityL[] = "infinity"; +static const char infinityU[] = "INFINITY"; +static const char NaNL[] = "nan"; +static const char NaNU[] = "NAN"; + +/* Write out an integerPart in hexadecimal, starting with the most + significant nibble. Write out exactly COUNT hexdigits, return + COUNT. */ +static unsigned int +partAsHex (char *dst, integerPart part, unsigned int count, + const char *hexDigitChars) +{ + unsigned int result = count; + + assert(count != 0 && count <= integerPartWidth / 4); + + part >>= (integerPartWidth - 4 * count); + while (count--) { + dst[count] = hexDigitChars[part & 0xf]; + part >>= 4; + } + + return result; +} + +/* Write out an unsigned decimal integer. */ +static char * +writeUnsignedDecimal (char *dst, unsigned int n) +{ + char buff[40], *p; + + p = buff; + do + *p++ = '0' + n % 10; + while (n /= 10); + + do + *dst++ = *--p; + while (p != buff); + + return dst; +} + +/* Write out a signed decimal integer. */ +static char * +writeSignedDecimal (char *dst, int value) +{ + if (value < 0) { + *dst++ = '-'; + dst = writeUnsignedDecimal(dst, -(unsigned) value); + } else + dst = writeUnsignedDecimal(dst, value); + + return dst; +} + +/* Constructors. */ +void +APFloat::initialize(const fltSemantics *ourSemantics) +{ + unsigned int count; + + semantics = ourSemantics; + count = partCount(); + if (count > 1) + significand.parts = new integerPart[count]; +} + +void +APFloat::freeSignificand() +{ + if (needsCleanup()) + delete [] significand.parts; +} + +void +APFloat::assign(const APFloat &rhs) +{ + assert(semantics == rhs.semantics); + + sign = rhs.sign; + category = rhs.category; + exponent = rhs.exponent; + if (isFiniteNonZero() || category == fcNaN) + copySignificand(rhs); +} + +void +APFloat::copySignificand(const APFloat &rhs) +{ + assert(isFiniteNonZero() || category == fcNaN); + assert(rhs.partCount() >= partCount()); + + APInt::tcAssign(significandParts(), rhs.significandParts(), + partCount()); +} + +/* Make this number a NaN, with an arbitrary but deterministic value + for the significand. If double or longer, this is a signalling NaN, + which may not be ideal. If float, this is QNaN(0). */ +void APFloat::makeNaN(bool SNaN, bool Negative, const APInt *fill) +{ + category = fcNaN; + sign = Negative; + + integerPart *significand = significandParts(); + unsigned numParts = partCount(); + + // Set the significand bits to the fill. + if (!fill || fill->getNumWords() < numParts) + APInt::tcSet(significand, 0, numParts); + if (fill) { + APInt::tcAssign(significand, fill->getRawData(), + std::min(fill->getNumWords(), numParts)); + + // Zero out the excess bits of the significand. + unsigned bitsToPreserve = semantics->precision - 1; + unsigned part = bitsToPreserve / 64; + bitsToPreserve %= 64; + significand[part] &= ((1ULL << bitsToPreserve) - 1); + for (part++; part != numParts; ++part) + significand[part] = 0; + } + + unsigned QNaNBit = semantics->precision - 2; + + if (SNaN) { + // We always have to clear the QNaN bit to make it an SNaN. + APInt::tcClearBit(significand, QNaNBit); + + // If there are no bits set in the payload, we have to set + // *something* to make it a NaN instead of an infinity; + // conventionally, this is the next bit down from the QNaN bit. + if (APInt::tcIsZero(significand, numParts)) + APInt::tcSetBit(significand, QNaNBit - 1); + } else { + // We always have to set the QNaN bit to make it a QNaN. + APInt::tcSetBit(significand, QNaNBit); + } + + // For x87 extended precision, we want to make a NaN, not a + // pseudo-NaN. Maybe we should expose the ability to make + // pseudo-NaNs? + if (semantics == &APFloat::x87DoubleExtended) + APInt::tcSetBit(significand, QNaNBit + 1); +} + +APFloat APFloat::makeNaN(const fltSemantics &Sem, bool SNaN, bool Negative, + const APInt *fill) { + APFloat value(Sem, uninitialized); + value.makeNaN(SNaN, Negative, fill); + return value; +} + +APFloat & +APFloat::operator=(const APFloat &rhs) +{ + if (this != &rhs) { + if (semantics != rhs.semantics) { + freeSignificand(); + initialize(rhs.semantics); + } + assign(rhs); + } + + return *this; +} + +APFloat & +APFloat::operator=(APFloat &&rhs) { + freeSignificand(); + + semantics = rhs.semantics; + significand = rhs.significand; + exponent = rhs.exponent; + category = rhs.category; + sign = rhs.sign; + + rhs.semantics = &Bogus; + return *this; +} + +bool +APFloat::isDenormal() const { + return isFiniteNonZero() && (exponent == semantics->minExponent) && + (APInt::tcExtractBit(significandParts(), + semantics->precision - 1) == 0); +} + +bool +APFloat::isSmallest() const { + // The smallest number by magnitude in our format will be the smallest + // denormal, i.e. the floating point number with exponent being minimum + // exponent and significand bitwise equal to 1 (i.e. with MSB equal to 0). + return isFiniteNonZero() && exponent == semantics->minExponent && + significandMSB() == 0; +} + +bool APFloat::isSignificandAllOnes() const { + // Test if the significand excluding the integral bit is all ones. This allows + // us to test for binade boundaries. + const integerPart *Parts = significandParts(); + const unsigned PartCount = partCount(); + for (unsigned i = 0; i < PartCount - 1; i++) + if (~Parts[i]) + return false; + + // Set the unused high bits to all ones when we compare. + const unsigned NumHighBits = + PartCount*integerPartWidth - semantics->precision + 1; + assert(NumHighBits <= integerPartWidth && "Can not have more high bits to " + "fill than integerPartWidth"); + const integerPart HighBitFill = + ~integerPart(0) << (integerPartWidth - NumHighBits); + if (~(Parts[PartCount - 1] | HighBitFill)) + return false; + + return true; +} + +bool APFloat::isSignificandAllZeros() const { + // Test if the significand excluding the integral bit is all zeros. This + // allows us to test for binade boundaries. + const integerPart *Parts = significandParts(); + const unsigned PartCount = partCount(); + + for (unsigned i = 0; i < PartCount - 1; i++) + if (Parts[i]) + return false; + + const unsigned NumHighBits = + PartCount*integerPartWidth - semantics->precision + 1; + assert(NumHighBits <= integerPartWidth && "Can not have more high bits to " + "clear than integerPartWidth"); + const integerPart HighBitMask = ~integerPart(0) >> NumHighBits; + + if (Parts[PartCount - 1] & HighBitMask) + return false; + + return true; +} + +bool +APFloat::isLargest() const { + // The largest number by magnitude in our format will be the floating point + // number with maximum exponent and with significand that is all ones. + return isFiniteNonZero() && exponent == semantics->maxExponent + && isSignificandAllOnes(); +} + +bool +APFloat::isInteger() const { + // This could be made more efficient; I'm going for obviously correct. + if (!isFinite()) return false; + APFloat truncated = *this; + truncated.roundToIntegral(rmTowardZero); + return compare(truncated) == cmpEqual; +} + +bool +APFloat::bitwiseIsEqual(const APFloat &rhs) const { + if (this == &rhs) + return true; + if (semantics != rhs.semantics || + category != rhs.category || + sign != rhs.sign) + return false; + if (category==fcZero || category==fcInfinity) + return true; + + if (isFiniteNonZero() && exponent != rhs.exponent) + return false; + + return std::equal(significandParts(), significandParts() + partCount(), + rhs.significandParts()); +} + +APFloat::APFloat(const fltSemantics &ourSemantics, integerPart value) { + initialize(&ourSemantics); + sign = 0; + category = fcNormal; + zeroSignificand(); + exponent = ourSemantics.precision - 1; + significandParts()[0] = value; + normalize(rmNearestTiesToEven, lfExactlyZero); +} + +APFloat::APFloat(const fltSemantics &ourSemantics) { + initialize(&ourSemantics); + category = fcZero; + sign = false; +} + +APFloat::APFloat(const fltSemantics &ourSemantics, uninitializedTag tag) { + // Allocates storage if necessary but does not initialize it. + initialize(&ourSemantics); +} + +APFloat::APFloat(const fltSemantics &ourSemantics, StringRef text) { + initialize(&ourSemantics); + convertFromString(text, rmNearestTiesToEven); +} + +APFloat::APFloat(const APFloat &rhs) { + initialize(rhs.semantics); + assign(rhs); +} + +APFloat::APFloat(APFloat &&rhs) : semantics(&Bogus) { + *this = std::move(rhs); +} + +APFloat::~APFloat() +{ + freeSignificand(); +} + +// Profile - This method 'profiles' an APFloat for use with FoldingSet. +void APFloat::Profile(FoldingSetNodeID& ID) const { + ID.Add(bitcastToAPInt()); +} + +unsigned int +APFloat::partCount() const +{ + return partCountForBits(semantics->precision + 1); +} + +unsigned int +APFloat::semanticsPrecision(const fltSemantics &semantics) +{ + return semantics.precision; +} +APFloat::ExponentType +APFloat::semanticsMaxExponent(const fltSemantics &semantics) +{ + return semantics.maxExponent; +} +APFloat::ExponentType +APFloat::semanticsMinExponent(const fltSemantics &semantics) +{ + return semantics.minExponent; +} +unsigned int +APFloat::semanticsSizeInBits(const fltSemantics &semantics) +{ + return semantics.sizeInBits; +} + +const integerPart * +APFloat::significandParts() const +{ + return const_cast(this)->significandParts(); +} + +integerPart * +APFloat::significandParts() +{ + if (partCount() > 1) + return significand.parts; + else + return &significand.part; +} + +void +APFloat::zeroSignificand() +{ + APInt::tcSet(significandParts(), 0, partCount()); +} + +/* Increment an fcNormal floating point number's significand. */ +void +APFloat::incrementSignificand() +{ + integerPart carry; + + carry = APInt::tcIncrement(significandParts(), partCount()); + + /* Our callers should never cause us to overflow. */ + assert(carry == 0); + (void)carry; +} + +/* Add the significand of the RHS. Returns the carry flag. */ +integerPart +APFloat::addSignificand(const APFloat &rhs) +{ + integerPart *parts; + + parts = significandParts(); + + assert(semantics == rhs.semantics); + assert(exponent == rhs.exponent); + + return APInt::tcAdd(parts, rhs.significandParts(), 0, partCount()); +} + +/* Subtract the significand of the RHS with a borrow flag. Returns + the borrow flag. */ +integerPart +APFloat::subtractSignificand(const APFloat &rhs, integerPart borrow) +{ + integerPart *parts; + + parts = significandParts(); + + assert(semantics == rhs.semantics); + assert(exponent == rhs.exponent); + + return APInt::tcSubtract(parts, rhs.significandParts(), borrow, + partCount()); +} + +/* Multiply the significand of the RHS. If ADDEND is non-NULL, add it + on to the full-precision result of the multiplication. Returns the + lost fraction. */ +lostFraction +APFloat::multiplySignificand(const APFloat &rhs, const APFloat *addend) +{ + unsigned int omsb; // One, not zero, based MSB. + unsigned int partsCount, newPartsCount, precision; + integerPart *lhsSignificand; + integerPart scratch[4]; + integerPart *fullSignificand; + lostFraction lost_fraction; + bool ignored; + + assert(semantics == rhs.semantics); + + precision = semantics->precision; + + // Allocate space for twice as many bits as the original significand, plus one + // extra bit for the addition to overflow into. + newPartsCount = partCountForBits(precision * 2 + 1); + + if (newPartsCount > 4) + fullSignificand = new integerPart[newPartsCount]; + else + fullSignificand = scratch; + + lhsSignificand = significandParts(); + partsCount = partCount(); + + APInt::tcFullMultiply(fullSignificand, lhsSignificand, + rhs.significandParts(), partsCount, partsCount); + + lost_fraction = lfExactlyZero; + omsb = APInt::tcMSB(fullSignificand, newPartsCount) + 1; + exponent += rhs.exponent; + + // Assume the operands involved in the multiplication are single-precision + // FP, and the two multiplicants are: + // *this = a23 . a22 ... a0 * 2^e1 + // rhs = b23 . b22 ... b0 * 2^e2 + // the result of multiplication is: + // *this = c48 c47 c46 . c45 ... c0 * 2^(e1+e2) + // Note that there are three significant bits at the left-hand side of the + // radix point: two for the multiplication, and an overflow bit for the + // addition (that will always be zero at this point). Move the radix point + // toward left by two bits, and adjust exponent accordingly. + exponent += 2; + + if (addend && addend->isNonZero()) { + // The intermediate result of the multiplication has "2 * precision" + // signicant bit; adjust the addend to be consistent with mul result. + // + Significand savedSignificand = significand; + const fltSemantics *savedSemantics = semantics; + fltSemantics extendedSemantics; + opStatus status; + unsigned int extendedPrecision; + + // Normalize our MSB to one below the top bit to allow for overflow. + extendedPrecision = 2 * precision + 1; + if (omsb != extendedPrecision - 1) { + assert(extendedPrecision > omsb); + APInt::tcShiftLeft(fullSignificand, newPartsCount, + (extendedPrecision - 1) - omsb); + exponent -= (extendedPrecision - 1) - omsb; + } + + /* Create new semantics. */ + extendedSemantics = *semantics; + extendedSemantics.precision = extendedPrecision; + + if (newPartsCount == 1) + significand.part = fullSignificand[0]; + else + significand.parts = fullSignificand; + semantics = &extendedSemantics; + + APFloat extendedAddend(*addend); + status = extendedAddend.convert(extendedSemantics, rmTowardZero, &ignored); + assert(status == opOK); + (void)status; + + // Shift the significand of the addend right by one bit. This guarantees + // that the high bit of the significand is zero (same as fullSignificand), + // so the addition will overflow (if it does overflow at all) into the top bit. + lost_fraction = extendedAddend.shiftSignificandRight(1); + assert(lost_fraction == lfExactlyZero && + "Lost precision while shifting addend for fused-multiply-add."); + + lost_fraction = addOrSubtractSignificand(extendedAddend, false); + + /* Restore our state. */ + if (newPartsCount == 1) + fullSignificand[0] = significand.part; + significand = savedSignificand; + semantics = savedSemantics; + + omsb = APInt::tcMSB(fullSignificand, newPartsCount) + 1; + } + + // Convert the result having "2 * precision" significant-bits back to the one + // having "precision" significant-bits. First, move the radix point from + // poision "2*precision - 1" to "precision - 1". The exponent need to be + // adjusted by "2*precision - 1" - "precision - 1" = "precision". + exponent -= precision + 1; + + // In case MSB resides at the left-hand side of radix point, shift the + // mantissa right by some amount to make sure the MSB reside right before + // the radix point (i.e. "MSB . rest-significant-bits"). + // + // Note that the result is not normalized when "omsb < precision". So, the + // caller needs to call APFloat::normalize() if normalized value is expected. + if (omsb > precision) { + unsigned int bits, significantParts; + lostFraction lf; + + bits = omsb - precision; + significantParts = partCountForBits(omsb); + lf = shiftRight(fullSignificand, significantParts, bits); + lost_fraction = combineLostFractions(lf, lost_fraction); + exponent += bits; + } + + APInt::tcAssign(lhsSignificand, fullSignificand, partsCount); + + if (newPartsCount > 4) + delete [] fullSignificand; + + return lost_fraction; +} + +/* Multiply the significands of LHS and RHS to DST. */ +lostFraction +APFloat::divideSignificand(const APFloat &rhs) +{ + unsigned int bit, i, partsCount; + const integerPart *rhsSignificand; + integerPart *lhsSignificand, *dividend, *divisor; + integerPart scratch[4]; + lostFraction lost_fraction; + + assert(semantics == rhs.semantics); + + lhsSignificand = significandParts(); + rhsSignificand = rhs.significandParts(); + partsCount = partCount(); + + if (partsCount > 2) + dividend = new integerPart[partsCount * 2]; + else + dividend = scratch; + + divisor = dividend + partsCount; + + /* Copy the dividend and divisor as they will be modified in-place. */ + for (i = 0; i < partsCount; i++) { + dividend[i] = lhsSignificand[i]; + divisor[i] = rhsSignificand[i]; + lhsSignificand[i] = 0; + } + + exponent -= rhs.exponent; + + unsigned int precision = semantics->precision; + + /* Normalize the divisor. */ + bit = precision - APInt::tcMSB(divisor, partsCount) - 1; + if (bit) { + exponent += bit; + APInt::tcShiftLeft(divisor, partsCount, bit); + } + + /* Normalize the dividend. */ + bit = precision - APInt::tcMSB(dividend, partsCount) - 1; + if (bit) { + exponent -= bit; + APInt::tcShiftLeft(dividend, partsCount, bit); + } + + /* Ensure the dividend >= divisor initially for the loop below. + Incidentally, this means that the division loop below is + guaranteed to set the integer bit to one. */ + if (APInt::tcCompare(dividend, divisor, partsCount) < 0) { + exponent--; + APInt::tcShiftLeft(dividend, partsCount, 1); + assert(APInt::tcCompare(dividend, divisor, partsCount) >= 0); + } + + /* Long division. */ + for (bit = precision; bit; bit -= 1) { + if (APInt::tcCompare(dividend, divisor, partsCount) >= 0) { + APInt::tcSubtract(dividend, divisor, 0, partsCount); + APInt::tcSetBit(lhsSignificand, bit - 1); + } + + APInt::tcShiftLeft(dividend, partsCount, 1); + } + + /* Figure out the lost fraction. */ + int cmp = APInt::tcCompare(dividend, divisor, partsCount); + + if (cmp > 0) + lost_fraction = lfMoreThanHalf; + else if (cmp == 0) + lost_fraction = lfExactlyHalf; + else if (APInt::tcIsZero(dividend, partsCount)) + lost_fraction = lfExactlyZero; + else + lost_fraction = lfLessThanHalf; + + if (partsCount > 2) + delete [] dividend; + + return lost_fraction; +} + +unsigned int +APFloat::significandMSB() const +{ + return APInt::tcMSB(significandParts(), partCount()); +} + +unsigned int +APFloat::significandLSB() const +{ + return APInt::tcLSB(significandParts(), partCount()); +} + +/* Note that a zero result is NOT normalized to fcZero. */ +lostFraction +APFloat::shiftSignificandRight(unsigned int bits) +{ + /* Our exponent should not overflow. */ + assert((ExponentType) (exponent + bits) >= exponent); + + exponent += bits; + + return shiftRight(significandParts(), partCount(), bits); +} + +/* Shift the significand left BITS bits, subtract BITS from its exponent. */ +void +APFloat::shiftSignificandLeft(unsigned int bits) +{ + assert(bits < semantics->precision); + + if (bits) { + unsigned int partsCount = partCount(); + + APInt::tcShiftLeft(significandParts(), partsCount, bits); + exponent -= bits; + + assert(!APInt::tcIsZero(significandParts(), partsCount)); + } +} + +APFloat::cmpResult +APFloat::compareAbsoluteValue(const APFloat &rhs) const +{ + int compare; + + assert(semantics == rhs.semantics); + assert(isFiniteNonZero()); + assert(rhs.isFiniteNonZero()); + + compare = exponent - rhs.exponent; + + /* If exponents are equal, do an unsigned bignum comparison of the + significands. */ + if (compare == 0) + compare = APInt::tcCompare(significandParts(), rhs.significandParts(), + partCount()); + + if (compare > 0) + return cmpGreaterThan; + else if (compare < 0) + return cmpLessThan; + else + return cmpEqual; +} + +/* Handle overflow. Sign is preserved. We either become infinity or + the largest finite number. */ +APFloat::opStatus +APFloat::handleOverflow(roundingMode rounding_mode) +{ + /* Infinity? */ + if (rounding_mode == rmNearestTiesToEven || + rounding_mode == rmNearestTiesToAway || + (rounding_mode == rmTowardPositive && !sign) || + (rounding_mode == rmTowardNegative && sign)) { + category = fcInfinity; + return (opStatus) (opOverflow | opInexact); + } + + /* Otherwise we become the largest finite number. */ + category = fcNormal; + exponent = semantics->maxExponent; + APInt::tcSetLeastSignificantBits(significandParts(), partCount(), + semantics->precision); + + return opInexact; +} + +/* Returns TRUE if, when truncating the current number, with BIT the + new LSB, with the given lost fraction and rounding mode, the result + would need to be rounded away from zero (i.e., by increasing the + signficand). This routine must work for fcZero of both signs, and + fcNormal numbers. */ +bool +APFloat::roundAwayFromZero(roundingMode rounding_mode, + lostFraction lost_fraction, + unsigned int bit) const +{ + /* NaNs and infinities should not have lost fractions. */ + assert(isFiniteNonZero() || category == fcZero); + + /* Current callers never pass this so we don't handle it. */ + assert(lost_fraction != lfExactlyZero); + + switch (rounding_mode) { + case rmNearestTiesToAway: + return lost_fraction == lfExactlyHalf || lost_fraction == lfMoreThanHalf; + + case rmNearestTiesToEven: + if (lost_fraction == lfMoreThanHalf) + return true; + + /* Our zeroes don't have a significand to test. */ + if (lost_fraction == lfExactlyHalf && category != fcZero) + return APInt::tcExtractBit(significandParts(), bit); + + return false; + + case rmTowardZero: + return false; + + case rmTowardPositive: + return !sign; + + case rmTowardNegative: + return sign; + } + llvm_unreachable("Invalid rounding mode found"); +} + +APFloat::opStatus +APFloat::normalize(roundingMode rounding_mode, + lostFraction lost_fraction) +{ + unsigned int omsb; /* One, not zero, based MSB. */ + int exponentChange; + + if (!isFiniteNonZero()) + return opOK; + + /* Before rounding normalize the exponent of fcNormal numbers. */ + omsb = significandMSB() + 1; + + if (omsb) { + /* OMSB is numbered from 1. We want to place it in the integer + bit numbered PRECISION if possible, with a compensating change in + the exponent. */ + exponentChange = omsb - semantics->precision; + + /* If the resulting exponent is too high, overflow according to + the rounding mode. */ + if (exponent + exponentChange > semantics->maxExponent) + return handleOverflow(rounding_mode); + + /* Subnormal numbers have exponent minExponent, and their MSB + is forced based on that. */ + if (exponent + exponentChange < semantics->minExponent) + exponentChange = semantics->minExponent - exponent; + + /* Shifting left is easy as we don't lose precision. */ + if (exponentChange < 0) { + assert(lost_fraction == lfExactlyZero); + + shiftSignificandLeft(-exponentChange); + + return opOK; + } + + if (exponentChange > 0) { + lostFraction lf; + + /* Shift right and capture any new lost fraction. */ + lf = shiftSignificandRight(exponentChange); + + lost_fraction = combineLostFractions(lf, lost_fraction); + + /* Keep OMSB up-to-date. */ + if (omsb > (unsigned) exponentChange) + omsb -= exponentChange; + else + omsb = 0; + } + } + + /* Now round the number according to rounding_mode given the lost + fraction. */ + + /* As specified in IEEE 754, since we do not trap we do not report + underflow for exact results. */ + if (lost_fraction == lfExactlyZero) { + /* Canonicalize zeroes. */ + if (omsb == 0) + category = fcZero; + + return opOK; + } + + /* Increment the significand if we're rounding away from zero. */ + if (roundAwayFromZero(rounding_mode, lost_fraction, 0)) { + if (omsb == 0) + exponent = semantics->minExponent; + + incrementSignificand(); + omsb = significandMSB() + 1; + + /* Did the significand increment overflow? */ + if (omsb == (unsigned) semantics->precision + 1) { + /* Renormalize by incrementing the exponent and shifting our + significand right one. However if we already have the + maximum exponent we overflow to infinity. */ + if (exponent == semantics->maxExponent) { + category = fcInfinity; + + return (opStatus) (opOverflow | opInexact); + } + + shiftSignificandRight(1); + + return opInexact; + } + } + + /* The normal case - we were and are not denormal, and any + significand increment above didn't overflow. */ + if (omsb == semantics->precision) + return opInexact; + + /* We have a non-zero denormal. */ + assert(omsb < semantics->precision); + + /* Canonicalize zeroes. */ + if (omsb == 0) + category = fcZero; + + /* The fcZero case is a denormal that underflowed to zero. */ + return (opStatus) (opUnderflow | opInexact); +} + +APFloat::opStatus +APFloat::addOrSubtractSpecials(const APFloat &rhs, bool subtract) +{ + switch (PackCategoriesIntoKey(category, rhs.category)) { + default: + llvm_unreachable(nullptr); + + case PackCategoriesIntoKey(fcNaN, fcZero): + case PackCategoriesIntoKey(fcNaN, fcNormal): + case PackCategoriesIntoKey(fcNaN, fcInfinity): + case PackCategoriesIntoKey(fcNaN, fcNaN): + case PackCategoriesIntoKey(fcNormal, fcZero): + case PackCategoriesIntoKey(fcInfinity, fcNormal): + case PackCategoriesIntoKey(fcInfinity, fcZero): + return opOK; + + case PackCategoriesIntoKey(fcZero, fcNaN): + case PackCategoriesIntoKey(fcNormal, fcNaN): + case PackCategoriesIntoKey(fcInfinity, fcNaN): + // We need to be sure to flip the sign here for subtraction because we + // don't have a separate negate operation so -NaN becomes 0 - NaN here. + sign = rhs.sign ^ subtract; + category = fcNaN; + copySignificand(rhs); + return opOK; + + case PackCategoriesIntoKey(fcNormal, fcInfinity): + case PackCategoriesIntoKey(fcZero, fcInfinity): + category = fcInfinity; + sign = rhs.sign ^ subtract; + return opOK; + + case PackCategoriesIntoKey(fcZero, fcNormal): + assign(rhs); + sign = rhs.sign ^ subtract; + return opOK; + + case PackCategoriesIntoKey(fcZero, fcZero): + /* Sign depends on rounding mode; handled by caller. */ + return opOK; + + case PackCategoriesIntoKey(fcInfinity, fcInfinity): + /* Differently signed infinities can only be validly + subtracted. */ + if (((sign ^ rhs.sign)!=0) != subtract) { + makeNaN(); + return APFloat::opInvalidOp; + } + + return opOK; + + case PackCategoriesIntoKey(fcNormal, fcNormal): + return opDivByZero; + } +} + +/* Add or subtract two normal numbers. */ +lostFraction +APFloat::addOrSubtractSignificand(const APFloat &rhs, bool subtract) +{ + integerPart carry; + lostFraction lost_fraction; + int bits; + + /* Determine if the operation on the absolute values is effectively + an addition or subtraction. */ + subtract ^= static_cast(sign ^ rhs.sign); + + /* Are we bigger exponent-wise than the RHS? */ + bits = exponent - rhs.exponent; + + /* Subtraction is more subtle than one might naively expect. */ + if (subtract) { + APFloat temp_rhs(rhs); + bool reverse; + + if (bits == 0) { + reverse = compareAbsoluteValue(temp_rhs) == cmpLessThan; + lost_fraction = lfExactlyZero; + } else if (bits > 0) { + lost_fraction = temp_rhs.shiftSignificandRight(bits - 1); + shiftSignificandLeft(1); + reverse = false; + } else { + lost_fraction = shiftSignificandRight(-bits - 1); + temp_rhs.shiftSignificandLeft(1); + reverse = true; + } + + if (reverse) { + carry = temp_rhs.subtractSignificand + (*this, lost_fraction != lfExactlyZero); + copySignificand(temp_rhs); + sign = !sign; + } else { + carry = subtractSignificand + (temp_rhs, lost_fraction != lfExactlyZero); + } + + /* Invert the lost fraction - it was on the RHS and + subtracted. */ + if (lost_fraction == lfLessThanHalf) + lost_fraction = lfMoreThanHalf; + else if (lost_fraction == lfMoreThanHalf) + lost_fraction = lfLessThanHalf; + + /* The code above is intended to ensure that no borrow is + necessary. */ + assert(!carry); + (void)carry; + } else { + if (bits > 0) { + APFloat temp_rhs(rhs); + + lost_fraction = temp_rhs.shiftSignificandRight(bits); + carry = addSignificand(temp_rhs); + } else { + lost_fraction = shiftSignificandRight(-bits); + carry = addSignificand(rhs); + } + + /* We have a guard bit; generating a carry cannot happen. */ + assert(!carry); + (void)carry; + } + + return lost_fraction; +} + +APFloat::opStatus +APFloat::multiplySpecials(const APFloat &rhs) +{ + switch (PackCategoriesIntoKey(category, rhs.category)) { + default: + llvm_unreachable(nullptr); + + case PackCategoriesIntoKey(fcNaN, fcZero): + case PackCategoriesIntoKey(fcNaN, fcNormal): + case PackCategoriesIntoKey(fcNaN, fcInfinity): + case PackCategoriesIntoKey(fcNaN, fcNaN): + sign = false; + return opOK; + + case PackCategoriesIntoKey(fcZero, fcNaN): + case PackCategoriesIntoKey(fcNormal, fcNaN): + case PackCategoriesIntoKey(fcInfinity, fcNaN): + sign = false; + category = fcNaN; + copySignificand(rhs); + return opOK; + + case PackCategoriesIntoKey(fcNormal, fcInfinity): + case PackCategoriesIntoKey(fcInfinity, fcNormal): + case PackCategoriesIntoKey(fcInfinity, fcInfinity): + category = fcInfinity; + return opOK; + + case PackCategoriesIntoKey(fcZero, fcNormal): + case PackCategoriesIntoKey(fcNormal, fcZero): + case PackCategoriesIntoKey(fcZero, fcZero): + category = fcZero; + return opOK; + + case PackCategoriesIntoKey(fcZero, fcInfinity): + case PackCategoriesIntoKey(fcInfinity, fcZero): + makeNaN(); + return opInvalidOp; + + case PackCategoriesIntoKey(fcNormal, fcNormal): + return opOK; + } +} + +APFloat::opStatus +APFloat::divideSpecials(const APFloat &rhs) +{ + switch (PackCategoriesIntoKey(category, rhs.category)) { + default: + llvm_unreachable(nullptr); + + case PackCategoriesIntoKey(fcZero, fcNaN): + case PackCategoriesIntoKey(fcNormal, fcNaN): + case PackCategoriesIntoKey(fcInfinity, fcNaN): + category = fcNaN; + copySignificand(rhs); + case PackCategoriesIntoKey(fcNaN, fcZero): + case PackCategoriesIntoKey(fcNaN, fcNormal): + case PackCategoriesIntoKey(fcNaN, fcInfinity): + case PackCategoriesIntoKey(fcNaN, fcNaN): + sign = false; + case PackCategoriesIntoKey(fcInfinity, fcZero): + case PackCategoriesIntoKey(fcInfinity, fcNormal): + case PackCategoriesIntoKey(fcZero, fcInfinity): + case PackCategoriesIntoKey(fcZero, fcNormal): + return opOK; + + case PackCategoriesIntoKey(fcNormal, fcInfinity): + category = fcZero; + return opOK; + + case PackCategoriesIntoKey(fcNormal, fcZero): + category = fcInfinity; + return opDivByZero; + + case PackCategoriesIntoKey(fcInfinity, fcInfinity): + case PackCategoriesIntoKey(fcZero, fcZero): + makeNaN(); + return opInvalidOp; + + case PackCategoriesIntoKey(fcNormal, fcNormal): + return opOK; + } +} + +APFloat::opStatus +APFloat::modSpecials(const APFloat &rhs) +{ + switch (PackCategoriesIntoKey(category, rhs.category)) { + default: + llvm_unreachable(nullptr); + + case PackCategoriesIntoKey(fcNaN, fcZero): + case PackCategoriesIntoKey(fcNaN, fcNormal): + case PackCategoriesIntoKey(fcNaN, fcInfinity): + case PackCategoriesIntoKey(fcNaN, fcNaN): + case PackCategoriesIntoKey(fcZero, fcInfinity): + case PackCategoriesIntoKey(fcZero, fcNormal): + case PackCategoriesIntoKey(fcNormal, fcInfinity): + return opOK; + + case PackCategoriesIntoKey(fcZero, fcNaN): + case PackCategoriesIntoKey(fcNormal, fcNaN): + case PackCategoriesIntoKey(fcInfinity, fcNaN): + sign = false; + category = fcNaN; + copySignificand(rhs); + return opOK; + + case PackCategoriesIntoKey(fcNormal, fcZero): + case PackCategoriesIntoKey(fcInfinity, fcZero): + case PackCategoriesIntoKey(fcInfinity, fcNormal): + case PackCategoriesIntoKey(fcInfinity, fcInfinity): + case PackCategoriesIntoKey(fcZero, fcZero): + makeNaN(); + return opInvalidOp; + + case PackCategoriesIntoKey(fcNormal, fcNormal): + return opOK; + } +} + +/* Change sign. */ +void +APFloat::changeSign() +{ + /* Look mummy, this one's easy. */ + sign = !sign; +} + +void +APFloat::clearSign() +{ + /* So is this one. */ + sign = 0; +} + +void +APFloat::copySign(const APFloat &rhs) +{ + /* And this one. */ + sign = rhs.sign; +} + +/* Normalized addition or subtraction. */ +APFloat::opStatus +APFloat::addOrSubtract(const APFloat &rhs, roundingMode rounding_mode, + bool subtract) +{ + opStatus fs; + + fs = addOrSubtractSpecials(rhs, subtract); + + /* This return code means it was not a simple case. */ + if (fs == opDivByZero) { + lostFraction lost_fraction; + + lost_fraction = addOrSubtractSignificand(rhs, subtract); + fs = normalize(rounding_mode, lost_fraction); + + /* Can only be zero if we lost no fraction. */ + assert(category != fcZero || lost_fraction == lfExactlyZero); + } + + /* If two numbers add (exactly) to zero, IEEE 754 decrees it is a + positive zero unless rounding to minus infinity, except that + adding two like-signed zeroes gives that zero. */ + if (category == fcZero) { + if (rhs.category != fcZero || (sign == rhs.sign) == subtract) + sign = (rounding_mode == rmTowardNegative); + } + + return fs; +} + +/* Normalized addition. */ +APFloat::opStatus +APFloat::add(const APFloat &rhs, roundingMode rounding_mode) +{ + return addOrSubtract(rhs, rounding_mode, false); +} + +/* Normalized subtraction. */ +APFloat::opStatus +APFloat::subtract(const APFloat &rhs, roundingMode rounding_mode) +{ + return addOrSubtract(rhs, rounding_mode, true); +} + +/* Normalized multiply. */ +APFloat::opStatus +APFloat::multiply(const APFloat &rhs, roundingMode rounding_mode) +{ + opStatus fs; + + sign ^= rhs.sign; + fs = multiplySpecials(rhs); + + if (isFiniteNonZero()) { + lostFraction lost_fraction = multiplySignificand(rhs, nullptr); + fs = normalize(rounding_mode, lost_fraction); + if (lost_fraction != lfExactlyZero) + fs = (opStatus) (fs | opInexact); + } + + return fs; +} + +/* Normalized divide. */ +APFloat::opStatus +APFloat::divide(const APFloat &rhs, roundingMode rounding_mode) +{ + opStatus fs; + + sign ^= rhs.sign; + fs = divideSpecials(rhs); + + if (isFiniteNonZero()) { + lostFraction lost_fraction = divideSignificand(rhs); + fs = normalize(rounding_mode, lost_fraction); + if (lost_fraction != lfExactlyZero) + fs = (opStatus) (fs | opInexact); + } + + return fs; +} + +/* Normalized remainder. This is not currently correct in all cases. */ +APFloat::opStatus +APFloat::remainder(const APFloat &rhs) +{ + opStatus fs; + APFloat V = *this; + unsigned int origSign = sign; + + fs = V.divide(rhs, rmNearestTiesToEven); + if (fs == opDivByZero) + return fs; + + int parts = partCount(); + integerPart *x = new integerPart[parts]; + bool ignored; + fs = V.convertToInteger(x, parts * integerPartWidth, true, + rmNearestTiesToEven, &ignored); + if (fs==opInvalidOp) + return fs; + + fs = V.convertFromZeroExtendedInteger(x, parts * integerPartWidth, true, + rmNearestTiesToEven); + assert(fs==opOK); // should always work + + fs = V.multiply(rhs, rmNearestTiesToEven); + assert(fs==opOK || fs==opInexact); // should not overflow or underflow + + fs = subtract(V, rmNearestTiesToEven); + assert(fs==opOK || fs==opInexact); // likewise + + if (isZero()) + sign = origSign; // IEEE754 requires this + delete[] x; + return fs; +} + +/* Normalized llvm frem (C fmod). + This is not currently correct in all cases. */ +APFloat::opStatus +APFloat::mod(const APFloat &rhs) +{ + opStatus fs; + fs = modSpecials(rhs); + + if (isFiniteNonZero() && rhs.isFiniteNonZero()) { + APFloat V = *this; + unsigned int origSign = sign; + + fs = V.divide(rhs, rmNearestTiesToEven); + if (fs == opDivByZero) + return fs; + + int parts = partCount(); + integerPart *x = new integerPart[parts]; + bool ignored; + fs = V.convertToInteger(x, parts * integerPartWidth, true, + rmTowardZero, &ignored); + if (fs==opInvalidOp) + return fs; + + fs = V.convertFromZeroExtendedInteger(x, parts * integerPartWidth, true, + rmNearestTiesToEven); + assert(fs==opOK); // should always work + + fs = V.multiply(rhs, rmNearestTiesToEven); + assert(fs==opOK || fs==opInexact); // should not overflow or underflow + + fs = subtract(V, rmNearestTiesToEven); + assert(fs==opOK || fs==opInexact); // likewise + + if (isZero()) + sign = origSign; // IEEE754 requires this + delete[] x; + } + return fs; +} + +/* Normalized fused-multiply-add. */ +APFloat::opStatus +APFloat::fusedMultiplyAdd(const APFloat &multiplicand, + const APFloat &addend, + roundingMode rounding_mode) +{ + opStatus fs; + + /* Post-multiplication sign, before addition. */ + sign ^= multiplicand.sign; + + /* If and only if all arguments are normal do we need to do an + extended-precision calculation. */ + if (isFiniteNonZero() && + multiplicand.isFiniteNonZero() && + addend.isFinite()) { + lostFraction lost_fraction; + + lost_fraction = multiplySignificand(multiplicand, &addend); + fs = normalize(rounding_mode, lost_fraction); + if (lost_fraction != lfExactlyZero) + fs = (opStatus) (fs | opInexact); + + /* If two numbers add (exactly) to zero, IEEE 754 decrees it is a + positive zero unless rounding to minus infinity, except that + adding two like-signed zeroes gives that zero. */ + if (category == fcZero && !(fs & opUnderflow) && sign != addend.sign) + sign = (rounding_mode == rmTowardNegative); + } else { + fs = multiplySpecials(multiplicand); + + /* FS can only be opOK or opInvalidOp. There is no more work + to do in the latter case. The IEEE-754R standard says it is + implementation-defined in this case whether, if ADDEND is a + quiet NaN, we raise invalid op; this implementation does so. + + If we need to do the addition we can do so with normal + precision. */ + if (fs == opOK) + fs = addOrSubtract(addend, rounding_mode, false); + } + + return fs; +} + +/* Rounding-mode corrrect round to integral value. */ +APFloat::opStatus APFloat::roundToIntegral(roundingMode rounding_mode) { + opStatus fs; + + // If the exponent is large enough, we know that this value is already + // integral, and the arithmetic below would potentially cause it to saturate + // to +/-Inf. Bail out early instead. + if (isFiniteNonZero() && exponent+1 >= (int)semanticsPrecision(*semantics)) + return opOK; + + // The algorithm here is quite simple: we add 2^(p-1), where p is the + // precision of our format, and then subtract it back off again. The choice + // of rounding modes for the addition/subtraction determines the rounding mode + // for our integral rounding as well. + // NOTE: When the input value is negative, we do subtraction followed by + // addition instead. + APInt IntegerConstant(NextPowerOf2(semanticsPrecision(*semantics)), 1); + IntegerConstant <<= semanticsPrecision(*semantics)-1; + APFloat MagicConstant(*semantics); + fs = MagicConstant.convertFromAPInt(IntegerConstant, false, + rmNearestTiesToEven); + MagicConstant.copySign(*this); + + if (fs != opOK) + return fs; + + // Preserve the input sign so that we can handle 0.0/-0.0 cases correctly. + bool inputSign = isNegative(); + + fs = add(MagicConstant, rounding_mode); + if (fs != opOK && fs != opInexact) + return fs; + + fs = subtract(MagicConstant, rounding_mode); + + // Restore the input sign. + if (inputSign != isNegative()) + changeSign(); + + return fs; +} + + +/* Comparison requires normalized numbers. */ +APFloat::cmpResult +APFloat::compare(const APFloat &rhs) const +{ + cmpResult result; + + assert(semantics == rhs.semantics); + + switch (PackCategoriesIntoKey(category, rhs.category)) { + default: + llvm_unreachable(nullptr); + + case PackCategoriesIntoKey(fcNaN, fcZero): + case PackCategoriesIntoKey(fcNaN, fcNormal): + case PackCategoriesIntoKey(fcNaN, fcInfinity): + case PackCategoriesIntoKey(fcNaN, fcNaN): + case PackCategoriesIntoKey(fcZero, fcNaN): + case PackCategoriesIntoKey(fcNormal, fcNaN): + case PackCategoriesIntoKey(fcInfinity, fcNaN): + return cmpUnordered; + + case PackCategoriesIntoKey(fcInfinity, fcNormal): + case PackCategoriesIntoKey(fcInfinity, fcZero): + case PackCategoriesIntoKey(fcNormal, fcZero): + if (sign) + return cmpLessThan; + else + return cmpGreaterThan; + + case PackCategoriesIntoKey(fcNormal, fcInfinity): + case PackCategoriesIntoKey(fcZero, fcInfinity): + case PackCategoriesIntoKey(fcZero, fcNormal): + if (rhs.sign) + return cmpGreaterThan; + else + return cmpLessThan; + + case PackCategoriesIntoKey(fcInfinity, fcInfinity): + if (sign == rhs.sign) + return cmpEqual; + else if (sign) + return cmpLessThan; + else + return cmpGreaterThan; + + case PackCategoriesIntoKey(fcZero, fcZero): + return cmpEqual; + + case PackCategoriesIntoKey(fcNormal, fcNormal): + break; + } + + /* Two normal numbers. Do they have the same sign? */ + if (sign != rhs.sign) { + if (sign) + result = cmpLessThan; + else + result = cmpGreaterThan; + } else { + /* Compare absolute values; invert result if negative. */ + result = compareAbsoluteValue(rhs); + + if (sign) { + if (result == cmpLessThan) + result = cmpGreaterThan; + else if (result == cmpGreaterThan) + result = cmpLessThan; + } + } + + return result; +} + +/// APFloat::convert - convert a value of one floating point type to another. +/// The return value corresponds to the IEEE754 exceptions. *losesInfo +/// records whether the transformation lost information, i.e. whether +/// converting the result back to the original type will produce the +/// original value (this is almost the same as return value==fsOK, but there +/// are edge cases where this is not so). + +APFloat::opStatus +APFloat::convert(const fltSemantics &toSemantics, + roundingMode rounding_mode, bool *losesInfo) +{ + lostFraction lostFraction; + unsigned int newPartCount, oldPartCount; + opStatus fs; + int shift; + const fltSemantics &fromSemantics = *semantics; + + lostFraction = lfExactlyZero; + newPartCount = partCountForBits(toSemantics.precision + 1); + oldPartCount = partCount(); + shift = toSemantics.precision - fromSemantics.precision; + + bool X86SpecialNan = false; + if (&fromSemantics == &APFloat::x87DoubleExtended && + &toSemantics != &APFloat::x87DoubleExtended && category == fcNaN && + (!(*significandParts() & 0x8000000000000000ULL) || + !(*significandParts() & 0x4000000000000000ULL))) { + // x86 has some unusual NaNs which cannot be represented in any other + // format; note them here. + X86SpecialNan = true; + } + + // If this is a truncation of a denormal number, and the target semantics + // has larger exponent range than the source semantics (this can happen + // when truncating from PowerPC double-double to double format), the + // right shift could lose result mantissa bits. Adjust exponent instead + // of performing excessive shift. + if (shift < 0 && isFiniteNonZero()) { + int exponentChange = significandMSB() + 1 - fromSemantics.precision; + if (exponent + exponentChange < toSemantics.minExponent) + exponentChange = toSemantics.minExponent - exponent; + if (exponentChange < shift) + exponentChange = shift; + if (exponentChange < 0) { + shift -= exponentChange; + exponent += exponentChange; + } + } + + // If this is a truncation, perform the shift before we narrow the storage. + if (shift < 0 && (isFiniteNonZero() || category==fcNaN)) + lostFraction = shiftRight(significandParts(), oldPartCount, -shift); + + // Fix the storage so it can hold to new value. + if (newPartCount > oldPartCount) { + // The new type requires more storage; make it available. + integerPart *newParts; + newParts = new integerPart[newPartCount]; + APInt::tcSet(newParts, 0, newPartCount); + if (isFiniteNonZero() || category==fcNaN) + APInt::tcAssign(newParts, significandParts(), oldPartCount); + freeSignificand(); + significand.parts = newParts; + } else if (newPartCount == 1 && oldPartCount != 1) { + // Switch to built-in storage for a single part. + integerPart newPart = 0; + if (isFiniteNonZero() || category==fcNaN) + newPart = significandParts()[0]; + freeSignificand(); + significand.part = newPart; + } + + // Now that we have the right storage, switch the semantics. + semantics = &toSemantics; + + // If this is an extension, perform the shift now that the storage is + // available. + if (shift > 0 && (isFiniteNonZero() || category==fcNaN)) + APInt::tcShiftLeft(significandParts(), newPartCount, shift); + + if (isFiniteNonZero()) { + fs = normalize(rounding_mode, lostFraction); + *losesInfo = (fs != opOK); + } else if (category == fcNaN) { + *losesInfo = lostFraction != lfExactlyZero || X86SpecialNan; + + // For x87 extended precision, we want to make a NaN, not a special NaN if + // the input wasn't special either. + if (!X86SpecialNan && semantics == &APFloat::x87DoubleExtended) + APInt::tcSetBit(significandParts(), semantics->precision - 1); + + // gcc forces the Quiet bit on, which means (float)(double)(float_sNan) + // does not give you back the same bits. This is dubious, and we + // don't currently do it. You're really supposed to get + // an invalid operation signal at runtime, but nobody does that. + fs = opOK; + } else { + *losesInfo = false; + fs = opOK; + } + + return fs; +} + +/* Convert a floating point number to an integer according to the + rounding mode. If the rounded integer value is out of range this + returns an invalid operation exception and the contents of the + destination parts are unspecified. If the rounded value is in + range but the floating point number is not the exact integer, the C + standard doesn't require an inexact exception to be raised. IEEE + 854 does require it so we do that. + + Note that for conversions to integer type the C standard requires + round-to-zero to always be used. */ +APFloat::opStatus +APFloat::convertToSignExtendedInteger(integerPart *parts, unsigned int width, + bool isSigned, + roundingMode rounding_mode, + bool *isExact) const +{ + lostFraction lost_fraction; + const integerPart *src; + unsigned int dstPartsCount, truncatedBits; + + *isExact = false; + + /* Handle the three special cases first. */ + if (category == fcInfinity || category == fcNaN) + return opInvalidOp; + + dstPartsCount = partCountForBits(width); + + if (category == fcZero) { + APInt::tcSet(parts, 0, dstPartsCount); + // Negative zero can't be represented as an int. + *isExact = !sign; + return opOK; + } + + src = significandParts(); + + /* Step 1: place our absolute value, with any fraction truncated, in + the destination. */ + if (exponent < 0) { + /* Our absolute value is less than one; truncate everything. */ + APInt::tcSet(parts, 0, dstPartsCount); + /* For exponent -1 the integer bit represents .5, look at that. + For smaller exponents leftmost truncated bit is 0. */ + truncatedBits = semantics->precision -1U - exponent; + } else { + /* We want the most significant (exponent + 1) bits; the rest are + truncated. */ + unsigned int bits = exponent + 1U; + + /* Hopelessly large in magnitude? */ + if (bits > width) + return opInvalidOp; + + if (bits < semantics->precision) { + /* We truncate (semantics->precision - bits) bits. */ + truncatedBits = semantics->precision - bits; + APInt::tcExtract(parts, dstPartsCount, src, bits, truncatedBits); + } else { + /* We want at least as many bits as are available. */ + APInt::tcExtract(parts, dstPartsCount, src, semantics->precision, 0); + APInt::tcShiftLeft(parts, dstPartsCount, bits - semantics->precision); + truncatedBits = 0; + } + } + + /* Step 2: work out any lost fraction, and increment the absolute + value if we would round away from zero. */ + if (truncatedBits) { + lost_fraction = lostFractionThroughTruncation(src, partCount(), + truncatedBits); + if (lost_fraction != lfExactlyZero && + roundAwayFromZero(rounding_mode, lost_fraction, truncatedBits)) { + if (APInt::tcIncrement(parts, dstPartsCount)) + return opInvalidOp; /* Overflow. */ + } + } else { + lost_fraction = lfExactlyZero; + } + + /* Step 3: check if we fit in the destination. */ + unsigned int omsb = APInt::tcMSB(parts, dstPartsCount) + 1; + + if (sign) { + if (!isSigned) { + /* Negative numbers cannot be represented as unsigned. */ + if (omsb != 0) + return opInvalidOp; + } else { + /* It takes omsb bits to represent the unsigned integer value. + We lose a bit for the sign, but care is needed as the + maximally negative integer is a special case. */ + if (omsb == width && APInt::tcLSB(parts, dstPartsCount) + 1 != omsb) + return opInvalidOp; + + /* This case can happen because of rounding. */ + if (omsb > width) + return opInvalidOp; + } + + APInt::tcNegate (parts, dstPartsCount); + } else { + if (omsb >= width + !isSigned) + return opInvalidOp; + } + + if (lost_fraction == lfExactlyZero) { + *isExact = true; + return opOK; + } else + return opInexact; +} + +/* Same as convertToSignExtendedInteger, except we provide + deterministic values in case of an invalid operation exception, + namely zero for NaNs and the minimal or maximal value respectively + for underflow or overflow. + The *isExact output tells whether the result is exact, in the sense + that converting it back to the original floating point type produces + the original value. This is almost equivalent to result==opOK, + except for negative zeroes. +*/ +APFloat::opStatus +APFloat::convertToInteger(integerPart *parts, unsigned int width, + bool isSigned, + roundingMode rounding_mode, bool *isExact) const +{ + opStatus fs; + + fs = convertToSignExtendedInteger(parts, width, isSigned, rounding_mode, + isExact); + + if (fs == opInvalidOp) { + unsigned int bits, dstPartsCount; + + dstPartsCount = partCountForBits(width); + + if (category == fcNaN) + bits = 0; + else if (sign) + bits = isSigned; + else + bits = width - isSigned; + + APInt::tcSetLeastSignificantBits(parts, dstPartsCount, bits); + if (sign && isSigned) + APInt::tcShiftLeft(parts, dstPartsCount, width - 1); + } + + return fs; +} + +/* Same as convertToInteger(integerPart*, ...), except the result is returned in + an APSInt, whose initial bit-width and signed-ness are used to determine the + precision of the conversion. + */ +APFloat::opStatus +APFloat::convertToInteger(APSInt &result, + roundingMode rounding_mode, bool *isExact) const +{ + unsigned bitWidth = result.getBitWidth(); + SmallVector parts(result.getNumWords()); + opStatus status = convertToInteger( + parts.data(), bitWidth, result.isSigned(), rounding_mode, isExact); + // Keeps the original signed-ness. + result = APInt(bitWidth, parts); + return status; +} + +/* Convert an unsigned integer SRC to a floating point number, + rounding according to ROUNDING_MODE. The sign of the floating + point number is not modified. */ +APFloat::opStatus +APFloat::convertFromUnsignedParts(const integerPart *src, + unsigned int srcCount, + roundingMode rounding_mode) +{ + unsigned int omsb, precision, dstCount; + integerPart *dst; + lostFraction lost_fraction; + + category = fcNormal; + omsb = APInt::tcMSB(src, srcCount) + 1; + dst = significandParts(); + dstCount = partCount(); + precision = semantics->precision; + + /* We want the most significant PRECISION bits of SRC. There may not + be that many; extract what we can. */ + if (precision <= omsb) { + exponent = omsb - 1; + lost_fraction = lostFractionThroughTruncation(src, srcCount, + omsb - precision); + APInt::tcExtract(dst, dstCount, src, precision, omsb - precision); + } else { + exponent = precision - 1; + lost_fraction = lfExactlyZero; + APInt::tcExtract(dst, dstCount, src, omsb, 0); + } + + return normalize(rounding_mode, lost_fraction); +} + +APFloat::opStatus +APFloat::convertFromAPInt(const APInt &Val, + bool isSigned, + roundingMode rounding_mode) +{ + unsigned int partCount = Val.getNumWords(); + APInt api = Val; + + sign = false; + if (isSigned && api.isNegative()) { + sign = true; + api = -api; + } + + return convertFromUnsignedParts(api.getRawData(), partCount, rounding_mode); +} + +/* Convert a two's complement integer SRC to a floating point number, + rounding according to ROUNDING_MODE. ISSIGNED is true if the + integer is signed, in which case it must be sign-extended. */ +APFloat::opStatus +APFloat::convertFromSignExtendedInteger(const integerPart *src, + unsigned int srcCount, + bool isSigned, + roundingMode rounding_mode) +{ + opStatus status; + + if (isSigned && + APInt::tcExtractBit(src, srcCount * integerPartWidth - 1)) { + integerPart *copy; + + /* If we're signed and negative negate a copy. */ + sign = true; + copy = new integerPart[srcCount]; + APInt::tcAssign(copy, src, srcCount); + APInt::tcNegate(copy, srcCount); + status = convertFromUnsignedParts(copy, srcCount, rounding_mode); + delete [] copy; + } else { + sign = false; + status = convertFromUnsignedParts(src, srcCount, rounding_mode); + } + + return status; +} + +/* FIXME: should this just take a const APInt reference? */ +APFloat::opStatus +APFloat::convertFromZeroExtendedInteger(const integerPart *parts, + unsigned int width, bool isSigned, + roundingMode rounding_mode) +{ + unsigned int partCount = partCountForBits(width); + APInt api = APInt(width, makeArrayRef(parts, partCount)); + + sign = false; + if (isSigned && APInt::tcExtractBit(parts, width - 1)) { + sign = true; + api = -api; + } + + return convertFromUnsignedParts(api.getRawData(), partCount, rounding_mode); +} + +APFloat::opStatus +APFloat::convertFromHexadecimalString(StringRef s, roundingMode rounding_mode) +{ + lostFraction lost_fraction = lfExactlyZero; + + category = fcNormal; + zeroSignificand(); + exponent = 0; + + integerPart *significand = significandParts(); + unsigned partsCount = partCount(); + unsigned bitPos = partsCount * integerPartWidth; + bool computedTrailingFraction = false; + + // Skip leading zeroes and any (hexa)decimal point. + StringRef::iterator begin = s.begin(); + StringRef::iterator end = s.end(); + StringRef::iterator dot; + StringRef::iterator p = skipLeadingZeroesAndAnyDot(begin, end, &dot); + StringRef::iterator firstSignificantDigit = p; + + while (p != end) { + integerPart hex_value; + + if (*p == '.') { + assert(dot == end && "String contains multiple dots"); + dot = p++; + continue; + } + + hex_value = hexDigitValue(*p); + if (hex_value == -1U) + break; + + p++; + + // Store the number while we have space. + if (bitPos) { + bitPos -= 4; + hex_value <<= bitPos % integerPartWidth; + significand[bitPos / integerPartWidth] |= hex_value; + } else if (!computedTrailingFraction) { + lost_fraction = trailingHexadecimalFraction(p, end, hex_value); + computedTrailingFraction = true; + } + } + + /* Hex floats require an exponent but not a hexadecimal point. */ + assert(p != end && "Hex strings require an exponent"); + assert((*p == 'p' || *p == 'P') && "Invalid character in significand"); + assert(p != begin && "Significand has no digits"); + assert((dot == end || p - begin != 1) && "Significand has no digits"); + + /* Ignore the exponent if we are zero. */ + if (p != firstSignificantDigit) { + int expAdjustment; + + /* Implicit hexadecimal point? */ + if (dot == end) + dot = p; + + /* Calculate the exponent adjustment implicit in the number of + significant digits. */ + expAdjustment = static_cast(dot - firstSignificantDigit); + if (expAdjustment < 0) + expAdjustment++; + expAdjustment = expAdjustment * 4 - 1; + + /* Adjust for writing the significand starting at the most + significant nibble. */ + expAdjustment += semantics->precision; + expAdjustment -= partsCount * integerPartWidth; + + /* Adjust for the given exponent. */ + exponent = totalExponent(p + 1, end, expAdjustment); + } + + return normalize(rounding_mode, lost_fraction); +} + +APFloat::opStatus +APFloat::roundSignificandWithExponent(const integerPart *decSigParts, + unsigned sigPartCount, int exp, + roundingMode rounding_mode) +{ + unsigned int parts, pow5PartCount; + fltSemantics calcSemantics = { 32767, -32767, 0, 0 }; + integerPart pow5Parts[maxPowerOfFiveParts]; + bool isNearest; + + isNearest = (rounding_mode == rmNearestTiesToEven || + rounding_mode == rmNearestTiesToAway); + + parts = partCountForBits(semantics->precision + 11); + + /* Calculate pow(5, abs(exp)). */ + pow5PartCount = powerOf5(pow5Parts, exp >= 0 ? exp: -exp); + + for (;; parts *= 2) { + opStatus sigStatus, powStatus; + unsigned int excessPrecision, truncatedBits; + + calcSemantics.precision = parts * integerPartWidth - 1; + excessPrecision = calcSemantics.precision - semantics->precision; + truncatedBits = excessPrecision; + + APFloat decSig = APFloat::getZero(calcSemantics, sign); + APFloat pow5(calcSemantics); + + sigStatus = decSig.convertFromUnsignedParts(decSigParts, sigPartCount, + rmNearestTiesToEven); + powStatus = pow5.convertFromUnsignedParts(pow5Parts, pow5PartCount, + rmNearestTiesToEven); + /* Add exp, as 10^n = 5^n * 2^n. */ + decSig.exponent += exp; + + lostFraction calcLostFraction; + integerPart HUerr, HUdistance; + unsigned int powHUerr; + + if (exp >= 0) { + /* multiplySignificand leaves the precision-th bit set to 1. */ + calcLostFraction = decSig.multiplySignificand(pow5, nullptr); + powHUerr = powStatus != opOK; + } else { + calcLostFraction = decSig.divideSignificand(pow5); + /* Denormal numbers have less precision. */ + if (decSig.exponent < semantics->minExponent) { + excessPrecision += (semantics->minExponent - decSig.exponent); + truncatedBits = excessPrecision; + if (excessPrecision > calcSemantics.precision) + excessPrecision = calcSemantics.precision; + } + /* Extra half-ulp lost in reciprocal of exponent. */ + powHUerr = (powStatus == opOK && calcLostFraction == lfExactlyZero) ? 0:2; + } + + /* Both multiplySignificand and divideSignificand return the + result with the integer bit set. */ + assert(APInt::tcExtractBit + (decSig.significandParts(), calcSemantics.precision - 1) == 1); + + HUerr = HUerrBound(calcLostFraction != lfExactlyZero, sigStatus != opOK, + powHUerr); + HUdistance = 2 * ulpsFromBoundary(decSig.significandParts(), + excessPrecision, isNearest); + + /* Are we guaranteed to round correctly if we truncate? */ + if (HUdistance >= HUerr) { + APInt::tcExtract(significandParts(), partCount(), decSig.significandParts(), + calcSemantics.precision - excessPrecision, + excessPrecision); + /* Take the exponent of decSig. If we tcExtract-ed less bits + above we must adjust our exponent to compensate for the + implicit right shift. */ + exponent = (decSig.exponent + semantics->precision + - (calcSemantics.precision - excessPrecision)); + calcLostFraction = lostFractionThroughTruncation(decSig.significandParts(), + decSig.partCount(), + truncatedBits); + return normalize(rounding_mode, calcLostFraction); + } + } +} + +APFloat::opStatus +APFloat::convertFromDecimalString(StringRef str, roundingMode rounding_mode) // qq +{ + decimalInfo D; + opStatus fs; + + /* Scan the text. */ + StringRef::iterator p = str.begin(); + fs = interpretDecimal(p, str.end(), &D); + if (fs != opOK) + return fs; + + /* Handle the quick cases. First the case of no significant digits, + i.e. zero, and then exponents that are obviously too large or too + small. Writing L for log 10 / log 2, a number d.ddddd*10^exp + definitely overflows if + + (exp - 1) * L >= maxExponent + + and definitely underflows to zero where + + (exp + 1) * L <= minExponent - precision + + With integer arithmetic the tightest bounds for L are + + 93/28 < L < 196/59 [ numerator <= 256 ] + 42039/12655 < L < 28738/8651 [ numerator <= 65536 ] + */ + + // Test if we have a zero number allowing for strings with no null terminators + // and zero decimals with non-zero exponents. + // + // We computed firstSigDigit by ignoring all zeros and dots. Thus if + // D->firstSigDigit equals str.end(), every digit must be a zero and there can + // be at most one dot. On the other hand, if we have a zero with a non-zero + // exponent, then we know that D.firstSigDigit will be non-numeric. + if (D.firstSigDigit == str.end() || decDigitValue(*D.firstSigDigit) >= 10U) { + category = fcZero; + fs = opOK; + + /* Check whether the normalized exponent is high enough to overflow + max during the log-rebasing in the max-exponent check below. */ + } else if (D.normalizedExponent - 1 > INT_MAX / 42039) { + fs = handleOverflow(rounding_mode); + + /* If it wasn't, then it also wasn't high enough to overflow max + during the log-rebasing in the min-exponent check. Check that it + won't overflow min in either check, then perform the min-exponent + check. */ + } else if (D.normalizedExponent - 1 < INT_MIN / 42039 || + (D.normalizedExponent + 1) * 28738 <= + 8651 * (semantics->minExponent - (int) semantics->precision)) { + /* Underflow to zero and round. */ + category = fcNormal; + zeroSignificand(); + fs = normalize(rounding_mode, lfLessThanHalf); + + /* We can finally safely perform the max-exponent check. */ + } else if ((D.normalizedExponent - 1) * 42039 + >= 12655 * semantics->maxExponent) { + /* Overflow and round. */ + fs = handleOverflow(rounding_mode); + } else { + integerPart *decSignificand; + unsigned int partCount; + + /* A tight upper bound on number of bits required to hold an + N-digit decimal integer is N * 196 / 59. Allocate enough space + to hold the full significand, and an extra part required by + tcMultiplyPart. */ + partCount = static_cast(D.lastSigDigit - D.firstSigDigit) + 1; + partCount = partCountForBits(1 + 196 * partCount / 59); + decSignificand = new integerPart[partCount + 1]; + partCount = 0; + + /* Convert to binary efficiently - we do almost all multiplication + in an integerPart. When this would overflow do we do a single + bignum multiplication, and then revert again to multiplication + in an integerPart. */ + do { + integerPart decValue, val, multiplier; + + val = 0; + multiplier = 1; + + do { + if (*p == '.') { + p++; + if (p == str.end()) { + break; + } + } + decValue = decDigitValue(*p++); + assert(decValue < 10U && "Invalid character in significand"); + multiplier *= 10; + val = val * 10 + decValue; + /* The maximum number that can be multiplied by ten with any + digit added without overflowing an integerPart. */ + } while (p <= D.lastSigDigit && multiplier <= (~ (integerPart) 0 - 9) / 10); + + /* Multiply out the current part. */ + APInt::tcMultiplyPart(decSignificand, decSignificand, multiplier, val, + partCount, partCount + 1, false); + + /* If we used another part (likely but not guaranteed), increase + the count. */ + if (decSignificand[partCount]) + partCount++; + } while (p <= D.lastSigDigit); + + category = fcNormal; + fs = roundSignificandWithExponent(decSignificand, partCount, + D.exponent, rounding_mode); + + delete [] decSignificand; + } + + return fs; +} + +bool +APFloat::convertFromStringSpecials(StringRef str) { + if (str.equals("inf") || str.equals("INFINITY")) { + makeInf(false); + return true; + } + + if (str.equals("-inf") || str.equals("-INFINITY")) { + makeInf(true); + return true; + } + + if (str.equals("nan") || str.equals("NaN")) { + makeNaN(false, false); + return true; + } + + if (str.equals("-nan") || str.equals("-NaN")) { + makeNaN(false, true); + return true; + } + + return false; +} + +APFloat::opStatus +APFloat::convertFromString(StringRef str, roundingMode rounding_mode) +{ + assert(!str.empty() && "Invalid string length"); + + // Handle special cases. + if (convertFromStringSpecials(str)) + return opOK; + + /* Handle a leading minus sign. */ + StringRef::iterator p = str.begin(); + size_t slen = str.size(); + sign = *p == '-' ? 1 : 0; + if (*p == '-' || *p == '+') { + p++; + slen--; + assert(slen && "String has no digits"); + } + + if (slen >= 2 && p[0] == '0' && (p[1] == 'x' || p[1] == 'X')) { + assert(slen - 2 && "Invalid string"); + return convertFromHexadecimalString(StringRef(p + 2, slen - 2), + rounding_mode); + } + + return convertFromDecimalString(StringRef(p, slen), rounding_mode); +} + +/* Write out a hexadecimal representation of the floating point value + to DST, which must be of sufficient size, in the C99 form + [-]0xh.hhhhp[+-]d. Return the number of characters written, + excluding the terminating NUL. + + If UPPERCASE, the output is in upper case, otherwise in lower case. + + HEXDIGITS digits appear altogether, rounding the value if + necessary. If HEXDIGITS is 0, the minimal precision to display the + number precisely is used instead. If nothing would appear after + the decimal point it is suppressed. + + The decimal exponent is always printed and has at least one digit. + Zero values display an exponent of zero. Infinities and NaNs + appear as "infinity" or "nan" respectively. + + The above rules are as specified by C99. There is ambiguity about + what the leading hexadecimal digit should be. This implementation + uses whatever is necessary so that the exponent is displayed as + stored. This implies the exponent will fall within the IEEE format + range, and the leading hexadecimal digit will be 0 (for denormals), + 1 (normal numbers) or 2 (normal numbers rounded-away-from-zero with + any other digits zero). +*/ +unsigned int +APFloat::convertToHexString(char *dst, unsigned int hexDigits, + bool upperCase, roundingMode rounding_mode) const +{ + char *p; + + p = dst; + if (sign) + *dst++ = '-'; + + switch (category) { + case fcInfinity: + memcpy (dst, upperCase ? infinityU: infinityL, sizeof infinityU - 1); + dst += sizeof infinityL - 1; + break; + + case fcNaN: + memcpy (dst, upperCase ? NaNU: NaNL, sizeof NaNU - 1); + dst += sizeof NaNU - 1; + break; + + case fcZero: + *dst++ = '0'; + *dst++ = upperCase ? 'X': 'x'; + *dst++ = '0'; + if (hexDigits > 1) { + *dst++ = '.'; + memset (dst, '0', hexDigits - 1); + dst += hexDigits - 1; + } + *dst++ = upperCase ? 'P': 'p'; + *dst++ = '0'; + break; + + case fcNormal: + dst = convertNormalToHexString (dst, hexDigits, upperCase, rounding_mode); + break; + } + + *dst = 0; + + return static_cast(dst - p); +} + +/* Does the hard work of outputting the correctly rounded hexadecimal + form of a normal floating point number with the specified number of + hexadecimal digits. If HEXDIGITS is zero the minimum number of + digits necessary to print the value precisely is output. */ +char * +APFloat::convertNormalToHexString(char *dst, unsigned int hexDigits, + bool upperCase, + roundingMode rounding_mode) const +{ + unsigned int count, valueBits, shift, partsCount, outputDigits; + const char *hexDigitChars; + const integerPart *significand; + char *p; + bool roundUp; + + *dst++ = '0'; + *dst++ = upperCase ? 'X': 'x'; + + roundUp = false; + hexDigitChars = upperCase ? hexDigitsUpper: hexDigitsLower; + + significand = significandParts(); + partsCount = partCount(); + + /* +3 because the first digit only uses the single integer bit, so + we have 3 virtual zero most-significant-bits. */ + valueBits = semantics->precision + 3; + shift = integerPartWidth - valueBits % integerPartWidth; + + /* The natural number of digits required ignoring trailing + insignificant zeroes. */ + outputDigits = (valueBits - significandLSB () + 3) / 4; + + /* hexDigits of zero means use the required number for the + precision. Otherwise, see if we are truncating. If we are, + find out if we need to round away from zero. */ + if (hexDigits) { + if (hexDigits < outputDigits) { + /* We are dropping non-zero bits, so need to check how to round. + "bits" is the number of dropped bits. */ + unsigned int bits; + lostFraction fraction; + + bits = valueBits - hexDigits * 4; + fraction = lostFractionThroughTruncation (significand, partsCount, bits); + roundUp = roundAwayFromZero(rounding_mode, fraction, bits); + } + outputDigits = hexDigits; + } + + /* Write the digits consecutively, and start writing in the location + of the hexadecimal point. We move the most significant digit + left and add the hexadecimal point later. */ + p = ++dst; + + count = (valueBits + integerPartWidth - 1) / integerPartWidth; + + while (outputDigits && count) { + integerPart part; + + /* Put the most significant integerPartWidth bits in "part". */ + if (--count == partsCount) + part = 0; /* An imaginary higher zero part. */ + else + part = significand[count] << shift; + + if (count && shift) + part |= significand[count - 1] >> (integerPartWidth - shift); + + /* Convert as much of "part" to hexdigits as we can. */ + unsigned int curDigits = integerPartWidth / 4; + + if (curDigits > outputDigits) + curDigits = outputDigits; + dst += partAsHex (dst, part, curDigits, hexDigitChars); + outputDigits -= curDigits; + } + + if (roundUp) { + char *q = dst; + + /* Note that hexDigitChars has a trailing '0'. */ + do { + q--; + *q = hexDigitChars[hexDigitValue (*q) + 1]; + } while (*q == '0'); + assert(q >= p); + } else { + /* Add trailing zeroes. */ + memset (dst, '0', outputDigits); + dst += outputDigits; + } + + /* Move the most significant digit to before the point, and if there + is something after the decimal point add it. This must come + after rounding above. */ + p[-1] = p[0]; + if (dst -1 == p) + dst--; + else + p[0] = '.'; + + /* Finally output the exponent. */ + *dst++ = upperCase ? 'P': 'p'; + + return writeSignedDecimal (dst, exponent); +} + +hash_code llvm_ks::hash_value(const APFloat &Arg) { + if (!Arg.isFiniteNonZero()) + return hash_combine((uint8_t)Arg.category, + // NaN has no sign, fix it at zero. + Arg.isNaN() ? (uint8_t)0 : (uint8_t)Arg.sign, + Arg.semantics->precision); + + // Normal floats need their exponent and significand hashed. + return hash_combine((uint8_t)Arg.category, (uint8_t)Arg.sign, + Arg.semantics->precision, Arg.exponent, + hash_combine_range( + Arg.significandParts(), + Arg.significandParts() + Arg.partCount())); +} + +// Conversion from APFloat to/from host float/double. It may eventually be +// possible to eliminate these and have everybody deal with APFloats, but that +// will take a while. This approach will not easily extend to long double. +// Current implementation requires integerPartWidth==64, which is correct at +// the moment but could be made more general. + +// Denormals have exponent minExponent in APFloat, but minExponent-1 in +// the actual IEEE respresentations. We compensate for that here. + +APInt +APFloat::convertF80LongDoubleAPFloatToAPInt() const +{ + assert(semantics == (const llvm_ks::fltSemantics*)&x87DoubleExtended); + assert(partCount()==2); + + uint64_t myexponent, mysignificand; + + if (isFiniteNonZero()) { + myexponent = exponent+16383; //bias + mysignificand = significandParts()[0]; + if (myexponent==1 && !(mysignificand & 0x8000000000000000ULL)) + myexponent = 0; // denormal + } else if (category==fcZero) { + myexponent = 0; + mysignificand = 0; + } else if (category==fcInfinity) { + myexponent = 0x7fff; + mysignificand = 0x8000000000000000ULL; + } else { + assert(category == fcNaN && "Unknown category"); + myexponent = 0x7fff; + mysignificand = significandParts()[0]; + } + + uint64_t words[2]; + words[0] = mysignificand; + words[1] = ((uint64_t)(sign & 1) << 15) | + (myexponent & 0x7fffLL); + return APInt(80, words); +} + +APInt +APFloat::convertPPCDoubleDoubleAPFloatToAPInt() const +{ + assert(semantics == (const llvm_ks::fltSemantics*)&PPCDoubleDouble); + assert(partCount()==2); + + uint64_t words[2]; + opStatus fs; + bool losesInfo; + + // Convert number to double. To avoid spurious underflows, we re- + // normalize against the "double" minExponent first, and only *then* + // truncate the mantissa. The result of that second conversion + // may be inexact, but should never underflow. + // Declare fltSemantics before APFloat that uses it (and + // saves pointer to it) to ensure correct destruction order. + fltSemantics extendedSemantics = *semantics; + extendedSemantics.minExponent = IEEEdouble.minExponent; + APFloat extended(*this); + fs = extended.convert(extendedSemantics, rmNearestTiesToEven, &losesInfo); + assert(fs == opOK && !losesInfo); + (void)fs; + + APFloat u(extended); + fs = u.convert(IEEEdouble, rmNearestTiesToEven, &losesInfo); + assert(fs == opOK || fs == opInexact); + (void)fs; + words[0] = *u.convertDoubleAPFloatToAPInt().getRawData(); + + // If conversion was exact or resulted in a special case, we're done; + // just set the second double to zero. Otherwise, re-convert back to + // the extended format and compute the difference. This now should + // convert exactly to double. + if (u.isFiniteNonZero() && losesInfo) { + fs = u.convert(extendedSemantics, rmNearestTiesToEven, &losesInfo); + assert(fs == opOK && !losesInfo); + (void)fs; + + APFloat v(extended); + v.subtract(u, rmNearestTiesToEven); + fs = v.convert(IEEEdouble, rmNearestTiesToEven, &losesInfo); + assert(fs == opOK && !losesInfo); + (void)fs; + words[1] = *v.convertDoubleAPFloatToAPInt().getRawData(); + } else { + words[1] = 0; + } + + return APInt(128, words); +} + +APInt +APFloat::convertQuadrupleAPFloatToAPInt() const +{ + assert(semantics == (const llvm_ks::fltSemantics*)&IEEEquad); + assert(partCount()==2); + + uint64_t myexponent, mysignificand, mysignificand2; + + if (isFiniteNonZero()) { + myexponent = exponent+16383; //bias + mysignificand = significandParts()[0]; + mysignificand2 = significandParts()[1]; + if (myexponent==1 && !(mysignificand2 & 0x1000000000000LL)) + myexponent = 0; // denormal + } else if (category==fcZero) { + myexponent = 0; + mysignificand = mysignificand2 = 0; + } else if (category==fcInfinity) { + myexponent = 0x7fff; + mysignificand = mysignificand2 = 0; + } else { + assert(category == fcNaN && "Unknown category!"); + myexponent = 0x7fff; + mysignificand = significandParts()[0]; + mysignificand2 = significandParts()[1]; + } + + uint64_t words[2]; + words[0] = mysignificand; + words[1] = ((uint64_t)(sign & 1) << 63) | + ((myexponent & 0x7fff) << 48) | + (mysignificand2 & 0xffffffffffffLL); + + return APInt(128, words); +} + +APInt +APFloat::convertDoubleAPFloatToAPInt() const +{ + assert(semantics == (const llvm_ks::fltSemantics*)&IEEEdouble); + assert(partCount()==1); + + uint64_t myexponent, mysignificand; + + if (isFiniteNonZero()) { + myexponent = exponent+1023; //bias + mysignificand = *significandParts(); + if (myexponent==1 && !(mysignificand & 0x10000000000000LL)) + myexponent = 0; // denormal + } else if (category==fcZero) { + myexponent = 0; + mysignificand = 0; + } else if (category==fcInfinity) { + myexponent = 0x7ff; + mysignificand = 0; + } else { + assert(category == fcNaN && "Unknown category!"); + myexponent = 0x7ff; + mysignificand = *significandParts(); + } + + return APInt(64, ((((uint64_t)(sign & 1) << 63) | + ((myexponent & 0x7ff) << 52) | + (mysignificand & 0xfffffffffffffLL)))); +} + +APInt +APFloat::convertFloatAPFloatToAPInt() const +{ + assert(semantics == (const llvm_ks::fltSemantics*)&IEEEsingle); + assert(partCount()==1); + + uint32_t myexponent, mysignificand; + + if (isFiniteNonZero()) { + myexponent = exponent+127; //bias + mysignificand = (uint32_t)*significandParts(); + if (myexponent == 1 && !(mysignificand & 0x800000)) + myexponent = 0; // denormal + } else if (category==fcZero) { + myexponent = 0; + mysignificand = 0; + } else if (category==fcInfinity) { + myexponent = 0xff; + mysignificand = 0; + } else { + assert(category == fcNaN && "Unknown category!"); + myexponent = 0xff; + mysignificand = (uint32_t)*significandParts(); + } + + return APInt(32, (((sign&1) << 31) | ((myexponent&0xff) << 23) | + (mysignificand & 0x7fffff))); +} + +APInt +APFloat::convertHalfAPFloatToAPInt() const +{ + assert(semantics == (const llvm_ks::fltSemantics*)&IEEEhalf); + assert(partCount()==1); + + uint32_t myexponent, mysignificand; + + if (isFiniteNonZero()) { + myexponent = exponent+15; //bias + mysignificand = (uint32_t)*significandParts(); + if (myexponent == 1 && !(mysignificand & 0x400)) + myexponent = 0; // denormal + } else if (category==fcZero) { + myexponent = 0; + mysignificand = 0; + } else if (category==fcInfinity) { + myexponent = 0x1f; + mysignificand = 0; + } else { + assert(category == fcNaN && "Unknown category!"); + myexponent = 0x1f; + mysignificand = (uint32_t)*significandParts(); + } + + return APInt(16, (((sign&1) << 15) | ((myexponent&0x1f) << 10) | + (mysignificand & 0x3ff))); +} + +// This function creates an APInt that is just a bit map of the floating +// point constant as it would appear in memory. It is not a conversion, +// and treating the result as a normal integer is unlikely to be useful. + +APInt +APFloat::bitcastToAPInt() const +{ + if (semantics == (const llvm_ks::fltSemantics*)&IEEEhalf) + return convertHalfAPFloatToAPInt(); + + if (semantics == (const llvm_ks::fltSemantics*)&IEEEsingle) + return convertFloatAPFloatToAPInt(); + + if (semantics == (const llvm_ks::fltSemantics*)&IEEEdouble) + return convertDoubleAPFloatToAPInt(); + + if (semantics == (const llvm_ks::fltSemantics*)&IEEEquad) + return convertQuadrupleAPFloatToAPInt(); + + if (semantics == (const llvm_ks::fltSemantics*)&PPCDoubleDouble) + return convertPPCDoubleDoubleAPFloatToAPInt(); + + assert(semantics == (const llvm_ks::fltSemantics*)&x87DoubleExtended && + "unknown format!"); + return convertF80LongDoubleAPFloatToAPInt(); +} + +float +APFloat::convertToFloat() const +{ + assert(semantics == (const llvm_ks::fltSemantics*)&IEEEsingle && + "Float semantics are not IEEEsingle"); + APInt api = bitcastToAPInt(); + return api.bitsToFloat(); +} + +double +APFloat::convertToDouble() const +{ + assert(semantics == (const llvm_ks::fltSemantics*)&IEEEdouble && + "Float semantics are not IEEEdouble"); + APInt api = bitcastToAPInt(); + return api.bitsToDouble(); +} + +/// Integer bit is explicit in this format. Intel hardware (387 and later) +/// does not support these bit patterns: +/// exponent = all 1's, integer bit 0, significand 0 ("pseudoinfinity") +/// exponent = all 1's, integer bit 0, significand nonzero ("pseudoNaN") +/// exponent = 0, integer bit 1 ("pseudodenormal") +/// exponent!=0 nor all 1's, integer bit 0 ("unnormal") +/// At the moment, the first two are treated as NaNs, the second two as Normal. +void +APFloat::initFromF80LongDoubleAPInt(const APInt &api) +{ + assert(api.getBitWidth()==80); + uint64_t i1 = api.getRawData()[0]; + uint64_t i2 = api.getRawData()[1]; + uint64_t myexponent = (i2 & 0x7fff); + uint64_t mysignificand = i1; + + initialize(&APFloat::x87DoubleExtended); + assert(partCount()==2); + + sign = static_cast(i2>>15); + if (myexponent==0 && mysignificand==0) { + // exponent, significand meaningless + category = fcZero; + } else if (myexponent==0x7fff && mysignificand==0x8000000000000000ULL) { + // exponent, significand meaningless + category = fcInfinity; + } else if (myexponent==0x7fff && mysignificand!=0x8000000000000000ULL) { + // exponent meaningless + category = fcNaN; + significandParts()[0] = mysignificand; + significandParts()[1] = 0; + } else { + category = fcNormal; + exponent = myexponent - 16383; + significandParts()[0] = mysignificand; + significandParts()[1] = 0; + if (myexponent==0) // denormal + exponent = -16382; + } +} + +void +APFloat::initFromPPCDoubleDoubleAPInt(const APInt &api) +{ + assert(api.getBitWidth()==128); + uint64_t i1 = api.getRawData()[0]; + uint64_t i2 = api.getRawData()[1]; + opStatus fs; + bool losesInfo; + + // Get the first double and convert to our format. + initFromDoubleAPInt(APInt(64, i1)); + fs = convert(PPCDoubleDouble, rmNearestTiesToEven, &losesInfo); + assert(fs == opOK && !losesInfo); + (void)fs; + + // Unless we have a special case, add in second double. + if (isFiniteNonZero()) { + APFloat v(IEEEdouble, APInt(64, i2)); + fs = v.convert(PPCDoubleDouble, rmNearestTiesToEven, &losesInfo); + assert(fs == opOK && !losesInfo); + (void)fs; + + add(v, rmNearestTiesToEven); + } +} + +void +APFloat::initFromQuadrupleAPInt(const APInt &api) +{ + assert(api.getBitWidth()==128); + uint64_t i1 = api.getRawData()[0]; + uint64_t i2 = api.getRawData()[1]; + uint64_t myexponent = (i2 >> 48) & 0x7fff; + uint64_t mysignificand = i1; + uint64_t mysignificand2 = i2 & 0xffffffffffffLL; + + initialize(&APFloat::IEEEquad); + assert(partCount()==2); + + sign = static_cast(i2>>63); + if (myexponent==0 && + (mysignificand==0 && mysignificand2==0)) { + // exponent, significand meaningless + category = fcZero; + } else if (myexponent==0x7fff && + (mysignificand==0 && mysignificand2==0)) { + // exponent, significand meaningless + category = fcInfinity; + } else if (myexponent==0x7fff && + (mysignificand!=0 || mysignificand2 !=0)) { + // exponent meaningless + category = fcNaN; + significandParts()[0] = mysignificand; + significandParts()[1] = mysignificand2; + } else { + category = fcNormal; + exponent = myexponent - 16383; + significandParts()[0] = mysignificand; + significandParts()[1] = mysignificand2; + if (myexponent==0) // denormal + exponent = -16382; + else + significandParts()[1] |= 0x1000000000000LL; // integer bit + } +} + +void +APFloat::initFromDoubleAPInt(const APInt &api) +{ + assert(api.getBitWidth()==64); + uint64_t i = *api.getRawData(); + uint64_t myexponent = (i >> 52) & 0x7ff; + uint64_t mysignificand = i & 0xfffffffffffffLL; + + initialize(&APFloat::IEEEdouble); + assert(partCount()==1); + + sign = static_cast(i>>63); + if (myexponent==0 && mysignificand==0) { + // exponent, significand meaningless + category = fcZero; + } else if (myexponent==0x7ff && mysignificand==0) { + // exponent, significand meaningless + category = fcInfinity; + } else if (myexponent==0x7ff && mysignificand!=0) { + // exponent meaningless + category = fcNaN; + *significandParts() = mysignificand; + } else { + category = fcNormal; + exponent = myexponent - 1023; + *significandParts() = mysignificand; + if (myexponent==0) // denormal + exponent = -1022; + else + *significandParts() |= 0x10000000000000LL; // integer bit + } +} + +void +APFloat::initFromFloatAPInt(const APInt & api) +{ + assert(api.getBitWidth()==32); + uint32_t i = (uint32_t)*api.getRawData(); + uint32_t myexponent = (i >> 23) & 0xff; + uint32_t mysignificand = i & 0x7fffff; + + initialize(&APFloat::IEEEsingle); + assert(partCount()==1); + + sign = i >> 31; + if (myexponent==0 && mysignificand==0) { + // exponent, significand meaningless + category = fcZero; + } else if (myexponent==0xff && mysignificand==0) { + // exponent, significand meaningless + category = fcInfinity; + } else if (myexponent==0xff && mysignificand!=0) { + // sign, exponent, significand meaningless + category = fcNaN; + *significandParts() = mysignificand; + } else { + category = fcNormal; + exponent = myexponent - 127; //bias + *significandParts() = mysignificand; + if (myexponent==0) // denormal + exponent = -126; + else + *significandParts() |= 0x800000; // integer bit + } +} + +void +APFloat::initFromHalfAPInt(const APInt & api) +{ + assert(api.getBitWidth()==16); + uint32_t i = (uint32_t)*api.getRawData(); + uint32_t myexponent = (i >> 10) & 0x1f; + uint32_t mysignificand = i & 0x3ff; + + initialize(&APFloat::IEEEhalf); + assert(partCount()==1); + + sign = i >> 15; + if (myexponent==0 && mysignificand==0) { + // exponent, significand meaningless + category = fcZero; + } else if (myexponent==0x1f && mysignificand==0) { + // exponent, significand meaningless + category = fcInfinity; + } else if (myexponent==0x1f && mysignificand!=0) { + // sign, exponent, significand meaningless + category = fcNaN; + *significandParts() = mysignificand; + } else { + category = fcNormal; + exponent = myexponent - 15; //bias + *significandParts() = mysignificand; + if (myexponent==0) // denormal + exponent = -14; + else + *significandParts() |= 0x400; // integer bit + } +} + +/// Treat api as containing the bits of a floating point number. Currently +/// we infer the floating point type from the size of the APInt. The +/// isIEEE argument distinguishes between PPC128 and IEEE128 (not meaningful +/// when the size is anything else). +void +APFloat::initFromAPInt(const fltSemantics* Sem, const APInt& api) +{ + if (Sem == &IEEEhalf) + return initFromHalfAPInt(api); + if (Sem == &IEEEsingle) + return initFromFloatAPInt(api); + if (Sem == &IEEEdouble) + return initFromDoubleAPInt(api); + if (Sem == &x87DoubleExtended) + return initFromF80LongDoubleAPInt(api); + if (Sem == &IEEEquad) + return initFromQuadrupleAPInt(api); + if (Sem == &PPCDoubleDouble) + return initFromPPCDoubleDoubleAPInt(api); + + llvm_unreachable(nullptr); +} + +APFloat +APFloat::getAllOnesValue(unsigned BitWidth, bool isIEEE) +{ + switch (BitWidth) { + case 16: + return APFloat(IEEEhalf, APInt::getAllOnesValue(BitWidth)); + case 32: + return APFloat(IEEEsingle, APInt::getAllOnesValue(BitWidth)); + case 64: + return APFloat(IEEEdouble, APInt::getAllOnesValue(BitWidth)); + case 80: + return APFloat(x87DoubleExtended, APInt::getAllOnesValue(BitWidth)); + case 128: + if (isIEEE) + return APFloat(IEEEquad, APInt::getAllOnesValue(BitWidth)); + return APFloat(PPCDoubleDouble, APInt::getAllOnesValue(BitWidth)); + default: + llvm_unreachable("Unknown floating bit width"); + } +} + +unsigned APFloat::getSizeInBits(const fltSemantics &Sem) { + return Sem.sizeInBits; +} + +/// Make this number the largest magnitude normal number in the given +/// semantics. +void APFloat::makeLargest(bool Negative) { + // We want (in interchange format): + // sign = {Negative} + // exponent = 1..10 + // significand = 1..1 + category = fcNormal; + sign = Negative; + exponent = semantics->maxExponent; + + // Use memset to set all but the highest integerPart to all ones. + integerPart *significand = significandParts(); + unsigned PartCount = partCount(); + memset(significand, 0xFF, sizeof(integerPart)*(PartCount - 1)); + + // Set the high integerPart especially setting all unused top bits for + // internal consistency. + const unsigned NumUnusedHighBits = + PartCount*integerPartWidth - semantics->precision; + significand[PartCount - 1] = (NumUnusedHighBits < integerPartWidth) + ? (~integerPart(0) >> NumUnusedHighBits) + : 0; +} + +/// Make this number the smallest magnitude denormal number in the given +/// semantics. +void APFloat::makeSmallest(bool Negative) { + // We want (in interchange format): + // sign = {Negative} + // exponent = 0..0 + // significand = 0..01 + category = fcNormal; + sign = Negative; + exponent = semantics->minExponent; + APInt::tcSet(significandParts(), 1, partCount()); +} + + +APFloat APFloat::getLargest(const fltSemantics &Sem, bool Negative) { + // We want (in interchange format): + // sign = {Negative} + // exponent = 1..10 + // significand = 1..1 + APFloat Val(Sem, uninitialized); + Val.makeLargest(Negative); + return Val; +} + +APFloat APFloat::getSmallest(const fltSemantics &Sem, bool Negative) { + // We want (in interchange format): + // sign = {Negative} + // exponent = 0..0 + // significand = 0..01 + APFloat Val(Sem, uninitialized); + Val.makeSmallest(Negative); + return Val; +} + +APFloat APFloat::getSmallestNormalized(const fltSemantics &Sem, bool Negative) { + APFloat Val(Sem, uninitialized); + + // We want (in interchange format): + // sign = {Negative} + // exponent = 0..0 + // significand = 10..0 + + Val.category = fcNormal; + Val.zeroSignificand(); + Val.sign = Negative; + Val.exponent = Sem.minExponent; + Val.significandParts()[partCountForBits(Sem.precision)-1] |= + (((integerPart) 1) << ((Sem.precision - 1) % integerPartWidth)); + + return Val; +} + +APFloat::APFloat(const fltSemantics &Sem, const APInt &API) { + initFromAPInt(&Sem, API); +} + +APFloat::APFloat(float f) { + initFromAPInt(&IEEEsingle, APInt::floatToBits(f)); +} + +APFloat::APFloat(double d) { + initFromAPInt(&IEEEdouble, APInt::doubleToBits(d)); +} + +namespace { + void append(SmallVectorImpl &Buffer, StringRef Str) { + Buffer.append(Str.begin(), Str.end()); + } + + /// Removes data from the given significand until it is no more + /// precise than is required for the desired precision. + void AdjustToPrecision(APInt &significand, + int &exp, unsigned FormatPrecision) { + unsigned bits = significand.getActiveBits(); + + // 196/59 is a very slight overestimate of lg_2(10). + unsigned bitsRequired = (FormatPrecision * 196 + 58) / 59; + + if (bits <= bitsRequired) return; + + unsigned tensRemovable = (bits - bitsRequired) * 59 / 196; + if (!tensRemovable) return; + + exp += tensRemovable; + + APInt divisor(significand.getBitWidth(), 1); + APInt powten(significand.getBitWidth(), 10); + while (true) { + if (tensRemovable & 1) + divisor *= powten; + tensRemovable >>= 1; + if (!tensRemovable) break; + powten *= powten; + } + + significand = significand.udiv(divisor); + + // Truncate the significand down to its active bit count. + significand = significand.trunc(significand.getActiveBits()); + } + + + void AdjustToPrecision(SmallVectorImpl &buffer, + int &exp, unsigned FormatPrecision) { + unsigned N = buffer.size(); + if (N <= FormatPrecision) return; + + // The most significant figures are the last ones in the buffer. + unsigned FirstSignificant = N - FormatPrecision; + + // Round. + // FIXME: this probably shouldn't use 'round half up'. + + // Rounding down is just a truncation, except we also want to drop + // trailing zeros from the new result. + if (buffer[FirstSignificant - 1] < '5') { + while (FirstSignificant < N && buffer[FirstSignificant] == '0') + FirstSignificant++; + + exp += FirstSignificant; + buffer.erase(&buffer[0], &buffer[FirstSignificant]); + return; + } + + // Rounding up requires a decimal add-with-carry. If we continue + // the carry, the newly-introduced zeros will just be truncated. + for (unsigned I = FirstSignificant; I != N; ++I) { + if (buffer[I] == '9') { + FirstSignificant++; + } else { + buffer[I]++; + break; + } + } + + // If we carried through, we have exactly one digit of precision. + if (FirstSignificant == N) { + exp += FirstSignificant; + buffer.clear(); + buffer.push_back('1'); + return; + } + + exp += FirstSignificant; + buffer.erase(&buffer[0], &buffer[FirstSignificant]); + } +} + +void APFloat::toString(SmallVectorImpl &Str, + unsigned FormatPrecision, + unsigned FormatMaxPadding) const { + switch (category) { + case fcInfinity: + if (isNegative()) + return append(Str, "-Inf"); + else + return append(Str, "+Inf"); + + case fcNaN: return append(Str, "NaN"); + + case fcZero: + if (isNegative()) + Str.push_back('-'); + + if (!FormatMaxPadding) + append(Str, "0.0E+0"); + else + Str.push_back('0'); + return; + + case fcNormal: + break; + } + + if (isNegative()) + Str.push_back('-'); + + // Decompose the number into an APInt and an exponent. + int exp = exponent - ((int) semantics->precision - 1); + APInt significand(semantics->precision, + makeArrayRef(significandParts(), + partCountForBits(semantics->precision))); + + // Set FormatPrecision if zero. We want to do this before we + // truncate trailing zeros, as those are part of the precision. + if (!FormatPrecision) { + // We use enough digits so the number can be round-tripped back to an + // APFloat. The formula comes from "How to Print Floating-Point Numbers + // Accurately" by Steele and White. + // FIXME: Using a formula based purely on the precision is conservative; + // we can print fewer digits depending on the actual value being printed. + + // FormatPrecision = 2 + floor(significandBits / lg_2(10)) + FormatPrecision = 2 + semantics->precision * 59 / 196; + } + + // Ignore trailing binary zeros. + int trailingZeros = significand.countTrailingZeros(); + exp += trailingZeros; + significand = significand.lshr(trailingZeros); + + // Change the exponent from 2^e to 10^e. + if (exp == 0) { + // Nothing to do. + } else if (exp > 0) { + // Just shift left. + significand = significand.zext(semantics->precision + exp); + significand <<= exp; + exp = 0; + } else { /* exp < 0 */ + int texp = -exp; + + // We transform this using the identity: + // (N)(2^-e) == (N)(5^e)(10^-e) + // This means we have to multiply N (the significand) by 5^e. + // To avoid overflow, we have to operate on numbers large + // enough to store N * 5^e: + // log2(N * 5^e) == log2(N) + e * log2(5) + // <= semantics->precision + e * 137 / 59 + // (log_2(5) ~ 2.321928 < 2.322034 ~ 137/59) + + unsigned precision = semantics->precision + (137 * texp + 136) / 59; + + // Multiply significand by 5^e. + // N * 5^0101 == N * 5^(1*1) * 5^(0*2) * 5^(1*4) * 5^(0*8) + significand = significand.zext(precision); + APInt five_to_the_i(precision, 5); + while (true) { + if (texp & 1) significand *= five_to_the_i; + + texp >>= 1; + if (!texp) break; + five_to_the_i *= five_to_the_i; + } + } + + AdjustToPrecision(significand, exp, FormatPrecision); + + SmallVector buffer; + + // Fill the buffer. + unsigned precision = significand.getBitWidth(); + APInt ten(precision, 10); + APInt digit(precision, 0); + + bool inTrail = true; + while (significand != 0) { + // digit <- significand % 10 + // significand <- significand / 10 + APInt::udivrem(significand, ten, significand, digit); + + unsigned d = digit.getZExtValue(); + + // Drop trailing zeros. + if (inTrail && !d) exp++; + else { + buffer.push_back((char) ('0' + d)); + inTrail = false; + } + } + + assert(!buffer.empty() && "no characters in buffer!"); + + // Drop down to FormatPrecision. + // TODO: don't do more precise calculations above than are required. + AdjustToPrecision(buffer, exp, FormatPrecision); + + unsigned NDigits = buffer.size(); + + // Check whether we should use scientific notation. + bool FormatScientific; + if (!FormatMaxPadding) + FormatScientific = true; + else { + if (exp >= 0) { + // 765e3 --> 765000 + // ^^^ + // But we shouldn't make the number look more precise than it is. + FormatScientific = ((unsigned) exp > FormatMaxPadding || + NDigits + (unsigned) exp > FormatPrecision); + } else { + // Power of the most significant digit. + int MSD = exp + (int) (NDigits - 1); + if (MSD >= 0) { + // 765e-2 == 7.65 + FormatScientific = false; + } else { + // 765e-5 == 0.00765 + // ^ ^^ + FormatScientific = ((unsigned) -MSD) > FormatMaxPadding; + } + } + } + + // Scientific formatting is pretty straightforward. + if (FormatScientific) { + exp += (NDigits - 1); + + Str.push_back(buffer[NDigits-1]); + Str.push_back('.'); + if (NDigits == 1) + Str.push_back('0'); + else + for (unsigned I = 1; I != NDigits; ++I) + Str.push_back(buffer[NDigits-1-I]); + Str.push_back('E'); + + Str.push_back(exp >= 0 ? '+' : '-'); + if (exp < 0) exp = -exp; + SmallVector expbuf; + do { + expbuf.push_back((char) ('0' + (exp % 10))); + exp /= 10; + } while (exp); + for (unsigned I = 0, E = expbuf.size(); I != E; ++I) + Str.push_back(expbuf[E-1-I]); + return; + } + + // Non-scientific, positive exponents. + if (exp >= 0) { + for (unsigned I = 0; I != NDigits; ++I) + Str.push_back(buffer[NDigits-1-I]); + for (unsigned I = 0; I != (unsigned) exp; ++I) + Str.push_back('0'); + return; + } + + // Non-scientific, negative exponents. + + // The number of digits to the left of the decimal point. + int NWholeDigits = exp + (int) NDigits; + + unsigned I = 0; + if (NWholeDigits > 0) { + for (; I != (unsigned) NWholeDigits; ++I) + Str.push_back(buffer[NDigits-I-1]); + Str.push_back('.'); + } else { + unsigned NZeros = 1 + (unsigned) -NWholeDigits; + + Str.push_back('0'); + Str.push_back('.'); + for (unsigned Z = 1; Z != NZeros; ++Z) + Str.push_back('0'); + } + + for (; I != NDigits; ++I) + Str.push_back(buffer[NDigits-I-1]); +} + +bool APFloat::getExactInverse(APFloat *inv) const { + // Special floats and denormals have no exact inverse. + if (!isFiniteNonZero()) + return false; + + // Check that the number is a power of two by making sure that only the + // integer bit is set in the significand. + if (significandLSB() != semantics->precision - 1) + return false; + + // Get the inverse. + APFloat reciprocal(*semantics, 1ULL); + if (reciprocal.divide(*this, rmNearestTiesToEven) != opOK) + return false; + + // Avoid multiplication with a denormal, it is not safe on all platforms and + // may be slower than a normal division. + if (reciprocal.isDenormal()) + return false; + + assert(reciprocal.isFiniteNonZero() && + reciprocal.significandLSB() == reciprocal.semantics->precision - 1); + + if (inv) + *inv = reciprocal; + + return true; +} + +bool APFloat::isSignaling() const { + if (!isNaN()) + return false; + + // IEEE-754R 2008 6.2.1: A signaling NaN bit string should be encoded with the + // first bit of the trailing significand being 0. + return !APInt::tcExtractBit(significandParts(), semantics->precision - 2); +} + +/// IEEE-754R 2008 5.3.1: nextUp/nextDown. +/// +/// *NOTE* since nextDown(x) = -nextUp(-x), we only implement nextUp with +/// appropriate sign switching before/after the computation. +APFloat::opStatus APFloat::next(bool nextDown) { + // If we are performing nextDown, swap sign so we have -x. + if (nextDown) + changeSign(); + + // Compute nextUp(x) + opStatus result = opOK; + + // Handle each float category separately. + switch (category) { + case fcInfinity: + // nextUp(+inf) = +inf + if (!isNegative()) + break; + // nextUp(-inf) = -getLargest() + makeLargest(true); + break; + case fcNaN: + // IEEE-754R 2008 6.2 Par 2: nextUp(sNaN) = qNaN. Set Invalid flag. + // IEEE-754R 2008 6.2: nextUp(qNaN) = qNaN. Must be identity so we do not + // change the payload. + if (isSignaling()) { + result = opInvalidOp; + // For consistency, propagate the sign of the sNaN to the qNaN. + makeNaN(false, isNegative(), nullptr); + } + break; + case fcZero: + // nextUp(pm 0) = +getSmallest() + makeSmallest(false); + break; + case fcNormal: + // nextUp(-getSmallest()) = -0 + if (isSmallest() && isNegative()) { + APInt::tcSet(significandParts(), 0, partCount()); + category = fcZero; + exponent = 0; + break; + } + + // nextUp(getLargest()) == INFINITY + if (isLargest() && !isNegative()) { + APInt::tcSet(significandParts(), 0, partCount()); + category = fcInfinity; + exponent = semantics->maxExponent + 1; + break; + } + + // nextUp(normal) == normal + inc. + if (isNegative()) { + // If we are negative, we need to decrement the significand. + + // We only cross a binade boundary that requires adjusting the exponent + // if: + // 1. exponent != semantics->minExponent. This implies we are not in the + // smallest binade or are dealing with denormals. + // 2. Our significand excluding the integral bit is all zeros. + bool WillCrossBinadeBoundary = + exponent != semantics->minExponent && isSignificandAllZeros(); + + // Decrement the significand. + // + // We always do this since: + // 1. If we are dealing with a non-binade decrement, by definition we + // just decrement the significand. + // 2. If we are dealing with a normal -> normal binade decrement, since + // we have an explicit integral bit the fact that all bits but the + // integral bit are zero implies that subtracting one will yield a + // significand with 0 integral bit and 1 in all other spots. Thus we + // must just adjust the exponent and set the integral bit to 1. + // 3. If we are dealing with a normal -> denormal binade decrement, + // since we set the integral bit to 0 when we represent denormals, we + // just decrement the significand. + integerPart *Parts = significandParts(); + APInt::tcDecrement(Parts, partCount()); + + if (WillCrossBinadeBoundary) { + // Our result is a normal number. Do the following: + // 1. Set the integral bit to 1. + // 2. Decrement the exponent. + APInt::tcSetBit(Parts, semantics->precision - 1); + exponent--; + } + } else { + // If we are positive, we need to increment the significand. + + // We only cross a binade boundary that requires adjusting the exponent if + // the input is not a denormal and all of said input's significand bits + // are set. If all of said conditions are true: clear the significand, set + // the integral bit to 1, and increment the exponent. If we have a + // denormal always increment since moving denormals and the numbers in the + // smallest normal binade have the same exponent in our representation. + bool WillCrossBinadeBoundary = !isDenormal() && isSignificandAllOnes(); + + if (WillCrossBinadeBoundary) { + integerPart *Parts = significandParts(); + APInt::tcSet(Parts, 0, partCount()); + APInt::tcSetBit(Parts, semantics->precision - 1); + assert(exponent != semantics->maxExponent && + "We can not increment an exponent beyond the maxExponent allowed" + " by the given floating point semantics."); + exponent++; + } else { + incrementSignificand(); + } + } + break; + } + + // If we are performing nextDown, swap sign so we have -nextUp(-x) + if (nextDown) + changeSign(); + + return result; +} + +void +APFloat::makeInf(bool Negative) { + category = fcInfinity; + sign = Negative; + exponent = semantics->maxExponent + 1; + APInt::tcSet(significandParts(), 0, partCount()); +} + +void +APFloat::makeZero(bool Negative) { + category = fcZero; + sign = Negative; + exponent = semantics->minExponent-1; + APInt::tcSet(significandParts(), 0, partCount()); +} + +APFloat llvm_ks::scalbn(APFloat X, int Exp) { + if (X.isInfinity() || X.isZero() || X.isNaN()) + return X; + + auto MaxExp = X.getSemantics().maxExponent; + auto MinExp = X.getSemantics().minExponent; + if (Exp > (MaxExp - X.exponent)) + // Overflow saturates to infinity. + return APFloat::getInf(X.getSemantics(), X.isNegative()); + if (Exp < (MinExp - X.exponent)) + // Underflow saturates to zero. + return APFloat::getZero(X.getSemantics(), X.isNegative()); + + X.exponent += Exp; + return X; +} diff --git a/llvm/lib/Support/APInt.cpp b/llvm/lib/Support/APInt.cpp new file mode 100644 index 0000000..f581101 --- /dev/null +++ b/llvm/lib/Support/APInt.cpp @@ -0,0 +1,2874 @@ +//===-- APInt.cpp - Implement APInt class ---------------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements a class to represent arbitrary precision integer +// constant values and provide a variety of arithmetic operations on them. +// +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/APInt.h" +#include "llvm/ADT/FoldingSet.h" +#include "llvm/ADT/Hashing.h" +#include "llvm/ADT/SmallString.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/MathExtras.h" +#include "llvm/Support/raw_ostream.h" +#include +#include +#include +#include +using namespace llvm_ks; + +#define DEBUG_TYPE "apint" + +/// A utility function for allocating memory, checking for allocation failures, +/// and ensuring the contents are zeroed. +inline static uint64_t* getClearedMemory(unsigned numWords) { + uint64_t * result = new uint64_t[numWords]; + assert(result && "APInt memory allocation fails!"); + memset(result, 0, numWords * sizeof(uint64_t)); + return result; +} + +/// A utility function for allocating memory and checking for allocation +/// failure. The content is not zeroed. +inline static uint64_t* getMemory(unsigned numWords) { + uint64_t * result = new uint64_t[numWords]; + assert(result && "APInt memory allocation fails!"); + return result; +} + +/// A utility function that converts a character to a digit. +inline static unsigned getDigit(char cdigit, uint8_t radix) { + unsigned r; + + if (radix == 16 || radix == 36) { + r = cdigit - '0'; + if (r <= 9) + return r; + + r = cdigit - 'A'; + if (r <= radix - 11U) + return r + 10; + + r = cdigit - 'a'; + if (r <= radix - 11U) + return r + 10; + + radix = 10; + } + + r = cdigit - '0'; + if (r < radix) + return r; + + return -1U; +} + + +void APInt::initSlowCase(unsigned numBits, uint64_t val, bool isSigned) { + pVal = getClearedMemory(getNumWords()); + pVal[0] = val; + if (isSigned && int64_t(val) < 0) + for (unsigned i = 1; i < getNumWords(); ++i) + pVal[i] = -1ULL; +} + +void APInt::initSlowCase(const APInt& that) { + pVal = getMemory(getNumWords()); + memcpy(pVal, that.pVal, getNumWords() * APINT_WORD_SIZE); +} + +void APInt::initFromArray(ArrayRef bigVal) { + assert(BitWidth && "Bitwidth too small"); + assert(bigVal.data() && "Null pointer detected!"); + if (isSingleWord()) + VAL = bigVal[0]; + else { + // Get memory, cleared to 0 + pVal = getClearedMemory(getNumWords()); + // Calculate the number of words to copy + unsigned words = std::min(bigVal.size(), getNumWords()); + // Copy the words from bigVal to pVal + memcpy(pVal, bigVal.data(), words * APINT_WORD_SIZE); + } + // Make sure unused high bits are cleared + clearUnusedBits(); +} + +APInt::APInt(unsigned numBits, ArrayRef bigVal) + : BitWidth(numBits), VAL(0) { + initFromArray(bigVal); +} + +APInt::APInt(unsigned numBits, unsigned numWords, const uint64_t bigVal[]) + : BitWidth(numBits), VAL(0) { + initFromArray(makeArrayRef(bigVal, numWords)); +} + +APInt::APInt(unsigned numbits, StringRef Str, uint8_t radix) + : BitWidth(numbits), VAL(0) { + assert(BitWidth && "Bitwidth too small"); + fromString(numbits, Str, radix); +} + +APInt& APInt::AssignSlowCase(const APInt& RHS) { + // Don't do anything for X = X + if (this == &RHS) + return *this; + + if (BitWidth == RHS.getBitWidth()) { + // assume same bit-width single-word case is already handled + assert(!isSingleWord()); + memcpy(pVal, RHS.pVal, getNumWords() * APINT_WORD_SIZE); + return *this; + } + + if (isSingleWord()) { + // assume case where both are single words is already handled + assert(!RHS.isSingleWord()); + VAL = 0; + pVal = getMemory(RHS.getNumWords()); + memcpy(pVal, RHS.pVal, RHS.getNumWords() * APINT_WORD_SIZE); + } else if (getNumWords() == RHS.getNumWords()) + memcpy(pVal, RHS.pVal, RHS.getNumWords() * APINT_WORD_SIZE); + else if (RHS.isSingleWord()) { + delete [] pVal; + VAL = RHS.VAL; + } else { + delete [] pVal; + pVal = getMemory(RHS.getNumWords()); + memcpy(pVal, RHS.pVal, RHS.getNumWords() * APINT_WORD_SIZE); + } + BitWidth = RHS.BitWidth; + return clearUnusedBits(); +} + +APInt& APInt::operator=(uint64_t RHS) { + if (isSingleWord()) + VAL = RHS; + else { + pVal[0] = RHS; + memset(pVal+1, 0, (getNumWords() - 1) * APINT_WORD_SIZE); + } + return clearUnusedBits(); +} + +/// This method 'profiles' an APInt for use with FoldingSet. +void APInt::Profile(FoldingSetNodeID& ID) const { +#if 0 + ID.AddInteger(BitWidth); + + if (isSingleWord()) { + ID.AddInteger(VAL); + return; + } + + unsigned NumWords = getNumWords(); + for (unsigned i = 0; i < NumWords; ++i) + ID.AddInteger(pVal[i]); +#endif +} + +/// This function adds a single "digit" integer, y, to the multiple +/// "digit" integer array, x[]. x[] is modified to reflect the addition and +/// 1 is returned if there is a carry out, otherwise 0 is returned. +/// @returns the carry of the addition. +static bool add_1(uint64_t dest[], uint64_t x[], unsigned len, uint64_t y) { + for (unsigned i = 0; i < len; ++i) { + dest[i] = y + x[i]; + if (dest[i] < y) + y = 1; // Carry one to next digit. + else { + y = 0; // No need to carry so exit early + break; + } + } + return y; +} + +/// @brief Prefix increment operator. Increments the APInt by one. +APInt& APInt::operator++() { + if (isSingleWord()) + ++VAL; + else + add_1(pVal, pVal, getNumWords(), 1); + return clearUnusedBits(); +} + +/// This function subtracts a single "digit" (64-bit word), y, from +/// the multi-digit integer array, x[], propagating the borrowed 1 value until +/// no further borrowing is neeeded or it runs out of "digits" in x. The result +/// is 1 if "borrowing" exhausted the digits in x, or 0 if x was not exhausted. +/// In other words, if y > x then this function returns 1, otherwise 0. +/// @returns the borrow out of the subtraction +static bool sub_1(uint64_t x[], unsigned len, uint64_t y) { + for (unsigned i = 0; i < len; ++i) { + uint64_t X = x[i]; + x[i] -= y; + if (y > X) + y = 1; // We have to "borrow 1" from next "digit" + else { + y = 0; // No need to borrow + break; // Remaining digits are unchanged so exit early + } + } + return bool(y); +} + +/// @brief Prefix decrement operator. Decrements the APInt by one. +APInt& APInt::operator--() { + if (isSingleWord()) + --VAL; + else + sub_1(pVal, getNumWords(), 1); + return clearUnusedBits(); +} + +/// This function adds the integer array x to the integer array Y and +/// places the result in dest. +/// @returns the carry out from the addition +/// @brief General addition of 64-bit integer arrays +static bool add(uint64_t *dest, const uint64_t *x, const uint64_t *y, + unsigned len) { + bool carry = false; + for (unsigned i = 0; i< len; ++i) { + uint64_t limit = std::min(x[i],y[i]); // must come first in case dest == x + dest[i] = x[i] + y[i] + carry; + carry = dest[i] < limit || (carry && dest[i] == limit); + } + return carry; +} + +/// Adds the RHS APint to this APInt. +/// @returns this, after addition of RHS. +/// @brief Addition assignment operator. +APInt& APInt::operator+=(const APInt& RHS) { + assert(BitWidth == RHS.BitWidth && "Bit widths must be the same"); + if (isSingleWord()) + VAL += RHS.VAL; + else { + add(pVal, pVal, RHS.pVal, getNumWords()); + } + return clearUnusedBits(); +} + +/// Subtracts the integer array y from the integer array x +/// @returns returns the borrow out. +/// @brief Generalized subtraction of 64-bit integer arrays. +static bool sub(uint64_t *dest, const uint64_t *x, const uint64_t *y, + unsigned len) { + bool borrow = false; + for (unsigned i = 0; i < len; ++i) { + uint64_t x_tmp = borrow ? x[i] - 1 : x[i]; + borrow = y[i] > x_tmp || (borrow && x[i] == 0); + dest[i] = x_tmp - y[i]; + } + return borrow; +} + +/// Subtracts the RHS APInt from this APInt +/// @returns this, after subtraction +/// @brief Subtraction assignment operator. +APInt& APInt::operator-=(const APInt& RHS) { + assert(BitWidth == RHS.BitWidth && "Bit widths must be the same"); + if (isSingleWord()) + VAL -= RHS.VAL; + else + sub(pVal, pVal, RHS.pVal, getNumWords()); + return clearUnusedBits(); +} + +/// Multiplies an integer array, x, by a uint64_t integer and places the result +/// into dest. +/// @returns the carry out of the multiplication. +/// @brief Multiply a multi-digit APInt by a single digit (64-bit) integer. +static uint64_t mul_1(uint64_t dest[], uint64_t x[], unsigned len, uint64_t y) { + // Split y into high 32-bit part (hy) and low 32-bit part (ly) + uint64_t ly = y & 0xffffffffULL, hy = y >> 32; + uint64_t carry = 0; + + // For each digit of x. + for (unsigned i = 0; i < len; ++i) { + // Split x into high and low words + uint64_t lx = x[i] & 0xffffffffULL; + uint64_t hx = x[i] >> 32; + // hasCarry - A flag to indicate if there is a carry to the next digit. + // hasCarry == 0, no carry + // hasCarry == 1, has carry + // hasCarry == 2, no carry and the calculation result == 0. + uint8_t hasCarry = 0; + dest[i] = carry + lx * ly; + // Determine if the add above introduces carry. + hasCarry = (dest[i] < carry) ? 1 : 0; + carry = hx * ly + (dest[i] >> 32) + (hasCarry ? (1ULL << 32) : 0); + // The upper limit of carry can be (2^32 - 1)(2^32 - 1) + + // (2^32 - 1) + 2^32 = 2^64. + hasCarry = (!carry && hasCarry) ? 1 : (!carry ? 2 : 0); + + carry += (lx * hy) & 0xffffffffULL; + dest[i] = (carry << 32) | (dest[i] & 0xffffffffULL); + carry = (((!carry && hasCarry != 2) || hasCarry == 1) ? (1ULL << 32) : 0) + + (carry >> 32) + ((lx * hy) >> 32) + hx * hy; + } + return carry; +} + +/// Multiplies integer array x by integer array y and stores the result into +/// the integer array dest. Note that dest's size must be >= xlen + ylen. +/// @brief Generalized multiplicate of integer arrays. +static void mul(uint64_t dest[], uint64_t x[], unsigned xlen, uint64_t y[], + unsigned ylen) { + dest[xlen] = mul_1(dest, x, xlen, y[0]); + for (unsigned i = 1; i < ylen; ++i) { + uint64_t ly = y[i] & 0xffffffffULL, hy = y[i] >> 32; + uint64_t carry = 0, lx = 0, hx = 0; + for (unsigned j = 0; j < xlen; ++j) { + lx = x[j] & 0xffffffffULL; + hx = x[j] >> 32; + // hasCarry - A flag to indicate if has carry. + // hasCarry == 0, no carry + // hasCarry == 1, has carry + // hasCarry == 2, no carry and the calculation result == 0. + uint8_t hasCarry = 0; + uint64_t resul = carry + lx * ly; + hasCarry = (resul < carry) ? 1 : 0; + carry = (hasCarry ? (1ULL << 32) : 0) + hx * ly + (resul >> 32); + hasCarry = (!carry && hasCarry) ? 1 : (!carry ? 2 : 0); + + carry += (lx * hy) & 0xffffffffULL; + resul = (carry << 32) | (resul & 0xffffffffULL); + dest[i+j] += resul; + carry = (((!carry && hasCarry != 2) || hasCarry == 1) ? (1ULL << 32) : 0)+ + (carry >> 32) + (dest[i+j] < resul ? 1 : 0) + + ((lx * hy) >> 32) + hx * hy; + } + dest[i+xlen] = carry; + } +} + +APInt& APInt::operator*=(const APInt& RHS) { + assert(BitWidth == RHS.BitWidth && "Bit widths must be the same"); + if (isSingleWord()) { + VAL *= RHS.VAL; + clearUnusedBits(); + return *this; + } + + // Get some bit facts about LHS and check for zero + unsigned lhsBits = getActiveBits(); + unsigned lhsWords = !lhsBits ? 0 : whichWord(lhsBits - 1) + 1; + if (!lhsWords) + // 0 * X ===> 0 + return *this; + + // Get some bit facts about RHS and check for zero + unsigned rhsBits = RHS.getActiveBits(); + unsigned rhsWords = !rhsBits ? 0 : whichWord(rhsBits - 1) + 1; + if (!rhsWords) { + // X * 0 ===> 0 + clearAllBits(); + return *this; + } + + // Allocate space for the result + unsigned destWords = rhsWords + lhsWords; + uint64_t *dest = getMemory(destWords); + + // Perform the long multiply + mul(dest, pVal, lhsWords, RHS.pVal, rhsWords); + + // Copy result back into *this + clearAllBits(); + unsigned wordsToCopy = destWords >= getNumWords() ? getNumWords() : destWords; + memcpy(pVal, dest, wordsToCopy * APINT_WORD_SIZE); + clearUnusedBits(); + + // delete dest array and return + delete[] dest; + return *this; +} + +APInt& APInt::operator&=(const APInt& RHS) { + assert(BitWidth == RHS.BitWidth && "Bit widths must be the same"); + if (isSingleWord()) { + VAL &= RHS.VAL; + return *this; + } + unsigned numWords = getNumWords(); + for (unsigned i = 0; i < numWords; ++i) + pVal[i] &= RHS.pVal[i]; + return *this; +} + +APInt& APInt::operator|=(const APInt& RHS) { + assert(BitWidth == RHS.BitWidth && "Bit widths must be the same"); + if (isSingleWord()) { + VAL |= RHS.VAL; + return *this; + } + unsigned numWords = getNumWords(); + for (unsigned i = 0; i < numWords; ++i) + pVal[i] |= RHS.pVal[i]; + return *this; +} + +APInt& APInt::operator^=(const APInt& RHS) { + assert(BitWidth == RHS.BitWidth && "Bit widths must be the same"); + if (isSingleWord()) { + VAL ^= RHS.VAL; + this->clearUnusedBits(); + return *this; + } + unsigned numWords = getNumWords(); + for (unsigned i = 0; i < numWords; ++i) + pVal[i] ^= RHS.pVal[i]; + return clearUnusedBits(); +} + +APInt APInt::AndSlowCase(const APInt& RHS) const { + unsigned numWords = getNumWords(); + uint64_t* val = getMemory(numWords); + for (unsigned i = 0; i < numWords; ++i) + val[i] = pVal[i] & RHS.pVal[i]; + return APInt(val, getBitWidth()); +} + +APInt APInt::OrSlowCase(const APInt& RHS) const { + unsigned numWords = getNumWords(); + uint64_t *val = getMemory(numWords); + for (unsigned i = 0; i < numWords; ++i) + val[i] = pVal[i] | RHS.pVal[i]; + return APInt(val, getBitWidth()); +} + +APInt APInt::XorSlowCase(const APInt& RHS) const { + unsigned numWords = getNumWords(); + uint64_t *val = getMemory(numWords); + for (unsigned i = 0; i < numWords; ++i) + val[i] = pVal[i] ^ RHS.pVal[i]; + + APInt Result(val, getBitWidth()); + // 0^0==1 so clear the high bits in case they got set. + Result.clearUnusedBits(); + return Result; +} + +APInt APInt::operator*(const APInt& RHS) const { + assert(BitWidth == RHS.BitWidth && "Bit widths must be the same"); + if (isSingleWord()) + return APInt(BitWidth, VAL * RHS.VAL); + APInt Result(*this); + Result *= RHS; + return Result; +} + +APInt APInt::operator+(const APInt& RHS) const { + assert(BitWidth == RHS.BitWidth && "Bit widths must be the same"); + if (isSingleWord()) + return APInt(BitWidth, VAL + RHS.VAL); + APInt Result(BitWidth, 0); + add(Result.pVal, this->pVal, RHS.pVal, getNumWords()); + Result.clearUnusedBits(); + return Result; +} + +APInt APInt::operator-(const APInt& RHS) const { + assert(BitWidth == RHS.BitWidth && "Bit widths must be the same"); + if (isSingleWord()) + return APInt(BitWidth, VAL - RHS.VAL); + APInt Result(BitWidth, 0); + sub(Result.pVal, this->pVal, RHS.pVal, getNumWords()); + Result.clearUnusedBits(); + return Result; +} + +bool APInt::EqualSlowCase(const APInt& RHS) const { + // Get some facts about the number of bits used in the two operands. + unsigned n1 = getActiveBits(); + unsigned n2 = RHS.getActiveBits(); + + // If the number of bits isn't the same, they aren't equal + if (n1 != n2) + return false; + + // If the number of bits fits in a word, we only need to compare the low word. + if (n1 <= APINT_BITS_PER_WORD) + return pVal[0] == RHS.pVal[0]; + + // Otherwise, compare everything + for (int i = whichWord(n1 - 1); i >= 0; --i) + if (pVal[i] != RHS.pVal[i]) + return false; + return true; +} + +bool APInt::EqualSlowCase(uint64_t Val) const { + unsigned n = getActiveBits(); + if (n <= APINT_BITS_PER_WORD) + return pVal[0] == Val; + else + return false; +} + +bool APInt::ult(const APInt& RHS) const { + assert(BitWidth == RHS.BitWidth && "Bit widths must be same for comparison"); + if (isSingleWord()) + return VAL < RHS.VAL; + + // Get active bit length of both operands + unsigned n1 = getActiveBits(); + unsigned n2 = RHS.getActiveBits(); + + // If magnitude of LHS is less than RHS, return true. + if (n1 < n2) + return true; + + // If magnitude of RHS is greather than LHS, return false. + if (n2 < n1) + return false; + + // If they bot fit in a word, just compare the low order word + if (n1 <= APINT_BITS_PER_WORD && n2 <= APINT_BITS_PER_WORD) + return pVal[0] < RHS.pVal[0]; + + // Otherwise, compare all words + unsigned topWord = whichWord(std::max(n1,n2)-1); + for (int i = topWord; i >= 0; --i) { + if (pVal[i] > RHS.pVal[i]) + return false; + if (pVal[i] < RHS.pVal[i]) + return true; + } + return false; +} + +bool APInt::slt(const APInt& RHS) const { + assert(BitWidth == RHS.BitWidth && "Bit widths must be same for comparison"); + if (isSingleWord()) { + int64_t lhsSext = (int64_t(VAL) << (64-BitWidth)) >> (64-BitWidth); + int64_t rhsSext = (int64_t(RHS.VAL) << (64-BitWidth)) >> (64-BitWidth); + return lhsSext < rhsSext; + } + + APInt lhs(*this); + APInt rhs(RHS); + bool lhsNeg = isNegative(); + bool rhsNeg = rhs.isNegative(); + if (lhsNeg) { + // Sign bit is set so perform two's complement to make it positive + lhs.flipAllBits(); + ++lhs; + } + if (rhsNeg) { + // Sign bit is set so perform two's complement to make it positive + rhs.flipAllBits(); + ++rhs; + } + + // Now we have unsigned values to compare so do the comparison if necessary + // based on the negativeness of the values. + if (lhsNeg) + if (rhsNeg) + return lhs.ugt(rhs); + else + return true; + else if (rhsNeg) + return false; + else + return lhs.ult(rhs); +} + +void APInt::setBit(unsigned bitPosition) { + if (isSingleWord()) + VAL |= maskBit(bitPosition); + else + pVal[whichWord(bitPosition)] |= maskBit(bitPosition); +} + +/// Set the given bit to 0 whose position is given as "bitPosition". +/// @brief Set a given bit to 0. +void APInt::clearBit(unsigned bitPosition) { + if (isSingleWord()) + VAL &= ~maskBit(bitPosition); + else + pVal[whichWord(bitPosition)] &= ~maskBit(bitPosition); +} + +/// @brief Toggle every bit to its opposite value. + +/// Toggle a given bit to its opposite value whose position is given +/// as "bitPosition". +/// @brief Toggles a given bit to its opposite value. +void APInt::flipBit(unsigned bitPosition) { + assert(bitPosition < BitWidth && "Out of the bit-width range!"); + if ((*this)[bitPosition]) clearBit(bitPosition); + else setBit(bitPosition); +} + +unsigned APInt::getBitsNeeded(StringRef str, uint8_t radix) { + assert(!str.empty() && "Invalid string length"); + assert((radix == 10 || radix == 8 || radix == 16 || radix == 2 || + radix == 36) && + "Radix should be 2, 8, 10, 16, or 36!"); + + size_t slen = str.size(); + + // Each computation below needs to know if it's negative. + StringRef::iterator p = str.begin(); + unsigned isNegative = *p == '-'; + if (*p == '-' || *p == '+') { + p++; + slen--; + assert(slen && "String is only a sign, needs a value."); + } + + // For radixes of power-of-two values, the bits required is accurately and + // easily computed + if (radix == 2) + return slen + isNegative; + if (radix == 8) + return slen * 3 + isNegative; + if (radix == 16) + return slen * 4 + isNegative; + + // FIXME: base 36 + + // This is grossly inefficient but accurate. We could probably do something + // with a computation of roughly slen*64/20 and then adjust by the value of + // the first few digits. But, I'm not sure how accurate that could be. + + // Compute a sufficient number of bits that is always large enough but might + // be too large. This avoids the assertion in the constructor. This + // calculation doesn't work appropriately for the numbers 0-9, so just use 4 + // bits in that case. + unsigned sufficient + = radix == 10? (slen == 1 ? 4 : slen * 64/18) + : (slen == 1 ? 7 : slen * 16/3); + + // Convert to the actual binary value. + APInt tmp(sufficient, StringRef(p, slen), radix); + + // Compute how many bits are required. If the log is infinite, assume we need + // just bit. + unsigned log = tmp.logBase2(); + if (log == (unsigned)-1) { + return isNegative + 1; + } else { + return isNegative + log + 1; + } +} + +hash_code llvm_ks::hash_value(const APInt &Arg) { + if (Arg.isSingleWord()) + return hash_combine(Arg.VAL); + + return hash_combine_range(Arg.pVal, Arg.pVal + Arg.getNumWords()); +} + +bool APInt::isSplat(unsigned SplatSizeInBits) const { + assert(getBitWidth() % SplatSizeInBits == 0 && + "SplatSizeInBits must divide width!"); + // We can check that all parts of an integer are equal by making use of a + // little trick: rotate and check if it's still the same value. + return *this == rotl(SplatSizeInBits); +} + +/// This function returns the high "numBits" bits of this APInt. +APInt APInt::getHiBits(unsigned numBits) const { + return APIntOps::lshr(*this, BitWidth - numBits); +} + +/// This function returns the low "numBits" bits of this APInt. +APInt APInt::getLoBits(unsigned numBits) const { + return APIntOps::lshr(APIntOps::shl(*this, BitWidth - numBits), + BitWidth - numBits); +} + +unsigned APInt::countLeadingZerosSlowCase() const { + // Treat the most significand word differently because it might have + // meaningless bits set beyond the precision. + unsigned BitsInMSW = BitWidth % APINT_BITS_PER_WORD; + integerPart MSWMask; + if (BitsInMSW) MSWMask = (integerPart(1) << BitsInMSW) - 1; + else { + MSWMask = ~integerPart(0); + BitsInMSW = APINT_BITS_PER_WORD; + } + + unsigned i = getNumWords(); + integerPart MSW = pVal[i-1] & MSWMask; + if (MSW) + return llvm_ks::countLeadingZeros(MSW) - (APINT_BITS_PER_WORD - BitsInMSW); + + unsigned Count = BitsInMSW; + for (--i; i > 0u; --i) { + if (pVal[i-1] == 0) + Count += APINT_BITS_PER_WORD; + else { + Count += llvm_ks::countLeadingZeros(pVal[i-1]); + break; + } + } + return Count; +} + +unsigned APInt::countLeadingOnes() const { + if (isSingleWord()) + return llvm_ks::countLeadingOnes(VAL << (APINT_BITS_PER_WORD - BitWidth)); + + unsigned highWordBits = BitWidth % APINT_BITS_PER_WORD; + unsigned shift; + if (!highWordBits) { + highWordBits = APINT_BITS_PER_WORD; + shift = 0; + } else { + shift = APINT_BITS_PER_WORD - highWordBits; + } + int i = getNumWords() - 1; + unsigned Count = llvm_ks::countLeadingOnes(pVal[i] << shift); + if (Count == highWordBits) { + for (i--; i >= 0; --i) { + if (pVal[i] == -1ULL) + Count += APINT_BITS_PER_WORD; + else { + Count += llvm_ks::countLeadingOnes(pVal[i]); + break; + } + } + } + return Count; +} + +unsigned APInt::countTrailingZeros() const { + if (isSingleWord()) + return std::min(unsigned(llvm_ks::countTrailingZeros(VAL)), BitWidth); + unsigned Count = 0; + unsigned i = 0; + for (; i < getNumWords() && pVal[i] == 0; ++i) + Count += APINT_BITS_PER_WORD; + if (i < getNumWords()) + Count += llvm_ks::countTrailingZeros(pVal[i]); + return std::min(Count, BitWidth); +} + +unsigned APInt::countTrailingOnesSlowCase() const { + unsigned Count = 0; + unsigned i = 0; + for (; i < getNumWords() && pVal[i] == -1ULL; ++i) + Count += APINT_BITS_PER_WORD; + if (i < getNumWords()) + Count += llvm_ks::countTrailingOnes(pVal[i]); + return std::min(Count, BitWidth); +} + +unsigned APInt::countPopulationSlowCase() const { + unsigned Count = 0; + for (unsigned i = 0; i < getNumWords(); ++i) + Count += llvm_ks::countPopulation(pVal[i]); + return Count; +} + +/// Perform a logical right-shift from Src to Dst, which must be equal or +/// non-overlapping, of Words words, by Shift, which must be less than 64. +static void lshrNear(uint64_t *Dst, uint64_t *Src, unsigned Words, + unsigned Shift) { + uint64_t Carry = 0; + for (int I = Words - 1; I >= 0; --I) { + uint64_t Tmp = Src[I]; + Dst[I] = (Tmp >> Shift) | Carry; + Carry = Tmp << (64 - Shift); + } +} + +APInt APInt::byteSwap() const { + assert(BitWidth >= 16 && BitWidth % 16 == 0 && "Cannot byteswap!"); + if (BitWidth == 16) + return APInt(BitWidth, ByteSwap_16(uint16_t(VAL))); + if (BitWidth == 32) + return APInt(BitWidth, ByteSwap_32(unsigned(VAL))); + if (BitWidth == 48) { + unsigned Tmp1 = unsigned(VAL >> 16); + Tmp1 = ByteSwap_32(Tmp1); + uint16_t Tmp2 = uint16_t(VAL); + Tmp2 = ByteSwap_16(Tmp2); + return APInt(BitWidth, (uint64_t(Tmp2) << 32) | Tmp1); + } + if (BitWidth == 64) + return APInt(BitWidth, ByteSwap_64(VAL)); + + APInt Result(getNumWords() * APINT_BITS_PER_WORD, 0); + for (unsigned I = 0, N = getNumWords(); I != N; ++I) + Result.pVal[I] = ByteSwap_64(pVal[N - I - 1]); + if (Result.BitWidth != BitWidth) { + lshrNear(Result.pVal, Result.pVal, getNumWords(), + Result.BitWidth - BitWidth); + Result.BitWidth = BitWidth; + } + return Result; +} + +APInt llvm_ks::APIntOps::GreatestCommonDivisor(const APInt& API1, + const APInt& API2) { + APInt A = API1, B = API2; + while (!!B) { + APInt T = B; + B = APIntOps::urem(A, B); + A = T; + } + return A; +} + +APInt llvm_ks::APIntOps::RoundDoubleToAPInt(double Double, unsigned width) { + union { + double D; + uint64_t I; + } T; + T.D = Double; + + // Get the sign bit from the highest order bit + bool isNeg = T.I >> 63; + + // Get the 11-bit exponent and adjust for the 1023 bit bias + int64_t exp = ((T.I >> 52) & 0x7ff) - 1023; + + // If the exponent is negative, the value is < 0 so just return 0. + if (exp < 0) + return APInt(width, 0u); + + // Extract the mantissa by clearing the top 12 bits (sign + exponent). + uint64_t mantissa = (T.I & (~0ULL >> 12)) | 1ULL << 52; + + // If the exponent doesn't shift all bits out of the mantissa + if (exp < 52) + return isNeg ? -APInt(width, mantissa >> (52 - exp)) : + APInt(width, mantissa >> (52 - exp)); + + // If the client didn't provide enough bits for us to shift the mantissa into + // then the result is undefined, just return 0 + if (width <= exp - 52) + return APInt(width, 0); + + // Otherwise, we have to shift the mantissa bits up to the right location + APInt Tmp(width, mantissa); + Tmp = Tmp.shl((unsigned)exp - 52); + return isNeg ? -Tmp : Tmp; +} + +/// This function converts this APInt to a double. +/// The layout for double is as following (IEEE Standard 754): +/// -------------------------------------- +/// | Sign Exponent Fraction Bias | +/// |-------------------------------------- | +/// | 1[63] 11[62-52] 52[51-00] 1023 | +/// -------------------------------------- +double APInt::roundToDouble(bool isSigned) const { + + // Handle the simple case where the value is contained in one uint64_t. + // It is wrong to optimize getWord(0) to VAL; there might be more than one word. + if (isSingleWord() || getActiveBits() <= APINT_BITS_PER_WORD) { + if (isSigned) { + int64_t sext = (int64_t(getWord(0)) << (64-BitWidth)) >> (64-BitWidth); + return double(sext); + } else + return double(getWord(0)); + } + + // Determine if the value is negative. + bool isNeg = isSigned ? (*this)[BitWidth-1] : false; + + // Construct the absolute value if we're negative. + APInt Tmp(isNeg ? -(*this) : (*this)); + + // Figure out how many bits we're using. + unsigned n = Tmp.getActiveBits(); + + // The exponent (without bias normalization) is just the number of bits + // we are using. Note that the sign bit is gone since we constructed the + // absolute value. + uint64_t exp = n; + + // Return infinity for exponent overflow + if (exp > 1023) { + if (!isSigned || !isNeg) + return std::numeric_limits::infinity(); + else + return -std::numeric_limits::infinity(); + } + exp += 1023; // Increment for 1023 bias + + // Number of bits in mantissa is 52. To obtain the mantissa value, we must + // extract the high 52 bits from the correct words in pVal. + uint64_t mantissa; + unsigned hiWord = whichWord(n-1); + if (hiWord == 0) { + mantissa = Tmp.pVal[0]; + if (n > 52) + mantissa >>= n - 52; // shift down, we want the top 52 bits. + } else { + assert(hiWord > 0 && "huh?"); + uint64_t hibits = Tmp.pVal[hiWord] << (52 - n % APINT_BITS_PER_WORD); + uint64_t lobits = Tmp.pVal[hiWord-1] >> (11 + n % APINT_BITS_PER_WORD); + mantissa = hibits | lobits; + } + + // The leading bit of mantissa is implicit, so get rid of it. + uint64_t sign = isNeg ? (1ULL << (APINT_BITS_PER_WORD - 1)) : 0; + union { + double D; + uint64_t I; + } T; + T.I = sign | (exp << 52) | mantissa; + return T.D; +} + +// Truncate to new width. +APInt APInt::trunc(unsigned width) const { + assert(width < BitWidth && "Invalid APInt Truncate request"); + assert(width && "Can't truncate to 0 bits"); + + if (width <= APINT_BITS_PER_WORD) + return APInt(width, getRawData()[0]); + + APInt Result(getMemory(getNumWords(width)), width); + + // Copy full words. + unsigned i; + for (i = 0; i != width / APINT_BITS_PER_WORD; i++) + Result.pVal[i] = pVal[i]; + + // Truncate and copy any partial word. + unsigned bits = (0 - width) % APINT_BITS_PER_WORD; + if (bits != 0) + Result.pVal[i] = pVal[i] << bits >> bits; + + return Result; +} + +// Sign extend to a new width. +APInt APInt::sext(unsigned width) const { + assert(width > BitWidth && "Invalid APInt SignExtend request"); + + if (width <= APINT_BITS_PER_WORD) { + uint64_t val = VAL << (APINT_BITS_PER_WORD - BitWidth); + val = (int64_t)val >> (width - BitWidth); + return APInt(width, val >> (APINT_BITS_PER_WORD - width)); + } + + APInt Result(getMemory(getNumWords(width)), width); + + // Copy full words. + unsigned i; + uint64_t word = 0; + for (i = 0; i != BitWidth / APINT_BITS_PER_WORD; i++) { + word = getRawData()[i]; + Result.pVal[i] = word; + } + + // Read and sign-extend any partial word. + unsigned bits = (0 - BitWidth) % APINT_BITS_PER_WORD; + if (bits != 0) + word = (int64_t)getRawData()[i] << bits >> bits; + else + word = (int64_t)word >> (APINT_BITS_PER_WORD - 1); + + // Write remaining full words. + for (; i != width / APINT_BITS_PER_WORD; i++) { + Result.pVal[i] = word; + word = (int64_t)word >> (APINT_BITS_PER_WORD - 1); + } + + // Write any partial word. + bits = (0 - width) % APINT_BITS_PER_WORD; + if (bits != 0) + Result.pVal[i] = word << bits >> bits; + + return Result; +} + +// Zero extend to a new width. +APInt APInt::zext(unsigned width) const { + assert(width > BitWidth && "Invalid APInt ZeroExtend request"); + + if (width <= APINT_BITS_PER_WORD) + return APInt(width, VAL); + + APInt Result(getMemory(getNumWords(width)), width); + + // Copy words. + unsigned i; + for (i = 0; i != getNumWords(); i++) + Result.pVal[i] = getRawData()[i]; + + // Zero remaining words. + memset(&Result.pVal[i], 0, (Result.getNumWords() - i) * APINT_WORD_SIZE); + + return Result; +} + +APInt APInt::zextOrTrunc(unsigned width) const { + if (BitWidth < width) + return zext(width); + if (BitWidth > width) + return trunc(width); + return *this; +} + +APInt APInt::sextOrTrunc(unsigned width) const { + if (BitWidth < width) + return sext(width); + if (BitWidth > width) + return trunc(width); + return *this; +} + +APInt APInt::zextOrSelf(unsigned width) const { + if (BitWidth < width) + return zext(width); + return *this; +} + +APInt APInt::sextOrSelf(unsigned width) const { + if (BitWidth < width) + return sext(width); + return *this; +} + +/// Arithmetic right-shift this APInt by shiftAmt. +/// @brief Arithmetic right-shift function. +APInt APInt::ashr(const APInt &shiftAmt) const { + return ashr((unsigned)shiftAmt.getLimitedValue(BitWidth)); +} + +/// Arithmetic right-shift this APInt by shiftAmt. +/// @brief Arithmetic right-shift function. +APInt APInt::ashr(unsigned shiftAmt) const { + assert(shiftAmt <= BitWidth && "Invalid shift amount"); + // Handle a degenerate case + if (shiftAmt == 0) + return *this; + + // Handle single word shifts with built-in ashr + if (isSingleWord()) { + if (shiftAmt == BitWidth) + return APInt(BitWidth, 0); // undefined + else { + unsigned SignBit = APINT_BITS_PER_WORD - BitWidth; + return APInt(BitWidth, + (((int64_t(VAL) << SignBit) >> SignBit) >> shiftAmt)); + } + } + + // If all the bits were shifted out, the result is, technically, undefined. + // We return -1 if it was negative, 0 otherwise. We check this early to avoid + // issues in the algorithm below. + if (shiftAmt == BitWidth) { + if (isNegative()) + return APInt(BitWidth, -1ULL, true); + else + return APInt(BitWidth, 0); + } + + // Create some space for the result. + uint64_t * val = new uint64_t[getNumWords()]; + + // Compute some values needed by the following shift algorithms + unsigned wordShift = shiftAmt % APINT_BITS_PER_WORD; // bits to shift per word + unsigned offset = shiftAmt / APINT_BITS_PER_WORD; // word offset for shift + unsigned breakWord = getNumWords() - 1 - offset; // last word affected + unsigned bitsInWord = whichBit(BitWidth); // how many bits in last word? + if (bitsInWord == 0) + bitsInWord = APINT_BITS_PER_WORD; + + // If we are shifting whole words, just move whole words + if (wordShift == 0) { + // Move the words containing significant bits + for (unsigned i = 0; i <= breakWord; ++i) + val[i] = pVal[i+offset]; // move whole word + + // Adjust the top significant word for sign bit fill, if negative + if (isNegative()) + if (bitsInWord < APINT_BITS_PER_WORD) + val[breakWord] |= ~0ULL << bitsInWord; // set high bits + } else { + // Shift the low order words + for (unsigned i = 0; i < breakWord; ++i) { + // This combines the shifted corresponding word with the low bits from + // the next word (shifted into this word's high bits). + val[i] = (pVal[i+offset] >> wordShift) | + (pVal[i+offset+1] << (APINT_BITS_PER_WORD - wordShift)); + } + + // Shift the break word. In this case there are no bits from the next word + // to include in this word. + val[breakWord] = pVal[breakWord+offset] >> wordShift; + + // Deal with sign extension in the break word, and possibly the word before + // it. + if (isNegative()) { + if (wordShift > bitsInWord) { + if (breakWord > 0) + val[breakWord-1] |= + ~0ULL << (APINT_BITS_PER_WORD - (wordShift - bitsInWord)); + val[breakWord] |= ~0ULL; + } else + val[breakWord] |= (~0ULL << (bitsInWord - wordShift)); + } + } + + // Remaining words are 0 or -1, just assign them. + uint64_t fillValue = (isNegative() ? -1ULL : 0); + for (unsigned i = breakWord+1; i < getNumWords(); ++i) + val[i] = fillValue; + APInt Result(val, BitWidth); + Result.clearUnusedBits(); + return Result; +} + +/// Logical right-shift this APInt by shiftAmt. +/// @brief Logical right-shift function. +APInt APInt::lshr(const APInt &shiftAmt) const { + return lshr((unsigned)shiftAmt.getLimitedValue(BitWidth)); +} + +/// Logical right-shift this APInt by shiftAmt. +/// @brief Logical right-shift function. +APInt APInt::lshr(unsigned shiftAmt) const { + if (isSingleWord()) { + if (shiftAmt >= BitWidth) + return APInt(BitWidth, 0); + else + return APInt(BitWidth, this->VAL >> shiftAmt); + } + + // If all the bits were shifted out, the result is 0. This avoids issues + // with shifting by the size of the integer type, which produces undefined + // results. We define these "undefined results" to always be 0. + if (shiftAmt >= BitWidth) + return APInt(BitWidth, 0); + + // If none of the bits are shifted out, the result is *this. This avoids + // issues with shifting by the size of the integer type, which produces + // undefined results in the code below. This is also an optimization. + if (shiftAmt == 0) + return *this; + + // Create some space for the result. + uint64_t * val = new uint64_t[getNumWords()]; + + // If we are shifting less than a word, compute the shift with a simple carry + if (shiftAmt < APINT_BITS_PER_WORD) { + lshrNear(val, pVal, getNumWords(), shiftAmt); + APInt Result(val, BitWidth); + Result.clearUnusedBits(); + return Result; + } + + // Compute some values needed by the remaining shift algorithms + unsigned wordShift = shiftAmt % APINT_BITS_PER_WORD; + unsigned offset = shiftAmt / APINT_BITS_PER_WORD; + + // If we are shifting whole words, just move whole words + if (wordShift == 0) { + for (unsigned i = 0; i < getNumWords() - offset; ++i) + val[i] = pVal[i+offset]; + for (unsigned i = getNumWords()-offset; i < getNumWords(); i++) + val[i] = 0; + APInt Result(val, BitWidth); + Result.clearUnusedBits(); + return Result; + } + + // Shift the low order words + unsigned breakWord = getNumWords() - offset -1; + for (unsigned i = 0; i < breakWord; ++i) + val[i] = (pVal[i+offset] >> wordShift) | + (pVal[i+offset+1] << (APINT_BITS_PER_WORD - wordShift)); + // Shift the break word. + val[breakWord] = pVal[breakWord+offset] >> wordShift; + + // Remaining words are 0 + for (unsigned i = breakWord+1; i < getNumWords(); ++i) + val[i] = 0; + APInt Result(val, BitWidth); + Result.clearUnusedBits(); + return Result; +} + +/// Left-shift this APInt by shiftAmt. +/// @brief Left-shift function. +APInt APInt::shl(const APInt &shiftAmt) const { + // It's undefined behavior in C to shift by BitWidth or greater. + return shl((unsigned)shiftAmt.getLimitedValue(BitWidth)); +} + +APInt APInt::shlSlowCase(unsigned shiftAmt) const { + // If all the bits were shifted out, the result is 0. This avoids issues + // with shifting by the size of the integer type, which produces undefined + // results. We define these "undefined results" to always be 0. + if (shiftAmt == BitWidth) + return APInt(BitWidth, 0); + + // If none of the bits are shifted out, the result is *this. This avoids a + // lshr by the words size in the loop below which can produce incorrect + // results. It also avoids the expensive computation below for a common case. + if (shiftAmt == 0) + return *this; + + // Create some space for the result. + uint64_t * val = new uint64_t[getNumWords()]; + + // If we are shifting less than a word, do it the easy way + if (shiftAmt < APINT_BITS_PER_WORD) { + uint64_t carry = 0; + for (unsigned i = 0; i < getNumWords(); i++) { + val[i] = pVal[i] << shiftAmt | carry; + carry = pVal[i] >> (APINT_BITS_PER_WORD - shiftAmt); + } + APInt Result(val, BitWidth); + Result.clearUnusedBits(); + return Result; + } + + // Compute some values needed by the remaining shift algorithms + unsigned wordShift = shiftAmt % APINT_BITS_PER_WORD; + unsigned offset = shiftAmt / APINT_BITS_PER_WORD; + + // If we are shifting whole words, just move whole words + if (wordShift == 0) { + for (unsigned i = 0; i < offset; i++) + val[i] = 0; + for (unsigned i = offset; i < getNumWords(); i++) + val[i] = pVal[i-offset]; + APInt Result(val, BitWidth); + Result.clearUnusedBits(); + return Result; + } + + // Copy whole words from this to Result. + unsigned i = getNumWords() - 1; + for (; i > offset; --i) + val[i] = pVal[i-offset] << wordShift | + pVal[i-offset-1] >> (APINT_BITS_PER_WORD - wordShift); + val[offset] = pVal[0] << wordShift; + for (i = 0; i < offset; ++i) + val[i] = 0; + APInt Result(val, BitWidth); + Result.clearUnusedBits(); + return Result; +} + +APInt APInt::rotl(const APInt &rotateAmt) const { + return rotl((unsigned)rotateAmt.getLimitedValue(BitWidth)); +} + +APInt APInt::rotl(unsigned rotateAmt) const { + rotateAmt %= BitWidth; + if (rotateAmt == 0) + return *this; + return shl(rotateAmt) | lshr(BitWidth - rotateAmt); +} + +APInt APInt::rotr(const APInt &rotateAmt) const { + return rotr((unsigned)rotateAmt.getLimitedValue(BitWidth)); +} + +APInt APInt::rotr(unsigned rotateAmt) const { + rotateAmt %= BitWidth; + if (rotateAmt == 0) + return *this; + return lshr(rotateAmt) | shl(BitWidth - rotateAmt); +} + +// Square Root - this method computes and returns the square root of "this". +// Three mechanisms are used for computation. For small values (<= 5 bits), +// a table lookup is done. This gets some performance for common cases. For +// values using less than 52 bits, the value is converted to double and then +// the libc sqrt function is called. The result is rounded and then converted +// back to a uint64_t which is then used to construct the result. Finally, +// the Babylonian method for computing square roots is used. +APInt APInt::sqrt() const { + + // Determine the magnitude of the value. + unsigned magnitude = getActiveBits(); + + // Use a fast table for some small values. This also gets rid of some + // rounding errors in libc sqrt for small values. + if (magnitude <= 5) { + static const uint8_t results[32] = { + /* 0 */ 0, + /* 1- 2 */ 1, 1, + /* 3- 6 */ 2, 2, 2, 2, + /* 7-12 */ 3, 3, 3, 3, 3, 3, + /* 13-20 */ 4, 4, 4, 4, 4, 4, 4, 4, + /* 21-30 */ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, + /* 31 */ 6 + }; + return APInt(BitWidth, results[ (isSingleWord() ? VAL : pVal[0]) ]); + } + + // If the magnitude of the value fits in less than 52 bits (the precision of + // an IEEE double precision floating point value), then we can use the + // libc sqrt function which will probably use a hardware sqrt computation. + // This should be faster than the algorithm below. + if (magnitude < 52) { + return APInt(BitWidth, + uint64_t(::round(::sqrt(double(isSingleWord()?VAL:pVal[0]))))); + } + + // Okay, all the short cuts are exhausted. We must compute it. The following + // is a classical Babylonian method for computing the square root. This code + // was adapted to APInt from a wikipedia article on such computations. + // See http://www.wikipedia.org/ and go to the page named + // Calculate_an_integer_square_root. + unsigned nbits = BitWidth, i = 4; + APInt testy(BitWidth, 16); + APInt x_old(BitWidth, 1); + APInt x_new(BitWidth, 0); + APInt two(BitWidth, 2); + + // Select a good starting value using binary logarithms. + for (;; i += 2, testy = testy.shl(2)) + if (i >= nbits || this->ule(testy)) { + x_old = x_old.shl(i / 2); + break; + } + + // Use the Babylonian method to arrive at the integer square root: + for (;;) { + x_new = (this->udiv(x_old) + x_old).udiv(two); + if (x_old.ule(x_new)) + break; + x_old = x_new; + } + + // Make sure we return the closest approximation + // NOTE: The rounding calculation below is correct. It will produce an + // off-by-one discrepancy with results from pari/gp. That discrepancy has been + // determined to be a rounding issue with pari/gp as it begins to use a + // floating point representation after 192 bits. There are no discrepancies + // between this algorithm and pari/gp for bit widths < 192 bits. + APInt square(x_old * x_old); + APInt nextSquare((x_old + 1) * (x_old +1)); + if (this->ult(square)) + return x_old; + assert(this->ule(nextSquare) && "Error in APInt::sqrt computation"); + APInt midpoint((nextSquare - square).udiv(two)); + APInt offset(*this - square); + if (offset.ult(midpoint)) + return x_old; + return x_old + 1; +} + +/// Computes the multiplicative inverse of this APInt for a given modulo. The +/// iterative extended Euclidean algorithm is used to solve for this value, +/// however we simplify it to speed up calculating only the inverse, and take +/// advantage of div+rem calculations. We also use some tricks to avoid copying +/// (potentially large) APInts around. +APInt APInt::multiplicativeInverse(const APInt& modulo) const { + assert(ult(modulo) && "This APInt must be smaller than the modulo"); + + // Using the properties listed at the following web page (accessed 06/21/08): + // http://www.numbertheory.org/php/euclid.html + // (especially the properties numbered 3, 4 and 9) it can be proved that + // BitWidth bits suffice for all the computations in the algorithm implemented + // below. More precisely, this number of bits suffice if the multiplicative + // inverse exists, but may not suffice for the general extended Euclidean + // algorithm. + + APInt r[2] = { modulo, *this }; + APInt t[2] = { APInt(BitWidth, 0), APInt(BitWidth, 1) }; + APInt q(BitWidth, 0); + + unsigned i; + for (i = 0; r[i^1] != 0; i ^= 1) { + // An overview of the math without the confusing bit-flipping: + // q = r[i-2] / r[i-1] + // r[i] = r[i-2] % r[i-1] + // t[i] = t[i-2] - t[i-1] * q + udivrem(r[i], r[i^1], q, r[i]); + t[i] -= t[i^1] * q; + } + + // If this APInt and the modulo are not coprime, there is no multiplicative + // inverse, so return 0. We check this by looking at the next-to-last + // remainder, which is the gcd(*this,modulo) as calculated by the Euclidean + // algorithm. + if (r[i] != 1) + return APInt(BitWidth, 0); + + // The next-to-last t is the multiplicative inverse. However, we are + // interested in a positive inverse. Calcuate a positive one from a negative + // one if necessary. A simple addition of the modulo suffices because + // abs(t[i]) is known to be less than *this/2 (see the link above). + return t[i].isNegative() ? t[i] + modulo : t[i]; +} + +/// Calculate the magic numbers required to implement a signed integer division +/// by a constant as a sequence of multiplies, adds and shifts. Requires that +/// the divisor not be 0, 1, or -1. Taken from "Hacker's Delight", Henry S. +/// Warren, Jr., chapter 10. +APInt::ms APInt::magic() const { + const APInt& d = *this; + unsigned p; + APInt ad, anc, delta, q1, r1, q2, r2, t; + APInt signedMin = APInt::getSignedMinValue(d.getBitWidth()); + struct ms mag; + + ad = d.abs(); + t = signedMin + (d.lshr(d.getBitWidth() - 1)); + anc = t - 1 - t.urem(ad); // absolute value of nc + p = d.getBitWidth() - 1; // initialize p + q1 = signedMin.udiv(anc); // initialize q1 = 2p/abs(nc) + r1 = signedMin - q1*anc; // initialize r1 = rem(2p,abs(nc)) + q2 = signedMin.udiv(ad); // initialize q2 = 2p/abs(d) + r2 = signedMin - q2*ad; // initialize r2 = rem(2p,abs(d)) + do { + p = p + 1; + q1 = q1<<1; // update q1 = 2p/abs(nc) + r1 = r1<<1; // update r1 = rem(2p/abs(nc)) + if (r1.uge(anc)) { // must be unsigned comparison + q1 = q1 + 1; + r1 = r1 - anc; + } + q2 = q2<<1; // update q2 = 2p/abs(d) + r2 = r2<<1; // update r2 = rem(2p/abs(d)) + if (r2.uge(ad)) { // must be unsigned comparison + q2 = q2 + 1; + r2 = r2 - ad; + } + delta = ad - r2; + } while (q1.ult(delta) || (q1 == delta && r1 == 0)); + + mag.m = q2 + 1; + if (d.isNegative()) mag.m = -mag.m; // resulting magic number + mag.s = p - d.getBitWidth(); // resulting shift + return mag; +} + +/// Calculate the magic numbers required to implement an unsigned integer +/// division by a constant as a sequence of multiplies, adds and shifts. +/// Requires that the divisor not be 0. Taken from "Hacker's Delight", Henry +/// S. Warren, Jr., chapter 10. +/// LeadingZeros can be used to simplify the calculation if the upper bits +/// of the divided value are known zero. +APInt::mu APInt::magicu(unsigned LeadingZeros) const { + const APInt& d = *this; + unsigned p; + APInt nc, delta, q1, r1, q2, r2; + struct mu magu; + magu.a = 0; // initialize "add" indicator + APInt allOnes = APInt::getAllOnesValue(d.getBitWidth()).lshr(LeadingZeros); + APInt signedMin = APInt::getSignedMinValue(d.getBitWidth()); + APInt signedMax = APInt::getSignedMaxValue(d.getBitWidth()); + + nc = allOnes - (allOnes - d).urem(d); + p = d.getBitWidth() - 1; // initialize p + q1 = signedMin.udiv(nc); // initialize q1 = 2p/nc + r1 = signedMin - q1*nc; // initialize r1 = rem(2p,nc) + q2 = signedMax.udiv(d); // initialize q2 = (2p-1)/d + r2 = signedMax - q2*d; // initialize r2 = rem((2p-1),d) + do { + p = p + 1; + if (r1.uge(nc - r1)) { + q1 = q1 + q1 + 1; // update q1 + r1 = r1 + r1 - nc; // update r1 + } + else { + q1 = q1+q1; // update q1 + r1 = r1+r1; // update r1 + } + if ((r2 + 1).uge(d - r2)) { + if (q2.uge(signedMax)) magu.a = 1; + q2 = q2+q2 + 1; // update q2 + r2 = r2+r2 + 1 - d; // update r2 + } + else { + if (q2.uge(signedMin)) magu.a = 1; + q2 = q2+q2; // update q2 + r2 = r2+r2 + 1; // update r2 + } + delta = d - 1 - r2; + } while (p < d.getBitWidth()*2 && + (q1.ult(delta) || (q1 == delta && r1 == 0))); + magu.m = q2 + 1; // resulting magic number + magu.s = p - d.getBitWidth(); // resulting shift + return magu; +} + +/// Implementation of Knuth's Algorithm D (Division of nonnegative integers) +/// from "Art of Computer Programming, Volume 2", section 4.3.1, p. 272. The +/// variables here have the same names as in the algorithm. Comments explain +/// the algorithm and any deviation from it. +static void KnuthDiv(unsigned *u, unsigned *v, unsigned *q, unsigned* r, + unsigned m, unsigned n) { + assert(u && "Must provide dividend"); + assert(v && "Must provide divisor"); + assert(q && "Must provide quotient"); + assert(u != v && u != q && v != q && "Must use different memory"); + assert(n>1 && "n must be > 1"); + + // b denotes the base of the number system. In our case b is 2^32. + LLVM_CONSTEXPR uint64_t b = uint64_t(1) << 32; + + // D1. [Normalize.] Set d = b / (v[n-1] + 1) and multiply all the digits of + // u and v by d. Note that we have taken Knuth's advice here to use a power + // of 2 value for d such that d * v[n-1] >= b/2 (b is the base). A power of + // 2 allows us to shift instead of multiply and it is easy to determine the + // shift amount from the leading zeros. We are basically normalizing the u + // and v so that its high bits are shifted to the top of v's range without + // overflow. Note that this can require an extra word in u so that u must + // be of length m+n+1. + unsigned shift = countLeadingZeros(v[n-1]); + unsigned v_carry = 0; + unsigned u_carry = 0; + if (shift) { + for (unsigned i = 0; i < m+n; ++i) { + unsigned u_tmp = u[i] >> (32 - shift); + u[i] = (u[i] << shift) | u_carry; + u_carry = u_tmp; + } + for (unsigned i = 0; i < n; ++i) { + unsigned v_tmp = v[i] >> (32 - shift); + v[i] = (v[i] << shift) | v_carry; + v_carry = v_tmp; + } + } + u[m+n] = u_carry; + + // D2. [Initialize j.] Set j to m. This is the loop counter over the places. + int j = m; + do { + // D3. [Calculate q'.]. + // Set qp = (u[j+n]*b + u[j+n-1]) / v[n-1]. (qp=qprime=q') + // Set rp = (u[j+n]*b + u[j+n-1]) % v[n-1]. (rp=rprime=r') + // Now test if qp == b or qp*v[n-2] > b*rp + u[j+n-2]; if so, decrease + // qp by 1, inrease rp by v[n-1], and repeat this test if rp < b. The test + // on v[n-2] determines at high speed most of the cases in which the trial + // value qp is one too large, and it eliminates all cases where qp is two + // too large. + uint64_t dividend = ((uint64_t(u[j+n]) << 32) + u[j+n-1]); + uint64_t qp = dividend / v[n-1]; + uint64_t rp = dividend % v[n-1]; + if (qp == b || qp*v[n-2] > b*rp + u[j+n-2]) { + qp--; + rp += v[n-1]; + if (rp < b && (qp == b || qp*v[n-2] > b*rp + u[j+n-2])) + qp--; + } + + // D4. [Multiply and subtract.] Replace (u[j+n]u[j+n-1]...u[j]) with + // (u[j+n]u[j+n-1]..u[j]) - qp * (v[n-1]...v[1]v[0]). This computation + // consists of a simple multiplication by a one-place number, combined with + // a subtraction. + // The digits (u[j+n]...u[j]) should be kept positive; if the result of + // this step is actually negative, (u[j+n]...u[j]) should be left as the + // true value plus b**(n+1), namely as the b's complement of + // the true value, and a "borrow" to the left should be remembered. + int64_t borrow = 0; + for (unsigned i = 0; i < n; ++i) { + uint64_t p = uint64_t(qp) * uint64_t(v[i]); + int64_t subres = int64_t(u[j+i]) - borrow - (unsigned)p; + u[j+i] = (unsigned)subres; + borrow = (p >> 32) - (subres >> 32); + } + bool isNeg = u[j+n] < borrow; + u[j+n] -= (unsigned)borrow; + + // D5. [Test remainder.] Set q[j] = qp. If the result of step D4 was + // negative, go to step D6; otherwise go on to step D7. + q[j] = (unsigned)qp; + if (isNeg) { + // D6. [Add back]. The probability that this step is necessary is very + // small, on the order of only 2/b. Make sure that test data accounts for + // this possibility. Decrease q[j] by 1 + q[j]--; + // and add (0v[n-1]...v[1]v[0]) to (u[j+n]u[j+n-1]...u[j+1]u[j]). + // A carry will occur to the left of u[j+n], and it should be ignored + // since it cancels with the borrow that occurred in D4. + bool carry = false; + for (unsigned i = 0; i < n; i++) { + unsigned limit = std::min(u[j+i],v[i]); + u[j+i] += v[i] + carry; + carry = u[j+i] < limit || (carry && u[j+i] == limit); + } + u[j+n] += carry; + } + + // D7. [Loop on j.] Decrease j by one. Now if j >= 0, go back to D3. + } while (--j >= 0); + + // D8. [Unnormalize]. Now q[...] is the desired quotient, and the desired + // remainder may be obtained by dividing u[...] by d. If r is non-null we + // compute the remainder (urem uses this). + if (r) { + // The value d is expressed by the "shift" value above since we avoided + // multiplication by d by using a shift left. So, all we have to do is + // shift right here. In order to mak + if (shift) { + unsigned carry = 0; + for (int i = n-1; i >= 0; i--) { + r[i] = (u[i] >> shift) | carry; + carry = u[i] << (32 - shift); + } + } else { + for (int i = n-1; i >= 0; i--) { + r[i] = u[i]; + } + } + } +} + +void APInt::divide(const APInt LHS, unsigned lhsWords, + const APInt &RHS, unsigned rhsWords, + APInt *Quotient, APInt *Remainder) +{ + assert(lhsWords >= rhsWords && "Fractional result"); + + // First, compose the values into an array of 32-bit words instead of + // 64-bit words. This is a necessity of both the "short division" algorithm + // and the Knuth "classical algorithm" which requires there to be native + // operations for +, -, and * on an m bit value with an m*2 bit result. We + // can't use 64-bit operands here because we don't have native results of + // 128-bits. Furthermore, casting the 64-bit values to 32-bit values won't + // work on large-endian machines. + uint64_t mask = ~0ull >> (sizeof(unsigned)*CHAR_BIT); + unsigned n = rhsWords * 2; + unsigned m = (lhsWords * 2) - n; + + // Allocate space for the temporary values we need either on the stack, if + // it will fit, or on the heap if it won't. + unsigned SPACE[128]; + unsigned *U = nullptr; + unsigned *V = nullptr; + unsigned *Q = nullptr; + unsigned *R = nullptr; + if ((Remainder?4:3)*n+2*m+1 <= 128) { + U = &SPACE[0]; + V = &SPACE[m+n+1]; + Q = &SPACE[(m+n+1) + n]; + if (Remainder) + R = &SPACE[(m+n+1) + n + (m+n)]; + } else { + U = new unsigned[m + n + 1]; + V = new unsigned[n]; + Q = new unsigned[m+n]; + if (Remainder) + R = new unsigned[n]; + } + + // Initialize the dividend + memset(U, 0, (m+n+1)*sizeof(unsigned)); + for (unsigned i = 0; i < lhsWords; ++i) { + uint64_t tmp = (LHS.getNumWords() == 1 ? LHS.VAL : LHS.pVal[i]); + U[i * 2] = (unsigned)(tmp & mask); + U[i * 2 + 1] = (unsigned)(tmp >> (sizeof(unsigned)*CHAR_BIT)); + } + U[m+n] = 0; // this extra word is for "spill" in the Knuth algorithm. + + // Initialize the divisor + memset(V, 0, (n)*sizeof(unsigned)); + for (unsigned i = 0; i < rhsWords; ++i) { + uint64_t tmp = (RHS.getNumWords() == 1 ? RHS.VAL : RHS.pVal[i]); + V[i * 2] = (unsigned)(tmp & mask); + V[i * 2 + 1] = (unsigned)(tmp >> (sizeof(unsigned)*CHAR_BIT)); + } + + // initialize the quotient and remainder + memset(Q, 0, (m+n) * sizeof(unsigned)); + if (Remainder) + memset(R, 0, n * sizeof(unsigned)); + + // Now, adjust m and n for the Knuth division. n is the number of words in + // the divisor. m is the number of words by which the dividend exceeds the + // divisor (i.e. m+n is the length of the dividend). These sizes must not + // contain any zero words or the Knuth algorithm fails. + for (unsigned i = n; i > 0 && V[i-1] == 0; i--) { + n--; + m++; + } + for (unsigned i = m+n; i > 0 && U[i-1] == 0; i--) + m--; + + // If we're left with only a single word for the divisor, Knuth doesn't work + // so we implement the short division algorithm here. This is much simpler + // and faster because we are certain that we can divide a 64-bit quantity + // by a 32-bit quantity at hardware speed and short division is simply a + // series of such operations. This is just like doing short division but we + // are using base 2^32 instead of base 10. + assert(n != 0 && "Divide by zero?"); + if (n == 1) { + unsigned divisor = V[0]; + unsigned remainder = 0; + for (int i = m+n-1; i >= 0; i--) { + uint64_t partial_dividend = uint64_t(remainder) << 32 | U[i]; + if (partial_dividend == 0) { + Q[i] = 0; + remainder = 0; + } else if (partial_dividend < divisor) { + Q[i] = 0; + remainder = (unsigned)partial_dividend; + } else if (partial_dividend == divisor) { + Q[i] = 1; + remainder = 0; + } else { + Q[i] = (unsigned)(partial_dividend / divisor); + remainder = (unsigned)(partial_dividend - (Q[i] * divisor)); + } + } + if (R) + R[0] = remainder; + } else { + // Now we're ready to invoke the Knuth classical divide algorithm. In this + // case n > 1. + KnuthDiv(U, V, Q, R, m, n); + } + + // If the caller wants the quotient + if (Quotient) { + // Set up the Quotient value's memory. + if (Quotient->BitWidth != LHS.BitWidth) { + if (Quotient->isSingleWord()) + Quotient->VAL = 0; + else + delete [] Quotient->pVal; + Quotient->BitWidth = LHS.BitWidth; + if (!Quotient->isSingleWord()) + Quotient->pVal = getClearedMemory(Quotient->getNumWords()); + } else + Quotient->clearAllBits(); + + // The quotient is in Q. Reconstitute the quotient into Quotient's low + // order words. + // This case is currently dead as all users of divide() handle trivial cases + // earlier. + if (lhsWords == 1) { + uint64_t tmp = + uint64_t(Q[0]) | (uint64_t(Q[1]) << (APINT_BITS_PER_WORD / 2)); + if (Quotient->isSingleWord()) + Quotient->VAL = tmp; + else + Quotient->pVal[0] = tmp; + } else { + assert(!Quotient->isSingleWord() && "Quotient APInt not large enough"); + for (unsigned i = 0; i < lhsWords; ++i) + Quotient->pVal[i] = + uint64_t(Q[i*2]) | (uint64_t(Q[i*2+1]) << (APINT_BITS_PER_WORD / 2)); + } + } + + // If the caller wants the remainder + if (Remainder) { + // Set up the Remainder value's memory. + if (Remainder->BitWidth != RHS.BitWidth) { + if (Remainder->isSingleWord()) + Remainder->VAL = 0; + else + delete [] Remainder->pVal; + Remainder->BitWidth = RHS.BitWidth; + if (!Remainder->isSingleWord()) + Remainder->pVal = getClearedMemory(Remainder->getNumWords()); + } else + Remainder->clearAllBits(); + + // The remainder is in R. Reconstitute the remainder into Remainder's low + // order words. + if (rhsWords == 1) { + uint64_t tmp = + uint64_t(R[0]) | (uint64_t(R[1]) << (APINT_BITS_PER_WORD / 2)); + if (Remainder->isSingleWord()) + Remainder->VAL = tmp; + else + Remainder->pVal[0] = tmp; + } else { + assert(!Remainder->isSingleWord() && "Remainder APInt not large enough"); + for (unsigned i = 0; i < rhsWords; ++i) + Remainder->pVal[i] = + uint64_t(R[i*2]) | (uint64_t(R[i*2+1]) << (APINT_BITS_PER_WORD / 2)); + } + } + + // Clean up the memory we allocated. + if (U != &SPACE[0]) { + delete [] U; + delete [] V; + delete [] Q; + delete [] R; + } +} + +APInt APInt::udiv(const APInt& RHS) const { + assert(BitWidth == RHS.BitWidth && "Bit widths must be the same"); + + // First, deal with the easy case + if (isSingleWord()) { + assert(RHS.VAL != 0 && "Divide by zero?"); + return APInt(BitWidth, VAL / RHS.VAL); + } + + // Get some facts about the LHS and RHS number of bits and words + unsigned rhsBits = RHS.getActiveBits(); + unsigned rhsWords = !rhsBits ? 0 : (APInt::whichWord(rhsBits - 1) + 1); + assert(rhsWords && "Divided by zero???"); + unsigned lhsBits = this->getActiveBits(); + unsigned lhsWords = !lhsBits ? 0 : (APInt::whichWord(lhsBits - 1) + 1); + + // Deal with some degenerate cases + if (!lhsWords) + // 0 / X ===> 0 + return APInt(BitWidth, 0); + else if (lhsWords < rhsWords || this->ult(RHS)) { + // X / Y ===> 0, iff X < Y + return APInt(BitWidth, 0); + } else if (*this == RHS) { + // X / X ===> 1 + return APInt(BitWidth, 1); + } else if (lhsWords == 1 && rhsWords == 1) { + // All high words are zero, just use native divide + return APInt(BitWidth, this->pVal[0] / RHS.pVal[0]); + } + + // We have to compute it the hard way. Invoke the Knuth divide algorithm. + APInt Quotient(1,0); // to hold result. + divide(*this, lhsWords, RHS, rhsWords, &Quotient, nullptr); + return Quotient; +} + +APInt APInt::sdiv(const APInt &RHS) const { + if (isNegative()) { + if (RHS.isNegative()) + return (-(*this)).udiv(-RHS); + return -((-(*this)).udiv(RHS)); + } + if (RHS.isNegative()) + return -(this->udiv(-RHS)); + return this->udiv(RHS); +} + +APInt APInt::urem(const APInt& RHS) const { + assert(BitWidth == RHS.BitWidth && "Bit widths must be the same"); + if (isSingleWord()) { + assert(RHS.VAL != 0 && "Remainder by zero?"); + return APInt(BitWidth, VAL % RHS.VAL); + } + + // Get some facts about the LHS + unsigned lhsBits = getActiveBits(); + unsigned lhsWords = !lhsBits ? 0 : (whichWord(lhsBits - 1) + 1); + + // Get some facts about the RHS + unsigned rhsBits = RHS.getActiveBits(); + unsigned rhsWords = !rhsBits ? 0 : (APInt::whichWord(rhsBits - 1) + 1); + assert(rhsWords && "Performing remainder operation by zero ???"); + + // Check the degenerate cases + if (lhsWords == 0) { + // 0 % Y ===> 0 + return APInt(BitWidth, 0); + } else if (lhsWords < rhsWords || this->ult(RHS)) { + // X % Y ===> X, iff X < Y + return *this; + } else if (*this == RHS) { + // X % X == 0; + return APInt(BitWidth, 0); + } else if (lhsWords == 1) { + // All high words are zero, just use native remainder + return APInt(BitWidth, pVal[0] % RHS.pVal[0]); + } + + // We have to compute it the hard way. Invoke the Knuth divide algorithm. + APInt Remainder(1,0); + divide(*this, lhsWords, RHS, rhsWords, nullptr, &Remainder); + return Remainder; +} + +APInt APInt::srem(const APInt &RHS) const { + if (isNegative()) { + if (RHS.isNegative()) + return -((-(*this)).urem(-RHS)); + return -((-(*this)).urem(RHS)); + } + if (RHS.isNegative()) + return this->urem(-RHS); + return this->urem(RHS); +} + +void APInt::udivrem(const APInt &LHS, const APInt &RHS, + APInt &Quotient, APInt &Remainder) { + assert(LHS.BitWidth == RHS.BitWidth && "Bit widths must be the same"); + + // First, deal with the easy case + if (LHS.isSingleWord()) { + assert(RHS.VAL != 0 && "Divide by zero?"); + uint64_t QuotVal = LHS.VAL / RHS.VAL; + uint64_t RemVal = LHS.VAL % RHS.VAL; + Quotient = APInt(LHS.BitWidth, QuotVal); + Remainder = APInt(LHS.BitWidth, RemVal); + return; + } + + // Get some size facts about the dividend and divisor + unsigned lhsBits = LHS.getActiveBits(); + unsigned lhsWords = !lhsBits ? 0 : (APInt::whichWord(lhsBits - 1) + 1); + unsigned rhsBits = RHS.getActiveBits(); + unsigned rhsWords = !rhsBits ? 0 : (APInt::whichWord(rhsBits - 1) + 1); + + // Check the degenerate cases + if (lhsWords == 0) { + Quotient = 0; // 0 / Y ===> 0 + Remainder = 0; // 0 % Y ===> 0 + return; + } + + if (lhsWords < rhsWords || LHS.ult(RHS)) { + Remainder = LHS; // X % Y ===> X, iff X < Y + Quotient = 0; // X / Y ===> 0, iff X < Y + return; + } + + if (LHS == RHS) { + Quotient = 1; // X / X ===> 1 + Remainder = 0; // X % X ===> 0; + return; + } + + if (lhsWords == 1 && rhsWords == 1) { + // There is only one word to consider so use the native versions. + uint64_t lhsValue = LHS.isSingleWord() ? LHS.VAL : LHS.pVal[0]; + uint64_t rhsValue = RHS.isSingleWord() ? RHS.VAL : RHS.pVal[0]; + Quotient = APInt(LHS.getBitWidth(), lhsValue / rhsValue); + Remainder = APInt(LHS.getBitWidth(), lhsValue % rhsValue); + return; + } + + // Okay, lets do it the long way + divide(LHS, lhsWords, RHS, rhsWords, &Quotient, &Remainder); +} + +void APInt::sdivrem(const APInt &LHS, const APInt &RHS, + APInt &Quotient, APInt &Remainder) { + if (LHS.isNegative()) { + if (RHS.isNegative()) + APInt::udivrem(-LHS, -RHS, Quotient, Remainder); + else { + APInt::udivrem(-LHS, RHS, Quotient, Remainder); + Quotient = -Quotient; + } + Remainder = -Remainder; + } else if (RHS.isNegative()) { + APInt::udivrem(LHS, -RHS, Quotient, Remainder); + Quotient = -Quotient; + } else { + APInt::udivrem(LHS, RHS, Quotient, Remainder); + } +} + +APInt APInt::sadd_ov(const APInt &RHS, bool &Overflow) const { + APInt Res = *this+RHS; + Overflow = isNonNegative() == RHS.isNonNegative() && + Res.isNonNegative() != isNonNegative(); + return Res; +} + +APInt APInt::uadd_ov(const APInt &RHS, bool &Overflow) const { + APInt Res = *this+RHS; + Overflow = Res.ult(RHS); + return Res; +} + +APInt APInt::ssub_ov(const APInt &RHS, bool &Overflow) const { + APInt Res = *this - RHS; + Overflow = isNonNegative() != RHS.isNonNegative() && + Res.isNonNegative() != isNonNegative(); + return Res; +} + +APInt APInt::usub_ov(const APInt &RHS, bool &Overflow) const { + APInt Res = *this-RHS; + Overflow = Res.ugt(*this); + return Res; +} + +APInt APInt::sdiv_ov(const APInt &RHS, bool &Overflow) const { + // MININT/-1 --> overflow. + Overflow = isMinSignedValue() && RHS.isAllOnesValue(); + return sdiv(RHS); +} + +APInt APInt::smul_ov(const APInt &RHS, bool &Overflow) const { + APInt Res = *this * RHS; + + if (*this != 0 && RHS != 0) + Overflow = Res.sdiv(RHS) != *this || Res.sdiv(*this) != RHS; + else + Overflow = false; + return Res; +} + +APInt APInt::umul_ov(const APInt &RHS, bool &Overflow) const { + APInt Res = *this * RHS; + + if (*this != 0 && RHS != 0) + Overflow = Res.udiv(RHS) != *this || Res.udiv(*this) != RHS; + else + Overflow = false; + return Res; +} + +APInt APInt::sshl_ov(const APInt &ShAmt, bool &Overflow) const { + Overflow = ShAmt.uge(getBitWidth()); + if (Overflow) + return APInt(BitWidth, 0); + + if (isNonNegative()) // Don't allow sign change. + Overflow = ShAmt.uge(countLeadingZeros()); + else + Overflow = ShAmt.uge(countLeadingOnes()); + + return *this << ShAmt; +} + +APInt APInt::ushl_ov(const APInt &ShAmt, bool &Overflow) const { + Overflow = ShAmt.uge(getBitWidth()); + if (Overflow) + return APInt(BitWidth, 0); + + Overflow = ShAmt.ugt(countLeadingZeros()); + + return *this << ShAmt; +} + + + + +void APInt::fromString(unsigned numbits, StringRef str, uint8_t radix) { + // Check our assumptions here + assert(!str.empty() && "Invalid string length"); + assert((radix == 10 || radix == 8 || radix == 16 || radix == 2 || + radix == 36) && + "Radix should be 2, 8, 10, 16, or 36!"); + + StringRef::iterator p = str.begin(); + size_t slen = str.size(); + bool isNeg = *p == '-'; + if (*p == '-' || *p == '+') { + p++; + slen--; + assert(slen && "String is only a sign, needs a value."); + } + assert((slen <= numbits || radix != 2) && "Insufficient bit width"); + assert(((slen-1)*3 <= numbits || radix != 8) && "Insufficient bit width"); + assert(((slen-1)*4 <= numbits || radix != 16) && "Insufficient bit width"); + assert((((slen-1)*64)/22 <= numbits || radix != 10) && + "Insufficient bit width"); + + // Allocate memory + if (!isSingleWord()) + pVal = getClearedMemory(getNumWords()); + + // Figure out if we can shift instead of multiply + unsigned shift = (radix == 16 ? 4 : radix == 8 ? 3 : radix == 2 ? 1 : 0); + + // Set up an APInt for the digit to add outside the loop so we don't + // constantly construct/destruct it. + APInt apdigit(getBitWidth(), 0); + APInt apradix(getBitWidth(), radix); + + // Enter digit traversal loop + for (StringRef::iterator e = str.end(); p != e; ++p) { + unsigned digit = getDigit(*p, radix); + assert(digit < radix && "Invalid character in digit string"); + + // Shift or multiply the value by the radix + if (slen > 1) { + if (shift) + *this <<= shift; + else + *this *= apradix; + } + + // Add in the digit we just interpreted + if (apdigit.isSingleWord()) + apdigit.VAL = digit; + else + apdigit.pVal[0] = digit; + *this += apdigit; + } + // If its negative, put it in two's complement form + if (isNeg) { + --(*this); + this->flipAllBits(); + } +} + +void APInt::toString(SmallVectorImpl &Str, unsigned Radix, + bool Signed, bool formatAsCLiteral) const { + assert((Radix == 10 || Radix == 8 || Radix == 16 || Radix == 2 || + Radix == 36) && + "Radix should be 2, 8, 10, 16, or 36!"); + + const char *Prefix = ""; + if (formatAsCLiteral) { + switch (Radix) { + case 2: + // Binary literals are a non-standard extension added in gcc 4.3: + // http://gcc.gnu.org/onlinedocs/gcc-4.3.0/gcc/Binary-constants.html + Prefix = "0b"; + break; + case 8: + Prefix = "0"; + break; + case 10: + break; // No prefix + case 16: + Prefix = "0x"; + break; + default: + llvm_unreachable("Invalid radix!"); + } + } + + // First, check for a zero value and just short circuit the logic below. + if (*this == 0) { + while (*Prefix) { + Str.push_back(*Prefix); + ++Prefix; + }; + Str.push_back('0'); + return; + } + + static const char Digits[] = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ"; + + if (isSingleWord()) { + char Buffer[65]; + char *BufPtr = Buffer+65; + + uint64_t N; + if (!Signed) { + N = getZExtValue(); + } else { + int64_t I = getSExtValue(); + if (I >= 0) { + N = I; + } else { + Str.push_back('-'); + N = -(uint64_t)I; + } + } + + while (*Prefix) { + Str.push_back(*Prefix); + ++Prefix; + }; + + while (N) { + *--BufPtr = Digits[N % Radix]; + N /= Radix; + } + Str.append(BufPtr, Buffer+65); + return; + } + + APInt Tmp(*this); + + if (Signed && isNegative()) { + // They want to print the signed version and it is a negative value + // Flip the bits and add one to turn it into the equivalent positive + // value and put a '-' in the result. + Tmp.flipAllBits(); + ++Tmp; + Str.push_back('-'); + } + + while (*Prefix) { + Str.push_back(*Prefix); + ++Prefix; + }; + + // We insert the digits backward, then reverse them to get the right order. + unsigned StartDig = Str.size(); + + // For the 2, 8 and 16 bit cases, we can just shift instead of divide + // because the number of bits per digit (1, 3 and 4 respectively) divides + // equaly. We just shift until the value is zero. + if (Radix == 2 || Radix == 8 || Radix == 16) { + // Just shift tmp right for each digit width until it becomes zero + unsigned ShiftAmt = (Radix == 16 ? 4 : (Radix == 8 ? 3 : 1)); + unsigned MaskAmt = Radix - 1; + + while (Tmp != 0) { + unsigned Digit = unsigned(Tmp.getRawData()[0]) & MaskAmt; + Str.push_back(Digits[Digit]); + Tmp = Tmp.lshr(ShiftAmt); + } + } else { + APInt divisor(Radix == 10? 4 : 8, Radix); + while (Tmp != 0) { + APInt APdigit(1, 0); + APInt tmp2(Tmp.getBitWidth(), 0); + divide(Tmp, Tmp.getNumWords(), divisor, divisor.getNumWords(), &tmp2, + &APdigit); + unsigned Digit = (unsigned)APdigit.getZExtValue(); + assert(Digit < Radix && "divide failed"); + Str.push_back(Digits[Digit]); + Tmp = tmp2; + } + } + + // Reverse the digits before returning. + std::reverse(Str.begin()+StartDig, Str.end()); +} + +/// Returns the APInt as a std::string. Note that this is an inefficient method. +/// It is better to pass in a SmallVector/SmallString to the methods above. +std::string APInt::toString(unsigned Radix = 10, bool Signed = true) const { + SmallString<40> S; + toString(S, Radix, Signed, /* formatAsCLiteral = */false); + return S.str(); +} + + +LLVM_DUMP_METHOD void APInt::dump() const { + SmallString<40> S, U; + this->toStringUnsigned(U); + this->toStringSigned(S); +} + +void APInt::print(raw_ostream &OS, bool isSigned) const { + SmallString<40> S; + this->toString(S, 10, isSigned, /* formatAsCLiteral = */false); + OS << S; +} + +// This implements a variety of operations on a representation of +// arbitrary precision, two's-complement, bignum integer values. + +// Assumed by lowHalf, highHalf, partMSB and partLSB. A fairly safe +// and unrestricting assumption. +static_assert(integerPartWidth % 2 == 0, "Part width must be divisible by 2!"); + +/* Some handy functions local to this file. */ +namespace { + + /* Returns the integer part with the least significant BITS set. + BITS cannot be zero. */ + static inline integerPart + lowBitMask(unsigned int bits) + { + assert(bits != 0 && bits <= integerPartWidth); + + return ~(integerPart) 0 >> (integerPartWidth - bits); + } + + /* Returns the value of the lower half of PART. */ + static inline integerPart + lowHalf(integerPart part) + { + return part & lowBitMask(integerPartWidth / 2); + } + + /* Returns the value of the upper half of PART. */ + static inline integerPart + highHalf(integerPart part) + { + return part >> (integerPartWidth / 2); + } + + /* Returns the bit number of the most significant set bit of a part. + If the input number has no bits set -1U is returned. */ + static unsigned int + partMSB(integerPart value) + { + return findLastSet(value, ZB_Max); + } + + /* Returns the bit number of the least significant set bit of a + part. If the input number has no bits set -1U is returned. */ + static unsigned int + partLSB(integerPart value) + { + return findFirstSet(value, ZB_Max); + } +} + +/* Sets the least significant part of a bignum to the input value, and + zeroes out higher parts. */ +void +APInt::tcSet(integerPart *dst, integerPart part, unsigned int parts) +{ + unsigned int i; + + assert(parts > 0); + + dst[0] = part; + for (i = 1; i < parts; i++) + dst[i] = 0; +} + +/* Assign one bignum to another. */ +void +APInt::tcAssign(integerPart *dst, const integerPart *src, unsigned int parts) +{ + unsigned int i; + + for (i = 0; i < parts; i++) + dst[i] = src[i]; +} + +/* Returns true if a bignum is zero, false otherwise. */ +bool +APInt::tcIsZero(const integerPart *src, unsigned int parts) +{ + unsigned int i; + + for (i = 0; i < parts; i++) + if (src[i]) + return false; + + return true; +} + +/* Extract the given bit of a bignum; returns 0 or 1. */ +int +APInt::tcExtractBit(const integerPart *parts, unsigned int bit) +{ + return (parts[bit / integerPartWidth] & + ((integerPart) 1 << bit % integerPartWidth)) != 0; +} + +/* Set the given bit of a bignum. */ +void +APInt::tcSetBit(integerPart *parts, unsigned int bit) +{ + parts[bit / integerPartWidth] |= (integerPart) 1 << (bit % integerPartWidth); +} + +/* Clears the given bit of a bignum. */ +void +APInt::tcClearBit(integerPart *parts, unsigned int bit) +{ + parts[bit / integerPartWidth] &= + ~((integerPart) 1 << (bit % integerPartWidth)); +} + +/* Returns the bit number of the least significant set bit of a + number. If the input number has no bits set -1U is returned. */ +unsigned int +APInt::tcLSB(const integerPart *parts, unsigned int n) +{ + unsigned int i, lsb; + + for (i = 0; i < n; i++) { + if (parts[i] != 0) { + lsb = partLSB(parts[i]); + + return lsb + i * integerPartWidth; + } + } + + return -1U; +} + +/* Returns the bit number of the most significant set bit of a number. + If the input number has no bits set -1U is returned. */ +unsigned int +APInt::tcMSB(const integerPart *parts, unsigned int n) +{ + unsigned int msb; + + do { + --n; + + if (parts[n] != 0) { + msb = partMSB(parts[n]); + + return msb + n * integerPartWidth; + } + } while (n); + + return -1U; +} + +/* Copy the bit vector of width srcBITS from SRC, starting at bit + srcLSB, to DST, of dstCOUNT parts, such that the bit srcLSB becomes + the least significant bit of DST. All high bits above srcBITS in + DST are zero-filled. */ +void +APInt::tcExtract(integerPart *dst, unsigned int dstCount,const integerPart *src, + unsigned int srcBits, unsigned int srcLSB) +{ + unsigned int firstSrcPart, dstParts, shift, n; + + dstParts = (srcBits + integerPartWidth - 1) / integerPartWidth; + assert(dstParts <= dstCount); + + firstSrcPart = srcLSB / integerPartWidth; + tcAssign (dst, src + firstSrcPart, dstParts); + + shift = srcLSB % integerPartWidth; + tcShiftRight (dst, dstParts, shift); + + /* We now have (dstParts * integerPartWidth - shift) bits from SRC + in DST. If this is less that srcBits, append the rest, else + clear the high bits. */ + n = dstParts * integerPartWidth - shift; + if (n < srcBits) { + integerPart mask = lowBitMask (srcBits - n); + dst[dstParts - 1] |= ((src[firstSrcPart + dstParts] & mask) + << n % integerPartWidth); + } else if (n > srcBits) { + if (srcBits % integerPartWidth) + dst[dstParts - 1] &= lowBitMask (srcBits % integerPartWidth); + } + + /* Clear high parts. */ + while (dstParts < dstCount) + dst[dstParts++] = 0; +} + +/* DST += RHS + C where C is zero or one. Returns the carry flag. */ +integerPart +APInt::tcAdd(integerPart *dst, const integerPart *rhs, + integerPart c, unsigned int parts) +{ + unsigned int i; + + assert(c <= 1); + + for (i = 0; i < parts; i++) { + integerPart l; + + l = dst[i]; + if (c) { + dst[i] += rhs[i] + 1; + c = (dst[i] <= l); + } else { + dst[i] += rhs[i]; + c = (dst[i] < l); + } + } + + return c; +} + +/* DST -= RHS + C where C is zero or one. Returns the carry flag. */ +integerPart +APInt::tcSubtract(integerPart *dst, const integerPart *rhs, + integerPart c, unsigned int parts) +{ + unsigned int i; + + assert(c <= 1); + + for (i = 0; i < parts; i++) { + integerPart l; + + l = dst[i]; + if (c) { + dst[i] -= rhs[i] + 1; + c = (dst[i] >= l); + } else { + dst[i] -= rhs[i]; + c = (dst[i] > l); + } + } + + return c; +} + +/* Negate a bignum in-place. */ +void +APInt::tcNegate(integerPart *dst, unsigned int parts) +{ + tcComplement(dst, parts); + tcIncrement(dst, parts); +} + +/* DST += SRC * MULTIPLIER + CARRY if add is true + DST = SRC * MULTIPLIER + CARRY if add is false + + Requires 0 <= DSTPARTS <= SRCPARTS + 1. If DST overlaps SRC + they must start at the same point, i.e. DST == SRC. + + If DSTPARTS == SRCPARTS + 1 no overflow occurs and zero is + returned. Otherwise DST is filled with the least significant + DSTPARTS parts of the result, and if all of the omitted higher + parts were zero return zero, otherwise overflow occurred and + return one. */ +int +APInt::tcMultiplyPart(integerPart *dst, const integerPart *src, + integerPart multiplier, integerPart carry, + unsigned int srcParts, unsigned int dstParts, + bool add) +{ + unsigned int i, n; + + /* Otherwise our writes of DST kill our later reads of SRC. */ + assert(dst <= src || dst >= src + srcParts); + assert(dstParts <= srcParts + 1); + + /* N loops; minimum of dstParts and srcParts. */ + n = dstParts < srcParts ? dstParts: srcParts; + + for (i = 0; i < n; i++) { + integerPart low, mid, high, srcPart; + + /* [ LOW, HIGH ] = MULTIPLIER * SRC[i] + DST[i] + CARRY. + + This cannot overflow, because + + (n - 1) * (n - 1) + 2 (n - 1) = (n - 1) * (n + 1) + + which is less than n^2. */ + + srcPart = src[i]; + + if (multiplier == 0 || srcPart == 0) { + low = carry; + high = 0; + } else { + low = lowHalf(srcPart) * lowHalf(multiplier); + high = highHalf(srcPart) * highHalf(multiplier); + + mid = lowHalf(srcPart) * highHalf(multiplier); + high += highHalf(mid); + mid <<= integerPartWidth / 2; + if (low + mid < low) + high++; + low += mid; + + mid = highHalf(srcPart) * lowHalf(multiplier); + high += highHalf(mid); + mid <<= integerPartWidth / 2; + if (low + mid < low) + high++; + low += mid; + + /* Now add carry. */ + if (low + carry < low) + high++; + low += carry; + } + + if (add) { + /* And now DST[i], and store the new low part there. */ + if (low + dst[i] < low) + high++; + dst[i] += low; + } else + dst[i] = low; + + carry = high; + } + + if (i < dstParts) { + /* Full multiplication, there is no overflow. */ + assert(i + 1 == dstParts); + dst[i] = carry; + return 0; + } else { + /* We overflowed if there is carry. */ + if (carry) + return 1; + + /* We would overflow if any significant unwritten parts would be + non-zero. This is true if any remaining src parts are non-zero + and the multiplier is non-zero. */ + if (multiplier) + for (; i < srcParts; i++) + if (src[i]) + return 1; + + /* We fitted in the narrow destination. */ + return 0; + } +} + +/* DST = LHS * RHS, where DST has the same width as the operands and + is filled with the least significant parts of the result. Returns + one if overflow occurred, otherwise zero. DST must be disjoint + from both operands. */ +int +APInt::tcMultiply(integerPart *dst, const integerPart *lhs, + const integerPart *rhs, unsigned int parts) +{ + unsigned int i; + int overflow; + + assert(dst != lhs && dst != rhs); + + overflow = 0; + tcSet(dst, 0, parts); + + for (i = 0; i < parts; i++) + overflow |= tcMultiplyPart(&dst[i], lhs, rhs[i], 0, parts, + parts - i, true); + + return overflow; +} + +/* DST = LHS * RHS, where DST has width the sum of the widths of the + operands. No overflow occurs. DST must be disjoint from both + operands. Returns the number of parts required to hold the + result. */ +unsigned int +APInt::tcFullMultiply(integerPart *dst, const integerPart *lhs, + const integerPart *rhs, unsigned int lhsParts, + unsigned int rhsParts) +{ + /* Put the narrower number on the LHS for less loops below. */ + if (lhsParts > rhsParts) { + return tcFullMultiply (dst, rhs, lhs, rhsParts, lhsParts); + } else { + unsigned int n; + + assert(dst != lhs && dst != rhs); + + tcSet(dst, 0, rhsParts); + + for (n = 0; n < lhsParts; n++) + tcMultiplyPart(&dst[n], rhs, lhs[n], 0, rhsParts, rhsParts + 1, true); + + n = lhsParts + rhsParts; + + return n - (dst[n - 1] == 0); + } +} + +/* If RHS is zero LHS and REMAINDER are left unchanged, return one. + Otherwise set LHS to LHS / RHS with the fractional part discarded, + set REMAINDER to the remainder, return zero. i.e. + + OLD_LHS = RHS * LHS + REMAINDER + + SCRATCH is a bignum of the same size as the operands and result for + use by the routine; its contents need not be initialized and are + destroyed. LHS, REMAINDER and SCRATCH must be distinct. +*/ +int +APInt::tcDivide(integerPart *lhs, const integerPart *rhs, + integerPart *remainder, integerPart *srhs, + unsigned int parts) +{ + unsigned int n, shiftCount; + integerPart mask; + + assert(lhs != remainder && lhs != srhs && remainder != srhs); + + shiftCount = tcMSB(rhs, parts) + 1; + if (shiftCount == 0) + return true; + + shiftCount = parts * integerPartWidth - shiftCount; + n = shiftCount / integerPartWidth; + mask = (integerPart) 1 << (shiftCount % integerPartWidth); + + tcAssign(srhs, rhs, parts); + tcShiftLeft(srhs, parts, shiftCount); + tcAssign(remainder, lhs, parts); + tcSet(lhs, 0, parts); + + /* Loop, subtracting SRHS if REMAINDER is greater and adding that to + the total. */ + for (;;) { + int compare; + + compare = tcCompare(remainder, srhs, parts); + if (compare >= 0) { + tcSubtract(remainder, srhs, 0, parts); + lhs[n] |= mask; + } + + if (shiftCount == 0) + break; + shiftCount--; + tcShiftRight(srhs, parts, 1); + if ((mask >>= 1) == 0) + mask = (integerPart) 1 << (integerPartWidth - 1), n--; + } + + return false; +} + +/* Shift a bignum left COUNT bits in-place. Shifted in bits are zero. + There are no restrictions on COUNT. */ +void +APInt::tcShiftLeft(integerPart *dst, unsigned int parts, unsigned int count) +{ + if (count) { + unsigned int jump, shift; + + /* Jump is the inter-part jump; shift is is intra-part shift. */ + jump = count / integerPartWidth; + shift = count % integerPartWidth; + + while (parts > jump) { + integerPart part; + + parts--; + + /* dst[i] comes from the two parts src[i - jump] and, if we have + an intra-part shift, src[i - jump - 1]. */ + part = dst[parts - jump]; + if (shift) { + part <<= shift; + if (parts >= jump + 1) + part |= dst[parts - jump - 1] >> (integerPartWidth - shift); + } + + dst[parts] = part; + } + + while (parts > 0) + dst[--parts] = 0; + } +} + +/* Shift a bignum right COUNT bits in-place. Shifted in bits are + zero. There are no restrictions on COUNT. */ +void +APInt::tcShiftRight(integerPart *dst, unsigned int parts, unsigned int count) +{ + if (count) { + unsigned int i, jump, shift; + + /* Jump is the inter-part jump; shift is is intra-part shift. */ + jump = count / integerPartWidth; + shift = count % integerPartWidth; + + /* Perform the shift. This leaves the most significant COUNT bits + of the result at zero. */ + for (i = 0; i < parts; i++) { + integerPart part; + + if (i + jump >= parts) { + part = 0; + } else { + part = dst[i + jump]; + if (shift) { + part >>= shift; + if (i + jump + 1 < parts) + part |= dst[i + jump + 1] << (integerPartWidth - shift); + } + } + + dst[i] = part; + } + } +} + +/* Bitwise and of two bignums. */ +void +APInt::tcAnd(integerPart *dst, const integerPart *rhs, unsigned int parts) +{ + unsigned int i; + + for (i = 0; i < parts; i++) + dst[i] &= rhs[i]; +} + +/* Bitwise inclusive or of two bignums. */ +void +APInt::tcOr(integerPart *dst, const integerPart *rhs, unsigned int parts) +{ + unsigned int i; + + for (i = 0; i < parts; i++) + dst[i] |= rhs[i]; +} + +/* Bitwise exclusive or of two bignums. */ +void +APInt::tcXor(integerPart *dst, const integerPart *rhs, unsigned int parts) +{ + unsigned int i; + + for (i = 0; i < parts; i++) + dst[i] ^= rhs[i]; +} + +/* Complement a bignum in-place. */ +void +APInt::tcComplement(integerPart *dst, unsigned int parts) +{ + unsigned int i; + + for (i = 0; i < parts; i++) + dst[i] = ~dst[i]; +} + +/* Comparison (unsigned) of two bignums. */ +int +APInt::tcCompare(const integerPart *lhs, const integerPart *rhs, + unsigned int parts) +{ + while (parts) { + parts--; + if (lhs[parts] == rhs[parts]) + continue; + + if (lhs[parts] > rhs[parts]) + return 1; + else + return -1; + } + + return 0; +} + +/* Increment a bignum in-place, return the carry flag. */ +integerPart +APInt::tcIncrement(integerPart *dst, unsigned int parts) +{ + unsigned int i; + + for (i = 0; i < parts; i++) + if (++dst[i] != 0) + break; + + return i == parts; +} + +/* Decrement a bignum in-place, return the borrow flag. */ +integerPart +APInt::tcDecrement(integerPart *dst, unsigned int parts) { + for (unsigned int i = 0; i < parts; i++) { + // If the current word is non-zero, then the decrement has no effect on the + // higher-order words of the integer and no borrow can occur. Exit early. + if (dst[i]--) + return 0; + } + // If every word was zero, then there is a borrow. + return 1; +} + + +/* Set the least significant BITS bits of a bignum, clear the + rest. */ +void +APInt::tcSetLeastSignificantBits(integerPart *dst, unsigned int parts, + unsigned int bits) +{ + unsigned int i; + + i = 0; + while (bits > integerPartWidth) { + dst[i++] = ~(integerPart) 0; + bits -= integerPartWidth; + } + + if (bits) + dst[i++] = ~(integerPart) 0 >> (integerPartWidth - bits); + + while (i < parts) + dst[i++] = 0; +} diff --git a/llvm/lib/Support/APSInt.cpp b/llvm/lib/Support/APSInt.cpp new file mode 100644 index 0000000..5deae59 --- /dev/null +++ b/llvm/lib/Support/APSInt.cpp @@ -0,0 +1,40 @@ +//===-- llvm/ADT/APSInt.cpp - Arbitrary Precision Signed Int ---*- C++ -*--===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the APSInt class, which is a simple class that +// represents an arbitrary sized integer that knows its signedness. +// +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/APSInt.h" +#include "llvm/ADT/FoldingSet.h" + +using namespace llvm_ks; + +APSInt::APSInt(StringRef Str) { + assert(!Str.empty() && "Invalid string length"); + + // (Over-)estimate the required number of bits. + unsigned NumBits = ((Str.size() * 64) / 19) + 2; + APInt Tmp(NumBits, Str, /*Radix=*/10); + if (Str[0] == '-') { + unsigned MinBits = Tmp.getMinSignedBits(); + if (MinBits > 0 && MinBits < NumBits) + Tmp = Tmp.trunc(MinBits); + *this = APSInt(Tmp, /*IsUnsigned=*/false); + return; + } + unsigned ActiveBits = Tmp.getActiveBits(); + if (ActiveBits > 0 && ActiveBits < NumBits) + Tmp = Tmp.trunc(ActiveBits); + *this = APSInt(Tmp, /*IsUnsigned=*/true); +} + +void APSInt::Profile(FoldingSetNodeID& ID) const { +} diff --git a/llvm/lib/Support/ARMBuildAttrs.cpp b/llvm/lib/Support/ARMBuildAttrs.cpp new file mode 100644 index 0000000..55432c9 --- /dev/null +++ b/llvm/lib/Support/ARMBuildAttrs.cpp @@ -0,0 +1,96 @@ +//===-- ARMBuildAttrs.cpp - ARM Build Attributes --------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/Support/ARMBuildAttributes.h" +#include "llvm/ADT/StringRef.h" + +using namespace llvm_ks; + +namespace { +const struct { + ARMBuildAttrs::AttrType Attr; + const char *TagName; +} ARMAttributeTags[] = { + { ARMBuildAttrs::File, "Tag_File" }, + { ARMBuildAttrs::Section, "Tag_Section" }, + { ARMBuildAttrs::Symbol, "Tag_Symbol" }, + { ARMBuildAttrs::CPU_raw_name, "Tag_CPU_raw_name" }, + { ARMBuildAttrs::CPU_name, "Tag_CPU_name" }, + { ARMBuildAttrs::CPU_arch, "Tag_CPU_arch" }, + { ARMBuildAttrs::CPU_arch_profile, "Tag_CPU_arch_profile" }, + { ARMBuildAttrs::ARM_ISA_use, "Tag_ARM_ISA_use" }, + { ARMBuildAttrs::THUMB_ISA_use, "Tag_THUMB_ISA_use" }, + { ARMBuildAttrs::FP_arch, "Tag_FP_arch" }, + { ARMBuildAttrs::WMMX_arch, "Tag_WMMX_arch" }, + { ARMBuildAttrs::Advanced_SIMD_arch, "Tag_Advanced_SIMD_arch" }, + { ARMBuildAttrs::PCS_config, "Tag_PCS_config" }, + { ARMBuildAttrs::ABI_PCS_R9_use, "Tag_ABI_PCS_R9_use" }, + { ARMBuildAttrs::ABI_PCS_RW_data, "Tag_ABI_PCS_RW_data" }, + { ARMBuildAttrs::ABI_PCS_RO_data, "Tag_ABI_PCS_RO_data" }, + { ARMBuildAttrs::ABI_PCS_GOT_use, "Tag_ABI_PCS_GOT_use" }, + { ARMBuildAttrs::ABI_PCS_wchar_t, "Tag_ABI_PCS_wchar_t" }, + { ARMBuildAttrs::ABI_FP_rounding, "Tag_ABI_FP_rounding" }, + { ARMBuildAttrs::ABI_FP_denormal, "Tag_ABI_FP_denormal" }, + { ARMBuildAttrs::ABI_FP_exceptions, "Tag_ABI_FP_exceptions" }, + { ARMBuildAttrs::ABI_FP_user_exceptions, "Tag_ABI_FP_user_exceptions" }, + { ARMBuildAttrs::ABI_FP_number_model, "Tag_ABI_FP_number_model" }, + { ARMBuildAttrs::ABI_align_needed, "Tag_ABI_align_needed" }, + { ARMBuildAttrs::ABI_align_preserved, "Tag_ABI_align_preserved" }, + { ARMBuildAttrs::ABI_enum_size, "Tag_ABI_enum_size" }, + { ARMBuildAttrs::ABI_HardFP_use, "Tag_ABI_HardFP_use" }, + { ARMBuildAttrs::ABI_VFP_args, "Tag_ABI_VFP_args" }, + { ARMBuildAttrs::ABI_WMMX_args, "Tag_ABI_WMMX_args" }, + { ARMBuildAttrs::ABI_optimization_goals, "Tag_ABI_optimization_goals" }, + { ARMBuildAttrs::ABI_FP_optimization_goals, "Tag_ABI_FP_optimization_goals" }, + { ARMBuildAttrs::compatibility, "Tag_compatibility" }, + { ARMBuildAttrs::CPU_unaligned_access, "Tag_CPU_unaligned_access" }, + { ARMBuildAttrs::FP_HP_extension, "Tag_FP_HP_extension" }, + { ARMBuildAttrs::ABI_FP_16bit_format, "Tag_ABI_FP_16bit_format" }, + { ARMBuildAttrs::MPextension_use, "Tag_MPextension_use" }, + { ARMBuildAttrs::DIV_use, "Tag_DIV_use" }, + { ARMBuildAttrs::DSP_extension, "Tag_DSP_extension" }, + { ARMBuildAttrs::nodefaults, "Tag_nodefaults" }, + { ARMBuildAttrs::also_compatible_with, "Tag_also_compatible_with" }, + { ARMBuildAttrs::T2EE_use, "Tag_T2EE_use" }, + { ARMBuildAttrs::conformance, "Tag_conformance" }, + { ARMBuildAttrs::Virtualization_use, "Tag_Virtualization_use" }, + + // Legacy Names + { ARMBuildAttrs::FP_arch, "Tag_VFP_arch" }, + { ARMBuildAttrs::FP_HP_extension, "Tag_VFP_HP_extension" }, + { ARMBuildAttrs::ABI_align_needed, "Tag_ABI_align8_needed" }, + { ARMBuildAttrs::ABI_align_preserved, "Tag_ABI_align8_preserved" }, +}; +} + +namespace llvm_ks { +namespace ARMBuildAttrs { +StringRef AttrTypeAsString(unsigned Attr, bool HasTagPrefix) { + return AttrTypeAsString(static_cast(Attr), HasTagPrefix); +} + +StringRef AttrTypeAsString(AttrType Attr, bool HasTagPrefix) { + for (unsigned TI = 0, TE = sizeof(ARMAttributeTags) / sizeof(*ARMAttributeTags); + TI != TE; ++TI) + if (ARMAttributeTags[TI].Attr == Attr) + return ARMAttributeTags[TI].TagName + (HasTagPrefix ? 0 : 4); + return ""; +} + +int AttrTypeFromString(StringRef Tag) { + bool HasTagPrefix = Tag.startswith("Tag_"); + for (unsigned TI = 0, TE = sizeof(ARMAttributeTags) / sizeof(*ARMAttributeTags); + TI != TE; ++TI) + if (StringRef(ARMAttributeTags[TI].TagName + (HasTagPrefix ? 0 : 4)) == Tag) + return ARMAttributeTags[TI].Attr; + return -1; +} +} +} + diff --git a/llvm/lib/Support/CMakeLists.txt b/llvm/lib/Support/CMakeLists.txt new file mode 100644 index 0000000..e69de29 diff --git a/llvm/lib/Support/COPYRIGHT.regex b/llvm/lib/Support/COPYRIGHT.regex new file mode 100644 index 0000000..a6392fd --- /dev/null +++ b/llvm/lib/Support/COPYRIGHT.regex @@ -0,0 +1,54 @@ +$OpenBSD: COPYRIGHT,v 1.3 2003/06/02 20:18:36 millert Exp $ + +Copyright 1992, 1993, 1994 Henry Spencer. All rights reserved. +This software is not subject to any license of the American Telephone +and Telegraph Company or of the Regents of the University of California. + +Permission is granted to anyone to use this software for any purpose on +any computer system, and to alter it and redistribute it, subject +to the following restrictions: + +1. The author is not responsible for the consequences of use of this + software, no matter how awful, even if they arise from flaws in it. + +2. The origin of this software must not be misrepresented, either by + explicit claim or by omission. Since few users ever read sources, + credits must appear in the documentation. + +3. Altered versions must be plainly marked as such, and must not be + misrepresented as being the original software. Since few users + ever read sources, credits must appear in the documentation. + +4. This notice may not be removed or altered. + +=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= +/*- + * Copyright (c) 1994 + * The Regents of the University of California. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)COPYRIGHT 8.1 (Berkeley) 3/16/94 + */ diff --git a/llvm/lib/Support/ErrorHandling.cpp b/llvm/lib/Support/ErrorHandling.cpp new file mode 100644 index 0000000..f4d8708 --- /dev/null +++ b/llvm/lib/Support/ErrorHandling.cpp @@ -0,0 +1,144 @@ +//===- lib/Support/ErrorHandling.cpp - Callbacks for errors ---------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines an API used to indicate fatal error conditions. Non-fatal +// errors (most of them) should be handled through LLVMContext. +// +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/Twine.h" +#include "llvm/Config/config.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/Errc.h" +#include "llvm/Support/WindowsError.h" +#include "llvm/Support/raw_ostream.h" +#include +#include + +#if defined(HAVE_UNISTD_H) +# include +#endif +#if defined(_MSC_VER) +# include +# include +#endif + +using namespace llvm_ks; + +void llvm_ks::report_fatal_error(const char *Reason, bool GenCrashDiag) { + report_fatal_error(Twine(Reason), GenCrashDiag); +} + +void llvm_ks::report_fatal_error(const std::string &Reason, bool GenCrashDiag) { + report_fatal_error(Twine(Reason), GenCrashDiag); +} + +void llvm_ks::report_fatal_error(StringRef Reason, bool GenCrashDiag) { + report_fatal_error(Twine(Reason), GenCrashDiag); +} + +void llvm_ks::report_fatal_error(const Twine &Reason, bool GenCrashDiag) { + // Blast the result out to stderr. We don't try hard to make sure this + // succeeds (e.g. handling EINTR) and we can't use errs() here because + // raw ostreams can call report_fatal_error. + SmallVector Buffer; + raw_svector_ostream OS(Buffer); + OS << "LLVM ERROR: " << Reason << "\n"; + StringRef MessageStr = OS.str(); + ssize_t written = ::write(2, MessageStr.data(), MessageStr.size()); + (void)written; // If something went wrong, we deliberately just give up. + + // If we reached here, we are failing ungracefully. Run the interrupt handlers + // to make sure any special cleanups get done, in particular that we remove + // files registered with RemoveFileOnSignal. + //sys::RunInterruptHandlers(); + + exit(1); +} + +void llvm_ks::llvm_unreachable_internal(const char *msg, const char *file, + unsigned line) { + // This code intentionally doesn't call the ErrorHandler callback, because + // llvm_unreachable is intended to be used to indicate "impossible" + // situations, and not legitimate runtime errors. + abort(); +#ifdef LLVM_BUILTIN_UNREACHABLE + // Windows systems and possibly others don't declare abort() to be noreturn, + // so use the unreachable builtin to avoid a Clang self-host warning. + LLVM_BUILTIN_UNREACHABLE; +#endif +} + +#ifdef LLVM_ON_WIN32 + +#include + +// I'd rather not double the line count of the following. +#define MAP_ERR_TO_COND(x, y) \ + case x: \ + return make_error_code(errc::y) + +std::error_code llvm_ks::mapWindowsError(unsigned EV) { + switch (EV) { + MAP_ERR_TO_COND(ERROR_ACCESS_DENIED, permission_denied); + MAP_ERR_TO_COND(ERROR_ALREADY_EXISTS, file_exists); + MAP_ERR_TO_COND(ERROR_BAD_UNIT, no_such_device); + MAP_ERR_TO_COND(ERROR_BUFFER_OVERFLOW, filename_too_long); + MAP_ERR_TO_COND(ERROR_BUSY, device_or_resource_busy); + MAP_ERR_TO_COND(ERROR_BUSY_DRIVE, device_or_resource_busy); + MAP_ERR_TO_COND(ERROR_CANNOT_MAKE, permission_denied); + MAP_ERR_TO_COND(ERROR_CANTOPEN, io_error); + MAP_ERR_TO_COND(ERROR_CANTREAD, io_error); + MAP_ERR_TO_COND(ERROR_CANTWRITE, io_error); + MAP_ERR_TO_COND(ERROR_CURRENT_DIRECTORY, permission_denied); + MAP_ERR_TO_COND(ERROR_DEV_NOT_EXIST, no_such_device); + MAP_ERR_TO_COND(ERROR_DEVICE_IN_USE, device_or_resource_busy); + MAP_ERR_TO_COND(ERROR_DIR_NOT_EMPTY, directory_not_empty); + MAP_ERR_TO_COND(ERROR_DIRECTORY, invalid_argument); + MAP_ERR_TO_COND(ERROR_DISK_FULL, no_space_on_device); + MAP_ERR_TO_COND(ERROR_FILE_EXISTS, file_exists); + MAP_ERR_TO_COND(ERROR_FILE_NOT_FOUND, no_such_file_or_directory); + MAP_ERR_TO_COND(ERROR_HANDLE_DISK_FULL, no_space_on_device); + MAP_ERR_TO_COND(ERROR_INVALID_ACCESS, permission_denied); + MAP_ERR_TO_COND(ERROR_INVALID_DRIVE, no_such_device); + MAP_ERR_TO_COND(ERROR_INVALID_FUNCTION, function_not_supported); + MAP_ERR_TO_COND(ERROR_INVALID_HANDLE, invalid_argument); + MAP_ERR_TO_COND(ERROR_INVALID_NAME, invalid_argument); + MAP_ERR_TO_COND(ERROR_LOCK_VIOLATION, no_lock_available); + MAP_ERR_TO_COND(ERROR_LOCKED, no_lock_available); + MAP_ERR_TO_COND(ERROR_NEGATIVE_SEEK, invalid_argument); + MAP_ERR_TO_COND(ERROR_NOACCESS, permission_denied); + MAP_ERR_TO_COND(ERROR_NOT_ENOUGH_MEMORY, not_enough_memory); + MAP_ERR_TO_COND(ERROR_NOT_READY, resource_unavailable_try_again); + MAP_ERR_TO_COND(ERROR_OPEN_FAILED, io_error); + MAP_ERR_TO_COND(ERROR_OPEN_FILES, device_or_resource_busy); + MAP_ERR_TO_COND(ERROR_OUTOFMEMORY, not_enough_memory); + MAP_ERR_TO_COND(ERROR_PATH_NOT_FOUND, no_such_file_or_directory); + MAP_ERR_TO_COND(ERROR_BAD_NETPATH, no_such_file_or_directory); + MAP_ERR_TO_COND(ERROR_READ_FAULT, io_error); + MAP_ERR_TO_COND(ERROR_RETRY, resource_unavailable_try_again); + MAP_ERR_TO_COND(ERROR_SEEK, io_error); + MAP_ERR_TO_COND(ERROR_SHARING_VIOLATION, permission_denied); + MAP_ERR_TO_COND(ERROR_TOO_MANY_OPEN_FILES, too_many_files_open); + MAP_ERR_TO_COND(ERROR_WRITE_FAULT, io_error); + MAP_ERR_TO_COND(ERROR_WRITE_PROTECT, permission_denied); + MAP_ERR_TO_COND(WSAEACCES, permission_denied); + MAP_ERR_TO_COND(WSAEBADF, bad_file_descriptor); + MAP_ERR_TO_COND(WSAEFAULT, bad_address); + MAP_ERR_TO_COND(WSAEINTR, interrupted); + MAP_ERR_TO_COND(WSAEINVAL, invalid_argument); + MAP_ERR_TO_COND(WSAEMFILE, too_many_files_open); + MAP_ERR_TO_COND(WSAENAMETOOLONG, filename_too_long); + default: + return std::error_code(EV, std::system_category()); + } +} + +#endif diff --git a/llvm/lib/Support/Hashing.cpp b/llvm/lib/Support/Hashing.cpp new file mode 100644 index 0000000..3f877f8 --- /dev/null +++ b/llvm/lib/Support/Hashing.cpp @@ -0,0 +1,29 @@ +//===-------------- lib/Support/Hashing.cpp -------------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file provides implementation bits for the LLVM common hashing +// infrastructure. Documentation and most of the other information is in the +// header file. +// +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/Hashing.h" + +using namespace llvm_ks; + +// Provide a definition and static initializer for the fixed seed. This +// initializer should always be zero to ensure its value can never appear to be +// non-zero, even during dynamic initialization. +size_t llvm_ks::hashing::detail::fixed_seed_override = 0; + +// Implement the function for forced setting of the fixed seed. +// FIXME: Use atomic operations here so that there is no data race. +void llvm_ks::set_fixed_execution_hash_seed(size_t fixed_value) { + hashing::detail::fixed_seed_override = fixed_value; +} diff --git a/llvm/lib/Support/IntEqClasses.cpp b/llvm/lib/Support/IntEqClasses.cpp new file mode 100644 index 0000000..3f7ef1b --- /dev/null +++ b/llvm/lib/Support/IntEqClasses.cpp @@ -0,0 +1,72 @@ +//===-- llvm/ADT/IntEqClasses.cpp - Equivalence Classes of Integers -------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// Equivalence classes for small integers. This is a mapping of the integers +// 0 .. N-1 into M equivalence classes numbered 0 .. M-1. +// +// Initially each integer has its own equivalence class. Classes are joined by +// passing a representative member of each class to join(). +// +// Once the classes are built, compress() will number them 0 .. M-1 and prevent +// further changes. +// +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/IntEqClasses.h" + +using namespace llvm_ks; + +void IntEqClasses::grow(unsigned N) { + assert(NumClasses == 0 && "grow() called after compress()."); + EC.reserve(N); + while (EC.size() < N) + EC.push_back(EC.size()); +} + +unsigned IntEqClasses::join(unsigned a, unsigned b) { + assert(NumClasses == 0 && "join() called after compress()."); + unsigned eca = EC[a]; + unsigned ecb = EC[b]; + // Update pointers while searching for the leaders, compressing the paths + // incrementally. The larger leader will eventually be updated, joining the + // classes. + while (eca != ecb) + if (eca < ecb) + EC[b] = eca, b = ecb, ecb = EC[b]; + else + EC[a] = ecb, a = eca, eca = EC[a]; + + return eca; +} + +unsigned IntEqClasses::findLeader(unsigned a) const { + assert(NumClasses == 0 && "findLeader() called after compress()."); + while (a != EC[a]) + a = EC[a]; + return a; +} + +void IntEqClasses::compress() { + if (NumClasses) + return; + for (unsigned i = 0, e = EC.size(); i != e; ++i) + EC[i] = (EC[i] == i) ? NumClasses++ : EC[EC[i]]; +} + +void IntEqClasses::uncompress() { + if (!NumClasses) + return; + SmallVector Leader; + for (unsigned i = 0, e = EC.size(); i != e; ++i) + if (EC[i] < Leader.size()) + EC[i] = Leader[EC[i]]; + else + Leader.push_back(EC[i] = i); + NumClasses = 0; +} diff --git a/llvm/lib/Support/LEB128.cpp b/llvm/lib/Support/LEB128.cpp new file mode 100644 index 0000000..86b8eea --- /dev/null +++ b/llvm/lib/Support/LEB128.cpp @@ -0,0 +1,44 @@ +//===- LEB128.cpp - LEB128 utility functions implementation -----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements some utility functions for encoding SLEB128 and +// ULEB128 values. +// +//===----------------------------------------------------------------------===// + +#include "llvm/Support/LEB128.h" + +namespace llvm_ks { + +/// Utility function to get the size of the ULEB128-encoded value. +unsigned getULEB128Size(uint64_t Value) { + unsigned Size = 0; + do { + Value >>= 7; + Size += sizeof(int8_t); + } while (Value); + return Size; +} + +/// Utility function to get the size of the SLEB128-encoded value. +unsigned getSLEB128Size(int64_t Value) { + unsigned Size = 0; + int Sign = Value >> (8 * sizeof(Value) - 1); + bool IsMore; + + do { + unsigned Byte = Value & 0x7f; + Value >>= 7; + IsMore = Value != Sign || ((Byte ^ Sign) & 0x40) != 0; + Size += sizeof(int8_t); + } while (IsMore); + return Size; +} + +} // namespace llvm_ks diff --git a/llvm/lib/Support/LLVMBuild.txt b/llvm/lib/Support/LLVMBuild.txt new file mode 100644 index 0000000..e69de29 diff --git a/llvm/lib/Support/Memory.cpp b/llvm/lib/Support/Memory.cpp new file mode 100644 index 0000000..6da48c0 --- /dev/null +++ b/llvm/lib/Support/Memory.cpp @@ -0,0 +1,24 @@ +//===- Memory.cpp - Memory Handling Support ---------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines some helpful functions for allocating memory and dealing +// with memory mapped files +// +//===----------------------------------------------------------------------===// + +#include "llvm/Support/Memory.h" +#include "llvm/Config/config.h" + +// Include the platform-specific parts of this class. +#ifdef LLVM_ON_UNIX +#include "Unix/Memory.inc" +#endif +#ifdef LLVM_ON_WIN32 +#include "Windows/Memory.inc" +#endif diff --git a/llvm/lib/Support/MemoryBuffer.cpp b/llvm/lib/Support/MemoryBuffer.cpp new file mode 100644 index 0000000..6f2f547 --- /dev/null +++ b/llvm/lib/Support/MemoryBuffer.cpp @@ -0,0 +1,434 @@ +//===--- MemoryBuffer.cpp - Memory Buffer implementation ------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the MemoryBuffer interface. +// +//===----------------------------------------------------------------------===// + +#include "llvm/Support/MemoryBuffer.h" +#include "llvm/ADT/SmallString.h" +#include "llvm/Config/config.h" +#include "llvm/Support/Errc.h" +#include "llvm/Support/Errno.h" +#include "llvm/Support/FileSystem.h" +#include "llvm/Support/MathExtras.h" +#include "llvm/Support/Path.h" +#include +#include +#include +#include +#include +#include +#if !defined(_MSC_VER) && !defined(__MINGW32__) +#include +#else +#include +#endif +using namespace llvm_ks; + +//===----------------------------------------------------------------------===// +// MemoryBuffer implementation itself. +//===----------------------------------------------------------------------===// + +MemoryBuffer::~MemoryBuffer() { } + +/// init - Initialize this MemoryBuffer as a reference to externally allocated +/// memory, memory that we know is already null terminated. +void MemoryBuffer::init(const char *BufStart, const char *BufEnd, + bool RequiresNullTerminator) { + assert((!RequiresNullTerminator || BufEnd[0] == 0) && + "Buffer is not null terminated!"); + BufferStart = BufStart; + BufferEnd = BufEnd; +} + +//===----------------------------------------------------------------------===// +// MemoryBufferMem implementation. +//===----------------------------------------------------------------------===// + +/// CopyStringRef - Copies contents of a StringRef into a block of memory and +/// null-terminates it. +static void CopyStringRef(char *Memory, StringRef Data) { + if (!Data.empty()) + memcpy(Memory, Data.data(), Data.size()); + Memory[Data.size()] = 0; // Null terminate string. +} + +namespace { +struct NamedBufferAlloc { + const Twine &Name; + NamedBufferAlloc(const Twine &Name) : Name(Name) {} +}; +} + +void *operator new(size_t N, const NamedBufferAlloc &Alloc) { + SmallString<256> NameBuf; + StringRef NameRef = Alloc.Name.toStringRef(NameBuf); + + char *Mem = static_cast(operator new(N + NameRef.size() + 1)); + CopyStringRef(Mem + N, NameRef); + return Mem; +} + +namespace { +/// MemoryBufferMem - Named MemoryBuffer pointing to a block of memory. +class MemoryBufferMem : public MemoryBuffer { +public: + MemoryBufferMem(StringRef InputData, bool RequiresNullTerminator) { + init(InputData.begin(), InputData.end(), RequiresNullTerminator); + } + + const char *getBufferIdentifier() const override { + // The name is stored after the class itself. + return reinterpret_cast(this + 1); + } + + BufferKind getBufferKind() const override { + return MemoryBuffer_Malloc; + } +}; +} + +static ErrorOr> +getFileAux(const Twine &Filename, int64_t FileSize, uint64_t MapSize, + uint64_t Offset, bool RequiresNullTerminator, bool IsVolatileSize); + +std::unique_ptr +MemoryBuffer::getMemBuffer(StringRef InputData, StringRef BufferName, + bool RequiresNullTerminator) { + auto *Ret = new (NamedBufferAlloc(BufferName)) + MemoryBufferMem(InputData, RequiresNullTerminator); + return std::unique_ptr(Ret); +} + +std::unique_ptr +MemoryBuffer::getMemBuffer(MemoryBufferRef Ref, bool RequiresNullTerminator) { + return std::unique_ptr(getMemBuffer( + Ref.getBuffer(), Ref.getBufferIdentifier(), RequiresNullTerminator)); +} + +std::unique_ptr +MemoryBuffer::getMemBufferCopy(StringRef InputData, const Twine &BufferName) { + std::unique_ptr Buf = + getNewUninitMemBuffer(InputData.size(), BufferName); + if (!Buf) + return nullptr; + memcpy(const_cast(Buf->getBufferStart()), InputData.data(), + InputData.size()); + return Buf; +} + +std::unique_ptr +MemoryBuffer::getNewUninitMemBuffer(size_t Size, const Twine &BufferName) { + // Allocate space for the MemoryBuffer, the data and the name. It is important + // that MemoryBuffer and data are aligned so PointerIntPair works with them. + // TODO: Is 16-byte alignment enough? We copy small object files with large + // alignment expectations into this buffer. + SmallString<256> NameBuf; + StringRef NameRef = BufferName.toStringRef(NameBuf); + size_t AlignedStringLen = + alignTo(sizeof(MemoryBufferMem) + NameRef.size() + 1, 16); + size_t RealLen = AlignedStringLen + Size + 1; + char *Mem = static_cast(operator new(RealLen, std::nothrow)); + if (!Mem) + return nullptr; + + // The name is stored after the class itself. + CopyStringRef(Mem + sizeof(MemoryBufferMem), NameRef); + + // The buffer begins after the name and must be aligned. + char *Buf = Mem + AlignedStringLen; + Buf[Size] = 0; // Null terminate buffer. + + auto *Ret = new (Mem) MemoryBufferMem(StringRef(Buf, Size), true); + return std::unique_ptr(Ret); +} + +std::unique_ptr +MemoryBuffer::getNewMemBuffer(size_t Size, StringRef BufferName) { + std::unique_ptr SB = getNewUninitMemBuffer(Size, BufferName); + if (!SB) + return nullptr; + memset(const_cast(SB->getBufferStart()), 0, Size); + return SB; +} + +ErrorOr> +MemoryBuffer::getFileOrSTDIN(const Twine &Filename, int64_t FileSize, + bool RequiresNullTerminator) { + SmallString<256> NameBuf; + StringRef NameRef = Filename.toStringRef(NameBuf); + + if (NameRef == "-") + return getSTDIN(); + return getFile(Filename, FileSize, RequiresNullTerminator); +} + +ErrorOr> +MemoryBuffer::getFileSlice(const Twine &FilePath, uint64_t MapSize, + uint64_t Offset) { + return getFileAux(FilePath, -1, MapSize, Offset, false, false); +} + + +//===----------------------------------------------------------------------===// +// MemoryBuffer::getFile implementation. +//===----------------------------------------------------------------------===// + +namespace { +/// \brief Memory maps a file descriptor using sys::fs::mapped_file_region. +/// +/// This handles converting the offset into a legal offset on the platform. +class MemoryBufferMMapFile : public MemoryBuffer { + sys::fs::mapped_file_region MFR; + + static uint64_t getLegalMapOffset(uint64_t Offset) { + return Offset & ~(sys::fs::mapped_file_region::alignment() - 1); + } + + static uint64_t getLegalMapSize(uint64_t Len, uint64_t Offset) { + return Len + (Offset - getLegalMapOffset(Offset)); + } + + const char *getStart(uint64_t Len, uint64_t Offset) { + return MFR.const_data() + (Offset - getLegalMapOffset(Offset)); + } + +public: + MemoryBufferMMapFile(bool RequiresNullTerminator, int FD, uint64_t Len, + uint64_t Offset, std::error_code &EC) + : MFR(FD, sys::fs::mapped_file_region::readonly, + getLegalMapSize(Len, Offset), getLegalMapOffset(Offset), EC) { + if (!EC) { + const char *Start = getStart(Len, Offset); + init(Start, Start + Len, RequiresNullTerminator); + } + } + + const char *getBufferIdentifier() const override { + // The name is stored after the class itself. + return reinterpret_cast(this + 1); + } + + BufferKind getBufferKind() const override { + return MemoryBuffer_MMap; + } +}; +} + +static ErrorOr> +getMemoryBufferForStream(int FD, const Twine &BufferName) { + const ssize_t ChunkSize = 4096*4; + SmallString Buffer; + ssize_t ReadBytes; + // Read into Buffer until we hit EOF. + do { + Buffer.reserve(Buffer.size() + ChunkSize); + ReadBytes = read(FD, Buffer.end(), ChunkSize); + if (ReadBytes == -1) { + if (errno == EINTR) continue; + return std::error_code(errno, std::generic_category()); + } + Buffer.set_size(Buffer.size() + ReadBytes); + } while (ReadBytes != 0); + + return MemoryBuffer::getMemBufferCopy(Buffer, BufferName); +} + + +ErrorOr> +MemoryBuffer::getFile(const Twine &Filename, int64_t FileSize, + bool RequiresNullTerminator, bool IsVolatileSize) { + return getFileAux(Filename, FileSize, FileSize, 0, + RequiresNullTerminator, IsVolatileSize); +} + +static ErrorOr> +getOpenFileImpl(int FD, const Twine &Filename, uint64_t FileSize, + uint64_t MapSize, int64_t Offset, bool RequiresNullTerminator, + bool IsVolatileSize); + +static ErrorOr> +getFileAux(const Twine &Filename, int64_t FileSize, uint64_t MapSize, + uint64_t Offset, bool RequiresNullTerminator, bool IsVolatileSize) { + int FD; + std::error_code EC = sys::fs::openFileForRead(Filename, FD); + if (EC) + return EC; + + ErrorOr> Ret = + getOpenFileImpl(FD, Filename, FileSize, MapSize, Offset, + RequiresNullTerminator, IsVolatileSize); + close(FD); + return Ret; +} + +static bool shouldUseMmap(int FD, + size_t FileSize, + size_t MapSize, + off_t Offset, + bool RequiresNullTerminator, + int PageSize, + bool IsVolatileSize) { + // mmap may leave the buffer without null terminator if the file size changed + // by the time the last page is mapped in, so avoid it if the file size is + // likely to change. + if (IsVolatileSize) + return false; + + // We don't use mmap for small files because this can severely fragment our + // address space. + if (MapSize < 4 * 4096 || MapSize < (unsigned)PageSize) + return false; + + if (!RequiresNullTerminator) + return true; + + + // If we don't know the file size, use fstat to find out. fstat on an open + // file descriptor is cheaper than stat on a random path. + // FIXME: this chunk of code is duplicated, but it avoids a fstat when + // RequiresNullTerminator = false and MapSize != -1. + if (FileSize == size_t(-1)) { + sys::fs::file_status Status; + if (sys::fs::status(FD, Status)) + return false; + FileSize = Status.getSize(); + } + + // If we need a null terminator and the end of the map is inside the file, + // we cannot use mmap. + size_t End = Offset + MapSize; + assert(End <= FileSize); + if (End != FileSize) + return false; + + // Don't try to map files that are exactly a multiple of the system page size + // if we need a null terminator. + if ((FileSize & (PageSize -1)) == 0) + return false; + +#if defined(__CYGWIN__) + // Don't try to map files that are exactly a multiple of the physical page size + // if we need a null terminator. + // FIXME: We should reorganize again getPageSize() on Win32. + if ((FileSize & (4096 - 1)) == 0) + return false; +#endif + + return true; +} + +static ErrorOr> +getOpenFileImpl(int FD, const Twine &Filename, uint64_t FileSize, + uint64_t MapSize, int64_t Offset, bool RequiresNullTerminator, + bool IsVolatileSize) { + static int PageSize = 4096; + + // Default is to map the full file. + if (MapSize == uint64_t(-1)) { + // If we don't know the file size, use fstat to find out. fstat on an open + // file descriptor is cheaper than stat on a random path. + if (FileSize == uint64_t(-1)) { + sys::fs::file_status Status; + std::error_code EC = sys::fs::status(FD, Status); + if (EC) + return EC; + + // If this not a file or a block device (e.g. it's a named pipe + // or character device), we can't trust the size. Create the memory + // buffer by copying off the stream. + sys::fs::file_type Type = Status.type(); + if (Type != sys::fs::file_type::regular_file && + Type != sys::fs::file_type::block_file) + return getMemoryBufferForStream(FD, Filename); + + FileSize = Status.getSize(); + } + MapSize = FileSize; + } + + if (shouldUseMmap(FD, FileSize, MapSize, Offset, RequiresNullTerminator, + PageSize, IsVolatileSize)) { + std::error_code EC; + std::unique_ptr Result( + new (NamedBufferAlloc(Filename)) + MemoryBufferMMapFile(RequiresNullTerminator, FD, MapSize, Offset, EC)); + if (!EC) + return std::move(Result); + } + + std::unique_ptr Buf = + MemoryBuffer::getNewUninitMemBuffer(MapSize, Filename); + if (!Buf) { + // Failed to create a buffer. The only way it can fail is if + // new(std::nothrow) returns 0. + return make_error_code(errc::not_enough_memory); + } + + char *BufPtr = const_cast(Buf->getBufferStart()); + + size_t BytesLeft = MapSize; +#ifndef HAVE_PREAD + if (lseek(FD, Offset, SEEK_SET) == -1) + return std::error_code(errno, std::generic_category()); +#endif + + while (BytesLeft) { +#ifdef HAVE_PREAD + ssize_t NumRead = ::pread(FD, BufPtr, BytesLeft, MapSize-BytesLeft+Offset); +#else + ssize_t NumRead = ::read(FD, BufPtr, BytesLeft); +#endif + if (NumRead == -1) { + if (errno == EINTR) + continue; + // Error while reading. + return std::error_code(errno, std::generic_category()); + } + if (NumRead == 0) { + memset(BufPtr, 0, BytesLeft); // zero-initialize rest of the buffer. + break; + } + BytesLeft -= NumRead; + BufPtr += NumRead; + } + + return std::move(Buf); +} + +ErrorOr> +MemoryBuffer::getOpenFile(int FD, const Twine &Filename, uint64_t FileSize, + bool RequiresNullTerminator, bool IsVolatileSize) { + return getOpenFileImpl(FD, Filename, FileSize, FileSize, 0, + RequiresNullTerminator, IsVolatileSize); +} + +ErrorOr> +MemoryBuffer::getOpenFileSlice(int FD, const Twine &Filename, uint64_t MapSize, + int64_t Offset) { + assert(MapSize != uint64_t(-1)); + return getOpenFileImpl(FD, Filename, -1, MapSize, Offset, false, + /*IsVolatileSize*/ false); +} + +ErrorOr> MemoryBuffer::getSTDIN() { + // Read in all of the data from stdin, we cannot mmap stdin. + // + // FIXME: That isn't necessarily true, we should try to mmap stdin and + // fallback if it fails. + + return getMemoryBufferForStream(0, ""); +} + +MemoryBufferRef MemoryBuffer::getMemBufferRef() const { + StringRef Data = getBuffer(); + StringRef Identifier = getBufferIdentifier(); + return MemoryBufferRef(Data, Identifier); +} diff --git a/llvm/lib/Support/Path.cpp b/llvm/lib/Support/Path.cpp new file mode 100644 index 0000000..d608f1a --- /dev/null +++ b/llvm/lib/Support/Path.cpp @@ -0,0 +1,1160 @@ +//===-- Path.cpp - Implement OS Path Concept ------------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the operating system Path API. +// +//===----------------------------------------------------------------------===// + +#include "llvm/Support/COFF.h" +#include "llvm/Support/MachO.h" +#include "llvm/Support/Endian.h" +#include "llvm/Support/Errc.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/FileSystem.h" +#include "llvm/Support/Path.h" +#include +#include + +#if !defined(_MSC_VER) && !defined(__MINGW32__) +#include +#else +#include +#endif + +using namespace llvm_ks; +using namespace llvm_ks::support::endian; + +namespace { + using llvm_ks::StringRef; + using llvm_ks::sys::path::is_separator; + +#ifdef LLVM_ON_WIN32 + const char *separators = "\\/"; + const char preferred_separator = '\\'; +#else + const char separators = '/'; + const char preferred_separator = '/'; +#endif + + StringRef find_first_component(StringRef path) { + // Look for this first component in the following order. + // * empty (in this case we return an empty string) + // * either C: or {//,\\}net. + // * {/,\} + // * {file,directory}name + + if (path.empty()) + return path; + +#ifdef LLVM_ON_WIN32 + // C: + if (path.size() >= 2 && std::isalpha(static_cast(path[0])) && + path[1] == ':') + return path.substr(0, 2); +#endif + + // //net + if ((path.size() > 2) && + is_separator(path[0]) && + path[0] == path[1] && + !is_separator(path[2])) { + // Find the next directory separator. + size_t end = path.find_first_of(separators, 2); + return path.substr(0, end); + } + + // {/,\} + if (is_separator(path[0])) + return path.substr(0, 1); + + // * {file,directory}name + size_t end = path.find_first_of(separators); + return path.substr(0, end); + } + + size_t filename_pos(StringRef str) { + if (str.size() == 2 && + is_separator(str[0]) && + str[0] == str[1]) + return 0; + + if (str.size() > 0 && is_separator(str[str.size() - 1])) + return str.size() - 1; + + size_t pos = str.find_last_of(separators, str.size() - 1); + +#ifdef LLVM_ON_WIN32 + if (pos == StringRef::npos) + pos = str.find_last_of(':', str.size() - 2); +#endif + + if (pos == StringRef::npos || + (pos == 1 && is_separator(str[0]))) + return 0; + + return pos + 1; + } + + size_t root_dir_start(StringRef str) { + // case "c:/" +#ifdef LLVM_ON_WIN32 + if (str.size() > 2 && + str[1] == ':' && + is_separator(str[2])) + return 2; +#endif + + // case "//" + if (str.size() == 2 && + is_separator(str[0]) && + str[0] == str[1]) + return StringRef::npos; + + // case "//net" + if (str.size() > 3 && + is_separator(str[0]) && + str[0] == str[1] && + !is_separator(str[2])) { + return str.find_first_of(separators, 2); + } + + // case "/" + if (str.size() > 0 && is_separator(str[0])) + return 0; + + return StringRef::npos; + } + + size_t parent_path_end(StringRef path) { + size_t end_pos = filename_pos(path); + + bool filename_was_sep = path.size() > 0 && is_separator(path[end_pos]); + + // Skip separators except for root dir. + size_t root_dir_pos = root_dir_start(path.substr(0, end_pos)); + + while(end_pos > 0 && + (end_pos - 1) != root_dir_pos && + is_separator(path[end_pos - 1])) + --end_pos; + + if (end_pos == 1 && root_dir_pos == 0 && filename_was_sep) + return StringRef::npos; + + return end_pos; + } +} // end unnamed namespace + +enum FSEntity { + FS_Dir, + FS_File, + FS_Name +}; + +static std::error_code createUniqueEntity(const Twine &Model, int &ResultFD, + SmallVectorImpl &ResultPath, + bool MakeAbsolute, unsigned Mode, + FSEntity Type) { + SmallString<128> ModelStorage; + Model.toVector(ModelStorage); + + if (MakeAbsolute) { + // Make model absolute by prepending a temp directory if it's not already. + if (!sys::path::is_absolute(Twine(ModelStorage))) { + SmallString<128> TDir; + sys::path::system_temp_directory(true, TDir); + sys::path::append(TDir, Twine(ModelStorage)); + ModelStorage.swap(TDir); + } + } + + // From here on, DO NOT modify model. It may be needed if the randomly chosen + // path already exists. + ResultPath = ModelStorage; + // Null terminate. + ResultPath.push_back(0); + ResultPath.pop_back(); + +retry_random_path: + // Replace '%' with random chars. + for (unsigned i = 0, e = ModelStorage.size(); i != e; ++i) { + if (ModelStorage[i] == '%') + ResultPath[i] = "0123456789abcdef"[8888 & 15]; + } + + // Try to open + create the file. + switch (Type) { + case FS_File: { + if (std::error_code EC = + sys::fs::openFileForWrite(Twine(ResultPath.begin()), ResultFD, + sys::fs::F_RW | sys::fs::F_Excl, Mode)) { + if (EC == errc::file_exists) + goto retry_random_path; + return EC; + } + + return std::error_code(); + } + + case FS_Name: { + std::error_code EC = + sys::fs::access(ResultPath.begin(), sys::fs::AccessMode::Exist); + if (EC == errc::no_such_file_or_directory) + return std::error_code(); + if (EC) + return EC; + goto retry_random_path; + } + + case FS_Dir: { + if (std::error_code EC = + sys::fs::create_directory(ResultPath.begin(), false)) { + if (EC == errc::file_exists) + goto retry_random_path; + return EC; + } + return std::error_code(); + } + } + llvm_unreachable("Invalid Type"); +} + +namespace llvm_ks { +namespace sys { +namespace path { + +const_iterator begin(StringRef path) { + const_iterator i; + i.Path = path; + i.Component = find_first_component(path); + i.Position = 0; + return i; +} + +const_iterator end(StringRef path) { + const_iterator i; + i.Path = path; + i.Position = path.size(); + return i; +} + +const_iterator &const_iterator::operator++() { + assert(Position < Path.size() && "Tried to increment past end!"); + + // Increment Position to past the current component + Position += Component.size(); + + // Check for end. + if (Position == Path.size()) { + Component = StringRef(); + return *this; + } + + // Both POSIX and Windows treat paths that begin with exactly two separators + // specially. + bool was_net = Component.size() > 2 && + is_separator(Component[0]) && + Component[1] == Component[0] && + !is_separator(Component[2]); + + // Handle separators. + if (is_separator(Path[Position])) { + // Root dir. + if (was_net +#ifdef LLVM_ON_WIN32 + // c:/ + || Component.endswith(":") +#endif + ) { + Component = Path.substr(Position, 1); + return *this; + } + + // Skip extra separators. + while (Position != Path.size() && + is_separator(Path[Position])) { + ++Position; + } + + // Treat trailing '/' as a '.'. + if (Position == Path.size()) { + --Position; + Component = "."; + return *this; + } + } + + // Find next component. + size_t end_pos = Path.find_first_of(separators, Position); + Component = Path.slice(Position, end_pos); + + return *this; +} + +bool const_iterator::operator==(const const_iterator &RHS) const { + return Path.begin() == RHS.Path.begin() && Position == RHS.Position; +} + +ptrdiff_t const_iterator::operator-(const const_iterator &RHS) const { + return Position - RHS.Position; +} + +reverse_iterator rbegin(StringRef Path) { + reverse_iterator I; + I.Path = Path; + I.Position = Path.size(); + return ++I; +} + +reverse_iterator rend(StringRef Path) { + reverse_iterator I; + I.Path = Path; + I.Component = Path.substr(0, 0); + I.Position = 0; + return I; +} + +reverse_iterator &reverse_iterator::operator++() { + // If we're at the end and the previous char was a '/', return '.' unless + // we are the root path. + size_t root_dir_pos = root_dir_start(Path); + if (Position == Path.size() && + Path.size() > root_dir_pos + 1 && + is_separator(Path[Position - 1])) { + --Position; + Component = "."; + return *this; + } + + // Skip separators unless it's the root directory. + size_t end_pos = Position; + + while(end_pos > 0 && + (end_pos - 1) != root_dir_pos && + is_separator(Path[end_pos - 1])) + --end_pos; + + // Find next separator. + size_t start_pos = filename_pos(Path.substr(0, end_pos)); + Component = Path.slice(start_pos, end_pos); + Position = start_pos; + return *this; +} + +bool reverse_iterator::operator==(const reverse_iterator &RHS) const { + return Path.begin() == RHS.Path.begin() && Component == RHS.Component && + Position == RHS.Position; +} + +StringRef root_path(StringRef path) { + const_iterator b = begin(path), + pos = b, + e = end(path); + if (b != e) { + bool has_net = b->size() > 2 && is_separator((*b)[0]) && (*b)[1] == (*b)[0]; + bool has_drive = +#ifdef LLVM_ON_WIN32 + b->endswith(":"); +#else + false; +#endif + + if (has_net || has_drive) { + if ((++pos != e) && is_separator((*pos)[0])) { + // {C:/,//net/}, so get the first two components. + return path.substr(0, b->size() + pos->size()); + } else { + // just {C:,//net}, return the first component. + return *b; + } + } + + // POSIX style root directory. + if (is_separator((*b)[0])) { + return *b; + } + } + + return StringRef(); +} + +StringRef root_name(StringRef path) { + const_iterator b = begin(path), + e = end(path); + if (b != e) { + bool has_net = b->size() > 2 && is_separator((*b)[0]) && (*b)[1] == (*b)[0]; + bool has_drive = +#ifdef LLVM_ON_WIN32 + b->endswith(":"); +#else + false; +#endif + + if (has_net || has_drive) { + // just {C:,//net}, return the first component. + return *b; + } + } + + // No path or no name. + return StringRef(); +} + +StringRef root_directory(StringRef path) { + const_iterator b = begin(path), + pos = b, + e = end(path); + if (b != e) { + bool has_net = b->size() > 2 && is_separator((*b)[0]) && (*b)[1] == (*b)[0]; + bool has_drive = +#ifdef LLVM_ON_WIN32 + b->endswith(":"); +#else + false; +#endif + + if ((has_net || has_drive) && + // {C:,//net}, skip to the next component. + (++pos != e) && is_separator((*pos)[0])) { + return *pos; + } + + // POSIX style root directory. + if (!has_net && is_separator((*b)[0])) { + return *b; + } + } + + // No path or no root. + return StringRef(); +} + +StringRef relative_path(StringRef path) { + StringRef root = root_path(path); + return path.substr(root.size()); +} + +void append(SmallVectorImpl &path, const Twine &a, + const Twine &b, + const Twine &c, + const Twine &d) { + SmallString<32> a_storage; + SmallString<32> b_storage; + SmallString<32> c_storage; + SmallString<32> d_storage; + + SmallVector components; + if (!a.isTriviallyEmpty()) components.push_back(a.toStringRef(a_storage)); + if (!b.isTriviallyEmpty()) components.push_back(b.toStringRef(b_storage)); + if (!c.isTriviallyEmpty()) components.push_back(c.toStringRef(c_storage)); + if (!d.isTriviallyEmpty()) components.push_back(d.toStringRef(d_storage)); + + for (auto &component : components) { + bool path_has_sep = !path.empty() && is_separator(path[path.size() - 1]); + bool component_has_sep = !component.empty() && is_separator(component[0]); + bool is_root_name = has_root_name(component); + + if (path_has_sep) { + // Strip separators from beginning of component. + size_t loc = component.find_first_not_of(separators); + StringRef c = component.substr(loc); + + // Append it. + path.append(c.begin(), c.end()); + continue; + } + + if (!component_has_sep && !(path.empty() || is_root_name)) { + // Add a separator. + path.push_back(preferred_separator); + } + + path.append(component.begin(), component.end()); + } +} + +void append(SmallVectorImpl &path, + const_iterator begin, const_iterator end) { + for (; begin != end; ++begin) + path::append(path, *begin); +} + +StringRef parent_path(StringRef path) { + size_t end_pos = parent_path_end(path); + if (end_pos == StringRef::npos) + return StringRef(); + else + return path.substr(0, end_pos); +} + +void remove_filename(SmallVectorImpl &path) { + size_t end_pos = parent_path_end(StringRef(path.begin(), path.size())); + if (end_pos != StringRef::npos) + path.set_size(end_pos); +} + +void replace_extension(SmallVectorImpl &path, const Twine &extension) { + StringRef p(path.begin(), path.size()); + SmallString<32> ext_storage; + StringRef ext = extension.toStringRef(ext_storage); + + // Erase existing extension. + size_t pos = p.find_last_of('.'); + if (pos != StringRef::npos && pos >= filename_pos(p)) + path.set_size(pos); + + // Append '.' if needed. + if (ext.size() > 0 && ext[0] != '.') + path.push_back('.'); + + // Append extension. + path.append(ext.begin(), ext.end()); +} + +void native(const Twine &path, SmallVectorImpl &result) { + assert((!path.isSingleStringRef() || + path.getSingleStringRef().data() != result.data()) && + "path and result are not allowed to overlap!"); + // Clear result. + result.clear(); + path.toVector(result); + native(result); +} + +void native(SmallVectorImpl &Path) { +#ifdef LLVM_ON_WIN32 + std::replace(Path.begin(), Path.end(), '/', '\\'); +#else + for (auto PI = Path.begin(), PE = Path.end(); PI < PE; ++PI) { + if (*PI == '\\') { + auto PN = PI + 1; + if (PN < PE && *PN == '\\') + ++PI; // increment once, the for loop will move over the escaped slash + else + *PI = '/'; + } + } +#endif +} + +StringRef filename(StringRef path) { + return *rbegin(path); +} + +StringRef stem(StringRef path) { + StringRef fname = filename(path); + size_t pos = fname.find_last_of('.'); + if (pos == StringRef::npos) + return fname; + else + if ((fname.size() == 1 && fname == ".") || + (fname.size() == 2 && fname == "..")) + return fname; + else + return fname.substr(0, pos); +} + +StringRef extension(StringRef path) { + StringRef fname = filename(path); + size_t pos = fname.find_last_of('.'); + if (pos == StringRef::npos) + return StringRef(); + else + if ((fname.size() == 1 && fname == ".") || + (fname.size() == 2 && fname == "..")) + return StringRef(); + else + return fname.substr(pos); +} + +bool is_separator(char value) { + switch(value) { +#ifdef LLVM_ON_WIN32 + case '\\': // fall through +#endif + case '/': return true; + default: return false; + } +} + +static const char preferred_separator_string[] = { preferred_separator, '\0' }; + +StringRef get_separator() { + return preferred_separator_string; +} + +bool has_root_name(const Twine &path) { + SmallString<128> path_storage; + StringRef p = path.toStringRef(path_storage); + + return !root_name(p).empty(); +} + +bool has_root_directory(const Twine &path) { + SmallString<128> path_storage; + StringRef p = path.toStringRef(path_storage); + + return !root_directory(p).empty(); +} + +bool has_root_path(const Twine &path) { + SmallString<128> path_storage; + StringRef p = path.toStringRef(path_storage); + + return !root_path(p).empty(); +} + +bool has_relative_path(const Twine &path) { + SmallString<128> path_storage; + StringRef p = path.toStringRef(path_storage); + + return !relative_path(p).empty(); +} + +bool has_filename(const Twine &path) { + SmallString<128> path_storage; + StringRef p = path.toStringRef(path_storage); + + return !filename(p).empty(); +} + +bool has_parent_path(const Twine &path) { + SmallString<128> path_storage; + StringRef p = path.toStringRef(path_storage); + + return !parent_path(p).empty(); +} + +bool has_stem(const Twine &path) { + SmallString<128> path_storage; + StringRef p = path.toStringRef(path_storage); + + return !stem(p).empty(); +} + +bool has_extension(const Twine &path) { + SmallString<128> path_storage; + StringRef p = path.toStringRef(path_storage); + + return !extension(p).empty(); +} + +bool is_absolute(const Twine &path) { + SmallString<128> path_storage; + StringRef p = path.toStringRef(path_storage); + + bool rootDir = has_root_directory(p), +#ifdef LLVM_ON_WIN32 + rootName = has_root_name(p); +#else + rootName = true; +#endif + + return rootDir && rootName; +} + +bool is_relative(const Twine &path) { return !is_absolute(path); } + +StringRef remove_leading_dotslash(StringRef Path) { + // Remove leading "./" (or ".//" or "././" etc.) + while (Path.size() > 2 && Path[0] == '.' && is_separator(Path[1])) { + Path = Path.substr(2); + while (Path.size() > 0 && is_separator(Path[0])) + Path = Path.substr(1); + } + return Path; +} + +static SmallString<256> remove_dots(StringRef path, bool remove_dot_dot) { + SmallVector components; + + // Skip the root path, then look for traversal in the components. + StringRef rel = path::relative_path(path); + for (StringRef C : llvm_ks::make_range(path::begin(rel), path::end(rel))) { + if (C == ".") + continue; + if (remove_dot_dot) { + if (C == "..") { + if (!components.empty()) + components.pop_back(); + continue; + } + } + components.push_back(C); + } + + SmallString<256> buffer = path::root_path(path); + for (StringRef C : components) + path::append(buffer, C); + return buffer; +} + +bool remove_dots(SmallVectorImpl &path, bool remove_dot_dot) { + StringRef p(path.data(), path.size()); + + SmallString<256> result = remove_dots(p, remove_dot_dot); + if (result == path) + return false; + + path.swap(result); + return true; +} + +} // end namespace path + +namespace fs { + +std::error_code getUniqueID(const Twine Path, UniqueID &Result) { + file_status Status; + std::error_code EC = status(Path, Status); + if (EC) + return EC; + Result = Status.getUniqueID(); + return std::error_code(); +} + +std::error_code createUniqueFile(const Twine &Model, int &ResultFd, + SmallVectorImpl &ResultPath, + unsigned Mode) { + return createUniqueEntity(Model, ResultFd, ResultPath, false, Mode, FS_File); +} + +std::error_code createUniqueFile(const Twine &Model, + SmallVectorImpl &ResultPath) { + int Dummy; + return createUniqueEntity(Model, Dummy, ResultPath, false, 0, FS_Name); +} + +static std::error_code +createTemporaryFile(const Twine &Model, int &ResultFD, + llvm_ks::SmallVectorImpl &ResultPath, FSEntity Type) { + SmallString<128> Storage; + StringRef P = Model.toNullTerminatedStringRef(Storage); + assert(P.find_first_of(separators) == StringRef::npos && + "Model must be a simple filename."); + // Use P.begin() so that createUniqueEntity doesn't need to recreate Storage. + return createUniqueEntity(P.begin(), ResultFD, ResultPath, + true, owner_read | owner_write, Type); +} + +static std::error_code +createTemporaryFile(const Twine &Prefix, StringRef Suffix, int &ResultFD, + llvm_ks::SmallVectorImpl &ResultPath, FSEntity Type) { + const char *Middle = Suffix.empty() ? "-%%%%%%" : "-%%%%%%."; + return createTemporaryFile(Prefix + Middle + Suffix, ResultFD, ResultPath, + Type); +} + +std::error_code createTemporaryFile(const Twine &Prefix, StringRef Suffix, + int &ResultFD, + SmallVectorImpl &ResultPath) { + return createTemporaryFile(Prefix, Suffix, ResultFD, ResultPath, FS_File); +} + +std::error_code createTemporaryFile(const Twine &Prefix, StringRef Suffix, + SmallVectorImpl &ResultPath) { + int Dummy; + return createTemporaryFile(Prefix, Suffix, Dummy, ResultPath, FS_Name); +} + + +// This is a mkdtemp with a different pattern. We use createUniqueEntity mostly +// for consistency. We should try using mkdtemp. +std::error_code createUniqueDirectory(const Twine &Prefix, + SmallVectorImpl &ResultPath) { + int Dummy; + return createUniqueEntity(Prefix + "-%%%%%%", Dummy, ResultPath, + true, 0, FS_Dir); +} + +static std::error_code make_absolute(const Twine ¤t_directory, + SmallVectorImpl &path, + bool use_current_directory) { + StringRef p(path.data(), path.size()); + + bool rootDirectory = path::has_root_directory(p), +#ifdef LLVM_ON_WIN32 + rootName = path::has_root_name(p); +#else + rootName = true; +#endif + + // Already absolute. + if (rootName && rootDirectory) + return std::error_code(); + + // All of the following conditions will need the current directory. + SmallString<128> current_dir; + if (use_current_directory) + current_directory.toVector(current_dir); + else if (std::error_code ec = current_path(current_dir)) + return ec; + + // Relative path. Prepend the current directory. + if (!rootName && !rootDirectory) { + // Append path to the current directory. + path::append(current_dir, p); + // Set path to the result. + path.swap(current_dir); + return std::error_code(); + } + + if (!rootName && rootDirectory) { + StringRef cdrn = path::root_name(current_dir); + SmallString<128> curDirRootName(cdrn.begin(), cdrn.end()); + path::append(curDirRootName, p); + // Set path to the result. + path.swap(curDirRootName); + return std::error_code(); + } + + if (rootName && !rootDirectory) { + StringRef pRootName = path::root_name(p); + StringRef bRootDirectory = path::root_directory(current_dir); + StringRef bRelativePath = path::relative_path(current_dir); + StringRef pRelativePath = path::relative_path(p); + + SmallString<128> res; + path::append(res, pRootName, bRootDirectory, bRelativePath, pRelativePath); + path.swap(res); + return std::error_code(); + } + + llvm_unreachable("All rootName and rootDirectory combinations should have " + "occurred above!"); +} + +std::error_code make_absolute(const Twine ¤t_directory, + SmallVectorImpl &path) { + return make_absolute(current_directory, path, true); +} + +std::error_code make_absolute(SmallVectorImpl &path) { + return make_absolute(Twine(), path, false); +} + +std::error_code create_directories(const Twine &Path, bool IgnoreExisting, + perms Perms) { + SmallString<128> PathStorage; + StringRef P = Path.toStringRef(PathStorage); + + // Be optimistic and try to create the directory + std::error_code EC = create_directory(P, IgnoreExisting, Perms); + // If we succeeded, or had any error other than the parent not existing, just + // return it. + if (EC != errc::no_such_file_or_directory) + return EC; + + // We failed because of a no_such_file_or_directory, try to create the + // parent. + StringRef Parent = path::parent_path(P); + if (Parent.empty()) + return EC; + + if ((EC = create_directories(Parent, IgnoreExisting, Perms))) + return EC; + + return create_directory(P, IgnoreExisting, Perms); +} + +std::error_code copy_file(const Twine &From, const Twine &To) { + int ReadFD, WriteFD; + if (std::error_code EC = openFileForRead(From, ReadFD)) + return EC; + if (std::error_code EC = openFileForWrite(To, WriteFD, F_None)) { + close(ReadFD); + return EC; + } + + const size_t BufSize = 4096; + char *Buf = new char[BufSize]; + int BytesRead = 0, BytesWritten = 0; + for (;;) { + BytesRead = read(ReadFD, Buf, BufSize); + if (BytesRead <= 0) + break; + while (BytesRead) { + BytesWritten = write(WriteFD, Buf, BytesRead); + if (BytesWritten < 0) + break; + BytesRead -= BytesWritten; + } + if (BytesWritten < 0) + break; + } + close(ReadFD); + close(WriteFD); + delete[] Buf; + + if (BytesRead < 0 || BytesWritten < 0) + return std::error_code(errno, std::generic_category()); + return std::error_code(); +} + +bool exists(file_status status) { + return status_known(status) && status.type() != file_type::file_not_found; +} + +bool status_known(file_status s) { + return s.type() != file_type::status_error; +} + +bool is_directory(file_status status) { + return status.type() == file_type::directory_file; +} + +std::error_code is_directory(const Twine &path, bool &result) { + file_status st; + if (std::error_code ec = status(path, st)) + return ec; + result = is_directory(st); + return std::error_code(); +} + +bool is_regular_file(file_status status) { + return status.type() == file_type::regular_file; +} + +std::error_code is_regular_file(const Twine &path, bool &result) { + file_status st; + if (std::error_code ec = status(path, st)) + return ec; + result = is_regular_file(st); + return std::error_code(); +} + +bool is_other(file_status status) { + return exists(status) && + !is_regular_file(status) && + !is_directory(status); +} + +std::error_code is_other(const Twine &Path, bool &Result) { + file_status FileStatus; + if (std::error_code EC = status(Path, FileStatus)) + return EC; + Result = is_other(FileStatus); + return std::error_code(); +} + +void directory_entry::replace_filename(const Twine &filename, file_status st) { + SmallString<128> path = path::parent_path(Path); + path::append(path, filename); + Path = path.str(); + Status = st; +} + +/// @brief Identify the magic in magic. +file_magic identify_magic(StringRef Magic) { + if (Magic.size() < 4) + return file_magic::unknown; + switch ((unsigned char)Magic[0]) { + case 0x00: { + // COFF bigobj or short import library file + if (Magic[1] == (char)0x00 && Magic[2] == (char)0xff && + Magic[3] == (char)0xff) { + size_t MinSize = offsetof(COFF::BigObjHeader, UUID) + sizeof(COFF::BigObjMagic); + if (Magic.size() < MinSize) + return file_magic::coff_import_library; + + int BigObjVersion = read16le( + Magic.data() + offsetof(COFF::BigObjHeader, Version)); + if (BigObjVersion < COFF::BigObjHeader::MinBigObjectVersion) + return file_magic::coff_import_library; + + const char *Start = Magic.data() + offsetof(COFF::BigObjHeader, UUID); + if (memcmp(Start, COFF::BigObjMagic, sizeof(COFF::BigObjMagic)) != 0) + return file_magic::coff_import_library; + return file_magic::coff_object; + } + // Windows resource file + const char Expected[] = { 0, 0, 0, 0, '\x20', 0, 0, 0, '\xff' }; + if (Magic.size() >= sizeof(Expected) && + memcmp(Magic.data(), Expected, sizeof(Expected)) == 0) + return file_magic::windows_resource; + // 0x0000 = COFF unknown machine type + if (Magic[1] == 0) + return file_magic::coff_object; + break; + } + case 0xDE: // 0x0B17C0DE = BC wraper + if (Magic[1] == (char)0xC0 && Magic[2] == (char)0x17 && + Magic[3] == (char)0x0B) + return file_magic::bitcode; + break; + case 'B': + if (Magic[1] == 'C' && Magic[2] == (char)0xC0 && Magic[3] == (char)0xDE) + return file_magic::bitcode; + break; + case '!': + if (Magic.size() >= 8) + if (memcmp(Magic.data(), "!\n", 8) == 0 || + memcmp(Magic.data(), "!\n", 8) == 0) + return file_magic::archive; + break; + + case '\177': + if (Magic.size() >= 18 && Magic[1] == 'E' && Magic[2] == 'L' && + Magic[3] == 'F') { + bool Data2MSB = Magic[5] == 2; + unsigned high = Data2MSB ? 16 : 17; + unsigned low = Data2MSB ? 17 : 16; + if (Magic[high] == 0) + switch (Magic[low]) { + default: return file_magic::elf; + case 1: return file_magic::elf_relocatable; + case 2: return file_magic::elf_executable; + case 3: return file_magic::elf_shared_object; + case 4: return file_magic::elf_core; + } + else + // It's still some type of ELF file. + return file_magic::elf; + } + break; + + case 0xCA: + if (Magic[1] == char(0xFE) && Magic[2] == char(0xBA) && + Magic[3] == char(0xBE)) { + // This is complicated by an overlap with Java class files. + // See the Mach-O section in /usr/share/file/magic for details. + if (Magic.size() >= 8 && Magic[7] < 43) + return file_magic::macho_universal_binary; + } + break; + + // The two magic numbers for mach-o are: + // 0xfeedface - 32-bit mach-o + // 0xfeedfacf - 64-bit mach-o + case 0xFE: + case 0xCE: + case 0xCF: { + uint16_t type = 0; + if (Magic[0] == char(0xFE) && Magic[1] == char(0xED) && + Magic[2] == char(0xFA) && + (Magic[3] == char(0xCE) || Magic[3] == char(0xCF))) { + /* Native endian */ + size_t MinSize; + if (Magic[3] == char(0xCE)) + MinSize = sizeof(MachO::mach_header); + else + MinSize = sizeof(MachO::mach_header_64); + if (Magic.size() >= MinSize) + type = Magic[12] << 24 | Magic[13] << 12 | Magic[14] << 8 | Magic[15]; + } else if ((Magic[0] == char(0xCE) || Magic[0] == char(0xCF)) && + Magic[1] == char(0xFA) && Magic[2] == char(0xED) && + Magic[3] == char(0xFE)) { + /* Reverse endian */ + size_t MinSize; + if (Magic[0] == char(0xCE)) + MinSize = sizeof(MachO::mach_header); + else + MinSize = sizeof(MachO::mach_header_64); + if (Magic.size() >= MinSize) + type = Magic[15] << 24 | Magic[14] << 12 |Magic[13] << 8 | Magic[12]; + } + switch (type) { + default: break; + case 1: return file_magic::macho_object; + case 2: return file_magic::macho_executable; + case 3: return file_magic::macho_fixed_virtual_memory_shared_lib; + case 4: return file_magic::macho_core; + case 5: return file_magic::macho_preload_executable; + case 6: return file_magic::macho_dynamically_linked_shared_lib; + case 7: return file_magic::macho_dynamic_linker; + case 8: return file_magic::macho_bundle; + case 9: return file_magic::macho_dynamically_linked_shared_lib_stub; + case 10: return file_magic::macho_dsym_companion; + case 11: return file_magic::macho_kext_bundle; + } + break; + } + case 0xF0: // PowerPC Windows + case 0x83: // Alpha 32-bit + case 0x84: // Alpha 64-bit + case 0x66: // MPS R4000 Windows + case 0x50: // mc68K + case 0x4c: // 80386 Windows + case 0xc4: // ARMNT Windows + if (Magic[1] == 0x01) + return file_magic::coff_object; + + case 0x90: // PA-RISC Windows + case 0x68: // mc68K Windows + if (Magic[1] == 0x02) + return file_magic::coff_object; + break; + + case 'M': // Possible MS-DOS stub on Windows PE file + if (Magic[1] == 'Z') { + uint32_t off = read32le(Magic.data() + 0x3c); + // PE/COFF file, either EXE or DLL. + if (off < Magic.size() && + memcmp(Magic.data()+off, COFF::PEMagic, sizeof(COFF::PEMagic)) == 0) + return file_magic::pecoff_executable; + } + break; + + case 0x64: // x86-64 Windows. + if (Magic[1] == char(0x86)) + return file_magic::coff_object; + break; + + default: + break; + } + return file_magic::unknown; +} + +std::error_code identify_magic(const Twine &Path, file_magic &Result) { + int FD; + if (std::error_code EC = openFileForRead(Path, FD)) + return EC; + + char Buffer[32]; + int Length = read(FD, Buffer, sizeof(Buffer)); + if (close(FD) != 0 || Length < 0) + return std::error_code(errno, std::generic_category()); + + Result = identify_magic(StringRef(Buffer, Length)); + return std::error_code(); +} + +std::error_code directory_entry::status(file_status &result) const { + return fs::status(Path, result); +} + +} // end namespace fs +} // end namespace sys +} // end namespace llvm_ks + +// Include the truly platform-specific parts. +#if defined(LLVM_ON_UNIX) +#include "Unix/Path.inc" +#endif +#if defined(LLVM_ON_WIN32) +#include "Windows/Path.inc" +#endif + +namespace llvm_ks { +namespace sys { +namespace path { + +bool user_cache_directory(SmallVectorImpl &Result, const Twine &Path1, + const Twine &Path2, const Twine &Path3) { + if (getUserCacheDir(Result)) { + append(Result, Path1, Path2, Path3); + return true; + } + return false; +} + +} // end namespace path +} // end namsspace sys +} // end namespace llvm_ks diff --git a/llvm/lib/Support/README.txt.system b/llvm/lib/Support/README.txt.system new file mode 100644 index 0000000..7a906b8 --- /dev/null +++ b/llvm/lib/Support/README.txt.system @@ -0,0 +1,43 @@ +Design Of lib/System +==================== + +The software in this directory is designed to completely shield LLVM from any +and all operating system specific functionality. It is not intended to be a +complete operating system wrapper (such as ACE), but only to provide the +functionality necessary to support LLVM. + +The software located here, of necessity, has very specific and stringent design +rules. Violation of these rules means that cracks in the shield could form and +the primary goal of the library is defeated. By consistently using this library, +LLVM becomes more easily ported to new platforms since the only thing requiring +porting is this library. + +Complete documentation for the library can be found in the file: + llvm/docs/SystemLibrary.html +or at this URL: + http://llvm.org/docs/SystemLibrary.html + +While we recommend that you read the more detailed documentation, for the +impatient, here's a high level summary of the library's requirements. + + 1. No system header files are to be exposed through the interface. + 2. Std C++ and Std C header files are okay to be exposed through the interface. + 3. No exposed system-specific functions. + 4. No exposed system-specific data. + 5. Data in lib/System classes must use only simple C++ intrinsic types. + 6. Errors are handled by returning "true" and setting an optional std::string + 7. Library must not throw any exceptions, period. + 8. Interface functions must not have throw() specifications. + 9. No duplicate function impementations are permitted within an operating + system class. + +To accomplish these requirements, the library has numerous design criteria that +must be satisfied. Here's a high level summary of the library's design criteria: + + 1. No unused functionality (only what LLVM needs) + 2. High-Level Interfaces + 3. Use Opaque Classes + 4. Common Implementations + 5. Multiple Implementations + 6. Minimize Memory Allocation + 7. No Virtual Methods diff --git a/llvm/lib/Support/Regex.cpp b/llvm/lib/Support/Regex.cpp new file mode 100644 index 0000000..c5e9738 --- /dev/null +++ b/llvm/lib/Support/Regex.cpp @@ -0,0 +1,193 @@ +//===-- Regex.cpp - Regular Expression matcher implementation -------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements a POSIX regular expression matcher. +// +//===----------------------------------------------------------------------===// + +#include "llvm/Support/Regex.h" +#include "regex_impl.h" +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/ADT/Twine.h" +#include +using namespace llvm_ks; + +Regex::Regex(StringRef regex, unsigned Flags) { + unsigned flags = 0; + preg = new llvm_regex(); + preg->re_endp = regex.end(); + if (Flags & IgnoreCase) + flags |= REG_ICASE; + if (Flags & Newline) + flags |= REG_NEWLINE; + if (!(Flags & BasicRegex)) + flags |= REG_EXTENDED; + error = llvm_regcomp(preg, regex.data(), flags|REG_PEND); +} + +Regex::~Regex() { + if (preg) { + llvm_regfree(preg); + delete preg; + } +} + +bool Regex::isValid(std::string &Error) { + if (!error) + return true; + + size_t len = llvm_regerror(error, preg, nullptr, 0); + + Error.resize(len - 1); + llvm_regerror(error, preg, &Error[0], len); + return false; +} + +/// getNumMatches - In a valid regex, return the number of parenthesized +/// matches it contains. +unsigned Regex::getNumMatches() const { + return preg->re_nsub; +} + +bool Regex::match(StringRef String, SmallVectorImpl *Matches){ + unsigned nmatch = Matches ? preg->re_nsub+1 : 0; + + // pmatch needs to have at least one element. + SmallVector pm; + pm.resize(nmatch > 0 ? nmatch : 1); + pm[0].rm_so = 0; + pm[0].rm_eo = String.size(); + + int rc = llvm_regexec(preg, String.data(), nmatch, pm.data(), REG_STARTEND); + + if (rc == REG_NOMATCH) + return false; + if (rc != 0) { + // regexec can fail due to invalid pattern or running out of memory. + error = rc; + return false; + } + + // There was a match. + + if (Matches) { // match position requested + Matches->clear(); + + for (unsigned i = 0; i != nmatch; ++i) { + if (pm[i].rm_so == -1) { + // this group didn't match + Matches->push_back(StringRef()); + continue; + } + assert(pm[i].rm_eo >= pm[i].rm_so); + Matches->push_back(StringRef(String.data()+pm[i].rm_so, + pm[i].rm_eo-pm[i].rm_so)); + } + } + + return true; +} + +std::string Regex::sub(StringRef Repl, StringRef String, + std::string *Error) { + SmallVector Matches; + + // Reset error, if given. + if (Error && !Error->empty()) *Error = ""; + + // Return the input if there was no match. + if (!match(String, &Matches)) + return String; + + // Otherwise splice in the replacement string, starting with the prefix before + // the match. + std::string Res(String.begin(), Matches[0].begin()); + + // Then the replacement string, honoring possible substitutions. + while (!Repl.empty()) { + // Skip to the next escape. + std::pair Split = Repl.split('\\'); + + // Add the skipped substring. + Res += Split.first; + + // Check for terminimation and trailing backslash. + if (Split.second.empty()) { + if (Repl.size() != Split.first.size() && + Error && Error->empty()) + *Error = "replacement string contained trailing backslash"; + break; + } + + // Otherwise update the replacement string and interpret escapes. + Repl = Split.second; + + // FIXME: We should have a StringExtras function for mapping C99 escapes. + switch (Repl[0]) { + // Treat all unrecognized characters as self-quoting. + default: + Res += Repl[0]; + Repl = Repl.substr(1); + break; + + // Single character escapes. + case 't': + Res += '\t'; + Repl = Repl.substr(1); + break; + case 'n': + Res += '\n'; + Repl = Repl.substr(1); + break; + + // Decimal escapes are backreferences. + case '0': case '1': case '2': case '3': case '4': + case '5': case '6': case '7': case '8': case '9': { + // Extract the backreference number. + StringRef Ref = Repl.slice(0, Repl.find_first_not_of("0123456789")); + Repl = Repl.substr(Ref.size()); + + unsigned RefValue; + if (!Ref.getAsInteger(10, RefValue) && + RefValue < Matches.size()) + Res += Matches[RefValue]; + else if (Error && Error->empty()) + *Error = ("invalid backreference string '" + Twine(Ref) + "'").str(); + break; + } + } + } + + // And finally the suffix. + Res += StringRef(Matches[0].end(), String.end() - Matches[0].end()); + + return Res; +} + +// These are the special characters matched in functions like "p_ere_exp". +static const char RegexMetachars[] = "()^$|*+?.[]\\{}"; + +bool Regex::isLiteralERE(StringRef Str) { + // Check for regex metacharacters. This list was derived from our regex + // implementation in regcomp.c and double checked against the POSIX extended + // regular expression specification. + return Str.find_first_of(RegexMetachars) == StringRef::npos; +} + +std::string Regex::escape(StringRef String) { + std::string RegexStr; + for (unsigned i = 0, e = String.size(); i != e; ++i) { + if (strchr(RegexMetachars, String[i])) + RegexStr += '\\'; + RegexStr += String[i]; + } + + return RegexStr; +} diff --git a/llvm/lib/Support/ScaledNumber.cpp b/llvm/lib/Support/ScaledNumber.cpp new file mode 100644 index 0000000..b882b9f --- /dev/null +++ b/llvm/lib/Support/ScaledNumber.cpp @@ -0,0 +1,323 @@ +//==- lib/Support/ScaledNumber.cpp - Support for scaled numbers -*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// Implementation of some scaled number algorithms. +// +//===----------------------------------------------------------------------===// + +#include "llvm/Support/ScaledNumber.h" +#include "llvm/ADT/APFloat.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/raw_ostream.h" + +using namespace llvm_ks; +using namespace llvm_ks::ScaledNumbers; + +std::pair ScaledNumbers::multiply64(uint64_t LHS, + uint64_t RHS) { + // Separate into two 32-bit digits (U.L). + auto getU = [](uint64_t N) { return N >> 32; }; + auto getL = [](uint64_t N) { return N & UINT32_MAX; }; + uint64_t UL = getU(LHS), LL = getL(LHS), UR = getU(RHS), LR = getL(RHS); + + // Compute cross products. + uint64_t P1 = UL * UR, P2 = UL * LR, P3 = LL * UR, P4 = LL * LR; + + // Sum into two 64-bit digits. + uint64_t Upper = P1, Lower = P4; + auto addWithCarry = [&](uint64_t N) { + uint64_t NewLower = Lower + (getL(N) << 32); + Upper += getU(N) + (NewLower < Lower); + Lower = NewLower; + }; + addWithCarry(P2); + addWithCarry(P3); + + // Check whether the upper digit is empty. + if (!Upper) + return std::make_pair(Lower, 0); + + // Shift as little as possible to maximize precision. + unsigned LeadingZeros = countLeadingZeros(Upper); + int Shift = 64 - LeadingZeros; + if (LeadingZeros) + Upper = Upper << LeadingZeros | Lower >> Shift; + return getRounded(Upper, Shift, + Shift && (Lower & UINT64_C(1) << (Shift - 1))); +} + +static uint64_t getHalf(uint64_t N) { return (N >> 1) + (N & 1); } + +std::pair ScaledNumbers::divide32(uint32_t Dividend, + uint32_t Divisor) { + assert(Dividend && "expected non-zero dividend"); + assert(Divisor && "expected non-zero divisor"); + + // Use 64-bit math and canonicalize the dividend to gain precision. + uint64_t Dividend64 = Dividend; + int Shift = 0; + if (int Zeros = countLeadingZeros(Dividend64)) { + Shift -= Zeros; + Dividend64 <<= Zeros; + } + uint64_t Quotient = Dividend64 / Divisor; + uint64_t Remainder = Dividend64 % Divisor; + + // If Quotient needs to be shifted, leave the rounding to getAdjusted(). + if (Quotient > UINT32_MAX) + return getAdjusted(Quotient, Shift); + + // Round based on the value of the next bit. + return getRounded(Quotient, Shift, Remainder >= getHalf(Divisor)); +} + +std::pair ScaledNumbers::divide64(uint64_t Dividend, + uint64_t Divisor) { + assert(Dividend && "expected non-zero dividend"); + assert(Divisor && "expected non-zero divisor"); + + // Minimize size of divisor. + int Shift = 0; + if (int Zeros = countTrailingZeros(Divisor)) { + Shift -= Zeros; + Divisor >>= Zeros; + } + + // Check for powers of two. + if (Divisor == 1) + return std::make_pair(Dividend, Shift); + + // Maximize size of dividend. + if (int Zeros = countLeadingZeros(Dividend)) { + Shift -= Zeros; + Dividend <<= Zeros; + } + + // Start with the result of a divide. + uint64_t Quotient = Dividend / Divisor; + Dividend %= Divisor; + + // Continue building the quotient with long division. + while (!(Quotient >> 63) && Dividend) { + // Shift Dividend and check for overflow. + bool IsOverflow = Dividend >> 63; + Dividend <<= 1; + --Shift; + + // Get the next bit of Quotient. + Quotient <<= 1; + if (IsOverflow || Divisor <= Dividend) { + Quotient |= 1; + Dividend -= Divisor; + } + } + + return getRounded(Quotient, Shift, Dividend >= getHalf(Divisor)); +} + +int ScaledNumbers::compareImpl(uint64_t L, uint64_t R, int ScaleDiff) { + assert(ScaleDiff >= 0 && "wrong argument order"); + assert(ScaleDiff < 64 && "numbers too far apart"); + + uint64_t L_adjusted = L >> ScaleDiff; + if (L_adjusted < R) + return -1; + if (L_adjusted > R) + return 1; + + return L > L_adjusted << ScaleDiff ? 1 : 0; +} + +static void appendDigit(std::string &Str, unsigned D) { + assert(D < 10); + Str += '0' + D % 10; +} + +static void appendNumber(std::string &Str, uint64_t N) { + while (N) { + appendDigit(Str, N % 10); + N /= 10; + } +} + +static bool doesRoundUp(char Digit) { + switch (Digit) { + case '5': + case '6': + case '7': + case '8': + case '9': + return true; + default: + return false; + } +} + +static std::string toStringAPFloat(uint64_t D, int E, unsigned Precision) { + assert(E >= ScaledNumbers::MinScale); + assert(E <= ScaledNumbers::MaxScale); + + // Find a new E, but don't let it increase past MaxScale. + int LeadingZeros = ScaledNumberBase::countLeadingZeros64(D); + int NewE = std::min(ScaledNumbers::MaxScale, E + 63 - LeadingZeros); + int Shift = 63 - (NewE - E); + assert(Shift <= LeadingZeros); + assert(Shift == LeadingZeros || NewE == ScaledNumbers::MaxScale); + assert(Shift >= 0 && Shift < 64 && "undefined behavior"); + D <<= Shift; + E = NewE; + + // Check for a denormal. + unsigned AdjustedE = E + 16383; + if (!(D >> 63)) { + assert(E == ScaledNumbers::MaxScale); + AdjustedE = 0; + } + + // Build the float and print it. + uint64_t RawBits[2] = {D, AdjustedE}; + APFloat Float(APFloat::x87DoubleExtended, APInt(80, RawBits)); + SmallVector Chars; + Float.toString(Chars, Precision, 0); + return std::string(Chars.begin(), Chars.end()); +} + +static std::string stripTrailingZeros(const std::string &Float) { + size_t NonZero = Float.find_last_not_of('0'); + assert(NonZero != std::string::npos && "no . in floating point string"); + + if (Float[NonZero] == '.') + ++NonZero; + + return Float.substr(0, NonZero + 1); +} + +std::string ScaledNumberBase::toString(uint64_t D, int16_t E, int Width, + unsigned Precision) { + if (!D) + return "0.0"; + + // Canonicalize exponent and digits. + uint64_t Above0 = 0; + uint64_t Below0 = 0; + uint64_t Extra = 0; + int ExtraShift = 0; + if (E == 0) { + Above0 = D; + } else if (E > 0) { + if (int Shift = std::min(int16_t(countLeadingZeros64(D)), E)) { + D <<= Shift; + E -= Shift; + + if (!E) + Above0 = D; + } + } else if (E > -64) { + Above0 = D >> -E; + Below0 = D << (64 + E); + } else if (E == -64) { + // Special case: shift by 64 bits is undefined behavior. + Below0 = D; + } else if (E > -120) { + Below0 = D >> (-E - 64); + Extra = D << (128 + E); + ExtraShift = -64 - E; + } + + // Fall back on APFloat for very small and very large numbers. + if (!Above0 && !Below0) + return toStringAPFloat(D, E, Precision); + + // Append the digits before the decimal. + std::string Str; + size_t DigitsOut = 0; + if (Above0) { + appendNumber(Str, Above0); + DigitsOut = Str.size(); + } else + appendDigit(Str, 0); + std::reverse(Str.begin(), Str.end()); + + // Return early if there's nothing after the decimal. + if (!Below0) + return Str + ".0"; + + // Append the decimal and beyond. + Str += '.'; + uint64_t Error = UINT64_C(1) << (64 - Width); + + // We need to shift Below0 to the right to make space for calculating + // digits. Save the precision we're losing in Extra. + Extra = (Below0 & 0xf) << 56 | (Extra >> 8); + Below0 >>= 4; + size_t SinceDot = 0; + size_t AfterDot = Str.size(); + do { + if (ExtraShift) { + --ExtraShift; + Error *= 5; + } else + Error *= 10; + + Below0 *= 10; + Extra *= 10; + Below0 += (Extra >> 60); + Extra = Extra & (UINT64_MAX >> 4); + appendDigit(Str, Below0 >> 60); + Below0 = Below0 & (UINT64_MAX >> 4); + if (DigitsOut || Str.back() != '0') + ++DigitsOut; + ++SinceDot; + } while (Error && (Below0 << 4 | Extra >> 60) >= Error / 2 && + (!Precision || DigitsOut <= Precision || SinceDot < 2)); + + // Return early for maximum precision. + if (!Precision || DigitsOut <= Precision) + return stripTrailingZeros(Str); + + // Find where to truncate. + size_t Truncate = + std::max(Str.size() - (DigitsOut - Precision), AfterDot + 1); + + // Check if there's anything to truncate. + if (Truncate >= Str.size()) + return stripTrailingZeros(Str); + + bool Carry = doesRoundUp(Str[Truncate]); + if (!Carry) + return stripTrailingZeros(Str.substr(0, Truncate)); + + // Round with the first truncated digit. + for (std::string::reverse_iterator I(Str.begin() + Truncate), E = Str.rend(); + I != E; ++I) { + if (*I == '.') + continue; + if (*I == '9') { + *I = '0'; + continue; + } + + ++*I; + Carry = false; + break; + } + + // Add "1" in front if we still need to carry. + return stripTrailingZeros(std::string(Carry, '1') + Str.substr(0, Truncate)); +} + +raw_ostream &ScaledNumberBase::print(raw_ostream &OS, uint64_t D, int16_t E, + int Width, unsigned Precision) { + return OS << toString(D, E, Width, Precision); +} + +void ScaledNumberBase::dump(uint64_t D, int16_t E, int Width) { + //print(dbgs(), D, E, Width, 0) << "[" << Width << ":" << D << "*2^" << E + // << "]"; +} diff --git a/llvm/lib/Support/SmallPtrSet.cpp b/llvm/lib/Support/SmallPtrSet.cpp new file mode 100644 index 0000000..9c20452 --- /dev/null +++ b/llvm/lib/Support/SmallPtrSet.cpp @@ -0,0 +1,298 @@ +//===- llvm/ADT/SmallPtrSet.cpp - 'Normally small' pointer set ------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the SmallPtrSet class. See SmallPtrSet.h for an +// overview of the algorithm. +// +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/SmallPtrSet.h" +#include "llvm/ADT/DenseMapInfo.h" +#include "llvm/Support/MathExtras.h" +#include +#include + +using namespace llvm_ks; + +void SmallPtrSetImplBase::shrink_and_clear() { + assert(!isSmall() && "Can't shrink a small set!"); + free(CurArray); + + // Reduce the number of buckets. + CurArraySize = NumElements > 16 ? 1 << (Log2_32_Ceil(NumElements) + 1) : 32; + NumElements = NumTombstones = 0; + + // Install the new array. Clear all the buckets to empty. + CurArray = (const void**)malloc(sizeof(void*) * CurArraySize); + assert(CurArray && "Failed to allocate memory?"); + memset(CurArray, -1, CurArraySize*sizeof(void*)); +} + +std::pair +SmallPtrSetImplBase::insert_imp_big(const void *Ptr) { + if (LLVM_UNLIKELY(NumElements * 4 >= CurArraySize * 3)) { + // If more than 3/4 of the array is full, grow. + Grow(CurArraySize < 64 ? 128 : CurArraySize*2); + } else if (LLVM_UNLIKELY(CurArraySize - (NumElements + NumTombstones) < + CurArraySize / 8)) { + // If fewer of 1/8 of the array is empty (meaning that many are filled with + // tombstones), rehash. + Grow(CurArraySize); + } + + // Okay, we know we have space. Find a hash bucket. + const void **Bucket = const_cast(FindBucketFor(Ptr)); + if (*Bucket == Ptr) + return std::make_pair(Bucket, false); // Already inserted, good. + + // Otherwise, insert it! + if (*Bucket == getTombstoneMarker()) + --NumTombstones; + *Bucket = Ptr; + ++NumElements; // Track density. + return std::make_pair(Bucket, true); +} + +bool SmallPtrSetImplBase::erase_imp(const void * Ptr) { + if (isSmall()) { + // Check to see if it is in the set. + for (const void **APtr = SmallArray, **E = SmallArray+NumElements; + APtr != E; ++APtr) + if (*APtr == Ptr) { + // If it is in the set, replace this element. + *APtr = E[-1]; + E[-1] = getEmptyMarker(); + --NumElements; + return true; + } + + return false; + } + + // Okay, we know we have space. Find a hash bucket. + void **Bucket = const_cast(FindBucketFor(Ptr)); + if (*Bucket != Ptr) return false; // Not in the set? + + // Set this as a tombstone. + *Bucket = getTombstoneMarker(); + --NumElements; + ++NumTombstones; + return true; +} + +const void * const *SmallPtrSetImplBase::FindBucketFor(const void *Ptr) const { + unsigned Bucket = DenseMapInfo::getHashValue(Ptr) & (CurArraySize-1); + unsigned ArraySize = CurArraySize; + unsigned ProbeAmt = 1; + const void *const *Array = CurArray; + const void *const *Tombstone = nullptr; + while (1) { + // If we found an empty bucket, the pointer doesn't exist in the set. + // Return a tombstone if we've seen one so far, or the empty bucket if + // not. + if (LLVM_LIKELY(Array[Bucket] == getEmptyMarker())) + return Tombstone ? Tombstone : Array+Bucket; + + // Found Ptr's bucket? + if (LLVM_LIKELY(Array[Bucket] == Ptr)) + return Array+Bucket; + + // If this is a tombstone, remember it. If Ptr ends up not in the set, we + // prefer to return it than something that would require more probing. + if (Array[Bucket] == getTombstoneMarker() && !Tombstone) + Tombstone = Array+Bucket; // Remember the first tombstone found. + + // It's a hash collision or a tombstone. Reprobe. + Bucket = (Bucket + ProbeAmt++) & (ArraySize-1); + } +} + +/// Grow - Allocate a larger backing store for the buckets and move it over. +/// +void SmallPtrSetImplBase::Grow(unsigned NewSize) { + // Allocate at twice as many buckets, but at least 128. + unsigned OldSize = CurArraySize; + + const void **OldBuckets = CurArray; + bool WasSmall = isSmall(); + + // Install the new array. Clear all the buckets to empty. + CurArray = (const void**)malloc(sizeof(void*) * NewSize); + assert(CurArray && "Failed to allocate memory?"); + CurArraySize = NewSize; + memset(CurArray, -1, NewSize*sizeof(void*)); + + // Copy over all the elements. + if (WasSmall) { + // Small sets store their elements in order. + for (const void **BucketPtr = OldBuckets, **E = OldBuckets+NumElements; + BucketPtr != E; ++BucketPtr) { + const void *Elt = *BucketPtr; + *const_cast(FindBucketFor(Elt)) = const_cast(Elt); + } + } else { + // Copy over all valid entries. + for (const void **BucketPtr = OldBuckets, **E = OldBuckets+OldSize; + BucketPtr != E; ++BucketPtr) { + // Copy over the element if it is valid. + const void *Elt = *BucketPtr; + if (Elt != getTombstoneMarker() && Elt != getEmptyMarker()) + *const_cast(FindBucketFor(Elt)) = const_cast(Elt); + } + + free(OldBuckets); + NumTombstones = 0; + } +} + +SmallPtrSetImplBase::SmallPtrSetImplBase(const void **SmallStorage, + const SmallPtrSetImplBase &that) { + SmallArray = SmallStorage; + + // If we're becoming small, prepare to insert into our stack space + if (that.isSmall()) { + CurArray = SmallArray; + // Otherwise, allocate new heap space (unless we were the same size) + } else { + CurArray = (const void**)malloc(sizeof(void*) * that.CurArraySize); + assert(CurArray && "Failed to allocate memory?"); + } + + // Copy over the that array. + CopyHelper(that); +} + +SmallPtrSetImplBase::SmallPtrSetImplBase(const void **SmallStorage, + unsigned SmallSize, + SmallPtrSetImplBase &&that) { + SmallArray = SmallStorage; + MoveHelper(SmallSize, std::move(that)); +} + +void SmallPtrSetImplBase::CopyFrom(const SmallPtrSetImplBase &RHS) { + assert(&RHS != this && "Self-copy should be handled by the caller."); + + if (isSmall() && RHS.isSmall()) + assert(CurArraySize == RHS.CurArraySize && + "Cannot assign sets with different small sizes"); + + // If we're becoming small, prepare to insert into our stack space + if (RHS.isSmall()) { + if (!isSmall()) + free(CurArray); + CurArray = SmallArray; + // Otherwise, allocate new heap space (unless we were the same size) + } else if (CurArraySize != RHS.CurArraySize) { + if (isSmall()) + CurArray = (const void**)malloc(sizeof(void*) * RHS.CurArraySize); + else { + const void **T = (const void**)realloc(CurArray, + sizeof(void*) * RHS.CurArraySize); + if (!T) + free(CurArray); + CurArray = T; + } + assert(CurArray && "Failed to allocate memory?"); + } + + CopyHelper(RHS); +} + +void SmallPtrSetImplBase::CopyHelper(const SmallPtrSetImplBase &RHS) { + // Copy over the new array size + CurArraySize = RHS.CurArraySize; + + // Copy over the contents from the other set + memcpy(CurArray, RHS.CurArray, sizeof(void*)*CurArraySize); + + NumElements = RHS.NumElements; + NumTombstones = RHS.NumTombstones; +} + +void SmallPtrSetImplBase::MoveFrom(unsigned SmallSize, + SmallPtrSetImplBase &&RHS) { + if (!isSmall()) + free(CurArray); + MoveHelper(SmallSize, std::move(RHS)); +} + +void SmallPtrSetImplBase::MoveHelper(unsigned SmallSize, + SmallPtrSetImplBase &&RHS) { + assert(&RHS != this && "Self-move should be handled by the caller."); + + if (RHS.isSmall()) { + // Copy a small RHS rather than moving. + CurArray = SmallArray; + memcpy(CurArray, RHS.CurArray, sizeof(void*)*RHS.CurArraySize); + } else { + CurArray = RHS.CurArray; + RHS.CurArray = RHS.SmallArray; + } + + // Copy the rest of the trivial members. + CurArraySize = RHS.CurArraySize; + NumElements = RHS.NumElements; + NumTombstones = RHS.NumTombstones; + + // Make the RHS small and empty. + RHS.CurArraySize = SmallSize; + assert(RHS.CurArray == RHS.SmallArray); + RHS.NumElements = 0; + RHS.NumTombstones = 0; +} + +void SmallPtrSetImplBase::swap(SmallPtrSetImplBase &RHS) { + if (this == &RHS) return; + + // We can only avoid copying elements if neither set is small. + if (!this->isSmall() && !RHS.isSmall()) { + std::swap(this->CurArray, RHS.CurArray); + std::swap(this->CurArraySize, RHS.CurArraySize); + std::swap(this->NumElements, RHS.NumElements); + std::swap(this->NumTombstones, RHS.NumTombstones); + return; + } + + // FIXME: From here on we assume that both sets have the same small size. + + // If only RHS is small, copy the small elements into LHS and move the pointer + // from LHS to RHS. + if (!this->isSmall() && RHS.isSmall()) { + std::copy(RHS.SmallArray, RHS.SmallArray+RHS.CurArraySize, + this->SmallArray); + std::swap(this->NumElements, RHS.NumElements); + std::swap(this->CurArraySize, RHS.CurArraySize); + RHS.CurArray = this->CurArray; + RHS.NumTombstones = this->NumTombstones; + this->CurArray = this->SmallArray; + this->NumTombstones = 0; + return; + } + + // If only LHS is small, copy the small elements into RHS and move the pointer + // from RHS to LHS. + if (this->isSmall() && !RHS.isSmall()) { + std::copy(this->SmallArray, this->SmallArray+this->CurArraySize, + RHS.SmallArray); + std::swap(RHS.NumElements, this->NumElements); + std::swap(RHS.CurArraySize, this->CurArraySize); + this->CurArray = RHS.CurArray; + this->NumTombstones = RHS.NumTombstones; + RHS.CurArray = RHS.SmallArray; + RHS.NumTombstones = 0; + return; + } + + // Both a small, just swap the small elements. + assert(this->isSmall() && RHS.isSmall()); + assert(this->CurArraySize == RHS.CurArraySize); + std::swap_ranges(this->SmallArray, this->SmallArray+this->CurArraySize, + RHS.SmallArray); + std::swap(this->NumElements, RHS.NumElements); +} diff --git a/llvm/lib/Support/SmallVector.cpp b/llvm/lib/Support/SmallVector.cpp new file mode 100644 index 0000000..c344a63 --- /dev/null +++ b/llvm/lib/Support/SmallVector.cpp @@ -0,0 +1,41 @@ +//===- llvm/ADT/SmallVector.cpp - 'Normally small' vectors ----------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the SmallVector class. +// +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/SmallVector.h" +using namespace llvm_ks; + +/// grow_pod - This is an implementation of the grow() method which only works +/// on POD-like datatypes and is out of line to reduce code duplication. +void SmallVectorBase::grow_pod(void *FirstEl, size_t MinSizeInBytes, + size_t TSize) { + size_t CurSizeBytes = size_in_bytes(); + size_t NewCapacityInBytes = 2 * capacity_in_bytes() + TSize; // Always grow. + if (NewCapacityInBytes < MinSizeInBytes) + NewCapacityInBytes = MinSizeInBytes; + + void *NewElts; + if (BeginX == FirstEl) { + NewElts = malloc(NewCapacityInBytes); + + // Copy the elements over. No need to run dtors on PODs. + memcpy(NewElts, this->BeginX, CurSizeBytes); + } else { + // If this wasn't grown from the inline copy, grow the allocated space. + NewElts = realloc(this->BeginX, NewCapacityInBytes); + } + assert(NewElts && "Out of memory"); + + this->EndX = (char*)NewElts+CurSizeBytes; + this->BeginX = NewElts; + this->CapacityX = (char*)this->BeginX + NewCapacityInBytes; +} diff --git a/llvm/lib/Support/SourceMgr.cpp b/llvm/lib/Support/SourceMgr.cpp new file mode 100644 index 0000000..4191749 --- /dev/null +++ b/llvm/lib/Support/SourceMgr.cpp @@ -0,0 +1,476 @@ +//===- SourceMgr.cpp - Manager for Simple Source Buffers & Diagnostics ----===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the SourceMgr class. This class is used as a simple +// substrate for diagnostics, #include handling, and other low level things for +// simple parsers. +// +//===----------------------------------------------------------------------===// + +#include "llvm/Support/SourceMgr.h" +#include "llvm/ADT/Twine.h" +#include "llvm/Support/MemoryBuffer.h" +#include "llvm/Support/Path.h" +#include "llvm/Support/raw_ostream.h" +using namespace llvm_ks; + +static const size_t TabStop = 8; + +namespace { + struct LineNoCacheTy { + unsigned LastQueryBufferID; + const char *LastQuery; + unsigned LineNoOfQuery; + }; +} + +static LineNoCacheTy *getCache(void *Ptr) { + return (LineNoCacheTy*)Ptr; +} + + +SourceMgr::~SourceMgr() { + // Delete the line # cache if allocated. + if (LineNoCacheTy *Cache = getCache(LineNoCache)) + delete Cache; +} + +unsigned SourceMgr::AddIncludeFile(const std::string &Filename, + SMLoc IncludeLoc, + std::string &IncludedFile) { + IncludedFile = Filename; + ErrorOr> NewBufOrErr = + MemoryBuffer::getFile(IncludedFile); + + // If the file didn't exist directly, see if it's in an include path. + for (unsigned i = 0, e = IncludeDirectories.size(); i != e && !NewBufOrErr; + ++i) { + IncludedFile = + IncludeDirectories[i] + sys::path::get_separator().data() + Filename; + NewBufOrErr = MemoryBuffer::getFile(IncludedFile); + } + + if (!NewBufOrErr) + return 0; + + return AddNewSourceBuffer(std::move(*NewBufOrErr), IncludeLoc); +} + +unsigned SourceMgr::FindBufferContainingLoc(SMLoc Loc) const { + for (unsigned i = 0, e = Buffers.size(); i != e; ++i) + if (Loc.getPointer() >= Buffers[i].Buffer->getBufferStart() && + // Use <= here so that a pointer to the null at the end of the buffer + // is included as part of the buffer. + Loc.getPointer() <= Buffers[i].Buffer->getBufferEnd()) + return i + 1; + return 0; +} + +std::pair +SourceMgr::getLineAndColumn(SMLoc Loc, unsigned BufferID) const { + if (!BufferID) + BufferID = FindBufferContainingLoc(Loc); + assert(BufferID && "Invalid Location!"); + + const MemoryBuffer *Buff = getMemoryBuffer(BufferID); + + // Count the number of \n's between the start of the file and the specified + // location. + unsigned LineNo = 1; + + const char *BufStart = Buff->getBufferStart(); + const char *Ptr = BufStart; + + // If we have a line number cache, and if the query is to a later point in the + // same file, start searching from the last query location. This optimizes + // for the case when multiple diagnostics come out of one file in order. + if (LineNoCacheTy *Cache = getCache(LineNoCache)) + if (Cache->LastQueryBufferID == BufferID && + Cache->LastQuery <= Loc.getPointer()) { + Ptr = Cache->LastQuery; + LineNo = Cache->LineNoOfQuery; + } + + // Scan for the location being queried, keeping track of the number of lines + // we see. + for (; SMLoc::getFromPointer(Ptr) != Loc; ++Ptr) + if (*Ptr == '\n') ++LineNo; + + // Allocate the line number cache if it doesn't exist. + if (!LineNoCache) + LineNoCache = new LineNoCacheTy(); + + // Update the line # cache. + LineNoCacheTy &Cache = *getCache(LineNoCache); + Cache.LastQueryBufferID = BufferID; + Cache.LastQuery = Ptr; + Cache.LineNoOfQuery = LineNo; + + size_t NewlineOffs = StringRef(BufStart, Ptr-BufStart).find_last_of("\n\r"); + if (NewlineOffs == StringRef::npos) NewlineOffs = ~(size_t)0; + return std::make_pair(LineNo, Ptr-BufStart-NewlineOffs); +} + +void SourceMgr::PrintIncludeStack(SMLoc IncludeLoc, raw_ostream &OS) const { + if (IncludeLoc == SMLoc()) return; // Top of stack. + + unsigned CurBuf = FindBufferContainingLoc(IncludeLoc); + assert(CurBuf && "Invalid or unspecified location!"); + + PrintIncludeStack(getBufferInfo(CurBuf).IncludeLoc, OS); + + OS << "Included from " + << getBufferInfo(CurBuf).Buffer->getBufferIdentifier() + << ":" << FindLineNumber(IncludeLoc, CurBuf) << ":\n"; +} + + +SMDiagnostic SourceMgr::GetMessage(SMLoc Loc, SourceMgr::DiagKind Kind, + const Twine &Msg, + ArrayRef Ranges, + ArrayRef FixIts) const { + + // First thing to do: find the current buffer containing the specified + // location to pull out the source line. + SmallVector, 4> ColRanges; + std::pair LineAndCol; + const char *BufferID = ""; + std::string LineStr; + + if (Loc.isValid()) { + unsigned CurBuf = FindBufferContainingLoc(Loc); + assert(CurBuf && "Invalid or unspecified location!"); + + const MemoryBuffer *CurMB = getMemoryBuffer(CurBuf); + BufferID = CurMB->getBufferIdentifier(); + + // Scan backward to find the start of the line. + const char *LineStart = Loc.getPointer(); + const char *BufStart = CurMB->getBufferStart(); + while (LineStart != BufStart && LineStart[-1] != '\n' && + LineStart[-1] != '\r') + --LineStart; + + // Get the end of the line. + const char *LineEnd = Loc.getPointer(); + const char *BufEnd = CurMB->getBufferEnd(); + while (LineEnd != BufEnd && LineEnd[0] != '\n' && LineEnd[0] != '\r') + ++LineEnd; + LineStr = std::string(LineStart, LineEnd); + + // Convert any ranges to column ranges that only intersect the line of the + // location. + for (unsigned i = 0, e = Ranges.size(); i != e; ++i) { + SMRange R = Ranges[i]; + if (!R.isValid()) continue; + + // If the line doesn't contain any part of the range, then ignore it. + if (R.Start.getPointer() > LineEnd || R.End.getPointer() < LineStart) + continue; + + // Ignore pieces of the range that go onto other lines. + if (R.Start.getPointer() < LineStart) + R.Start = SMLoc::getFromPointer(LineStart); + if (R.End.getPointer() > LineEnd) + R.End = SMLoc::getFromPointer(LineEnd); + + // Translate from SMLoc ranges to column ranges. + // FIXME: Handle multibyte characters. + ColRanges.push_back(std::make_pair(R.Start.getPointer()-LineStart, + R.End.getPointer()-LineStart)); + } + + LineAndCol = getLineAndColumn(Loc, CurBuf); + } + + return SMDiagnostic(*this, Loc, BufferID, LineAndCol.first, + LineAndCol.second-1, Kind, Msg.str(), + LineStr, ColRanges, FixIts); +} + +void SourceMgr::PrintMessage(raw_ostream &OS, const SMDiagnostic &Diagnostic, + bool ShowColors) const { + // Report the message with the diagnostic handler if present. + if (DiagHandler) { + DiagHandler(Diagnostic, DiagContext); + return; + } + + if (Diagnostic.getLoc().isValid()) { + unsigned CurBuf = FindBufferContainingLoc(Diagnostic.getLoc()); + assert(CurBuf && "Invalid or unspecified location!"); + PrintIncludeStack(getBufferInfo(CurBuf).IncludeLoc, OS); + } + + Diagnostic.print(nullptr, OS, ShowColors); +} + +void SourceMgr::PrintMessage(raw_ostream &OS, SMLoc Loc, + SourceMgr::DiagKind Kind, + const Twine &Msg, ArrayRef Ranges, + ArrayRef FixIts, bool ShowColors) const { + PrintMessage(OS, GetMessage(Loc, Kind, Msg, Ranges, FixIts), ShowColors); +} + +void SourceMgr::PrintMessage(SMLoc Loc, SourceMgr::DiagKind Kind, + const Twine &Msg, ArrayRef Ranges, + ArrayRef FixIts, bool ShowColors) const { + PrintMessage(llvm_ks::errs(), Loc, Kind, Msg, Ranges, FixIts, ShowColors); +} + +//===----------------------------------------------------------------------===// +// SMDiagnostic Implementation +//===----------------------------------------------------------------------===// + +SMDiagnostic::SMDiagnostic(const SourceMgr &sm, SMLoc L, StringRef FN, + int Line, int Col, SourceMgr::DiagKind Kind, + StringRef Msg, StringRef LineStr, + ArrayRef > Ranges, + ArrayRef Hints) + : SM(&sm), Loc(L), Filename(FN), LineNo(Line), ColumnNo(Col), Kind(Kind), + Message(Msg), LineContents(LineStr), Ranges(Ranges.vec()), + FixIts(Hints.begin(), Hints.end()) { + std::sort(FixIts.begin(), FixIts.end()); +} + +static void buildFixItLine(std::string &CaretLine, std::string &FixItLine, + ArrayRef FixIts, ArrayRef SourceLine){ + if (FixIts.empty()) + return; + + const char *LineStart = SourceLine.begin(); + const char *LineEnd = SourceLine.end(); + + size_t PrevHintEndCol = 0; + + for (ArrayRef::iterator I = FixIts.begin(), E = FixIts.end(); + I != E; ++I) { + // If the fixit contains a newline or tab, ignore it. + if (I->getText().find_first_of("\n\r\t") != StringRef::npos) + continue; + + SMRange R = I->getRange(); + + // If the line doesn't contain any part of the range, then ignore it. + if (R.Start.getPointer() > LineEnd || R.End.getPointer() < LineStart) + continue; + + // Translate from SMLoc to column. + // Ignore pieces of the range that go onto other lines. + // FIXME: Handle multibyte characters in the source line. + unsigned FirstCol; + if (R.Start.getPointer() < LineStart) + FirstCol = 0; + else + FirstCol = R.Start.getPointer() - LineStart; + + // If we inserted a long previous hint, push this one forwards, and add + // an extra space to show that this is not part of the previous + // completion. This is sort of the best we can do when two hints appear + // to overlap. + // + // Note that if this hint is located immediately after the previous + // hint, no space will be added, since the location is more important. + unsigned HintCol = FirstCol; + if (HintCol < PrevHintEndCol) + HintCol = PrevHintEndCol + 1; + + // This relies on one byte per column in our fixit hints. + unsigned LastColumnModified = HintCol + I->getText().size(); + if (LastColumnModified > FixItLine.size()) + FixItLine.resize(LastColumnModified, ' '); + + std::copy(I->getText().begin(), I->getText().end(), + FixItLine.begin() + HintCol); + + PrevHintEndCol = LastColumnModified; + + // For replacements, mark the removal range with '~'. + // FIXME: Handle multibyte characters in the source line. + unsigned LastCol; + if (R.End.getPointer() >= LineEnd) + LastCol = LineEnd - LineStart; + else + LastCol = R.End.getPointer() - LineStart; + + std::fill(&CaretLine[FirstCol], &CaretLine[LastCol], '~'); + } +} + +static void printSourceLine(raw_ostream &S, StringRef LineContents) { + // Print out the source line one character at a time, so we can expand tabs. + for (unsigned i = 0, e = LineContents.size(), OutCol = 0; i != e; ++i) { + if (LineContents[i] != '\t') { + S << LineContents[i]; + ++OutCol; + continue; + } + + // If we have a tab, emit at least one space, then round up to 8 columns. + do { + S << ' '; + ++OutCol; + } while ((OutCol % TabStop) != 0); + } + S << '\n'; +} + +static bool isNonASCII(char c) { + return c & 0x80; +} + +void SMDiagnostic::print(const char *ProgName, raw_ostream &S, bool ShowColors, + bool ShowKindLabel) const { + // Display colors only if OS supports colors. + ShowColors &= S.has_colors(); + + if (ShowColors) + S.changeColor(raw_ostream::SAVEDCOLOR, true); + + if (ProgName && ProgName[0]) + S << ProgName << ": "; + + if (!Filename.empty()) { + if (Filename == "-") + S << ""; + else + S << Filename; + + if (LineNo != -1) { + S << ':' << LineNo; + if (ColumnNo != -1) + S << ':' << (ColumnNo+1); + } + S << ": "; + } + + if (ShowKindLabel) { + switch (Kind) { + case SourceMgr::DK_Error: + if (ShowColors) + S.changeColor(raw_ostream::RED, true); + S << "error: "; + break; + case SourceMgr::DK_Warning: + if (ShowColors) + S.changeColor(raw_ostream::MAGENTA, true); + S << "warning: "; + break; + case SourceMgr::DK_Note: + if (ShowColors) + S.changeColor(raw_ostream::BLACK, true); + S << "note: "; + break; + } + + if (ShowColors) { + S.resetColor(); + S.changeColor(raw_ostream::SAVEDCOLOR, true); + } + } + + S << Message << '\n'; + + if (ShowColors) + S.resetColor(); + + if (LineNo == -1 || ColumnNo == -1) + return; + + // FIXME: If there are multibyte or multi-column characters in the source, all + // our ranges will be wrong. To do this properly, we'll need a byte-to-column + // map like Clang's TextDiagnostic. For now, we'll just handle tabs by + // expanding them later, and bail out rather than show incorrect ranges and + // misaligned fixits for any other odd characters. + if (std::find_if(LineContents.begin(), LineContents.end(), isNonASCII) != + LineContents.end()) { + printSourceLine(S, LineContents); + return; + } + size_t NumColumns = LineContents.size(); + + // Build the line with the caret and ranges. + std::string CaretLine(NumColumns+1, ' '); + + // Expand any ranges. + for (unsigned r = 0, e = Ranges.size(); r != e; ++r) { + std::pair R = Ranges[r]; + std::fill(&CaretLine[R.first], + &CaretLine[std::min((size_t)R.second, CaretLine.size())], + '~'); + } + + // Add any fix-its. + // FIXME: Find the beginning of the line properly for multibyte characters. + std::string FixItInsertionLine; + buildFixItLine(CaretLine, FixItInsertionLine, FixIts, + makeArrayRef(Loc.getPointer() - ColumnNo, + LineContents.size())); + + // Finally, plop on the caret. + if (unsigned(ColumnNo) <= NumColumns) + CaretLine[ColumnNo] = '^'; + else + CaretLine[NumColumns] = '^'; + + // ... and remove trailing whitespace so the output doesn't wrap for it. We + // know that the line isn't completely empty because it has the caret in it at + // least. + CaretLine.erase(CaretLine.find_last_not_of(' ')+1); + + printSourceLine(S, LineContents); + + if (ShowColors) + S.changeColor(raw_ostream::GREEN, true); + + // Print out the caret line, matching tabs in the source line. + for (unsigned i = 0, e = CaretLine.size(), OutCol = 0; i != e; ++i) { + if (i >= LineContents.size() || LineContents[i] != '\t') { + S << CaretLine[i]; + ++OutCol; + continue; + } + + // Okay, we have a tab. Insert the appropriate number of characters. + do { + S << CaretLine[i]; + ++OutCol; + } while ((OutCol % TabStop) != 0); + } + S << '\n'; + + if (ShowColors) + S.resetColor(); + + // Print out the replacement line, matching tabs in the source line. + if (FixItInsertionLine.empty()) + return; + + for (size_t i = 0, e = FixItInsertionLine.size(), OutCol = 0; i < e; ++i) { + if (i >= LineContents.size() || LineContents[i] != '\t') { + S << FixItInsertionLine[i]; + ++OutCol; + continue; + } + + // Okay, we have a tab. Insert the appropriate number of characters. + do { + S << FixItInsertionLine[i]; + // FIXME: This is trying not to break up replacements, but then to re-sync + // with the tabs between replacements. This will fail, though, if two + // fix-it replacements are exactly adjacent, or if a fix-it contains a + // space. Really we should be precomputing column widths, which we'll + // need anyway for multibyte chars. + if (FixItInsertionLine[i] != ' ') + ++i; + ++OutCol; + } while (((OutCol % TabStop) != 0) && i != e); + } + S << '\n'; +} diff --git a/llvm/lib/Support/StringExtras.cpp b/llvm/lib/Support/StringExtras.cpp new file mode 100644 index 0000000..ef3db81 --- /dev/null +++ b/llvm/lib/Support/StringExtras.cpp @@ -0,0 +1,58 @@ +//===-- StringExtras.cpp - Implement the StringExtras header --------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the StringExtras.h header +// +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/StringExtras.h" +using namespace llvm_ks; + +/// StrInStrNoCase - Portable version of strcasestr. Locates the first +/// occurrence of string 's1' in string 's2', ignoring case. Returns +/// the offset of s2 in s1 or npos if s2 cannot be found. +StringRef::size_type llvm_ks::StrInStrNoCase(StringRef s1, StringRef s2) { + size_t N = s2.size(), M = s1.size(); + if (N > M) + return StringRef::npos; + for (size_t i = 0, e = M - N + 1; i != e; ++i) + if (s1.substr(i, N).equals_lower(s2)) + return i; + return StringRef::npos; +} + +/// getToken - This function extracts one token from source, ignoring any +/// leading characters that appear in the Delimiters string, and ending the +/// token at any of the characters that appear in the Delimiters string. If +/// there are no tokens in the source string, an empty string is returned. +/// The function returns a pair containing the extracted token and the +/// remaining tail string. +std::pair llvm_ks::getToken(StringRef Source, + StringRef Delimiters) { + // Figure out where the token starts. + StringRef::size_type Start = Source.find_first_not_of(Delimiters); + + // Find the next occurrence of the delimiter. + StringRef::size_type End = Source.find_first_of(Delimiters, Start); + + return std::make_pair(Source.slice(Start, End), Source.substr(End)); +} + +/// SplitString - Split up the specified string according to the specified +/// delimiters, appending the result fragments to the output list. +void llvm_ks::SplitString(StringRef Source, + SmallVectorImpl &OutFragments, + StringRef Delimiters) { + std::pair S = getToken(Source, Delimiters); + while (!S.first.empty()) { + OutFragments.push_back(S.first); + S = getToken(S.second, Delimiters); + } +} diff --git a/llvm/lib/Support/StringMap.cpp b/llvm/lib/Support/StringMap.cpp new file mode 100644 index 0000000..431b461 --- /dev/null +++ b/llvm/lib/Support/StringMap.cpp @@ -0,0 +1,245 @@ +//===--- StringMap.cpp - String Hash table map implementation -------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the StringMap class. +// +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/StringMap.h" +#include "llvm/ADT/StringExtras.h" +#include "llvm/Support/Compiler.h" +#include +using namespace llvm_ks; + +StringMapImpl::StringMapImpl(unsigned InitSize, unsigned itemSize) { + ItemSize = itemSize; + + // If a size is specified, initialize the table with that many buckets. + if (InitSize) { + init(InitSize); + return; + } + + // Otherwise, initialize it with zero buckets to avoid the allocation. + TheTable = nullptr; + NumBuckets = 0; + NumItems = 0; + NumTombstones = 0; +} + +void StringMapImpl::init(unsigned InitSize) { + assert((InitSize & (InitSize-1)) == 0 && + "Init Size must be a power of 2 or zero!"); + NumBuckets = InitSize ? InitSize : 16; + NumItems = 0; + NumTombstones = 0; + + TheTable = (StringMapEntryBase **)calloc(NumBuckets+1, + sizeof(StringMapEntryBase **) + + sizeof(unsigned)); + + // Allocate one extra bucket, set it to look filled so the iterators stop at + // end. + TheTable[NumBuckets] = (StringMapEntryBase*)2; +} + + +/// LookupBucketFor - Look up the bucket that the specified string should end +/// up in. If it already exists as a key in the map, the Item pointer for the +/// specified bucket will be non-null. Otherwise, it will be null. In either +/// case, the FullHashValue field of the bucket will be set to the hash value +/// of the string. +unsigned StringMapImpl::LookupBucketFor(StringRef Name) { + unsigned HTSize = NumBuckets; + if (HTSize == 0) { // Hash table unallocated so far? + init(16); + HTSize = NumBuckets; + } + unsigned FullHashValue = HashString(Name); + unsigned BucketNo = FullHashValue & (HTSize-1); + unsigned *HashTable = (unsigned *)(TheTable + NumBuckets + 1); + + unsigned ProbeAmt = 1; + int FirstTombstone = -1; + while (1) { + StringMapEntryBase *BucketItem = TheTable[BucketNo]; + // If we found an empty bucket, this key isn't in the table yet, return it. + if (LLVM_LIKELY(!BucketItem)) { + // If we found a tombstone, we want to reuse the tombstone instead of an + // empty bucket. This reduces probing. + if (FirstTombstone != -1) { + HashTable[FirstTombstone] = FullHashValue; + return FirstTombstone; + } + + HashTable[BucketNo] = FullHashValue; + return BucketNo; + } + + if (BucketItem == getTombstoneVal()) { + // Skip over tombstones. However, remember the first one we see. + if (FirstTombstone == -1) FirstTombstone = BucketNo; + } else if (LLVM_LIKELY(HashTable[BucketNo] == FullHashValue)) { + // If the full hash value matches, check deeply for a match. The common + // case here is that we are only looking at the buckets (for item info + // being non-null and for the full hash value) not at the items. This + // is important for cache locality. + + // Do the comparison like this because Name isn't necessarily + // null-terminated! + char *ItemStr = (char*)BucketItem+ItemSize; + if (Name == StringRef(ItemStr, BucketItem->getKeyLength())) { + // We found a match! + return BucketNo; + } + } + + // Okay, we didn't find the item. Probe to the next bucket. + BucketNo = (BucketNo+ProbeAmt) & (HTSize-1); + + // Use quadratic probing, it has fewer clumping artifacts than linear + // probing and has good cache behavior in the common case. + ++ProbeAmt; + } +} + + +/// FindKey - Look up the bucket that contains the specified key. If it exists +/// in the map, return the bucket number of the key. Otherwise return -1. +/// This does not modify the map. +int StringMapImpl::FindKey(StringRef Key) const { + unsigned HTSize = NumBuckets; + if (HTSize == 0) return -1; // Really empty table? + unsigned FullHashValue = HashString(Key); + unsigned BucketNo = FullHashValue & (HTSize-1); + unsigned *HashTable = (unsigned *)(TheTable + NumBuckets + 1); + + unsigned ProbeAmt = 1; + while (1) { + StringMapEntryBase *BucketItem = TheTable[BucketNo]; + // If we found an empty bucket, this key isn't in the table yet, return. + if (LLVM_LIKELY(!BucketItem)) + return -1; + + if (BucketItem == getTombstoneVal()) { + // Ignore tombstones. + } else if (LLVM_LIKELY(HashTable[BucketNo] == FullHashValue)) { + // If the full hash value matches, check deeply for a match. The common + // case here is that we are only looking at the buckets (for item info + // being non-null and for the full hash value) not at the items. This + // is important for cache locality. + + // Do the comparison like this because NameStart isn't necessarily + // null-terminated! + char *ItemStr = (char*)BucketItem+ItemSize; + if (Key == StringRef(ItemStr, BucketItem->getKeyLength())) { + // We found a match! + return BucketNo; + } + } + + // Okay, we didn't find the item. Probe to the next bucket. + BucketNo = (BucketNo+ProbeAmt) & (HTSize-1); + + // Use quadratic probing, it has fewer clumping artifacts than linear + // probing and has good cache behavior in the common case. + ++ProbeAmt; + } +} + +/// RemoveKey - Remove the specified StringMapEntry from the table, but do not +/// delete it. This aborts if the value isn't in the table. +void StringMapImpl::RemoveKey(StringMapEntryBase *V) { + const char *VStr = (char*)V + ItemSize; + StringMapEntryBase *V2 = RemoveKey(StringRef(VStr, V->getKeyLength())); + (void)V2; + assert(V == V2 && "Didn't find key?"); +} + +/// RemoveKey - Remove the StringMapEntry for the specified key from the +/// table, returning it. If the key is not in the table, this returns null. +StringMapEntryBase *StringMapImpl::RemoveKey(StringRef Key) { + int Bucket = FindKey(Key); + if (Bucket == -1) return nullptr; + + StringMapEntryBase *Result = TheTable[Bucket]; + TheTable[Bucket] = getTombstoneVal(); + --NumItems; + ++NumTombstones; + assert(NumItems + NumTombstones <= NumBuckets); + + return Result; +} + + + +/// RehashTable - Grow the table, redistributing values into the buckets with +/// the appropriate mod-of-hashtable-size. +unsigned StringMapImpl::RehashTable(unsigned BucketNo) { + unsigned NewSize; + unsigned *HashTable = (unsigned *)(TheTable + NumBuckets + 1); + + // If the hash table is now more than 3/4 full, or if fewer than 1/8 of + // the buckets are empty (meaning that many are filled with tombstones), + // grow/rehash the table. + if (LLVM_UNLIKELY(NumItems * 4 > NumBuckets * 3)) { + NewSize = NumBuckets*2; + } else if (LLVM_UNLIKELY(NumBuckets - (NumItems + NumTombstones) <= + NumBuckets / 8)) { + NewSize = NumBuckets; + } else { + return BucketNo; + } + + unsigned NewBucketNo = BucketNo; + // Allocate one extra bucket which will always be non-empty. This allows the + // iterators to stop at end. + StringMapEntryBase **NewTableArray = + (StringMapEntryBase **)calloc(NewSize+1, sizeof(StringMapEntryBase *) + + sizeof(unsigned)); + unsigned *NewHashArray = (unsigned *)(NewTableArray + NewSize + 1); + NewTableArray[NewSize] = (StringMapEntryBase*)2; + + // Rehash all the items into their new buckets. Luckily :) we already have + // the hash values available, so we don't have to rehash any strings. + for (unsigned I = 0, E = NumBuckets; I != E; ++I) { + StringMapEntryBase *Bucket = TheTable[I]; + if (Bucket && Bucket != getTombstoneVal()) { + // Fast case, bucket available. + unsigned FullHash = HashTable[I]; + unsigned NewBucket = FullHash & (NewSize-1); + if (!NewTableArray[NewBucket]) { + NewTableArray[FullHash & (NewSize-1)] = Bucket; + NewHashArray[FullHash & (NewSize-1)] = FullHash; + if (I == BucketNo) + NewBucketNo = NewBucket; + continue; + } + + // Otherwise probe for a spot. + unsigned ProbeSize = 1; + do { + NewBucket = (NewBucket + ProbeSize++) & (NewSize-1); + } while (NewTableArray[NewBucket]); + + // Finally found a slot. Fill it in. + NewTableArray[NewBucket] = Bucket; + NewHashArray[NewBucket] = FullHash; + if (I == BucketNo) + NewBucketNo = NewBucket; + } + } + + free(TheTable); + + TheTable = NewTableArray; + NumBuckets = NewSize; + NumTombstones = 0; + return NewBucketNo; +} diff --git a/llvm/lib/Support/StringPool.cpp b/llvm/lib/Support/StringPool.cpp new file mode 100644 index 0000000..33eb480 --- /dev/null +++ b/llvm/lib/Support/StringPool.cpp @@ -0,0 +1,35 @@ +//===-- StringPool.cpp - Interned string pool -----------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the StringPool class. +// +//===----------------------------------------------------------------------===// + +#include "llvm/Support/StringPool.h" +#include "llvm/ADT/StringRef.h" + +using namespace llvm_ks; + +StringPool::StringPool() {} + +StringPool::~StringPool() { + assert(InternTable.empty() && "PooledStringPtr leaked!"); +} + +PooledStringPtr StringPool::intern(StringRef Key) { + table_t::iterator I = InternTable.find(Key); + if (I != InternTable.end()) + return PooledStringPtr(&*I); + + entry_t *S = entry_t::Create(Key); + S->getValue().Pool = this; + InternTable.insert(S); + + return PooledStringPtr(S); +} diff --git a/llvm/lib/Support/StringRef.cpp b/llvm/lib/Support/StringRef.cpp new file mode 100644 index 0000000..ec6d6b9 --- /dev/null +++ b/llvm/lib/Support/StringRef.cpp @@ -0,0 +1,524 @@ +//===-- StringRef.cpp - Lightweight String References ---------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/StringRef.h" +#include "llvm/ADT/APInt.h" +#include "llvm/ADT/Hashing.h" +#include "llvm/ADT/edit_distance.h" +#include + +using namespace llvm_ks; + +// MSVC emits references to this into the translation units which reference it. +#ifndef _MSC_VER +const size_t StringRef::npos; +#endif + +static char ascii_tolower(char x) { + if (x >= 'A' && x <= 'Z') + return x - 'A' + 'a'; + return x; +} + +static char ascii_toupper(char x) { + if (x >= 'a' && x <= 'z') + return x - 'a' + 'A'; + return x; +} + +static bool ascii_isdigit(char x) { + return x >= '0' && x <= '9'; +} + +// strncasecmp() is not available on non-POSIX systems, so define an +// alternative function here. +static int ascii_strncasecmp(const char *LHS, const char *RHS, size_t Length) { + for (size_t I = 0; I < Length; ++I) { + unsigned char LHC = ascii_tolower(LHS[I]); + unsigned char RHC = ascii_tolower(RHS[I]); + if (LHC != RHC) + return LHC < RHC ? -1 : 1; + } + return 0; +} + +/// compare_lower - Compare strings, ignoring case. +int StringRef::compare_lower(StringRef RHS) const { + if (int Res = ascii_strncasecmp(Data, RHS.Data, std::min(Length, RHS.Length))) + return Res; + if (Length == RHS.Length) + return 0; + return Length < RHS.Length ? -1 : 1; +} + +/// Check if this string starts with the given \p Prefix, ignoring case. +bool StringRef::startswith_lower(StringRef Prefix) const { + return Length >= Prefix.Length && + ascii_strncasecmp(Data, Prefix.Data, Prefix.Length) == 0; +} + +/// Check if this string ends with the given \p Suffix, ignoring case. +bool StringRef::endswith_lower(StringRef Suffix) const { + return Length >= Suffix.Length && + ascii_strncasecmp(end() - Suffix.Length, Suffix.Data, Suffix.Length) == 0; +} + +/// compare_numeric - Compare strings, handle embedded numbers. +int StringRef::compare_numeric(StringRef RHS) const { + for (size_t I = 0, E = std::min(Length, RHS.Length); I != E; ++I) { + // Check for sequences of digits. + if (ascii_isdigit(Data[I]) && ascii_isdigit(RHS.Data[I])) { + // The longer sequence of numbers is considered larger. + // This doesn't really handle prefixed zeros well. + size_t J; + for (J = I + 1; J != E + 1; ++J) { + bool ld = J < Length && ascii_isdigit(Data[J]); + bool rd = J < RHS.Length && ascii_isdigit(RHS.Data[J]); + if (ld != rd) + return rd ? -1 : 1; + if (!rd) + break; + } + // The two number sequences have the same length (J-I), just memcmp them. + if (int Res = compareMemory(Data + I, RHS.Data + I, J - I)) + return Res < 0 ? -1 : 1; + // Identical number sequences, continue search after the numbers. + I = J - 1; + continue; + } + if (Data[I] != RHS.Data[I]) + return (unsigned char)Data[I] < (unsigned char)RHS.Data[I] ? -1 : 1; + } + if (Length == RHS.Length) + return 0; + return Length < RHS.Length ? -1 : 1; +} + +// Compute the edit distance between the two given strings. +unsigned StringRef::edit_distance(llvm_ks::StringRef Other, + bool AllowReplacements, + unsigned MaxEditDistance) const { + return llvm_ks::ComputeEditDistance( + makeArrayRef(data(), size()), + makeArrayRef(Other.data(), Other.size()), + AllowReplacements, MaxEditDistance); +} + +//===----------------------------------------------------------------------===// +// String Operations +//===----------------------------------------------------------------------===// + +std::string StringRef::lower() const { + std::string Result(size(), char()); + for (size_type i = 0, e = size(); i != e; ++i) { + Result[i] = ascii_tolower(Data[i]); + } + return Result; +} + +std::string StringRef::upper() const { + std::string Result(size(), char()); + for (size_type i = 0, e = size(); i != e; ++i) { + Result[i] = ascii_toupper(Data[i]); + } + return Result; +} + +//===----------------------------------------------------------------------===// +// String Searching +//===----------------------------------------------------------------------===// + + +/// find - Search for the first string \arg Str in the string. +/// +/// \return - The index of the first occurrence of \arg Str, or npos if not +/// found. +size_t StringRef::find(StringRef Str, size_t From) const { + if (From > Length) + return npos; + + const char *Needle = Str.data(); + size_t N = Str.size(); + if (N == 0) + return From; + + size_t Size = Length - From; + if (Size < N) + return npos; + + const char *Start = Data + From; + const char *Stop = Start + (Size - N + 1); + + // For short haystacks or unsupported needles fall back to the naive algorithm + if (Size < 16 || N > 255) { + do { + if (std::memcmp(Start, Needle, N) == 0) + return Start - Data; + ++Start; + } while (Start < Stop); + return npos; + } + + // Build the bad char heuristic table, with uint8_t to reduce cache thrashing. + uint8_t BadCharSkip[256]; + std::memset(BadCharSkip, N, 256); + for (unsigned i = 0; i != N-1; ++i) + BadCharSkip[(uint8_t)Str[i]] = N-1-i; + + do { + if (std::memcmp(Start, Needle, N) == 0) + return Start - Data; + + // Otherwise skip the appropriate number of bytes. + Start += BadCharSkip[(uint8_t)Start[N-1]]; + } while (Start < Stop); + + return npos; +} + +/// rfind - Search for the last string \arg Str in the string. +/// +/// \return - The index of the last occurrence of \arg Str, or npos if not +/// found. +size_t StringRef::rfind(StringRef Str) const { + size_t N = Str.size(); + if (N > Length) + return npos; + for (size_t i = Length - N + 1, e = 0; i != e;) { + --i; + if (substr(i, N).equals(Str)) + return i; + } + return npos; +} + +/// find_first_of - Find the first character in the string that is in \arg +/// Chars, or npos if not found. +/// +/// Note: O(size() + Chars.size()) +StringRef::size_type StringRef::find_first_of(StringRef Chars, + size_t From) const { + std::bitset<1 << CHAR_BIT> CharBits; + for (size_type i = 0; i != Chars.size(); ++i) + CharBits.set((unsigned char)Chars[i]); + + for (size_type i = std::min(From, Length), e = Length; i != e; ++i) + if (CharBits.test((unsigned char)Data[i])) + return i; + return npos; +} + +/// find_first_not_of - Find the first character in the string that is not +/// \arg C or npos if not found. +StringRef::size_type StringRef::find_first_not_of(char C, size_t From) const { + for (size_type i = std::min(From, Length), e = Length; i != e; ++i) + if (Data[i] != C) + return i; + return npos; +} + +/// find_first_not_of - Find the first character in the string that is not +/// in the string \arg Chars, or npos if not found. +/// +/// Note: O(size() + Chars.size()) +StringRef::size_type StringRef::find_first_not_of(StringRef Chars, + size_t From) const { + std::bitset<1 << CHAR_BIT> CharBits; + for (size_type i = 0; i != Chars.size(); ++i) + CharBits.set((unsigned char)Chars[i]); + + for (size_type i = std::min(From, Length), e = Length; i != e; ++i) + if (!CharBits.test((unsigned char)Data[i])) + return i; + return npos; +} + +/// find_last_of - Find the last character in the string that is in \arg C, +/// or npos if not found. +/// +/// Note: O(size() + Chars.size()) +StringRef::size_type StringRef::find_last_of(StringRef Chars, + size_t From) const { + std::bitset<1 << CHAR_BIT> CharBits; + for (size_type i = 0; i != Chars.size(); ++i) + CharBits.set((unsigned char)Chars[i]); + + for (size_type i = std::min(From, Length) - 1, e = -1; i != e; --i) + if (CharBits.test((unsigned char)Data[i])) + return i; + return npos; +} + +/// find_last_not_of - Find the last character in the string that is not +/// \arg C, or npos if not found. +StringRef::size_type StringRef::find_last_not_of(char C, size_t From) const { + for (size_type i = std::min(From, Length) - 1, e = -1; i != e; --i) + if (Data[i] != C) + return i; + return npos; +} + +/// find_last_not_of - Find the last character in the string that is not in +/// \arg Chars, or npos if not found. +/// +/// Note: O(size() + Chars.size()) +StringRef::size_type StringRef::find_last_not_of(StringRef Chars, + size_t From) const { + std::bitset<1 << CHAR_BIT> CharBits; + for (size_type i = 0, e = Chars.size(); i != e; ++i) + CharBits.set((unsigned char)Chars[i]); + + for (size_type i = std::min(From, Length) - 1, e = -1; i != e; --i) + if (!CharBits.test((unsigned char)Data[i])) + return i; + return npos; +} + +void StringRef::split(SmallVectorImpl &A, + StringRef Separator, int MaxSplit, + bool KeepEmpty) const { + StringRef S = *this; + + // Count down from MaxSplit. When MaxSplit is -1, this will just split + // "forever". This doesn't support splitting more than 2^31 times + // intentionally; if we ever want that we can make MaxSplit a 64-bit integer + // but that seems unlikely to be useful. + while (MaxSplit-- != 0) { + size_t Idx = S.find(Separator); + if (Idx == npos) + break; + + // Push this split. + if (KeepEmpty || Idx > 0) + A.push_back(S.slice(0, Idx)); + + // Jump forward. + S = S.slice(Idx + Separator.size(), npos); + } + + // Push the tail. + if (KeepEmpty || !S.empty()) + A.push_back(S); +} + +void StringRef::split(SmallVectorImpl &A, char Separator, + int MaxSplit, bool KeepEmpty) const { + StringRef S = *this; + + // Count down from MaxSplit. When MaxSplit is -1, this will just split + // "forever". This doesn't support splitting more than 2^31 times + // intentionally; if we ever want that we can make MaxSplit a 64-bit integer + // but that seems unlikely to be useful. + while (MaxSplit-- != 0) { + size_t Idx = S.find(Separator); + if (Idx == npos) + break; + + // Push this split. + if (KeepEmpty || Idx > 0) + A.push_back(S.slice(0, Idx)); + + // Jump forward. + S = S.slice(Idx + 1, npos); + } + + // Push the tail. + if (KeepEmpty || !S.empty()) + A.push_back(S); +} + +//===----------------------------------------------------------------------===// +// Helpful Algorithms +//===----------------------------------------------------------------------===// + +/// count - Return the number of non-overlapped occurrences of \arg Str in +/// the string. +size_t StringRef::count(StringRef Str) const { + size_t Count = 0; + size_t N = Str.size(); + if (N > Length) + return 0; + for (size_t i = 0, e = Length - N + 1; i != e; ++i) + if (substr(i, N).equals(Str)) + ++Count; + return Count; +} + +static unsigned GetAutoSenseRadix(StringRef &Str) { + if (Str.startswith("0x") || Str.startswith("0X")) { + Str = Str.substr(2); + return 16; + } + + if (Str.startswith("0b")) { + Str = Str.substr(2); + return 2; + } + + if (Str.startswith("0o")) { + Str = Str.substr(2); + return 8; + } + + if (Str.startswith("0")) + return 8; + + return 10; +} + + +/// GetAsUnsignedInteger - Workhorse method that converts a integer character +/// sequence of radix up to 36 to an unsigned long long value. +bool llvm_ks::getAsUnsignedInteger(StringRef Str, unsigned Radix, + unsigned long long &Result) { + // Autosense radix if not specified. + if (Radix == 0) + Radix = GetAutoSenseRadix(Str); + + // Empty strings (after the radix autosense) are invalid. + if (Str.empty()) return true; + + // Parse all the bytes of the string given this radix. Watch for overflow. + Result = 0; + while (!Str.empty()) { + unsigned CharVal; + if (Str[0] >= '0' && Str[0] <= '9') + CharVal = Str[0]-'0'; + else if (Str[0] >= 'a' && Str[0] <= 'z') + CharVal = Str[0]-'a'+10; + else if (Str[0] >= 'A' && Str[0] <= 'Z') + CharVal = Str[0]-'A'+10; + else + return true; + + // If the parsed value is larger than the integer radix, the string is + // invalid. + if (CharVal >= Radix) + return true; + + // Add in this character. + unsigned long long PrevResult = Result; + Result = Result*Radix+CharVal; + + // Check for overflow by shifting back and seeing if bits were lost. + if (Result/Radix < PrevResult) + return true; + + Str = Str.substr(1); + } + + return false; +} + +bool llvm_ks::getAsSignedInteger(StringRef Str, unsigned Radix, + long long &Result) { + unsigned long long ULLVal; + + // Handle positive strings first. + if (Str.empty() || Str.front() != '-') { + if (getAsUnsignedInteger(Str, Radix, ULLVal) || + // Check for value so large it overflows a signed value. + (long long)ULLVal < 0) + return true; + Result = ULLVal; + return false; + } + + // Get the positive part of the value. + if (getAsUnsignedInteger(Str.substr(1), Radix, ULLVal) || + // Reject values so large they'd overflow as negative signed, but allow + // "-0". This negates the unsigned so that the negative isn't undefined + // on signed overflow. + (long long)-ULLVal > 0) + return true; + + Result = -ULLVal; + return false; +} + +bool StringRef::getAsInteger(unsigned Radix, APInt &Result) const { + StringRef Str = *this; + + // Autosense radix if not specified. + if (Radix == 0) + Radix = GetAutoSenseRadix(Str); + + assert(Radix > 1 && Radix <= 36); + + // Empty strings (after the radix autosense) are invalid. + if (Str.empty()) return true; + + // Skip leading zeroes. This can be a significant improvement if + // it means we don't need > 64 bits. + while (!Str.empty() && Str.front() == '0') + Str = Str.substr(1); + + // If it was nothing but zeroes.... + if (Str.empty()) { + Result = APInt(64, 0); + return false; + } + + // (Over-)estimate the required number of bits. + unsigned Log2Radix = 0; + while ((1U << Log2Radix) < Radix) Log2Radix++; + bool IsPowerOf2Radix = ((1U << Log2Radix) == Radix); + + unsigned BitWidth = Log2Radix * Str.size(); + if (BitWidth < Result.getBitWidth()) + BitWidth = Result.getBitWidth(); // don't shrink the result + else if (BitWidth > Result.getBitWidth()) + Result = Result.zext(BitWidth); + + APInt RadixAP, CharAP; // unused unless !IsPowerOf2Radix + if (!IsPowerOf2Radix) { + // These must have the same bit-width as Result. + RadixAP = APInt(BitWidth, Radix); + CharAP = APInt(BitWidth, 0); + } + + // Parse all the bytes of the string given this radix. + Result = 0; + while (!Str.empty()) { + unsigned CharVal; + if (Str[0] >= '0' && Str[0] <= '9') + CharVal = Str[0]-'0'; + else if (Str[0] >= 'a' && Str[0] <= 'z') + CharVal = Str[0]-'a'+10; + else if (Str[0] >= 'A' && Str[0] <= 'Z') + CharVal = Str[0]-'A'+10; + else + return true; + + // If the parsed value is larger than the integer radix, the string is + // invalid. + if (CharVal >= Radix) + return true; + + // Add in this character. + if (IsPowerOf2Radix) { + Result <<= Log2Radix; + Result |= CharVal; + } else { + Result *= RadixAP; + CharAP = CharVal; + Result += CharAP; + } + + Str = Str.substr(1); + } + + return false; +} + + +// Implementation of StringRef hashing. +hash_code llvm_ks::hash_value(StringRef S) { + return hash_combine_range(S.begin(), S.end()); +} diff --git a/llvm/lib/Support/StringSaver.cpp b/llvm/lib/Support/StringSaver.cpp new file mode 100644 index 0000000..7359493 --- /dev/null +++ b/llvm/lib/Support/StringSaver.cpp @@ -0,0 +1,19 @@ +//===-- StringSaver.cpp ---------------------------------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/Support/StringSaver.h" + +using namespace llvm_ks; + +const char *StringSaver::save(StringRef S) { + char *P = Alloc.Allocate(S.size() + 1); + memcpy(P, S.data(), S.size()); + P[S.size()] = '\0'; + return P; +} diff --git a/llvm/lib/Support/TargetParser.cpp b/llvm/lib/Support/TargetParser.cpp new file mode 100644 index 0000000..c42448b --- /dev/null +++ b/llvm/lib/Support/TargetParser.cpp @@ -0,0 +1,609 @@ +//===-- TargetParser - Parser for target features ---------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements a target parser to recognise hardware features such as +// FPU/CPU/ARCH names as well as specific support such as HDIV, etc. +// +//===----------------------------------------------------------------------===// + +#include "llvm/Support/ARMBuildAttributes.h" +#include "llvm/Support/TargetParser.h" +#include "llvm/ADT/StringExtras.h" +#include "llvm/ADT/StringSwitch.h" +#include "llvm/ADT/Twine.h" +#include + +using namespace llvm_ks; +using namespace ARM; + +namespace { + +// List of canonical FPU names (use getFPUSynonym) and which architectural +// features they correspond to (use getFPUFeatures). +// FIXME: TableGen this. +// The entries must appear in the order listed in ARM::FPUKind for correct indexing +static const struct { + const char *NameCStr; + size_t NameLength; + ARM::FPUKind ID; + ARM::FPUVersion FPUVersion; + ARM::NeonSupportLevel NeonSupport; + ARM::FPURestriction Restriction; + + StringRef getName() const { return StringRef(NameCStr, NameLength); } +} FPUNames[] = { +#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) \ + { NAME, sizeof(NAME) - 1, KIND, VERSION, NEON_SUPPORT, RESTRICTION }, +#include "llvm/Support/ARMTargetParser.def" +}; + +// List of canonical arch names (use getArchSynonym). +// This table also provides the build attribute fields for CPU arch +// and Arch ID, according to the Addenda to the ARM ABI, chapters +// 2.4 and 2.3.5.2 respectively. +// FIXME: SubArch values were simplified to fit into the expectations +// of the triples and are not conforming with their official names. +// Check to see if the expectation should be changed. +// FIXME: TableGen this. +static const struct { + const char *NameCStr; + size_t NameLength; + const char *CPUAttrCStr; + size_t CPUAttrLength; + const char *SubArchCStr; + size_t SubArchLength; + unsigned DefaultFPU; + unsigned ArchBaseExtensions; + ARM::ArchKind ID; + ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes. + + StringRef getName() const { return StringRef(NameCStr, NameLength); } + + // CPU class in build attributes. + StringRef getCPUAttr() const { return StringRef(CPUAttrCStr, CPUAttrLength); } + + // Sub-Arch name. + StringRef getSubArch() const { return StringRef(SubArchCStr, SubArchLength); } +} ARCHNames[] = { +#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) \ + {NAME, sizeof(NAME) - 1, CPU_ATTR, sizeof(CPU_ATTR) - 1, SUB_ARCH, \ + sizeof(SUB_ARCH) - 1, ARCH_FPU, ARCH_BASE_EXT, ID, ARCH_ATTR}, +#include "llvm/Support/ARMTargetParser.def" +}; + +// List of Arch Extension names. +// FIXME: TableGen this. +static const struct { + const char *NameCStr; + size_t NameLength; + unsigned ID; + const char *Feature; + const char *NegFeature; + + StringRef getName() const { return StringRef(NameCStr, NameLength); } +} ARCHExtNames[] = { +#define ARM_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE) \ + { NAME, sizeof(NAME) - 1, ID, FEATURE, NEGFEATURE }, +#include "llvm/Support/ARMTargetParser.def" +}; + +// List of HWDiv names (use getHWDivSynonym) and which architectural +// features they correspond to (use getHWDivFeatures). +// FIXME: TableGen this. +static const struct { + const char *NameCStr; + size_t NameLength; + unsigned ID; + + StringRef getName() const { return StringRef(NameCStr, NameLength); } +} HWDivNames[] = { +#define ARM_HW_DIV_NAME(NAME, ID) { NAME, sizeof(NAME) - 1, ID }, +#include "llvm/Support/ARMTargetParser.def" +}; + +// List of CPU names and their arches. +// The same CPU can have multiple arches and can be default on multiple arches. +// When finding the Arch for a CPU, first-found prevails. Sort them accordingly. +// When this becomes table-generated, we'd probably need two tables. +// FIXME: TableGen this. +static const struct { + const char *NameCStr; + size_t NameLength; + ARM::ArchKind ArchID; + bool Default; // is $Name the default CPU for $ArchID ? + unsigned DefaultExtensions; + + StringRef getName() const { return StringRef(NameCStr, NameLength); } +} CPUNames[] = { +#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \ + { NAME, sizeof(NAME) - 1, ID, IS_DEFAULT, DEFAULT_EXT }, +#include "llvm/Support/ARMTargetParser.def" +}; + +} // namespace + +// ======================================================= // +// Information by ID +// ======================================================= // + +StringRef llvm_ks::ARM::getFPUName(unsigned FPUKind) { + if (FPUKind >= ARM::FK_LAST) + return StringRef(); + return FPUNames[FPUKind].getName(); +} + +unsigned llvm_ks::ARM::getFPUVersion(unsigned FPUKind) { + if (FPUKind >= ARM::FK_LAST) + return 0; + return FPUNames[FPUKind].FPUVersion; +} + +unsigned llvm_ks::ARM::getFPUNeonSupportLevel(unsigned FPUKind) { + if (FPUKind >= ARM::FK_LAST) + return 0; + return FPUNames[FPUKind].NeonSupport; +} + +unsigned llvm_ks::ARM::getFPURestriction(unsigned FPUKind) { + if (FPUKind >= ARM::FK_LAST) + return 0; + return FPUNames[FPUKind].Restriction; +} + +unsigned llvm_ks::ARM::getDefaultFPU(StringRef CPU, unsigned ArchKind) { + if (CPU == "generic") + return ARCHNames[ArchKind].DefaultFPU; + + return StringSwitch(CPU) +#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \ + .Case(NAME, DEFAULT_FPU) +#include "llvm/Support/ARMTargetParser.def" + .Default(ARM::FK_INVALID); +} + +unsigned llvm_ks::ARM::getDefaultExtensions(StringRef CPU, unsigned ArchKind) { + if (CPU == "generic") + return ARCHNames[ArchKind].ArchBaseExtensions; + + return StringSwitch(CPU) +#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \ + .Case(NAME, ARCHNames[ID].ArchBaseExtensions | DEFAULT_EXT) +#include "llvm/Support/ARMTargetParser.def" + .Default(ARM::AEK_INVALID); +} + +bool llvm_ks::ARM::getHWDivFeatures(unsigned HWDivKind, + std::vector &Features) { + + if (HWDivKind == ARM::AEK_INVALID) + return false; + + if (HWDivKind & ARM::AEK_HWDIVARM) + Features.push_back("+hwdiv-arm"); + else + Features.push_back("-hwdiv-arm"); + + if (HWDivKind & ARM::AEK_HWDIV) + Features.push_back("+hwdiv"); + else + Features.push_back("-hwdiv"); + + return true; +} + +bool llvm_ks::ARM::getExtensionFeatures(unsigned Extensions, + std::vector &Features) { + + if (Extensions == ARM::AEK_INVALID) + return false; + + if (Extensions & ARM::AEK_CRC) + Features.push_back("+crc"); + else + Features.push_back("-crc"); + + if (Extensions & ARM::AEK_DSP) + Features.push_back("+dsp"); + else + Features.push_back("-dsp"); + + return getHWDivFeatures(Extensions, Features); +} + +bool llvm_ks::ARM::getFPUFeatures(unsigned FPUKind, + std::vector &Features) { + + if (FPUKind >= ARM::FK_LAST || FPUKind == ARM::FK_INVALID) + return false; + + // fp-only-sp and d16 subtarget features are independent of each other, so we + // must enable/disable both. + switch (FPUNames[FPUKind].Restriction) { + case ARM::FR_SP_D16: + Features.push_back("+fp-only-sp"); + Features.push_back("+d16"); + break; + case ARM::FR_D16: + Features.push_back("-fp-only-sp"); + Features.push_back("+d16"); + break; + case ARM::FR_None: + Features.push_back("-fp-only-sp"); + Features.push_back("-d16"); + break; + } + + // FPU version subtarget features are inclusive of lower-numbered ones, so + // enable the one corresponding to this version and disable all that are + // higher. We also have to make sure to disable fp16 when vfp4 is disabled, + // as +vfp4 implies +fp16 but -vfp4 does not imply -fp16. + switch (FPUNames[FPUKind].FPUVersion) { + case ARM::FV_VFPV5: + Features.push_back("+fp-armv8"); + break; + case ARM::FV_VFPV4: + Features.push_back("+vfp4"); + Features.push_back("-fp-armv8"); + break; + case ARM::FV_VFPV3_FP16: + Features.push_back("+vfp3"); + Features.push_back("+fp16"); + Features.push_back("-vfp4"); + Features.push_back("-fp-armv8"); + break; + case ARM::FV_VFPV3: + Features.push_back("+vfp3"); + Features.push_back("-fp16"); + Features.push_back("-vfp4"); + Features.push_back("-fp-armv8"); + break; + case ARM::FV_VFPV2: + Features.push_back("+vfp2"); + Features.push_back("-vfp3"); + Features.push_back("-fp16"); + Features.push_back("-vfp4"); + Features.push_back("-fp-armv8"); + break; + case ARM::FV_NONE: + Features.push_back("-vfp2"); + Features.push_back("-vfp3"); + Features.push_back("-fp16"); + Features.push_back("-vfp4"); + Features.push_back("-fp-armv8"); + break; + } + + // crypto includes neon, so we handle this similarly to FPU version. + switch (FPUNames[FPUKind].NeonSupport) { + case ARM::NS_Crypto: + Features.push_back("+neon"); + Features.push_back("+crypto"); + break; + case ARM::NS_Neon: + Features.push_back("+neon"); + Features.push_back("-crypto"); + break; + case ARM::NS_None: + Features.push_back("-neon"); + Features.push_back("-crypto"); + break; + } + + return true; +} + +StringRef llvm_ks::ARM::getArchName(unsigned ArchKind) { + if (ArchKind >= ARM::AK_LAST) + return StringRef(); + return ARCHNames[ArchKind].getName(); +} + +StringRef llvm_ks::ARM::getCPUAttr(unsigned ArchKind) { + if (ArchKind >= ARM::AK_LAST) + return StringRef(); + return ARCHNames[ArchKind].getCPUAttr(); +} + +StringRef llvm_ks::ARM::getSubArch(unsigned ArchKind) { + if (ArchKind >= ARM::AK_LAST) + return StringRef(); + return ARCHNames[ArchKind].getSubArch(); +} + +unsigned llvm_ks::ARM::getArchAttr(unsigned ArchKind) { + if (ArchKind >= ARM::AK_LAST) + return ARMBuildAttrs::CPUArch::Pre_v4; + return ARCHNames[ArchKind].ArchAttr; +} + +StringRef llvm_ks::ARM::getArchExtName(unsigned ArchExtKind) { + for (const auto AE : ARCHExtNames) { + if (ArchExtKind == AE.ID) + return AE.getName(); + } + return StringRef(); +} + +const char *llvm_ks::ARM::getArchExtFeature(StringRef ArchExt) { + if (ArchExt.startswith("no")) { + StringRef ArchExtBase(ArchExt.substr(2)); + for (const auto AE : ARCHExtNames) { + if (AE.NegFeature && ArchExtBase == AE.getName()) + return AE.NegFeature; + } + } + for (const auto AE : ARCHExtNames) { + if (AE.Feature && ArchExt == AE.getName()) + return AE.Feature; + } + + return nullptr; +} + +StringRef llvm_ks::ARM::getHWDivName(unsigned HWDivKind) { + for (const auto D : HWDivNames) { + if (HWDivKind == D.ID) + return D.getName(); + } + return StringRef(); +} + +StringRef llvm_ks::ARM::getDefaultCPU(StringRef Arch) { + unsigned AK = parseArch(Arch); + if (AK == ARM::AK_INVALID) + return StringRef(); + + // Look for multiple AKs to find the default for pair AK+Name. + for (const auto CPU : CPUNames) { + if (CPU.ArchID == AK && CPU.Default) + return CPU.getName(); + } + + // If we can't find a default then target the architecture instead + return "generic"; +} + +// ======================================================= // +// Parsers +// ======================================================= // + +static StringRef getHWDivSynonym(StringRef HWDiv) { + return StringSwitch(HWDiv) + .Case("thumb,arm", "arm,thumb") + .Default(HWDiv); +} + +static StringRef getFPUSynonym(StringRef FPU) { + return StringSwitch(FPU) + .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported + .Case("vfp2", "vfpv2") + .Case("vfp3", "vfpv3") + .Case("vfp4", "vfpv4") + .Case("vfp3-d16", "vfpv3-d16") + .Case("vfp4-d16", "vfpv4-d16") + .Cases("fp4-sp-d16", "vfpv4-sp-d16", "fpv4-sp-d16") + .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16") + .Case("fp5-sp-d16", "fpv5-sp-d16") + .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16") + // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3. + .Case("neon-vfpv3", "neon") + .Default(FPU); +} + +static StringRef getArchSynonym(StringRef Arch) { + return StringSwitch(Arch) + .Case("v5", "v5t") + .Case("v5e", "v5te") + .Case("v6j", "v6") + .Case("v6hl", "v6k") + .Cases("v6m", "v6sm", "v6s-m", "v6-m") + .Cases("v6z", "v6zk", "v6kz") + .Cases("v7", "v7a", "v7hl", "v7l", "v7-a") + .Case("v7r", "v7-r") + .Case("v7m", "v7-m") + .Case("v7em", "v7e-m") + .Cases("v8", "v8a", "aarch64", "arm64", "v8-a") + .Case("v8.1a", "v8.1-a") + .Case("v8.2a", "v8.2-a") + .Case("v8m.base", "v8-m.base") + .Case("v8m.main", "v8-m.main") + .Default(Arch); +} + +// MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but +// (iwmmxt|xscale)(eb)? is also permitted. If the former, return +// "v.+", if the latter, return unmodified string, minus 'eb'. +// If invalid, return empty string. +StringRef llvm_ks::ARM::getCanonicalArchName(StringRef Arch) { + size_t offset = StringRef::npos; + StringRef A = Arch; + StringRef Error = ""; + + // Begins with "arm" / "thumb", move past it. + if (A.startswith("arm64")) + offset = 5; + else if (A.startswith("arm")) + offset = 3; + else if (A.startswith("thumb")) + offset = 5; + else if (A.startswith("aarch64")) { + offset = 7; + // AArch64 uses "_be", not "eb" suffix. + if (A.find("eb") != StringRef::npos) + return Error; + if (A.substr(offset, 3) == "_be") + offset += 3; + } + + // Ex. "armebv7", move past the "eb". + if (offset != StringRef::npos && A.substr(offset, 2) == "eb") + offset += 2; + // Or, if it ends with eb ("armv7eb"), chop it off. + else if (A.endswith("eb")) + A = A.substr(0, A.size() - 2); + // Trim the head + if (offset != StringRef::npos) + A = A.substr(offset); + + // Empty string means offset reached the end, which means it's valid. + if (A.empty()) + return Arch; + + // Only match non-marketing names + if (offset != StringRef::npos) { + // Must start with 'vN'. + if (A[0] != 'v' || !std::isdigit(A[1])) + return Error; + // Can't have an extra 'eb'. + if (A.find("eb") != StringRef::npos) + return Error; + } + + // Arch will either be a 'v' name (v7a) or a marketing name (xscale). + return A; +} + +unsigned llvm_ks::ARM::parseHWDiv(StringRef HWDiv) { + StringRef Syn = getHWDivSynonym(HWDiv); + for (const auto D : HWDivNames) { + if (Syn == D.getName()) + return D.ID; + } + return ARM::AEK_INVALID; +} + +unsigned llvm_ks::ARM::parseFPU(StringRef FPU) { + StringRef Syn = getFPUSynonym(FPU); + for (const auto F : FPUNames) { + if (Syn == F.getName()) + return F.ID; + } + return ARM::FK_INVALID; +} + +// Allows partial match, ex. "v7a" matches "armv7a". +unsigned llvm_ks::ARM::parseArch(StringRef Arch) { + Arch = getCanonicalArchName(Arch); + StringRef Syn = getArchSynonym(Arch); + for (const auto A : ARCHNames) { + if (A.getName().endswith(Syn)) + return A.ID; + } + return ARM::AK_INVALID; +} + +unsigned llvm_ks::ARM::parseArchExt(StringRef ArchExt) { + for (const auto A : ARCHExtNames) { + if (ArchExt == A.getName()) + return A.ID; + } + return ARM::AEK_INVALID; +} + +unsigned llvm_ks::ARM::parseCPUArch(StringRef CPU) { + for (const auto C : CPUNames) { + if (CPU == C.getName()) + return C.ArchID; + } + return ARM::AK_INVALID; +} + +// ARM, Thumb, AArch64 +unsigned llvm_ks::ARM::parseArchISA(StringRef Arch) { + return StringSwitch(Arch) + .StartsWith("aarch64", ARM::IK_AARCH64) + .StartsWith("arm64", ARM::IK_AARCH64) + .StartsWith("thumb", ARM::IK_THUMB) + .StartsWith("arm", ARM::IK_ARM) + .Default(ARM::EK_INVALID); +} + +// Little/Big endian +unsigned llvm_ks::ARM::parseArchEndian(StringRef Arch) { + if (Arch.startswith("armeb") || Arch.startswith("thumbeb") || + Arch.startswith("aarch64_be")) + return ARM::EK_BIG; + + if (Arch.startswith("arm") || Arch.startswith("thumb")) { + if (Arch.endswith("eb")) + return ARM::EK_BIG; + else + return ARM::EK_LITTLE; + } + + if (Arch.startswith("aarch64")) + return ARM::EK_LITTLE; + + return ARM::EK_INVALID; +} + +// Profile A/R/M +unsigned llvm_ks::ARM::parseArchProfile(StringRef Arch) { + Arch = getCanonicalArchName(Arch); + switch (parseArch(Arch)) { + case ARM::AK_ARMV6M: + case ARM::AK_ARMV7M: + case ARM::AK_ARMV7EM: + case ARM::AK_ARMV8MMainline: + case ARM::AK_ARMV8MBaseline: + return ARM::PK_M; + case ARM::AK_ARMV7R: + return ARM::PK_R; + case ARM::AK_ARMV7A: + case ARM::AK_ARMV7K: + case ARM::AK_ARMV8A: + case ARM::AK_ARMV8_1A: + case ARM::AK_ARMV8_2A: + return ARM::PK_A; + } + return ARM::PK_INVALID; +} + +// Version number (ex. v7 = 7). +unsigned llvm_ks::ARM::parseArchVersion(StringRef Arch) { + Arch = getCanonicalArchName(Arch); + switch (parseArch(Arch)) { + case ARM::AK_ARMV2: + case ARM::AK_ARMV2A: + return 2; + case ARM::AK_ARMV3: + case ARM::AK_ARMV3M: + return 3; + case ARM::AK_ARMV4: + case ARM::AK_ARMV4T: + return 4; + case ARM::AK_ARMV5T: + case ARM::AK_ARMV5TE: + case ARM::AK_IWMMXT: + case ARM::AK_IWMMXT2: + case ARM::AK_XSCALE: + case ARM::AK_ARMV5TEJ: + return 5; + case ARM::AK_ARMV6: + case ARM::AK_ARMV6K: + case ARM::AK_ARMV6T2: + case ARM::AK_ARMV6KZ: + case ARM::AK_ARMV6M: + return 6; + case ARM::AK_ARMV7A: + case ARM::AK_ARMV7R: + case ARM::AK_ARMV7M: + case ARM::AK_ARMV7S: + case ARM::AK_ARMV7EM: + case ARM::AK_ARMV7K: + return 7; + case ARM::AK_ARMV8A: + case ARM::AK_ARMV8_1A: + case ARM::AK_ARMV8_2A: + case ARM::AK_ARMV8MBaseline: + case ARM::AK_ARMV8MMainline: + return 8; + } + return 0; +} diff --git a/llvm/lib/Support/TargetRegistry.cpp b/llvm/lib/Support/TargetRegistry.cpp new file mode 100644 index 0000000..e669ce7 --- /dev/null +++ b/llvm/lib/Support/TargetRegistry.cpp @@ -0,0 +1,134 @@ +//===--- TargetRegistry.cpp - Target registration -------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/Support/TargetRegistry.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/raw_ostream.h" +#include +#include +using namespace llvm_ks; + +// Clients are responsible for avoid race conditions in registration. +static Target *FirstTarget = nullptr; + +iterator_range TargetRegistry::targets() { + return make_range(iterator(FirstTarget), iterator()); +} + +const Target *TargetRegistry::lookupTarget(const std::string &ArchName, + Triple &TheTriple, + std::string &Error) { + // Allocate target machine. First, check whether the user has explicitly + // specified an architecture to compile for. If so we have to look it up by + // name, because it might be a backend that has no mapping to a target triple. + const Target *TheTarget = nullptr; + if (!ArchName.empty()) { + auto I = + std::find_if(targets().begin(), targets().end(), + [&](const Target &T) { return ArchName == T.getName(); }); + + if (I == targets().end()) { + Error = "error: invalid target '" + ArchName + "'.\n"; + return nullptr; + } + + TheTarget = &*I; + + // Adjust the triple to match (if known), otherwise stick with the + // given triple. + Triple::ArchType Type = Triple::getArchTypeForLLVMName(ArchName); + if (Type != Triple::UnknownArch) + TheTriple.setArch(Type); + } else { + // Get the target specific parser. + std::string TempError; + TheTarget = TargetRegistry::lookupTarget(TheTriple.getTriple(), TempError); + if (!TheTarget) { + Error = ": error: unable to get target for '" + + TheTriple.getTriple() + + "', see --version and --triple.\n"; + return nullptr; + } + } + + return TheTarget; +} + +const Target *TargetRegistry::lookupTarget(const std::string &TT, + std::string &Error) { + // Provide special warning when no targets are initialized. + if (targets().begin() == targets().end()) { + Error = "Unable to find target for this triple (no targets are registered)"; + return nullptr; + } + Triple::ArchType Arch = Triple(TT).getArch(); + auto ArchMatch = [&](const Target &T) { return T.ArchMatchFn(Arch); }; + auto I = std::find_if(targets().begin(), targets().end(), ArchMatch); + + if (I == targets().end()) { + Error = "No available targets are compatible with this triple."; + return nullptr; + } + + auto J = std::find_if(std::next(I), targets().end(), ArchMatch); + if (J != targets().end()) { + Error = std::string("Cannot choose between targets \"") + I->Name + + "\" and \"" + J->Name + "\""; + return nullptr; + } + + return &*I; +} + +void TargetRegistry::RegisterTarget(Target &T, + const char *Name, + const char *ShortDesc, + Target::ArchMatchFnTy ArchMatchFn) { + assert(Name && ShortDesc && ArchMatchFn && + "Missing required target information!"); + + // Check if this target has already been initialized, we allow this as a + // convenience to some clients. + if (T.Name) + return; + + // Add to the list of targets. + T.Next = FirstTarget; + FirstTarget = &T; + + T.Name = Name; + T.ShortDesc = ShortDesc; + T.ArchMatchFn = ArchMatchFn; +} + +static int TargetArraySortFn(const std::pair *LHS, + const std::pair *RHS) { + return LHS->first.compare(RHS->first); +} + +void TargetRegistry::printRegisteredTargetsForVersion() { + std::vector > Targets; + size_t Width = 0; + for (const auto &T : TargetRegistry::targets()) { + Targets.push_back(std::make_pair(T.getName(), &T)); + Width = std::max(Width, Targets.back().first.size()); + } + array_pod_sort(Targets.begin(), Targets.end(), TargetArraySortFn); + + raw_ostream &OS = outs(); + OS << " Registered Targets:\n"; + for (unsigned i = 0, e = Targets.size(); i != e; ++i) { + OS << " " << Targets[i].first; + OS.indent(Width - Targets[i].first.size()) << " - " + << Targets[i].second->getShortDescription() << '\n'; + } + if (Targets.empty()) + OS << " (none)\n"; +} diff --git a/llvm/lib/Support/Triple.cpp b/llvm/lib/Support/Triple.cpp new file mode 100644 index 0000000..98913c7 --- /dev/null +++ b/llvm/lib/Support/Triple.cpp @@ -0,0 +1,1445 @@ +//===--- Triple.cpp - Target triple helper class --------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/Triple.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/SmallString.h" +#include "llvm/ADT/StringSwitch.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/TargetParser.h" +#include "llvm/Support/Host.h" +#include +using namespace llvm_ks; + +const char *Triple::getArchTypeName(ArchType Kind) { + switch (Kind) { + case UnknownArch: return "unknown"; + + case aarch64: return "aarch64"; + case aarch64_be: return "aarch64_be"; + case arm: return "arm"; + case armeb: return "armeb"; + case avr: return "avr"; + case bpfel: return "bpfel"; + case bpfeb: return "bpfeb"; + case hexagon: return "hexagon"; + case mips: return "mips"; + case mipsel: return "mipsel"; + case mips64: return "mips64"; + case mips64el: return "mips64el"; + case msp430: return "msp430"; + case ppc64: return "powerpc64"; + case ppc64le: return "powerpc64le"; + case ppc: return "powerpc"; + case r600: return "r600"; + case amdgcn: return "amdgcn"; + case sparc: return "sparc"; + case sparcv9: return "sparcv9"; + case sparcel: return "sparcel"; + case systemz: return "s390x"; + case tce: return "tce"; + case thumb: return "thumb"; + case thumbeb: return "thumbeb"; + case x86: return "i386"; + case x86_64: return "x86_64"; + case xcore: return "xcore"; + case nvptx: return "nvptx"; + case nvptx64: return "nvptx64"; + case le32: return "le32"; + case le64: return "le64"; + case amdil: return "amdil"; + case amdil64: return "amdil64"; + case hsail: return "hsail"; + case hsail64: return "hsail64"; + case spir: return "spir"; + case spir64: return "spir64"; + case kalimba: return "kalimba"; + case shave: return "shave"; + case wasm32: return "wasm32"; + case wasm64: return "wasm64"; + } + + llvm_unreachable("Invalid ArchType!"); +} + +const char *Triple::getArchTypePrefix(ArchType Kind) { + switch (Kind) { + default: + return nullptr; + + case aarch64: + case aarch64_be: return "aarch64"; + + case arm: + case armeb: + case thumb: + case thumbeb: return "arm"; + + case avr: return "avr"; + + case ppc64: + case ppc64le: + case ppc: return "ppc"; + + case mips: + case mipsel: + case mips64: + case mips64el: return "mips"; + + case hexagon: return "hexagon"; + + case amdgcn: return "amdgcn"; + case r600: return "r600"; + + case bpfel: + case bpfeb: return "bpf"; + + case sparcv9: + case sparcel: + case sparc: return "sparc"; + + case systemz: return "s390"; + + case x86: + case x86_64: return "x86"; + + case xcore: return "xcore"; + + case nvptx: return "nvptx"; + case nvptx64: return "nvptx"; + + case le32: return "le32"; + case le64: return "le64"; + + case amdil: + case amdil64: return "amdil"; + + case hsail: + case hsail64: return "hsail"; + + case spir: + case spir64: return "spir"; + case kalimba: return "kalimba"; + case shave: return "shave"; + case wasm32: + case wasm64: return "wasm"; + } +} + +const char *Triple::getVendorTypeName(VendorType Kind) { + switch (Kind) { + case UnknownVendor: return "unknown"; + + case Apple: return "apple"; + case PC: return "pc"; + case SCEI: return "scei"; + case BGP: return "bgp"; + case BGQ: return "bgq"; + case Freescale: return "fsl"; + case IBM: return "ibm"; + case ImaginationTechnologies: return "img"; + case MipsTechnologies: return "mti"; + case NVIDIA: return "nvidia"; + case CSR: return "csr"; + case Myriad: return "myriad"; + } + + llvm_unreachable("Invalid VendorType!"); +} + +const char *Triple::getOSTypeName(OSType Kind) { + switch (Kind) { + case UnknownOS: return "unknown"; + + case CloudABI: return "cloudabi"; + case Darwin: return "darwin"; + case DragonFly: return "dragonfly"; + case FreeBSD: return "freebsd"; + case IOS: return "ios"; + case KFreeBSD: return "kfreebsd"; + case Linux: return "linux"; + case Lv2: return "lv2"; + case MacOSX: return "macosx"; + case NetBSD: return "netbsd"; + case OpenBSD: return "openbsd"; + case Solaris: return "solaris"; + case Win32: return "windows"; + case Haiku: return "haiku"; + case Minix: return "minix"; + case RTEMS: return "rtems"; + case NaCl: return "nacl"; + case CNK: return "cnk"; + case Bitrig: return "bitrig"; + case AIX: return "aix"; + case CUDA: return "cuda"; + case NVCL: return "nvcl"; + case AMDHSA: return "amdhsa"; + case PS4: return "ps4"; + case ELFIAMCU: return "elfiamcu"; + case TvOS: return "tvos"; + case WatchOS: return "watchos"; + } + + llvm_unreachable("Invalid OSType"); +} + +const char *Triple::getEnvironmentTypeName(EnvironmentType Kind) { + switch (Kind) { + case UnknownEnvironment: return "unknown"; + case GNU: return "gnu"; + case GNUEABIHF: return "gnueabihf"; + case GNUEABI: return "gnueabi"; + case GNUX32: return "gnux32"; + case CODE16: return "code16"; + case EABI: return "eabi"; + case EABIHF: return "eabihf"; + case Android: return "android"; + case MSVC: return "msvc"; + case Itanium: return "itanium"; + case Cygnus: return "cygnus"; + case AMDOpenCL: return "amdopencl"; + case CoreCLR: return "coreclr"; + } + + llvm_unreachable("Invalid EnvironmentType!"); +} + +static Triple::ArchType parseBPFArch(StringRef ArchName) { + if (ArchName.equals("bpf")) { + if (sys::IsLittleEndianHost) + return Triple::bpfel; + else + return Triple::bpfeb; + } else if (ArchName.equals("bpf_be") || ArchName.equals("bpfeb")) { + return Triple::bpfeb; + } else if (ArchName.equals("bpf_le") || ArchName.equals("bpfel")) { + return Triple::bpfel; + } else { + return Triple::UnknownArch; + } +} + +Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) { + Triple::ArchType BPFArch(parseBPFArch(Name)); + return StringSwitch(Name) + .Case("aarch64", aarch64) + .Case("aarch64_be", aarch64_be) + .Case("arm64", aarch64) // "arm64" is an alias for "aarch64" + .Case("arm", arm) + .Case("armeb", armeb) + .Case("avr", avr) + .StartsWith("bpf", BPFArch) + .Case("mips", mips) + .Case("mipsel", mipsel) + .Case("mips64", mips64) + .Case("mips64el", mips64el) + .Case("msp430", msp430) + .Case("ppc64", ppc64) + .Case("ppc32", ppc) + .Case("ppc", ppc) + .Case("ppc64le", ppc64le) + .Case("r600", r600) + .Case("amdgcn", amdgcn) + .Case("hexagon", hexagon) + .Case("sparc", sparc) + .Case("sparcel", sparcel) + .Case("sparcv9", sparcv9) + .Case("systemz", systemz) + .Case("tce", tce) + .Case("thumb", thumb) + .Case("thumbeb", thumbeb) + .Case("x86", x86) + .Case("x86-64", x86_64) + .Case("xcore", xcore) + .Case("nvptx", nvptx) + .Case("nvptx64", nvptx64) + .Case("le32", le32) + .Case("le64", le64) + .Case("amdil", amdil) + .Case("amdil64", amdil64) + .Case("hsail", hsail) + .Case("hsail64", hsail64) + .Case("spir", spir) + .Case("spir64", spir64) + .Case("kalimba", kalimba) + .Case("shave", shave) + .Case("wasm32", wasm32) + .Case("wasm64", wasm64) + .Default(UnknownArch); +} + +static Triple::ArchType parseARMArch(StringRef ArchName) { + unsigned ISA = ARM::parseArchISA(ArchName); + unsigned ENDIAN = ARM::parseArchEndian(ArchName); + + Triple::ArchType arch = Triple::UnknownArch; + switch (ENDIAN) { + case ARM::EK_LITTLE: { + switch (ISA) { + case ARM::IK_ARM: + arch = Triple::arm; + break; + case ARM::IK_THUMB: + arch = Triple::thumb; + break; + case ARM::IK_AARCH64: + arch = Triple::aarch64; + break; + } + break; + } + case ARM::EK_BIG: { + switch (ISA) { + case ARM::IK_ARM: + arch = Triple::armeb; + break; + case ARM::IK_THUMB: + arch = Triple::thumbeb; + break; + case ARM::IK_AARCH64: + arch = Triple::aarch64_be; + break; + } + break; + } + } + + ArchName = ARM::getCanonicalArchName(ArchName); + if (ArchName.empty()) + return Triple::UnknownArch; + + // Thumb only exists in v4+ + if (ISA == ARM::IK_THUMB && + (ArchName.startswith("v2") || ArchName.startswith("v3"))) + return Triple::UnknownArch; + + // Thumb only for v6m + unsigned Profile = ARM::parseArchProfile(ArchName); + unsigned Version = ARM::parseArchVersion(ArchName); + if (Profile == ARM::PK_M && Version == 6) { + if (ENDIAN == ARM::EK_BIG) + return Triple::thumbeb; + else + return Triple::thumb; + } + + return arch; +} + +static Triple::ArchType parseArch(StringRef ArchName) { + auto AT = StringSwitch(ArchName) + .Cases("i386", "i486", "i586", "i686", Triple::x86) + // FIXME: Do we need to support these? + .Cases("i786", "i886", "i986", Triple::x86) + .Cases("amd64", "x86_64", "x86_64h", Triple::x86_64) + .Cases("powerpc", "ppc32", Triple::ppc) + .Cases("powerpc64", "ppu", "ppc64", Triple::ppc64) + .Cases("powerpc64le", "ppc64le", Triple::ppc64le) + .Case("xscale", Triple::arm) + .Case("xscaleeb", Triple::armeb) + .Case("aarch64", Triple::aarch64) + .Case("aarch64_be", Triple::aarch64_be) + .Case("arm64", Triple::aarch64) + .Case("arm", Triple::arm) + .Case("armeb", Triple::armeb) + .Case("thumb", Triple::thumb) + .Case("thumbeb", Triple::thumbeb) + .Case("avr", Triple::avr) + .Case("msp430", Triple::msp430) + .Cases("mips", "mipseb", "mipsallegrex", Triple::mips) + .Cases("mipsel", "mipsallegrexel", Triple::mipsel) + .Cases("mips64", "mips64eb", Triple::mips64) + .Case("mips64el", Triple::mips64el) + .Case("r600", Triple::r600) + .Case("amdgcn", Triple::amdgcn) + .Case("hexagon", Triple::hexagon) + .Cases("s390x", "systemz", Triple::systemz) + .Case("sparc", Triple::sparc) + .Case("sparcel", Triple::sparcel) + .Cases("sparcv9", "sparc64", Triple::sparcv9) + .Case("tce", Triple::tce) + .Case("xcore", Triple::xcore) + .Case("nvptx", Triple::nvptx) + .Case("nvptx64", Triple::nvptx64) + .Case("le32", Triple::le32) + .Case("le64", Triple::le64) + .Case("amdil", Triple::amdil) + .Case("amdil64", Triple::amdil64) + .Case("hsail", Triple::hsail) + .Case("hsail64", Triple::hsail64) + .Case("spir", Triple::spir) + .Case("spir64", Triple::spir64) + .StartsWith("kalimba", Triple::kalimba) + .Case("shave", Triple::shave) + .Case("wasm32", Triple::wasm32) + .Case("wasm64", Triple::wasm64) + .Default(Triple::UnknownArch); + + // Some architectures require special parsing logic just to compute the + // ArchType result. + if (AT == Triple::UnknownArch) { + if (ArchName.startswith("arm") || ArchName.startswith("thumb") || + ArchName.startswith("aarch64")) + return parseARMArch(ArchName); + if (ArchName.startswith("bpf")) + return parseBPFArch(ArchName); + } + + return AT; +} + +static Triple::VendorType parseVendor(StringRef VendorName) { + return StringSwitch(VendorName) + .Case("apple", Triple::Apple) + .Case("pc", Triple::PC) + .Case("scei", Triple::SCEI) + .Case("bgp", Triple::BGP) + .Case("bgq", Triple::BGQ) + .Case("fsl", Triple::Freescale) + .Case("ibm", Triple::IBM) + .Case("img", Triple::ImaginationTechnologies) + .Case("mti", Triple::MipsTechnologies) + .Case("nvidia", Triple::NVIDIA) + .Case("csr", Triple::CSR) + .Case("myriad", Triple::Myriad) + .Default(Triple::UnknownVendor); +} + +static Triple::OSType parseOS(StringRef OSName) { + return StringSwitch(OSName) + .StartsWith("cloudabi", Triple::CloudABI) + .StartsWith("darwin", Triple::Darwin) + .StartsWith("dragonfly", Triple::DragonFly) + .StartsWith("freebsd", Triple::FreeBSD) + .StartsWith("ios", Triple::IOS) + .StartsWith("kfreebsd", Triple::KFreeBSD) + .StartsWith("linux", Triple::Linux) + .StartsWith("lv2", Triple::Lv2) + .StartsWith("macosx", Triple::MacOSX) + .StartsWith("netbsd", Triple::NetBSD) + .StartsWith("openbsd", Triple::OpenBSD) + .StartsWith("solaris", Triple::Solaris) + .StartsWith("win32", Triple::Win32) + .StartsWith("windows", Triple::Win32) + .StartsWith("haiku", Triple::Haiku) + .StartsWith("minix", Triple::Minix) + .StartsWith("rtems", Triple::RTEMS) + .StartsWith("nacl", Triple::NaCl) + .StartsWith("cnk", Triple::CNK) + .StartsWith("bitrig", Triple::Bitrig) + .StartsWith("aix", Triple::AIX) + .StartsWith("cuda", Triple::CUDA) + .StartsWith("nvcl", Triple::NVCL) + .StartsWith("amdhsa", Triple::AMDHSA) + .StartsWith("ps4", Triple::PS4) + .StartsWith("elfiamcu", Triple::ELFIAMCU) + .StartsWith("tvos", Triple::TvOS) + .StartsWith("watchos", Triple::WatchOS) + .Default(Triple::UnknownOS); +} + +static Triple::EnvironmentType parseEnvironment(StringRef EnvironmentName) { + return StringSwitch(EnvironmentName) + .StartsWith("eabihf", Triple::EABIHF) + .StartsWith("eabi", Triple::EABI) + .StartsWith("gnueabihf", Triple::GNUEABIHF) + .StartsWith("gnueabi", Triple::GNUEABI) + .StartsWith("gnux32", Triple::GNUX32) + .StartsWith("code16", Triple::CODE16) + .StartsWith("gnu", Triple::GNU) + .StartsWith("android", Triple::Android) + .StartsWith("msvc", Triple::MSVC) + .StartsWith("itanium", Triple::Itanium) + .StartsWith("cygnus", Triple::Cygnus) + .StartsWith("amdopencl", Triple::AMDOpenCL) + .StartsWith("coreclr", Triple::CoreCLR) + .Default(Triple::UnknownEnvironment); +} + +static Triple::ObjectFormatType parseFormat(StringRef EnvironmentName) { + return StringSwitch(EnvironmentName) + .EndsWith("coff", Triple::COFF) + .EndsWith("elf", Triple::ELF) + .EndsWith("macho", Triple::MachO) + .Default(Triple::UnknownObjectFormat); +} + +static Triple::SubArchType parseSubArch(StringRef SubArchName) { + StringRef ARMSubArch = ARM::getCanonicalArchName(SubArchName); + + // For now, this is the small part. Early return. + if (ARMSubArch.empty()) + return StringSwitch(SubArchName) + .EndsWith("kalimba3", Triple::KalimbaSubArch_v3) + .EndsWith("kalimba4", Triple::KalimbaSubArch_v4) + .EndsWith("kalimba5", Triple::KalimbaSubArch_v5) + .Default(Triple::NoSubArch); + + // ARM sub arch. + switch(ARM::parseArch(ARMSubArch)) { + case ARM::AK_ARMV4: + return Triple::NoSubArch; + case ARM::AK_ARMV4T: + return Triple::ARMSubArch_v4t; + case ARM::AK_ARMV5T: + return Triple::ARMSubArch_v5; + case ARM::AK_ARMV5TE: + case ARM::AK_IWMMXT: + case ARM::AK_IWMMXT2: + case ARM::AK_XSCALE: + case ARM::AK_ARMV5TEJ: + return Triple::ARMSubArch_v5te; + case ARM::AK_ARMV6: + return Triple::ARMSubArch_v6; + case ARM::AK_ARMV6K: + case ARM::AK_ARMV6KZ: + return Triple::ARMSubArch_v6k; + case ARM::AK_ARMV6T2: + return Triple::ARMSubArch_v6t2; + case ARM::AK_ARMV6M: + return Triple::ARMSubArch_v6m; + case ARM::AK_ARMV7A: + case ARM::AK_ARMV7R: + return Triple::ARMSubArch_v7; + case ARM::AK_ARMV7K: + return Triple::ARMSubArch_v7k; + case ARM::AK_ARMV7M: + return Triple::ARMSubArch_v7m; + case ARM::AK_ARMV7S: + return Triple::ARMSubArch_v7s; + case ARM::AK_ARMV7EM: + return Triple::ARMSubArch_v7em; + case ARM::AK_ARMV8A: + return Triple::ARMSubArch_v8; + case ARM::AK_ARMV8_1A: + return Triple::ARMSubArch_v8_1a; + case ARM::AK_ARMV8_2A: + return Triple::ARMSubArch_v8_2a; + case ARM::AK_ARMV8MBaseline: + return Triple::ARMSubArch_v8m_baseline; + case ARM::AK_ARMV8MMainline: + return Triple::ARMSubArch_v8m_mainline; + default: + return Triple::NoSubArch; + } +} + +static const char *getObjectFormatTypeName(Triple::ObjectFormatType Kind) { + switch (Kind) { + case Triple::UnknownObjectFormat: return ""; + case Triple::COFF: return "coff"; + case Triple::ELF: return "elf"; + case Triple::MachO: return "macho"; + } + llvm_unreachable("unknown object format type"); +} + +static Triple::ObjectFormatType getDefaultFormat(const Triple &T) { + switch (T.getArch()) { + case Triple::UnknownArch: + case Triple::aarch64: + case Triple::arm: + case Triple::thumb: + case Triple::x86: + case Triple::x86_64: + if (T.isOSDarwin()) + return Triple::MachO; + else if (T.isOSWindows()) + return Triple::COFF; + return Triple::ELF; + + case Triple::aarch64_be: + case Triple::amdgcn: + case Triple::amdil: + case Triple::amdil64: + case Triple::armeb: + case Triple::avr: + case Triple::bpfeb: + case Triple::bpfel: + case Triple::hexagon: + case Triple::hsail: + case Triple::hsail64: + case Triple::kalimba: + case Triple::le32: + case Triple::le64: + case Triple::mips: + case Triple::mips64: + case Triple::mips64el: + case Triple::mipsel: + case Triple::msp430: + case Triple::nvptx: + case Triple::nvptx64: + case Triple::ppc64le: + case Triple::r600: + case Triple::shave: + case Triple::sparc: + case Triple::sparcel: + case Triple::sparcv9: + case Triple::spir: + case Triple::spir64: + case Triple::systemz: + case Triple::tce: + case Triple::thumbeb: + case Triple::wasm32: + case Triple::wasm64: + case Triple::xcore: + return Triple::ELF; + + case Triple::ppc: + case Triple::ppc64: + if (T.isOSDarwin()) + return Triple::MachO; + return Triple::ELF; + } + llvm_unreachable("unknown architecture"); +} + +/// \brief Construct a triple from the string representation provided. +/// +/// This stores the string representation and parses the various pieces into +/// enum members. +Triple::Triple(const Twine &Str) + : Data(Str.str()), Arch(UnknownArch), SubArch(NoSubArch), + Vendor(UnknownVendor), OS(UnknownOS), Environment(UnknownEnvironment), + ObjectFormat(UnknownObjectFormat) { + // Do minimal parsing by hand here. + SmallVector Components; + StringRef(Data).split(Components, '-', /*MaxSplit*/ 3); + if (Components.size() > 0) { + Arch = parseArch(Components[0]); + SubArch = parseSubArch(Components[0]); + if (Components.size() > 1) { + Vendor = parseVendor(Components[1]); + if (Components.size() > 2) { + OS = parseOS(Components[2]); + if (Components.size() > 3) { + Environment = parseEnvironment(Components[3]); + ObjectFormat = parseFormat(Components[3]); + } + } + } + } + if (ObjectFormat == UnknownObjectFormat) + ObjectFormat = getDefaultFormat(*this); +} + +/// \brief Construct a triple from string representations of the architecture, +/// vendor, and OS. +/// +/// This joins each argument into a canonical string representation and parses +/// them into enum members. It leaves the environment unknown and omits it from +/// the string representation. +Triple::Triple(const Twine &ArchStr, const Twine &VendorStr, const Twine &OSStr) + : Data((ArchStr + Twine('-') + VendorStr + Twine('-') + OSStr).str()), + Arch(parseArch(ArchStr.str())), + SubArch(parseSubArch(ArchStr.str())), + Vendor(parseVendor(VendorStr.str())), + OS(parseOS(OSStr.str())), + Environment(), ObjectFormat(Triple::UnknownObjectFormat) { + ObjectFormat = getDefaultFormat(*this); +} + +/// \brief Construct a triple from string representations of the architecture, +/// vendor, OS, and environment. +/// +/// This joins each argument into a canonical string representation and parses +/// them into enum members. +Triple::Triple(const Twine &ArchStr, const Twine &VendorStr, const Twine &OSStr, + const Twine &EnvironmentStr) + : Data((ArchStr + Twine('-') + VendorStr + Twine('-') + OSStr + Twine('-') + + EnvironmentStr).str()), + Arch(parseArch(ArchStr.str())), + SubArch(parseSubArch(ArchStr.str())), + Vendor(parseVendor(VendorStr.str())), + OS(parseOS(OSStr.str())), + Environment(parseEnvironment(EnvironmentStr.str())), + ObjectFormat(parseFormat(EnvironmentStr.str())) { + if (ObjectFormat == Triple::UnknownObjectFormat) + ObjectFormat = getDefaultFormat(*this); +} + +std::string Triple::normalize(StringRef Str) { + bool IsMinGW32 = false; + bool IsCygwin = false; + + // Parse into components. + SmallVector Components; + Str.split(Components, '-'); + + // If the first component corresponds to a known architecture, preferentially + // use it for the architecture. If the second component corresponds to a + // known vendor, preferentially use it for the vendor, etc. This avoids silly + // component movement when a component parses as (eg) both a valid arch and a + // valid os. + ArchType Arch = UnknownArch; + if (Components.size() > 0) + Arch = parseArch(Components[0]); + VendorType Vendor = UnknownVendor; + if (Components.size() > 1) + Vendor = parseVendor(Components[1]); + OSType OS = UnknownOS; + if (Components.size() > 2) { + OS = parseOS(Components[2]); + IsCygwin = Components[2].startswith("cygwin"); + IsMinGW32 = Components[2].startswith("mingw"); + } + EnvironmentType Environment = UnknownEnvironment; + if (Components.size() > 3) + Environment = parseEnvironment(Components[3]); + ObjectFormatType ObjectFormat = UnknownObjectFormat; + if (Components.size() > 4) + ObjectFormat = parseFormat(Components[4]); + + // Note which components are already in their final position. These will not + // be moved. + bool Found[4]; + Found[0] = Arch != UnknownArch; + Found[1] = Vendor != UnknownVendor; + Found[2] = OS != UnknownOS; + Found[3] = Environment != UnknownEnvironment; + + // If they are not there already, permute the components into their canonical + // positions by seeing if they parse as a valid architecture, and if so moving + // the component to the architecture position etc. + for (unsigned Pos = 0; Pos != array_lengthof(Found); ++Pos) { + if (Found[Pos]) + continue; // Already in the canonical position. + + for (unsigned Idx = 0; Idx != Components.size(); ++Idx) { + // Do not reparse any components that already matched. + if (Idx < array_lengthof(Found) && Found[Idx]) + continue; + + // Does this component parse as valid for the target position? + bool Valid = false; + StringRef Comp = Components[Idx]; + switch (Pos) { + default: llvm_unreachable("unexpected component type!"); + case 0: + Arch = parseArch(Comp); + Valid = Arch != UnknownArch; + break; + case 1: + Vendor = parseVendor(Comp); + Valid = Vendor != UnknownVendor; + break; + case 2: + OS = parseOS(Comp); + IsCygwin = Comp.startswith("cygwin"); + IsMinGW32 = Comp.startswith("mingw"); + Valid = OS != UnknownOS || IsCygwin || IsMinGW32; + break; + case 3: + Environment = parseEnvironment(Comp); + Valid = Environment != UnknownEnvironment; + if (!Valid) { + ObjectFormat = parseFormat(Comp); + Valid = ObjectFormat != UnknownObjectFormat; + } + break; + } + if (!Valid) + continue; // Nope, try the next component. + + // Move the component to the target position, pushing any non-fixed + // components that are in the way to the right. This tends to give + // good results in the common cases of a forgotten vendor component + // or a wrongly positioned environment. + if (Pos < Idx) { + // Insert left, pushing the existing components to the right. For + // example, a-b-i386 -> i386-a-b when moving i386 to the front. + StringRef CurrentComponent(""); // The empty component. + // Replace the component we are moving with an empty component. + std::swap(CurrentComponent, Components[Idx]); + // Insert the component being moved at Pos, displacing any existing + // components to the right. + for (unsigned i = Pos; !CurrentComponent.empty(); ++i) { + // Skip over any fixed components. + while (i < array_lengthof(Found) && Found[i]) + ++i; + // Place the component at the new position, getting the component + // that was at this position - it will be moved right. + std::swap(CurrentComponent, Components[i]); + } + } else if (Pos > Idx) { + // Push right by inserting empty components until the component at Idx + // reaches the target position Pos. For example, pc-a -> -pc-a when + // moving pc to the second position. + do { + // Insert one empty component at Idx. + StringRef CurrentComponent(""); // The empty component. + for (unsigned i = Idx; i < Components.size();) { + // Place the component at the new position, getting the component + // that was at this position - it will be moved right. + std::swap(CurrentComponent, Components[i]); + // If it was placed on top of an empty component then we are done. + if (CurrentComponent.empty()) + break; + // Advance to the next component, skipping any fixed components. + while (++i < array_lengthof(Found) && Found[i]) + ; + } + // The last component was pushed off the end - append it. + if (!CurrentComponent.empty()) + Components.push_back(CurrentComponent); + + // Advance Idx to the component's new position. + while (++Idx < array_lengthof(Found) && Found[Idx]) + ; + } while (Idx < Pos); // Add more until the final position is reached. + } + assert(Pos < Components.size() && Components[Pos] == Comp && + "Component moved wrong!"); + Found[Pos] = true; + break; + } + } + + // Special case logic goes here. At this point Arch, Vendor and OS have the + // correct values for the computed components. + std::string NormalizedEnvironment; + if (Environment == Triple::Android && Components[3].startswith("androideabi")) { + StringRef AndroidVersion = Components[3].drop_front(strlen("androideabi")); + if (AndroidVersion.empty()) { + Components[3] = "android"; + } else { + NormalizedEnvironment = Twine("android", AndroidVersion).str(); + Components[3] = NormalizedEnvironment; + } + } + + if (OS == Triple::Win32) { + Components.resize(4); + Components[2] = "windows"; + if (Environment == UnknownEnvironment) { + if (ObjectFormat == UnknownObjectFormat || ObjectFormat == Triple::COFF) + Components[3] = "msvc"; + else + Components[3] = getObjectFormatTypeName(ObjectFormat); + } + } else if (IsMinGW32) { + Components.resize(4); + Components[2] = "windows"; + Components[3] = "gnu"; + } else if (IsCygwin) { + Components.resize(4); + Components[2] = "windows"; + Components[3] = "cygnus"; + } + if (IsMinGW32 || IsCygwin || + (OS == Triple::Win32 && Environment != UnknownEnvironment)) { + if (ObjectFormat != UnknownObjectFormat && ObjectFormat != Triple::COFF) { + Components.resize(5); + Components[4] = getObjectFormatTypeName(ObjectFormat); + } + } + + // Stick the corrected components back together to form the normalized string. + std::string Normalized; + for (unsigned i = 0, e = Components.size(); i != e; ++i) { + if (i) Normalized += '-'; + Normalized += Components[i]; + } + return Normalized; +} + +StringRef Triple::getArchName() const { + return StringRef(Data).split('-').first; // Isolate first component +} + +StringRef Triple::getVendorName() const { + StringRef Tmp = StringRef(Data).split('-').second; // Strip first component + return Tmp.split('-').first; // Isolate second component +} + +StringRef Triple::getOSName() const { + StringRef Tmp = StringRef(Data).split('-').second; // Strip first component + Tmp = Tmp.split('-').second; // Strip second component + return Tmp.split('-').first; // Isolate third component +} + +StringRef Triple::getEnvironmentName() const { + StringRef Tmp = StringRef(Data).split('-').second; // Strip first component + Tmp = Tmp.split('-').second; // Strip second component + return Tmp.split('-').second; // Strip third component +} + +StringRef Triple::getOSAndEnvironmentName() const { + StringRef Tmp = StringRef(Data).split('-').second; // Strip first component + return Tmp.split('-').second; // Strip second component +} + +static unsigned EatNumber(StringRef &Str) { + assert(!Str.empty() && Str[0] >= '0' && Str[0] <= '9' && "Not a number"); + unsigned Result = 0; + + do { + // Consume the leading digit. + Result = Result*10 + (Str[0] - '0'); + + // Eat the digit. + Str = Str.substr(1); + } while (!Str.empty() && Str[0] >= '0' && Str[0] <= '9'); + + return Result; +} + +static void parseVersionFromName(StringRef Name, unsigned &Major, + unsigned &Minor, unsigned &Micro) { + // Any unset version defaults to 0. + Major = Minor = Micro = 0; + + // Parse up to three components. + unsigned *Components[3] = {&Major, &Minor, &Micro}; + for (unsigned i = 0; i != 3; ++i) { + if (Name.empty() || Name[0] < '0' || Name[0] > '9') + break; + + // Consume the leading number. + *Components[i] = EatNumber(Name); + + // Consume the separator, if present. + if (Name.startswith(".")) + Name = Name.substr(1); + } +} + +void Triple::getEnvironmentVersion(unsigned &Major, unsigned &Minor, + unsigned &Micro) const { + StringRef EnvironmentName = getEnvironmentName(); + StringRef EnvironmentTypeName = getEnvironmentTypeName(getEnvironment()); + if (EnvironmentName.startswith(EnvironmentTypeName)) + EnvironmentName = EnvironmentName.substr(EnvironmentTypeName.size()); + + parseVersionFromName(EnvironmentName, Major, Minor, Micro); +} + +void Triple::getOSVersion(unsigned &Major, unsigned &Minor, + unsigned &Micro) const { + StringRef OSName = getOSName(); + // Assume that the OS portion of the triple starts with the canonical name. + StringRef OSTypeName = getOSTypeName(getOS()); + if (OSName.startswith(OSTypeName)) + OSName = OSName.substr(OSTypeName.size()); + + parseVersionFromName(OSName, Major, Minor, Micro); +} + +bool Triple::getMacOSXVersion(unsigned &Major, unsigned &Minor, + unsigned &Micro) const { + getOSVersion(Major, Minor, Micro); + + switch (getOS()) { + default: llvm_unreachable("unexpected OS for Darwin triple"); + case Darwin: + // Default to darwin8, i.e., MacOSX 10.4. + if (Major == 0) + Major = 8; + // Darwin version numbers are skewed from OS X versions. + if (Major < 4) + return false; + Micro = 0; + Minor = Major - 4; + Major = 10; + break; + case MacOSX: + // Default to 10.4. + if (Major == 0) { + Major = 10; + Minor = 4; + } + if (Major != 10) + return false; + break; + case IOS: + case TvOS: + case WatchOS: + // Ignore the version from the triple. This is only handled because the + // the clang driver combines OS X and IOS support into a common Darwin + // toolchain that wants to know the OS X version number even when targeting + // IOS. + Major = 10; + Minor = 4; + Micro = 0; + break; + } + return true; +} + +void Triple::getiOSVersion(unsigned &Major, unsigned &Minor, + unsigned &Micro) const { + switch (getOS()) { + default: llvm_unreachable("unexpected OS for Darwin triple"); + case Darwin: + case MacOSX: + // Ignore the version from the triple. This is only handled because the + // the clang driver combines OS X and IOS support into a common Darwin + // toolchain that wants to know the iOS version number even when targeting + // OS X. + Major = 5; + Minor = 0; + Micro = 0; + break; + case IOS: + case TvOS: + getOSVersion(Major, Minor, Micro); + // Default to 5.0 (or 7.0 for arm64). + if (Major == 0) + Major = (getArch() == aarch64) ? 7 : 5; + break; + case WatchOS: + llvm_unreachable("conflicting triple info"); + } +} + +void Triple::getWatchOSVersion(unsigned &Major, unsigned &Minor, + unsigned &Micro) const { + switch (getOS()) { + default: llvm_unreachable("unexpected OS for Darwin triple"); + case Darwin: + case MacOSX: + // Ignore the version from the triple. This is only handled because the + // the clang driver combines OS X and IOS support into a common Darwin + // toolchain that wants to know the iOS version number even when targeting + // OS X. + Major = 2; + Minor = 0; + Micro = 0; + break; + case WatchOS: + getOSVersion(Major, Minor, Micro); + if (Major == 0) + Major = 2; + break; + case IOS: + llvm_unreachable("conflicting triple info"); + } +} + +void Triple::setTriple(const Twine &Str) { + *this = Triple(Str); +} + +void Triple::setArch(ArchType Kind) { + setArchName(getArchTypeName(Kind)); +} + +void Triple::setVendor(VendorType Kind) { + setVendorName(getVendorTypeName(Kind)); +} + +void Triple::setOS(OSType Kind) { + setOSName(getOSTypeName(Kind)); +} + +void Triple::setEnvironment(EnvironmentType Kind) { + if (ObjectFormat == getDefaultFormat(*this)) + return setEnvironmentName(getEnvironmentTypeName(Kind)); + + setEnvironmentName((getEnvironmentTypeName(Kind) + Twine("-") + + getObjectFormatTypeName(ObjectFormat)).str()); +} + +void Triple::setObjectFormat(ObjectFormatType Kind) { + if (Environment == UnknownEnvironment) + return setEnvironmentName(getObjectFormatTypeName(Kind)); + + setEnvironmentName((getEnvironmentTypeName(Environment) + Twine("-") + + getObjectFormatTypeName(Kind)).str()); +} + +void Triple::setArchName(StringRef Str) { + // Work around a miscompilation bug for Twines in gcc 4.0.3. + SmallString<64> Triple; + Triple += Str; + Triple += "-"; + Triple += getVendorName(); + Triple += "-"; + Triple += getOSAndEnvironmentName(); + setTriple(Triple); +} + +void Triple::setVendorName(StringRef Str) { + setTriple(getArchName() + "-" + Str + "-" + getOSAndEnvironmentName()); +} + +void Triple::setOSName(StringRef Str) { + if (hasEnvironment()) + setTriple(getArchName() + "-" + getVendorName() + "-" + Str + + "-" + getEnvironmentName()); + else + setTriple(getArchName() + "-" + getVendorName() + "-" + Str); +} + +void Triple::setEnvironmentName(StringRef Str) { + setTriple(getArchName() + "-" + getVendorName() + "-" + getOSName() + + "-" + Str); +} + +void Triple::setOSAndEnvironmentName(StringRef Str) { + setTriple(getArchName() + "-" + getVendorName() + "-" + Str); +} + +static unsigned getArchPointerBitWidth(llvm_ks::Triple::ArchType Arch) { + switch (Arch) { + case llvm_ks::Triple::UnknownArch: + return 0; + + case llvm_ks::Triple::avr: + case llvm_ks::Triple::msp430: + return 16; + + case llvm_ks::Triple::arm: + case llvm_ks::Triple::armeb: + case llvm_ks::Triple::hexagon: + case llvm_ks::Triple::le32: + case llvm_ks::Triple::mips: + case llvm_ks::Triple::mipsel: + case llvm_ks::Triple::nvptx: + case llvm_ks::Triple::ppc: + case llvm_ks::Triple::r600: + case llvm_ks::Triple::sparc: + case llvm_ks::Triple::sparcel: + case llvm_ks::Triple::tce: + case llvm_ks::Triple::thumb: + case llvm_ks::Triple::thumbeb: + case llvm_ks::Triple::x86: + case llvm_ks::Triple::xcore: + case llvm_ks::Triple::amdil: + case llvm_ks::Triple::hsail: + case llvm_ks::Triple::spir: + case llvm_ks::Triple::kalimba: + case llvm_ks::Triple::shave: + case llvm_ks::Triple::wasm32: + return 32; + + case llvm_ks::Triple::aarch64: + case llvm_ks::Triple::aarch64_be: + case llvm_ks::Triple::amdgcn: + case llvm_ks::Triple::bpfel: + case llvm_ks::Triple::bpfeb: + case llvm_ks::Triple::le64: + case llvm_ks::Triple::mips64: + case llvm_ks::Triple::mips64el: + case llvm_ks::Triple::nvptx64: + case llvm_ks::Triple::ppc64: + case llvm_ks::Triple::ppc64le: + case llvm_ks::Triple::sparcv9: + case llvm_ks::Triple::systemz: + case llvm_ks::Triple::x86_64: + case llvm_ks::Triple::amdil64: + case llvm_ks::Triple::hsail64: + case llvm_ks::Triple::spir64: + case llvm_ks::Triple::wasm64: + return 64; + } + llvm_unreachable("Invalid architecture value"); +} + +bool Triple::isArch64Bit() const { + return getArchPointerBitWidth(getArch()) == 64; +} + +bool Triple::isArch32Bit() const { + return getArchPointerBitWidth(getArch()) == 32; +} + +bool Triple::isArch16Bit() const { + return getArchPointerBitWidth(getArch()) == 16; +} + +Triple Triple::get32BitArchVariant() const { + Triple T(*this); + switch (getArch()) { + case Triple::UnknownArch: + case Triple::amdgcn: + case Triple::avr: + case Triple::bpfel: + case Triple::bpfeb: + case Triple::msp430: + case Triple::systemz: + case Triple::ppc64le: + T.setArch(UnknownArch); + break; + + case Triple::amdil: + case Triple::hsail: + case Triple::spir: + case Triple::arm: + case Triple::armeb: + case Triple::hexagon: + case Triple::kalimba: + case Triple::le32: + case Triple::mips: + case Triple::mipsel: + case Triple::nvptx: + case Triple::ppc: + case Triple::r600: + case Triple::sparc: + case Triple::sparcel: + case Triple::tce: + case Triple::thumb: + case Triple::thumbeb: + case Triple::x86: + case Triple::xcore: + case Triple::shave: + case Triple::wasm32: + // Already 32-bit. + break; + + case Triple::aarch64: T.setArch(Triple::arm); break; + case Triple::aarch64_be: T.setArch(Triple::armeb); break; + case Triple::le64: T.setArch(Triple::le32); break; + case Triple::mips64: T.setArch(Triple::mips); break; + case Triple::mips64el: T.setArch(Triple::mipsel); break; + case Triple::nvptx64: T.setArch(Triple::nvptx); break; + case Triple::ppc64: T.setArch(Triple::ppc); break; + case Triple::sparcv9: T.setArch(Triple::sparc); break; + case Triple::x86_64: T.setArch(Triple::x86); break; + case Triple::amdil64: T.setArch(Triple::amdil); break; + case Triple::hsail64: T.setArch(Triple::hsail); break; + case Triple::spir64: T.setArch(Triple::spir); break; + case Triple::wasm64: T.setArch(Triple::wasm32); break; + } + return T; +} + +Triple Triple::get64BitArchVariant() const { + Triple T(*this); + switch (getArch()) { + case Triple::UnknownArch: + case Triple::avr: + case Triple::hexagon: + case Triple::kalimba: + case Triple::msp430: + case Triple::r600: + case Triple::tce: + case Triple::xcore: + case Triple::sparcel: + case Triple::shave: + T.setArch(UnknownArch); + break; + + case Triple::aarch64: + case Triple::aarch64_be: + case Triple::bpfel: + case Triple::bpfeb: + case Triple::le64: + case Triple::amdil64: + case Triple::amdgcn: + case Triple::hsail64: + case Triple::spir64: + case Triple::mips64: + case Triple::mips64el: + case Triple::nvptx64: + case Triple::ppc64: + case Triple::ppc64le: + case Triple::sparcv9: + case Triple::systemz: + case Triple::x86_64: + case Triple::wasm64: + // Already 64-bit. + break; + + case Triple::arm: T.setArch(Triple::aarch64); break; + case Triple::armeb: T.setArch(Triple::aarch64_be); break; + case Triple::le32: T.setArch(Triple::le64); break; + case Triple::mips: T.setArch(Triple::mips64); break; + case Triple::mipsel: T.setArch(Triple::mips64el); break; + case Triple::nvptx: T.setArch(Triple::nvptx64); break; + case Triple::ppc: T.setArch(Triple::ppc64); break; + case Triple::sparc: T.setArch(Triple::sparcv9); break; + case Triple::x86: T.setArch(Triple::x86_64); break; + case Triple::amdil: T.setArch(Triple::amdil64); break; + case Triple::hsail: T.setArch(Triple::hsail64); break; + case Triple::spir: T.setArch(Triple::spir64); break; + case Triple::thumb: T.setArch(Triple::aarch64); break; + case Triple::thumbeb: T.setArch(Triple::aarch64_be); break; + case Triple::wasm32: T.setArch(Triple::wasm64); break; + } + return T; +} + +Triple Triple::getBigEndianArchVariant() const { + Triple T(*this); + switch (getArch()) { + case Triple::UnknownArch: + case Triple::amdgcn: + case Triple::amdil64: + case Triple::amdil: + case Triple::avr: + case Triple::hexagon: + case Triple::hsail64: + case Triple::hsail: + case Triple::kalimba: + case Triple::le32: + case Triple::le64: + case Triple::msp430: + case Triple::nvptx64: + case Triple::nvptx: + case Triple::r600: + case Triple::shave: + case Triple::spir64: + case Triple::spir: + case Triple::wasm32: + case Triple::wasm64: + case Triple::x86: + case Triple::x86_64: + case Triple::xcore: + + // ARM is intentionally unsupported here, changing the architecture would + // drop any arch suffixes. + case Triple::arm: + case Triple::thumb: + T.setArch(UnknownArch); + break; + + case Triple::aarch64_be: + case Triple::armeb: + case Triple::bpfeb: + case Triple::mips64: + case Triple::mips: + case Triple::ppc64: + case Triple::ppc: + case Triple::sparc: + case Triple::sparcv9: + case Triple::systemz: + case Triple::tce: + case Triple::thumbeb: + // Already big endian. + break; + + case Triple::aarch64: T.setArch(Triple::aarch64_be); break; + case Triple::bpfel: T.setArch(Triple::bpfeb); break; + case Triple::mips64el:T.setArch(Triple::mips64); break; + case Triple::mipsel: T.setArch(Triple::mips); break; + case Triple::ppc64le: T.setArch(Triple::ppc64); break; + case Triple::sparcel: T.setArch(Triple::sparc); break; + } + return T; +} + +Triple Triple::getLittleEndianArchVariant() const { + Triple T(*this); + switch (getArch()) { + case Triple::UnknownArch: + case Triple::ppc: + case Triple::sparcv9: + case Triple::systemz: + case Triple::tce: + + // ARM is intentionally unsupported here, changing the architecture would + // drop any arch suffixes. + case Triple::armeb: + case Triple::thumbeb: + T.setArch(UnknownArch); + break; + + case Triple::aarch64: + case Triple::amdgcn: + case Triple::amdil64: + case Triple::amdil: + case Triple::arm: + case Triple::avr: + case Triple::bpfel: + case Triple::hexagon: + case Triple::hsail64: + case Triple::hsail: + case Triple::kalimba: + case Triple::le32: + case Triple::le64: + case Triple::mips64el: + case Triple::mipsel: + case Triple::msp430: + case Triple::nvptx64: + case Triple::nvptx: + case Triple::ppc64le: + case Triple::r600: + case Triple::shave: + case Triple::sparcel: + case Triple::spir64: + case Triple::spir: + case Triple::thumb: + case Triple::wasm32: + case Triple::wasm64: + case Triple::x86: + case Triple::x86_64: + case Triple::xcore: + // Already little endian. + break; + + case Triple::aarch64_be: T.setArch(Triple::aarch64); break; + case Triple::bpfeb: T.setArch(Triple::bpfel); break; + case Triple::mips64: T.setArch(Triple::mips64el); break; + case Triple::mips: T.setArch(Triple::mipsel); break; + case Triple::ppc64: T.setArch(Triple::ppc64le); break; + case Triple::sparc: T.setArch(Triple::sparcel); break; + } + return T; +} + +StringRef Triple::getARMCPUForArch(StringRef MArch) const { + if (MArch.empty()) + MArch = getArchName(); + MArch = ARM::getCanonicalArchName(MArch); + + // Some defaults are forced. + switch (getOS()) { + case llvm_ks::Triple::FreeBSD: + case llvm_ks::Triple::NetBSD: + if (!MArch.empty() && MArch == "v6") + return "arm1176jzf-s"; + break; + case llvm_ks::Triple::Win32: + // FIXME: this is invalid for WindowsCE + return "cortex-a9"; + case llvm_ks::Triple::MacOSX: + case llvm_ks::Triple::IOS: + case llvm_ks::Triple::WatchOS: + if (MArch == "v7k") + return "cortex-a7"; + break; + default: + break; + } + + if (MArch.empty()) + return StringRef(); + + StringRef CPU = ARM::getDefaultCPU(MArch); + if (!CPU.empty()) + return CPU; + + // If no specific architecture version is requested, return the minimum CPU + // required by the OS and environment. + switch (getOS()) { + case llvm_ks::Triple::NetBSD: + switch (getEnvironment()) { + case llvm_ks::Triple::GNUEABIHF: + case llvm_ks::Triple::GNUEABI: + case llvm_ks::Triple::EABIHF: + case llvm_ks::Triple::EABI: + return "arm926ej-s"; + default: + return "strongarm"; + } + case llvm_ks::Triple::NaCl: + return "cortex-a8"; + default: + switch (getEnvironment()) { + case llvm_ks::Triple::EABIHF: + case llvm_ks::Triple::GNUEABIHF: + return "arm1176jzf-s"; + default: + return "arm7tdmi"; + } + } + + llvm_unreachable("invalid arch name"); +} diff --git a/llvm/lib/Support/Twine.cpp b/llvm/lib/Support/Twine.cpp new file mode 100644 index 0000000..b46b921 --- /dev/null +++ b/llvm/lib/Support/Twine.cpp @@ -0,0 +1,168 @@ +//===-- Twine.cpp - Fast Temporary String Concatenation -------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/Twine.h" +#include "llvm/ADT/SmallString.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/raw_ostream.h" +using namespace llvm_ks; + +std::string Twine::str() const { + // If we're storing only a std::string, just return it. + if (LHSKind == StdStringKind && RHSKind == EmptyKind) + return *LHS.stdString; + + // Otherwise, flatten and copy the contents first. + SmallString<256> Vec; + return toStringRef(Vec).str(); +} + +void Twine::toVector(SmallVectorImpl &Out) const { + raw_svector_ostream OS(Out); + print(OS); +} + +StringRef Twine::toNullTerminatedStringRef(SmallVectorImpl &Out) const { + if (isUnary()) { + switch (getLHSKind()) { + case CStringKind: + // Already null terminated, yay! + return StringRef(LHS.cString); + case StdStringKind: { + const std::string *str = LHS.stdString; + return StringRef(str->c_str(), str->size()); + } + default: + break; + } + } + toVector(Out); + Out.push_back(0); + Out.pop_back(); + return StringRef(Out.data(), Out.size()); +} + +void Twine::printOneChild(raw_ostream &OS, Child Ptr, + NodeKind Kind) const { + switch (Kind) { + case Twine::NullKind: break; + case Twine::EmptyKind: break; + case Twine::TwineKind: + Ptr.twine->print(OS); + break; + case Twine::CStringKind: + OS << Ptr.cString; + break; + case Twine::StdStringKind: + OS << *Ptr.stdString; + break; + case Twine::StringRefKind: + OS << *Ptr.stringRef; + break; + case Twine::SmallStringKind: + OS << *Ptr.smallString; + break; + case Twine::CharKind: + OS << Ptr.character; + break; + case Twine::DecUIKind: + OS << Ptr.decUI; + break; + case Twine::DecIKind: + OS << Ptr.decI; + break; + case Twine::DecULKind: + OS << *Ptr.decUL; + break; + case Twine::DecLKind: + OS << *Ptr.decL; + break; + case Twine::DecULLKind: + OS << *Ptr.decULL; + break; + case Twine::DecLLKind: + OS << *Ptr.decLL; + break; + case Twine::UHexKind: + OS.write_hex(*Ptr.uHex); + break; + } +} + +void Twine::printOneChildRepr(raw_ostream &OS, Child Ptr, + NodeKind Kind) const { + switch (Kind) { + case Twine::NullKind: + OS << "null"; break; + case Twine::EmptyKind: + OS << "empty"; break; + case Twine::TwineKind: + OS << "rope:"; + Ptr.twine->printRepr(OS); + break; + case Twine::CStringKind: + OS << "cstring:\"" + << Ptr.cString << "\""; + break; + case Twine::StdStringKind: + OS << "std::string:\"" + << Ptr.stdString << "\""; + break; + case Twine::StringRefKind: + OS << "stringref:\"" + << Ptr.stringRef << "\""; + break; + case Twine::SmallStringKind: + OS << "smallstring:\"" << *Ptr.smallString << "\""; + break; + case Twine::CharKind: + OS << "char:\"" << Ptr.character << "\""; + break; + case Twine::DecUIKind: + OS << "decUI:\"" << Ptr.decUI << "\""; + break; + case Twine::DecIKind: + OS << "decI:\"" << Ptr.decI << "\""; + break; + case Twine::DecULKind: + OS << "decUL:\"" << *Ptr.decUL << "\""; + break; + case Twine::DecLKind: + OS << "decL:\"" << *Ptr.decL << "\""; + break; + case Twine::DecULLKind: + OS << "decULL:\"" << *Ptr.decULL << "\""; + break; + case Twine::DecLLKind: + OS << "decLL:\"" << *Ptr.decLL << "\""; + break; + case Twine::UHexKind: + OS << "uhex:\"" << Ptr.uHex << "\""; + break; + } +} + +void Twine::print(raw_ostream &OS) const { + printOneChild(OS, LHS, getLHSKind()); + printOneChild(OS, RHS, getRHSKind()); +} + +void Twine::printRepr(raw_ostream &OS) const { + OS << "(Twine "; + printOneChildRepr(OS, LHS, getLHSKind()); + OS << " "; + printOneChildRepr(OS, RHS, getRHSKind()); + OS << ")"; +} + +LLVM_DUMP_METHOD void Twine::dump() const { +} + +void Twine::dumpRepr() const { +} diff --git a/llvm/lib/Support/Unix/Memory.inc b/llvm/lib/Support/Unix/Memory.inc new file mode 100644 index 0000000..88c5140 --- /dev/null +++ b/llvm/lib/Support/Unix/Memory.inc @@ -0,0 +1,308 @@ +//===- Unix/Memory.cpp - Generic UNIX System Configuration ------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines some functions for various memory management utilities. +// +//===----------------------------------------------------------------------===// + +#include "Unix.h" +#include "llvm/Support/DataTypes.h" +#include "llvm/Support/ErrorHandling.h" + +#ifdef HAVE_SYS_MMAN_H +#include +#endif + +#ifdef __APPLE__ +#include +#endif + +#if defined(__mips__) +# if defined(__OpenBSD__) +# include +# else +# include +# endif +#endif + +#ifdef __APPLE__ +extern "C" void sys_icache_invalidate(const void *Addr, size_t len); +#else +extern "C" void __clear_cache(void *, void*); +#endif + +namespace { + +int getPosixProtectionFlags(unsigned Flags) { + switch (Flags) { + case llvm_ks::sys::Memory::MF_READ: + return PROT_READ; + case llvm_ks::sys::Memory::MF_WRITE: + return PROT_WRITE; + case llvm_ks::sys::Memory::MF_READ|llvm_ks::sys::Memory::MF_WRITE: + return PROT_READ | PROT_WRITE; + case llvm_ks::sys::Memory::MF_READ|llvm_ks::sys::Memory::MF_EXEC: + return PROT_READ | PROT_EXEC; + case llvm_ks::sys::Memory::MF_READ | llvm_ks::sys::Memory::MF_WRITE | + llvm_ks::sys::Memory::MF_EXEC: + return PROT_READ | PROT_WRITE | PROT_EXEC; + case llvm_ks::sys::Memory::MF_EXEC: +#if defined(__FreeBSD__) + // On PowerPC, having an executable page that has no read permission + // can have unintended consequences. The function InvalidateInstruction- + // Cache uses instructions dcbf and icbi, both of which are treated by + // the processor as loads. If the page has no read permissions, + // executing these instructions will result in a segmentation fault. + // Somehow, this problem is not present on Linux, but it does happen + // on FreeBSD. + return PROT_READ | PROT_EXEC; +#else + return PROT_EXEC; +#endif + default: + llvm_unreachable("Illegal memory protection flag specified!"); + } + // Provide a default return value as required by some compilers. + return PROT_NONE; +} + +} // anonymous namespace + +namespace llvm_ks { +namespace sys { + +MemoryBlock +Memory::allocateMappedMemory(size_t NumBytes, + const MemoryBlock *const NearBlock, + unsigned PFlags, + std::error_code &EC) { + EC = std::error_code(); + if (NumBytes == 0) + return MemoryBlock(); + + static const size_t PageSize = 4096; //Process::getPageSize(); + const size_t NumPages = (NumBytes+PageSize-1)/PageSize; + + int fd = -1; +#ifdef NEED_DEV_ZERO_FOR_MMAP + static int zero_fd = open("/dev/zero", O_RDWR); + if (zero_fd == -1) { + EC = std::error_code(errno, std::generic_category()); + return MemoryBlock(); + } + fd = zero_fd; +#endif + + int MMFlags = MAP_PRIVATE | +#ifdef HAVE_MMAP_ANONYMOUS + MAP_ANONYMOUS +#else + MAP_ANON +#endif + ; // Ends statement above + + int Protect = getPosixProtectionFlags(PFlags); + + // Use any near hint and the page size to set a page-aligned starting address + uintptr_t Start = NearBlock ? reinterpret_cast(NearBlock->base()) + + NearBlock->size() : 0; + if (Start && Start % PageSize) + Start += PageSize - Start % PageSize; + + void *Addr = ::mmap(reinterpret_cast(Start), PageSize*NumPages, + Protect, MMFlags, fd, 0); + if (Addr == MAP_FAILED) { + if (NearBlock) //Try again without a near hint + return allocateMappedMemory(NumBytes, nullptr, PFlags, EC); + + EC = std::error_code(errno, std::generic_category()); + return MemoryBlock(); + } + + MemoryBlock Result; + Result.Address = Addr; + Result.Size = NumPages*PageSize; + + if (PFlags & MF_EXEC) + Memory::InvalidateInstructionCache(Result.Address, Result.Size); + + return Result; +} + +std::error_code +Memory::releaseMappedMemory(MemoryBlock &M) { + if (M.Address == nullptr || M.Size == 0) + return std::error_code(); + + if (0 != ::munmap(M.Address, M.Size)) + return std::error_code(errno, std::generic_category()); + + M.Address = nullptr; + M.Size = 0; + + return std::error_code(); +} + +std::error_code +Memory::protectMappedMemory(const MemoryBlock &M, unsigned Flags) { + static const size_t PageSize = 4096; //Process::getPageSize(); + if (M.Address == nullptr || M.Size == 0) + return std::error_code(); + + if (!Flags) + return std::error_code(EINVAL, std::generic_category()); + + int Protect = getPosixProtectionFlags(Flags); + + int Result = ::mprotect((void*)((uintptr_t)M.Address & ~(PageSize-1)), PageSize*((M.Size+PageSize-1)/PageSize), Protect); + if (Result != 0) + return std::error_code(errno, std::generic_category()); + + if (Flags & MF_EXEC) + Memory::InvalidateInstructionCache(M.Address, M.Size); + + return std::error_code(); +} + +/// AllocateRWX - Allocate a slab of memory with read/write/execute +/// permissions. This is typically used for JIT applications where we want +/// to emit code to the memory then jump to it. Getting this type of memory +/// is very OS specific. +/// +MemoryBlock +Memory::AllocateRWX(size_t NumBytes, const MemoryBlock* NearBlock, + std::string *ErrMsg) { + if (NumBytes == 0) return MemoryBlock(); + + static const size_t PageSize = 4096; //Process::getPageSize(); + size_t NumPages = (NumBytes+PageSize-1)/PageSize; + + int fd = -1; +#ifdef NEED_DEV_ZERO_FOR_MMAP + static int zero_fd = open("/dev/zero", O_RDWR); + if (zero_fd == -1) { + MakeErrMsg(ErrMsg, "Can't open /dev/zero device"); + return MemoryBlock(); + } + fd = zero_fd; +#endif + + int flags = MAP_PRIVATE | +#ifdef HAVE_MMAP_ANONYMOUS + MAP_ANONYMOUS +#else + MAP_ANON +#endif + ; + + void* start = NearBlock ? (unsigned char*)NearBlock->base() + + NearBlock->size() : nullptr; + +#if defined(__APPLE__) && (defined(__arm__) || defined(__arm64__)) + void *pa = ::mmap(start, PageSize*NumPages, PROT_READ|PROT_EXEC, + flags, fd, 0); +#else + void *pa = ::mmap(start, PageSize*NumPages, PROT_READ|PROT_WRITE|PROT_EXEC, + flags, fd, 0); +#endif + if (pa == MAP_FAILED) { + if (NearBlock) //Try again without a near hint + return AllocateRWX(NumBytes, nullptr); + + MakeErrMsg(ErrMsg, "Can't allocate RWX Memory"); + return MemoryBlock(); + } + +#if defined(__APPLE__) && (defined(__arm__) || defined(__arm64__)) + kern_return_t kr = vm_protect(mach_task_self(), (vm_address_t)pa, + (vm_size_t)(PageSize*NumPages), 0, + VM_PROT_READ | VM_PROT_EXECUTE | VM_PROT_COPY); + if (KERN_SUCCESS != kr) { + MakeErrMsg(ErrMsg, "vm_protect max RX failed"); + return MemoryBlock(); + } + + kr = vm_protect(mach_task_self(), (vm_address_t)pa, + (vm_size_t)(PageSize*NumPages), 0, + VM_PROT_READ | VM_PROT_WRITE); + if (KERN_SUCCESS != kr) { + MakeErrMsg(ErrMsg, "vm_protect RW failed"); + return MemoryBlock(); + } +#endif + + MemoryBlock result; + result.Address = pa; + result.Size = NumPages*PageSize; + + return result; +} + +bool Memory::ReleaseRWX(MemoryBlock &M, std::string *ErrMsg) { + if (M.Address == nullptr || M.Size == 0) return false; + if (0 != ::munmap(M.Address, M.Size)) + return MakeErrMsg(ErrMsg, "Can't release RWX Memory"); + return false; +} + +bool Memory::setWritable (MemoryBlock &M, std::string *ErrMsg) { +#if defined(__APPLE__) && (defined(__arm__) || defined(__arm64__)) + if (M.Address == 0 || M.Size == 0) return false; + Memory::InvalidateInstructionCache(M.Address, M.Size); + kern_return_t kr = vm_protect(mach_task_self(), (vm_address_t)M.Address, + (vm_size_t)M.Size, 0, VM_PROT_READ | VM_PROT_WRITE); + return KERN_SUCCESS == kr; +#else + return true; +#endif +} + +bool Memory::setExecutable (MemoryBlock &M, std::string *ErrMsg) { + if (M.Address == nullptr || M.Size == 0) return false; + Memory::InvalidateInstructionCache(M.Address, M.Size); +#if defined(__APPLE__) && (defined(__arm__) || defined(__arm64__)) + kern_return_t kr = vm_protect(mach_task_self(), (vm_address_t)M.Address, + (vm_size_t)M.Size, 0, VM_PROT_READ | VM_PROT_EXECUTE | VM_PROT_COPY); + return KERN_SUCCESS == kr; +#else + return true; +#endif +} + +bool Memory::setRangeWritable(const void *Addr, size_t Size) { +#if defined(__APPLE__) && (defined(__arm__) || defined(__arm64__)) + kern_return_t kr = vm_protect(mach_task_self(), (vm_address_t)Addr, + (vm_size_t)Size, 0, + VM_PROT_READ | VM_PROT_WRITE); + return KERN_SUCCESS == kr; +#else + return true; +#endif +} + +bool Memory::setRangeExecutable(const void *Addr, size_t Size) { +#if defined(__APPLE__) && (defined(__arm__) || defined(__arm64__)) + kern_return_t kr = vm_protect(mach_task_self(), (vm_address_t)Addr, + (vm_size_t)Size, 0, + VM_PROT_READ | VM_PROT_EXECUTE | VM_PROT_COPY); + return KERN_SUCCESS == kr; +#else + return true; +#endif +} + +/// InvalidateInstructionCache - Before the JIT can run a block of code +/// that has been emitted it must invalidate the instruction cache on some +/// platforms. +void Memory::InvalidateInstructionCache(const void *Addr, + size_t Len) { +} + +} // namespace sys +} // namespace llvm_ks diff --git a/llvm/lib/Support/Unix/Path.inc b/llvm/lib/Support/Unix/Path.inc new file mode 100644 index 0000000..4c380ca --- /dev/null +++ b/llvm/lib/Support/Unix/Path.inc @@ -0,0 +1,626 @@ +//===- llvm/Support/Unix/Path.inc - Unix Path Implementation ----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the Unix specific implementation of the Path API. +// +//===----------------------------------------------------------------------===// + +//===----------------------------------------------------------------------===// +//=== WARNING: Implementation here must contain only generic UNIX code that +//=== is guaranteed to work on *all* UNIX variants. +//===----------------------------------------------------------------------===// + +#include "Unix.h" +#include +#include +#if HAVE_SYS_STAT_H +#include +#endif +#if HAVE_FCNTL_H +#include +#endif +#ifdef HAVE_SYS_MMAN_H +#include +#endif +#if HAVE_DIRENT_H +# include +# define NAMLEN(dirent) strlen((dirent)->d_name) +#else +# define dirent direct +# define NAMLEN(dirent) (dirent)->d_namlen +# if HAVE_SYS_NDIR_H +# include +# endif +# if HAVE_SYS_DIR_H +# include +# endif +# if HAVE_NDIR_H +# include +# endif +#endif + +#ifdef __APPLE__ +#include +#endif + +// Both stdio.h and cstdio are included via different pathes and +// stdcxx's cstdio doesn't include stdio.h, so it doesn't #undef the macros +// either. +#undef ferror +#undef feof + +// For GNU Hurd +#if defined(__GNU__) && !defined(PATH_MAX) +# define PATH_MAX 4096 +#endif + +using namespace llvm_ks; + +namespace llvm_ks { +namespace sys { +namespace fs { +#if defined(__FreeBSD__) || defined (__NetBSD__) || defined(__Bitrig__) || \ + defined(__OpenBSD__) || defined(__minix) || defined(__FreeBSD_kernel__) || \ + defined(__linux__) || defined(__CYGWIN__) || defined(__DragonFly__) +static int +test_dir(char ret[PATH_MAX], const char *dir, const char *bin) +{ + struct stat sb; + char fullpath[PATH_MAX]; + + snprintf(fullpath, PATH_MAX, "%s/%s", dir, bin); + if (!realpath(fullpath, ret)) + return 1; + if (stat(fullpath, &sb) != 0) + return 1; + + return 0; +} + +static char * +getprogpath(char ret[PATH_MAX], const char *bin) +{ + char *pv, *s, *t; + + /* First approach: absolute path. */ + if (bin[0] == '/') { + if (test_dir(ret, "/", bin) == 0) + return ret; + return nullptr; + } + + /* Second approach: relative path. */ + if (strchr(bin, '/')) { + char cwd[PATH_MAX]; + if (!getcwd(cwd, PATH_MAX)) + return nullptr; + if (test_dir(ret, cwd, bin) == 0) + return ret; + return nullptr; + } + + /* Third approach: $PATH */ + if ((pv = getenv("PATH")) == nullptr) + return nullptr; + s = pv = strdup(pv); + if (!pv) + return nullptr; + while ((t = strsep(&s, ":")) != nullptr) { + if (test_dir(ret, t, bin) == 0) { + free(pv); + return ret; + } + } + free(pv); + return nullptr; +} +#endif // __FreeBSD__ || __NetBSD__ || __FreeBSD_kernel__ + +/// GetMainExecutable - Return the path to the main executable, given the +/// value of argv[0] from program startup. +std::string getMainExecutable(const char *argv0, void *MainAddr) { +#if defined(__APPLE__) + // On OS X the executable path is saved to the stack by dyld. Reading it + // from there is much faster than calling dladdr, especially for large + // binaries with symbols. + char exe_path[MAXPATHLEN]; + uint32_t size = sizeof(exe_path); + if (_NSGetExecutablePath(exe_path, &size) == 0) { + char link_path[MAXPATHLEN]; + if (realpath(exe_path, link_path)) + return link_path; + } +#elif defined(__FreeBSD__) || defined (__NetBSD__) || defined(__Bitrig__) || \ + defined(__OpenBSD__) || defined(__minix) || defined(__DragonFly__) || \ + defined(__FreeBSD_kernel__) + char exe_path[PATH_MAX]; + + if (getprogpath(exe_path, argv0) != NULL) + return exe_path; +#elif defined(__linux__) || defined(__CYGWIN__) + char exe_path[MAXPATHLEN]; + StringRef aPath("/proc/self/exe"); + if (sys::fs::exists(aPath)) { + // /proc is not always mounted under Linux (chroot for example). + ssize_t len = readlink(aPath.str().c_str(), exe_path, sizeof(exe_path)); + if (len >= 0) + return std::string(exe_path, len); + } else { + // Fall back to the classical detection. + if (getprogpath(exe_path, argv0)) + return exe_path; + } +#elif defined(HAVE_DLFCN_H) + // Use dladdr to get executable path if available. + Dl_info DLInfo; + int err = dladdr(MainAddr, &DLInfo); + if (err == 0) + return ""; + + // If the filename is a symlink, we need to resolve and return the location of + // the actual executable. + char link_path[MAXPATHLEN]; + if (realpath(DLInfo.dli_fname, link_path)) + return link_path; +#else +#error GetMainExecutable is not implemented on this host yet. +#endif + return ""; +} + +UniqueID file_status::getUniqueID() const { + return UniqueID(fs_st_dev, fs_st_ino); +} + +std::error_code current_path(SmallVectorImpl &result) { + result.clear(); + + const char *pwd = ::getenv("PWD"); + llvm_ks::sys::fs::file_status PWDStatus, DotStatus; + if (pwd && llvm_ks::sys::path::is_absolute(pwd) && + !llvm_ks::sys::fs::status(pwd, PWDStatus) && + !llvm_ks::sys::fs::status(".", DotStatus) && + PWDStatus.getUniqueID() == DotStatus.getUniqueID()) { + result.append(pwd, pwd + strlen(pwd)); + return std::error_code(); + } + +#ifdef MAXPATHLEN + result.reserve(MAXPATHLEN); +#else +// For GNU Hurd + result.reserve(1024); +#endif + + while (true) { + if (::getcwd(result.data(), result.capacity()) == nullptr) { + // See if there was a real error. + if (errno != ENOMEM) + return std::error_code(errno, std::generic_category()); + // Otherwise there just wasn't enough space. + result.reserve(result.capacity() * 2); + } else + break; + } + + result.set_size(strlen(result.data())); + return std::error_code(); +} + +std::error_code create_directory(const Twine &path, bool IgnoreExisting, + perms Perms) { + SmallString<128> path_storage; + StringRef p = path.toNullTerminatedStringRef(path_storage); + + if (::mkdir(p.begin(), Perms) == -1) { + if (errno != EEXIST || !IgnoreExisting) + return std::error_code(errno, std::generic_category()); + } + + return std::error_code(); +} + +// Note that we are using symbolic link because hard links are not supported by +// all filesystems (SMB doesn't). +std::error_code create_link(const Twine &to, const Twine &from) { + // Get arguments. + SmallString<128> from_storage; + SmallString<128> to_storage; + StringRef f = from.toNullTerminatedStringRef(from_storage); + StringRef t = to.toNullTerminatedStringRef(to_storage); + + if (::symlink(t.begin(), f.begin()) == -1) + return std::error_code(errno, std::generic_category()); + + return std::error_code(); +} + +std::error_code remove(const Twine &path, bool IgnoreNonExisting) { + SmallString<128> path_storage; + StringRef p = path.toNullTerminatedStringRef(path_storage); + + struct stat buf; + if (lstat(p.begin(), &buf) != 0) { + if (errno != ENOENT || !IgnoreNonExisting) + return std::error_code(errno, std::generic_category()); + return std::error_code(); + } + + // Note: this check catches strange situations. In all cases, LLVM should + // only be involved in the creation and deletion of regular files. This + // check ensures that what we're trying to erase is a regular file. It + // effectively prevents LLVM from erasing things like /dev/null, any block + // special file, or other things that aren't "regular" files. + if (!S_ISREG(buf.st_mode) && !S_ISDIR(buf.st_mode) && !S_ISLNK(buf.st_mode)) + return make_error_code(errc::operation_not_permitted); + + if (::remove(p.begin()) == -1) { + if (errno != ENOENT || !IgnoreNonExisting) + return std::error_code(errno, std::generic_category()); + } + + return std::error_code(); +} + +std::error_code rename(const Twine &from, const Twine &to) { + // Get arguments. + SmallString<128> from_storage; + SmallString<128> to_storage; + StringRef f = from.toNullTerminatedStringRef(from_storage); + StringRef t = to.toNullTerminatedStringRef(to_storage); + + if (::rename(f.begin(), t.begin()) == -1) + return std::error_code(errno, std::generic_category()); + + return std::error_code(); +} + +std::error_code resize_file(int FD, uint64_t Size) { + if (::ftruncate(FD, Size) == -1) + return std::error_code(errno, std::generic_category()); + + return std::error_code(); +} + +static int convertAccessMode(AccessMode Mode) { + switch (Mode) { + case AccessMode::Exist: + return F_OK; + case AccessMode::Write: + return W_OK; + case AccessMode::Execute: + return R_OK | X_OK; // scripts also need R_OK. + } + llvm_unreachable("invalid enum"); +} + +std::error_code access(const Twine &Path, AccessMode Mode) { + SmallString<128> PathStorage; + StringRef P = Path.toNullTerminatedStringRef(PathStorage); + + if (::access(P.begin(), convertAccessMode(Mode)) == -1) + return std::error_code(errno, std::generic_category()); + + if (Mode == AccessMode::Execute) { + // Don't say that directories are executable. + struct stat buf; + if (0 != stat(P.begin(), &buf)) + return errc::permission_denied; + if (!S_ISREG(buf.st_mode)) + return errc::permission_denied; + } + + return std::error_code(); +} + +bool can_execute(const Twine &Path) { + return !access(Path, AccessMode::Execute); +} + +bool equivalent(file_status A, file_status B) { + assert(status_known(A) && status_known(B)); + return A.fs_st_dev == B.fs_st_dev && + A.fs_st_ino == B.fs_st_ino; +} + +std::error_code equivalent(const Twine &A, const Twine &B, bool &result) { + file_status fsA, fsB; + if (std::error_code ec = status(A, fsA)) + return ec; + if (std::error_code ec = status(B, fsB)) + return ec; + result = equivalent(fsA, fsB); + return std::error_code(); +} + +static std::error_code fillStatus(int StatRet, const struct stat &Status, + file_status &Result) { + if (StatRet != 0) { + std::error_code ec(errno, std::generic_category()); + if (ec == errc::no_such_file_or_directory) + Result = file_status(file_type::file_not_found); + else + Result = file_status(file_type::status_error); + return ec; + } + + file_type Type = file_type::type_unknown; + + if (S_ISDIR(Status.st_mode)) + Type = file_type::directory_file; + else if (S_ISREG(Status.st_mode)) + Type = file_type::regular_file; + else if (S_ISBLK(Status.st_mode)) + Type = file_type::block_file; + else if (S_ISCHR(Status.st_mode)) + Type = file_type::character_file; + else if (S_ISFIFO(Status.st_mode)) + Type = file_type::fifo_file; + else if (S_ISSOCK(Status.st_mode)) + Type = file_type::socket_file; + + perms Perms = static_cast(Status.st_mode); + Result = + file_status(Type, Perms, Status.st_dev, Status.st_ino, Status.st_mtime, + Status.st_uid, Status.st_gid, Status.st_size); + + return std::error_code(); +} + +std::error_code status(const Twine &Path, file_status &Result) { + SmallString<128> PathStorage; + StringRef P = Path.toNullTerminatedStringRef(PathStorage); + + struct stat Status; + int StatRet = ::stat(P.begin(), &Status); + return fillStatus(StatRet, Status, Result); +} + +std::error_code status(int FD, file_status &Result) { + struct stat Status; + int StatRet = ::fstat(FD, &Status); + return fillStatus(StatRet, Status, Result); +} + +std::error_code mapped_file_region::init(int FD, uint64_t Offset, + mapmode Mode) { + assert(Size != 0); + + int flags = (Mode == readwrite) ? MAP_SHARED : MAP_PRIVATE; + int prot = (Mode == readonly) ? PROT_READ : (PROT_READ | PROT_WRITE); + Mapping = ::mmap(nullptr, Size, prot, flags, FD, Offset); + if (Mapping == MAP_FAILED) + return std::error_code(errno, std::generic_category()); + return std::error_code(); +} + +mapped_file_region::mapped_file_region(int fd, mapmode mode, uint64_t length, + uint64_t offset, std::error_code &ec) + : Size(length), Mapping() { + // Make sure that the requested size fits within SIZE_T. + if (length > std::numeric_limits::max()) { + ec = make_error_code(errc::invalid_argument); + return; + } + + ec = init(fd, offset, mode); + if (ec) + Mapping = nullptr; +} + +mapped_file_region::~mapped_file_region() { + if (Mapping) + ::munmap(Mapping, Size); +} + +uint64_t mapped_file_region::size() const { + assert(Mapping && "Mapping failed but used anyway!"); + return Size; +} + +char *mapped_file_region::data() const { + assert(Mapping && "Mapping failed but used anyway!"); + return reinterpret_cast(Mapping); +} + +const char *mapped_file_region::const_data() const { + assert(Mapping && "Mapping failed but used anyway!"); + return reinterpret_cast(Mapping); +} + +int mapped_file_region::alignment() { + return 4096; +} + +std::error_code detail::directory_iterator_construct(detail::DirIterState &it, + StringRef path){ + SmallString<128> path_null(path); + DIR *directory = ::opendir(path_null.c_str()); + if (!directory) + return std::error_code(errno, std::generic_category()); + + it.IterationHandle = reinterpret_cast(directory); + // Add something for replace_filename to replace. + path::append(path_null, "."); + it.CurrentEntry = directory_entry(path_null.str()); + return directory_iterator_increment(it); +} + +std::error_code detail::directory_iterator_destruct(detail::DirIterState &it) { + if (it.IterationHandle) + ::closedir(reinterpret_cast

    (it.IterationHandle)); + it.IterationHandle = 0; + it.CurrentEntry = directory_entry(); + return std::error_code(); +} + +std::error_code detail::directory_iterator_increment(detail::DirIterState &it) { + errno = 0; + dirent *cur_dir = ::readdir(reinterpret_cast(it.IterationHandle)); + if (cur_dir == nullptr && errno != 0) { + return std::error_code(errno, std::generic_category()); + } else if (cur_dir != nullptr) { + StringRef name(cur_dir->d_name, NAMLEN(cur_dir)); + if ((name.size() == 1 && name[0] == '.') || + (name.size() == 2 && name[0] == '.' && name[1] == '.')) + return directory_iterator_increment(it); + it.CurrentEntry.replace_filename(name); + } else + return directory_iterator_destruct(it); + + return std::error_code(); +} + +std::error_code openFileForRead(const Twine &Name, int &ResultFD) { + SmallString<128> Storage; + StringRef P = Name.toNullTerminatedStringRef(Storage); + while ((ResultFD = open(P.begin(), O_RDONLY)) < 0) { + if (errno != EINTR) + return std::error_code(errno, std::generic_category()); + } + return std::error_code(); +} + +std::error_code openFileForWrite(const Twine &Name, int &ResultFD, + sys::fs::OpenFlags Flags, unsigned Mode) { + // Verify that we don't have both "append" and "excl". + assert((!(Flags & sys::fs::F_Excl) || !(Flags & sys::fs::F_Append)) && + "Cannot specify both 'excl' and 'append' file creation flags!"); + + int OpenFlags = O_CREAT; + + if (Flags & F_RW) + OpenFlags |= O_RDWR; + else + OpenFlags |= O_WRONLY; + + if (Flags & F_Append) + OpenFlags |= O_APPEND; + else + OpenFlags |= O_TRUNC; + + if (Flags & F_Excl) + OpenFlags |= O_EXCL; + + SmallString<128> Storage; + StringRef P = Name.toNullTerminatedStringRef(Storage); + while ((ResultFD = open(P.begin(), OpenFlags, Mode)) < 0) { + if (errno != EINTR) + return std::error_code(errno, std::generic_category()); + } + return std::error_code(); +} + +} // end namespace fs + +namespace path { + +bool home_directory(SmallVectorImpl &result) { + if (char *RequestedDir = getenv("HOME")) { + result.clear(); + result.append(RequestedDir, RequestedDir + strlen(RequestedDir)); + return true; + } + + return false; +} + +static bool getDarwinConfDir(bool TempDir, SmallVectorImpl &Result) { + #if defined(_CS_DARWIN_USER_TEMP_DIR) && defined(_CS_DARWIN_USER_CACHE_DIR) + // On Darwin, use DARWIN_USER_TEMP_DIR or DARWIN_USER_CACHE_DIR. + // macros defined in on darwin >= 9 + int ConfName = TempDir ? _CS_DARWIN_USER_TEMP_DIR + : _CS_DARWIN_USER_CACHE_DIR; + size_t ConfLen = confstr(ConfName, nullptr, 0); + if (ConfLen > 0) { + do { + Result.resize(ConfLen); + ConfLen = confstr(ConfName, Result.data(), Result.size()); + } while (ConfLen > 0 && ConfLen != Result.size()); + + if (ConfLen > 0) { + assert(Result.back() == 0); + Result.pop_back(); + return true; + } + + Result.clear(); + } + #endif + return false; +} + +static bool getUserCacheDir(SmallVectorImpl &Result) { + // First try using XDS_CACHE_HOME env variable, + // as specified in XDG Base Directory Specification at + // http://standards.freedesktop.org/basedir-spec/basedir-spec-latest.html + if (const char *XdsCacheDir = std::getenv("XDS_CACHE_HOME")) { + Result.clear(); + Result.append(XdsCacheDir, XdsCacheDir + strlen(XdsCacheDir)); + return true; + } + + // Try Darwin configuration query + if (getDarwinConfDir(false, Result)) + return true; + + // Use "$HOME/.cache" if $HOME is available + if (home_directory(Result)) { + append(Result, ".cache"); + return true; + } + + return false; +} + +static const char *getEnvTempDir() { + // Check whether the temporary directory is specified by an environment + // variable. + const char *EnvironmentVariables[] = {"TMPDIR", "TMP", "TEMP", "TEMPDIR"}; + for (const char *Env : EnvironmentVariables) { + if (const char *Dir = std::getenv(Env)) + return Dir; + } + + return nullptr; +} + +static const char *getDefaultTempDir(bool ErasedOnReboot) { +#ifdef P_tmpdir + if ((bool)P_tmpdir) + return P_tmpdir; +#endif + + if (ErasedOnReboot) + return "/tmp"; + return "/var/tmp"; +} + +void system_temp_directory(bool ErasedOnReboot, SmallVectorImpl &Result) { + Result.clear(); + + if (ErasedOnReboot) { + // There is no env variable for the cache directory. + if (const char *RequestedDir = getEnvTempDir()) { + Result.append(RequestedDir, RequestedDir + strlen(RequestedDir)); + return; + } + } + + if (getDarwinConfDir(ErasedOnReboot, Result)) + return; + + const char *RequestedDir = getDefaultTempDir(ErasedOnReboot); + Result.append(RequestedDir, RequestedDir + strlen(RequestedDir)); +} + +} // end namespace path + +} // end namespace sys +} // end namespace llvm_ks diff --git a/llvm/lib/Support/Unix/Process.inc b/llvm/lib/Support/Unix/Process.inc new file mode 100644 index 0000000..0b89f0c --- /dev/null +++ b/llvm/lib/Support/Unix/Process.inc @@ -0,0 +1,368 @@ +//===- Unix/Process.cpp - Unix Process Implementation --------- -*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file provides the generic Unix implementation of the Process class. +// +//===----------------------------------------------------------------------===// + +#include "Unix.h" +#include "llvm/ADT/Hashing.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/Mutex.h" +#include "llvm/Support/MutexGuard.h" +#if HAVE_FCNTL_H +#include +#endif +#ifdef HAVE_SYS_TIME_H +#include +#endif +#ifdef HAVE_SYS_RESOURCE_H +#include +#endif +#ifdef HAVE_SYS_STAT_H +#include +#endif +#if HAVE_SIGNAL_H +#include +#endif +// DragonFlyBSD, OpenBSD, and Bitrig have deprecated for +// instead. Unix.h includes this for us already. +#if defined(HAVE_MALLOC_H) && !defined(__DragonFly__) && \ + !defined(__OpenBSD__) && !defined(__Bitrig__) +#include +#endif +#if defined(HAVE_MALLCTL) +#include +#endif +#ifdef HAVE_MALLOC_MALLOC_H +#include +#endif +#ifdef HAVE_SYS_IOCTL_H +# include +#endif +#ifdef HAVE_TERMIOS_H +# include +#endif + +//===----------------------------------------------------------------------===// +//=== WARNING: Implementation here must contain only generic UNIX code that +//=== is guaranteed to work on *all* UNIX variants. +//===----------------------------------------------------------------------===// + +using namespace llvm_ks; +using namespace sys; + +// On Cygwin, getpagesize() returns 64k(AllocationGranularity) and +// offset in mmap(3) should be aligned to the AllocationGranularity. +unsigned Process::getPageSize() { + return 4096; +#if 0 +#if defined(HAVE_GETPAGESIZE) + static const int page_size = ::getpagesize(); +#elif defined(HAVE_SYSCONF) + static long page_size = ::sysconf(_SC_PAGE_SIZE); +#else +#warning Cannot get the page size on this machine +#endif + return static_cast(page_size); +#endif +} + +size_t Process::GetMallocUsage() { +#if defined(HAVE_MALLINFO) + struct mallinfo mi; + mi = ::mallinfo(); + return mi.uordblks; +#elif defined(HAVE_MALLOC_ZONE_STATISTICS) && defined(HAVE_MALLOC_MALLOC_H) + malloc_statistics_t Stats; + malloc_zone_statistics(malloc_default_zone(), &Stats); + return Stats.size_in_use; // darwin +#elif defined(HAVE_MALLCTL) + size_t alloc, sz; + sz = sizeof(size_t); + if (mallctl("stats.allocated", &alloc, &sz, NULL, 0) == 0) + return alloc; + return 0; +#elif defined(HAVE_SBRK) + // Note this is only an approximation and more closely resembles + // the value returned by mallinfo in the arena field. + static char *StartOfMemory = reinterpret_cast(::sbrk(0)); + char *EndOfMemory = (char*)sbrk(0); + if (EndOfMemory != ((char*)-1) && StartOfMemory != ((char*)-1)) + return EndOfMemory - StartOfMemory; + return 0; +#else +#warning Cannot get malloc info on this platform + return 0; +#endif +} + +#if defined(HAVE_MACH_MACH_H) && !defined(__GNU__) +#include +#endif + +// Some LLVM programs such as bugpoint produce core files as a normal part of +// their operation. To prevent the disk from filling up, this function +// does what's necessary to prevent their generation. +void Process::PreventCoreFiles() { +#if HAVE_SETRLIMIT + struct rlimit rlim; + rlim.rlim_cur = rlim.rlim_max = 0; + setrlimit(RLIMIT_CORE, &rlim); +#endif + +#if defined(HAVE_MACH_MACH_H) && !defined(__GNU__) + // Disable crash reporting on Mac OS X 10.0-10.4 + + // get information about the original set of exception ports for the task + mach_msg_type_number_t Count = 0; + exception_mask_t OriginalMasks[EXC_TYPES_COUNT]; + exception_port_t OriginalPorts[EXC_TYPES_COUNT]; + exception_behavior_t OriginalBehaviors[EXC_TYPES_COUNT]; + thread_state_flavor_t OriginalFlavors[EXC_TYPES_COUNT]; + kern_return_t err = + task_get_exception_ports(mach_task_self(), EXC_MASK_ALL, OriginalMasks, + &Count, OriginalPorts, OriginalBehaviors, + OriginalFlavors); + if (err == KERN_SUCCESS) { + // replace each with MACH_PORT_NULL. + for (unsigned i = 0; i != Count; ++i) + task_set_exception_ports(mach_task_self(), OriginalMasks[i], + MACH_PORT_NULL, OriginalBehaviors[i], + OriginalFlavors[i]); + } + + // Disable crash reporting on Mac OS X 10.5 + signal(SIGABRT, _exit); + signal(SIGILL, _exit); + signal(SIGFPE, _exit); + signal(SIGSEGV, _exit); + signal(SIGBUS, _exit); +#endif +} + +Optional Process::GetEnv(StringRef Name) { + std::string NameStr = Name.str(); + const char *Val = ::getenv(NameStr.c_str()); + if (!Val) + return None; + return std::string(Val); +} + +std::error_code +Process::GetArgumentVector(SmallVectorImpl &ArgsOut, + ArrayRef ArgsIn, + SpecificBumpPtrAllocator &) { + ArgsOut.append(ArgsIn.begin(), ArgsIn.end()); + + return std::error_code(); +} + +namespace { +class FDCloser { +public: + FDCloser(int &FD) : FD(FD), KeepOpen(false) {} + void keepOpen() { KeepOpen = true; } + ~FDCloser() { + if (!KeepOpen && FD >= 0) + ::close(FD); + } + +private: + FDCloser(const FDCloser &) = delete; + void operator=(const FDCloser &) = delete; + + int &FD; + bool KeepOpen; +}; +} + +std::error_code Process::FixupStandardFileDescriptors() { + int NullFD = -1; + FDCloser FDC(NullFD); + const int StandardFDs[] = {STDIN_FILENO, STDOUT_FILENO, STDERR_FILENO}; + for (int StandardFD : StandardFDs) { + struct stat st; + errno = 0; + while (fstat(StandardFD, &st) < 0) { + assert(errno && "expected errno to be set if fstat failed!"); + // fstat should return EBADF if the file descriptor is closed. + if (errno == EBADF) + break; + // retry fstat if we got EINTR, otherwise bubble up the failure. + if (errno != EINTR) + return std::error_code(errno, std::generic_category()); + } + // if fstat succeeds, move on to the next FD. + if (!errno) + continue; + assert(errno == EBADF && "expected errno to have EBADF at this point!"); + + if (NullFD < 0) { + while ((NullFD = open("/dev/null", O_RDWR)) < 0) { + if (errno == EINTR) + continue; + return std::error_code(errno, std::generic_category()); + } + } + + if (NullFD == StandardFD) + FDC.keepOpen(); + else if (dup2(NullFD, StandardFD) < 0) + return std::error_code(errno, std::generic_category()); + } + return std::error_code(); +} + +std::error_code Process::SafelyCloseFileDescriptor(int FD) { + // Create a signal set filled with *all* signals. + sigset_t FullSet; + if (sigfillset(&FullSet) < 0) + return std::error_code(errno, std::generic_category()); + // Atomically swap our current signal mask with a full mask. + sigset_t SavedSet; +#if LLVM_ENABLE_THREADS + if (int EC = pthread_sigmask(SIG_SETMASK, &FullSet, &SavedSet)) + return std::error_code(EC, std::generic_category()); +#else + if (sigprocmask(SIG_SETMASK, &FullSet, &SavedSet) < 0) + return std::error_code(errno, std::generic_category()); +#endif + // Attempt to close the file descriptor. + // We need to save the error, if one occurs, because our subsequent call to + // pthread_sigmask might tamper with errno. + int ErrnoFromClose = 0; + if (::close(FD) < 0) + ErrnoFromClose = errno; + // Restore the signal mask back to what we saved earlier. + int EC = 0; +#if LLVM_ENABLE_THREADS + EC = pthread_sigmask(SIG_SETMASK, &SavedSet, nullptr); +#else + if (sigprocmask(SIG_SETMASK, &SavedSet, nullptr) < 0) + EC = errno; +#endif + // The error code from close takes precedence over the one from + // pthread_sigmask. + if (ErrnoFromClose) + return std::error_code(ErrnoFromClose, std::generic_category()); + return std::error_code(EC, std::generic_category()); +} + +bool Process::FileDescriptorIsDisplayed(int fd) { +#if HAVE_ISATTY + return isatty(fd); +#else + // If we don't have isatty, just return false. + return false; +#endif +} + +#ifdef HAVE_TERMINFO +// We manually declare these extern functions because finding the correct +// headers from various terminfo, curses, or other sources is harder than +// writing their specs down. +extern "C" int setupterm(char *term, int filedes, int *errret); +extern "C" struct term *set_curterm(struct term *termp); +extern "C" int del_curterm(struct term *termp); +extern "C" int tigetnum(char *capname); +#endif + +#ifdef HAVE_TERMINFO +static ManagedStatic TermColorMutex; +#endif + +static bool terminalHasColors(int fd) { +#ifdef HAVE_TERMINFO + // First, acquire a global lock because these C routines are thread hostile. + MutexGuard G(*TermColorMutex); + + int errret = 0; + if (setupterm((char *)nullptr, fd, &errret) != 0) + // Regardless of why, if we can't get terminfo, we shouldn't try to print + // colors. + return false; + + // Test whether the terminal as set up supports color output. How to do this + // isn't entirely obvious. We can use the curses routine 'has_colors' but it + // would be nice to avoid a dependency on curses proper when we can make do + // with a minimal terminfo parsing library. Also, we don't really care whether + // the terminal supports the curses-specific color changing routines, merely + // if it will interpret ANSI color escape codes in a reasonable way. Thus, the + // strategy here is just to query the baseline colors capability and if it + // supports colors at all to assume it will translate the escape codes into + // whatever range of colors it does support. We can add more detailed tests + // here if users report them as necessary. + // + // The 'tigetnum' routine returns -2 or -1 on errors, and might return 0 if + // the terminfo says that no colors are supported. + bool HasColors = tigetnum(const_cast("colors")) > 0; + + // Now extract the structure allocated by setupterm and free its memory + // through a really silly dance. + struct term *termp = set_curterm((struct term *)nullptr); + (void)del_curterm(termp); // Drop any errors here. + + // Return true if we found a color capabilities for the current terminal. + if (HasColors) + return true; +#endif + + // Otherwise, be conservative. + return false; +} + +bool Process::FileDescriptorHasColors(int fd) { + // A file descriptor has colors if it is displayed and the terminal has + // colors. + return FileDescriptorIsDisplayed(fd) && terminalHasColors(fd); +} + +bool Process::StandardOutHasColors() { + return FileDescriptorHasColors(STDOUT_FILENO); +} + +bool Process::StandardErrHasColors() { + return FileDescriptorHasColors(STDERR_FILENO); +} + +void Process::UseANSIEscapeCodes(bool /*enable*/) { + // No effect. +} + +bool Process::ColorNeedsFlush() { + // No, we use ANSI escape sequences. + return false; +} + +const char *Process::OutputColor(char code, bool bold, bool bg) { + return colorcodes[bg?1:0][bold?1:0][code&7]; +} + +const char *Process::OutputBold(bool bg) { + return "\033[1m"; +} + +const char *Process::OutputReverse() { + return "\033[7m"; +} + +const char *Process::ResetColor() { + return "\033[0m"; +} + +unsigned llvm_ks::sys::Process::GetRandomNumber() { +#if defined(HAVE_DECL_ARC4RANDOM) && HAVE_DECL_ARC4RANDOM + return arc4random(); +#else + static int x = (::srand(GetRandomNumberSeed()), 0); + (void)x; + return ::rand(); +#endif +} diff --git a/llvm/lib/Support/Unix/README.txt b/llvm/lib/Support/Unix/README.txt new file mode 100644 index 0000000..3d547c2 --- /dev/null +++ b/llvm/lib/Support/Unix/README.txt @@ -0,0 +1,16 @@ +llvm/lib/Support/Unix README +=========================== + +This directory provides implementations of the lib/System classes that +are common to two or more variants of UNIX. For example, the directory +structure underneath this directory could look like this: + +Unix - only code that is truly generic to all UNIX platforms + Posix - code that is specific to Posix variants of UNIX + SUS - code that is specific to the Single Unix Specification + SysV - code that is specific to System V variants of UNIX + +As a rule, only those directories actually needing to be created should be +created. Also, further subdirectories could be created to reflect versions of +the various standards. For example, under SUS there could be v1, v2, and v3 +subdirectories to reflect the three major versions of SUS. diff --git a/llvm/lib/Support/Unix/Unix.h b/llvm/lib/Support/Unix/Unix.h new file mode 100644 index 0000000..169ec9d --- /dev/null +++ b/llvm/lib/Support/Unix/Unix.h @@ -0,0 +1,68 @@ +//===- llvm/Support/Unix/Unix.h - Common Unix Include File -------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines things specific to Unix implementations. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIB_SUPPORT_UNIX_UNIX_H +#define LLVM_LIB_SUPPORT_UNIX_UNIX_H + +//===----------------------------------------------------------------------===// +//=== WARNING: Implementation here must contain only generic UNIX code that +//=== is guaranteed to work on all UNIX variants. +//===----------------------------------------------------------------------===// + +#include "llvm/Config/config.h" // Get autoconf configuration settings +#include "llvm/Support/Errno.h" +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef HAVE_UNISTD_H +#include +#endif + +#ifdef HAVE_SYS_PARAM_H +#include +#endif + +#ifdef HAVE_SYS_TIME_H +# include +#endif +#include + +#ifdef HAVE_DLFCN_H +# include +#endif + +/// This function builds an error message into \p ErrMsg using the \p prefix +/// string and the Unix error number given by \p errnum. If errnum is -1, the +/// default then the value of errno is used. +/// @brief Make an error message +/// +/// If the error number can be converted to a string, it will be +/// separated from prefix by ": ". +static inline bool MakeErrMsg( + std::string* ErrMsg, const std::string& prefix, int errnum = -1) { + if (!ErrMsg) + return true; + if (errnum == -1) + errnum = errno; + *ErrMsg = prefix + ": "; // + llvm_ks::sys::StrError(errnum); + return true; +} + +#endif diff --git a/llvm/lib/Support/Windows/Memory.inc b/llvm/lib/Support/Windows/Memory.inc new file mode 100644 index 0000000..b1b4c4b --- /dev/null +++ b/llvm/lib/Support/Windows/Memory.inc @@ -0,0 +1,243 @@ +//===- Win32/Memory.cpp - Win32 Memory Implementation -----------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file provides the Win32 specific implementation of various Memory +// management utilities +// +//===----------------------------------------------------------------------===// + +#include "llvm/Support/DataTypes.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/WindowsError.h" + +// The Windows.h header must be the last one included. +#include "WindowsSupport.h" + +namespace { + +DWORD getWindowsProtectionFlags(unsigned Flags) { + switch (Flags) { + // Contrary to what you might expect, the Windows page protection flags + // are not a bitwise combination of RWX values + case llvm_ks::sys::Memory::MF_READ: + return PAGE_READONLY; + case llvm_ks::sys::Memory::MF_WRITE: + // Note: PAGE_WRITE is not supported by VirtualProtect + return PAGE_READWRITE; + case llvm_ks::sys::Memory::MF_READ|llvm_ks::sys::Memory::MF_WRITE: + return PAGE_READWRITE; + case llvm_ks::sys::Memory::MF_READ|llvm_ks::sys::Memory::MF_EXEC: + return PAGE_EXECUTE_READ; + case llvm_ks::sys::Memory::MF_READ | + llvm_ks::sys::Memory::MF_WRITE | + llvm_ks::sys::Memory::MF_EXEC: + return PAGE_EXECUTE_READWRITE; + case llvm_ks::sys::Memory::MF_EXEC: + return PAGE_EXECUTE; + default: + llvm_unreachable("Illegal memory protection flag specified!"); + } + // Provide a default return value as required by some compilers. + return PAGE_NOACCESS; +} + +size_t getAllocationGranularity() { + SYSTEM_INFO Info; + ::GetSystemInfo(&Info); + if (Info.dwPageSize > Info.dwAllocationGranularity) + return Info.dwPageSize; + else + return Info.dwAllocationGranularity; +} + +} // namespace + +namespace llvm_ks { +namespace sys { + +//===----------------------------------------------------------------------===// +//=== WARNING: Implementation here must contain only Win32 specific code +//=== and must not be UNIX code +//===----------------------------------------------------------------------===// + +MemoryBlock Memory::allocateMappedMemory(size_t NumBytes, + const MemoryBlock *const NearBlock, + unsigned Flags, + std::error_code &EC) { + EC = std::error_code(); + if (NumBytes == 0) + return MemoryBlock(); + + // While we'd be happy to allocate single pages, the Windows allocation + // granularity may be larger than a single page (in practice, it is 64K) + // so mapping less than that will create an unreachable fragment of memory. + // Avoid using one-time initialization of static locals here, since they + // aren't thread safe with MSVC. + static volatile size_t GranularityCached; + size_t Granularity = GranularityCached; + if (Granularity == 0) { + Granularity = getAllocationGranularity(); + GranularityCached = Granularity; + } + + const size_t NumBlocks = (NumBytes+Granularity-1)/Granularity; + + uintptr_t Start = NearBlock ? reinterpret_cast(NearBlock->base()) + + NearBlock->size() + : 0; + + // If the requested address is not aligned to the allocation granularity, + // round up to get beyond NearBlock. VirtualAlloc would have rounded down. + if (Start && Start % Granularity != 0) + Start += Granularity - Start % Granularity; + + DWORD Protect = getWindowsProtectionFlags(Flags); + + void *PA = ::VirtualAlloc(reinterpret_cast(Start), + NumBlocks*Granularity, + MEM_RESERVE | MEM_COMMIT, Protect); + if (PA == NULL) { + if (NearBlock) { + // Try again without the NearBlock hint + return allocateMappedMemory(NumBytes, NULL, Flags, EC); + } + EC = mapWindowsError(::GetLastError()); + return MemoryBlock(); + } + + MemoryBlock Result; + Result.Address = PA; + Result.Size = NumBlocks*Granularity; + + if (Flags & MF_EXEC) + Memory::InvalidateInstructionCache(Result.Address, Result.Size); + + return Result; +} + + std::error_code Memory::releaseMappedMemory(MemoryBlock &M) { + if (M.Address == 0 || M.Size == 0) + return std::error_code(); + + if (!VirtualFree(M.Address, 0, MEM_RELEASE)) + return mapWindowsError(::GetLastError()); + + M.Address = 0; + M.Size = 0; + + return std::error_code(); +} + + std::error_code Memory::protectMappedMemory(const MemoryBlock &M, + unsigned Flags) { + if (M.Address == 0 || M.Size == 0) + return std::error_code(); + + DWORD Protect = getWindowsProtectionFlags(Flags); + + DWORD OldFlags; + if (!VirtualProtect(M.Address, M.Size, Protect, &OldFlags)) + return mapWindowsError(::GetLastError()); + + if (Flags & MF_EXEC) + Memory::InvalidateInstructionCache(M.Address, M.Size); + + return std::error_code(); +} + +/// InvalidateInstructionCache - Before the JIT can run a block of code +/// that has been emitted it must invalidate the instruction cache on some +/// platforms. +void Memory::InvalidateInstructionCache( + const void *Addr, size_t Len) { + FlushInstructionCache(GetCurrentProcess(), Addr, Len); +} + + +MemoryBlock Memory::AllocateRWX(size_t NumBytes, + const MemoryBlock *NearBlock, + std::string *ErrMsg) { + MemoryBlock MB; + std::error_code EC; + MB = allocateMappedMemory(NumBytes, NearBlock, + MF_READ|MF_WRITE|MF_EXEC, EC); + if (EC != std::error_code() && ErrMsg) { + MakeErrMsg(ErrMsg, EC.message()); + } + return MB; +} + +bool Memory::ReleaseRWX(MemoryBlock &M, std::string *ErrMsg) { + std::error_code EC = releaseMappedMemory(M); + if (EC == std::error_code()) + return false; + MakeErrMsg(ErrMsg, EC.message()); + return true; +} + +static DWORD getProtection(const void *addr) { + MEMORY_BASIC_INFORMATION info; + if (sizeof(info) == ::VirtualQuery(addr, &info, sizeof(info))) { + return info.Protect; + } + return 0; +} + +bool Memory::setWritable(MemoryBlock &M, std::string *ErrMsg) { + if (!setRangeWritable(M.Address, M.Size)) { + return MakeErrMsg(ErrMsg, "Cannot set memory to writeable"); + } + return true; +} + +bool Memory::setExecutable(MemoryBlock &M, std::string *ErrMsg) { + if (!setRangeExecutable(M.Address, M.Size)) { + return MakeErrMsg(ErrMsg, "Cannot set memory to executable"); + } + return true; +} + +bool Memory::setRangeWritable(const void *Addr, size_t Size) { + DWORD prot = getProtection(Addr); + if (!prot) + return false; + + if (prot == PAGE_EXECUTE || prot == PAGE_EXECUTE_READ) { + prot = PAGE_EXECUTE_READWRITE; + } else if (prot == PAGE_NOACCESS || prot == PAGE_READONLY) { + prot = PAGE_READWRITE; + } + + DWORD oldProt; + Memory::InvalidateInstructionCache(Addr, Size); + return ::VirtualProtect(const_cast(Addr), Size, prot, &oldProt) + == TRUE; +} + +bool Memory::setRangeExecutable(const void *Addr, size_t Size) { + DWORD prot = getProtection(Addr); + if (!prot) + return false; + + if (prot == PAGE_NOACCESS) { + prot = PAGE_EXECUTE; + } else if (prot == PAGE_READONLY) { + prot = PAGE_EXECUTE_READ; + } else if (prot == PAGE_READWRITE) { + prot = PAGE_EXECUTE_READWRITE; + } + + DWORD oldProt; + Memory::InvalidateInstructionCache(Addr, Size); + return ::VirtualProtect(const_cast(Addr), Size, prot, &oldProt) + == TRUE; +} + +} // namespace sys +} // namespace llvm_ks diff --git a/llvm/lib/Support/Windows/Path.inc b/llvm/lib/Support/Windows/Path.inc new file mode 100644 index 0000000..4975009 --- /dev/null +++ b/llvm/lib/Support/Windows/Path.inc @@ -0,0 +1,869 @@ +//===- llvm/Support/Windows/Path.inc - Windows Path Impl --------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the Windows specific implementation of the Path API. +// +//===----------------------------------------------------------------------===// + +//===----------------------------------------------------------------------===// +//=== WARNING: Implementation here must contain only generic Windows code that +//=== is guaranteed to work on *all* Windows variants. +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/STLExtras.h" +#include "llvm/Support/WindowsError.h" +#include +#include +#include +#include + +// These two headers must be included last, and make sure shlobj is required +// after Windows.h to make sure it picks up our definition of _WIN32_WINNT +#include "WindowsSupport.h" +#include + +#undef max + +// MinGW doesn't define this. +#ifndef _ERRNO_T_DEFINED +#define _ERRNO_T_DEFINED +typedef int errno_t; +#endif + +#ifdef _MSC_VER +# pragma comment(lib, "advapi32.lib") // This provides CryptAcquireContextW. +# pragma comment(lib, "ole32.lib") // This provides CoTaskMemFree +#endif + +using namespace llvm_ks; + +using llvm_ks::sys::windows::UTF8ToUTF16; +using llvm_ks::sys::windows::UTF16ToUTF8; +using llvm_ks::sys::path::widenPath; + +static bool is_separator(const wchar_t value) { + switch (value) { + case L'\\': + case L'/': + return true; + default: + return false; + } +} + +namespace llvm_ks { +namespace sys { +namespace path { + +// Convert a UTF-8 path to UTF-16. Also, if the absolute equivalent of the +// path is longer than CreateDirectory can tolerate, make it absolute and +// prefixed by '\\?\'. +std::error_code widenPath(const Twine &Path8, + SmallVectorImpl &Path16) { + const size_t MaxDirLen = MAX_PATH - 12; // Must leave room for 8.3 filename. + + // Several operations would convert Path8 to SmallString; more efficient to + // do it once up front. + SmallString<128> Path8Str; + Path8.toVector(Path8Str); + + // If we made this path absolute, how much longer would it get? + size_t CurPathLen; + if (llvm_ks::sys::path::is_absolute(Twine(Path8Str))) + CurPathLen = 0; // No contribution from current_path needed. + else { + CurPathLen = ::GetCurrentDirectoryW(0, NULL); + if (CurPathLen == 0) + return mapWindowsError(::GetLastError()); + } + + // Would the absolute path be longer than our limit? + if ((Path8Str.size() + CurPathLen) >= MaxDirLen && + !Path8Str.startswith("\\\\?\\")) { + SmallString<2*MAX_PATH> FullPath("\\\\?\\"); + if (CurPathLen) { + SmallString<80> CurPath; + if (std::error_code EC = llvm_ks::sys::fs::current_path(CurPath)) + return EC; + FullPath.append(CurPath); + } + // Traverse the requested path, canonicalizing . and .. as we go (because + // the \\?\ prefix is documented to treat them as real components). + // The iterators don't report separators and append() always attaches + // preferred_separator so we don't need to call native() on the result. + for (llvm_ks::sys::path::const_iterator I = llvm_ks::sys::path::begin(Path8Str), + E = llvm_ks::sys::path::end(Path8Str); + I != E; ++I) { + if (I->size() == 1 && *I == ".") + continue; + if (I->size() == 2 && *I == "..") + llvm_ks::sys::path::remove_filename(FullPath); + else + llvm_ks::sys::path::append(FullPath, *I); + } + return UTF8ToUTF16(FullPath, Path16); + } + + // Just use the caller's original path. + return UTF8ToUTF16(Path8Str, Path16); +} +} // end namespace path + +namespace fs { + +std::string getMainExecutable(const char *argv0, void *MainExecAddr) { + SmallVector PathName; + DWORD Size = ::GetModuleFileNameW(NULL, PathName.data(), PathName.capacity()); + + // A zero return value indicates a failure other than insufficient space. + if (Size == 0) + return ""; + + // Insufficient space is determined by a return value equal to the size of + // the buffer passed in. + if (Size == PathName.capacity()) + return ""; + + // On success, GetModuleFileNameW returns the number of characters written to + // the buffer not including the NULL terminator. + PathName.set_size(Size); + + // Convert the result from UTF-16 to UTF-8. + SmallVector PathNameUTF8; + if (UTF16ToUTF8(PathName.data(), PathName.size(), PathNameUTF8)) + return ""; + + return std::string(PathNameUTF8.data()); +} + +UniqueID file_status::getUniqueID() const { + // The file is uniquely identified by the volume serial number along + // with the 64-bit file identifier. + uint64_t FileID = (static_cast(FileIndexHigh) << 32ULL) | + static_cast(FileIndexLow); + + return UniqueID(VolumeSerialNumber, FileID); +} + +std::error_code current_path(SmallVectorImpl &result) { + SmallVector cur_path; + DWORD len = MAX_PATH; + + do { + cur_path.reserve(len); + len = ::GetCurrentDirectoryW(cur_path.capacity(), cur_path.data()); + + // A zero return value indicates a failure other than insufficient space. + if (len == 0) + return mapWindowsError(::GetLastError()); + + // If there's insufficient space, the len returned is larger than the len + // given. + } while (len > cur_path.capacity()); + + // On success, GetCurrentDirectoryW returns the number of characters not + // including the null-terminator. + cur_path.set_size(len); + return UTF16ToUTF8(cur_path.begin(), cur_path.size(), result); +} + +std::error_code create_directory(const Twine &path, bool IgnoreExisting, + perms Perms) { + SmallVector path_utf16; + + if (std::error_code ec = widenPath(path, path_utf16)) + return ec; + + if (!::CreateDirectoryW(path_utf16.begin(), NULL)) { + DWORD LastError = ::GetLastError(); + if (LastError != ERROR_ALREADY_EXISTS || !IgnoreExisting) + return mapWindowsError(LastError); + } + + return std::error_code(); +} + +// We can't use symbolic links for windows. +std::error_code create_link(const Twine &to, const Twine &from) { + // Convert to utf-16. + SmallVector wide_from; + SmallVector wide_to; + if (std::error_code ec = widenPath(from, wide_from)) + return ec; + if (std::error_code ec = widenPath(to, wide_to)) + return ec; + + if (!::CreateHardLinkW(wide_from.begin(), wide_to.begin(), NULL)) + return mapWindowsError(::GetLastError()); + + return std::error_code(); +} + +std::error_code remove(const Twine &path, bool IgnoreNonExisting) { + SmallVector path_utf16; + + file_status ST; + if (std::error_code EC = status(path, ST)) { + if (EC != errc::no_such_file_or_directory || !IgnoreNonExisting) + return EC; + return std::error_code(); + } + + if (std::error_code ec = widenPath(path, path_utf16)) + return ec; + + if (ST.type() == file_type::directory_file) { + if (!::RemoveDirectoryW(c_str(path_utf16))) { + std::error_code EC = mapWindowsError(::GetLastError()); + if (EC != errc::no_such_file_or_directory || !IgnoreNonExisting) + return EC; + } + return std::error_code(); + } + if (!::DeleteFileW(c_str(path_utf16))) { + std::error_code EC = mapWindowsError(::GetLastError()); + if (EC != errc::no_such_file_or_directory || !IgnoreNonExisting) + return EC; + } + return std::error_code(); +} + +std::error_code rename(const Twine &from, const Twine &to) { + // Convert to utf-16. + SmallVector wide_from; + SmallVector wide_to; + if (std::error_code ec = widenPath(from, wide_from)) + return ec; + if (std::error_code ec = widenPath(to, wide_to)) + return ec; + + std::error_code ec = std::error_code(); + + // Retry while we see ERROR_ACCESS_DENIED. + // System scanners (eg. indexer) might open the source file when it is written + // and closed. + + for (int i = 0; i < 2000; i++) { + // Try ReplaceFile first, as it is able to associate a new data stream with + // the destination even if the destination file is currently open. + if (::ReplaceFileW(wide_to.begin(), wide_from.begin(), NULL, 0, NULL, NULL)) + return std::error_code(); + + // We get ERROR_FILE_NOT_FOUND if the destination file is missing. + // MoveFileEx can handle this case. + DWORD ReplaceError = ::GetLastError(); + ec = mapWindowsError(ReplaceError); + if (ReplaceError != ERROR_ACCESS_DENIED && + ReplaceError != ERROR_FILE_NOT_FOUND && + ReplaceError != ERROR_SHARING_VIOLATION) + break; + + if (::MoveFileExW(wide_from.begin(), wide_to.begin(), + MOVEFILE_COPY_ALLOWED | MOVEFILE_REPLACE_EXISTING)) + return std::error_code(); + + DWORD MoveError = ::GetLastError(); + ec = mapWindowsError(MoveError); + if (MoveError != ERROR_ACCESS_DENIED) break; + + ::Sleep(1); + } + + return ec; +} + +std::error_code resize_file(int FD, uint64_t Size) { +#ifdef HAVE__CHSIZE_S + errno_t error = ::_chsize_s(FD, Size); +#else + errno_t error = ::_chsize(FD, Size); +#endif + return std::error_code(error, std::generic_category()); +} + +std::error_code access(const Twine &Path, AccessMode Mode) { + SmallVector PathUtf16; + + if (std::error_code EC = widenPath(Path, PathUtf16)) + return EC; + + DWORD Attributes = ::GetFileAttributesW(PathUtf16.begin()); + + if (Attributes == INVALID_FILE_ATTRIBUTES) { + // See if the file didn't actually exist. + DWORD LastError = ::GetLastError(); + if (LastError != ERROR_FILE_NOT_FOUND && + LastError != ERROR_PATH_NOT_FOUND) + return mapWindowsError(LastError); + return errc::no_such_file_or_directory; + } + + if (Mode == AccessMode::Write && (Attributes & FILE_ATTRIBUTE_READONLY)) + return errc::permission_denied; + + return std::error_code(); +} + +bool can_execute(const Twine &Path) { + return !access(Path, AccessMode::Execute) || + !access(Path + ".exe", AccessMode::Execute); +} + +bool equivalent(file_status A, file_status B) { + assert(status_known(A) && status_known(B)); + return A.FileIndexHigh == B.FileIndexHigh && + A.FileIndexLow == B.FileIndexLow && + A.FileSizeHigh == B.FileSizeHigh && + A.FileSizeLow == B.FileSizeLow && + A.LastWriteTimeHigh == B.LastWriteTimeHigh && + A.LastWriteTimeLow == B.LastWriteTimeLow && + A.VolumeSerialNumber == B.VolumeSerialNumber; +} + +std::error_code equivalent(const Twine &A, const Twine &B, bool &result) { + file_status fsA, fsB; + if (std::error_code ec = status(A, fsA)) + return ec; + if (std::error_code ec = status(B, fsB)) + return ec; + result = equivalent(fsA, fsB); + return std::error_code(); +} + +static bool isReservedName(StringRef path) { + // This list of reserved names comes from MSDN, at: + // http://msdn.microsoft.com/en-us/library/aa365247%28v=vs.85%29.aspx + static const char *const sReservedNames[] = { "nul", "con", "prn", "aux", + "com1", "com2", "com3", "com4", + "com5", "com6", "com7", "com8", + "com9", "lpt1", "lpt2", "lpt3", + "lpt4", "lpt5", "lpt6", "lpt7", + "lpt8", "lpt9" }; + + // First, check to see if this is a device namespace, which always + // starts with \\.\, since device namespaces are not legal file paths. + if (path.startswith("\\\\.\\")) + return true; + + // Then compare against the list of ancient reserved names + for (size_t i = 0; i < array_lengthof(sReservedNames); ++i) { + if (path.equals_lower(sReservedNames[i])) + return true; + } + + // The path isn't what we consider reserved. + return false; +} + +static std::error_code getStatus(HANDLE FileHandle, file_status &Result) { + if (FileHandle == INVALID_HANDLE_VALUE) + goto handle_status_error; + + switch (::GetFileType(FileHandle)) { + default: + llvm_unreachable("Don't know anything about this file type"); + case FILE_TYPE_UNKNOWN: { + DWORD Err = ::GetLastError(); + if (Err != NO_ERROR) + return mapWindowsError(Err); + Result = file_status(file_type::type_unknown); + return std::error_code(); + } + case FILE_TYPE_DISK: + break; + case FILE_TYPE_CHAR: + Result = file_status(file_type::character_file); + return std::error_code(); + case FILE_TYPE_PIPE: + Result = file_status(file_type::fifo_file); + return std::error_code(); + } + + BY_HANDLE_FILE_INFORMATION Info; + if (!::GetFileInformationByHandle(FileHandle, &Info)) + goto handle_status_error; + + { + file_type Type = (Info.dwFileAttributes & FILE_ATTRIBUTE_DIRECTORY) + ? file_type::directory_file + : file_type::regular_file; + Result = + file_status(Type, Info.ftLastWriteTime.dwHighDateTime, + Info.ftLastWriteTime.dwLowDateTime, + Info.dwVolumeSerialNumber, Info.nFileSizeHigh, + Info.nFileSizeLow, Info.nFileIndexHigh, Info.nFileIndexLow); + return std::error_code(); + } + +handle_status_error: + DWORD LastError = ::GetLastError(); + if (LastError == ERROR_FILE_NOT_FOUND || + LastError == ERROR_PATH_NOT_FOUND) + Result = file_status(file_type::file_not_found); + else if (LastError == ERROR_SHARING_VIOLATION) + Result = file_status(file_type::type_unknown); + else + Result = file_status(file_type::status_error); + return mapWindowsError(LastError); +} + +std::error_code status(const Twine &path, file_status &result) { + SmallString<128> path_storage; + SmallVector path_utf16; + + StringRef path8 = path.toStringRef(path_storage); + if (isReservedName(path8)) { + result = file_status(file_type::character_file); + return std::error_code(); + } + + if (std::error_code ec = widenPath(path8, path_utf16)) + return ec; + + DWORD attr = ::GetFileAttributesW(path_utf16.begin()); + if (attr == INVALID_FILE_ATTRIBUTES) + return getStatus(INVALID_HANDLE_VALUE, result); + + // Handle reparse points. + if (attr & FILE_ATTRIBUTE_REPARSE_POINT) { + ScopedFileHandle h( + ::CreateFileW(path_utf16.begin(), + 0, // Attributes only. + FILE_SHARE_DELETE | FILE_SHARE_READ | FILE_SHARE_WRITE, + NULL, + OPEN_EXISTING, + FILE_FLAG_BACKUP_SEMANTICS, + 0)); + if (!h) + return getStatus(INVALID_HANDLE_VALUE, result); + } + + ScopedFileHandle h( + ::CreateFileW(path_utf16.begin(), 0, // Attributes only. + FILE_SHARE_DELETE | FILE_SHARE_READ | FILE_SHARE_WRITE, + NULL, OPEN_EXISTING, FILE_FLAG_BACKUP_SEMANTICS, 0)); + if (!h) + return getStatus(INVALID_HANDLE_VALUE, result); + + return getStatus(h, result); +} + +std::error_code status(int FD, file_status &Result) { + HANDLE FileHandle = reinterpret_cast(_get_osfhandle(FD)); + return getStatus(FileHandle, Result); +} + +std::error_code mapped_file_region::init(int FD, uint64_t Offset, + mapmode Mode) { + // Make sure that the requested size fits within SIZE_T. + if (Size > std::numeric_limits::max()) + return make_error_code(errc::invalid_argument); + + HANDLE FileHandle = reinterpret_cast(_get_osfhandle(FD)); + if (FileHandle == INVALID_HANDLE_VALUE) + return make_error_code(errc::bad_file_descriptor); + + DWORD flprotect; + switch (Mode) { + case readonly: flprotect = PAGE_READONLY; break; + case readwrite: flprotect = PAGE_READWRITE; break; + case priv: flprotect = PAGE_WRITECOPY; break; + } + + HANDLE FileMappingHandle = + ::CreateFileMappingW(FileHandle, 0, flprotect, + (Offset + Size) >> 32, + (Offset + Size) & 0xffffffff, + 0); + if (FileMappingHandle == NULL) { + std::error_code ec = mapWindowsError(GetLastError()); + return ec; + } + + DWORD dwDesiredAccess; + switch (Mode) { + case readonly: dwDesiredAccess = FILE_MAP_READ; break; + case readwrite: dwDesiredAccess = FILE_MAP_WRITE; break; + case priv: dwDesiredAccess = FILE_MAP_COPY; break; + } + Mapping = ::MapViewOfFile(FileMappingHandle, + dwDesiredAccess, + Offset >> 32, + Offset & 0xffffffff, + Size); + if (Mapping == NULL) { + std::error_code ec = mapWindowsError(GetLastError()); + ::CloseHandle(FileMappingHandle); + return ec; + } + + if (Size == 0) { + MEMORY_BASIC_INFORMATION mbi; + SIZE_T Result = VirtualQuery(Mapping, &mbi, sizeof(mbi)); + if (Result == 0) { + std::error_code ec = mapWindowsError(GetLastError()); + ::UnmapViewOfFile(Mapping); + ::CloseHandle(FileMappingHandle); + return ec; + } + Size = mbi.RegionSize; + } + + // Close all the handles except for the view. It will keep the other handles + // alive. + ::CloseHandle(FileMappingHandle); + return std::error_code(); +} + +mapped_file_region::mapped_file_region(int fd, mapmode mode, uint64_t length, + uint64_t offset, std::error_code &ec) + : Size(length), Mapping() { + ec = init(fd, offset, mode); + if (ec) + Mapping = 0; +} + +mapped_file_region::~mapped_file_region() { + if (Mapping) + ::UnmapViewOfFile(Mapping); +} + +uint64_t mapped_file_region::size() const { + assert(Mapping && "Mapping failed but used anyway!"); + return Size; +} + +char *mapped_file_region::data() const { + assert(Mapping && "Mapping failed but used anyway!"); + return reinterpret_cast(Mapping); +} + +const char *mapped_file_region::const_data() const { + assert(Mapping && "Mapping failed but used anyway!"); + return reinterpret_cast(Mapping); +} + +int mapped_file_region::alignment() { + SYSTEM_INFO SysInfo; + ::GetSystemInfo(&SysInfo); + return SysInfo.dwAllocationGranularity; +} + +std::error_code detail::directory_iterator_construct(detail::DirIterState &it, + StringRef path){ + SmallVector path_utf16; + + if (std::error_code ec = widenPath(path, path_utf16)) + return ec; + + // Convert path to the format that Windows is happy with. + if (path_utf16.size() > 0 && + !is_separator(path_utf16[path.size() - 1]) && + path_utf16[path.size() - 1] != L':') { + path_utf16.push_back(L'\\'); + path_utf16.push_back(L'*'); + } else { + path_utf16.push_back(L'*'); + } + + // Get the first directory entry. + WIN32_FIND_DATAW FirstFind; + ScopedFindHandle FindHandle(::FindFirstFileW(c_str(path_utf16), &FirstFind)); + if (!FindHandle) + return mapWindowsError(::GetLastError()); + + size_t FilenameLen = ::wcslen(FirstFind.cFileName); + while ((FilenameLen == 1 && FirstFind.cFileName[0] == L'.') || + (FilenameLen == 2 && FirstFind.cFileName[0] == L'.' && + FirstFind.cFileName[1] == L'.')) + if (!::FindNextFileW(FindHandle, &FirstFind)) { + DWORD LastError = ::GetLastError(); + // Check for end. + if (LastError == ERROR_NO_MORE_FILES) + return detail::directory_iterator_destruct(it); + return mapWindowsError(LastError); + } else + FilenameLen = ::wcslen(FirstFind.cFileName); + + // Construct the current directory entry. + SmallString<128> directory_entry_name_utf8; + if (std::error_code ec = + UTF16ToUTF8(FirstFind.cFileName, ::wcslen(FirstFind.cFileName), + directory_entry_name_utf8)) + return ec; + + it.IterationHandle = intptr_t(FindHandle.take()); + SmallString<128> directory_entry_path(path); + path::append(directory_entry_path, directory_entry_name_utf8); + it.CurrentEntry = directory_entry(directory_entry_path); + + return std::error_code(); +} + +std::error_code detail::directory_iterator_destruct(detail::DirIterState &it) { + if (it.IterationHandle != 0) + // Closes the handle if it's valid. + ScopedFindHandle close(HANDLE(it.IterationHandle)); + it.IterationHandle = 0; + it.CurrentEntry = directory_entry(); + return std::error_code(); +} + +std::error_code detail::directory_iterator_increment(detail::DirIterState &it) { + WIN32_FIND_DATAW FindData; + if (!::FindNextFileW(HANDLE(it.IterationHandle), &FindData)) { + DWORD LastError = ::GetLastError(); + // Check for end. + if (LastError == ERROR_NO_MORE_FILES) + return detail::directory_iterator_destruct(it); + return mapWindowsError(LastError); + } + + size_t FilenameLen = ::wcslen(FindData.cFileName); + if ((FilenameLen == 1 && FindData.cFileName[0] == L'.') || + (FilenameLen == 2 && FindData.cFileName[0] == L'.' && + FindData.cFileName[1] == L'.')) + return directory_iterator_increment(it); + + SmallString<128> directory_entry_path_utf8; + if (std::error_code ec = + UTF16ToUTF8(FindData.cFileName, ::wcslen(FindData.cFileName), + directory_entry_path_utf8)) + return ec; + + it.CurrentEntry.replace_filename(Twine(directory_entry_path_utf8)); + return std::error_code(); +} + +std::error_code openFileForRead(const Twine &Name, int &ResultFD) { + SmallVector PathUTF16; + + if (std::error_code EC = widenPath(Name, PathUTF16)) + return EC; + + HANDLE H = + ::CreateFileW(PathUTF16.begin(), GENERIC_READ, + FILE_SHARE_READ | FILE_SHARE_WRITE | FILE_SHARE_DELETE, + NULL, OPEN_EXISTING, FILE_ATTRIBUTE_NORMAL, NULL); + if (H == INVALID_HANDLE_VALUE) { + DWORD LastError = ::GetLastError(); + std::error_code EC = mapWindowsError(LastError); + // Provide a better error message when trying to open directories. + // This only runs if we failed to open the file, so there is probably + // no performances issues. + if (LastError != ERROR_ACCESS_DENIED) + return EC; + if (is_directory(Name)) + return make_error_code(errc::is_a_directory); + return EC; + } + + int FD = ::_open_osfhandle(intptr_t(H), 0); + if (FD == -1) { + ::CloseHandle(H); + return mapWindowsError(ERROR_INVALID_HANDLE); + } + + ResultFD = FD; + return std::error_code(); +} + +std::error_code openFileForWrite(const Twine &Name, int &ResultFD, + sys::fs::OpenFlags Flags, unsigned Mode) { + // Verify that we don't have both "append" and "excl". + assert((!(Flags & sys::fs::F_Excl) || !(Flags & sys::fs::F_Append)) && + "Cannot specify both 'excl' and 'append' file creation flags!"); + + SmallVector PathUTF16; + + if (std::error_code EC = widenPath(Name, PathUTF16)) + return EC; + + DWORD CreationDisposition; + if (Flags & F_Excl) + CreationDisposition = CREATE_NEW; + else if (Flags & F_Append) + CreationDisposition = OPEN_ALWAYS; + else + CreationDisposition = CREATE_ALWAYS; + + DWORD Access = GENERIC_WRITE; + if (Flags & F_RW) + Access |= GENERIC_READ; + + HANDLE H = ::CreateFileW(PathUTF16.begin(), Access, + FILE_SHARE_READ | FILE_SHARE_WRITE, NULL, + CreationDisposition, FILE_ATTRIBUTE_NORMAL, NULL); + + if (H == INVALID_HANDLE_VALUE) { + DWORD LastError = ::GetLastError(); + std::error_code EC = mapWindowsError(LastError); + // Provide a better error message when trying to open directories. + // This only runs if we failed to open the file, so there is probably + // no performances issues. + if (LastError != ERROR_ACCESS_DENIED) + return EC; + if (is_directory(Name)) + return make_error_code(errc::is_a_directory); + return EC; + } + + int OpenFlags = 0; + if (Flags & F_Append) + OpenFlags |= _O_APPEND; + + if (Flags & F_Text) + OpenFlags |= _O_TEXT; + + int FD = ::_open_osfhandle(intptr_t(H), OpenFlags); + if (FD == -1) { + ::CloseHandle(H); + return mapWindowsError(ERROR_INVALID_HANDLE); + } + + ResultFD = FD; + return std::error_code(); +} +} // end namespace fs + +namespace path { +static bool getKnownFolderPath(KNOWNFOLDERID folderId, + SmallVectorImpl &result) { + wchar_t *path = nullptr; + if (::SHGetKnownFolderPath(folderId, KF_FLAG_CREATE, nullptr, &path) != S_OK) + return false; + + bool ok = !UTF16ToUTF8(path, ::wcslen(path), result); + ::CoTaskMemFree(path); + return ok; +} + +bool getUserCacheDir(SmallVectorImpl &Result) { + return getKnownFolderPath(FOLDERID_LocalAppData, Result); +} + +bool home_directory(SmallVectorImpl &result) { + return getKnownFolderPath(FOLDERID_Profile, result); +} + +static bool getTempDirEnvVar(const wchar_t *Var, SmallVectorImpl &Res) { + SmallVector Buf; + size_t Size = 1024; + do { + Buf.reserve(Size); + Size = GetEnvironmentVariableW(Var, Buf.data(), Buf.capacity()); + if (Size == 0) + return false; + + // Try again with larger buffer. + } while (Size > Buf.capacity()); + Buf.set_size(Size); + + return !windows::UTF16ToUTF8(Buf.data(), Size, Res); +} + +static bool getTempDirEnvVar(SmallVectorImpl &Res) { + const wchar_t *EnvironmentVariables[] = {L"TMP", L"TEMP", L"USERPROFILE"}; + for (auto *Env : EnvironmentVariables) { + if (getTempDirEnvVar(Env, Res)) + return true; + } + return false; +} + +void system_temp_directory(bool ErasedOnReboot, SmallVectorImpl &Result) { + (void)ErasedOnReboot; + Result.clear(); + + // Check whether the temporary directory is specified by an environment var. + // This matches GetTempPath logic to some degree. GetTempPath is not used + // directly as it cannot handle evn var longer than 130 chars on Windows 7 + // (fixed on Windows 8). + if (getTempDirEnvVar(Result)) { + assert(!Result.empty() && "Unexpected empty path"); + native(Result); // Some Unix-like shells use Unix path separator in $TMP. + fs::make_absolute(Result); // Make it absolute if not already. + return; + } + + // Fall back to a system default. + const char *DefaultResult = "C:\\Temp"; + Result.append(DefaultResult, DefaultResult + strlen(DefaultResult)); +} +} // end namespace path + +namespace windows { +std::error_code UTF8ToUTF16(llvm_ks::StringRef utf8, + llvm_ks::SmallVectorImpl &utf16) { + if (!utf8.empty()) { + int len = ::MultiByteToWideChar(CP_UTF8, MB_ERR_INVALID_CHARS, utf8.begin(), + utf8.size(), utf16.begin(), 0); + + if (len == 0) + return mapWindowsError(::GetLastError()); + + utf16.reserve(len + 1); + utf16.set_size(len); + + len = ::MultiByteToWideChar(CP_UTF8, MB_ERR_INVALID_CHARS, utf8.begin(), + utf8.size(), utf16.begin(), utf16.size()); + + if (len == 0) + return mapWindowsError(::GetLastError()); + } + + // Make utf16 null terminated. + utf16.push_back(0); + utf16.pop_back(); + + return std::error_code(); +} + +static +std::error_code UTF16ToCodePage(unsigned codepage, const wchar_t *utf16, + size_t utf16_len, + llvm_ks::SmallVectorImpl &utf8) { + if (utf16_len) { + // Get length. + int len = ::WideCharToMultiByte(codepage, 0, utf16, utf16_len, utf8.begin(), + 0, NULL, NULL); + + if (len == 0) + return mapWindowsError(::GetLastError()); + + utf8.reserve(len); + utf8.set_size(len); + + // Now do the actual conversion. + len = ::WideCharToMultiByte(codepage, 0, utf16, utf16_len, utf8.data(), + utf8.size(), NULL, NULL); + + if (len == 0) + return mapWindowsError(::GetLastError()); + } + + // Make utf8 null terminated. + utf8.push_back(0); + utf8.pop_back(); + + return std::error_code(); +} + +std::error_code UTF16ToUTF8(const wchar_t *utf16, size_t utf16_len, + llvm_ks::SmallVectorImpl &utf8) { + return UTF16ToCodePage(CP_UTF8, utf16, utf16_len, utf8); +} + +std::error_code UTF16ToCurCP(const wchar_t *utf16, size_t utf16_len, + llvm_ks::SmallVectorImpl &utf8) { + return UTF16ToCodePage(CP_ACP, utf16, utf16_len, utf8); +} +} // end namespace windows +} // end namespace sys +} // end namespace llvm_ks diff --git a/llvm/lib/Support/Windows/Process.inc b/llvm/lib/Support/Windows/Process.inc new file mode 100644 index 0000000..c142f5b --- /dev/null +++ b/llvm/lib/Support/Windows/Process.inc @@ -0,0 +1,412 @@ +//===- Win32/Process.cpp - Win32 Process Implementation ------- -*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file provides the Win32 specific implementation of the Process class. +// +//===----------------------------------------------------------------------===// + +#include "llvm/Support/Allocator.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/WindowsError.h" +#include + +// The Windows.h header must be after LLVM and standard headers. +#include "WindowsSupport.h" + +#include +#include +#include +#include + +#ifdef __MINGW32__ + #if (HAVE_LIBPSAPI != 1) + #error "libpsapi.a should be present" + #endif + #if (HAVE_LIBSHELL32 != 1) + #error "libshell32.a should be present" + #endif +#else + #pragma comment(lib, "psapi.lib") + #pragma comment(lib, "shell32.lib") +#endif + +//===----------------------------------------------------------------------===// +//=== WARNING: Implementation here must contain only Win32 specific code +//=== and must not be UNIX code +//===----------------------------------------------------------------------===// + +#ifdef __MINGW32__ +// This ban should be lifted when MinGW 1.0+ has defined this value. +# define _HEAPOK (-2) +#endif + +using namespace llvm_ks; +using namespace sys; + +static TimeValue getTimeValueFromFILETIME(FILETIME Time) { + ULARGE_INTEGER TimeInteger; + TimeInteger.LowPart = Time.dwLowDateTime; + TimeInteger.HighPart = Time.dwHighDateTime; + + // FILETIME's are # of 100 nanosecond ticks (1/10th of a microsecond) + return TimeValue( + static_cast(TimeInteger.QuadPart / 10000000), + static_cast( + (TimeInteger.QuadPart % 10000000) * 100)); +} + +// This function retrieves the page size using GetNativeSystemInfo() and is +// present solely so it can be called once to initialize the self_process member +// below. +static unsigned computePageSize() { + // GetNativeSystemInfo() provides the physical page size which may differ + // from GetSystemInfo() in 32-bit applications running under WOW64. + SYSTEM_INFO info; + GetNativeSystemInfo(&info); + // FIXME: FileOffset in MapViewOfFile() should be aligned to not dwPageSize, + // but dwAllocationGranularity. + return static_cast(info.dwPageSize); +} + +unsigned Process::getPageSize() { + return 4096; + //static unsigned Ret = computePageSize(); + //return Ret; +} + +size_t +Process::GetMallocUsage() +{ + _HEAPINFO hinfo; + hinfo._pentry = NULL; + + size_t size = 0; + + while (_heapwalk(&hinfo) == _HEAPOK) + size += hinfo._size; + + return size; +} + +void Process::GetTimeUsage(TimeValue &elapsed, TimeValue &user_time, + TimeValue &sys_time) { + elapsed = TimeValue::now(); + + FILETIME ProcCreate, ProcExit, KernelTime, UserTime; + if (GetProcessTimes(GetCurrentProcess(), &ProcCreate, &ProcExit, &KernelTime, + &UserTime) == 0) + return; + + user_time = getTimeValueFromFILETIME(UserTime); + sys_time = getTimeValueFromFILETIME(KernelTime); +} + +// Some LLVM programs such as bugpoint produce core files as a normal part of +// their operation. To prevent the disk from filling up, this configuration +// item does what's necessary to prevent their generation. +void Process::PreventCoreFiles() { + // Windows does have the concept of core files, called minidumps. However, + // disabling minidumps for a particular application extends past the lifetime + // of that application, which is the incorrect behavior for this API. + // Additionally, the APIs require elevated privileges to disable and re- + // enable minidumps, which makes this untenable. For more information, see + // WerAddExcludedApplication and WerRemoveExcludedApplication (Vista and + // later). + // + // Windows also has modal pop-up message boxes. As this method is used by + // bugpoint, preventing these pop-ups is additionally important. + SetErrorMode(SEM_FAILCRITICALERRORS | + SEM_NOGPFAULTERRORBOX | + SEM_NOOPENFILEERRORBOX); +} + +/// Returns the environment variable \arg Name's value as a string encoded in +/// UTF-8. \arg Name is assumed to be in UTF-8 encoding. +Optional Process::GetEnv(StringRef Name) { + // Convert the argument to UTF-16 to pass it to _wgetenv(). + SmallVector NameUTF16; + if (windows::UTF8ToUTF16(Name, NameUTF16)) + return None; + + // Environment variable can be encoded in non-UTF8 encoding, and there's no + // way to know what the encoding is. The only reliable way to look up + // multibyte environment variable is to use GetEnvironmentVariableW(). + SmallVector Buf; + size_t Size = MAX_PATH; + do { + Buf.reserve(Size); + Size = + GetEnvironmentVariableW(NameUTF16.data(), Buf.data(), Buf.capacity()); + if (Size == 0) + return None; + + // Try again with larger buffer. + } while (Size > Buf.capacity()); + Buf.set_size(Size); + + // Convert the result from UTF-16 to UTF-8. + SmallVector Res; + if (windows::UTF16ToUTF8(Buf.data(), Size, Res)) + return None; + return std::string(Res.data()); +} + +static void AllocateAndPush(const SmallVectorImpl &S, + SmallVectorImpl &Vector, + SpecificBumpPtrAllocator &Allocator) { + char *Buffer = Allocator.Allocate(S.size() + 1); + ::memcpy(Buffer, S.data(), S.size()); + Buffer[S.size()] = '\0'; + Vector.push_back(Buffer); +} + +/// Convert Arg from UTF-16 to UTF-8 and push it onto Args. +static std::error_code +ConvertAndPushArg(const wchar_t *Arg, SmallVectorImpl &Args, + SpecificBumpPtrAllocator &Allocator) { + SmallVector ArgString; + if (std::error_code ec = windows::UTF16ToUTF8(Arg, wcslen(Arg), ArgString)) + return ec; + AllocateAndPush(ArgString, Args, Allocator); + return std::error_code(); +} + +/// \brief Perform wildcard expansion of Arg, or just push it into Args if it +/// doesn't have wildcards or doesn't match any files. +static std::error_code +WildcardExpand(const wchar_t *Arg, SmallVectorImpl &Args, + SpecificBumpPtrAllocator &Allocator) { + if (!wcspbrk(Arg, L"*?")) { + // Arg does not contain any wildcard characters. This is the common case. + return ConvertAndPushArg(Arg, Args, Allocator); + } + + if (wcscmp(Arg, L"/?") == 0 || wcscmp(Arg, L"-?") == 0) { + // Don't wildcard expand /?. Always treat it as an option. + return ConvertAndPushArg(Arg, Args, Allocator); + } + + // Extract any directory part of the argument. + SmallVector Dir; + if (std::error_code ec = windows::UTF16ToUTF8(Arg, wcslen(Arg), Dir)) + return ec; + sys::path::remove_filename(Dir); + const int DirSize = Dir.size(); + + // Search for matching files. + WIN32_FIND_DATAW FileData; + HANDLE FindHandle = FindFirstFileW(Arg, &FileData); + if (FindHandle == INVALID_HANDLE_VALUE) { + return ConvertAndPushArg(Arg, Args, Allocator); + } + + std::error_code ec; + do { + SmallVector FileName; + ec = windows::UTF16ToUTF8(FileData.cFileName, wcslen(FileData.cFileName), + FileName); + if (ec) + break; + + // Push the filename onto Dir, and remove it afterwards. + llvm_ks::sys::path::append(Dir, StringRef(FileName.data(), FileName.size())); + AllocateAndPush(Dir, Args, Allocator); + Dir.resize(DirSize); + } while (FindNextFileW(FindHandle, &FileData)); + + FindClose(FindHandle); + return ec; +} + +std::error_code +Process::GetArgumentVector(SmallVectorImpl &Args, + ArrayRef, + SpecificBumpPtrAllocator &ArgAllocator) { + int ArgCount; + wchar_t **UnicodeCommandLine = + CommandLineToArgvW(GetCommandLineW(), &ArgCount); + if (!UnicodeCommandLine) + return mapWindowsError(::GetLastError()); + + Args.reserve(ArgCount); + std::error_code ec; + + for (int i = 0; i < ArgCount; ++i) { + ec = WildcardExpand(UnicodeCommandLine[i], Args, ArgAllocator); + if (ec) + break; + } + + LocalFree(UnicodeCommandLine); + return ec; +} + +std::error_code Process::FixupStandardFileDescriptors() { + return std::error_code(); +} + +std::error_code Process::SafelyCloseFileDescriptor(int FD) { + if (::close(FD) < 0) + return std::error_code(errno, std::generic_category()); + return std::error_code(); +} + +bool Process::FileDescriptorIsDisplayed(int fd) { + DWORD Mode; // Unused + return (GetConsoleMode((HANDLE)_get_osfhandle(fd), &Mode) != 0); +} + +// The terminal always has colors. +bool Process::FileDescriptorHasColors(int fd) { + return FileDescriptorIsDisplayed(fd); +} + +bool Process::StandardOutHasColors() { + return FileDescriptorHasColors(1); +} + +bool Process::StandardErrHasColors() { + return FileDescriptorHasColors(2); +} + +static bool UseANSI = false; +void Process::UseANSIEscapeCodes(bool enable) { + UseANSI = enable; +} + +namespace { +class DefaultColors +{ + private: + WORD defaultColor; + public: + DefaultColors() + :defaultColor(GetCurrentColor()) {} + static unsigned GetCurrentColor() { + CONSOLE_SCREEN_BUFFER_INFO csbi; + if (GetConsoleScreenBufferInfo(GetStdHandle(STD_OUTPUT_HANDLE), &csbi)) + return csbi.wAttributes; + return 0; + } + WORD operator()() const { return defaultColor; } +}; + +DefaultColors defaultColors; + +WORD fg_color(WORD color) { + return color & (FOREGROUND_BLUE | FOREGROUND_GREEN | + FOREGROUND_INTENSITY | FOREGROUND_RED); +} + +WORD bg_color(WORD color) { + return color & (BACKGROUND_BLUE | BACKGROUND_GREEN | + BACKGROUND_INTENSITY | BACKGROUND_RED); +} +} + +bool Process::ColorNeedsFlush() { + return !UseANSI; +} + +const char *Process::OutputBold(bool bg) { + if (UseANSI) return "\033[1m"; + + WORD colors = DefaultColors::GetCurrentColor(); + if (bg) + colors |= BACKGROUND_INTENSITY; + else + colors |= FOREGROUND_INTENSITY; + SetConsoleTextAttribute(GetStdHandle(STD_OUTPUT_HANDLE), colors); + return 0; +} + +const char *Process::OutputColor(char code, bool bold, bool bg) { + if (UseANSI) return colorcodes[bg?1:0][bold?1:0][code&7]; + + WORD current = DefaultColors::GetCurrentColor(); + WORD colors; + if (bg) { + colors = ((code&1) ? BACKGROUND_RED : 0) | + ((code&2) ? BACKGROUND_GREEN : 0 ) | + ((code&4) ? BACKGROUND_BLUE : 0); + if (bold) + colors |= BACKGROUND_INTENSITY; + colors |= fg_color(current); + } else { + colors = ((code&1) ? FOREGROUND_RED : 0) | + ((code&2) ? FOREGROUND_GREEN : 0 ) | + ((code&4) ? FOREGROUND_BLUE : 0); + if (bold) + colors |= FOREGROUND_INTENSITY; + colors |= bg_color(current); + } + SetConsoleTextAttribute(GetStdHandle(STD_OUTPUT_HANDLE), colors); + return 0; +} + +static WORD GetConsoleTextAttribute(HANDLE hConsoleOutput) { + CONSOLE_SCREEN_BUFFER_INFO info; + GetConsoleScreenBufferInfo(GetStdHandle(STD_OUTPUT_HANDLE), &info); + return info.wAttributes; +} + +const char *Process::OutputReverse() { + if (UseANSI) return "\033[7m"; + + const WORD attributes + = GetConsoleTextAttribute(GetStdHandle(STD_OUTPUT_HANDLE)); + + const WORD foreground_mask = FOREGROUND_BLUE | FOREGROUND_GREEN | + FOREGROUND_RED | FOREGROUND_INTENSITY; + const WORD background_mask = BACKGROUND_BLUE | BACKGROUND_GREEN | + BACKGROUND_RED | BACKGROUND_INTENSITY; + const WORD color_mask = foreground_mask | background_mask; + + WORD new_attributes = + ((attributes & FOREGROUND_BLUE )?BACKGROUND_BLUE :0) | + ((attributes & FOREGROUND_GREEN )?BACKGROUND_GREEN :0) | + ((attributes & FOREGROUND_RED )?BACKGROUND_RED :0) | + ((attributes & FOREGROUND_INTENSITY)?BACKGROUND_INTENSITY:0) | + ((attributes & BACKGROUND_BLUE )?FOREGROUND_BLUE :0) | + ((attributes & BACKGROUND_GREEN )?FOREGROUND_GREEN :0) | + ((attributes & BACKGROUND_RED )?FOREGROUND_RED :0) | + ((attributes & BACKGROUND_INTENSITY)?FOREGROUND_INTENSITY:0) | + 0; + new_attributes = (attributes & ~color_mask) | (new_attributes & color_mask); + + SetConsoleTextAttribute(GetStdHandle(STD_OUTPUT_HANDLE), new_attributes); + return 0; +} + +const char *Process::ResetColor() { + if (UseANSI) return "\033[0m"; + SetConsoleTextAttribute(GetStdHandle(STD_OUTPUT_HANDLE), defaultColors()); + return 0; +} + +// Include GetLastError() in a fatal error message. +static void ReportLastErrorFatal(const char *Msg) { + std::string ErrMsg; + MakeErrMsg(&ErrMsg, Msg); + report_fatal_error(ErrMsg); +} + +unsigned Process::GetRandomNumber() { + HCRYPTPROV HCPC; + if (!::CryptAcquireContextW(&HCPC, NULL, NULL, PROV_RSA_FULL, + CRYPT_VERIFYCONTEXT)) + ReportLastErrorFatal("Could not acquire a cryptographic context"); + + ScopedCryptContext CryptoProvider(HCPC); + unsigned Ret; + if (!::CryptGenRandom(CryptoProvider, sizeof(Ret), + reinterpret_cast(&Ret))) + ReportLastErrorFatal("Could not generate a random number"); + return Ret; +} diff --git a/llvm/lib/Support/Windows/WindowsSupport.h b/llvm/lib/Support/Windows/WindowsSupport.h new file mode 100644 index 0000000..7a1af47 --- /dev/null +++ b/llvm/lib/Support/Windows/WindowsSupport.h @@ -0,0 +1,214 @@ +//===- WindowsSupport.h - Common Windows Include File -----------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines things specific to Windows implementations. In addition to +// providing some helpers for working with win32 APIs, this header wraps +// with some portability macros. Always include WindowsSupport.h +// instead of including directly. +// +//===----------------------------------------------------------------------===// + +//===----------------------------------------------------------------------===// +//=== WARNING: Implementation here must contain only generic Win32 code that +//=== is guaranteed to work on *all* Win32 variants. +//===----------------------------------------------------------------------===// + +#ifndef LLVM_SUPPORT_WINDOWSSUPPORT_H +#define LLVM_SUPPORT_WINDOWSSUPPORT_H + +// mingw-w64 tends to define it as 0x0502 in its headers. +#undef _WIN32_WINNT +#undef _WIN32_IE + +// Require at least Windows 7 API. +#define _WIN32_WINNT 0x0601 +#define _WIN32_IE 0x0800 // MinGW at it again. FIXME: verify if still needed. +#define WIN32_LEAN_AND_MEAN +#ifndef NOMINMAX +#define NOMINMAX +#endif + +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/StringExtras.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/ADT/Twine.h" +#include "llvm/Config/config.h" // Get build system configuration settings +#include "llvm/Support/Compiler.h" +#include +#include +#include +#include +#include +#include + +/// Determines if the program is running on Windows 8 or newer. This +/// reimplements one of the helpers in the Windows 8.1 SDK, which are intended +/// to supercede raw calls to GetVersionEx. Old SDKs, Cygwin, and MinGW don't +/// yet have VersionHelpers.h, so we have our own helper. +inline bool RunningWindows8OrGreater() { + // Windows 8 is version 6.2, service pack 0. + OSVERSIONINFOEXW osvi = {}; + osvi.dwOSVersionInfoSize = sizeof(OSVERSIONINFO); + osvi.dwMajorVersion = 6; + osvi.dwMinorVersion = 2; + osvi.wServicePackMajor = 0; + + DWORDLONG Mask = 0; + Mask = VerSetConditionMask(Mask, VER_MAJORVERSION, VER_GREATER_EQUAL); + Mask = VerSetConditionMask(Mask, VER_MINORVERSION, VER_GREATER_EQUAL); + Mask = VerSetConditionMask(Mask, VER_SERVICEPACKMAJOR, VER_GREATER_EQUAL); + + return VerifyVersionInfoW(&osvi, VER_MAJORVERSION | VER_MINORVERSION | + VER_SERVICEPACKMAJOR, + Mask) != FALSE; +} + +inline bool MakeErrMsg(std::string* ErrMsg, const std::string& prefix) { + if (!ErrMsg) + return true; + char *buffer = NULL; + DWORD LastError = GetLastError(); + DWORD R = FormatMessage(FORMAT_MESSAGE_ALLOCATE_BUFFER | + FORMAT_MESSAGE_FROM_SYSTEM | + FORMAT_MESSAGE_MAX_WIDTH_MASK, + NULL, LastError, 0, (LPSTR)&buffer, 1, NULL); + if (R) + *ErrMsg = prefix + ": " + buffer; + else + *ErrMsg = prefix + ": Unknown error"; + *ErrMsg += " (0x" + llvm_ks::utohexstr(LastError) + ")"; + + LocalFree(buffer); + return R != 0; +} + +template +class ScopedHandle { + typedef typename HandleTraits::handle_type handle_type; + handle_type Handle; + + ScopedHandle(const ScopedHandle &other); // = delete; + void operator=(const ScopedHandle &other); // = delete; +public: + ScopedHandle() + : Handle(HandleTraits::GetInvalid()) {} + + explicit ScopedHandle(handle_type h) + : Handle(h) {} + + ~ScopedHandle() { + if (HandleTraits::IsValid(Handle)) + HandleTraits::Close(Handle); + } + + handle_type take() { + handle_type t = Handle; + Handle = HandleTraits::GetInvalid(); + return t; + } + + ScopedHandle &operator=(handle_type h) { + if (HandleTraits::IsValid(Handle)) + HandleTraits::Close(Handle); + Handle = h; + return *this; + } + + // True if Handle is valid. + explicit operator bool() const { + return HandleTraits::IsValid(Handle) ? true : false; + } + + operator handle_type() const { + return Handle; + } +}; + +struct CommonHandleTraits { + typedef HANDLE handle_type; + + static handle_type GetInvalid() { + return INVALID_HANDLE_VALUE; + } + + static void Close(handle_type h) { + ::CloseHandle(h); + } + + static bool IsValid(handle_type h) { + return h != GetInvalid(); + } +}; + +struct JobHandleTraits : CommonHandleTraits { + static handle_type GetInvalid() { + return NULL; + } +}; + +struct CryptContextTraits : CommonHandleTraits { + typedef HCRYPTPROV handle_type; + + static handle_type GetInvalid() { + return 0; + } + + static void Close(handle_type h) { + ::CryptReleaseContext(h, 0); + } + + static bool IsValid(handle_type h) { + return h != GetInvalid(); + } +}; + +struct FindHandleTraits : CommonHandleTraits { + static void Close(handle_type h) { + ::FindClose(h); + } +}; + +struct FileHandleTraits : CommonHandleTraits {}; + +typedef ScopedHandle ScopedCommonHandle; +typedef ScopedHandle ScopedFileHandle; +typedef ScopedHandle ScopedCryptContext; +typedef ScopedHandle ScopedFindHandle; +typedef ScopedHandle ScopedJobHandle; + +namespace llvm_ks { +template +class SmallVectorImpl; + +template +typename SmallVectorImpl::const_pointer +c_str(SmallVectorImpl &str) { + str.push_back(0); + str.pop_back(); + return str.data(); +} + +namespace sys { +namespace path { +std::error_code widenPath(const Twine &Path8, + SmallVectorImpl &Path16); +} // end namespace path + +namespace windows { +std::error_code UTF8ToUTF16(StringRef utf8, SmallVectorImpl &utf16); +std::error_code UTF16ToUTF8(const wchar_t *utf16, size_t utf16_len, + SmallVectorImpl &utf8); +/// Convert from UTF16 to the current code page used in the system +std::error_code UTF16ToCurCP(const wchar_t *utf16, size_t utf16_len, + SmallVectorImpl &utf8); +} // end namespace windows +} // end namespace sys +} // end namespace llvm_ks. + +#endif diff --git a/llvm/lib/Support/raw_ostream.cpp b/llvm/lib/Support/raw_ostream.cpp new file mode 100644 index 0000000..4524f08 --- /dev/null +++ b/llvm/lib/Support/raw_ostream.cpp @@ -0,0 +1,754 @@ +//===--- raw_ostream.cpp - Implement the raw_ostream classes --------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This implements support for bulk buffered stream output. +// +//===----------------------------------------------------------------------===// + +#include "llvm/Support/raw_ostream.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/StringExtras.h" +#include "llvm/Config/config.h" +#include "llvm/Support/Compiler.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/FileSystem.h" +#include "llvm/Support/Format.h" +#include "llvm/Support/MathExtras.h" +#include +#include +#include +#include + +// may provide O_BINARY. +#if defined(HAVE_FCNTL_H) +# include +#endif + +#if defined(HAVE_UNISTD_H) +# include +#endif +#if defined(HAVE_SYS_UIO_H) && defined(HAVE_WRITEV) +# include +#endif + +#if defined(__CYGWIN__) +#include +#endif + +#if defined(_MSC_VER) +#include +#ifndef STDIN_FILENO +# define STDIN_FILENO 0 +#endif +#ifndef STDOUT_FILENO +# define STDOUT_FILENO 1 +#endif +#ifndef STDERR_FILENO +# define STDERR_FILENO 2 +#endif +#endif + +#ifdef LLVM_ON_WIN32 +#include "Windows/WindowsSupport.h" +#endif + +using namespace llvm_ks; + +raw_ostream::~raw_ostream() { + // raw_ostream's subclasses should take care to flush the buffer + // in their destructors. + assert(OutBufCur == OutBufStart && + "raw_ostream destructor called with non-empty buffer!"); + + if (BufferMode == InternalBuffer) + delete [] OutBufStart; +} + +// An out of line virtual method to provide a home for the class vtable. +void raw_ostream::handle() {} + +size_t raw_ostream::preferred_buffer_size() const { + // BUFSIZ is intended to be a reasonable default. + return BUFSIZ; +} + +void raw_ostream::SetBuffered() { + // Ask the subclass to determine an appropriate buffer size. + if (size_t Size = preferred_buffer_size()) + SetBufferSize(Size); + else + // It may return 0, meaning this stream should be unbuffered. + SetUnbuffered(); +} + +void raw_ostream::SetBufferAndMode(char *BufferStart, size_t Size, + BufferKind Mode) { + assert(((Mode == Unbuffered && !BufferStart && Size == 0) || + (Mode != Unbuffered && BufferStart && Size != 0)) && + "stream must be unbuffered or have at least one byte"); + // Make sure the current buffer is free of content (we can't flush here; the + // child buffer management logic will be in write_impl). + assert(GetNumBytesInBuffer() == 0 && "Current buffer is non-empty!"); + + if (BufferMode == InternalBuffer) + delete [] OutBufStart; + OutBufStart = BufferStart; + OutBufEnd = OutBufStart+Size; + OutBufCur = OutBufStart; + BufferMode = Mode; + + assert(OutBufStart <= OutBufEnd && "Invalid size!"); +} + +raw_ostream &raw_ostream::operator<<(unsigned long N) { + // Zero is a special case. + if (N == 0) + return *this << '0'; + + char NumberBuffer[20]; + char *EndPtr = NumberBuffer+sizeof(NumberBuffer); + char *CurPtr = EndPtr; + + while (N) { + *--CurPtr = '0' + char(N % 10); + N /= 10; + } + return write(CurPtr, EndPtr-CurPtr); +} + +raw_ostream &raw_ostream::operator<<(long N) { + if (N < 0) { + *this << '-'; + // Avoid undefined behavior on LONG_MIN with a cast. + N = -(unsigned long)N; + } + + return this->operator<<(static_cast(N)); +} + +raw_ostream &raw_ostream::operator<<(unsigned long long N) { + // Output using 32-bit div/mod when possible. + if (N == static_cast(N)) + return this->operator<<(static_cast(N)); + + char NumberBuffer[20]; + char *EndPtr = std::end(NumberBuffer); + char *CurPtr = EndPtr; + + while (N) { + *--CurPtr = '0' + char(N % 10); + N /= 10; + } + return write(CurPtr, EndPtr-CurPtr); +} + +raw_ostream &raw_ostream::operator<<(long long N) { + if (N < 0) { + *this << '-'; + // Avoid undefined behavior on INT64_MIN with a cast. + N = -(unsigned long long)N; + } + + return this->operator<<(static_cast(N)); +} + +raw_ostream &raw_ostream::write_hex(unsigned long long N) { + // Zero is a special case. + if (N == 0) + return *this << '0'; + + char NumberBuffer[16]; + char *EndPtr = std::end(NumberBuffer); + char *CurPtr = EndPtr; + + while (N) { + uintptr_t x = N % 16; + *--CurPtr = (x < 10 ? '0' + x : 'a' + x - 10); + N /= 16; + } + + return write(CurPtr, EndPtr-CurPtr); +} + +raw_ostream &raw_ostream::write_escaped(StringRef Str, + bool UseHexEscapes) { + for (unsigned i = 0, e = Str.size(); i != e; ++i) { + unsigned char c = Str[i]; + + switch (c) { + case '\\': + *this << '\\' << '\\'; + break; + case '\t': + *this << '\\' << 't'; + break; + case '\n': + *this << '\\' << 'n'; + break; + case '"': + *this << '\\' << '"'; + break; + default: + if (std::isprint(c)) { + *this << c; + break; + } + + // Write out the escaped representation. + if (UseHexEscapes) { + *this << '\\' << 'x'; + *this << hexdigit((c >> 4 & 0xF)); + *this << hexdigit((c >> 0) & 0xF); + } else { + // Always use a full 3-character octal escape. + *this << '\\'; + *this << char('0' + ((c >> 6) & 7)); + *this << char('0' + ((c >> 3) & 7)); + *this << char('0' + ((c >> 0) & 7)); + } + } + } + + return *this; +} + +raw_ostream &raw_ostream::operator<<(const void *P) { + *this << '0' << 'x'; + + return write_hex((uintptr_t) P); +} + +raw_ostream &raw_ostream::operator<<(double N) { +#ifdef _WIN32 + // On MSVCRT and compatible, output of %e is incompatible to Posix + // by default. Number of exponent digits should be at least 2. "%+03d" + // FIXME: Implement our formatter to here or Support/Format.h! +#if __cplusplus >= 201103L && defined(__MINGW32__) + // FIXME: It should be generic to C++11. + if (N == 0.0 && std::signbit(N)) + return *this << "-0.000000e+00"; +#else + int fpcl = _fpclass(N); + + // negative zero + if (fpcl == _FPCLASS_NZ) + return *this << "-0.000000e+00"; +#endif + + char buf[16]; + unsigned len; + len = format("%e", N).snprint(buf, sizeof(buf)); + if (len <= sizeof(buf) - 2) { + if (len >= 5 && buf[len - 5] == 'e' && buf[len - 3] == '0') { + int cs = buf[len - 4]; + if (cs == '+' || cs == '-') { + int c1 = buf[len - 2]; + int c0 = buf[len - 1]; + if (isdigit(static_cast(c1)) && + isdigit(static_cast(c0))) { + // Trim leading '0': "...e+012" -> "...e+12\0" + buf[len - 3] = c1; + buf[len - 2] = c0; + buf[--len] = 0; + } + } + } + return this->operator<<(buf); + } +#endif + return this->operator<<(format("%e", N)); +} + + + +void raw_ostream::flush_nonempty() { + assert(OutBufCur > OutBufStart && "Invalid call to flush_nonempty."); + size_t Length = OutBufCur - OutBufStart; + OutBufCur = OutBufStart; + write_impl(OutBufStart, Length); +} + +raw_ostream &raw_ostream::write(unsigned char C) { + // Group exceptional cases into a single branch. + if (LLVM_UNLIKELY(OutBufCur >= OutBufEnd)) { + if (LLVM_UNLIKELY(!OutBufStart)) { + if (BufferMode == Unbuffered) { + write_impl(reinterpret_cast(&C), 1); + return *this; + } + // Set up a buffer and start over. + SetBuffered(); + return write(C); + } + + flush_nonempty(); + } + + *OutBufCur++ = C; + return *this; +} + +raw_ostream &raw_ostream::write(const char *Ptr, size_t Size) { + // Group exceptional cases into a single branch. + if (LLVM_UNLIKELY(size_t(OutBufEnd - OutBufCur) < Size)) { + if (LLVM_UNLIKELY(!OutBufStart)) { + if (BufferMode == Unbuffered) { + write_impl(Ptr, Size); + return *this; + } + // Set up a buffer and start over. + SetBuffered(); + return write(Ptr, Size); + } + + size_t NumBytes = OutBufEnd - OutBufCur; + + // If the buffer is empty at this point we have a string that is larger + // than the buffer. Directly write the chunk that is a multiple of the + // preferred buffer size and put the remainder in the buffer. + if (LLVM_UNLIKELY(OutBufCur == OutBufStart)) { + assert(NumBytes != 0 && "undefined behavior"); + size_t BytesToWrite = Size - (Size % NumBytes); + write_impl(Ptr, BytesToWrite); + size_t BytesRemaining = Size - BytesToWrite; + if (BytesRemaining > size_t(OutBufEnd - OutBufCur)) { + // Too much left over to copy into our buffer. + return write(Ptr + BytesToWrite, BytesRemaining); + } + copy_to_buffer(Ptr + BytesToWrite, BytesRemaining); + return *this; + } + + // We don't have enough space in the buffer to fit the string in. Insert as + // much as possible, flush and start over with the remainder. + copy_to_buffer(Ptr, NumBytes); + flush_nonempty(); + return write(Ptr + NumBytes, Size - NumBytes); + } + + copy_to_buffer(Ptr, Size); + + return *this; +} + +void raw_ostream::copy_to_buffer(const char *Ptr, size_t Size) { + assert(Size <= size_t(OutBufEnd - OutBufCur) && "Buffer overrun!"); + + // Handle short strings specially, memcpy isn't very good at very short + // strings. + switch (Size) { + case 4: OutBufCur[3] = Ptr[3]; // FALL THROUGH + case 3: OutBufCur[2] = Ptr[2]; // FALL THROUGH + case 2: OutBufCur[1] = Ptr[1]; // FALL THROUGH + case 1: OutBufCur[0] = Ptr[0]; // FALL THROUGH + case 0: break; + default: + memcpy(OutBufCur, Ptr, Size); + break; + } + + OutBufCur += Size; +} + +// Formatted output. +raw_ostream &raw_ostream::operator<<(const format_object_base &Fmt) { + // If we have more than a few bytes left in our output buffer, try + // formatting directly onto its end. + size_t NextBufferSize = 127; + size_t BufferBytesLeft = OutBufEnd - OutBufCur; + if (BufferBytesLeft > 3) { + size_t BytesUsed = Fmt.print(OutBufCur, BufferBytesLeft); + + // Common case is that we have plenty of space. + if (BytesUsed <= BufferBytesLeft) { + OutBufCur += BytesUsed; + return *this; + } + + // Otherwise, we overflowed and the return value tells us the size to try + // again with. + NextBufferSize = BytesUsed; + } + + // If we got here, we didn't have enough space in the output buffer for the + // string. Try printing into a SmallVector that is resized to have enough + // space. Iterate until we win. + SmallVector V; + + while (1) { + V.resize(NextBufferSize); + + // Try formatting into the SmallVector. + size_t BytesUsed = Fmt.print(V.data(), NextBufferSize); + + // If BytesUsed fit into the vector, we win. + if (BytesUsed <= NextBufferSize) + return write(V.data(), BytesUsed); + + // Otherwise, try again with a new size. + assert(BytesUsed > NextBufferSize && "Didn't grow buffer!?"); + NextBufferSize = BytesUsed; + } +} + +raw_ostream &raw_ostream::operator<<(const FormattedString &FS) { + unsigned Len = FS.Str.size(); + int PadAmount = FS.Width - Len; + if (FS.RightJustify && (PadAmount > 0)) + this->indent(PadAmount); + this->operator<<(FS.Str); + if (!FS.RightJustify && (PadAmount > 0)) + this->indent(PadAmount); + return *this; +} + +raw_ostream &raw_ostream::operator<<(const FormattedNumber &FN) { + if (FN.Hex) { + unsigned Nibbles = (64 - countLeadingZeros(FN.HexValue)+3)/4; + unsigned PrefixChars = FN.HexPrefix ? 2 : 0; + unsigned Width = std::max(FN.Width, Nibbles + PrefixChars); + + char NumberBuffer[20] = "0x0000000000000000"; + if (!FN.HexPrefix) + NumberBuffer[1] = '0'; + char *EndPtr = NumberBuffer+Width; + char *CurPtr = EndPtr; + const char A = FN.Upper ? 'A' : 'a'; + unsigned long long N = FN.HexValue; + while (N) { + uintptr_t x = N % 16; + *--CurPtr = (x < 10 ? '0' + x : A + x - 10); + N /= 16; + } + + return write(NumberBuffer, Width); + } else { + // Zero is a special case. + if (FN.DecValue == 0) { + this->indent(FN.Width-1); + return *this << '0'; + } + char NumberBuffer[32]; + char *EndPtr = NumberBuffer+sizeof(NumberBuffer); + char *CurPtr = EndPtr; + bool Neg = (FN.DecValue < 0); + uint64_t N = Neg ? -static_cast(FN.DecValue) : FN.DecValue; + while (N) { + *--CurPtr = '0' + char(N % 10); + N /= 10; + } + int Len = EndPtr - CurPtr; + int Pad = FN.Width - Len; + if (Neg) + --Pad; + if (Pad > 0) + this->indent(Pad); + if (Neg) + *this << '-'; + return write(CurPtr, Len); + } +} + + +/// indent - Insert 'NumSpaces' spaces. +raw_ostream &raw_ostream::indent(unsigned NumSpaces) { + static const char Spaces[] = " " + " " + " "; + + // Usually the indentation is small, handle it with a fastpath. + if (NumSpaces < array_lengthof(Spaces)) + return write(Spaces, NumSpaces); + + while (NumSpaces) { + unsigned NumToWrite = std::min(NumSpaces, + (unsigned)array_lengthof(Spaces)-1); + write(Spaces, NumToWrite); + NumSpaces -= NumToWrite; + } + return *this; +} + + +//===----------------------------------------------------------------------===// +// Formatted Output +//===----------------------------------------------------------------------===// + +// Out of line virtual method. +void format_object_base::home() { +} + +//===----------------------------------------------------------------------===// +// raw_fd_ostream +//===----------------------------------------------------------------------===// + +static int getFD(StringRef Filename, std::error_code &EC, + sys::fs::OpenFlags Flags) { + // Handle "-" as stdout. Note that when we do this, we consider ourself + // the owner of stdout. This means that we can do things like close the + // file descriptor when we're done and set the "binary" flag globally. + if (Filename == "-") { + EC = std::error_code(); + return STDOUT_FILENO; + } + + int FD; + EC = sys::fs::openFileForWrite(Filename, FD, Flags); + if (EC) + return -1; + + return FD; +} + +raw_fd_ostream::raw_fd_ostream(StringRef Filename, std::error_code &EC, + sys::fs::OpenFlags Flags) + : raw_fd_ostream(getFD(Filename, EC, Flags), true) {} + +/// FD is the file descriptor that this writes to. If ShouldClose is true, this +/// closes the file when the stream is destroyed. +raw_fd_ostream::raw_fd_ostream(int fd, bool shouldClose, bool unbuffered) + : raw_pwrite_stream(unbuffered), FD(fd), ShouldClose(shouldClose), + Error(false) { + if (FD < 0 ) { + ShouldClose = false; + return; + } + + // Get the starting position. + off_t loc = ::lseek(FD, 0, SEEK_CUR); +#ifdef LLVM_ON_WIN32 + // MSVCRT's _lseek(SEEK_CUR) doesn't return -1 for pipes. + sys::fs::file_status Status; + std::error_code EC = status(FD, Status); + SupportsSeeking = !EC && Status.type() == sys::fs::file_type::regular_file; +#else + SupportsSeeking = loc != (off_t)-1; +#endif + if (!SupportsSeeking) + pos = 0; + else + pos = static_cast(loc); +} + +raw_fd_ostream::~raw_fd_ostream() { + if (FD >= 0) { + flush(); + } + +#ifdef __MINGW32__ + // On mingw, global dtors should not call exit(). + // report_fatal_error() invokes exit(). We know report_fatal_error() + // might not write messages to stderr when any errors were detected + // on FD == 2. + if (FD == 2) return; +#endif + + // If there are any pending errors, report them now. Clients wishing + // to avoid report_fatal_error calls should check for errors with + // has_error() and clear the error flag with clear_error() before + // destructing raw_ostream objects which may have errors. + if (has_error()) + report_fatal_error("IO failure on output stream.", /*GenCrashDiag=*/false); +} + + +void raw_fd_ostream::write_impl(const char *Ptr, size_t Size) { + assert(FD >= 0 && "File already closed."); + pos += Size; + +#ifndef LLVM_ON_WIN32 + bool ShouldWriteInChunks = false; +#else + // Writing a large size of output to Windows console returns ENOMEM. It seems + // that, prior to Windows 8, WriteFile() is redirecting to WriteConsole(), and + // the latter has a size limit (66000 bytes or less, depending on heap usage). + bool ShouldWriteInChunks = !!::_isatty(FD) && !RunningWindows8OrGreater(); +#endif + + do { + size_t ChunkSize = Size; + if (ChunkSize > 32767 && ShouldWriteInChunks) + ChunkSize = 32767; + + ssize_t ret = ::write(FD, Ptr, ChunkSize); + + if (ret < 0) { + // If it's a recoverable error, swallow it and retry the write. + // + // Ideally we wouldn't ever see EAGAIN or EWOULDBLOCK here, since + // raw_ostream isn't designed to do non-blocking I/O. However, some + // programs, such as old versions of bjam, have mistakenly used + // O_NONBLOCK. For compatibility, emulate blocking semantics by + // spinning until the write succeeds. If you don't want spinning, + // don't use O_NONBLOCK file descriptors with raw_ostream. + if (errno == EINTR || errno == EAGAIN +#ifdef EWOULDBLOCK + || errno == EWOULDBLOCK +#endif + ) + continue; + + // Otherwise it's a non-recoverable error. Note it and quit. + error_detected(); + break; + } + + // The write may have written some or all of the data. Update the + // size and buffer pointer to reflect the remainder that needs + // to be written. If there are no bytes left, we're done. + Ptr += ret; + Size -= ret; + } while (Size > 0); +} + +void raw_fd_ostream::close() { + assert(ShouldClose); + ShouldClose = false; + flush(); + FD = -1; +} + +uint64_t raw_fd_ostream::seek(uint64_t off) { + flush(); + pos = ::lseek(FD, off, SEEK_SET); + if (pos == (uint64_t)-1) + error_detected(); + return pos; +} + +void raw_fd_ostream::pwrite_impl(const char *Ptr, size_t Size, + uint64_t Offset) { + uint64_t Pos = tell(); + seek(Offset); + write(Ptr, Size); + seek(Pos); +} + +size_t raw_fd_ostream::preferred_buffer_size() const { +#if !defined(_MSC_VER) && !defined(__MINGW32__) && !defined(__minix) + // Windows and Minix have no st_blksize. + assert(FD >= 0 && "File not yet open!"); + struct stat statbuf; + if (fstat(FD, &statbuf) != 0) + return 0; + + // If this is a terminal, don't use buffering. Line buffering + // would be a more traditional thing to do, but it's not worth + // the complexity. + if (S_ISCHR(statbuf.st_mode) && isatty(FD)) + return 0; + // Return the preferred block size. + return statbuf.st_blksize; +#else + return raw_ostream::preferred_buffer_size(); +#endif +} + +raw_ostream &raw_fd_ostream::changeColor(enum Colors colors, bool bold, + bool bg) { + return *this; +} + +raw_ostream &raw_fd_ostream::resetColor() { + return *this; +} + +raw_ostream &raw_fd_ostream::reverseColor() { + return *this; +} + +bool raw_fd_ostream::is_displayed() const { + return true; +} + +bool raw_fd_ostream::has_colors() const { + return true; +} + +//===----------------------------------------------------------------------===// +// outs(), errs(), nulls() +//===----------------------------------------------------------------------===// + +/// outs() - This returns a reference to a raw_ostream for standard output. +/// Use it like: outs() << "foo" << "bar"; +raw_ostream &llvm_ks::outs() { + // Set buffer settings to model stdout behavior. + // Delete the file descriptor when the program exits, forcing error + // detection. If you don't want this behavior, don't use outs(). + std::error_code EC; + static raw_fd_ostream S("-", EC, sys::fs::F_None); + assert(!EC); + return S; +} + +/// errs() - This returns a reference to a raw_ostream for standard error. +/// Use it like: errs() << "foo" << "bar"; +raw_ostream &llvm_ks::errs() { + // Set standard error to be unbuffered by default. + static raw_fd_ostream S(STDERR_FILENO, false, true); + return S; +} + +/// nulls() - This returns a reference to a raw_ostream which discards output. +raw_ostream &llvm_ks::nulls() { + static raw_null_ostream S; + return S; +} + + +//===----------------------------------------------------------------------===// +// raw_string_ostream +//===----------------------------------------------------------------------===// + +raw_string_ostream::~raw_string_ostream() { + flush(); +} + +void raw_string_ostream::write_impl(const char *Ptr, size_t Size) { + OS.append(Ptr, Size); +} + +//===----------------------------------------------------------------------===// +// raw_svector_ostream +//===----------------------------------------------------------------------===// + +uint64_t raw_svector_ostream::current_pos() const { return OS.size(); } + +void raw_svector_ostream::write_impl(const char *Ptr, size_t Size) { + OS.append(Ptr, Ptr + Size); +} + +void raw_svector_ostream::pwrite_impl(const char *Ptr, size_t Size, + uint64_t Offset) { + memcpy(OS.data() + Offset, Ptr, Size); +} + +//===----------------------------------------------------------------------===// +// raw_null_ostream +//===----------------------------------------------------------------------===// + +raw_null_ostream::~raw_null_ostream() { +#ifndef NDEBUG + // ~raw_ostream asserts that the buffer is empty. This isn't necessary + // with raw_null_ostream, but it's better to have raw_null_ostream follow + // the rules than to change the rules just for raw_null_ostream. + flush(); +#endif +} + +void raw_null_ostream::write_impl(const char *Ptr, size_t Size) { +} + +uint64_t raw_null_ostream::current_pos() const { + return 0; +} + +void raw_null_ostream::pwrite_impl(const char *Ptr, size_t Size, + uint64_t Offset) {} diff --git a/llvm/lib/Support/regcclass.h b/llvm/lib/Support/regcclass.h new file mode 100644 index 0000000..7fd6604 --- /dev/null +++ b/llvm/lib/Support/regcclass.h @@ -0,0 +1,75 @@ +/*- + * This code is derived from OpenBSD's libc/regex, original license follows: + * + * This code is derived from OpenBSD's libc/regex, original license follows: + * + * Copyright (c) 1992, 1993, 1994 Henry Spencer. + * Copyright (c) 1992, 1993, 1994 + * The Regents of the University of California. All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * Henry Spencer. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)cclass.h 8.3 (Berkeley) 3/20/94 + */ + +#ifndef LLVM_SUPPORT_REGCCLASS_H +#define LLVM_SUPPORT_REGCCLASS_H + +/* character-class table */ +static struct cclass { + const char *name; + const char *chars; + const char *multis; +} cclasses[] = { + { "alnum", "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz\ +0123456789", ""} , + { "alpha", "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz", + ""} , + { "blank", " \t", ""} , + { "cntrl", "\007\b\t\n\v\f\r\1\2\3\4\5\6\16\17\20\21\22\23\24\ +\25\26\27\30\31\32\33\34\35\36\37\177", ""} , + { "digit", "0123456789", ""} , + { "graph", "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz\ +0123456789!\"#$%&'()*+,-./:;<=>?@[\\]^_`{|}~", + ""} , + { "lower", "abcdefghijklmnopqrstuvwxyz", + ""} , + { "print", "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz\ +0123456789!\"#$%&'()*+,-./:;<=>?@[\\]^_`{|}~ ", + ""} , + { "punct", "!\"#$%&'()*+,-./:;<=>?@[\\]^_`{|}~", + ""} , + { "space", "\t\n\v\f\r ", ""} , + { "upper", "ABCDEFGHIJKLMNOPQRSTUVWXYZ", + ""} , + { "xdigit", "0123456789ABCDEFabcdef", + ""} , + { NULL, 0, "" } +}; + +#endif diff --git a/llvm/lib/Support/regcname.h b/llvm/lib/Support/regcname.h new file mode 100644 index 0000000..891d255 --- /dev/null +++ b/llvm/lib/Support/regcname.h @@ -0,0 +1,144 @@ +/*- + * This code is derived from OpenBSD's libc/regex, original license follows: + * + * Copyright (c) 1992, 1993, 1994 Henry Spencer. + * Copyright (c) 1992, 1993, 1994 + * The Regents of the University of California. All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * Henry Spencer. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)cname.h 8.3 (Berkeley) 3/20/94 + */ + +#ifndef LLVM_SUPPORT_REGCNAME_H +#define LLVM_SUPPORT_REGCNAME_H + +/* character-name table */ +static struct cname { + const char *name; + char code; +} cnames[] = { + { "NUL", '\0' }, + { "SOH", '\001' }, + { "STX", '\002' }, + { "ETX", '\003' }, + { "EOT", '\004' }, + { "ENQ", '\005' }, + { "ACK", '\006' }, + { "BEL", '\007' }, + { "alert", '\007' }, + { "BS", '\010' }, + { "backspace", '\b' }, + { "HT", '\011' }, + { "tab", '\t' }, + { "LF", '\012' }, + { "newline", '\n' }, + { "VT", '\013' }, + { "vertical-tab", '\v' }, + { "FF", '\014' }, + { "form-feed", '\f' }, + { "CR", '\015' }, + { "carriage-return", '\r' }, + { "SO", '\016' }, + { "SI", '\017' }, + { "DLE", '\020' }, + { "DC1", '\021' }, + { "DC2", '\022' }, + { "DC3", '\023' }, + { "DC4", '\024' }, + { "NAK", '\025' }, + { "SYN", '\026' }, + { "ETB", '\027' }, + { "CAN", '\030' }, + { "EM", '\031' }, + { "SUB", '\032' }, + { "ESC", '\033' }, + { "IS4", '\034' }, + { "FS", '\034' }, + { "IS3", '\035' }, + { "GS", '\035' }, + { "IS2", '\036' }, + { "RS", '\036' }, + { "IS1", '\037' }, + { "US", '\037' }, + { "space", ' ' }, + { "exclamation-mark", '!' }, + { "quotation-mark", '"' }, + { "number-sign", '#' }, + { "dollar-sign", '$' }, + { "percent-sign", '%' }, + { "ampersand", '&' }, + { "apostrophe", '\'' }, + { "left-parenthesis", '(' }, + { "right-parenthesis", ')' }, + { "asterisk", '*' }, + { "plus-sign", '+' }, + { "comma", ',' }, + { "hyphen", '-' }, + { "hyphen-minus", '-' }, + { "period", '.' }, + { "full-stop", '.' }, + { "slash", '/' }, + { "solidus", '/' }, + { "zero", '0' }, + { "one", '1' }, + { "two", '2' }, + { "three", '3' }, + { "four", '4' }, + { "five", '5' }, + { "six", '6' }, + { "seven", '7' }, + { "eight", '8' }, + { "nine", '9' }, + { "colon", ':' }, + { "semicolon", ';' }, + { "less-than-sign", '<' }, + { "equals-sign", '=' }, + { "greater-than-sign", '>' }, + { "question-mark", '?' }, + { "commercial-at", '@' }, + { "left-square-bracket", '[' }, + { "backslash", '\\' }, + { "reverse-solidus", '\\' }, + { "right-square-bracket", ']' }, + { "circumflex", '^' }, + { "circumflex-accent", '^' }, + { "underscore", '_' }, + { "low-line", '_' }, + { "grave-accent", '`' }, + { "left-brace", '{' }, + { "left-curly-bracket", '{' }, + { "vertical-line", '|' }, + { "right-brace", '}' }, + { "right-curly-bracket", '}' }, + { "tilde", '~' }, + { "DEL", '\177' }, + { NULL, 0 } +}; + +#endif diff --git a/llvm/lib/Support/regcomp.c b/llvm/lib/Support/regcomp.c new file mode 100644 index 0000000..ebde64f --- /dev/null +++ b/llvm/lib/Support/regcomp.c @@ -0,0 +1,1574 @@ +/*- + * This code is derived from OpenBSD's libc/regex, original license follows: + * + * Copyright (c) 1992, 1993, 1994 Henry Spencer. + * Copyright (c) 1992, 1993, 1994 + * The Regents of the University of California. All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * Henry Spencer. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)regcomp.c 8.5 (Berkeley) 3/20/94 + */ + +#include +#include +#include +#include +#include +#include +#include "regex_impl.h" + +#include "regutils.h" +#include "regex2.h" + +#include "regcclass.h" +#include "regcname.h" + +#include "llvm/Config/config.h" +#if HAVE_STDINT_H +#include +#else +/* Pessimistically bound memory use */ +#define SIZE_MAX UINT_MAX +#endif + +/* + * parse structure, passed up and down to avoid global variables and + * other clumsinesses + */ +struct parse { + char *next; /* next character in RE */ + char *end; /* end of string (-> NUL normally) */ + int error; /* has an error been seen? */ + sop *strip; /* malloced strip */ + sopno ssize; /* malloced strip size (allocated) */ + sopno slen; /* malloced strip length (used) */ + int ncsalloc; /* number of csets allocated */ + struct re_guts *g; +# define NPAREN 10 /* we need to remember () 1-9 for back refs */ + sopno pbegin[NPAREN]; /* -> ( ([0] unused) */ + sopno pend[NPAREN]; /* -> ) ([0] unused) */ +}; + +static void p_ere(struct parse *, int); +static void p_ere_exp(struct parse *); +static void p_str(struct parse *); +static void p_bre(struct parse *, int, int); +static int p_simp_re(struct parse *, int); +static int p_count(struct parse *); +static void p_bracket(struct parse *); +static void p_b_term(struct parse *, cset *); +static void p_b_cclass(struct parse *, cset *); +static void p_b_eclass(struct parse *, cset *); +static char p_b_symbol(struct parse *); +static char p_b_coll_elem(struct parse *, int); +static char othercase(int); +static void bothcases(struct parse *, int); +static void ordinary(struct parse *, int); +static void nonnewline(struct parse *); +static void repeat(struct parse *, sopno, int, int); +static int seterr(struct parse *, int); +static cset *allocset(struct parse *); +static void freeset(struct parse *, cset *); +static int freezeset(struct parse *, cset *); +static int firstch(struct parse *, cset *); +static int nch(struct parse *, cset *); +static void mcadd(struct parse *, cset *, const char *); +static void mcinvert(struct parse *, cset *); +static void mccase(struct parse *, cset *); +static int isinsets(struct re_guts *, int); +static int samesets(struct re_guts *, int, int); +static void categorize(struct parse *, struct re_guts *); +static sopno dupl(struct parse *, sopno, sopno); +static void doemit(struct parse *, sop, size_t); +static void doinsert(struct parse *, sop, size_t, sopno); +static void dofwd(struct parse *, sopno, sop); +static void enlarge(struct parse *, sopno); +static void stripsnug(struct parse *, struct re_guts *); +static void findmust(struct parse *, struct re_guts *); +static sopno pluscount(struct parse *, struct re_guts *); + +static char nuls[10]; /* place to point scanner in event of error */ + +/* + * macros for use with parse structure + * BEWARE: these know that the parse structure is named `p' !!! + */ +#define PEEK() (*p->next) +#define PEEK2() (*(p->next+1)) +#define MORE() (p->next < p->end) +#define MORE2() (p->next+1 < p->end) +#define SEE(c) (MORE() && PEEK() == (c)) +#define SEETWO(a, b) (MORE() && MORE2() && PEEK() == (a) && PEEK2() == (b)) +#define EAT(c) ((SEE(c)) ? (NEXT(), 1) : 0) +#define EATTWO(a, b) ((SEETWO(a, b)) ? (NEXT2(), 1) : 0) +#define NEXT() (p->next++) +#define NEXT2() (p->next += 2) +#define NEXTn(n) (p->next += (n)) +#define GETNEXT() (*p->next++) +#define SETERROR(e) seterr(p, (e)) +#define REQUIRE(co, e) (void)((co) || SETERROR(e)) +#define MUSTSEE(c, e) (REQUIRE(MORE() && PEEK() == (c), e)) +#define MUSTEAT(c, e) (REQUIRE(MORE() && GETNEXT() == (c), e)) +#define MUSTNOTSEE(c, e) (REQUIRE(!MORE() || PEEK() != (c), e)) +#define EMIT(op, sopnd) doemit(p, (sop)(op), (size_t)(sopnd)) +#define INSERT(op, pos) doinsert(p, (sop)(op), HERE()-(pos)+1, pos) +#define AHEAD(pos) dofwd(p, pos, HERE()-(pos)) +#define ASTERN(sop, pos) EMIT(sop, HERE()-pos) +#define HERE() (p->slen) +#define THERE() (p->slen - 1) +#define THERETHERE() (p->slen - 2) +#define DROP(n) (p->slen -= (n)) + +#ifdef _POSIX2_RE_DUP_MAX +#define DUPMAX _POSIX2_RE_DUP_MAX +#else +#define DUPMAX 255 +#endif +#define INFINITY (DUPMAX + 1) + +#ifndef NDEBUG +static int never = 0; /* for use in asserts; shuts lint up */ +#else +#define never 0 /* some s have bugs too */ +#endif + +/* + - llvm_regcomp - interface for parser and compilation + */ +int /* 0 success, otherwise REG_something */ +llvm_regcomp(llvm_regex_t *preg, const char *pattern, int cflags) +{ + struct parse pa; + struct re_guts *g; + struct parse *p = &pa; + int i; + size_t len; +#ifdef REDEBUG +# define GOODFLAGS(f) (f) +#else +# define GOODFLAGS(f) ((f)&~REG_DUMP) +#endif + + cflags = GOODFLAGS(cflags); + if ((cflags®_EXTENDED) && (cflags®_NOSPEC)) + return(REG_INVARG); + + if (cflags®_PEND) { + if (preg->re_endp < pattern) + return(REG_INVARG); + len = preg->re_endp - pattern; + } else + len = strlen((const char *)pattern); + + /* do the mallocs early so failure handling is easy */ + g = (struct re_guts *)malloc(sizeof(struct re_guts) + + (NC-1)*sizeof(cat_t)); + if (g == NULL) + return(REG_ESPACE); + p->ssize = len/(size_t)2*(size_t)3 + (size_t)1; /* ugh */ + p->strip = (sop *)calloc(p->ssize, sizeof(sop)); + p->slen = 0; + if (p->strip == NULL) { + free((char *)g); + return(REG_ESPACE); + } + + /* set things up */ + p->g = g; + p->next = (char *)pattern; /* convenience; we do not modify it */ + p->end = p->next + len; + p->error = 0; + p->ncsalloc = 0; + for (i = 0; i < NPAREN; i++) { + p->pbegin[i] = 0; + p->pend[i] = 0; + } + g->csetsize = NC; + g->sets = NULL; + g->setbits = NULL; + g->ncsets = 0; + g->cflags = cflags; + g->iflags = 0; + g->nbol = 0; + g->neol = 0; + g->must = NULL; + g->mlen = 0; + g->nsub = 0; + g->ncategories = 1; /* category 0 is "everything else" */ + g->categories = &g->catspace[-(CHAR_MIN)]; + (void) memset((char *)g->catspace, 0, NC*sizeof(cat_t)); + g->backrefs = 0; + + /* do it */ + EMIT(OEND, 0); + g->firststate = THERE(); + if (cflags®_EXTENDED) + p_ere(p, OUT); + else if (cflags®_NOSPEC) + p_str(p); + else + p_bre(p, OUT, OUT); + EMIT(OEND, 0); + g->laststate = THERE(); + + /* tidy up loose ends and fill things in */ + categorize(p, g); + stripsnug(p, g); + findmust(p, g); + g->nplus = pluscount(p, g); + g->magic = MAGIC2; + preg->re_nsub = g->nsub; + preg->re_g = g; + preg->re_magic = MAGIC1; +#ifndef REDEBUG + /* not debugging, so can't rely on the assert() in llvm_regexec() */ + if (g->iflags®EX_BAD) + SETERROR(REG_ASSERT); +#endif + + /* win or lose, we're done */ + if (p->error != 0) /* lose */ + llvm_regfree(preg); + return(p->error); +} + +/* + - p_ere - ERE parser top level, concatenation and alternation + */ +static void +p_ere(struct parse *p, int stop) /* character this ERE should end at */ +{ + char c; + sopno prevback = 0; + sopno prevfwd = 0; + sopno conc; + int first = 1; /* is this the first alternative? */ + + for (;;) { + /* do a bunch of concatenated expressions */ + conc = HERE(); + while (MORE() && (c = PEEK()) != '|' && c != stop) + p_ere_exp(p); + REQUIRE(HERE() != conc, REG_EMPTY); /* require nonempty */ + + if (!EAT('|')) + break; /* NOTE BREAK OUT */ + + if (first) { + INSERT(OCH_, conc); /* offset is wrong */ + prevfwd = conc; + prevback = conc; + first = 0; + } + ASTERN(OOR1, prevback); + prevback = THERE(); + AHEAD(prevfwd); /* fix previous offset */ + prevfwd = HERE(); + EMIT(OOR2, 0); /* offset is very wrong */ + } + + if (!first) { /* tail-end fixups */ + AHEAD(prevfwd); + ASTERN(O_CH, prevback); + } + + assert(!MORE() || SEE(stop)); +} + +/* + - p_ere_exp - parse one subERE, an atom possibly followed by a repetition op + */ +static void +p_ere_exp(struct parse *p) +{ + char c; + sopno pos; + int count; + int count2; + int backrefnum; + sopno subno; + int wascaret = 0; + + assert(MORE()); /* caller should have ensured this */ + c = GETNEXT(); + + pos = HERE(); + switch (c) { + case '(': + REQUIRE(MORE(), REG_EPAREN); + p->g->nsub++; + subno = p->g->nsub; + if (subno < NPAREN) + p->pbegin[subno] = HERE(); + EMIT(OLPAREN, subno); + if (!SEE(')')) + p_ere(p, ')'); + if (subno < NPAREN) { + p->pend[subno] = HERE(); + assert(p->pend[subno] != 0); + } + EMIT(ORPAREN, subno); + MUSTEAT(')', REG_EPAREN); + break; +#ifndef POSIX_MISTAKE + case ')': /* happens only if no current unmatched ( */ + /* + * You may ask, why the ifndef? Because I didn't notice + * this until slightly too late for 1003.2, and none of the + * other 1003.2 regular-expression reviewers noticed it at + * all. So an unmatched ) is legal POSIX, at least until + * we can get it fixed. + */ + SETERROR(REG_EPAREN); + break; +#endif + case '^': + EMIT(OBOL, 0); + p->g->iflags |= USEBOL; + p->g->nbol++; + wascaret = 1; + break; + case '$': + EMIT(OEOL, 0); + p->g->iflags |= USEEOL; + p->g->neol++; + break; + case '|': + SETERROR(REG_EMPTY); + break; + case '*': + case '+': + case '?': + SETERROR(REG_BADRPT); + break; + case '.': + if (p->g->cflags®_NEWLINE) + nonnewline(p); + else + EMIT(OANY, 0); + break; + case '[': + p_bracket(p); + break; + case '\\': + REQUIRE(MORE(), REG_EESCAPE); + c = GETNEXT(); + if (c >= '1' && c <= '9') { + /* \[0-9] is taken to be a back-reference to a previously specified + * matching group. backrefnum will hold the number. The matching + * group must exist (i.e. if \4 is found there must have been at + * least 4 matching groups specified in the pattern previously). + */ + backrefnum = c - '0'; + if (p->pend[backrefnum] == 0) { + SETERROR(REG_ESUBREG); + break; + } + + /* Make sure everything checks out and emit the sequence + * that marks a back-reference to the parse structure. + */ + assert(backrefnum <= p->g->nsub); + EMIT(OBACK_, backrefnum); + assert(p->pbegin[backrefnum] != 0); + assert(OP(p->strip[p->pbegin[backrefnum]]) != OLPAREN); + assert(OP(p->strip[p->pend[backrefnum]]) != ORPAREN); + (void) dupl(p, p->pbegin[backrefnum]+1, p->pend[backrefnum]); + EMIT(O_BACK, backrefnum); + p->g->backrefs = 1; + } else { + /* Other chars are simply themselves when escaped with a backslash. + */ + ordinary(p, c); + } + break; + case '{': /* okay as ordinary except if digit follows */ + REQUIRE(!MORE() || !isdigit((uch)PEEK()), REG_BADRPT); + /* FALLTHROUGH */ + default: + ordinary(p, c); + break; + } + + if (!MORE()) + return; + c = PEEK(); + /* we call { a repetition if followed by a digit */ + if (!( c == '*' || c == '+' || c == '?' || + (c == '{' && MORE2() && isdigit((uch)PEEK2())) )) + return; /* no repetition, we're done */ + NEXT(); + + REQUIRE(!wascaret, REG_BADRPT); + switch (c) { + case '*': /* implemented as +? */ + /* this case does not require the (y|) trick, noKLUDGE */ + INSERT(OPLUS_, pos); + ASTERN(O_PLUS, pos); + INSERT(OQUEST_, pos); + ASTERN(O_QUEST, pos); + break; + case '+': + INSERT(OPLUS_, pos); + ASTERN(O_PLUS, pos); + break; + case '?': + /* KLUDGE: emit y? as (y|) until subtle bug gets fixed */ + INSERT(OCH_, pos); /* offset slightly wrong */ + ASTERN(OOR1, pos); /* this one's right */ + AHEAD(pos); /* fix the OCH_ */ + EMIT(OOR2, 0); /* offset very wrong... */ + AHEAD(THERE()); /* ...so fix it */ + ASTERN(O_CH, THERETHERE()); + break; + case '{': + count = p_count(p); + if (EAT(',')) { + if (isdigit((uch)PEEK())) { + count2 = p_count(p); + REQUIRE(count <= count2, REG_BADBR); + } else /* single number with comma */ + count2 = INFINITY; + } else /* just a single number */ + count2 = count; + repeat(p, pos, count, count2); + if (!EAT('}')) { /* error heuristics */ + while (MORE() && PEEK() != '}') + NEXT(); + REQUIRE(MORE(), REG_EBRACE); + SETERROR(REG_BADBR); + } + break; + } + + if (!MORE()) + return; + c = PEEK(); + if (!( c == '*' || c == '+' || c == '?' || + (c == '{' && MORE2() && isdigit((uch)PEEK2())) ) ) + return; + SETERROR(REG_BADRPT); +} + +/* + - p_str - string (no metacharacters) "parser" + */ +static void +p_str(struct parse *p) +{ + REQUIRE(MORE(), REG_EMPTY); + while (MORE()) + ordinary(p, GETNEXT()); +} + +/* + - p_bre - BRE parser top level, anchoring and concatenation + * Giving end1 as OUT essentially eliminates the end1/end2 check. + * + * This implementation is a bit of a kludge, in that a trailing $ is first + * taken as an ordinary character and then revised to be an anchor. The + * only undesirable side effect is that '$' gets included as a character + * category in such cases. This is fairly harmless; not worth fixing. + * The amount of lookahead needed to avoid this kludge is excessive. + */ +static void +p_bre(struct parse *p, + int end1, /* first terminating character */ + int end2) /* second terminating character */ +{ + sopno start = HERE(); + int first = 1; /* first subexpression? */ + int wasdollar = 0; + + if (EAT('^')) { + EMIT(OBOL, 0); + p->g->iflags |= USEBOL; + p->g->nbol++; + } + while (MORE() && !SEETWO(end1, end2)) { + wasdollar = p_simp_re(p, first); + first = 0; + } + if (wasdollar) { /* oops, that was a trailing anchor */ + DROP(1); + EMIT(OEOL, 0); + p->g->iflags |= USEEOL; + p->g->neol++; + } + + REQUIRE(HERE() != start, REG_EMPTY); /* require nonempty */ +} + +/* + - p_simp_re - parse a simple RE, an atom possibly followed by a repetition + */ +static int /* was the simple RE an unbackslashed $? */ +p_simp_re(struct parse *p, + int starordinary) /* is a leading * an ordinary character? */ +{ + int c; + int count; + int count2; + sopno pos; + int i; + sopno subno; +# define BACKSL (1<g->cflags®_NEWLINE) + nonnewline(p); + else + EMIT(OANY, 0); + break; + case '[': + p_bracket(p); + break; + case BACKSL|'{': + SETERROR(REG_BADRPT); + break; + case BACKSL|'(': + p->g->nsub++; + subno = p->g->nsub; + if (subno < NPAREN) + p->pbegin[subno] = HERE(); + EMIT(OLPAREN, subno); + /* the MORE here is an error heuristic */ + if (MORE() && !SEETWO('\\', ')')) + p_bre(p, '\\', ')'); + if (subno < NPAREN) { + p->pend[subno] = HERE(); + assert(p->pend[subno] != 0); + } + EMIT(ORPAREN, subno); + REQUIRE(EATTWO('\\', ')'), REG_EPAREN); + break; + case BACKSL|')': /* should not get here -- must be user */ + case BACKSL|'}': + SETERROR(REG_EPAREN); + break; + case BACKSL|'1': + case BACKSL|'2': + case BACKSL|'3': + case BACKSL|'4': + case BACKSL|'5': + case BACKSL|'6': + case BACKSL|'7': + case BACKSL|'8': + case BACKSL|'9': + i = (c&~BACKSL) - '0'; + assert(i < NPAREN); + if (p->pend[i] != 0) { + assert(i <= p->g->nsub); + EMIT(OBACK_, i); + assert(p->pbegin[i] != 0); + assert(OP(p->strip[p->pbegin[i]]) == OLPAREN); + assert(OP(p->strip[p->pend[i]]) == ORPAREN); + (void) dupl(p, p->pbegin[i]+1, p->pend[i]); + EMIT(O_BACK, i); + } else + SETERROR(REG_ESUBREG); + p->g->backrefs = 1; + break; + case '*': + REQUIRE(starordinary, REG_BADRPT); + /* FALLTHROUGH */ + default: + ordinary(p, (char)c); + break; + } + + if (EAT('*')) { /* implemented as +? */ + /* this case does not require the (y|) trick, noKLUDGE */ + INSERT(OPLUS_, pos); + ASTERN(O_PLUS, pos); + INSERT(OQUEST_, pos); + ASTERN(O_QUEST, pos); + } else if (EATTWO('\\', '{')) { + count = p_count(p); + if (EAT(',')) { + if (MORE() && isdigit((uch)PEEK())) { + count2 = p_count(p); + REQUIRE(count <= count2, REG_BADBR); + } else /* single number with comma */ + count2 = INFINITY; + } else /* just a single number */ + count2 = count; + repeat(p, pos, count, count2); + if (!EATTWO('\\', '}')) { /* error heuristics */ + while (MORE() && !SEETWO('\\', '}')) + NEXT(); + REQUIRE(MORE(), REG_EBRACE); + SETERROR(REG_BADBR); + } + } else if (c == '$') /* $ (but not \$) ends it */ + return(1); + + return(0); +} + +/* + - p_count - parse a repetition count + */ +static int /* the value */ +p_count(struct parse *p) +{ + int count = 0; + int ndigits = 0; + + while (MORE() && isdigit((uch)PEEK()) && count <= DUPMAX) { + count = count*10 + (GETNEXT() - '0'); + ndigits++; + } + + REQUIRE(ndigits > 0 && count <= DUPMAX, REG_BADBR); + return(count); +} + +/* + - p_bracket - parse a bracketed character list + * + * Note a significant property of this code: if the allocset() did SETERROR, + * no set operations are done. + */ +static void +p_bracket(struct parse *p) +{ + cset *cs; + int invert = 0; + + /* Dept of Truly Sickening Special-Case Kludges */ + if (p->next + 5 < p->end && strncmp(p->next, "[:<:]]", 6) == 0) { + EMIT(OBOW, 0); + NEXTn(6); + return; + } + if (p->next + 5 < p->end && strncmp(p->next, "[:>:]]", 6) == 0) { + EMIT(OEOW, 0); + NEXTn(6); + return; + } + + if ((cs = allocset(p)) == NULL) { + /* allocset did set error status in p */ + return; + } + + if (EAT('^')) + invert++; /* make note to invert set at end */ + if (EAT(']')) + CHadd(cs, ']'); + else if (EAT('-')) + CHadd(cs, '-'); + while (MORE() && PEEK() != ']' && !SEETWO('-', ']')) + p_b_term(p, cs); + if (EAT('-')) + CHadd(cs, '-'); + MUSTEAT(']', REG_EBRACK); + + if (p->error != 0) { /* don't mess things up further */ + freeset(p, cs); + return; + } + + if (p->g->cflags®_ICASE) { + int i; + int ci; + + for (i = p->g->csetsize - 1; i >= 0; i--) + if (CHIN(cs, i) && isalpha(i)) { + ci = othercase(i); + if (ci != i) + CHadd(cs, ci); + } + if (cs->multis != NULL) + mccase(p, cs); + } + if (invert) { + int i; + + for (i = p->g->csetsize - 1; i >= 0; i--) + if (CHIN(cs, i)) + CHsub(cs, i); + else + CHadd(cs, i); + if (p->g->cflags®_NEWLINE) + CHsub(cs, '\n'); + if (cs->multis != NULL) + mcinvert(p, cs); + } + + assert(cs->multis == NULL); /* xxx */ + + if (nch(p, cs) == 1) { /* optimize singleton sets */ + ordinary(p, firstch(p, cs)); + freeset(p, cs); + } else + EMIT(OANYOF, freezeset(p, cs)); +} + +/* + - p_b_term - parse one term of a bracketed character list + */ +static void +p_b_term(struct parse *p, cset *cs) +{ + char c; + char start, finish; + int i; + + /* classify what we've got */ + switch ((MORE()) ? PEEK() : '\0') { + case '[': + c = (MORE2()) ? PEEK2() : '\0'; + break; + case '-': + SETERROR(REG_ERANGE); + return; /* NOTE RETURN */ + break; + default: + c = '\0'; + break; + } + + switch (c) { + case ':': /* character class */ + NEXT2(); + REQUIRE(MORE(), REG_EBRACK); + c = PEEK(); + REQUIRE(c != '-' && c != ']', REG_ECTYPE); + p_b_cclass(p, cs); + REQUIRE(MORE(), REG_EBRACK); + REQUIRE(EATTWO(':', ']'), REG_ECTYPE); + break; + case '=': /* equivalence class */ + NEXT2(); + REQUIRE(MORE(), REG_EBRACK); + c = PEEK(); + REQUIRE(c != '-' && c != ']', REG_ECOLLATE); + p_b_eclass(p, cs); + REQUIRE(MORE(), REG_EBRACK); + REQUIRE(EATTWO('=', ']'), REG_ECOLLATE); + break; + default: /* symbol, ordinary character, or range */ +/* xxx revision needed for multichar stuff */ + start = p_b_symbol(p); + if (SEE('-') && MORE2() && PEEK2() != ']') { + /* range */ + NEXT(); + if (EAT('-')) + finish = '-'; + else + finish = p_b_symbol(p); + } else + finish = start; +/* xxx what about signed chars here... */ + REQUIRE(start <= finish, REG_ERANGE); + for (i = start; i <= finish; i++) + CHadd(cs, i); + break; + } +} + +/* + - p_b_cclass - parse a character-class name and deal with it + */ +static void +p_b_cclass(struct parse *p, cset *cs) +{ + char *sp = p->next; + struct cclass *cp; + size_t len; + const char *u; + char c; + + while (MORE() && isalpha((uch)PEEK())) + NEXT(); + len = p->next - sp; + for (cp = cclasses; cp->name != NULL; cp++) + if (strncmp(cp->name, sp, len) == 0 && cp->name[len] == '\0') + break; + if (cp->name == NULL) { + /* oops, didn't find it */ + SETERROR(REG_ECTYPE); + return; + } + + u = cp->chars; + while ((c = *u++) != '\0') + CHadd(cs, c); + for (u = cp->multis; *u != '\0'; u += strlen(u) + 1) + MCadd(p, cs, u); +} + +/* + - p_b_eclass - parse an equivalence-class name and deal with it + * + * This implementation is incomplete. xxx + */ +static void +p_b_eclass(struct parse *p, cset *cs) +{ + char c; + + c = p_b_coll_elem(p, '='); + CHadd(cs, c); +} + +/* + - p_b_symbol - parse a character or [..]ed multicharacter collating symbol + */ +static char /* value of symbol */ +p_b_symbol(struct parse *p) +{ + char value; + + REQUIRE(MORE(), REG_EBRACK); + if (!EATTWO('[', '.')) + return(GETNEXT()); + + /* collating symbol */ + value = p_b_coll_elem(p, '.'); + REQUIRE(EATTWO('.', ']'), REG_ECOLLATE); + return(value); +} + +/* + - p_b_coll_elem - parse a collating-element name and look it up + */ +static char /* value of collating element */ +p_b_coll_elem(struct parse *p, + int endc) /* name ended by endc,']' */ +{ + char *sp = p->next; + struct cname *cp; + int len; + + while (MORE() && !SEETWO(endc, ']')) + NEXT(); + if (!MORE()) { + SETERROR(REG_EBRACK); + return(0); + } + len = p->next - sp; + for (cp = cnames; cp->name != NULL; cp++) + if (strncmp(cp->name, sp, len) == 0 && cp->name[len] == '\0') + return(cp->code); /* known name */ + if (len == 1) + return(*sp); /* single character */ + SETERROR(REG_ECOLLATE); /* neither */ + return(0); +} + +/* + - othercase - return the case counterpart of an alphabetic + */ +static char /* if no counterpart, return ch */ +othercase(int ch) +{ + ch = (uch)ch; + assert(isalpha(ch)); + if (isupper(ch)) + return ((uch)tolower(ch)); + else if (islower(ch)) + return ((uch)toupper(ch)); + else /* peculiar, but could happen */ + return(ch); +} + +/* + - bothcases - emit a dualcase version of a two-case character + * + * Boy, is this implementation ever a kludge... + */ +static void +bothcases(struct parse *p, int ch) +{ + char *oldnext = p->next; + char *oldend = p->end; + char bracket[3]; + + ch = (uch)ch; + assert(othercase(ch) != ch); /* p_bracket() would recurse */ + p->next = bracket; + p->end = bracket+2; + bracket[0] = ch; + bracket[1] = ']'; + bracket[2] = '\0'; + p_bracket(p); + assert(p->next == bracket+2); + p->next = oldnext; + p->end = oldend; +} + +/* + - ordinary - emit an ordinary character + */ +static void +ordinary(struct parse *p, int ch) +{ + cat_t *cap = p->g->categories; + + if ((p->g->cflags®_ICASE) && isalpha((uch)ch) && othercase(ch) != ch) + bothcases(p, ch); + else { + EMIT(OCHAR, (uch)ch); + if (cap[ch] == 0) + cap[ch] = p->g->ncategories++; + } +} + +/* + - nonnewline - emit REG_NEWLINE version of OANY + * + * Boy, is this implementation ever a kludge... + */ +static void +nonnewline(struct parse *p) +{ + char *oldnext = p->next; + char *oldend = p->end; + char bracket[4]; + + p->next = bracket; + p->end = bracket+3; + bracket[0] = '^'; + bracket[1] = '\n'; + bracket[2] = ']'; + bracket[3] = '\0'; + p_bracket(p); + assert(p->next == bracket+3); + p->next = oldnext; + p->end = oldend; +} + +/* + - repeat - generate code for a bounded repetition, recursively if needed + */ +static void +repeat(struct parse *p, + sopno start, /* operand from here to end of strip */ + int from, /* repeated from this number */ + int to) /* to this number of times (maybe INFINITY) */ +{ + sopno finish = HERE(); +# define N 2 +# define INF 3 +# define REP(f, t) ((f)*8 + (t)) +# define MAP(n) (((n) <= 1) ? (n) : ((n) == INFINITY) ? INF : N) + sopno copy; + + if (p->error != 0) /* head off possible runaway recursion */ + return; + + assert(from <= to); + + switch (REP(MAP(from), MAP(to))) { + case REP(0, 0): /* must be user doing this */ + DROP(finish-start); /* drop the operand */ + break; + case REP(0, 1): /* as x{1,1}? */ + case REP(0, N): /* as x{1,n}? */ + case REP(0, INF): /* as x{1,}? */ + /* KLUDGE: emit y? as (y|) until subtle bug gets fixed */ + INSERT(OCH_, start); /* offset is wrong... */ + repeat(p, start+1, 1, to); + ASTERN(OOR1, start); + AHEAD(start); /* ... fix it */ + EMIT(OOR2, 0); + AHEAD(THERE()); + ASTERN(O_CH, THERETHERE()); + break; + case REP(1, 1): /* trivial case */ + /* done */ + break; + case REP(1, N): /* as x?x{1,n-1} */ + /* KLUDGE: emit y? as (y|) until subtle bug gets fixed */ + INSERT(OCH_, start); + ASTERN(OOR1, start); + AHEAD(start); + EMIT(OOR2, 0); /* offset very wrong... */ + AHEAD(THERE()); /* ...so fix it */ + ASTERN(O_CH, THERETHERE()); + copy = dupl(p, start+1, finish+1); + assert(copy == finish+4); + repeat(p, copy, 1, to-1); + break; + case REP(1, INF): /* as x+ */ + INSERT(OPLUS_, start); + ASTERN(O_PLUS, start); + break; + case REP(N, N): /* as xx{m-1,n-1} */ + copy = dupl(p, start, finish); + repeat(p, copy, from-1, to-1); + break; + case REP(N, INF): /* as xx{n-1,INF} */ + copy = dupl(p, start, finish); + repeat(p, copy, from-1, to); + break; + default: /* "can't happen" */ + SETERROR(REG_ASSERT); /* just in case */ + break; + } +} + +/* + - seterr - set an error condition + */ +static int /* useless but makes type checking happy */ +seterr(struct parse *p, int e) +{ + if (p->error == 0) /* keep earliest error condition */ + p->error = e; + p->next = nuls; /* try to bring things to a halt */ + p->end = nuls; + return(0); /* make the return value well-defined */ +} + +/* + - allocset - allocate a set of characters for [] + */ +static cset * +allocset(struct parse *p) +{ + int no = p->g->ncsets++; + size_t nc; + size_t nbytes; + cset *cs; + size_t css = (size_t)p->g->csetsize; + int i; + + if (no >= p->ncsalloc) { /* need another column of space */ + void *ptr; + + p->ncsalloc += CHAR_BIT; + nc = p->ncsalloc; + if (nc > SIZE_MAX / sizeof(cset)) + goto nomem; + assert(nc % CHAR_BIT == 0); + nbytes = nc / CHAR_BIT * css; + + ptr = (cset *)realloc((char *)p->g->sets, nc * sizeof(cset)); + if (ptr == NULL) + goto nomem; + p->g->sets = ptr; + + ptr = (uch *)realloc((char *)p->g->setbits, nbytes); + if (ptr == NULL) + goto nomem; + p->g->setbits = ptr; + + for (i = 0; i < no; i++) + p->g->sets[i].ptr = p->g->setbits + css*(i/CHAR_BIT); + + (void) memset((char *)p->g->setbits + (nbytes - css), 0, css); + } + /* XXX should not happen */ + if (p->g->sets == NULL || p->g->setbits == NULL) + goto nomem; + + cs = &p->g->sets[no]; + cs->ptr = p->g->setbits + css*((no)/CHAR_BIT); + cs->mask = 1 << ((no) % CHAR_BIT); + cs->hash = 0; + cs->smultis = 0; + cs->multis = NULL; + + return(cs); +nomem: + free(p->g->sets); + p->g->sets = NULL; + free(p->g->setbits); + p->g->setbits = NULL; + + SETERROR(REG_ESPACE); + /* caller's responsibility not to do set ops */ + return(NULL); +} + +/* + - freeset - free a now-unused set + */ +static void +freeset(struct parse *p, cset *cs) +{ + size_t i; + cset *top = &p->g->sets[p->g->ncsets]; + size_t css = (size_t)p->g->csetsize; + + for (i = 0; i < css; i++) + CHsub(cs, i); + if (cs == top-1) /* recover only the easy case */ + p->g->ncsets--; +} + +/* + - freezeset - final processing on a set of characters + * + * The main task here is merging identical sets. This is usually a waste + * of time (although the hash code minimizes the overhead), but can win + * big if REG_ICASE is being used. REG_ICASE, by the way, is why the hash + * is done using addition rather than xor -- all ASCII [aA] sets xor to + * the same value! + */ +static int /* set number */ +freezeset(struct parse *p, cset *cs) +{ + uch h = cs->hash; + size_t i; + cset *top = &p->g->sets[p->g->ncsets]; + cset *cs2; + size_t css = (size_t)p->g->csetsize; + + /* look for an earlier one which is the same */ + for (cs2 = &p->g->sets[0]; cs2 < top; cs2++) + if (cs2->hash == h && cs2 != cs) { + /* maybe */ + for (i = 0; i < css; i++) + if (!!CHIN(cs2, i) != !!CHIN(cs, i)) + break; /* no */ + if (i == css) + break; /* yes */ + } + + if (cs2 < top) { /* found one */ + freeset(p, cs); + cs = cs2; + } + + return((int)(cs - p->g->sets)); +} + +/* + - firstch - return first character in a set (which must have at least one) + */ +static int /* character; there is no "none" value */ +firstch(struct parse *p, cset *cs) +{ + size_t i; + size_t css = (size_t)p->g->csetsize; + + for (i = 0; i < css; i++) + if (CHIN(cs, i)) + return((char)i); + assert(never); + return(0); /* arbitrary */ +} + +/* + - nch - number of characters in a set + */ +static int +nch(struct parse *p, cset *cs) +{ + size_t i; + size_t css = (size_t)p->g->csetsize; + int n = 0; + + for (i = 0; i < css; i++) + if (CHIN(cs, i)) + n++; + return(n); +} + +/* + - mcadd - add a collating element to a cset + */ +static void +mcadd( struct parse *p, cset *cs, const char *cp) +{ + size_t oldend = cs->smultis; + void *np; + + cs->smultis += strlen(cp) + 1; + np = realloc(cs->multis, cs->smultis); + if (np == NULL) { + if (cs->multis) + free(cs->multis); + cs->multis = NULL; + SETERROR(REG_ESPACE); + return; + } + cs->multis = np; + + llvm_strlcpy(cs->multis + oldend - 1, cp, cs->smultis - oldend + 1); +} + +/* + - mcinvert - invert the list of collating elements in a cset + * + * This would have to know the set of possibilities. Implementation + * is deferred. + */ +/* ARGSUSED */ +static void +mcinvert(struct parse *p, cset *cs) +{ + assert(cs->multis == NULL); /* xxx */ +} + +/* + - mccase - add case counterparts of the list of collating elements in a cset + * + * This would have to know the set of possibilities. Implementation + * is deferred. + */ +/* ARGSUSED */ +static void +mccase(struct parse *p, cset *cs) +{ + assert(cs->multis == NULL); /* xxx */ +} + +/* + - isinsets - is this character in any sets? + */ +static int /* predicate */ +isinsets(struct re_guts *g, int c) +{ + uch *col; + int i; + int ncols = (g->ncsets+(CHAR_BIT-1)) / CHAR_BIT; + unsigned uc = (uch)c; + + for (i = 0, col = g->setbits; i < ncols; i++, col += g->csetsize) + if (col[uc] != 0) + return(1); + return(0); +} + +/* + - samesets - are these two characters in exactly the same sets? + */ +static int /* predicate */ +samesets(struct re_guts *g, int c1, int c2) +{ + uch *col; + int i; + int ncols = (g->ncsets+(CHAR_BIT-1)) / CHAR_BIT; + unsigned uc1 = (uch)c1; + unsigned uc2 = (uch)c2; + + for (i = 0, col = g->setbits; i < ncols; i++, col += g->csetsize) + if (col[uc1] != col[uc2]) + return(0); + return(1); +} + +/* + - categorize - sort out character categories + */ +static void +categorize(struct parse *p, struct re_guts *g) +{ + cat_t *cats = g->categories; + int c; + int c2; + cat_t cat; + + /* avoid making error situations worse */ + if (p->error != 0) + return; + + for (c = CHAR_MIN; c <= CHAR_MAX; c++) + if (cats[c] == 0 && isinsets(g, c)) { + cat = g->ncategories++; + cats[c] = cat; + for (c2 = c+1; c2 <= CHAR_MAX; c2++) + if (cats[c2] == 0 && samesets(g, c, c2)) + cats[c2] = cat; + } +} + +/* + - dupl - emit a duplicate of a bunch of sops + */ +static sopno /* start of duplicate */ +dupl(struct parse *p, + sopno start, /* from here */ + sopno finish) /* to this less one */ +{ + sopno ret = HERE(); + sopno len = finish - start; + + assert(finish >= start); + if (len == 0) + return(ret); + enlarge(p, p->ssize + len); /* this many unexpected additions */ + assert(p->ssize >= p->slen + len); + (void) memmove((char *)(p->strip + p->slen), + (char *)(p->strip + start), (size_t)len*sizeof(sop)); + p->slen += len; + return(ret); +} + +/* + - doemit - emit a strip operator + * + * It might seem better to implement this as a macro with a function as + * hard-case backup, but it's just too big and messy unless there are + * some changes to the data structures. Maybe later. + */ +static void +doemit(struct parse *p, sop op, size_t opnd) +{ + /* avoid making error situations worse */ + if (p->error != 0) + return; + + /* deal with oversize operands ("can't happen", more or less) */ + assert(opnd < 1<slen >= p->ssize) + enlarge(p, (p->ssize+1) / 2 * 3); /* +50% */ + assert(p->slen < p->ssize); + + /* finally, it's all reduced to the easy case */ + p->strip[p->slen++] = SOP(op, opnd); +} + +/* + - doinsert - insert a sop into the strip + */ +static void +doinsert(struct parse *p, sop op, size_t opnd, sopno pos) +{ + sopno sn; + sop s; + int i; + + /* avoid making error situations worse */ + if (p->error != 0) + return; + + sn = HERE(); + EMIT(op, opnd); /* do checks, ensure space */ + assert(HERE() == sn+1); + s = p->strip[sn]; + + /* adjust paren pointers */ + assert(pos > 0); + for (i = 1; i < NPAREN; i++) { + if (p->pbegin[i] >= pos) { + p->pbegin[i]++; + } + if (p->pend[i] >= pos) { + p->pend[i]++; + } + } + + memmove((char *)&p->strip[pos+1], (char *)&p->strip[pos], + (HERE()-pos-1)*sizeof(sop)); + p->strip[pos] = s; +} + +/* + - dofwd - complete a forward reference + */ +static void +dofwd(struct parse *p, sopno pos, sop value) +{ + /* avoid making error situations worse */ + if (p->error != 0) + return; + + assert(value < 1<strip[pos] = OP(p->strip[pos]) | value; +} + +/* + - enlarge - enlarge the strip + */ +static void +enlarge(struct parse *p, sopno size) +{ + sop *sp; + + if (p->ssize >= size) + return; + + if ((uintptr_t)size > SIZE_MAX / sizeof(sop)) { + SETERROR(REG_ESPACE); + return; + } + + sp = (sop *)realloc(p->strip, size*sizeof(sop)); + if (sp == NULL) { + SETERROR(REG_ESPACE); + return; + } + p->strip = sp; + p->ssize = size; +} + +/* + - stripsnug - compact the strip + */ +static void +stripsnug(struct parse *p, struct re_guts *g) +{ + g->nstates = p->slen; + if ((uintptr_t)p->slen > SIZE_MAX / sizeof(sop)) { + g->strip = p->strip; + SETERROR(REG_ESPACE); + return; + } + + g->strip = (sop *)realloc((char *)p->strip, p->slen * sizeof(sop)); + if (g->strip == NULL) { + SETERROR(REG_ESPACE); + g->strip = p->strip; + } +} + +/* + - findmust - fill in must and mlen with longest mandatory literal string + * + * This algorithm could do fancy things like analyzing the operands of | + * for common subsequences. Someday. This code is simple and finds most + * of the interesting cases. + * + * Note that must and mlen got initialized during setup. + */ +static void +findmust(struct parse *p, struct re_guts *g) +{ + sop *scan; + sop *start = 0; /* start initialized in the default case, after that */ + sop *newstart = 0; /* newstart was initialized in the OCHAR case */ + sopno newlen; + sop s; + char *cp; + sopno i; + + /* avoid making error situations worse */ + if (p->error != 0) + return; + + /* find the longest OCHAR sequence in strip */ + newlen = 0; + scan = g->strip + 1; + do { + s = *scan++; + switch (OP(s)) { + case OCHAR: /* sequence member */ + if (newlen == 0) /* new sequence */ + newstart = scan - 1; + newlen++; + break; + case OPLUS_: /* things that don't break one */ + case OLPAREN: + case ORPAREN: + break; + case OQUEST_: /* things that must be skipped */ + case OCH_: + scan--; + do { + scan += OPND(s); + s = *scan; + /* assert() interferes w debug printouts */ + if (OP(s) != O_QUEST && OP(s) != O_CH && + OP(s) != OOR2) { + g->iflags |= REGEX_BAD; + return; + } + } while (OP(s) != O_QUEST && OP(s) != O_CH); + /* fallthrough */ + default: /* things that break a sequence */ + if (newlen > g->mlen) { /* ends one */ + start = newstart; + g->mlen = newlen; + } + newlen = 0; + break; + } + } while (OP(s) != OEND); + + if (g->mlen == 0) /* there isn't one */ + return; + + /* turn it into a character string */ + g->must = malloc((size_t)g->mlen + 1); + if (g->must == NULL) { /* argh; just forget it */ + g->mlen = 0; + return; + } + cp = g->must; + scan = start; + for (i = g->mlen; i > 0; i--) { + while (OP(s = *scan++) != OCHAR) + continue; + assert(cp < g->must + g->mlen); + *cp++ = (char)OPND(s); + } + assert(cp == g->must + g->mlen); + *cp++ = '\0'; /* just on general principles */ +} + +/* + - pluscount - count + nesting + */ +static sopno /* nesting depth */ +pluscount(struct parse *p, struct re_guts *g) +{ + sop *scan; + sop s; + sopno plusnest = 0; + sopno maxnest = 0; + + if (p->error != 0) + return(0); /* there may not be an OEND */ + + scan = g->strip + 1; + do { + s = *scan++; + switch (OP(s)) { + case OPLUS_: + plusnest++; + break; + case O_PLUS: + if (plusnest > maxnest) + maxnest = plusnest; + plusnest--; + break; + } + } while (OP(s) != OEND); + if (plusnest != 0) + g->iflags |= REGEX_BAD; + return(maxnest); +} diff --git a/llvm/lib/Support/regengine.inc b/llvm/lib/Support/regengine.inc new file mode 100644 index 0000000..62d8c26 --- /dev/null +++ b/llvm/lib/Support/regengine.inc @@ -0,0 +1,1034 @@ +/*- + * This code is derived from OpenBSD's libc/regex, original license follows: + * + * Copyright (c) 1992, 1993, 1994 Henry Spencer. + * Copyright (c) 1992, 1993, 1994 + * The Regents of the University of California. All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * Henry Spencer. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)engine.c 8.5 (Berkeley) 3/20/94 + */ + +/* + * The matching engine and friends. This file is #included by regexec.c + * after suitable #defines of a variety of macros used herein, so that + * different state representations can be used without duplicating masses + * of code. + */ + +#ifdef SNAMES +#define matcher smatcher +#define fast sfast +#define slow sslow +#define dissect sdissect +#define backref sbackref +#define step sstep +#define print sprint +#define at sat +#define match smat +#define nope snope +#endif +#ifdef LNAMES +#define matcher lmatcher +#define fast lfast +#define slow lslow +#define dissect ldissect +#define backref lbackref +#define step lstep +#define print lprint +#define at lat +#define match lmat +#define nope lnope +#endif + +/* another structure passed up and down to avoid zillions of parameters */ +struct match { + struct re_guts *g; + int eflags; + llvm_regmatch_t *pmatch; /* [nsub+1] (0 element unused) */ + const char *offp; /* offsets work from here */ + const char *beginp; /* start of string -- virtual NUL precedes */ + const char *endp; /* end of string -- virtual NUL here */ + const char *coldp; /* can be no match starting before here */ + const char **lastpos; /* [nplus+1] */ + STATEVARS; + states st; /* current states */ + states fresh; /* states for a fresh start */ + states tmp; /* temporary */ + states empty; /* empty set of states */ +}; + +static int matcher(struct re_guts *, const char *, size_t, + llvm_regmatch_t[], int); +static const char *dissect(struct match *, const char *, const char *, sopno, + sopno); +static const char *backref(struct match *, const char *, const char *, sopno, + sopno, sopno, int); +static const char *fast(struct match *, const char *, const char *, sopno, sopno); +static const char *slow(struct match *, const char *, const char *, sopno, sopno); +static states step(struct re_guts *, sopno, sopno, states, int, states); +#define MAX_RECURSION 100 +#define BOL (OUT+1) +#define EOL (BOL+1) +#define BOLEOL (BOL+2) +#define NOTHING (BOL+3) +#define BOW (BOL+4) +#define EOW (BOL+5) +#define CODEMAX (BOL+5) /* highest code used */ +#define NONCHAR(c) ((c) > CHAR_MAX) +#define NNONCHAR (CODEMAX-CHAR_MAX) +#ifdef REDEBUG +static void print(struct match *, char *, states, int, FILE *); +#endif +#ifdef REDEBUG +static void at(struct match *, char *, char *, char *, sopno, sopno); +#endif +#ifdef REDEBUG +static char *pchar(int); +#endif + +#ifdef REDEBUG +#define SP(t, s, c) print(m, t, s, c, stdout) +#define AT(t, p1, p2, s1, s2) at(m, t, p1, p2, s1, s2) +#define NOTE(str) { if (m->eflags®_TRACE) (void)printf("=%s\n", (str)); } +static int nope = 0; +#else +#define SP(t, s, c) /* nothing */ +#define AT(t, p1, p2, s1, s2) /* nothing */ +#define NOTE(s) /* nothing */ +#endif + +/* + - matcher - the actual matching engine + */ +static int /* 0 success, REG_NOMATCH failure */ +matcher(struct re_guts *g, const char *string, size_t nmatch, + llvm_regmatch_t pmatch[], + int eflags) +{ + const char *endp; + size_t i; + struct match mv; + struct match *m = &mv; + const char *dp; + const sopno gf = g->firststate+1; /* +1 for OEND */ + const sopno gl = g->laststate; + const char *start; + const char *stop; + + /* simplify the situation where possible */ + if (g->cflags®_NOSUB) + nmatch = 0; + if (eflags®_STARTEND) { + start = string + pmatch[0].rm_so; + stop = string + pmatch[0].rm_eo; + } else { + start = string; + stop = start + strlen(start); + } + if (stop < start) + return(REG_INVARG); + + /* prescreening; this does wonders for this rather slow code */ + if (g->must != NULL) { + for (dp = start; dp < stop; dp++) + if (*dp == g->must[0] && stop - dp >= g->mlen && + memcmp(dp, g->must, (size_t)g->mlen) == 0) + break; + if (dp == stop) /* we didn't find g->must */ + return(REG_NOMATCH); + } + + /* match struct setup */ + m->g = g; + m->eflags = eflags; + m->pmatch = NULL; + m->lastpos = NULL; + m->offp = string; + m->beginp = start; + m->endp = stop; + STATESETUP(m, 4); + SETUP(m->st); + SETUP(m->fresh); + SETUP(m->tmp); + SETUP(m->empty); + CLEAR(m->empty); + + /* this loop does only one repetition except for backrefs */ + for (;;) { + endp = fast(m, start, stop, gf, gl); + if (endp == NULL) { /* a miss */ + free(m->pmatch); + free((void*)m->lastpos); + STATETEARDOWN(m); + return(REG_NOMATCH); + } + if (nmatch == 0 && !g->backrefs) + break; /* no further info needed */ + + /* where? */ + assert(m->coldp != NULL); + for (;;) { + NOTE("finding start"); + endp = slow(m, m->coldp, stop, gf, gl); + if (endp != NULL) + break; + assert(m->coldp < m->endp); + m->coldp++; + } + if (nmatch == 1 && !g->backrefs) + break; /* no further info needed */ + + /* oh my, they want the subexpressions... */ + if (m->pmatch == NULL) + m->pmatch = (llvm_regmatch_t *)malloc((m->g->nsub + 1) * + sizeof(llvm_regmatch_t)); + if (m->pmatch == NULL) { + STATETEARDOWN(m); + return(REG_ESPACE); + } + for (i = 1; i <= m->g->nsub; i++) + m->pmatch[i].rm_so = m->pmatch[i].rm_eo = -1; + if (!g->backrefs && !(m->eflags®_BACKR)) { + NOTE("dissecting"); + dp = dissect(m, m->coldp, endp, gf, gl); + } else { + if (g->nplus > 0 && m->lastpos == NULL) + m->lastpos = (const char **)malloc((g->nplus+1) * + sizeof(char *)); + if (g->nplus > 0 && m->lastpos == NULL) { + free(m->pmatch); + STATETEARDOWN(m); + return(REG_ESPACE); + } + NOTE("backref dissect"); + dp = backref(m, m->coldp, endp, gf, gl, (sopno)0, 0); + } + if (dp != NULL) + break; + + /* uh-oh... we couldn't find a subexpression-level match */ + assert(g->backrefs); /* must be back references doing it */ + assert(g->nplus == 0 || m->lastpos != NULL); + for (;;) { + if (dp != NULL || endp <= m->coldp) + break; /* defeat */ + NOTE("backoff"); + endp = slow(m, m->coldp, endp-1, gf, gl); + if (endp == NULL) + break; /* defeat */ + /* try it on a shorter possibility */ +#ifndef NDEBUG + for (i = 1; i <= m->g->nsub; i++) { + assert(m->pmatch[i].rm_so == -1); + assert(m->pmatch[i].rm_eo == -1); + } +#endif + NOTE("backoff dissect"); + dp = backref(m, m->coldp, endp, gf, gl, (sopno)0, 0); + } + assert(dp == NULL || dp == endp); + if (dp != NULL) /* found a shorter one */ + break; + + /* despite initial appearances, there is no match here */ + NOTE("false alarm"); + if (m->coldp == stop) + break; + start = m->coldp + 1; /* recycle starting later */ + } + + /* fill in the details if requested */ + if (nmatch > 0) { + pmatch[0].rm_so = m->coldp - m->offp; + pmatch[0].rm_eo = endp - m->offp; + } + if (nmatch > 1) { + assert(m->pmatch != NULL); + for (i = 1; i < nmatch; i++) + if (i <= m->g->nsub) + pmatch[i] = m->pmatch[i]; + else { + pmatch[i].rm_so = -1; + pmatch[i].rm_eo = -1; + } + } + + if (m->pmatch != NULL) + free((char *)m->pmatch); + if (m->lastpos != NULL) + free((char *)m->lastpos); + STATETEARDOWN(m); + return(0); +} + +/* + - dissect - figure out what matched what, no back references + */ +static const char * /* == stop (success) always */ +dissect(struct match *m, const char *start, const char *stop, sopno startst, + sopno stopst) +{ + int i; + sopno ss; /* start sop of current subRE */ + sopno es; /* end sop of current subRE */ + const char *sp; /* start of string matched by it */ + const char *stp; /* string matched by it cannot pass here */ + const char *rest; /* start of rest of string */ + const char *tail; /* string unmatched by rest of RE */ + sopno ssub; /* start sop of subsubRE */ + sopno esub; /* end sop of subsubRE */ + const char *ssp; /* start of string matched by subsubRE */ + const char *sep; /* end of string matched by subsubRE */ + const char *oldssp; /* previous ssp */ + + AT("diss", start, stop, startst, stopst); + sp = start; + for (ss = startst; ss < stopst; ss = es) { + /* identify end of subRE */ + es = ss; + switch (OP(m->g->strip[es])) { + case OPLUS_: + case OQUEST_: + es += OPND(m->g->strip[es]); + break; + case OCH_: + while (OP(m->g->strip[es]) != O_CH) + es += OPND(m->g->strip[es]); + break; + } + es++; + + /* figure out what it matched */ + switch (OP(m->g->strip[ss])) { + case OEND: + assert(nope); + break; + case OCHAR: + sp++; + break; + case OBOL: + case OEOL: + case OBOW: + case OEOW: + break; + case OANY: + case OANYOF: + sp++; + break; + case OBACK_: + case O_BACK: + assert(nope); + break; + /* cases where length of match is hard to find */ + case OQUEST_: + stp = stop; + for (;;) { + /* how long could this one be? */ + rest = slow(m, sp, stp, ss, es); + assert(rest != NULL); /* it did match */ + /* could the rest match the rest? */ + tail = slow(m, rest, stop, es, stopst); + if (tail == stop) + break; /* yes! */ + /* no -- try a shorter match for this one */ + stp = rest - 1; + assert(stp >= sp); /* it did work */ + } + ssub = ss + 1; + esub = es - 1; + /* did innards match? */ + if (slow(m, sp, rest, ssub, esub) != NULL) { + const char *dp = dissect(m, sp, rest, ssub, esub); + (void)dp; /* avoid warning if assertions off */ + assert(dp == rest); + } else /* no */ + assert(sp == rest); + sp = rest; + break; + case OPLUS_: + stp = stop; + for (;;) { + /* how long could this one be? */ + rest = slow(m, sp, stp, ss, es); + assert(rest != NULL); /* it did match */ + /* could the rest match the rest? */ + tail = slow(m, rest, stop, es, stopst); + if (tail == stop) + break; /* yes! */ + /* no -- try a shorter match for this one */ + stp = rest - 1; + assert(stp >= sp); /* it did work */ + } + ssub = ss + 1; + esub = es - 1; + ssp = sp; + oldssp = ssp; + for (;;) { /* find last match of innards */ + sep = slow(m, ssp, rest, ssub, esub); + if (sep == NULL || sep == ssp) + break; /* failed or matched null */ + oldssp = ssp; /* on to next try */ + ssp = sep; + } + if (sep == NULL) { + /* last successful match */ + sep = ssp; + ssp = oldssp; + } + assert(sep == rest); /* must exhaust substring */ + assert(slow(m, ssp, sep, ssub, esub) == rest); + { + const char *dp = dissect(m, ssp, sep, ssub, esub); + (void)dp; /* avoid warning if assertions off */ + assert(dp == sep); + } + sp = rest; + break; + case OCH_: + stp = stop; + for (;;) { + /* how long could this one be? */ + rest = slow(m, sp, stp, ss, es); + assert(rest != NULL); /* it did match */ + /* could the rest match the rest? */ + tail = slow(m, rest, stop, es, stopst); + if (tail == stop) + break; /* yes! */ + /* no -- try a shorter match for this one */ + stp = rest - 1; + assert(stp >= sp); /* it did work */ + } + ssub = ss + 1; + esub = ss + OPND(m->g->strip[ss]) - 1; + assert(OP(m->g->strip[esub]) == OOR1); + for (;;) { /* find first matching branch */ + if (slow(m, sp, rest, ssub, esub) == rest) + break; /* it matched all of it */ + /* that one missed, try next one */ + assert(OP(m->g->strip[esub]) == OOR1); + esub++; + assert(OP(m->g->strip[esub]) == OOR2); + ssub = esub + 1; + esub += OPND(m->g->strip[esub]); + if (OP(m->g->strip[esub]) == OOR2) + esub--; + else + assert(OP(m->g->strip[esub]) == O_CH); + } + { + const char *dp = dissect(m, sp, rest, ssub, esub); + (void)dp; /* avoid warning if assertions off */ + assert(dp == rest); + } + sp = rest; + break; + case O_PLUS: + case O_QUEST: + case OOR1: + case OOR2: + case O_CH: + assert(nope); + break; + case OLPAREN: + i = OPND(m->g->strip[ss]); + assert(0 < i && i <= m->g->nsub); + m->pmatch[i].rm_so = sp - m->offp; + break; + case ORPAREN: + i = OPND(m->g->strip[ss]); + assert(0 < i && i <= m->g->nsub); + m->pmatch[i].rm_eo = sp - m->offp; + break; + default: /* uh oh */ + assert(nope); + break; + } + } + + assert(sp == stop); + return(sp); +} + +/* + - backref - figure out what matched what, figuring in back references + */ +static const char * /* == stop (success) or NULL (failure) */ +backref(struct match *m, const char *start, const char *stop, sopno startst, + sopno stopst, sopno lev, int rec) /* PLUS nesting level */ +{ + int i; + sopno ss; /* start sop of current subRE */ + const char *sp; /* start of string matched by it */ + sopno ssub; /* start sop of subsubRE */ + sopno esub; /* end sop of subsubRE */ + const char *ssp; /* start of string matched by subsubRE */ + const char *dp; + size_t len; + int hard; + sop s; + llvm_regoff_t offsave; + cset *cs; + + AT("back", start, stop, startst, stopst); + sp = start; + + /* get as far as we can with easy stuff */ + hard = 0; + for (ss = startst; !hard && ss < stopst; ss++) + switch (OP(s = m->g->strip[ss])) { + case OCHAR: + if (sp == stop || *sp++ != (char)OPND(s)) + return(NULL); + break; + case OANY: + if (sp == stop) + return(NULL); + sp++; + break; + case OANYOF: + cs = &m->g->sets[OPND(s)]; + if (sp == stop || !CHIN(cs, *sp++)) + return(NULL); + break; + case OBOL: + if ( (sp == m->beginp && !(m->eflags®_NOTBOL)) || + (sp < m->endp && *(sp-1) == '\n' && + (m->g->cflags®_NEWLINE)) ) + { /* yes */ } + else + return(NULL); + break; + case OEOL: + if ( (sp == m->endp && !(m->eflags®_NOTEOL)) || + (sp < m->endp && *sp == '\n' && + (m->g->cflags®_NEWLINE)) ) + { /* yes */ } + else + return(NULL); + break; + case OBOW: + if (( (sp == m->beginp && !(m->eflags®_NOTBOL)) || + (sp < m->endp && *(sp-1) == '\n' && + (m->g->cflags®_NEWLINE)) || + (sp > m->beginp && + !ISWORD(*(sp-1))) ) && + (sp < m->endp && ISWORD(*sp)) ) + { /* yes */ } + else + return(NULL); + break; + case OEOW: + if (( (sp == m->endp && !(m->eflags®_NOTEOL)) || + (sp < m->endp && *sp == '\n' && + (m->g->cflags®_NEWLINE)) || + (sp < m->endp && !ISWORD(*sp)) ) && + (sp > m->beginp && ISWORD(*(sp-1))) ) + { /* yes */ } + else + return(NULL); + break; + case O_QUEST: + break; + case OOR1: /* matches null but needs to skip */ + ss++; + s = m->g->strip[ss]; + do { + assert(OP(s) == OOR2); + ss += OPND(s); + } while (OP(s = m->g->strip[ss]) != O_CH); + /* note that the ss++ gets us past the O_CH */ + break; + default: /* have to make a choice */ + hard = 1; + break; + } + if (!hard) { /* that was it! */ + if (sp != stop) + return(NULL); + return(sp); + } + ss--; /* adjust for the for's final increment */ + + /* the hard stuff */ + AT("hard", sp, stop, ss, stopst); + s = m->g->strip[ss]; + switch (OP(s)) { + case OBACK_: /* the vilest depths */ + i = OPND(s); + assert(0 < i && i <= m->g->nsub); + if (m->pmatch[i].rm_eo == -1) + return(NULL); + assert(m->pmatch[i].rm_so != -1); + len = m->pmatch[i].rm_eo - m->pmatch[i].rm_so; + if (len == 0 && rec++ > MAX_RECURSION) + return(NULL); + assert(stop - m->beginp >= len); + if (sp > stop - len) + return(NULL); /* not enough left to match */ + ssp = m->offp + m->pmatch[i].rm_so; + if (memcmp(sp, ssp, len) != 0) + return(NULL); + while (m->g->strip[ss] != SOP(O_BACK, i)) + ss++; + return(backref(m, sp+len, stop, ss+1, stopst, lev, rec)); + break; + case OQUEST_: /* to null or not */ + dp = backref(m, sp, stop, ss+1, stopst, lev, rec); + if (dp != NULL) + return(dp); /* not */ + return(backref(m, sp, stop, ss+OPND(s)+1, stopst, lev, rec)); + break; + case OPLUS_: + assert(m->lastpos != NULL); + assert(lev+1 <= m->g->nplus); + m->lastpos[lev+1] = sp; + return(backref(m, sp, stop, ss+1, stopst, lev+1, rec)); + break; + case O_PLUS: + if (sp == m->lastpos[lev]) /* last pass matched null */ + return(backref(m, sp, stop, ss+1, stopst, lev-1, rec)); + /* try another pass */ + m->lastpos[lev] = sp; + dp = backref(m, sp, stop, ss-OPND(s)+1, stopst, lev, rec); + if (dp == NULL) + return(backref(m, sp, stop, ss+1, stopst, lev-1, rec)); + else + return(dp); + break; + case OCH_: /* find the right one, if any */ + ssub = ss + 1; + esub = ss + OPND(s) - 1; + assert(OP(m->g->strip[esub]) == OOR1); + for (;;) { /* find first matching branch */ + dp = backref(m, sp, stop, ssub, esub, lev, rec); + if (dp != NULL) + return(dp); + /* that one missed, try next one */ + if (OP(m->g->strip[esub]) == O_CH) + return(NULL); /* there is none */ + esub++; + assert(OP(m->g->strip[esub]) == OOR2); + ssub = esub + 1; + esub += OPND(m->g->strip[esub]); + if (OP(m->g->strip[esub]) == OOR2) + esub--; + else + assert(OP(m->g->strip[esub]) == O_CH); + } + break; + case OLPAREN: /* must undo assignment if rest fails */ + i = OPND(s); + assert(0 < i && i <= m->g->nsub); + offsave = m->pmatch[i].rm_so; + m->pmatch[i].rm_so = sp - m->offp; + dp = backref(m, sp, stop, ss+1, stopst, lev, rec); + if (dp != NULL) + return(dp); + m->pmatch[i].rm_so = offsave; + return(NULL); + break; + case ORPAREN: /* must undo assignment if rest fails */ + i = OPND(s); + assert(0 < i && i <= m->g->nsub); + offsave = m->pmatch[i].rm_eo; + m->pmatch[i].rm_eo = sp - m->offp; + dp = backref(m, sp, stop, ss+1, stopst, lev, rec); + if (dp != NULL) + return(dp); + m->pmatch[i].rm_eo = offsave; + return(NULL); + break; + default: /* uh oh */ + assert(nope); + break; + } + + /* "can't happen" */ + assert(nope); + /* NOTREACHED */ + return NULL; +} + +/* + - fast - step through the string at top speed + */ +static const char * /* where tentative match ended, or NULL */ +fast(struct match *m, const char *start, const char *stop, sopno startst, + sopno stopst) +{ + states st = m->st; + states fresh = m->fresh; + states tmp = m->tmp; + const char *p = start; + int c = (start == m->beginp) ? OUT : *(start-1); + int lastc; /* previous c */ + int flagch; + int i; + const char *coldp; /* last p after which no match was underway */ + + CLEAR(st); + SET1(st, startst); + st = step(m->g, startst, stopst, st, NOTHING, st); + ASSIGN(fresh, st); + SP("start", st, *p); + coldp = NULL; + for (;;) { + /* next character */ + lastc = c; + c = (p == m->endp) ? OUT : *p; + if (EQ(st, fresh)) + coldp = p; + + /* is there an EOL and/or BOL between lastc and c? */ + flagch = '\0'; + i = 0; + if ( (lastc == '\n' && m->g->cflags®_NEWLINE) || + (lastc == OUT && !(m->eflags®_NOTBOL)) ) { + flagch = BOL; + i = m->g->nbol; + } + if ( (c == '\n' && m->g->cflags®_NEWLINE) || + (c == OUT && !(m->eflags®_NOTEOL)) ) { + flagch = (flagch == BOL) ? BOLEOL : EOL; + i += m->g->neol; + } + if (i != 0) { + for (; i > 0; i--) + st = step(m->g, startst, stopst, st, flagch, st); + SP("boleol", st, c); + } + + /* how about a word boundary? */ + if ( (flagch == BOL || (lastc != OUT && !ISWORD(lastc))) && + (c != OUT && ISWORD(c)) ) { + flagch = BOW; + } + if ( (lastc != OUT && ISWORD(lastc)) && + (flagch == EOL || (c != OUT && !ISWORD(c))) ) { + flagch = EOW; + } + if (flagch == BOW || flagch == EOW) { + st = step(m->g, startst, stopst, st, flagch, st); + SP("boweow", st, c); + } + + /* are we done? */ + if (ISSET(st, stopst) || p == stop) + break; /* NOTE BREAK OUT */ + + /* no, we must deal with this character */ + ASSIGN(tmp, st); + ASSIGN(st, fresh); + assert(c != OUT); + st = step(m->g, startst, stopst, tmp, c, st); + SP("aft", st, c); + assert(EQ(step(m->g, startst, stopst, st, NOTHING, st), st)); + p++; + } + + assert(coldp != NULL); + m->coldp = coldp; + if (ISSET(st, stopst)) + return(p+1); + else + return(NULL); +} + +/* + - slow - step through the string more deliberately + */ +static const char * /* where it ended */ +slow(struct match *m, const char *start, const char *stop, sopno startst, + sopno stopst) +{ + states st = m->st; + states empty = m->empty; + states tmp = m->tmp; + const char *p = start; + int c = (start == m->beginp) ? OUT : *(start-1); + int lastc; /* previous c */ + int flagch; + int i; + const char *matchp; /* last p at which a match ended */ + + AT("slow", start, stop, startst, stopst); + CLEAR(st); + SET1(st, startst); + SP("sstart", st, *p); + st = step(m->g, startst, stopst, st, NOTHING, st); + matchp = NULL; + for (;;) { + /* next character */ + lastc = c; + c = (p == m->endp) ? OUT : *p; + + /* is there an EOL and/or BOL between lastc and c? */ + flagch = '\0'; + i = 0; + if ( (lastc == '\n' && m->g->cflags®_NEWLINE) || + (lastc == OUT && !(m->eflags®_NOTBOL)) ) { + flagch = BOL; + i = m->g->nbol; + } + if ( (c == '\n' && m->g->cflags®_NEWLINE) || + (c == OUT && !(m->eflags®_NOTEOL)) ) { + flagch = (flagch == BOL) ? BOLEOL : EOL; + i += m->g->neol; + } + if (i != 0) { + for (; i > 0; i--) + st = step(m->g, startst, stopst, st, flagch, st); + SP("sboleol", st, c); + } + + /* how about a word boundary? */ + if ( (flagch == BOL || (lastc != OUT && !ISWORD(lastc))) && + (c != OUT && ISWORD(c)) ) { + flagch = BOW; + } + if ( (lastc != OUT && ISWORD(lastc)) && + (flagch == EOL || (c != OUT && !ISWORD(c))) ) { + flagch = EOW; + } + if (flagch == BOW || flagch == EOW) { + st = step(m->g, startst, stopst, st, flagch, st); + SP("sboweow", st, c); + } + + /* are we done? */ + if (ISSET(st, stopst)) + matchp = p; + if (EQ(st, empty) || p == stop) + break; /* NOTE BREAK OUT */ + + /* no, we must deal with this character */ + ASSIGN(tmp, st); + ASSIGN(st, empty); + assert(c != OUT); + st = step(m->g, startst, stopst, tmp, c, st); + SP("saft", st, c); + assert(EQ(step(m->g, startst, stopst, st, NOTHING, st), st)); + p++; + } + + return(matchp); +} + + +/* + - step - map set of states reachable before char to set reachable after + */ +static states +step(struct re_guts *g, + sopno start, /* start state within strip */ + sopno stop, /* state after stop state within strip */ + states bef, /* states reachable before */ + int ch, /* character or NONCHAR code */ + states aft) /* states already known reachable after */ +{ + cset *cs; + sop s; + sopno pc; + onestate here; /* note, macros know this name */ + sopno look; + int i; + + for (pc = start, INIT(here, pc); pc != stop; pc++, INC(here)) { + s = g->strip[pc]; + switch (OP(s)) { + case OEND: + assert(pc == stop-1); + break; + case OCHAR: + /* only characters can match */ + assert(!NONCHAR(ch) || ch != (char)OPND(s)); + if (ch == (char)OPND(s)) + FWD(aft, bef, 1); + break; + case OBOL: + if (ch == BOL || ch == BOLEOL) + FWD(aft, bef, 1); + break; + case OEOL: + if (ch == EOL || ch == BOLEOL) + FWD(aft, bef, 1); + break; + case OBOW: + if (ch == BOW) + FWD(aft, bef, 1); + break; + case OEOW: + if (ch == EOW) + FWD(aft, bef, 1); + break; + case OANY: + if (!NONCHAR(ch)) + FWD(aft, bef, 1); + break; + case OANYOF: + cs = &g->sets[OPND(s)]; + if (!NONCHAR(ch) && CHIN(cs, ch)) + FWD(aft, bef, 1); + break; + case OBACK_: /* ignored here */ + case O_BACK: + FWD(aft, aft, 1); + break; + case OPLUS_: /* forward, this is just an empty */ + FWD(aft, aft, 1); + break; + case O_PLUS: /* both forward and back */ + FWD(aft, aft, 1); + i = ISSETBACK(aft, OPND(s)); + BACK(aft, aft, OPND(s)); + if (!i && ISSETBACK(aft, OPND(s))) { + /* oho, must reconsider loop body */ + pc -= OPND(s) + 1; + INIT(here, pc); + } + break; + case OQUEST_: /* two branches, both forward */ + FWD(aft, aft, 1); + FWD(aft, aft, OPND(s)); + break; + case O_QUEST: /* just an empty */ + FWD(aft, aft, 1); + break; + case OLPAREN: /* not significant here */ + case ORPAREN: + FWD(aft, aft, 1); + break; + case OCH_: /* mark the first two branches */ + FWD(aft, aft, 1); + assert(OP(g->strip[pc+OPND(s)]) == OOR2); + FWD(aft, aft, OPND(s)); + break; + case OOR1: /* done a branch, find the O_CH */ + if (ISSTATEIN(aft, here)) { + for (look = 1; + OP(s = g->strip[pc+look]) != O_CH; + look += OPND(s)) + assert(OP(s) == OOR2); + FWD(aft, aft, look); + } + break; + case OOR2: /* propagate OCH_'s marking */ + FWD(aft, aft, 1); + if (OP(g->strip[pc+OPND(s)]) != O_CH) { + assert(OP(g->strip[pc+OPND(s)]) == OOR2); + FWD(aft, aft, OPND(s)); + } + break; + case O_CH: /* just empty */ + FWD(aft, aft, 1); + break; + default: /* ooooops... */ + assert(nope); + break; + } + } + + return(aft); +} + +#ifdef REDEBUG +/* + - print - print a set of states + */ +static void +print(struct match *m, char *caption, states st, int ch, FILE *d) +{ + struct re_guts *g = m->g; + int i; + int first = 1; + + if (!(m->eflags®_TRACE)) + return; + + (void)fprintf(d, "%s", caption); + if (ch != '\0') + (void)fprintf(d, " %s", pchar(ch)); + for (i = 0; i < g->nstates; i++) + if (ISSET(st, i)) { + (void)fprintf(d, "%s%d", (first) ? "\t" : ", ", i); + first = 0; + } + (void)fprintf(d, "\n"); +} + +/* + - at - print current situation + */ +static void +at(struct match *m, char *title, char *start, char *stop, sopno startst, + sopno stopst) +{ + if (!(m->eflags®_TRACE)) + return; + + (void)printf("%s %s-", title, pchar(*start)); + (void)printf("%s ", pchar(*stop)); + (void)printf("%ld-%ld\n", (long)startst, (long)stopst); +} + +#ifndef PCHARDONE +#define PCHARDONE /* never again */ +/* + - pchar - make a character printable + * + * Is this identical to regchar() over in debug.c? Well, yes. But a + * duplicate here avoids having a debugging-capable regexec.o tied to + * a matching debug.o, and this is convenient. It all disappears in + * the non-debug compilation anyway, so it doesn't matter much. + */ +static char * /* -> representation */ +pchar(int ch) +{ + static char pbuf[10]; + + if (isprint(ch) || ch == ' ') + (void)snprintf(pbuf, sizeof pbuf, "%c", ch); + else + (void)snprintf(pbuf, sizeof pbuf, "\\%o", ch); + return(pbuf); +} +#endif +#endif + +#undef matcher +#undef fast +#undef slow +#undef dissect +#undef backref +#undef step +#undef print +#undef at +#undef match +#undef nope diff --git a/llvm/lib/Support/regerror.c b/llvm/lib/Support/regerror.c new file mode 100644 index 0000000..1d67c9a --- /dev/null +++ b/llvm/lib/Support/regerror.c @@ -0,0 +1,135 @@ +/*- + * This code is derived from OpenBSD's libc/regex, original license follows: + * + * Copyright (c) 1992, 1993, 1994 Henry Spencer. + * Copyright (c) 1992, 1993, 1994 + * The Regents of the University of California. All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * Henry Spencer. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)regerror.c 8.4 (Berkeley) 3/20/94 + */ + +#include +#include +#include +#include +#include +#include +#include "regex_impl.h" + +#include "regutils.h" + +#ifdef _MSC_VER +#define snprintf _snprintf +#endif + +static const char *regatoi(const llvm_regex_t *, char *, int); + +static struct rerr { + int code; + const char *name; + const char *explain; +} rerrs[] = { + { REG_NOMATCH, "REG_NOMATCH", "llvm_regexec() failed to match" }, + { REG_BADPAT, "REG_BADPAT", "invalid regular expression" }, + { REG_ECOLLATE, "REG_ECOLLATE", "invalid collating element" }, + { REG_ECTYPE, "REG_ECTYPE", "invalid character class" }, + { REG_EESCAPE, "REG_EESCAPE", "trailing backslash (\\)" }, + { REG_ESUBREG, "REG_ESUBREG", "invalid backreference number" }, + { REG_EBRACK, "REG_EBRACK", "brackets ([ ]) not balanced" }, + { REG_EPAREN, "REG_EPAREN", "parentheses not balanced" }, + { REG_EBRACE, "REG_EBRACE", "braces not balanced" }, + { REG_BADBR, "REG_BADBR", "invalid repetition count(s)" }, + { REG_ERANGE, "REG_ERANGE", "invalid character range" }, + { REG_ESPACE, "REG_ESPACE", "out of memory" }, + { REG_BADRPT, "REG_BADRPT", "repetition-operator operand invalid" }, + { REG_EMPTY, "REG_EMPTY", "empty (sub)expression" }, + { REG_ASSERT, "REG_ASSERT", "\"can't happen\" -- you found a bug" }, + { REG_INVARG, "REG_INVARG", "invalid argument to regex routine" }, + { 0, "", "*** unknown regexp error code ***" } +}; + +/* + - llvm_regerror - the interface to error numbers + = extern size_t llvm_regerror(int, const llvm_regex_t *, char *, size_t); + */ +/* ARGSUSED */ +size_t +llvm_regerror(int errcode, const llvm_regex_t *preg, char *errbuf, size_t errbuf_size) +{ + struct rerr *r; + size_t len; + int target = errcode &~ REG_ITOA; + const char *s; + char convbuf[50]; + + if (errcode == REG_ATOI) + s = regatoi(preg, convbuf, sizeof convbuf); + else { + for (r = rerrs; r->code != 0; r++) + if (r->code == target) + break; + + if (errcode®_ITOA) { + if (r->code != 0) { + assert(strlen(r->name) < sizeof(convbuf)); + (void) llvm_strlcpy(convbuf, r->name, sizeof convbuf); + } else + (void)snprintf(convbuf, sizeof convbuf, + "REG_0x%x", target); + s = convbuf; + } else + s = r->explain; + } + + len = strlen(s) + 1; + if (errbuf_size > 0) { + llvm_strlcpy(errbuf, s, errbuf_size); + } + + return(len); +} + +/* + - regatoi - internal routine to implement REG_ATOI + */ +static const char * +regatoi(const llvm_regex_t *preg, char *localbuf, int localbufsize) +{ + struct rerr *r; + + for (r = rerrs; r->code != 0; r++) + if (strcmp(r->name, preg->re_endp) == 0) + break; + if (r->code == 0) + return("0"); + + (void)snprintf(localbuf, localbufsize, "%d", r->code); + return(localbuf); +} diff --git a/llvm/lib/Support/regex2.h b/llvm/lib/Support/regex2.h new file mode 100644 index 0000000..d81bfbc --- /dev/null +++ b/llvm/lib/Support/regex2.h @@ -0,0 +1,162 @@ +/*- + * This code is derived from OpenBSD's libc/regex, original license follows: + * + * Copyright (c) 1992, 1993, 1994 Henry Spencer. + * Copyright (c) 1992, 1993, 1994 + * The Regents of the University of California. All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * Henry Spencer. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)regex2.h 8.4 (Berkeley) 3/20/94 + */ + +#ifndef LLVM_SUPPORT_REGEX2_H +#define LLVM_SUPPORT_REGEX2_H + +/* + * internals of regex_t + */ +#define MAGIC1 ((('r'^0200)<<8) | 'e') + +/* + * The internal representation is a *strip*, a sequence of + * operators ending with an endmarker. (Some terminology etc. is a + * historical relic of earlier versions which used multiple strips.) + * Certain oddities in the representation are there to permit running + * the machinery backwards; in particular, any deviation from sequential + * flow must be marked at both its source and its destination. Some + * fine points: + * + * - OPLUS_ and O_PLUS are *inside* the loop they create. + * - OQUEST_ and O_QUEST are *outside* the bypass they create. + * - OCH_ and O_CH are *outside* the multi-way branch they create, while + * OOR1 and OOR2 are respectively the end and the beginning of one of + * the branches. Note that there is an implicit OOR2 following OCH_ + * and an implicit OOR1 preceding O_CH. + * + * In state representations, an operator's bit is on to signify a state + * immediately *preceding* "execution" of that operator. + */ +typedef unsigned long sop; /* strip operator */ +typedef long sopno; +#define OPRMASK 0xf8000000LU +#define OPDMASK 0x07ffffffLU +#define OPSHIFT ((unsigned)27) +#define OP(n) ((n)&OPRMASK) +#define OPND(n) ((n)&OPDMASK) +#define SOP(op, opnd) ((op)|(opnd)) +/* operators meaning operand */ +/* (back, fwd are offsets) */ +#define OEND (1LU< uch [csetsize] */ + uch mask; /* bit within array */ + uch hash; /* hash code */ + size_t smultis; + char *multis; /* -> char[smulti] ab\0cd\0ef\0\0 */ +} cset; +/* note that CHadd and CHsub are unsafe, and CHIN doesn't yield 0/1 */ +#define CHadd(cs, c) ((cs)->ptr[(uch)(c)] |= (cs)->mask, (cs)->hash += (c)) +#define CHsub(cs, c) ((cs)->ptr[(uch)(c)] &= ~(cs)->mask, (cs)->hash -= (c)) +#define CHIN(cs, c) ((cs)->ptr[(uch)(c)] & (cs)->mask) +#define MCadd(p, cs, cp) mcadd(p, cs, cp) /* llvm_regcomp() internal fns */ +#define MCsub(p, cs, cp) mcsub(p, cs, cp) +#define MCin(p, cs, cp) mcin(p, cs, cp) + +/* stuff for character categories */ +typedef unsigned char cat_t; + +/* + * main compiled-expression structure + */ +struct re_guts { + int magic; +# define MAGIC2 ((('R'^0200)<<8)|'E') + sop *strip; /* malloced area for strip */ + int csetsize; /* number of bits in a cset vector */ + int ncsets; /* number of csets in use */ + cset *sets; /* -> cset [ncsets] */ + uch *setbits; /* -> uch[csetsize][ncsets/CHAR_BIT] */ + int cflags; /* copy of llvm_regcomp() cflags argument */ + sopno nstates; /* = number of sops */ + sopno firststate; /* the initial OEND (normally 0) */ + sopno laststate; /* the final OEND */ + int iflags; /* internal flags */ +# define USEBOL 01 /* used ^ */ +# define USEEOL 02 /* used $ */ +# define REGEX_BAD 04 /* something wrong */ + int nbol; /* number of ^ used */ + int neol; /* number of $ used */ + int ncategories; /* how many character categories */ + cat_t *categories; /* ->catspace[-CHAR_MIN] */ + char *must; /* match must contain this string */ + int mlen; /* length of must */ + size_t nsub; /* copy of re_nsub */ + int backrefs; /* does it use back references? */ + sopno nplus; /* how deep does it nest +s? */ + /* catspace must be last */ + cat_t catspace[1]; /* actually [NC] */ +}; + +/* misc utilities */ +#define OUT (CHAR_MAX+1) /* a non-character value */ +#define ISWORD(c) (isalnum(c&0xff) || (c) == '_') + +#endif diff --git a/llvm/lib/Support/regex_impl.h b/llvm/lib/Support/regex_impl.h new file mode 100644 index 0000000..f8296c9 --- /dev/null +++ b/llvm/lib/Support/regex_impl.h @@ -0,0 +1,108 @@ +/*- + * This code is derived from OpenBSD's libc/regex, original license follows: + * + * Copyright (c) 1992 Henry Spencer. + * Copyright (c) 1992, 1993 + * The Regents of the University of California. All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * Henry Spencer of the University of Toronto. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)regex.h 8.1 (Berkeley) 6/2/93 + */ + +#ifndef _REGEX_H_ +#define _REGEX_H_ + +#include +typedef off_t llvm_regoff_t; +typedef struct { + llvm_regoff_t rm_so; /* start of match */ + llvm_regoff_t rm_eo; /* end of match */ +} llvm_regmatch_t; + +typedef struct llvm_regex { + int re_magic; + size_t re_nsub; /* number of parenthesized subexpressions */ + const char *re_endp; /* end pointer for REG_PEND */ + struct re_guts *re_g; /* none of your business :-) */ +} llvm_regex_t; + +/* llvm_regcomp() flags */ +#define REG_BASIC 0000 +#define REG_EXTENDED 0001 +#define REG_ICASE 0002 +#define REG_NOSUB 0004 +#define REG_NEWLINE 0010 +#define REG_NOSPEC 0020 +#define REG_PEND 0040 +#define REG_DUMP 0200 + +/* llvm_regerror() flags */ +#define REG_NOMATCH 1 +#define REG_BADPAT 2 +#define REG_ECOLLATE 3 +#define REG_ECTYPE 4 +#define REG_EESCAPE 5 +#define REG_ESUBREG 6 +#define REG_EBRACK 7 +#define REG_EPAREN 8 +#define REG_EBRACE 9 +#define REG_BADBR 10 +#define REG_ERANGE 11 +#define REG_ESPACE 12 +#define REG_BADRPT 13 +#define REG_EMPTY 14 +#define REG_ASSERT 15 +#define REG_INVARG 16 +#define REG_ATOI 255 /* convert name to number (!) */ +#define REG_ITOA 0400 /* convert number to name (!) */ + +/* llvm_regexec() flags */ +#define REG_NOTBOL 00001 +#define REG_NOTEOL 00002 +#define REG_STARTEND 00004 +#define REG_TRACE 00400 /* tracing of execution */ +#define REG_LARGE 01000 /* force large representation */ +#define REG_BACKR 02000 /* force use of backref code */ + +#ifdef __cplusplus +extern "C" { +#endif + +int llvm_regcomp(llvm_regex_t *, const char *, int); +size_t llvm_regerror(int, const llvm_regex_t *, char *, size_t); +int llvm_regexec(const llvm_regex_t *, const char *, size_t, + llvm_regmatch_t [], int); +void llvm_regfree(llvm_regex_t *); +size_t llvm_strlcpy(char *dst, const char *src, size_t siz); + +#ifdef __cplusplus +} +#endif + +#endif /* !_REGEX_H_ */ diff --git a/llvm/lib/Support/regexec.c b/llvm/lib/Support/regexec.c new file mode 100644 index 0000000..bd5e72d --- /dev/null +++ b/llvm/lib/Support/regexec.c @@ -0,0 +1,162 @@ +/*- + * This code is derived from OpenBSD's libc/regex, original license follows: + * + * Copyright (c) 1992, 1993, 1994 Henry Spencer. + * Copyright (c) 1992, 1993, 1994 + * The Regents of the University of California. All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * Henry Spencer. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)regexec.c 8.3 (Berkeley) 3/20/94 + */ + +/* + * the outer shell of llvm_regexec() + * + * This file includes engine.inc *twice*, after muchos fiddling with the + * macros that code uses. This lets the same code operate on two different + * representations for state sets. + */ +#include +#include +#include +#include +#include +#include +#include "regex_impl.h" + +#include "regutils.h" +#include "regex2.h" + +/* macros for manipulating states, small version */ +/* FIXME: 'states' is assumed as 'long' on small version. */ +#define states1 long /* for later use in llvm_regexec() decision */ +#define states states1 +#define CLEAR(v) ((v) = 0) +#define SET0(v, n) ((v) &= ~((unsigned long)1 << (n))) +#define SET1(v, n) ((v) |= (unsigned long)1 << (n)) +#define ISSET(v, n) (((v) & ((unsigned long)1 << (n))) != 0) +#define ASSIGN(d, s) ((d) = (s)) +#define EQ(a, b) ((a) == (b)) +#define STATEVARS long dummy /* dummy version */ +#define STATESETUP(m, n) /* nothing */ +#define STATETEARDOWN(m) /* nothing */ +#define SETUP(v) ((v) = 0) +#define onestate long +#define INIT(o, n) ((o) = (unsigned long)1 << (n)) +#define INC(o) ((o) = (unsigned long)(o) << 1) +#define ISSTATEIN(v, o) (((v) & (o)) != 0) +/* some abbreviations; note that some of these know variable names! */ +/* do "if I'm here, I can also be there" etc without branches */ +#define FWD(dst, src, n) ((dst) |= ((unsigned long)(src)&(here)) << (n)) +#define BACK(dst, src, n) ((dst) |= ((unsigned long)(src)&(here)) >> (n)) +#define ISSETBACK(v, n) (((v) & ((unsigned long)here >> (n))) != 0) +/* function names */ +#define SNAMES /* engine.inc looks after details */ + +#include "regengine.inc" + +/* now undo things */ +#undef states +#undef CLEAR +#undef SET0 +#undef SET1 +#undef ISSET +#undef ASSIGN +#undef EQ +#undef STATEVARS +#undef STATESETUP +#undef STATETEARDOWN +#undef SETUP +#undef onestate +#undef INIT +#undef INC +#undef ISSTATEIN +#undef FWD +#undef BACK +#undef ISSETBACK +#undef SNAMES + +/* macros for manipulating states, large version */ +#define states char * +#define CLEAR(v) memset(v, 0, m->g->nstates) +#define SET0(v, n) ((v)[n] = 0) +#define SET1(v, n) ((v)[n] = 1) +#define ISSET(v, n) ((v)[n]) +#define ASSIGN(d, s) memmove(d, s, m->g->nstates) +#define EQ(a, b) (memcmp(a, b, m->g->nstates) == 0) +#define STATEVARS long vn; char *space +#define STATESETUP(m, nv) { (m)->space = malloc((nv)*(m)->g->nstates); \ + if ((m)->space == NULL) return(REG_ESPACE); \ + (m)->vn = 0; } +#define STATETEARDOWN(m) { free((m)->space); } +#define SETUP(v) ((v) = &m->space[m->vn++ * m->g->nstates]) +#define onestate long +#define INIT(o, n) ((o) = (n)) +#define INC(o) ((o)++) +#define ISSTATEIN(v, o) ((v)[o]) +/* some abbreviations; note that some of these know variable names! */ +/* do "if I'm here, I can also be there" etc without branches */ +#define FWD(dst, src, n) ((dst)[here+(n)] |= (src)[here]) +#define BACK(dst, src, n) ((dst)[here-(n)] |= (src)[here]) +#define ISSETBACK(v, n) ((v)[here - (n)]) +/* function names */ +#define LNAMES /* flag */ + +#include "regengine.inc" + +/* + - llvm_regexec - interface for matching + * + * We put this here so we can exploit knowledge of the state representation + * when choosing which matcher to call. Also, by this point the matchers + * have been prototyped. + */ +int /* 0 success, REG_NOMATCH failure */ +llvm_regexec(const llvm_regex_t *preg, const char *string, size_t nmatch, + llvm_regmatch_t pmatch[], int eflags) +{ + struct re_guts *g = preg->re_g; +#ifdef REDEBUG +# define GOODFLAGS(f) (f) +#else +# define GOODFLAGS(f) ((f)&(REG_NOTBOL|REG_NOTEOL|REG_STARTEND)) +#endif + + if (preg->re_magic != MAGIC1 || g->magic != MAGIC2) + return(REG_BADPAT); + assert(!(g->iflags®EX_BAD)); + if (g->iflags®EX_BAD) /* backstop for no-debug case */ + return(REG_BADPAT); + eflags = GOODFLAGS(eflags); + + if (g->nstates <= (long)(CHAR_BIT*sizeof(states1)) && !(eflags®_LARGE)) + return(smatcher(g, string, nmatch, pmatch, eflags)); + else + return(lmatcher(g, string, nmatch, pmatch, eflags)); +} diff --git a/llvm/lib/Support/regfree.c b/llvm/lib/Support/regfree.c new file mode 100644 index 0000000..dc2b4af --- /dev/null +++ b/llvm/lib/Support/regfree.c @@ -0,0 +1,72 @@ +/*- + * This code is derived from OpenBSD's libc/regex, original license follows: + * + * Copyright (c) 1992, 1993, 1994 Henry Spencer. + * Copyright (c) 1992, 1993, 1994 + * The Regents of the University of California. All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * Henry Spencer. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)regfree.c 8.3 (Berkeley) 3/20/94 + */ + +#include +#include +#include +#include "regex_impl.h" + +#include "regutils.h" +#include "regex2.h" + +/* + - llvm_regfree - free everything + */ +void +llvm_regfree(llvm_regex_t *preg) +{ + struct re_guts *g; + + if (preg->re_magic != MAGIC1) /* oops */ + return; /* nice to complain, but hard */ + + g = preg->re_g; + if (g == NULL || g->magic != MAGIC2) /* oops again */ + return; + preg->re_magic = 0; /* mark it invalid */ + g->magic = 0; /* mark it invalid */ + + if (g->strip != NULL) + free((char *)g->strip); + if (g->sets != NULL) + free((char *)g->sets); + if (g->setbits != NULL) + free((char *)g->setbits); + if (g->must != NULL) + free(g->must); + free((char *)g); +} diff --git a/llvm/lib/Support/regstrlcpy.c b/llvm/lib/Support/regstrlcpy.c new file mode 100644 index 0000000..8b68afd --- /dev/null +++ b/llvm/lib/Support/regstrlcpy.c @@ -0,0 +1,52 @@ +/* + * This code is derived from OpenBSD's libc, original license follows: + * + * Copyright (c) 1998 Todd C. Miller + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include +#include + +#include "regex_impl.h" +/* + * Copy src to string dst of size siz. At most siz-1 characters + * will be copied. Always NUL terminates (unless siz == 0). + * Returns strlen(src); if retval >= siz, truncation occurred. + */ +size_t +llvm_strlcpy(char *dst, const char *src, size_t siz) +{ + char *d = dst; + const char *s = src; + size_t n = siz; + + /* Copy as many bytes as will fit */ + if (n != 0) { + while (--n != 0) { + if ((*d++ = *s++) == '\0') + break; + } + } + + /* Not enough room in dst, add NUL and traverse rest of src */ + if (n == 0) { + if (siz != 0) + *d = '\0'; /* NUL-terminate dst */ + while (*s++) + ; + } + + return(s - src - 1); /* count does not include NUL */ +} diff --git a/llvm/lib/Support/regutils.h b/llvm/lib/Support/regutils.h new file mode 100644 index 0000000..49a975c --- /dev/null +++ b/llvm/lib/Support/regutils.h @@ -0,0 +1,58 @@ +/*- + * This code is derived from OpenBSD's libc/regex, original license follows: + * + * Copyright (c) 1992, 1993, 1994 Henry Spencer. + * Copyright (c) 1992, 1993, 1994 + * The Regents of the University of California. All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * Henry Spencer. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)utils.h 8.3 (Berkeley) 3/20/94 + */ + +#ifndef LLVM_SUPPORT_REGUTILS_H +#define LLVM_SUPPORT_REGUTILS_H + +/* utility definitions */ +#define NC (CHAR_MAX - CHAR_MIN + 1) +typedef unsigned char uch; + +/* switch off assertions (if not already off) if no REDEBUG */ +#ifndef REDEBUG +#ifndef NDEBUG +#define NDEBUG /* no assertions please */ +#endif +#endif +#include + +/* for old systems with bcopy() but no memmove() */ +#ifdef USEBCOPY +#define memmove(d, s, c) bcopy(s, d, c) +#endif + +#endif diff --git a/llvm/lib/Target/AArch64/AArch64GenAsmMatcher.inc b/llvm/lib/Target/AArch64/AArch64GenAsmMatcher.inc new file mode 100644 index 0000000..6ed8079 --- /dev/null +++ b/llvm/lib/Target/AArch64/AArch64GenAsmMatcher.inc @@ -0,0 +1,15004 @@ +/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ +|* *| +|* Assembly Matcher Source Fragment *| +|* *| +|* Automatically generated file, do not edit! *| +|* *| +\*===----------------------------------------------------------------------===*/ + + +#ifdef GET_ASSEMBLER_HEADER +#undef GET_ASSEMBLER_HEADER + // This should be included into the middle of the declaration of + // your subclasses implementation of MCTargetAsmParser. + uint64_t ComputeAvailableFeatures(const FeatureBitset& FB) const; + void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, + const OperandVector &Operands); + void convertToMapAndConstraints(unsigned Kind, + const OperandVector &Operands) override; + unsigned MatchInstructionImpl(const OperandVector &Operands, + MCInst &Inst, + uint64_t &ErrorInfo, bool matchingInlineAsm, + unsigned VariantID = 0); + + enum OperandMatchResultTy { + MatchOperand_Success, // operand matched successfully + MatchOperand_NoMatch, // operand did not match + MatchOperand_ParseFail // operand matched but had errors + }; + OperandMatchResultTy MatchOperandParserImpl( + OperandVector &Operands, + StringRef Mnemonic); + OperandMatchResultTy tryCustomParseOperand( + OperandVector &Operands, + unsigned MCK); + +#endif // GET_ASSEMBLER_HEADER_INFO + + +#ifdef GET_OPERAND_DIAGNOSTIC_TYPES +#undef GET_OPERAND_DIAGNOSTIC_TYPES + + Match_AddSubRegExtendLarge, + Match_AddSubRegExtendSmall, + Match_AddSubRegShift32, + Match_AddSubRegShift64, + Match_AddSubSecondSource, + Match_InvalidCondCode, + Match_InvalidFPImm, + Match_InvalidImm0_1, + Match_InvalidImm0_127, + Match_InvalidImm0_15, + Match_InvalidImm0_31, + Match_InvalidImm0_63, + Match_InvalidImm0_65535, + Match_InvalidImm0_7, + Match_InvalidImm1_16, + Match_InvalidImm1_32, + Match_InvalidImm1_64, + Match_InvalidImm1_8, + Match_InvalidIndex1, + Match_InvalidIndexB, + Match_InvalidIndexD, + Match_InvalidIndexH, + Match_InvalidIndexS, + Match_InvalidLabel, + Match_InvalidMemoryIndexed1, + Match_InvalidMemoryIndexed16, + Match_InvalidMemoryIndexed16SImm7, + Match_InvalidMemoryIndexed2, + Match_InvalidMemoryIndexed4, + Match_InvalidMemoryIndexed4SImm7, + Match_InvalidMemoryIndexed8, + Match_InvalidMemoryIndexed8SImm7, + Match_InvalidMemoryIndexedSImm9, + Match_InvalidMemoryWExtend128, + Match_InvalidMemoryWExtend16, + Match_InvalidMemoryWExtend32, + Match_InvalidMemoryWExtend64, + Match_InvalidMemoryWExtend8, + Match_InvalidMemoryXExtend128, + Match_InvalidMemoryXExtend16, + Match_InvalidMemoryXExtend32, + Match_InvalidMemoryXExtend64, + Match_InvalidMemoryXExtend8, + Match_InvalidMovImm32Shift, + Match_InvalidMovImm64Shift, + Match_LogicalSecondSource, + Match_MRS, + Match_MSR, + END_OPERAND_DIAGNOSTIC_TYPES +#endif // GET_OPERAND_DIAGNOSTIC_TYPES + + +#ifdef GET_REGISTER_MATCHER +#undef GET_REGISTER_MATCHER + +// Flags for subtarget features that participate in instruction matching. +enum SubtargetFeatureFlag : uint8_t { + Feature_HasV8_1a = (1ULL << 6), + Feature_HasV8_2a = (1ULL << 7), + Feature_HasFPARMv8 = (1ULL << 2), + Feature_HasNEON = (1ULL << 4), + Feature_HasCrypto = (1ULL << 1), + Feature_HasCRC = (1ULL << 0), + Feature_HasFullFP16 = (1ULL << 3), + Feature_HasSPE = (1ULL << 5), + Feature_None = 0 +}; + +static unsigned MatchRegisterName(StringRef Name) { + switch (Name.size()) { + default: break; + case 2: // 71 strings to match. + switch (Name[0]) { + default: break; + case 'b': // 10 strings to match. + switch (Name[1]) { + default: break; + case '0': // 1 string to match. + return 8; // "b0" + case '1': // 1 string to match. + return 9; // "b1" + case '2': // 1 string to match. + return 10; // "b2" + case '3': // 1 string to match. + return 11; // "b3" + case '4': // 1 string to match. + return 12; // "b4" + case '5': // 1 string to match. + return 13; // "b5" + case '6': // 1 string to match. + return 14; // "b6" + case '7': // 1 string to match. + return 15; // "b7" + case '8': // 1 string to match. + return 16; // "b8" + case '9': // 1 string to match. + return 17; // "b9" + } + break; + case 'd': // 10 strings to match. + switch (Name[1]) { + default: break; + case '0': // 1 string to match. + return 40; // "d0" + case '1': // 1 string to match. + return 41; // "d1" + case '2': // 1 string to match. + return 42; // "d2" + case '3': // 1 string to match. + return 43; // "d3" + case '4': // 1 string to match. + return 44; // "d4" + case '5': // 1 string to match. + return 45; // "d5" + case '6': // 1 string to match. + return 46; // "d6" + case '7': // 1 string to match. + return 47; // "d7" + case '8': // 1 string to match. + return 48; // "d8" + case '9': // 1 string to match. + return 49; // "d9" + } + break; + case 'h': // 10 strings to match. + switch (Name[1]) { + default: break; + case '0': // 1 string to match. + return 72; // "h0" + case '1': // 1 string to match. + return 73; // "h1" + case '2': // 1 string to match. + return 74; // "h2" + case '3': // 1 string to match. + return 75; // "h3" + case '4': // 1 string to match. + return 76; // "h4" + case '5': // 1 string to match. + return 77; // "h5" + case '6': // 1 string to match. + return 78; // "h6" + case '7': // 1 string to match. + return 79; // "h7" + case '8': // 1 string to match. + return 80; // "h8" + case '9': // 1 string to match. + return 81; // "h9" + } + break; + case 'q': // 10 strings to match. + switch (Name[1]) { + default: break; + case '0': // 1 string to match. + return 104; // "q0" + case '1': // 1 string to match. + return 105; // "q1" + case '2': // 1 string to match. + return 106; // "q2" + case '3': // 1 string to match. + return 107; // "q3" + case '4': // 1 string to match. + return 108; // "q4" + case '5': // 1 string to match. + return 109; // "q5" + case '6': // 1 string to match. + return 110; // "q6" + case '7': // 1 string to match. + return 111; // "q7" + case '8': // 1 string to match. + return 112; // "q8" + case '9': // 1 string to match. + return 113; // "q9" + } + break; + case 's': // 11 strings to match. + switch (Name[1]) { + default: break; + case '0': // 1 string to match. + return 136; // "s0" + case '1': // 1 string to match. + return 137; // "s1" + case '2': // 1 string to match. + return 138; // "s2" + case '3': // 1 string to match. + return 139; // "s3" + case '4': // 1 string to match. + return 140; // "s4" + case '5': // 1 string to match. + return 141; // "s5" + case '6': // 1 string to match. + return 142; // "s6" + case '7': // 1 string to match. + return 143; // "s7" + case '8': // 1 string to match. + return 144; // "s8" + case '9': // 1 string to match. + return 145; // "s9" + case 'p': // 1 string to match. + return 4; // "sp" + } + break; + case 'w': // 10 strings to match. + switch (Name[1]) { + default: break; + case '0': // 1 string to match. + return 168; // "w0" + case '1': // 1 string to match. + return 169; // "w1" + case '2': // 1 string to match. + return 170; // "w2" + case '3': // 1 string to match. + return 171; // "w3" + case '4': // 1 string to match. + return 172; // "w4" + case '5': // 1 string to match. + return 173; // "w5" + case '6': // 1 string to match. + return 174; // "w6" + case '7': // 1 string to match. + return 175; // "w7" + case '8': // 1 string to match. + return 176; // "w8" + case '9': // 1 string to match. + return 177; // "w9" + } + break; + case 'x': // 10 strings to match. + switch (Name[1]) { + default: break; + case '0': // 1 string to match. + return 199; // "x0" + case '1': // 1 string to match. + return 200; // "x1" + case '2': // 1 string to match. + return 201; // "x2" + case '3': // 1 string to match. + return 202; // "x3" + case '4': // 1 string to match. + return 203; // "x4" + case '5': // 1 string to match. + return 204; // "x5" + case '6': // 1 string to match. + return 205; // "x6" + case '7': // 1 string to match. + return 206; // "x7" + case '8': // 1 string to match. + return 207; // "x8" + case '9': // 1 string to match. + return 208; // "x9" + } + break; + } + break; + case 3: // 155 strings to match. + switch (Name[0]) { + default: break; + case 'b': // 22 strings to match. + switch (Name[1]) { + default: break; + case '1': // 10 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 18; // "b10" + case '1': // 1 string to match. + return 19; // "b11" + case '2': // 1 string to match. + return 20; // "b12" + case '3': // 1 string to match. + return 21; // "b13" + case '4': // 1 string to match. + return 22; // "b14" + case '5': // 1 string to match. + return 23; // "b15" + case '6': // 1 string to match. + return 24; // "b16" + case '7': // 1 string to match. + return 25; // "b17" + case '8': // 1 string to match. + return 26; // "b18" + case '9': // 1 string to match. + return 27; // "b19" + } + break; + case '2': // 10 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 28; // "b20" + case '1': // 1 string to match. + return 29; // "b21" + case '2': // 1 string to match. + return 30; // "b22" + case '3': // 1 string to match. + return 31; // "b23" + case '4': // 1 string to match. + return 32; // "b24" + case '5': // 1 string to match. + return 33; // "b25" + case '6': // 1 string to match. + return 34; // "b26" + case '7': // 1 string to match. + return 35; // "b27" + case '8': // 1 string to match. + return 36; // "b28" + case '9': // 1 string to match. + return 37; // "b29" + } + break; + case '3': // 2 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 38; // "b30" + case '1': // 1 string to match. + return 39; // "b31" + } + break; + } + break; + case 'd': // 22 strings to match. + switch (Name[1]) { + default: break; + case '1': // 10 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 50; // "d10" + case '1': // 1 string to match. + return 51; // "d11" + case '2': // 1 string to match. + return 52; // "d12" + case '3': // 1 string to match. + return 53; // "d13" + case '4': // 1 string to match. + return 54; // "d14" + case '5': // 1 string to match. + return 55; // "d15" + case '6': // 1 string to match. + return 56; // "d16" + case '7': // 1 string to match. + return 57; // "d17" + case '8': // 1 string to match. + return 58; // "d18" + case '9': // 1 string to match. + return 59; // "d19" + } + break; + case '2': // 10 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 60; // "d20" + case '1': // 1 string to match. + return 61; // "d21" + case '2': // 1 string to match. + return 62; // "d22" + case '3': // 1 string to match. + return 63; // "d23" + case '4': // 1 string to match. + return 64; // "d24" + case '5': // 1 string to match. + return 65; // "d25" + case '6': // 1 string to match. + return 66; // "d26" + case '7': // 1 string to match. + return 67; // "d27" + case '8': // 1 string to match. + return 68; // "d28" + case '9': // 1 string to match. + return 69; // "d29" + } + break; + case '3': // 2 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 70; // "d30" + case '1': // 1 string to match. + return 71; // "d31" + } + break; + } + break; + case 'h': // 22 strings to match. + switch (Name[1]) { + default: break; + case '1': // 10 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 82; // "h10" + case '1': // 1 string to match. + return 83; // "h11" + case '2': // 1 string to match. + return 84; // "h12" + case '3': // 1 string to match. + return 85; // "h13" + case '4': // 1 string to match. + return 86; // "h14" + case '5': // 1 string to match. + return 87; // "h15" + case '6': // 1 string to match. + return 88; // "h16" + case '7': // 1 string to match. + return 89; // "h17" + case '8': // 1 string to match. + return 90; // "h18" + case '9': // 1 string to match. + return 91; // "h19" + } + break; + case '2': // 10 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 92; // "h20" + case '1': // 1 string to match. + return 93; // "h21" + case '2': // 1 string to match. + return 94; // "h22" + case '3': // 1 string to match. + return 95; // "h23" + case '4': // 1 string to match. + return 96; // "h24" + case '5': // 1 string to match. + return 97; // "h25" + case '6': // 1 string to match. + return 98; // "h26" + case '7': // 1 string to match. + return 99; // "h27" + case '8': // 1 string to match. + return 100; // "h28" + case '9': // 1 string to match. + return 101; // "h29" + } + break; + case '3': // 2 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 102; // "h30" + case '1': // 1 string to match. + return 103; // "h31" + } + break; + } + break; + case 'q': // 22 strings to match. + switch (Name[1]) { + default: break; + case '1': // 10 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 114; // "q10" + case '1': // 1 string to match. + return 115; // "q11" + case '2': // 1 string to match. + return 116; // "q12" + case '3': // 1 string to match. + return 117; // "q13" + case '4': // 1 string to match. + return 118; // "q14" + case '5': // 1 string to match. + return 119; // "q15" + case '6': // 1 string to match. + return 120; // "q16" + case '7': // 1 string to match. + return 121; // "q17" + case '8': // 1 string to match. + return 122; // "q18" + case '9': // 1 string to match. + return 123; // "q19" + } + break; + case '2': // 10 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 124; // "q20" + case '1': // 1 string to match. + return 125; // "q21" + case '2': // 1 string to match. + return 126; // "q22" + case '3': // 1 string to match. + return 127; // "q23" + case '4': // 1 string to match. + return 128; // "q24" + case '5': // 1 string to match. + return 129; // "q25" + case '6': // 1 string to match. + return 130; // "q26" + case '7': // 1 string to match. + return 131; // "q27" + case '8': // 1 string to match. + return 132; // "q28" + case '9': // 1 string to match. + return 133; // "q29" + } + break; + case '3': // 2 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 134; // "q30" + case '1': // 1 string to match. + return 135; // "q31" + } + break; + } + break; + case 's': // 22 strings to match. + switch (Name[1]) { + default: break; + case '1': // 10 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 146; // "s10" + case '1': // 1 string to match. + return 147; // "s11" + case '2': // 1 string to match. + return 148; // "s12" + case '3': // 1 string to match. + return 149; // "s13" + case '4': // 1 string to match. + return 150; // "s14" + case '5': // 1 string to match. + return 151; // "s15" + case '6': // 1 string to match. + return 152; // "s16" + case '7': // 1 string to match. + return 153; // "s17" + case '8': // 1 string to match. + return 154; // "s18" + case '9': // 1 string to match. + return 155; // "s19" + } + break; + case '2': // 10 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 156; // "s20" + case '1': // 1 string to match. + return 157; // "s21" + case '2': // 1 string to match. + return 158; // "s22" + case '3': // 1 string to match. + return 159; // "s23" + case '4': // 1 string to match. + return 160; // "s24" + case '5': // 1 string to match. + return 161; // "s25" + case '6': // 1 string to match. + return 162; // "s26" + case '7': // 1 string to match. + return 163; // "s27" + case '8': // 1 string to match. + return 164; // "s28" + case '9': // 1 string to match. + return 165; // "s29" + } + break; + case '3': // 2 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 166; // "s30" + case '1': // 1 string to match. + return 167; // "s31" + } + break; + } + break; + case 'w': // 23 strings to match. + switch (Name[1]) { + default: break; + case '1': // 10 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 178; // "w10" + case '1': // 1 string to match. + return 179; // "w11" + case '2': // 1 string to match. + return 180; // "w12" + case '3': // 1 string to match. + return 181; // "w13" + case '4': // 1 string to match. + return 182; // "w14" + case '5': // 1 string to match. + return 183; // "w15" + case '6': // 1 string to match. + return 184; // "w16" + case '7': // 1 string to match. + return 185; // "w17" + case '8': // 1 string to match. + return 186; // "w18" + case '9': // 1 string to match. + return 187; // "w19" + } + break; + case '2': // 10 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 188; // "w20" + case '1': // 1 string to match. + return 189; // "w21" + case '2': // 1 string to match. + return 190; // "w22" + case '3': // 1 string to match. + return 191; // "w23" + case '4': // 1 string to match. + return 192; // "w24" + case '5': // 1 string to match. + return 193; // "w25" + case '6': // 1 string to match. + return 194; // "w26" + case '7': // 1 string to match. + return 195; // "w27" + case '8': // 1 string to match. + return 196; // "w28" + case '9': // 1 string to match. + return 197; // "w29" + } + break; + case '3': // 1 string to match. + if (Name[2] != '0') + break; + return 198; // "w30" + case 's': // 1 string to match. + if (Name[2] != 'p') + break; + return 5; // "wsp" + case 'z': // 1 string to match. + if (Name[2] != 'r') + break; + return 6; // "wzr" + } + break; + case 'x': // 22 strings to match. + switch (Name[1]) { + default: break; + case '1': // 10 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 209; // "x10" + case '1': // 1 string to match. + return 210; // "x11" + case '2': // 1 string to match. + return 211; // "x12" + case '3': // 1 string to match. + return 212; // "x13" + case '4': // 1 string to match. + return 213; // "x14" + case '5': // 1 string to match. + return 214; // "x15" + case '6': // 1 string to match. + return 215; // "x16" + case '7': // 1 string to match. + return 216; // "x17" + case '8': // 1 string to match. + return 217; // "x18" + case '9': // 1 string to match. + return 218; // "x19" + } + break; + case '2': // 10 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 219; // "x20" + case '1': // 1 string to match. + return 220; // "x21" + case '2': // 1 string to match. + return 221; // "x22" + case '3': // 1 string to match. + return 222; // "x23" + case '4': // 1 string to match. + return 223; // "x24" + case '5': // 1 string to match. + return 224; // "x25" + case '6': // 1 string to match. + return 225; // "x26" + case '7': // 1 string to match. + return 226; // "x27" + case '8': // 1 string to match. + return 227; // "x28" + case '9': // 1 string to match. + return 1; // "x29" + } + break; + case '3': // 1 string to match. + if (Name[2] != '0') + break; + return 2; // "x30" + case 'z': // 1 string to match. + if (Name[2] != 'r') + break; + return 7; // "xzr" + } + break; + } + break; + case 4: // 1 string to match. + if (memcmp(Name.data()+0, "nzcv", 4)) + break; + return 3; // "nzcv" + } + return 0; +} + +#endif // GET_REGISTER_MATCHER + + +#ifdef GET_SUBTARGET_FEATURE_NAME +#undef GET_SUBTARGET_FEATURE_NAME + +// User-level names for subtarget features that participate in +// instruction matching. +static const char *getSubtargetFeatureName(uint64_t Val) { + switch(Val) { + case Feature_HasV8_1a: return "armv8.1a"; + case Feature_HasV8_2a: return "armv8.2a"; + case Feature_HasFPARMv8: return "fp-armv8"; + case Feature_HasNEON: return "neon"; + case Feature_HasCrypto: return "crypto"; + case Feature_HasCRC: return "crc"; + case Feature_HasFullFP16: return "fullfp16"; + case Feature_HasSPE: return "spe"; + default: return "(unknown)"; + } +} + +#endif // GET_SUBTARGET_FEATURE_NAME + + +#ifdef GET_MATCHER_IMPLEMENTATION +#undef GET_MATCHER_IMPLEMENTATION + +namespace { +enum OperatorConversionKind { + CVT_Done, + CVT_Reg, + CVT_Tied, + CVT_95_Reg, + CVT_95_addVectorReg128Operands, + CVT_95_addVectorReg64Operands, + CVT_imm_95_16, + CVT_imm_95_24, + CVT_imm_95_0, + CVT_95_addAddSubImmNegOperands, + CVT_95_addAddSubImmOperands, + CVT_95_addShifterOperands, + CVT_95_addExtendOperands, + CVT_95_addExtend64Operands, + CVT_95_addAdrLabelOperands, + CVT_95_addAdrpLabelOperands, + CVT_95_addLogicalImm32Operands, + CVT_95_addLogicalImm64Operands, + CVT_95_addImm0_95_31Operands, + CVT_imm_95_31, + CVT_95_addImm0_95_63Operands, + CVT_imm_95_63, + CVT_95_addBranchTarget26Operands, + CVT_95_addCondCodeOperands, + CVT_95_addPCRelLabel19Operands, + CVT_95_addImm0_95_255Operands, + CVT_95_addLogicalImm32NotOperands, + CVT_95_addLogicalImm64NotOperands, + CVT_95_addImm0_95_65535Operands, + CVT_95_addRegOperands, + CVT_95_addImm0_95_15Operands, + CVT_imm_95_15, + CVT_regWZR, + CVT_regXZR, + CVT_95_addBarrierOperands, + CVT_95_addVectorIndexHOperands, + CVT_95_addVectorIndexSOperands, + CVT_95_addVectorIndexDOperands, + CVT_95_addVectorIndexBOperands, + CVT_95_addImmOperands, + CVT_95_addImm1_95_16Operands, + CVT_95_addImm1_95_32Operands, + CVT_95_addImm1_95_64Operands, + CVT_95_addVectorRegLoOperands, + CVT_95_addFPImmOperands, + CVT_95_addVectorIndex1Operands, + CVT_95_addImm0_95_127Operands, + CVT_95_addVectorList128Operands_LT_4_GT_, + CVT_95_addVectorList64Operands_LT_4_GT_, + CVT_95_addVectorList128Operands_LT_1_GT_, + CVT_95_addVectorList64Operands_LT_1_GT_, + CVT_95_addVectorList128Operands_LT_3_GT_, + CVT_95_addVectorList64Operands_LT_3_GT_, + CVT_95_addVectorList128Operands_LT_2_GT_, + CVT_95_addVectorList64Operands_LT_2_GT_, + CVT_95_addSImm7s16Operands, + CVT_95_addSImm7s4Operands, + CVT_95_addSImm7s8Operands, + CVT_95_addSImm9Operands, + CVT_95_addUImm12OffsetOperands_LT_16_GT_, + CVT_95_addUImm12OffsetOperands_LT_2_GT_, + CVT_95_addUImm12OffsetOperands_LT_4_GT_, + CVT_95_addUImm12OffsetOperands_LT_8_GT_, + CVT_95_addUImm12OffsetOperands_LT_1_GT_, + CVT_95_addMemExtendOperands, + CVT_95_addMemExtend8Operands, + CVT_95_addMOVZMovAliasOperands_LT_0_GT_, + CVT_95_addMOVZMovAliasOperands_LT_16_GT_, + CVT_95_addMOVNMovAliasOperands_LT_0_GT_, + CVT_95_addMOVNMovAliasOperands_LT_16_GT_, + CVT_95_addMOVZMovAliasOperands_LT_32_GT_, + CVT_imm_95_32, + CVT_95_addMOVZMovAliasOperands_LT_48_GT_, + CVT_imm_95_48, + CVT_95_addMOVNMovAliasOperands_LT_32_GT_, + CVT_95_addMOVNMovAliasOperands_LT_48_GT_, + CVT_95_addSIMDImmType10Operands, + CVT_95_addMRSSystemRegisterOperands, + CVT_95_addMSRSystemRegisterOperands, + CVT_95_addSystemPStateFieldWithImm0_95_15Operands, + CVT_95_addSystemPStateFieldWithImm0_95_1Operands, + CVT_95_addImm0_95_1Operands, + CVT_95_addPrefetchOperands, + CVT_95_addPSBHintOperands, + CVT_regLR, + CVT_95_addImm1_95_8Operands, + CVT_imm_95_4, + CVT_imm_95_5, + CVT_95_addImm0_95_7Operands, + CVT_imm_95_7, + CVT_95_addSysCROperands, + CVT_95_addBranchTarget14Operands, + CVT_95_addImm32_95_63Operands, + CVT_95_addGPR32as64Operands, + CVT_imm_95_2, + CVT_imm_95_3, + CVT_imm_95_1, + CVT_NUM_CONVERTERS +}; + +enum InstructionConversionKind { + Convert__Reg1_0__Reg1_1, + Convert__VectorReg1281_1__VectorReg1281_2, + Convert__VectorReg641_1__VectorReg641_2, + Convert__VectorReg1281_0__VectorReg1281_2, + Convert__VectorReg641_0__VectorReg641_2, + Convert__Reg1_0__Reg1_1__Reg1_2, + Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, + Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, + Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, + Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2, + Convert__Reg1_0__Reg1_1__AddSubImm2_2, + Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, + Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, + Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter321_3, + Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, + Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter641_3, + Convert__Reg1_0__Reg1_1__Reg1_2__Extend641_3, + Convert__Reg1_0__Reg1_1__Reg1_2__ExtendLSL641_3, + Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, + Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, + Convert__VectorReg641_1__VectorReg1281_2__VectorReg1281_3, + Convert__VectorReg641_0__VectorReg1281_2__VectorReg1281_4, + Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, + Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, + Convert__Reg1_1__VectorReg1281_2, + Convert__Reg1_0__VectorReg1281_1, + Convert__Reg1_1__VectorReg641_2, + Convert__Reg1_0__VectorReg641_1, + Convert__Reg1_0__AdrLabel1_1, + Convert__Reg1_0__AdrpLabel1_1, + Convert__VectorReg1281_1__Tie0__VectorReg1281_2, + Convert__VectorReg1281_0__Tie0__VectorReg1281_2, + Convert__Reg1_0__Reg1_1__LogicalImm321_2, + Convert__Reg1_0__Reg1_1__LogicalImm641_2, + Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, + Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter641_3, + Convert__Reg1_0__Reg1_1__Imm0_311_2__imm_95_31, + Convert__Reg1_0__Reg1_1__Imm0_631_2__imm_95_63, + Convert__BranchTarget261_0, + Convert__CondCode1_1__PCRelLabel191_2, + Convert__Reg1_0__Tie0__Reg1_1__Imm0_311_2__Imm0_311_3, + Convert__Reg1_0__Tie0__Reg1_1__Imm0_631_2__Imm0_631_3, + Convert__VectorReg641_1__Tie0__Imm0_2551_2__imm_95_0, + Convert__VectorReg1281_1__Tie0__Imm0_2551_2__imm_95_0, + Convert__Reg1_0__Reg1_1__LogicalImm32Not1_2, + Convert__Reg1_0__Reg1_1__LogicalImm64Not1_2, + Convert__VectorReg1281_0__Tie0__Imm0_2551_2__imm_95_0, + Convert__VectorReg641_0__Tie0__Imm0_2551_2__imm_95_0, + Convert__VectorReg641_1__Tie0__Imm0_2551_2__LogicalVecShifter1_3, + Convert__VectorReg641_1__Tie0__Imm0_2551_2__LogicalVecHalfWordShifter1_3, + Convert__VectorReg1281_1__Tie0__Imm0_2551_2__LogicalVecShifter1_3, + Convert__VectorReg1281_1__Tie0__Imm0_2551_2__LogicalVecHalfWordShifter1_3, + Convert__VectorReg1281_0__Tie0__Imm0_2551_2__LogicalVecShifter1_3, + Convert__VectorReg1281_0__Tie0__Imm0_2551_2__LogicalVecHalfWordShifter1_3, + Convert__VectorReg641_0__Tie0__Imm0_2551_2__LogicalVecShifter1_3, + Convert__VectorReg641_0__Tie0__Imm0_2551_2__LogicalVecHalfWordShifter1_3, + Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3, + Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4, + Convert__Reg1_0, + Convert__Imm0_655351_0, + Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, + Convert__WSeqPair1_0__Tie0__WSeqPair1_1__Reg1_3, + Convert__XSeqPair1_0__Tie0__XSeqPair1_1__Reg1_3, + Convert__Reg1_0__PCRelLabel191_1, + Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, + Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, + Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, + Convert__imm_95_15, + Convert__Imm0_151_0, + Convert__Reg1_0__Reg1_2__Reg1_1, + Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, + Convert__VectorReg641_1__VectorReg641_3__VectorReg641_2, + Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, + Convert__VectorReg641_0__VectorReg641_4__VectorReg641_2, + Convert__regWZR__Reg1_0__Reg1_1__imm_95_16, + Convert__regXZR__Reg1_0__Reg1_1__imm_95_24, + Convert__regWZR__Reg1_0__Reg1_1__imm_95_0, + Convert__regWZR__Reg1_0__AddSubImmNeg2_1, + Convert__regWZR__Reg1_0__AddSubImm2_1, + Convert__regXZR__Reg1_0__Reg1_1__imm_95_0, + Convert__regXZR__Reg1_0__AddSubImmNeg2_1, + Convert__regXZR__Reg1_0__AddSubImm2_1, + Convert__regWZR__Reg1_0__Reg1_1__ArithmeticShifter321_2, + Convert__regWZR__Reg1_0__Reg1_1__Extend1_2, + Convert__regXZR__Reg1_0__Reg1_1__ArithmeticShifter641_2, + Convert__regXZR__Reg1_0__Reg1_1__Extend1_2, + Convert__regXZR__Reg1_0__Reg1_1__ExtendLSL641_2, + Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, + Convert__Reg1_0__regWZR__regWZR__CondCode1_1, + Convert__Reg1_0__regXZR__regXZR__CondCode1_1, + Convert__imm_95_0, + Convert__Barrier1_0, + Convert_NoOperands, + Convert__VectorReg1281_1__Reg1_2, + Convert__VectorReg641_1__Reg1_2, + Convert__Reg1_0__VectorReg1281_1__VectorIndexH1_2, + Convert__Reg1_0__VectorReg1281_1__VectorIndexS1_2, + Convert__Reg1_0__VectorReg1281_1__VectorIndexD1_2, + Convert__Reg1_0__VectorReg1281_1__VectorIndexB1_2, + Convert__VectorReg1281_0__Reg1_2, + Convert__VectorReg641_0__Reg1_2, + Convert__VectorReg1281_1__VectorReg1281_2__VectorIndexB1_3, + Convert__VectorReg1281_1__VectorReg1281_2__VectorIndexD1_3, + Convert__VectorReg641_1__VectorReg1281_2__VectorIndexS1_3, + Convert__VectorReg641_1__VectorReg1281_2__VectorIndexH1_3, + Convert__VectorReg1281_1__VectorReg1281_2__VectorIndexS1_3, + Convert__VectorReg641_1__VectorReg1281_2__VectorIndexB1_3, + Convert__VectorReg1281_1__VectorReg1281_2__VectorIndexH1_3, + Convert__Reg1_0__VectorReg1281_1__VectorIndexH1_3, + Convert__Reg1_0__VectorReg1281_1__VectorIndexS1_3, + Convert__Reg1_0__VectorReg1281_1__VectorIndexD1_3, + Convert__Reg1_0__VectorReg1281_1__VectorIndexB1_3, + Convert__VectorReg1281_0__VectorReg1281_2__VectorIndexB1_4, + Convert__VectorReg1281_0__VectorReg1281_2__VectorIndexD1_4, + Convert__VectorReg1281_0__VectorReg1281_2__VectorIndexS1_4, + Convert__VectorReg1281_0__VectorReg1281_2__VectorIndexH1_4, + Convert__VectorReg641_0__VectorReg1281_2__VectorIndexS1_4, + Convert__VectorReg641_0__VectorReg1281_2__VectorIndexH1_4, + Convert__VectorReg641_0__VectorReg1281_2__VectorIndexB1_4, + Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3__Imm1_4, + Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3__Imm1_4, + Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4__Imm1_6, + Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4__Imm1_6, + Convert__Reg1_0__Reg1_1__Reg1_2__Imm0_311_3, + Convert__Reg1_0__Reg1_1__Reg1_2__Imm0_631_3, + Convert__VectorReg1281_0__VectorReg641_2, + Convert__VectorReg641_0__VectorReg1281_2, + Convert__Reg1_0__Reg1_1__Imm1_161_2, + Convert__Reg1_0__Reg1_1__Imm1_321_2, + Convert__Reg1_0__Reg1_1__Imm1_641_2, + Convert__VectorReg1281_1__VectorReg1281_2__Imm1_641_3, + Convert__VectorReg641_1__VectorReg641_2__Imm1_321_3, + Convert__VectorReg641_1__VectorReg641_2__Imm1_161_3, + Convert__VectorReg1281_1__VectorReg1281_2__Imm1_321_3, + Convert__VectorReg1281_1__VectorReg1281_2__Imm1_161_3, + Convert__VectorReg1281_0__VectorReg1281_2__Imm1_641_4, + Convert__VectorReg1281_0__VectorReg1281_2__Imm1_321_4, + Convert__VectorReg1281_0__VectorReg1281_2__Imm1_161_4, + Convert__VectorReg641_0__VectorReg641_2__Imm1_321_4, + Convert__VectorReg641_0__VectorReg641_2__Imm1_161_4, + Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, + Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3__VectorIndexD1_4, + Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, + Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, + Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4, + Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4, + Convert__Reg1_1__Tie0__Reg1_2__VectorReg1281_3__VectorIndexD1_4, + Convert__Reg1_1__Tie0__Reg1_2__VectorRegLo1_3__VectorIndexH1_4, + Convert__Reg1_1__Tie0__Reg1_2__VectorReg1281_3__VectorIndexS1_4, + Convert__Reg1_0__Tie0__Reg1_1__VectorRegLo1_2__VectorIndexH1_4, + Convert__Reg1_0__Tie0__Reg1_1__VectorReg1281_2__VectorIndexS1_4, + Convert__Reg1_0__Tie0__Reg1_1__VectorReg1281_2__VectorIndexD1_4, + Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4__VectorIndexD1_6, + Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6, + Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6, + Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, + Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, + Convert__Reg1_0__FPImm1_1, + Convert__VectorReg1281_1__FPImm1_2, + Convert__VectorReg641_1__FPImm1_2, + Convert__VectorReg1281_0__FPImm1_2, + Convert__VectorReg641_0__FPImm1_2, + Convert__Reg1_1__VectorReg1281_2__VectorIndex11_3, + Convert__VectorReg1281_1__Reg1_3__VectorIndex11_2, + Convert__Reg1_0__VectorReg1281_1__VectorIndex11_3, + Convert__VectorReg1281_0__Reg1_3__VectorIndex11_2, + Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3__VectorIndexD1_4, + Convert__VectorReg641_1__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, + Convert__VectorReg641_1__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, + Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4, + Convert__VectorReg1281_1__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4, + Convert__Reg1_1__Reg1_2__VectorReg1281_3__VectorIndexD1_4, + Convert__Reg1_1__Reg1_2__VectorRegLo1_3__VectorIndexH1_4, + Convert__Reg1_1__Reg1_2__VectorReg1281_3__VectorIndexS1_4, + Convert__Reg1_0__Reg1_1__VectorRegLo1_2__VectorIndexH1_4, + Convert__Reg1_0__Reg1_1__VectorReg1281_2__VectorIndexS1_4, + Convert__Reg1_0__Reg1_1__VectorReg1281_2__VectorIndexD1_4, + Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4__VectorIndexD1_6, + Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6, + Convert__VectorReg1281_0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6, + Convert__VectorReg641_0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, + Convert__VectorReg641_0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, + Convert__Imm0_1271_0, + Convert__VectorReg1281_1__Tie0__VectorIndexB1_2__Reg1_3, + Convert__VectorReg1281_1__Tie0__VectorIndexD1_2__Reg1_3, + Convert__VectorReg1281_1__Tie0__VectorIndexH1_2__Reg1_3, + Convert__VectorReg1281_1__Tie0__VectorIndexS1_2__Reg1_3, + Convert__VectorReg1281_0__Tie0__VectorIndexB1_2__Reg1_3, + Convert__VectorReg1281_0__Tie0__VectorIndexD1_2__Reg1_3, + Convert__VectorReg1281_0__Tie0__VectorIndexH1_2__Reg1_3, + Convert__VectorReg1281_0__Tie0__VectorIndexS1_2__Reg1_3, + Convert__VectorReg1281_1__Tie0__VectorIndexB1_2__VectorReg1281_3__VectorIndexB1_4, + Convert__VectorReg1281_1__Tie0__VectorIndexD1_2__VectorReg1281_3__VectorIndexD1_4, + Convert__VectorReg1281_1__Tie0__VectorIndexH1_2__VectorReg1281_3__VectorIndexH1_4, + Convert__VectorReg1281_1__Tie0__VectorIndexS1_2__VectorReg1281_3__VectorIndexS1_4, + Convert__VectorReg1281_0__Tie0__VectorIndexB1_2__VectorReg1281_3__VectorIndexB1_5, + Convert__VectorReg1281_0__Tie0__VectorIndexD1_2__VectorReg1281_3__VectorIndexD1_5, + Convert__VectorReg1281_0__Tie0__VectorIndexH1_2__VectorReg1281_3__VectorIndexH1_5, + Convert__VectorReg1281_0__Tie0__VectorIndexS1_2__VectorReg1281_3__VectorIndexS1_5, + Convert__TypedVectorList4_16b1_0__Reg1_2, + Convert__TypedVectorList4_1d1_0__Reg1_2, + Convert__TypedVectorList4_2d1_0__Reg1_2, + Convert__TypedVectorList4_2s1_0__Reg1_2, + Convert__TypedVectorList4_4h1_0__Reg1_2, + Convert__TypedVectorList4_4s1_0__Reg1_2, + Convert__TypedVectorList4_8b1_0__Reg1_2, + Convert__TypedVectorList4_8h1_0__Reg1_2, + Convert__TypedVectorList1_16b1_0__Reg1_2, + Convert__TypedVectorList1_1d1_0__Reg1_2, + Convert__TypedVectorList1_2d1_0__Reg1_2, + Convert__TypedVectorList1_2s1_0__Reg1_2, + Convert__TypedVectorList1_4h1_0__Reg1_2, + Convert__TypedVectorList1_4s1_0__Reg1_2, + Convert__TypedVectorList1_8b1_0__Reg1_2, + Convert__TypedVectorList1_8h1_0__Reg1_2, + Convert__TypedVectorList3_16b1_0__Reg1_2, + Convert__TypedVectorList3_1d1_0__Reg1_2, + Convert__TypedVectorList3_2d1_0__Reg1_2, + Convert__TypedVectorList3_2s1_0__Reg1_2, + Convert__TypedVectorList3_4h1_0__Reg1_2, + Convert__TypedVectorList3_4s1_0__Reg1_2, + Convert__TypedVectorList3_8b1_0__Reg1_2, + Convert__TypedVectorList3_8h1_0__Reg1_2, + Convert__TypedVectorList2_16b1_0__Reg1_2, + Convert__TypedVectorList2_1d1_0__Reg1_2, + Convert__TypedVectorList2_2d1_0__Reg1_2, + Convert__TypedVectorList2_2s1_0__Reg1_2, + Convert__TypedVectorList2_4h1_0__Reg1_2, + Convert__TypedVectorList2_4s1_0__Reg1_2, + Convert__TypedVectorList2_8b1_0__Reg1_2, + Convert__TypedVectorList2_8h1_0__Reg1_2, + Convert__VecListFour1281_1__Reg1_3, + Convert__VecListOne1281_1__Reg1_3, + Convert__VecListThree1281_1__Reg1_3, + Convert__VecListTwo1281_1__Reg1_3, + Convert__VecListFour641_1__Reg1_3, + Convert__VecListOne641_1__Reg1_3, + Convert__VecListThree641_1__Reg1_3, + Convert__VecListTwo641_1__Reg1_3, + Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList4_1d1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList4_1d1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList1_16b1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList1_16b1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList1_1d1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList1_1d1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList1_2d1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList1_2d1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList1_2s1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList1_2s1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList1_4h1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList1_4h1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList1_4s1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList1_4s1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList1_8b1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList1_8b1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList1_8h1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList1_8h1_0__Tie0__Reg1_4, + Convert__TypedVectorList1_0b1_0__Tie0__VectorIndexB1_1__Reg1_3, + Convert__TypedVectorList1_0d1_0__Tie0__VectorIndexD1_1__Reg1_3, + Convert__TypedVectorList1_0h1_0__Tie0__VectorIndexH1_1__Reg1_3, + Convert__TypedVectorList1_0s1_0__Tie0__VectorIndexS1_1__Reg1_3, + Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList3_1d1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList3_1d1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList2_1d1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList2_1d1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__Reg1_4, + Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__regXZR, + Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__Reg1_4, + Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, + Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, + Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, + Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, + Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, + Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, + Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, + Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, + Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, + Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, + Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, + Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, + Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, + Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, + Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, + Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, + Convert__VecListOne1281_1__Tie0__VectorIndexB1_2__Reg1_4, + Convert__VecListOne1281_1__Tie0__VectorIndexD1_2__Reg1_4, + Convert__VecListOne1281_1__Tie0__VectorIndexH1_2__Reg1_4, + Convert__VecListOne1281_1__Tie0__VectorIndexS1_2__Reg1_4, + Convert__Reg1_3__TypedVectorList1_0b1_0__Tie1__VectorIndexB1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList1_0b1_0__Tie1__VectorIndexB1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList1_0d1_0__Tie1__VectorIndexD1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList1_0d1_0__Tie1__VectorIndexD1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList1_0h1_0__Tie1__VectorIndexH1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList1_0h1_0__Tie1__VectorIndexH1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList1_0s1_0__Tie1__VectorIndexS1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList1_0s1_0__Tie1__VectorIndexS1_1__Tie0__Reg1_5, + Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexB1_2__Tie0__regXZR, + Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexB1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexD1_2__Tie0__regXZR, + Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexD1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexH1_2__Tie0__regXZR, + Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexH1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexS1_2__Tie0__regXZR, + Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexS1_2__Tie0__Reg1_6, + Convert__TypedVectorList2_0b1_0__Tie0__VectorIndexB1_1__Reg1_3, + Convert__TypedVectorList2_0d1_0__Tie0__VectorIndexD1_1__Reg1_3, + Convert__TypedVectorList2_0h1_0__Tie0__VectorIndexH1_1__Reg1_3, + Convert__TypedVectorList2_0s1_0__Tie0__VectorIndexS1_1__Reg1_3, + Convert__VecListTwo1281_1__Tie0__VectorIndexB1_2__Reg1_4, + Convert__VecListTwo1281_1__Tie0__VectorIndexD1_2__Reg1_4, + Convert__VecListTwo1281_1__Tie0__VectorIndexH1_2__Reg1_4, + Convert__VecListTwo1281_1__Tie0__VectorIndexS1_2__Reg1_4, + Convert__Reg1_3__TypedVectorList2_0b1_0__Tie1__VectorIndexB1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList2_0b1_0__Tie1__VectorIndexB1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList2_0d1_0__Tie1__VectorIndexD1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList2_0d1_0__Tie1__VectorIndexD1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList2_0h1_0__Tie1__VectorIndexH1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList2_0h1_0__Tie1__VectorIndexH1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList2_0s1_0__Tie1__VectorIndexS1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList2_0s1_0__Tie1__VectorIndexS1_1__Tie0__Reg1_5, + Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexB1_2__Tie0__regXZR, + Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexB1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexD1_2__Tie0__regXZR, + Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexD1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexH1_2__Tie0__regXZR, + Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexH1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexS1_2__Tie0__regXZR, + Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexS1_2__Tie0__Reg1_6, + Convert__TypedVectorList3_0b1_0__Tie0__VectorIndexB1_1__Reg1_3, + Convert__TypedVectorList3_0d1_0__Tie0__VectorIndexD1_1__Reg1_3, + Convert__TypedVectorList3_0h1_0__Tie0__VectorIndexH1_1__Reg1_3, + Convert__TypedVectorList3_0s1_0__Tie0__VectorIndexS1_1__Reg1_3, + Convert__VecListThree1281_1__Tie0__VectorIndexB1_2__Reg1_4, + Convert__VecListThree1281_1__Tie0__VectorIndexD1_2__Reg1_4, + Convert__VecListThree1281_1__Tie0__VectorIndexH1_2__Reg1_4, + Convert__VecListThree1281_1__Tie0__VectorIndexS1_2__Reg1_4, + Convert__Reg1_3__TypedVectorList3_0b1_0__Tie1__VectorIndexB1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList3_0b1_0__Tie1__VectorIndexB1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList3_0d1_0__Tie1__VectorIndexD1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList3_0d1_0__Tie1__VectorIndexD1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList3_0h1_0__Tie1__VectorIndexH1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList3_0h1_0__Tie1__VectorIndexH1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList3_0s1_0__Tie1__VectorIndexS1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList3_0s1_0__Tie1__VectorIndexS1_1__Tie0__Reg1_5, + Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexB1_2__Tie0__regXZR, + Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexB1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexD1_2__Tie0__regXZR, + Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexD1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexH1_2__Tie0__regXZR, + Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexH1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexS1_2__Tie0__regXZR, + Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexS1_2__Tie0__Reg1_6, + Convert__TypedVectorList4_0b1_0__Tie0__VectorIndexB1_1__Reg1_3, + Convert__TypedVectorList4_0d1_0__Tie0__VectorIndexD1_1__Reg1_3, + Convert__TypedVectorList4_0h1_0__Tie0__VectorIndexH1_1__Reg1_3, + Convert__TypedVectorList4_0s1_0__Tie0__VectorIndexS1_1__Reg1_3, + Convert__VecListFour1281_1__Tie0__VectorIndexB1_2__Reg1_4, + Convert__VecListFour1281_1__Tie0__VectorIndexD1_2__Reg1_4, + Convert__VecListFour1281_1__Tie0__VectorIndexH1_2__Reg1_4, + Convert__VecListFour1281_1__Tie0__VectorIndexS1_2__Reg1_4, + Convert__Reg1_3__TypedVectorList4_0b1_0__Tie1__VectorIndexB1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList4_0b1_0__Tie1__VectorIndexB1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList4_0d1_0__Tie1__VectorIndexD1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList4_0d1_0__Tie1__VectorIndexD1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList4_0h1_0__Tie1__VectorIndexH1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList4_0h1_0__Tie1__VectorIndexH1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList4_0s1_0__Tie1__VectorIndexS1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList4_0s1_0__Tie1__VectorIndexS1_1__Tie0__Reg1_5, + Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexB1_2__Tie0__regXZR, + Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexB1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexD1_2__Tie0__regXZR, + Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexD1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexH1_2__Tie0__regXZR, + Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexH1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexS1_2__Tie0__regXZR, + Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexS1_2__Tie0__Reg1_6, + Convert__Reg1_1__Reg1_0__Reg1_3, + Convert__Reg1_0__GPR64sp01_2, + Convert__Reg1_0__Reg1_1__GPR64sp01_3, + Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, + Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s161_4, + Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s41_4, + Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, + Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s161_5, + Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_5, + Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s81_5, + Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s161_4, + Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_4, + Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s81_4, + Convert__Reg1_0__Reg1_2__imm_95_0, + Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, + Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, + Convert__Reg1_0__Reg1_2__SImm9OffsetFB1281_3, + Convert__Reg1_0__Reg1_2__UImm12Offset161_3, + Convert__Reg1_0__Reg1_2__SImm9OffsetFB161_3, + Convert__Reg1_0__Reg1_2__UImm12Offset21_3, + Convert__Reg1_0__Reg1_2__SImm9OffsetFB321_3, + Convert__Reg1_0__Reg1_2__UImm12Offset41_3, + Convert__Reg1_0__Reg1_2__SImm9OffsetFB641_3, + Convert__Reg1_0__Reg1_2__UImm12Offset81_3, + Convert__Reg1_0__Reg1_2__SImm9OffsetFB81_3, + Convert__Reg1_0__Reg1_2__UImm12Offset11_3, + Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend1282_4, + Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend1282_4, + Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, + Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend162_4, + Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend162_4, + Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend322_4, + Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend322_4, + Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend642_4, + Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend642_4, + Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend82_4, + Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend82_4, + Convert__Reg1_0__Reg1_2__SImm91_3, + Convert__Reg1_0__Reg1_1__Reg1_2__regWZR, + Convert__Reg1_0__Reg1_1__Reg1_2__regXZR, + Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_0, + Convert__Reg1_0__regWZR__Reg1_1__imm_95_0, + Convert__Reg1_0__MOVZ32_lsl0MovAlias1_1__imm_95_0, + Convert__Reg1_0__MOVZ32_lsl16MovAlias1_1__imm_95_16, + Convert__Reg1_0__MOVN32_lsl0MovAlias1_1__imm_95_0, + Convert__Reg1_0__MOVN32_lsl16MovAlias1_1__imm_95_16, + Convert__Reg1_0__regWZR__LogicalImm321_1, + Convert__Reg1_0__regXZR__Reg1_1__imm_95_0, + Convert__Reg1_0__MOVZ64_lsl0MovAlias1_1__imm_95_0, + Convert__Reg1_0__MOVZ64_lsl16MovAlias1_1__imm_95_16, + Convert__Reg1_0__MOVZ64_lsl32MovAlias1_1__imm_95_32, + Convert__Reg1_0__MOVZ64_lsl48MovAlias1_1__imm_95_48, + Convert__Reg1_0__MOVN64_lsl0MovAlias1_1__imm_95_0, + Convert__Reg1_0__MOVN64_lsl16MovAlias1_1__imm_95_16, + Convert__Reg1_0__MOVN64_lsl32MovAlias1_1__imm_95_32, + Convert__Reg1_0__MOVN64_lsl48MovAlias1_1__imm_95_48, + Convert__Reg1_0__regXZR__LogicalImm641_1, + Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_2, + Convert__VectorReg641_1__VectorReg641_2__VectorReg641_2, + Convert__Reg1_1__VectorReg1281_2__VectorIndexD1_3, + Convert__Reg1_1__VectorReg1281_2__VectorIndexS1_3, + Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_2, + Convert__VectorReg641_0__VectorReg641_2__VectorReg641_2, + Convert__Reg1_0__SIMDImmType101_1, + Convert__VectorReg1281_1__Imm0_2551_2, + Convert__VectorReg1281_1__SIMDImmType101_2, + Convert__VectorReg641_1__Imm0_2551_2__imm_95_0, + Convert__VectorReg1281_1__Imm0_2551_2__imm_95_0, + Convert__VectorReg641_1__Imm0_2551_2, + Convert__VectorReg1281_0__Imm0_2551_2, + Convert__VectorReg1281_0__SIMDImmType101_2, + Convert__VectorReg1281_0__Imm0_2551_2__imm_95_0, + Convert__VectorReg641_0__Imm0_2551_2__imm_95_0, + Convert__VectorReg641_0__Imm0_2551_2, + Convert__VectorReg641_1__Imm0_2551_2__LogicalVecShifter1_3, + Convert__VectorReg641_1__Imm0_2551_2__MoveVecShifter1_3, + Convert__VectorReg641_1__Imm0_2551_2__LogicalVecHalfWordShifter1_3, + Convert__VectorReg1281_1__Imm0_2551_2__LogicalVecShifter1_3, + Convert__VectorReg1281_1__Imm0_2551_2__MoveVecShifter1_3, + Convert__VectorReg1281_1__Imm0_2551_2__LogicalVecHalfWordShifter1_3, + Convert__VectorReg1281_0__Imm0_2551_2__LogicalVecShifter1_3, + Convert__VectorReg1281_0__Imm0_2551_2__MoveVecShifter1_3, + Convert__VectorReg1281_0__Imm0_2551_2__LogicalVecHalfWordShifter1_3, + Convert__VectorReg641_0__Imm0_2551_2__LogicalVecShifter1_3, + Convert__VectorReg641_0__Imm0_2551_2__MoveVecShifter1_3, + Convert__VectorReg641_0__Imm0_2551_2__LogicalVecHalfWordShifter1_3, + Convert__Reg1_0__Tie0__Imm0_655351_1__imm_95_0, + Convert__Reg1_0__Tie0__MovKSymbolG01_1__imm_95_0, + Convert__Reg1_0__Tie0__MovKSymbolG11_1__imm_95_16, + Convert__Reg1_0__Tie0__MovKSymbolG21_1__imm_95_32, + Convert__Reg1_0__Tie0__MovKSymbolG31_1__imm_95_48, + Convert__Reg1_0__Tie0__Imm0_655351_1__MovImm32Shifter1_2, + Convert__Reg1_0__Tie0__Imm0_655351_1__MovImm64Shifter1_2, + Convert__Reg1_0__Imm0_655351_1__imm_95_0, + Convert__Reg1_0__MovZSymbolG01_1__imm_95_0, + Convert__Reg1_0__MovZSymbolG11_1__imm_95_16, + Convert__Reg1_0__MovZSymbolG21_1__imm_95_32, + Convert__Reg1_0__MovZSymbolG31_1__imm_95_48, + Convert__Reg1_0__Imm0_655351_1__MovImm32Shifter1_2, + Convert__Reg1_0__Imm0_655351_1__MovImm64Shifter1_2, + Convert__Reg1_0__MRSSystemRegister1_1, + Convert__MSRSystemRegister1_0__Reg1_1, + Convert__SystemPStateFieldWithImm0_151_0__Imm0_151_1, + Convert__SystemPStateFieldWithImm0_11_0__Imm0_11_1, + Convert__Reg1_0__regWZR__Reg1_1__LogicalShifter321_2, + Convert__Reg1_0__regXZR__Reg1_1__LogicalShifter641_2, + Convert__Reg1_0__regWZR__Reg1_1__ArithmeticShifter321_2, + Convert__Reg1_0__regXZR__Reg1_1__ArithmeticShifter641_2, + Convert__Reg1_0__regWZR__Reg1_1, + Convert__Reg1_0__regXZR__Reg1_1, + Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, + Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, + Convert__Prefetch1_0__PCRelLabel191_1, + Convert__Prefetch1_0__Reg1_2__imm_95_0, + Convert__Prefetch1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, + Convert__Prefetch1_0__Reg1_2__UImm12Offset81_3, + Convert__Prefetch1_0__Reg1_2__Reg1_3__MemWExtend642_4, + Convert__Prefetch1_0__Reg1_2__Reg1_3__MemXExtend642_4, + Convert__Prefetch1_0__Reg1_2__SImm91_3, + Convert__PSBHint1_0, + Convert__regLR, + Convert__Reg1_0__Reg1_1__Reg1_1__Imm0_311_2, + Convert__Reg1_0__Reg1_1__Reg1_1__Imm0_631_2, + Convert__VectorReg641_1__VectorReg1281_2__Imm1_321_3, + Convert__VectorReg641_1__VectorReg1281_2__Imm1_161_3, + Convert__VectorReg641_1__VectorReg1281_2__Imm1_81_3, + Convert__VectorReg641_0__VectorReg1281_2__Imm1_321_4, + Convert__VectorReg641_0__VectorReg1281_2__Imm1_161_4, + Convert__VectorReg641_0__VectorReg1281_2__Imm1_81_4, + Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_81_3, + Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_321_3, + Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_161_3, + Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_81_4, + Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_321_4, + Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_161_4, + Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3, + Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4, + Convert__VectorReg641_1__Tie0__VectorReg641_2, + Convert__VectorReg641_0__Tie0__VectorReg641_2, + Convert__VectorReg1281_1__VectorReg1281_2__VectorReg641_3, + Convert__VectorReg1281_0__VectorReg1281_2__VectorReg641_4, + Convert__Reg1_0__Reg1_1__Imm0_311_2__Imm0_311_3, + Convert__Reg1_0__Reg1_1__Imm0_631_2__Imm0_631_3, + Convert__imm_95_4, + Convert__imm_95_5, + Convert__Reg1_1__Tie0__Reg1_2__VectorReg1281_3, + Convert__Reg1_0__Tie0__Reg1_1__VectorReg1281_2, + Convert__Reg1_0__Reg1_1__Imm0_631_2, + Convert__VectorReg1281_1__VectorReg1281_2__Imm0_71_3, + Convert__VectorReg1281_1__VectorReg1281_2__Imm0_631_3, + Convert__VectorReg641_1__VectorReg641_2__Imm0_311_3, + Convert__VectorReg641_1__VectorReg641_2__Imm0_151_3, + Convert__VectorReg1281_1__VectorReg1281_2__Imm0_311_3, + Convert__VectorReg641_1__VectorReg641_2__Imm0_71_3, + Convert__VectorReg1281_1__VectorReg1281_2__Imm0_151_3, + Convert__VectorReg1281_0__VectorReg1281_2__Imm0_71_4, + Convert__VectorReg1281_0__VectorReg1281_2__Imm0_631_4, + Convert__VectorReg1281_0__VectorReg1281_2__Imm0_311_4, + Convert__VectorReg1281_0__VectorReg1281_2__Imm0_151_4, + Convert__VectorReg641_0__VectorReg641_2__Imm0_311_4, + Convert__VectorReg641_0__VectorReg641_2__Imm0_151_4, + Convert__VectorReg641_0__VectorReg641_2__Imm0_71_4, + Convert__VectorReg1281_1__VectorReg641_2, + Convert__Reg1_0__Tie0__Reg1_1__Imm0_631_2, + Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm0_71_3, + Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm0_631_3, + Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm0_311_3, + Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm0_151_3, + Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm0_311_3, + Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm0_71_3, + Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm0_151_3, + Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm0_71_4, + Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm0_631_4, + Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm0_311_4, + Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm0_151_4, + Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm0_311_4, + Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm0_151_4, + Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm0_71_4, + Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, + Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, + Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, + Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, + Convert__Reg1_1__VectorReg1281_2__VectorIndexB1_3, + Convert__Reg1_1__VectorReg1281_2__VectorIndexH1_3, + Convert__VectorReg1281_1__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, + Convert__VectorReg1281_1__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, + Convert__VectorReg1281_0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, + Convert__VectorReg1281_0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, + Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, + Convert__Reg1_0__Reg1_1__Imm1_81_2, + Convert__Reg1_0__Reg1_1__Imm0_151_2, + Convert__Reg1_0__Reg1_1__Imm0_311_2, + Convert__Reg1_0__Reg1_1__Imm0_71_2, + Convert__VectorReg641_1__VectorReg1281_2, + Convert__Reg1_0__Tie0__Reg1_1__Imm1_641_2, + Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_641_3, + Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm1_321_3, + Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm1_161_3, + Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm1_81_3, + Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_641_4, + Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm1_321_4, + Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm1_161_4, + Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm1_81_4, + Convert__VectorReg1281_1__VectorReg1281_2__Imm1_81_3, + Convert__VectorReg641_1__VectorReg641_2__Imm1_81_3, + Convert__VectorReg1281_0__VectorReg1281_2__Imm1_81_4, + Convert__VectorReg641_0__VectorReg641_2__Imm1_81_4, + Convert__VectorReg1281_1__VectorReg641_2__Imm0_311_3, + Convert__VectorReg1281_1__VectorReg641_2__Imm0_151_3, + Convert__VectorReg1281_1__VectorReg641_2__Imm0_71_3, + Convert__VectorReg1281_0__VectorReg641_2__Imm0_311_4, + Convert__VectorReg1281_0__VectorReg641_2__Imm0_151_4, + Convert__VectorReg1281_0__VectorReg641_2__Imm0_71_4, + Convert__TypedVectorList1_0b1_0__VectorIndexB1_1__Reg1_3, + Convert__TypedVectorList1_0d1_0__VectorIndexD1_1__Reg1_3, + Convert__TypedVectorList1_0h1_0__VectorIndexH1_1__Reg1_3, + Convert__TypedVectorList1_0s1_0__VectorIndexS1_1__Reg1_3, + Convert__VecListOne1281_1__VectorIndexB1_2__Reg1_4, + Convert__VecListOne1281_1__VectorIndexD1_2__Reg1_4, + Convert__VecListOne1281_1__VectorIndexH1_2__Reg1_4, + Convert__VecListOne1281_1__VectorIndexS1_2__Reg1_4, + Convert__Reg1_3__TypedVectorList1_0b1_0__VectorIndexB1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList1_0b1_0__VectorIndexB1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList1_0d1_0__VectorIndexD1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList1_0d1_0__VectorIndexD1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList1_0h1_0__VectorIndexH1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList1_0h1_0__VectorIndexH1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList1_0s1_0__VectorIndexS1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList1_0s1_0__VectorIndexS1_1__Tie0__Reg1_5, + Convert__Reg1_4__VecListOne1281_1__VectorIndexB1_2__Tie0__regXZR, + Convert__Reg1_4__VecListOne1281_1__VectorIndexB1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListOne1281_1__VectorIndexD1_2__Tie0__regXZR, + Convert__Reg1_4__VecListOne1281_1__VectorIndexD1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListOne1281_1__VectorIndexH1_2__Tie0__regXZR, + Convert__Reg1_4__VecListOne1281_1__VectorIndexH1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListOne1281_1__VectorIndexS1_2__Tie0__regXZR, + Convert__Reg1_4__VecListOne1281_1__VectorIndexS1_2__Tie0__Reg1_6, + Convert__TypedVectorList2_0b1_0__VectorIndexB1_1__Reg1_3, + Convert__TypedVectorList2_0d1_0__VectorIndexD1_1__Reg1_3, + Convert__TypedVectorList2_0h1_0__VectorIndexH1_1__Reg1_3, + Convert__TypedVectorList2_0s1_0__VectorIndexS1_1__Reg1_3, + Convert__VecListTwo1281_1__VectorIndexB1_2__Reg1_4, + Convert__VecListTwo1281_1__VectorIndexD1_2__Reg1_4, + Convert__VecListTwo1281_1__VectorIndexH1_2__Reg1_4, + Convert__VecListTwo1281_1__VectorIndexS1_2__Reg1_4, + Convert__Reg1_3__TypedVectorList2_0b1_0__VectorIndexB1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList2_0b1_0__VectorIndexB1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList2_0d1_0__VectorIndexD1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList2_0d1_0__VectorIndexD1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList2_0h1_0__VectorIndexH1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList2_0h1_0__VectorIndexH1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList2_0s1_0__VectorIndexS1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList2_0s1_0__VectorIndexS1_1__Tie0__Reg1_5, + Convert__Reg1_4__VecListTwo1281_1__VectorIndexB1_2__Tie0__regXZR, + Convert__Reg1_4__VecListTwo1281_1__VectorIndexB1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListTwo1281_1__VectorIndexD1_2__Tie0__regXZR, + Convert__Reg1_4__VecListTwo1281_1__VectorIndexD1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListTwo1281_1__VectorIndexH1_2__Tie0__regXZR, + Convert__Reg1_4__VecListTwo1281_1__VectorIndexH1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListTwo1281_1__VectorIndexS1_2__Tie0__regXZR, + Convert__Reg1_4__VecListTwo1281_1__VectorIndexS1_2__Tie0__Reg1_6, + Convert__TypedVectorList3_0b1_0__VectorIndexB1_1__Reg1_3, + Convert__TypedVectorList3_0d1_0__VectorIndexD1_1__Reg1_3, + Convert__TypedVectorList3_0h1_0__VectorIndexH1_1__Reg1_3, + Convert__TypedVectorList3_0s1_0__VectorIndexS1_1__Reg1_3, + Convert__VecListThree1281_1__VectorIndexB1_2__Reg1_4, + Convert__VecListThree1281_1__VectorIndexD1_2__Reg1_4, + Convert__VecListThree1281_1__VectorIndexH1_2__Reg1_4, + Convert__VecListThree1281_1__VectorIndexS1_2__Reg1_4, + Convert__Reg1_3__TypedVectorList3_0b1_0__VectorIndexB1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList3_0b1_0__VectorIndexB1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList3_0d1_0__VectorIndexD1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList3_0d1_0__VectorIndexD1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList3_0h1_0__VectorIndexH1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList3_0h1_0__VectorIndexH1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList3_0s1_0__VectorIndexS1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList3_0s1_0__VectorIndexS1_1__Tie0__Reg1_5, + Convert__Reg1_4__VecListThree1281_1__VectorIndexB1_2__Tie0__regXZR, + Convert__Reg1_4__VecListThree1281_1__VectorIndexB1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListThree1281_1__VectorIndexD1_2__Tie0__regXZR, + Convert__Reg1_4__VecListThree1281_1__VectorIndexD1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListThree1281_1__VectorIndexH1_2__Tie0__regXZR, + Convert__Reg1_4__VecListThree1281_1__VectorIndexH1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListThree1281_1__VectorIndexS1_2__Tie0__regXZR, + Convert__Reg1_4__VecListThree1281_1__VectorIndexS1_2__Tie0__Reg1_6, + Convert__TypedVectorList4_0b1_0__VectorIndexB1_1__Reg1_3, + Convert__TypedVectorList4_0d1_0__VectorIndexD1_1__Reg1_3, + Convert__TypedVectorList4_0h1_0__VectorIndexH1_1__Reg1_3, + Convert__TypedVectorList4_0s1_0__VectorIndexS1_1__Reg1_3, + Convert__VecListFour1281_1__VectorIndexB1_2__Reg1_4, + Convert__VecListFour1281_1__VectorIndexD1_2__Reg1_4, + Convert__VecListFour1281_1__VectorIndexH1_2__Reg1_4, + Convert__VecListFour1281_1__VectorIndexS1_2__Reg1_4, + Convert__Reg1_3__TypedVectorList4_0b1_0__VectorIndexB1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList4_0b1_0__VectorIndexB1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList4_0d1_0__VectorIndexD1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList4_0d1_0__VectorIndexD1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList4_0h1_0__VectorIndexH1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList4_0h1_0__VectorIndexH1_1__Tie0__Reg1_5, + Convert__Reg1_3__TypedVectorList4_0s1_0__VectorIndexS1_1__Tie0__regXZR, + Convert__Reg1_3__TypedVectorList4_0s1_0__VectorIndexS1_1__Tie0__Reg1_5, + Convert__Reg1_4__VecListFour1281_1__VectorIndexB1_2__Tie0__regXZR, + Convert__Reg1_4__VecListFour1281_1__VectorIndexB1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListFour1281_1__VectorIndexD1_2__Tie0__regXZR, + Convert__Reg1_4__VecListFour1281_1__VectorIndexD1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListFour1281_1__VectorIndexH1_2__Tie0__regXZR, + Convert__Reg1_4__VecListFour1281_1__VectorIndexH1_2__Tie0__Reg1_6, + Convert__Reg1_4__VecListFour1281_1__VectorIndexS1_2__Tie0__regXZR, + Convert__Reg1_4__VecListFour1281_1__VectorIndexS1_2__Tie0__Reg1_6, + Convert__regWZR__Reg1_0__Reg1_2, + Convert__regXZR__Reg1_0__Reg1_2, + Convert__Reg1_0__Reg1_1__Reg1_2__GPR64sp01_4, + Convert__Reg1_0__Tie0__Reg1_1, + Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_7, + Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_15, + Convert__VectorReg1281_1__VectorReg641_2__imm_95_0, + Convert__VectorReg1281_0__VectorReg641_2__imm_95_0, + Convert__VectorReg1281_1__VectorReg1281_2__imm_95_0, + Convert__VectorReg1281_0__VectorReg1281_2__imm_95_0, + Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_31, + Convert__Imm0_71_0__SysCR1_1__SysCR1_2__Imm0_71_3__regXZR, + Convert__Imm0_71_0__SysCR1_1__SysCR1_2__Imm0_71_3__Reg1_4, + Convert__Reg1_0__Imm0_71_1__SysCR1_2__SysCR1_3__Imm0_71_4, + Convert__VectorReg1281_1__VecListFour1281_2__VectorReg1281_3, + Convert__VectorReg1281_1__VecListOne1281_2__VectorReg1281_3, + Convert__VectorReg1281_1__VecListThree1281_2__VectorReg1281_3, + Convert__VectorReg1281_1__VecListTwo1281_2__VectorReg1281_3, + Convert__VectorReg641_1__VecListFour1281_2__VectorReg641_3, + Convert__VectorReg641_1__VecListOne1281_2__VectorReg641_3, + Convert__VectorReg641_1__VecListThree1281_2__VectorReg641_3, + Convert__VectorReg641_1__VecListTwo1281_2__VectorReg641_3, + Convert__VectorReg1281_0__TypedVectorList4_16b1_2__VectorReg1281_3, + Convert__VectorReg1281_0__TypedVectorList1_16b1_2__VectorReg1281_3, + Convert__VectorReg1281_0__TypedVectorList3_16b1_2__VectorReg1281_3, + Convert__VectorReg1281_0__TypedVectorList2_16b1_2__VectorReg1281_3, + Convert__VectorReg641_0__TypedVectorList4_16b1_2__VectorReg641_3, + Convert__VectorReg641_0__TypedVectorList1_16b1_2__VectorReg641_3, + Convert__VectorReg641_0__TypedVectorList3_16b1_2__VectorReg641_3, + Convert__VectorReg641_0__TypedVectorList2_16b1_2__VectorReg641_3, + Convert__Reg1_0__Imm0_311_1__BranchTarget141_2, + Convert__Reg1_0__Imm32_631_1__BranchTarget141_2, + Convert__GPR32as641_0__TBZImm0_311_1__BranchTarget141_2, + Convert__VectorReg1281_1__Tie0__VecListFour1281_2__VectorReg1281_3, + Convert__VectorReg1281_1__Tie0__VecListOne1281_2__VectorReg1281_3, + Convert__VectorReg1281_1__Tie0__VecListThree1281_2__VectorReg1281_3, + Convert__VectorReg1281_1__Tie0__VecListTwo1281_2__VectorReg1281_3, + Convert__VectorReg641_1__Tie0__VecListFour1281_2__VectorReg641_3, + Convert__VectorReg641_1__Tie0__VecListOne1281_2__VectorReg641_3, + Convert__VectorReg641_1__Tie0__VecListThree1281_2__VectorReg641_3, + Convert__VectorReg641_1__Tie0__VecListTwo1281_2__VectorReg641_3, + Convert__VectorReg1281_0__Tie0__TypedVectorList4_16b1_2__VectorReg1281_3, + Convert__VectorReg1281_0__Tie0__TypedVectorList1_16b1_2__VectorReg1281_3, + Convert__VectorReg1281_0__Tie0__TypedVectorList3_16b1_2__VectorReg1281_3, + Convert__VectorReg1281_0__Tie0__TypedVectorList2_16b1_2__VectorReg1281_3, + Convert__VectorReg641_0__Tie0__TypedVectorList4_16b1_2__VectorReg641_3, + Convert__VectorReg641_0__Tie0__TypedVectorList1_16b1_2__VectorReg641_3, + Convert__VectorReg641_0__Tie0__TypedVectorList3_16b1_2__VectorReg641_3, + Convert__VectorReg641_0__Tie0__TypedVectorList2_16b1_2__VectorReg641_3, + Convert__regWZR__Reg1_0__LogicalImm321_1, + Convert__regXZR__Reg1_0__LogicalImm641_1, + Convert__regWZR__Reg1_0__Reg1_1__LogicalShifter321_2, + Convert__regXZR__Reg1_0__Reg1_1__LogicalShifter641_2, + Convert__imm_95_2, + Convert__imm_95_3, + Convert__imm_95_1, + CVT_NUM_SIGNATURES +}; + +} // end anonymous namespace + +static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][13] = { + // Convert__Reg1_0__Reg1_1 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg1281_2 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_Done }, + // Convert__VectorReg641_1__VectorReg641_2 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorReg64Operands, 3, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg1281_2 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_Done }, + // Convert__VectorReg641_0__VectorReg641_2 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorReg64Operands, 3, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_2 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_16, 0, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_24, 0, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_0, 0, CVT_Done }, + // Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addAddSubImmNegOperands, 3, CVT_Done }, + // Convert__Reg1_0__Reg1_1__AddSubImm2_2 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addAddSubImmOperands, 3, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorReg128Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorReg64Operands, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter321_3 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addExtendOperands, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter641_3 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_2__Extend641_3 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addExtend64Operands, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_2__ExtendLSL641_3 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addExtend64Operands, 4, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorReg128Operands, 5, CVT_Done }, + // Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorReg64Operands, 5, CVT_Done }, + // Convert__VectorReg641_1__VectorReg1281_2__VectorReg1281_3 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorReg128Operands, 4, CVT_Done }, + // Convert__VectorReg641_0__VectorReg1281_2__VectorReg1281_4 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorReg128Operands, 5, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorReg128Operands, 4, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorReg128Operands, 5, CVT_Done }, + // Convert__Reg1_1__VectorReg1281_2 + { CVT_95_Reg, 2, CVT_95_addVectorReg128Operands, 3, CVT_Done }, + // Convert__Reg1_0__VectorReg1281_1 + { CVT_95_Reg, 1, CVT_95_addVectorReg128Operands, 2, CVT_Done }, + // Convert__Reg1_1__VectorReg641_2 + { CVT_95_Reg, 2, CVT_95_addVectorReg64Operands, 3, CVT_Done }, + // Convert__Reg1_0__VectorReg641_1 + { CVT_95_Reg, 1, CVT_95_addVectorReg64Operands, 2, CVT_Done }, + // Convert__Reg1_0__AdrLabel1_1 + { CVT_95_Reg, 1, CVT_95_addAdrLabelOperands, 2, CVT_Done }, + // Convert__Reg1_0__AdrpLabel1_1 + { CVT_95_Reg, 1, CVT_95_addAdrpLabelOperands, 2, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorReg1281_2 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorReg1281_2 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_Done }, + // Convert__Reg1_0__Reg1_1__LogicalImm321_2 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addLogicalImm32Operands, 3, CVT_Done }, + // Convert__Reg1_0__Reg1_1__LogicalImm641_2 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addLogicalImm64Operands, 3, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter641_3 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Imm0_311_2__imm_95_31 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImm0_95_31Operands, 3, CVT_imm_95_31, 0, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Imm0_631_2__imm_95_63 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImm0_95_63Operands, 3, CVT_imm_95_63, 0, CVT_Done }, + // Convert__BranchTarget261_0 + { CVT_95_addBranchTarget26Operands, 1, CVT_Done }, + // Convert__CondCode1_1__PCRelLabel191_2 + { CVT_95_addCondCodeOperands, 2, CVT_95_addPCRelLabel19Operands, 3, CVT_Done }, + // Convert__Reg1_0__Tie0__Reg1_1__Imm0_311_2__Imm0_311_3 + { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addImm0_95_31Operands, 3, CVT_95_addImm0_95_31Operands, 4, CVT_Done }, + // Convert__Reg1_0__Tie0__Reg1_1__Imm0_631_2__Imm0_631_3 + { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addImm0_95_63Operands, 3, CVT_95_addImm0_95_63Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__Tie0__Imm0_2551_2__imm_95_0 + { CVT_95_addVectorReg64Operands, 2, CVT_Tied, 0, CVT_95_addImm0_95_255Operands, 3, CVT_imm_95_0, 0, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__Imm0_2551_2__imm_95_0 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addImm0_95_255Operands, 3, CVT_imm_95_0, 0, CVT_Done }, + // Convert__Reg1_0__Reg1_1__LogicalImm32Not1_2 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addLogicalImm32NotOperands, 3, CVT_Done }, + // Convert__Reg1_0__Reg1_1__LogicalImm64Not1_2 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addLogicalImm64NotOperands, 3, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__Imm0_2551_2__imm_95_0 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addImm0_95_255Operands, 3, CVT_imm_95_0, 0, CVT_Done }, + // Convert__VectorReg641_0__Tie0__Imm0_2551_2__imm_95_0 + { CVT_95_addVectorReg64Operands, 1, CVT_Tied, 0, CVT_95_addImm0_95_255Operands, 3, CVT_imm_95_0, 0, CVT_Done }, + // Convert__VectorReg641_1__Tie0__Imm0_2551_2__LogicalVecShifter1_3 + { CVT_95_addVectorReg64Operands, 2, CVT_Tied, 0, CVT_95_addImm0_95_255Operands, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__VectorReg641_1__Tie0__Imm0_2551_2__LogicalVecHalfWordShifter1_3 + { CVT_95_addVectorReg64Operands, 2, CVT_Tied, 0, CVT_95_addImm0_95_255Operands, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__Imm0_2551_2__LogicalVecShifter1_3 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addImm0_95_255Operands, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__Imm0_2551_2__LogicalVecHalfWordShifter1_3 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addImm0_95_255Operands, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__Imm0_2551_2__LogicalVecShifter1_3 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addImm0_95_255Operands, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__Imm0_2551_2__LogicalVecHalfWordShifter1_3 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addImm0_95_255Operands, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__VectorReg641_0__Tie0__Imm0_2551_2__LogicalVecShifter1_3 + { CVT_95_addVectorReg64Operands, 1, CVT_Tied, 0, CVT_95_addImm0_95_255Operands, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__VectorReg641_0__Tie0__Imm0_2551_2__LogicalVecHalfWordShifter1_3 + { CVT_95_addVectorReg64Operands, 1, CVT_Tied, 0, CVT_95_addImm0_95_255Operands, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3 + { CVT_95_addVectorReg64Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorReg64Operands, 4, CVT_Done }, + // Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4 + { CVT_95_addVectorReg64Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorReg64Operands, 5, CVT_Done }, + // Convert__Reg1_0 + { CVT_95_Reg, 1, CVT_Done }, + // Convert__Imm0_655351_0 + { CVT_95_addImm0_95_65535Operands, 1, CVT_Done }, + // Convert__Reg1_0__Tie0__Reg1_1__Reg1_3 + { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__WSeqPair1_0__Tie0__WSeqPair1_1__Reg1_3 + { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__XSeqPair1_0__Tie0__XSeqPair1_1__Reg1_3 + { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__Reg1_0__PCRelLabel191_1 + { CVT_95_Reg, 1, CVT_95_addPCRelLabel19Operands, 2, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImm0_95_15Operands, 3, CVT_95_addCondCodeOperands, 4, CVT_Done }, + // Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3 + { CVT_95_Reg, 1, CVT_95_addImm0_95_31Operands, 2, CVT_95_addImm0_95_15Operands, 3, CVT_95_addCondCodeOperands, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addCondCodeOperands, 3, CVT_Done }, + // Convert__imm_95_15 + { CVT_imm_95_15, 0, CVT_Done }, + // Convert__Imm0_151_0 + { CVT_95_addImm0_95_15Operands, 1, CVT_Done }, + // Convert__Reg1_0__Reg1_2__Reg1_1 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg128Operands, 4, CVT_95_addVectorReg128Operands, 3, CVT_Done }, + // Convert__VectorReg641_1__VectorReg641_3__VectorReg641_2 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorReg64Operands, 4, CVT_95_addVectorReg64Operands, 3, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg128Operands, 5, CVT_95_addVectorReg128Operands, 3, CVT_Done }, + // Convert__VectorReg641_0__VectorReg641_4__VectorReg641_2 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorReg64Operands, 5, CVT_95_addVectorReg64Operands, 3, CVT_Done }, + // Convert__regWZR__Reg1_0__Reg1_1__imm_95_16 + { CVT_regWZR, 0, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_imm_95_16, 0, CVT_Done }, + // Convert__regXZR__Reg1_0__Reg1_1__imm_95_24 + { CVT_regXZR, 0, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_imm_95_24, 0, CVT_Done }, + // Convert__regWZR__Reg1_0__Reg1_1__imm_95_0 + { CVT_regWZR, 0, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_Done }, + // Convert__regWZR__Reg1_0__AddSubImmNeg2_1 + { CVT_regWZR, 0, CVT_95_Reg, 1, CVT_95_addAddSubImmNegOperands, 2, CVT_Done }, + // Convert__regWZR__Reg1_0__AddSubImm2_1 + { CVT_regWZR, 0, CVT_95_Reg, 1, CVT_95_addAddSubImmOperands, 2, CVT_Done }, + // Convert__regXZR__Reg1_0__Reg1_1__imm_95_0 + { CVT_regXZR, 0, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_Done }, + // Convert__regXZR__Reg1_0__AddSubImmNeg2_1 + { CVT_regXZR, 0, CVT_95_Reg, 1, CVT_95_addAddSubImmNegOperands, 2, CVT_Done }, + // Convert__regXZR__Reg1_0__AddSubImm2_1 + { CVT_regXZR, 0, CVT_95_Reg, 1, CVT_95_addAddSubImmOperands, 2, CVT_Done }, + // Convert__regWZR__Reg1_0__Reg1_1__ArithmeticShifter321_2 + { CVT_regWZR, 0, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addShifterOperands, 3, CVT_Done }, + // Convert__regWZR__Reg1_0__Reg1_1__Extend1_2 + { CVT_regWZR, 0, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addExtendOperands, 3, CVT_Done }, + // Convert__regXZR__Reg1_0__Reg1_1__ArithmeticShifter641_2 + { CVT_regXZR, 0, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addShifterOperands, 3, CVT_Done }, + // Convert__regXZR__Reg1_0__Reg1_1__Extend1_2 + { CVT_regXZR, 0, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addExtendOperands, 3, CVT_Done }, + // Convert__regXZR__Reg1_0__Reg1_1__ExtendLSL641_2 + { CVT_regXZR, 0, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addExtend64Operands, 3, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addCondCodeOperands, 4, CVT_Done }, + // Convert__Reg1_0__regWZR__regWZR__CondCode1_1 + { CVT_95_Reg, 1, CVT_regWZR, 0, CVT_regWZR, 0, CVT_95_addCondCodeOperands, 2, CVT_Done }, + // Convert__Reg1_0__regXZR__regXZR__CondCode1_1 + { CVT_95_Reg, 1, CVT_regXZR, 0, CVT_regXZR, 0, CVT_95_addCondCodeOperands, 2, CVT_Done }, + // Convert__imm_95_0 + { CVT_imm_95_0, 0, CVT_Done }, + // Convert__Barrier1_0 + { CVT_95_addBarrierOperands, 1, CVT_Done }, + // Convert_NoOperands + { CVT_Done }, + // Convert__VectorReg1281_1__Reg1_2 + { CVT_95_addVectorReg128Operands, 2, CVT_95_Reg, 3, CVT_Done }, + // Convert__VectorReg641_1__Reg1_2 + { CVT_95_addVectorReg64Operands, 2, CVT_95_Reg, 3, CVT_Done }, + // Convert__Reg1_0__VectorReg1281_1__VectorIndexH1_2 + { CVT_95_Reg, 1, CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorIndexHOperands, 3, CVT_Done }, + // Convert__Reg1_0__VectorReg1281_1__VectorIndexS1_2 + { CVT_95_Reg, 1, CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorIndexSOperands, 3, CVT_Done }, + // Convert__Reg1_0__VectorReg1281_1__VectorIndexD1_2 + { CVT_95_Reg, 1, CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorIndexDOperands, 3, CVT_Done }, + // Convert__Reg1_0__VectorReg1281_1__VectorIndexB1_2 + { CVT_95_Reg, 1, CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorIndexBOperands, 3, CVT_Done }, + // Convert__VectorReg1281_0__Reg1_2 + { CVT_95_addVectorReg128Operands, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__VectorReg641_0__Reg1_2 + { CVT_95_addVectorReg64Operands, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg1281_2__VectorIndexB1_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorIndexBOperands, 4, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg1281_2__VectorIndexD1_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorIndexDOperands, 4, CVT_Done }, + // Convert__VectorReg641_1__VectorReg1281_2__VectorIndexS1_3 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorIndexSOperands, 4, CVT_Done }, + // Convert__VectorReg641_1__VectorReg1281_2__VectorIndexH1_3 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorIndexHOperands, 4, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg1281_2__VectorIndexS1_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorIndexSOperands, 4, CVT_Done }, + // Convert__VectorReg641_1__VectorReg1281_2__VectorIndexB1_3 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorIndexBOperands, 4, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg1281_2__VectorIndexH1_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorIndexHOperands, 4, CVT_Done }, + // Convert__Reg1_0__VectorReg1281_1__VectorIndexH1_3 + { CVT_95_Reg, 1, CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorIndexHOperands, 4, CVT_Done }, + // Convert__Reg1_0__VectorReg1281_1__VectorIndexS1_3 + { CVT_95_Reg, 1, CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorIndexSOperands, 4, CVT_Done }, + // Convert__Reg1_0__VectorReg1281_1__VectorIndexD1_3 + { CVT_95_Reg, 1, CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorIndexDOperands, 4, CVT_Done }, + // Convert__Reg1_0__VectorReg1281_1__VectorIndexB1_3 + { CVT_95_Reg, 1, CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorIndexBOperands, 4, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg1281_2__VectorIndexB1_4 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorIndexBOperands, 5, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg1281_2__VectorIndexD1_4 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorIndexDOperands, 5, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg1281_2__VectorIndexS1_4 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorIndexSOperands, 5, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg1281_2__VectorIndexH1_4 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorIndexHOperands, 5, CVT_Done }, + // Convert__VectorReg641_0__VectorReg1281_2__VectorIndexS1_4 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorIndexSOperands, 5, CVT_Done }, + // Convert__VectorReg641_0__VectorReg1281_2__VectorIndexH1_4 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorIndexHOperands, 5, CVT_Done }, + // Convert__VectorReg641_0__VectorReg1281_2__VectorIndexB1_4 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorIndexBOperands, 5, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3__Imm1_4 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorReg128Operands, 4, CVT_95_addImmOperands, 5, CVT_Done }, + // Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3__Imm1_4 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorReg64Operands, 4, CVT_95_addImmOperands, 5, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4__Imm1_6 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorReg128Operands, 5, CVT_95_addImmOperands, 7, CVT_Done }, + // Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4__Imm1_6 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorReg64Operands, 5, CVT_95_addImmOperands, 7, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_2__Imm0_311_3 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImm0_95_31Operands, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_2__Imm0_631_3 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImm0_95_63Operands, 4, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg641_2 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg64Operands, 3, CVT_Done }, + // Convert__VectorReg641_0__VectorReg1281_2 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Imm1_161_2 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImm1_95_16Operands, 3, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Imm1_321_2 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImm1_95_32Operands, 3, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Imm1_641_2 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImm1_95_64Operands, 3, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg1281_2__Imm1_641_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm1_95_64Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__VectorReg641_2__Imm1_321_3 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm1_95_32Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__VectorReg641_2__Imm1_161_3 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm1_95_16Operands, 4, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg1281_2__Imm1_321_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm1_95_32Operands, 4, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg1281_2__Imm1_161_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm1_95_16Operands, 4, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg1281_2__Imm1_641_4 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm1_95_64Operands, 5, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg1281_2__Imm1_321_4 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm1_95_32Operands, 5, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg1281_2__Imm1_161_4 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm1_95_16Operands, 5, CVT_Done }, + // Convert__VectorReg641_0__VectorReg641_2__Imm1_321_4 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm1_95_32Operands, 5, CVT_Done }, + // Convert__VectorReg641_0__VectorReg641_2__Imm1_161_4 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm1_95_16Operands, 5, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3__VectorIndexD1_4 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorReg128Operands, 4, CVT_95_addVectorIndexDOperands, 5, CVT_Done }, + // Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4 + { CVT_95_addVectorReg64Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorReg128Operands, 4, CVT_95_addVectorIndexSOperands, 5, CVT_Done }, + // Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4 + { CVT_95_addVectorReg64Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorRegLoOperands, 4, CVT_95_addVectorIndexHOperands, 5, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorReg128Operands, 4, CVT_95_addVectorIndexSOperands, 5, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorRegLoOperands, 4, CVT_95_addVectorIndexHOperands, 5, CVT_Done }, + // Convert__Reg1_1__Tie0__Reg1_2__VectorReg1281_3__VectorIndexD1_4 + { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addVectorReg128Operands, 4, CVT_95_addVectorIndexDOperands, 5, CVT_Done }, + // Convert__Reg1_1__Tie0__Reg1_2__VectorRegLo1_3__VectorIndexH1_4 + { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addVectorRegLoOperands, 4, CVT_95_addVectorIndexHOperands, 5, CVT_Done }, + // Convert__Reg1_1__Tie0__Reg1_2__VectorReg1281_3__VectorIndexS1_4 + { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addVectorReg128Operands, 4, CVT_95_addVectorIndexSOperands, 5, CVT_Done }, + // Convert__Reg1_0__Tie0__Reg1_1__VectorRegLo1_2__VectorIndexH1_4 + { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addVectorRegLoOperands, 3, CVT_95_addVectorIndexHOperands, 5, CVT_Done }, + // Convert__Reg1_0__Tie0__Reg1_1__VectorReg1281_2__VectorIndexS1_4 + { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorIndexSOperands, 5, CVT_Done }, + // Convert__Reg1_0__Tie0__Reg1_1__VectorReg1281_2__VectorIndexD1_4 + { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorIndexDOperands, 5, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4__VectorIndexD1_6 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorReg128Operands, 5, CVT_95_addVectorIndexDOperands, 7, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorReg128Operands, 5, CVT_95_addVectorIndexSOperands, 7, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorRegLoOperands, 5, CVT_95_addVectorIndexHOperands, 7, CVT_Done }, + // Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6 + { CVT_95_addVectorReg64Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorReg128Operands, 5, CVT_95_addVectorIndexSOperands, 7, CVT_Done }, + // Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6 + { CVT_95_addVectorReg64Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorRegLoOperands, 5, CVT_95_addVectorIndexHOperands, 7, CVT_Done }, + // Convert__Reg1_0__FPImm1_1 + { CVT_95_Reg, 1, CVT_95_addFPImmOperands, 2, CVT_Done }, + // Convert__VectorReg1281_1__FPImm1_2 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addFPImmOperands, 3, CVT_Done }, + // Convert__VectorReg641_1__FPImm1_2 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addFPImmOperands, 3, CVT_Done }, + // Convert__VectorReg1281_0__FPImm1_2 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addFPImmOperands, 3, CVT_Done }, + // Convert__VectorReg641_0__FPImm1_2 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addFPImmOperands, 3, CVT_Done }, + // Convert__Reg1_1__VectorReg1281_2__VectorIndex11_3 + { CVT_95_Reg, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorIndex1Operands, 4, CVT_Done }, + // Convert__VectorReg1281_1__Reg1_3__VectorIndex11_2 + { CVT_95_addVectorReg128Operands, 2, CVT_95_Reg, 4, CVT_95_addVectorIndex1Operands, 3, CVT_Done }, + // Convert__Reg1_0__VectorReg1281_1__VectorIndex11_3 + { CVT_95_Reg, 1, CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorIndex1Operands, 4, CVT_Done }, + // Convert__VectorReg1281_0__Reg1_3__VectorIndex11_2 + { CVT_95_addVectorReg128Operands, 1, CVT_95_Reg, 4, CVT_95_addVectorIndex1Operands, 3, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3__VectorIndexD1_4 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorReg128Operands, 4, CVT_95_addVectorIndexDOperands, 5, CVT_Done }, + // Convert__VectorReg641_1__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorReg128Operands, 4, CVT_95_addVectorIndexSOperands, 5, CVT_Done }, + // Convert__VectorReg641_1__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorRegLoOperands, 4, CVT_95_addVectorIndexHOperands, 5, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorReg128Operands, 4, CVT_95_addVectorIndexSOperands, 5, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorRegLoOperands, 4, CVT_95_addVectorIndexHOperands, 5, CVT_Done }, + // Convert__Reg1_1__Reg1_2__VectorReg1281_3__VectorIndexD1_4 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addVectorReg128Operands, 4, CVT_95_addVectorIndexDOperands, 5, CVT_Done }, + // Convert__Reg1_1__Reg1_2__VectorRegLo1_3__VectorIndexH1_4 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addVectorRegLoOperands, 4, CVT_95_addVectorIndexHOperands, 5, CVT_Done }, + // Convert__Reg1_1__Reg1_2__VectorReg1281_3__VectorIndexS1_4 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addVectorReg128Operands, 4, CVT_95_addVectorIndexSOperands, 5, CVT_Done }, + // Convert__Reg1_0__Reg1_1__VectorRegLo1_2__VectorIndexH1_4 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addVectorRegLoOperands, 3, CVT_95_addVectorIndexHOperands, 5, CVT_Done }, + // Convert__Reg1_0__Reg1_1__VectorReg1281_2__VectorIndexS1_4 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorIndexSOperands, 5, CVT_Done }, + // Convert__Reg1_0__Reg1_1__VectorReg1281_2__VectorIndexD1_4 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorIndexDOperands, 5, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4__VectorIndexD1_6 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorReg128Operands, 5, CVT_95_addVectorIndexDOperands, 7, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorReg128Operands, 5, CVT_95_addVectorIndexSOperands, 7, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorRegLoOperands, 5, CVT_95_addVectorIndexHOperands, 7, CVT_Done }, + // Convert__VectorReg641_0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorReg128Operands, 5, CVT_95_addVectorIndexSOperands, 7, CVT_Done }, + // Convert__VectorReg641_0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorRegLoOperands, 5, CVT_95_addVectorIndexHOperands, 7, CVT_Done }, + // Convert__Imm0_1271_0 + { CVT_95_addImm0_95_127Operands, 1, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorIndexB1_2__Reg1_3 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorIndexBOperands, 3, CVT_95_Reg, 4, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorIndexD1_2__Reg1_3 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorIndexDOperands, 3, CVT_95_Reg, 4, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorIndexH1_2__Reg1_3 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorIndexHOperands, 3, CVT_95_Reg, 4, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorIndexS1_2__Reg1_3 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorIndexSOperands, 3, CVT_95_Reg, 4, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorIndexB1_2__Reg1_3 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorIndexBOperands, 3, CVT_95_Reg, 4, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorIndexD1_2__Reg1_3 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorIndexDOperands, 3, CVT_95_Reg, 4, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorIndexH1_2__Reg1_3 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorIndexHOperands, 3, CVT_95_Reg, 4, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorIndexS1_2__Reg1_3 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorIndexSOperands, 3, CVT_95_Reg, 4, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorIndexB1_2__VectorReg1281_3__VectorIndexB1_4 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorIndexBOperands, 3, CVT_95_addVectorReg128Operands, 4, CVT_95_addVectorIndexBOperands, 5, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorIndexD1_2__VectorReg1281_3__VectorIndexD1_4 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorIndexDOperands, 3, CVT_95_addVectorReg128Operands, 4, CVT_95_addVectorIndexDOperands, 5, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorIndexH1_2__VectorReg1281_3__VectorIndexH1_4 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorIndexHOperands, 3, CVT_95_addVectorReg128Operands, 4, CVT_95_addVectorIndexHOperands, 5, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorIndexS1_2__VectorReg1281_3__VectorIndexS1_4 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorIndexSOperands, 3, CVT_95_addVectorReg128Operands, 4, CVT_95_addVectorIndexSOperands, 5, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorIndexB1_2__VectorReg1281_3__VectorIndexB1_5 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorIndexBOperands, 3, CVT_95_addVectorReg128Operands, 4, CVT_95_addVectorIndexBOperands, 6, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorIndexD1_2__VectorReg1281_3__VectorIndexD1_5 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorIndexDOperands, 3, CVT_95_addVectorReg128Operands, 4, CVT_95_addVectorIndexDOperands, 6, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorIndexH1_2__VectorReg1281_3__VectorIndexH1_5 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorIndexHOperands, 3, CVT_95_addVectorReg128Operands, 4, CVT_95_addVectorIndexHOperands, 6, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorIndexS1_2__VectorReg1281_3__VectorIndexS1_5 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorIndexSOperands, 3, CVT_95_addVectorReg128Operands, 4, CVT_95_addVectorIndexSOperands, 6, CVT_Done }, + // Convert__TypedVectorList4_16b1_0__Reg1_2 + { CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList4_1d1_0__Reg1_2 + { CVT_95_addVectorList64Operands_LT_4_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList4_2d1_0__Reg1_2 + { CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList4_2s1_0__Reg1_2 + { CVT_95_addVectorList64Operands_LT_4_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList4_4h1_0__Reg1_2 + { CVT_95_addVectorList64Operands_LT_4_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList4_4s1_0__Reg1_2 + { CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList4_8b1_0__Reg1_2 + { CVT_95_addVectorList64Operands_LT_4_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList4_8h1_0__Reg1_2 + { CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList1_16b1_0__Reg1_2 + { CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList1_1d1_0__Reg1_2 + { CVT_95_addVectorList64Operands_LT_1_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList1_2d1_0__Reg1_2 + { CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList1_2s1_0__Reg1_2 + { CVT_95_addVectorList64Operands_LT_1_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList1_4h1_0__Reg1_2 + { CVT_95_addVectorList64Operands_LT_1_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList1_4s1_0__Reg1_2 + { CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList1_8b1_0__Reg1_2 + { CVT_95_addVectorList64Operands_LT_1_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList1_8h1_0__Reg1_2 + { CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList3_16b1_0__Reg1_2 + { CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList3_1d1_0__Reg1_2 + { CVT_95_addVectorList64Operands_LT_3_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList3_2d1_0__Reg1_2 + { CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList3_2s1_0__Reg1_2 + { CVT_95_addVectorList64Operands_LT_3_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList3_4h1_0__Reg1_2 + { CVT_95_addVectorList64Operands_LT_3_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList3_4s1_0__Reg1_2 + { CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList3_8b1_0__Reg1_2 + { CVT_95_addVectorList64Operands_LT_3_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList3_8h1_0__Reg1_2 + { CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList2_16b1_0__Reg1_2 + { CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList2_1d1_0__Reg1_2 + { CVT_95_addVectorList64Operands_LT_2_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList2_2d1_0__Reg1_2 + { CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList2_2s1_0__Reg1_2 + { CVT_95_addVectorList64Operands_LT_2_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList2_4h1_0__Reg1_2 + { CVT_95_addVectorList64Operands_LT_2_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList2_4s1_0__Reg1_2 + { CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList2_8b1_0__Reg1_2 + { CVT_95_addVectorList64Operands_LT_2_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__TypedVectorList2_8h1_0__Reg1_2 + { CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__VecListFour1281_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__VecListOne1281_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__VecListThree1281_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__VecListTwo1281_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__VecListFour641_1__Reg1_3 + { CVT_95_addVectorList64Operands_LT_4_GT_, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__VecListOne641_1__Reg1_3 + { CVT_95_addVectorList64Operands_LT_1_GT_, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__VecListThree641_1__Reg1_3 + { CVT_95_addVectorList64Operands_LT_3_GT_, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__VecListTwo641_1__Reg1_3 + { CVT_95_addVectorList64Operands_LT_2_GT_, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList4_1d1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_4_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList4_1d1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_4_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_4_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_4_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_4_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_4_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_4_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_4_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList1_16b1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList1_16b1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList1_1d1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_1_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList1_1d1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_1_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList1_2d1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList1_2d1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList1_2s1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_1_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList1_2s1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_1_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList1_4h1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_1_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList1_4h1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_1_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList1_4s1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList1_4s1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList1_8b1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_1_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList1_8b1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_1_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList1_8h1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList1_8h1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__TypedVectorList1_0b1_0__Tie0__VectorIndexB1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_Tied, 0, CVT_95_addVectorIndexBOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList1_0d1_0__Tie0__VectorIndexD1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_Tied, 0, CVT_95_addVectorIndexDOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList1_0h1_0__Tie0__VectorIndexH1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_Tied, 0, CVT_95_addVectorIndexHOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList1_0s1_0__Tie0__VectorIndexS1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_Tied, 0, CVT_95_addVectorIndexSOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList3_1d1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_3_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList3_1d1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_3_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_3_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_3_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_3_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_3_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_3_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_3_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList2_1d1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_2_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList2_1d1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_2_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_2_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_2_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_2_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_2_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_2_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList64Operands_LT_2_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__regXZR + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__Reg1_4 + { CVT_95_Reg, 3, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__VecListFour641_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList64Operands_LT_4_GT_, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList64Operands_LT_4_GT_, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__VecListOne641_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList64Operands_LT_1_GT_, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList64Operands_LT_1_GT_, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__VecListThree641_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList64Operands_LT_3_GT_, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList64Operands_LT_3_GT_, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList64Operands_LT_2_GT_, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList64Operands_LT_2_GT_, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__VecListOne1281_1__Tie0__VectorIndexB1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_Tied, 0, CVT_95_addVectorIndexBOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListOne1281_1__Tie0__VectorIndexD1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_Tied, 0, CVT_95_addVectorIndexDOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListOne1281_1__Tie0__VectorIndexH1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_Tied, 0, CVT_95_addVectorIndexHOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListOne1281_1__Tie0__VectorIndexS1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_Tied, 0, CVT_95_addVectorIndexSOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_3__TypedVectorList1_0b1_0__Tie1__VectorIndexB1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexBOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList1_0b1_0__Tie1__VectorIndexB1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexBOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList1_0d1_0__Tie1__VectorIndexD1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexDOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList1_0d1_0__Tie1__VectorIndexD1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexDOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList1_0h1_0__Tie1__VectorIndexH1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexHOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList1_0h1_0__Tie1__VectorIndexH1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexHOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList1_0s1_0__Tie1__VectorIndexS1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexSOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList1_0s1_0__Tie1__VectorIndexS1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexSOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexB1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexBOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexB1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexBOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexD1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexDOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexD1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexDOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexH1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexHOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexH1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexHOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexS1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexSOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexS1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexSOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__TypedVectorList2_0b1_0__Tie0__VectorIndexB1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_Tied, 0, CVT_95_addVectorIndexBOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList2_0d1_0__Tie0__VectorIndexD1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_Tied, 0, CVT_95_addVectorIndexDOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList2_0h1_0__Tie0__VectorIndexH1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_Tied, 0, CVT_95_addVectorIndexHOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList2_0s1_0__Tie0__VectorIndexS1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_Tied, 0, CVT_95_addVectorIndexSOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__VecListTwo1281_1__Tie0__VectorIndexB1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_Tied, 0, CVT_95_addVectorIndexBOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListTwo1281_1__Tie0__VectorIndexD1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_Tied, 0, CVT_95_addVectorIndexDOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListTwo1281_1__Tie0__VectorIndexH1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_Tied, 0, CVT_95_addVectorIndexHOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListTwo1281_1__Tie0__VectorIndexS1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_Tied, 0, CVT_95_addVectorIndexSOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_3__TypedVectorList2_0b1_0__Tie1__VectorIndexB1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexBOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList2_0b1_0__Tie1__VectorIndexB1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexBOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList2_0d1_0__Tie1__VectorIndexD1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexDOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList2_0d1_0__Tie1__VectorIndexD1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexDOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList2_0h1_0__Tie1__VectorIndexH1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexHOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList2_0h1_0__Tie1__VectorIndexH1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexHOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList2_0s1_0__Tie1__VectorIndexS1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexSOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList2_0s1_0__Tie1__VectorIndexS1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexSOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexB1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexBOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexB1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexBOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexD1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexDOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexD1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexDOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexH1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexHOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexH1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexHOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexS1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexSOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexS1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexSOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__TypedVectorList3_0b1_0__Tie0__VectorIndexB1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_Tied, 0, CVT_95_addVectorIndexBOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList3_0d1_0__Tie0__VectorIndexD1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_Tied, 0, CVT_95_addVectorIndexDOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList3_0h1_0__Tie0__VectorIndexH1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_Tied, 0, CVT_95_addVectorIndexHOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList3_0s1_0__Tie0__VectorIndexS1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_Tied, 0, CVT_95_addVectorIndexSOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__VecListThree1281_1__Tie0__VectorIndexB1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_Tied, 0, CVT_95_addVectorIndexBOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListThree1281_1__Tie0__VectorIndexD1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_Tied, 0, CVT_95_addVectorIndexDOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListThree1281_1__Tie0__VectorIndexH1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_Tied, 0, CVT_95_addVectorIndexHOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListThree1281_1__Tie0__VectorIndexS1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_Tied, 0, CVT_95_addVectorIndexSOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_3__TypedVectorList3_0b1_0__Tie1__VectorIndexB1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexBOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList3_0b1_0__Tie1__VectorIndexB1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexBOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList3_0d1_0__Tie1__VectorIndexD1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexDOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList3_0d1_0__Tie1__VectorIndexD1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexDOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList3_0h1_0__Tie1__VectorIndexH1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexHOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList3_0h1_0__Tie1__VectorIndexH1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexHOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList3_0s1_0__Tie1__VectorIndexS1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexSOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList3_0s1_0__Tie1__VectorIndexS1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexSOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexB1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexBOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexB1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexBOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexD1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexDOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexD1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexDOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexH1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexHOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexH1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexHOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexS1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexSOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexS1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexSOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__TypedVectorList4_0b1_0__Tie0__VectorIndexB1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_Tied, 0, CVT_95_addVectorIndexBOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList4_0d1_0__Tie0__VectorIndexD1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_Tied, 0, CVT_95_addVectorIndexDOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList4_0h1_0__Tie0__VectorIndexH1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_Tied, 0, CVT_95_addVectorIndexHOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList4_0s1_0__Tie0__VectorIndexS1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_Tied, 0, CVT_95_addVectorIndexSOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__VecListFour1281_1__Tie0__VectorIndexB1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_Tied, 0, CVT_95_addVectorIndexBOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListFour1281_1__Tie0__VectorIndexD1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_Tied, 0, CVT_95_addVectorIndexDOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListFour1281_1__Tie0__VectorIndexH1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_Tied, 0, CVT_95_addVectorIndexHOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListFour1281_1__Tie0__VectorIndexS1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_Tied, 0, CVT_95_addVectorIndexSOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_3__TypedVectorList4_0b1_0__Tie1__VectorIndexB1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexBOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList4_0b1_0__Tie1__VectorIndexB1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexBOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList4_0d1_0__Tie1__VectorIndexD1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexDOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList4_0d1_0__Tie1__VectorIndexD1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexDOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList4_0h1_0__Tie1__VectorIndexH1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexHOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList4_0h1_0__Tie1__VectorIndexH1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexHOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList4_0s1_0__Tie1__VectorIndexS1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexSOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList4_0s1_0__Tie1__VectorIndexS1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_Tied, 1, CVT_95_addVectorIndexSOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexB1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexBOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexB1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexBOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexD1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexDOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexD1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexDOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexH1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexHOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexH1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexHOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexS1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexSOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexS1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_Tied, 1, CVT_95_addVectorIndexSOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_1__Reg1_0__Reg1_3 + { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_95_Reg, 4, CVT_Done }, + // Convert__Reg1_0__GPR64sp01_2 + { CVT_95_Reg, 1, CVT_95_addRegOperands, 3, CVT_Done }, + // Convert__Reg1_0__Reg1_1__GPR64sp01_3 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addRegOperands, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_0, 0, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s161_4 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addSImm7s16Operands, 5, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s41_4 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addSImm7s4Operands, 5, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addSImm7s8Operands, 5, CVT_Done }, + // Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s161_5 + { CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addSImm7s16Operands, 6, CVT_Done }, + // Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_5 + { CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addSImm7s4Operands, 6, CVT_Done }, + // Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s81_5 + { CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addSImm7s8Operands, 6, CVT_Done }, + // Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s161_4 + { CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addSImm7s16Operands, 5, CVT_Done }, + // Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_4 + { CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addSImm7s4Operands, 5, CVT_Done }, + // Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s81_4 + { CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addSImm7s8Operands, 5, CVT_Done }, + // Convert__Reg1_0__Reg1_2__imm_95_0 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_0, 0, CVT_Done }, + // Convert__Reg1_2__Reg1_0__Tie0__SImm91_4 + { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addSImm9Operands, 5, CVT_Done }, + // Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_imm_95_0, 0, CVT_imm_95_0, 0, CVT_Done }, + // Convert__Reg1_0__Reg1_2__SImm9OffsetFB1281_3 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_2__UImm12Offset161_3 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addUImm12OffsetOperands_LT_16_GT_, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_2__SImm9OffsetFB161_3 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_2__UImm12Offset21_3 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addUImm12OffsetOperands_LT_2_GT_, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_2__SImm9OffsetFB321_3 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_2__UImm12Offset41_3 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addUImm12OffsetOperands_LT_4_GT_, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_2__SImm9OffsetFB641_3 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_2__UImm12Offset81_3 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addUImm12OffsetOperands_LT_8_GT_, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_2__SImm9OffsetFB81_3 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_2__UImm12Offset11_3 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addUImm12OffsetOperands_LT_1_GT_, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend1282_4 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemExtendOperands, 5, CVT_Done }, + // Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend1282_4 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemExtendOperands, 5, CVT_Done }, + // Convert__Reg1_2__Reg1_0__Tie0__SImm91_3 + { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addSImm9Operands, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend162_4 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemExtendOperands, 5, CVT_Done }, + // Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend162_4 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemExtendOperands, 5, CVT_Done }, + // Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend322_4 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemExtendOperands, 5, CVT_Done }, + // Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend322_4 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemExtendOperands, 5, CVT_Done }, + // Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend642_4 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemExtendOperands, 5, CVT_Done }, + // Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend642_4 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemExtendOperands, 5, CVT_Done }, + // Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend82_4 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemExtend8Operands, 5, CVT_Done }, + // Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend82_4 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemExtend8Operands, 5, CVT_Done }, + // Convert__Reg1_0__Reg1_2__SImm91_3 + { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addSImm9Operands, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_2__regWZR + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_regWZR, 0, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_2__regXZR + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_0 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_imm_95_0, 0, CVT_Done }, + // Convert__Reg1_0__regWZR__Reg1_1__imm_95_0 + { CVT_95_Reg, 1, CVT_regWZR, 0, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_Done }, + // Convert__Reg1_0__MOVZ32_lsl0MovAlias1_1__imm_95_0 + { CVT_95_Reg, 1, CVT_95_addMOVZMovAliasOperands_LT_0_GT_, 2, CVT_imm_95_0, 0, CVT_Done }, + // Convert__Reg1_0__MOVZ32_lsl16MovAlias1_1__imm_95_16 + { CVT_95_Reg, 1, CVT_95_addMOVZMovAliasOperands_LT_16_GT_, 2, CVT_imm_95_16, 0, CVT_Done }, + // Convert__Reg1_0__MOVN32_lsl0MovAlias1_1__imm_95_0 + { CVT_95_Reg, 1, CVT_95_addMOVNMovAliasOperands_LT_0_GT_, 2, CVT_imm_95_0, 0, CVT_Done }, + // Convert__Reg1_0__MOVN32_lsl16MovAlias1_1__imm_95_16 + { CVT_95_Reg, 1, CVT_95_addMOVNMovAliasOperands_LT_16_GT_, 2, CVT_imm_95_16, 0, CVT_Done }, + // Convert__Reg1_0__regWZR__LogicalImm321_1 + { CVT_95_Reg, 1, CVT_regWZR, 0, CVT_95_addLogicalImm32Operands, 2, CVT_Done }, + // Convert__Reg1_0__regXZR__Reg1_1__imm_95_0 + { CVT_95_Reg, 1, CVT_regXZR, 0, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_Done }, + // Convert__Reg1_0__MOVZ64_lsl0MovAlias1_1__imm_95_0 + { CVT_95_Reg, 1, CVT_95_addMOVZMovAliasOperands_LT_0_GT_, 2, CVT_imm_95_0, 0, CVT_Done }, + // Convert__Reg1_0__MOVZ64_lsl16MovAlias1_1__imm_95_16 + { CVT_95_Reg, 1, CVT_95_addMOVZMovAliasOperands_LT_16_GT_, 2, CVT_imm_95_16, 0, CVT_Done }, + // Convert__Reg1_0__MOVZ64_lsl32MovAlias1_1__imm_95_32 + { CVT_95_Reg, 1, CVT_95_addMOVZMovAliasOperands_LT_32_GT_, 2, CVT_imm_95_32, 0, CVT_Done }, + // Convert__Reg1_0__MOVZ64_lsl48MovAlias1_1__imm_95_48 + { CVT_95_Reg, 1, CVT_95_addMOVZMovAliasOperands_LT_48_GT_, 2, CVT_imm_95_48, 0, CVT_Done }, + // Convert__Reg1_0__MOVN64_lsl0MovAlias1_1__imm_95_0 + { CVT_95_Reg, 1, CVT_95_addMOVNMovAliasOperands_LT_0_GT_, 2, CVT_imm_95_0, 0, CVT_Done }, + // Convert__Reg1_0__MOVN64_lsl16MovAlias1_1__imm_95_16 + { CVT_95_Reg, 1, CVT_95_addMOVNMovAliasOperands_LT_16_GT_, 2, CVT_imm_95_16, 0, CVT_Done }, + // Convert__Reg1_0__MOVN64_lsl32MovAlias1_1__imm_95_32 + { CVT_95_Reg, 1, CVT_95_addMOVNMovAliasOperands_LT_32_GT_, 2, CVT_imm_95_32, 0, CVT_Done }, + // Convert__Reg1_0__MOVN64_lsl48MovAlias1_1__imm_95_48 + { CVT_95_Reg, 1, CVT_95_addMOVNMovAliasOperands_LT_48_GT_, 2, CVT_imm_95_48, 0, CVT_Done }, + // Convert__Reg1_0__regXZR__LogicalImm641_1 + { CVT_95_Reg, 1, CVT_regXZR, 0, CVT_95_addLogicalImm64Operands, 2, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_2 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorReg128Operands, 3, CVT_Done }, + // Convert__VectorReg641_1__VectorReg641_2__VectorReg641_2 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorReg64Operands, 3, CVT_Done }, + // Convert__Reg1_1__VectorReg1281_2__VectorIndexD1_3 + { CVT_95_Reg, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorIndexDOperands, 4, CVT_Done }, + // Convert__Reg1_1__VectorReg1281_2__VectorIndexS1_3 + { CVT_95_Reg, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorIndexSOperands, 4, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_2 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorReg128Operands, 3, CVT_Done }, + // Convert__VectorReg641_0__VectorReg641_2__VectorReg641_2 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorReg64Operands, 3, CVT_Done }, + // Convert__Reg1_0__SIMDImmType101_1 + { CVT_95_Reg, 1, CVT_95_addSIMDImmType10Operands, 2, CVT_Done }, + // Convert__VectorReg1281_1__Imm0_2551_2 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addImm0_95_255Operands, 3, CVT_Done }, + // Convert__VectorReg1281_1__SIMDImmType101_2 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addSIMDImmType10Operands, 3, CVT_Done }, + // Convert__VectorReg641_1__Imm0_2551_2__imm_95_0 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addImm0_95_255Operands, 3, CVT_imm_95_0, 0, CVT_Done }, + // Convert__VectorReg1281_1__Imm0_2551_2__imm_95_0 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addImm0_95_255Operands, 3, CVT_imm_95_0, 0, CVT_Done }, + // Convert__VectorReg641_1__Imm0_2551_2 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addImm0_95_255Operands, 3, CVT_Done }, + // Convert__VectorReg1281_0__Imm0_2551_2 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addImm0_95_255Operands, 3, CVT_Done }, + // Convert__VectorReg1281_0__SIMDImmType101_2 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addSIMDImmType10Operands, 3, CVT_Done }, + // Convert__VectorReg1281_0__Imm0_2551_2__imm_95_0 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addImm0_95_255Operands, 3, CVT_imm_95_0, 0, CVT_Done }, + // Convert__VectorReg641_0__Imm0_2551_2__imm_95_0 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addImm0_95_255Operands, 3, CVT_imm_95_0, 0, CVT_Done }, + // Convert__VectorReg641_0__Imm0_2551_2 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addImm0_95_255Operands, 3, CVT_Done }, + // Convert__VectorReg641_1__Imm0_2551_2__LogicalVecShifter1_3 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addImm0_95_255Operands, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__VectorReg641_1__Imm0_2551_2__MoveVecShifter1_3 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addImm0_95_255Operands, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__VectorReg641_1__Imm0_2551_2__LogicalVecHalfWordShifter1_3 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addImm0_95_255Operands, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__VectorReg1281_1__Imm0_2551_2__LogicalVecShifter1_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addImm0_95_255Operands, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__VectorReg1281_1__Imm0_2551_2__MoveVecShifter1_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addImm0_95_255Operands, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__VectorReg1281_1__Imm0_2551_2__LogicalVecHalfWordShifter1_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addImm0_95_255Operands, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__VectorReg1281_0__Imm0_2551_2__LogicalVecShifter1_3 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addImm0_95_255Operands, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__VectorReg1281_0__Imm0_2551_2__MoveVecShifter1_3 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addImm0_95_255Operands, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__VectorReg1281_0__Imm0_2551_2__LogicalVecHalfWordShifter1_3 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addImm0_95_255Operands, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__VectorReg641_0__Imm0_2551_2__LogicalVecShifter1_3 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addImm0_95_255Operands, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__VectorReg641_0__Imm0_2551_2__MoveVecShifter1_3 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addImm0_95_255Operands, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__VectorReg641_0__Imm0_2551_2__LogicalVecHalfWordShifter1_3 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addImm0_95_255Operands, 3, CVT_95_addShifterOperands, 4, CVT_Done }, + // Convert__Reg1_0__Tie0__Imm0_655351_1__imm_95_0 + { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImm0_95_65535Operands, 2, CVT_imm_95_0, 0, CVT_Done }, + // Convert__Reg1_0__Tie0__MovKSymbolG01_1__imm_95_0 + { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_imm_95_0, 0, CVT_Done }, + // Convert__Reg1_0__Tie0__MovKSymbolG11_1__imm_95_16 + { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_imm_95_16, 0, CVT_Done }, + // Convert__Reg1_0__Tie0__MovKSymbolG21_1__imm_95_32 + { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_imm_95_32, 0, CVT_Done }, + // Convert__Reg1_0__Tie0__MovKSymbolG31_1__imm_95_48 + { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_imm_95_48, 0, CVT_Done }, + // Convert__Reg1_0__Tie0__Imm0_655351_1__MovImm32Shifter1_2 + { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImm0_95_65535Operands, 2, CVT_95_addShifterOperands, 3, CVT_Done }, + // Convert__Reg1_0__Tie0__Imm0_655351_1__MovImm64Shifter1_2 + { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImm0_95_65535Operands, 2, CVT_95_addShifterOperands, 3, CVT_Done }, + // Convert__Reg1_0__Imm0_655351_1__imm_95_0 + { CVT_95_Reg, 1, CVT_95_addImm0_95_65535Operands, 2, CVT_imm_95_0, 0, CVT_Done }, + // Convert__Reg1_0__MovZSymbolG01_1__imm_95_0 + { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_imm_95_0, 0, CVT_Done }, + // Convert__Reg1_0__MovZSymbolG11_1__imm_95_16 + { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_imm_95_16, 0, CVT_Done }, + // Convert__Reg1_0__MovZSymbolG21_1__imm_95_32 + { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_imm_95_32, 0, CVT_Done }, + // Convert__Reg1_0__MovZSymbolG31_1__imm_95_48 + { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_imm_95_48, 0, CVT_Done }, + // Convert__Reg1_0__Imm0_655351_1__MovImm32Shifter1_2 + { CVT_95_Reg, 1, CVT_95_addImm0_95_65535Operands, 2, CVT_95_addShifterOperands, 3, CVT_Done }, + // Convert__Reg1_0__Imm0_655351_1__MovImm64Shifter1_2 + { CVT_95_Reg, 1, CVT_95_addImm0_95_65535Operands, 2, CVT_95_addShifterOperands, 3, CVT_Done }, + // Convert__Reg1_0__MRSSystemRegister1_1 + { CVT_95_Reg, 1, CVT_95_addMRSSystemRegisterOperands, 2, CVT_Done }, + // Convert__MSRSystemRegister1_0__Reg1_1 + { CVT_95_addMSRSystemRegisterOperands, 1, CVT_95_Reg, 2, CVT_Done }, + // Convert__SystemPStateFieldWithImm0_151_0__Imm0_151_1 + { CVT_95_addSystemPStateFieldWithImm0_95_15Operands, 1, CVT_95_addImm0_95_15Operands, 2, CVT_Done }, + // Convert__SystemPStateFieldWithImm0_11_0__Imm0_11_1 + { CVT_95_addSystemPStateFieldWithImm0_95_1Operands, 1, CVT_95_addImm0_95_1Operands, 2, CVT_Done }, + // Convert__Reg1_0__regWZR__Reg1_1__LogicalShifter321_2 + { CVT_95_Reg, 1, CVT_regWZR, 0, CVT_95_Reg, 2, CVT_95_addShifterOperands, 3, CVT_Done }, + // Convert__Reg1_0__regXZR__Reg1_1__LogicalShifter641_2 + { CVT_95_Reg, 1, CVT_regXZR, 0, CVT_95_Reg, 2, CVT_95_addShifterOperands, 3, CVT_Done }, + // Convert__Reg1_0__regWZR__Reg1_1__ArithmeticShifter321_2 + { CVT_95_Reg, 1, CVT_regWZR, 0, CVT_95_Reg, 2, CVT_95_addShifterOperands, 3, CVT_Done }, + // Convert__Reg1_0__regXZR__Reg1_1__ArithmeticShifter641_2 + { CVT_95_Reg, 1, CVT_regXZR, 0, CVT_95_Reg, 2, CVT_95_addShifterOperands, 3, CVT_Done }, + // Convert__Reg1_0__regWZR__Reg1_1 + { CVT_95_Reg, 1, CVT_regWZR, 0, CVT_95_Reg, 2, CVT_Done }, + // Convert__Reg1_0__regXZR__Reg1_1 + { CVT_95_Reg, 1, CVT_regXZR, 0, CVT_95_Reg, 2, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorReg64Operands, 4, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorReg64Operands, 5, CVT_Done }, + // Convert__Prefetch1_0__PCRelLabel191_1 + { CVT_95_addPrefetchOperands, 1, CVT_95_addPCRelLabel19Operands, 2, CVT_Done }, + // Convert__Prefetch1_0__Reg1_2__imm_95_0 + { CVT_95_addPrefetchOperands, 1, CVT_95_Reg, 3, CVT_imm_95_0, 0, CVT_Done }, + // Convert__Prefetch1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0 + { CVT_95_addPrefetchOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_imm_95_0, 0, CVT_imm_95_0, 0, CVT_Done }, + // Convert__Prefetch1_0__Reg1_2__UImm12Offset81_3 + { CVT_95_addPrefetchOperands, 1, CVT_95_Reg, 3, CVT_95_addUImm12OffsetOperands_LT_8_GT_, 4, CVT_Done }, + // Convert__Prefetch1_0__Reg1_2__Reg1_3__MemWExtend642_4 + { CVT_95_addPrefetchOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemExtendOperands, 5, CVT_Done }, + // Convert__Prefetch1_0__Reg1_2__Reg1_3__MemXExtend642_4 + { CVT_95_addPrefetchOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemExtendOperands, 5, CVT_Done }, + // Convert__Prefetch1_0__Reg1_2__SImm91_3 + { CVT_95_addPrefetchOperands, 1, CVT_95_Reg, 3, CVT_95_addSImm9Operands, 4, CVT_Done }, + // Convert__PSBHint1_0 + { CVT_95_addPSBHintOperands, 1, CVT_Done }, + // Convert__regLR + { CVT_regLR, 0, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_1__Imm0_311_2 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImm0_95_31Operands, 3, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_1__Imm0_631_2 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImm0_95_63Operands, 3, CVT_Done }, + // Convert__VectorReg641_1__VectorReg1281_2__Imm1_321_3 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm1_95_32Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__VectorReg1281_2__Imm1_161_3 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm1_95_16Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__VectorReg1281_2__Imm1_81_3 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm1_95_8Operands, 4, CVT_Done }, + // Convert__VectorReg641_0__VectorReg1281_2__Imm1_321_4 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm1_95_32Operands, 5, CVT_Done }, + // Convert__VectorReg641_0__VectorReg1281_2__Imm1_161_4 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm1_95_16Operands, 5, CVT_Done }, + // Convert__VectorReg641_0__VectorReg1281_2__Imm1_81_4 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm1_95_8Operands, 5, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_81_3 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm1_95_8Operands, 4, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_321_3 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm1_95_32Operands, 4, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_161_3 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm1_95_16Operands, 4, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_81_4 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm1_95_8Operands, 5, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_321_4 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm1_95_32Operands, 5, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_161_4 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm1_95_16Operands, 5, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorReg64Operands, 4, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorReg64Operands, 5, CVT_Done }, + // Convert__VectorReg641_1__Tie0__VectorReg641_2 + { CVT_95_addVectorReg64Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_Done }, + // Convert__VectorReg641_0__Tie0__VectorReg641_2 + { CVT_95_addVectorReg64Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg1281_2__VectorReg641_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorReg64Operands, 4, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg1281_2__VectorReg641_4 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorReg64Operands, 5, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Imm0_311_2__Imm0_311_3 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImm0_95_31Operands, 3, CVT_95_addImm0_95_31Operands, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Imm0_631_2__Imm0_631_3 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImm0_95_63Operands, 3, CVT_95_addImm0_95_63Operands, 4, CVT_Done }, + // Convert__imm_95_4 + { CVT_imm_95_4, 0, CVT_Done }, + // Convert__imm_95_5 + { CVT_imm_95_5, 0, CVT_Done }, + // Convert__Reg1_1__Tie0__Reg1_2__VectorReg1281_3 + { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addVectorReg128Operands, 4, CVT_Done }, + // Convert__Reg1_0__Tie0__Reg1_1__VectorReg1281_2 + { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addVectorReg128Operands, 3, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Imm0_631_2 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImm0_95_63Operands, 3, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg1281_2__Imm0_71_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm0_95_7Operands, 4, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg1281_2__Imm0_631_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm0_95_63Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__VectorReg641_2__Imm0_311_3 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm0_95_31Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__VectorReg641_2__Imm0_151_3 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm0_95_15Operands, 4, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg1281_2__Imm0_311_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm0_95_31Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__VectorReg641_2__Imm0_71_3 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm0_95_7Operands, 4, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg1281_2__Imm0_151_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm0_95_15Operands, 4, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg1281_2__Imm0_71_4 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm0_95_7Operands, 5, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg1281_2__Imm0_631_4 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm0_95_63Operands, 5, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg1281_2__Imm0_311_4 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm0_95_31Operands, 5, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg1281_2__Imm0_151_4 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm0_95_15Operands, 5, CVT_Done }, + // Convert__VectorReg641_0__VectorReg641_2__Imm0_311_4 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm0_95_31Operands, 5, CVT_Done }, + // Convert__VectorReg641_0__VectorReg641_2__Imm0_151_4 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm0_95_15Operands, 5, CVT_Done }, + // Convert__VectorReg641_0__VectorReg641_2__Imm0_71_4 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm0_95_7Operands, 5, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg641_2 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg64Operands, 3, CVT_Done }, + // Convert__Reg1_0__Tie0__Reg1_1__Imm0_631_2 + { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addImm0_95_63Operands, 3, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm0_71_3 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm0_95_7Operands, 4, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm0_631_3 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm0_95_63Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm0_311_3 + { CVT_95_addVectorReg64Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm0_95_31Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm0_151_3 + { CVT_95_addVectorReg64Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm0_95_15Operands, 4, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm0_311_3 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm0_95_31Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm0_71_3 + { CVT_95_addVectorReg64Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm0_95_7Operands, 4, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm0_151_3 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm0_95_15Operands, 4, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm0_71_4 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm0_95_7Operands, 5, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm0_631_4 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm0_95_63Operands, 5, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm0_311_4 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm0_95_31Operands, 5, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm0_151_4 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm0_95_15Operands, 5, CVT_Done }, + // Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm0_311_4 + { CVT_95_addVectorReg64Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm0_95_31Operands, 5, CVT_Done }, + // Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm0_151_4 + { CVT_95_addVectorReg64Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm0_95_15Operands, 5, CVT_Done }, + // Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm0_71_4 + { CVT_95_addVectorReg64Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm0_95_7Operands, 5, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorReg128Operands, 4, CVT_95_addVectorIndexSOperands, 5, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorRegLoOperands, 4, CVT_95_addVectorIndexHOperands, 5, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorReg128Operands, 5, CVT_95_addVectorIndexSOperands, 7, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorRegLoOperands, 5, CVT_95_addVectorIndexHOperands, 7, CVT_Done }, + // Convert__Reg1_1__VectorReg1281_2__VectorIndexB1_3 + { CVT_95_Reg, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorIndexBOperands, 4, CVT_Done }, + // Convert__Reg1_1__VectorReg1281_2__VectorIndexH1_3 + { CVT_95_Reg, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addVectorIndexHOperands, 4, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorReg128Operands, 4, CVT_95_addVectorIndexSOperands, 5, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorRegLoOperands, 4, CVT_95_addVectorIndexHOperands, 5, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorReg128Operands, 5, CVT_95_addVectorIndexSOperands, 7, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg64Operands, 3, CVT_95_addVectorRegLoOperands, 5, CVT_95_addVectorIndexHOperands, 7, CVT_Done }, + // Convert__Reg1_0__Tie0__Reg1_1__Reg1_2 + { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Imm1_81_2 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImm1_95_8Operands, 3, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Imm0_151_2 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImm0_95_15Operands, 3, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Imm0_311_2 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImm0_95_31Operands, 3, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Imm0_71_2 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImm0_95_7Operands, 3, CVT_Done }, + // Convert__VectorReg641_1__VectorReg1281_2 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_Done }, + // Convert__Reg1_0__Tie0__Reg1_1__Imm1_641_2 + { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addImm1_95_64Operands, 3, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_641_3 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm1_95_64Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm1_321_3 + { CVT_95_addVectorReg64Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm1_95_32Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm1_161_3 + { CVT_95_addVectorReg64Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm1_95_16Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm1_81_3 + { CVT_95_addVectorReg64Operands, 2, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm1_95_8Operands, 4, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_641_4 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm1_95_64Operands, 5, CVT_Done }, + // Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm1_321_4 + { CVT_95_addVectorReg64Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm1_95_32Operands, 5, CVT_Done }, + // Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm1_161_4 + { CVT_95_addVectorReg64Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm1_95_16Operands, 5, CVT_Done }, + // Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm1_81_4 + { CVT_95_addVectorReg64Operands, 1, CVT_Tied, 0, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm1_95_8Operands, 5, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg1281_2__Imm1_81_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm1_95_8Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__VectorReg641_2__Imm1_81_3 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm1_95_8Operands, 4, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg1281_2__Imm1_81_4 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_95_addImm1_95_8Operands, 5, CVT_Done }, + // Convert__VectorReg641_0__VectorReg641_2__Imm1_81_4 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm1_95_8Operands, 5, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg641_2__Imm0_311_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm0_95_31Operands, 4, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg641_2__Imm0_151_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm0_95_15Operands, 4, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg641_2__Imm0_71_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm0_95_7Operands, 4, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg641_2__Imm0_311_4 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm0_95_31Operands, 5, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg641_2__Imm0_151_4 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm0_95_15Operands, 5, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg641_2__Imm0_71_4 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg64Operands, 3, CVT_95_addImm0_95_7Operands, 5, CVT_Done }, + // Convert__TypedVectorList1_0b1_0__VectorIndexB1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_95_addVectorIndexBOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList1_0d1_0__VectorIndexD1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_95_addVectorIndexDOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList1_0h1_0__VectorIndexH1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_95_addVectorIndexHOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList1_0s1_0__VectorIndexS1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_95_addVectorIndexSOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__VecListOne1281_1__VectorIndexB1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_95_addVectorIndexBOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListOne1281_1__VectorIndexD1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_95_addVectorIndexDOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListOne1281_1__VectorIndexH1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_95_addVectorIndexHOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListOne1281_1__VectorIndexS1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_95_addVectorIndexSOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_3__TypedVectorList1_0b1_0__VectorIndexB1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_95_addVectorIndexBOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList1_0b1_0__VectorIndexB1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_95_addVectorIndexBOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList1_0d1_0__VectorIndexD1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_95_addVectorIndexDOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList1_0d1_0__VectorIndexD1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_95_addVectorIndexDOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList1_0h1_0__VectorIndexH1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_95_addVectorIndexHOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList1_0h1_0__VectorIndexH1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_95_addVectorIndexHOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList1_0s1_0__VectorIndexS1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_95_addVectorIndexSOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList1_0s1_0__VectorIndexS1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_1_GT_, 1, CVT_95_addVectorIndexSOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_4__VecListOne1281_1__VectorIndexB1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_95_addVectorIndexBOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListOne1281_1__VectorIndexB1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_95_addVectorIndexBOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListOne1281_1__VectorIndexD1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_95_addVectorIndexDOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListOne1281_1__VectorIndexD1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_95_addVectorIndexDOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListOne1281_1__VectorIndexH1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_95_addVectorIndexHOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListOne1281_1__VectorIndexH1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_95_addVectorIndexHOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListOne1281_1__VectorIndexS1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_95_addVectorIndexSOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListOne1281_1__VectorIndexS1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_1_GT_, 2, CVT_95_addVectorIndexSOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__TypedVectorList2_0b1_0__VectorIndexB1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_95_addVectorIndexBOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList2_0d1_0__VectorIndexD1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_95_addVectorIndexDOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList2_0h1_0__VectorIndexH1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_95_addVectorIndexHOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList2_0s1_0__VectorIndexS1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_95_addVectorIndexSOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__VecListTwo1281_1__VectorIndexB1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_95_addVectorIndexBOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListTwo1281_1__VectorIndexD1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_95_addVectorIndexDOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListTwo1281_1__VectorIndexH1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_95_addVectorIndexHOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListTwo1281_1__VectorIndexS1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_95_addVectorIndexSOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_3__TypedVectorList2_0b1_0__VectorIndexB1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_95_addVectorIndexBOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList2_0b1_0__VectorIndexB1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_95_addVectorIndexBOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList2_0d1_0__VectorIndexD1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_95_addVectorIndexDOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList2_0d1_0__VectorIndexD1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_95_addVectorIndexDOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList2_0h1_0__VectorIndexH1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_95_addVectorIndexHOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList2_0h1_0__VectorIndexH1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_95_addVectorIndexHOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList2_0s1_0__VectorIndexS1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_95_addVectorIndexSOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList2_0s1_0__VectorIndexS1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_2_GT_, 1, CVT_95_addVectorIndexSOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_4__VecListTwo1281_1__VectorIndexB1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_95_addVectorIndexBOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListTwo1281_1__VectorIndexB1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_95_addVectorIndexBOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListTwo1281_1__VectorIndexD1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_95_addVectorIndexDOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListTwo1281_1__VectorIndexD1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_95_addVectorIndexDOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListTwo1281_1__VectorIndexH1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_95_addVectorIndexHOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListTwo1281_1__VectorIndexH1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_95_addVectorIndexHOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListTwo1281_1__VectorIndexS1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_95_addVectorIndexSOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListTwo1281_1__VectorIndexS1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_2_GT_, 2, CVT_95_addVectorIndexSOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__TypedVectorList3_0b1_0__VectorIndexB1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_95_addVectorIndexBOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList3_0d1_0__VectorIndexD1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_95_addVectorIndexDOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList3_0h1_0__VectorIndexH1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_95_addVectorIndexHOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList3_0s1_0__VectorIndexS1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_95_addVectorIndexSOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__VecListThree1281_1__VectorIndexB1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_95_addVectorIndexBOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListThree1281_1__VectorIndexD1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_95_addVectorIndexDOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListThree1281_1__VectorIndexH1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_95_addVectorIndexHOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListThree1281_1__VectorIndexS1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_95_addVectorIndexSOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_3__TypedVectorList3_0b1_0__VectorIndexB1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_95_addVectorIndexBOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList3_0b1_0__VectorIndexB1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_95_addVectorIndexBOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList3_0d1_0__VectorIndexD1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_95_addVectorIndexDOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList3_0d1_0__VectorIndexD1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_95_addVectorIndexDOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList3_0h1_0__VectorIndexH1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_95_addVectorIndexHOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList3_0h1_0__VectorIndexH1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_95_addVectorIndexHOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList3_0s1_0__VectorIndexS1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_95_addVectorIndexSOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList3_0s1_0__VectorIndexS1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_3_GT_, 1, CVT_95_addVectorIndexSOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_4__VecListThree1281_1__VectorIndexB1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_95_addVectorIndexBOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListThree1281_1__VectorIndexB1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_95_addVectorIndexBOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListThree1281_1__VectorIndexD1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_95_addVectorIndexDOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListThree1281_1__VectorIndexD1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_95_addVectorIndexDOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListThree1281_1__VectorIndexH1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_95_addVectorIndexHOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListThree1281_1__VectorIndexH1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_95_addVectorIndexHOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListThree1281_1__VectorIndexS1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_95_addVectorIndexSOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListThree1281_1__VectorIndexS1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_3_GT_, 2, CVT_95_addVectorIndexSOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__TypedVectorList4_0b1_0__VectorIndexB1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_95_addVectorIndexBOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList4_0d1_0__VectorIndexD1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_95_addVectorIndexDOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList4_0h1_0__VectorIndexH1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_95_addVectorIndexHOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__TypedVectorList4_0s1_0__VectorIndexS1_1__Reg1_3 + { CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_95_addVectorIndexSOperands, 2, CVT_95_Reg, 4, CVT_Done }, + // Convert__VecListFour1281_1__VectorIndexB1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_95_addVectorIndexBOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListFour1281_1__VectorIndexD1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_95_addVectorIndexDOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListFour1281_1__VectorIndexH1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_95_addVectorIndexHOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__VecListFour1281_1__VectorIndexS1_2__Reg1_4 + { CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_95_addVectorIndexSOperands, 3, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_3__TypedVectorList4_0b1_0__VectorIndexB1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_95_addVectorIndexBOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList4_0b1_0__VectorIndexB1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_95_addVectorIndexBOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList4_0d1_0__VectorIndexD1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_95_addVectorIndexDOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList4_0d1_0__VectorIndexD1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_95_addVectorIndexDOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList4_0h1_0__VectorIndexH1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_95_addVectorIndexHOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList4_0h1_0__VectorIndexH1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_95_addVectorIndexHOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_3__TypedVectorList4_0s1_0__VectorIndexS1_1__Tie0__regXZR + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_95_addVectorIndexSOperands, 2, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_3__TypedVectorList4_0s1_0__VectorIndexS1_1__Tie0__Reg1_5 + { CVT_95_Reg, 4, CVT_95_addVectorList128Operands_LT_4_GT_, 1, CVT_95_addVectorIndexSOperands, 2, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, + // Convert__Reg1_4__VecListFour1281_1__VectorIndexB1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_95_addVectorIndexBOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListFour1281_1__VectorIndexB1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_95_addVectorIndexBOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListFour1281_1__VectorIndexD1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_95_addVectorIndexDOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListFour1281_1__VectorIndexD1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_95_addVectorIndexDOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListFour1281_1__VectorIndexH1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_95_addVectorIndexHOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListFour1281_1__VectorIndexH1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_95_addVectorIndexHOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__Reg1_4__VecListFour1281_1__VectorIndexS1_2__Tie0__regXZR + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_95_addVectorIndexSOperands, 3, CVT_Tied, 0, CVT_regXZR, 0, CVT_Done }, + // Convert__Reg1_4__VecListFour1281_1__VectorIndexS1_2__Tie0__Reg1_6 + { CVT_95_Reg, 5, CVT_95_addVectorList128Operands_LT_4_GT_, 2, CVT_95_addVectorIndexSOperands, 3, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, + // Convert__regWZR__Reg1_0__Reg1_2 + { CVT_regWZR, 0, CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__regXZR__Reg1_0__Reg1_2 + { CVT_regXZR, 0, CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_2__GPR64sp01_4 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addRegOperands, 5, CVT_Done }, + // Convert__Reg1_0__Tie0__Reg1_1 + { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_Done }, + // Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_7 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_imm_95_7, 0, CVT_Done }, + // Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_15 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_imm_95_15, 0, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg641_2__imm_95_0 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg64Operands, 3, CVT_imm_95_0, 0, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg641_2__imm_95_0 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg64Operands, 3, CVT_imm_95_0, 0, CVT_Done }, + // Convert__VectorReg1281_1__VectorReg1281_2__imm_95_0 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorReg128Operands, 3, CVT_imm_95_0, 0, CVT_Done }, + // Convert__VectorReg1281_0__VectorReg1281_2__imm_95_0 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorReg128Operands, 3, CVT_imm_95_0, 0, CVT_Done }, + // Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_31 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_imm_95_31, 0, CVT_Done }, + // Convert__Imm0_71_0__SysCR1_1__SysCR1_2__Imm0_71_3__regXZR + { CVT_95_addImm0_95_7Operands, 1, CVT_95_addSysCROperands, 2, CVT_95_addSysCROperands, 3, CVT_95_addImm0_95_7Operands, 4, CVT_regXZR, 0, CVT_Done }, + // Convert__Imm0_71_0__SysCR1_1__SysCR1_2__Imm0_71_3__Reg1_4 + { CVT_95_addImm0_95_7Operands, 1, CVT_95_addSysCROperands, 2, CVT_95_addSysCROperands, 3, CVT_95_addImm0_95_7Operands, 4, CVT_95_Reg, 5, CVT_Done }, + // Convert__Reg1_0__Imm0_71_1__SysCR1_2__SysCR1_3__Imm0_71_4 + { CVT_95_Reg, 1, CVT_95_addImm0_95_7Operands, 2, CVT_95_addSysCROperands, 3, CVT_95_addSysCROperands, 4, CVT_95_addImm0_95_7Operands, 5, CVT_Done }, + // Convert__VectorReg1281_1__VecListFour1281_2__VectorReg1281_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorList128Operands_LT_4_GT_, 3, CVT_95_addVectorReg128Operands, 4, CVT_Done }, + // Convert__VectorReg1281_1__VecListOne1281_2__VectorReg1281_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorList128Operands_LT_1_GT_, 3, CVT_95_addVectorReg128Operands, 4, CVT_Done }, + // Convert__VectorReg1281_1__VecListThree1281_2__VectorReg1281_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorList128Operands_LT_3_GT_, 3, CVT_95_addVectorReg128Operands, 4, CVT_Done }, + // Convert__VectorReg1281_1__VecListTwo1281_2__VectorReg1281_3 + { CVT_95_addVectorReg128Operands, 2, CVT_95_addVectorList128Operands_LT_2_GT_, 3, CVT_95_addVectorReg128Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__VecListFour1281_2__VectorReg641_3 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorList128Operands_LT_4_GT_, 3, CVT_95_addVectorReg64Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__VecListOne1281_2__VectorReg641_3 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorList128Operands_LT_1_GT_, 3, CVT_95_addVectorReg64Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__VecListThree1281_2__VectorReg641_3 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorList128Operands_LT_3_GT_, 3, CVT_95_addVectorReg64Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__VecListTwo1281_2__VectorReg641_3 + { CVT_95_addVectorReg64Operands, 2, CVT_95_addVectorList128Operands_LT_2_GT_, 3, CVT_95_addVectorReg64Operands, 4, CVT_Done }, + // Convert__VectorReg1281_0__TypedVectorList4_16b1_2__VectorReg1281_3 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorList128Operands_LT_4_GT_, 3, CVT_95_addVectorReg128Operands, 4, CVT_Done }, + // Convert__VectorReg1281_0__TypedVectorList1_16b1_2__VectorReg1281_3 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorList128Operands_LT_1_GT_, 3, CVT_95_addVectorReg128Operands, 4, CVT_Done }, + // Convert__VectorReg1281_0__TypedVectorList3_16b1_2__VectorReg1281_3 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorList128Operands_LT_3_GT_, 3, CVT_95_addVectorReg128Operands, 4, CVT_Done }, + // Convert__VectorReg1281_0__TypedVectorList2_16b1_2__VectorReg1281_3 + { CVT_95_addVectorReg128Operands, 1, CVT_95_addVectorList128Operands_LT_2_GT_, 3, CVT_95_addVectorReg128Operands, 4, CVT_Done }, + // Convert__VectorReg641_0__TypedVectorList4_16b1_2__VectorReg641_3 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorList128Operands_LT_4_GT_, 3, CVT_95_addVectorReg64Operands, 4, CVT_Done }, + // Convert__VectorReg641_0__TypedVectorList1_16b1_2__VectorReg641_3 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorList128Operands_LT_1_GT_, 3, CVT_95_addVectorReg64Operands, 4, CVT_Done }, + // Convert__VectorReg641_0__TypedVectorList3_16b1_2__VectorReg641_3 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorList128Operands_LT_3_GT_, 3, CVT_95_addVectorReg64Operands, 4, CVT_Done }, + // Convert__VectorReg641_0__TypedVectorList2_16b1_2__VectorReg641_3 + { CVT_95_addVectorReg64Operands, 1, CVT_95_addVectorList128Operands_LT_2_GT_, 3, CVT_95_addVectorReg64Operands, 4, CVT_Done }, + // Convert__Reg1_0__Imm0_311_1__BranchTarget141_2 + { CVT_95_Reg, 1, CVT_95_addImm0_95_31Operands, 2, CVT_95_addBranchTarget14Operands, 3, CVT_Done }, + // Convert__Reg1_0__Imm32_631_1__BranchTarget141_2 + { CVT_95_Reg, 1, CVT_95_addImm32_95_63Operands, 2, CVT_95_addBranchTarget14Operands, 3, CVT_Done }, + // Convert__GPR32as641_0__TBZImm0_311_1__BranchTarget141_2 + { CVT_95_addGPR32as64Operands, 1, CVT_95_addImm0_95_31Operands, 2, CVT_95_addBranchTarget14Operands, 3, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VecListFour1281_2__VectorReg1281_3 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorList128Operands_LT_4_GT_, 3, CVT_95_addVectorReg128Operands, 4, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VecListOne1281_2__VectorReg1281_3 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorList128Operands_LT_1_GT_, 3, CVT_95_addVectorReg128Operands, 4, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VecListThree1281_2__VectorReg1281_3 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorList128Operands_LT_3_GT_, 3, CVT_95_addVectorReg128Operands, 4, CVT_Done }, + // Convert__VectorReg1281_1__Tie0__VecListTwo1281_2__VectorReg1281_3 + { CVT_95_addVectorReg128Operands, 2, CVT_Tied, 0, CVT_95_addVectorList128Operands_LT_2_GT_, 3, CVT_95_addVectorReg128Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__Tie0__VecListFour1281_2__VectorReg641_3 + { CVT_95_addVectorReg64Operands, 2, CVT_Tied, 0, CVT_95_addVectorList128Operands_LT_4_GT_, 3, CVT_95_addVectorReg64Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__Tie0__VecListOne1281_2__VectorReg641_3 + { CVT_95_addVectorReg64Operands, 2, CVT_Tied, 0, CVT_95_addVectorList128Operands_LT_1_GT_, 3, CVT_95_addVectorReg64Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__Tie0__VecListThree1281_2__VectorReg641_3 + { CVT_95_addVectorReg64Operands, 2, CVT_Tied, 0, CVT_95_addVectorList128Operands_LT_3_GT_, 3, CVT_95_addVectorReg64Operands, 4, CVT_Done }, + // Convert__VectorReg641_1__Tie0__VecListTwo1281_2__VectorReg641_3 + { CVT_95_addVectorReg64Operands, 2, CVT_Tied, 0, CVT_95_addVectorList128Operands_LT_2_GT_, 3, CVT_95_addVectorReg64Operands, 4, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__TypedVectorList4_16b1_2__VectorReg1281_3 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorList128Operands_LT_4_GT_, 3, CVT_95_addVectorReg128Operands, 4, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__TypedVectorList1_16b1_2__VectorReg1281_3 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorList128Operands_LT_1_GT_, 3, CVT_95_addVectorReg128Operands, 4, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__TypedVectorList3_16b1_2__VectorReg1281_3 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorList128Operands_LT_3_GT_, 3, CVT_95_addVectorReg128Operands, 4, CVT_Done }, + // Convert__VectorReg1281_0__Tie0__TypedVectorList2_16b1_2__VectorReg1281_3 + { CVT_95_addVectorReg128Operands, 1, CVT_Tied, 0, CVT_95_addVectorList128Operands_LT_2_GT_, 3, CVT_95_addVectorReg128Operands, 4, CVT_Done }, + // Convert__VectorReg641_0__Tie0__TypedVectorList4_16b1_2__VectorReg641_3 + { CVT_95_addVectorReg64Operands, 1, CVT_Tied, 0, CVT_95_addVectorList128Operands_LT_4_GT_, 3, CVT_95_addVectorReg64Operands, 4, CVT_Done }, + // Convert__VectorReg641_0__Tie0__TypedVectorList1_16b1_2__VectorReg641_3 + { CVT_95_addVectorReg64Operands, 1, CVT_Tied, 0, CVT_95_addVectorList128Operands_LT_1_GT_, 3, CVT_95_addVectorReg64Operands, 4, CVT_Done }, + // Convert__VectorReg641_0__Tie0__TypedVectorList3_16b1_2__VectorReg641_3 + { CVT_95_addVectorReg64Operands, 1, CVT_Tied, 0, CVT_95_addVectorList128Operands_LT_3_GT_, 3, CVT_95_addVectorReg64Operands, 4, CVT_Done }, + // Convert__VectorReg641_0__Tie0__TypedVectorList2_16b1_2__VectorReg641_3 + { CVT_95_addVectorReg64Operands, 1, CVT_Tied, 0, CVT_95_addVectorList128Operands_LT_2_GT_, 3, CVT_95_addVectorReg64Operands, 4, CVT_Done }, + // Convert__regWZR__Reg1_0__LogicalImm321_1 + { CVT_regWZR, 0, CVT_95_Reg, 1, CVT_95_addLogicalImm32Operands, 2, CVT_Done }, + // Convert__regXZR__Reg1_0__LogicalImm641_1 + { CVT_regXZR, 0, CVT_95_Reg, 1, CVT_95_addLogicalImm64Operands, 2, CVT_Done }, + // Convert__regWZR__Reg1_0__Reg1_1__LogicalShifter321_2 + { CVT_regWZR, 0, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addShifterOperands, 3, CVT_Done }, + // Convert__regXZR__Reg1_0__Reg1_1__LogicalShifter641_2 + { CVT_regXZR, 0, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addShifterOperands, 3, CVT_Done }, + // Convert__imm_95_2 + { CVT_imm_95_2, 0, CVT_Done }, + // Convert__imm_95_3 + { CVT_imm_95_3, 0, CVT_Done }, + // Convert__imm_95_1 + { CVT_imm_95_1, 0, CVT_Done }, +}; + +void AArch64AsmParser:: +convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, + const OperandVector &Operands) { + assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); + const uint8_t *Converter = ConversionTable[Kind]; + Inst.setOpcode(Opcode); + for (const uint8_t *p = Converter; *p; p+= 2) { + switch (*p) { + default: llvm_unreachable("invalid conversion entry!"); + case CVT_Reg: + static_cast(*Operands[*(p + 1)]).addRegOperands(Inst, 1); + break; + case CVT_Tied: + Inst.addOperand(Inst.getOperand(*(p + 1))); + break; + case CVT_95_Reg: + static_cast(*Operands[*(p + 1)]).addRegOperands(Inst, 1); + break; + case CVT_95_addVectorReg128Operands: + static_cast(*Operands[*(p + 1)]).addVectorReg128Operands(Inst, 1); + break; + case CVT_95_addVectorReg64Operands: + static_cast(*Operands[*(p + 1)]).addVectorReg64Operands(Inst, 1); + break; + case CVT_imm_95_16: + Inst.addOperand(MCOperand::createImm(16)); + break; + case CVT_imm_95_24: + Inst.addOperand(MCOperand::createImm(24)); + break; + case CVT_imm_95_0: + Inst.addOperand(MCOperand::createImm(0)); + break; + case CVT_95_addAddSubImmNegOperands: + static_cast(*Operands[*(p + 1)]).addAddSubImmNegOperands(Inst, 2); + break; + case CVT_95_addAddSubImmOperands: + static_cast(*Operands[*(p + 1)]).addAddSubImmOperands(Inst, 2); + break; + case CVT_95_addShifterOperands: + static_cast(*Operands[*(p + 1)]).addShifterOperands(Inst, 1); + break; + case CVT_95_addExtendOperands: + static_cast(*Operands[*(p + 1)]).addExtendOperands(Inst, 1); + break; + case CVT_95_addExtend64Operands: + static_cast(*Operands[*(p + 1)]).addExtend64Operands(Inst, 1); + break; + case CVT_95_addAdrLabelOperands: + static_cast(*Operands[*(p + 1)]).addAdrLabelOperands(Inst, 1); + break; + case CVT_95_addAdrpLabelOperands: + static_cast(*Operands[*(p + 1)]).addAdrpLabelOperands(Inst, 1); + break; + case CVT_95_addLogicalImm32Operands: + static_cast(*Operands[*(p + 1)]).addLogicalImm32Operands(Inst, 1); + break; + case CVT_95_addLogicalImm64Operands: + static_cast(*Operands[*(p + 1)]).addLogicalImm64Operands(Inst, 1); + break; + case CVT_95_addImm0_95_31Operands: + static_cast(*Operands[*(p + 1)]).addImm0_31Operands(Inst, 1); + break; + case CVT_imm_95_31: + Inst.addOperand(MCOperand::createImm(31)); + break; + case CVT_95_addImm0_95_63Operands: + static_cast(*Operands[*(p + 1)]).addImm0_63Operands(Inst, 1); + break; + case CVT_imm_95_63: + Inst.addOperand(MCOperand::createImm(63)); + break; + case CVT_95_addBranchTarget26Operands: + static_cast(*Operands[*(p + 1)]).addBranchTarget26Operands(Inst, 1); + break; + case CVT_95_addCondCodeOperands: + static_cast(*Operands[*(p + 1)]).addCondCodeOperands(Inst, 1); + break; + case CVT_95_addPCRelLabel19Operands: + static_cast(*Operands[*(p + 1)]).addPCRelLabel19Operands(Inst, 1); + break; + case CVT_95_addImm0_95_255Operands: + static_cast(*Operands[*(p + 1)]).addImm0_255Operands(Inst, 1); + break; + case CVT_95_addLogicalImm32NotOperands: + static_cast(*Operands[*(p + 1)]).addLogicalImm32NotOperands(Inst, 1); + break; + case CVT_95_addLogicalImm64NotOperands: + static_cast(*Operands[*(p + 1)]).addLogicalImm64NotOperands(Inst, 1); + break; + case CVT_95_addImm0_95_65535Operands: + static_cast(*Operands[*(p + 1)]).addImm0_65535Operands(Inst, 1); + break; + case CVT_95_addRegOperands: + static_cast(*Operands[*(p + 1)]).addRegOperands(Inst, 1); + break; + case CVT_95_addImm0_95_15Operands: + static_cast(*Operands[*(p + 1)]).addImm0_15Operands(Inst, 1); + break; + case CVT_imm_95_15: + Inst.addOperand(MCOperand::createImm(15)); + break; + case CVT_regWZR: + Inst.addOperand(MCOperand::createReg(AArch64::WZR)); + break; + case CVT_regXZR: + Inst.addOperand(MCOperand::createReg(AArch64::XZR)); + break; + case CVT_95_addBarrierOperands: + static_cast(*Operands[*(p + 1)]).addBarrierOperands(Inst, 1); + break; + case CVT_95_addVectorIndexHOperands: + static_cast(*Operands[*(p + 1)]).addVectorIndexHOperands(Inst, 1); + break; + case CVT_95_addVectorIndexSOperands: + static_cast(*Operands[*(p + 1)]).addVectorIndexSOperands(Inst, 1); + break; + case CVT_95_addVectorIndexDOperands: + static_cast(*Operands[*(p + 1)]).addVectorIndexDOperands(Inst, 1); + break; + case CVT_95_addVectorIndexBOperands: + static_cast(*Operands[*(p + 1)]).addVectorIndexBOperands(Inst, 1); + break; + case CVT_95_addImmOperands: + static_cast(*Operands[*(p + 1)]).addImmOperands(Inst, 1); + break; + case CVT_95_addImm1_95_16Operands: + static_cast(*Operands[*(p + 1)]).addImm1_16Operands(Inst, 1); + break; + case CVT_95_addImm1_95_32Operands: + static_cast(*Operands[*(p + 1)]).addImm1_32Operands(Inst, 1); + break; + case CVT_95_addImm1_95_64Operands: + static_cast(*Operands[*(p + 1)]).addImm1_64Operands(Inst, 1); + break; + case CVT_95_addVectorRegLoOperands: + static_cast(*Operands[*(p + 1)]).addVectorRegLoOperands(Inst, 1); + break; + case CVT_95_addFPImmOperands: + static_cast(*Operands[*(p + 1)]).addFPImmOperands(Inst, 1); + break; + case CVT_95_addVectorIndex1Operands: + static_cast(*Operands[*(p + 1)]).addVectorIndex1Operands(Inst, 1); + break; + case CVT_95_addImm0_95_127Operands: + static_cast(*Operands[*(p + 1)]).addImm0_127Operands(Inst, 1); + break; + case CVT_95_addVectorList128Operands_LT_4_GT_: + static_cast(*Operands[*(p + 1)]).addVectorList128Operands<4>(Inst, 1); + break; + case CVT_95_addVectorList64Operands_LT_4_GT_: + static_cast(*Operands[*(p + 1)]).addVectorList64Operands<4>(Inst, 1); + break; + case CVT_95_addVectorList128Operands_LT_1_GT_: + static_cast(*Operands[*(p + 1)]).addVectorList128Operands<1>(Inst, 1); + break; + case CVT_95_addVectorList64Operands_LT_1_GT_: + static_cast(*Operands[*(p + 1)]).addVectorList64Operands<1>(Inst, 1); + break; + case CVT_95_addVectorList128Operands_LT_3_GT_: + static_cast(*Operands[*(p + 1)]).addVectorList128Operands<3>(Inst, 1); + break; + case CVT_95_addVectorList64Operands_LT_3_GT_: + static_cast(*Operands[*(p + 1)]).addVectorList64Operands<3>(Inst, 1); + break; + case CVT_95_addVectorList128Operands_LT_2_GT_: + static_cast(*Operands[*(p + 1)]).addVectorList128Operands<2>(Inst, 1); + break; + case CVT_95_addVectorList64Operands_LT_2_GT_: + static_cast(*Operands[*(p + 1)]).addVectorList64Operands<2>(Inst, 1); + break; + case CVT_95_addSImm7s16Operands: + static_cast(*Operands[*(p + 1)]).addSImm7s16Operands(Inst, 1); + break; + case CVT_95_addSImm7s4Operands: + static_cast(*Operands[*(p + 1)]).addSImm7s4Operands(Inst, 1); + break; + case CVT_95_addSImm7s8Operands: + static_cast(*Operands[*(p + 1)]).addSImm7s8Operands(Inst, 1); + break; + case CVT_95_addSImm9Operands: + static_cast(*Operands[*(p + 1)]).addSImm9Operands(Inst, 1); + break; + case CVT_95_addUImm12OffsetOperands_LT_16_GT_: + static_cast(*Operands[*(p + 1)]).addUImm12OffsetOperands<16>(Inst, 1); + break; + case CVT_95_addUImm12OffsetOperands_LT_2_GT_: + static_cast(*Operands[*(p + 1)]).addUImm12OffsetOperands<2>(Inst, 1); + break; + case CVT_95_addUImm12OffsetOperands_LT_4_GT_: + static_cast(*Operands[*(p + 1)]).addUImm12OffsetOperands<4>(Inst, 1); + break; + case CVT_95_addUImm12OffsetOperands_LT_8_GT_: + static_cast(*Operands[*(p + 1)]).addUImm12OffsetOperands<8>(Inst, 1); + break; + case CVT_95_addUImm12OffsetOperands_LT_1_GT_: + static_cast(*Operands[*(p + 1)]).addUImm12OffsetOperands<1>(Inst, 1); + break; + case CVT_95_addMemExtendOperands: + static_cast(*Operands[*(p + 1)]).addMemExtendOperands(Inst, 2); + break; + case CVT_95_addMemExtend8Operands: + static_cast(*Operands[*(p + 1)]).addMemExtend8Operands(Inst, 2); + break; + case CVT_95_addMOVZMovAliasOperands_LT_0_GT_: + static_cast(*Operands[*(p + 1)]).addMOVZMovAliasOperands<0>(Inst, 1); + break; + case CVT_95_addMOVZMovAliasOperands_LT_16_GT_: + static_cast(*Operands[*(p + 1)]).addMOVZMovAliasOperands<16>(Inst, 1); + break; + case CVT_95_addMOVNMovAliasOperands_LT_0_GT_: + static_cast(*Operands[*(p + 1)]).addMOVNMovAliasOperands<0>(Inst, 1); + break; + case CVT_95_addMOVNMovAliasOperands_LT_16_GT_: + static_cast(*Operands[*(p + 1)]).addMOVNMovAliasOperands<16>(Inst, 1); + break; + case CVT_95_addMOVZMovAliasOperands_LT_32_GT_: + static_cast(*Operands[*(p + 1)]).addMOVZMovAliasOperands<32>(Inst, 1); + break; + case CVT_imm_95_32: + Inst.addOperand(MCOperand::createImm(32)); + break; + case CVT_95_addMOVZMovAliasOperands_LT_48_GT_: + static_cast(*Operands[*(p + 1)]).addMOVZMovAliasOperands<48>(Inst, 1); + break; + case CVT_imm_95_48: + Inst.addOperand(MCOperand::createImm(48)); + break; + case CVT_95_addMOVNMovAliasOperands_LT_32_GT_: + static_cast(*Operands[*(p + 1)]).addMOVNMovAliasOperands<32>(Inst, 1); + break; + case CVT_95_addMOVNMovAliasOperands_LT_48_GT_: + static_cast(*Operands[*(p + 1)]).addMOVNMovAliasOperands<48>(Inst, 1); + break; + case CVT_95_addSIMDImmType10Operands: + static_cast(*Operands[*(p + 1)]).addSIMDImmType10Operands(Inst, 1); + break; + case CVT_95_addMRSSystemRegisterOperands: + static_cast(*Operands[*(p + 1)]).addMRSSystemRegisterOperands(Inst, 1); + break; + case CVT_95_addMSRSystemRegisterOperands: + static_cast(*Operands[*(p + 1)]).addMSRSystemRegisterOperands(Inst, 1); + break; + case CVT_95_addSystemPStateFieldWithImm0_95_15Operands: + static_cast(*Operands[*(p + 1)]).addSystemPStateFieldWithImm0_15Operands(Inst, 1); + break; + case CVT_95_addSystemPStateFieldWithImm0_95_1Operands: + static_cast(*Operands[*(p + 1)]).addSystemPStateFieldWithImm0_1Operands(Inst, 1); + break; + case CVT_95_addImm0_95_1Operands: + static_cast(*Operands[*(p + 1)]).addImm0_1Operands(Inst, 1); + break; + case CVT_95_addPrefetchOperands: + static_cast(*Operands[*(p + 1)]).addPrefetchOperands(Inst, 1); + break; + case CVT_95_addPSBHintOperands: + static_cast(*Operands[*(p + 1)]).addPSBHintOperands(Inst, 1); + break; + case CVT_regLR: + Inst.addOperand(MCOperand::createReg(AArch64::LR)); + break; + case CVT_95_addImm1_95_8Operands: + static_cast(*Operands[*(p + 1)]).addImm1_8Operands(Inst, 1); + break; + case CVT_imm_95_4: + Inst.addOperand(MCOperand::createImm(4)); + break; + case CVT_imm_95_5: + Inst.addOperand(MCOperand::createImm(5)); + break; + case CVT_95_addImm0_95_7Operands: + static_cast(*Operands[*(p + 1)]).addImm0_7Operands(Inst, 1); + break; + case CVT_imm_95_7: + Inst.addOperand(MCOperand::createImm(7)); + break; + case CVT_95_addSysCROperands: + static_cast(*Operands[*(p + 1)]).addSysCROperands(Inst, 1); + break; + case CVT_95_addBranchTarget14Operands: + static_cast(*Operands[*(p + 1)]).addBranchTarget14Operands(Inst, 1); + break; + case CVT_95_addImm32_95_63Operands: + static_cast(*Operands[*(p + 1)]).addImm32_63Operands(Inst, 1); + break; + case CVT_95_addGPR32as64Operands: + static_cast(*Operands[*(p + 1)]).addGPR32as64Operands(Inst, 1); + break; + case CVT_imm_95_2: + Inst.addOperand(MCOperand::createImm(2)); + break; + case CVT_imm_95_3: + Inst.addOperand(MCOperand::createImm(3)); + break; + case CVT_imm_95_1: + Inst.addOperand(MCOperand::createImm(1)); + break; + } + } +} + +void AArch64AsmParser:: +convertToMapAndConstraints(unsigned Kind, + const OperandVector &Operands) { + assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); + unsigned NumMCOperands = 0; + const uint8_t *Converter = ConversionTable[Kind]; + for (const uint8_t *p = Converter; *p; p+= 2) { + switch (*p) { + default: llvm_unreachable("invalid conversion entry!"); + case CVT_Reg: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("r"); + ++NumMCOperands; + break; + case CVT_Tied: + ++NumMCOperands; + break; + case CVT_95_Reg: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("r"); + NumMCOperands += 1; + break; + case CVT_95_addVectorReg128Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addVectorReg64Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_imm_95_16: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint(""); + ++NumMCOperands; + break; + case CVT_imm_95_24: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint(""); + ++NumMCOperands; + break; + case CVT_imm_95_0: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint(""); + ++NumMCOperands; + break; + case CVT_95_addAddSubImmNegOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addAddSubImmOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addShifterOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addExtendOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addExtend64Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addAdrLabelOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addAdrpLabelOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addLogicalImm32Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addLogicalImm64Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addImm0_95_31Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_imm_95_31: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint(""); + ++NumMCOperands; + break; + case CVT_95_addImm0_95_63Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_imm_95_63: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint(""); + ++NumMCOperands; + break; + case CVT_95_addBranchTarget26Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addCondCodeOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addPCRelLabel19Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addImm0_95_255Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addLogicalImm32NotOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addLogicalImm64NotOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addImm0_95_65535Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addRegOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addImm0_95_15Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_imm_95_15: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint(""); + ++NumMCOperands; + break; + case CVT_regWZR: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + ++NumMCOperands; + break; + case CVT_regXZR: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + ++NumMCOperands; + break; + case CVT_95_addBarrierOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addVectorIndexHOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addVectorIndexSOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addVectorIndexDOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addVectorIndexBOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addImmOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addImm1_95_16Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addImm1_95_32Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addImm1_95_64Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addVectorRegLoOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addFPImmOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addVectorIndex1Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addImm0_95_127Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addVectorList128Operands_LT_4_GT_: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addVectorList64Operands_LT_4_GT_: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addVectorList128Operands_LT_1_GT_: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addVectorList64Operands_LT_1_GT_: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addVectorList128Operands_LT_3_GT_: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addVectorList64Operands_LT_3_GT_: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addVectorList128Operands_LT_2_GT_: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addVectorList64Operands_LT_2_GT_: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addSImm7s16Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addSImm7s4Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addSImm7s8Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addSImm9Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addUImm12OffsetOperands_LT_16_GT_: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addUImm12OffsetOperands_LT_2_GT_: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addUImm12OffsetOperands_LT_4_GT_: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addUImm12OffsetOperands_LT_8_GT_: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addUImm12OffsetOperands_LT_1_GT_: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addMemExtendOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addMemExtend8Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addMOVZMovAliasOperands_LT_0_GT_: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addMOVZMovAliasOperands_LT_16_GT_: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addMOVNMovAliasOperands_LT_0_GT_: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addMOVNMovAliasOperands_LT_16_GT_: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addMOVZMovAliasOperands_LT_32_GT_: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_imm_95_32: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint(""); + ++NumMCOperands; + break; + case CVT_95_addMOVZMovAliasOperands_LT_48_GT_: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_imm_95_48: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint(""); + ++NumMCOperands; + break; + case CVT_95_addMOVNMovAliasOperands_LT_32_GT_: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addMOVNMovAliasOperands_LT_48_GT_: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addSIMDImmType10Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addMRSSystemRegisterOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addMSRSystemRegisterOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addSystemPStateFieldWithImm0_95_15Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addSystemPStateFieldWithImm0_95_1Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addImm0_95_1Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addPrefetchOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addPSBHintOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_regLR: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + ++NumMCOperands; + break; + case CVT_95_addImm1_95_8Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_imm_95_4: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint(""); + ++NumMCOperands; + break; + case CVT_imm_95_5: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint(""); + ++NumMCOperands; + break; + case CVT_95_addImm0_95_7Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_imm_95_7: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint(""); + ++NumMCOperands; + break; + case CVT_95_addSysCROperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addBranchTarget14Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addImm32_95_63Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addGPR32as64Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_imm_95_2: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint(""); + ++NumMCOperands; + break; + case CVT_imm_95_3: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint(""); + ++NumMCOperands; + break; + case CVT_imm_95_1: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint(""); + ++NumMCOperands; + break; + } + } +} + +namespace { + +/// MatchClassKind - The kinds of classes which participate in +/// instruction matching. +enum MatchClassKind { + InvalidMatchClass = 0, + MCK__DOT_16B, // '.16B' + MCK__DOT_1D, // '.1D' + MCK__DOT_1Q, // '.1Q' + MCK__DOT_2D, // '.2D' + MCK__DOT_2H, // '.2H' + MCK__DOT_2S, // '.2S' + MCK__DOT_4H, // '.4H' + MCK__DOT_4S, // '.4S' + MCK__DOT_8B, // '.8B' + MCK__DOT_8H, // '.8H' + MCK__DOT_B, // '.B' + MCK__DOT_D, // '.D' + MCK__DOT_H, // '.H' + MCK__DOT_Q, // '.Q' + MCK__DOT_S, // '.S' + MCK__EXCLAIM_, // '!' + MCK__35_0, // '#0' + MCK__35_1, // '#1' + MCK__35_12, // '#12' + MCK__35_16, // '#16' + MCK__35_2, // '#2' + MCK__35_24, // '#24' + MCK__35_3, // '#3' + MCK__35_32, // '#32' + MCK__35_4, // '#4' + MCK__35_48, // '#48' + MCK__35_6, // '#6' + MCK__35_64, // '#64' + MCK__35_8, // '#8' + MCK__DOT_, // '.' + MCK__DOT_0, // '.0' + MCK__DOT_16b, // '.16b' + MCK__DOT_1d, // '.1d' + MCK__DOT_1q, // '.1q' + MCK__DOT_2d, // '.2d' + MCK__DOT_2h, // '.2h' + MCK__DOT_2s, // '.2s' + MCK__DOT_4h, // '.4h' + MCK__DOT_4s, // '.4s' + MCK__DOT_8b, // '.8b' + MCK__DOT_8h, // '.8h' + MCK__DOT_b, // '.b' + MCK__DOT_d, // '.d' + MCK__DOT_h, // '.h' + MCK__DOT_q, // '.q' + MCK__DOT_s, // '.s' + MCK__91_, // '[' + MCK__93_, // ']' + MCK_CCR, // register class 'CCR' + MCK_GPR32sponly, // register class 'GPR32sponly' + MCK_GPR64sponly, // register class 'GPR64sponly' + MCK_Reg25, // derived register class + MCK_Reg36, // derived register class + MCK_Reg35, // derived register class + MCK_Reg26, // derived register class + MCK_Reg42, // derived register class + MCK_Reg37, // derived register class + MCK_Reg34, // derived register class + MCK_Reg32, // derived register class + MCK_Reg27, // derived register class + MCK_Reg21, // derived register class + MCK_Reg41, // derived register class + MCK_Reg40, // derived register class + MCK_Reg38, // derived register class + MCK_Reg33, // derived register class + MCK_Reg31, // derived register class + MCK_Reg30, // derived register class + MCK_Reg28, // derived register class + MCK_Reg24, // derived register class + MCK_Reg22, // derived register class + MCK_FPR128_lo, // register class 'FPR128_lo' + MCK_Reg47, // derived register class + MCK_Reg53, // derived register class + MCK_Reg48, // derived register class + MCK_tcGPR64, // register class 'tcGPR64' + MCK_Reg49, // derived register class + MCK_Reg43, // derived register class + MCK_Reg52, // derived register class + MCK_Reg50, // derived register class + MCK_Reg46, // derived register class + MCK_Reg44, // derived register class + MCK_GPR32common, // register class 'GPR32common' + MCK_GPR64common, // register class 'GPR64common' + MCK_DD, // register class 'DD' + MCK_DDD, // register class 'DDD' + MCK_DDDD, // register class 'DDDD' + MCK_FPR128, // register class 'FPR128' + MCK_FPR16, // register class 'FPR16' + MCK_FPR32, // register class 'FPR32' + MCK_FPR64, // register class 'FPR64' + MCK_FPR8, // register class 'FPR8' + MCK_GPR32, // register class 'GPR32' + MCK_GPR32sp, // register class 'GPR32sp' + MCK_GPR64, // register class 'GPR64' + MCK_GPR64sp, // register class 'GPR64sp' + MCK_QQ, // register class 'QQ' + MCK_QQQ, // register class 'QQQ' + MCK_QQQQ, // register class 'QQQQ' + MCK_WSeqPairsClass, // register class 'WSeqPairsClass' + MCK_XSeqPairsClass, // register class 'XSeqPairsClass' + MCK_GPR32all, // register class 'GPR32all' + MCK_GPR64all, // register class 'GPR64all' + MCK_AddSubImmNeg, // user defined class 'AddSubImmNegOperand' + MCK_AddSubImm, // user defined class 'AddSubImmOperand' + MCK_AdrLabel, // user defined class 'AdrOperand' + MCK_AdrpLabel, // user defined class 'AdrpOperand' + MCK_Barrier, // user defined class 'BarrierAsmOperand' + MCK_BranchTarget14, // user defined class 'BranchTarget14Operand' + MCK_BranchTarget26, // user defined class 'BranchTarget26Operand' + MCK_CondCode, // user defined class 'CondCode' + MCK_Extend64, // user defined class 'ExtendOperand64' + MCK_ExtendLSL64, // user defined class 'ExtendOperandLSL64' + MCK_Extend, // user defined class 'ExtendOperand' + MCK_FPImm, // user defined class 'FPImmOperand' + MCK_GPR32as64, // user defined class 'GPR32as64Operand' + MCK_GPR64sp0, // user defined class 'GPR64spPlus0Operand' + MCK_Imm0_127, // user defined class 'Imm0_127Operand' + MCK_Imm0_15, // user defined class 'Imm0_15Operand' + MCK_Imm0_1, // user defined class 'Imm0_1Operand' + MCK_Imm0_255, // user defined class 'Imm0_255Operand' + MCK_Imm0_31, // user defined class 'Imm0_31Operand' + MCK_Imm0_63, // user defined class 'Imm0_63Operand' + MCK_Imm0_65535, // user defined class 'Imm0_65535Operand' + MCK_Imm0_7, // user defined class 'Imm0_7Operand' + MCK_Imm1_16, // user defined class 'Imm1_16Operand' + MCK_Imm1_32, // user defined class 'Imm1_32Operand' + MCK_Imm1_64, // user defined class 'Imm1_64Operand' + MCK_Imm1_8, // user defined class 'Imm1_8Operand' + MCK_Imm, // user defined class 'ImmAsmOperand' + MCK_LogicalImm32Not, // user defined class 'LogicalImm32NotOperand' + MCK_LogicalImm32, // user defined class 'LogicalImm32Operand' + MCK_LogicalImm64Not, // user defined class 'LogicalImm64NotOperand' + MCK_LogicalImm64, // user defined class 'LogicalImm64Operand' + MCK_MRSSystemRegister, // user defined class 'MRSSystemRegisterOperand' + MCK_MSRSystemRegister, // user defined class 'MSRSystemRegisterOperand' + MCK_MemWExtend128, // user defined class 'MemWExtend128Operand' + MCK_MemWExtend16, // user defined class 'MemWExtend16Operand' + MCK_MemWExtend32, // user defined class 'MemWExtend32Operand' + MCK_MemWExtend64, // user defined class 'MemWExtend64Operand' + MCK_MemWExtend8, // user defined class 'MemWExtend8Operand' + MCK_MemXExtend128, // user defined class 'MemXExtend128Operand' + MCK_MemXExtend16, // user defined class 'MemXExtend16Operand' + MCK_MemXExtend32, // user defined class 'MemXExtend32Operand' + MCK_MemXExtend64, // user defined class 'MemXExtend64Operand' + MCK_MemXExtend8, // user defined class 'MemXExtend8Operand' + MCK_MovKSymbolG0, // user defined class 'MovKSymbolG0AsmOperand' + MCK_MovKSymbolG1, // user defined class 'MovKSymbolG1AsmOperand' + MCK_MovKSymbolG2, // user defined class 'MovKSymbolG2AsmOperand' + MCK_MovKSymbolG3, // user defined class 'MovKSymbolG3AsmOperand' + MCK_MovZSymbolG0, // user defined class 'MovZSymbolG0AsmOperand' + MCK_MovZSymbolG1, // user defined class 'MovZSymbolG1AsmOperand' + MCK_MovZSymbolG2, // user defined class 'MovZSymbolG2AsmOperand' + MCK_MovZSymbolG3, // user defined class 'MovZSymbolG3AsmOperand' + MCK_PCRelLabel19, // user defined class 'PCRelLabel19Operand' + MCK_PSBHint, // user defined class 'PSBHintOperand' + MCK_Prefetch, // user defined class 'PrefetchOperand' + MCK_SIMDImmType10, // user defined class 'SIMDImmType10Operand' + MCK_SImm7s16, // user defined class 'SImm7s16Operand' + MCK_SImm7s4, // user defined class 'SImm7s4Operand' + MCK_SImm7s8, // user defined class 'SImm7s8Operand' + MCK_SImm9OffsetFB128, // user defined class 'SImm9OffsetFB128Operand' + MCK_SImm9OffsetFB16, // user defined class 'SImm9OffsetFB16Operand' + MCK_SImm9OffsetFB32, // user defined class 'SImm9OffsetFB32Operand' + MCK_SImm9OffsetFB64, // user defined class 'SImm9OffsetFB64Operand' + MCK_SImm9OffsetFB8, // user defined class 'SImm9OffsetFB8Operand' + MCK_SImm9, // user defined class 'SImm9Operand' + MCK_LogicalVecHalfWordShifter, // user defined class 'LogicalVecHalfWordShifterOperand' + MCK_ArithmeticShifter32, // user defined class 'ArithmeticShifterOperand32' + MCK_ArithmeticShifter64, // user defined class 'ArithmeticShifterOperand64' + MCK_LogicalShifter32, // user defined class 'LogicalShifterOperand32' + MCK_LogicalShifter64, // user defined class 'LogicalShifterOperand64' + MCK_LogicalVecShifter, // user defined class 'LogicalVecShifterOperand' + MCK_MovImm32Shifter, // user defined class 'MovImm32ShifterOperand' + MCK_MovImm64Shifter, // user defined class 'MovImm64ShifterOperand' + MCK_MoveVecShifter, // user defined class 'MoveVecShifterOperand' + MCK_Shifter, // user defined class 'ShifterOperand' + MCK_SysCR, // user defined class 'SysCRAsmOperand' + MCK_SystemPStateFieldWithImm0_15, // user defined class 'SystemPStateFieldWithImm0_15Operand' + MCK_SystemPStateFieldWithImm0_1, // user defined class 'SystemPStateFieldWithImm0_1Operand' + MCK_TBZImm0_31, // user defined class 'TBZImm0_31Operand' + MCK_Imm32_63, // user defined class 'TBZImm32_63Operand' + MCK_UImm12Offset16, // user defined class 'UImm12OffsetScale16Operand' + MCK_UImm12Offset1, // user defined class 'UImm12OffsetScale1Operand' + MCK_UImm12Offset2, // user defined class 'UImm12OffsetScale2Operand' + MCK_UImm12Offset4, // user defined class 'UImm12OffsetScale4Operand' + MCK_UImm12Offset8, // user defined class 'UImm12OffsetScale8Operand' + MCK_VecListFour128, // user defined class 'VecListFour_128AsmOperand' + MCK_TypedVectorList4_16b, // user defined class 'VecListFour_16bAsmOperand' + MCK_TypedVectorList4_1d, // user defined class 'VecListFour_1dAsmOperand' + MCK_TypedVectorList4_2d, // user defined class 'VecListFour_2dAsmOperand' + MCK_TypedVectorList4_2s, // user defined class 'VecListFour_2sAsmOperand' + MCK_TypedVectorList4_4h, // user defined class 'VecListFour_4hAsmOperand' + MCK_TypedVectorList4_4s, // user defined class 'VecListFour_4sAsmOperand' + MCK_VecListFour64, // user defined class 'VecListFour_64AsmOperand' + MCK_TypedVectorList4_8b, // user defined class 'VecListFour_8bAsmOperand' + MCK_TypedVectorList4_8h, // user defined class 'VecListFour_8hAsmOperand' + MCK_TypedVectorList4_0b, // user defined class 'VecListFour_bAsmOperand' + MCK_TypedVectorList4_0d, // user defined class 'VecListFour_dAsmOperand' + MCK_TypedVectorList4_0h, // user defined class 'VecListFour_hAsmOperand' + MCK_TypedVectorList4_0s, // user defined class 'VecListFour_sAsmOperand' + MCK_VecListOne128, // user defined class 'VecListOne_128AsmOperand' + MCK_TypedVectorList1_16b, // user defined class 'VecListOne_16bAsmOperand' + MCK_TypedVectorList1_1d, // user defined class 'VecListOne_1dAsmOperand' + MCK_TypedVectorList1_2d, // user defined class 'VecListOne_2dAsmOperand' + MCK_TypedVectorList1_2s, // user defined class 'VecListOne_2sAsmOperand' + MCK_TypedVectorList1_4h, // user defined class 'VecListOne_4hAsmOperand' + MCK_TypedVectorList1_4s, // user defined class 'VecListOne_4sAsmOperand' + MCK_VecListOne64, // user defined class 'VecListOne_64AsmOperand' + MCK_TypedVectorList1_8b, // user defined class 'VecListOne_8bAsmOperand' + MCK_TypedVectorList1_8h, // user defined class 'VecListOne_8hAsmOperand' + MCK_TypedVectorList1_0b, // user defined class 'VecListOne_bAsmOperand' + MCK_TypedVectorList1_0d, // user defined class 'VecListOne_dAsmOperand' + MCK_TypedVectorList1_0h, // user defined class 'VecListOne_hAsmOperand' + MCK_TypedVectorList1_0s, // user defined class 'VecListOne_sAsmOperand' + MCK_VecListThree128, // user defined class 'VecListThree_128AsmOperand' + MCK_TypedVectorList3_16b, // user defined class 'VecListThree_16bAsmOperand' + MCK_TypedVectorList3_1d, // user defined class 'VecListThree_1dAsmOperand' + MCK_TypedVectorList3_2d, // user defined class 'VecListThree_2dAsmOperand' + MCK_TypedVectorList3_2s, // user defined class 'VecListThree_2sAsmOperand' + MCK_TypedVectorList3_4h, // user defined class 'VecListThree_4hAsmOperand' + MCK_TypedVectorList3_4s, // user defined class 'VecListThree_4sAsmOperand' + MCK_VecListThree64, // user defined class 'VecListThree_64AsmOperand' + MCK_TypedVectorList3_8b, // user defined class 'VecListThree_8bAsmOperand' + MCK_TypedVectorList3_8h, // user defined class 'VecListThree_8hAsmOperand' + MCK_TypedVectorList3_0b, // user defined class 'VecListThree_bAsmOperand' + MCK_TypedVectorList3_0d, // user defined class 'VecListThree_dAsmOperand' + MCK_TypedVectorList3_0h, // user defined class 'VecListThree_hAsmOperand' + MCK_TypedVectorList3_0s, // user defined class 'VecListThree_sAsmOperand' + MCK_VecListTwo128, // user defined class 'VecListTwo_128AsmOperand' + MCK_TypedVectorList2_16b, // user defined class 'VecListTwo_16bAsmOperand' + MCK_TypedVectorList2_1d, // user defined class 'VecListTwo_1dAsmOperand' + MCK_TypedVectorList2_2d, // user defined class 'VecListTwo_2dAsmOperand' + MCK_TypedVectorList2_2s, // user defined class 'VecListTwo_2sAsmOperand' + MCK_TypedVectorList2_4h, // user defined class 'VecListTwo_4hAsmOperand' + MCK_TypedVectorList2_4s, // user defined class 'VecListTwo_4sAsmOperand' + MCK_VecListTwo64, // user defined class 'VecListTwo_64AsmOperand' + MCK_TypedVectorList2_8b, // user defined class 'VecListTwo_8bAsmOperand' + MCK_TypedVectorList2_8h, // user defined class 'VecListTwo_8hAsmOperand' + MCK_TypedVectorList2_0b, // user defined class 'VecListTwo_bAsmOperand' + MCK_TypedVectorList2_0d, // user defined class 'VecListTwo_dAsmOperand' + MCK_TypedVectorList2_0h, // user defined class 'VecListTwo_hAsmOperand' + MCK_TypedVectorList2_0s, // user defined class 'VecListTwo_sAsmOperand' + MCK_VectorIndex1, // user defined class 'VectorIndex1Operand' + MCK_VectorIndexB, // user defined class 'VectorIndexBOperand' + MCK_VectorIndexD, // user defined class 'VectorIndexDOperand' + MCK_VectorIndexH, // user defined class 'VectorIndexHOperand' + MCK_VectorIndexS, // user defined class 'VectorIndexSOperand' + MCK_VectorReg128, // user defined class 'VectorReg128AsmOperand' + MCK_VectorReg64, // user defined class 'VectorReg64AsmOperand' + MCK_VectorRegLo, // user defined class 'VectorRegLoAsmOperand' + MCK_WSeqPair, // user defined class 'WSeqPairsAsmOperandClass' + MCK_XSeqPair, // user defined class 'XSeqPairsAsmOperandClass' + MCK_MOVZ32_lsl0MovAlias, // user defined class 'anonymous_1025_asmoperand' + MCK_MOVZ32_lsl16MovAlias, // user defined class 'anonymous_1026_asmoperand' + MCK_MOVZ64_lsl0MovAlias, // user defined class 'anonymous_1027_asmoperand' + MCK_MOVZ64_lsl16MovAlias, // user defined class 'anonymous_1028_asmoperand' + MCK_MOVZ64_lsl32MovAlias, // user defined class 'anonymous_1029_asmoperand' + MCK_MOVZ64_lsl48MovAlias, // user defined class 'anonymous_1030_asmoperand' + MCK_MOVN32_lsl0MovAlias, // user defined class 'anonymous_1031_asmoperand' + MCK_MOVN32_lsl16MovAlias, // user defined class 'anonymous_1032_asmoperand' + MCK_MOVN64_lsl0MovAlias, // user defined class 'anonymous_1033_asmoperand' + MCK_MOVN64_lsl16MovAlias, // user defined class 'anonymous_1034_asmoperand' + MCK_MOVN64_lsl32MovAlias, // user defined class 'anonymous_1035_asmoperand' + MCK_MOVN64_lsl48MovAlias, // user defined class 'anonymous_1036_asmoperand' + NumMatchClassKinds +}; + +} + +static MatchClassKind matchTokenString(StringRef Name) { + switch (Name.size()) { + default: break; + case 1: // 4 strings to match. + switch (Name[0]) { + default: break; + case '!': // 1 string to match. + return MCK__EXCLAIM_; // "!" + case '.': // 1 string to match. + return MCK__DOT_; // "." + case '[': // 1 string to match. + return MCK__91_; // "[" + case ']': // 1 string to match. + return MCK__93_; // "]" + } + break; + case 2: // 18 strings to match. + switch (Name[0]) { + default: break; + case '#': // 7 strings to match. + switch (Name[1]) { + default: break; + case '0': // 1 string to match. + return MCK__35_0; // "#0" + case '1': // 1 string to match. + return MCK__35_1; // "#1" + case '2': // 1 string to match. + return MCK__35_2; // "#2" + case '3': // 1 string to match. + return MCK__35_3; // "#3" + case '4': // 1 string to match. + return MCK__35_4; // "#4" + case '6': // 1 string to match. + return MCK__35_6; // "#6" + case '8': // 1 string to match. + return MCK__35_8; // "#8" + } + break; + case '.': // 11 strings to match. + switch (Name[1]) { + default: break; + case '0': // 1 string to match. + return MCK__DOT_0; // ".0" + case 'B': // 1 string to match. + return MCK__DOT_B; // ".B" + case 'D': // 1 string to match. + return MCK__DOT_D; // ".D" + case 'H': // 1 string to match. + return MCK__DOT_H; // ".H" + case 'Q': // 1 string to match. + return MCK__DOT_Q; // ".Q" + case 'S': // 1 string to match. + return MCK__DOT_S; // ".S" + case 'b': // 1 string to match. + return MCK__DOT_b; // ".b" + case 'd': // 1 string to match. + return MCK__DOT_d; // ".d" + case 'h': // 1 string to match. + return MCK__DOT_h; // ".h" + case 'q': // 1 string to match. + return MCK__DOT_q; // ".q" + case 's': // 1 string to match. + return MCK__DOT_s; // ".s" + } + break; + } + break; + case 3: // 24 strings to match. + switch (Name[0]) { + default: break; + case '#': // 6 strings to match. + switch (Name[1]) { + default: break; + case '1': // 2 strings to match. + switch (Name[2]) { + default: break; + case '2': // 1 string to match. + return MCK__35_12; // "#12" + case '6': // 1 string to match. + return MCK__35_16; // "#16" + } + break; + case '2': // 1 string to match. + if (Name[2] != '4') + break; + return MCK__35_24; // "#24" + case '3': // 1 string to match. + if (Name[2] != '2') + break; + return MCK__35_32; // "#32" + case '4': // 1 string to match. + if (Name[2] != '8') + break; + return MCK__35_48; // "#48" + case '6': // 1 string to match. + if (Name[2] != '4') + break; + return MCK__35_64; // "#64" + } + break; + case '.': // 18 strings to match. + switch (Name[1]) { + default: break; + case '1': // 4 strings to match. + switch (Name[2]) { + default: break; + case 'D': // 1 string to match. + return MCK__DOT_1D; // ".1D" + case 'Q': // 1 string to match. + return MCK__DOT_1Q; // ".1Q" + case 'd': // 1 string to match. + return MCK__DOT_1d; // ".1d" + case 'q': // 1 string to match. + return MCK__DOT_1q; // ".1q" + } + break; + case '2': // 6 strings to match. + switch (Name[2]) { + default: break; + case 'D': // 1 string to match. + return MCK__DOT_2D; // ".2D" + case 'H': // 1 string to match. + return MCK__DOT_2H; // ".2H" + case 'S': // 1 string to match. + return MCK__DOT_2S; // ".2S" + case 'd': // 1 string to match. + return MCK__DOT_2d; // ".2d" + case 'h': // 1 string to match. + return MCK__DOT_2h; // ".2h" + case 's': // 1 string to match. + return MCK__DOT_2s; // ".2s" + } + break; + case '4': // 4 strings to match. + switch (Name[2]) { + default: break; + case 'H': // 1 string to match. + return MCK__DOT_4H; // ".4H" + case 'S': // 1 string to match. + return MCK__DOT_4S; // ".4S" + case 'h': // 1 string to match. + return MCK__DOT_4h; // ".4h" + case 's': // 1 string to match. + return MCK__DOT_4s; // ".4s" + } + break; + case '8': // 4 strings to match. + switch (Name[2]) { + default: break; + case 'B': // 1 string to match. + return MCK__DOT_8B; // ".8B" + case 'H': // 1 string to match. + return MCK__DOT_8H; // ".8H" + case 'b': // 1 string to match. + return MCK__DOT_8b; // ".8b" + case 'h': // 1 string to match. + return MCK__DOT_8h; // ".8h" + } + break; + } + break; + } + break; + case 4: // 2 strings to match. + if (memcmp(Name.data()+0, ".16", 3)) + break; + switch (Name[3]) { + default: break; + case 'B': // 1 string to match. + return MCK__DOT_16B; // ".16B" + case 'b': // 1 string to match. + return MCK__DOT_16b; // ".16b" + } + break; + } + return InvalidMatchClass; +} + +/// isSubclass - Compute whether \p A is a subclass of \p B. +static bool isSubclass(MatchClassKind A, MatchClassKind B) { + if (A == B) + return true; + + switch (A) { + default: + return false; + + case MCK__DOT_16B: + return B == MCK__DOT_16b; + + case MCK__DOT_1D: + return B == MCK__DOT_1d; + + case MCK__DOT_1Q: + return B == MCK__DOT_1q; + + case MCK__DOT_2D: + return B == MCK__DOT_2d; + + case MCK__DOT_2H: + return B == MCK__DOT_2h; + + case MCK__DOT_2S: + return B == MCK__DOT_2s; + + case MCK__DOT_4H: + return B == MCK__DOT_4h; + + case MCK__DOT_4S: + return B == MCK__DOT_4s; + + case MCK__DOT_8B: + return B == MCK__DOT_8b; + + case MCK__DOT_8H: + return B == MCK__DOT_8h; + + case MCK__DOT_B: + return B == MCK__DOT_b; + + case MCK__DOT_D: + return B == MCK__DOT_d; + + case MCK__DOT_H: + return B == MCK__DOT_h; + + case MCK__DOT_Q: + return B == MCK__DOT_q; + + case MCK__DOT_S: + return B == MCK__DOT_s; + + case MCK_GPR32sponly: + switch (B) { + default: return false; + case MCK_GPR32sp: return true; + case MCK_GPR32all: return true; + } + + case MCK_GPR64sponly: + switch (B) { + default: return false; + case MCK_GPR64sp: return true; + case MCK_GPR64all: return true; + } + + case MCK_Reg25: + switch (B) { + default: return false; + case MCK_Reg35: return true; + case MCK_Reg26: return true; + case MCK_Reg34: return true; + case MCK_Reg32: return true; + case MCK_Reg27: return true; + case MCK_Reg33: return true; + case MCK_Reg31: return true; + case MCK_Reg30: return true; + case MCK_Reg28: return true; + case MCK_QQQQ: return true; + } + + case MCK_Reg36: + switch (B) { + default: return false; + case MCK_Reg42: return true; + case MCK_Reg37: return true; + case MCK_Reg41: return true; + case MCK_Reg40: return true; + case MCK_Reg38: return true; + case MCK_QQQ: return true; + } + + case MCK_Reg35: + switch (B) { + default: return false; + case MCK_Reg34: return true; + case MCK_Reg32: return true; + case MCK_Reg33: return true; + case MCK_Reg31: return true; + case MCK_Reg30: return true; + case MCK_QQQQ: return true; + } + + case MCK_Reg26: + switch (B) { + default: return false; + case MCK_Reg32: return true; + case MCK_Reg27: return true; + case MCK_Reg31: return true; + case MCK_Reg30: return true; + case MCK_Reg28: return true; + case MCK_QQQQ: return true; + } + + case MCK_Reg42: + switch (B) { + default: return false; + case MCK_Reg41: return true; + case MCK_Reg40: return true; + case MCK_QQQ: return true; + } + + case MCK_Reg37: + switch (B) { + default: return false; + case MCK_Reg40: return true; + case MCK_Reg38: return true; + case MCK_QQQ: return true; + } + + case MCK_Reg34: + switch (B) { + default: return false; + case MCK_Reg33: return true; + case MCK_Reg31: return true; + case MCK_QQQQ: return true; + } + + case MCK_Reg32: + switch (B) { + default: return false; + case MCK_Reg31: return true; + case MCK_Reg30: return true; + case MCK_QQQQ: return true; + } + + case MCK_Reg27: + switch (B) { + default: return false; + case MCK_Reg30: return true; + case MCK_Reg28: return true; + case MCK_QQQQ: return true; + } + + case MCK_Reg21: + switch (B) { + default: return false; + case MCK_Reg24: return true; + case MCK_Reg22: return true; + case MCK_QQ: return true; + } + + case MCK_Reg41: + return B == MCK_QQQ; + + case MCK_Reg40: + return B == MCK_QQQ; + + case MCK_Reg38: + return B == MCK_QQQ; + + case MCK_Reg33: + return B == MCK_QQQQ; + + case MCK_Reg31: + return B == MCK_QQQQ; + + case MCK_Reg30: + return B == MCK_QQQQ; + + case MCK_Reg28: + return B == MCK_QQQQ; + + case MCK_Reg24: + return B == MCK_QQ; + + case MCK_Reg22: + return B == MCK_QQ; + + case MCK_FPR128_lo: + return B == MCK_FPR128; + + case MCK_Reg47: + switch (B) { + default: return false; + case MCK_Reg53: return true; + case MCK_Reg48: return true; + case MCK_Reg49: return true; + case MCK_Reg52: return true; + case MCK_Reg50: return true; + case MCK_XSeqPairsClass: return true; + } + + case MCK_Reg53: + switch (B) { + default: return false; + case MCK_Reg52: return true; + case MCK_XSeqPairsClass: return true; + } + + case MCK_Reg48: + switch (B) { + default: return false; + case MCK_Reg49: return true; + case MCK_Reg52: return true; + case MCK_Reg50: return true; + case MCK_XSeqPairsClass: return true; + } + + case MCK_tcGPR64: + switch (B) { + default: return false; + case MCK_GPR64common: return true; + case MCK_GPR64: return true; + case MCK_GPR64sp: return true; + case MCK_GPR64all: return true; + } + + case MCK_Reg49: + switch (B) { + default: return false; + case MCK_Reg52: return true; + case MCK_Reg50: return true; + case MCK_XSeqPairsClass: return true; + } + + case MCK_Reg43: + switch (B) { + default: return false; + case MCK_Reg46: return true; + case MCK_Reg44: return true; + case MCK_WSeqPairsClass: return true; + } + + case MCK_Reg52: + return B == MCK_XSeqPairsClass; + + case MCK_Reg50: + return B == MCK_XSeqPairsClass; + + case MCK_Reg46: + return B == MCK_WSeqPairsClass; + + case MCK_Reg44: + return B == MCK_WSeqPairsClass; + + case MCK_GPR32common: + switch (B) { + default: return false; + case MCK_GPR32: return true; + case MCK_GPR32sp: return true; + case MCK_GPR32all: return true; + } + + case MCK_GPR64common: + switch (B) { + default: return false; + case MCK_GPR64: return true; + case MCK_GPR64sp: return true; + case MCK_GPR64all: return true; + } + + case MCK_GPR32: + return B == MCK_GPR32all; + + case MCK_GPR32sp: + return B == MCK_GPR32all; + + case MCK_GPR64: + return B == MCK_GPR64all; + + case MCK_GPR64sp: + return B == MCK_GPR64all; + + case MCK_Extend64: + return B == MCK_Extend; + + case MCK_ExtendLSL64: + return B == MCK_Extend; + + case MCK_LogicalVecHalfWordShifter: + switch (B) { + default: return false; + case MCK_LogicalVecShifter: return true; + case MCK_Shifter: return true; + } + + case MCK_ArithmeticShifter32: + return B == MCK_Shifter; + + case MCK_ArithmeticShifter64: + return B == MCK_Shifter; + + case MCK_LogicalShifter32: + return B == MCK_Shifter; + + case MCK_LogicalShifter64: + return B == MCK_Shifter; + + case MCK_LogicalVecShifter: + return B == MCK_Shifter; + + case MCK_MovImm32Shifter: + return B == MCK_Shifter; + + case MCK_MovImm64Shifter: + return B == MCK_Shifter; + + case MCK_MoveVecShifter: + return B == MCK_Shifter; + } +} + +static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) { + AArch64Operand &Operand = (AArch64Operand&)GOp; + if (Kind == InvalidMatchClass) + return MCTargetAsmParser::Match_InvalidOperand; + + if (Operand.isToken()) + return isSubclass(matchTokenString(Operand.getToken()), Kind) ? + MCTargetAsmParser::Match_Success : + MCTargetAsmParser::Match_InvalidOperand; + + // 'AddSubImmNeg' class + if (Kind == MCK_AddSubImmNeg) { + if (Operand.isAddSubImmNeg()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_AddSubSecondSource; + } + + // 'AddSubImm' class + if (Kind == MCK_AddSubImm) { + if (Operand.isAddSubImm()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_AddSubSecondSource; + } + + // 'AdrLabel' class + if (Kind == MCK_AdrLabel) { + if (Operand.isAdrLabel()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidLabel; + } + + // 'AdrpLabel' class + if (Kind == MCK_AdrpLabel) { + if (Operand.isAdrpLabel()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidLabel; + } + + // 'Barrier' class + if (Kind == MCK_Barrier) { + if (Operand.isBarrier()) + return MCTargetAsmParser::Match_Success; + } + + // 'BranchTarget14' class + if (Kind == MCK_BranchTarget14) { + if (Operand.isBranchTarget14()) + return MCTargetAsmParser::Match_Success; + } + + // 'BranchTarget26' class + if (Kind == MCK_BranchTarget26) { + if (Operand.isBranchTarget26()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidLabel; + } + + // 'CondCode' class + if (Kind == MCK_CondCode) { + if (Operand.isCondCode()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidCondCode; + } + + // 'Extend64' class + if (Kind == MCK_Extend64) { + if (Operand.isExtend64()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_AddSubRegExtendSmall; + } + + // 'ExtendLSL64' class + if (Kind == MCK_ExtendLSL64) { + if (Operand.isExtendLSL64()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_AddSubRegExtendLarge; + } + + // 'Extend' class + if (Kind == MCK_Extend) { + if (Operand.isExtend()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_AddSubRegExtendLarge; + } + + // 'FPImm' class + if (Kind == MCK_FPImm) { + if (Operand.isFPImm()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidFPImm; + } + + // 'GPR32as64' class + if (Kind == MCK_GPR32as64) { + if (Operand.isGPR32as64()) + return MCTargetAsmParser::Match_Success; + } + + // 'GPR64sp0' class + if (Kind == MCK_GPR64sp0) { + if (Operand.isGPR64sp0()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm0_127' class + if (Kind == MCK_Imm0_127) { + if (Operand.isImm0_127()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidImm0_127; + } + + // 'Imm0_15' class + if (Kind == MCK_Imm0_15) { + if (Operand.isImm0_15()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidImm0_15; + } + + // 'Imm0_1' class + if (Kind == MCK_Imm0_1) { + if (Operand.isImm0_1()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidImm0_1; + } + + // 'Imm0_255' class + if (Kind == MCK_Imm0_255) { + if (Operand.isImm0_255()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm0_31' class + if (Kind == MCK_Imm0_31) { + if (Operand.isImm0_31()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidImm0_31; + } + + // 'Imm0_63' class + if (Kind == MCK_Imm0_63) { + if (Operand.isImm0_63()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidImm0_63; + } + + // 'Imm0_65535' class + if (Kind == MCK_Imm0_65535) { + if (Operand.isImm0_65535()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidImm0_65535; + } + + // 'Imm0_7' class + if (Kind == MCK_Imm0_7) { + if (Operand.isImm0_7()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidImm0_7; + } + + // 'Imm1_16' class + if (Kind == MCK_Imm1_16) { + if (Operand.isImm1_16()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidImm1_16; + } + + // 'Imm1_32' class + if (Kind == MCK_Imm1_32) { + if (Operand.isImm1_32()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidImm1_32; + } + + // 'Imm1_64' class + if (Kind == MCK_Imm1_64) { + if (Operand.isImm1_64()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidImm1_64; + } + + // 'Imm1_8' class + if (Kind == MCK_Imm1_8) { + if (Operand.isImm1_8()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidImm1_8; + } + + // 'Imm' class + if (Kind == MCK_Imm) { + if (Operand.isImm()) + return MCTargetAsmParser::Match_Success; + } + + // 'LogicalImm32Not' class + if (Kind == MCK_LogicalImm32Not) { + if (Operand.isLogicalImm32Not()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_LogicalSecondSource; + } + + // 'LogicalImm32' class + if (Kind == MCK_LogicalImm32) { + if (Operand.isLogicalImm32()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_LogicalSecondSource; + } + + // 'LogicalImm64Not' class + if (Kind == MCK_LogicalImm64Not) { + if (Operand.isLogicalImm64Not()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_LogicalSecondSource; + } + + // 'LogicalImm64' class + if (Kind == MCK_LogicalImm64) { + if (Operand.isLogicalImm64()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_LogicalSecondSource; + } + + // 'MRSSystemRegister' class + if (Kind == MCK_MRSSystemRegister) { + if (Operand.isMRSSystemRegister()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_MRS; + } + + // 'MSRSystemRegister' class + if (Kind == MCK_MSRSystemRegister) { + if (Operand.isMSRSystemRegister()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_MSR; + } + + // 'MemWExtend128' class + if (Kind == MCK_MemWExtend128) { + if (Operand.isMemWExtend<128>()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidMemoryWExtend128; + } + + // 'MemWExtend16' class + if (Kind == MCK_MemWExtend16) { + if (Operand.isMemWExtend<16>()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidMemoryWExtend16; + } + + // 'MemWExtend32' class + if (Kind == MCK_MemWExtend32) { + if (Operand.isMemWExtend<32>()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidMemoryWExtend32; + } + + // 'MemWExtend64' class + if (Kind == MCK_MemWExtend64) { + if (Operand.isMemWExtend<64>()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidMemoryWExtend64; + } + + // 'MemWExtend8' class + if (Kind == MCK_MemWExtend8) { + if (Operand.isMemWExtend<8>()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidMemoryWExtend8; + } + + // 'MemXExtend128' class + if (Kind == MCK_MemXExtend128) { + if (Operand.isMemXExtend<128>()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidMemoryXExtend128; + } + + // 'MemXExtend16' class + if (Kind == MCK_MemXExtend16) { + if (Operand.isMemXExtend<16>()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidMemoryXExtend16; + } + + // 'MemXExtend32' class + if (Kind == MCK_MemXExtend32) { + if (Operand.isMemXExtend<32>()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidMemoryXExtend32; + } + + // 'MemXExtend64' class + if (Kind == MCK_MemXExtend64) { + if (Operand.isMemXExtend<64>()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidMemoryXExtend64; + } + + // 'MemXExtend8' class + if (Kind == MCK_MemXExtend8) { + if (Operand.isMemXExtend<8>()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidMemoryXExtend8; + } + + // 'MovKSymbolG0' class + if (Kind == MCK_MovKSymbolG0) { + if (Operand.isMovKSymbolG0()) + return MCTargetAsmParser::Match_Success; + } + + // 'MovKSymbolG1' class + if (Kind == MCK_MovKSymbolG1) { + if (Operand.isMovKSymbolG1()) + return MCTargetAsmParser::Match_Success; + } + + // 'MovKSymbolG2' class + if (Kind == MCK_MovKSymbolG2) { + if (Operand.isMovKSymbolG2()) + return MCTargetAsmParser::Match_Success; + } + + // 'MovKSymbolG3' class + if (Kind == MCK_MovKSymbolG3) { + if (Operand.isMovKSymbolG3()) + return MCTargetAsmParser::Match_Success; + } + + // 'MovZSymbolG0' class + if (Kind == MCK_MovZSymbolG0) { + if (Operand.isMovZSymbolG0()) + return MCTargetAsmParser::Match_Success; + } + + // 'MovZSymbolG1' class + if (Kind == MCK_MovZSymbolG1) { + if (Operand.isMovZSymbolG1()) + return MCTargetAsmParser::Match_Success; + } + + // 'MovZSymbolG2' class + if (Kind == MCK_MovZSymbolG2) { + if (Operand.isMovZSymbolG2()) + return MCTargetAsmParser::Match_Success; + } + + // 'MovZSymbolG3' class + if (Kind == MCK_MovZSymbolG3) { + if (Operand.isMovZSymbolG3()) + return MCTargetAsmParser::Match_Success; + } + + // 'PCRelLabel19' class + if (Kind == MCK_PCRelLabel19) { + if (Operand.isPCRelLabel19()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidLabel; + } + + // 'PSBHint' class + if (Kind == MCK_PSBHint) { + if (Operand.isPSBHint()) + return MCTargetAsmParser::Match_Success; + } + + // 'Prefetch' class + if (Kind == MCK_Prefetch) { + if (Operand.isPrefetch()) + return MCTargetAsmParser::Match_Success; + } + + // 'SIMDImmType10' class + if (Kind == MCK_SIMDImmType10) { + if (Operand.isSIMDImmType10()) + return MCTargetAsmParser::Match_Success; + } + + // 'SImm7s16' class + if (Kind == MCK_SImm7s16) { + if (Operand.isSImm7s16()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidMemoryIndexed16SImm7; + } + + // 'SImm7s4' class + if (Kind == MCK_SImm7s4) { + if (Operand.isSImm7s4()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidMemoryIndexed4SImm7; + } + + // 'SImm7s8' class + if (Kind == MCK_SImm7s8) { + if (Operand.isSImm7s8()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidMemoryIndexed8SImm7; + } + + // 'SImm9OffsetFB128' class + if (Kind == MCK_SImm9OffsetFB128) { + if (Operand.isSImm9OffsetFB<128>()) + return MCTargetAsmParser::Match_Success; + } + + // 'SImm9OffsetFB16' class + if (Kind == MCK_SImm9OffsetFB16) { + if (Operand.isSImm9OffsetFB<16>()) + return MCTargetAsmParser::Match_Success; + } + + // 'SImm9OffsetFB32' class + if (Kind == MCK_SImm9OffsetFB32) { + if (Operand.isSImm9OffsetFB<32>()) + return MCTargetAsmParser::Match_Success; + } + + // 'SImm9OffsetFB64' class + if (Kind == MCK_SImm9OffsetFB64) { + if (Operand.isSImm9OffsetFB<64>()) + return MCTargetAsmParser::Match_Success; + } + + // 'SImm9OffsetFB8' class + if (Kind == MCK_SImm9OffsetFB8) { + if (Operand.isSImm9OffsetFB<8>()) + return MCTargetAsmParser::Match_Success; + } + + // 'SImm9' class + if (Kind == MCK_SImm9) { + if (Operand.isSImm9()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidMemoryIndexedSImm9; + } + + // 'LogicalVecHalfWordShifter' class + if (Kind == MCK_LogicalVecHalfWordShifter) { + if (Operand.isLogicalVecHalfWordShifter()) + return MCTargetAsmParser::Match_Success; + } + + // 'ArithmeticShifter32' class + if (Kind == MCK_ArithmeticShifter32) { + if (Operand.isArithmeticShifter<32>()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_AddSubRegShift32; + } + + // 'ArithmeticShifter64' class + if (Kind == MCK_ArithmeticShifter64) { + if (Operand.isArithmeticShifter<64>()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_AddSubRegShift64; + } + + // 'LogicalShifter32' class + if (Kind == MCK_LogicalShifter32) { + if (Operand.isLogicalShifter<32>()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_AddSubRegShift32; + } + + // 'LogicalShifter64' class + if (Kind == MCK_LogicalShifter64) { + if (Operand.isLogicalShifter<64>()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_AddSubRegShift64; + } + + // 'LogicalVecShifter' class + if (Kind == MCK_LogicalVecShifter) { + if (Operand.isLogicalVecShifter()) + return MCTargetAsmParser::Match_Success; + } + + // 'MovImm32Shifter' class + if (Kind == MCK_MovImm32Shifter) { + if (Operand.isMovImm32Shifter()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidMovImm32Shift; + } + + // 'MovImm64Shifter' class + if (Kind == MCK_MovImm64Shifter) { + if (Operand.isMovImm64Shifter()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidMovImm64Shift; + } + + // 'MoveVecShifter' class + if (Kind == MCK_MoveVecShifter) { + if (Operand.isMoveVecShifter()) + return MCTargetAsmParser::Match_Success; + } + + // 'Shifter' class + if (Kind == MCK_Shifter) { + if (Operand.isShifter()) + return MCTargetAsmParser::Match_Success; + } + + // 'SysCR' class + if (Kind == MCK_SysCR) { + if (Operand.isSysCR()) + return MCTargetAsmParser::Match_Success; + } + + // 'SystemPStateFieldWithImm0_15' class + if (Kind == MCK_SystemPStateFieldWithImm0_15) { + if (Operand.isSystemPStateFieldWithImm0_15()) + return MCTargetAsmParser::Match_Success; + } + + // 'SystemPStateFieldWithImm0_1' class + if (Kind == MCK_SystemPStateFieldWithImm0_1) { + if (Operand.isSystemPStateFieldWithImm0_1()) + return MCTargetAsmParser::Match_Success; + } + + // 'TBZImm0_31' class + if (Kind == MCK_TBZImm0_31) { + if (Operand.isImm0_31()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm32_63' class + if (Kind == MCK_Imm32_63) { + if (Operand.isImm32_63()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidImm0_63; + } + + // 'UImm12Offset16' class + if (Kind == MCK_UImm12Offset16) { + if (Operand.isUImm12Offset<16>()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidMemoryIndexed16; + } + + // 'UImm12Offset1' class + if (Kind == MCK_UImm12Offset1) { + if (Operand.isUImm12Offset<1>()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidMemoryIndexed1; + } + + // 'UImm12Offset2' class + if (Kind == MCK_UImm12Offset2) { + if (Operand.isUImm12Offset<2>()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidMemoryIndexed2; + } + + // 'UImm12Offset4' class + if (Kind == MCK_UImm12Offset4) { + if (Operand.isUImm12Offset<4>()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidMemoryIndexed4; + } + + // 'UImm12Offset8' class + if (Kind == MCK_UImm12Offset8) { + if (Operand.isUImm12Offset<8>()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidMemoryIndexed8; + } + + // 'VecListFour128' class + if (Kind == MCK_VecListFour128) { + if (Operand.isImplicitlyTypedVectorList<4>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList4_16b' class + if (Kind == MCK_TypedVectorList4_16b) { + if (Operand.isTypedVectorList<4, 16, 'b'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList4_1d' class + if (Kind == MCK_TypedVectorList4_1d) { + if (Operand.isTypedVectorList<4, 1, 'd'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList4_2d' class + if (Kind == MCK_TypedVectorList4_2d) { + if (Operand.isTypedVectorList<4, 2, 'd'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList4_2s' class + if (Kind == MCK_TypedVectorList4_2s) { + if (Operand.isTypedVectorList<4, 2, 's'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList4_4h' class + if (Kind == MCK_TypedVectorList4_4h) { + if (Operand.isTypedVectorList<4, 4, 'h'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList4_4s' class + if (Kind == MCK_TypedVectorList4_4s) { + if (Operand.isTypedVectorList<4, 4, 's'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListFour64' class + if (Kind == MCK_VecListFour64) { + if (Operand.isImplicitlyTypedVectorList<4>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList4_8b' class + if (Kind == MCK_TypedVectorList4_8b) { + if (Operand.isTypedVectorList<4, 8, 'b'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList4_8h' class + if (Kind == MCK_TypedVectorList4_8h) { + if (Operand.isTypedVectorList<4, 8, 'h'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList4_0b' class + if (Kind == MCK_TypedVectorList4_0b) { + if (Operand.isTypedVectorList<4, 0, 'b'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList4_0d' class + if (Kind == MCK_TypedVectorList4_0d) { + if (Operand.isTypedVectorList<4, 0, 'd'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList4_0h' class + if (Kind == MCK_TypedVectorList4_0h) { + if (Operand.isTypedVectorList<4, 0, 'h'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList4_0s' class + if (Kind == MCK_TypedVectorList4_0s) { + if (Operand.isTypedVectorList<4, 0, 's'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListOne128' class + if (Kind == MCK_VecListOne128) { + if (Operand.isImplicitlyTypedVectorList<1>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList1_16b' class + if (Kind == MCK_TypedVectorList1_16b) { + if (Operand.isTypedVectorList<1, 16, 'b'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList1_1d' class + if (Kind == MCK_TypedVectorList1_1d) { + if (Operand.isTypedVectorList<1, 1, 'd'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList1_2d' class + if (Kind == MCK_TypedVectorList1_2d) { + if (Operand.isTypedVectorList<1, 2, 'd'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList1_2s' class + if (Kind == MCK_TypedVectorList1_2s) { + if (Operand.isTypedVectorList<1, 2, 's'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList1_4h' class + if (Kind == MCK_TypedVectorList1_4h) { + if (Operand.isTypedVectorList<1, 4, 'h'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList1_4s' class + if (Kind == MCK_TypedVectorList1_4s) { + if (Operand.isTypedVectorList<1, 4, 's'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListOne64' class + if (Kind == MCK_VecListOne64) { + if (Operand.isImplicitlyTypedVectorList<1>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList1_8b' class + if (Kind == MCK_TypedVectorList1_8b) { + if (Operand.isTypedVectorList<1, 8, 'b'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList1_8h' class + if (Kind == MCK_TypedVectorList1_8h) { + if (Operand.isTypedVectorList<1, 8, 'h'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList1_0b' class + if (Kind == MCK_TypedVectorList1_0b) { + if (Operand.isTypedVectorList<1, 0, 'b'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList1_0d' class + if (Kind == MCK_TypedVectorList1_0d) { + if (Operand.isTypedVectorList<1, 0, 'd'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList1_0h' class + if (Kind == MCK_TypedVectorList1_0h) { + if (Operand.isTypedVectorList<1, 0, 'h'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList1_0s' class + if (Kind == MCK_TypedVectorList1_0s) { + if (Operand.isTypedVectorList<1, 0, 's'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListThree128' class + if (Kind == MCK_VecListThree128) { + if (Operand.isImplicitlyTypedVectorList<3>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList3_16b' class + if (Kind == MCK_TypedVectorList3_16b) { + if (Operand.isTypedVectorList<3, 16, 'b'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList3_1d' class + if (Kind == MCK_TypedVectorList3_1d) { + if (Operand.isTypedVectorList<3, 1, 'd'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList3_2d' class + if (Kind == MCK_TypedVectorList3_2d) { + if (Operand.isTypedVectorList<3, 2, 'd'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList3_2s' class + if (Kind == MCK_TypedVectorList3_2s) { + if (Operand.isTypedVectorList<3, 2, 's'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList3_4h' class + if (Kind == MCK_TypedVectorList3_4h) { + if (Operand.isTypedVectorList<3, 4, 'h'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList3_4s' class + if (Kind == MCK_TypedVectorList3_4s) { + if (Operand.isTypedVectorList<3, 4, 's'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListThree64' class + if (Kind == MCK_VecListThree64) { + if (Operand.isImplicitlyTypedVectorList<3>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList3_8b' class + if (Kind == MCK_TypedVectorList3_8b) { + if (Operand.isTypedVectorList<3, 8, 'b'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList3_8h' class + if (Kind == MCK_TypedVectorList3_8h) { + if (Operand.isTypedVectorList<3, 8, 'h'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList3_0b' class + if (Kind == MCK_TypedVectorList3_0b) { + if (Operand.isTypedVectorList<3, 0, 'b'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList3_0d' class + if (Kind == MCK_TypedVectorList3_0d) { + if (Operand.isTypedVectorList<3, 0, 'd'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList3_0h' class + if (Kind == MCK_TypedVectorList3_0h) { + if (Operand.isTypedVectorList<3, 0, 'h'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList3_0s' class + if (Kind == MCK_TypedVectorList3_0s) { + if (Operand.isTypedVectorList<3, 0, 's'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListTwo128' class + if (Kind == MCK_VecListTwo128) { + if (Operand.isImplicitlyTypedVectorList<2>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList2_16b' class + if (Kind == MCK_TypedVectorList2_16b) { + if (Operand.isTypedVectorList<2, 16, 'b'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList2_1d' class + if (Kind == MCK_TypedVectorList2_1d) { + if (Operand.isTypedVectorList<2, 1, 'd'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList2_2d' class + if (Kind == MCK_TypedVectorList2_2d) { + if (Operand.isTypedVectorList<2, 2, 'd'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList2_2s' class + if (Kind == MCK_TypedVectorList2_2s) { + if (Operand.isTypedVectorList<2, 2, 's'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList2_4h' class + if (Kind == MCK_TypedVectorList2_4h) { + if (Operand.isTypedVectorList<2, 4, 'h'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList2_4s' class + if (Kind == MCK_TypedVectorList2_4s) { + if (Operand.isTypedVectorList<2, 4, 's'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListTwo64' class + if (Kind == MCK_VecListTwo64) { + if (Operand.isImplicitlyTypedVectorList<2>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList2_8b' class + if (Kind == MCK_TypedVectorList2_8b) { + if (Operand.isTypedVectorList<2, 8, 'b'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList2_8h' class + if (Kind == MCK_TypedVectorList2_8h) { + if (Operand.isTypedVectorList<2, 8, 'h'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList2_0b' class + if (Kind == MCK_TypedVectorList2_0b) { + if (Operand.isTypedVectorList<2, 0, 'b'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList2_0d' class + if (Kind == MCK_TypedVectorList2_0d) { + if (Operand.isTypedVectorList<2, 0, 'd'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList2_0h' class + if (Kind == MCK_TypedVectorList2_0h) { + if (Operand.isTypedVectorList<2, 0, 'h'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'TypedVectorList2_0s' class + if (Kind == MCK_TypedVectorList2_0s) { + if (Operand.isTypedVectorList<2, 0, 's'>()) + return MCTargetAsmParser::Match_Success; + } + + // 'VectorIndex1' class + if (Kind == MCK_VectorIndex1) { + if (Operand.isVectorIndex1()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidIndex1; + } + + // 'VectorIndexB' class + if (Kind == MCK_VectorIndexB) { + if (Operand.isVectorIndexB()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidIndexB; + } + + // 'VectorIndexD' class + if (Kind == MCK_VectorIndexD) { + if (Operand.isVectorIndexD()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidIndexD; + } + + // 'VectorIndexH' class + if (Kind == MCK_VectorIndexH) { + if (Operand.isVectorIndexH()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidIndexH; + } + + // 'VectorIndexS' class + if (Kind == MCK_VectorIndexS) { + if (Operand.isVectorIndexS()) + return MCTargetAsmParser::Match_Success; + return AArch64AsmParser::Match_InvalidIndexS; + } + + // 'VectorReg128' class + if (Kind == MCK_VectorReg128) { + if (Operand.isVectorReg()) + return MCTargetAsmParser::Match_Success; + } + + // 'VectorReg64' class + if (Kind == MCK_VectorReg64) { + if (Operand.isVectorReg()) + return MCTargetAsmParser::Match_Success; + } + + // 'VectorRegLo' class + if (Kind == MCK_VectorRegLo) { + if (Operand.isVectorRegLo()) + return MCTargetAsmParser::Match_Success; + } + + // 'WSeqPair' class + if (Kind == MCK_WSeqPair) { + if (Operand.isWSeqPair()) + return MCTargetAsmParser::Match_Success; + } + + // 'XSeqPair' class + if (Kind == MCK_XSeqPair) { + if (Operand.isXSeqPair()) + return MCTargetAsmParser::Match_Success; + } + + // 'MOVZ32_lsl0MovAlias' class + if (Kind == MCK_MOVZ32_lsl0MovAlias) { + if (Operand.isMOVZMovAlias<32, 0>()) + return MCTargetAsmParser::Match_Success; + } + + // 'MOVZ32_lsl16MovAlias' class + if (Kind == MCK_MOVZ32_lsl16MovAlias) { + if (Operand.isMOVZMovAlias<32, 16>()) + return MCTargetAsmParser::Match_Success; + } + + // 'MOVZ64_lsl0MovAlias' class + if (Kind == MCK_MOVZ64_lsl0MovAlias) { + if (Operand.isMOVZMovAlias<64, 0>()) + return MCTargetAsmParser::Match_Success; + } + + // 'MOVZ64_lsl16MovAlias' class + if (Kind == MCK_MOVZ64_lsl16MovAlias) { + if (Operand.isMOVZMovAlias<64, 16>()) + return MCTargetAsmParser::Match_Success; + } + + // 'MOVZ64_lsl32MovAlias' class + if (Kind == MCK_MOVZ64_lsl32MovAlias) { + if (Operand.isMOVZMovAlias<64, 32>()) + return MCTargetAsmParser::Match_Success; + } + + // 'MOVZ64_lsl48MovAlias' class + if (Kind == MCK_MOVZ64_lsl48MovAlias) { + if (Operand.isMOVZMovAlias<64, 48>()) + return MCTargetAsmParser::Match_Success; + } + + // 'MOVN32_lsl0MovAlias' class + if (Kind == MCK_MOVN32_lsl0MovAlias) { + if (Operand.isMOVNMovAlias<32, 0>()) + return MCTargetAsmParser::Match_Success; + } + + // 'MOVN32_lsl16MovAlias' class + if (Kind == MCK_MOVN32_lsl16MovAlias) { + if (Operand.isMOVNMovAlias<32, 16>()) + return MCTargetAsmParser::Match_Success; + } + + // 'MOVN64_lsl0MovAlias' class + if (Kind == MCK_MOVN64_lsl0MovAlias) { + if (Operand.isMOVNMovAlias<64, 0>()) + return MCTargetAsmParser::Match_Success; + } + + // 'MOVN64_lsl16MovAlias' class + if (Kind == MCK_MOVN64_lsl16MovAlias) { + if (Operand.isMOVNMovAlias<64, 16>()) + return MCTargetAsmParser::Match_Success; + } + + // 'MOVN64_lsl32MovAlias' class + if (Kind == MCK_MOVN64_lsl32MovAlias) { + if (Operand.isMOVNMovAlias<64, 32>()) + return MCTargetAsmParser::Match_Success; + } + + // 'MOVN64_lsl48MovAlias' class + if (Kind == MCK_MOVN64_lsl48MovAlias) { + if (Operand.isMOVNMovAlias<64, 48>()) + return MCTargetAsmParser::Match_Success; + } + + if (Operand.isReg()) { + MatchClassKind OpKind; + switch (Operand.getReg()) { + default: OpKind = InvalidMatchClass; break; + case AArch64::W0: OpKind = MCK_GPR32common; break; + case AArch64::W1: OpKind = MCK_GPR32common; break; + case AArch64::W2: OpKind = MCK_GPR32common; break; + case AArch64::W3: OpKind = MCK_GPR32common; break; + case AArch64::W4: OpKind = MCK_GPR32common; break; + case AArch64::W5: OpKind = MCK_GPR32common; break; + case AArch64::W6: OpKind = MCK_GPR32common; break; + case AArch64::W7: OpKind = MCK_GPR32common; break; + case AArch64::W8: OpKind = MCK_GPR32common; break; + case AArch64::W9: OpKind = MCK_GPR32common; break; + case AArch64::W10: OpKind = MCK_GPR32common; break; + case AArch64::W11: OpKind = MCK_GPR32common; break; + case AArch64::W12: OpKind = MCK_GPR32common; break; + case AArch64::W13: OpKind = MCK_GPR32common; break; + case AArch64::W14: OpKind = MCK_GPR32common; break; + case AArch64::W15: OpKind = MCK_GPR32common; break; + case AArch64::W16: OpKind = MCK_GPR32common; break; + case AArch64::W17: OpKind = MCK_GPR32common; break; + case AArch64::W18: OpKind = MCK_GPR32common; break; + case AArch64::W19: OpKind = MCK_GPR32common; break; + case AArch64::W20: OpKind = MCK_GPR32common; break; + case AArch64::W21: OpKind = MCK_GPR32common; break; + case AArch64::W22: OpKind = MCK_GPR32common; break; + case AArch64::W23: OpKind = MCK_GPR32common; break; + case AArch64::W24: OpKind = MCK_GPR32common; break; + case AArch64::W25: OpKind = MCK_GPR32common; break; + case AArch64::W26: OpKind = MCK_GPR32common; break; + case AArch64::W27: OpKind = MCK_GPR32common; break; + case AArch64::W28: OpKind = MCK_GPR32common; break; + case AArch64::W29: OpKind = MCK_GPR32common; break; + case AArch64::W30: OpKind = MCK_GPR32common; break; + case AArch64::WSP: OpKind = MCK_GPR32sponly; break; + case AArch64::WZR: OpKind = MCK_GPR32; break; + case AArch64::X0: OpKind = MCK_tcGPR64; break; + case AArch64::X1: OpKind = MCK_tcGPR64; break; + case AArch64::X2: OpKind = MCK_tcGPR64; break; + case AArch64::X3: OpKind = MCK_tcGPR64; break; + case AArch64::X4: OpKind = MCK_tcGPR64; break; + case AArch64::X5: OpKind = MCK_tcGPR64; break; + case AArch64::X6: OpKind = MCK_tcGPR64; break; + case AArch64::X7: OpKind = MCK_tcGPR64; break; + case AArch64::X8: OpKind = MCK_tcGPR64; break; + case AArch64::X9: OpKind = MCK_tcGPR64; break; + case AArch64::X10: OpKind = MCK_tcGPR64; break; + case AArch64::X11: OpKind = MCK_tcGPR64; break; + case AArch64::X12: OpKind = MCK_tcGPR64; break; + case AArch64::X13: OpKind = MCK_tcGPR64; break; + case AArch64::X14: OpKind = MCK_tcGPR64; break; + case AArch64::X15: OpKind = MCK_tcGPR64; break; + case AArch64::X16: OpKind = MCK_tcGPR64; break; + case AArch64::X17: OpKind = MCK_tcGPR64; break; + case AArch64::X18: OpKind = MCK_tcGPR64; break; + case AArch64::X19: OpKind = MCK_GPR64common; break; + case AArch64::X20: OpKind = MCK_GPR64common; break; + case AArch64::X21: OpKind = MCK_GPR64common; break; + case AArch64::X22: OpKind = MCK_GPR64common; break; + case AArch64::X23: OpKind = MCK_GPR64common; break; + case AArch64::X24: OpKind = MCK_GPR64common; break; + case AArch64::X25: OpKind = MCK_GPR64common; break; + case AArch64::X26: OpKind = MCK_GPR64common; break; + case AArch64::X27: OpKind = MCK_GPR64common; break; + case AArch64::X28: OpKind = MCK_GPR64common; break; + case AArch64::FP: OpKind = MCK_GPR64common; break; + case AArch64::LR: OpKind = MCK_GPR64common; break; + case AArch64::SP: OpKind = MCK_GPR64sponly; break; + case AArch64::XZR: OpKind = MCK_GPR64; break; + case AArch64::NZCV: OpKind = MCK_CCR; break; + case AArch64::B0: OpKind = MCK_FPR8; break; + case AArch64::B1: OpKind = MCK_FPR8; break; + case AArch64::B2: OpKind = MCK_FPR8; break; + case AArch64::B3: OpKind = MCK_FPR8; break; + case AArch64::B4: OpKind = MCK_FPR8; break; + case AArch64::B5: OpKind = MCK_FPR8; break; + case AArch64::B6: OpKind = MCK_FPR8; break; + case AArch64::B7: OpKind = MCK_FPR8; break; + case AArch64::B8: OpKind = MCK_FPR8; break; + case AArch64::B9: OpKind = MCK_FPR8; break; + case AArch64::B10: OpKind = MCK_FPR8; break; + case AArch64::B11: OpKind = MCK_FPR8; break; + case AArch64::B12: OpKind = MCK_FPR8; break; + case AArch64::B13: OpKind = MCK_FPR8; break; + case AArch64::B14: OpKind = MCK_FPR8; break; + case AArch64::B15: OpKind = MCK_FPR8; break; + case AArch64::B16: OpKind = MCK_FPR8; break; + case AArch64::B17: OpKind = MCK_FPR8; break; + case AArch64::B18: OpKind = MCK_FPR8; break; + case AArch64::B19: OpKind = MCK_FPR8; break; + case AArch64::B20: OpKind = MCK_FPR8; break; + case AArch64::B21: OpKind = MCK_FPR8; break; + case AArch64::B22: OpKind = MCK_FPR8; break; + case AArch64::B23: OpKind = MCK_FPR8; break; + case AArch64::B24: OpKind = MCK_FPR8; break; + case AArch64::B25: OpKind = MCK_FPR8; break; + case AArch64::B26: OpKind = MCK_FPR8; break; + case AArch64::B27: OpKind = MCK_FPR8; break; + case AArch64::B28: OpKind = MCK_FPR8; break; + case AArch64::B29: OpKind = MCK_FPR8; break; + case AArch64::B30: OpKind = MCK_FPR8; break; + case AArch64::B31: OpKind = MCK_FPR8; break; + case AArch64::H0: OpKind = MCK_FPR16; break; + case AArch64::H1: OpKind = MCK_FPR16; break; + case AArch64::H2: OpKind = MCK_FPR16; break; + case AArch64::H3: OpKind = MCK_FPR16; break; + case AArch64::H4: OpKind = MCK_FPR16; break; + case AArch64::H5: OpKind = MCK_FPR16; break; + case AArch64::H6: OpKind = MCK_FPR16; break; + case AArch64::H7: OpKind = MCK_FPR16; break; + case AArch64::H8: OpKind = MCK_FPR16; break; + case AArch64::H9: OpKind = MCK_FPR16; break; + case AArch64::H10: OpKind = MCK_FPR16; break; + case AArch64::H11: OpKind = MCK_FPR16; break; + case AArch64::H12: OpKind = MCK_FPR16; break; + case AArch64::H13: OpKind = MCK_FPR16; break; + case AArch64::H14: OpKind = MCK_FPR16; break; + case AArch64::H15: OpKind = MCK_FPR16; break; + case AArch64::H16: OpKind = MCK_FPR16; break; + case AArch64::H17: OpKind = MCK_FPR16; break; + case AArch64::H18: OpKind = MCK_FPR16; break; + case AArch64::H19: OpKind = MCK_FPR16; break; + case AArch64::H20: OpKind = MCK_FPR16; break; + case AArch64::H21: OpKind = MCK_FPR16; break; + case AArch64::H22: OpKind = MCK_FPR16; break; + case AArch64::H23: OpKind = MCK_FPR16; break; + case AArch64::H24: OpKind = MCK_FPR16; break; + case AArch64::H25: OpKind = MCK_FPR16; break; + case AArch64::H26: OpKind = MCK_FPR16; break; + case AArch64::H27: OpKind = MCK_FPR16; break; + case AArch64::H28: OpKind = MCK_FPR16; break; + case AArch64::H29: OpKind = MCK_FPR16; break; + case AArch64::H30: OpKind = MCK_FPR16; break; + case AArch64::H31: OpKind = MCK_FPR16; break; + case AArch64::S0: OpKind = MCK_FPR32; break; + case AArch64::S1: OpKind = MCK_FPR32; break; + case AArch64::S2: OpKind = MCK_FPR32; break; + case AArch64::S3: OpKind = MCK_FPR32; break; + case AArch64::S4: OpKind = MCK_FPR32; break; + case AArch64::S5: OpKind = MCK_FPR32; break; + case AArch64::S6: OpKind = MCK_FPR32; break; + case AArch64::S7: OpKind = MCK_FPR32; break; + case AArch64::S8: OpKind = MCK_FPR32; break; + case AArch64::S9: OpKind = MCK_FPR32; break; + case AArch64::S10: OpKind = MCK_FPR32; break; + case AArch64::S11: OpKind = MCK_FPR32; break; + case AArch64::S12: OpKind = MCK_FPR32; break; + case AArch64::S13: OpKind = MCK_FPR32; break; + case AArch64::S14: OpKind = MCK_FPR32; break; + case AArch64::S15: OpKind = MCK_FPR32; break; + case AArch64::S16: OpKind = MCK_FPR32; break; + case AArch64::S17: OpKind = MCK_FPR32; break; + case AArch64::S18: OpKind = MCK_FPR32; break; + case AArch64::S19: OpKind = MCK_FPR32; break; + case AArch64::S20: OpKind = MCK_FPR32; break; + case AArch64::S21: OpKind = MCK_FPR32; break; + case AArch64::S22: OpKind = MCK_FPR32; break; + case AArch64::S23: OpKind = MCK_FPR32; break; + case AArch64::S24: OpKind = MCK_FPR32; break; + case AArch64::S25: OpKind = MCK_FPR32; break; + case AArch64::S26: OpKind = MCK_FPR32; break; + case AArch64::S27: OpKind = MCK_FPR32; break; + case AArch64::S28: OpKind = MCK_FPR32; break; + case AArch64::S29: OpKind = MCK_FPR32; break; + case AArch64::S30: OpKind = MCK_FPR32; break; + case AArch64::S31: OpKind = MCK_FPR32; break; + case AArch64::D0: OpKind = MCK_FPR64; break; + case AArch64::D1: OpKind = MCK_FPR64; break; + case AArch64::D2: OpKind = MCK_FPR64; break; + case AArch64::D3: OpKind = MCK_FPR64; break; + case AArch64::D4: OpKind = MCK_FPR64; break; + case AArch64::D5: OpKind = MCK_FPR64; break; + case AArch64::D6: OpKind = MCK_FPR64; break; + case AArch64::D7: OpKind = MCK_FPR64; break; + case AArch64::D8: OpKind = MCK_FPR64; break; + case AArch64::D9: OpKind = MCK_FPR64; break; + case AArch64::D10: OpKind = MCK_FPR64; break; + case AArch64::D11: OpKind = MCK_FPR64; break; + case AArch64::D12: OpKind = MCK_FPR64; break; + case AArch64::D13: OpKind = MCK_FPR64; break; + case AArch64::D14: OpKind = MCK_FPR64; break; + case AArch64::D15: OpKind = MCK_FPR64; break; + case AArch64::D16: OpKind = MCK_FPR64; break; + case AArch64::D17: OpKind = MCK_FPR64; break; + case AArch64::D18: OpKind = MCK_FPR64; break; + case AArch64::D19: OpKind = MCK_FPR64; break; + case AArch64::D20: OpKind = MCK_FPR64; break; + case AArch64::D21: OpKind = MCK_FPR64; break; + case AArch64::D22: OpKind = MCK_FPR64; break; + case AArch64::D23: OpKind = MCK_FPR64; break; + case AArch64::D24: OpKind = MCK_FPR64; break; + case AArch64::D25: OpKind = MCK_FPR64; break; + case AArch64::D26: OpKind = MCK_FPR64; break; + case AArch64::D27: OpKind = MCK_FPR64; break; + case AArch64::D28: OpKind = MCK_FPR64; break; + case AArch64::D29: OpKind = MCK_FPR64; break; + case AArch64::D30: OpKind = MCK_FPR64; break; + case AArch64::D31: OpKind = MCK_FPR64; break; + case AArch64::Q0: OpKind = MCK_FPR128_lo; break; + case AArch64::Q1: OpKind = MCK_FPR128_lo; break; + case AArch64::Q2: OpKind = MCK_FPR128_lo; break; + case AArch64::Q3: OpKind = MCK_FPR128_lo; break; + case AArch64::Q4: OpKind = MCK_FPR128_lo; break; + case AArch64::Q5: OpKind = MCK_FPR128_lo; break; + case AArch64::Q6: OpKind = MCK_FPR128_lo; break; + case AArch64::Q7: OpKind = MCK_FPR128_lo; break; + case AArch64::Q8: OpKind = MCK_FPR128_lo; break; + case AArch64::Q9: OpKind = MCK_FPR128_lo; break; + case AArch64::Q10: OpKind = MCK_FPR128_lo; break; + case AArch64::Q11: OpKind = MCK_FPR128_lo; break; + case AArch64::Q12: OpKind = MCK_FPR128_lo; break; + case AArch64::Q13: OpKind = MCK_FPR128_lo; break; + case AArch64::Q14: OpKind = MCK_FPR128_lo; break; + case AArch64::Q15: OpKind = MCK_FPR128_lo; break; + case AArch64::Q16: OpKind = MCK_FPR128; break; + case AArch64::Q17: OpKind = MCK_FPR128; break; + case AArch64::Q18: OpKind = MCK_FPR128; break; + case AArch64::Q19: OpKind = MCK_FPR128; break; + case AArch64::Q20: OpKind = MCK_FPR128; break; + case AArch64::Q21: OpKind = MCK_FPR128; break; + case AArch64::Q22: OpKind = MCK_FPR128; break; + case AArch64::Q23: OpKind = MCK_FPR128; break; + case AArch64::Q24: OpKind = MCK_FPR128; break; + case AArch64::Q25: OpKind = MCK_FPR128; break; + case AArch64::Q26: OpKind = MCK_FPR128; break; + case AArch64::Q27: OpKind = MCK_FPR128; break; + case AArch64::Q28: OpKind = MCK_FPR128; break; + case AArch64::Q29: OpKind = MCK_FPR128; break; + case AArch64::Q30: OpKind = MCK_FPR128; break; + case AArch64::Q31: OpKind = MCK_FPR128; break; + case AArch64::D0_D1: OpKind = MCK_DD; break; + case AArch64::D1_D2: OpKind = MCK_DD; break; + case AArch64::D2_D3: OpKind = MCK_DD; break; + case AArch64::D3_D4: OpKind = MCK_DD; break; + case AArch64::D4_D5: OpKind = MCK_DD; break; + case AArch64::D5_D6: OpKind = MCK_DD; break; + case AArch64::D6_D7: OpKind = MCK_DD; break; + case AArch64::D7_D8: OpKind = MCK_DD; break; + case AArch64::D8_D9: OpKind = MCK_DD; break; + case AArch64::D9_D10: OpKind = MCK_DD; break; + case AArch64::D10_D11: OpKind = MCK_DD; break; + case AArch64::D11_D12: OpKind = MCK_DD; break; + case AArch64::D12_D13: OpKind = MCK_DD; break; + case AArch64::D13_D14: OpKind = MCK_DD; break; + case AArch64::D14_D15: OpKind = MCK_DD; break; + case AArch64::D15_D16: OpKind = MCK_DD; break; + case AArch64::D16_D17: OpKind = MCK_DD; break; + case AArch64::D17_D18: OpKind = MCK_DD; break; + case AArch64::D18_D19: OpKind = MCK_DD; break; + case AArch64::D19_D20: OpKind = MCK_DD; break; + case AArch64::D20_D21: OpKind = MCK_DD; break; + case AArch64::D21_D22: OpKind = MCK_DD; break; + case AArch64::D22_D23: OpKind = MCK_DD; break; + case AArch64::D23_D24: OpKind = MCK_DD; break; + case AArch64::D24_D25: OpKind = MCK_DD; break; + case AArch64::D25_D26: OpKind = MCK_DD; break; + case AArch64::D26_D27: OpKind = MCK_DD; break; + case AArch64::D27_D28: OpKind = MCK_DD; break; + case AArch64::D28_D29: OpKind = MCK_DD; break; + case AArch64::D29_D30: OpKind = MCK_DD; break; + case AArch64::D30_D31: OpKind = MCK_DD; break; + case AArch64::D31_D0: OpKind = MCK_DD; break; + case AArch64::D0_D1_D2_D3: OpKind = MCK_DDDD; break; + case AArch64::D1_D2_D3_D4: OpKind = MCK_DDDD; break; + case AArch64::D2_D3_D4_D5: OpKind = MCK_DDDD; break; + case AArch64::D3_D4_D5_D6: OpKind = MCK_DDDD; break; + case AArch64::D4_D5_D6_D7: OpKind = MCK_DDDD; break; + case AArch64::D5_D6_D7_D8: OpKind = MCK_DDDD; break; + case AArch64::D6_D7_D8_D9: OpKind = MCK_DDDD; break; + case AArch64::D7_D8_D9_D10: OpKind = MCK_DDDD; break; + case AArch64::D8_D9_D10_D11: OpKind = MCK_DDDD; break; + case AArch64::D9_D10_D11_D12: OpKind = MCK_DDDD; break; + case AArch64::D10_D11_D12_D13: OpKind = MCK_DDDD; break; + case AArch64::D11_D12_D13_D14: OpKind = MCK_DDDD; break; + case AArch64::D12_D13_D14_D15: OpKind = MCK_DDDD; break; + case AArch64::D13_D14_D15_D16: OpKind = MCK_DDDD; break; + case AArch64::D14_D15_D16_D17: OpKind = MCK_DDDD; break; + case AArch64::D15_D16_D17_D18: OpKind = MCK_DDDD; break; + case AArch64::D16_D17_D18_D19: OpKind = MCK_DDDD; break; + case AArch64::D17_D18_D19_D20: OpKind = MCK_DDDD; break; + case AArch64::D18_D19_D20_D21: OpKind = MCK_DDDD; break; + case AArch64::D19_D20_D21_D22: OpKind = MCK_DDDD; break; + case AArch64::D20_D21_D22_D23: OpKind = MCK_DDDD; break; + case AArch64::D21_D22_D23_D24: OpKind = MCK_DDDD; break; + case AArch64::D22_D23_D24_D25: OpKind = MCK_DDDD; break; + case AArch64::D23_D24_D25_D26: OpKind = MCK_DDDD; break; + case AArch64::D24_D25_D26_D27: OpKind = MCK_DDDD; break; + case AArch64::D25_D26_D27_D28: OpKind = MCK_DDDD; break; + case AArch64::D26_D27_D28_D29: OpKind = MCK_DDDD; break; + case AArch64::D27_D28_D29_D30: OpKind = MCK_DDDD; break; + case AArch64::D28_D29_D30_D31: OpKind = MCK_DDDD; break; + case AArch64::D29_D30_D31_D0: OpKind = MCK_DDDD; break; + case AArch64::D30_D31_D0_D1: OpKind = MCK_DDDD; break; + case AArch64::D31_D0_D1_D2: OpKind = MCK_DDDD; break; + case AArch64::D0_D1_D2: OpKind = MCK_DDD; break; + case AArch64::D1_D2_D3: OpKind = MCK_DDD; break; + case AArch64::D2_D3_D4: OpKind = MCK_DDD; break; + case AArch64::D3_D4_D5: OpKind = MCK_DDD; break; + case AArch64::D4_D5_D6: OpKind = MCK_DDD; break; + case AArch64::D5_D6_D7: OpKind = MCK_DDD; break; + case AArch64::D6_D7_D8: OpKind = MCK_DDD; break; + case AArch64::D7_D8_D9: OpKind = MCK_DDD; break; + case AArch64::D8_D9_D10: OpKind = MCK_DDD; break; + case AArch64::D9_D10_D11: OpKind = MCK_DDD; break; + case AArch64::D10_D11_D12: OpKind = MCK_DDD; break; + case AArch64::D11_D12_D13: OpKind = MCK_DDD; break; + case AArch64::D12_D13_D14: OpKind = MCK_DDD; break; + case AArch64::D13_D14_D15: OpKind = MCK_DDD; break; + case AArch64::D14_D15_D16: OpKind = MCK_DDD; break; + case AArch64::D15_D16_D17: OpKind = MCK_DDD; break; + case AArch64::D16_D17_D18: OpKind = MCK_DDD; break; + case AArch64::D17_D18_D19: OpKind = MCK_DDD; break; + case AArch64::D18_D19_D20: OpKind = MCK_DDD; break; + case AArch64::D19_D20_D21: OpKind = MCK_DDD; break; + case AArch64::D20_D21_D22: OpKind = MCK_DDD; break; + case AArch64::D21_D22_D23: OpKind = MCK_DDD; break; + case AArch64::D22_D23_D24: OpKind = MCK_DDD; break; + case AArch64::D23_D24_D25: OpKind = MCK_DDD; break; + case AArch64::D24_D25_D26: OpKind = MCK_DDD; break; + case AArch64::D25_D26_D27: OpKind = MCK_DDD; break; + case AArch64::D26_D27_D28: OpKind = MCK_DDD; break; + case AArch64::D27_D28_D29: OpKind = MCK_DDD; break; + case AArch64::D28_D29_D30: OpKind = MCK_DDD; break; + case AArch64::D29_D30_D31: OpKind = MCK_DDD; break; + case AArch64::D30_D31_D0: OpKind = MCK_DDD; break; + case AArch64::D31_D0_D1: OpKind = MCK_DDD; break; + case AArch64::Q0_Q1: OpKind = MCK_Reg21; break; + case AArch64::Q1_Q2: OpKind = MCK_Reg21; break; + case AArch64::Q2_Q3: OpKind = MCK_Reg21; break; + case AArch64::Q3_Q4: OpKind = MCK_Reg21; break; + case AArch64::Q4_Q5: OpKind = MCK_Reg21; break; + case AArch64::Q5_Q6: OpKind = MCK_Reg21; break; + case AArch64::Q6_Q7: OpKind = MCK_Reg21; break; + case AArch64::Q7_Q8: OpKind = MCK_Reg21; break; + case AArch64::Q8_Q9: OpKind = MCK_Reg21; break; + case AArch64::Q9_Q10: OpKind = MCK_Reg21; break; + case AArch64::Q10_Q11: OpKind = MCK_Reg21; break; + case AArch64::Q11_Q12: OpKind = MCK_Reg21; break; + case AArch64::Q12_Q13: OpKind = MCK_Reg21; break; + case AArch64::Q13_Q14: OpKind = MCK_Reg21; break; + case AArch64::Q14_Q15: OpKind = MCK_Reg21; break; + case AArch64::Q15_Q16: OpKind = MCK_Reg22; break; + case AArch64::Q16_Q17: OpKind = MCK_QQ; break; + case AArch64::Q17_Q18: OpKind = MCK_QQ; break; + case AArch64::Q18_Q19: OpKind = MCK_QQ; break; + case AArch64::Q19_Q20: OpKind = MCK_QQ; break; + case AArch64::Q20_Q21: OpKind = MCK_QQ; break; + case AArch64::Q21_Q22: OpKind = MCK_QQ; break; + case AArch64::Q22_Q23: OpKind = MCK_QQ; break; + case AArch64::Q23_Q24: OpKind = MCK_QQ; break; + case AArch64::Q24_Q25: OpKind = MCK_QQ; break; + case AArch64::Q25_Q26: OpKind = MCK_QQ; break; + case AArch64::Q26_Q27: OpKind = MCK_QQ; break; + case AArch64::Q27_Q28: OpKind = MCK_QQ; break; + case AArch64::Q28_Q29: OpKind = MCK_QQ; break; + case AArch64::Q29_Q30: OpKind = MCK_QQ; break; + case AArch64::Q30_Q31: OpKind = MCK_QQ; break; + case AArch64::Q31_Q0: OpKind = MCK_Reg24; break; + case AArch64::Q0_Q1_Q2_Q3: OpKind = MCK_Reg25; break; + case AArch64::Q1_Q2_Q3_Q4: OpKind = MCK_Reg25; break; + case AArch64::Q2_Q3_Q4_Q5: OpKind = MCK_Reg25; break; + case AArch64::Q3_Q4_Q5_Q6: OpKind = MCK_Reg25; break; + case AArch64::Q4_Q5_Q6_Q7: OpKind = MCK_Reg25; break; + case AArch64::Q5_Q6_Q7_Q8: OpKind = MCK_Reg25; break; + case AArch64::Q6_Q7_Q8_Q9: OpKind = MCK_Reg25; break; + case AArch64::Q7_Q8_Q9_Q10: OpKind = MCK_Reg25; break; + case AArch64::Q8_Q9_Q10_Q11: OpKind = MCK_Reg25; break; + case AArch64::Q9_Q10_Q11_Q12: OpKind = MCK_Reg25; break; + case AArch64::Q10_Q11_Q12_Q13: OpKind = MCK_Reg25; break; + case AArch64::Q11_Q12_Q13_Q14: OpKind = MCK_Reg25; break; + case AArch64::Q12_Q13_Q14_Q15: OpKind = MCK_Reg25; break; + case AArch64::Q13_Q14_Q15_Q16: OpKind = MCK_Reg26; break; + case AArch64::Q14_Q15_Q16_Q17: OpKind = MCK_Reg27; break; + case AArch64::Q15_Q16_Q17_Q18: OpKind = MCK_Reg28; break; + case AArch64::Q16_Q17_Q18_Q19: OpKind = MCK_QQQQ; break; + case AArch64::Q17_Q18_Q19_Q20: OpKind = MCK_QQQQ; break; + case AArch64::Q18_Q19_Q20_Q21: OpKind = MCK_QQQQ; break; + case AArch64::Q19_Q20_Q21_Q22: OpKind = MCK_QQQQ; break; + case AArch64::Q20_Q21_Q22_Q23: OpKind = MCK_QQQQ; break; + case AArch64::Q21_Q22_Q23_Q24: OpKind = MCK_QQQQ; break; + case AArch64::Q22_Q23_Q24_Q25: OpKind = MCK_QQQQ; break; + case AArch64::Q23_Q24_Q25_Q26: OpKind = MCK_QQQQ; break; + case AArch64::Q24_Q25_Q26_Q27: OpKind = MCK_QQQQ; break; + case AArch64::Q25_Q26_Q27_Q28: OpKind = MCK_QQQQ; break; + case AArch64::Q26_Q27_Q28_Q29: OpKind = MCK_QQQQ; break; + case AArch64::Q27_Q28_Q29_Q30: OpKind = MCK_QQQQ; break; + case AArch64::Q28_Q29_Q30_Q31: OpKind = MCK_QQQQ; break; + case AArch64::Q29_Q30_Q31_Q0: OpKind = MCK_Reg33; break; + case AArch64::Q30_Q31_Q0_Q1: OpKind = MCK_Reg34; break; + case AArch64::Q31_Q0_Q1_Q2: OpKind = MCK_Reg35; break; + case AArch64::Q0_Q1_Q2: OpKind = MCK_Reg36; break; + case AArch64::Q1_Q2_Q3: OpKind = MCK_Reg36; break; + case AArch64::Q2_Q3_Q4: OpKind = MCK_Reg36; break; + case AArch64::Q3_Q4_Q5: OpKind = MCK_Reg36; break; + case AArch64::Q4_Q5_Q6: OpKind = MCK_Reg36; break; + case AArch64::Q5_Q6_Q7: OpKind = MCK_Reg36; break; + case AArch64::Q6_Q7_Q8: OpKind = MCK_Reg36; break; + case AArch64::Q7_Q8_Q9: OpKind = MCK_Reg36; break; + case AArch64::Q8_Q9_Q10: OpKind = MCK_Reg36; break; + case AArch64::Q9_Q10_Q11: OpKind = MCK_Reg36; break; + case AArch64::Q10_Q11_Q12: OpKind = MCK_Reg36; break; + case AArch64::Q11_Q12_Q13: OpKind = MCK_Reg36; break; + case AArch64::Q12_Q13_Q14: OpKind = MCK_Reg36; break; + case AArch64::Q13_Q14_Q15: OpKind = MCK_Reg36; break; + case AArch64::Q14_Q15_Q16: OpKind = MCK_Reg37; break; + case AArch64::Q15_Q16_Q17: OpKind = MCK_Reg38; break; + case AArch64::Q16_Q17_Q18: OpKind = MCK_QQQ; break; + case AArch64::Q17_Q18_Q19: OpKind = MCK_QQQ; break; + case AArch64::Q18_Q19_Q20: OpKind = MCK_QQQ; break; + case AArch64::Q19_Q20_Q21: OpKind = MCK_QQQ; break; + case AArch64::Q20_Q21_Q22: OpKind = MCK_QQQ; break; + case AArch64::Q21_Q22_Q23: OpKind = MCK_QQQ; break; + case AArch64::Q22_Q23_Q24: OpKind = MCK_QQQ; break; + case AArch64::Q23_Q24_Q25: OpKind = MCK_QQQ; break; + case AArch64::Q24_Q25_Q26: OpKind = MCK_QQQ; break; + case AArch64::Q25_Q26_Q27: OpKind = MCK_QQQ; break; + case AArch64::Q26_Q27_Q28: OpKind = MCK_QQQ; break; + case AArch64::Q27_Q28_Q29: OpKind = MCK_QQQ; break; + case AArch64::Q28_Q29_Q30: OpKind = MCK_QQQ; break; + case AArch64::Q29_Q30_Q31: OpKind = MCK_QQQ; break; + case AArch64::Q30_Q31_Q0: OpKind = MCK_Reg41; break; + case AArch64::Q31_Q0_Q1: OpKind = MCK_Reg42; break; + case AArch64::W0_W1: OpKind = MCK_Reg43; break; + case AArch64::W1_W2: OpKind = MCK_Reg43; break; + case AArch64::W2_W3: OpKind = MCK_Reg43; break; + case AArch64::W3_W4: OpKind = MCK_Reg43; break; + case AArch64::W4_W5: OpKind = MCK_Reg43; break; + case AArch64::W5_W6: OpKind = MCK_Reg43; break; + case AArch64::W6_W7: OpKind = MCK_Reg43; break; + case AArch64::W7_W8: OpKind = MCK_Reg43; break; + case AArch64::W8_W9: OpKind = MCK_Reg43; break; + case AArch64::W9_W10: OpKind = MCK_Reg43; break; + case AArch64::W10_W11: OpKind = MCK_Reg43; break; + case AArch64::W11_W12: OpKind = MCK_Reg43; break; + case AArch64::W12_W13: OpKind = MCK_Reg43; break; + case AArch64::W13_W14: OpKind = MCK_Reg43; break; + case AArch64::W14_W15: OpKind = MCK_Reg43; break; + case AArch64::W15_W16: OpKind = MCK_Reg43; break; + case AArch64::W16_W17: OpKind = MCK_Reg43; break; + case AArch64::W17_W18: OpKind = MCK_Reg43; break; + case AArch64::W18_W19: OpKind = MCK_Reg43; break; + case AArch64::W19_W20: OpKind = MCK_Reg43; break; + case AArch64::W20_W21: OpKind = MCK_Reg43; break; + case AArch64::W21_W22: OpKind = MCK_Reg43; break; + case AArch64::W22_W23: OpKind = MCK_Reg43; break; + case AArch64::W23_W24: OpKind = MCK_Reg43; break; + case AArch64::W24_W25: OpKind = MCK_Reg43; break; + case AArch64::W25_W26: OpKind = MCK_Reg43; break; + case AArch64::W26_W27: OpKind = MCK_Reg43; break; + case AArch64::W27_W28: OpKind = MCK_Reg43; break; + case AArch64::W28_W29: OpKind = MCK_Reg43; break; + case AArch64::W29_W30: OpKind = MCK_Reg43; break; + case AArch64::W30_WZR: OpKind = MCK_Reg44; break; + case AArch64::WZR_W0: OpKind = MCK_Reg46; break; + case AArch64::X0_X1: OpKind = MCK_Reg47; break; + case AArch64::X1_X2: OpKind = MCK_Reg47; break; + case AArch64::X2_X3: OpKind = MCK_Reg47; break; + case AArch64::X3_X4: OpKind = MCK_Reg47; break; + case AArch64::X4_X5: OpKind = MCK_Reg47; break; + case AArch64::X5_X6: OpKind = MCK_Reg47; break; + case AArch64::X6_X7: OpKind = MCK_Reg47; break; + case AArch64::X7_X8: OpKind = MCK_Reg47; break; + case AArch64::X8_X9: OpKind = MCK_Reg47; break; + case AArch64::X9_X10: OpKind = MCK_Reg47; break; + case AArch64::X10_X11: OpKind = MCK_Reg47; break; + case AArch64::X11_X12: OpKind = MCK_Reg47; break; + case AArch64::X12_X13: OpKind = MCK_Reg47; break; + case AArch64::X13_X14: OpKind = MCK_Reg47; break; + case AArch64::X14_X15: OpKind = MCK_Reg47; break; + case AArch64::X15_X16: OpKind = MCK_Reg47; break; + case AArch64::X16_X17: OpKind = MCK_Reg47; break; + case AArch64::X17_X18: OpKind = MCK_Reg47; break; + case AArch64::X18_X19: OpKind = MCK_Reg48; break; + case AArch64::X19_X20: OpKind = MCK_Reg49; break; + case AArch64::X20_X21: OpKind = MCK_Reg49; break; + case AArch64::X21_X22: OpKind = MCK_Reg49; break; + case AArch64::X22_X23: OpKind = MCK_Reg49; break; + case AArch64::X23_X24: OpKind = MCK_Reg49; break; + case AArch64::X24_X25: OpKind = MCK_Reg49; break; + case AArch64::X25_X26: OpKind = MCK_Reg49; break; + case AArch64::X26_X27: OpKind = MCK_Reg49; break; + case AArch64::X27_X28: OpKind = MCK_Reg49; break; + case AArch64::X28_FP: OpKind = MCK_Reg49; break; + case AArch64::FP_LR: OpKind = MCK_Reg49; break; + case AArch64::LR_XZR: OpKind = MCK_Reg50; break; + case AArch64::XZR_X0: OpKind = MCK_Reg53; break; + } + return isSubclass(OpKind, Kind) ? MCTargetAsmParser::Match_Success : + MCTargetAsmParser::Match_InvalidOperand; + } + + return MCTargetAsmParser::Match_InvalidOperand; +} + +uint64_t AArch64AsmParser:: +ComputeAvailableFeatures(const FeatureBitset& FB) const { + uint64_t Features = 0; + if ((FB[AArch64::HasV8_1aOps])) + Features |= Feature_HasV8_1a; + if ((FB[AArch64::HasV8_2aOps])) + Features |= Feature_HasV8_2a; + if ((FB[AArch64::FeatureFPARMv8])) + Features |= Feature_HasFPARMv8; + if ((FB[AArch64::FeatureNEON])) + Features |= Feature_HasNEON; + if ((FB[AArch64::FeatureCrypto])) + Features |= Feature_HasCrypto; + if ((FB[AArch64::FeatureCRC])) + Features |= Feature_HasCRC; + if ((FB[AArch64::FeatureFullFP16])) + Features |= Feature_HasFullFP16; + if ((FB[AArch64::FeatureSPE])) + Features |= Feature_HasSPE; + return Features; +} + +static const char *const MnemonicTable = + "\003abs\003adc\004adcs\003add\005addhn\006addhn2\004addp\004adds\004add" + "v\003adr\004adrp\004aesd\004aese\006aesimc\005aesmc\003and\004ands\003a" + "sr\004asrv\001b\003bfm\003bic\004bics\003bif\003bit\002bl\003blr\002br\003" + "brk\003bsl\003cas\004casa\005casab\005casah\005casal\006casalb\006casal" + "h\004casb\004cash\004casl\005caslb\005caslh\004casp\005caspa\006caspal\005" + "caspl\004cbnz\003cbz\004ccmn\004ccmp\004cinc\004cinv\005clrex\003cls\003" + "clz\004cmeq\004cmge\004cmgt\004cmhi\004cmhs\004cmle\004cmlo\004cmls\004" + "cmlt\003cmn\003cmp\005cmtst\004cneg\003cnt\006crc32b\007crc32cb\007crc3" + "2ch\007crc32cw\007crc32cx\006crc32h\006crc32w\006crc32x\004csel\004cset" + "\005csetm\005csinc\005csinv\005csneg\005dcps1\005dcps2\005dcps3\003dmb\004" + "drps\003dsb\003dup\003eon\003eor\004eret\003ext\004extr\004fabd\004fabs" + "\005facge\005facgt\005facle\005faclt\004fadd\005faddp\005fccmp\006fccmp" + "e\005fcmeq\005fcmge\005fcmgt\005fcmle\005fcmlt\004fcmp\005fcmpe\005fcse" + "l\004fcvt\006fcvtas\006fcvtau\005fcvtl\006fcvtl2\006fcvtms\006fcvtmu\005" + "fcvtn\006fcvtn2\006fcvtns\006fcvtnu\006fcvtps\006fcvtpu\006fcvtxn\007fc" + "vtxn2\006fcvtzs\006fcvtzu\004fdiv\005fmadd\004fmax\006fmaxnm\007fmaxnmp" + "\007fmaxnmv\005fmaxp\005fmaxv\004fmin\006fminnm\007fminnmp\007fminnmv\005" + "fminp\005fminv\004fmla\004fmls\004fmov\005fmsub\004fmul\005fmulx\004fne" + "g\006fnmadd\006fnmsub\005fnmul\006frecpe\006frecps\006frecpx\006frinta\006" + "frinti\006frintm\006frintn\006frintp\006frintx\006frintz\007frsqrte\007" + "frsqrts\005fsqrt\004fsub\004hint\003hlt\003hvc\003ins\003isb\003ld1\004" + "ld1r\003ld2\004ld2r\003ld3\004ld3r\003ld4\004ld4r\005ldadd\006ldadda\007" + "ldaddab\007ldaddah\007ldaddal\010ldaddalb\010ldaddalh\006ldaddb\006ldad" + "dh\006ldaddl\007ldaddlb\007ldaddlh\004ldar\005ldarb\005ldarh\005ldaxp\005" + "ldaxr\006ldaxrb\006ldaxrh\005ldclr\006ldclra\007ldclrab\007ldclrah\007l" + "dclral\010ldclralb\010ldclralh\006ldclrb\006ldclrh\006ldclrl\007ldclrlb" + "\007ldclrlh\005ldeor\006ldeora\007ldeorab\007ldeorah\007ldeoral\010ldeo" + "ralb\010ldeoralh\006ldeorb\006ldeorh\006ldeorl\007ldeorlb\007ldeorlh\005" + "ldlar\006ldlarb\006ldlarh\004ldnp\003ldp\005ldpsw\003ldr\004ldrb\004ldr" + "h\005ldrsb\005ldrsh\005ldrsw\005ldset\006ldseta\007ldsetab\007ldsetah\007" + "ldsetal\010ldsetalb\010ldsetalh\006ldsetb\006ldseth\006ldsetl\007ldsetl" + "b\007ldsetlh\006ldsmax\007ldsmaxa\010ldsmaxab\010ldsmaxah\010ldsmaxal\t" + "ldsmaxalb\tldsmaxalh\007ldsmaxb\007ldsmaxh\007ldsmaxl\010ldsmaxlb\010ld" + "smaxlh\006ldsmin\007ldsmina\010ldsminab\010ldsminah\010ldsminal\tldsmin" + "alb\tldsminalh\007ldsminb\007ldsminh\007ldsminl\010ldsminlb\010ldsminlh" + "\004ldtr\005ldtrb\005ldtrh\006ldtrsb\006ldtrsh\006ldtrsw\006ldumax\007l" + "dumaxa\010ldumaxab\010ldumaxah\010ldumaxal\tldumaxalb\tldumaxalh\007ldu" + "maxb\007ldumaxh\007ldumaxl\010ldumaxlb\010ldumaxlh\006ldumin\007ldumina" + "\010lduminab\010lduminah\010lduminal\tlduminalb\tlduminalh\007lduminb\007" + "lduminh\007lduminl\010lduminlb\010lduminlh\004ldur\005ldurb\005ldurh\006" + "ldursb\006ldursh\006ldursw\004ldxp\004ldxr\005ldxrb\005ldxrh\003lsl\004" + "lslv\003lsr\004lsrv\004madd\003mla\003mls\004mneg\003mov\004movi\004mov" + "k\004movn\004movz\003mrs\003msr\004msub\003mul\003mvn\004mvni\003neg\004" + "negs\003ngc\004ngcs\003nop\003not\003orn\003orr\004pmul\005pmull\006pmu" + "ll2\004prfm\005prfum\003psb\006raddhn\007raddhn2\004rbit\003ret\003rev\005" + "rev16\005rev32\005rev64\003ror\004rorv\005rshrn\006rshrn2\006rsubhn\007" + "rsubhn2\004saba\005sabal\006sabal2\004sabd\005sabdl\006sabdl2\006sadalp" + "\005saddl\006saddl2\006saddlp\006saddlv\005saddw\006saddw2\003sbc\004sb" + "cs\004sbfm\005scvtf\004sdiv\003sev\004sevl\005sha1c\005sha1h\005sha1m\005" + "sha1p\007sha1su0\007sha1su1\007sha256h\010sha256h2\tsha256su0\tsha256su" + "1\005shadd\003shl\004shll\005shll2\004shrn\005shrn2\005shsub\003sli\006" + "smaddl\004smax\005smaxp\005smaxv\003smc\004smin\005sminp\005sminv\005sm" + "lal\006smlal2\005smlsl\006smlsl2\006smnegl\004smov\006smsubl\005smulh\005" + "smull\006smull2\005sqabs\005sqadd\007sqdmlal\010sqdmlal2\007sqdmlsl\010" + "sqdmlsl2\007sqdmulh\007sqdmull\010sqdmull2\005sqneg\010sqrdmlah\010sqrd" + "mlsh\010sqrdmulh\006sqrshl\007sqrshrn\010sqrshrn2\010sqrshrun\tsqrshrun" + "2\005sqshl\006sqshlu\006sqshrn\007sqshrn2\007sqshrun\010sqshrun2\005sqs" + "ub\005sqxtn\006sqxtn2\006sqxtun\007sqxtun2\006srhadd\003sri\005srshl\005" + "srshr\005srsra\004sshl\005sshll\006sshll2\004sshr\004ssra\005ssubl\006s" + "subl2\005ssubw\006ssubw2\003st1\003st2\003st3\003st4\005stadd\006staddb" + "\006staddh\006staddl\007staddlb\007staddlh\005stclr\006stclrb\006stclrh" + "\006stclrl\007stclrlb\007stclrlh\005steor\006steorb\006steorh\006steorl" + "\007steorlb\007steorlh\005stllr\006stllrb\006stllrh\004stlr\005stlrb\005" + "stlrh\005stlxp\005stlxr\006stlxrb\006stlxrh\004stnp\003stp\003str\004st" + "rb\004strh\005stset\006stsetb\006stseth\006stsetl\007stsetlb\007stsetlh" + "\006stsmax\007stsmaxb\007stsmaxh\007stsmaxl\010stsmaxlb\010stsmaxlh\006" + "stsmin\007stsminb\007stsminh\007stsminl\010stsminlb\010stsminlh\004sttr" + "\005sttrb\005sttrh\006stumax\007stumaxb\007stumaxh\007stumaxl\010stumax" + "lb\010stumaxlh\006stumin\007stuminb\007stuminh\007stuminl\010stuminlb\010" + "stuminlh\004stur\005sturb\005sturh\004stxp\004stxr\005stxrb\005stxrh\003" + "sub\005subhn\006subhn2\004subs\006suqadd\003svc\003swp\004swpa\005swpab" + "\005swpah\005swpal\006swpalb\006swpalh\004swpb\004swph\004swpl\005swplb" + "\005swplh\004sxtb\004sxth\004sxtl\005sxtl2\004sxtw\003sys\004sysl\003tb" + "l\004tbnz\003tbx\003tbz\004trn1\004trn2\003tst\004uaba\005uabal\006uaba" + "l2\004uabd\005uabdl\006uabdl2\006uadalp\005uaddl\006uaddl2\006uaddlp\006" + "uaddlv\005uaddw\006uaddw2\004ubfm\005ucvtf\004udiv\005uhadd\005uhsub\006" + "umaddl\004umax\005umaxp\005umaxv\004umin\005uminp\005uminv\005umlal\006" + "umlal2\005umlsl\006umlsl2\006umnegl\004umov\006umsubl\005umulh\005umull" + "\006umull2\005uqadd\006uqrshl\007uqrshrn\010uqrshrn2\005uqshl\006uqshrn" + "\007uqshrn2\005uqsub\005uqxtn\006uqxtn2\006urecpe\006urhadd\005urshl\005" + "urshr\007ursqrte\005ursra\004ushl\005ushll\006ushll2\004ushr\006usqadd\004" + "usra\005usubl\006usubl2\005usubw\006usubw2\004uxtb\004uxth\004uxtl\005u" + "xtl2\004uxtw\004uzp1\004uzp2\003wfe\003wfi\003xtn\004xtn2\005yield\004z" + "ip1\004zip2"; + +namespace { + struct MatchEntry { + uint16_t Mnemonic; + uint16_t Opcode; + uint16_t ConvertFn; + uint8_t RequiredFeatures; + uint16_t Classes[7]; + StringRef getMnemonic() const { + return StringRef(MnemonicTable + Mnemonic + 1, + MnemonicTable[Mnemonic]); + } + }; + + // Predicate for searching for an opcode. + struct LessOpcode { + bool operator()(const MatchEntry &LHS, StringRef RHS) { + return LHS.getMnemonic() < RHS; + } + bool operator()(StringRef LHS, const MatchEntry &RHS) { + return LHS < RHS.getMnemonic(); + } + bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) { + return LHS.getMnemonic() < RHS.getMnemonic(); + } + }; +} // end anonymous namespace. + +static const MatchEntry MatchTable0[] = { + { 0 /* abs */, AArch64::ABSv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 0 /* abs */, AArch64::ABSv16i8, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 0 /* abs */, AArch64::ABSv2i64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 0 /* abs */, AArch64::ABSv4i32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 0 /* abs */, AArch64::ABSv8i16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 0 /* abs */, AArch64::ABSv2i32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 0 /* abs */, AArch64::ABSv4i16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 0 /* abs */, AArch64::ABSv8i8, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 4 /* adc */, AArch64::ADCWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 4 /* adc */, AArch64::ADCXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 8 /* adcs */, AArch64::ADCSWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 8 /* adcs */, AArch64::ADCSXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 13 /* add */, AArch64::ADDWrx, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_GPR32sponly, MCK_GPR32sp, MCK_GPR32 }, }, + { 13 /* add */, AArch64::ADDXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, 0, { MCK_GPR64sponly, MCK_GPR64sp, MCK_GPR64 }, }, + { 13 /* add */, AArch64::ADDv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 13 /* add */, AArch64::ADDWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 13 /* add */, AArch64::ADDWrx, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_GPR32sp, MCK_GPR32sponly, MCK_GPR32 }, }, + { 13 /* add */, AArch64::SUBWri, Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2, 0, { MCK_GPR32sp, MCK_GPR32sp, MCK_AddSubImmNeg }, }, + { 13 /* add */, AArch64::ADDWri, Convert__Reg1_0__Reg1_1__AddSubImm2_2, 0, { MCK_GPR32sp, MCK_GPR32sp, MCK_AddSubImm }, }, + { 13 /* add */, AArch64::ADDXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 13 /* add */, AArch64::ADDXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, 0, { MCK_GPR64sp, MCK_GPR64sponly, MCK_GPR64 }, }, + { 13 /* add */, AArch64::SUBXri, Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2, 0, { MCK_GPR64sp, MCK_GPR64sp, MCK_AddSubImmNeg }, }, + { 13 /* add */, AArch64::ADDXri, Convert__Reg1_0__Reg1_1__AddSubImm2_2, 0, { MCK_GPR64sp, MCK_GPR64sp, MCK_AddSubImm }, }, + { 13 /* add */, AArch64::ADDWrs, Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, }, + { 13 /* add */, AArch64::ADDWrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, 0, { MCK_GPR32sp, MCK_GPR32sp, MCK_GPR32, MCK_Extend }, }, + { 13 /* add */, AArch64::ADDXrs, Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_ArithmeticShifter64 }, }, + { 13 /* add */, AArch64::ADDXrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend641_3, 0, { MCK_GPR64sp, MCK_GPR64sp, MCK_GPR32, MCK_Extend64 }, }, + { 13 /* add */, AArch64::ADDXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__ExtendLSL641_3, 0, { MCK_GPR64sp, MCK_GPR64sp, MCK_GPR64, MCK_ExtendLSL64 }, }, + { 13 /* add */, AArch64::ADDv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 13 /* add */, AArch64::ADDv2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 13 /* add */, AArch64::ADDv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 13 /* add */, AArch64::ADDv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 13 /* add */, AArch64::ADDv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 13 /* add */, AArch64::ADDv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 13 /* add */, AArch64::ADDv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 17 /* addhn */, AArch64::ADDHNv2i64_v2i32, Convert__VectorReg641_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 17 /* addhn */, AArch64::ADDHNv4i32_v4i16, Convert__VectorReg641_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 17 /* addhn */, AArch64::ADDHNv8i16_v8i8, Convert__VectorReg641_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 23 /* addhn2 */, AArch64::ADDHNv8i16_v16i8, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 23 /* addhn2 */, AArch64::ADDHNv2i64_v4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 23 /* addhn2 */, AArch64::ADDHNv4i32_v8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 30 /* addp */, AArch64::ADDPv2i64p, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR64, MCK_VectorReg128, MCK__DOT_2d }, }, + { 30 /* addp */, AArch64::ADDPv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 30 /* addp */, AArch64::ADDPv2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 30 /* addp */, AArch64::ADDPv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 30 /* addp */, AArch64::ADDPv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 30 /* addp */, AArch64::ADDPv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 30 /* addp */, AArch64::ADDPv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 30 /* addp */, AArch64::ADDPv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 35 /* adds */, AArch64::ADDSWrx, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_GPR32, MCK_GPR32sponly, MCK_GPR32 }, }, + { 35 /* adds */, AArch64::ADDSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 35 /* adds */, AArch64::SUBSWri, Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2, 0, { MCK_GPR32, MCK_GPR32sp, MCK_AddSubImmNeg }, }, + { 35 /* adds */, AArch64::ADDSWri, Convert__Reg1_0__Reg1_1__AddSubImm2_2, 0, { MCK_GPR32, MCK_GPR32sp, MCK_AddSubImm }, }, + { 35 /* adds */, AArch64::ADDSXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, 0, { MCK_GPR64, MCK_GPR64sponly, MCK_GPR64 }, }, + { 35 /* adds */, AArch64::ADDSXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 35 /* adds */, AArch64::SUBSXri, Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2, 0, { MCK_GPR64, MCK_GPR64sp, MCK_AddSubImmNeg }, }, + { 35 /* adds */, AArch64::ADDSXri, Convert__Reg1_0__Reg1_1__AddSubImm2_2, 0, { MCK_GPR64, MCK_GPR64sp, MCK_AddSubImm }, }, + { 35 /* adds */, AArch64::ADDSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, }, + { 35 /* adds */, AArch64::ADDSWrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, 0, { MCK_GPR32, MCK_GPR32sp, MCK_GPR32, MCK_Extend }, }, + { 35 /* adds */, AArch64::ADDSXrs, Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_ArithmeticShifter64 }, }, + { 35 /* adds */, AArch64::ADDSXrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, 0, { MCK_GPR64, MCK_GPR64sp, MCK_GPR32, MCK_Extend }, }, + { 35 /* adds */, AArch64::ADDSXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__ExtendLSL641_3, 0, { MCK_GPR64, MCK_GPR64sp, MCK_GPR64, MCK_ExtendLSL64 }, }, + { 40 /* addv */, AArch64::ADDVv8i16v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR16, MCK_VectorReg128, MCK__DOT_8h }, }, + { 40 /* addv */, AArch64::ADDVv4i16v, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON, { MCK_FPR16, MCK_VectorReg64, MCK__DOT_4h }, }, + { 40 /* addv */, AArch64::ADDVv4i32v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR32, MCK_VectorReg128, MCK__DOT_4s }, }, + { 40 /* addv */, AArch64::ADDVv16i8v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR8, MCK_VectorReg128, MCK__DOT_16b }, }, + { 40 /* addv */, AArch64::ADDVv8i8v, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON, { MCK_FPR8, MCK_VectorReg64, MCK__DOT_8b }, }, + { 45 /* adr */, AArch64::ADR, Convert__Reg1_0__AdrLabel1_1, 0, { MCK_GPR64, MCK_AdrLabel }, }, + { 49 /* adrp */, AArch64::ADRP, Convert__Reg1_0__AdrpLabel1_1, 0, { MCK_GPR64, MCK_AdrpLabel }, }, + { 54 /* aesd */, AArch64::AESDrr, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasCrypto, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 59 /* aese */, AArch64::AESErr, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasCrypto, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 64 /* aesimc */, AArch64::AESIMCrr, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasCrypto, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 71 /* aesmc */, AArch64::AESMCrr, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasCrypto, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 77 /* and */, AArch64::ANDWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 77 /* and */, AArch64::ANDWri, Convert__Reg1_0__Reg1_1__LogicalImm321_2, 0, { MCK_GPR32sp, MCK_GPR32, MCK_LogicalImm32 }, }, + { 77 /* and */, AArch64::ANDXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 77 /* and */, AArch64::ANDXri, Convert__Reg1_0__Reg1_1__LogicalImm641_2, 0, { MCK_GPR64sp, MCK_GPR64, MCK_LogicalImm64 }, }, + { 77 /* and */, AArch64::ANDWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, }, + { 77 /* and */, AArch64::ANDXrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, }, + { 77 /* and */, AArch64::ANDv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 77 /* and */, AArch64::ANDv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 81 /* ands */, AArch64::ANDSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 81 /* ands */, AArch64::ANDSWri, Convert__Reg1_0__Reg1_1__LogicalImm321_2, 0, { MCK_GPR32, MCK_GPR32, MCK_LogicalImm32 }, }, + { 81 /* ands */, AArch64::ANDSXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 81 /* ands */, AArch64::ANDSXri, Convert__Reg1_0__Reg1_1__LogicalImm641_2, 0, { MCK_GPR64, MCK_GPR64, MCK_LogicalImm64 }, }, + { 81 /* ands */, AArch64::ANDSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, }, + { 81 /* ands */, AArch64::ANDSXrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, }, + { 86 /* asr */, AArch64::ASRVWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 86 /* asr */, AArch64::SBFMWri, Convert__Reg1_0__Reg1_1__Imm0_311_2__imm_95_31, 0, { MCK_GPR32, MCK_GPR32, MCK_Imm0_31 }, }, + { 86 /* asr */, AArch64::ASRVXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 86 /* asr */, AArch64::SBFMXri, Convert__Reg1_0__Reg1_1__Imm0_631_2__imm_95_63, 0, { MCK_GPR64, MCK_GPR64, MCK_Imm0_63 }, }, + { 90 /* asrv */, AArch64::ASRVWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 90 /* asrv */, AArch64::ASRVXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 95 /* b */, AArch64::B, Convert__BranchTarget261_0, 0, { MCK_BranchTarget26 }, }, + { 95 /* b */, AArch64::Bcc, Convert__CondCode1_1__PCRelLabel191_2, 0, { MCK__DOT_, MCK_CondCode, MCK_PCRelLabel19 }, }, + { 97 /* bfm */, AArch64::BFMWri, Convert__Reg1_0__Tie0__Reg1_1__Imm0_311_2__Imm0_311_3, 0, { MCK_GPR32, MCK_GPR32, MCK_Imm0_31, MCK_Imm0_31 }, }, + { 97 /* bfm */, AArch64::BFMXri, Convert__Reg1_0__Tie0__Reg1_1__Imm0_631_2__Imm0_631_3, 0, { MCK_GPR64, MCK_GPR64, MCK_Imm0_63, MCK_Imm0_63 }, }, + { 101 /* bic */, AArch64::BICv2i32, Convert__VectorReg641_1__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_2s, MCK_VectorReg64, MCK_Imm0_255 }, }, + { 101 /* bic */, AArch64::BICv4i16, Convert__VectorReg641_1__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_4h, MCK_VectorReg64, MCK_Imm0_255 }, }, + { 101 /* bic */, AArch64::BICv4i32, Convert__VectorReg1281_1__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_Imm0_255 }, }, + { 101 /* bic */, AArch64::BICv8i16, Convert__VectorReg1281_1__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_8h, MCK_VectorReg128, MCK_Imm0_255 }, }, + { 101 /* bic */, AArch64::BICWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 101 /* bic */, AArch64::ANDWri, Convert__Reg1_0__Reg1_1__LogicalImm32Not1_2, 0, { MCK_GPR32sp, MCK_GPR32, MCK_LogicalImm32Not }, }, + { 101 /* bic */, AArch64::BICXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 101 /* bic */, AArch64::ANDXri, Convert__Reg1_0__Reg1_1__LogicalImm64Not1_2, 0, { MCK_GPR64sp, MCK_GPR64, MCK_LogicalImm64Not }, }, + { 101 /* bic */, AArch64::BICv4i32, Convert__VectorReg1281_0__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_Imm0_255 }, }, + { 101 /* bic */, AArch64::BICv8i16, Convert__VectorReg1281_0__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_255 }, }, + { 101 /* bic */, AArch64::BICv2i32, Convert__VectorReg641_0__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg64, MCK__DOT_2s, MCK_Imm0_255 }, }, + { 101 /* bic */, AArch64::BICv4i16, Convert__VectorReg641_0__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_255 }, }, + { 101 /* bic */, AArch64::BICWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, }, + { 101 /* bic */, AArch64::BICXrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, }, + { 101 /* bic */, AArch64::BICv4i32, Convert__VectorReg1281_0__Tie0__Imm0_2551_2__LogicalVecShifter1_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_Imm0_255, MCK_LogicalVecShifter }, }, + { 101 /* bic */, AArch64::BICv8i16, Convert__VectorReg1281_0__Tie0__Imm0_2551_2__LogicalVecHalfWordShifter1_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_255, MCK_LogicalVecHalfWordShifter }, }, + { 101 /* bic */, AArch64::BICv2i32, Convert__VectorReg641_0__Tie0__Imm0_2551_2__LogicalVecShifter1_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_Imm0_255, MCK_LogicalVecShifter }, }, + { 101 /* bic */, AArch64::BICv4i16, Convert__VectorReg641_0__Tie0__Imm0_2551_2__LogicalVecHalfWordShifter1_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_255, MCK_LogicalVecHalfWordShifter }, }, + { 101 /* bic */, AArch64::BICv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 101 /* bic */, AArch64::BICv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 105 /* bics */, AArch64::BICSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 105 /* bics */, AArch64::ANDSWri, Convert__Reg1_0__Reg1_1__LogicalImm32Not1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_LogicalImm32Not }, }, + { 105 /* bics */, AArch64::BICSXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 105 /* bics */, AArch64::ANDSXri, Convert__Reg1_0__Reg1_1__LogicalImm64Not1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_LogicalImm64Not }, }, + { 105 /* bics */, AArch64::BICSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, }, + { 105 /* bics */, AArch64::BICSXrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, }, + { 110 /* bif */, AArch64::BIFv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 110 /* bif */, AArch64::BIFv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 114 /* bit */, AArch64::BITv16i8, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 114 /* bit */, AArch64::BITv8i8, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 118 /* bl */, AArch64::BL, Convert__BranchTarget261_0, 0, { MCK_BranchTarget26 }, }, + { 121 /* blr */, AArch64::BLR, Convert__Reg1_0, 0, { MCK_GPR64 }, }, + { 125 /* br */, AArch64::BR, Convert__Reg1_0, 0, { MCK_GPR64 }, }, + { 128 /* brk */, AArch64::BRK, Convert__Imm0_655351_0, 0, { MCK_Imm0_65535 }, }, + { 132 /* bsl */, AArch64::BSLv16i8, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 132 /* bsl */, AArch64::BSLv8i8, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 136 /* cas */, AArch64::CASs, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 136 /* cas */, AArch64::CASd, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 140 /* casa */, AArch64::CASAs, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 140 /* casa */, AArch64::CASAd, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 145 /* casab */, AArch64::CASAb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 151 /* casah */, AArch64::CASAh, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 157 /* casal */, AArch64::CASALs, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 157 /* casal */, AArch64::CASALd, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 163 /* casalb */, AArch64::CASALb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 170 /* casalh */, AArch64::CASALh, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 177 /* casb */, AArch64::CASb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 182 /* cash */, AArch64::CASh, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 187 /* casl */, AArch64::CASLs, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 187 /* casl */, AArch64::CASLd, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 192 /* caslb */, AArch64::CASLb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 198 /* caslh */, AArch64::CASLh, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 204 /* casp */, AArch64::CASPs, Convert__WSeqPair1_0__Tie0__WSeqPair1_1__Reg1_3, Feature_HasV8_1a, { MCK_WSeqPair, MCK_WSeqPair, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 204 /* casp */, AArch64::CASPd, Convert__XSeqPair1_0__Tie0__XSeqPair1_1__Reg1_3, Feature_HasV8_1a, { MCK_XSeqPair, MCK_XSeqPair, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 209 /* caspa */, AArch64::CASPAs, Convert__WSeqPair1_0__Tie0__WSeqPair1_1__Reg1_3, Feature_HasV8_1a, { MCK_WSeqPair, MCK_WSeqPair, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 209 /* caspa */, AArch64::CASPAd, Convert__XSeqPair1_0__Tie0__XSeqPair1_1__Reg1_3, Feature_HasV8_1a, { MCK_XSeqPair, MCK_XSeqPair, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 215 /* caspal */, AArch64::CASPALs, Convert__WSeqPair1_0__Tie0__WSeqPair1_1__Reg1_3, Feature_HasV8_1a, { MCK_WSeqPair, MCK_WSeqPair, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 215 /* caspal */, AArch64::CASPALd, Convert__XSeqPair1_0__Tie0__XSeqPair1_1__Reg1_3, Feature_HasV8_1a, { MCK_XSeqPair, MCK_XSeqPair, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 222 /* caspl */, AArch64::CASPLs, Convert__WSeqPair1_0__Tie0__WSeqPair1_1__Reg1_3, Feature_HasV8_1a, { MCK_WSeqPair, MCK_WSeqPair, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 222 /* caspl */, AArch64::CASPLd, Convert__XSeqPair1_0__Tie0__XSeqPair1_1__Reg1_3, Feature_HasV8_1a, { MCK_XSeqPair, MCK_XSeqPair, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 228 /* cbnz */, AArch64::CBNZW, Convert__Reg1_0__PCRelLabel191_1, 0, { MCK_GPR32, MCK_PCRelLabel19 }, }, + { 228 /* cbnz */, AArch64::CBNZX, Convert__Reg1_0__PCRelLabel191_1, 0, { MCK_GPR64, MCK_PCRelLabel19 }, }, + { 233 /* cbz */, AArch64::CBZW, Convert__Reg1_0__PCRelLabel191_1, 0, { MCK_GPR32, MCK_PCRelLabel19 }, }, + { 233 /* cbz */, AArch64::CBZX, Convert__Reg1_0__PCRelLabel191_1, 0, { MCK_GPR64, MCK_PCRelLabel19 }, }, + { 237 /* ccmn */, AArch64::CCMNWr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, 0, { MCK_GPR32, MCK_GPR32, MCK_Imm0_15, MCK_CondCode }, }, + { 237 /* ccmn */, AArch64::CCMNWi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, 0, { MCK_GPR32, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, }, + { 237 /* ccmn */, AArch64::CCMNXr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, 0, { MCK_GPR64, MCK_GPR64, MCK_Imm0_15, MCK_CondCode }, }, + { 237 /* ccmn */, AArch64::CCMNXi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, 0, { MCK_GPR64, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, }, + { 242 /* ccmp */, AArch64::CCMPWr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, 0, { MCK_GPR32, MCK_GPR32, MCK_Imm0_15, MCK_CondCode }, }, + { 242 /* ccmp */, AArch64::CCMPWi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, 0, { MCK_GPR32, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, }, + { 242 /* ccmp */, AArch64::CCMPXr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, 0, { MCK_GPR64, MCK_GPR64, MCK_Imm0_15, MCK_CondCode }, }, + { 242 /* ccmp */, AArch64::CCMPXi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, 0, { MCK_GPR64, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, }, + { 247 /* cinc */, AArch64::CSINCWr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_CondCode }, }, + { 247 /* cinc */, AArch64::CSINCXr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_CondCode }, }, + { 252 /* cinv */, AArch64::CSINVWr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_CondCode }, }, + { 252 /* cinv */, AArch64::CSINVXr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_CondCode }, }, + { 257 /* clrex */, AArch64::CLREX, Convert__imm_95_15, 0, { }, }, + { 257 /* clrex */, AArch64::CLREX, Convert__Imm0_151_0, 0, { MCK_Imm0_15 }, }, + { 263 /* cls */, AArch64::CLSWr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 263 /* cls */, AArch64::CLSXr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 263 /* cls */, AArch64::CLSv16i8, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 263 /* cls */, AArch64::CLSv4i32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 263 /* cls */, AArch64::CLSv8i16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 263 /* cls */, AArch64::CLSv2i32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 263 /* cls */, AArch64::CLSv4i16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 263 /* cls */, AArch64::CLSv8i8, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 267 /* clz */, AArch64::CLZWr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 267 /* clz */, AArch64::CLZXr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 267 /* clz */, AArch64::CLZv16i8, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 267 /* clz */, AArch64::CLZv4i32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 267 /* clz */, AArch64::CLZv8i16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 267 /* clz */, AArch64::CLZv2i32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 267 /* clz */, AArch64::CLZv4i16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 267 /* clz */, AArch64::CLZv8i8, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 271 /* cmeq */, AArch64::CMEQv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0 }, }, + { 271 /* cmeq */, AArch64::CMEQv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 271 /* cmeq */, AArch64::CMEQv16i8rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK__35_0 }, }, + { 271 /* cmeq */, AArch64::CMEQv2i64rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK__35_0 }, }, + { 271 /* cmeq */, AArch64::CMEQv4i32rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK__35_0 }, }, + { 271 /* cmeq */, AArch64::CMEQv8i16rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK__35_0 }, }, + { 271 /* cmeq */, AArch64::CMEQv2i32rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK__35_0 }, }, + { 271 /* cmeq */, AArch64::CMEQv4i16rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK__35_0 }, }, + { 271 /* cmeq */, AArch64::CMEQv8i8rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK__35_0 }, }, + { 271 /* cmeq */, AArch64::CMEQv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 271 /* cmeq */, AArch64::CMEQv2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 271 /* cmeq */, AArch64::CMEQv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 271 /* cmeq */, AArch64::CMEQv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 271 /* cmeq */, AArch64::CMEQv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 271 /* cmeq */, AArch64::CMEQv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 271 /* cmeq */, AArch64::CMEQv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 276 /* cmge */, AArch64::CMGEv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0 }, }, + { 276 /* cmge */, AArch64::CMGEv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 276 /* cmge */, AArch64::CMGEv16i8rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK__35_0 }, }, + { 276 /* cmge */, AArch64::CMGEv2i64rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK__35_0 }, }, + { 276 /* cmge */, AArch64::CMGEv4i32rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK__35_0 }, }, + { 276 /* cmge */, AArch64::CMGEv8i16rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK__35_0 }, }, + { 276 /* cmge */, AArch64::CMGEv2i32rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK__35_0 }, }, + { 276 /* cmge */, AArch64::CMGEv4i16rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK__35_0 }, }, + { 276 /* cmge */, AArch64::CMGEv8i8rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK__35_0 }, }, + { 276 /* cmge */, AArch64::CMGEv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 276 /* cmge */, AArch64::CMGEv2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 276 /* cmge */, AArch64::CMGEv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 276 /* cmge */, AArch64::CMGEv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 276 /* cmge */, AArch64::CMGEv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 276 /* cmge */, AArch64::CMGEv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 276 /* cmge */, AArch64::CMGEv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 281 /* cmgt */, AArch64::CMGTv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0 }, }, + { 281 /* cmgt */, AArch64::CMGTv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 281 /* cmgt */, AArch64::CMGTv16i8rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK__35_0 }, }, + { 281 /* cmgt */, AArch64::CMGTv2i64rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK__35_0 }, }, + { 281 /* cmgt */, AArch64::CMGTv4i32rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK__35_0 }, }, + { 281 /* cmgt */, AArch64::CMGTv8i16rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK__35_0 }, }, + { 281 /* cmgt */, AArch64::CMGTv2i32rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK__35_0 }, }, + { 281 /* cmgt */, AArch64::CMGTv4i16rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK__35_0 }, }, + { 281 /* cmgt */, AArch64::CMGTv8i8rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK__35_0 }, }, + { 281 /* cmgt */, AArch64::CMGTv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 281 /* cmgt */, AArch64::CMGTv2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 281 /* cmgt */, AArch64::CMGTv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 281 /* cmgt */, AArch64::CMGTv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 281 /* cmgt */, AArch64::CMGTv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 281 /* cmgt */, AArch64::CMGTv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 281 /* cmgt */, AArch64::CMGTv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 286 /* cmhi */, AArch64::CMHIv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 286 /* cmhi */, AArch64::CMHIv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 286 /* cmhi */, AArch64::CMHIv2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 286 /* cmhi */, AArch64::CMHIv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 286 /* cmhi */, AArch64::CMHIv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 286 /* cmhi */, AArch64::CMHIv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 286 /* cmhi */, AArch64::CMHIv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 286 /* cmhi */, AArch64::CMHIv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 291 /* cmhs */, AArch64::CMHSv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 291 /* cmhs */, AArch64::CMHSv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 291 /* cmhs */, AArch64::CMHSv2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 291 /* cmhs */, AArch64::CMHSv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 291 /* cmhs */, AArch64::CMHSv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 291 /* cmhs */, AArch64::CMHSv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 291 /* cmhs */, AArch64::CMHSv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 291 /* cmhs */, AArch64::CMHSv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 296 /* cmle */, AArch64::CMLEv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0 }, }, + { 296 /* cmle */, AArch64::CMGEv1i64, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 296 /* cmle */, AArch64::CMLEv16i8rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK__35_0 }, }, + { 296 /* cmle */, AArch64::CMLEv2i64rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK__35_0 }, }, + { 296 /* cmle */, AArch64::CMLEv4i32rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK__35_0 }, }, + { 296 /* cmle */, AArch64::CMLEv8i16rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK__35_0 }, }, + { 296 /* cmle */, AArch64::CMLEv2i32rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK__35_0 }, }, + { 296 /* cmle */, AArch64::CMLEv4i16rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK__35_0 }, }, + { 296 /* cmle */, AArch64::CMLEv8i8rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK__35_0 }, }, + { 296 /* cmle */, AArch64::CMGEv16i8, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 296 /* cmle */, AArch64::CMGEv2i64, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 296 /* cmle */, AArch64::CMGEv4i32, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 296 /* cmle */, AArch64::CMGEv8i16, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 296 /* cmle */, AArch64::CMGEv2i32, Convert__VectorReg641_0__VectorReg641_4__VectorReg641_2, 0, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 296 /* cmle */, AArch64::CMGEv4i16, Convert__VectorReg641_0__VectorReg641_4__VectorReg641_2, 0, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 296 /* cmle */, AArch64::CMGEv8i8, Convert__VectorReg641_0__VectorReg641_4__VectorReg641_2, 0, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 301 /* cmlo */, AArch64::CMHIv1i64, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 301 /* cmlo */, AArch64::CMHIv16i8, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 301 /* cmlo */, AArch64::CMHIv2i64, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 301 /* cmlo */, AArch64::CMHIv4i32, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 301 /* cmlo */, AArch64::CMHIv8i16, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 301 /* cmlo */, AArch64::CMHIv2i32, Convert__VectorReg641_0__VectorReg641_4__VectorReg641_2, 0, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 301 /* cmlo */, AArch64::CMHIv4i16, Convert__VectorReg641_0__VectorReg641_4__VectorReg641_2, 0, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 301 /* cmlo */, AArch64::CMHIv8i8, Convert__VectorReg641_0__VectorReg641_4__VectorReg641_2, 0, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 306 /* cmls */, AArch64::CMHSv1i64, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 306 /* cmls */, AArch64::CMHSv16i8, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 306 /* cmls */, AArch64::CMHSv2i64, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 306 /* cmls */, AArch64::CMHSv4i32, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 306 /* cmls */, AArch64::CMHSv8i16, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 306 /* cmls */, AArch64::CMHSv2i32, Convert__VectorReg641_0__VectorReg641_4__VectorReg641_2, 0, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 306 /* cmls */, AArch64::CMHSv4i16, Convert__VectorReg641_0__VectorReg641_4__VectorReg641_2, 0, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 306 /* cmls */, AArch64::CMHSv8i8, Convert__VectorReg641_0__VectorReg641_4__VectorReg641_2, 0, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 311 /* cmlt */, AArch64::CMLTv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0 }, }, + { 311 /* cmlt */, AArch64::CMGTv1i64, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 311 /* cmlt */, AArch64::CMLTv16i8rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK__35_0 }, }, + { 311 /* cmlt */, AArch64::CMLTv2i64rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK__35_0 }, }, + { 311 /* cmlt */, AArch64::CMLTv4i32rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK__35_0 }, }, + { 311 /* cmlt */, AArch64::CMLTv8i16rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK__35_0 }, }, + { 311 /* cmlt */, AArch64::CMLTv2i32rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK__35_0 }, }, + { 311 /* cmlt */, AArch64::CMLTv4i16rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK__35_0 }, }, + { 311 /* cmlt */, AArch64::CMLTv8i8rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK__35_0 }, }, + { 311 /* cmlt */, AArch64::CMGTv16i8, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 311 /* cmlt */, AArch64::CMGTv2i64, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 311 /* cmlt */, AArch64::CMGTv4i32, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 311 /* cmlt */, AArch64::CMGTv8i16, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 311 /* cmlt */, AArch64::CMGTv2i32, Convert__VectorReg641_0__VectorReg641_4__VectorReg641_2, 0, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 311 /* cmlt */, AArch64::CMGTv4i16, Convert__VectorReg641_0__VectorReg641_4__VectorReg641_2, 0, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 311 /* cmlt */, AArch64::CMGTv8i8, Convert__VectorReg641_0__VectorReg641_4__VectorReg641_2, 0, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 316 /* cmn */, AArch64::ADDSWrx, Convert__regWZR__Reg1_0__Reg1_1__imm_95_16, 0, { MCK_GPR32sponly, MCK_GPR32 }, }, + { 316 /* cmn */, AArch64::ADDSXrx64, Convert__regXZR__Reg1_0__Reg1_1__imm_95_24, 0, { MCK_GPR64sponly, MCK_GPR64 }, }, + { 316 /* cmn */, AArch64::ADDSWrs, Convert__regWZR__Reg1_0__Reg1_1__imm_95_0, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 316 /* cmn */, AArch64::SUBSWri, Convert__regWZR__Reg1_0__AddSubImmNeg2_1, 0, { MCK_GPR32sp, MCK_AddSubImmNeg }, }, + { 316 /* cmn */, AArch64::ADDSWri, Convert__regWZR__Reg1_0__AddSubImm2_1, 0, { MCK_GPR32sp, MCK_AddSubImm }, }, + { 316 /* cmn */, AArch64::ADDSXrs, Convert__regXZR__Reg1_0__Reg1_1__imm_95_0, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 316 /* cmn */, AArch64::SUBSXri, Convert__regXZR__Reg1_0__AddSubImmNeg2_1, 0, { MCK_GPR64sp, MCK_AddSubImmNeg }, }, + { 316 /* cmn */, AArch64::ADDSXri, Convert__regXZR__Reg1_0__AddSubImm2_1, 0, { MCK_GPR64sp, MCK_AddSubImm }, }, + { 316 /* cmn */, AArch64::ADDSWrs, Convert__regWZR__Reg1_0__Reg1_1__ArithmeticShifter321_2, 0, { MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, }, + { 316 /* cmn */, AArch64::ADDSWrx, Convert__regWZR__Reg1_0__Reg1_1__Extend1_2, 0, { MCK_GPR32sp, MCK_GPR32, MCK_Extend }, }, + { 316 /* cmn */, AArch64::ADDSXrs, Convert__regXZR__Reg1_0__Reg1_1__ArithmeticShifter641_2, 0, { MCK_GPR64, MCK_GPR64, MCK_ArithmeticShifter64 }, }, + { 316 /* cmn */, AArch64::ADDSXrx, Convert__regXZR__Reg1_0__Reg1_1__Extend1_2, 0, { MCK_GPR64sp, MCK_GPR32, MCK_Extend }, }, + { 316 /* cmn */, AArch64::ADDSXrx64, Convert__regXZR__Reg1_0__Reg1_1__ExtendLSL641_2, 0, { MCK_GPR64sp, MCK_GPR64, MCK_ExtendLSL64 }, }, + { 320 /* cmp */, AArch64::SUBSWrx, Convert__regWZR__Reg1_0__Reg1_1__imm_95_16, 0, { MCK_GPR32sponly, MCK_GPR32 }, }, + { 320 /* cmp */, AArch64::SUBSXrx64, Convert__regXZR__Reg1_0__Reg1_1__imm_95_24, 0, { MCK_GPR64sponly, MCK_GPR64 }, }, + { 320 /* cmp */, AArch64::SUBSWrs, Convert__regWZR__Reg1_0__Reg1_1__imm_95_0, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 320 /* cmp */, AArch64::ADDSWri, Convert__regWZR__Reg1_0__AddSubImmNeg2_1, 0, { MCK_GPR32sp, MCK_AddSubImmNeg }, }, + { 320 /* cmp */, AArch64::SUBSWri, Convert__regWZR__Reg1_0__AddSubImm2_1, 0, { MCK_GPR32sp, MCK_AddSubImm }, }, + { 320 /* cmp */, AArch64::SUBSXrs, Convert__regXZR__Reg1_0__Reg1_1__imm_95_0, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 320 /* cmp */, AArch64::ADDSXri, Convert__regXZR__Reg1_0__AddSubImmNeg2_1, 0, { MCK_GPR64sp, MCK_AddSubImmNeg }, }, + { 320 /* cmp */, AArch64::SUBSXri, Convert__regXZR__Reg1_0__AddSubImm2_1, 0, { MCK_GPR64sp, MCK_AddSubImm }, }, + { 320 /* cmp */, AArch64::SUBSWrs, Convert__regWZR__Reg1_0__Reg1_1__ArithmeticShifter321_2, 0, { MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, }, + { 320 /* cmp */, AArch64::SUBSWrx, Convert__regWZR__Reg1_0__Reg1_1__Extend1_2, 0, { MCK_GPR32sp, MCK_GPR32, MCK_Extend }, }, + { 320 /* cmp */, AArch64::SUBSXrs, Convert__regXZR__Reg1_0__Reg1_1__ArithmeticShifter641_2, 0, { MCK_GPR64, MCK_GPR64, MCK_ArithmeticShifter64 }, }, + { 320 /* cmp */, AArch64::SUBSXrx, Convert__regXZR__Reg1_0__Reg1_1__Extend1_2, 0, { MCK_GPR64sp, MCK_GPR32, MCK_Extend }, }, + { 320 /* cmp */, AArch64::SUBSXrx64, Convert__regXZR__Reg1_0__Reg1_1__ExtendLSL641_2, 0, { MCK_GPR64sp, MCK_GPR64, MCK_ExtendLSL64 }, }, + { 324 /* cmtst */, AArch64::CMTSTv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 324 /* cmtst */, AArch64::CMTSTv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 324 /* cmtst */, AArch64::CMTSTv2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 324 /* cmtst */, AArch64::CMTSTv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 324 /* cmtst */, AArch64::CMTSTv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 324 /* cmtst */, AArch64::CMTSTv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 324 /* cmtst */, AArch64::CMTSTv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 324 /* cmtst */, AArch64::CMTSTv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 330 /* cneg */, AArch64::CSNEGWr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_CondCode }, }, + { 330 /* cneg */, AArch64::CSNEGXr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_CondCode }, }, + { 335 /* cnt */, AArch64::CNTv16i8, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 335 /* cnt */, AArch64::CNTv8i8, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 339 /* crc32b */, AArch64::CRC32Brr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasCRC, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 346 /* crc32cb */, AArch64::CRC32CBrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasCRC, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 354 /* crc32ch */, AArch64::CRC32CHrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasCRC, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 362 /* crc32cw */, AArch64::CRC32CWrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasCRC, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 370 /* crc32cx */, AArch64::CRC32CXrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasCRC, { MCK_GPR32, MCK_GPR32, MCK_GPR64 }, }, + { 378 /* crc32h */, AArch64::CRC32Hrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasCRC, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 385 /* crc32w */, AArch64::CRC32Wrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasCRC, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 392 /* crc32x */, AArch64::CRC32Xrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasCRC, { MCK_GPR32, MCK_GPR32, MCK_GPR64 }, }, + { 399 /* csel */, AArch64::CSELWr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_CondCode }, }, + { 399 /* csel */, AArch64::CSELXr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_CondCode }, }, + { 404 /* cset */, AArch64::CSINCWr, Convert__Reg1_0__regWZR__regWZR__CondCode1_1, 0, { MCK_GPR32, MCK_CondCode }, }, + { 404 /* cset */, AArch64::CSINCXr, Convert__Reg1_0__regXZR__regXZR__CondCode1_1, 0, { MCK_GPR64, MCK_CondCode }, }, + { 409 /* csetm */, AArch64::CSINVWr, Convert__Reg1_0__regWZR__regWZR__CondCode1_1, 0, { MCK_GPR32, MCK_CondCode }, }, + { 409 /* csetm */, AArch64::CSINVXr, Convert__Reg1_0__regXZR__regXZR__CondCode1_1, 0, { MCK_GPR64, MCK_CondCode }, }, + { 415 /* csinc */, AArch64::CSINCWr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_CondCode }, }, + { 415 /* csinc */, AArch64::CSINCXr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_CondCode }, }, + { 421 /* csinv */, AArch64::CSINVWr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_CondCode }, }, + { 421 /* csinv */, AArch64::CSINVXr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_CondCode }, }, + { 427 /* csneg */, AArch64::CSNEGWr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_CondCode }, }, + { 427 /* csneg */, AArch64::CSNEGXr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_CondCode }, }, + { 433 /* dcps1 */, AArch64::DCPS1, Convert__imm_95_0, 0, { }, }, + { 433 /* dcps1 */, AArch64::DCPS1, Convert__Imm0_655351_0, 0, { MCK_Imm0_65535 }, }, + { 439 /* dcps2 */, AArch64::DCPS2, Convert__imm_95_0, 0, { }, }, + { 439 /* dcps2 */, AArch64::DCPS2, Convert__Imm0_655351_0, 0, { MCK_Imm0_65535 }, }, + { 445 /* dcps3 */, AArch64::DCPS3, Convert__imm_95_0, 0, { }, }, + { 445 /* dcps3 */, AArch64::DCPS3, Convert__Imm0_655351_0, 0, { MCK_Imm0_65535 }, }, + { 451 /* dmb */, AArch64::DMB, Convert__Barrier1_0, 0, { MCK_Barrier }, }, + { 455 /* drps */, AArch64::DRPS, Convert_NoOperands, 0, { }, }, + { 460 /* dsb */, AArch64::DSB, Convert__Barrier1_0, 0, { MCK_Barrier }, }, + { 464 /* dup */, AArch64::DUPv16i8gpr, Convert__VectorReg1281_0__Reg1_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_GPR32 }, }, + { 464 /* dup */, AArch64::DUPv2i64gpr, Convert__VectorReg1281_0__Reg1_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_GPR64 }, }, + { 464 /* dup */, AArch64::DUPv4i32gpr, Convert__VectorReg1281_0__Reg1_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_GPR32 }, }, + { 464 /* dup */, AArch64::DUPv8i16gpr, Convert__VectorReg1281_0__Reg1_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_GPR32 }, }, + { 464 /* dup */, AArch64::DUPv2i32gpr, Convert__VectorReg641_0__Reg1_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_GPR32 }, }, + { 464 /* dup */, AArch64::DUPv4i16gpr, Convert__VectorReg641_0__Reg1_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_GPR32 }, }, + { 464 /* dup */, AArch64::DUPv8i8gpr, Convert__VectorReg641_0__Reg1_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_GPR32 }, }, + { 464 /* dup */, AArch64::CPYi16, Convert__Reg1_0__VectorReg1281_1__VectorIndexH1_3, Feature_HasNEON, { MCK_FPR16, MCK_VectorReg128, MCK__DOT_h, MCK_VectorIndexH }, }, + { 464 /* dup */, AArch64::CPYi32, Convert__Reg1_0__VectorReg1281_1__VectorIndexS1_3, Feature_HasNEON, { MCK_FPR32, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 464 /* dup */, AArch64::CPYi64, Convert__Reg1_0__VectorReg1281_1__VectorIndexD1_3, Feature_HasNEON, { MCK_FPR64, MCK_VectorReg128, MCK__DOT_d, MCK_VectorIndexD }, }, + { 464 /* dup */, AArch64::CPYi8, Convert__Reg1_0__VectorReg1281_1__VectorIndexB1_3, Feature_HasNEON, { MCK_FPR8, MCK_VectorReg128, MCK__DOT_b, MCK_VectorIndexB }, }, + { 464 /* dup */, AArch64::DUPv16i8lane, Convert__VectorReg1281_0__VectorReg1281_2__VectorIndexB1_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_b, MCK_VectorIndexB }, }, + { 464 /* dup */, AArch64::DUPv2i64lane, Convert__VectorReg1281_0__VectorReg1281_2__VectorIndexD1_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_d, MCK_VectorIndexD }, }, + { 464 /* dup */, AArch64::DUPv4i32lane, Convert__VectorReg1281_0__VectorReg1281_2__VectorIndexS1_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 464 /* dup */, AArch64::DUPv8i16lane, Convert__VectorReg1281_0__VectorReg1281_2__VectorIndexH1_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_h, MCK_VectorIndexH }, }, + { 464 /* dup */, AArch64::DUPv2i32lane, Convert__VectorReg641_0__VectorReg1281_2__VectorIndexS1_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 464 /* dup */, AArch64::DUPv4i16lane, Convert__VectorReg641_0__VectorReg1281_2__VectorIndexH1_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg128, MCK__DOT_h, MCK_VectorIndexH }, }, + { 464 /* dup */, AArch64::DUPv8i8lane, Convert__VectorReg641_0__VectorReg1281_2__VectorIndexB1_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg128, MCK__DOT_b, MCK_VectorIndexB }, }, + { 468 /* eon */, AArch64::EONWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 468 /* eon */, AArch64::EORWri, Convert__Reg1_0__Reg1_1__LogicalImm32Not1_2, 0, { MCK_GPR32sp, MCK_GPR32, MCK_LogicalImm32Not }, }, + { 468 /* eon */, AArch64::EONXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 468 /* eon */, AArch64::EORXri, Convert__Reg1_0__Reg1_1__LogicalImm64Not1_2, 0, { MCK_GPR64sp, MCK_GPR64, MCK_LogicalImm64Not }, }, + { 468 /* eon */, AArch64::EONWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, }, + { 468 /* eon */, AArch64::EONXrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, }, + { 472 /* eor */, AArch64::EORWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 472 /* eor */, AArch64::EORWri, Convert__Reg1_0__Reg1_1__LogicalImm321_2, 0, { MCK_GPR32sp, MCK_GPR32, MCK_LogicalImm32 }, }, + { 472 /* eor */, AArch64::EORXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 472 /* eor */, AArch64::EORXri, Convert__Reg1_0__Reg1_1__LogicalImm641_2, 0, { MCK_GPR64sp, MCK_GPR64, MCK_LogicalImm64 }, }, + { 472 /* eor */, AArch64::EORWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, }, + { 472 /* eor */, AArch64::EORXrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, }, + { 472 /* eor */, AArch64::EORv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 472 /* eor */, AArch64::EORv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 476 /* eret */, AArch64::ERET, Convert_NoOperands, 0, { }, }, + { 481 /* ext */, AArch64::EXTv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4__Imm1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_Imm }, }, + { 481 /* ext */, AArch64::EXTv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4__Imm1_6, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_Imm }, }, + { 485 /* extr */, AArch64::EXTRWrri, Convert__Reg1_0__Reg1_1__Reg1_2__Imm0_311_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_Imm0_31 }, }, + { 485 /* extr */, AArch64::EXTRXrri, Convert__Reg1_0__Reg1_1__Reg1_2__Imm0_631_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_Imm0_63 }, }, + { 490 /* fabd */, AArch64::FABD16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 490 /* fabd */, AArch64::FABD32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 490 /* fabd */, AArch64::FABD64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 490 /* fabd */, AArch64::FABDv2f64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 490 /* fabd */, AArch64::FABDv4f32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 490 /* fabd */, AArch64::FABDv8f16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 490 /* fabd */, AArch64::FABDv2f32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 490 /* fabd */, AArch64::FABDv4f16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 495 /* fabs */, AArch64::FABSHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 495 /* fabs */, AArch64::FABSSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 495 /* fabs */, AArch64::FABSDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 495 /* fabs */, AArch64::FABSv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 495 /* fabs */, AArch64::FABSv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 495 /* fabs */, AArch64::FABSv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 495 /* fabs */, AArch64::FABSv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 495 /* fabs */, AArch64::FABSv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 500 /* facge */, AArch64::FACGE16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 500 /* facge */, AArch64::FACGE32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 500 /* facge */, AArch64::FACGE64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 500 /* facge */, AArch64::FACGEv2f64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 500 /* facge */, AArch64::FACGEv4f32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 500 /* facge */, AArch64::FACGEv8f16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 500 /* facge */, AArch64::FACGEv2f32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 500 /* facge */, AArch64::FACGEv4f16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 506 /* facgt */, AArch64::FACGT16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 506 /* facgt */, AArch64::FACGT32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 506 /* facgt */, AArch64::FACGT64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 506 /* facgt */, AArch64::FACGTv2f64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 506 /* facgt */, AArch64::FACGTv4f32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 506 /* facgt */, AArch64::FACGTv8f16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 506 /* facgt */, AArch64::FACGTv2f32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 506 /* facgt */, AArch64::FACGTv4f16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 512 /* facle */, AArch64::FACGE32, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 512 /* facle */, AArch64::FACGE64, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 512 /* facle */, AArch64::FACGEv2f64, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 512 /* facle */, AArch64::FACGEv4f32, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 512 /* facle */, AArch64::FACGEv8f16, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 512 /* facle */, AArch64::FACGEv2f32, Convert__VectorReg641_0__VectorReg641_4__VectorReg641_2, 0, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 512 /* facle */, AArch64::FACGEv4f16, Convert__VectorReg641_0__VectorReg641_4__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 518 /* faclt */, AArch64::FACGT32, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 518 /* faclt */, AArch64::FACGT64, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 518 /* faclt */, AArch64::FACGTv2f64, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 518 /* faclt */, AArch64::FACGTv4f32, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 518 /* faclt */, AArch64::FACGTv8f16, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 518 /* faclt */, AArch64::FACGTv2f32, Convert__VectorReg641_0__VectorReg641_4__VectorReg641_2, 0, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 518 /* faclt */, AArch64::FACGTv4f16, Convert__VectorReg641_0__VectorReg641_4__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 524 /* fadd */, AArch64::FADDHrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 524 /* fadd */, AArch64::FADDSrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 524 /* fadd */, AArch64::FADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 524 /* fadd */, AArch64::FADDv2f64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 524 /* fadd */, AArch64::FADDv4f32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 524 /* fadd */, AArch64::FADDv8f16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 524 /* fadd */, AArch64::FADDv2f32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 524 /* fadd */, AArch64::FADDv4f16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 529 /* faddp */, AArch64::FADDPv2i16p, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_VectorReg64, MCK__DOT_2h }, }, + { 529 /* faddp */, AArch64::FADDPv2i32p, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON, { MCK_FPR32, MCK_VectorReg64, MCK__DOT_2s }, }, + { 529 /* faddp */, AArch64::FADDPv2i64p, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR64, MCK_VectorReg128, MCK__DOT_2d }, }, + { 529 /* faddp */, AArch64::FADDPv2f64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 529 /* faddp */, AArch64::FADDPv4f32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 529 /* faddp */, AArch64::FADDPv8f16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 529 /* faddp */, AArch64::FADDPv2f32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 529 /* faddp */, AArch64::FADDPv4f16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 535 /* fccmp */, AArch64::FCCMPHrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15, MCK_CondCode }, }, + { 535 /* fccmp */, AArch64::FCCMPSrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_Imm0_15, MCK_CondCode }, }, + { 535 /* fccmp */, AArch64::FCCMPDrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_Imm0_15, MCK_CondCode }, }, + { 541 /* fccmpe */, AArch64::FCCMPEHrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15, MCK_CondCode }, }, + { 541 /* fccmpe */, AArch64::FCCMPESrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_Imm0_15, MCK_CondCode }, }, + { 541 /* fccmpe */, AArch64::FCCMPEDrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_Imm0_15, MCK_CondCode }, }, + { 548 /* fcmeq */, AArch64::FCMEQv1i16rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQ16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv1i32rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQ32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQ64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv2i64rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv2i32rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv4i16rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv4i32rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv8i16rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv1i16rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK__35_0, MCK__DOT_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv1i32rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK__35_0, MCK__DOT_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0, MCK__DOT_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv2i64rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv4i32rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv8i16rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv2i32rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv4i16rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv2i64rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK__35_0, MCK__DOT_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv2f64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 548 /* fcmeq */, AArch64::FCMEQv4i32rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK__35_0, MCK__DOT_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv4f32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 548 /* fcmeq */, AArch64::FCMEQv8i16rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK__35_0, MCK__DOT_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv8f16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 548 /* fcmeq */, AArch64::FCMEQv2i32rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK__35_0, MCK__DOT_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv2f32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 548 /* fcmeq */, AArch64::FCMEQv4i16rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK__35_0, MCK__DOT_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv4f16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 554 /* fcmge */, AArch64::FCMGEv1i16rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGE16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 554 /* fcmge */, AArch64::FCMGEv1i32rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGE32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 554 /* fcmge */, AArch64::FCMGEv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGE64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 554 /* fcmge */, AArch64::FCMGEv2i64rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv2i32rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv4i16rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv4i32rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv8i16rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv1i16rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK__35_0, MCK__DOT_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv1i32rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK__35_0, MCK__DOT_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0, MCK__DOT_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv2i64rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv4i32rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv8i16rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv2i32rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv4i16rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv2i64rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK__35_0, MCK__DOT_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv2f64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 554 /* fcmge */, AArch64::FCMGEv4i32rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK__35_0, MCK__DOT_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv4f32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 554 /* fcmge */, AArch64::FCMGEv8i16rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK__35_0, MCK__DOT_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv8f16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 554 /* fcmge */, AArch64::FCMGEv2i32rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK__35_0, MCK__DOT_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv2f32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 554 /* fcmge */, AArch64::FCMGEv4i16rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK__35_0, MCK__DOT_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv4f16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 560 /* fcmgt */, AArch64::FCMGTv1i16rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGT16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv1i32rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGT32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGT64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv2i64rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv2i32rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv4i16rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv4i32rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv8i16rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv1i16rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK__35_0, MCK__DOT_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv1i32rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK__35_0, MCK__DOT_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0, MCK__DOT_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv2i64rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv4i32rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv8i16rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv2i32rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv4i16rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv2i64rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK__35_0, MCK__DOT_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv2f64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 560 /* fcmgt */, AArch64::FCMGTv4i32rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK__35_0, MCK__DOT_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv4f32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 560 /* fcmgt */, AArch64::FCMGTv8i16rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK__35_0, MCK__DOT_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv8f16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 560 /* fcmgt */, AArch64::FCMGTv2i32rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK__35_0, MCK__DOT_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv2f32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 560 /* fcmgt */, AArch64::FCMGTv4i16rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK__35_0, MCK__DOT_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv4f16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 566 /* fcmle */, AArch64::FCMLEv1i16rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv1i32rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMGE32, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 566 /* fcmle */, AArch64::FCMLEv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMGE64, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 566 /* fcmle */, AArch64::FCMLEv2i64rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv2i32rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv4i16rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv4i32rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv8i16rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv1i16rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK__35_0, MCK__DOT_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv1i32rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK__35_0, MCK__DOT_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0, MCK__DOT_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv2i64rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv4i32rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv8i16rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv2i32rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv4i16rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv2i64rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK__35_0, MCK__DOT_0 }, }, + { 566 /* fcmle */, AArch64::FCMGEv2f64, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 566 /* fcmle */, AArch64::FCMLEv4i32rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK__35_0, MCK__DOT_0 }, }, + { 566 /* fcmle */, AArch64::FCMGEv4f32, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 566 /* fcmle */, AArch64::FCMLEv8i16rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK__35_0, MCK__DOT_0 }, }, + { 566 /* fcmle */, AArch64::FCMGEv8f16, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 566 /* fcmle */, AArch64::FCMLEv2i32rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK__35_0, MCK__DOT_0 }, }, + { 566 /* fcmle */, AArch64::FCMGEv2f32, Convert__VectorReg641_0__VectorReg641_4__VectorReg641_2, 0, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 566 /* fcmle */, AArch64::FCMLEv4i16rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK__35_0, MCK__DOT_0 }, }, + { 566 /* fcmle */, AArch64::FCMGEv4f16, Convert__VectorReg641_0__VectorReg641_4__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 572 /* fcmlt */, AArch64::FCMLTv1i16rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv1i32rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMGT32, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMGT64, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv2i64rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv2i32rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv4i16rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv4i32rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv8i16rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv1i16rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK__35_0, MCK__DOT_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv1i32rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK__35_0, MCK__DOT_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0, MCK__DOT_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv2i64rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv4i32rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv8i16rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv2i32rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv4i16rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv2i64rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK__35_0, MCK__DOT_0 }, }, + { 572 /* fcmlt */, AArch64::FCMGTv2f64, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 572 /* fcmlt */, AArch64::FCMLTv4i32rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK__35_0, MCK__DOT_0 }, }, + { 572 /* fcmlt */, AArch64::FCMGTv4f32, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 572 /* fcmlt */, AArch64::FCMLTv8i16rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK__35_0, MCK__DOT_0 }, }, + { 572 /* fcmlt */, AArch64::FCMGTv8f16, Convert__VectorReg1281_0__VectorReg1281_4__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 572 /* fcmlt */, AArch64::FCMLTv2i32rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK__35_0, MCK__DOT_0 }, }, + { 572 /* fcmlt */, AArch64::FCMGTv2f32, Convert__VectorReg641_0__VectorReg641_4__VectorReg641_2, 0, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 572 /* fcmlt */, AArch64::FCMLTv4i16rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK__35_0, MCK__DOT_0 }, }, + { 572 /* fcmlt */, AArch64::FCMGTv4f16, Convert__VectorReg641_0__VectorReg641_4__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 578 /* fcmp */, AArch64::FCMPHrr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 578 /* fcmp */, AArch64::FCMPSrr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 578 /* fcmp */, AArch64::FCMPDrr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 578 /* fcmp */, AArch64::FCMPHri, Convert__Reg1_0, Feature_HasFullFP16, { MCK_FPR16, MCK__35_0, MCK__DOT_0 }, }, + { 578 /* fcmp */, AArch64::FCMPSri, Convert__Reg1_0, Feature_HasFPARMv8, { MCK_FPR32, MCK__35_0, MCK__DOT_0 }, }, + { 578 /* fcmp */, AArch64::FCMPDri, Convert__Reg1_0, Feature_HasFPARMv8, { MCK_FPR64, MCK__35_0, MCK__DOT_0 }, }, + { 583 /* fcmpe */, AArch64::FCMPEHrr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 583 /* fcmpe */, AArch64::FCMPESrr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 583 /* fcmpe */, AArch64::FCMPEDrr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 583 /* fcmpe */, AArch64::FCMPEHri, Convert__Reg1_0, Feature_HasFullFP16, { MCK_FPR16, MCK__35_0, MCK__DOT_0 }, }, + { 583 /* fcmpe */, AArch64::FCMPESri, Convert__Reg1_0, Feature_HasFPARMv8, { MCK_FPR32, MCK__35_0, MCK__DOT_0 }, }, + { 583 /* fcmpe */, AArch64::FCMPEDri, Convert__Reg1_0, Feature_HasFPARMv8, { MCK_FPR64, MCK__35_0, MCK__DOT_0 }, }, + { 589 /* fcsel */, AArch64::FCSELHrrr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16, MCK_CondCode }, }, + { 589 /* fcsel */, AArch64::FCSELSrrr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_CondCode }, }, + { 589 /* fcsel */, AArch64::FCSELDrrr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_CondCode }, }, + { 595 /* fcvt */, AArch64::FCVTHSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR16, MCK_FPR32 }, }, + { 595 /* fcvt */, AArch64::FCVTHDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR16, MCK_FPR64 }, }, + { 595 /* fcvt */, AArch64::FCVTSHr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR16 }, }, + { 595 /* fcvt */, AArch64::FCVTSDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR64 }, }, + { 595 /* fcvt */, AArch64::FCVTDHr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR16 }, }, + { 595 /* fcvt */, AArch64::FCVTDSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR32 }, }, + { 600 /* fcvtas */, AArch64::FCVTASv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 600 /* fcvtas */, AArch64::FCVTASv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 600 /* fcvtas */, AArch64::FCVTASv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 600 /* fcvtas */, AArch64::FCVTASUWHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, }, + { 600 /* fcvtas */, AArch64::FCVTASUWSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32 }, }, + { 600 /* fcvtas */, AArch64::FCVTASUWDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64 }, }, + { 600 /* fcvtas */, AArch64::FCVTASUXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, }, + { 600 /* fcvtas */, AArch64::FCVTASUXSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32 }, }, + { 600 /* fcvtas */, AArch64::FCVTASUXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64 }, }, + { 600 /* fcvtas */, AArch64::FCVTASv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 600 /* fcvtas */, AArch64::FCVTASv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 600 /* fcvtas */, AArch64::FCVTASv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 600 /* fcvtas */, AArch64::FCVTASv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 600 /* fcvtas */, AArch64::FCVTASv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 607 /* fcvtau */, AArch64::FCVTAUv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 607 /* fcvtau */, AArch64::FCVTAUv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 607 /* fcvtau */, AArch64::FCVTAUv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 607 /* fcvtau */, AArch64::FCVTAUUWHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, }, + { 607 /* fcvtau */, AArch64::FCVTAUUWSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32 }, }, + { 607 /* fcvtau */, AArch64::FCVTAUUWDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64 }, }, + { 607 /* fcvtau */, AArch64::FCVTAUUXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, }, + { 607 /* fcvtau */, AArch64::FCVTAUUXSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32 }, }, + { 607 /* fcvtau */, AArch64::FCVTAUUXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64 }, }, + { 607 /* fcvtau */, AArch64::FCVTAUv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 607 /* fcvtau */, AArch64::FCVTAUv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 607 /* fcvtau */, AArch64::FCVTAUv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 607 /* fcvtau */, AArch64::FCVTAUv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 607 /* fcvtau */, AArch64::FCVTAUv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 614 /* fcvtl */, AArch64::FCVTLv2i32, Convert__VectorReg1281_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s }, }, + { 614 /* fcvtl */, AArch64::FCVTLv4i16, Convert__VectorReg1281_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h }, }, + { 620 /* fcvtl2 */, AArch64::FCVTLv4i32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s }, }, + { 620 /* fcvtl2 */, AArch64::FCVTLv8i16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h }, }, + { 627 /* fcvtms */, AArch64::FCVTMSv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 627 /* fcvtms */, AArch64::FCVTMSv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 627 /* fcvtms */, AArch64::FCVTMSv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 627 /* fcvtms */, AArch64::FCVTMSUWHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, }, + { 627 /* fcvtms */, AArch64::FCVTMSUWSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32 }, }, + { 627 /* fcvtms */, AArch64::FCVTMSUWDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64 }, }, + { 627 /* fcvtms */, AArch64::FCVTMSUXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, }, + { 627 /* fcvtms */, AArch64::FCVTMSUXSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32 }, }, + { 627 /* fcvtms */, AArch64::FCVTMSUXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64 }, }, + { 627 /* fcvtms */, AArch64::FCVTMSv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 627 /* fcvtms */, AArch64::FCVTMSv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 627 /* fcvtms */, AArch64::FCVTMSv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 627 /* fcvtms */, AArch64::FCVTMSv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 627 /* fcvtms */, AArch64::FCVTMSv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUUWHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUUWSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32 }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUUWDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64 }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUUXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUUXSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32 }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUUXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64 }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 641 /* fcvtn */, AArch64::FCVTNv2i32, Convert__VectorReg641_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_2d }, }, + { 641 /* fcvtn */, AArch64::FCVTNv4i16, Convert__VectorReg641_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg128, MCK__DOT_4s }, }, + { 647 /* fcvtn2 */, AArch64::FCVTNv4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_2d }, }, + { 647 /* fcvtn2 */, AArch64::FCVTNv8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_4s }, }, + { 654 /* fcvtns */, AArch64::FCVTNSv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 654 /* fcvtns */, AArch64::FCVTNSv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 654 /* fcvtns */, AArch64::FCVTNSv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 654 /* fcvtns */, AArch64::FCVTNSUWHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, }, + { 654 /* fcvtns */, AArch64::FCVTNSUWSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32 }, }, + { 654 /* fcvtns */, AArch64::FCVTNSUWDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64 }, }, + { 654 /* fcvtns */, AArch64::FCVTNSUXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, }, + { 654 /* fcvtns */, AArch64::FCVTNSUXSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32 }, }, + { 654 /* fcvtns */, AArch64::FCVTNSUXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64 }, }, + { 654 /* fcvtns */, AArch64::FCVTNSv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 654 /* fcvtns */, AArch64::FCVTNSv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 654 /* fcvtns */, AArch64::FCVTNSv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 654 /* fcvtns */, AArch64::FCVTNSv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 654 /* fcvtns */, AArch64::FCVTNSv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUUWHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUUWSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32 }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUUWDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64 }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUUXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUUXSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32 }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUUXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64 }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 668 /* fcvtps */, AArch64::FCVTPSv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 668 /* fcvtps */, AArch64::FCVTPSv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 668 /* fcvtps */, AArch64::FCVTPSv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 668 /* fcvtps */, AArch64::FCVTPSUWHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, }, + { 668 /* fcvtps */, AArch64::FCVTPSUWSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32 }, }, + { 668 /* fcvtps */, AArch64::FCVTPSUWDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64 }, }, + { 668 /* fcvtps */, AArch64::FCVTPSUXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, }, + { 668 /* fcvtps */, AArch64::FCVTPSUXSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32 }, }, + { 668 /* fcvtps */, AArch64::FCVTPSUXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64 }, }, + { 668 /* fcvtps */, AArch64::FCVTPSv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 668 /* fcvtps */, AArch64::FCVTPSv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 668 /* fcvtps */, AArch64::FCVTPSv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 668 /* fcvtps */, AArch64::FCVTPSv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 668 /* fcvtps */, AArch64::FCVTPSv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUUWHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUUWSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32 }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUUWDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64 }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUUXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUUXSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32 }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUUXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64 }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 682 /* fcvtxn */, AArch64::FCVTXNv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR64 }, }, + { 682 /* fcvtxn */, AArch64::FCVTXNv2f32, Convert__VectorReg641_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_2d }, }, + { 689 /* fcvtxn2 */, AArch64::FCVTXNv4f32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_2d }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSUWHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSUWSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSUWDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSUXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSUXSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSUXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSh, Convert__Reg1_0__Reg1_1__Imm1_161_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm1_16 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSs, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_Imm1_32 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSd, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSSWHri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16, MCK_Imm1_32 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSSWSri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32, MCK_Imm1_32 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSSWDri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64, MCK_Imm1_32 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSSXHri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16, MCK_Imm1_64 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSSXSri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32, MCK_Imm1_64 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSSXDri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv2i64_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_64 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv4i32_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_32 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_16 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv2i32_shift, Convert__VectorReg641_0__VectorReg641_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_Imm1_32 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv4i16_shift, Convert__VectorReg641_0__VectorReg641_2__Imm1_161_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm1_16 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUUWHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUUWSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUUWDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUUXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUUXSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUUXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUh, Convert__Reg1_0__Reg1_1__Imm1_161_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm1_16 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUs, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_Imm1_32 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUd, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUSWHri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16, MCK_Imm1_32 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUSWSri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32, MCK_Imm1_32 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUSWDri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64, MCK_Imm1_32 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUSXHri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16, MCK_Imm1_64 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUSXSri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32, MCK_Imm1_64 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUSXDri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv2i64_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_64 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv4i32_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_32 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_16 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv2i32_shift, Convert__VectorReg641_0__VectorReg641_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_Imm1_32 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv4i16_shift, Convert__VectorReg641_0__VectorReg641_2__Imm1_161_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm1_16 }, }, + { 711 /* fdiv */, AArch64::FDIVHrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 711 /* fdiv */, AArch64::FDIVSrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 711 /* fdiv */, AArch64::FDIVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 711 /* fdiv */, AArch64::FDIVv2f64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 711 /* fdiv */, AArch64::FDIVv4f32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 711 /* fdiv */, AArch64::FDIVv8f16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 711 /* fdiv */, AArch64::FDIVv2f32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 711 /* fdiv */, AArch64::FDIVv4f16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 716 /* fmadd */, AArch64::FMADDHrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 716 /* fmadd */, AArch64::FMADDSrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 716 /* fmadd */, AArch64::FMADDDrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 722 /* fmax */, AArch64::FMAXHrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 722 /* fmax */, AArch64::FMAXSrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 722 /* fmax */, AArch64::FMAXDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 722 /* fmax */, AArch64::FMAXv2f64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 722 /* fmax */, AArch64::FMAXv4f32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 722 /* fmax */, AArch64::FMAXv8f16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 722 /* fmax */, AArch64::FMAXv2f32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 722 /* fmax */, AArch64::FMAXv4f16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 727 /* fmaxnm */, AArch64::FMAXNMHrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 727 /* fmaxnm */, AArch64::FMAXNMSrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 727 /* fmaxnm */, AArch64::FMAXNMDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 727 /* fmaxnm */, AArch64::FMAXNMv2f64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 727 /* fmaxnm */, AArch64::FMAXNMv4f32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 727 /* fmaxnm */, AArch64::FMAXNMv8f16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 727 /* fmaxnm */, AArch64::FMAXNMv2f32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 727 /* fmaxnm */, AArch64::FMAXNMv4f16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 734 /* fmaxnmp */, AArch64::FMAXNMPv2i16p, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_VectorReg64, MCK__DOT_2h }, }, + { 734 /* fmaxnmp */, AArch64::FMAXNMPv2i32p, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON, { MCK_FPR32, MCK_VectorReg64, MCK__DOT_2s }, }, + { 734 /* fmaxnmp */, AArch64::FMAXNMPv2i64p, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR64, MCK_VectorReg128, MCK__DOT_2d }, }, + { 734 /* fmaxnmp */, AArch64::FMAXNMPv2f64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 734 /* fmaxnmp */, AArch64::FMAXNMPv4f32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 734 /* fmaxnmp */, AArch64::FMAXNMPv8f16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 734 /* fmaxnmp */, AArch64::FMAXNMPv2f32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 734 /* fmaxnmp */, AArch64::FMAXNMPv4f16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 742 /* fmaxnmv */, AArch64::FMAXNMVv8i16v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_VectorReg128, MCK__DOT_8h }, }, + { 742 /* fmaxnmv */, AArch64::FMAXNMVv4i16v, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_VectorReg64, MCK__DOT_4h }, }, + { 742 /* fmaxnmv */, AArch64::FMAXNMVv4i32v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR32, MCK_VectorReg128, MCK__DOT_4s }, }, + { 750 /* fmaxp */, AArch64::FMAXPv2i16p, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_VectorReg64, MCK__DOT_2h }, }, + { 750 /* fmaxp */, AArch64::FMAXPv2i32p, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON, { MCK_FPR32, MCK_VectorReg64, MCK__DOT_2s }, }, + { 750 /* fmaxp */, AArch64::FMAXPv2i64p, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR64, MCK_VectorReg128, MCK__DOT_2d }, }, + { 750 /* fmaxp */, AArch64::FMAXPv2f64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 750 /* fmaxp */, AArch64::FMAXPv4f32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 750 /* fmaxp */, AArch64::FMAXPv8f16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 750 /* fmaxp */, AArch64::FMAXPv2f32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 750 /* fmaxp */, AArch64::FMAXPv4f16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 756 /* fmaxv */, AArch64::FMAXVv8i16v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_VectorReg128, MCK__DOT_8h }, }, + { 756 /* fmaxv */, AArch64::FMAXVv4i16v, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_VectorReg64, MCK__DOT_4h }, }, + { 756 /* fmaxv */, AArch64::FMAXVv4i32v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR32, MCK_VectorReg128, MCK__DOT_4s }, }, + { 762 /* fmin */, AArch64::FMINHrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 762 /* fmin */, AArch64::FMINSrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 762 /* fmin */, AArch64::FMINDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 762 /* fmin */, AArch64::FMINv2f64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 762 /* fmin */, AArch64::FMINv4f32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 762 /* fmin */, AArch64::FMINv8f16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 762 /* fmin */, AArch64::FMINv2f32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 762 /* fmin */, AArch64::FMINv4f16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 767 /* fminnm */, AArch64::FMINNMHrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 767 /* fminnm */, AArch64::FMINNMSrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 767 /* fminnm */, AArch64::FMINNMDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 767 /* fminnm */, AArch64::FMINNMv2f64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 767 /* fminnm */, AArch64::FMINNMv4f32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 767 /* fminnm */, AArch64::FMINNMv8f16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 767 /* fminnm */, AArch64::FMINNMv2f32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 767 /* fminnm */, AArch64::FMINNMv4f16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 774 /* fminnmp */, AArch64::FMINNMPv2i16p, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_VectorReg64, MCK__DOT_2h }, }, + { 774 /* fminnmp */, AArch64::FMINNMPv2i32p, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON, { MCK_FPR32, MCK_VectorReg64, MCK__DOT_2s }, }, + { 774 /* fminnmp */, AArch64::FMINNMPv2i64p, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR64, MCK_VectorReg128, MCK__DOT_2d }, }, + { 774 /* fminnmp */, AArch64::FMINNMPv2f64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 774 /* fminnmp */, AArch64::FMINNMPv4f32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 774 /* fminnmp */, AArch64::FMINNMPv8f16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 774 /* fminnmp */, AArch64::FMINNMPv2f32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 774 /* fminnmp */, AArch64::FMINNMPv4f16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 782 /* fminnmv */, AArch64::FMINNMVv8i16v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_VectorReg128, MCK__DOT_8h }, }, + { 782 /* fminnmv */, AArch64::FMINNMVv4i16v, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_VectorReg64, MCK__DOT_4h }, }, + { 782 /* fminnmv */, AArch64::FMINNMVv4i32v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR32, MCK_VectorReg128, MCK__DOT_4s }, }, + { 790 /* fminp */, AArch64::FMINPv2i16p, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_VectorReg64, MCK__DOT_2h }, }, + { 790 /* fminp */, AArch64::FMINPv2i32p, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON, { MCK_FPR32, MCK_VectorReg64, MCK__DOT_2s }, }, + { 790 /* fminp */, AArch64::FMINPv2i64p, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR64, MCK_VectorReg128, MCK__DOT_2d }, }, + { 790 /* fminp */, AArch64::FMINPv2f64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 790 /* fminp */, AArch64::FMINPv4f32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 790 /* fminp */, AArch64::FMINPv8f16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 790 /* fminp */, AArch64::FMINPv2f32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 790 /* fminp */, AArch64::FMINPv4f16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 796 /* fminv */, AArch64::FMINVv8i16v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_VectorReg128, MCK__DOT_8h }, }, + { 796 /* fminv */, AArch64::FMINVv4i16v, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_VectorReg64, MCK__DOT_4h }, }, + { 796 /* fminv */, AArch64::FMINVv4i32v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR32, MCK_VectorReg128, MCK__DOT_4s }, }, + { 802 /* fmla */, AArch64::FMLAv1i16_indexed, Convert__Reg1_0__Tie0__Reg1_1__VectorRegLo1_2__VectorIndexH1_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 802 /* fmla */, AArch64::FMLAv1i32_indexed, Convert__Reg1_0__Tie0__Reg1_1__VectorReg1281_2__VectorIndexS1_4, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 802 /* fmla */, AArch64::FMLAv1i64_indexed, Convert__Reg1_0__Tie0__Reg1_1__VectorReg1281_2__VectorIndexD1_4, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_VectorReg128, MCK__DOT_d, MCK_VectorIndexD }, }, + { 802 /* fmla */, AArch64::FMLAv2f64, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 802 /* fmla */, AArch64::FMLAv4f32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 802 /* fmla */, AArch64::FMLAv8f16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 802 /* fmla */, AArch64::FMLAv2f32, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 802 /* fmla */, AArch64::FMLAv4f16, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 802 /* fmla */, AArch64::FMLAv2i64_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4__VectorIndexD1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_d, MCK_VectorIndexD }, }, + { 802 /* fmla */, AArch64::FMLAv4i32_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 802 /* fmla */, AArch64::FMLAv8i16_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 802 /* fmla */, AArch64::FMLAv2i32_indexed, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 802 /* fmla */, AArch64::FMLAv4i16_indexed, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 807 /* fmls */, AArch64::FMLSv1i16_indexed, Convert__Reg1_0__Tie0__Reg1_1__VectorRegLo1_2__VectorIndexH1_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 807 /* fmls */, AArch64::FMLSv1i32_indexed, Convert__Reg1_0__Tie0__Reg1_1__VectorReg1281_2__VectorIndexS1_4, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 807 /* fmls */, AArch64::FMLSv1i64_indexed, Convert__Reg1_0__Tie0__Reg1_1__VectorReg1281_2__VectorIndexD1_4, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_VectorReg128, MCK__DOT_d, MCK_VectorIndexD }, }, + { 807 /* fmls */, AArch64::FMLSv2f64, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 807 /* fmls */, AArch64::FMLSv4f32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 807 /* fmls */, AArch64::FMLSv8f16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 807 /* fmls */, AArch64::FMLSv2f32, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 807 /* fmls */, AArch64::FMLSv4f16, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 807 /* fmls */, AArch64::FMLSv2i64_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4__VectorIndexD1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_d, MCK_VectorIndexD }, }, + { 807 /* fmls */, AArch64::FMLSv4i32_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 807 /* fmls */, AArch64::FMLSv8i16_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 807 /* fmls */, AArch64::FMLSv2i32_indexed, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 807 /* fmls */, AArch64::FMLSv4i16_indexed, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 812 /* fmov */, AArch64::FMOVHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 812 /* fmov */, AArch64::FMOVWHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_GPR32 }, }, + { 812 /* fmov */, AArch64::FMOVXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_GPR64 }, }, + { 812 /* fmov */, AArch64::FMOVHi, Convert__Reg1_0__FPImm1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPImm }, }, + { 812 /* fmov */, AArch64::FMOVSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 812 /* fmov */, AArch64::FMOVWSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_GPR32 }, }, + { 812 /* fmov */, AArch64::FMOVSi, Convert__Reg1_0__FPImm1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPImm }, }, + { 812 /* fmov */, AArch64::FMOVDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 812 /* fmov */, AArch64::FMOVXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_GPR64 }, }, + { 812 /* fmov */, AArch64::FMOVDi, Convert__Reg1_0__FPImm1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPImm }, }, + { 812 /* fmov */, AArch64::FMOVHWr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, }, + { 812 /* fmov */, AArch64::FMOVSWr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32 }, }, + { 812 /* fmov */, AArch64::FMOVHXr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, }, + { 812 /* fmov */, AArch64::FMOVDXr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64 }, }, + { 812 /* fmov */, AArch64::FMOVv2f64_ns, Convert__VectorReg1281_0__FPImm1_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_FPImm }, }, + { 812 /* fmov */, AArch64::FMOVv4f32_ns, Convert__VectorReg1281_0__FPImm1_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_FPImm }, }, + { 812 /* fmov */, AArch64::FMOVv8f16_ns, Convert__VectorReg1281_0__FPImm1_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_FPImm }, }, + { 812 /* fmov */, AArch64::FMOVv2f32_ns, Convert__VectorReg641_0__FPImm1_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_FPImm }, }, + { 812 /* fmov */, AArch64::FMOVv4f16_ns, Convert__VectorReg641_0__FPImm1_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_FPImm }, }, + { 812 /* fmov */, AArch64::FMOVDXHighr, Convert__Reg1_0__VectorReg1281_1__VectorIndex11_3, Feature_HasFPARMv8, { MCK_GPR64, MCK_VectorReg128, MCK__DOT_d, MCK_VectorIndex1 }, }, + { 812 /* fmov */, AArch64::FMOVXDHighr, Convert__VectorReg1281_0__Reg1_3__VectorIndex11_2, Feature_HasFPARMv8, { MCK_VectorReg128, MCK__DOT_d, MCK_VectorIndex1, MCK_GPR64 }, }, + { 817 /* fmsub */, AArch64::FMSUBHrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 817 /* fmsub */, AArch64::FMSUBSrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 817 /* fmsub */, AArch64::FMSUBDrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 823 /* fmul */, AArch64::FMULHrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 823 /* fmul */, AArch64::FMULSrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 823 /* fmul */, AArch64::FMULDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 823 /* fmul */, AArch64::FMULv1i16_indexed, Convert__Reg1_0__Reg1_1__VectorRegLo1_2__VectorIndexH1_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 823 /* fmul */, AArch64::FMULv1i32_indexed, Convert__Reg1_0__Reg1_1__VectorReg1281_2__VectorIndexS1_4, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 823 /* fmul */, AArch64::FMULv1i64_indexed, Convert__Reg1_0__Reg1_1__VectorReg1281_2__VectorIndexD1_4, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_VectorReg128, MCK__DOT_d, MCK_VectorIndexD }, }, + { 823 /* fmul */, AArch64::FMULv2f64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 823 /* fmul */, AArch64::FMULv4f32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 823 /* fmul */, AArch64::FMULv8f16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 823 /* fmul */, AArch64::FMULv2f32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 823 /* fmul */, AArch64::FMULv4f16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 823 /* fmul */, AArch64::FMULv2i64_indexed, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4__VectorIndexD1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_d, MCK_VectorIndexD }, }, + { 823 /* fmul */, AArch64::FMULv4i32_indexed, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 823 /* fmul */, AArch64::FMULv8i16_indexed, Convert__VectorReg1281_0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 823 /* fmul */, AArch64::FMULv2i32_indexed, Convert__VectorReg641_0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 823 /* fmul */, AArch64::FMULv4i16_indexed, Convert__VectorReg641_0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 828 /* fmulx */, AArch64::FMULX16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 828 /* fmulx */, AArch64::FMULX32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 828 /* fmulx */, AArch64::FMULX64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 828 /* fmulx */, AArch64::FMULXv1i16_indexed, Convert__Reg1_0__Reg1_1__VectorRegLo1_2__VectorIndexH1_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 828 /* fmulx */, AArch64::FMULXv1i32_indexed, Convert__Reg1_0__Reg1_1__VectorReg1281_2__VectorIndexS1_4, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 828 /* fmulx */, AArch64::FMULXv1i64_indexed, Convert__Reg1_0__Reg1_1__VectorReg1281_2__VectorIndexD1_4, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_VectorReg128, MCK__DOT_d, MCK_VectorIndexD }, }, + { 828 /* fmulx */, AArch64::FMULXv2f64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 828 /* fmulx */, AArch64::FMULXv4f32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 828 /* fmulx */, AArch64::FMULXv8f16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 828 /* fmulx */, AArch64::FMULXv2f32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 828 /* fmulx */, AArch64::FMULXv4f16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 828 /* fmulx */, AArch64::FMULXv2i64_indexed, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4__VectorIndexD1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_d, MCK_VectorIndexD }, }, + { 828 /* fmulx */, AArch64::FMULXv4i32_indexed, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 828 /* fmulx */, AArch64::FMULXv8i16_indexed, Convert__VectorReg1281_0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 828 /* fmulx */, AArch64::FMULXv2i32_indexed, Convert__VectorReg641_0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 828 /* fmulx */, AArch64::FMULXv4i16_indexed, Convert__VectorReg641_0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 834 /* fneg */, AArch64::FNEGHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 834 /* fneg */, AArch64::FNEGSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 834 /* fneg */, AArch64::FNEGDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 834 /* fneg */, AArch64::FNEGv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 834 /* fneg */, AArch64::FNEGv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 834 /* fneg */, AArch64::FNEGv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 834 /* fneg */, AArch64::FNEGv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 834 /* fneg */, AArch64::FNEGv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 839 /* fnmadd */, AArch64::FNMADDHrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 839 /* fnmadd */, AArch64::FNMADDSrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 839 /* fnmadd */, AArch64::FNMADDDrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 846 /* fnmsub */, AArch64::FNMSUBHrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 846 /* fnmsub */, AArch64::FNMSUBSrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 846 /* fnmsub */, AArch64::FNMSUBDrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 853 /* fnmul */, AArch64::FNMULHrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 853 /* fnmul */, AArch64::FNMULSrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 853 /* fnmul */, AArch64::FNMULDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 859 /* frecpe */, AArch64::FRECPEv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 859 /* frecpe */, AArch64::FRECPEv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 859 /* frecpe */, AArch64::FRECPEv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 859 /* frecpe */, AArch64::FRECPEv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 859 /* frecpe */, AArch64::FRECPEv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 859 /* frecpe */, AArch64::FRECPEv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 859 /* frecpe */, AArch64::FRECPEv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 859 /* frecpe */, AArch64::FRECPEv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 866 /* frecps */, AArch64::FRECPS16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 866 /* frecps */, AArch64::FRECPS32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 866 /* frecps */, AArch64::FRECPS64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 866 /* frecps */, AArch64::FRECPSv2f64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 866 /* frecps */, AArch64::FRECPSv4f32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 866 /* frecps */, AArch64::FRECPSv8f16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 866 /* frecps */, AArch64::FRECPSv2f32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 866 /* frecps */, AArch64::FRECPSv4f16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 873 /* frecpx */, AArch64::FRECPXv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 873 /* frecpx */, AArch64::FRECPXv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 873 /* frecpx */, AArch64::FRECPXv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 880 /* frinta */, AArch64::FRINTAHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 880 /* frinta */, AArch64::FRINTASr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 880 /* frinta */, AArch64::FRINTADr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 880 /* frinta */, AArch64::FRINTAv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 880 /* frinta */, AArch64::FRINTAv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 880 /* frinta */, AArch64::FRINTAv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 880 /* frinta */, AArch64::FRINTAv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 880 /* frinta */, AArch64::FRINTAv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 887 /* frinti */, AArch64::FRINTIHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 887 /* frinti */, AArch64::FRINTISr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 887 /* frinti */, AArch64::FRINTIDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 887 /* frinti */, AArch64::FRINTIv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 887 /* frinti */, AArch64::FRINTIv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 887 /* frinti */, AArch64::FRINTIv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 887 /* frinti */, AArch64::FRINTIv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 887 /* frinti */, AArch64::FRINTIv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 894 /* frintm */, AArch64::FRINTMHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 894 /* frintm */, AArch64::FRINTMSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 894 /* frintm */, AArch64::FRINTMDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 894 /* frintm */, AArch64::FRINTMv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 894 /* frintm */, AArch64::FRINTMv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 894 /* frintm */, AArch64::FRINTMv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 894 /* frintm */, AArch64::FRINTMv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 894 /* frintm */, AArch64::FRINTMv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 901 /* frintn */, AArch64::FRINTNHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 901 /* frintn */, AArch64::FRINTNSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 901 /* frintn */, AArch64::FRINTNDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 901 /* frintn */, AArch64::FRINTNv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 901 /* frintn */, AArch64::FRINTNv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 901 /* frintn */, AArch64::FRINTNv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 901 /* frintn */, AArch64::FRINTNv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 901 /* frintn */, AArch64::FRINTNv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 908 /* frintp */, AArch64::FRINTPHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 908 /* frintp */, AArch64::FRINTPSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 908 /* frintp */, AArch64::FRINTPDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 908 /* frintp */, AArch64::FRINTPv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 908 /* frintp */, AArch64::FRINTPv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 908 /* frintp */, AArch64::FRINTPv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 908 /* frintp */, AArch64::FRINTPv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 908 /* frintp */, AArch64::FRINTPv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 915 /* frintx */, AArch64::FRINTXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 915 /* frintx */, AArch64::FRINTXSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 915 /* frintx */, AArch64::FRINTXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 915 /* frintx */, AArch64::FRINTXv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 915 /* frintx */, AArch64::FRINTXv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 915 /* frintx */, AArch64::FRINTXv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 915 /* frintx */, AArch64::FRINTXv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 915 /* frintx */, AArch64::FRINTXv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 922 /* frintz */, AArch64::FRINTZHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 922 /* frintz */, AArch64::FRINTZSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 922 /* frintz */, AArch64::FRINTZDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 922 /* frintz */, AArch64::FRINTZv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 922 /* frintz */, AArch64::FRINTZv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 922 /* frintz */, AArch64::FRINTZv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 922 /* frintz */, AArch64::FRINTZv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 922 /* frintz */, AArch64::FRINTZv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 929 /* frsqrte */, AArch64::FRSQRTEv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 929 /* frsqrte */, AArch64::FRSQRTEv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 929 /* frsqrte */, AArch64::FRSQRTEv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 929 /* frsqrte */, AArch64::FRSQRTEv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 929 /* frsqrte */, AArch64::FRSQRTEv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 929 /* frsqrte */, AArch64::FRSQRTEv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 929 /* frsqrte */, AArch64::FRSQRTEv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 929 /* frsqrte */, AArch64::FRSQRTEv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 937 /* frsqrts */, AArch64::FRSQRTS16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 937 /* frsqrts */, AArch64::FRSQRTS32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 937 /* frsqrts */, AArch64::FRSQRTS64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 937 /* frsqrts */, AArch64::FRSQRTSv2f64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 937 /* frsqrts */, AArch64::FRSQRTSv4f32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 937 /* frsqrts */, AArch64::FRSQRTSv8f16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 937 /* frsqrts */, AArch64::FRSQRTSv2f32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 937 /* frsqrts */, AArch64::FRSQRTSv4f16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 945 /* fsqrt */, AArch64::FSQRTHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 945 /* fsqrt */, AArch64::FSQRTSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 945 /* fsqrt */, AArch64::FSQRTDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 945 /* fsqrt */, AArch64::FSQRTv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 945 /* fsqrt */, AArch64::FSQRTv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 945 /* fsqrt */, AArch64::FSQRTv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 945 /* fsqrt */, AArch64::FSQRTv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 945 /* fsqrt */, AArch64::FSQRTv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 951 /* fsub */, AArch64::FSUBHrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 951 /* fsub */, AArch64::FSUBSrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 951 /* fsub */, AArch64::FSUBDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 951 /* fsub */, AArch64::FSUBv2f64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 951 /* fsub */, AArch64::FSUBv4f32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 951 /* fsub */, AArch64::FSUBv8f16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 951 /* fsub */, AArch64::FSUBv2f32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 951 /* fsub */, AArch64::FSUBv4f16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 956 /* hint */, AArch64::HINT, Convert__Imm0_1271_0, 0, { MCK_Imm0_127 }, }, + { 961 /* hlt */, AArch64::HLT, Convert__Imm0_655351_0, 0, { MCK_Imm0_65535 }, }, + { 965 /* hvc */, AArch64::HVC, Convert__Imm0_655351_0, 0, { MCK_Imm0_65535 }, }, + { 969 /* ins */, AArch64::INSvi8gpr, Convert__VectorReg1281_0__Tie0__VectorIndexB1_2__Reg1_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_b, MCK_VectorIndexB, MCK_GPR32 }, }, + { 969 /* ins */, AArch64::INSvi64gpr, Convert__VectorReg1281_0__Tie0__VectorIndexD1_2__Reg1_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_d, MCK_VectorIndexD, MCK_GPR64 }, }, + { 969 /* ins */, AArch64::INSvi16gpr, Convert__VectorReg1281_0__Tie0__VectorIndexH1_2__Reg1_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_h, MCK_VectorIndexH, MCK_GPR32 }, }, + { 969 /* ins */, AArch64::INSvi32gpr, Convert__VectorReg1281_0__Tie0__VectorIndexS1_2__Reg1_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS, MCK_GPR32 }, }, + { 969 /* ins */, AArch64::INSvi8lane, Convert__VectorReg1281_0__Tie0__VectorIndexB1_2__VectorReg1281_3__VectorIndexB1_5, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_b, MCK_VectorIndexB, MCK_VectorReg128, MCK__DOT_b, MCK_VectorIndexB }, }, + { 969 /* ins */, AArch64::INSvi64lane, Convert__VectorReg1281_0__Tie0__VectorIndexD1_2__VectorReg1281_3__VectorIndexD1_5, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_d, MCK_VectorIndexD, MCK_VectorReg128, MCK__DOT_d, MCK_VectorIndexD }, }, + { 969 /* ins */, AArch64::INSvi16lane, Convert__VectorReg1281_0__Tie0__VectorIndexH1_2__VectorReg1281_3__VectorIndexH1_5, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_h, MCK_VectorIndexH, MCK_VectorReg128, MCK__DOT_h, MCK_VectorIndexH }, }, + { 969 /* ins */, AArch64::INSvi32lane, Convert__VectorReg1281_0__Tie0__VectorIndexS1_2__VectorReg1281_3__VectorIndexS1_5, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 973 /* isb */, AArch64::ISB, Convert__imm_95_15, 0, { }, }, + { 973 /* isb */, AArch64::ISB, Convert__Barrier1_0, 0, { MCK_Barrier }, }, + { 977 /* ld1 */, AArch64::LD1Fourv16b, Convert__TypedVectorList4_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv1d, Convert__TypedVectorList4_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2d, Convert__TypedVectorList4_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2s, Convert__TypedVectorList4_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4h, Convert__TypedVectorList4_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4s, Convert__TypedVectorList4_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8b, Convert__TypedVectorList4_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8h, Convert__TypedVectorList4_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev16b, Convert__TypedVectorList1_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev1d, Convert__TypedVectorList1_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev2d, Convert__TypedVectorList1_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev2s, Convert__TypedVectorList1_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev4h, Convert__TypedVectorList1_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev4s, Convert__TypedVectorList1_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev8b, Convert__TypedVectorList1_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev8h, Convert__TypedVectorList1_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev16b, Convert__TypedVectorList3_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev1d, Convert__TypedVectorList3_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev2d, Convert__TypedVectorList3_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev2s, Convert__TypedVectorList3_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev4h, Convert__TypedVectorList3_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev4s, Convert__TypedVectorList3_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev8b, Convert__TypedVectorList3_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev8h, Convert__TypedVectorList3_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov16b, Convert__TypedVectorList2_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov1d, Convert__TypedVectorList2_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov2d, Convert__TypedVectorList2_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov2s, Convert__TypedVectorList2_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov4h, Convert__TypedVectorList2_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov4s, Convert__TypedVectorList2_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov8b, Convert__TypedVectorList2_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov8h, Convert__TypedVectorList2_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv16b, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev16b, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev16b, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov16b, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv1d, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev1d, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev1d, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov1d, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2d, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev2d, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev2d, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov2d, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2s, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev2s, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev2s, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov2s, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4h, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev4h, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev4h, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov4h, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4s, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev4s, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev4s, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov4s, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8b, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev8b, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev8b, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov8b, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8h, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev8h, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev8h, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov8h, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv16b_POST, Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv16b_POST, Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv1d_POST, Convert__Reg1_2__TypedVectorList4_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv1d_POST, Convert__Reg1_2__TypedVectorList4_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2d_POST, Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2d_POST, Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2s_POST, Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2s_POST, Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4h_POST, Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4h_POST, Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8b_POST, Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8b_POST, Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8h_POST, Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8h_POST, Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev16b_POST, Convert__Reg1_2__TypedVectorList1_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Onev16b_POST, Convert__Reg1_2__TypedVectorList1_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev1d_POST, Convert__Reg1_2__TypedVectorList1_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 977 /* ld1 */, AArch64::LD1Onev1d_POST, Convert__Reg1_2__TypedVectorList1_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev2d_POST, Convert__Reg1_2__TypedVectorList1_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Onev2d_POST, Convert__Reg1_2__TypedVectorList1_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev2s_POST, Convert__Reg1_2__TypedVectorList1_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 977 /* ld1 */, AArch64::LD1Onev2s_POST, Convert__Reg1_2__TypedVectorList1_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev4h_POST, Convert__Reg1_2__TypedVectorList1_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 977 /* ld1 */, AArch64::LD1Onev4h_POST, Convert__Reg1_2__TypedVectorList1_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev4s_POST, Convert__Reg1_2__TypedVectorList1_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Onev4s_POST, Convert__Reg1_2__TypedVectorList1_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev8b_POST, Convert__Reg1_2__TypedVectorList1_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 977 /* ld1 */, AArch64::LD1Onev8b_POST, Convert__Reg1_2__TypedVectorList1_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev8h_POST, Convert__Reg1_2__TypedVectorList1_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Onev8h_POST, Convert__Reg1_2__TypedVectorList1_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1i8, Convert__TypedVectorList1_0b1_0__Tie0__VectorIndexB1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList1_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1i64, Convert__TypedVectorList1_0d1_0__Tie0__VectorIndexD1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList1_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1i16, Convert__TypedVectorList1_0h1_0__Tie0__VectorIndexH1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList1_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1i32, Convert__TypedVectorList1_0s1_0__Tie0__VectorIndexS1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList1_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev16b_POST, Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 977 /* ld1 */, AArch64::LD1Threev16b_POST, Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev1d_POST, Convert__Reg1_2__TypedVectorList3_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 977 /* ld1 */, AArch64::LD1Threev1d_POST, Convert__Reg1_2__TypedVectorList3_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 977 /* ld1 */, AArch64::LD1Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 977 /* ld1 */, AArch64::LD1Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 977 /* ld1 */, AArch64::LD1Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 977 /* ld1 */, AArch64::LD1Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev8b_POST, Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 977 /* ld1 */, AArch64::LD1Threev8b_POST, Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev8h_POST, Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 977 /* ld1 */, AArch64::LD1Threev8h_POST, Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov16b_POST, Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Twov16b_POST, Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov1d_POST, Convert__Reg1_2__TypedVectorList2_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Twov1d_POST, Convert__Reg1_2__TypedVectorList2_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov2s_POST, Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Twov2s_POST, Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov4h_POST, Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Twov4h_POST, Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov4s_POST, Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Twov4s_POST, Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov8b_POST, Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Twov8b_POST, Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov8h_POST, Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Twov8h_POST, Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv16b_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv16b_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev16b_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Onev16b_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 977 /* ld1 */, AArch64::LD1Threev16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Twov16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv1d_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv1d_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev1d_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 977 /* ld1 */, AArch64::LD1Onev1d_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev1d_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 977 /* ld1 */, AArch64::LD1Threev1d_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov1d_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Twov1d_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev2d_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Onev2d_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev2d_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 977 /* ld1 */, AArch64::LD1Threev2d_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov2d_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Twov2d_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev2s_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 977 /* ld1 */, AArch64::LD1Onev2s_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 977 /* ld1 */, AArch64::LD1Threev2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Twov2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev4h_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 977 /* ld1 */, AArch64::LD1Onev4h_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev4h_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 977 /* ld1 */, AArch64::LD1Threev4h_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov4h_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Twov4h_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev4s_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Onev4s_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 977 /* ld1 */, AArch64::LD1Threev4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov4s_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Twov4s_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev8b_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 977 /* ld1 */, AArch64::LD1Onev8b_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev8b_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 977 /* ld1 */, AArch64::LD1Threev8b_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Twov8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev8h_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Onev8h_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev8h_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 977 /* ld1 */, AArch64::LD1Threev8h_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov8h_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Twov8h_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1i8, Convert__VecListOne1281_1__Tie0__VectorIndexB1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_b, MCK_VecListOne128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1i64, Convert__VecListOne1281_1__Tie0__VectorIndexD1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_d, MCK_VecListOne128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1i16, Convert__VecListOne1281_1__Tie0__VectorIndexH1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_h, MCK_VecListOne128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1i32, Convert__VecListOne1281_1__Tie0__VectorIndexS1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_s, MCK_VecListOne128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1i8_POST, Convert__Reg1_3__TypedVectorList1_0b1_0__Tie1__VectorIndexB1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_1 }, }, + { 977 /* ld1 */, AArch64::LD1i8_POST, Convert__Reg1_3__TypedVectorList1_0b1_0__Tie1__VectorIndexB1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList1_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1i64_POST, Convert__Reg1_3__TypedVectorList1_0d1_0__Tie1__VectorIndexD1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 977 /* ld1 */, AArch64::LD1i64_POST, Convert__Reg1_3__TypedVectorList1_0d1_0__Tie1__VectorIndexD1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList1_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1i16_POST, Convert__Reg1_3__TypedVectorList1_0h1_0__Tie1__VectorIndexH1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 977 /* ld1 */, AArch64::LD1i16_POST, Convert__Reg1_3__TypedVectorList1_0h1_0__Tie1__VectorIndexH1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList1_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1i32_POST, Convert__Reg1_3__TypedVectorList1_0s1_0__Tie1__VectorIndexS1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 977 /* ld1 */, AArch64::LD1i32_POST, Convert__Reg1_3__TypedVectorList1_0s1_0__Tie1__VectorIndexS1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList1_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1i8_POST, Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexB1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_b, MCK_VecListOne128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_1 }, }, + { 977 /* ld1 */, AArch64::LD1i8_POST, Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexB1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_b, MCK_VecListOne128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1i64_POST, Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexD1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_d, MCK_VecListOne128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 977 /* ld1 */, AArch64::LD1i64_POST, Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexD1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_d, MCK_VecListOne128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1i16_POST, Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexH1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_h, MCK_VecListOne128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 977 /* ld1 */, AArch64::LD1i16_POST, Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexH1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_h, MCK_VecListOne128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1i32_POST, Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexS1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_s, MCK_VecListOne128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 977 /* ld1 */, AArch64::LD1i32_POST, Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexS1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_s, MCK_VecListOne128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv16b, Convert__TypedVectorList1_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv1d, Convert__TypedVectorList1_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv2d, Convert__TypedVectorList1_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv2s, Convert__TypedVectorList1_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv4h, Convert__TypedVectorList1_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv4s, Convert__TypedVectorList1_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv8b, Convert__TypedVectorList1_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv8h, Convert__TypedVectorList1_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv16b, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv1d, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv2d, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv2s, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv4h, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv4s, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv8b, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv8h, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv16b_POST, Convert__Reg1_2__TypedVectorList1_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_1 }, }, + { 981 /* ld1r */, AArch64::LD1Rv16b_POST, Convert__Reg1_2__TypedVectorList1_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv1d_POST, Convert__Reg1_2__TypedVectorList1_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 981 /* ld1r */, AArch64::LD1Rv1d_POST, Convert__Reg1_2__TypedVectorList1_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv2d_POST, Convert__Reg1_2__TypedVectorList1_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 981 /* ld1r */, AArch64::LD1Rv2d_POST, Convert__Reg1_2__TypedVectorList1_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv2s_POST, Convert__Reg1_2__TypedVectorList1_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 981 /* ld1r */, AArch64::LD1Rv2s_POST, Convert__Reg1_2__TypedVectorList1_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv4h_POST, Convert__Reg1_2__TypedVectorList1_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 981 /* ld1r */, AArch64::LD1Rv4h_POST, Convert__Reg1_2__TypedVectorList1_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv4s_POST, Convert__Reg1_2__TypedVectorList1_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 981 /* ld1r */, AArch64::LD1Rv4s_POST, Convert__Reg1_2__TypedVectorList1_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv8b_POST, Convert__Reg1_2__TypedVectorList1_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_1 }, }, + { 981 /* ld1r */, AArch64::LD1Rv8b_POST, Convert__Reg1_2__TypedVectorList1_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv8h_POST, Convert__Reg1_2__TypedVectorList1_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 981 /* ld1r */, AArch64::LD1Rv8h_POST, Convert__Reg1_2__TypedVectorList1_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv16b_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_1 }, }, + { 981 /* ld1r */, AArch64::LD1Rv16b_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv1d_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 981 /* ld1r */, AArch64::LD1Rv1d_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv2d_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 981 /* ld1r */, AArch64::LD1Rv2d_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv2s_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 981 /* ld1r */, AArch64::LD1Rv2s_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv4h_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 981 /* ld1r */, AArch64::LD1Rv4h_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv4s_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 981 /* ld1r */, AArch64::LD1Rv4s_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv8b_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_1 }, }, + { 981 /* ld1r */, AArch64::LD1Rv8b_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv8h_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 981 /* ld1r */, AArch64::LD1Rv8h_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov16b, Convert__TypedVectorList2_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov2d, Convert__TypedVectorList2_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov2s, Convert__TypedVectorList2_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov4h, Convert__TypedVectorList2_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov4s, Convert__TypedVectorList2_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov8b, Convert__TypedVectorList2_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov8h, Convert__TypedVectorList2_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov16b, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov2d, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov2s, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov4h, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov4s, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov8b, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov8h, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov16b_POST, Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 986 /* ld2 */, AArch64::LD2Twov16b_POST, Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 986 /* ld2 */, AArch64::LD2Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov2s_POST, Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 986 /* ld2 */, AArch64::LD2Twov2s_POST, Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov4h_POST, Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 986 /* ld2 */, AArch64::LD2Twov4h_POST, Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov4s_POST, Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 986 /* ld2 */, AArch64::LD2Twov4s_POST, Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov8b_POST, Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 986 /* ld2 */, AArch64::LD2Twov8b_POST, Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov8h_POST, Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 986 /* ld2 */, AArch64::LD2Twov8h_POST, Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2i8, Convert__TypedVectorList2_0b1_0__Tie0__VectorIndexB1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList2_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2i64, Convert__TypedVectorList2_0d1_0__Tie0__VectorIndexD1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList2_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2i16, Convert__TypedVectorList2_0h1_0__Tie0__VectorIndexH1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList2_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2i32, Convert__TypedVectorList2_0s1_0__Tie0__VectorIndexS1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList2_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 986 /* ld2 */, AArch64::LD2Twov16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov2d_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 986 /* ld2 */, AArch64::LD2Twov2d_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 986 /* ld2 */, AArch64::LD2Twov2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov4h_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 986 /* ld2 */, AArch64::LD2Twov4h_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov4s_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 986 /* ld2 */, AArch64::LD2Twov4s_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 986 /* ld2 */, AArch64::LD2Twov8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov8h_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 986 /* ld2 */, AArch64::LD2Twov8h_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2i8, Convert__VecListTwo1281_1__Tie0__VectorIndexB1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_b, MCK_VecListTwo128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2i64, Convert__VecListTwo1281_1__Tie0__VectorIndexD1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_d, MCK_VecListTwo128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2i16, Convert__VecListTwo1281_1__Tie0__VectorIndexH1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_h, MCK_VecListTwo128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2i32, Convert__VecListTwo1281_1__Tie0__VectorIndexS1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_s, MCK_VecListTwo128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2i8_POST, Convert__Reg1_3__TypedVectorList2_0b1_0__Tie1__VectorIndexB1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 986 /* ld2 */, AArch64::LD2i8_POST, Convert__Reg1_3__TypedVectorList2_0b1_0__Tie1__VectorIndexB1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList2_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2i64_POST, Convert__Reg1_3__TypedVectorList2_0d1_0__Tie1__VectorIndexD1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 986 /* ld2 */, AArch64::LD2i64_POST, Convert__Reg1_3__TypedVectorList2_0d1_0__Tie1__VectorIndexD1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList2_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2i16_POST, Convert__Reg1_3__TypedVectorList2_0h1_0__Tie1__VectorIndexH1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 986 /* ld2 */, AArch64::LD2i16_POST, Convert__Reg1_3__TypedVectorList2_0h1_0__Tie1__VectorIndexH1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList2_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2i32_POST, Convert__Reg1_3__TypedVectorList2_0s1_0__Tie1__VectorIndexS1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 986 /* ld2 */, AArch64::LD2i32_POST, Convert__Reg1_3__TypedVectorList2_0s1_0__Tie1__VectorIndexS1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList2_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2i8_POST, Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexB1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_b, MCK_VecListTwo128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 986 /* ld2 */, AArch64::LD2i8_POST, Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexB1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_b, MCK_VecListTwo128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2i64_POST, Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexD1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_d, MCK_VecListTwo128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 986 /* ld2 */, AArch64::LD2i64_POST, Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexD1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_d, MCK_VecListTwo128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2i16_POST, Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexH1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_h, MCK_VecListTwo128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 986 /* ld2 */, AArch64::LD2i16_POST, Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexH1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_h, MCK_VecListTwo128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2i32_POST, Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexS1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_s, MCK_VecListTwo128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 986 /* ld2 */, AArch64::LD2i32_POST, Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexS1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_s, MCK_VecListTwo128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv16b, Convert__TypedVectorList2_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv1d, Convert__TypedVectorList2_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv2d, Convert__TypedVectorList2_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv2s, Convert__TypedVectorList2_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv4h, Convert__TypedVectorList2_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv4s, Convert__TypedVectorList2_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv8b, Convert__TypedVectorList2_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv8h, Convert__TypedVectorList2_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv16b, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv1d, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv2d, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv2s, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv4h, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv4s, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv8b, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv8h, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv16b_POST, Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 990 /* ld2r */, AArch64::LD2Rv16b_POST, Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv1d_POST, Convert__Reg1_2__TypedVectorList2_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 990 /* ld2r */, AArch64::LD2Rv1d_POST, Convert__Reg1_2__TypedVectorList2_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv2d_POST, Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 990 /* ld2r */, AArch64::LD2Rv2d_POST, Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv2s_POST, Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 990 /* ld2r */, AArch64::LD2Rv2s_POST, Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv4h_POST, Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 990 /* ld2r */, AArch64::LD2Rv4h_POST, Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv4s_POST, Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 990 /* ld2r */, AArch64::LD2Rv4s_POST, Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv8b_POST, Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 990 /* ld2r */, AArch64::LD2Rv8b_POST, Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv8h_POST, Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 990 /* ld2r */, AArch64::LD2Rv8h_POST, Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 990 /* ld2r */, AArch64::LD2Rv16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv1d_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 990 /* ld2r */, AArch64::LD2Rv1d_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv2d_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 990 /* ld2r */, AArch64::LD2Rv2d_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 990 /* ld2r */, AArch64::LD2Rv2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv4h_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 990 /* ld2r */, AArch64::LD2Rv4h_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv4s_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 990 /* ld2r */, AArch64::LD2Rv4s_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 990 /* ld2r */, AArch64::LD2Rv8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv8h_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 990 /* ld2r */, AArch64::LD2Rv8h_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev16b, Convert__TypedVectorList3_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev2d, Convert__TypedVectorList3_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev2s, Convert__TypedVectorList3_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev4h, Convert__TypedVectorList3_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev4s, Convert__TypedVectorList3_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev8b, Convert__TypedVectorList3_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev8h, Convert__TypedVectorList3_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev16b, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev2d, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev2s, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev4h, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev4s, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev8b, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev8h, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev16b_POST, Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 995 /* ld3 */, AArch64::LD3Threev16b_POST, Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 995 /* ld3 */, AArch64::LD3Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 995 /* ld3 */, AArch64::LD3Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 995 /* ld3 */, AArch64::LD3Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 995 /* ld3 */, AArch64::LD3Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev8b_POST, Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 995 /* ld3 */, AArch64::LD3Threev8b_POST, Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev8h_POST, Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 995 /* ld3 */, AArch64::LD3Threev8h_POST, Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3i8, Convert__TypedVectorList3_0b1_0__Tie0__VectorIndexB1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList3_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3i64, Convert__TypedVectorList3_0d1_0__Tie0__VectorIndexD1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList3_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3i16, Convert__TypedVectorList3_0h1_0__Tie0__VectorIndexH1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList3_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3i32, Convert__TypedVectorList3_0s1_0__Tie0__VectorIndexS1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList3_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 995 /* ld3 */, AArch64::LD3Threev16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev2d_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 995 /* ld3 */, AArch64::LD3Threev2d_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 995 /* ld3 */, AArch64::LD3Threev2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev4h_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 995 /* ld3 */, AArch64::LD3Threev4h_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 995 /* ld3 */, AArch64::LD3Threev4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev8b_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 995 /* ld3 */, AArch64::LD3Threev8b_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev8h_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 995 /* ld3 */, AArch64::LD3Threev8h_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3i8, Convert__VecListThree1281_1__Tie0__VectorIndexB1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_b, MCK_VecListThree128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3i64, Convert__VecListThree1281_1__Tie0__VectorIndexD1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_d, MCK_VecListThree128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3i16, Convert__VecListThree1281_1__Tie0__VectorIndexH1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_h, MCK_VecListThree128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3i32, Convert__VecListThree1281_1__Tie0__VectorIndexS1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_s, MCK_VecListThree128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3i8_POST, Convert__Reg1_3__TypedVectorList3_0b1_0__Tie1__VectorIndexB1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_3 }, }, + { 995 /* ld3 */, AArch64::LD3i8_POST, Convert__Reg1_3__TypedVectorList3_0b1_0__Tie1__VectorIndexB1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList3_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3i64_POST, Convert__Reg1_3__TypedVectorList3_0d1_0__Tie1__VectorIndexD1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 995 /* ld3 */, AArch64::LD3i64_POST, Convert__Reg1_3__TypedVectorList3_0d1_0__Tie1__VectorIndexD1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList3_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3i16_POST, Convert__Reg1_3__TypedVectorList3_0h1_0__Tie1__VectorIndexH1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_6 }, }, + { 995 /* ld3 */, AArch64::LD3i16_POST, Convert__Reg1_3__TypedVectorList3_0h1_0__Tie1__VectorIndexH1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList3_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3i32_POST, Convert__Reg1_3__TypedVectorList3_0s1_0__Tie1__VectorIndexS1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_12 }, }, + { 995 /* ld3 */, AArch64::LD3i32_POST, Convert__Reg1_3__TypedVectorList3_0s1_0__Tie1__VectorIndexS1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList3_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3i8_POST, Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexB1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_b, MCK_VecListThree128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_3 }, }, + { 995 /* ld3 */, AArch64::LD3i8_POST, Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexB1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_b, MCK_VecListThree128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3i64_POST, Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexD1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_d, MCK_VecListThree128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 995 /* ld3 */, AArch64::LD3i64_POST, Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexD1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_d, MCK_VecListThree128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3i16_POST, Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexH1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_h, MCK_VecListThree128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_6 }, }, + { 995 /* ld3 */, AArch64::LD3i16_POST, Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexH1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_h, MCK_VecListThree128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3i32_POST, Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexS1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_s, MCK_VecListThree128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_12 }, }, + { 995 /* ld3 */, AArch64::LD3i32_POST, Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexS1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_s, MCK_VecListThree128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv16b, Convert__TypedVectorList3_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv1d, Convert__TypedVectorList3_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv2d, Convert__TypedVectorList3_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv2s, Convert__TypedVectorList3_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv4h, Convert__TypedVectorList3_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv4s, Convert__TypedVectorList3_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv8b, Convert__TypedVectorList3_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv8h, Convert__TypedVectorList3_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv16b, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv1d, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv2d, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv2s, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv4h, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv4s, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv8b, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv8h, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv16b_POST, Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_3 }, }, + { 999 /* ld3r */, AArch64::LD3Rv16b_POST, Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv1d_POST, Convert__Reg1_2__TypedVectorList3_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 999 /* ld3r */, AArch64::LD3Rv1d_POST, Convert__Reg1_2__TypedVectorList3_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv2d_POST, Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 999 /* ld3r */, AArch64::LD3Rv2d_POST, Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv2s_POST, Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_12 }, }, + { 999 /* ld3r */, AArch64::LD3Rv2s_POST, Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv4h_POST, Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_6 }, }, + { 999 /* ld3r */, AArch64::LD3Rv4h_POST, Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv4s_POST, Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_12 }, }, + { 999 /* ld3r */, AArch64::LD3Rv4s_POST, Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv8b_POST, Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_3 }, }, + { 999 /* ld3r */, AArch64::LD3Rv8b_POST, Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv8h_POST, Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_6 }, }, + { 999 /* ld3r */, AArch64::LD3Rv8h_POST, Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_3 }, }, + { 999 /* ld3r */, AArch64::LD3Rv16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv1d_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 999 /* ld3r */, AArch64::LD3Rv1d_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv2d_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 999 /* ld3r */, AArch64::LD3Rv2d_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_12 }, }, + { 999 /* ld3r */, AArch64::LD3Rv2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv4h_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_6 }, }, + { 999 /* ld3r */, AArch64::LD3Rv4h_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_12 }, }, + { 999 /* ld3r */, AArch64::LD3Rv4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv8b_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_3 }, }, + { 999 /* ld3r */, AArch64::LD3Rv8b_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv8h_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_6 }, }, + { 999 /* ld3r */, AArch64::LD3Rv8h_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv16b, Convert__TypedVectorList4_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2d, Convert__TypedVectorList4_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2s, Convert__TypedVectorList4_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4h, Convert__TypedVectorList4_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4s, Convert__TypedVectorList4_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8b, Convert__TypedVectorList4_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8h, Convert__TypedVectorList4_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv16b, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2d, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2s, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4h, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4s, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8b, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8h, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv16b_POST, Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv16b_POST, Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2d_POST, Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2d_POST, Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2s_POST, Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2s_POST, Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4h_POST, Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4h_POST, Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8b_POST, Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8b_POST, Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8h_POST, Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8h_POST, Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4i8, Convert__TypedVectorList4_0b1_0__Tie0__VectorIndexB1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList4_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4i64, Convert__TypedVectorList4_0d1_0__Tie0__VectorIndexD1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList4_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4i16, Convert__TypedVectorList4_0h1_0__Tie0__VectorIndexH1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList4_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4i32, Convert__TypedVectorList4_0s1_0__Tie0__VectorIndexS1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList4_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv16b_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv16b_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4i8, Convert__VecListFour1281_1__Tie0__VectorIndexB1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_b, MCK_VecListFour128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4i64, Convert__VecListFour1281_1__Tie0__VectorIndexD1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_d, MCK_VecListFour128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4i16, Convert__VecListFour1281_1__Tie0__VectorIndexH1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_h, MCK_VecListFour128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4i32, Convert__VecListFour1281_1__Tie0__VectorIndexS1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_s, MCK_VecListFour128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4i8_POST, Convert__Reg1_3__TypedVectorList4_0b1_0__Tie1__VectorIndexB1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 1004 /* ld4 */, AArch64::LD4i8_POST, Convert__Reg1_3__TypedVectorList4_0b1_0__Tie1__VectorIndexB1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList4_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4i64_POST, Convert__Reg1_3__TypedVectorList4_0d1_0__Tie1__VectorIndexD1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1004 /* ld4 */, AArch64::LD4i64_POST, Convert__Reg1_3__TypedVectorList4_0d1_0__Tie1__VectorIndexD1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList4_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4i16_POST, Convert__Reg1_3__TypedVectorList4_0h1_0__Tie1__VectorIndexH1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 1004 /* ld4 */, AArch64::LD4i16_POST, Convert__Reg1_3__TypedVectorList4_0h1_0__Tie1__VectorIndexH1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList4_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4i32_POST, Convert__Reg1_3__TypedVectorList4_0s1_0__Tie1__VectorIndexS1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 1004 /* ld4 */, AArch64::LD4i32_POST, Convert__Reg1_3__TypedVectorList4_0s1_0__Tie1__VectorIndexS1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList4_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4i8_POST, Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexB1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_b, MCK_VecListFour128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 1004 /* ld4 */, AArch64::LD4i8_POST, Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexB1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_b, MCK_VecListFour128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4i64_POST, Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexD1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_d, MCK_VecListFour128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1004 /* ld4 */, AArch64::LD4i64_POST, Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexD1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_d, MCK_VecListFour128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4i16_POST, Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexH1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_h, MCK_VecListFour128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 1004 /* ld4 */, AArch64::LD4i16_POST, Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexH1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_h, MCK_VecListFour128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4i32_POST, Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexS1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_s, MCK_VecListFour128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 1004 /* ld4 */, AArch64::LD4i32_POST, Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexS1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_s, MCK_VecListFour128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv16b, Convert__TypedVectorList4_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv1d, Convert__TypedVectorList4_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2d, Convert__TypedVectorList4_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2s, Convert__TypedVectorList4_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4h, Convert__TypedVectorList4_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4s, Convert__TypedVectorList4_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8b, Convert__TypedVectorList4_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8h, Convert__TypedVectorList4_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv16b, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv1d, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2d, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2s, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4h, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4s, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8b, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8h, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv16b_POST, Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv16b_POST, Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv1d_POST, Convert__Reg1_2__TypedVectorList4_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv1d_POST, Convert__Reg1_2__TypedVectorList4_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2d_POST, Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2d_POST, Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2s_POST, Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2s_POST, Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4h_POST, Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4h_POST, Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4s_POST, Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4s_POST, Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8b_POST, Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8b_POST, Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8h_POST, Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8h_POST, Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv16b_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv16b_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv1d_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv1d_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1013 /* ldadd */, AArch64::LDADDs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1013 /* ldadd */, AArch64::LDADDd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1019 /* ldadda */, AArch64::LDADDAs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1019 /* ldadda */, AArch64::LDADDAd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1026 /* ldaddab */, AArch64::LDADDAb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1034 /* ldaddah */, AArch64::LDADDAh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1042 /* ldaddal */, AArch64::LDADDALs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1042 /* ldaddal */, AArch64::LDADDALd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1050 /* ldaddalb */, AArch64::LDADDALb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1059 /* ldaddalh */, AArch64::LDADDALh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1068 /* ldaddb */, AArch64::LDADDb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1075 /* ldaddh */, AArch64::LDADDh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1082 /* ldaddl */, AArch64::LDADDLs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1082 /* ldaddl */, AArch64::LDADDLd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1089 /* ldaddlb */, AArch64::LDADDLb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1097 /* ldaddlh */, AArch64::LDADDLh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1105 /* ldar */, AArch64::LDARW, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1105 /* ldar */, AArch64::LDARX, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1110 /* ldarb */, AArch64::LDARB, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1116 /* ldarh */, AArch64::LDARH, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1122 /* ldaxp */, AArch64::LDAXPW, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1122 /* ldaxp */, AArch64::LDAXPX, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1128 /* ldaxr */, AArch64::LDAXRW, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1128 /* ldaxr */, AArch64::LDAXRX, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1134 /* ldaxrb */, AArch64::LDAXRB, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1141 /* ldaxrh */, AArch64::LDAXRH, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1148 /* ldclr */, AArch64::LDCLRs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1148 /* ldclr */, AArch64::LDCLRd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1154 /* ldclra */, AArch64::LDCLRAs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1154 /* ldclra */, AArch64::LDCLRAd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1161 /* ldclrab */, AArch64::LDCLRAb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1169 /* ldclrah */, AArch64::LDCLRAh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1177 /* ldclral */, AArch64::LDCLRALs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1177 /* ldclral */, AArch64::LDCLRALd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1185 /* ldclralb */, AArch64::LDCLRALb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1194 /* ldclralh */, AArch64::LDCLRALh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1203 /* ldclrb */, AArch64::LDCLRb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1210 /* ldclrh */, AArch64::LDCLRh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1217 /* ldclrl */, AArch64::LDCLRLs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1217 /* ldclrl */, AArch64::LDCLRLd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1224 /* ldclrlb */, AArch64::LDCLRLb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1232 /* ldclrlh */, AArch64::LDCLRLh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1240 /* ldeor */, AArch64::LDEORs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1240 /* ldeor */, AArch64::LDEORd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1246 /* ldeora */, AArch64::LDEORAs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1246 /* ldeora */, AArch64::LDEORAd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1253 /* ldeorab */, AArch64::LDEORAb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1261 /* ldeorah */, AArch64::LDEORAh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1269 /* ldeoral */, AArch64::LDEORALs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1269 /* ldeoral */, AArch64::LDEORALd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1277 /* ldeoralb */, AArch64::LDEORALb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1286 /* ldeoralh */, AArch64::LDEORALh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1295 /* ldeorb */, AArch64::LDEORb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1302 /* ldeorh */, AArch64::LDEORh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1309 /* ldeorl */, AArch64::LDEORLs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1309 /* ldeorl */, AArch64::LDEORLd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1316 /* ldeorlb */, AArch64::LDEORLb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1324 /* ldeorlh */, AArch64::LDEORLh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1332 /* ldlar */, AArch64::LDLARW, Convert__Reg1_0__GPR64sp01_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1332 /* ldlar */, AArch64::LDLARX, Convert__Reg1_0__GPR64sp01_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1338 /* ldlarb */, AArch64::LDLARB, Convert__Reg1_0__GPR64sp01_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1345 /* ldlarh */, AArch64::LDLARH, Convert__Reg1_0__GPR64sp01_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1352 /* ldnp */, AArch64::LDNPQi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1352 /* ldnp */, AArch64::LDNPSi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1352 /* ldnp */, AArch64::LDNPDi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1352 /* ldnp */, AArch64::LDNPWi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1352 /* ldnp */, AArch64::LDNPXi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1352 /* ldnp */, AArch64::LDNPQi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s161_4, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm7s16, MCK__93_ }, }, + { 1352 /* ldnp */, AArch64::LDNPSi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s41_4, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_ }, }, + { 1352 /* ldnp */, AArch64::LDNPDi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, }, + { 1352 /* ldnp */, AArch64::LDNPWi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s41_4, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_ }, }, + { 1352 /* ldnp */, AArch64::LDNPXi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, }, + { 1357 /* ldp */, AArch64::LDPQi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1357 /* ldp */, AArch64::LDPSi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1357 /* ldp */, AArch64::LDPDi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1357 /* ldp */, AArch64::LDPWi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1357 /* ldp */, AArch64::LDPXi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1357 /* ldp */, AArch64::LDPQpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s161_5, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s16 }, }, + { 1357 /* ldp */, AArch64::LDPQi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s161_4, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm7s16, MCK__93_ }, }, + { 1357 /* ldp */, AArch64::LDPSpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_5, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s4 }, }, + { 1357 /* ldp */, AArch64::LDPSi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s41_4, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_ }, }, + { 1357 /* ldp */, AArch64::LDPDpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s81_5, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s8 }, }, + { 1357 /* ldp */, AArch64::LDPDi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, }, + { 1357 /* ldp */, AArch64::LDPWpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_5, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s4 }, }, + { 1357 /* ldp */, AArch64::LDPWi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s41_4, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_ }, }, + { 1357 /* ldp */, AArch64::LDPXpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s81_5, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s8 }, }, + { 1357 /* ldp */, AArch64::LDPXi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, }, + { 1357 /* ldp */, AArch64::LDPQpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s161_4, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm7s16, MCK__93_, MCK__EXCLAIM_ }, }, + { 1357 /* ldp */, AArch64::LDPSpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_4, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_, MCK__EXCLAIM_ }, }, + { 1357 /* ldp */, AArch64::LDPDpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s81_4, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_, MCK__EXCLAIM_ }, }, + { 1357 /* ldp */, AArch64::LDPWpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_4, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_, MCK__EXCLAIM_ }, }, + { 1357 /* ldp */, AArch64::LDPXpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s81_4, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_, MCK__EXCLAIM_ }, }, + { 1361 /* ldpsw */, AArch64::LDPSWi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1361 /* ldpsw */, AArch64::LDPSWpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_5, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s4 }, }, + { 1361 /* ldpsw */, AArch64::LDPSWi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s41_4, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_ }, }, + { 1361 /* ldpsw */, AArch64::LDPSWpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_4, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_, MCK__EXCLAIM_ }, }, + { 1367 /* ldr */, AArch64::LDRQl, Convert__Reg1_0__PCRelLabel191_1, 0, { MCK_FPR128, MCK_PCRelLabel19 }, }, + { 1367 /* ldr */, AArch64::LDRSl, Convert__Reg1_0__PCRelLabel191_1, 0, { MCK_FPR32, MCK_PCRelLabel19 }, }, + { 1367 /* ldr */, AArch64::LDRDl, Convert__Reg1_0__PCRelLabel191_1, 0, { MCK_FPR64, MCK_PCRelLabel19 }, }, + { 1367 /* ldr */, AArch64::LDRWl, Convert__Reg1_0__PCRelLabel191_1, 0, { MCK_GPR32, MCK_PCRelLabel19 }, }, + { 1367 /* ldr */, AArch64::LDRXl, Convert__Reg1_0__PCRelLabel191_1, 0, { MCK_GPR64, MCK_PCRelLabel19 }, }, + { 1367 /* ldr */, AArch64::LDRQui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRHui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRSui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRDui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRBui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRWui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRXui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRQpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1367 /* ldr */, AArch64::LDRQroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDURQi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB1281_3, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB128, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRQui, Convert__Reg1_0__Reg1_2__UImm12Offset161_3, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset16, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRHpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1367 /* ldr */, AArch64::LDRHroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDURHi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB161_3, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB16, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRHui, Convert__Reg1_0__Reg1_2__UImm12Offset21_3, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset2, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRSpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1367 /* ldr */, AArch64::LDRSroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDURSi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB321_3, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB32, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRSui, Convert__Reg1_0__Reg1_2__UImm12Offset41_3, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset4, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRDpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1367 /* ldr */, AArch64::LDRDroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDURDi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB641_3, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRDui, Convert__Reg1_0__Reg1_2__UImm12Offset81_3, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset8, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRBpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1367 /* ldr */, AArch64::LDRBroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDURBi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB81_3, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB8, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRBui, Convert__Reg1_0__Reg1_2__UImm12Offset11_3, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset1, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRWpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1367 /* ldr */, AArch64::LDRWroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDURWi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB321_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB32, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRWui, Convert__Reg1_0__Reg1_2__UImm12Offset41_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset4, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRXpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1367 /* ldr */, AArch64::LDRXroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDURXi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB641_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRXui, Convert__Reg1_0__Reg1_2__UImm12Offset81_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset8, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRQroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend1282_4, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend128, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRQroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend1282_4, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend128, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRQpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1367 /* ldr */, AArch64::LDRHroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend162_4, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend16, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRHroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend162_4, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend16, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRHpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1367 /* ldr */, AArch64::LDRSroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend322_4, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend32, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRSroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend322_4, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend32, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRSpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1367 /* ldr */, AArch64::LDRDroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend642_4, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRDroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend642_4, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRDpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1367 /* ldr */, AArch64::LDRBroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend82_4, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend8, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRBroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend82_4, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend8, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRBpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1367 /* ldr */, AArch64::LDRWroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend322_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend32, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRWroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend322_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend32, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRWpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1367 /* ldr */, AArch64::LDRXroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend642_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRXroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend642_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRXpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1371 /* ldrb */, AArch64::LDRBBui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1371 /* ldrb */, AArch64::LDRBBpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1371 /* ldrb */, AArch64::LDRBBroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1371 /* ldrb */, AArch64::LDURBBi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB81_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB8, MCK__93_ }, }, + { 1371 /* ldrb */, AArch64::LDRBBui, Convert__Reg1_0__Reg1_2__UImm12Offset11_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset1, MCK__93_ }, }, + { 1371 /* ldrb */, AArch64::LDRBBroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend82_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend8, MCK__93_ }, }, + { 1371 /* ldrb */, AArch64::LDRBBroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend82_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend8, MCK__93_ }, }, + { 1371 /* ldrb */, AArch64::LDRBBpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1376 /* ldrh */, AArch64::LDRHHui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1376 /* ldrh */, AArch64::LDRHHpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1376 /* ldrh */, AArch64::LDRHHroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1376 /* ldrh */, AArch64::LDURHHi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB161_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB16, MCK__93_ }, }, + { 1376 /* ldrh */, AArch64::LDRHHui, Convert__Reg1_0__Reg1_2__UImm12Offset21_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset2, MCK__93_ }, }, + { 1376 /* ldrh */, AArch64::LDRHHroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend162_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend16, MCK__93_ }, }, + { 1376 /* ldrh */, AArch64::LDRHHroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend162_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend16, MCK__93_ }, }, + { 1376 /* ldrh */, AArch64::LDRHHpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBWui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBXui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBWpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1381 /* ldrsb */, AArch64::LDRSBWroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDURSBWi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB81_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB8, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBWui, Convert__Reg1_0__Reg1_2__UImm12Offset11_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset1, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBXpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1381 /* ldrsb */, AArch64::LDRSBXroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDURSBXi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB81_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB8, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBXui, Convert__Reg1_0__Reg1_2__UImm12Offset11_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset1, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBWroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend82_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend8, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBWroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend82_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend8, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBWpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBXroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend82_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend8, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBXroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend82_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend8, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBXpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHWui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHXui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHWpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1387 /* ldrsh */, AArch64::LDRSHWroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDURSHWi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB161_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB16, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHWui, Convert__Reg1_0__Reg1_2__UImm12Offset21_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset2, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHXpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1387 /* ldrsh */, AArch64::LDRSHXroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDURSHXi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB161_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB16, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHXui, Convert__Reg1_0__Reg1_2__UImm12Offset21_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset2, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHWroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend162_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend16, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHWroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend162_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend16, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHWpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHXroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend162_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend16, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHXroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend162_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend16, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHXpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1393 /* ldrsw */, AArch64::LDRSWl, Convert__Reg1_0__PCRelLabel191_1, 0, { MCK_GPR64, MCK_PCRelLabel19 }, }, + { 1393 /* ldrsw */, AArch64::LDRSWui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1393 /* ldrsw */, AArch64::LDRSWpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1393 /* ldrsw */, AArch64::LDRSWroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1393 /* ldrsw */, AArch64::LDURSWi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB321_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB32, MCK__93_ }, }, + { 1393 /* ldrsw */, AArch64::LDRSWui, Convert__Reg1_0__Reg1_2__UImm12Offset41_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset4, MCK__93_ }, }, + { 1393 /* ldrsw */, AArch64::LDRSWroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend322_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend32, MCK__93_ }, }, + { 1393 /* ldrsw */, AArch64::LDRSWroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend322_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend32, MCK__93_ }, }, + { 1393 /* ldrsw */, AArch64::LDRSWpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1399 /* ldset */, AArch64::LDSETs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1399 /* ldset */, AArch64::LDSETd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1405 /* ldseta */, AArch64::LDSETAs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1405 /* ldseta */, AArch64::LDSETAd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1412 /* ldsetab */, AArch64::LDSETAb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1420 /* ldsetah */, AArch64::LDSETAh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1428 /* ldsetal */, AArch64::LDSETALs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1428 /* ldsetal */, AArch64::LDSETALd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1436 /* ldsetalb */, AArch64::LDSETALb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1445 /* ldsetalh */, AArch64::LDSETALh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1454 /* ldsetb */, AArch64::LDSETb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1461 /* ldseth */, AArch64::LDSETh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1468 /* ldsetl */, AArch64::LDSETLs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1468 /* ldsetl */, AArch64::LDSETLd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1475 /* ldsetlb */, AArch64::LDSETLb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1483 /* ldsetlh */, AArch64::LDSETLh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1491 /* ldsmax */, AArch64::LDSMAXs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1491 /* ldsmax */, AArch64::LDSMAXd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1498 /* ldsmaxa */, AArch64::LDSMAXAs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1498 /* ldsmaxa */, AArch64::LDSMAXAd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1506 /* ldsmaxab */, AArch64::LDSMAXAb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1515 /* ldsmaxah */, AArch64::LDSMAXAh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1524 /* ldsmaxal */, AArch64::LDSMAXALs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1524 /* ldsmaxal */, AArch64::LDSMAXALd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1533 /* ldsmaxalb */, AArch64::LDSMAXALb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1543 /* ldsmaxalh */, AArch64::LDSMAXALh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1553 /* ldsmaxb */, AArch64::LDSMAXb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1561 /* ldsmaxh */, AArch64::LDSMAXh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1569 /* ldsmaxl */, AArch64::LDSMAXLs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1569 /* ldsmaxl */, AArch64::LDSMAXLd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1577 /* ldsmaxlb */, AArch64::LDSMAXLb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1586 /* ldsmaxlh */, AArch64::LDSMAXLh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1595 /* ldsmin */, AArch64::LDSMINs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1595 /* ldsmin */, AArch64::LDSMINd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1602 /* ldsmina */, AArch64::LDSMINAs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1602 /* ldsmina */, AArch64::LDSMINAd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1610 /* ldsminab */, AArch64::LDSMINAb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1619 /* ldsminah */, AArch64::LDSMINAh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1628 /* ldsminal */, AArch64::LDSMINALs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1628 /* ldsminal */, AArch64::LDSMINALd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1637 /* ldsminalb */, AArch64::LDSMINALb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1647 /* ldsminalh */, AArch64::LDSMINALh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1657 /* ldsminb */, AArch64::LDSMINb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1665 /* ldsminh */, AArch64::LDSMINh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1673 /* ldsminl */, AArch64::LDSMINLs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1673 /* ldsminl */, AArch64::LDSMINLd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1681 /* ldsminlb */, AArch64::LDSMINLb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1690 /* ldsminlh */, AArch64::LDSMINLh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1699 /* ldtr */, AArch64::LDTRWi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1699 /* ldtr */, AArch64::LDTRXi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1699 /* ldtr */, AArch64::LDTRWi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1699 /* ldtr */, AArch64::LDTRXi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1704 /* ldtrb */, AArch64::LDTRBi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1704 /* ldtrb */, AArch64::LDTRBi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1710 /* ldtrh */, AArch64::LDTRHi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1710 /* ldtrh */, AArch64::LDTRHi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1716 /* ldtrsb */, AArch64::LDTRSBWi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1716 /* ldtrsb */, AArch64::LDTRSBXi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1716 /* ldtrsb */, AArch64::LDTRSBWi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1716 /* ldtrsb */, AArch64::LDTRSBXi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1723 /* ldtrsh */, AArch64::LDTRSHWi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1723 /* ldtrsh */, AArch64::LDTRSHXi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1723 /* ldtrsh */, AArch64::LDTRSHWi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1723 /* ldtrsh */, AArch64::LDTRSHXi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1730 /* ldtrsw */, AArch64::LDTRSWi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1730 /* ldtrsw */, AArch64::LDTRSWi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1737 /* ldumax */, AArch64::LDUMAXs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1737 /* ldumax */, AArch64::LDUMAXd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1744 /* ldumaxa */, AArch64::LDUMAXAs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1744 /* ldumaxa */, AArch64::LDUMAXAd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1752 /* ldumaxab */, AArch64::LDUMAXAb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1761 /* ldumaxah */, AArch64::LDUMAXAh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1770 /* ldumaxal */, AArch64::LDUMAXALs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1770 /* ldumaxal */, AArch64::LDUMAXALd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1779 /* ldumaxalb */, AArch64::LDUMAXALb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1789 /* ldumaxalh */, AArch64::LDUMAXALh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1799 /* ldumaxb */, AArch64::LDUMAXb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1807 /* ldumaxh */, AArch64::LDUMAXh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1815 /* ldumaxl */, AArch64::LDUMAXLs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1815 /* ldumaxl */, AArch64::LDUMAXLd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1823 /* ldumaxlb */, AArch64::LDUMAXLb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1832 /* ldumaxlh */, AArch64::LDUMAXLh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1841 /* ldumin */, AArch64::LDUMINs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1841 /* ldumin */, AArch64::LDUMINd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1848 /* ldumina */, AArch64::LDUMINAs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1848 /* ldumina */, AArch64::LDUMINAd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1856 /* lduminab */, AArch64::LDUMINAb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1865 /* lduminah */, AArch64::LDUMINAh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1874 /* lduminal */, AArch64::LDUMINALs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1874 /* lduminal */, AArch64::LDUMINALd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1883 /* lduminalb */, AArch64::LDUMINALb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1893 /* lduminalh */, AArch64::LDUMINALh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1903 /* lduminb */, AArch64::LDUMINb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1911 /* lduminh */, AArch64::LDUMINh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1919 /* lduminl */, AArch64::LDUMINLs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1919 /* lduminl */, AArch64::LDUMINLd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1927 /* lduminlb */, AArch64::LDUMINLb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1936 /* lduminlh */, AArch64::LDUMINLh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURQi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURHi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURSi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURDi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURBi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURWi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURXi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURQi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURHi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURSi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURDi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURBi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURWi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURXi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1950 /* ldurb */, AArch64::LDURBBi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1950 /* ldurb */, AArch64::LDURBBi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1956 /* ldurh */, AArch64::LDURHHi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1956 /* ldurh */, AArch64::LDURHHi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1962 /* ldursb */, AArch64::LDURSBWi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1962 /* ldursb */, AArch64::LDURSBXi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1962 /* ldursb */, AArch64::LDURSBWi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1962 /* ldursb */, AArch64::LDURSBXi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1969 /* ldursh */, AArch64::LDURSHWi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1969 /* ldursh */, AArch64::LDURSHXi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1969 /* ldursh */, AArch64::LDURSHWi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1969 /* ldursh */, AArch64::LDURSHXi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1976 /* ldursw */, AArch64::LDURSWi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1976 /* ldursw */, AArch64::LDURSWi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1983 /* ldxp */, AArch64::LDXPW, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1983 /* ldxp */, AArch64::LDXPX, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1988 /* ldxr */, AArch64::LDXRW, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1988 /* ldxr */, AArch64::LDXRX, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1993 /* ldxrb */, AArch64::LDXRB, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1999 /* ldxrh */, AArch64::LDXRH, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 2005 /* lsl */, AArch64::LSLVWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2005 /* lsl */, AArch64::LSLVXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2009 /* lslv */, AArch64::LSLVWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2009 /* lslv */, AArch64::LSLVXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2014 /* lsr */, AArch64::LSRVWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2014 /* lsr */, AArch64::UBFMWri, Convert__Reg1_0__Reg1_1__Imm0_311_2__imm_95_31, 0, { MCK_GPR32, MCK_GPR32, MCK_Imm0_31 }, }, + { 2014 /* lsr */, AArch64::LSRVXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2014 /* lsr */, AArch64::UBFMXri, Convert__Reg1_0__Reg1_1__Imm0_631_2__imm_95_63, 0, { MCK_GPR64, MCK_GPR64, MCK_Imm0_63 }, }, + { 2018 /* lsrv */, AArch64::LSRVWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2018 /* lsrv */, AArch64::LSRVXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2023 /* madd */, AArch64::MADDWrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2023 /* madd */, AArch64::MADDXrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2028 /* mla */, AArch64::MLAv16i8, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2028 /* mla */, AArch64::MLAv4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2028 /* mla */, AArch64::MLAv8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2028 /* mla */, AArch64::MLAv2i32, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2028 /* mla */, AArch64::MLAv4i16, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2028 /* mla */, AArch64::MLAv8i8, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2028 /* mla */, AArch64::MLAv4i32_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2028 /* mla */, AArch64::MLAv8i16_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2028 /* mla */, AArch64::MLAv2i32_indexed, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2028 /* mla */, AArch64::MLAv4i16_indexed, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2032 /* mls */, AArch64::MLSv16i8, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2032 /* mls */, AArch64::MLSv4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2032 /* mls */, AArch64::MLSv8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2032 /* mls */, AArch64::MLSv2i32, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2032 /* mls */, AArch64::MLSv4i16, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2032 /* mls */, AArch64::MLSv8i8, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2032 /* mls */, AArch64::MLSv4i32_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2032 /* mls */, AArch64::MLSv8i16_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2032 /* mls */, AArch64::MLSv2i32_indexed, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2032 /* mls */, AArch64::MLSv4i16_indexed, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2036 /* mneg */, AArch64::MSUBWrrr, Convert__Reg1_0__Reg1_1__Reg1_2__regWZR, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2036 /* mneg */, AArch64::MSUBXrrr, Convert__Reg1_0__Reg1_1__Reg1_2__regXZR, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2041 /* mov */, AArch64::ADDWri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_0, 0, { MCK_GPR32sponly, MCK_GPR32sp }, }, + { 2041 /* mov */, AArch64::ADDXri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_0, 0, { MCK_GPR64sponly, MCK_GPR64sp }, }, + { 2041 /* mov */, AArch64::ORRWrs, Convert__Reg1_0__regWZR__Reg1_1__imm_95_0, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 2041 /* mov */, AArch64::MOVZWi, Convert__Reg1_0__MOVZ32_lsl0MovAlias1_1__imm_95_0, 0, { MCK_GPR32, MCK_MOVZ32_lsl0MovAlias }, }, + { 2041 /* mov */, AArch64::MOVZWi, Convert__Reg1_0__MOVZ32_lsl16MovAlias1_1__imm_95_16, 0, { MCK_GPR32, MCK_MOVZ32_lsl16MovAlias }, }, + { 2041 /* mov */, AArch64::MOVNWi, Convert__Reg1_0__MOVN32_lsl0MovAlias1_1__imm_95_0, 0, { MCK_GPR32, MCK_MOVN32_lsl0MovAlias }, }, + { 2041 /* mov */, AArch64::MOVNWi, Convert__Reg1_0__MOVN32_lsl16MovAlias1_1__imm_95_16, 0, { MCK_GPR32, MCK_MOVN32_lsl16MovAlias }, }, + { 2041 /* mov */, AArch64::ADDWri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_0, 0, { MCK_GPR32sp, MCK_GPR32sponly }, }, + { 2041 /* mov */, AArch64::ORRWri, Convert__Reg1_0__regWZR__LogicalImm321_1, 0, { MCK_GPR32sp, MCK_LogicalImm32 }, }, + { 2041 /* mov */, AArch64::ORRXrs, Convert__Reg1_0__regXZR__Reg1_1__imm_95_0, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 2041 /* mov */, AArch64::MOVZXi, Convert__Reg1_0__MOVZ64_lsl0MovAlias1_1__imm_95_0, 0, { MCK_GPR64, MCK_MOVZ64_lsl0MovAlias }, }, + { 2041 /* mov */, AArch64::MOVZXi, Convert__Reg1_0__MOVZ64_lsl16MovAlias1_1__imm_95_16, 0, { MCK_GPR64, MCK_MOVZ64_lsl16MovAlias }, }, + { 2041 /* mov */, AArch64::MOVZXi, Convert__Reg1_0__MOVZ64_lsl32MovAlias1_1__imm_95_32, 0, { MCK_GPR64, MCK_MOVZ64_lsl32MovAlias }, }, + { 2041 /* mov */, AArch64::MOVZXi, Convert__Reg1_0__MOVZ64_lsl48MovAlias1_1__imm_95_48, 0, { MCK_GPR64, MCK_MOVZ64_lsl48MovAlias }, }, + { 2041 /* mov */, AArch64::MOVNXi, Convert__Reg1_0__MOVN64_lsl0MovAlias1_1__imm_95_0, 0, { MCK_GPR64, MCK_MOVN64_lsl0MovAlias }, }, + { 2041 /* mov */, AArch64::MOVNXi, Convert__Reg1_0__MOVN64_lsl16MovAlias1_1__imm_95_16, 0, { MCK_GPR64, MCK_MOVN64_lsl16MovAlias }, }, + { 2041 /* mov */, AArch64::MOVNXi, Convert__Reg1_0__MOVN64_lsl32MovAlias1_1__imm_95_32, 0, { MCK_GPR64, MCK_MOVN64_lsl32MovAlias }, }, + { 2041 /* mov */, AArch64::MOVNXi, Convert__Reg1_0__MOVN64_lsl48MovAlias1_1__imm_95_48, 0, { MCK_GPR64, MCK_MOVN64_lsl48MovAlias }, }, + { 2041 /* mov */, AArch64::ADDXri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_0, 0, { MCK_GPR64sp, MCK_GPR64sponly }, }, + { 2041 /* mov */, AArch64::ORRXri, Convert__Reg1_0__regXZR__LogicalImm641_1, 0, { MCK_GPR64sp, MCK_LogicalImm64 }, }, + { 2041 /* mov */, AArch64::CPYi16, Convert__Reg1_0__VectorReg1281_1__VectorIndexH1_3, Feature_HasNEON, { MCK_FPR16, MCK_VectorReg128, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2041 /* mov */, AArch64::CPYi32, Convert__Reg1_0__VectorReg1281_1__VectorIndexS1_3, Feature_HasNEON, { MCK_FPR32, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2041 /* mov */, AArch64::CPYi64, Convert__Reg1_0__VectorReg1281_1__VectorIndexD1_3, Feature_HasNEON, { MCK_FPR64, MCK_VectorReg128, MCK__DOT_d, MCK_VectorIndexD }, }, + { 2041 /* mov */, AArch64::CPYi8, Convert__Reg1_0__VectorReg1281_1__VectorIndexB1_3, Feature_HasNEON, { MCK_FPR8, MCK_VectorReg128, MCK__DOT_b, MCK_VectorIndexB }, }, + { 2041 /* mov */, AArch64::UMOVvi32, Convert__Reg1_0__VectorReg1281_1__VectorIndexS1_3, Feature_HasNEON, { MCK_GPR32, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2041 /* mov */, AArch64::UMOVvi64, Convert__Reg1_0__VectorReg1281_1__VectorIndexD1_3, Feature_HasNEON, { MCK_GPR64, MCK_VectorReg128, MCK__DOT_d, MCK_VectorIndexD }, }, + { 2041 /* mov */, AArch64::ORRv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2041 /* mov */, AArch64::ORRv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 2041 /* mov */, AArch64::ORRv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2041 /* mov */, AArch64::ORRv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2041 /* mov */, AArch64::INSvi8gpr, Convert__VectorReg1281_0__Tie0__VectorIndexB1_2__Reg1_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_b, MCK_VectorIndexB, MCK_GPR32 }, }, + { 2041 /* mov */, AArch64::INSvi64gpr, Convert__VectorReg1281_0__Tie0__VectorIndexD1_2__Reg1_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_d, MCK_VectorIndexD, MCK_GPR64 }, }, + { 2041 /* mov */, AArch64::INSvi16gpr, Convert__VectorReg1281_0__Tie0__VectorIndexH1_2__Reg1_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_h, MCK_VectorIndexH, MCK_GPR32 }, }, + { 2041 /* mov */, AArch64::INSvi32gpr, Convert__VectorReg1281_0__Tie0__VectorIndexS1_2__Reg1_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS, MCK_GPR32 }, }, + { 2041 /* mov */, AArch64::ORRv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_2, 0, { MCK_VectorReg64, MCK__DOT_1d, MCK_VectorReg64, MCK__DOT_1d }, }, + { 2041 /* mov */, AArch64::ORRv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_2, 0, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2041 /* mov */, AArch64::ORRv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_2, 0, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2041 /* mov */, AArch64::ORRv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_2, 0, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2041 /* mov */, AArch64::INSvi8lane, Convert__VectorReg1281_0__Tie0__VectorIndexB1_2__VectorReg1281_3__VectorIndexB1_5, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_b, MCK_VectorIndexB, MCK_VectorReg128, MCK__DOT_b, MCK_VectorIndexB }, }, + { 2041 /* mov */, AArch64::INSvi64lane, Convert__VectorReg1281_0__Tie0__VectorIndexD1_2__VectorReg1281_3__VectorIndexD1_5, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_d, MCK_VectorIndexD, MCK_VectorReg128, MCK__DOT_d, MCK_VectorIndexD }, }, + { 2041 /* mov */, AArch64::INSvi16lane, Convert__VectorReg1281_0__Tie0__VectorIndexH1_2__VectorReg1281_3__VectorIndexH1_5, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_h, MCK_VectorIndexH, MCK_VectorReg128, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2041 /* mov */, AArch64::INSvi32lane, Convert__VectorReg1281_0__Tie0__VectorIndexS1_2__VectorReg1281_3__VectorIndexS1_5, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2045 /* movi */, AArch64::MOVID, Convert__Reg1_0__SIMDImmType101_1, Feature_HasNEON, { MCK_FPR64, MCK_SIMDImmType10 }, }, + { 2045 /* movi */, AArch64::MOVIv2i32, Convert__VectorReg641_1__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_2s, MCK_VectorReg64, MCK_Imm0_255 }, }, + { 2045 /* movi */, AArch64::MOVIv4i16, Convert__VectorReg641_1__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_4h, MCK_VectorReg64, MCK_Imm0_255 }, }, + { 2045 /* movi */, AArch64::MOVIv4i32, Convert__VectorReg1281_1__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_Imm0_255 }, }, + { 2045 /* movi */, AArch64::MOVIv8i16, Convert__VectorReg1281_1__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_8h, MCK_VectorReg128, MCK_Imm0_255 }, }, + { 2045 /* movi */, AArch64::MOVIv16b_ns, Convert__VectorReg1281_0__Imm0_2551_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_Imm0_255 }, }, + { 2045 /* movi */, AArch64::MOVIv2d_ns, Convert__VectorReg1281_0__SIMDImmType101_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_SIMDImmType10 }, }, + { 2045 /* movi */, AArch64::MOVIv4i32, Convert__VectorReg1281_0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_Imm0_255 }, }, + { 2045 /* movi */, AArch64::MOVIv8i16, Convert__VectorReg1281_0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_255 }, }, + { 2045 /* movi */, AArch64::MOVIv2i32, Convert__VectorReg641_0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg64, MCK__DOT_2s, MCK_Imm0_255 }, }, + { 2045 /* movi */, AArch64::MOVIv4i16, Convert__VectorReg641_0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_255 }, }, + { 2045 /* movi */, AArch64::MOVIv8b_ns, Convert__VectorReg641_0__Imm0_2551_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_Imm0_255 }, }, + { 2045 /* movi */, AArch64::MOVIv4i32, Convert__VectorReg1281_0__Imm0_2551_2__LogicalVecShifter1_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_Imm0_255, MCK_LogicalVecShifter }, }, + { 2045 /* movi */, AArch64::MOVIv4s_msl, Convert__VectorReg1281_0__Imm0_2551_2__MoveVecShifter1_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_Imm0_255, MCK_MoveVecShifter }, }, + { 2045 /* movi */, AArch64::MOVIv8i16, Convert__VectorReg1281_0__Imm0_2551_2__LogicalVecHalfWordShifter1_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_255, MCK_LogicalVecHalfWordShifter }, }, + { 2045 /* movi */, AArch64::MOVIv2i32, Convert__VectorReg641_0__Imm0_2551_2__LogicalVecShifter1_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_Imm0_255, MCK_LogicalVecShifter }, }, + { 2045 /* movi */, AArch64::MOVIv2s_msl, Convert__VectorReg641_0__Imm0_2551_2__MoveVecShifter1_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_Imm0_255, MCK_MoveVecShifter }, }, + { 2045 /* movi */, AArch64::MOVIv4i16, Convert__VectorReg641_0__Imm0_2551_2__LogicalVecHalfWordShifter1_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_255, MCK_LogicalVecHalfWordShifter }, }, + { 2050 /* movk */, AArch64::MOVKWi, Convert__Reg1_0__Tie0__Imm0_655351_1__imm_95_0, 0, { MCK_GPR32, MCK_Imm0_65535 }, }, + { 2050 /* movk */, AArch64::MOVKWi, Convert__Reg1_0__Tie0__MovKSymbolG01_1__imm_95_0, 0, { MCK_GPR32, MCK_MovKSymbolG0 }, }, + { 2050 /* movk */, AArch64::MOVKWi, Convert__Reg1_0__Tie0__MovKSymbolG11_1__imm_95_16, 0, { MCK_GPR32, MCK_MovKSymbolG1 }, }, + { 2050 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0__Imm0_655351_1__imm_95_0, 0, { MCK_GPR64, MCK_Imm0_65535 }, }, + { 2050 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0__MovKSymbolG01_1__imm_95_0, 0, { MCK_GPR64, MCK_MovKSymbolG0 }, }, + { 2050 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0__MovKSymbolG11_1__imm_95_16, 0, { MCK_GPR64, MCK_MovKSymbolG1 }, }, + { 2050 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0__MovKSymbolG21_1__imm_95_32, 0, { MCK_GPR64, MCK_MovKSymbolG2 }, }, + { 2050 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0__MovKSymbolG31_1__imm_95_48, 0, { MCK_GPR64, MCK_MovKSymbolG3 }, }, + { 2050 /* movk */, AArch64::MOVKWi, Convert__Reg1_0__Tie0__Imm0_655351_1__MovImm32Shifter1_2, 0, { MCK_GPR32, MCK_Imm0_65535, MCK_MovImm32Shifter }, }, + { 2050 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0__Imm0_655351_1__MovImm64Shifter1_2, 0, { MCK_GPR64, MCK_Imm0_65535, MCK_MovImm64Shifter }, }, + { 2055 /* movn */, AArch64::MOVNWi, Convert__Reg1_0__Imm0_655351_1__imm_95_0, 0, { MCK_GPR32, MCK_Imm0_65535 }, }, + { 2055 /* movn */, AArch64::MOVNWi, Convert__Reg1_0__MovZSymbolG01_1__imm_95_0, 0, { MCK_GPR32, MCK_MovZSymbolG0 }, }, + { 2055 /* movn */, AArch64::MOVNWi, Convert__Reg1_0__MovZSymbolG11_1__imm_95_16, 0, { MCK_GPR32, MCK_MovZSymbolG1 }, }, + { 2055 /* movn */, AArch64::MOVNXi, Convert__Reg1_0__Imm0_655351_1__imm_95_0, 0, { MCK_GPR64, MCK_Imm0_65535 }, }, + { 2055 /* movn */, AArch64::MOVNXi, Convert__Reg1_0__MovZSymbolG01_1__imm_95_0, 0, { MCK_GPR64, MCK_MovZSymbolG0 }, }, + { 2055 /* movn */, AArch64::MOVNXi, Convert__Reg1_0__MovZSymbolG11_1__imm_95_16, 0, { MCK_GPR64, MCK_MovZSymbolG1 }, }, + { 2055 /* movn */, AArch64::MOVNXi, Convert__Reg1_0__MovZSymbolG21_1__imm_95_32, 0, { MCK_GPR64, MCK_MovZSymbolG2 }, }, + { 2055 /* movn */, AArch64::MOVNXi, Convert__Reg1_0__MovZSymbolG31_1__imm_95_48, 0, { MCK_GPR64, MCK_MovZSymbolG3 }, }, + { 2055 /* movn */, AArch64::MOVNWi, Convert__Reg1_0__Imm0_655351_1__MovImm32Shifter1_2, 0, { MCK_GPR32, MCK_Imm0_65535, MCK_MovImm32Shifter }, }, + { 2055 /* movn */, AArch64::MOVNXi, Convert__Reg1_0__Imm0_655351_1__MovImm64Shifter1_2, 0, { MCK_GPR64, MCK_Imm0_65535, MCK_MovImm64Shifter }, }, + { 2060 /* movz */, AArch64::MOVZWi, Convert__Reg1_0__Imm0_655351_1__imm_95_0, 0, { MCK_GPR32, MCK_Imm0_65535 }, }, + { 2060 /* movz */, AArch64::MOVZWi, Convert__Reg1_0__MovZSymbolG01_1__imm_95_0, 0, { MCK_GPR32, MCK_MovZSymbolG0 }, }, + { 2060 /* movz */, AArch64::MOVZWi, Convert__Reg1_0__MovZSymbolG11_1__imm_95_16, 0, { MCK_GPR32, MCK_MovZSymbolG1 }, }, + { 2060 /* movz */, AArch64::MOVZXi, Convert__Reg1_0__Imm0_655351_1__imm_95_0, 0, { MCK_GPR64, MCK_Imm0_65535 }, }, + { 2060 /* movz */, AArch64::MOVZXi, Convert__Reg1_0__MovZSymbolG01_1__imm_95_0, 0, { MCK_GPR64, MCK_MovZSymbolG0 }, }, + { 2060 /* movz */, AArch64::MOVZXi, Convert__Reg1_0__MovZSymbolG11_1__imm_95_16, 0, { MCK_GPR64, MCK_MovZSymbolG1 }, }, + { 2060 /* movz */, AArch64::MOVZXi, Convert__Reg1_0__MovZSymbolG21_1__imm_95_32, 0, { MCK_GPR64, MCK_MovZSymbolG2 }, }, + { 2060 /* movz */, AArch64::MOVZXi, Convert__Reg1_0__MovZSymbolG31_1__imm_95_48, 0, { MCK_GPR64, MCK_MovZSymbolG3 }, }, + { 2060 /* movz */, AArch64::MOVZWi, Convert__Reg1_0__Imm0_655351_1__MovImm32Shifter1_2, 0, { MCK_GPR32, MCK_Imm0_65535, MCK_MovImm32Shifter }, }, + { 2060 /* movz */, AArch64::MOVZXi, Convert__Reg1_0__Imm0_655351_1__MovImm64Shifter1_2, 0, { MCK_GPR64, MCK_Imm0_65535, MCK_MovImm64Shifter }, }, + { 2065 /* mrs */, AArch64::MRS, Convert__Reg1_0__MRSSystemRegister1_1, 0, { MCK_GPR64, MCK_MRSSystemRegister }, }, + { 2069 /* msr */, AArch64::MSR, Convert__MSRSystemRegister1_0__Reg1_1, 0, { MCK_MSRSystemRegister, MCK_GPR64 }, }, + { 2069 /* msr */, AArch64::MSRpstateImm4, Convert__SystemPStateFieldWithImm0_151_0__Imm0_151_1, 0, { MCK_SystemPStateFieldWithImm0_15, MCK_Imm0_15 }, }, + { 2069 /* msr */, AArch64::MSRpstateImm1, Convert__SystemPStateFieldWithImm0_11_0__Imm0_11_1, 0, { MCK_SystemPStateFieldWithImm0_1, MCK_Imm0_1 }, }, + { 2073 /* msub */, AArch64::MSUBWrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2073 /* msub */, AArch64::MSUBXrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2078 /* mul */, AArch64::MADDWrrr, Convert__Reg1_0__Reg1_1__Reg1_2__regWZR, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2078 /* mul */, AArch64::MADDXrrr, Convert__Reg1_0__Reg1_1__Reg1_2__regXZR, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2078 /* mul */, AArch64::MULv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2078 /* mul */, AArch64::MULv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2078 /* mul */, AArch64::MULv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2078 /* mul */, AArch64::MULv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2078 /* mul */, AArch64::MULv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2078 /* mul */, AArch64::MULv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2078 /* mul */, AArch64::MULv4i32_indexed, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2078 /* mul */, AArch64::MULv8i16_indexed, Convert__VectorReg1281_0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2078 /* mul */, AArch64::MULv2i32_indexed, Convert__VectorReg641_0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2078 /* mul */, AArch64::MULv4i16_indexed, Convert__VectorReg641_0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2082 /* mvn */, AArch64::ORNWrs, Convert__Reg1_0__regWZR__Reg1_1__imm_95_0, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 2082 /* mvn */, AArch64::ORNXrs, Convert__Reg1_0__regXZR__Reg1_1__imm_95_0, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 2082 /* mvn */, AArch64::ORNWrs, Convert__Reg1_0__regWZR__Reg1_1__LogicalShifter321_2, 0, { MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, }, + { 2082 /* mvn */, AArch64::ORNXrs, Convert__Reg1_0__regXZR__Reg1_1__LogicalShifter641_2, 0, { MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, }, + { 2082 /* mvn */, AArch64::NOTv16i8, Convert__VectorReg1281_0__VectorReg1281_2, 0, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2082 /* mvn */, AArch64::NOTv8i8, Convert__VectorReg641_0__VectorReg641_2, 0, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2086 /* mvni */, AArch64::MVNIv2i32, Convert__VectorReg641_1__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_2s, MCK_VectorReg64, MCK_Imm0_255 }, }, + { 2086 /* mvni */, AArch64::MVNIv4i16, Convert__VectorReg641_1__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_4h, MCK_VectorReg64, MCK_Imm0_255 }, }, + { 2086 /* mvni */, AArch64::MVNIv4i32, Convert__VectorReg1281_1__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_Imm0_255 }, }, + { 2086 /* mvni */, AArch64::MVNIv8i16, Convert__VectorReg1281_1__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_8h, MCK_VectorReg128, MCK_Imm0_255 }, }, + { 2086 /* mvni */, AArch64::MVNIv4i32, Convert__VectorReg1281_0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_Imm0_255 }, }, + { 2086 /* mvni */, AArch64::MVNIv8i16, Convert__VectorReg1281_0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_255 }, }, + { 2086 /* mvni */, AArch64::MVNIv2i32, Convert__VectorReg641_0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg64, MCK__DOT_2s, MCK_Imm0_255 }, }, + { 2086 /* mvni */, AArch64::MVNIv4i16, Convert__VectorReg641_0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_255 }, }, + { 2086 /* mvni */, AArch64::MVNIv4i32, Convert__VectorReg1281_0__Imm0_2551_2__LogicalVecShifter1_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_Imm0_255, MCK_LogicalVecShifter }, }, + { 2086 /* mvni */, AArch64::MVNIv4s_msl, Convert__VectorReg1281_0__Imm0_2551_2__MoveVecShifter1_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_Imm0_255, MCK_MoveVecShifter }, }, + { 2086 /* mvni */, AArch64::MVNIv8i16, Convert__VectorReg1281_0__Imm0_2551_2__LogicalVecHalfWordShifter1_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_255, MCK_LogicalVecHalfWordShifter }, }, + { 2086 /* mvni */, AArch64::MVNIv2i32, Convert__VectorReg641_0__Imm0_2551_2__LogicalVecShifter1_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_Imm0_255, MCK_LogicalVecShifter }, }, + { 2086 /* mvni */, AArch64::MVNIv2s_msl, Convert__VectorReg641_0__Imm0_2551_2__MoveVecShifter1_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_Imm0_255, MCK_MoveVecShifter }, }, + { 2086 /* mvni */, AArch64::MVNIv4i16, Convert__VectorReg641_0__Imm0_2551_2__LogicalVecHalfWordShifter1_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_255, MCK_LogicalVecHalfWordShifter }, }, + { 2091 /* neg */, AArch64::NEGv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 2091 /* neg */, AArch64::SUBWrs, Convert__Reg1_0__regWZR__Reg1_1__imm_95_0, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 2091 /* neg */, AArch64::SUBXrs, Convert__Reg1_0__regXZR__Reg1_1__imm_95_0, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 2091 /* neg */, AArch64::SUBWrs, Convert__Reg1_0__regWZR__Reg1_1__ArithmeticShifter321_2, 0, { MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, }, + { 2091 /* neg */, AArch64::SUBXrs, Convert__Reg1_0__regXZR__Reg1_1__ArithmeticShifter641_2, 0, { MCK_GPR64, MCK_GPR64, MCK_ArithmeticShifter64 }, }, + { 2091 /* neg */, AArch64::NEGv16i8, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2091 /* neg */, AArch64::NEGv2i64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 2091 /* neg */, AArch64::NEGv4i32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2091 /* neg */, AArch64::NEGv8i16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2091 /* neg */, AArch64::NEGv2i32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2091 /* neg */, AArch64::NEGv4i16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2091 /* neg */, AArch64::NEGv8i8, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2095 /* negs */, AArch64::SUBSWrs, Convert__Reg1_0__regWZR__Reg1_1__imm_95_0, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 2095 /* negs */, AArch64::SUBSXrs, Convert__Reg1_0__regXZR__Reg1_1__imm_95_0, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 2095 /* negs */, AArch64::SUBSWrs, Convert__Reg1_0__regWZR__Reg1_1__ArithmeticShifter321_2, 0, { MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, }, + { 2095 /* negs */, AArch64::SUBSXrs, Convert__Reg1_0__regXZR__Reg1_1__ArithmeticShifter641_2, 0, { MCK_GPR64, MCK_GPR64, MCK_ArithmeticShifter64 }, }, + { 2100 /* ngc */, AArch64::SBCWr, Convert__Reg1_0__regWZR__Reg1_1, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 2100 /* ngc */, AArch64::SBCXr, Convert__Reg1_0__regXZR__Reg1_1, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 2104 /* ngcs */, AArch64::SBCSWr, Convert__Reg1_0__regWZR__Reg1_1, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 2104 /* ngcs */, AArch64::SBCSXr, Convert__Reg1_0__regXZR__Reg1_1, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 2109 /* nop */, AArch64::HINT, Convert__imm_95_0, 0, { }, }, + { 2113 /* not */, AArch64::NOTv16i8, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2113 /* not */, AArch64::NOTv8i8, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2117 /* orn */, AArch64::ORNWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2117 /* orn */, AArch64::ORRWri, Convert__Reg1_0__Reg1_1__LogicalImm32Not1_2, 0, { MCK_GPR32sp, MCK_GPR32, MCK_LogicalImm32Not }, }, + { 2117 /* orn */, AArch64::ORNXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2117 /* orn */, AArch64::ORRXri, Convert__Reg1_0__Reg1_1__LogicalImm64Not1_2, 0, { MCK_GPR64sp, MCK_GPR64, MCK_LogicalImm64Not }, }, + { 2117 /* orn */, AArch64::ORNWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, }, + { 2117 /* orn */, AArch64::ORNXrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, }, + { 2117 /* orn */, AArch64::ORNv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2117 /* orn */, AArch64::ORNv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2121 /* orr */, AArch64::ORRv2i32, Convert__VectorReg641_1__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_2s, MCK_VectorReg64, MCK_Imm0_255 }, }, + { 2121 /* orr */, AArch64::ORRv4i16, Convert__VectorReg641_1__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_4h, MCK_VectorReg64, MCK_Imm0_255 }, }, + { 2121 /* orr */, AArch64::ORRv4i32, Convert__VectorReg1281_1__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_Imm0_255 }, }, + { 2121 /* orr */, AArch64::ORRv8i16, Convert__VectorReg1281_1__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_8h, MCK_VectorReg128, MCK_Imm0_255 }, }, + { 2121 /* orr */, AArch64::ORRWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2121 /* orr */, AArch64::ORRWri, Convert__Reg1_0__Reg1_1__LogicalImm321_2, 0, { MCK_GPR32sp, MCK_GPR32, MCK_LogicalImm32 }, }, + { 2121 /* orr */, AArch64::ORRXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2121 /* orr */, AArch64::ORRXri, Convert__Reg1_0__Reg1_1__LogicalImm641_2, 0, { MCK_GPR64sp, MCK_GPR64, MCK_LogicalImm64 }, }, + { 2121 /* orr */, AArch64::ORRv4i32, Convert__VectorReg1281_0__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_Imm0_255 }, }, + { 2121 /* orr */, AArch64::ORRv8i16, Convert__VectorReg1281_0__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_255 }, }, + { 2121 /* orr */, AArch64::ORRv2i32, Convert__VectorReg641_0__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg64, MCK__DOT_2s, MCK_Imm0_255 }, }, + { 2121 /* orr */, AArch64::ORRv4i16, Convert__VectorReg641_0__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_255 }, }, + { 2121 /* orr */, AArch64::ORRWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, }, + { 2121 /* orr */, AArch64::ORRXrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, }, + { 2121 /* orr */, AArch64::ORRv4i32, Convert__VectorReg1281_0__Tie0__Imm0_2551_2__LogicalVecShifter1_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_Imm0_255, MCK_LogicalVecShifter }, }, + { 2121 /* orr */, AArch64::ORRv8i16, Convert__VectorReg1281_0__Tie0__Imm0_2551_2__LogicalVecHalfWordShifter1_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_255, MCK_LogicalVecHalfWordShifter }, }, + { 2121 /* orr */, AArch64::ORRv2i32, Convert__VectorReg641_0__Tie0__Imm0_2551_2__LogicalVecShifter1_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_Imm0_255, MCK_LogicalVecShifter }, }, + { 2121 /* orr */, AArch64::ORRv4i16, Convert__VectorReg641_0__Tie0__Imm0_2551_2__LogicalVecHalfWordShifter1_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_255, MCK_LogicalVecHalfWordShifter }, }, + { 2121 /* orr */, AArch64::ORRv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2121 /* orr */, AArch64::ORRv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2125 /* pmul */, AArch64::PMULv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2125 /* pmul */, AArch64::PMULv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2130 /* pmull */, AArch64::PMULLv1i64, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasCrypto, { MCK_VectorReg128, MCK__DOT_1q, MCK_VectorReg64, MCK__DOT_1d, MCK_VectorReg64, MCK__DOT_1d }, }, + { 2130 /* pmull */, AArch64::PMULLv8i8, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2136 /* pmull2 */, AArch64::PMULLv2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasCrypto, { MCK_VectorReg128, MCK__DOT_1q, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 2136 /* pmull2 */, AArch64::PMULLv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2143 /* prfm */, AArch64::PRFMl, Convert__Prefetch1_0__PCRelLabel191_1, 0, { MCK_Prefetch, MCK_PCRelLabel19 }, }, + { 2143 /* prfm */, AArch64::PRFMui, Convert__Prefetch1_0__Reg1_2__imm_95_0, 0, { MCK_Prefetch, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2143 /* prfm */, AArch64::PRFMroX, Convert__Prefetch1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_Prefetch, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 2143 /* prfm */, AArch64::PRFMui, Convert__Prefetch1_0__Reg1_2__UImm12Offset81_3, 0, { MCK_Prefetch, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset8, MCK__93_ }, }, + { 2143 /* prfm */, AArch64::PRFMroW, Convert__Prefetch1_0__Reg1_2__Reg1_3__MemWExtend642_4, 0, { MCK_Prefetch, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend64, MCK__93_ }, }, + { 2143 /* prfm */, AArch64::PRFMroX, Convert__Prefetch1_0__Reg1_2__Reg1_3__MemXExtend642_4, 0, { MCK_Prefetch, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend64, MCK__93_ }, }, + { 2148 /* prfum */, AArch64::PRFUMi, Convert__Prefetch1_0__Reg1_2__imm_95_0, 0, { MCK_Prefetch, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2148 /* prfum */, AArch64::PRFUMi, Convert__Prefetch1_0__Reg1_2__SImm91_3, 0, { MCK_Prefetch, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 2154 /* psb */, AArch64::HINT, Convert__PSBHint1_0, Feature_HasSPE, { MCK_PSBHint }, }, + { 2158 /* raddhn */, AArch64::RADDHNv2i64_v2i32, Convert__VectorReg641_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 2158 /* raddhn */, AArch64::RADDHNv4i32_v4i16, Convert__VectorReg641_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2158 /* raddhn */, AArch64::RADDHNv8i16_v8i8, Convert__VectorReg641_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2165 /* raddhn2 */, AArch64::RADDHNv8i16_v16i8, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2165 /* raddhn2 */, AArch64::RADDHNv2i64_v4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 2165 /* raddhn2 */, AArch64::RADDHNv4i32_v8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2173 /* rbit */, AArch64::RBITWr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 2173 /* rbit */, AArch64::RBITXr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 2173 /* rbit */, AArch64::RBITv16i8, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2173 /* rbit */, AArch64::RBITv8i8, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2178 /* ret */, AArch64::RET, Convert__regLR, 0, { }, }, + { 2178 /* ret */, AArch64::RET, Convert__Reg1_0, 0, { MCK_GPR64 }, }, + { 2182 /* rev */, AArch64::REVWr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 2182 /* rev */, AArch64::REVXr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 2186 /* rev16 */, AArch64::REV16Wr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 2186 /* rev16 */, AArch64::REV16Xr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 2186 /* rev16 */, AArch64::REV16v16i8, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2186 /* rev16 */, AArch64::REV16v8i8, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2192 /* rev32 */, AArch64::REV32Xr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 2192 /* rev32 */, AArch64::REV32v16i8, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2192 /* rev32 */, AArch64::REV32v8i16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2192 /* rev32 */, AArch64::REV32v4i16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2192 /* rev32 */, AArch64::REV32v8i8, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2198 /* rev64 */, AArch64::REVXr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 2198 /* rev64 */, AArch64::REV64v16i8, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2198 /* rev64 */, AArch64::REV64v4i32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2198 /* rev64 */, AArch64::REV64v8i16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2198 /* rev64 */, AArch64::REV64v2i32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2198 /* rev64 */, AArch64::REV64v4i16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2198 /* rev64 */, AArch64::REV64v8i8, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2204 /* ror */, AArch64::RORVWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2204 /* ror */, AArch64::EXTRWrri, Convert__Reg1_0__Reg1_1__Reg1_1__Imm0_311_2, 0, { MCK_GPR32, MCK_GPR32, MCK_Imm0_31 }, }, + { 2204 /* ror */, AArch64::RORVXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2204 /* ror */, AArch64::EXTRXrri, Convert__Reg1_0__Reg1_1__Reg1_1__Imm0_631_2, 0, { MCK_GPR64, MCK_GPR64, MCK_Imm0_63 }, }, + { 2208 /* rorv */, AArch64::RORVWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2208 /* rorv */, AArch64::RORVXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2213 /* rshrn */, AArch64::RSHRNv2i32_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_32 }, }, + { 2213 /* rshrn */, AArch64::RSHRNv4i16_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_16 }, }, + { 2213 /* rshrn */, AArch64::RSHRNv8i8_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_8 }, }, + { 2219 /* rshrn2 */, AArch64::RSHRNv16i8_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_8 }, }, + { 2219 /* rshrn2 */, AArch64::RSHRNv4i32_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_32 }, }, + { 2219 /* rshrn2 */, AArch64::RSHRNv8i16_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_16 }, }, + { 2226 /* rsubhn */, AArch64::RSUBHNv2i64_v2i32, Convert__VectorReg641_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 2226 /* rsubhn */, AArch64::RSUBHNv4i32_v4i16, Convert__VectorReg641_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2226 /* rsubhn */, AArch64::RSUBHNv8i16_v8i8, Convert__VectorReg641_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2233 /* rsubhn2 */, AArch64::RSUBHNv8i16_v16i8, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2233 /* rsubhn2 */, AArch64::RSUBHNv2i64_v4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 2233 /* rsubhn2 */, AArch64::RSUBHNv4i32_v8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2241 /* saba */, AArch64::SABAv16i8, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2241 /* saba */, AArch64::SABAv4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2241 /* saba */, AArch64::SABAv8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2241 /* saba */, AArch64::SABAv2i32, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2241 /* saba */, AArch64::SABAv4i16, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2241 /* saba */, AArch64::SABAv8i8, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2246 /* sabal */, AArch64::SABALv2i32_v2i64, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2246 /* sabal */, AArch64::SABALv4i16_v4i32, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2246 /* sabal */, AArch64::SABALv8i8_v8i16, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2252 /* sabal2 */, AArch64::SABALv4i32_v2i64, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2252 /* sabal2 */, AArch64::SABALv8i16_v4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2252 /* sabal2 */, AArch64::SABALv16i8_v8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2259 /* sabd */, AArch64::SABDv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2259 /* sabd */, AArch64::SABDv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2259 /* sabd */, AArch64::SABDv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2259 /* sabd */, AArch64::SABDv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2259 /* sabd */, AArch64::SABDv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2259 /* sabd */, AArch64::SABDv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2264 /* sabdl */, AArch64::SABDLv2i32_v2i64, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2264 /* sabdl */, AArch64::SABDLv4i16_v4i32, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2264 /* sabdl */, AArch64::SABDLv8i8_v8i16, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2270 /* sabdl2 */, AArch64::SABDLv4i32_v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2270 /* sabdl2 */, AArch64::SABDLv8i16_v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2270 /* sabdl2 */, AArch64::SABDLv16i8_v8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2277 /* sadalp */, AArch64::SADALPv4i32_v2i64, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2277 /* sadalp */, AArch64::SADALPv8i16_v4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2277 /* sadalp */, AArch64::SADALPv16i8_v8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2277 /* sadalp */, AArch64::SADALPv2i32_v1i64, Convert__VectorReg641_0__Tie0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_1d, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2277 /* sadalp */, AArch64::SADALPv4i16_v2i32, Convert__VectorReg641_0__Tie0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2277 /* sadalp */, AArch64::SADALPv8i8_v4i16, Convert__VectorReg641_0__Tie0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2284 /* saddl */, AArch64::SADDLv2i32_v2i64, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2284 /* saddl */, AArch64::SADDLv4i16_v4i32, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2284 /* saddl */, AArch64::SADDLv8i8_v8i16, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2290 /* saddl2 */, AArch64::SADDLv4i32_v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2290 /* saddl2 */, AArch64::SADDLv8i16_v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2290 /* saddl2 */, AArch64::SADDLv16i8_v8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2297 /* saddlp */, AArch64::SADDLPv4i32_v2i64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2297 /* saddlp */, AArch64::SADDLPv8i16_v4i32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2297 /* saddlp */, AArch64::SADDLPv16i8_v8i16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2297 /* saddlp */, AArch64::SADDLPv2i32_v1i64, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_1d, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2297 /* saddlp */, AArch64::SADDLPv4i16_v2i32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2297 /* saddlp */, AArch64::SADDLPv8i8_v4i16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2304 /* saddlv */, AArch64::SADDLVv16i8v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR16, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2304 /* saddlv */, AArch64::SADDLVv8i8v, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON, { MCK_FPR16, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2304 /* saddlv */, AArch64::SADDLVv8i16v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR32, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2304 /* saddlv */, AArch64::SADDLVv4i16v, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON, { MCK_FPR32, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2304 /* saddlv */, AArch64::SADDLVv4i32v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR64, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2311 /* saddw */, AArch64::SADDWv2i32_v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2311 /* saddw */, AArch64::SADDWv4i16_v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2311 /* saddw */, AArch64::SADDWv8i8_v8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2317 /* saddw2 */, AArch64::SADDWv4i32_v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2317 /* saddw2 */, AArch64::SADDWv8i16_v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2317 /* saddw2 */, AArch64::SADDWv16i8_v8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2324 /* sbc */, AArch64::SBCWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2324 /* sbc */, AArch64::SBCXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2328 /* sbcs */, AArch64::SBCSWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2328 /* sbcs */, AArch64::SBCSXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2333 /* sbfm */, AArch64::SBFMWri, Convert__Reg1_0__Reg1_1__Imm0_311_2__Imm0_311_3, 0, { MCK_GPR32, MCK_GPR32, MCK_Imm0_31, MCK_Imm0_31 }, }, + { 2333 /* sbfm */, AArch64::SBFMXri, Convert__Reg1_0__Reg1_1__Imm0_631_2__Imm0_631_3, 0, { MCK_GPR64, MCK_GPR64, MCK_Imm0_63, MCK_Imm0_63 }, }, + { 2338 /* scvtf */, AArch64::SCVTFv1i16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 2338 /* scvtf */, AArch64::SCVTFUWHri, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_GPR32 }, }, + { 2338 /* scvtf */, AArch64::SCVTFUXHri, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_GPR64 }, }, + { 2338 /* scvtf */, AArch64::SCVTFv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 2338 /* scvtf */, AArch64::SCVTFUWSri, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_GPR32 }, }, + { 2338 /* scvtf */, AArch64::SCVTFUXSri, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_GPR64 }, }, + { 2338 /* scvtf */, AArch64::SCVTFv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 2338 /* scvtf */, AArch64::SCVTFUWDri, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_GPR32 }, }, + { 2338 /* scvtf */, AArch64::SCVTFUXDri, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_GPR64 }, }, + { 2338 /* scvtf */, AArch64::SCVTFh, Convert__Reg1_0__Reg1_1__Imm1_161_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm1_16 }, }, + { 2338 /* scvtf */, AArch64::SCVTFSWHri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFullFP16, { MCK_FPR16, MCK_GPR32, MCK_Imm1_32 }, }, + { 2338 /* scvtf */, AArch64::SCVTFSXHri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFullFP16, { MCK_FPR16, MCK_GPR64, MCK_Imm1_64 }, }, + { 2338 /* scvtf */, AArch64::SCVTFs, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_Imm1_32 }, }, + { 2338 /* scvtf */, AArch64::SCVTFSWSri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_GPR32, MCK_Imm1_32 }, }, + { 2338 /* scvtf */, AArch64::SCVTFSXSri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_GPR64, MCK_Imm1_64 }, }, + { 2338 /* scvtf */, AArch64::SCVTFd, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 2338 /* scvtf */, AArch64::SCVTFSWDri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_GPR32, MCK_Imm1_32 }, }, + { 2338 /* scvtf */, AArch64::SCVTFSXDri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_GPR64, MCK_Imm1_64 }, }, + { 2338 /* scvtf */, AArch64::SCVTFv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 2338 /* scvtf */, AArch64::SCVTFv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2338 /* scvtf */, AArch64::SCVTFv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2338 /* scvtf */, AArch64::SCVTFv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2338 /* scvtf */, AArch64::SCVTFv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2338 /* scvtf */, AArch64::SCVTFv2i64_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_64 }, }, + { 2338 /* scvtf */, AArch64::SCVTFv4i32_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_32 }, }, + { 2338 /* scvtf */, AArch64::SCVTFv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_16 }, }, + { 2338 /* scvtf */, AArch64::SCVTFv2i32_shift, Convert__VectorReg641_0__VectorReg641_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_Imm1_32 }, }, + { 2338 /* scvtf */, AArch64::SCVTFv4i16_shift, Convert__VectorReg641_0__VectorReg641_2__Imm1_161_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm1_16 }, }, + { 2344 /* sdiv */, AArch64::SDIVWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2344 /* sdiv */, AArch64::SDIVXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2349 /* sev */, AArch64::HINT, Convert__imm_95_4, 0, { }, }, + { 2353 /* sevl */, AArch64::HINT, Convert__imm_95_5, 0, { }, }, + { 2358 /* sha1c */, AArch64::SHA1Crrr, Convert__Reg1_0__Tie0__Reg1_1__VectorReg1281_2, Feature_HasCrypto, { MCK_FPR128, MCK_FPR32, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2364 /* sha1h */, AArch64::SHA1Hrr, Convert__Reg1_0__Reg1_1, Feature_HasCrypto, { MCK_FPR32, MCK_FPR32 }, }, + { 2370 /* sha1m */, AArch64::SHA1Mrrr, Convert__Reg1_0__Tie0__Reg1_1__VectorReg1281_2, Feature_HasCrypto, { MCK_FPR128, MCK_FPR32, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2376 /* sha1p */, AArch64::SHA1Prrr, Convert__Reg1_0__Tie0__Reg1_1__VectorReg1281_2, Feature_HasCrypto, { MCK_FPR128, MCK_FPR32, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2382 /* sha1su0 */, AArch64::SHA1SU0rrr, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasCrypto, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2390 /* sha1su1 */, AArch64::SHA1SU1rr, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasCrypto, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2398 /* sha256h */, AArch64::SHA256Hrrr, Convert__Reg1_0__Tie0__Reg1_1__VectorReg1281_2, Feature_HasCrypto, { MCK_FPR128, MCK_FPR128, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2406 /* sha256h2 */, AArch64::SHA256H2rrr, Convert__Reg1_0__Tie0__Reg1_1__VectorReg1281_2, Feature_HasCrypto, { MCK_FPR128, MCK_FPR128, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2415 /* sha256su0 */, AArch64::SHA256SU0rr, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasCrypto, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2425 /* sha256su1 */, AArch64::SHA256SU1rrr, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasCrypto, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2435 /* shadd */, AArch64::SHADDv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2435 /* shadd */, AArch64::SHADDv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2435 /* shadd */, AArch64::SHADDv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2435 /* shadd */, AArch64::SHADDv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2435 /* shadd */, AArch64::SHADDv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2435 /* shadd */, AArch64::SHADDv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2441 /* shl */, AArch64::SHLd, Convert__Reg1_0__Reg1_1__Imm0_631_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm0_63 }, }, + { 2441 /* shl */, AArch64::SHLv16i8_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_71_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_Imm0_7 }, }, + { 2441 /* shl */, AArch64::SHLv2i64_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_631_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm0_63 }, }, + { 2441 /* shl */, AArch64::SHLv4i32_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_311_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm0_31 }, }, + { 2441 /* shl */, AArch64::SHLv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_151_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_15 }, }, + { 2441 /* shl */, AArch64::SHLv2i32_shift, Convert__VectorReg641_0__VectorReg641_2__Imm0_311_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_Imm0_31 }, }, + { 2441 /* shl */, AArch64::SHLv4i16_shift, Convert__VectorReg641_0__VectorReg641_2__Imm0_151_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_15 }, }, + { 2441 /* shl */, AArch64::SHLv8i8_shift, Convert__VectorReg641_0__VectorReg641_2__Imm0_71_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_Imm0_7 }, }, + { 2445 /* shll */, AArch64::SHLLv2i32, Convert__VectorReg1281_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK__35_32 }, }, + { 2445 /* shll */, AArch64::SHLLv4i16, Convert__VectorReg1281_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK__35_16 }, }, + { 2445 /* shll */, AArch64::SHLLv8i8, Convert__VectorReg1281_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b, MCK__35_8 }, }, + { 2450 /* shll2 */, AArch64::SHLLv4i32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK__35_32 }, }, + { 2450 /* shll2 */, AArch64::SHLLv8i16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK__35_16 }, }, + { 2450 /* shll2 */, AArch64::SHLLv16i8, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b, MCK__35_8 }, }, + { 2456 /* shrn */, AArch64::SHRNv2i32_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_32 }, }, + { 2456 /* shrn */, AArch64::SHRNv4i16_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_16 }, }, + { 2456 /* shrn */, AArch64::SHRNv8i8_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_8 }, }, + { 2461 /* shrn2 */, AArch64::SHRNv16i8_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_8 }, }, + { 2461 /* shrn2 */, AArch64::SHRNv4i32_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_32 }, }, + { 2461 /* shrn2 */, AArch64::SHRNv8i16_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_16 }, }, + { 2467 /* shsub */, AArch64::SHSUBv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2467 /* shsub */, AArch64::SHSUBv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2467 /* shsub */, AArch64::SHSUBv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2467 /* shsub */, AArch64::SHSUBv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2467 /* shsub */, AArch64::SHSUBv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2467 /* shsub */, AArch64::SHSUBv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2473 /* sli */, AArch64::SLId, Convert__Reg1_0__Tie0__Reg1_1__Imm0_631_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm0_63 }, }, + { 2473 /* sli */, AArch64::SLIv16i8_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm0_71_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_Imm0_7 }, }, + { 2473 /* sli */, AArch64::SLIv2i64_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm0_631_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm0_63 }, }, + { 2473 /* sli */, AArch64::SLIv4i32_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm0_311_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm0_31 }, }, + { 2473 /* sli */, AArch64::SLIv8i16_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm0_151_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_15 }, }, + { 2473 /* sli */, AArch64::SLIv2i32_shift, Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm0_311_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_Imm0_31 }, }, + { 2473 /* sli */, AArch64::SLIv4i16_shift, Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm0_151_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_15 }, }, + { 2473 /* sli */, AArch64::SLIv8i8_shift, Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm0_71_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_Imm0_7 }, }, + { 2477 /* smaddl */, AArch64::SMADDLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_GPR64, MCK_GPR32, MCK_GPR32, MCK_GPR64 }, }, + { 2484 /* smax */, AArch64::SMAXv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2484 /* smax */, AArch64::SMAXv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2484 /* smax */, AArch64::SMAXv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2484 /* smax */, AArch64::SMAXv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2484 /* smax */, AArch64::SMAXv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2484 /* smax */, AArch64::SMAXv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2489 /* smaxp */, AArch64::SMAXPv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2489 /* smaxp */, AArch64::SMAXPv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2489 /* smaxp */, AArch64::SMAXPv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2489 /* smaxp */, AArch64::SMAXPv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2489 /* smaxp */, AArch64::SMAXPv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2489 /* smaxp */, AArch64::SMAXPv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2495 /* smaxv */, AArch64::SMAXVv8i16v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR16, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2495 /* smaxv */, AArch64::SMAXVv4i16v, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON, { MCK_FPR16, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2495 /* smaxv */, AArch64::SMAXVv4i32v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR32, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2495 /* smaxv */, AArch64::SMAXVv16i8v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR8, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2495 /* smaxv */, AArch64::SMAXVv8i8v, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON, { MCK_FPR8, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2501 /* smc */, AArch64::SMC, Convert__Imm0_655351_0, 0, { MCK_Imm0_65535 }, }, + { 2505 /* smin */, AArch64::SMINv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2505 /* smin */, AArch64::SMINv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2505 /* smin */, AArch64::SMINv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2505 /* smin */, AArch64::SMINv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2505 /* smin */, AArch64::SMINv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2505 /* smin */, AArch64::SMINv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2510 /* sminp */, AArch64::SMINPv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2510 /* sminp */, AArch64::SMINPv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2510 /* sminp */, AArch64::SMINPv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2510 /* sminp */, AArch64::SMINPv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2510 /* sminp */, AArch64::SMINPv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2510 /* sminp */, AArch64::SMINPv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2516 /* sminv */, AArch64::SMINVv8i16v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR16, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2516 /* sminv */, AArch64::SMINVv4i16v, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON, { MCK_FPR16, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2516 /* sminv */, AArch64::SMINVv4i32v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR32, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2516 /* sminv */, AArch64::SMINVv16i8v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR8, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2516 /* sminv */, AArch64::SMINVv8i8v, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON, { MCK_FPR8, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2522 /* smlal */, AArch64::SMLALv2i32_v2i64, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2522 /* smlal */, AArch64::SMLALv4i16_v4i32, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2522 /* smlal */, AArch64::SMLALv8i8_v8i16, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2522 /* smlal */, AArch64::SMLALv2i32_indexed, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2522 /* smlal */, AArch64::SMLALv4i16_indexed, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2528 /* smlal2 */, AArch64::SMLALv4i32_v2i64, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2528 /* smlal2 */, AArch64::SMLALv8i16_v4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2528 /* smlal2 */, AArch64::SMLALv16i8_v8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2528 /* smlal2 */, AArch64::SMLALv4i32_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2528 /* smlal2 */, AArch64::SMLALv8i16_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2535 /* smlsl */, AArch64::SMLSLv2i32_v2i64, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2535 /* smlsl */, AArch64::SMLSLv4i16_v4i32, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2535 /* smlsl */, AArch64::SMLSLv8i8_v8i16, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2535 /* smlsl */, AArch64::SMLSLv2i32_indexed, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2535 /* smlsl */, AArch64::SMLSLv4i16_indexed, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2541 /* smlsl2 */, AArch64::SMLSLv4i32_v2i64, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2541 /* smlsl2 */, AArch64::SMLSLv8i16_v4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2541 /* smlsl2 */, AArch64::SMLSLv16i8_v8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2541 /* smlsl2 */, AArch64::SMLSLv4i32_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2541 /* smlsl2 */, AArch64::SMLSLv8i16_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2548 /* smnegl */, AArch64::SMSUBLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__regXZR, 0, { MCK_GPR64, MCK_GPR32, MCK_GPR32 }, }, + { 2555 /* smov */, AArch64::SMOVvi8to32, Convert__Reg1_0__VectorReg1281_1__VectorIndexB1_3, Feature_HasNEON, { MCK_GPR32, MCK_VectorReg128, MCK__DOT_b, MCK_VectorIndexB }, }, + { 2555 /* smov */, AArch64::SMOVvi16to32, Convert__Reg1_0__VectorReg1281_1__VectorIndexH1_3, Feature_HasNEON, { MCK_GPR32, MCK_VectorReg128, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2555 /* smov */, AArch64::SMOVvi8to64, Convert__Reg1_0__VectorReg1281_1__VectorIndexB1_3, Feature_HasNEON, { MCK_GPR64, MCK_VectorReg128, MCK__DOT_b, MCK_VectorIndexB }, }, + { 2555 /* smov */, AArch64::SMOVvi16to64, Convert__Reg1_0__VectorReg1281_1__VectorIndexH1_3, Feature_HasNEON, { MCK_GPR64, MCK_VectorReg128, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2555 /* smov */, AArch64::SMOVvi32to64, Convert__Reg1_0__VectorReg1281_1__VectorIndexS1_3, Feature_HasNEON, { MCK_GPR64, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2560 /* smsubl */, AArch64::SMSUBLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_GPR64, MCK_GPR32, MCK_GPR32, MCK_GPR64 }, }, + { 2567 /* smulh */, AArch64::SMULHrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2573 /* smull */, AArch64::SMADDLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__regXZR, 0, { MCK_GPR64, MCK_GPR32, MCK_GPR32 }, }, + { 2573 /* smull */, AArch64::SMULLv2i32_v2i64, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2573 /* smull */, AArch64::SMULLv4i16_v4i32, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2573 /* smull */, AArch64::SMULLv8i8_v8i16, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2573 /* smull */, AArch64::SMULLv2i32_indexed, Convert__VectorReg1281_0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2573 /* smull */, AArch64::SMULLv4i16_indexed, Convert__VectorReg1281_0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2579 /* smull2 */, AArch64::SMULLv4i32_v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2579 /* smull2 */, AArch64::SMULLv8i16_v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2579 /* smull2 */, AArch64::SMULLv16i8_v8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2579 /* smull2 */, AArch64::SMULLv4i32_indexed, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2579 /* smull2 */, AArch64::SMULLv8i16_indexed, Convert__VectorReg1281_0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2586 /* sqabs */, AArch64::SQABSv1i16, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR16, MCK_FPR16 }, }, + { 2586 /* sqabs */, AArch64::SQABSv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 2586 /* sqabs */, AArch64::SQABSv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 2586 /* sqabs */, AArch64::SQABSv1i8, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR8, MCK_FPR8 }, }, + { 2586 /* sqabs */, AArch64::SQABSv16i8, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2586 /* sqabs */, AArch64::SQABSv2i64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 2586 /* sqabs */, AArch64::SQABSv4i32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2586 /* sqabs */, AArch64::SQABSv8i16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2586 /* sqabs */, AArch64::SQABSv2i32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2586 /* sqabs */, AArch64::SQABSv4i16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2586 /* sqabs */, AArch64::SQABSv8i8, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2592 /* sqadd */, AArch64::SQADDv1i16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 2592 /* sqadd */, AArch64::SQADDv1i32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 2592 /* sqadd */, AArch64::SQADDv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 2592 /* sqadd */, AArch64::SQADDv1i8, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR8, MCK_FPR8 }, }, + { 2592 /* sqadd */, AArch64::SQADDv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2592 /* sqadd */, AArch64::SQADDv2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 2592 /* sqadd */, AArch64::SQADDv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2592 /* sqadd */, AArch64::SQADDv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2592 /* sqadd */, AArch64::SQADDv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2592 /* sqadd */, AArch64::SQADDv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2592 /* sqadd */, AArch64::SQADDv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2598 /* sqdmlal */, AArch64::SQDMLALi16, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR16, MCK_FPR16 }, }, + { 2598 /* sqdmlal */, AArch64::SQDMLALi32, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR32, MCK_FPR32 }, }, + { 2598 /* sqdmlal */, AArch64::SQDMLALv1i32_indexed, Convert__Reg1_0__Tie0__Reg1_1__VectorRegLo1_2__VectorIndexH1_4, Feature_HasNEON, { MCK_FPR32, MCK_FPR16, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2598 /* sqdmlal */, AArch64::SQDMLALv1i64_indexed, Convert__Reg1_0__Tie0__Reg1_1__VectorReg1281_2__VectorIndexS1_4, Feature_HasNEON, { MCK_FPR64, MCK_FPR32, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2598 /* sqdmlal */, AArch64::SQDMLALv2i32_v2i64, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2598 /* sqdmlal */, AArch64::SQDMLALv4i16_v4i32, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2598 /* sqdmlal */, AArch64::SQDMLALv2i32_indexed, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2598 /* sqdmlal */, AArch64::SQDMLALv4i16_indexed, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2606 /* sqdmlal2 */, AArch64::SQDMLALv4i32_v2i64, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2606 /* sqdmlal2 */, AArch64::SQDMLALv8i16_v4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2606 /* sqdmlal2 */, AArch64::SQDMLALv4i32_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2606 /* sqdmlal2 */, AArch64::SQDMLALv8i16_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2615 /* sqdmlsl */, AArch64::SQDMLSLi16, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR16, MCK_FPR16 }, }, + { 2615 /* sqdmlsl */, AArch64::SQDMLSLi32, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR32, MCK_FPR32 }, }, + { 2615 /* sqdmlsl */, AArch64::SQDMLSLv1i32_indexed, Convert__Reg1_0__Tie0__Reg1_1__VectorRegLo1_2__VectorIndexH1_4, Feature_HasNEON, { MCK_FPR32, MCK_FPR16, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2615 /* sqdmlsl */, AArch64::SQDMLSLv1i64_indexed, Convert__Reg1_0__Tie0__Reg1_1__VectorReg1281_2__VectorIndexS1_4, Feature_HasNEON, { MCK_FPR64, MCK_FPR32, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2615 /* sqdmlsl */, AArch64::SQDMLSLv2i32_v2i64, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2615 /* sqdmlsl */, AArch64::SQDMLSLv4i16_v4i32, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2615 /* sqdmlsl */, AArch64::SQDMLSLv2i32_indexed, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2615 /* sqdmlsl */, AArch64::SQDMLSLv4i16_indexed, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2623 /* sqdmlsl2 */, AArch64::SQDMLSLv4i32_v2i64, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2623 /* sqdmlsl2 */, AArch64::SQDMLSLv8i16_v4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2623 /* sqdmlsl2 */, AArch64::SQDMLSLv4i32_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2623 /* sqdmlsl2 */, AArch64::SQDMLSLv8i16_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv1i16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv1i32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv1i16_indexed, Convert__Reg1_0__Reg1_1__VectorRegLo1_2__VectorIndexH1_4, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv1i32_indexed, Convert__Reg1_0__Reg1_1__VectorReg1281_2__VectorIndexS1_4, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv4i32_indexed, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv8i16_indexed, Convert__VectorReg1281_0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv2i32_indexed, Convert__VectorReg641_0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv4i16_indexed, Convert__VectorReg641_0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2640 /* sqdmull */, AArch64::SQDMULLi16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR16, MCK_FPR16 }, }, + { 2640 /* sqdmull */, AArch64::SQDMULLi32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR32, MCK_FPR32 }, }, + { 2640 /* sqdmull */, AArch64::SQDMULLv1i32_indexed, Convert__Reg1_0__Reg1_1__VectorRegLo1_2__VectorIndexH1_4, Feature_HasNEON, { MCK_FPR32, MCK_FPR16, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2640 /* sqdmull */, AArch64::SQDMULLv1i64_indexed, Convert__Reg1_0__Reg1_1__VectorReg1281_2__VectorIndexS1_4, Feature_HasNEON, { MCK_FPR64, MCK_FPR32, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2640 /* sqdmull */, AArch64::SQDMULLv2i32_v2i64, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2640 /* sqdmull */, AArch64::SQDMULLv4i16_v4i32, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2640 /* sqdmull */, AArch64::SQDMULLv2i32_indexed, Convert__VectorReg1281_0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2640 /* sqdmull */, AArch64::SQDMULLv4i16_indexed, Convert__VectorReg1281_0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2648 /* sqdmull2 */, AArch64::SQDMULLv4i32_v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2648 /* sqdmull2 */, AArch64::SQDMULLv8i16_v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2648 /* sqdmull2 */, AArch64::SQDMULLv4i32_indexed, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2648 /* sqdmull2 */, AArch64::SQDMULLv8i16_indexed, Convert__VectorReg1281_0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2657 /* sqneg */, AArch64::SQNEGv1i16, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR16, MCK_FPR16 }, }, + { 2657 /* sqneg */, AArch64::SQNEGv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 2657 /* sqneg */, AArch64::SQNEGv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 2657 /* sqneg */, AArch64::SQNEGv1i8, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR8, MCK_FPR8 }, }, + { 2657 /* sqneg */, AArch64::SQNEGv16i8, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2657 /* sqneg */, AArch64::SQNEGv2i64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 2657 /* sqneg */, AArch64::SQNEGv4i32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2657 /* sqneg */, AArch64::SQNEGv8i16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2657 /* sqneg */, AArch64::SQNEGv2i32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2657 /* sqneg */, AArch64::SQNEGv4i16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2657 /* sqneg */, AArch64::SQNEGv8i8, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHv1i16, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasV8_1a, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHv1i32, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasV8_1a, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHi16_indexed, Convert__Reg1_0__Tie0__Reg1_1__VectorRegLo1_2__VectorIndexH1_4, Feature_HasNEON|Feature_HasV8_1a, { MCK_FPR16, MCK_FPR16, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHi32_indexed, Convert__Reg1_0__Tie0__Reg1_1__VectorReg1281_2__VectorIndexS1_4, Feature_HasNEON|Feature_HasV8_1a, { MCK_FPR32, MCK_FPR32, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHv4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasV8_1a, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHv8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasV8_1a, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHv2i32, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasV8_1a, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHv4i16, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasV8_1a, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHv4i32_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON|Feature_HasV8_1a, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHv8i16_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON|Feature_HasV8_1a, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHv2i32_indexed, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON|Feature_HasV8_1a, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHv4i16_indexed, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON|Feature_HasV8_1a, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHv1i16, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasV8_1a, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHv1i32, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasV8_1a, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHi16_indexed, Convert__Reg1_0__Tie0__Reg1_1__VectorRegLo1_2__VectorIndexH1_4, Feature_HasNEON|Feature_HasV8_1a, { MCK_FPR16, MCK_FPR16, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHi32_indexed, Convert__Reg1_0__Tie0__Reg1_1__VectorReg1281_2__VectorIndexS1_4, Feature_HasNEON|Feature_HasV8_1a, { MCK_FPR32, MCK_FPR32, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHv4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasV8_1a, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHv8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON|Feature_HasV8_1a, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHv2i32, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasV8_1a, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHv4i16, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON|Feature_HasV8_1a, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHv4i32_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON|Feature_HasV8_1a, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHv8i16_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON|Feature_HasV8_1a, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHv2i32_indexed, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON|Feature_HasV8_1a, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHv4i16_indexed, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON|Feature_HasV8_1a, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv1i16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv1i32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv1i16_indexed, Convert__Reg1_0__Reg1_1__VectorRegLo1_2__VectorIndexH1_4, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv1i32_indexed, Convert__Reg1_0__Reg1_1__VectorReg1281_2__VectorIndexS1_4, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv4i32_indexed, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv8i16_indexed, Convert__VectorReg1281_0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv2i32_indexed, Convert__VectorReg641_0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv4i16_indexed, Convert__VectorReg641_0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 2690 /* sqrshl */, AArch64::SQRSHLv1i16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 2690 /* sqrshl */, AArch64::SQRSHLv1i32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 2690 /* sqrshl */, AArch64::SQRSHLv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 2690 /* sqrshl */, AArch64::SQRSHLv1i8, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR8, MCK_FPR8 }, }, + { 2690 /* sqrshl */, AArch64::SQRSHLv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2690 /* sqrshl */, AArch64::SQRSHLv2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 2690 /* sqrshl */, AArch64::SQRSHLv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2690 /* sqrshl */, AArch64::SQRSHLv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2690 /* sqrshl */, AArch64::SQRSHLv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2690 /* sqrshl */, AArch64::SQRSHLv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2690 /* sqrshl */, AArch64::SQRSHLv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2697 /* sqrshrn */, AArch64::SQRSHRNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, }, + { 2697 /* sqrshrn */, AArch64::SQRSHRNs, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR64, MCK_Imm1_32 }, }, + { 2697 /* sqrshrn */, AArch64::SQRSHRNb, Convert__Reg1_0__Reg1_1__Imm1_81_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR16, MCK_Imm1_8 }, }, + { 2697 /* sqrshrn */, AArch64::SQRSHRNv2i32_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_32 }, }, + { 2697 /* sqrshrn */, AArch64::SQRSHRNv4i16_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_16 }, }, + { 2697 /* sqrshrn */, AArch64::SQRSHRNv8i8_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_8 }, }, + { 2705 /* sqrshrn2 */, AArch64::SQRSHRNv16i8_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_8 }, }, + { 2705 /* sqrshrn2 */, AArch64::SQRSHRNv4i32_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_32 }, }, + { 2705 /* sqrshrn2 */, AArch64::SQRSHRNv8i16_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_16 }, }, + { 2714 /* sqrshrun */, AArch64::SQRSHRUNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, }, + { 2714 /* sqrshrun */, AArch64::SQRSHRUNs, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR64, MCK_Imm1_32 }, }, + { 2714 /* sqrshrun */, AArch64::SQRSHRUNb, Convert__Reg1_0__Reg1_1__Imm1_81_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR16, MCK_Imm1_8 }, }, + { 2714 /* sqrshrun */, AArch64::SQRSHRUNv2i32_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_32 }, }, + { 2714 /* sqrshrun */, AArch64::SQRSHRUNv4i16_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_16 }, }, + { 2714 /* sqrshrun */, AArch64::SQRSHRUNv8i8_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_8 }, }, + { 2723 /* sqrshrun2 */, AArch64::SQRSHRUNv16i8_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_8 }, }, + { 2723 /* sqrshrun2 */, AArch64::SQRSHRUNv4i32_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_32 }, }, + { 2723 /* sqrshrun2 */, AArch64::SQRSHRUNv8i16_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_16 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv1i16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 2733 /* sqshl */, AArch64::SQSHLh, Convert__Reg1_0__Reg1_1__Imm0_151_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv1i32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 2733 /* sqshl */, AArch64::SQSHLs, Convert__Reg1_0__Reg1_1__Imm0_311_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_Imm0_31 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 2733 /* sqshl */, AArch64::SQSHLd, Convert__Reg1_0__Reg1_1__Imm0_631_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm0_63 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv1i8, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR8, MCK_FPR8 }, }, + { 2733 /* sqshl */, AArch64::SQSHLb, Convert__Reg1_0__Reg1_1__Imm0_71_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR8, MCK_Imm0_7 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv16i8_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_71_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_Imm0_7 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv2i64_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_631_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm0_63 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv4i32_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_311_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm0_31 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_151_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_15 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv2i32_shift, Convert__VectorReg641_0__VectorReg641_2__Imm0_311_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_Imm0_31 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv4i16_shift, Convert__VectorReg641_0__VectorReg641_2__Imm0_151_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_15 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv8i8_shift, Convert__VectorReg641_0__VectorReg641_2__Imm0_71_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_Imm0_7 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2733 /* sqshl */, AArch64::SQSHLv2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 2733 /* sqshl */, AArch64::SQSHLv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2733 /* sqshl */, AArch64::SQSHLv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2733 /* sqshl */, AArch64::SQSHLv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2733 /* sqshl */, AArch64::SQSHLv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2733 /* sqshl */, AArch64::SQSHLv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2739 /* sqshlu */, AArch64::SQSHLUh, Convert__Reg1_0__Reg1_1__Imm0_151_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15 }, }, + { 2739 /* sqshlu */, AArch64::SQSHLUs, Convert__Reg1_0__Reg1_1__Imm0_311_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_Imm0_31 }, }, + { 2739 /* sqshlu */, AArch64::SQSHLUd, Convert__Reg1_0__Reg1_1__Imm0_631_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm0_63 }, }, + { 2739 /* sqshlu */, AArch64::SQSHLUb, Convert__Reg1_0__Reg1_1__Imm0_71_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR8, MCK_Imm0_7 }, }, + { 2739 /* sqshlu */, AArch64::SQSHLUv16i8_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_71_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_Imm0_7 }, }, + { 2739 /* sqshlu */, AArch64::SQSHLUv2i64_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_631_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm0_63 }, }, + { 2739 /* sqshlu */, AArch64::SQSHLUv4i32_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_311_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm0_31 }, }, + { 2739 /* sqshlu */, AArch64::SQSHLUv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_151_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_15 }, }, + { 2739 /* sqshlu */, AArch64::SQSHLUv2i32_shift, Convert__VectorReg641_0__VectorReg641_2__Imm0_311_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_Imm0_31 }, }, + { 2739 /* sqshlu */, AArch64::SQSHLUv4i16_shift, Convert__VectorReg641_0__VectorReg641_2__Imm0_151_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_15 }, }, + { 2739 /* sqshlu */, AArch64::SQSHLUv8i8_shift, Convert__VectorReg641_0__VectorReg641_2__Imm0_71_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_Imm0_7 }, }, + { 2746 /* sqshrn */, AArch64::SQSHRNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, }, + { 2746 /* sqshrn */, AArch64::SQSHRNs, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR64, MCK_Imm1_32 }, }, + { 2746 /* sqshrn */, AArch64::SQSHRNb, Convert__Reg1_0__Reg1_1__Imm1_81_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR16, MCK_Imm1_8 }, }, + { 2746 /* sqshrn */, AArch64::SQSHRNv2i32_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_32 }, }, + { 2746 /* sqshrn */, AArch64::SQSHRNv4i16_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_16 }, }, + { 2746 /* sqshrn */, AArch64::SQSHRNv8i8_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_8 }, }, + { 2753 /* sqshrn2 */, AArch64::SQSHRNv16i8_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_8 }, }, + { 2753 /* sqshrn2 */, AArch64::SQSHRNv4i32_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_32 }, }, + { 2753 /* sqshrn2 */, AArch64::SQSHRNv8i16_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_16 }, }, + { 2761 /* sqshrun */, AArch64::SQSHRUNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, }, + { 2761 /* sqshrun */, AArch64::SQSHRUNs, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR64, MCK_Imm1_32 }, }, + { 2761 /* sqshrun */, AArch64::SQSHRUNb, Convert__Reg1_0__Reg1_1__Imm1_81_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR16, MCK_Imm1_8 }, }, + { 2761 /* sqshrun */, AArch64::SQSHRUNv2i32_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_32 }, }, + { 2761 /* sqshrun */, AArch64::SQSHRUNv4i16_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_16 }, }, + { 2761 /* sqshrun */, AArch64::SQSHRUNv8i8_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_8 }, }, + { 2769 /* sqshrun2 */, AArch64::SQSHRUNv16i8_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_8 }, }, + { 2769 /* sqshrun2 */, AArch64::SQSHRUNv4i32_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_32 }, }, + { 2769 /* sqshrun2 */, AArch64::SQSHRUNv8i16_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_16 }, }, + { 2778 /* sqsub */, AArch64::SQSUBv1i16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 2778 /* sqsub */, AArch64::SQSUBv1i32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 2778 /* sqsub */, AArch64::SQSUBv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 2778 /* sqsub */, AArch64::SQSUBv1i8, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR8, MCK_FPR8 }, }, + { 2778 /* sqsub */, AArch64::SQSUBv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2778 /* sqsub */, AArch64::SQSUBv2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 2778 /* sqsub */, AArch64::SQSUBv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2778 /* sqsub */, AArch64::SQSUBv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2778 /* sqsub */, AArch64::SQSUBv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2778 /* sqsub */, AArch64::SQSUBv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2778 /* sqsub */, AArch64::SQSUBv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2784 /* sqxtn */, AArch64::SQXTNv1i16, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR16, MCK_FPR32 }, }, + { 2784 /* sqxtn */, AArch64::SQXTNv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR64 }, }, + { 2784 /* sqxtn */, AArch64::SQXTNv1i8, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR8, MCK_FPR16 }, }, + { 2784 /* sqxtn */, AArch64::SQXTNv2i32, Convert__VectorReg641_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_2d }, }, + { 2784 /* sqxtn */, AArch64::SQXTNv4i16, Convert__VectorReg641_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2784 /* sqxtn */, AArch64::SQXTNv8i8, Convert__VectorReg641_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2790 /* sqxtn2 */, AArch64::SQXTNv16i8, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2790 /* sqxtn2 */, AArch64::SQXTNv4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_2d }, }, + { 2790 /* sqxtn2 */, AArch64::SQXTNv8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2797 /* sqxtun */, AArch64::SQXTUNv1i16, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR16, MCK_FPR32 }, }, + { 2797 /* sqxtun */, AArch64::SQXTUNv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR64 }, }, + { 2797 /* sqxtun */, AArch64::SQXTUNv1i8, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR8, MCK_FPR16 }, }, + { 2797 /* sqxtun */, AArch64::SQXTUNv2i32, Convert__VectorReg641_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_2d }, }, + { 2797 /* sqxtun */, AArch64::SQXTUNv4i16, Convert__VectorReg641_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2797 /* sqxtun */, AArch64::SQXTUNv8i8, Convert__VectorReg641_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2804 /* sqxtun2 */, AArch64::SQXTUNv16i8, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2804 /* sqxtun2 */, AArch64::SQXTUNv4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_2d }, }, + { 2804 /* sqxtun2 */, AArch64::SQXTUNv8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2812 /* srhadd */, AArch64::SRHADDv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2812 /* srhadd */, AArch64::SRHADDv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2812 /* srhadd */, AArch64::SRHADDv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2812 /* srhadd */, AArch64::SRHADDv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2812 /* srhadd */, AArch64::SRHADDv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2812 /* srhadd */, AArch64::SRHADDv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2819 /* sri */, AArch64::SRId, Convert__Reg1_0__Tie0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 2819 /* sri */, AArch64::SRIv16i8_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_Imm1_8 }, }, + { 2819 /* sri */, AArch64::SRIv2i64_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_64 }, }, + { 2819 /* sri */, AArch64::SRIv4i32_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_32 }, }, + { 2819 /* sri */, AArch64::SRIv8i16_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_16 }, }, + { 2819 /* sri */, AArch64::SRIv2i32_shift, Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_Imm1_32 }, }, + { 2819 /* sri */, AArch64::SRIv4i16_shift, Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm1_16 }, }, + { 2819 /* sri */, AArch64::SRIv8i8_shift, Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_Imm1_8 }, }, + { 2823 /* srshl */, AArch64::SRSHLv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 2823 /* srshl */, AArch64::SRSHLv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2823 /* srshl */, AArch64::SRSHLv2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 2823 /* srshl */, AArch64::SRSHLv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2823 /* srshl */, AArch64::SRSHLv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2823 /* srshl */, AArch64::SRSHLv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2823 /* srshl */, AArch64::SRSHLv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2823 /* srshl */, AArch64::SRSHLv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2829 /* srshr */, AArch64::SRSHRd, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 2829 /* srshr */, AArch64::SRSHRv16i8_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_Imm1_8 }, }, + { 2829 /* srshr */, AArch64::SRSHRv2i64_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_64 }, }, + { 2829 /* srshr */, AArch64::SRSHRv4i32_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_32 }, }, + { 2829 /* srshr */, AArch64::SRSHRv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_16 }, }, + { 2829 /* srshr */, AArch64::SRSHRv2i32_shift, Convert__VectorReg641_0__VectorReg641_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_Imm1_32 }, }, + { 2829 /* srshr */, AArch64::SRSHRv4i16_shift, Convert__VectorReg641_0__VectorReg641_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm1_16 }, }, + { 2829 /* srshr */, AArch64::SRSHRv8i8_shift, Convert__VectorReg641_0__VectorReg641_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_Imm1_8 }, }, + { 2835 /* srsra */, AArch64::SRSRAd, Convert__Reg1_0__Tie0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 2835 /* srsra */, AArch64::SRSRAv16i8_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_Imm1_8 }, }, + { 2835 /* srsra */, AArch64::SRSRAv2i64_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_64 }, }, + { 2835 /* srsra */, AArch64::SRSRAv4i32_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_32 }, }, + { 2835 /* srsra */, AArch64::SRSRAv8i16_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_16 }, }, + { 2835 /* srsra */, AArch64::SRSRAv2i32_shift, Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_Imm1_32 }, }, + { 2835 /* srsra */, AArch64::SRSRAv4i16_shift, Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm1_16 }, }, + { 2835 /* srsra */, AArch64::SRSRAv8i8_shift, Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_Imm1_8 }, }, + { 2841 /* sshl */, AArch64::SSHLv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 2841 /* sshl */, AArch64::SSHLv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2841 /* sshl */, AArch64::SSHLv2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 2841 /* sshl */, AArch64::SSHLv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2841 /* sshl */, AArch64::SSHLv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2841 /* sshl */, AArch64::SSHLv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2841 /* sshl */, AArch64::SSHLv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2841 /* sshl */, AArch64::SSHLv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2846 /* sshll */, AArch64::SSHLLv2i32_shift, Convert__VectorReg1281_0__VectorReg641_2__Imm0_311_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_Imm0_31 }, }, + { 2846 /* sshll */, AArch64::SSHLLv4i16_shift, Convert__VectorReg1281_0__VectorReg641_2__Imm0_151_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_15 }, }, + { 2846 /* sshll */, AArch64::SSHLLv8i8_shift, Convert__VectorReg1281_0__VectorReg641_2__Imm0_71_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b, MCK_Imm0_7 }, }, + { 2852 /* sshll2 */, AArch64::SSHLLv4i32_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_311_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm0_31 }, }, + { 2852 /* sshll2 */, AArch64::SSHLLv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_151_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_15 }, }, + { 2852 /* sshll2 */, AArch64::SSHLLv16i8_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_71_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b, MCK_Imm0_7 }, }, + { 2859 /* sshr */, AArch64::SSHRd, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 2859 /* sshr */, AArch64::SSHRv16i8_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_Imm1_8 }, }, + { 2859 /* sshr */, AArch64::SSHRv2i64_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_64 }, }, + { 2859 /* sshr */, AArch64::SSHRv4i32_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_32 }, }, + { 2859 /* sshr */, AArch64::SSHRv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_16 }, }, + { 2859 /* sshr */, AArch64::SSHRv2i32_shift, Convert__VectorReg641_0__VectorReg641_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_Imm1_32 }, }, + { 2859 /* sshr */, AArch64::SSHRv4i16_shift, Convert__VectorReg641_0__VectorReg641_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm1_16 }, }, + { 2859 /* sshr */, AArch64::SSHRv8i8_shift, Convert__VectorReg641_0__VectorReg641_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_Imm1_8 }, }, + { 2864 /* ssra */, AArch64::SSRAd, Convert__Reg1_0__Tie0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 2864 /* ssra */, AArch64::SSRAv16i8_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_Imm1_8 }, }, + { 2864 /* ssra */, AArch64::SSRAv2i64_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_64 }, }, + { 2864 /* ssra */, AArch64::SSRAv4i32_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_32 }, }, + { 2864 /* ssra */, AArch64::SSRAv8i16_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_16 }, }, + { 2864 /* ssra */, AArch64::SSRAv2i32_shift, Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_Imm1_32 }, }, + { 2864 /* ssra */, AArch64::SSRAv4i16_shift, Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm1_16 }, }, + { 2864 /* ssra */, AArch64::SSRAv8i8_shift, Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_Imm1_8 }, }, + { 2869 /* ssubl */, AArch64::SSUBLv2i32_v2i64, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2869 /* ssubl */, AArch64::SSUBLv4i16_v4i32, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2869 /* ssubl */, AArch64::SSUBLv8i8_v8i16, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2875 /* ssubl2 */, AArch64::SSUBLv4i32_v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2875 /* ssubl2 */, AArch64::SSUBLv8i16_v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2875 /* ssubl2 */, AArch64::SSUBLv16i8_v8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2882 /* ssubw */, AArch64::SSUBWv2i32_v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s }, }, + { 2882 /* ssubw */, AArch64::SSUBWv4i16_v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h }, }, + { 2882 /* ssubw */, AArch64::SSUBWv8i8_v8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b }, }, + { 2888 /* ssubw2 */, AArch64::SSUBWv4i32_v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s }, }, + { 2888 /* ssubw2 */, AArch64::SSUBWv8i16_v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h }, }, + { 2888 /* ssubw2 */, AArch64::SSUBWv16i8_v8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b }, }, + { 2895 /* st1 */, AArch64::ST1Fourv16b, Convert__TypedVectorList4_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv1d, Convert__TypedVectorList4_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2d, Convert__TypedVectorList4_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2s, Convert__TypedVectorList4_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4h, Convert__TypedVectorList4_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4s, Convert__TypedVectorList4_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8b, Convert__TypedVectorList4_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8h, Convert__TypedVectorList4_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev16b, Convert__TypedVectorList1_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev1d, Convert__TypedVectorList1_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev2d, Convert__TypedVectorList1_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev2s, Convert__TypedVectorList1_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev4h, Convert__TypedVectorList1_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev4s, Convert__TypedVectorList1_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev8b, Convert__TypedVectorList1_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev8h, Convert__TypedVectorList1_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev16b, Convert__TypedVectorList3_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev1d, Convert__TypedVectorList3_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev2d, Convert__TypedVectorList3_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev2s, Convert__TypedVectorList3_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev4h, Convert__TypedVectorList3_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev4s, Convert__TypedVectorList3_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev8b, Convert__TypedVectorList3_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev8h, Convert__TypedVectorList3_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov16b, Convert__TypedVectorList2_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov1d, Convert__TypedVectorList2_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov2d, Convert__TypedVectorList2_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov2s, Convert__TypedVectorList2_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov4h, Convert__TypedVectorList2_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov4s, Convert__TypedVectorList2_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov8b, Convert__TypedVectorList2_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov8h, Convert__TypedVectorList2_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv16b, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev16b, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev16b, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov16b, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv1d, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev1d, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev1d, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov1d, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2d, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev2d, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev2d, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov2d, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2s, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev2s, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev2s, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov2s, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4h, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev4h, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev4h, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov4h, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4s, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev4s, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev4s, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov4s, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8b, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev8b, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev8b, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov8b, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8h, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev8h, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev8h, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov8h, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv16b_POST, Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv16b_POST, Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv1d_POST, Convert__Reg1_2__TypedVectorList4_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv1d_POST, Convert__Reg1_2__TypedVectorList4_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2d_POST, Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2d_POST, Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2s_POST, Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2s_POST, Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4h_POST, Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4h_POST, Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8b_POST, Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8b_POST, Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8h_POST, Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8h_POST, Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev16b_POST, Convert__Reg1_2__TypedVectorList1_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Onev16b_POST, Convert__Reg1_2__TypedVectorList1_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev1d_POST, Convert__Reg1_2__TypedVectorList1_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2895 /* st1 */, AArch64::ST1Onev1d_POST, Convert__Reg1_2__TypedVectorList1_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev2d_POST, Convert__Reg1_2__TypedVectorList1_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Onev2d_POST, Convert__Reg1_2__TypedVectorList1_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev2s_POST, Convert__Reg1_2__TypedVectorList1_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2895 /* st1 */, AArch64::ST1Onev2s_POST, Convert__Reg1_2__TypedVectorList1_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev4h_POST, Convert__Reg1_2__TypedVectorList1_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2895 /* st1 */, AArch64::ST1Onev4h_POST, Convert__Reg1_2__TypedVectorList1_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev4s_POST, Convert__Reg1_2__TypedVectorList1_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Onev4s_POST, Convert__Reg1_2__TypedVectorList1_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev8b_POST, Convert__Reg1_2__TypedVectorList1_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2895 /* st1 */, AArch64::ST1Onev8b_POST, Convert__Reg1_2__TypedVectorList1_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev8h_POST, Convert__Reg1_2__TypedVectorList1_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Onev8h_POST, Convert__Reg1_2__TypedVectorList1_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1i8, Convert__TypedVectorList1_0b1_0__VectorIndexB1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList1_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1i64, Convert__TypedVectorList1_0d1_0__VectorIndexD1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList1_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1i16, Convert__TypedVectorList1_0h1_0__VectorIndexH1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList1_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1i32, Convert__TypedVectorList1_0s1_0__VectorIndexS1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList1_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev16b_POST, Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2895 /* st1 */, AArch64::ST1Threev16b_POST, Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev1d_POST, Convert__Reg1_2__TypedVectorList3_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2895 /* st1 */, AArch64::ST1Threev1d_POST, Convert__Reg1_2__TypedVectorList3_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2895 /* st1 */, AArch64::ST1Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2895 /* st1 */, AArch64::ST1Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2895 /* st1 */, AArch64::ST1Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2895 /* st1 */, AArch64::ST1Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev8b_POST, Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2895 /* st1 */, AArch64::ST1Threev8b_POST, Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev8h_POST, Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2895 /* st1 */, AArch64::ST1Threev8h_POST, Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov16b_POST, Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Twov16b_POST, Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov1d_POST, Convert__Reg1_2__TypedVectorList2_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Twov1d_POST, Convert__Reg1_2__TypedVectorList2_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov2s_POST, Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Twov2s_POST, Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov4h_POST, Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Twov4h_POST, Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov4s_POST, Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Twov4s_POST, Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov8b_POST, Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Twov8b_POST, Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov8h_POST, Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Twov8h_POST, Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv16b_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv16b_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev16b_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Onev16b_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2895 /* st1 */, AArch64::ST1Threev16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Twov16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv1d_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv1d_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev1d_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2895 /* st1 */, AArch64::ST1Onev1d_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev1d_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2895 /* st1 */, AArch64::ST1Threev1d_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov1d_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Twov1d_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev2d_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Onev2d_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev2d_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2895 /* st1 */, AArch64::ST1Threev2d_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov2d_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Twov2d_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev2s_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2895 /* st1 */, AArch64::ST1Onev2s_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2895 /* st1 */, AArch64::ST1Threev2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Twov2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev4h_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2895 /* st1 */, AArch64::ST1Onev4h_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev4h_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2895 /* st1 */, AArch64::ST1Threev4h_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov4h_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Twov4h_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev4s_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Onev4s_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2895 /* st1 */, AArch64::ST1Threev4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov4s_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Twov4s_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev8b_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2895 /* st1 */, AArch64::ST1Onev8b_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev8b_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2895 /* st1 */, AArch64::ST1Threev8b_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Twov8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev8h_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Onev8h_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev8h_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2895 /* st1 */, AArch64::ST1Threev8h_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov8h_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Twov8h_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1i8, Convert__VecListOne1281_1__VectorIndexB1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_b, MCK_VecListOne128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1i64, Convert__VecListOne1281_1__VectorIndexD1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_d, MCK_VecListOne128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1i16, Convert__VecListOne1281_1__VectorIndexH1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_h, MCK_VecListOne128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1i32, Convert__VecListOne1281_1__VectorIndexS1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_s, MCK_VecListOne128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1i8_POST, Convert__Reg1_3__TypedVectorList1_0b1_0__VectorIndexB1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_1 }, }, + { 2895 /* st1 */, AArch64::ST1i8_POST, Convert__Reg1_3__TypedVectorList1_0b1_0__VectorIndexB1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList1_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1i64_POST, Convert__Reg1_3__TypedVectorList1_0d1_0__VectorIndexD1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2895 /* st1 */, AArch64::ST1i64_POST, Convert__Reg1_3__TypedVectorList1_0d1_0__VectorIndexD1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList1_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1i16_POST, Convert__Reg1_3__TypedVectorList1_0h1_0__VectorIndexH1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 2895 /* st1 */, AArch64::ST1i16_POST, Convert__Reg1_3__TypedVectorList1_0h1_0__VectorIndexH1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList1_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1i32_POST, Convert__Reg1_3__TypedVectorList1_0s1_0__VectorIndexS1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 2895 /* st1 */, AArch64::ST1i32_POST, Convert__Reg1_3__TypedVectorList1_0s1_0__VectorIndexS1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList1_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1i8_POST, Convert__Reg1_4__VecListOne1281_1__VectorIndexB1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_b, MCK_VecListOne128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_1 }, }, + { 2895 /* st1 */, AArch64::ST1i8_POST, Convert__Reg1_4__VecListOne1281_1__VectorIndexB1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_b, MCK_VecListOne128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1i64_POST, Convert__Reg1_4__VecListOne1281_1__VectorIndexD1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_d, MCK_VecListOne128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2895 /* st1 */, AArch64::ST1i64_POST, Convert__Reg1_4__VecListOne1281_1__VectorIndexD1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_d, MCK_VecListOne128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1i16_POST, Convert__Reg1_4__VecListOne1281_1__VectorIndexH1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_h, MCK_VecListOne128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 2895 /* st1 */, AArch64::ST1i16_POST, Convert__Reg1_4__VecListOne1281_1__VectorIndexH1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_h, MCK_VecListOne128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1i32_POST, Convert__Reg1_4__VecListOne1281_1__VectorIndexS1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_s, MCK_VecListOne128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 2895 /* st1 */, AArch64::ST1i32_POST, Convert__Reg1_4__VecListOne1281_1__VectorIndexS1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_s, MCK_VecListOne128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov16b, Convert__TypedVectorList2_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov2d, Convert__TypedVectorList2_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov2s, Convert__TypedVectorList2_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov4h, Convert__TypedVectorList2_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov4s, Convert__TypedVectorList2_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov8b, Convert__TypedVectorList2_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov8h, Convert__TypedVectorList2_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov16b, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov2d, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov2s, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov4h, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov4s, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov8b, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov8h, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov16b_POST, Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2899 /* st2 */, AArch64::ST2Twov16b_POST, Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2899 /* st2 */, AArch64::ST2Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov2s_POST, Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2899 /* st2 */, AArch64::ST2Twov2s_POST, Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov4h_POST, Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2899 /* st2 */, AArch64::ST2Twov4h_POST, Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov4s_POST, Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2899 /* st2 */, AArch64::ST2Twov4s_POST, Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov8b_POST, Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2899 /* st2 */, AArch64::ST2Twov8b_POST, Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov8h_POST, Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2899 /* st2 */, AArch64::ST2Twov8h_POST, Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2i8, Convert__TypedVectorList2_0b1_0__VectorIndexB1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList2_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2i64, Convert__TypedVectorList2_0d1_0__VectorIndexD1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList2_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2i16, Convert__TypedVectorList2_0h1_0__VectorIndexH1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList2_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2i32, Convert__TypedVectorList2_0s1_0__VectorIndexS1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList2_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2899 /* st2 */, AArch64::ST2Twov16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov2d_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2899 /* st2 */, AArch64::ST2Twov2d_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2899 /* st2 */, AArch64::ST2Twov2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov4h_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2899 /* st2 */, AArch64::ST2Twov4h_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov4s_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2899 /* st2 */, AArch64::ST2Twov4s_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2899 /* st2 */, AArch64::ST2Twov8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov8h_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2899 /* st2 */, AArch64::ST2Twov8h_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2i8, Convert__VecListTwo1281_1__VectorIndexB1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_b, MCK_VecListTwo128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2i64, Convert__VecListTwo1281_1__VectorIndexD1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_d, MCK_VecListTwo128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2i16, Convert__VecListTwo1281_1__VectorIndexH1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_h, MCK_VecListTwo128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2i32, Convert__VecListTwo1281_1__VectorIndexS1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_s, MCK_VecListTwo128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2i8_POST, Convert__Reg1_3__TypedVectorList2_0b1_0__VectorIndexB1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 2899 /* st2 */, AArch64::ST2i8_POST, Convert__Reg1_3__TypedVectorList2_0b1_0__VectorIndexB1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList2_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2i64_POST, Convert__Reg1_3__TypedVectorList2_0d1_0__VectorIndexD1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2899 /* st2 */, AArch64::ST2i64_POST, Convert__Reg1_3__TypedVectorList2_0d1_0__VectorIndexD1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList2_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2i16_POST, Convert__Reg1_3__TypedVectorList2_0h1_0__VectorIndexH1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 2899 /* st2 */, AArch64::ST2i16_POST, Convert__Reg1_3__TypedVectorList2_0h1_0__VectorIndexH1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList2_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2i32_POST, Convert__Reg1_3__TypedVectorList2_0s1_0__VectorIndexS1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2899 /* st2 */, AArch64::ST2i32_POST, Convert__Reg1_3__TypedVectorList2_0s1_0__VectorIndexS1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList2_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2i8_POST, Convert__Reg1_4__VecListTwo1281_1__VectorIndexB1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_b, MCK_VecListTwo128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 2899 /* st2 */, AArch64::ST2i8_POST, Convert__Reg1_4__VecListTwo1281_1__VectorIndexB1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_b, MCK_VecListTwo128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2i64_POST, Convert__Reg1_4__VecListTwo1281_1__VectorIndexD1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_d, MCK_VecListTwo128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2899 /* st2 */, AArch64::ST2i64_POST, Convert__Reg1_4__VecListTwo1281_1__VectorIndexD1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_d, MCK_VecListTwo128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2i16_POST, Convert__Reg1_4__VecListTwo1281_1__VectorIndexH1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_h, MCK_VecListTwo128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 2899 /* st2 */, AArch64::ST2i16_POST, Convert__Reg1_4__VecListTwo1281_1__VectorIndexH1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_h, MCK_VecListTwo128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2i32_POST, Convert__Reg1_4__VecListTwo1281_1__VectorIndexS1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_s, MCK_VecListTwo128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2899 /* st2 */, AArch64::ST2i32_POST, Convert__Reg1_4__VecListTwo1281_1__VectorIndexS1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_s, MCK_VecListTwo128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev16b, Convert__TypedVectorList3_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev2d, Convert__TypedVectorList3_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev2s, Convert__TypedVectorList3_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev4h, Convert__TypedVectorList3_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev4s, Convert__TypedVectorList3_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev8b, Convert__TypedVectorList3_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev8h, Convert__TypedVectorList3_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev16b, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev2d, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev2s, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev4h, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev4s, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev8b, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev8h, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev16b_POST, Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2903 /* st3 */, AArch64::ST3Threev16b_POST, Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2903 /* st3 */, AArch64::ST3Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2903 /* st3 */, AArch64::ST3Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2903 /* st3 */, AArch64::ST3Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2903 /* st3 */, AArch64::ST3Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev8b_POST, Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2903 /* st3 */, AArch64::ST3Threev8b_POST, Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev8h_POST, Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2903 /* st3 */, AArch64::ST3Threev8h_POST, Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3i8, Convert__TypedVectorList3_0b1_0__VectorIndexB1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList3_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3i64, Convert__TypedVectorList3_0d1_0__VectorIndexD1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList3_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3i16, Convert__TypedVectorList3_0h1_0__VectorIndexH1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList3_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3i32, Convert__TypedVectorList3_0s1_0__VectorIndexS1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList3_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2903 /* st3 */, AArch64::ST3Threev16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev2d_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2903 /* st3 */, AArch64::ST3Threev2d_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2903 /* st3 */, AArch64::ST3Threev2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev4h_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2903 /* st3 */, AArch64::ST3Threev4h_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2903 /* st3 */, AArch64::ST3Threev4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev8b_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2903 /* st3 */, AArch64::ST3Threev8b_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev8h_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2903 /* st3 */, AArch64::ST3Threev8h_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3i8, Convert__VecListThree1281_1__VectorIndexB1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_b, MCK_VecListThree128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3i64, Convert__VecListThree1281_1__VectorIndexD1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_d, MCK_VecListThree128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3i16, Convert__VecListThree1281_1__VectorIndexH1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_h, MCK_VecListThree128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3i32, Convert__VecListThree1281_1__VectorIndexS1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_s, MCK_VecListThree128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3i8_POST, Convert__Reg1_3__TypedVectorList3_0b1_0__VectorIndexB1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_3 }, }, + { 2903 /* st3 */, AArch64::ST3i8_POST, Convert__Reg1_3__TypedVectorList3_0b1_0__VectorIndexB1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList3_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3i64_POST, Convert__Reg1_3__TypedVectorList3_0d1_0__VectorIndexD1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2903 /* st3 */, AArch64::ST3i64_POST, Convert__Reg1_3__TypedVectorList3_0d1_0__VectorIndexD1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList3_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3i16_POST, Convert__Reg1_3__TypedVectorList3_0h1_0__VectorIndexH1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_6 }, }, + { 2903 /* st3 */, AArch64::ST3i16_POST, Convert__Reg1_3__TypedVectorList3_0h1_0__VectorIndexH1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList3_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3i32_POST, Convert__Reg1_3__TypedVectorList3_0s1_0__VectorIndexS1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_12 }, }, + { 2903 /* st3 */, AArch64::ST3i32_POST, Convert__Reg1_3__TypedVectorList3_0s1_0__VectorIndexS1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList3_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3i8_POST, Convert__Reg1_4__VecListThree1281_1__VectorIndexB1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_b, MCK_VecListThree128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_3 }, }, + { 2903 /* st3 */, AArch64::ST3i8_POST, Convert__Reg1_4__VecListThree1281_1__VectorIndexB1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_b, MCK_VecListThree128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3i64_POST, Convert__Reg1_4__VecListThree1281_1__VectorIndexD1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_d, MCK_VecListThree128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2903 /* st3 */, AArch64::ST3i64_POST, Convert__Reg1_4__VecListThree1281_1__VectorIndexD1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_d, MCK_VecListThree128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3i16_POST, Convert__Reg1_4__VecListThree1281_1__VectorIndexH1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_h, MCK_VecListThree128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_6 }, }, + { 2903 /* st3 */, AArch64::ST3i16_POST, Convert__Reg1_4__VecListThree1281_1__VectorIndexH1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_h, MCK_VecListThree128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3i32_POST, Convert__Reg1_4__VecListThree1281_1__VectorIndexS1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_s, MCK_VecListThree128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_12 }, }, + { 2903 /* st3 */, AArch64::ST3i32_POST, Convert__Reg1_4__VecListThree1281_1__VectorIndexS1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_s, MCK_VecListThree128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv16b, Convert__TypedVectorList4_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2d, Convert__TypedVectorList4_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2s, Convert__TypedVectorList4_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4h, Convert__TypedVectorList4_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4s, Convert__TypedVectorList4_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8b, Convert__TypedVectorList4_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8h, Convert__TypedVectorList4_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv16b, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2d, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2s, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4h, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4s, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8b, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8h, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv16b_POST, Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv16b_POST, Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2d_POST, Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2d_POST, Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2s_POST, Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2s_POST, Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4h_POST, Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4h_POST, Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8b_POST, Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8b_POST, Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8h_POST, Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8h_POST, Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4i8, Convert__TypedVectorList4_0b1_0__VectorIndexB1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList4_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4i64, Convert__TypedVectorList4_0d1_0__VectorIndexD1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList4_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4i16, Convert__TypedVectorList4_0h1_0__VectorIndexH1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList4_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4i32, Convert__TypedVectorList4_0s1_0__VectorIndexS1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList4_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv16b_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv16b_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4i8, Convert__VecListFour1281_1__VectorIndexB1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_b, MCK_VecListFour128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4i64, Convert__VecListFour1281_1__VectorIndexD1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_d, MCK_VecListFour128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4i16, Convert__VecListFour1281_1__VectorIndexH1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_h, MCK_VecListFour128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4i32, Convert__VecListFour1281_1__VectorIndexS1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_s, MCK_VecListFour128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4i8_POST, Convert__Reg1_3__TypedVectorList4_0b1_0__VectorIndexB1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 2907 /* st4 */, AArch64::ST4i8_POST, Convert__Reg1_3__TypedVectorList4_0b1_0__VectorIndexB1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList4_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4i64_POST, Convert__Reg1_3__TypedVectorList4_0d1_0__VectorIndexD1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2907 /* st4 */, AArch64::ST4i64_POST, Convert__Reg1_3__TypedVectorList4_0d1_0__VectorIndexD1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList4_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4i16_POST, Convert__Reg1_3__TypedVectorList4_0h1_0__VectorIndexH1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2907 /* st4 */, AArch64::ST4i16_POST, Convert__Reg1_3__TypedVectorList4_0h1_0__VectorIndexH1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList4_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4i32_POST, Convert__Reg1_3__TypedVectorList4_0s1_0__VectorIndexS1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2907 /* st4 */, AArch64::ST4i32_POST, Convert__Reg1_3__TypedVectorList4_0s1_0__VectorIndexS1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList4_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4i8_POST, Convert__Reg1_4__VecListFour1281_1__VectorIndexB1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_b, MCK_VecListFour128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 2907 /* st4 */, AArch64::ST4i8_POST, Convert__Reg1_4__VecListFour1281_1__VectorIndexB1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_b, MCK_VecListFour128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4i64_POST, Convert__Reg1_4__VecListFour1281_1__VectorIndexD1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_d, MCK_VecListFour128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2907 /* st4 */, AArch64::ST4i64_POST, Convert__Reg1_4__VecListFour1281_1__VectorIndexD1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_d, MCK_VecListFour128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4i16_POST, Convert__Reg1_4__VecListFour1281_1__VectorIndexH1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_h, MCK_VecListFour128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2907 /* st4 */, AArch64::ST4i16_POST, Convert__Reg1_4__VecListFour1281_1__VectorIndexH1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_h, MCK_VecListFour128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4i32_POST, Convert__Reg1_4__VecListFour1281_1__VectorIndexS1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_s, MCK_VecListFour128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2907 /* st4 */, AArch64::ST4i32_POST, Convert__Reg1_4__VecListFour1281_1__VectorIndexS1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_s, MCK_VecListFour128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2911 /* stadd */, AArch64::LDADDs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2911 /* stadd */, AArch64::LDADDd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2917 /* staddb */, AArch64::LDADDb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2924 /* staddh */, AArch64::LDADDh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2931 /* staddl */, AArch64::LDADDLs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2931 /* staddl */, AArch64::LDADDLd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2938 /* staddlb */, AArch64::LDADDLb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2946 /* staddlh */, AArch64::LDADDLh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2954 /* stclr */, AArch64::LDCLRs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2954 /* stclr */, AArch64::LDCLRd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2960 /* stclrb */, AArch64::LDCLRb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2967 /* stclrh */, AArch64::LDCLRh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2974 /* stclrl */, AArch64::LDCLRLs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2974 /* stclrl */, AArch64::LDCLRLd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2981 /* stclrlb */, AArch64::LDCLRLb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2989 /* stclrlh */, AArch64::LDCLRLh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2997 /* steor */, AArch64::LDEORs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2997 /* steor */, AArch64::LDEORd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3003 /* steorb */, AArch64::LDEORb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3010 /* steorh */, AArch64::LDEORh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3017 /* steorl */, AArch64::LDEORLs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3017 /* steorl */, AArch64::LDEORLd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3024 /* steorlb */, AArch64::LDEORLb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3032 /* steorlh */, AArch64::LDEORLh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3040 /* stllr */, AArch64::STLLRW, Convert__Reg1_0__GPR64sp01_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3040 /* stllr */, AArch64::STLLRX, Convert__Reg1_0__GPR64sp01_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3046 /* stllrb */, AArch64::STLLRB, Convert__Reg1_0__GPR64sp01_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3053 /* stllrh */, AArch64::STLLRH, Convert__Reg1_0__GPR64sp01_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3060 /* stlr */, AArch64::STLRW, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3060 /* stlr */, AArch64::STLRX, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3065 /* stlrb */, AArch64::STLRB, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3071 /* stlrh */, AArch64::STLRH, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3077 /* stlxp */, AArch64::STLXPW, Convert__Reg1_0__Reg1_1__Reg1_2__GPR64sp01_4, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3077 /* stlxp */, AArch64::STLXPX, Convert__Reg1_0__Reg1_1__Reg1_2__GPR64sp01_4, 0, { MCK_GPR32, MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3083 /* stlxr */, AArch64::STLXRW, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3083 /* stlxr */, AArch64::STLXRX, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR32, MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3089 /* stlxrb */, AArch64::STLXRB, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3096 /* stlxrh */, AArch64::STLXRH, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3103 /* stnp */, AArch64::STNPQi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3103 /* stnp */, AArch64::STNPSi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3103 /* stnp */, AArch64::STNPDi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3103 /* stnp */, AArch64::STNPWi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3103 /* stnp */, AArch64::STNPXi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3103 /* stnp */, AArch64::STNPQi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s161_4, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm7s16, MCK__93_ }, }, + { 3103 /* stnp */, AArch64::STNPSi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s41_4, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_ }, }, + { 3103 /* stnp */, AArch64::STNPDi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, }, + { 3103 /* stnp */, AArch64::STNPWi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s41_4, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_ }, }, + { 3103 /* stnp */, AArch64::STNPXi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, }, + { 3108 /* stp */, AArch64::STPQi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3108 /* stp */, AArch64::STPSi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3108 /* stp */, AArch64::STPDi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3108 /* stp */, AArch64::STPWi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3108 /* stp */, AArch64::STPXi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3108 /* stp */, AArch64::STPQpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s161_5, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s16 }, }, + { 3108 /* stp */, AArch64::STPQi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s161_4, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm7s16, MCK__93_ }, }, + { 3108 /* stp */, AArch64::STPSpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_5, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s4 }, }, + { 3108 /* stp */, AArch64::STPSi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s41_4, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_ }, }, + { 3108 /* stp */, AArch64::STPDpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s81_5, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s8 }, }, + { 3108 /* stp */, AArch64::STPDi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, }, + { 3108 /* stp */, AArch64::STPWpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_5, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s4 }, }, + { 3108 /* stp */, AArch64::STPWi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s41_4, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_ }, }, + { 3108 /* stp */, AArch64::STPXpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s81_5, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s8 }, }, + { 3108 /* stp */, AArch64::STPXi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, }, + { 3108 /* stp */, AArch64::STPQpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s161_4, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm7s16, MCK__93_, MCK__EXCLAIM_ }, }, + { 3108 /* stp */, AArch64::STPSpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_4, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_, MCK__EXCLAIM_ }, }, + { 3108 /* stp */, AArch64::STPDpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s81_4, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_, MCK__EXCLAIM_ }, }, + { 3108 /* stp */, AArch64::STPWpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_4, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_, MCK__EXCLAIM_ }, }, + { 3108 /* stp */, AArch64::STPXpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s81_4, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_, MCK__EXCLAIM_ }, }, + { 3112 /* str */, AArch64::STRQui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRHui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRSui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRDui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRBui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRWui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRXui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRQpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 3112 /* str */, AArch64::STRQroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STURQi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB1281_3, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB128, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRQui, Convert__Reg1_0__Reg1_2__UImm12Offset161_3, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset16, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRHpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 3112 /* str */, AArch64::STRHroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STURHi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB161_3, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB16, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRHui, Convert__Reg1_0__Reg1_2__UImm12Offset21_3, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset2, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRSpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 3112 /* str */, AArch64::STRSroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STURSi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB321_3, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB32, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRSui, Convert__Reg1_0__Reg1_2__UImm12Offset41_3, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset4, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRDpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 3112 /* str */, AArch64::STRDroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STURDi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB641_3, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRDui, Convert__Reg1_0__Reg1_2__UImm12Offset81_3, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset8, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRBpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 3112 /* str */, AArch64::STRBroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STURBi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB81_3, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB8, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRBui, Convert__Reg1_0__Reg1_2__UImm12Offset11_3, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset1, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRWpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 3112 /* str */, AArch64::STRWroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STURWi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB321_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB32, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRWui, Convert__Reg1_0__Reg1_2__UImm12Offset41_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset4, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRXpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 3112 /* str */, AArch64::STRXroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STURXi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB641_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRXui, Convert__Reg1_0__Reg1_2__UImm12Offset81_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset8, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRQroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend1282_4, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend128, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRQroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend1282_4, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend128, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRQpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 3112 /* str */, AArch64::STRHroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend162_4, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend16, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRHroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend162_4, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend16, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRHpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 3112 /* str */, AArch64::STRSroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend322_4, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend32, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRSroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend322_4, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend32, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRSpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 3112 /* str */, AArch64::STRDroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend642_4, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRDroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend642_4, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRDpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 3112 /* str */, AArch64::STRBroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend82_4, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend8, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRBroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend82_4, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend8, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRBpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 3112 /* str */, AArch64::STRWroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend322_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend32, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRWroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend322_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend32, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRWpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 3112 /* str */, AArch64::STRXroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend642_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRXroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend642_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRXpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 3116 /* strb */, AArch64::STRBBui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3116 /* strb */, AArch64::STRBBpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 3116 /* strb */, AArch64::STRBBroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 3116 /* strb */, AArch64::STURBBi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB81_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB8, MCK__93_ }, }, + { 3116 /* strb */, AArch64::STRBBui, Convert__Reg1_0__Reg1_2__UImm12Offset11_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset1, MCK__93_ }, }, + { 3116 /* strb */, AArch64::STRBBroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend82_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend8, MCK__93_ }, }, + { 3116 /* strb */, AArch64::STRBBroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend82_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend8, MCK__93_ }, }, + { 3116 /* strb */, AArch64::STRBBpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 3121 /* strh */, AArch64::STRHHui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3121 /* strh */, AArch64::STRHHpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 3121 /* strh */, AArch64::STRHHroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 3121 /* strh */, AArch64::STURHHi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB161_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB16, MCK__93_ }, }, + { 3121 /* strh */, AArch64::STRHHui, Convert__Reg1_0__Reg1_2__UImm12Offset21_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset2, MCK__93_ }, }, + { 3121 /* strh */, AArch64::STRHHroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend162_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend16, MCK__93_ }, }, + { 3121 /* strh */, AArch64::STRHHroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend162_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend16, MCK__93_ }, }, + { 3121 /* strh */, AArch64::STRHHpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 3126 /* stset */, AArch64::LDSETs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3126 /* stset */, AArch64::LDSETd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3132 /* stsetb */, AArch64::LDSETb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3139 /* stseth */, AArch64::LDSETh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3146 /* stsetl */, AArch64::LDSETLs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3146 /* stsetl */, AArch64::LDSETLd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3153 /* stsetlb */, AArch64::LDSETLb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3161 /* stsetlh */, AArch64::LDSETLh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3169 /* stsmax */, AArch64::LDSMAXs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3169 /* stsmax */, AArch64::LDSMAXd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3176 /* stsmaxb */, AArch64::LDSMAXb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3184 /* stsmaxh */, AArch64::LDSMAXh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3192 /* stsmaxl */, AArch64::LDSMAXLs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3192 /* stsmaxl */, AArch64::LDSMAXLd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3200 /* stsmaxlb */, AArch64::LDSMAXLb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3209 /* stsmaxlh */, AArch64::LDSMAXLh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3218 /* stsmin */, AArch64::LDSMINs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3218 /* stsmin */, AArch64::LDSMINd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3225 /* stsminb */, AArch64::LDSMINb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3233 /* stsminh */, AArch64::LDSMINh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3241 /* stsminl */, AArch64::LDSMINLs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3241 /* stsminl */, AArch64::LDSMINLd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3249 /* stsminlb */, AArch64::LDSMINLb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3258 /* stsminlh */, AArch64::LDSMINLh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3267 /* sttr */, AArch64::STTRWi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3267 /* sttr */, AArch64::STTRXi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3267 /* sttr */, AArch64::STTRWi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3267 /* sttr */, AArch64::STTRXi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3272 /* sttrb */, AArch64::STTRBi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3272 /* sttrb */, AArch64::STTRBi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3278 /* sttrh */, AArch64::STTRHi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3278 /* sttrh */, AArch64::STTRHi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3284 /* stumax */, AArch64::LDUMAXs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3284 /* stumax */, AArch64::LDUMAXd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3291 /* stumaxb */, AArch64::LDUMAXb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3299 /* stumaxh */, AArch64::LDUMAXh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3307 /* stumaxl */, AArch64::LDUMAXLs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3307 /* stumaxl */, AArch64::LDUMAXLd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3315 /* stumaxlb */, AArch64::LDUMAXLb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3324 /* stumaxlh */, AArch64::LDUMAXLh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3333 /* stumin */, AArch64::LDUMINs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3333 /* stumin */, AArch64::LDUMINd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3340 /* stuminb */, AArch64::LDUMINb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3348 /* stuminh */, AArch64::LDUMINh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3356 /* stuminl */, AArch64::LDUMINLs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3356 /* stuminl */, AArch64::LDUMINLd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3364 /* stuminlb */, AArch64::LDUMINLb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3373 /* stuminlh */, AArch64::LDUMINLh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURQi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURHi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURSi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURDi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURBi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURWi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURXi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURQi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURHi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURSi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURDi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURBi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURWi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURXi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3387 /* sturb */, AArch64::STURBBi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3387 /* sturb */, AArch64::STURBBi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3393 /* sturh */, AArch64::STURHHi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3393 /* sturh */, AArch64::STURHHi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3399 /* stxp */, AArch64::STXPW, Convert__Reg1_0__Reg1_1__Reg1_2__GPR64sp01_4, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3399 /* stxp */, AArch64::STXPX, Convert__Reg1_0__Reg1_1__Reg1_2__GPR64sp01_4, 0, { MCK_GPR32, MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3404 /* stxr */, AArch64::STXRW, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3404 /* stxr */, AArch64::STXRX, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR32, MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3409 /* stxrb */, AArch64::STXRB, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3415 /* stxrh */, AArch64::STXRH, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3421 /* sub */, AArch64::SUBWrx, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_GPR32sponly, MCK_GPR32sp, MCK_GPR32 }, }, + { 3421 /* sub */, AArch64::SUBXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, 0, { MCK_GPR64sponly, MCK_GPR64sp, MCK_GPR64 }, }, + { 3421 /* sub */, AArch64::SUBv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 3421 /* sub */, AArch64::SUBWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 3421 /* sub */, AArch64::SUBWrx, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_GPR32sp, MCK_GPR32sponly, MCK_GPR32 }, }, + { 3421 /* sub */, AArch64::ADDWri, Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2, 0, { MCK_GPR32sp, MCK_GPR32sp, MCK_AddSubImmNeg }, }, + { 3421 /* sub */, AArch64::SUBWri, Convert__Reg1_0__Reg1_1__AddSubImm2_2, 0, { MCK_GPR32sp, MCK_GPR32sp, MCK_AddSubImm }, }, + { 3421 /* sub */, AArch64::SUBXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 3421 /* sub */, AArch64::SUBXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, 0, { MCK_GPR64sp, MCK_GPR64sponly, MCK_GPR64 }, }, + { 3421 /* sub */, AArch64::ADDXri, Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2, 0, { MCK_GPR64sp, MCK_GPR64sp, MCK_AddSubImmNeg }, }, + { 3421 /* sub */, AArch64::SUBXri, Convert__Reg1_0__Reg1_1__AddSubImm2_2, 0, { MCK_GPR64sp, MCK_GPR64sp, MCK_AddSubImm }, }, + { 3421 /* sub */, AArch64::SUBWrs, Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, }, + { 3421 /* sub */, AArch64::SUBWrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, 0, { MCK_GPR32sp, MCK_GPR32sp, MCK_GPR32, MCK_Extend }, }, + { 3421 /* sub */, AArch64::SUBXrs, Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_ArithmeticShifter64 }, }, + { 3421 /* sub */, AArch64::SUBXrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend641_3, 0, { MCK_GPR64sp, MCK_GPR64sp, MCK_GPR32, MCK_Extend64 }, }, + { 3421 /* sub */, AArch64::SUBXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__ExtendLSL641_3, 0, { MCK_GPR64sp, MCK_GPR64sp, MCK_GPR64, MCK_ExtendLSL64 }, }, + { 3421 /* sub */, AArch64::SUBv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3421 /* sub */, AArch64::SUBv2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 3421 /* sub */, AArch64::SUBv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3421 /* sub */, AArch64::SUBv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3421 /* sub */, AArch64::SUBv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3421 /* sub */, AArch64::SUBv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3421 /* sub */, AArch64::SUBv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3425 /* subhn */, AArch64::SUBHNv2i64_v2i32, Convert__VectorReg641_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 3425 /* subhn */, AArch64::SUBHNv4i32_v4i16, Convert__VectorReg641_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3425 /* subhn */, AArch64::SUBHNv8i16_v8i8, Convert__VectorReg641_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3431 /* subhn2 */, AArch64::SUBHNv8i16_v16i8, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3431 /* subhn2 */, AArch64::SUBHNv2i64_v4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 3431 /* subhn2 */, AArch64::SUBHNv4i32_v8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3438 /* subs */, AArch64::SUBSWrx, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_GPR32, MCK_GPR32sponly, MCK_GPR32 }, }, + { 3438 /* subs */, AArch64::SUBSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 3438 /* subs */, AArch64::ADDSWri, Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2, 0, { MCK_GPR32, MCK_GPR32sp, MCK_AddSubImmNeg }, }, + { 3438 /* subs */, AArch64::SUBSWri, Convert__Reg1_0__Reg1_1__AddSubImm2_2, 0, { MCK_GPR32, MCK_GPR32sp, MCK_AddSubImm }, }, + { 3438 /* subs */, AArch64::SUBSXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, 0, { MCK_GPR64, MCK_GPR64sponly, MCK_GPR64 }, }, + { 3438 /* subs */, AArch64::SUBSXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 3438 /* subs */, AArch64::ADDSXri, Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2, 0, { MCK_GPR64, MCK_GPR64sp, MCK_AddSubImmNeg }, }, + { 3438 /* subs */, AArch64::SUBSXri, Convert__Reg1_0__Reg1_1__AddSubImm2_2, 0, { MCK_GPR64, MCK_GPR64sp, MCK_AddSubImm }, }, + { 3438 /* subs */, AArch64::SUBSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, }, + { 3438 /* subs */, AArch64::SUBSWrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, 0, { MCK_GPR32, MCK_GPR32sp, MCK_GPR32, MCK_Extend }, }, + { 3438 /* subs */, AArch64::SUBSXrs, Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_ArithmeticShifter64 }, }, + { 3438 /* subs */, AArch64::SUBSXrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, 0, { MCK_GPR64, MCK_GPR64sp, MCK_GPR32, MCK_Extend }, }, + { 3438 /* subs */, AArch64::SUBSXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__ExtendLSL641_3, 0, { MCK_GPR64, MCK_GPR64sp, MCK_GPR64, MCK_ExtendLSL64 }, }, + { 3443 /* suqadd */, AArch64::SUQADDv1i16, Convert__Reg1_0__Tie0__Reg1_1, Feature_HasNEON, { MCK_FPR16, MCK_FPR16 }, }, + { 3443 /* suqadd */, AArch64::SUQADDv1i32, Convert__Reg1_0__Tie0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 3443 /* suqadd */, AArch64::SUQADDv1i64, Convert__Reg1_0__Tie0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 3443 /* suqadd */, AArch64::SUQADDv1i8, Convert__Reg1_0__Tie0__Reg1_1, Feature_HasNEON, { MCK_FPR8, MCK_FPR8 }, }, + { 3443 /* suqadd */, AArch64::SUQADDv16i8, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3443 /* suqadd */, AArch64::SUQADDv2i64, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 3443 /* suqadd */, AArch64::SUQADDv4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3443 /* suqadd */, AArch64::SUQADDv8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3443 /* suqadd */, AArch64::SUQADDv2i32, Convert__VectorReg641_0__Tie0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3443 /* suqadd */, AArch64::SUQADDv4i16, Convert__VectorReg641_0__Tie0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3443 /* suqadd */, AArch64::SUQADDv8i8, Convert__VectorReg641_0__Tie0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3450 /* svc */, AArch64::SVC, Convert__Imm0_655351_0, 0, { MCK_Imm0_65535 }, }, + { 3454 /* swp */, AArch64::SWPs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3454 /* swp */, AArch64::SWPd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3458 /* swpa */, AArch64::SWPAs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3458 /* swpa */, AArch64::SWPAd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3463 /* swpab */, AArch64::SWPAb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3469 /* swpah */, AArch64::SWPAh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3475 /* swpal */, AArch64::SWPALs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3475 /* swpal */, AArch64::SWPALd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3481 /* swpalb */, AArch64::SWPALb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3488 /* swpalh */, AArch64::SWPALh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3495 /* swpb */, AArch64::SWPb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3500 /* swph */, AArch64::SWPh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3505 /* swpl */, AArch64::SWPLs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3505 /* swpl */, AArch64::SWPLd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3510 /* swplb */, AArch64::SWPLb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3516 /* swplh */, AArch64::SWPLh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3522 /* sxtb */, AArch64::SBFMWri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_7, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 3522 /* sxtb */, AArch64::SBFMXri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_7, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 3527 /* sxth */, AArch64::SBFMWri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_15, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 3527 /* sxth */, AArch64::SBFMXri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_15, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 3532 /* sxtl */, AArch64::SSHLLv2i32_shift, Convert__VectorReg1281_1__VectorReg641_2__imm_95_0, 0, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 3532 /* sxtl */, AArch64::SSHLLv4i16_shift, Convert__VectorReg1281_1__VectorReg641_2__imm_95_0, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 3532 /* sxtl */, AArch64::SSHLLv8i8_shift, Convert__VectorReg1281_1__VectorReg641_2__imm_95_0, 0, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 3532 /* sxtl */, AArch64::SSHLLv2i32_shift, Convert__VectorReg1281_0__VectorReg641_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3532 /* sxtl */, AArch64::SSHLLv4i16_shift, Convert__VectorReg1281_0__VectorReg641_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3532 /* sxtl */, AArch64::SSHLLv8i8_shift, Convert__VectorReg1281_0__VectorReg641_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3537 /* sxtl2 */, AArch64::SSHLLv4i32_shift, Convert__VectorReg1281_1__VectorReg1281_2__imm_95_0, 0, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3537 /* sxtl2 */, AArch64::SSHLLv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__imm_95_0, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3537 /* sxtl2 */, AArch64::SSHLLv16i8_shift, Convert__VectorReg1281_1__VectorReg1281_2__imm_95_0, 0, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3537 /* sxtl2 */, AArch64::SSHLLv4i32_shift, Convert__VectorReg1281_0__VectorReg1281_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3537 /* sxtl2 */, AArch64::SSHLLv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3537 /* sxtl2 */, AArch64::SSHLLv16i8_shift, Convert__VectorReg1281_0__VectorReg1281_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3543 /* sxtw */, AArch64::SBFMXri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_31, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 3548 /* sys */, AArch64::SYSxt, Convert__Imm0_71_0__SysCR1_1__SysCR1_2__Imm0_71_3__regXZR, 0, { MCK_Imm0_7, MCK_SysCR, MCK_SysCR, MCK_Imm0_7 }, }, + { 3548 /* sys */, AArch64::SYSxt, Convert__Imm0_71_0__SysCR1_1__SysCR1_2__Imm0_71_3__Reg1_4, 0, { MCK_Imm0_7, MCK_SysCR, MCK_SysCR, MCK_Imm0_7, MCK_GPR64 }, }, + { 3552 /* sysl */, AArch64::SYSLxt, Convert__Reg1_0__Imm0_71_1__SysCR1_2__SysCR1_3__Imm0_71_4, 0, { MCK_GPR64, MCK_Imm0_7, MCK_SysCR, MCK_SysCR, MCK_Imm0_7 }, }, + { 3557 /* tbl */, AArch64::TBLv16i8Four, Convert__VectorReg1281_1__VecListFour1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VecListFour128, MCK_VectorReg128 }, }, + { 3557 /* tbl */, AArch64::TBLv16i8One, Convert__VectorReg1281_1__VecListOne1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VecListOne128, MCK_VectorReg128 }, }, + { 3557 /* tbl */, AArch64::TBLv16i8Three, Convert__VectorReg1281_1__VecListThree1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VecListThree128, MCK_VectorReg128 }, }, + { 3557 /* tbl */, AArch64::TBLv16i8Two, Convert__VectorReg1281_1__VecListTwo1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VecListTwo128, MCK_VectorReg128 }, }, + { 3557 /* tbl */, AArch64::TBLv8i8Four, Convert__VectorReg641_1__VecListFour1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VecListFour128, MCK_VectorReg64 }, }, + { 3557 /* tbl */, AArch64::TBLv8i8One, Convert__VectorReg641_1__VecListOne1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VecListOne128, MCK_VectorReg64 }, }, + { 3557 /* tbl */, AArch64::TBLv8i8Three, Convert__VectorReg641_1__VecListThree1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VecListThree128, MCK_VectorReg64 }, }, + { 3557 /* tbl */, AArch64::TBLv8i8Two, Convert__VectorReg641_1__VecListTwo1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VecListTwo128, MCK_VectorReg64 }, }, + { 3557 /* tbl */, AArch64::TBLv16i8Four, Convert__VectorReg1281_0__TypedVectorList4_16b1_2__VectorReg1281_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_TypedVectorList4_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3557 /* tbl */, AArch64::TBLv16i8One, Convert__VectorReg1281_0__TypedVectorList1_16b1_2__VectorReg1281_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_TypedVectorList1_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3557 /* tbl */, AArch64::TBLv16i8Three, Convert__VectorReg1281_0__TypedVectorList3_16b1_2__VectorReg1281_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_TypedVectorList3_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3557 /* tbl */, AArch64::TBLv16i8Two, Convert__VectorReg1281_0__TypedVectorList2_16b1_2__VectorReg1281_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_TypedVectorList2_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3557 /* tbl */, AArch64::TBLv8i8Four, Convert__VectorReg641_0__TypedVectorList4_16b1_2__VectorReg641_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_TypedVectorList4_16b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3557 /* tbl */, AArch64::TBLv8i8One, Convert__VectorReg641_0__TypedVectorList1_16b1_2__VectorReg641_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_TypedVectorList1_16b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3557 /* tbl */, AArch64::TBLv8i8Three, Convert__VectorReg641_0__TypedVectorList3_16b1_2__VectorReg641_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_TypedVectorList3_16b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3557 /* tbl */, AArch64::TBLv8i8Two, Convert__VectorReg641_0__TypedVectorList2_16b1_2__VectorReg641_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_TypedVectorList2_16b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3561 /* tbnz */, AArch64::TBNZW, Convert__Reg1_0__Imm0_311_1__BranchTarget141_2, 0, { MCK_GPR32, MCK_Imm0_31, MCK_BranchTarget14 }, }, + { 3561 /* tbnz */, AArch64::TBNZX, Convert__Reg1_0__Imm32_631_1__BranchTarget141_2, 0, { MCK_GPR64, MCK_Imm32_63, MCK_BranchTarget14 }, }, + { 3561 /* tbnz */, AArch64::TBNZW, Convert__GPR32as641_0__TBZImm0_311_1__BranchTarget141_2, 0, { MCK_GPR32as64, MCK_TBZImm0_31, MCK_BranchTarget14 }, }, + { 3566 /* tbx */, AArch64::TBXv16i8Four, Convert__VectorReg1281_1__Tie0__VecListFour1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VecListFour128, MCK_VectorReg128 }, }, + { 3566 /* tbx */, AArch64::TBXv16i8One, Convert__VectorReg1281_1__Tie0__VecListOne1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VecListOne128, MCK_VectorReg128 }, }, + { 3566 /* tbx */, AArch64::TBXv16i8Three, Convert__VectorReg1281_1__Tie0__VecListThree1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VecListThree128, MCK_VectorReg128 }, }, + { 3566 /* tbx */, AArch64::TBXv16i8Two, Convert__VectorReg1281_1__Tie0__VecListTwo1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VecListTwo128, MCK_VectorReg128 }, }, + { 3566 /* tbx */, AArch64::TBXv8i8Four, Convert__VectorReg641_1__Tie0__VecListFour1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VecListFour128, MCK_VectorReg64 }, }, + { 3566 /* tbx */, AArch64::TBXv8i8One, Convert__VectorReg641_1__Tie0__VecListOne1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VecListOne128, MCK_VectorReg64 }, }, + { 3566 /* tbx */, AArch64::TBXv8i8Three, Convert__VectorReg641_1__Tie0__VecListThree1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VecListThree128, MCK_VectorReg64 }, }, + { 3566 /* tbx */, AArch64::TBXv8i8Two, Convert__VectorReg641_1__Tie0__VecListTwo1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VecListTwo128, MCK_VectorReg64 }, }, + { 3566 /* tbx */, AArch64::TBXv16i8Four, Convert__VectorReg1281_0__Tie0__TypedVectorList4_16b1_2__VectorReg1281_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_TypedVectorList4_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3566 /* tbx */, AArch64::TBXv16i8One, Convert__VectorReg1281_0__Tie0__TypedVectorList1_16b1_2__VectorReg1281_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_TypedVectorList1_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3566 /* tbx */, AArch64::TBXv16i8Three, Convert__VectorReg1281_0__Tie0__TypedVectorList3_16b1_2__VectorReg1281_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_TypedVectorList3_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3566 /* tbx */, AArch64::TBXv16i8Two, Convert__VectorReg1281_0__Tie0__TypedVectorList2_16b1_2__VectorReg1281_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_TypedVectorList2_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3566 /* tbx */, AArch64::TBXv8i8Four, Convert__VectorReg641_0__Tie0__TypedVectorList4_16b1_2__VectorReg641_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_TypedVectorList4_16b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3566 /* tbx */, AArch64::TBXv8i8One, Convert__VectorReg641_0__Tie0__TypedVectorList1_16b1_2__VectorReg641_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_TypedVectorList1_16b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3566 /* tbx */, AArch64::TBXv8i8Three, Convert__VectorReg641_0__Tie0__TypedVectorList3_16b1_2__VectorReg641_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_TypedVectorList3_16b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3566 /* tbx */, AArch64::TBXv8i8Two, Convert__VectorReg641_0__Tie0__TypedVectorList2_16b1_2__VectorReg641_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_TypedVectorList2_16b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3570 /* tbz */, AArch64::TBZW, Convert__Reg1_0__Imm0_311_1__BranchTarget141_2, 0, { MCK_GPR32, MCK_Imm0_31, MCK_BranchTarget14 }, }, + { 3570 /* tbz */, AArch64::TBZX, Convert__Reg1_0__Imm32_631_1__BranchTarget141_2, 0, { MCK_GPR64, MCK_Imm32_63, MCK_BranchTarget14 }, }, + { 3570 /* tbz */, AArch64::TBZW, Convert__GPR32as641_0__TBZImm0_311_1__BranchTarget141_2, 0, { MCK_GPR32as64, MCK_TBZImm0_31, MCK_BranchTarget14 }, }, + { 3574 /* trn1 */, AArch64::TRN1v16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3574 /* trn1 */, AArch64::TRN1v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 3574 /* trn1 */, AArch64::TRN1v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3574 /* trn1 */, AArch64::TRN1v8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3574 /* trn1 */, AArch64::TRN1v2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3574 /* trn1 */, AArch64::TRN1v4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3574 /* trn1 */, AArch64::TRN1v8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3579 /* trn2 */, AArch64::TRN2v16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3579 /* trn2 */, AArch64::TRN2v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 3579 /* trn2 */, AArch64::TRN2v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3579 /* trn2 */, AArch64::TRN2v8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3579 /* trn2 */, AArch64::TRN2v2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3579 /* trn2 */, AArch64::TRN2v4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3579 /* trn2 */, AArch64::TRN2v8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3584 /* tst */, AArch64::ANDSWrs, Convert__regWZR__Reg1_0__Reg1_1__imm_95_0, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 3584 /* tst */, AArch64::ANDSWri, Convert__regWZR__Reg1_0__LogicalImm321_1, 0, { MCK_GPR32, MCK_LogicalImm32 }, }, + { 3584 /* tst */, AArch64::ANDSXrs, Convert__regXZR__Reg1_0__Reg1_1__imm_95_0, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 3584 /* tst */, AArch64::ANDSXri, Convert__regXZR__Reg1_0__LogicalImm641_1, 0, { MCK_GPR64, MCK_LogicalImm64 }, }, + { 3584 /* tst */, AArch64::ANDSWrs, Convert__regWZR__Reg1_0__Reg1_1__LogicalShifter321_2, 0, { MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, }, + { 3584 /* tst */, AArch64::ANDSXrs, Convert__regXZR__Reg1_0__Reg1_1__LogicalShifter641_2, 0, { MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, }, + { 3588 /* uaba */, AArch64::UABAv16i8, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3588 /* uaba */, AArch64::UABAv4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3588 /* uaba */, AArch64::UABAv8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3588 /* uaba */, AArch64::UABAv2i32, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3588 /* uaba */, AArch64::UABAv4i16, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3588 /* uaba */, AArch64::UABAv8i8, Convert__VectorReg641_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3593 /* uabal */, AArch64::UABALv2i32_v2i64, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3593 /* uabal */, AArch64::UABALv4i16_v4i32, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3593 /* uabal */, AArch64::UABALv8i8_v8i16, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3599 /* uabal2 */, AArch64::UABALv4i32_v2i64, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3599 /* uabal2 */, AArch64::UABALv8i16_v4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3599 /* uabal2 */, AArch64::UABALv16i8_v8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3606 /* uabd */, AArch64::UABDv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3606 /* uabd */, AArch64::UABDv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3606 /* uabd */, AArch64::UABDv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3606 /* uabd */, AArch64::UABDv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3606 /* uabd */, AArch64::UABDv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3606 /* uabd */, AArch64::UABDv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3611 /* uabdl */, AArch64::UABDLv2i32_v2i64, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3611 /* uabdl */, AArch64::UABDLv4i16_v4i32, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3611 /* uabdl */, AArch64::UABDLv8i8_v8i16, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3617 /* uabdl2 */, AArch64::UABDLv4i32_v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3617 /* uabdl2 */, AArch64::UABDLv8i16_v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3617 /* uabdl2 */, AArch64::UABDLv16i8_v8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3624 /* uadalp */, AArch64::UADALPv4i32_v2i64, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3624 /* uadalp */, AArch64::UADALPv8i16_v4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3624 /* uadalp */, AArch64::UADALPv16i8_v8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3624 /* uadalp */, AArch64::UADALPv2i32_v1i64, Convert__VectorReg641_0__Tie0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_1d, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3624 /* uadalp */, AArch64::UADALPv4i16_v2i32, Convert__VectorReg641_0__Tie0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3624 /* uadalp */, AArch64::UADALPv8i8_v4i16, Convert__VectorReg641_0__Tie0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3631 /* uaddl */, AArch64::UADDLv2i32_v2i64, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3631 /* uaddl */, AArch64::UADDLv4i16_v4i32, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3631 /* uaddl */, AArch64::UADDLv8i8_v8i16, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3637 /* uaddl2 */, AArch64::UADDLv4i32_v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3637 /* uaddl2 */, AArch64::UADDLv8i16_v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3637 /* uaddl2 */, AArch64::UADDLv16i8_v8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3644 /* uaddlp */, AArch64::UADDLPv4i32_v2i64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3644 /* uaddlp */, AArch64::UADDLPv8i16_v4i32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3644 /* uaddlp */, AArch64::UADDLPv16i8_v8i16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3644 /* uaddlp */, AArch64::UADDLPv2i32_v1i64, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_1d, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3644 /* uaddlp */, AArch64::UADDLPv4i16_v2i32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3644 /* uaddlp */, AArch64::UADDLPv8i8_v4i16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3651 /* uaddlv */, AArch64::UADDLVv16i8v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR16, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3651 /* uaddlv */, AArch64::UADDLVv8i8v, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON, { MCK_FPR16, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3651 /* uaddlv */, AArch64::UADDLVv8i16v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR32, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3651 /* uaddlv */, AArch64::UADDLVv4i16v, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON, { MCK_FPR32, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3651 /* uaddlv */, AArch64::UADDLVv4i32v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR64, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3658 /* uaddw */, AArch64::UADDWv2i32_v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3658 /* uaddw */, AArch64::UADDWv4i16_v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3658 /* uaddw */, AArch64::UADDWv8i8_v8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3664 /* uaddw2 */, AArch64::UADDWv4i32_v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3664 /* uaddw2 */, AArch64::UADDWv8i16_v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3664 /* uaddw2 */, AArch64::UADDWv16i8_v8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3671 /* ubfm */, AArch64::UBFMWri, Convert__Reg1_0__Reg1_1__Imm0_311_2__Imm0_311_3, 0, { MCK_GPR32, MCK_GPR32, MCK_Imm0_31, MCK_Imm0_31 }, }, + { 3671 /* ubfm */, AArch64::UBFMXri, Convert__Reg1_0__Reg1_1__Imm0_631_2__Imm0_631_3, 0, { MCK_GPR64, MCK_GPR64, MCK_Imm0_63, MCK_Imm0_63 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv1i16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFUWHri, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_GPR32 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFUXHri, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_GPR64 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFUWSri, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_GPR32 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFUXSri, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_GPR64 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFUWDri, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_GPR32 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFUXDri, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_GPR64 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFh, Convert__Reg1_0__Reg1_1__Imm1_161_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm1_16 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFSWHri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFullFP16, { MCK_FPR16, MCK_GPR32, MCK_Imm1_32 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFSXHri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFullFP16, { MCK_FPR16, MCK_GPR64, MCK_Imm1_64 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFs, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_Imm1_32 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFSWSri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_GPR32, MCK_Imm1_32 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFSXSri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_GPR64, MCK_Imm1_64 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFd, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFSWDri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_GPR32, MCK_Imm1_32 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFSXDri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_GPR64, MCK_Imm1_64 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv2f64, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv4f32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv8f16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv2f32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv4f16, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv2i64_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_64 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv4i32_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_32 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_16 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv2i32_shift, Convert__VectorReg641_0__VectorReg641_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_Imm1_32 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv4i16_shift, Convert__VectorReg641_0__VectorReg641_2__Imm1_161_4, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm1_16 }, }, + { 3682 /* udiv */, AArch64::UDIVWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 3682 /* udiv */, AArch64::UDIVXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 3687 /* uhadd */, AArch64::UHADDv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3687 /* uhadd */, AArch64::UHADDv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3687 /* uhadd */, AArch64::UHADDv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3687 /* uhadd */, AArch64::UHADDv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3687 /* uhadd */, AArch64::UHADDv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3687 /* uhadd */, AArch64::UHADDv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3693 /* uhsub */, AArch64::UHSUBv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3693 /* uhsub */, AArch64::UHSUBv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3693 /* uhsub */, AArch64::UHSUBv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3693 /* uhsub */, AArch64::UHSUBv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3693 /* uhsub */, AArch64::UHSUBv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3693 /* uhsub */, AArch64::UHSUBv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3699 /* umaddl */, AArch64::UMADDLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_GPR64, MCK_GPR32, MCK_GPR32, MCK_GPR64 }, }, + { 3706 /* umax */, AArch64::UMAXv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3706 /* umax */, AArch64::UMAXv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3706 /* umax */, AArch64::UMAXv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3706 /* umax */, AArch64::UMAXv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3706 /* umax */, AArch64::UMAXv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3706 /* umax */, AArch64::UMAXv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3711 /* umaxp */, AArch64::UMAXPv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3711 /* umaxp */, AArch64::UMAXPv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3711 /* umaxp */, AArch64::UMAXPv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3711 /* umaxp */, AArch64::UMAXPv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3711 /* umaxp */, AArch64::UMAXPv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3711 /* umaxp */, AArch64::UMAXPv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3717 /* umaxv */, AArch64::UMAXVv8i16v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR16, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3717 /* umaxv */, AArch64::UMAXVv4i16v, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON, { MCK_FPR16, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3717 /* umaxv */, AArch64::UMAXVv4i32v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR32, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3717 /* umaxv */, AArch64::UMAXVv16i8v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR8, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3717 /* umaxv */, AArch64::UMAXVv8i8v, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON, { MCK_FPR8, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3723 /* umin */, AArch64::UMINv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3723 /* umin */, AArch64::UMINv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3723 /* umin */, AArch64::UMINv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3723 /* umin */, AArch64::UMINv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3723 /* umin */, AArch64::UMINv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3723 /* umin */, AArch64::UMINv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3728 /* uminp */, AArch64::UMINPv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3728 /* uminp */, AArch64::UMINPv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3728 /* uminp */, AArch64::UMINPv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3728 /* uminp */, AArch64::UMINPv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3728 /* uminp */, AArch64::UMINPv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3728 /* uminp */, AArch64::UMINPv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3734 /* uminv */, AArch64::UMINVv8i16v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR16, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3734 /* uminv */, AArch64::UMINVv4i16v, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON, { MCK_FPR16, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3734 /* uminv */, AArch64::UMINVv4i32v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR32, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3734 /* uminv */, AArch64::UMINVv16i8v, Convert__Reg1_0__VectorReg1281_1, Feature_HasNEON, { MCK_FPR8, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3734 /* uminv */, AArch64::UMINVv8i8v, Convert__Reg1_0__VectorReg641_1, Feature_HasNEON, { MCK_FPR8, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3740 /* umlal */, AArch64::UMLALv2i32_v2i64, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3740 /* umlal */, AArch64::UMLALv4i16_v4i32, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3740 /* umlal */, AArch64::UMLALv8i8_v8i16, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3740 /* umlal */, AArch64::UMLALv2i32_indexed, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 3740 /* umlal */, AArch64::UMLALv4i16_indexed, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 3746 /* umlal2 */, AArch64::UMLALv4i32_v2i64, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3746 /* umlal2 */, AArch64::UMLALv8i16_v4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3746 /* umlal2 */, AArch64::UMLALv16i8_v8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3746 /* umlal2 */, AArch64::UMLALv4i32_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 3746 /* umlal2 */, AArch64::UMLALv8i16_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 3753 /* umlsl */, AArch64::UMLSLv2i32_v2i64, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3753 /* umlsl */, AArch64::UMLSLv4i16_v4i32, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3753 /* umlsl */, AArch64::UMLSLv8i8_v8i16, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3753 /* umlsl */, AArch64::UMLSLv2i32_indexed, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 3753 /* umlsl */, AArch64::UMLSLv4i16_indexed, Convert__VectorReg1281_0__Tie0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 3759 /* umlsl2 */, AArch64::UMLSLv4i32_v2i64, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3759 /* umlsl2 */, AArch64::UMLSLv8i16_v4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3759 /* umlsl2 */, AArch64::UMLSLv16i8_v8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3759 /* umlsl2 */, AArch64::UMLSLv4i32_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 3759 /* umlsl2 */, AArch64::UMLSLv8i16_indexed, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 3766 /* umnegl */, AArch64::UMSUBLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__regXZR, 0, { MCK_GPR64, MCK_GPR32, MCK_GPR32 }, }, + { 3773 /* umov */, AArch64::UMOVvi8, Convert__Reg1_0__VectorReg1281_1__VectorIndexB1_3, Feature_HasNEON, { MCK_GPR32, MCK_VectorReg128, MCK__DOT_b, MCK_VectorIndexB }, }, + { 3773 /* umov */, AArch64::UMOVvi16, Convert__Reg1_0__VectorReg1281_1__VectorIndexH1_3, Feature_HasNEON, { MCK_GPR32, MCK_VectorReg128, MCK__DOT_h, MCK_VectorIndexH }, }, + { 3773 /* umov */, AArch64::UMOVvi32, Convert__Reg1_0__VectorReg1281_1__VectorIndexS1_3, Feature_HasNEON, { MCK_GPR32, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 3773 /* umov */, AArch64::UMOVvi64, Convert__Reg1_0__VectorReg1281_1__VectorIndexD1_3, Feature_HasNEON, { MCK_GPR64, MCK_VectorReg128, MCK__DOT_d, MCK_VectorIndexD }, }, + { 3778 /* umsubl */, AArch64::UMSUBLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_GPR64, MCK_GPR32, MCK_GPR32, MCK_GPR64 }, }, + { 3785 /* umulh */, AArch64::UMULHrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 3791 /* umull */, AArch64::UMADDLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__regXZR, 0, { MCK_GPR64, MCK_GPR32, MCK_GPR32 }, }, + { 3791 /* umull */, AArch64::UMULLv2i32_v2i64, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3791 /* umull */, AArch64::UMULLv4i16_v4i32, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3791 /* umull */, AArch64::UMULLv8i8_v8i16, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3791 /* umull */, AArch64::UMULLv2i32_indexed, Convert__VectorReg1281_0__VectorReg641_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 3791 /* umull */, AArch64::UMULLv4i16_indexed, Convert__VectorReg1281_0__VectorReg641_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 3797 /* umull2 */, AArch64::UMULLv4i32_v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3797 /* umull2 */, AArch64::UMULLv8i16_v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3797 /* umull2 */, AArch64::UMULLv16i8_v8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3797 /* umull2 */, AArch64::UMULLv4i32_indexed, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4__VectorIndexS1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_VectorIndexS }, }, + { 3797 /* umull2 */, AArch64::UMULLv8i16_indexed, Convert__VectorReg1281_0__VectorReg1281_2__VectorRegLo1_4__VectorIndexH1_6, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_VectorIndexH }, }, + { 3804 /* uqadd */, AArch64::UQADDv1i16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 3804 /* uqadd */, AArch64::UQADDv1i32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 3804 /* uqadd */, AArch64::UQADDv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 3804 /* uqadd */, AArch64::UQADDv1i8, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR8, MCK_FPR8 }, }, + { 3804 /* uqadd */, AArch64::UQADDv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3804 /* uqadd */, AArch64::UQADDv2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 3804 /* uqadd */, AArch64::UQADDv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3804 /* uqadd */, AArch64::UQADDv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3804 /* uqadd */, AArch64::UQADDv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3804 /* uqadd */, AArch64::UQADDv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3804 /* uqadd */, AArch64::UQADDv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3810 /* uqrshl */, AArch64::UQRSHLv1i16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 3810 /* uqrshl */, AArch64::UQRSHLv1i32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 3810 /* uqrshl */, AArch64::UQRSHLv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 3810 /* uqrshl */, AArch64::UQRSHLv1i8, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR8, MCK_FPR8 }, }, + { 3810 /* uqrshl */, AArch64::UQRSHLv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3810 /* uqrshl */, AArch64::UQRSHLv2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 3810 /* uqrshl */, AArch64::UQRSHLv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3810 /* uqrshl */, AArch64::UQRSHLv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3810 /* uqrshl */, AArch64::UQRSHLv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3810 /* uqrshl */, AArch64::UQRSHLv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3810 /* uqrshl */, AArch64::UQRSHLv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3817 /* uqrshrn */, AArch64::UQRSHRNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, }, + { 3817 /* uqrshrn */, AArch64::UQRSHRNs, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR64, MCK_Imm1_32 }, }, + { 3817 /* uqrshrn */, AArch64::UQRSHRNb, Convert__Reg1_0__Reg1_1__Imm1_81_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR16, MCK_Imm1_8 }, }, + { 3817 /* uqrshrn */, AArch64::UQRSHRNv2i32_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_32 }, }, + { 3817 /* uqrshrn */, AArch64::UQRSHRNv4i16_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_16 }, }, + { 3817 /* uqrshrn */, AArch64::UQRSHRNv8i8_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_8 }, }, + { 3825 /* uqrshrn2 */, AArch64::UQRSHRNv16i8_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_8 }, }, + { 3825 /* uqrshrn2 */, AArch64::UQRSHRNv4i32_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_32 }, }, + { 3825 /* uqrshrn2 */, AArch64::UQRSHRNv8i16_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_16 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv1i16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 3834 /* uqshl */, AArch64::UQSHLh, Convert__Reg1_0__Reg1_1__Imm0_151_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv1i32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 3834 /* uqshl */, AArch64::UQSHLs, Convert__Reg1_0__Reg1_1__Imm0_311_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_Imm0_31 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 3834 /* uqshl */, AArch64::UQSHLd, Convert__Reg1_0__Reg1_1__Imm0_631_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm0_63 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv1i8, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR8, MCK_FPR8 }, }, + { 3834 /* uqshl */, AArch64::UQSHLb, Convert__Reg1_0__Reg1_1__Imm0_71_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR8, MCK_Imm0_7 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv16i8_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_71_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_Imm0_7 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv2i64_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_631_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm0_63 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv4i32_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_311_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm0_31 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_151_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_15 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv2i32_shift, Convert__VectorReg641_0__VectorReg641_2__Imm0_311_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_Imm0_31 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv4i16_shift, Convert__VectorReg641_0__VectorReg641_2__Imm0_151_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_15 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv8i8_shift, Convert__VectorReg641_0__VectorReg641_2__Imm0_71_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_Imm0_7 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3834 /* uqshl */, AArch64::UQSHLv2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 3834 /* uqshl */, AArch64::UQSHLv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3834 /* uqshl */, AArch64::UQSHLv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3834 /* uqshl */, AArch64::UQSHLv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3834 /* uqshl */, AArch64::UQSHLv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3834 /* uqshl */, AArch64::UQSHLv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3840 /* uqshrn */, AArch64::UQSHRNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, }, + { 3840 /* uqshrn */, AArch64::UQSHRNs, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR64, MCK_Imm1_32 }, }, + { 3840 /* uqshrn */, AArch64::UQSHRNb, Convert__Reg1_0__Reg1_1__Imm1_81_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR16, MCK_Imm1_8 }, }, + { 3840 /* uqshrn */, AArch64::UQSHRNv2i32_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_32 }, }, + { 3840 /* uqshrn */, AArch64::UQSHRNv4i16_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_16 }, }, + { 3840 /* uqshrn */, AArch64::UQSHRNv8i8_shift, Convert__VectorReg641_0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_8 }, }, + { 3847 /* uqshrn2 */, AArch64::UQSHRNv16i8_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_8 }, }, + { 3847 /* uqshrn2 */, AArch64::UQSHRNv4i32_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_32 }, }, + { 3847 /* uqshrn2 */, AArch64::UQSHRNv8i16_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_16 }, }, + { 3855 /* uqsub */, AArch64::UQSUBv1i16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 3855 /* uqsub */, AArch64::UQSUBv1i32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 3855 /* uqsub */, AArch64::UQSUBv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 3855 /* uqsub */, AArch64::UQSUBv1i8, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR8, MCK_FPR8 }, }, + { 3855 /* uqsub */, AArch64::UQSUBv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3855 /* uqsub */, AArch64::UQSUBv2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 3855 /* uqsub */, AArch64::UQSUBv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3855 /* uqsub */, AArch64::UQSUBv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3855 /* uqsub */, AArch64::UQSUBv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3855 /* uqsub */, AArch64::UQSUBv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3855 /* uqsub */, AArch64::UQSUBv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3861 /* uqxtn */, AArch64::UQXTNv1i16, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR16, MCK_FPR32 }, }, + { 3861 /* uqxtn */, AArch64::UQXTNv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR64 }, }, + { 3861 /* uqxtn */, AArch64::UQXTNv1i8, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR8, MCK_FPR16 }, }, + { 3861 /* uqxtn */, AArch64::UQXTNv2i32, Convert__VectorReg641_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_2d }, }, + { 3861 /* uqxtn */, AArch64::UQXTNv4i16, Convert__VectorReg641_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3861 /* uqxtn */, AArch64::UQXTNv8i8, Convert__VectorReg641_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3867 /* uqxtn2 */, AArch64::UQXTNv16i8, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3867 /* uqxtn2 */, AArch64::UQXTNv4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_2d }, }, + { 3867 /* uqxtn2 */, AArch64::UQXTNv8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3874 /* urecpe */, AArch64::URECPEv4i32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3874 /* urecpe */, AArch64::URECPEv2i32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3881 /* urhadd */, AArch64::URHADDv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3881 /* urhadd */, AArch64::URHADDv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3881 /* urhadd */, AArch64::URHADDv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3881 /* urhadd */, AArch64::URHADDv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3881 /* urhadd */, AArch64::URHADDv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3881 /* urhadd */, AArch64::URHADDv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3888 /* urshl */, AArch64::URSHLv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 3888 /* urshl */, AArch64::URSHLv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3888 /* urshl */, AArch64::URSHLv2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 3888 /* urshl */, AArch64::URSHLv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3888 /* urshl */, AArch64::URSHLv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3888 /* urshl */, AArch64::URSHLv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3888 /* urshl */, AArch64::URSHLv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3888 /* urshl */, AArch64::URSHLv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3894 /* urshr */, AArch64::URSHRd, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 3894 /* urshr */, AArch64::URSHRv16i8_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_Imm1_8 }, }, + { 3894 /* urshr */, AArch64::URSHRv2i64_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_64 }, }, + { 3894 /* urshr */, AArch64::URSHRv4i32_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_32 }, }, + { 3894 /* urshr */, AArch64::URSHRv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_16 }, }, + { 3894 /* urshr */, AArch64::URSHRv2i32_shift, Convert__VectorReg641_0__VectorReg641_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_Imm1_32 }, }, + { 3894 /* urshr */, AArch64::URSHRv4i16_shift, Convert__VectorReg641_0__VectorReg641_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm1_16 }, }, + { 3894 /* urshr */, AArch64::URSHRv8i8_shift, Convert__VectorReg641_0__VectorReg641_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_Imm1_8 }, }, + { 3900 /* ursqrte */, AArch64::URSQRTEv4i32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3900 /* ursqrte */, AArch64::URSQRTEv2i32, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3908 /* ursra */, AArch64::URSRAd, Convert__Reg1_0__Tie0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 3908 /* ursra */, AArch64::URSRAv16i8_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_Imm1_8 }, }, + { 3908 /* ursra */, AArch64::URSRAv2i64_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_64 }, }, + { 3908 /* ursra */, AArch64::URSRAv4i32_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_32 }, }, + { 3908 /* ursra */, AArch64::URSRAv8i16_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_16 }, }, + { 3908 /* ursra */, AArch64::URSRAv2i32_shift, Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_Imm1_32 }, }, + { 3908 /* ursra */, AArch64::URSRAv4i16_shift, Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm1_16 }, }, + { 3908 /* ursra */, AArch64::URSRAv8i8_shift, Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_Imm1_8 }, }, + { 3914 /* ushl */, AArch64::USHLv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 3914 /* ushl */, AArch64::USHLv16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3914 /* ushl */, AArch64::USHLv2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 3914 /* ushl */, AArch64::USHLv4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3914 /* ushl */, AArch64::USHLv8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3914 /* ushl */, AArch64::USHLv2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3914 /* ushl */, AArch64::USHLv4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3914 /* ushl */, AArch64::USHLv8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3919 /* ushll */, AArch64::USHLLv2i32_shift, Convert__VectorReg1281_0__VectorReg641_2__Imm0_311_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_Imm0_31 }, }, + { 3919 /* ushll */, AArch64::USHLLv4i16_shift, Convert__VectorReg1281_0__VectorReg641_2__Imm0_151_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_15 }, }, + { 3919 /* ushll */, AArch64::USHLLv8i8_shift, Convert__VectorReg1281_0__VectorReg641_2__Imm0_71_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b, MCK_Imm0_7 }, }, + { 3925 /* ushll2 */, AArch64::USHLLv4i32_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_311_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm0_31 }, }, + { 3925 /* ushll2 */, AArch64::USHLLv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_151_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_15 }, }, + { 3925 /* ushll2 */, AArch64::USHLLv16i8_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_71_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b, MCK_Imm0_7 }, }, + { 3932 /* ushr */, AArch64::USHRd, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 3932 /* ushr */, AArch64::USHRv16i8_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_Imm1_8 }, }, + { 3932 /* ushr */, AArch64::USHRv2i64_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_64 }, }, + { 3932 /* ushr */, AArch64::USHRv4i32_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_32 }, }, + { 3932 /* ushr */, AArch64::USHRv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_16 }, }, + { 3932 /* ushr */, AArch64::USHRv2i32_shift, Convert__VectorReg641_0__VectorReg641_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_Imm1_32 }, }, + { 3932 /* ushr */, AArch64::USHRv4i16_shift, Convert__VectorReg641_0__VectorReg641_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm1_16 }, }, + { 3932 /* ushr */, AArch64::USHRv8i8_shift, Convert__VectorReg641_0__VectorReg641_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_Imm1_8 }, }, + { 3937 /* usqadd */, AArch64::USQADDv1i16, Convert__Reg1_0__Tie0__Reg1_1, Feature_HasNEON, { MCK_FPR16, MCK_FPR16 }, }, + { 3937 /* usqadd */, AArch64::USQADDv1i32, Convert__Reg1_0__Tie0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 3937 /* usqadd */, AArch64::USQADDv1i64, Convert__Reg1_0__Tie0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 3937 /* usqadd */, AArch64::USQADDv1i8, Convert__Reg1_0__Tie0__Reg1_1, Feature_HasNEON, { MCK_FPR8, MCK_FPR8 }, }, + { 3937 /* usqadd */, AArch64::USQADDv16i8, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3937 /* usqadd */, AArch64::USQADDv2i64, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 3937 /* usqadd */, AArch64::USQADDv4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3937 /* usqadd */, AArch64::USQADDv8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3937 /* usqadd */, AArch64::USQADDv2i32, Convert__VectorReg641_0__Tie0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3937 /* usqadd */, AArch64::USQADDv4i16, Convert__VectorReg641_0__Tie0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3937 /* usqadd */, AArch64::USQADDv8i8, Convert__VectorReg641_0__Tie0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3944 /* usra */, AArch64::USRAd, Convert__Reg1_0__Tie0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 3944 /* usra */, AArch64::USRAv16i8_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_Imm1_8 }, }, + { 3944 /* usra */, AArch64::USRAv2i64_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_Imm1_64 }, }, + { 3944 /* usra */, AArch64::USRAv4i32_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_Imm1_32 }, }, + { 3944 /* usra */, AArch64::USRAv8i16_shift, Convert__VectorReg1281_0__Tie0__VectorReg1281_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm1_16 }, }, + { 3944 /* usra */, AArch64::USRAv2i32_shift, Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm1_321_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_Imm1_32 }, }, + { 3944 /* usra */, AArch64::USRAv4i16_shift, Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm1_161_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm1_16 }, }, + { 3944 /* usra */, AArch64::USRAv8i8_shift, Convert__VectorReg641_0__Tie0__VectorReg641_2__Imm1_81_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_Imm1_8 }, }, + { 3949 /* usubl */, AArch64::USUBLv2i32_v2i64, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3949 /* usubl */, AArch64::USUBLv4i16_v4i32, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3949 /* usubl */, AArch64::USUBLv8i8_v8i16, Convert__VectorReg1281_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3955 /* usubl2 */, AArch64::USUBLv4i32_v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3955 /* usubl2 */, AArch64::USUBLv8i16_v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3955 /* usubl2 */, AArch64::USUBLv16i8_v8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3962 /* usubw */, AArch64::USUBWv2i32_v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3962 /* usubw */, AArch64::USUBWv4i16_v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3962 /* usubw */, AArch64::USUBWv8i8_v8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3968 /* usubw2 */, AArch64::USUBWv4i32_v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3968 /* usubw2 */, AArch64::USUBWv8i16_v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3968 /* usubw2 */, AArch64::USUBWv16i8_v8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3975 /* uxtb */, AArch64::UBFMWri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_7, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 3975 /* uxtb */, AArch64::UBFMXri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_7, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 3980 /* uxth */, AArch64::UBFMWri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_15, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 3980 /* uxth */, AArch64::UBFMXri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_15, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 3985 /* uxtl */, AArch64::USHLLv2i32_shift, Convert__VectorReg1281_1__VectorReg641_2__imm_95_0, 0, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 3985 /* uxtl */, AArch64::USHLLv4i16_shift, Convert__VectorReg1281_1__VectorReg641_2__imm_95_0, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 3985 /* uxtl */, AArch64::USHLLv8i8_shift, Convert__VectorReg1281_1__VectorReg641_2__imm_95_0, 0, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 3985 /* uxtl */, AArch64::USHLLv2i32_shift, Convert__VectorReg1281_0__VectorReg641_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3985 /* uxtl */, AArch64::USHLLv4i16_shift, Convert__VectorReg1281_0__VectorReg641_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3985 /* uxtl */, AArch64::USHLLv8i8_shift, Convert__VectorReg1281_0__VectorReg641_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3990 /* uxtl2 */, AArch64::USHLLv4i32_shift, Convert__VectorReg1281_1__VectorReg1281_2__imm_95_0, 0, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3990 /* uxtl2 */, AArch64::USHLLv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__imm_95_0, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3990 /* uxtl2 */, AArch64::USHLLv16i8_shift, Convert__VectorReg1281_1__VectorReg1281_2__imm_95_0, 0, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3990 /* uxtl2 */, AArch64::USHLLv4i32_shift, Convert__VectorReg1281_0__VectorReg1281_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3990 /* uxtl2 */, AArch64::USHLLv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3990 /* uxtl2 */, AArch64::USHLLv16i8_shift, Convert__VectorReg1281_0__VectorReg1281_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3996 /* uxtw */, AArch64::UBFMXri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_31, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 4001 /* uzp1 */, AArch64::UZP1v16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 4001 /* uzp1 */, AArch64::UZP1v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 4001 /* uzp1 */, AArch64::UZP1v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 4001 /* uzp1 */, AArch64::UZP1v8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 4001 /* uzp1 */, AArch64::UZP1v2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 4001 /* uzp1 */, AArch64::UZP1v4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 4001 /* uzp1 */, AArch64::UZP1v8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 4006 /* uzp2 */, AArch64::UZP2v16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 4006 /* uzp2 */, AArch64::UZP2v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 4006 /* uzp2 */, AArch64::UZP2v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 4006 /* uzp2 */, AArch64::UZP2v8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 4006 /* uzp2 */, AArch64::UZP2v2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 4006 /* uzp2 */, AArch64::UZP2v4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 4006 /* uzp2 */, AArch64::UZP2v8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 4011 /* wfe */, AArch64::HINT, Convert__imm_95_2, 0, { }, }, + { 4015 /* wfi */, AArch64::HINT, Convert__imm_95_3, 0, { }, }, + { 4019 /* xtn */, AArch64::XTNv2i32, Convert__VectorReg641_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_2d }, }, + { 4019 /* xtn */, AArch64::XTNv4i16, Convert__VectorReg641_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg128, MCK__DOT_4s }, }, + { 4019 /* xtn */, AArch64::XTNv8i8, Convert__VectorReg641_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg128, MCK__DOT_8h }, }, + { 4023 /* xtn2 */, AArch64::XTNv16i8, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_8h }, }, + { 4023 /* xtn2 */, AArch64::XTNv4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_2d }, }, + { 4023 /* xtn2 */, AArch64::XTNv8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_4s }, }, + { 4028 /* yield */, AArch64::HINT, Convert__imm_95_1, 0, { }, }, + { 4034 /* zip1 */, AArch64::ZIP1v16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 4034 /* zip1 */, AArch64::ZIP1v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 4034 /* zip1 */, AArch64::ZIP1v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 4034 /* zip1 */, AArch64::ZIP1v8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 4034 /* zip1 */, AArch64::ZIP1v2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 4034 /* zip1 */, AArch64::ZIP1v4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 4034 /* zip1 */, AArch64::ZIP1v8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 4039 /* zip2 */, AArch64::ZIP2v16i8, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 4039 /* zip2 */, AArch64::ZIP2v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d }, }, + { 4039 /* zip2 */, AArch64::ZIP2v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s }, }, + { 4039 /* zip2 */, AArch64::ZIP2v8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorReg1281_4, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h }, }, + { 4039 /* zip2 */, AArch64::ZIP2v2i32, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s }, }, + { 4039 /* zip2 */, AArch64::ZIP2v4i16, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h }, }, + { 4039 /* zip2 */, AArch64::ZIP2v8i8, Convert__VectorReg641_0__VectorReg641_2__VectorReg641_4, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b, MCK_VectorReg64, MCK__DOT_8b }, }, +}; + +static const MatchEntry MatchTable1[] = { + { 0 /* abs */, AArch64::ABSv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 0 /* abs */, AArch64::ABSv16i8, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 0 /* abs */, AArch64::ABSv2i64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 0 /* abs */, AArch64::ABSv2i32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 0 /* abs */, AArch64::ABSv4i16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 0 /* abs */, AArch64::ABSv4i32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 0 /* abs */, AArch64::ABSv8i8, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 0 /* abs */, AArch64::ABSv8i16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 4 /* adc */, AArch64::ADCWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 4 /* adc */, AArch64::ADCXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 8 /* adcs */, AArch64::ADCSWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 8 /* adcs */, AArch64::ADCSXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 13 /* add */, AArch64::ADDWrx, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_GPR32sponly, MCK_GPR32sp, MCK_GPR32 }, }, + { 13 /* add */, AArch64::ADDXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, 0, { MCK_GPR64sponly, MCK_GPR64sp, MCK_GPR64 }, }, + { 13 /* add */, AArch64::ADDv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 13 /* add */, AArch64::ADDWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 13 /* add */, AArch64::ADDWrx, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_GPR32sp, MCK_GPR32sponly, MCK_GPR32 }, }, + { 13 /* add */, AArch64::SUBWri, Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2, 0, { MCK_GPR32sp, MCK_GPR32sp, MCK_AddSubImmNeg }, }, + { 13 /* add */, AArch64::ADDWri, Convert__Reg1_0__Reg1_1__AddSubImm2_2, 0, { MCK_GPR32sp, MCK_GPR32sp, MCK_AddSubImm }, }, + { 13 /* add */, AArch64::ADDXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 13 /* add */, AArch64::ADDXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, 0, { MCK_GPR64sp, MCK_GPR64sponly, MCK_GPR64 }, }, + { 13 /* add */, AArch64::SUBXri, Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2, 0, { MCK_GPR64sp, MCK_GPR64sp, MCK_AddSubImmNeg }, }, + { 13 /* add */, AArch64::ADDXri, Convert__Reg1_0__Reg1_1__AddSubImm2_2, 0, { MCK_GPR64sp, MCK_GPR64sp, MCK_AddSubImm }, }, + { 13 /* add */, AArch64::ADDv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 13 /* add */, AArch64::ADDv2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 13 /* add */, AArch64::ADDv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 13 /* add */, AArch64::ADDv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 13 /* add */, AArch64::ADDv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 13 /* add */, AArch64::ADDv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 13 /* add */, AArch64::ADDv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 13 /* add */, AArch64::ADDWrs, Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, }, + { 13 /* add */, AArch64::ADDWrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, 0, { MCK_GPR32sp, MCK_GPR32sp, MCK_GPR32, MCK_Extend }, }, + { 13 /* add */, AArch64::ADDXrs, Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_ArithmeticShifter64 }, }, + { 13 /* add */, AArch64::ADDXrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend641_3, 0, { MCK_GPR64sp, MCK_GPR64sp, MCK_GPR32, MCK_Extend64 }, }, + { 13 /* add */, AArch64::ADDXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__ExtendLSL641_3, 0, { MCK_GPR64sp, MCK_GPR64sp, MCK_GPR64, MCK_ExtendLSL64 }, }, + { 17 /* addhn */, AArch64::ADDHNv2i64_v2i32, Convert__VectorReg641_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 17 /* addhn */, AArch64::ADDHNv4i32_v4i16, Convert__VectorReg641_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 17 /* addhn */, AArch64::ADDHNv8i16_v8i8, Convert__VectorReg641_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 23 /* addhn2 */, AArch64::ADDHNv8i16_v16i8, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 23 /* addhn2 */, AArch64::ADDHNv2i64_v4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 23 /* addhn2 */, AArch64::ADDHNv4i32_v8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 30 /* addp */, AArch64::ADDPv2i64p, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_FPR64, MCK_VectorReg128 }, }, + { 30 /* addp */, AArch64::ADDPv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 30 /* addp */, AArch64::ADDPv2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 30 /* addp */, AArch64::ADDPv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 30 /* addp */, AArch64::ADDPv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 30 /* addp */, AArch64::ADDPv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 30 /* addp */, AArch64::ADDPv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 30 /* addp */, AArch64::ADDPv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 35 /* adds */, AArch64::ADDSWrx, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_GPR32, MCK_GPR32sponly, MCK_GPR32 }, }, + { 35 /* adds */, AArch64::ADDSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 35 /* adds */, AArch64::SUBSWri, Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2, 0, { MCK_GPR32, MCK_GPR32sp, MCK_AddSubImmNeg }, }, + { 35 /* adds */, AArch64::ADDSWri, Convert__Reg1_0__Reg1_1__AddSubImm2_2, 0, { MCK_GPR32, MCK_GPR32sp, MCK_AddSubImm }, }, + { 35 /* adds */, AArch64::ADDSXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, 0, { MCK_GPR64, MCK_GPR64sponly, MCK_GPR64 }, }, + { 35 /* adds */, AArch64::ADDSXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 35 /* adds */, AArch64::SUBSXri, Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2, 0, { MCK_GPR64, MCK_GPR64sp, MCK_AddSubImmNeg }, }, + { 35 /* adds */, AArch64::ADDSXri, Convert__Reg1_0__Reg1_1__AddSubImm2_2, 0, { MCK_GPR64, MCK_GPR64sp, MCK_AddSubImm }, }, + { 35 /* adds */, AArch64::ADDSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, }, + { 35 /* adds */, AArch64::ADDSWrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, 0, { MCK_GPR32, MCK_GPR32sp, MCK_GPR32, MCK_Extend }, }, + { 35 /* adds */, AArch64::ADDSXrs, Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_ArithmeticShifter64 }, }, + { 35 /* adds */, AArch64::ADDSXrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, 0, { MCK_GPR64, MCK_GPR64sp, MCK_GPR32, MCK_Extend }, }, + { 35 /* adds */, AArch64::ADDSXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__ExtendLSL641_3, 0, { MCK_GPR64, MCK_GPR64sp, MCK_GPR64, MCK_ExtendLSL64 }, }, + { 40 /* addv */, AArch64::ADDVv16i8v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_FPR8, MCK_VectorReg128 }, }, + { 40 /* addv */, AArch64::ADDVv4i16v, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_FPR16, MCK_VectorReg64 }, }, + { 40 /* addv */, AArch64::ADDVv4i32v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_FPR32, MCK_VectorReg128 }, }, + { 40 /* addv */, AArch64::ADDVv8i8v, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_FPR8, MCK_VectorReg64 }, }, + { 40 /* addv */, AArch64::ADDVv8i16v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_FPR16, MCK_VectorReg128 }, }, + { 45 /* adr */, AArch64::ADR, Convert__Reg1_0__AdrLabel1_1, 0, { MCK_GPR64, MCK_AdrLabel }, }, + { 49 /* adrp */, AArch64::ADRP, Convert__Reg1_0__AdrpLabel1_1, 0, { MCK_GPR64, MCK_AdrpLabel }, }, + { 54 /* aesd */, AArch64::AESDrr, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasCrypto, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 59 /* aese */, AArch64::AESErr, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasCrypto, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 64 /* aesimc */, AArch64::AESIMCrr, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasCrypto, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 71 /* aesmc */, AArch64::AESMCrr, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasCrypto, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 77 /* and */, AArch64::ANDWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 77 /* and */, AArch64::ANDWri, Convert__Reg1_0__Reg1_1__LogicalImm321_2, 0, { MCK_GPR32sp, MCK_GPR32, MCK_LogicalImm32 }, }, + { 77 /* and */, AArch64::ANDXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 77 /* and */, AArch64::ANDXri, Convert__Reg1_0__Reg1_1__LogicalImm641_2, 0, { MCK_GPR64sp, MCK_GPR64, MCK_LogicalImm64 }, }, + { 77 /* and */, AArch64::ANDv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 77 /* and */, AArch64::ANDv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 77 /* and */, AArch64::ANDWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, }, + { 77 /* and */, AArch64::ANDXrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, }, + { 81 /* ands */, AArch64::ANDSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 81 /* ands */, AArch64::ANDSWri, Convert__Reg1_0__Reg1_1__LogicalImm321_2, 0, { MCK_GPR32, MCK_GPR32, MCK_LogicalImm32 }, }, + { 81 /* ands */, AArch64::ANDSXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 81 /* ands */, AArch64::ANDSXri, Convert__Reg1_0__Reg1_1__LogicalImm641_2, 0, { MCK_GPR64, MCK_GPR64, MCK_LogicalImm64 }, }, + { 81 /* ands */, AArch64::ANDSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, }, + { 81 /* ands */, AArch64::ANDSXrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, }, + { 86 /* asr */, AArch64::ASRVWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 86 /* asr */, AArch64::SBFMWri, Convert__Reg1_0__Reg1_1__Imm0_311_2__imm_95_31, 0, { MCK_GPR32, MCK_GPR32, MCK_Imm0_31 }, }, + { 86 /* asr */, AArch64::ASRVXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 86 /* asr */, AArch64::SBFMXri, Convert__Reg1_0__Reg1_1__Imm0_631_2__imm_95_63, 0, { MCK_GPR64, MCK_GPR64, MCK_Imm0_63 }, }, + { 90 /* asrv */, AArch64::ASRVWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 90 /* asrv */, AArch64::ASRVXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 95 /* b */, AArch64::B, Convert__BranchTarget261_0, 0, { MCK_BranchTarget26 }, }, + { 95 /* b */, AArch64::Bcc, Convert__CondCode1_1__PCRelLabel191_2, 0, { MCK__DOT_, MCK_CondCode, MCK_PCRelLabel19 }, }, + { 97 /* bfm */, AArch64::BFMWri, Convert__Reg1_0__Tie0__Reg1_1__Imm0_311_2__Imm0_311_3, 0, { MCK_GPR32, MCK_GPR32, MCK_Imm0_31, MCK_Imm0_31 }, }, + { 97 /* bfm */, AArch64::BFMXri, Convert__Reg1_0__Tie0__Reg1_1__Imm0_631_2__Imm0_631_3, 0, { MCK_GPR64, MCK_GPR64, MCK_Imm0_63, MCK_Imm0_63 }, }, + { 101 /* bic */, AArch64::BICv2i32, Convert__VectorReg641_1__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_2s, MCK_VectorReg64, MCK_Imm0_255 }, }, + { 101 /* bic */, AArch64::BICv4i16, Convert__VectorReg641_1__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_4h, MCK_VectorReg64, MCK_Imm0_255 }, }, + { 101 /* bic */, AArch64::BICv4i32, Convert__VectorReg1281_1__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_Imm0_255 }, }, + { 101 /* bic */, AArch64::BICv8i16, Convert__VectorReg1281_1__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_8h, MCK_VectorReg128, MCK_Imm0_255 }, }, + { 101 /* bic */, AArch64::BICWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 101 /* bic */, AArch64::ANDWri, Convert__Reg1_0__Reg1_1__LogicalImm32Not1_2, 0, { MCK_GPR32sp, MCK_GPR32, MCK_LogicalImm32Not }, }, + { 101 /* bic */, AArch64::BICXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 101 /* bic */, AArch64::ANDXri, Convert__Reg1_0__Reg1_1__LogicalImm64Not1_2, 0, { MCK_GPR64sp, MCK_GPR64, MCK_LogicalImm64Not }, }, + { 101 /* bic */, AArch64::BICv4i32, Convert__VectorReg1281_0__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_Imm0_255 }, }, + { 101 /* bic */, AArch64::BICv8i16, Convert__VectorReg1281_0__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_255 }, }, + { 101 /* bic */, AArch64::BICv2i32, Convert__VectorReg641_0__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg64, MCK__DOT_2s, MCK_Imm0_255 }, }, + { 101 /* bic */, AArch64::BICv4i16, Convert__VectorReg641_0__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_255 }, }, + { 101 /* bic */, AArch64::BICv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 101 /* bic */, AArch64::BICv2i32, Convert__VectorReg641_1__Tie0__Imm0_2551_2__LogicalVecShifter1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_Imm0_255, MCK_LogicalVecShifter }, }, + { 101 /* bic */, AArch64::BICv4i16, Convert__VectorReg641_1__Tie0__Imm0_2551_2__LogicalVecHalfWordShifter1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_Imm0_255, MCK_LogicalVecHalfWordShifter }, }, + { 101 /* bic */, AArch64::BICv4i32, Convert__VectorReg1281_1__Tie0__Imm0_2551_2__LogicalVecShifter1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_Imm0_255, MCK_LogicalVecShifter }, }, + { 101 /* bic */, AArch64::BICv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 101 /* bic */, AArch64::BICv8i16, Convert__VectorReg1281_1__Tie0__Imm0_2551_2__LogicalVecHalfWordShifter1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_Imm0_255, MCK_LogicalVecHalfWordShifter }, }, + { 101 /* bic */, AArch64::BICWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, }, + { 101 /* bic */, AArch64::BICXrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, }, + { 105 /* bics */, AArch64::BICSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 105 /* bics */, AArch64::ANDSWri, Convert__Reg1_0__Reg1_1__LogicalImm32Not1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_LogicalImm32Not }, }, + { 105 /* bics */, AArch64::BICSXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 105 /* bics */, AArch64::ANDSXri, Convert__Reg1_0__Reg1_1__LogicalImm64Not1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_LogicalImm64Not }, }, + { 105 /* bics */, AArch64::BICSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, }, + { 105 /* bics */, AArch64::BICSXrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, }, + { 110 /* bif */, AArch64::BIFv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 110 /* bif */, AArch64::BIFv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 114 /* bit */, AArch64::BITv16i8, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 114 /* bit */, AArch64::BITv8i8, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 118 /* bl */, AArch64::BL, Convert__BranchTarget261_0, 0, { MCK_BranchTarget26 }, }, + { 121 /* blr */, AArch64::BLR, Convert__Reg1_0, 0, { MCK_GPR64 }, }, + { 125 /* br */, AArch64::BR, Convert__Reg1_0, 0, { MCK_GPR64 }, }, + { 128 /* brk */, AArch64::BRK, Convert__Imm0_655351_0, 0, { MCK_Imm0_65535 }, }, + { 132 /* bsl */, AArch64::BSLv16i8, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 132 /* bsl */, AArch64::BSLv8i8, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 136 /* cas */, AArch64::CASs, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 136 /* cas */, AArch64::CASd, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 140 /* casa */, AArch64::CASAs, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 140 /* casa */, AArch64::CASAd, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 145 /* casab */, AArch64::CASAb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 151 /* casah */, AArch64::CASAh, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 157 /* casal */, AArch64::CASALs, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 157 /* casal */, AArch64::CASALd, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 163 /* casalb */, AArch64::CASALb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 170 /* casalh */, AArch64::CASALh, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 177 /* casb */, AArch64::CASb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 182 /* cash */, AArch64::CASh, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 187 /* casl */, AArch64::CASLs, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 187 /* casl */, AArch64::CASLd, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 192 /* caslb */, AArch64::CASLb, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 198 /* caslh */, AArch64::CASLh, Convert__Reg1_0__Tie0__Reg1_1__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 204 /* casp */, AArch64::CASPs, Convert__WSeqPair1_0__Tie0__WSeqPair1_1__Reg1_3, Feature_HasV8_1a, { MCK_WSeqPair, MCK_WSeqPair, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 204 /* casp */, AArch64::CASPd, Convert__XSeqPair1_0__Tie0__XSeqPair1_1__Reg1_3, Feature_HasV8_1a, { MCK_XSeqPair, MCK_XSeqPair, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 209 /* caspa */, AArch64::CASPAs, Convert__WSeqPair1_0__Tie0__WSeqPair1_1__Reg1_3, Feature_HasV8_1a, { MCK_WSeqPair, MCK_WSeqPair, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 209 /* caspa */, AArch64::CASPAd, Convert__XSeqPair1_0__Tie0__XSeqPair1_1__Reg1_3, Feature_HasV8_1a, { MCK_XSeqPair, MCK_XSeqPair, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 215 /* caspal */, AArch64::CASPALs, Convert__WSeqPair1_0__Tie0__WSeqPair1_1__Reg1_3, Feature_HasV8_1a, { MCK_WSeqPair, MCK_WSeqPair, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 215 /* caspal */, AArch64::CASPALd, Convert__XSeqPair1_0__Tie0__XSeqPair1_1__Reg1_3, Feature_HasV8_1a, { MCK_XSeqPair, MCK_XSeqPair, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 222 /* caspl */, AArch64::CASPLs, Convert__WSeqPair1_0__Tie0__WSeqPair1_1__Reg1_3, Feature_HasV8_1a, { MCK_WSeqPair, MCK_WSeqPair, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 222 /* caspl */, AArch64::CASPLd, Convert__XSeqPair1_0__Tie0__XSeqPair1_1__Reg1_3, Feature_HasV8_1a, { MCK_XSeqPair, MCK_XSeqPair, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 228 /* cbnz */, AArch64::CBNZW, Convert__Reg1_0__PCRelLabel191_1, 0, { MCK_GPR32, MCK_PCRelLabel19 }, }, + { 228 /* cbnz */, AArch64::CBNZX, Convert__Reg1_0__PCRelLabel191_1, 0, { MCK_GPR64, MCK_PCRelLabel19 }, }, + { 233 /* cbz */, AArch64::CBZW, Convert__Reg1_0__PCRelLabel191_1, 0, { MCK_GPR32, MCK_PCRelLabel19 }, }, + { 233 /* cbz */, AArch64::CBZX, Convert__Reg1_0__PCRelLabel191_1, 0, { MCK_GPR64, MCK_PCRelLabel19 }, }, + { 237 /* ccmn */, AArch64::CCMNWr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, 0, { MCK_GPR32, MCK_GPR32, MCK_Imm0_15, MCK_CondCode }, }, + { 237 /* ccmn */, AArch64::CCMNWi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, 0, { MCK_GPR32, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, }, + { 237 /* ccmn */, AArch64::CCMNXr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, 0, { MCK_GPR64, MCK_GPR64, MCK_Imm0_15, MCK_CondCode }, }, + { 237 /* ccmn */, AArch64::CCMNXi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, 0, { MCK_GPR64, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, }, + { 242 /* ccmp */, AArch64::CCMPWr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, 0, { MCK_GPR32, MCK_GPR32, MCK_Imm0_15, MCK_CondCode }, }, + { 242 /* ccmp */, AArch64::CCMPWi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, 0, { MCK_GPR32, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, }, + { 242 /* ccmp */, AArch64::CCMPXr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, 0, { MCK_GPR64, MCK_GPR64, MCK_Imm0_15, MCK_CondCode }, }, + { 242 /* ccmp */, AArch64::CCMPXi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, 0, { MCK_GPR64, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, }, + { 247 /* cinc */, AArch64::CSINCWr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_CondCode }, }, + { 247 /* cinc */, AArch64::CSINCXr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_CondCode }, }, + { 252 /* cinv */, AArch64::CSINVWr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_CondCode }, }, + { 252 /* cinv */, AArch64::CSINVXr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_CondCode }, }, + { 257 /* clrex */, AArch64::CLREX, Convert__imm_95_15, 0, { }, }, + { 257 /* clrex */, AArch64::CLREX, Convert__Imm0_151_0, 0, { MCK_Imm0_15 }, }, + { 263 /* cls */, AArch64::CLSWr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 263 /* cls */, AArch64::CLSXr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 263 /* cls */, AArch64::CLSv16i8, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 263 /* cls */, AArch64::CLSv2i32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 263 /* cls */, AArch64::CLSv4i16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 263 /* cls */, AArch64::CLSv4i32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 263 /* cls */, AArch64::CLSv8i8, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 263 /* cls */, AArch64::CLSv8i16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 267 /* clz */, AArch64::CLZWr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 267 /* clz */, AArch64::CLZXr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 267 /* clz */, AArch64::CLZv16i8, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 267 /* clz */, AArch64::CLZv2i32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 267 /* clz */, AArch64::CLZv4i16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 267 /* clz */, AArch64::CLZv4i32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 267 /* clz */, AArch64::CLZv8i8, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 267 /* clz */, AArch64::CLZv8i16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 271 /* cmeq */, AArch64::CMEQv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0 }, }, + { 271 /* cmeq */, AArch64::CMEQv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 271 /* cmeq */, AArch64::CMEQv16i8rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 271 /* cmeq */, AArch64::CMEQv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 271 /* cmeq */, AArch64::CMEQv2i64rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 271 /* cmeq */, AArch64::CMEQv2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 271 /* cmeq */, AArch64::CMEQv2i32rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 271 /* cmeq */, AArch64::CMEQv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 271 /* cmeq */, AArch64::CMEQv4i16rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 271 /* cmeq */, AArch64::CMEQv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 271 /* cmeq */, AArch64::CMEQv4i32rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 271 /* cmeq */, AArch64::CMEQv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 271 /* cmeq */, AArch64::CMEQv8i8rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 271 /* cmeq */, AArch64::CMEQv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 271 /* cmeq */, AArch64::CMEQv8i16rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 271 /* cmeq */, AArch64::CMEQv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 276 /* cmge */, AArch64::CMGEv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0 }, }, + { 276 /* cmge */, AArch64::CMGEv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 276 /* cmge */, AArch64::CMGEv16i8rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 276 /* cmge */, AArch64::CMGEv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 276 /* cmge */, AArch64::CMGEv2i64rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 276 /* cmge */, AArch64::CMGEv2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 276 /* cmge */, AArch64::CMGEv2i32rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 276 /* cmge */, AArch64::CMGEv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 276 /* cmge */, AArch64::CMGEv4i16rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 276 /* cmge */, AArch64::CMGEv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 276 /* cmge */, AArch64::CMGEv4i32rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 276 /* cmge */, AArch64::CMGEv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 276 /* cmge */, AArch64::CMGEv8i8rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 276 /* cmge */, AArch64::CMGEv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 276 /* cmge */, AArch64::CMGEv8i16rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 276 /* cmge */, AArch64::CMGEv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 281 /* cmgt */, AArch64::CMGTv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0 }, }, + { 281 /* cmgt */, AArch64::CMGTv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 281 /* cmgt */, AArch64::CMGTv16i8rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 281 /* cmgt */, AArch64::CMGTv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 281 /* cmgt */, AArch64::CMGTv2i64rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 281 /* cmgt */, AArch64::CMGTv2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 281 /* cmgt */, AArch64::CMGTv2i32rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 281 /* cmgt */, AArch64::CMGTv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 281 /* cmgt */, AArch64::CMGTv4i16rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 281 /* cmgt */, AArch64::CMGTv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 281 /* cmgt */, AArch64::CMGTv4i32rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 281 /* cmgt */, AArch64::CMGTv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 281 /* cmgt */, AArch64::CMGTv8i8rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 281 /* cmgt */, AArch64::CMGTv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 281 /* cmgt */, AArch64::CMGTv8i16rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 281 /* cmgt */, AArch64::CMGTv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 286 /* cmhi */, AArch64::CMHIv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 286 /* cmhi */, AArch64::CMHIv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 286 /* cmhi */, AArch64::CMHIv2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 286 /* cmhi */, AArch64::CMHIv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 286 /* cmhi */, AArch64::CMHIv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 286 /* cmhi */, AArch64::CMHIv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 286 /* cmhi */, AArch64::CMHIv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 286 /* cmhi */, AArch64::CMHIv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 291 /* cmhs */, AArch64::CMHSv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 291 /* cmhs */, AArch64::CMHSv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 291 /* cmhs */, AArch64::CMHSv2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 291 /* cmhs */, AArch64::CMHSv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 291 /* cmhs */, AArch64::CMHSv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 291 /* cmhs */, AArch64::CMHSv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 291 /* cmhs */, AArch64::CMHSv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 291 /* cmhs */, AArch64::CMHSv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 296 /* cmle */, AArch64::CMLEv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0 }, }, + { 296 /* cmle */, AArch64::CMGEv1i64, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 296 /* cmle */, AArch64::CMLEv16i8rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 296 /* cmle */, AArch64::CMGEv16i8, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 296 /* cmle */, AArch64::CMLEv2i64rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 296 /* cmle */, AArch64::CMGEv2i64, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 296 /* cmle */, AArch64::CMLEv2i32rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 296 /* cmle */, AArch64::CMGEv2i32, Convert__VectorReg641_1__VectorReg641_3__VectorReg641_2, 0, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 296 /* cmle */, AArch64::CMLEv4i16rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 296 /* cmle */, AArch64::CMGEv4i16, Convert__VectorReg641_1__VectorReg641_3__VectorReg641_2, 0, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 296 /* cmle */, AArch64::CMLEv4i32rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 296 /* cmle */, AArch64::CMGEv4i32, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 296 /* cmle */, AArch64::CMLEv8i8rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 296 /* cmle */, AArch64::CMGEv8i8, Convert__VectorReg641_1__VectorReg641_3__VectorReg641_2, 0, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 296 /* cmle */, AArch64::CMLEv8i16rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 296 /* cmle */, AArch64::CMGEv8i16, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 301 /* cmlo */, AArch64::CMHIv1i64, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 301 /* cmlo */, AArch64::CMHIv16i8, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 301 /* cmlo */, AArch64::CMHIv2i64, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 301 /* cmlo */, AArch64::CMHIv2i32, Convert__VectorReg641_1__VectorReg641_3__VectorReg641_2, 0, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 301 /* cmlo */, AArch64::CMHIv4i16, Convert__VectorReg641_1__VectorReg641_3__VectorReg641_2, 0, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 301 /* cmlo */, AArch64::CMHIv4i32, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 301 /* cmlo */, AArch64::CMHIv8i8, Convert__VectorReg641_1__VectorReg641_3__VectorReg641_2, 0, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 301 /* cmlo */, AArch64::CMHIv8i16, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 306 /* cmls */, AArch64::CMHSv1i64, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 306 /* cmls */, AArch64::CMHSv16i8, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 306 /* cmls */, AArch64::CMHSv2i64, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 306 /* cmls */, AArch64::CMHSv2i32, Convert__VectorReg641_1__VectorReg641_3__VectorReg641_2, 0, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 306 /* cmls */, AArch64::CMHSv4i16, Convert__VectorReg641_1__VectorReg641_3__VectorReg641_2, 0, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 306 /* cmls */, AArch64::CMHSv4i32, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 306 /* cmls */, AArch64::CMHSv8i8, Convert__VectorReg641_1__VectorReg641_3__VectorReg641_2, 0, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 306 /* cmls */, AArch64::CMHSv8i16, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 311 /* cmlt */, AArch64::CMLTv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0 }, }, + { 311 /* cmlt */, AArch64::CMGTv1i64, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 311 /* cmlt */, AArch64::CMLTv16i8rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 311 /* cmlt */, AArch64::CMGTv16i8, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 311 /* cmlt */, AArch64::CMLTv2i64rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 311 /* cmlt */, AArch64::CMGTv2i64, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 311 /* cmlt */, AArch64::CMLTv2i32rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 311 /* cmlt */, AArch64::CMGTv2i32, Convert__VectorReg641_1__VectorReg641_3__VectorReg641_2, 0, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 311 /* cmlt */, AArch64::CMLTv4i16rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 311 /* cmlt */, AArch64::CMGTv4i16, Convert__VectorReg641_1__VectorReg641_3__VectorReg641_2, 0, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 311 /* cmlt */, AArch64::CMLTv4i32rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 311 /* cmlt */, AArch64::CMGTv4i32, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 311 /* cmlt */, AArch64::CMLTv8i8rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 311 /* cmlt */, AArch64::CMGTv8i8, Convert__VectorReg641_1__VectorReg641_3__VectorReg641_2, 0, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 311 /* cmlt */, AArch64::CMLTv8i16rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 311 /* cmlt */, AArch64::CMGTv8i16, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 316 /* cmn */, AArch64::ADDSWrx, Convert__regWZR__Reg1_0__Reg1_1__imm_95_16, 0, { MCK_GPR32sponly, MCK_GPR32 }, }, + { 316 /* cmn */, AArch64::ADDSXrx64, Convert__regXZR__Reg1_0__Reg1_1__imm_95_24, 0, { MCK_GPR64sponly, MCK_GPR64 }, }, + { 316 /* cmn */, AArch64::ADDSWrs, Convert__regWZR__Reg1_0__Reg1_1__imm_95_0, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 316 /* cmn */, AArch64::SUBSWri, Convert__regWZR__Reg1_0__AddSubImmNeg2_1, 0, { MCK_GPR32sp, MCK_AddSubImmNeg }, }, + { 316 /* cmn */, AArch64::ADDSWri, Convert__regWZR__Reg1_0__AddSubImm2_1, 0, { MCK_GPR32sp, MCK_AddSubImm }, }, + { 316 /* cmn */, AArch64::ADDSXrs, Convert__regXZR__Reg1_0__Reg1_1__imm_95_0, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 316 /* cmn */, AArch64::SUBSXri, Convert__regXZR__Reg1_0__AddSubImmNeg2_1, 0, { MCK_GPR64sp, MCK_AddSubImmNeg }, }, + { 316 /* cmn */, AArch64::ADDSXri, Convert__regXZR__Reg1_0__AddSubImm2_1, 0, { MCK_GPR64sp, MCK_AddSubImm }, }, + { 316 /* cmn */, AArch64::ADDSWrs, Convert__regWZR__Reg1_0__Reg1_1__ArithmeticShifter321_2, 0, { MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, }, + { 316 /* cmn */, AArch64::ADDSWrx, Convert__regWZR__Reg1_0__Reg1_1__Extend1_2, 0, { MCK_GPR32sp, MCK_GPR32, MCK_Extend }, }, + { 316 /* cmn */, AArch64::ADDSXrs, Convert__regXZR__Reg1_0__Reg1_1__ArithmeticShifter641_2, 0, { MCK_GPR64, MCK_GPR64, MCK_ArithmeticShifter64 }, }, + { 316 /* cmn */, AArch64::ADDSXrx, Convert__regXZR__Reg1_0__Reg1_1__Extend1_2, 0, { MCK_GPR64sp, MCK_GPR32, MCK_Extend }, }, + { 316 /* cmn */, AArch64::ADDSXrx64, Convert__regXZR__Reg1_0__Reg1_1__ExtendLSL641_2, 0, { MCK_GPR64sp, MCK_GPR64, MCK_ExtendLSL64 }, }, + { 320 /* cmp */, AArch64::SUBSWrx, Convert__regWZR__Reg1_0__Reg1_1__imm_95_16, 0, { MCK_GPR32sponly, MCK_GPR32 }, }, + { 320 /* cmp */, AArch64::SUBSXrx64, Convert__regXZR__Reg1_0__Reg1_1__imm_95_24, 0, { MCK_GPR64sponly, MCK_GPR64 }, }, + { 320 /* cmp */, AArch64::SUBSWrs, Convert__regWZR__Reg1_0__Reg1_1__imm_95_0, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 320 /* cmp */, AArch64::ADDSWri, Convert__regWZR__Reg1_0__AddSubImmNeg2_1, 0, { MCK_GPR32sp, MCK_AddSubImmNeg }, }, + { 320 /* cmp */, AArch64::SUBSWri, Convert__regWZR__Reg1_0__AddSubImm2_1, 0, { MCK_GPR32sp, MCK_AddSubImm }, }, + { 320 /* cmp */, AArch64::SUBSXrs, Convert__regXZR__Reg1_0__Reg1_1__imm_95_0, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 320 /* cmp */, AArch64::ADDSXri, Convert__regXZR__Reg1_0__AddSubImmNeg2_1, 0, { MCK_GPR64sp, MCK_AddSubImmNeg }, }, + { 320 /* cmp */, AArch64::SUBSXri, Convert__regXZR__Reg1_0__AddSubImm2_1, 0, { MCK_GPR64sp, MCK_AddSubImm }, }, + { 320 /* cmp */, AArch64::SUBSWrs, Convert__regWZR__Reg1_0__Reg1_1__ArithmeticShifter321_2, 0, { MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, }, + { 320 /* cmp */, AArch64::SUBSWrx, Convert__regWZR__Reg1_0__Reg1_1__Extend1_2, 0, { MCK_GPR32sp, MCK_GPR32, MCK_Extend }, }, + { 320 /* cmp */, AArch64::SUBSXrs, Convert__regXZR__Reg1_0__Reg1_1__ArithmeticShifter641_2, 0, { MCK_GPR64, MCK_GPR64, MCK_ArithmeticShifter64 }, }, + { 320 /* cmp */, AArch64::SUBSXrx, Convert__regXZR__Reg1_0__Reg1_1__Extend1_2, 0, { MCK_GPR64sp, MCK_GPR32, MCK_Extend }, }, + { 320 /* cmp */, AArch64::SUBSXrx64, Convert__regXZR__Reg1_0__Reg1_1__ExtendLSL641_2, 0, { MCK_GPR64sp, MCK_GPR64, MCK_ExtendLSL64 }, }, + { 324 /* cmtst */, AArch64::CMTSTv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 324 /* cmtst */, AArch64::CMTSTv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 324 /* cmtst */, AArch64::CMTSTv2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 324 /* cmtst */, AArch64::CMTSTv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 324 /* cmtst */, AArch64::CMTSTv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 324 /* cmtst */, AArch64::CMTSTv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 324 /* cmtst */, AArch64::CMTSTv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 324 /* cmtst */, AArch64::CMTSTv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 330 /* cneg */, AArch64::CSNEGWr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_CondCode }, }, + { 330 /* cneg */, AArch64::CSNEGXr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_CondCode }, }, + { 335 /* cnt */, AArch64::CNTv16i8, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 335 /* cnt */, AArch64::CNTv8i8, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 339 /* crc32b */, AArch64::CRC32Brr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasCRC, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 346 /* crc32cb */, AArch64::CRC32CBrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasCRC, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 354 /* crc32ch */, AArch64::CRC32CHrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasCRC, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 362 /* crc32cw */, AArch64::CRC32CWrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasCRC, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 370 /* crc32cx */, AArch64::CRC32CXrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasCRC, { MCK_GPR32, MCK_GPR32, MCK_GPR64 }, }, + { 378 /* crc32h */, AArch64::CRC32Hrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasCRC, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 385 /* crc32w */, AArch64::CRC32Wrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasCRC, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 392 /* crc32x */, AArch64::CRC32Xrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasCRC, { MCK_GPR32, MCK_GPR32, MCK_GPR64 }, }, + { 399 /* csel */, AArch64::CSELWr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_CondCode }, }, + { 399 /* csel */, AArch64::CSELXr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_CondCode }, }, + { 404 /* cset */, AArch64::CSINCWr, Convert__Reg1_0__regWZR__regWZR__CondCode1_1, 0, { MCK_GPR32, MCK_CondCode }, }, + { 404 /* cset */, AArch64::CSINCXr, Convert__Reg1_0__regXZR__regXZR__CondCode1_1, 0, { MCK_GPR64, MCK_CondCode }, }, + { 409 /* csetm */, AArch64::CSINVWr, Convert__Reg1_0__regWZR__regWZR__CondCode1_1, 0, { MCK_GPR32, MCK_CondCode }, }, + { 409 /* csetm */, AArch64::CSINVXr, Convert__Reg1_0__regXZR__regXZR__CondCode1_1, 0, { MCK_GPR64, MCK_CondCode }, }, + { 415 /* csinc */, AArch64::CSINCWr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_CondCode }, }, + { 415 /* csinc */, AArch64::CSINCXr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_CondCode }, }, + { 421 /* csinv */, AArch64::CSINVWr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_CondCode }, }, + { 421 /* csinv */, AArch64::CSINVXr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_CondCode }, }, + { 427 /* csneg */, AArch64::CSNEGWr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_CondCode }, }, + { 427 /* csneg */, AArch64::CSNEGXr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_CondCode }, }, + { 433 /* dcps1 */, AArch64::DCPS1, Convert__imm_95_0, 0, { }, }, + { 433 /* dcps1 */, AArch64::DCPS1, Convert__Imm0_655351_0, 0, { MCK_Imm0_65535 }, }, + { 439 /* dcps2 */, AArch64::DCPS2, Convert__imm_95_0, 0, { }, }, + { 439 /* dcps2 */, AArch64::DCPS2, Convert__Imm0_655351_0, 0, { MCK_Imm0_65535 }, }, + { 445 /* dcps3 */, AArch64::DCPS3, Convert__imm_95_0, 0, { }, }, + { 445 /* dcps3 */, AArch64::DCPS3, Convert__Imm0_655351_0, 0, { MCK_Imm0_65535 }, }, + { 451 /* dmb */, AArch64::DMB, Convert__Barrier1_0, 0, { MCK_Barrier }, }, + { 455 /* drps */, AArch64::DRPS, Convert_NoOperands, 0, { }, }, + { 460 /* dsb */, AArch64::DSB, Convert__Barrier1_0, 0, { MCK_Barrier }, }, + { 464 /* dup */, AArch64::DUPv16i8gpr, Convert__VectorReg1281_1__Reg1_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_GPR32 }, }, + { 464 /* dup */, AArch64::DUPv2i64gpr, Convert__VectorReg1281_1__Reg1_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_GPR64 }, }, + { 464 /* dup */, AArch64::DUPv2i32gpr, Convert__VectorReg641_1__Reg1_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_GPR32 }, }, + { 464 /* dup */, AArch64::DUPv4i16gpr, Convert__VectorReg641_1__Reg1_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_GPR32 }, }, + { 464 /* dup */, AArch64::DUPv4i32gpr, Convert__VectorReg1281_1__Reg1_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_GPR32 }, }, + { 464 /* dup */, AArch64::DUPv8i8gpr, Convert__VectorReg641_1__Reg1_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_GPR32 }, }, + { 464 /* dup */, AArch64::DUPv8i16gpr, Convert__VectorReg1281_1__Reg1_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_GPR32 }, }, + { 464 /* dup */, AArch64::CPYi16, Convert__Reg1_0__VectorReg1281_1__VectorIndexH1_2, Feature_HasNEON, { MCK_FPR16, MCK_VectorReg128, MCK_VectorIndexH }, }, + { 464 /* dup */, AArch64::CPYi32, Convert__Reg1_0__VectorReg1281_1__VectorIndexS1_2, Feature_HasNEON, { MCK_FPR32, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 464 /* dup */, AArch64::CPYi64, Convert__Reg1_0__VectorReg1281_1__VectorIndexD1_2, Feature_HasNEON, { MCK_FPR64, MCK_VectorReg128, MCK_VectorIndexD }, }, + { 464 /* dup */, AArch64::CPYi8, Convert__Reg1_0__VectorReg1281_1__VectorIndexB1_2, Feature_HasNEON, { MCK_FPR8, MCK_VectorReg128, MCK_VectorIndexB }, }, + { 464 /* dup */, AArch64::DUPv16i8lane, Convert__VectorReg1281_1__VectorReg1281_2__VectorIndexB1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexB }, }, + { 464 /* dup */, AArch64::DUPv2i64lane, Convert__VectorReg1281_1__VectorReg1281_2__VectorIndexD1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexD }, }, + { 464 /* dup */, AArch64::DUPv2i32lane, Convert__VectorReg641_1__VectorReg1281_2__VectorIndexS1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 464 /* dup */, AArch64::DUPv4i16lane, Convert__VectorReg641_1__VectorReg1281_2__VectorIndexH1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorIndexH }, }, + { 464 /* dup */, AArch64::DUPv4i32lane, Convert__VectorReg1281_1__VectorReg1281_2__VectorIndexS1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 464 /* dup */, AArch64::DUPv8i8lane, Convert__VectorReg641_1__VectorReg1281_2__VectorIndexB1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorIndexB }, }, + { 464 /* dup */, AArch64::DUPv8i16lane, Convert__VectorReg1281_1__VectorReg1281_2__VectorIndexH1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexH }, }, + { 468 /* eon */, AArch64::EONWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 468 /* eon */, AArch64::EORWri, Convert__Reg1_0__Reg1_1__LogicalImm32Not1_2, 0, { MCK_GPR32sp, MCK_GPR32, MCK_LogicalImm32Not }, }, + { 468 /* eon */, AArch64::EONXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 468 /* eon */, AArch64::EORXri, Convert__Reg1_0__Reg1_1__LogicalImm64Not1_2, 0, { MCK_GPR64sp, MCK_GPR64, MCK_LogicalImm64Not }, }, + { 468 /* eon */, AArch64::EONWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, }, + { 468 /* eon */, AArch64::EONXrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, }, + { 472 /* eor */, AArch64::EORWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 472 /* eor */, AArch64::EORWri, Convert__Reg1_0__Reg1_1__LogicalImm321_2, 0, { MCK_GPR32sp, MCK_GPR32, MCK_LogicalImm32 }, }, + { 472 /* eor */, AArch64::EORXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 472 /* eor */, AArch64::EORXri, Convert__Reg1_0__Reg1_1__LogicalImm641_2, 0, { MCK_GPR64sp, MCK_GPR64, MCK_LogicalImm64 }, }, + { 472 /* eor */, AArch64::EORv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 472 /* eor */, AArch64::EORv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 472 /* eor */, AArch64::EORWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, }, + { 472 /* eor */, AArch64::EORXrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, }, + { 476 /* eret */, AArch64::ERET, Convert_NoOperands, 0, { }, }, + { 481 /* ext */, AArch64::EXTv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3__Imm1_4, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm }, }, + { 481 /* ext */, AArch64::EXTv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3__Imm1_4, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm }, }, + { 485 /* extr */, AArch64::EXTRWrri, Convert__Reg1_0__Reg1_1__Reg1_2__Imm0_311_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_Imm0_31 }, }, + { 485 /* extr */, AArch64::EXTRXrri, Convert__Reg1_0__Reg1_1__Reg1_2__Imm0_631_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_Imm0_63 }, }, + { 490 /* fabd */, AArch64::FABD16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 490 /* fabd */, AArch64::FABD32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 490 /* fabd */, AArch64::FABD64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 490 /* fabd */, AArch64::FABDv2f64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 490 /* fabd */, AArch64::FABDv2f32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 490 /* fabd */, AArch64::FABDv4f16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 490 /* fabd */, AArch64::FABDv4f32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 490 /* fabd */, AArch64::FABDv8f16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 495 /* fabs */, AArch64::FABSHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 495 /* fabs */, AArch64::FABSSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 495 /* fabs */, AArch64::FABSDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 495 /* fabs */, AArch64::FABSv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 495 /* fabs */, AArch64::FABSv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 495 /* fabs */, AArch64::FABSv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 495 /* fabs */, AArch64::FABSv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 495 /* fabs */, AArch64::FABSv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 500 /* facge */, AArch64::FACGE16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 500 /* facge */, AArch64::FACGE32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 500 /* facge */, AArch64::FACGE64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 500 /* facge */, AArch64::FACGEv2f64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 500 /* facge */, AArch64::FACGEv2f32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 500 /* facge */, AArch64::FACGEv4f16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 500 /* facge */, AArch64::FACGEv4f32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 500 /* facge */, AArch64::FACGEv8f16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 506 /* facgt */, AArch64::FACGT16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 506 /* facgt */, AArch64::FACGT32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 506 /* facgt */, AArch64::FACGT64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 506 /* facgt */, AArch64::FACGTv2f64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 506 /* facgt */, AArch64::FACGTv2f32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 506 /* facgt */, AArch64::FACGTv4f16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 506 /* facgt */, AArch64::FACGTv4f32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 506 /* facgt */, AArch64::FACGTv8f16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 512 /* facle */, AArch64::FACGE32, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 512 /* facle */, AArch64::FACGE64, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 512 /* facle */, AArch64::FACGEv2f64, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 512 /* facle */, AArch64::FACGEv2f32, Convert__VectorReg641_1__VectorReg641_3__VectorReg641_2, 0, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 512 /* facle */, AArch64::FACGEv4f16, Convert__VectorReg641_1__VectorReg641_3__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 512 /* facle */, AArch64::FACGEv4f32, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 512 /* facle */, AArch64::FACGEv8f16, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 518 /* faclt */, AArch64::FACGT32, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 518 /* faclt */, AArch64::FACGT64, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 518 /* faclt */, AArch64::FACGTv2f64, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 518 /* faclt */, AArch64::FACGTv2f32, Convert__VectorReg641_1__VectorReg641_3__VectorReg641_2, 0, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 518 /* faclt */, AArch64::FACGTv4f16, Convert__VectorReg641_1__VectorReg641_3__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 518 /* faclt */, AArch64::FACGTv4f32, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 518 /* faclt */, AArch64::FACGTv8f16, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 524 /* fadd */, AArch64::FADDHrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 524 /* fadd */, AArch64::FADDSrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 524 /* fadd */, AArch64::FADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 524 /* fadd */, AArch64::FADDv2f64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 524 /* fadd */, AArch64::FADDv2f32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 524 /* fadd */, AArch64::FADDv4f16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 524 /* fadd */, AArch64::FADDv4f32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 524 /* fadd */, AArch64::FADDv8f16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 529 /* faddp */, AArch64::FADDPv2i64p, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_FPR64, MCK_VectorReg128 }, }, + { 529 /* faddp */, AArch64::FADDPv2i16p, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_2h, MCK_FPR16, MCK_VectorReg64 }, }, + { 529 /* faddp */, AArch64::FADDPv2i32p, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_FPR32, MCK_VectorReg64 }, }, + { 529 /* faddp */, AArch64::FADDPv2f64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 529 /* faddp */, AArch64::FADDPv2f32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 529 /* faddp */, AArch64::FADDPv4f16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 529 /* faddp */, AArch64::FADDPv4f32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 529 /* faddp */, AArch64::FADDPv8f16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 535 /* fccmp */, AArch64::FCCMPHrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15, MCK_CondCode }, }, + { 535 /* fccmp */, AArch64::FCCMPSrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_Imm0_15, MCK_CondCode }, }, + { 535 /* fccmp */, AArch64::FCCMPDrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_Imm0_15, MCK_CondCode }, }, + { 541 /* fccmpe */, AArch64::FCCMPEHrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15, MCK_CondCode }, }, + { 541 /* fccmpe */, AArch64::FCCMPESrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_Imm0_15, MCK_CondCode }, }, + { 541 /* fccmpe */, AArch64::FCCMPEDrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_Imm0_15, MCK_CondCode }, }, + { 548 /* fcmeq */, AArch64::FCMEQv1i16rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQ16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv1i32rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQ32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQ64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv2i64rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv2f64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv2i32rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv2f32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv4i16rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv4f16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv4i32rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv4f32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv8i16rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv8f16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv1i16rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK__35_0, MCK__DOT_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv1i32rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK__35_0, MCK__DOT_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0, MCK__DOT_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv2i64rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0, MCK__DOT_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv2i32rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0, MCK__DOT_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv4i16rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0, MCK__DOT_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv4i32rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0, MCK__DOT_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv8i16rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0, MCK__DOT_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv2i64rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv4i32rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv8i16rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv2i32rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK__35_0 }, }, + { 548 /* fcmeq */, AArch64::FCMEQv4i16rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv1i16rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGE16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 554 /* fcmge */, AArch64::FCMGEv1i32rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGE32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 554 /* fcmge */, AArch64::FCMGEv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGE64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 554 /* fcmge */, AArch64::FCMGEv2i64rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv2f64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 554 /* fcmge */, AArch64::FCMGEv2i32rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv2f32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 554 /* fcmge */, AArch64::FCMGEv4i16rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv4f16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 554 /* fcmge */, AArch64::FCMGEv4i32rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv4f32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 554 /* fcmge */, AArch64::FCMGEv8i16rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv8f16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 554 /* fcmge */, AArch64::FCMGEv1i16rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK__35_0, MCK__DOT_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv1i32rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK__35_0, MCK__DOT_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0, MCK__DOT_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv2i64rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0, MCK__DOT_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv2i32rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0, MCK__DOT_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv4i16rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0, MCK__DOT_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv4i32rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0, MCK__DOT_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv8i16rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0, MCK__DOT_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv2i64rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv4i32rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv8i16rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv2i32rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK__35_0 }, }, + { 554 /* fcmge */, AArch64::FCMGEv4i16rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv1i16rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGT16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv1i32rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGT32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGT64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv2i64rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv2f64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv2i32rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv2f32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv4i16rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv4f16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv4i32rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv4f32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv8i16rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv8f16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv1i16rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK__35_0, MCK__DOT_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv1i32rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK__35_0, MCK__DOT_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0, MCK__DOT_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv2i64rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0, MCK__DOT_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv2i32rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0, MCK__DOT_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv4i16rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0, MCK__DOT_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv4i32rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0, MCK__DOT_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv8i16rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0, MCK__DOT_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv2i64rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv4i32rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv8i16rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv2i32rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK__35_0 }, }, + { 560 /* fcmgt */, AArch64::FCMGTv4i16rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv1i16rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv1i32rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMGE32, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 566 /* fcmle */, AArch64::FCMLEv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMGE64, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 566 /* fcmle */, AArch64::FCMLEv2i64rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMGEv2f64, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 566 /* fcmle */, AArch64::FCMLEv2i32rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMGEv2f32, Convert__VectorReg641_1__VectorReg641_3__VectorReg641_2, 0, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 566 /* fcmle */, AArch64::FCMLEv4i16rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMGEv4f16, Convert__VectorReg641_1__VectorReg641_3__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 566 /* fcmle */, AArch64::FCMLEv4i32rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMGEv4f32, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 566 /* fcmle */, AArch64::FCMLEv8i16rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMGEv8f16, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 566 /* fcmle */, AArch64::FCMLEv1i16rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK__35_0, MCK__DOT_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv1i32rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK__35_0, MCK__DOT_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0, MCK__DOT_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv2i64rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0, MCK__DOT_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv2i32rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0, MCK__DOT_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv4i16rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0, MCK__DOT_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv4i32rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0, MCK__DOT_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv8i16rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0, MCK__DOT_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv2i64rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv4i32rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv8i16rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv2i32rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK__35_0 }, }, + { 566 /* fcmle */, AArch64::FCMLEv4i16rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv1i16rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv1i32rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMGT32, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMGT64, Convert__Reg1_0__Reg1_2__Reg1_1, 0, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv2i64rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMGTv2f64, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv2i32rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMGTv2f32, Convert__VectorReg641_1__VectorReg641_3__VectorReg641_2, 0, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv4i16rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMGTv4f16, Convert__VectorReg641_1__VectorReg641_3__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv4i32rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMGTv4f32, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv8i16rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMGTv8f16, Convert__VectorReg1281_1__VectorReg1281_3__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv1i16rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK__35_0, MCK__DOT_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv1i32rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK__35_0, MCK__DOT_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv1i64rz, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK__35_0, MCK__DOT_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv2i64rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0, MCK__DOT_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv2i32rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0, MCK__DOT_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv4i16rz, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK__35_0, MCK__DOT_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv4i32rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0, MCK__DOT_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv8i16rz, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK__35_0, MCK__DOT_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv2i64rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_2d, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv4i32rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv8i16rz, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv2i32rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg64, MCK__DOT_2s, MCK__35_0 }, }, + { 572 /* fcmlt */, AArch64::FCMLTv4i16rz, Convert__VectorReg641_0__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK__35_0 }, }, + { 578 /* fcmp */, AArch64::FCMPHrr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 578 /* fcmp */, AArch64::FCMPSrr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 578 /* fcmp */, AArch64::FCMPDrr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 578 /* fcmp */, AArch64::FCMPHri, Convert__Reg1_0, Feature_HasFullFP16, { MCK_FPR16, MCK__35_0, MCK__DOT_0 }, }, + { 578 /* fcmp */, AArch64::FCMPSri, Convert__Reg1_0, Feature_HasFPARMv8, { MCK_FPR32, MCK__35_0, MCK__DOT_0 }, }, + { 578 /* fcmp */, AArch64::FCMPDri, Convert__Reg1_0, Feature_HasFPARMv8, { MCK_FPR64, MCK__35_0, MCK__DOT_0 }, }, + { 583 /* fcmpe */, AArch64::FCMPEHrr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 583 /* fcmpe */, AArch64::FCMPESrr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 583 /* fcmpe */, AArch64::FCMPEDrr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 583 /* fcmpe */, AArch64::FCMPEHri, Convert__Reg1_0, Feature_HasFullFP16, { MCK_FPR16, MCK__35_0, MCK__DOT_0 }, }, + { 583 /* fcmpe */, AArch64::FCMPESri, Convert__Reg1_0, Feature_HasFPARMv8, { MCK_FPR32, MCK__35_0, MCK__DOT_0 }, }, + { 583 /* fcmpe */, AArch64::FCMPEDri, Convert__Reg1_0, Feature_HasFPARMv8, { MCK_FPR64, MCK__35_0, MCK__DOT_0 }, }, + { 589 /* fcsel */, AArch64::FCSELHrrr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16, MCK_CondCode }, }, + { 589 /* fcsel */, AArch64::FCSELSrrr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_CondCode }, }, + { 589 /* fcsel */, AArch64::FCSELDrrr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_CondCode }, }, + { 595 /* fcvt */, AArch64::FCVTHSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR16, MCK_FPR32 }, }, + { 595 /* fcvt */, AArch64::FCVTHDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR16, MCK_FPR64 }, }, + { 595 /* fcvt */, AArch64::FCVTSHr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR16 }, }, + { 595 /* fcvt */, AArch64::FCVTSDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR64 }, }, + { 595 /* fcvt */, AArch64::FCVTDHr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR16 }, }, + { 595 /* fcvt */, AArch64::FCVTDSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR32 }, }, + { 600 /* fcvtas */, AArch64::FCVTASv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 600 /* fcvtas */, AArch64::FCVTASv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 600 /* fcvtas */, AArch64::FCVTASv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 600 /* fcvtas */, AArch64::FCVTASUWHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, }, + { 600 /* fcvtas */, AArch64::FCVTASUWSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32 }, }, + { 600 /* fcvtas */, AArch64::FCVTASUWDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64 }, }, + { 600 /* fcvtas */, AArch64::FCVTASUXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, }, + { 600 /* fcvtas */, AArch64::FCVTASUXSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32 }, }, + { 600 /* fcvtas */, AArch64::FCVTASUXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64 }, }, + { 600 /* fcvtas */, AArch64::FCVTASv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 600 /* fcvtas */, AArch64::FCVTASv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 600 /* fcvtas */, AArch64::FCVTASv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 600 /* fcvtas */, AArch64::FCVTASv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 600 /* fcvtas */, AArch64::FCVTASv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 607 /* fcvtau */, AArch64::FCVTAUv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 607 /* fcvtau */, AArch64::FCVTAUv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 607 /* fcvtau */, AArch64::FCVTAUv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 607 /* fcvtau */, AArch64::FCVTAUUWHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, }, + { 607 /* fcvtau */, AArch64::FCVTAUUWSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32 }, }, + { 607 /* fcvtau */, AArch64::FCVTAUUWDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64 }, }, + { 607 /* fcvtau */, AArch64::FCVTAUUXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, }, + { 607 /* fcvtau */, AArch64::FCVTAUUXSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32 }, }, + { 607 /* fcvtau */, AArch64::FCVTAUUXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64 }, }, + { 607 /* fcvtau */, AArch64::FCVTAUv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 607 /* fcvtau */, AArch64::FCVTAUv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 607 /* fcvtau */, AArch64::FCVTAUv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 607 /* fcvtau */, AArch64::FCVTAUv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 607 /* fcvtau */, AArch64::FCVTAUv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 614 /* fcvtl */, AArch64::FCVTLv2i32, Convert__VectorReg1281_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s }, }, + { 614 /* fcvtl */, AArch64::FCVTLv4i16, Convert__VectorReg1281_0__VectorReg641_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h }, }, + { 620 /* fcvtl2 */, AArch64::FCVTLv4i32, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s }, }, + { 620 /* fcvtl2 */, AArch64::FCVTLv8i16, Convert__VectorReg1281_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h }, }, + { 627 /* fcvtms */, AArch64::FCVTMSv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 627 /* fcvtms */, AArch64::FCVTMSv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 627 /* fcvtms */, AArch64::FCVTMSv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 627 /* fcvtms */, AArch64::FCVTMSUWHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, }, + { 627 /* fcvtms */, AArch64::FCVTMSUWSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32 }, }, + { 627 /* fcvtms */, AArch64::FCVTMSUWDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64 }, }, + { 627 /* fcvtms */, AArch64::FCVTMSUXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, }, + { 627 /* fcvtms */, AArch64::FCVTMSUXSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32 }, }, + { 627 /* fcvtms */, AArch64::FCVTMSUXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64 }, }, + { 627 /* fcvtms */, AArch64::FCVTMSv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 627 /* fcvtms */, AArch64::FCVTMSv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 627 /* fcvtms */, AArch64::FCVTMSv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 627 /* fcvtms */, AArch64::FCVTMSv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 627 /* fcvtms */, AArch64::FCVTMSv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUUWHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUUWSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32 }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUUWDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64 }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUUXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUUXSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32 }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUUXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64 }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 634 /* fcvtmu */, AArch64::FCVTMUv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 641 /* fcvtn */, AArch64::FCVTNv2i32, Convert__VectorReg641_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_2d }, }, + { 641 /* fcvtn */, AArch64::FCVTNv4i16, Convert__VectorReg641_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg128, MCK__DOT_4s }, }, + { 647 /* fcvtn2 */, AArch64::FCVTNv4i32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_2d }, }, + { 647 /* fcvtn2 */, AArch64::FCVTNv8i16, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_4s }, }, + { 654 /* fcvtns */, AArch64::FCVTNSv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 654 /* fcvtns */, AArch64::FCVTNSv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 654 /* fcvtns */, AArch64::FCVTNSv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 654 /* fcvtns */, AArch64::FCVTNSUWHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, }, + { 654 /* fcvtns */, AArch64::FCVTNSUWSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32 }, }, + { 654 /* fcvtns */, AArch64::FCVTNSUWDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64 }, }, + { 654 /* fcvtns */, AArch64::FCVTNSUXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, }, + { 654 /* fcvtns */, AArch64::FCVTNSUXSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32 }, }, + { 654 /* fcvtns */, AArch64::FCVTNSUXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64 }, }, + { 654 /* fcvtns */, AArch64::FCVTNSv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 654 /* fcvtns */, AArch64::FCVTNSv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 654 /* fcvtns */, AArch64::FCVTNSv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 654 /* fcvtns */, AArch64::FCVTNSv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 654 /* fcvtns */, AArch64::FCVTNSv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUUWHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUUWSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32 }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUUWDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64 }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUUXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUUXSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32 }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUUXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64 }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 661 /* fcvtnu */, AArch64::FCVTNUv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 668 /* fcvtps */, AArch64::FCVTPSv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 668 /* fcvtps */, AArch64::FCVTPSv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 668 /* fcvtps */, AArch64::FCVTPSv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 668 /* fcvtps */, AArch64::FCVTPSUWHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, }, + { 668 /* fcvtps */, AArch64::FCVTPSUWSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32 }, }, + { 668 /* fcvtps */, AArch64::FCVTPSUWDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64 }, }, + { 668 /* fcvtps */, AArch64::FCVTPSUXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, }, + { 668 /* fcvtps */, AArch64::FCVTPSUXSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32 }, }, + { 668 /* fcvtps */, AArch64::FCVTPSUXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64 }, }, + { 668 /* fcvtps */, AArch64::FCVTPSv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 668 /* fcvtps */, AArch64::FCVTPSv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 668 /* fcvtps */, AArch64::FCVTPSv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 668 /* fcvtps */, AArch64::FCVTPSv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 668 /* fcvtps */, AArch64::FCVTPSv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUUWHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUUWSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32 }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUUWDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64 }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUUXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUUXSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32 }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUUXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64 }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 675 /* fcvtpu */, AArch64::FCVTPUv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 682 /* fcvtxn */, AArch64::FCVTXNv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR64 }, }, + { 682 /* fcvtxn */, AArch64::FCVTXNv2f32, Convert__VectorReg641_0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_VectorReg128, MCK__DOT_2d }, }, + { 689 /* fcvtxn2 */, AArch64::FCVTXNv4f32, Convert__VectorReg1281_0__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_2d }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSUWHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSUWSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSUWDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSUXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSUXSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSUXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSh, Convert__Reg1_0__Reg1_1__Imm1_161_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm1_16 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSs, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_Imm1_32 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSd, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSSWHri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16, MCK_Imm1_32 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSSWSri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32, MCK_Imm1_32 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSSWDri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64, MCK_Imm1_32 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSSXHri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16, MCK_Imm1_64 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSSXSri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32, MCK_Imm1_64 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSSXDri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv2i64_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_64 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv2i32_shift, Convert__VectorReg641_1__VectorReg641_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_32 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv4i16_shift, Convert__VectorReg641_1__VectorReg641_2__Imm1_161_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_16 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv4i32_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 697 /* fcvtzs */, AArch64::FCVTZSv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_161_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUUWHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUUWSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUUWDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUUXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUUXSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUUXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUh, Convert__Reg1_0__Reg1_1__Imm1_161_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm1_16 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUs, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_Imm1_32 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUd, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUSWHri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16, MCK_Imm1_32 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUSWSri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32, MCK_Imm1_32 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUSWDri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR64, MCK_Imm1_32 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUSXHri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16, MCK_Imm1_64 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUSXSri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR32, MCK_Imm1_64 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUSXDri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv2i64_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_64 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv2i32_shift, Convert__VectorReg641_1__VectorReg641_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_32 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv4i16_shift, Convert__VectorReg641_1__VectorReg641_2__Imm1_161_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_16 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv4i32_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 704 /* fcvtzu */, AArch64::FCVTZUv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_161_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 711 /* fdiv */, AArch64::FDIVHrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 711 /* fdiv */, AArch64::FDIVSrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 711 /* fdiv */, AArch64::FDIVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 711 /* fdiv */, AArch64::FDIVv2f64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 711 /* fdiv */, AArch64::FDIVv2f32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 711 /* fdiv */, AArch64::FDIVv4f16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 711 /* fdiv */, AArch64::FDIVv4f32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 711 /* fdiv */, AArch64::FDIVv8f16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 716 /* fmadd */, AArch64::FMADDHrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 716 /* fmadd */, AArch64::FMADDSrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 716 /* fmadd */, AArch64::FMADDDrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 722 /* fmax */, AArch64::FMAXHrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 722 /* fmax */, AArch64::FMAXSrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 722 /* fmax */, AArch64::FMAXDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 722 /* fmax */, AArch64::FMAXv2f64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 722 /* fmax */, AArch64::FMAXv2f32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 722 /* fmax */, AArch64::FMAXv4f16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 722 /* fmax */, AArch64::FMAXv4f32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 722 /* fmax */, AArch64::FMAXv8f16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 727 /* fmaxnm */, AArch64::FMAXNMHrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 727 /* fmaxnm */, AArch64::FMAXNMSrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 727 /* fmaxnm */, AArch64::FMAXNMDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 727 /* fmaxnm */, AArch64::FMAXNMv2f64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 727 /* fmaxnm */, AArch64::FMAXNMv2f32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 727 /* fmaxnm */, AArch64::FMAXNMv4f16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 727 /* fmaxnm */, AArch64::FMAXNMv4f32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 727 /* fmaxnm */, AArch64::FMAXNMv8f16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 734 /* fmaxnmp */, AArch64::FMAXNMPv2i64p, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_FPR64, MCK_VectorReg128 }, }, + { 734 /* fmaxnmp */, AArch64::FMAXNMPv2i16p, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_2h, MCK_FPR16, MCK_VectorReg64 }, }, + { 734 /* fmaxnmp */, AArch64::FMAXNMPv2i32p, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_FPR32, MCK_VectorReg64 }, }, + { 734 /* fmaxnmp */, AArch64::FMAXNMPv2f64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 734 /* fmaxnmp */, AArch64::FMAXNMPv2f32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 734 /* fmaxnmp */, AArch64::FMAXNMPv4f16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 734 /* fmaxnmp */, AArch64::FMAXNMPv4f32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 734 /* fmaxnmp */, AArch64::FMAXNMPv8f16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 742 /* fmaxnmv */, AArch64::FMAXNMVv4i16v, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_FPR16, MCK_VectorReg64 }, }, + { 742 /* fmaxnmv */, AArch64::FMAXNMVv4i32v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_FPR32, MCK_VectorReg128 }, }, + { 742 /* fmaxnmv */, AArch64::FMAXNMVv8i16v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_FPR16, MCK_VectorReg128 }, }, + { 750 /* fmaxp */, AArch64::FMAXPv2i64p, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_FPR64, MCK_VectorReg128 }, }, + { 750 /* fmaxp */, AArch64::FMAXPv2i16p, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_2h, MCK_FPR16, MCK_VectorReg64 }, }, + { 750 /* fmaxp */, AArch64::FMAXPv2i32p, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_FPR32, MCK_VectorReg64 }, }, + { 750 /* fmaxp */, AArch64::FMAXPv2f64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 750 /* fmaxp */, AArch64::FMAXPv2f32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 750 /* fmaxp */, AArch64::FMAXPv4f16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 750 /* fmaxp */, AArch64::FMAXPv4f32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 750 /* fmaxp */, AArch64::FMAXPv8f16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 756 /* fmaxv */, AArch64::FMAXVv4i16v, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_FPR16, MCK_VectorReg64 }, }, + { 756 /* fmaxv */, AArch64::FMAXVv4i32v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_FPR32, MCK_VectorReg128 }, }, + { 756 /* fmaxv */, AArch64::FMAXVv8i16v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_FPR16, MCK_VectorReg128 }, }, + { 762 /* fmin */, AArch64::FMINHrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 762 /* fmin */, AArch64::FMINSrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 762 /* fmin */, AArch64::FMINDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 762 /* fmin */, AArch64::FMINv2f64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 762 /* fmin */, AArch64::FMINv2f32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 762 /* fmin */, AArch64::FMINv4f16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 762 /* fmin */, AArch64::FMINv4f32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 762 /* fmin */, AArch64::FMINv8f16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 767 /* fminnm */, AArch64::FMINNMHrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 767 /* fminnm */, AArch64::FMINNMSrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 767 /* fminnm */, AArch64::FMINNMDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 767 /* fminnm */, AArch64::FMINNMv2f64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 767 /* fminnm */, AArch64::FMINNMv2f32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 767 /* fminnm */, AArch64::FMINNMv4f16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 767 /* fminnm */, AArch64::FMINNMv4f32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 767 /* fminnm */, AArch64::FMINNMv8f16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 774 /* fminnmp */, AArch64::FMINNMPv2i64p, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_FPR64, MCK_VectorReg128 }, }, + { 774 /* fminnmp */, AArch64::FMINNMPv2i16p, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_2h, MCK_FPR16, MCK_VectorReg64 }, }, + { 774 /* fminnmp */, AArch64::FMINNMPv2i32p, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_FPR32, MCK_VectorReg64 }, }, + { 774 /* fminnmp */, AArch64::FMINNMPv2f64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 774 /* fminnmp */, AArch64::FMINNMPv2f32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 774 /* fminnmp */, AArch64::FMINNMPv4f16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 774 /* fminnmp */, AArch64::FMINNMPv4f32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 774 /* fminnmp */, AArch64::FMINNMPv8f16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 782 /* fminnmv */, AArch64::FMINNMVv4i16v, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_FPR16, MCK_VectorReg64 }, }, + { 782 /* fminnmv */, AArch64::FMINNMVv4i32v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_FPR32, MCK_VectorReg128 }, }, + { 782 /* fminnmv */, AArch64::FMINNMVv8i16v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_FPR16, MCK_VectorReg128 }, }, + { 790 /* fminp */, AArch64::FMINPv2i64p, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_FPR64, MCK_VectorReg128 }, }, + { 790 /* fminp */, AArch64::FMINPv2i16p, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_2h, MCK_FPR16, MCK_VectorReg64 }, }, + { 790 /* fminp */, AArch64::FMINPv2i32p, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_FPR32, MCK_VectorReg64 }, }, + { 790 /* fminp */, AArch64::FMINPv2f64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 790 /* fminp */, AArch64::FMINPv2f32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 790 /* fminp */, AArch64::FMINPv4f16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 790 /* fminp */, AArch64::FMINPv4f32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 790 /* fminp */, AArch64::FMINPv8f16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 796 /* fminv */, AArch64::FMINVv4i16v, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_FPR16, MCK_VectorReg64 }, }, + { 796 /* fminv */, AArch64::FMINVv4i32v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_FPR32, MCK_VectorReg128 }, }, + { 796 /* fminv */, AArch64::FMINVv8i16v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_FPR16, MCK_VectorReg128 }, }, + { 802 /* fmla */, AArch64::FMLAv2f64, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 802 /* fmla */, AArch64::FMLAv2f32, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 802 /* fmla */, AArch64::FMLAv4f16, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 802 /* fmla */, AArch64::FMLAv4f32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 802 /* fmla */, AArch64::FMLAv8f16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 802 /* fmla */, AArch64::FMLAv2i64_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3__VectorIndexD1_4, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexD }, }, + { 802 /* fmla */, AArch64::FMLAv2i32_indexed, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 802 /* fmla */, AArch64::FMLAv4i16_indexed, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 802 /* fmla */, AArch64::FMLAv4i32_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 802 /* fmla */, AArch64::FMLAv8i16_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 802 /* fmla */, AArch64::FMLAv1i64_indexed, Convert__Reg1_1__Tie0__Reg1_2__VectorReg1281_3__VectorIndexD1_4, Feature_HasNEON, { MCK__DOT_d, MCK_FPR64, MCK_FPR64, MCK_VectorReg128, MCK_VectorIndexD }, }, + { 802 /* fmla */, AArch64::FMLAv1i16_indexed, Convert__Reg1_1__Tie0__Reg1_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_h, MCK_FPR16, MCK_FPR16, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 802 /* fmla */, AArch64::FMLAv1i32_indexed, Convert__Reg1_1__Tie0__Reg1_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_s, MCK_FPR32, MCK_FPR32, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 807 /* fmls */, AArch64::FMLSv2f64, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 807 /* fmls */, AArch64::FMLSv2f32, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 807 /* fmls */, AArch64::FMLSv4f16, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 807 /* fmls */, AArch64::FMLSv4f32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 807 /* fmls */, AArch64::FMLSv8f16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 807 /* fmls */, AArch64::FMLSv2i64_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3__VectorIndexD1_4, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexD }, }, + { 807 /* fmls */, AArch64::FMLSv2i32_indexed, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 807 /* fmls */, AArch64::FMLSv4i16_indexed, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 807 /* fmls */, AArch64::FMLSv4i32_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 807 /* fmls */, AArch64::FMLSv8i16_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 807 /* fmls */, AArch64::FMLSv1i64_indexed, Convert__Reg1_1__Tie0__Reg1_2__VectorReg1281_3__VectorIndexD1_4, Feature_HasNEON, { MCK__DOT_d, MCK_FPR64, MCK_FPR64, MCK_VectorReg128, MCK_VectorIndexD }, }, + { 807 /* fmls */, AArch64::FMLSv1i16_indexed, Convert__Reg1_1__Tie0__Reg1_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_h, MCK_FPR16, MCK_FPR16, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 807 /* fmls */, AArch64::FMLSv1i32_indexed, Convert__Reg1_1__Tie0__Reg1_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_s, MCK_FPR32, MCK_FPR32, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 812 /* fmov */, AArch64::FMOVHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 812 /* fmov */, AArch64::FMOVWHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_GPR32 }, }, + { 812 /* fmov */, AArch64::FMOVXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_GPR64 }, }, + { 812 /* fmov */, AArch64::FMOVHi, Convert__Reg1_0__FPImm1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPImm }, }, + { 812 /* fmov */, AArch64::FMOVSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 812 /* fmov */, AArch64::FMOVWSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_GPR32 }, }, + { 812 /* fmov */, AArch64::FMOVSi, Convert__Reg1_0__FPImm1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPImm }, }, + { 812 /* fmov */, AArch64::FMOVDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 812 /* fmov */, AArch64::FMOVXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_GPR64 }, }, + { 812 /* fmov */, AArch64::FMOVDi, Convert__Reg1_0__FPImm1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPImm }, }, + { 812 /* fmov */, AArch64::FMOVHWr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR32, MCK_FPR16 }, }, + { 812 /* fmov */, AArch64::FMOVSWr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR32, MCK_FPR32 }, }, + { 812 /* fmov */, AArch64::FMOVHXr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_GPR64, MCK_FPR16 }, }, + { 812 /* fmov */, AArch64::FMOVDXr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_GPR64, MCK_FPR64 }, }, + { 812 /* fmov */, AArch64::FMOVv2f64_ns, Convert__VectorReg1281_1__FPImm1_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_FPImm }, }, + { 812 /* fmov */, AArch64::FMOVv2f32_ns, Convert__VectorReg641_1__FPImm1_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_FPImm }, }, + { 812 /* fmov */, AArch64::FMOVv4f16_ns, Convert__VectorReg641_1__FPImm1_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_FPImm }, }, + { 812 /* fmov */, AArch64::FMOVv4f32_ns, Convert__VectorReg1281_1__FPImm1_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_FPImm }, }, + { 812 /* fmov */, AArch64::FMOVv8f16_ns, Convert__VectorReg1281_1__FPImm1_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_FPImm }, }, + { 812 /* fmov */, AArch64::FMOVDXHighr, Convert__Reg1_1__VectorReg1281_2__VectorIndex11_3, Feature_HasFPARMv8, { MCK__DOT_d, MCK_GPR64, MCK_VectorReg128, MCK_VectorIndex1 }, }, + { 812 /* fmov */, AArch64::FMOVXDHighr, Convert__VectorReg1281_1__Reg1_3__VectorIndex11_2, Feature_HasFPARMv8, { MCK__DOT_d, MCK_VectorReg128, MCK_VectorIndex1, MCK_GPR64 }, }, + { 817 /* fmsub */, AArch64::FMSUBHrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 817 /* fmsub */, AArch64::FMSUBSrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 817 /* fmsub */, AArch64::FMSUBDrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 823 /* fmul */, AArch64::FMULHrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 823 /* fmul */, AArch64::FMULSrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 823 /* fmul */, AArch64::FMULDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 823 /* fmul */, AArch64::FMULv2f64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 823 /* fmul */, AArch64::FMULv2f32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 823 /* fmul */, AArch64::FMULv4f16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 823 /* fmul */, AArch64::FMULv4f32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 823 /* fmul */, AArch64::FMULv8f16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 823 /* fmul */, AArch64::FMULv2i64_indexed, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3__VectorIndexD1_4, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexD }, }, + { 823 /* fmul */, AArch64::FMULv2i32_indexed, Convert__VectorReg641_1__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 823 /* fmul */, AArch64::FMULv4i16_indexed, Convert__VectorReg641_1__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 823 /* fmul */, AArch64::FMULv4i32_indexed, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 823 /* fmul */, AArch64::FMULv8i16_indexed, Convert__VectorReg1281_1__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 823 /* fmul */, AArch64::FMULv1i64_indexed, Convert__Reg1_1__Reg1_2__VectorReg1281_3__VectorIndexD1_4, Feature_HasNEON, { MCK__DOT_d, MCK_FPR64, MCK_FPR64, MCK_VectorReg128, MCK_VectorIndexD }, }, + { 823 /* fmul */, AArch64::FMULv1i16_indexed, Convert__Reg1_1__Reg1_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_h, MCK_FPR16, MCK_FPR16, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 823 /* fmul */, AArch64::FMULv1i32_indexed, Convert__Reg1_1__Reg1_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_s, MCK_FPR32, MCK_FPR32, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 828 /* fmulx */, AArch64::FMULX16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 828 /* fmulx */, AArch64::FMULX32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 828 /* fmulx */, AArch64::FMULX64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 828 /* fmulx */, AArch64::FMULXv2f64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 828 /* fmulx */, AArch64::FMULXv2f32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 828 /* fmulx */, AArch64::FMULXv4f16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 828 /* fmulx */, AArch64::FMULXv4f32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 828 /* fmulx */, AArch64::FMULXv8f16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 828 /* fmulx */, AArch64::FMULXv2i64_indexed, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3__VectorIndexD1_4, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexD }, }, + { 828 /* fmulx */, AArch64::FMULXv2i32_indexed, Convert__VectorReg641_1__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 828 /* fmulx */, AArch64::FMULXv4i16_indexed, Convert__VectorReg641_1__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 828 /* fmulx */, AArch64::FMULXv4i32_indexed, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 828 /* fmulx */, AArch64::FMULXv8i16_indexed, Convert__VectorReg1281_1__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 828 /* fmulx */, AArch64::FMULXv1i64_indexed, Convert__Reg1_1__Reg1_2__VectorReg1281_3__VectorIndexD1_4, Feature_HasNEON, { MCK__DOT_d, MCK_FPR64, MCK_FPR64, MCK_VectorReg128, MCK_VectorIndexD }, }, + { 828 /* fmulx */, AArch64::FMULXv1i16_indexed, Convert__Reg1_1__Reg1_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_h, MCK_FPR16, MCK_FPR16, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 828 /* fmulx */, AArch64::FMULXv1i32_indexed, Convert__Reg1_1__Reg1_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_s, MCK_FPR32, MCK_FPR32, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 834 /* fneg */, AArch64::FNEGHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 834 /* fneg */, AArch64::FNEGSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 834 /* fneg */, AArch64::FNEGDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 834 /* fneg */, AArch64::FNEGv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 834 /* fneg */, AArch64::FNEGv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 834 /* fneg */, AArch64::FNEGv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 834 /* fneg */, AArch64::FNEGv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 834 /* fneg */, AArch64::FNEGv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 839 /* fnmadd */, AArch64::FNMADDHrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 839 /* fnmadd */, AArch64::FNMADDSrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 839 /* fnmadd */, AArch64::FNMADDDrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 846 /* fnmsub */, AArch64::FNMSUBHrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 846 /* fnmsub */, AArch64::FNMSUBSrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 846 /* fnmsub */, AArch64::FNMSUBDrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 853 /* fnmul */, AArch64::FNMULHrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 853 /* fnmul */, AArch64::FNMULSrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 853 /* fnmul */, AArch64::FNMULDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 859 /* frecpe */, AArch64::FRECPEv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 859 /* frecpe */, AArch64::FRECPEv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 859 /* frecpe */, AArch64::FRECPEv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 859 /* frecpe */, AArch64::FRECPEv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 859 /* frecpe */, AArch64::FRECPEv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 859 /* frecpe */, AArch64::FRECPEv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 859 /* frecpe */, AArch64::FRECPEv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 859 /* frecpe */, AArch64::FRECPEv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 866 /* frecps */, AArch64::FRECPS16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 866 /* frecps */, AArch64::FRECPS32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 866 /* frecps */, AArch64::FRECPS64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 866 /* frecps */, AArch64::FRECPSv2f64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 866 /* frecps */, AArch64::FRECPSv2f32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 866 /* frecps */, AArch64::FRECPSv4f16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 866 /* frecps */, AArch64::FRECPSv4f32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 866 /* frecps */, AArch64::FRECPSv8f16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 873 /* frecpx */, AArch64::FRECPXv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 873 /* frecpx */, AArch64::FRECPXv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 873 /* frecpx */, AArch64::FRECPXv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 880 /* frinta */, AArch64::FRINTAHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 880 /* frinta */, AArch64::FRINTASr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 880 /* frinta */, AArch64::FRINTADr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 880 /* frinta */, AArch64::FRINTAv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 880 /* frinta */, AArch64::FRINTAv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 880 /* frinta */, AArch64::FRINTAv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 880 /* frinta */, AArch64::FRINTAv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 880 /* frinta */, AArch64::FRINTAv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 887 /* frinti */, AArch64::FRINTIHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 887 /* frinti */, AArch64::FRINTISr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 887 /* frinti */, AArch64::FRINTIDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 887 /* frinti */, AArch64::FRINTIv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 887 /* frinti */, AArch64::FRINTIv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 887 /* frinti */, AArch64::FRINTIv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 887 /* frinti */, AArch64::FRINTIv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 887 /* frinti */, AArch64::FRINTIv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 894 /* frintm */, AArch64::FRINTMHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 894 /* frintm */, AArch64::FRINTMSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 894 /* frintm */, AArch64::FRINTMDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 894 /* frintm */, AArch64::FRINTMv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 894 /* frintm */, AArch64::FRINTMv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 894 /* frintm */, AArch64::FRINTMv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 894 /* frintm */, AArch64::FRINTMv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 894 /* frintm */, AArch64::FRINTMv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 901 /* frintn */, AArch64::FRINTNHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 901 /* frintn */, AArch64::FRINTNSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 901 /* frintn */, AArch64::FRINTNDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 901 /* frintn */, AArch64::FRINTNv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 901 /* frintn */, AArch64::FRINTNv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 901 /* frintn */, AArch64::FRINTNv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 901 /* frintn */, AArch64::FRINTNv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 901 /* frintn */, AArch64::FRINTNv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 908 /* frintp */, AArch64::FRINTPHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 908 /* frintp */, AArch64::FRINTPSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 908 /* frintp */, AArch64::FRINTPDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 908 /* frintp */, AArch64::FRINTPv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 908 /* frintp */, AArch64::FRINTPv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 908 /* frintp */, AArch64::FRINTPv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 908 /* frintp */, AArch64::FRINTPv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 908 /* frintp */, AArch64::FRINTPv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 915 /* frintx */, AArch64::FRINTXHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 915 /* frintx */, AArch64::FRINTXSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 915 /* frintx */, AArch64::FRINTXDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 915 /* frintx */, AArch64::FRINTXv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 915 /* frintx */, AArch64::FRINTXv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 915 /* frintx */, AArch64::FRINTXv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 915 /* frintx */, AArch64::FRINTXv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 915 /* frintx */, AArch64::FRINTXv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 922 /* frintz */, AArch64::FRINTZHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 922 /* frintz */, AArch64::FRINTZSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 922 /* frintz */, AArch64::FRINTZDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 922 /* frintz */, AArch64::FRINTZv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 922 /* frintz */, AArch64::FRINTZv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 922 /* frintz */, AArch64::FRINTZv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 922 /* frintz */, AArch64::FRINTZv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 922 /* frintz */, AArch64::FRINTZv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 929 /* frsqrte */, AArch64::FRSQRTEv1f16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 929 /* frsqrte */, AArch64::FRSQRTEv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 929 /* frsqrte */, AArch64::FRSQRTEv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 929 /* frsqrte */, AArch64::FRSQRTEv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 929 /* frsqrte */, AArch64::FRSQRTEv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 929 /* frsqrte */, AArch64::FRSQRTEv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 929 /* frsqrte */, AArch64::FRSQRTEv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 929 /* frsqrte */, AArch64::FRSQRTEv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 937 /* frsqrts */, AArch64::FRSQRTS16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 937 /* frsqrts */, AArch64::FRSQRTS32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 937 /* frsqrts */, AArch64::FRSQRTS64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 937 /* frsqrts */, AArch64::FRSQRTSv2f64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 937 /* frsqrts */, AArch64::FRSQRTSv2f32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 937 /* frsqrts */, AArch64::FRSQRTSv4f16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 937 /* frsqrts */, AArch64::FRSQRTSv4f32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 937 /* frsqrts */, AArch64::FRSQRTSv8f16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 945 /* fsqrt */, AArch64::FSQRTHr, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 945 /* fsqrt */, AArch64::FSQRTSr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32 }, }, + { 945 /* fsqrt */, AArch64::FSQRTDr, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64 }, }, + { 945 /* fsqrt */, AArch64::FSQRTv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 945 /* fsqrt */, AArch64::FSQRTv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 945 /* fsqrt */, AArch64::FSQRTv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 945 /* fsqrt */, AArch64::FSQRTv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 945 /* fsqrt */, AArch64::FSQRTv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 951 /* fsub */, AArch64::FSUBHrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 951 /* fsub */, AArch64::FSUBSrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 951 /* fsub */, AArch64::FSUBDrr, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 951 /* fsub */, AArch64::FSUBv2f64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 951 /* fsub */, AArch64::FSUBv2f32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 951 /* fsub */, AArch64::FSUBv4f16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 951 /* fsub */, AArch64::FSUBv4f32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 951 /* fsub */, AArch64::FSUBv8f16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 956 /* hint */, AArch64::HINT, Convert__Imm0_1271_0, 0, { MCK_Imm0_127 }, }, + { 961 /* hlt */, AArch64::HLT, Convert__Imm0_655351_0, 0, { MCK_Imm0_65535 }, }, + { 965 /* hvc */, AArch64::HVC, Convert__Imm0_655351_0, 0, { MCK_Imm0_65535 }, }, + { 969 /* ins */, AArch64::INSvi8gpr, Convert__VectorReg1281_1__Tie0__VectorIndexB1_2__Reg1_3, Feature_HasNEON, { MCK__DOT_b, MCK_VectorReg128, MCK_VectorIndexB, MCK_GPR32 }, }, + { 969 /* ins */, AArch64::INSvi64gpr, Convert__VectorReg1281_1__Tie0__VectorIndexD1_2__Reg1_3, Feature_HasNEON, { MCK__DOT_d, MCK_VectorReg128, MCK_VectorIndexD, MCK_GPR64 }, }, + { 969 /* ins */, AArch64::INSvi16gpr, Convert__VectorReg1281_1__Tie0__VectorIndexH1_2__Reg1_3, Feature_HasNEON, { MCK__DOT_h, MCK_VectorReg128, MCK_VectorIndexH, MCK_GPR32 }, }, + { 969 /* ins */, AArch64::INSvi32gpr, Convert__VectorReg1281_1__Tie0__VectorIndexS1_2__Reg1_3, Feature_HasNEON, { MCK__DOT_s, MCK_VectorReg128, MCK_VectorIndexS, MCK_GPR32 }, }, + { 969 /* ins */, AArch64::INSvi8lane, Convert__VectorReg1281_1__Tie0__VectorIndexB1_2__VectorReg1281_3__VectorIndexB1_4, Feature_HasNEON, { MCK__DOT_b, MCK_VectorReg128, MCK_VectorIndexB, MCK_VectorReg128, MCK_VectorIndexB }, }, + { 969 /* ins */, AArch64::INSvi64lane, Convert__VectorReg1281_1__Tie0__VectorIndexD1_2__VectorReg1281_3__VectorIndexD1_4, Feature_HasNEON, { MCK__DOT_d, MCK_VectorReg128, MCK_VectorIndexD, MCK_VectorReg128, MCK_VectorIndexD }, }, + { 969 /* ins */, AArch64::INSvi16lane, Convert__VectorReg1281_1__Tie0__VectorIndexH1_2__VectorReg1281_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_h, MCK_VectorReg128, MCK_VectorIndexH, MCK_VectorReg128, MCK_VectorIndexH }, }, + { 969 /* ins */, AArch64::INSvi32lane, Convert__VectorReg1281_1__Tie0__VectorIndexS1_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_s, MCK_VectorReg128, MCK_VectorIndexS, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 973 /* isb */, AArch64::ISB, Convert__imm_95_15, 0, { }, }, + { 973 /* isb */, AArch64::ISB, Convert__Barrier1_0, 0, { MCK_Barrier }, }, + { 977 /* ld1 */, AArch64::LD1Fourv16b, Convert__TypedVectorList4_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv1d, Convert__TypedVectorList4_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2d, Convert__TypedVectorList4_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2s, Convert__TypedVectorList4_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4h, Convert__TypedVectorList4_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4s, Convert__TypedVectorList4_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8b, Convert__TypedVectorList4_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8h, Convert__TypedVectorList4_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev16b, Convert__TypedVectorList1_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev1d, Convert__TypedVectorList1_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev2d, Convert__TypedVectorList1_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev2s, Convert__TypedVectorList1_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev4h, Convert__TypedVectorList1_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev4s, Convert__TypedVectorList1_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev8b, Convert__TypedVectorList1_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev8h, Convert__TypedVectorList1_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev16b, Convert__TypedVectorList3_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev1d, Convert__TypedVectorList3_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev2d, Convert__TypedVectorList3_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev2s, Convert__TypedVectorList3_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev4h, Convert__TypedVectorList3_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev4s, Convert__TypedVectorList3_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev8b, Convert__TypedVectorList3_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev8h, Convert__TypedVectorList3_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov16b, Convert__TypedVectorList2_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov1d, Convert__TypedVectorList2_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov2d, Convert__TypedVectorList2_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov2s, Convert__TypedVectorList2_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov4h, Convert__TypedVectorList2_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov4s, Convert__TypedVectorList2_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov8b, Convert__TypedVectorList2_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov8h, Convert__TypedVectorList2_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv16b, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev16b, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev16b, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov16b, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv1d, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev1d, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev1d, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov1d, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2d, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev2d, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev2d, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov2d, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2s, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev2s, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev2s, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov2s, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4h, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev4h, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev4h, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov4h, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4s, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev4s, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev4s, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov4s, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8b, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev8b, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev8b, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov8b, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8h, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Onev8h, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev8h, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Twov8h, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Fourv16b_POST, Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv16b_POST, Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv1d_POST, Convert__Reg1_2__TypedVectorList4_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv1d_POST, Convert__Reg1_2__TypedVectorList4_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2d_POST, Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2d_POST, Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2s_POST, Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2s_POST, Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4h_POST, Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4h_POST, Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8b_POST, Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8b_POST, Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8h_POST, Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8h_POST, Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev16b_POST, Convert__Reg1_2__TypedVectorList1_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Onev16b_POST, Convert__Reg1_2__TypedVectorList1_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev1d_POST, Convert__Reg1_2__TypedVectorList1_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 977 /* ld1 */, AArch64::LD1Onev1d_POST, Convert__Reg1_2__TypedVectorList1_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev2d_POST, Convert__Reg1_2__TypedVectorList1_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Onev2d_POST, Convert__Reg1_2__TypedVectorList1_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev2s_POST, Convert__Reg1_2__TypedVectorList1_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 977 /* ld1 */, AArch64::LD1Onev2s_POST, Convert__Reg1_2__TypedVectorList1_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev4h_POST, Convert__Reg1_2__TypedVectorList1_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 977 /* ld1 */, AArch64::LD1Onev4h_POST, Convert__Reg1_2__TypedVectorList1_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev4s_POST, Convert__Reg1_2__TypedVectorList1_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Onev4s_POST, Convert__Reg1_2__TypedVectorList1_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev8b_POST, Convert__Reg1_2__TypedVectorList1_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 977 /* ld1 */, AArch64::LD1Onev8b_POST, Convert__Reg1_2__TypedVectorList1_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev8h_POST, Convert__Reg1_2__TypedVectorList1_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Onev8h_POST, Convert__Reg1_2__TypedVectorList1_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1i8, Convert__TypedVectorList1_0b1_0__Tie0__VectorIndexB1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList1_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1i64, Convert__TypedVectorList1_0d1_0__Tie0__VectorIndexD1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList1_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1i16, Convert__TypedVectorList1_0h1_0__Tie0__VectorIndexH1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList1_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1i32, Convert__TypedVectorList1_0s1_0__Tie0__VectorIndexS1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList1_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1Threev16b_POST, Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 977 /* ld1 */, AArch64::LD1Threev16b_POST, Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev1d_POST, Convert__Reg1_2__TypedVectorList3_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 977 /* ld1 */, AArch64::LD1Threev1d_POST, Convert__Reg1_2__TypedVectorList3_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 977 /* ld1 */, AArch64::LD1Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 977 /* ld1 */, AArch64::LD1Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 977 /* ld1 */, AArch64::LD1Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 977 /* ld1 */, AArch64::LD1Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev8b_POST, Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 977 /* ld1 */, AArch64::LD1Threev8b_POST, Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev8h_POST, Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 977 /* ld1 */, AArch64::LD1Threev8h_POST, Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov16b_POST, Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Twov16b_POST, Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov1d_POST, Convert__Reg1_2__TypedVectorList2_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Twov1d_POST, Convert__Reg1_2__TypedVectorList2_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov2s_POST, Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Twov2s_POST, Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov4h_POST, Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Twov4h_POST, Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov4s_POST, Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Twov4s_POST, Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov8b_POST, Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Twov8b_POST, Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov8h_POST, Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Twov8h_POST, Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv16b_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv16b_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev16b_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Onev16b_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 977 /* ld1 */, AArch64::LD1Threev16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Twov16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv1d_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv1d_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev1d_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 977 /* ld1 */, AArch64::LD1Onev1d_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev1d_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 977 /* ld1 */, AArch64::LD1Threev1d_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov1d_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Twov1d_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev2d_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Onev2d_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev2d_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 977 /* ld1 */, AArch64::LD1Threev2d_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov2d_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Twov2d_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev2s_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 977 /* ld1 */, AArch64::LD1Onev2s_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 977 /* ld1 */, AArch64::LD1Threev2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Twov2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev4h_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 977 /* ld1 */, AArch64::LD1Onev4h_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev4h_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 977 /* ld1 */, AArch64::LD1Threev4h_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov4h_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Twov4h_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev4s_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Onev4s_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 977 /* ld1 */, AArch64::LD1Threev4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov4s_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Twov4s_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev8b_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 977 /* ld1 */, AArch64::LD1Onev8b_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev8b_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 977 /* ld1 */, AArch64::LD1Threev8b_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Twov8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 977 /* ld1 */, AArch64::LD1Fourv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Onev8h_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 977 /* ld1 */, AArch64::LD1Onev8h_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Threev8h_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 977 /* ld1 */, AArch64::LD1Threev8h_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1Twov8h_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 977 /* ld1 */, AArch64::LD1Twov8h_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1i8, Convert__VecListOne1281_1__Tie0__VectorIndexB1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_b, MCK_VecListOne128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1i64, Convert__VecListOne1281_1__Tie0__VectorIndexD1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_d, MCK_VecListOne128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1i16, Convert__VecListOne1281_1__Tie0__VectorIndexH1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_h, MCK_VecListOne128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1i32, Convert__VecListOne1281_1__Tie0__VectorIndexS1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_s, MCK_VecListOne128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 977 /* ld1 */, AArch64::LD1i8_POST, Convert__Reg1_3__TypedVectorList1_0b1_0__Tie1__VectorIndexB1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_1 }, }, + { 977 /* ld1 */, AArch64::LD1i8_POST, Convert__Reg1_3__TypedVectorList1_0b1_0__Tie1__VectorIndexB1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList1_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1i64_POST, Convert__Reg1_3__TypedVectorList1_0d1_0__Tie1__VectorIndexD1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 977 /* ld1 */, AArch64::LD1i64_POST, Convert__Reg1_3__TypedVectorList1_0d1_0__Tie1__VectorIndexD1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList1_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1i16_POST, Convert__Reg1_3__TypedVectorList1_0h1_0__Tie1__VectorIndexH1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 977 /* ld1 */, AArch64::LD1i16_POST, Convert__Reg1_3__TypedVectorList1_0h1_0__Tie1__VectorIndexH1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList1_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1i32_POST, Convert__Reg1_3__TypedVectorList1_0s1_0__Tie1__VectorIndexS1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 977 /* ld1 */, AArch64::LD1i32_POST, Convert__Reg1_3__TypedVectorList1_0s1_0__Tie1__VectorIndexS1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList1_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1i8_POST, Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexB1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_b, MCK_VecListOne128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_1 }, }, + { 977 /* ld1 */, AArch64::LD1i8_POST, Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexB1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_b, MCK_VecListOne128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1i64_POST, Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexD1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_d, MCK_VecListOne128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 977 /* ld1 */, AArch64::LD1i64_POST, Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexD1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_d, MCK_VecListOne128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1i16_POST, Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexH1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_h, MCK_VecListOne128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 977 /* ld1 */, AArch64::LD1i16_POST, Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexH1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_h, MCK_VecListOne128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 977 /* ld1 */, AArch64::LD1i32_POST, Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexS1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_s, MCK_VecListOne128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 977 /* ld1 */, AArch64::LD1i32_POST, Convert__Reg1_4__VecListOne1281_1__Tie1__VectorIndexS1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_s, MCK_VecListOne128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv16b, Convert__TypedVectorList1_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv1d, Convert__TypedVectorList1_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv2d, Convert__TypedVectorList1_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv2s, Convert__TypedVectorList1_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv4h, Convert__TypedVectorList1_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv4s, Convert__TypedVectorList1_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv8b, Convert__TypedVectorList1_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv8h, Convert__TypedVectorList1_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv16b, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv1d, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv2d, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv2s, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv4h, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv4s, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv8b, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv8h, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 981 /* ld1r */, AArch64::LD1Rv16b_POST, Convert__Reg1_2__TypedVectorList1_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_1 }, }, + { 981 /* ld1r */, AArch64::LD1Rv16b_POST, Convert__Reg1_2__TypedVectorList1_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv1d_POST, Convert__Reg1_2__TypedVectorList1_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 981 /* ld1r */, AArch64::LD1Rv1d_POST, Convert__Reg1_2__TypedVectorList1_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv2d_POST, Convert__Reg1_2__TypedVectorList1_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 981 /* ld1r */, AArch64::LD1Rv2d_POST, Convert__Reg1_2__TypedVectorList1_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv2s_POST, Convert__Reg1_2__TypedVectorList1_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 981 /* ld1r */, AArch64::LD1Rv2s_POST, Convert__Reg1_2__TypedVectorList1_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv4h_POST, Convert__Reg1_2__TypedVectorList1_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 981 /* ld1r */, AArch64::LD1Rv4h_POST, Convert__Reg1_2__TypedVectorList1_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv4s_POST, Convert__Reg1_2__TypedVectorList1_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 981 /* ld1r */, AArch64::LD1Rv4s_POST, Convert__Reg1_2__TypedVectorList1_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv8b_POST, Convert__Reg1_2__TypedVectorList1_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_1 }, }, + { 981 /* ld1r */, AArch64::LD1Rv8b_POST, Convert__Reg1_2__TypedVectorList1_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv8h_POST, Convert__Reg1_2__TypedVectorList1_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 981 /* ld1r */, AArch64::LD1Rv8h_POST, Convert__Reg1_2__TypedVectorList1_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv16b_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_1 }, }, + { 981 /* ld1r */, AArch64::LD1Rv16b_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv1d_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 981 /* ld1r */, AArch64::LD1Rv1d_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv2d_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 981 /* ld1r */, AArch64::LD1Rv2d_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv2s_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 981 /* ld1r */, AArch64::LD1Rv2s_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv4h_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 981 /* ld1r */, AArch64::LD1Rv4h_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv4s_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 981 /* ld1r */, AArch64::LD1Rv4s_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv8b_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_1 }, }, + { 981 /* ld1r */, AArch64::LD1Rv8b_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 981 /* ld1r */, AArch64::LD1Rv8h_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 981 /* ld1r */, AArch64::LD1Rv8h_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov16b, Convert__TypedVectorList2_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov2d, Convert__TypedVectorList2_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov2s, Convert__TypedVectorList2_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov4h, Convert__TypedVectorList2_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov4s, Convert__TypedVectorList2_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov8b, Convert__TypedVectorList2_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov8h, Convert__TypedVectorList2_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov16b, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov2d, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov2s, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov4h, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov4s, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov8b, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov8h, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov16b_POST, Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 986 /* ld2 */, AArch64::LD2Twov16b_POST, Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 986 /* ld2 */, AArch64::LD2Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov2s_POST, Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 986 /* ld2 */, AArch64::LD2Twov2s_POST, Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov4h_POST, Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 986 /* ld2 */, AArch64::LD2Twov4h_POST, Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov4s_POST, Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 986 /* ld2 */, AArch64::LD2Twov4s_POST, Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov8b_POST, Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 986 /* ld2 */, AArch64::LD2Twov8b_POST, Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov8h_POST, Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 986 /* ld2 */, AArch64::LD2Twov8h_POST, Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2i8, Convert__TypedVectorList2_0b1_0__Tie0__VectorIndexB1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList2_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2i64, Convert__TypedVectorList2_0d1_0__Tie0__VectorIndexD1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList2_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2i16, Convert__TypedVectorList2_0h1_0__Tie0__VectorIndexH1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList2_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2i32, Convert__TypedVectorList2_0s1_0__Tie0__VectorIndexS1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList2_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2Twov16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 986 /* ld2 */, AArch64::LD2Twov16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov2d_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 986 /* ld2 */, AArch64::LD2Twov2d_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 986 /* ld2 */, AArch64::LD2Twov2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov4h_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 986 /* ld2 */, AArch64::LD2Twov4h_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov4s_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 986 /* ld2 */, AArch64::LD2Twov4s_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 986 /* ld2 */, AArch64::LD2Twov8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2Twov8h_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 986 /* ld2 */, AArch64::LD2Twov8h_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2i8, Convert__VecListTwo1281_1__Tie0__VectorIndexB1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_b, MCK_VecListTwo128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2i64, Convert__VecListTwo1281_1__Tie0__VectorIndexD1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_d, MCK_VecListTwo128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2i16, Convert__VecListTwo1281_1__Tie0__VectorIndexH1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_h, MCK_VecListTwo128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2i32, Convert__VecListTwo1281_1__Tie0__VectorIndexS1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_s, MCK_VecListTwo128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 986 /* ld2 */, AArch64::LD2i8_POST, Convert__Reg1_3__TypedVectorList2_0b1_0__Tie1__VectorIndexB1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 986 /* ld2 */, AArch64::LD2i8_POST, Convert__Reg1_3__TypedVectorList2_0b1_0__Tie1__VectorIndexB1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList2_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2i64_POST, Convert__Reg1_3__TypedVectorList2_0d1_0__Tie1__VectorIndexD1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 986 /* ld2 */, AArch64::LD2i64_POST, Convert__Reg1_3__TypedVectorList2_0d1_0__Tie1__VectorIndexD1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList2_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2i16_POST, Convert__Reg1_3__TypedVectorList2_0h1_0__Tie1__VectorIndexH1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 986 /* ld2 */, AArch64::LD2i16_POST, Convert__Reg1_3__TypedVectorList2_0h1_0__Tie1__VectorIndexH1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList2_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2i32_POST, Convert__Reg1_3__TypedVectorList2_0s1_0__Tie1__VectorIndexS1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 986 /* ld2 */, AArch64::LD2i32_POST, Convert__Reg1_3__TypedVectorList2_0s1_0__Tie1__VectorIndexS1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList2_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2i8_POST, Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexB1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_b, MCK_VecListTwo128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 986 /* ld2 */, AArch64::LD2i8_POST, Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexB1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_b, MCK_VecListTwo128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2i64_POST, Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexD1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_d, MCK_VecListTwo128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 986 /* ld2 */, AArch64::LD2i64_POST, Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexD1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_d, MCK_VecListTwo128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2i16_POST, Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexH1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_h, MCK_VecListTwo128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 986 /* ld2 */, AArch64::LD2i16_POST, Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexH1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_h, MCK_VecListTwo128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 986 /* ld2 */, AArch64::LD2i32_POST, Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexS1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_s, MCK_VecListTwo128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 986 /* ld2 */, AArch64::LD2i32_POST, Convert__Reg1_4__VecListTwo1281_1__Tie1__VectorIndexS1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_s, MCK_VecListTwo128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv16b, Convert__TypedVectorList2_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv1d, Convert__TypedVectorList2_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv2d, Convert__TypedVectorList2_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv2s, Convert__TypedVectorList2_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv4h, Convert__TypedVectorList2_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv4s, Convert__TypedVectorList2_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv8b, Convert__TypedVectorList2_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv8h, Convert__TypedVectorList2_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv16b, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv1d, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv2d, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv2s, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv4h, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv4s, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv8b, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv8h, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 990 /* ld2r */, AArch64::LD2Rv16b_POST, Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 990 /* ld2r */, AArch64::LD2Rv16b_POST, Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv1d_POST, Convert__Reg1_2__TypedVectorList2_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 990 /* ld2r */, AArch64::LD2Rv1d_POST, Convert__Reg1_2__TypedVectorList2_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv2d_POST, Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 990 /* ld2r */, AArch64::LD2Rv2d_POST, Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv2s_POST, Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 990 /* ld2r */, AArch64::LD2Rv2s_POST, Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv4h_POST, Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 990 /* ld2r */, AArch64::LD2Rv4h_POST, Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv4s_POST, Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 990 /* ld2r */, AArch64::LD2Rv4s_POST, Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv8b_POST, Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 990 /* ld2r */, AArch64::LD2Rv8b_POST, Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv8h_POST, Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 990 /* ld2r */, AArch64::LD2Rv8h_POST, Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 990 /* ld2r */, AArch64::LD2Rv16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv1d_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 990 /* ld2r */, AArch64::LD2Rv1d_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv2d_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 990 /* ld2r */, AArch64::LD2Rv2d_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 990 /* ld2r */, AArch64::LD2Rv2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv4h_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 990 /* ld2r */, AArch64::LD2Rv4h_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv4s_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 990 /* ld2r */, AArch64::LD2Rv4s_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 990 /* ld2r */, AArch64::LD2Rv8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 990 /* ld2r */, AArch64::LD2Rv8h_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 990 /* ld2r */, AArch64::LD2Rv8h_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev16b, Convert__TypedVectorList3_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev2d, Convert__TypedVectorList3_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev2s, Convert__TypedVectorList3_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev4h, Convert__TypedVectorList3_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev4s, Convert__TypedVectorList3_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev8b, Convert__TypedVectorList3_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev8h, Convert__TypedVectorList3_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev16b, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev2d, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev2s, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev4h, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev4s, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev8b, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev8h, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev16b_POST, Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 995 /* ld3 */, AArch64::LD3Threev16b_POST, Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 995 /* ld3 */, AArch64::LD3Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 995 /* ld3 */, AArch64::LD3Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 995 /* ld3 */, AArch64::LD3Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 995 /* ld3 */, AArch64::LD3Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev8b_POST, Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 995 /* ld3 */, AArch64::LD3Threev8b_POST, Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev8h_POST, Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 995 /* ld3 */, AArch64::LD3Threev8h_POST, Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3i8, Convert__TypedVectorList3_0b1_0__Tie0__VectorIndexB1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList3_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3i64, Convert__TypedVectorList3_0d1_0__Tie0__VectorIndexD1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList3_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3i16, Convert__TypedVectorList3_0h1_0__Tie0__VectorIndexH1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList3_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3i32, Convert__TypedVectorList3_0s1_0__Tie0__VectorIndexS1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList3_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3Threev16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 995 /* ld3 */, AArch64::LD3Threev16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev2d_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 995 /* ld3 */, AArch64::LD3Threev2d_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 995 /* ld3 */, AArch64::LD3Threev2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev4h_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 995 /* ld3 */, AArch64::LD3Threev4h_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 995 /* ld3 */, AArch64::LD3Threev4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev8b_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 995 /* ld3 */, AArch64::LD3Threev8b_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3Threev8h_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 995 /* ld3 */, AArch64::LD3Threev8h_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3i8, Convert__VecListThree1281_1__Tie0__VectorIndexB1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_b, MCK_VecListThree128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3i64, Convert__VecListThree1281_1__Tie0__VectorIndexD1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_d, MCK_VecListThree128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3i16, Convert__VecListThree1281_1__Tie0__VectorIndexH1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_h, MCK_VecListThree128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3i32, Convert__VecListThree1281_1__Tie0__VectorIndexS1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_s, MCK_VecListThree128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 995 /* ld3 */, AArch64::LD3i8_POST, Convert__Reg1_3__TypedVectorList3_0b1_0__Tie1__VectorIndexB1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_3 }, }, + { 995 /* ld3 */, AArch64::LD3i8_POST, Convert__Reg1_3__TypedVectorList3_0b1_0__Tie1__VectorIndexB1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList3_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3i64_POST, Convert__Reg1_3__TypedVectorList3_0d1_0__Tie1__VectorIndexD1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 995 /* ld3 */, AArch64::LD3i64_POST, Convert__Reg1_3__TypedVectorList3_0d1_0__Tie1__VectorIndexD1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList3_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3i16_POST, Convert__Reg1_3__TypedVectorList3_0h1_0__Tie1__VectorIndexH1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_6 }, }, + { 995 /* ld3 */, AArch64::LD3i16_POST, Convert__Reg1_3__TypedVectorList3_0h1_0__Tie1__VectorIndexH1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList3_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3i32_POST, Convert__Reg1_3__TypedVectorList3_0s1_0__Tie1__VectorIndexS1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_12 }, }, + { 995 /* ld3 */, AArch64::LD3i32_POST, Convert__Reg1_3__TypedVectorList3_0s1_0__Tie1__VectorIndexS1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList3_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3i8_POST, Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexB1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_b, MCK_VecListThree128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_3 }, }, + { 995 /* ld3 */, AArch64::LD3i8_POST, Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexB1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_b, MCK_VecListThree128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3i64_POST, Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexD1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_d, MCK_VecListThree128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 995 /* ld3 */, AArch64::LD3i64_POST, Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexD1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_d, MCK_VecListThree128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3i16_POST, Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexH1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_h, MCK_VecListThree128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_6 }, }, + { 995 /* ld3 */, AArch64::LD3i16_POST, Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexH1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_h, MCK_VecListThree128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 995 /* ld3 */, AArch64::LD3i32_POST, Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexS1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_s, MCK_VecListThree128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_12 }, }, + { 995 /* ld3 */, AArch64::LD3i32_POST, Convert__Reg1_4__VecListThree1281_1__Tie1__VectorIndexS1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_s, MCK_VecListThree128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv16b, Convert__TypedVectorList3_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv1d, Convert__TypedVectorList3_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv2d, Convert__TypedVectorList3_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv2s, Convert__TypedVectorList3_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv4h, Convert__TypedVectorList3_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv4s, Convert__TypedVectorList3_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv8b, Convert__TypedVectorList3_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv8h, Convert__TypedVectorList3_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv16b, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv1d, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv2d, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv2s, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv4h, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv4s, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv8b, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv8h, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 999 /* ld3r */, AArch64::LD3Rv16b_POST, Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_3 }, }, + { 999 /* ld3r */, AArch64::LD3Rv16b_POST, Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv1d_POST, Convert__Reg1_2__TypedVectorList3_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 999 /* ld3r */, AArch64::LD3Rv1d_POST, Convert__Reg1_2__TypedVectorList3_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv2d_POST, Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 999 /* ld3r */, AArch64::LD3Rv2d_POST, Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv2s_POST, Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_12 }, }, + { 999 /* ld3r */, AArch64::LD3Rv2s_POST, Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv4h_POST, Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_6 }, }, + { 999 /* ld3r */, AArch64::LD3Rv4h_POST, Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv4s_POST, Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_12 }, }, + { 999 /* ld3r */, AArch64::LD3Rv4s_POST, Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv8b_POST, Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_3 }, }, + { 999 /* ld3r */, AArch64::LD3Rv8b_POST, Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv8h_POST, Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_6 }, }, + { 999 /* ld3r */, AArch64::LD3Rv8h_POST, Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_3 }, }, + { 999 /* ld3r */, AArch64::LD3Rv16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv1d_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 999 /* ld3r */, AArch64::LD3Rv1d_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv2d_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 999 /* ld3r */, AArch64::LD3Rv2d_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_12 }, }, + { 999 /* ld3r */, AArch64::LD3Rv2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv4h_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_6 }, }, + { 999 /* ld3r */, AArch64::LD3Rv4h_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_12 }, }, + { 999 /* ld3r */, AArch64::LD3Rv4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv8b_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_3 }, }, + { 999 /* ld3r */, AArch64::LD3Rv8b_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 999 /* ld3r */, AArch64::LD3Rv8h_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_6 }, }, + { 999 /* ld3r */, AArch64::LD3Rv8h_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv16b, Convert__TypedVectorList4_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2d, Convert__TypedVectorList4_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2s, Convert__TypedVectorList4_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4h, Convert__TypedVectorList4_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4s, Convert__TypedVectorList4_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8b, Convert__TypedVectorList4_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8h, Convert__TypedVectorList4_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv16b, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2d, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2s, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4h, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4s, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8b, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8h, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv16b_POST, Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv16b_POST, Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2d_POST, Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2d_POST, Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2s_POST, Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2s_POST, Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4h_POST, Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4h_POST, Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8b_POST, Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8b_POST, Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8h_POST, Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8h_POST, Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4i8, Convert__TypedVectorList4_0b1_0__Tie0__VectorIndexB1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList4_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4i64, Convert__TypedVectorList4_0d1_0__Tie0__VectorIndexD1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList4_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4i16, Convert__TypedVectorList4_0h1_0__Tie0__VectorIndexH1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList4_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4i32, Convert__TypedVectorList4_0s1_0__Tie0__VectorIndexS1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList4_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv16b_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv16b_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 1004 /* ld4 */, AArch64::LD4Fourv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4i8, Convert__VecListFour1281_1__Tie0__VectorIndexB1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_b, MCK_VecListFour128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4i64, Convert__VecListFour1281_1__Tie0__VectorIndexD1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_d, MCK_VecListFour128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4i16, Convert__VecListFour1281_1__Tie0__VectorIndexH1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_h, MCK_VecListFour128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4i32, Convert__VecListFour1281_1__Tie0__VectorIndexS1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_s, MCK_VecListFour128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1004 /* ld4 */, AArch64::LD4i8_POST, Convert__Reg1_3__TypedVectorList4_0b1_0__Tie1__VectorIndexB1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 1004 /* ld4 */, AArch64::LD4i8_POST, Convert__Reg1_3__TypedVectorList4_0b1_0__Tie1__VectorIndexB1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList4_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4i64_POST, Convert__Reg1_3__TypedVectorList4_0d1_0__Tie1__VectorIndexD1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1004 /* ld4 */, AArch64::LD4i64_POST, Convert__Reg1_3__TypedVectorList4_0d1_0__Tie1__VectorIndexD1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList4_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4i16_POST, Convert__Reg1_3__TypedVectorList4_0h1_0__Tie1__VectorIndexH1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 1004 /* ld4 */, AArch64::LD4i16_POST, Convert__Reg1_3__TypedVectorList4_0h1_0__Tie1__VectorIndexH1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList4_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4i32_POST, Convert__Reg1_3__TypedVectorList4_0s1_0__Tie1__VectorIndexS1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 1004 /* ld4 */, AArch64::LD4i32_POST, Convert__Reg1_3__TypedVectorList4_0s1_0__Tie1__VectorIndexS1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList4_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4i8_POST, Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexB1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_b, MCK_VecListFour128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 1004 /* ld4 */, AArch64::LD4i8_POST, Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexB1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_b, MCK_VecListFour128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4i64_POST, Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexD1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_d, MCK_VecListFour128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1004 /* ld4 */, AArch64::LD4i64_POST, Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexD1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_d, MCK_VecListFour128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4i16_POST, Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexH1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_h, MCK_VecListFour128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 1004 /* ld4 */, AArch64::LD4i16_POST, Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexH1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_h, MCK_VecListFour128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1004 /* ld4 */, AArch64::LD4i32_POST, Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexS1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_s, MCK_VecListFour128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 1004 /* ld4 */, AArch64::LD4i32_POST, Convert__Reg1_4__VecListFour1281_1__Tie1__VectorIndexS1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_s, MCK_VecListFour128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv16b, Convert__TypedVectorList4_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv1d, Convert__TypedVectorList4_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2d, Convert__TypedVectorList4_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2s, Convert__TypedVectorList4_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4h, Convert__TypedVectorList4_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4s, Convert__TypedVectorList4_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8b, Convert__TypedVectorList4_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8h, Convert__TypedVectorList4_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv16b, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv1d, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2d, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2s, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4h, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4s, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8b, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8h, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1008 /* ld4r */, AArch64::LD4Rv16b_POST, Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv16b_POST, Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv1d_POST, Convert__Reg1_2__TypedVectorList4_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv1d_POST, Convert__Reg1_2__TypedVectorList4_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2d_POST, Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2d_POST, Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2s_POST, Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2s_POST, Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4h_POST, Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4h_POST, Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4s_POST, Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4s_POST, Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8b_POST, Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8b_POST, Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8h_POST, Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8h_POST, Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv16b_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv16b_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv1d_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv1d_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 1008 /* ld4r */, AArch64::LD4Rv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 1013 /* ldadd */, AArch64::LDADDs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1013 /* ldadd */, AArch64::LDADDd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1019 /* ldadda */, AArch64::LDADDAs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1019 /* ldadda */, AArch64::LDADDAd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1026 /* ldaddab */, AArch64::LDADDAb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1034 /* ldaddah */, AArch64::LDADDAh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1042 /* ldaddal */, AArch64::LDADDALs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1042 /* ldaddal */, AArch64::LDADDALd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1050 /* ldaddalb */, AArch64::LDADDALb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1059 /* ldaddalh */, AArch64::LDADDALh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1068 /* ldaddb */, AArch64::LDADDb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1075 /* ldaddh */, AArch64::LDADDh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1082 /* ldaddl */, AArch64::LDADDLs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1082 /* ldaddl */, AArch64::LDADDLd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1089 /* ldaddlb */, AArch64::LDADDLb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1097 /* ldaddlh */, AArch64::LDADDLh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1105 /* ldar */, AArch64::LDARW, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1105 /* ldar */, AArch64::LDARX, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1110 /* ldarb */, AArch64::LDARB, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1116 /* ldarh */, AArch64::LDARH, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1122 /* ldaxp */, AArch64::LDAXPW, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1122 /* ldaxp */, AArch64::LDAXPX, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1128 /* ldaxr */, AArch64::LDAXRW, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1128 /* ldaxr */, AArch64::LDAXRX, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1134 /* ldaxrb */, AArch64::LDAXRB, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1141 /* ldaxrh */, AArch64::LDAXRH, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1148 /* ldclr */, AArch64::LDCLRs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1148 /* ldclr */, AArch64::LDCLRd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1154 /* ldclra */, AArch64::LDCLRAs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1154 /* ldclra */, AArch64::LDCLRAd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1161 /* ldclrab */, AArch64::LDCLRAb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1169 /* ldclrah */, AArch64::LDCLRAh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1177 /* ldclral */, AArch64::LDCLRALs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1177 /* ldclral */, AArch64::LDCLRALd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1185 /* ldclralb */, AArch64::LDCLRALb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1194 /* ldclralh */, AArch64::LDCLRALh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1203 /* ldclrb */, AArch64::LDCLRb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1210 /* ldclrh */, AArch64::LDCLRh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1217 /* ldclrl */, AArch64::LDCLRLs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1217 /* ldclrl */, AArch64::LDCLRLd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1224 /* ldclrlb */, AArch64::LDCLRLb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1232 /* ldclrlh */, AArch64::LDCLRLh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1240 /* ldeor */, AArch64::LDEORs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1240 /* ldeor */, AArch64::LDEORd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1246 /* ldeora */, AArch64::LDEORAs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1246 /* ldeora */, AArch64::LDEORAd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1253 /* ldeorab */, AArch64::LDEORAb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1261 /* ldeorah */, AArch64::LDEORAh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1269 /* ldeoral */, AArch64::LDEORALs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1269 /* ldeoral */, AArch64::LDEORALd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1277 /* ldeoralb */, AArch64::LDEORALb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1286 /* ldeoralh */, AArch64::LDEORALh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1295 /* ldeorb */, AArch64::LDEORb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1302 /* ldeorh */, AArch64::LDEORh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1309 /* ldeorl */, AArch64::LDEORLs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1309 /* ldeorl */, AArch64::LDEORLd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1316 /* ldeorlb */, AArch64::LDEORLb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1324 /* ldeorlh */, AArch64::LDEORLh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1332 /* ldlar */, AArch64::LDLARW, Convert__Reg1_0__GPR64sp01_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1332 /* ldlar */, AArch64::LDLARX, Convert__Reg1_0__GPR64sp01_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1338 /* ldlarb */, AArch64::LDLARB, Convert__Reg1_0__GPR64sp01_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1345 /* ldlarh */, AArch64::LDLARH, Convert__Reg1_0__GPR64sp01_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1352 /* ldnp */, AArch64::LDNPQi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1352 /* ldnp */, AArch64::LDNPSi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1352 /* ldnp */, AArch64::LDNPDi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1352 /* ldnp */, AArch64::LDNPWi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1352 /* ldnp */, AArch64::LDNPXi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1352 /* ldnp */, AArch64::LDNPQi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s161_4, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm7s16, MCK__93_ }, }, + { 1352 /* ldnp */, AArch64::LDNPSi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s41_4, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_ }, }, + { 1352 /* ldnp */, AArch64::LDNPDi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, }, + { 1352 /* ldnp */, AArch64::LDNPWi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s41_4, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_ }, }, + { 1352 /* ldnp */, AArch64::LDNPXi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, }, + { 1357 /* ldp */, AArch64::LDPQi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1357 /* ldp */, AArch64::LDPSi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1357 /* ldp */, AArch64::LDPDi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1357 /* ldp */, AArch64::LDPWi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1357 /* ldp */, AArch64::LDPXi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1357 /* ldp */, AArch64::LDPQpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s161_5, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s16 }, }, + { 1357 /* ldp */, AArch64::LDPQi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s161_4, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm7s16, MCK__93_ }, }, + { 1357 /* ldp */, AArch64::LDPSpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_5, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s4 }, }, + { 1357 /* ldp */, AArch64::LDPSi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s41_4, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_ }, }, + { 1357 /* ldp */, AArch64::LDPDpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s81_5, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s8 }, }, + { 1357 /* ldp */, AArch64::LDPDi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, }, + { 1357 /* ldp */, AArch64::LDPWpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_5, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s4 }, }, + { 1357 /* ldp */, AArch64::LDPWi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s41_4, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_ }, }, + { 1357 /* ldp */, AArch64::LDPXpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s81_5, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s8 }, }, + { 1357 /* ldp */, AArch64::LDPXi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, }, + { 1357 /* ldp */, AArch64::LDPQpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s161_4, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm7s16, MCK__93_, MCK__EXCLAIM_ }, }, + { 1357 /* ldp */, AArch64::LDPSpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_4, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_, MCK__EXCLAIM_ }, }, + { 1357 /* ldp */, AArch64::LDPDpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s81_4, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_, MCK__EXCLAIM_ }, }, + { 1357 /* ldp */, AArch64::LDPWpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_4, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_, MCK__EXCLAIM_ }, }, + { 1357 /* ldp */, AArch64::LDPXpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s81_4, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_, MCK__EXCLAIM_ }, }, + { 1361 /* ldpsw */, AArch64::LDPSWi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1361 /* ldpsw */, AArch64::LDPSWpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_5, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s4 }, }, + { 1361 /* ldpsw */, AArch64::LDPSWi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s41_4, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_ }, }, + { 1361 /* ldpsw */, AArch64::LDPSWpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_4, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_, MCK__EXCLAIM_ }, }, + { 1367 /* ldr */, AArch64::LDRQl, Convert__Reg1_0__PCRelLabel191_1, 0, { MCK_FPR128, MCK_PCRelLabel19 }, }, + { 1367 /* ldr */, AArch64::LDRSl, Convert__Reg1_0__PCRelLabel191_1, 0, { MCK_FPR32, MCK_PCRelLabel19 }, }, + { 1367 /* ldr */, AArch64::LDRDl, Convert__Reg1_0__PCRelLabel191_1, 0, { MCK_FPR64, MCK_PCRelLabel19 }, }, + { 1367 /* ldr */, AArch64::LDRWl, Convert__Reg1_0__PCRelLabel191_1, 0, { MCK_GPR32, MCK_PCRelLabel19 }, }, + { 1367 /* ldr */, AArch64::LDRXl, Convert__Reg1_0__PCRelLabel191_1, 0, { MCK_GPR64, MCK_PCRelLabel19 }, }, + { 1367 /* ldr */, AArch64::LDRQui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRHui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRSui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRDui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRBui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRWui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRXui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRQpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1367 /* ldr */, AArch64::LDRQroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDURQi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB1281_3, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB128, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRQui, Convert__Reg1_0__Reg1_2__UImm12Offset161_3, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset16, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRHpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1367 /* ldr */, AArch64::LDRHroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDURHi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB161_3, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB16, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRHui, Convert__Reg1_0__Reg1_2__UImm12Offset21_3, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset2, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRSpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1367 /* ldr */, AArch64::LDRSroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDURSi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB321_3, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB32, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRSui, Convert__Reg1_0__Reg1_2__UImm12Offset41_3, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset4, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRDpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1367 /* ldr */, AArch64::LDRDroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDURDi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB641_3, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRDui, Convert__Reg1_0__Reg1_2__UImm12Offset81_3, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset8, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRBpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1367 /* ldr */, AArch64::LDRBroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDURBi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB81_3, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB8, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRBui, Convert__Reg1_0__Reg1_2__UImm12Offset11_3, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset1, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRWpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1367 /* ldr */, AArch64::LDRWroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDURWi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB321_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB32, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRWui, Convert__Reg1_0__Reg1_2__UImm12Offset41_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset4, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRXpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1367 /* ldr */, AArch64::LDRXroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDURXi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB641_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRXui, Convert__Reg1_0__Reg1_2__UImm12Offset81_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset8, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRQroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend1282_4, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend128, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRQroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend1282_4, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend128, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRQpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1367 /* ldr */, AArch64::LDRHroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend162_4, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend16, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRHroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend162_4, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend16, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRHpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1367 /* ldr */, AArch64::LDRSroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend322_4, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend32, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRSroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend322_4, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend32, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRSpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1367 /* ldr */, AArch64::LDRDroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend642_4, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRDroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend642_4, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRDpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1367 /* ldr */, AArch64::LDRBroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend82_4, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend8, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRBroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend82_4, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend8, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRBpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1367 /* ldr */, AArch64::LDRWroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend322_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend32, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRWroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend322_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend32, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRWpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1367 /* ldr */, AArch64::LDRXroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend642_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRXroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend642_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend64, MCK__93_ }, }, + { 1367 /* ldr */, AArch64::LDRXpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1371 /* ldrb */, AArch64::LDRBBui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1371 /* ldrb */, AArch64::LDRBBpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1371 /* ldrb */, AArch64::LDRBBroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1371 /* ldrb */, AArch64::LDURBBi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB81_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB8, MCK__93_ }, }, + { 1371 /* ldrb */, AArch64::LDRBBui, Convert__Reg1_0__Reg1_2__UImm12Offset11_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset1, MCK__93_ }, }, + { 1371 /* ldrb */, AArch64::LDRBBroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend82_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend8, MCK__93_ }, }, + { 1371 /* ldrb */, AArch64::LDRBBroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend82_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend8, MCK__93_ }, }, + { 1371 /* ldrb */, AArch64::LDRBBpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1376 /* ldrh */, AArch64::LDRHHui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1376 /* ldrh */, AArch64::LDRHHpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1376 /* ldrh */, AArch64::LDRHHroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1376 /* ldrh */, AArch64::LDURHHi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB161_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB16, MCK__93_ }, }, + { 1376 /* ldrh */, AArch64::LDRHHui, Convert__Reg1_0__Reg1_2__UImm12Offset21_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset2, MCK__93_ }, }, + { 1376 /* ldrh */, AArch64::LDRHHroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend162_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend16, MCK__93_ }, }, + { 1376 /* ldrh */, AArch64::LDRHHroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend162_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend16, MCK__93_ }, }, + { 1376 /* ldrh */, AArch64::LDRHHpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBWui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBXui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBWpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1381 /* ldrsb */, AArch64::LDRSBWroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDURSBWi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB81_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB8, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBWui, Convert__Reg1_0__Reg1_2__UImm12Offset11_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset1, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBXpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1381 /* ldrsb */, AArch64::LDRSBXroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDURSBXi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB81_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB8, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBXui, Convert__Reg1_0__Reg1_2__UImm12Offset11_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset1, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBWroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend82_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend8, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBWroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend82_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend8, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBWpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBXroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend82_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend8, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBXroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend82_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend8, MCK__93_ }, }, + { 1381 /* ldrsb */, AArch64::LDRSBXpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHWui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHXui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHWpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1387 /* ldrsh */, AArch64::LDRSHWroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDURSHWi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB161_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB16, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHWui, Convert__Reg1_0__Reg1_2__UImm12Offset21_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset2, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHXpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1387 /* ldrsh */, AArch64::LDRSHXroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDURSHXi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB161_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB16, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHXui, Convert__Reg1_0__Reg1_2__UImm12Offset21_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset2, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHWroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend162_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend16, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHWroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend162_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend16, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHWpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHXroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend162_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend16, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHXroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend162_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend16, MCK__93_ }, }, + { 1387 /* ldrsh */, AArch64::LDRSHXpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1393 /* ldrsw */, AArch64::LDRSWl, Convert__Reg1_0__PCRelLabel191_1, 0, { MCK_GPR64, MCK_PCRelLabel19 }, }, + { 1393 /* ldrsw */, AArch64::LDRSWui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1393 /* ldrsw */, AArch64::LDRSWpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 1393 /* ldrsw */, AArch64::LDRSWroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 1393 /* ldrsw */, AArch64::LDURSWi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB321_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB32, MCK__93_ }, }, + { 1393 /* ldrsw */, AArch64::LDRSWui, Convert__Reg1_0__Reg1_2__UImm12Offset41_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset4, MCK__93_ }, }, + { 1393 /* ldrsw */, AArch64::LDRSWroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend322_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend32, MCK__93_ }, }, + { 1393 /* ldrsw */, AArch64::LDRSWroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend322_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend32, MCK__93_ }, }, + { 1393 /* ldrsw */, AArch64::LDRSWpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 1399 /* ldset */, AArch64::LDSETs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1399 /* ldset */, AArch64::LDSETd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1405 /* ldseta */, AArch64::LDSETAs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1405 /* ldseta */, AArch64::LDSETAd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1412 /* ldsetab */, AArch64::LDSETAb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1420 /* ldsetah */, AArch64::LDSETAh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1428 /* ldsetal */, AArch64::LDSETALs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1428 /* ldsetal */, AArch64::LDSETALd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1436 /* ldsetalb */, AArch64::LDSETALb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1445 /* ldsetalh */, AArch64::LDSETALh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1454 /* ldsetb */, AArch64::LDSETb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1461 /* ldseth */, AArch64::LDSETh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1468 /* ldsetl */, AArch64::LDSETLs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1468 /* ldsetl */, AArch64::LDSETLd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1475 /* ldsetlb */, AArch64::LDSETLb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1483 /* ldsetlh */, AArch64::LDSETLh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1491 /* ldsmax */, AArch64::LDSMAXs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1491 /* ldsmax */, AArch64::LDSMAXd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1498 /* ldsmaxa */, AArch64::LDSMAXAs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1498 /* ldsmaxa */, AArch64::LDSMAXAd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1506 /* ldsmaxab */, AArch64::LDSMAXAb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1515 /* ldsmaxah */, AArch64::LDSMAXAh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1524 /* ldsmaxal */, AArch64::LDSMAXALs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1524 /* ldsmaxal */, AArch64::LDSMAXALd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1533 /* ldsmaxalb */, AArch64::LDSMAXALb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1543 /* ldsmaxalh */, AArch64::LDSMAXALh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1553 /* ldsmaxb */, AArch64::LDSMAXb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1561 /* ldsmaxh */, AArch64::LDSMAXh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1569 /* ldsmaxl */, AArch64::LDSMAXLs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1569 /* ldsmaxl */, AArch64::LDSMAXLd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1577 /* ldsmaxlb */, AArch64::LDSMAXLb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1586 /* ldsmaxlh */, AArch64::LDSMAXLh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1595 /* ldsmin */, AArch64::LDSMINs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1595 /* ldsmin */, AArch64::LDSMINd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1602 /* ldsmina */, AArch64::LDSMINAs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1602 /* ldsmina */, AArch64::LDSMINAd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1610 /* ldsminab */, AArch64::LDSMINAb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1619 /* ldsminah */, AArch64::LDSMINAh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1628 /* ldsminal */, AArch64::LDSMINALs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1628 /* ldsminal */, AArch64::LDSMINALd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1637 /* ldsminalb */, AArch64::LDSMINALb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1647 /* ldsminalh */, AArch64::LDSMINALh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1657 /* ldsminb */, AArch64::LDSMINb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1665 /* ldsminh */, AArch64::LDSMINh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1673 /* ldsminl */, AArch64::LDSMINLs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1673 /* ldsminl */, AArch64::LDSMINLd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1681 /* ldsminlb */, AArch64::LDSMINLb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1690 /* ldsminlh */, AArch64::LDSMINLh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1699 /* ldtr */, AArch64::LDTRWi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1699 /* ldtr */, AArch64::LDTRXi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1699 /* ldtr */, AArch64::LDTRWi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1699 /* ldtr */, AArch64::LDTRXi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1704 /* ldtrb */, AArch64::LDTRBi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1704 /* ldtrb */, AArch64::LDTRBi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1710 /* ldtrh */, AArch64::LDTRHi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1710 /* ldtrh */, AArch64::LDTRHi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1716 /* ldtrsb */, AArch64::LDTRSBWi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1716 /* ldtrsb */, AArch64::LDTRSBXi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1716 /* ldtrsb */, AArch64::LDTRSBWi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1716 /* ldtrsb */, AArch64::LDTRSBXi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1723 /* ldtrsh */, AArch64::LDTRSHWi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1723 /* ldtrsh */, AArch64::LDTRSHXi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1723 /* ldtrsh */, AArch64::LDTRSHWi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1723 /* ldtrsh */, AArch64::LDTRSHXi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1730 /* ldtrsw */, AArch64::LDTRSWi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1730 /* ldtrsw */, AArch64::LDTRSWi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1737 /* ldumax */, AArch64::LDUMAXs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1737 /* ldumax */, AArch64::LDUMAXd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1744 /* ldumaxa */, AArch64::LDUMAXAs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1744 /* ldumaxa */, AArch64::LDUMAXAd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1752 /* ldumaxab */, AArch64::LDUMAXAb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1761 /* ldumaxah */, AArch64::LDUMAXAh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1770 /* ldumaxal */, AArch64::LDUMAXALs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1770 /* ldumaxal */, AArch64::LDUMAXALd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1779 /* ldumaxalb */, AArch64::LDUMAXALb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1789 /* ldumaxalh */, AArch64::LDUMAXALh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1799 /* ldumaxb */, AArch64::LDUMAXb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1807 /* ldumaxh */, AArch64::LDUMAXh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1815 /* ldumaxl */, AArch64::LDUMAXLs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1815 /* ldumaxl */, AArch64::LDUMAXLd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1823 /* ldumaxlb */, AArch64::LDUMAXLb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1832 /* ldumaxlh */, AArch64::LDUMAXLh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1841 /* ldumin */, AArch64::LDUMINs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1841 /* ldumin */, AArch64::LDUMINd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1848 /* ldumina */, AArch64::LDUMINAs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1848 /* ldumina */, AArch64::LDUMINAd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1856 /* lduminab */, AArch64::LDUMINAb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1865 /* lduminah */, AArch64::LDUMINAh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1874 /* lduminal */, AArch64::LDUMINALs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1874 /* lduminal */, AArch64::LDUMINALd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1883 /* lduminalb */, AArch64::LDUMINALb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1893 /* lduminalh */, AArch64::LDUMINALh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1903 /* lduminb */, AArch64::LDUMINb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1911 /* lduminh */, AArch64::LDUMINh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1919 /* lduminl */, AArch64::LDUMINLs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1919 /* lduminl */, AArch64::LDUMINLd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1927 /* lduminlb */, AArch64::LDUMINLb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1936 /* lduminlh */, AArch64::LDUMINLh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURQi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURHi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURSi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURDi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURBi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURWi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURXi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURQi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURHi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURSi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURDi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURBi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURWi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1945 /* ldur */, AArch64::LDURXi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1950 /* ldurb */, AArch64::LDURBBi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1950 /* ldurb */, AArch64::LDURBBi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1956 /* ldurh */, AArch64::LDURHHi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1956 /* ldurh */, AArch64::LDURHHi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1962 /* ldursb */, AArch64::LDURSBWi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1962 /* ldursb */, AArch64::LDURSBXi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1962 /* ldursb */, AArch64::LDURSBWi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1962 /* ldursb */, AArch64::LDURSBXi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1969 /* ldursh */, AArch64::LDURSHWi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1969 /* ldursh */, AArch64::LDURSHXi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1969 /* ldursh */, AArch64::LDURSHWi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1969 /* ldursh */, AArch64::LDURSHXi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1976 /* ldursw */, AArch64::LDURSWi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 1976 /* ldursw */, AArch64::LDURSWi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 1983 /* ldxp */, AArch64::LDXPW, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1983 /* ldxp */, AArch64::LDXPX, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1988 /* ldxr */, AArch64::LDXRW, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1988 /* ldxr */, AArch64::LDXRX, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1993 /* ldxrb */, AArch64::LDXRB, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 1999 /* ldxrh */, AArch64::LDXRH, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 2005 /* lsl */, AArch64::LSLVWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2005 /* lsl */, AArch64::LSLVXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2009 /* lslv */, AArch64::LSLVWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2009 /* lslv */, AArch64::LSLVXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2014 /* lsr */, AArch64::LSRVWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2014 /* lsr */, AArch64::UBFMWri, Convert__Reg1_0__Reg1_1__Imm0_311_2__imm_95_31, 0, { MCK_GPR32, MCK_GPR32, MCK_Imm0_31 }, }, + { 2014 /* lsr */, AArch64::LSRVXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2014 /* lsr */, AArch64::UBFMXri, Convert__Reg1_0__Reg1_1__Imm0_631_2__imm_95_63, 0, { MCK_GPR64, MCK_GPR64, MCK_Imm0_63 }, }, + { 2018 /* lsrv */, AArch64::LSRVWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2018 /* lsrv */, AArch64::LSRVXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2023 /* madd */, AArch64::MADDWrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2023 /* madd */, AArch64::MADDXrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2028 /* mla */, AArch64::MLAv16i8, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2028 /* mla */, AArch64::MLAv2i32, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2028 /* mla */, AArch64::MLAv4i16, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2028 /* mla */, AArch64::MLAv4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2028 /* mla */, AArch64::MLAv8i8, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2028 /* mla */, AArch64::MLAv8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2028 /* mla */, AArch64::MLAv2i32_indexed, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2028 /* mla */, AArch64::MLAv4i16_indexed, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2028 /* mla */, AArch64::MLAv4i32_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2028 /* mla */, AArch64::MLAv8i16_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2032 /* mls */, AArch64::MLSv16i8, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2032 /* mls */, AArch64::MLSv2i32, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2032 /* mls */, AArch64::MLSv4i16, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2032 /* mls */, AArch64::MLSv4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2032 /* mls */, AArch64::MLSv8i8, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2032 /* mls */, AArch64::MLSv8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2032 /* mls */, AArch64::MLSv2i32_indexed, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2032 /* mls */, AArch64::MLSv4i16_indexed, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2032 /* mls */, AArch64::MLSv4i32_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2032 /* mls */, AArch64::MLSv8i16_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2036 /* mneg */, AArch64::MSUBWrrr, Convert__Reg1_0__Reg1_1__Reg1_2__regWZR, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2036 /* mneg */, AArch64::MSUBXrrr, Convert__Reg1_0__Reg1_1__Reg1_2__regXZR, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2041 /* mov */, AArch64::ADDWri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_0, 0, { MCK_GPR32sponly, MCK_GPR32sp }, }, + { 2041 /* mov */, AArch64::ADDXri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_0, 0, { MCK_GPR64sponly, MCK_GPR64sp }, }, + { 2041 /* mov */, AArch64::ORRWrs, Convert__Reg1_0__regWZR__Reg1_1__imm_95_0, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 2041 /* mov */, AArch64::MOVZWi, Convert__Reg1_0__MOVZ32_lsl0MovAlias1_1__imm_95_0, 0, { MCK_GPR32, MCK_MOVZ32_lsl0MovAlias }, }, + { 2041 /* mov */, AArch64::MOVZWi, Convert__Reg1_0__MOVZ32_lsl16MovAlias1_1__imm_95_16, 0, { MCK_GPR32, MCK_MOVZ32_lsl16MovAlias }, }, + { 2041 /* mov */, AArch64::MOVNWi, Convert__Reg1_0__MOVN32_lsl0MovAlias1_1__imm_95_0, 0, { MCK_GPR32, MCK_MOVN32_lsl0MovAlias }, }, + { 2041 /* mov */, AArch64::MOVNWi, Convert__Reg1_0__MOVN32_lsl16MovAlias1_1__imm_95_16, 0, { MCK_GPR32, MCK_MOVN32_lsl16MovAlias }, }, + { 2041 /* mov */, AArch64::ADDWri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_0, 0, { MCK_GPR32sp, MCK_GPR32sponly }, }, + { 2041 /* mov */, AArch64::ORRWri, Convert__Reg1_0__regWZR__LogicalImm321_1, 0, { MCK_GPR32sp, MCK_LogicalImm32 }, }, + { 2041 /* mov */, AArch64::ORRXrs, Convert__Reg1_0__regXZR__Reg1_1__imm_95_0, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 2041 /* mov */, AArch64::MOVZXi, Convert__Reg1_0__MOVZ64_lsl0MovAlias1_1__imm_95_0, 0, { MCK_GPR64, MCK_MOVZ64_lsl0MovAlias }, }, + { 2041 /* mov */, AArch64::MOVZXi, Convert__Reg1_0__MOVZ64_lsl16MovAlias1_1__imm_95_16, 0, { MCK_GPR64, MCK_MOVZ64_lsl16MovAlias }, }, + { 2041 /* mov */, AArch64::MOVZXi, Convert__Reg1_0__MOVZ64_lsl32MovAlias1_1__imm_95_32, 0, { MCK_GPR64, MCK_MOVZ64_lsl32MovAlias }, }, + { 2041 /* mov */, AArch64::MOVZXi, Convert__Reg1_0__MOVZ64_lsl48MovAlias1_1__imm_95_48, 0, { MCK_GPR64, MCK_MOVZ64_lsl48MovAlias }, }, + { 2041 /* mov */, AArch64::MOVNXi, Convert__Reg1_0__MOVN64_lsl0MovAlias1_1__imm_95_0, 0, { MCK_GPR64, MCK_MOVN64_lsl0MovAlias }, }, + { 2041 /* mov */, AArch64::MOVNXi, Convert__Reg1_0__MOVN64_lsl16MovAlias1_1__imm_95_16, 0, { MCK_GPR64, MCK_MOVN64_lsl16MovAlias }, }, + { 2041 /* mov */, AArch64::MOVNXi, Convert__Reg1_0__MOVN64_lsl32MovAlias1_1__imm_95_32, 0, { MCK_GPR64, MCK_MOVN64_lsl32MovAlias }, }, + { 2041 /* mov */, AArch64::MOVNXi, Convert__Reg1_0__MOVN64_lsl48MovAlias1_1__imm_95_48, 0, { MCK_GPR64, MCK_MOVN64_lsl48MovAlias }, }, + { 2041 /* mov */, AArch64::ADDXri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_0, 0, { MCK_GPR64sp, MCK_GPR64sponly }, }, + { 2041 /* mov */, AArch64::ORRXri, Convert__Reg1_0__regXZR__LogicalImm641_1, 0, { MCK_GPR64sp, MCK_LogicalImm64 }, }, + { 2041 /* mov */, AArch64::ORRv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_2, 0, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2041 /* mov */, AArch64::ORRv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_2, 0, { MCK__DOT_1d, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2041 /* mov */, AArch64::ORRv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_2, 0, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2041 /* mov */, AArch64::ORRv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_2, 0, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2041 /* mov */, AArch64::ORRv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_2, 0, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2041 /* mov */, AArch64::ORRv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_2, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2041 /* mov */, AArch64::ORRv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_2, 0, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2041 /* mov */, AArch64::ORRv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_2, 0, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2041 /* mov */, AArch64::CPYi16, Convert__Reg1_0__VectorReg1281_1__VectorIndexH1_2, Feature_HasNEON, { MCK_FPR16, MCK_VectorReg128, MCK_VectorIndexH }, }, + { 2041 /* mov */, AArch64::CPYi32, Convert__Reg1_0__VectorReg1281_1__VectorIndexS1_2, Feature_HasNEON, { MCK_FPR32, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2041 /* mov */, AArch64::CPYi64, Convert__Reg1_0__VectorReg1281_1__VectorIndexD1_2, Feature_HasNEON, { MCK_FPR64, MCK_VectorReg128, MCK_VectorIndexD }, }, + { 2041 /* mov */, AArch64::CPYi8, Convert__Reg1_0__VectorReg1281_1__VectorIndexB1_2, Feature_HasNEON, { MCK_FPR8, MCK_VectorReg128, MCK_VectorIndexB }, }, + { 2041 /* mov */, AArch64::INSvi8gpr, Convert__VectorReg1281_1__Tie0__VectorIndexB1_2__Reg1_3, Feature_HasNEON, { MCK__DOT_b, MCK_VectorReg128, MCK_VectorIndexB, MCK_GPR32 }, }, + { 2041 /* mov */, AArch64::UMOVvi64, Convert__Reg1_1__VectorReg1281_2__VectorIndexD1_3, Feature_HasNEON, { MCK__DOT_d, MCK_GPR64, MCK_VectorReg128, MCK_VectorIndexD }, }, + { 2041 /* mov */, AArch64::INSvi64gpr, Convert__VectorReg1281_1__Tie0__VectorIndexD1_2__Reg1_3, Feature_HasNEON, { MCK__DOT_d, MCK_VectorReg128, MCK_VectorIndexD, MCK_GPR64 }, }, + { 2041 /* mov */, AArch64::INSvi16gpr, Convert__VectorReg1281_1__Tie0__VectorIndexH1_2__Reg1_3, Feature_HasNEON, { MCK__DOT_h, MCK_VectorReg128, MCK_VectorIndexH, MCK_GPR32 }, }, + { 2041 /* mov */, AArch64::UMOVvi32, Convert__Reg1_1__VectorReg1281_2__VectorIndexS1_3, Feature_HasNEON, { MCK__DOT_s, MCK_GPR32, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2041 /* mov */, AArch64::INSvi32gpr, Convert__VectorReg1281_1__Tie0__VectorIndexS1_2__Reg1_3, Feature_HasNEON, { MCK__DOT_s, MCK_VectorReg128, MCK_VectorIndexS, MCK_GPR32 }, }, + { 2041 /* mov */, AArch64::INSvi8lane, Convert__VectorReg1281_1__Tie0__VectorIndexB1_2__VectorReg1281_3__VectorIndexB1_4, Feature_HasNEON, { MCK__DOT_b, MCK_VectorReg128, MCK_VectorIndexB, MCK_VectorReg128, MCK_VectorIndexB }, }, + { 2041 /* mov */, AArch64::INSvi64lane, Convert__VectorReg1281_1__Tie0__VectorIndexD1_2__VectorReg1281_3__VectorIndexD1_4, Feature_HasNEON, { MCK__DOT_d, MCK_VectorReg128, MCK_VectorIndexD, MCK_VectorReg128, MCK_VectorIndexD }, }, + { 2041 /* mov */, AArch64::INSvi16lane, Convert__VectorReg1281_1__Tie0__VectorIndexH1_2__VectorReg1281_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_h, MCK_VectorReg128, MCK_VectorIndexH, MCK_VectorReg128, MCK_VectorIndexH }, }, + { 2041 /* mov */, AArch64::INSvi32lane, Convert__VectorReg1281_1__Tie0__VectorIndexS1_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_s, MCK_VectorReg128, MCK_VectorIndexS, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2045 /* movi */, AArch64::MOVID, Convert__Reg1_0__SIMDImmType101_1, Feature_HasNEON, { MCK_FPR64, MCK_SIMDImmType10 }, }, + { 2045 /* movi */, AArch64::MOVIv16b_ns, Convert__VectorReg1281_1__Imm0_2551_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_Imm0_255 }, }, + { 2045 /* movi */, AArch64::MOVIv2d_ns, Convert__VectorReg1281_1__SIMDImmType101_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_SIMDImmType10 }, }, + { 2045 /* movi */, AArch64::MOVIv2i32, Convert__VectorReg641_1__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_2s, MCK_VectorReg64, MCK_Imm0_255 }, }, + { 2045 /* movi */, AArch64::MOVIv4i16, Convert__VectorReg641_1__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_4h, MCK_VectorReg64, MCK_Imm0_255 }, }, + { 2045 /* movi */, AArch64::MOVIv4i32, Convert__VectorReg1281_1__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_Imm0_255 }, }, + { 2045 /* movi */, AArch64::MOVIv8b_ns, Convert__VectorReg641_1__Imm0_2551_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_Imm0_255 }, }, + { 2045 /* movi */, AArch64::MOVIv8i16, Convert__VectorReg1281_1__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_8h, MCK_VectorReg128, MCK_Imm0_255 }, }, + { 2045 /* movi */, AArch64::MOVIv4i32, Convert__VectorReg1281_0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_Imm0_255 }, }, + { 2045 /* movi */, AArch64::MOVIv8i16, Convert__VectorReg1281_0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_255 }, }, + { 2045 /* movi */, AArch64::MOVIv2i32, Convert__VectorReg641_0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg64, MCK__DOT_2s, MCK_Imm0_255 }, }, + { 2045 /* movi */, AArch64::MOVIv4i16, Convert__VectorReg641_0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_255 }, }, + { 2045 /* movi */, AArch64::MOVIv2i32, Convert__VectorReg641_1__Imm0_2551_2__LogicalVecShifter1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_Imm0_255, MCK_LogicalVecShifter }, }, + { 2045 /* movi */, AArch64::MOVIv2s_msl, Convert__VectorReg641_1__Imm0_2551_2__MoveVecShifter1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_Imm0_255, MCK_MoveVecShifter }, }, + { 2045 /* movi */, AArch64::MOVIv4i16, Convert__VectorReg641_1__Imm0_2551_2__LogicalVecHalfWordShifter1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_Imm0_255, MCK_LogicalVecHalfWordShifter }, }, + { 2045 /* movi */, AArch64::MOVIv4i32, Convert__VectorReg1281_1__Imm0_2551_2__LogicalVecShifter1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_Imm0_255, MCK_LogicalVecShifter }, }, + { 2045 /* movi */, AArch64::MOVIv4s_msl, Convert__VectorReg1281_1__Imm0_2551_2__MoveVecShifter1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_Imm0_255, MCK_MoveVecShifter }, }, + { 2045 /* movi */, AArch64::MOVIv8i16, Convert__VectorReg1281_1__Imm0_2551_2__LogicalVecHalfWordShifter1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_Imm0_255, MCK_LogicalVecHalfWordShifter }, }, + { 2050 /* movk */, AArch64::MOVKWi, Convert__Reg1_0__Tie0__Imm0_655351_1__imm_95_0, 0, { MCK_GPR32, MCK_Imm0_65535 }, }, + { 2050 /* movk */, AArch64::MOVKWi, Convert__Reg1_0__Tie0__MovKSymbolG01_1__imm_95_0, 0, { MCK_GPR32, MCK_MovKSymbolG0 }, }, + { 2050 /* movk */, AArch64::MOVKWi, Convert__Reg1_0__Tie0__MovKSymbolG11_1__imm_95_16, 0, { MCK_GPR32, MCK_MovKSymbolG1 }, }, + { 2050 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0__Imm0_655351_1__imm_95_0, 0, { MCK_GPR64, MCK_Imm0_65535 }, }, + { 2050 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0__MovKSymbolG01_1__imm_95_0, 0, { MCK_GPR64, MCK_MovKSymbolG0 }, }, + { 2050 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0__MovKSymbolG11_1__imm_95_16, 0, { MCK_GPR64, MCK_MovKSymbolG1 }, }, + { 2050 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0__MovKSymbolG21_1__imm_95_32, 0, { MCK_GPR64, MCK_MovKSymbolG2 }, }, + { 2050 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0__MovKSymbolG31_1__imm_95_48, 0, { MCK_GPR64, MCK_MovKSymbolG3 }, }, + { 2050 /* movk */, AArch64::MOVKWi, Convert__Reg1_0__Tie0__Imm0_655351_1__MovImm32Shifter1_2, 0, { MCK_GPR32, MCK_Imm0_65535, MCK_MovImm32Shifter }, }, + { 2050 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0__Imm0_655351_1__MovImm64Shifter1_2, 0, { MCK_GPR64, MCK_Imm0_65535, MCK_MovImm64Shifter }, }, + { 2055 /* movn */, AArch64::MOVNWi, Convert__Reg1_0__Imm0_655351_1__imm_95_0, 0, { MCK_GPR32, MCK_Imm0_65535 }, }, + { 2055 /* movn */, AArch64::MOVNWi, Convert__Reg1_0__MovZSymbolG01_1__imm_95_0, 0, { MCK_GPR32, MCK_MovZSymbolG0 }, }, + { 2055 /* movn */, AArch64::MOVNWi, Convert__Reg1_0__MovZSymbolG11_1__imm_95_16, 0, { MCK_GPR32, MCK_MovZSymbolG1 }, }, + { 2055 /* movn */, AArch64::MOVNXi, Convert__Reg1_0__Imm0_655351_1__imm_95_0, 0, { MCK_GPR64, MCK_Imm0_65535 }, }, + { 2055 /* movn */, AArch64::MOVNXi, Convert__Reg1_0__MovZSymbolG01_1__imm_95_0, 0, { MCK_GPR64, MCK_MovZSymbolG0 }, }, + { 2055 /* movn */, AArch64::MOVNXi, Convert__Reg1_0__MovZSymbolG11_1__imm_95_16, 0, { MCK_GPR64, MCK_MovZSymbolG1 }, }, + { 2055 /* movn */, AArch64::MOVNXi, Convert__Reg1_0__MovZSymbolG21_1__imm_95_32, 0, { MCK_GPR64, MCK_MovZSymbolG2 }, }, + { 2055 /* movn */, AArch64::MOVNXi, Convert__Reg1_0__MovZSymbolG31_1__imm_95_48, 0, { MCK_GPR64, MCK_MovZSymbolG3 }, }, + { 2055 /* movn */, AArch64::MOVNWi, Convert__Reg1_0__Imm0_655351_1__MovImm32Shifter1_2, 0, { MCK_GPR32, MCK_Imm0_65535, MCK_MovImm32Shifter }, }, + { 2055 /* movn */, AArch64::MOVNXi, Convert__Reg1_0__Imm0_655351_1__MovImm64Shifter1_2, 0, { MCK_GPR64, MCK_Imm0_65535, MCK_MovImm64Shifter }, }, + { 2060 /* movz */, AArch64::MOVZWi, Convert__Reg1_0__Imm0_655351_1__imm_95_0, 0, { MCK_GPR32, MCK_Imm0_65535 }, }, + { 2060 /* movz */, AArch64::MOVZWi, Convert__Reg1_0__MovZSymbolG01_1__imm_95_0, 0, { MCK_GPR32, MCK_MovZSymbolG0 }, }, + { 2060 /* movz */, AArch64::MOVZWi, Convert__Reg1_0__MovZSymbolG11_1__imm_95_16, 0, { MCK_GPR32, MCK_MovZSymbolG1 }, }, + { 2060 /* movz */, AArch64::MOVZXi, Convert__Reg1_0__Imm0_655351_1__imm_95_0, 0, { MCK_GPR64, MCK_Imm0_65535 }, }, + { 2060 /* movz */, AArch64::MOVZXi, Convert__Reg1_0__MovZSymbolG01_1__imm_95_0, 0, { MCK_GPR64, MCK_MovZSymbolG0 }, }, + { 2060 /* movz */, AArch64::MOVZXi, Convert__Reg1_0__MovZSymbolG11_1__imm_95_16, 0, { MCK_GPR64, MCK_MovZSymbolG1 }, }, + { 2060 /* movz */, AArch64::MOVZXi, Convert__Reg1_0__MovZSymbolG21_1__imm_95_32, 0, { MCK_GPR64, MCK_MovZSymbolG2 }, }, + { 2060 /* movz */, AArch64::MOVZXi, Convert__Reg1_0__MovZSymbolG31_1__imm_95_48, 0, { MCK_GPR64, MCK_MovZSymbolG3 }, }, + { 2060 /* movz */, AArch64::MOVZWi, Convert__Reg1_0__Imm0_655351_1__MovImm32Shifter1_2, 0, { MCK_GPR32, MCK_Imm0_65535, MCK_MovImm32Shifter }, }, + { 2060 /* movz */, AArch64::MOVZXi, Convert__Reg1_0__Imm0_655351_1__MovImm64Shifter1_2, 0, { MCK_GPR64, MCK_Imm0_65535, MCK_MovImm64Shifter }, }, + { 2065 /* mrs */, AArch64::MRS, Convert__Reg1_0__MRSSystemRegister1_1, 0, { MCK_GPR64, MCK_MRSSystemRegister }, }, + { 2069 /* msr */, AArch64::MSR, Convert__MSRSystemRegister1_0__Reg1_1, 0, { MCK_MSRSystemRegister, MCK_GPR64 }, }, + { 2069 /* msr */, AArch64::MSRpstateImm4, Convert__SystemPStateFieldWithImm0_151_0__Imm0_151_1, 0, { MCK_SystemPStateFieldWithImm0_15, MCK_Imm0_15 }, }, + { 2069 /* msr */, AArch64::MSRpstateImm1, Convert__SystemPStateFieldWithImm0_11_0__Imm0_11_1, 0, { MCK_SystemPStateFieldWithImm0_1, MCK_Imm0_1 }, }, + { 2073 /* msub */, AArch64::MSUBWrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2073 /* msub */, AArch64::MSUBXrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2078 /* mul */, AArch64::MADDWrrr, Convert__Reg1_0__Reg1_1__Reg1_2__regWZR, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2078 /* mul */, AArch64::MADDXrrr, Convert__Reg1_0__Reg1_1__Reg1_2__regXZR, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2078 /* mul */, AArch64::MULv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2078 /* mul */, AArch64::MULv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2078 /* mul */, AArch64::MULv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2078 /* mul */, AArch64::MULv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2078 /* mul */, AArch64::MULv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2078 /* mul */, AArch64::MULv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2078 /* mul */, AArch64::MULv2i32_indexed, Convert__VectorReg641_1__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2078 /* mul */, AArch64::MULv4i16_indexed, Convert__VectorReg641_1__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2078 /* mul */, AArch64::MULv4i32_indexed, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2078 /* mul */, AArch64::MULv8i16_indexed, Convert__VectorReg1281_1__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2082 /* mvn */, AArch64::ORNWrs, Convert__Reg1_0__regWZR__Reg1_1__imm_95_0, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 2082 /* mvn */, AArch64::ORNXrs, Convert__Reg1_0__regXZR__Reg1_1__imm_95_0, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 2082 /* mvn */, AArch64::NOTv16i8, Convert__VectorReg1281_1__VectorReg1281_2, 0, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2082 /* mvn */, AArch64::NOTv8i8, Convert__VectorReg641_1__VectorReg641_2, 0, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2082 /* mvn */, AArch64::ORNWrs, Convert__Reg1_0__regWZR__Reg1_1__LogicalShifter321_2, 0, { MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, }, + { 2082 /* mvn */, AArch64::ORNXrs, Convert__Reg1_0__regXZR__Reg1_1__LogicalShifter641_2, 0, { MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, }, + { 2086 /* mvni */, AArch64::MVNIv2i32, Convert__VectorReg641_1__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_2s, MCK_VectorReg64, MCK_Imm0_255 }, }, + { 2086 /* mvni */, AArch64::MVNIv4i16, Convert__VectorReg641_1__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_4h, MCK_VectorReg64, MCK_Imm0_255 }, }, + { 2086 /* mvni */, AArch64::MVNIv4i32, Convert__VectorReg1281_1__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_Imm0_255 }, }, + { 2086 /* mvni */, AArch64::MVNIv8i16, Convert__VectorReg1281_1__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_8h, MCK_VectorReg128, MCK_Imm0_255 }, }, + { 2086 /* mvni */, AArch64::MVNIv4i32, Convert__VectorReg1281_0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_Imm0_255 }, }, + { 2086 /* mvni */, AArch64::MVNIv8i16, Convert__VectorReg1281_0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_255 }, }, + { 2086 /* mvni */, AArch64::MVNIv2i32, Convert__VectorReg641_0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg64, MCK__DOT_2s, MCK_Imm0_255 }, }, + { 2086 /* mvni */, AArch64::MVNIv4i16, Convert__VectorReg641_0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_255 }, }, + { 2086 /* mvni */, AArch64::MVNIv2i32, Convert__VectorReg641_1__Imm0_2551_2__LogicalVecShifter1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_Imm0_255, MCK_LogicalVecShifter }, }, + { 2086 /* mvni */, AArch64::MVNIv2s_msl, Convert__VectorReg641_1__Imm0_2551_2__MoveVecShifter1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_Imm0_255, MCK_MoveVecShifter }, }, + { 2086 /* mvni */, AArch64::MVNIv4i16, Convert__VectorReg641_1__Imm0_2551_2__LogicalVecHalfWordShifter1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_Imm0_255, MCK_LogicalVecHalfWordShifter }, }, + { 2086 /* mvni */, AArch64::MVNIv4i32, Convert__VectorReg1281_1__Imm0_2551_2__LogicalVecShifter1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_Imm0_255, MCK_LogicalVecShifter }, }, + { 2086 /* mvni */, AArch64::MVNIv4s_msl, Convert__VectorReg1281_1__Imm0_2551_2__MoveVecShifter1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_Imm0_255, MCK_MoveVecShifter }, }, + { 2086 /* mvni */, AArch64::MVNIv8i16, Convert__VectorReg1281_1__Imm0_2551_2__LogicalVecHalfWordShifter1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_Imm0_255, MCK_LogicalVecHalfWordShifter }, }, + { 2091 /* neg */, AArch64::NEGv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 2091 /* neg */, AArch64::SUBWrs, Convert__Reg1_0__regWZR__Reg1_1__imm_95_0, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 2091 /* neg */, AArch64::SUBXrs, Convert__Reg1_0__regXZR__Reg1_1__imm_95_0, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 2091 /* neg */, AArch64::NEGv16i8, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2091 /* neg */, AArch64::NEGv2i64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2091 /* neg */, AArch64::NEGv2i32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2091 /* neg */, AArch64::NEGv4i16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2091 /* neg */, AArch64::NEGv4i32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2091 /* neg */, AArch64::NEGv8i8, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2091 /* neg */, AArch64::NEGv8i16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2091 /* neg */, AArch64::SUBWrs, Convert__Reg1_0__regWZR__Reg1_1__ArithmeticShifter321_2, 0, { MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, }, + { 2091 /* neg */, AArch64::SUBXrs, Convert__Reg1_0__regXZR__Reg1_1__ArithmeticShifter641_2, 0, { MCK_GPR64, MCK_GPR64, MCK_ArithmeticShifter64 }, }, + { 2095 /* negs */, AArch64::SUBSWrs, Convert__Reg1_0__regWZR__Reg1_1__imm_95_0, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 2095 /* negs */, AArch64::SUBSXrs, Convert__Reg1_0__regXZR__Reg1_1__imm_95_0, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 2095 /* negs */, AArch64::SUBSWrs, Convert__Reg1_0__regWZR__Reg1_1__ArithmeticShifter321_2, 0, { MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, }, + { 2095 /* negs */, AArch64::SUBSXrs, Convert__Reg1_0__regXZR__Reg1_1__ArithmeticShifter641_2, 0, { MCK_GPR64, MCK_GPR64, MCK_ArithmeticShifter64 }, }, + { 2100 /* ngc */, AArch64::SBCWr, Convert__Reg1_0__regWZR__Reg1_1, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 2100 /* ngc */, AArch64::SBCXr, Convert__Reg1_0__regXZR__Reg1_1, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 2104 /* ngcs */, AArch64::SBCSWr, Convert__Reg1_0__regWZR__Reg1_1, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 2104 /* ngcs */, AArch64::SBCSXr, Convert__Reg1_0__regXZR__Reg1_1, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 2109 /* nop */, AArch64::HINT, Convert__imm_95_0, 0, { }, }, + { 2113 /* not */, AArch64::NOTv16i8, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2113 /* not */, AArch64::NOTv8i8, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2117 /* orn */, AArch64::ORNWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2117 /* orn */, AArch64::ORRWri, Convert__Reg1_0__Reg1_1__LogicalImm32Not1_2, 0, { MCK_GPR32sp, MCK_GPR32, MCK_LogicalImm32Not }, }, + { 2117 /* orn */, AArch64::ORNXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2117 /* orn */, AArch64::ORRXri, Convert__Reg1_0__Reg1_1__LogicalImm64Not1_2, 0, { MCK_GPR64sp, MCK_GPR64, MCK_LogicalImm64Not }, }, + { 2117 /* orn */, AArch64::ORNv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2117 /* orn */, AArch64::ORNv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2117 /* orn */, AArch64::ORNWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, }, + { 2117 /* orn */, AArch64::ORNXrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, }, + { 2121 /* orr */, AArch64::ORRv2i32, Convert__VectorReg641_1__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_2s, MCK_VectorReg64, MCK_Imm0_255 }, }, + { 2121 /* orr */, AArch64::ORRv4i16, Convert__VectorReg641_1__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_4h, MCK_VectorReg64, MCK_Imm0_255 }, }, + { 2121 /* orr */, AArch64::ORRv4i32, Convert__VectorReg1281_1__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_Imm0_255 }, }, + { 2121 /* orr */, AArch64::ORRv8i16, Convert__VectorReg1281_1__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK__DOT_8h, MCK_VectorReg128, MCK_Imm0_255 }, }, + { 2121 /* orr */, AArch64::ORRWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2121 /* orr */, AArch64::ORRWri, Convert__Reg1_0__Reg1_1__LogicalImm321_2, 0, { MCK_GPR32sp, MCK_GPR32, MCK_LogicalImm32 }, }, + { 2121 /* orr */, AArch64::ORRXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2121 /* orr */, AArch64::ORRXri, Convert__Reg1_0__Reg1_1__LogicalImm641_2, 0, { MCK_GPR64sp, MCK_GPR64, MCK_LogicalImm64 }, }, + { 2121 /* orr */, AArch64::ORRv4i32, Convert__VectorReg1281_0__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_Imm0_255 }, }, + { 2121 /* orr */, AArch64::ORRv8i16, Convert__VectorReg1281_0__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_255 }, }, + { 2121 /* orr */, AArch64::ORRv2i32, Convert__VectorReg641_0__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg64, MCK__DOT_2s, MCK_Imm0_255 }, }, + { 2121 /* orr */, AArch64::ORRv4i16, Convert__VectorReg641_0__Tie0__Imm0_2551_2__imm_95_0, 0, { MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_255 }, }, + { 2121 /* orr */, AArch64::ORRv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2121 /* orr */, AArch64::ORRv2i32, Convert__VectorReg641_1__Tie0__Imm0_2551_2__LogicalVecShifter1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_Imm0_255, MCK_LogicalVecShifter }, }, + { 2121 /* orr */, AArch64::ORRv4i16, Convert__VectorReg641_1__Tie0__Imm0_2551_2__LogicalVecHalfWordShifter1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_Imm0_255, MCK_LogicalVecHalfWordShifter }, }, + { 2121 /* orr */, AArch64::ORRv4i32, Convert__VectorReg1281_1__Tie0__Imm0_2551_2__LogicalVecShifter1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_Imm0_255, MCK_LogicalVecShifter }, }, + { 2121 /* orr */, AArch64::ORRv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2121 /* orr */, AArch64::ORRv8i16, Convert__VectorReg1281_1__Tie0__Imm0_2551_2__LogicalVecHalfWordShifter1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_Imm0_255, MCK_LogicalVecHalfWordShifter }, }, + { 2121 /* orr */, AArch64::ORRWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, }, + { 2121 /* orr */, AArch64::ORRXrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, }, + { 2125 /* pmul */, AArch64::PMULv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2125 /* pmul */, AArch64::PMULv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2130 /* pmull */, AArch64::PMULLv1i64, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasCrypto, { MCK__DOT_1q, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2130 /* pmull */, AArch64::PMULLv8i8, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2136 /* pmull2 */, AArch64::PMULLv2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasCrypto, { MCK__DOT_1q, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2136 /* pmull2 */, AArch64::PMULLv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2143 /* prfm */, AArch64::PRFMl, Convert__Prefetch1_0__PCRelLabel191_1, 0, { MCK_Prefetch, MCK_PCRelLabel19 }, }, + { 2143 /* prfm */, AArch64::PRFMui, Convert__Prefetch1_0__Reg1_2__imm_95_0, 0, { MCK_Prefetch, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2143 /* prfm */, AArch64::PRFMroX, Convert__Prefetch1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_Prefetch, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 2143 /* prfm */, AArch64::PRFMui, Convert__Prefetch1_0__Reg1_2__UImm12Offset81_3, 0, { MCK_Prefetch, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset8, MCK__93_ }, }, + { 2143 /* prfm */, AArch64::PRFMroW, Convert__Prefetch1_0__Reg1_2__Reg1_3__MemWExtend642_4, 0, { MCK_Prefetch, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend64, MCK__93_ }, }, + { 2143 /* prfm */, AArch64::PRFMroX, Convert__Prefetch1_0__Reg1_2__Reg1_3__MemXExtend642_4, 0, { MCK_Prefetch, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend64, MCK__93_ }, }, + { 2148 /* prfum */, AArch64::PRFUMi, Convert__Prefetch1_0__Reg1_2__imm_95_0, 0, { MCK_Prefetch, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2148 /* prfum */, AArch64::PRFUMi, Convert__Prefetch1_0__Reg1_2__SImm91_3, 0, { MCK_Prefetch, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 2154 /* psb */, AArch64::HINT, Convert__PSBHint1_0, Feature_HasSPE, { MCK_PSBHint }, }, + { 2158 /* raddhn */, AArch64::RADDHNv2i64_v2i32, Convert__VectorReg641_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2158 /* raddhn */, AArch64::RADDHNv4i32_v4i16, Convert__VectorReg641_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2158 /* raddhn */, AArch64::RADDHNv8i16_v8i8, Convert__VectorReg641_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2165 /* raddhn2 */, AArch64::RADDHNv8i16_v16i8, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2165 /* raddhn2 */, AArch64::RADDHNv2i64_v4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2165 /* raddhn2 */, AArch64::RADDHNv4i32_v8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2173 /* rbit */, AArch64::RBITWr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 2173 /* rbit */, AArch64::RBITXr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 2173 /* rbit */, AArch64::RBITv16i8, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2173 /* rbit */, AArch64::RBITv8i8, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2178 /* ret */, AArch64::RET, Convert__regLR, 0, { }, }, + { 2178 /* ret */, AArch64::RET, Convert__Reg1_0, 0, { MCK_GPR64 }, }, + { 2182 /* rev */, AArch64::REVWr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 2182 /* rev */, AArch64::REVXr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 2186 /* rev16 */, AArch64::REV16Wr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 2186 /* rev16 */, AArch64::REV16Xr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 2186 /* rev16 */, AArch64::REV16v16i8, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2186 /* rev16 */, AArch64::REV16v8i8, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2192 /* rev32 */, AArch64::REV32Xr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 2192 /* rev32 */, AArch64::REV32v16i8, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2192 /* rev32 */, AArch64::REV32v4i16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2192 /* rev32 */, AArch64::REV32v8i8, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2192 /* rev32 */, AArch64::REV32v8i16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2198 /* rev64 */, AArch64::REVXr, Convert__Reg1_0__Reg1_1, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 2198 /* rev64 */, AArch64::REV64v16i8, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2198 /* rev64 */, AArch64::REV64v2i32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2198 /* rev64 */, AArch64::REV64v4i16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2198 /* rev64 */, AArch64::REV64v4i32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2198 /* rev64 */, AArch64::REV64v8i8, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2198 /* rev64 */, AArch64::REV64v8i16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2204 /* ror */, AArch64::RORVWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2204 /* ror */, AArch64::EXTRWrri, Convert__Reg1_0__Reg1_1__Reg1_1__Imm0_311_2, 0, { MCK_GPR32, MCK_GPR32, MCK_Imm0_31 }, }, + { 2204 /* ror */, AArch64::RORVXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2204 /* ror */, AArch64::EXTRXrri, Convert__Reg1_0__Reg1_1__Reg1_1__Imm0_631_2, 0, { MCK_GPR64, MCK_GPR64, MCK_Imm0_63 }, }, + { 2208 /* rorv */, AArch64::RORVWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2208 /* rorv */, AArch64::RORVXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2213 /* rshrn */, AArch64::RSHRNv2i32_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 2213 /* rshrn */, AArch64::RSHRNv4i16_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 2213 /* rshrn */, AArch64::RSHRNv8i8_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 2219 /* rshrn2 */, AArch64::RSHRNv16i8_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 2219 /* rshrn2 */, AArch64::RSHRNv4i32_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 2219 /* rshrn2 */, AArch64::RSHRNv8i16_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 2226 /* rsubhn */, AArch64::RSUBHNv2i64_v2i32, Convert__VectorReg641_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2226 /* rsubhn */, AArch64::RSUBHNv4i32_v4i16, Convert__VectorReg641_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2226 /* rsubhn */, AArch64::RSUBHNv8i16_v8i8, Convert__VectorReg641_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2233 /* rsubhn2 */, AArch64::RSUBHNv8i16_v16i8, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2233 /* rsubhn2 */, AArch64::RSUBHNv2i64_v4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2233 /* rsubhn2 */, AArch64::RSUBHNv4i32_v8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2241 /* saba */, AArch64::SABAv16i8, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2241 /* saba */, AArch64::SABAv2i32, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2241 /* saba */, AArch64::SABAv4i16, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2241 /* saba */, AArch64::SABAv4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2241 /* saba */, AArch64::SABAv8i8, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2241 /* saba */, AArch64::SABAv8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2246 /* sabal */, AArch64::SABALv2i32_v2i64, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2246 /* sabal */, AArch64::SABALv4i16_v4i32, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2246 /* sabal */, AArch64::SABALv8i8_v8i16, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2252 /* sabal2 */, AArch64::SABALv4i32_v2i64, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2252 /* sabal2 */, AArch64::SABALv8i16_v4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2252 /* sabal2 */, AArch64::SABALv16i8_v8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2259 /* sabd */, AArch64::SABDv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2259 /* sabd */, AArch64::SABDv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2259 /* sabd */, AArch64::SABDv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2259 /* sabd */, AArch64::SABDv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2259 /* sabd */, AArch64::SABDv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2259 /* sabd */, AArch64::SABDv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2264 /* sabdl */, AArch64::SABDLv2i32_v2i64, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2264 /* sabdl */, AArch64::SABDLv4i16_v4i32, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2264 /* sabdl */, AArch64::SABDLv8i8_v8i16, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2270 /* sabdl2 */, AArch64::SABDLv4i32_v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2270 /* sabdl2 */, AArch64::SABDLv8i16_v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2270 /* sabdl2 */, AArch64::SABDLv16i8_v8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2277 /* sadalp */, AArch64::SADALPv2i32_v1i64, Convert__VectorReg641_1__Tie0__VectorReg641_2, Feature_HasNEON, { MCK__DOT_1d, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2277 /* sadalp */, AArch64::SADALPv4i32_v2i64, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2277 /* sadalp */, AArch64::SADALPv4i16_v2i32, Convert__VectorReg641_1__Tie0__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2277 /* sadalp */, AArch64::SADALPv8i8_v4i16, Convert__VectorReg641_1__Tie0__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2277 /* sadalp */, AArch64::SADALPv8i16_v4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2277 /* sadalp */, AArch64::SADALPv16i8_v8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2284 /* saddl */, AArch64::SADDLv2i32_v2i64, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2284 /* saddl */, AArch64::SADDLv4i16_v4i32, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2284 /* saddl */, AArch64::SADDLv8i8_v8i16, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2290 /* saddl2 */, AArch64::SADDLv4i32_v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2290 /* saddl2 */, AArch64::SADDLv8i16_v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2290 /* saddl2 */, AArch64::SADDLv16i8_v8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2297 /* saddlp */, AArch64::SADDLPv2i32_v1i64, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_1d, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2297 /* saddlp */, AArch64::SADDLPv4i32_v2i64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2297 /* saddlp */, AArch64::SADDLPv4i16_v2i32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2297 /* saddlp */, AArch64::SADDLPv8i8_v4i16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2297 /* saddlp */, AArch64::SADDLPv8i16_v4i32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2297 /* saddlp */, AArch64::SADDLPv16i8_v8i16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2304 /* saddlv */, AArch64::SADDLVv16i8v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_FPR16, MCK_VectorReg128 }, }, + { 2304 /* saddlv */, AArch64::SADDLVv4i16v, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_FPR32, MCK_VectorReg64 }, }, + { 2304 /* saddlv */, AArch64::SADDLVv4i32v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_FPR64, MCK_VectorReg128 }, }, + { 2304 /* saddlv */, AArch64::SADDLVv8i8v, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_FPR16, MCK_VectorReg64 }, }, + { 2304 /* saddlv */, AArch64::SADDLVv8i16v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_FPR32, MCK_VectorReg128 }, }, + { 2311 /* saddw */, AArch64::SADDWv2i32_v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 2311 /* saddw */, AArch64::SADDWv4i16_v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 2311 /* saddw */, AArch64::SADDWv8i8_v8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 2317 /* saddw2 */, AArch64::SADDWv4i32_v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2317 /* saddw2 */, AArch64::SADDWv8i16_v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2317 /* saddw2 */, AArch64::SADDWv16i8_v8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2324 /* sbc */, AArch64::SBCWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2324 /* sbc */, AArch64::SBCXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2328 /* sbcs */, AArch64::SBCSWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2328 /* sbcs */, AArch64::SBCSXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2333 /* sbfm */, AArch64::SBFMWri, Convert__Reg1_0__Reg1_1__Imm0_311_2__Imm0_311_3, 0, { MCK_GPR32, MCK_GPR32, MCK_Imm0_31, MCK_Imm0_31 }, }, + { 2333 /* sbfm */, AArch64::SBFMXri, Convert__Reg1_0__Reg1_1__Imm0_631_2__Imm0_631_3, 0, { MCK_GPR64, MCK_GPR64, MCK_Imm0_63, MCK_Imm0_63 }, }, + { 2338 /* scvtf */, AArch64::SCVTFv1i16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 2338 /* scvtf */, AArch64::SCVTFUWHri, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_GPR32 }, }, + { 2338 /* scvtf */, AArch64::SCVTFUXHri, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_GPR64 }, }, + { 2338 /* scvtf */, AArch64::SCVTFv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 2338 /* scvtf */, AArch64::SCVTFUWSri, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_GPR32 }, }, + { 2338 /* scvtf */, AArch64::SCVTFUXSri, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_GPR64 }, }, + { 2338 /* scvtf */, AArch64::SCVTFv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 2338 /* scvtf */, AArch64::SCVTFUWDri, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_GPR32 }, }, + { 2338 /* scvtf */, AArch64::SCVTFUXDri, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_GPR64 }, }, + { 2338 /* scvtf */, AArch64::SCVTFv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2338 /* scvtf */, AArch64::SCVTFv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2338 /* scvtf */, AArch64::SCVTFv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2338 /* scvtf */, AArch64::SCVTFv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2338 /* scvtf */, AArch64::SCVTFv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2338 /* scvtf */, AArch64::SCVTFh, Convert__Reg1_0__Reg1_1__Imm1_161_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm1_16 }, }, + { 2338 /* scvtf */, AArch64::SCVTFSWHri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFullFP16, { MCK_FPR16, MCK_GPR32, MCK_Imm1_32 }, }, + { 2338 /* scvtf */, AArch64::SCVTFSXHri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFullFP16, { MCK_FPR16, MCK_GPR64, MCK_Imm1_64 }, }, + { 2338 /* scvtf */, AArch64::SCVTFs, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_Imm1_32 }, }, + { 2338 /* scvtf */, AArch64::SCVTFSWSri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_GPR32, MCK_Imm1_32 }, }, + { 2338 /* scvtf */, AArch64::SCVTFSXSri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_GPR64, MCK_Imm1_64 }, }, + { 2338 /* scvtf */, AArch64::SCVTFd, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 2338 /* scvtf */, AArch64::SCVTFSWDri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_GPR32, MCK_Imm1_32 }, }, + { 2338 /* scvtf */, AArch64::SCVTFSXDri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_GPR64, MCK_Imm1_64 }, }, + { 2338 /* scvtf */, AArch64::SCVTFv2i64_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_64 }, }, + { 2338 /* scvtf */, AArch64::SCVTFv2i32_shift, Convert__VectorReg641_1__VectorReg641_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_32 }, }, + { 2338 /* scvtf */, AArch64::SCVTFv4i16_shift, Convert__VectorReg641_1__VectorReg641_2__Imm1_161_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_16 }, }, + { 2338 /* scvtf */, AArch64::SCVTFv4i32_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 2338 /* scvtf */, AArch64::SCVTFv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_161_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 2344 /* sdiv */, AArch64::SDIVWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 2344 /* sdiv */, AArch64::SDIVXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2349 /* sev */, AArch64::HINT, Convert__imm_95_4, 0, { }, }, + { 2353 /* sevl */, AArch64::HINT, Convert__imm_95_5, 0, { }, }, + { 2358 /* sha1c */, AArch64::SHA1Crrr, Convert__Reg1_1__Tie0__Reg1_2__VectorReg1281_3, Feature_HasCrypto, { MCK__DOT_4s, MCK_FPR128, MCK_FPR32, MCK_VectorReg128 }, }, + { 2364 /* sha1h */, AArch64::SHA1Hrr, Convert__Reg1_0__Reg1_1, Feature_HasCrypto, { MCK_FPR32, MCK_FPR32 }, }, + { 2370 /* sha1m */, AArch64::SHA1Mrrr, Convert__Reg1_1__Tie0__Reg1_2__VectorReg1281_3, Feature_HasCrypto, { MCK__DOT_4s, MCK_FPR128, MCK_FPR32, MCK_VectorReg128 }, }, + { 2376 /* sha1p */, AArch64::SHA1Prrr, Convert__Reg1_1__Tie0__Reg1_2__VectorReg1281_3, Feature_HasCrypto, { MCK__DOT_4s, MCK_FPR128, MCK_FPR32, MCK_VectorReg128 }, }, + { 2382 /* sha1su0 */, AArch64::SHA1SU0rrr, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasCrypto, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2390 /* sha1su1 */, AArch64::SHA1SU1rr, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasCrypto, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2398 /* sha256h */, AArch64::SHA256Hrrr, Convert__Reg1_1__Tie0__Reg1_2__VectorReg1281_3, Feature_HasCrypto, { MCK__DOT_4s, MCK_FPR128, MCK_FPR128, MCK_VectorReg128 }, }, + { 2406 /* sha256h2 */, AArch64::SHA256H2rrr, Convert__Reg1_1__Tie0__Reg1_2__VectorReg1281_3, Feature_HasCrypto, { MCK__DOT_4s, MCK_FPR128, MCK_FPR128, MCK_VectorReg128 }, }, + { 2415 /* sha256su0 */, AArch64::SHA256SU0rr, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasCrypto, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2425 /* sha256su1 */, AArch64::SHA256SU1rrr, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasCrypto, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2435 /* shadd */, AArch64::SHADDv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2435 /* shadd */, AArch64::SHADDv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2435 /* shadd */, AArch64::SHADDv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2435 /* shadd */, AArch64::SHADDv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2435 /* shadd */, AArch64::SHADDv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2435 /* shadd */, AArch64::SHADDv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2441 /* shl */, AArch64::SHLd, Convert__Reg1_0__Reg1_1__Imm0_631_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm0_63 }, }, + { 2441 /* shl */, AArch64::SHLv16i8_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_71_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_7 }, }, + { 2441 /* shl */, AArch64::SHLv2i64_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_631_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_63 }, }, + { 2441 /* shl */, AArch64::SHLv2i32_shift, Convert__VectorReg641_1__VectorReg641_2__Imm0_311_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm0_31 }, }, + { 2441 /* shl */, AArch64::SHLv4i16_shift, Convert__VectorReg641_1__VectorReg641_2__Imm0_151_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm0_15 }, }, + { 2441 /* shl */, AArch64::SHLv4i32_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_311_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_31 }, }, + { 2441 /* shl */, AArch64::SHLv8i8_shift, Convert__VectorReg641_1__VectorReg641_2__Imm0_71_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm0_7 }, }, + { 2441 /* shl */, AArch64::SHLv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_151_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_15 }, }, + { 2445 /* shll */, AArch64::SHLLv2i32, Convert__VectorReg1281_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK__35_32 }, }, + { 2445 /* shll */, AArch64::SHLLv4i16, Convert__VectorReg1281_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK__35_16 }, }, + { 2445 /* shll */, AArch64::SHLLv8i8, Convert__VectorReg1281_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg64, MCK__35_8 }, }, + { 2450 /* shll2 */, AArch64::SHLLv4i32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK__35_32 }, }, + { 2450 /* shll2 */, AArch64::SHLLv8i16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK__35_16 }, }, + { 2450 /* shll2 */, AArch64::SHLLv16i8, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK__35_8 }, }, + { 2456 /* shrn */, AArch64::SHRNv2i32_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 2456 /* shrn */, AArch64::SHRNv4i16_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 2456 /* shrn */, AArch64::SHRNv8i8_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 2461 /* shrn2 */, AArch64::SHRNv16i8_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 2461 /* shrn2 */, AArch64::SHRNv4i32_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 2461 /* shrn2 */, AArch64::SHRNv8i16_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 2467 /* shsub */, AArch64::SHSUBv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2467 /* shsub */, AArch64::SHSUBv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2467 /* shsub */, AArch64::SHSUBv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2467 /* shsub */, AArch64::SHSUBv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2467 /* shsub */, AArch64::SHSUBv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2467 /* shsub */, AArch64::SHSUBv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2473 /* sli */, AArch64::SLId, Convert__Reg1_0__Tie0__Reg1_1__Imm0_631_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm0_63 }, }, + { 2473 /* sli */, AArch64::SLIv16i8_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm0_71_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_7 }, }, + { 2473 /* sli */, AArch64::SLIv2i64_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm0_631_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_63 }, }, + { 2473 /* sli */, AArch64::SLIv2i32_shift, Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm0_311_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm0_31 }, }, + { 2473 /* sli */, AArch64::SLIv4i16_shift, Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm0_151_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm0_15 }, }, + { 2473 /* sli */, AArch64::SLIv4i32_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm0_311_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_31 }, }, + { 2473 /* sli */, AArch64::SLIv8i8_shift, Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm0_71_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm0_7 }, }, + { 2473 /* sli */, AArch64::SLIv8i16_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm0_151_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_15 }, }, + { 2477 /* smaddl */, AArch64::SMADDLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_GPR64, MCK_GPR32, MCK_GPR32, MCK_GPR64 }, }, + { 2484 /* smax */, AArch64::SMAXv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2484 /* smax */, AArch64::SMAXv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2484 /* smax */, AArch64::SMAXv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2484 /* smax */, AArch64::SMAXv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2484 /* smax */, AArch64::SMAXv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2484 /* smax */, AArch64::SMAXv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2489 /* smaxp */, AArch64::SMAXPv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2489 /* smaxp */, AArch64::SMAXPv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2489 /* smaxp */, AArch64::SMAXPv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2489 /* smaxp */, AArch64::SMAXPv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2489 /* smaxp */, AArch64::SMAXPv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2489 /* smaxp */, AArch64::SMAXPv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2495 /* smaxv */, AArch64::SMAXVv16i8v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_FPR8, MCK_VectorReg128 }, }, + { 2495 /* smaxv */, AArch64::SMAXVv4i16v, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_FPR16, MCK_VectorReg64 }, }, + { 2495 /* smaxv */, AArch64::SMAXVv4i32v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_FPR32, MCK_VectorReg128 }, }, + { 2495 /* smaxv */, AArch64::SMAXVv8i8v, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_FPR8, MCK_VectorReg64 }, }, + { 2495 /* smaxv */, AArch64::SMAXVv8i16v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_FPR16, MCK_VectorReg128 }, }, + { 2501 /* smc */, AArch64::SMC, Convert__Imm0_655351_0, 0, { MCK_Imm0_65535 }, }, + { 2505 /* smin */, AArch64::SMINv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2505 /* smin */, AArch64::SMINv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2505 /* smin */, AArch64::SMINv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2505 /* smin */, AArch64::SMINv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2505 /* smin */, AArch64::SMINv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2505 /* smin */, AArch64::SMINv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2510 /* sminp */, AArch64::SMINPv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2510 /* sminp */, AArch64::SMINPv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2510 /* sminp */, AArch64::SMINPv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2510 /* sminp */, AArch64::SMINPv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2510 /* sminp */, AArch64::SMINPv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2510 /* sminp */, AArch64::SMINPv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2516 /* sminv */, AArch64::SMINVv16i8v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_FPR8, MCK_VectorReg128 }, }, + { 2516 /* sminv */, AArch64::SMINVv4i16v, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_FPR16, MCK_VectorReg64 }, }, + { 2516 /* sminv */, AArch64::SMINVv4i32v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_FPR32, MCK_VectorReg128 }, }, + { 2516 /* sminv */, AArch64::SMINVv8i8v, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_FPR8, MCK_VectorReg64 }, }, + { 2516 /* sminv */, AArch64::SMINVv8i16v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_FPR16, MCK_VectorReg128 }, }, + { 2522 /* smlal */, AArch64::SMLALv2i32_v2i64, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2522 /* smlal */, AArch64::SMLALv4i16_v4i32, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2522 /* smlal */, AArch64::SMLALv8i8_v8i16, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2522 /* smlal */, AArch64::SMLALv2i32_indexed, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2522 /* smlal */, AArch64::SMLALv4i16_indexed, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2528 /* smlal2 */, AArch64::SMLALv4i32_v2i64, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2528 /* smlal2 */, AArch64::SMLALv8i16_v4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2528 /* smlal2 */, AArch64::SMLALv16i8_v8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2528 /* smlal2 */, AArch64::SMLALv4i32_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2528 /* smlal2 */, AArch64::SMLALv8i16_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2535 /* smlsl */, AArch64::SMLSLv2i32_v2i64, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2535 /* smlsl */, AArch64::SMLSLv4i16_v4i32, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2535 /* smlsl */, AArch64::SMLSLv8i8_v8i16, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2535 /* smlsl */, AArch64::SMLSLv2i32_indexed, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2535 /* smlsl */, AArch64::SMLSLv4i16_indexed, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2541 /* smlsl2 */, AArch64::SMLSLv4i32_v2i64, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2541 /* smlsl2 */, AArch64::SMLSLv8i16_v4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2541 /* smlsl2 */, AArch64::SMLSLv16i8_v8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2541 /* smlsl2 */, AArch64::SMLSLv4i32_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2541 /* smlsl2 */, AArch64::SMLSLv8i16_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2548 /* smnegl */, AArch64::SMSUBLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__regXZR, 0, { MCK_GPR64, MCK_GPR32, MCK_GPR32 }, }, + { 2555 /* smov */, AArch64::SMOVvi8to32, Convert__Reg1_1__VectorReg1281_2__VectorIndexB1_3, Feature_HasNEON, { MCK__DOT_b, MCK_GPR32, MCK_VectorReg128, MCK_VectorIndexB }, }, + { 2555 /* smov */, AArch64::SMOVvi8to64, Convert__Reg1_1__VectorReg1281_2__VectorIndexB1_3, Feature_HasNEON, { MCK__DOT_b, MCK_GPR64, MCK_VectorReg128, MCK_VectorIndexB }, }, + { 2555 /* smov */, AArch64::SMOVvi16to32, Convert__Reg1_1__VectorReg1281_2__VectorIndexH1_3, Feature_HasNEON, { MCK__DOT_h, MCK_GPR32, MCK_VectorReg128, MCK_VectorIndexH }, }, + { 2555 /* smov */, AArch64::SMOVvi16to64, Convert__Reg1_1__VectorReg1281_2__VectorIndexH1_3, Feature_HasNEON, { MCK__DOT_h, MCK_GPR64, MCK_VectorReg128, MCK_VectorIndexH }, }, + { 2555 /* smov */, AArch64::SMOVvi32to64, Convert__Reg1_1__VectorReg1281_2__VectorIndexS1_3, Feature_HasNEON, { MCK__DOT_s, MCK_GPR64, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2560 /* smsubl */, AArch64::SMSUBLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_GPR64, MCK_GPR32, MCK_GPR32, MCK_GPR64 }, }, + { 2567 /* smulh */, AArch64::SMULHrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 2573 /* smull */, AArch64::SMADDLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__regXZR, 0, { MCK_GPR64, MCK_GPR32, MCK_GPR32 }, }, + { 2573 /* smull */, AArch64::SMULLv2i32_v2i64, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2573 /* smull */, AArch64::SMULLv4i16_v4i32, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2573 /* smull */, AArch64::SMULLv8i8_v8i16, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2573 /* smull */, AArch64::SMULLv2i32_indexed, Convert__VectorReg1281_1__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2573 /* smull */, AArch64::SMULLv4i16_indexed, Convert__VectorReg1281_1__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2579 /* smull2 */, AArch64::SMULLv4i32_v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2579 /* smull2 */, AArch64::SMULLv8i16_v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2579 /* smull2 */, AArch64::SMULLv16i8_v8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2579 /* smull2 */, AArch64::SMULLv4i32_indexed, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2579 /* smull2 */, AArch64::SMULLv8i16_indexed, Convert__VectorReg1281_1__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2586 /* sqabs */, AArch64::SQABSv1i16, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR16, MCK_FPR16 }, }, + { 2586 /* sqabs */, AArch64::SQABSv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 2586 /* sqabs */, AArch64::SQABSv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 2586 /* sqabs */, AArch64::SQABSv1i8, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR8, MCK_FPR8 }, }, + { 2586 /* sqabs */, AArch64::SQABSv16i8, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2586 /* sqabs */, AArch64::SQABSv2i64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2586 /* sqabs */, AArch64::SQABSv2i32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2586 /* sqabs */, AArch64::SQABSv4i16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2586 /* sqabs */, AArch64::SQABSv4i32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2586 /* sqabs */, AArch64::SQABSv8i8, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2586 /* sqabs */, AArch64::SQABSv8i16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2592 /* sqadd */, AArch64::SQADDv1i16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 2592 /* sqadd */, AArch64::SQADDv1i32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 2592 /* sqadd */, AArch64::SQADDv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 2592 /* sqadd */, AArch64::SQADDv1i8, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR8, MCK_FPR8 }, }, + { 2592 /* sqadd */, AArch64::SQADDv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2592 /* sqadd */, AArch64::SQADDv2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2592 /* sqadd */, AArch64::SQADDv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2592 /* sqadd */, AArch64::SQADDv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2592 /* sqadd */, AArch64::SQADDv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2592 /* sqadd */, AArch64::SQADDv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2592 /* sqadd */, AArch64::SQADDv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2598 /* sqdmlal */, AArch64::SQDMLALi16, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR16, MCK_FPR16 }, }, + { 2598 /* sqdmlal */, AArch64::SQDMLALi32, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR32, MCK_FPR32 }, }, + { 2598 /* sqdmlal */, AArch64::SQDMLALv2i32_v2i64, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2598 /* sqdmlal */, AArch64::SQDMLALv4i16_v4i32, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2598 /* sqdmlal */, AArch64::SQDMLALv2i32_indexed, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2598 /* sqdmlal */, AArch64::SQDMLALv4i16_indexed, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2598 /* sqdmlal */, AArch64::SQDMLALv1i32_indexed, Convert__Reg1_1__Tie0__Reg1_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_h, MCK_FPR32, MCK_FPR16, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2598 /* sqdmlal */, AArch64::SQDMLALv1i64_indexed, Convert__Reg1_1__Tie0__Reg1_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_s, MCK_FPR64, MCK_FPR32, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2606 /* sqdmlal2 */, AArch64::SQDMLALv4i32_v2i64, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2606 /* sqdmlal2 */, AArch64::SQDMLALv8i16_v4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2606 /* sqdmlal2 */, AArch64::SQDMLALv4i32_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2606 /* sqdmlal2 */, AArch64::SQDMLALv8i16_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2615 /* sqdmlsl */, AArch64::SQDMLSLi16, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR16, MCK_FPR16 }, }, + { 2615 /* sqdmlsl */, AArch64::SQDMLSLi32, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR32, MCK_FPR32 }, }, + { 2615 /* sqdmlsl */, AArch64::SQDMLSLv2i32_v2i64, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2615 /* sqdmlsl */, AArch64::SQDMLSLv4i16_v4i32, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2615 /* sqdmlsl */, AArch64::SQDMLSLv2i32_indexed, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2615 /* sqdmlsl */, AArch64::SQDMLSLv4i16_indexed, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2615 /* sqdmlsl */, AArch64::SQDMLSLv1i32_indexed, Convert__Reg1_1__Tie0__Reg1_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_h, MCK_FPR32, MCK_FPR16, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2615 /* sqdmlsl */, AArch64::SQDMLSLv1i64_indexed, Convert__Reg1_1__Tie0__Reg1_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_s, MCK_FPR64, MCK_FPR32, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2623 /* sqdmlsl2 */, AArch64::SQDMLSLv4i32_v2i64, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2623 /* sqdmlsl2 */, AArch64::SQDMLSLv8i16_v4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2623 /* sqdmlsl2 */, AArch64::SQDMLSLv4i32_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2623 /* sqdmlsl2 */, AArch64::SQDMLSLv8i16_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv1i16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv1i32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv2i32_indexed, Convert__VectorReg641_1__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv4i16_indexed, Convert__VectorReg641_1__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv4i32_indexed, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv8i16_indexed, Convert__VectorReg1281_1__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv1i16_indexed, Convert__Reg1_1__Reg1_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_h, MCK_FPR16, MCK_FPR16, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2632 /* sqdmulh */, AArch64::SQDMULHv1i32_indexed, Convert__Reg1_1__Reg1_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_s, MCK_FPR32, MCK_FPR32, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2640 /* sqdmull */, AArch64::SQDMULLi16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR16, MCK_FPR16 }, }, + { 2640 /* sqdmull */, AArch64::SQDMULLi32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR32, MCK_FPR32 }, }, + { 2640 /* sqdmull */, AArch64::SQDMULLv2i32_v2i64, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2640 /* sqdmull */, AArch64::SQDMULLv4i16_v4i32, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2640 /* sqdmull */, AArch64::SQDMULLv2i32_indexed, Convert__VectorReg1281_1__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2640 /* sqdmull */, AArch64::SQDMULLv4i16_indexed, Convert__VectorReg1281_1__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2640 /* sqdmull */, AArch64::SQDMULLv1i32_indexed, Convert__Reg1_1__Reg1_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_h, MCK_FPR32, MCK_FPR16, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2640 /* sqdmull */, AArch64::SQDMULLv1i64_indexed, Convert__Reg1_1__Reg1_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_s, MCK_FPR64, MCK_FPR32, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2648 /* sqdmull2 */, AArch64::SQDMULLv4i32_v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2648 /* sqdmull2 */, AArch64::SQDMULLv8i16_v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2648 /* sqdmull2 */, AArch64::SQDMULLv4i32_indexed, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2648 /* sqdmull2 */, AArch64::SQDMULLv8i16_indexed, Convert__VectorReg1281_1__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2657 /* sqneg */, AArch64::SQNEGv1i16, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR16, MCK_FPR16 }, }, + { 2657 /* sqneg */, AArch64::SQNEGv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 2657 /* sqneg */, AArch64::SQNEGv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 2657 /* sqneg */, AArch64::SQNEGv1i8, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR8, MCK_FPR8 }, }, + { 2657 /* sqneg */, AArch64::SQNEGv16i8, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2657 /* sqneg */, AArch64::SQNEGv2i64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2657 /* sqneg */, AArch64::SQNEGv2i32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2657 /* sqneg */, AArch64::SQNEGv4i16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2657 /* sqneg */, AArch64::SQNEGv4i32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2657 /* sqneg */, AArch64::SQNEGv8i8, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2657 /* sqneg */, AArch64::SQNEGv8i16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHv1i16, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasV8_1a, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHv1i32, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasV8_1a, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHv2i32, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasV8_1a, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHv4i16, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasV8_1a, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHv4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasV8_1a, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHv8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasV8_1a, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHv2i32_indexed, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON|Feature_HasV8_1a, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHv4i16_indexed, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON|Feature_HasV8_1a, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHv4i32_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON|Feature_HasV8_1a, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHv8i16_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON|Feature_HasV8_1a, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHi16_indexed, Convert__Reg1_1__Tie0__Reg1_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON|Feature_HasV8_1a, { MCK__DOT_h, MCK_FPR16, MCK_FPR16, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2663 /* sqrdmlah */, AArch64::SQRDMLAHi32_indexed, Convert__Reg1_1__Tie0__Reg1_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON|Feature_HasV8_1a, { MCK__DOT_s, MCK_FPR32, MCK_FPR32, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHv1i16, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasV8_1a, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHv1i32, Convert__Reg1_0__Tie0__Reg1_1__Reg1_2, Feature_HasV8_1a, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHv2i32, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasV8_1a, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHv4i16, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON|Feature_HasV8_1a, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHv4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasV8_1a, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHv8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON|Feature_HasV8_1a, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHv2i32_indexed, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON|Feature_HasV8_1a, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHv4i16_indexed, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON|Feature_HasV8_1a, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHv4i32_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON|Feature_HasV8_1a, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHv8i16_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON|Feature_HasV8_1a, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHi16_indexed, Convert__Reg1_1__Tie0__Reg1_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON|Feature_HasV8_1a, { MCK__DOT_h, MCK_FPR16, MCK_FPR16, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2672 /* sqrdmlsh */, AArch64::SQRDMLSHi32_indexed, Convert__Reg1_1__Tie0__Reg1_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON|Feature_HasV8_1a, { MCK__DOT_s, MCK_FPR32, MCK_FPR32, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv1i16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv1i32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv2i32_indexed, Convert__VectorReg641_1__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv4i16_indexed, Convert__VectorReg641_1__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv4i32_indexed, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv8i16_indexed, Convert__VectorReg1281_1__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv1i16_indexed, Convert__Reg1_1__Reg1_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_h, MCK_FPR16, MCK_FPR16, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 2681 /* sqrdmulh */, AArch64::SQRDMULHv1i32_indexed, Convert__Reg1_1__Reg1_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_s, MCK_FPR32, MCK_FPR32, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 2690 /* sqrshl */, AArch64::SQRSHLv1i16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 2690 /* sqrshl */, AArch64::SQRSHLv1i32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 2690 /* sqrshl */, AArch64::SQRSHLv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 2690 /* sqrshl */, AArch64::SQRSHLv1i8, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR8, MCK_FPR8 }, }, + { 2690 /* sqrshl */, AArch64::SQRSHLv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2690 /* sqrshl */, AArch64::SQRSHLv2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2690 /* sqrshl */, AArch64::SQRSHLv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2690 /* sqrshl */, AArch64::SQRSHLv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2690 /* sqrshl */, AArch64::SQRSHLv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2690 /* sqrshl */, AArch64::SQRSHLv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2690 /* sqrshl */, AArch64::SQRSHLv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2697 /* sqrshrn */, AArch64::SQRSHRNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, }, + { 2697 /* sqrshrn */, AArch64::SQRSHRNs, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR64, MCK_Imm1_32 }, }, + { 2697 /* sqrshrn */, AArch64::SQRSHRNb, Convert__Reg1_0__Reg1_1__Imm1_81_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR16, MCK_Imm1_8 }, }, + { 2697 /* sqrshrn */, AArch64::SQRSHRNv2i32_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 2697 /* sqrshrn */, AArch64::SQRSHRNv4i16_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 2697 /* sqrshrn */, AArch64::SQRSHRNv8i8_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 2705 /* sqrshrn2 */, AArch64::SQRSHRNv16i8_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 2705 /* sqrshrn2 */, AArch64::SQRSHRNv4i32_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 2705 /* sqrshrn2 */, AArch64::SQRSHRNv8i16_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 2714 /* sqrshrun */, AArch64::SQRSHRUNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, }, + { 2714 /* sqrshrun */, AArch64::SQRSHRUNs, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR64, MCK_Imm1_32 }, }, + { 2714 /* sqrshrun */, AArch64::SQRSHRUNb, Convert__Reg1_0__Reg1_1__Imm1_81_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR16, MCK_Imm1_8 }, }, + { 2714 /* sqrshrun */, AArch64::SQRSHRUNv2i32_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 2714 /* sqrshrun */, AArch64::SQRSHRUNv4i16_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 2714 /* sqrshrun */, AArch64::SQRSHRUNv8i8_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 2723 /* sqrshrun2 */, AArch64::SQRSHRUNv16i8_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 2723 /* sqrshrun2 */, AArch64::SQRSHRUNv4i32_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 2723 /* sqrshrun2 */, AArch64::SQRSHRUNv8i16_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv1i16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 2733 /* sqshl */, AArch64::SQSHLh, Convert__Reg1_0__Reg1_1__Imm0_151_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv1i32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 2733 /* sqshl */, AArch64::SQSHLs, Convert__Reg1_0__Reg1_1__Imm0_311_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_Imm0_31 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 2733 /* sqshl */, AArch64::SQSHLd, Convert__Reg1_0__Reg1_1__Imm0_631_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm0_63 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv1i8, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR8, MCK_FPR8 }, }, + { 2733 /* sqshl */, AArch64::SQSHLb, Convert__Reg1_0__Reg1_1__Imm0_71_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR8, MCK_Imm0_7 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv16i8_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_71_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_7 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv2i64_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_631_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_63 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv2i32_shift, Convert__VectorReg641_1__VectorReg641_2__Imm0_311_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm0_31 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv4i16_shift, Convert__VectorReg641_1__VectorReg641_2__Imm0_151_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm0_15 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv4i32_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_311_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_31 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv8i8_shift, Convert__VectorReg641_1__VectorReg641_2__Imm0_71_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm0_7 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_151_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_15 }, }, + { 2733 /* sqshl */, AArch64::SQSHLv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2739 /* sqshlu */, AArch64::SQSHLUh, Convert__Reg1_0__Reg1_1__Imm0_151_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15 }, }, + { 2739 /* sqshlu */, AArch64::SQSHLUs, Convert__Reg1_0__Reg1_1__Imm0_311_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_Imm0_31 }, }, + { 2739 /* sqshlu */, AArch64::SQSHLUd, Convert__Reg1_0__Reg1_1__Imm0_631_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm0_63 }, }, + { 2739 /* sqshlu */, AArch64::SQSHLUb, Convert__Reg1_0__Reg1_1__Imm0_71_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR8, MCK_Imm0_7 }, }, + { 2739 /* sqshlu */, AArch64::SQSHLUv16i8_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_71_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_7 }, }, + { 2739 /* sqshlu */, AArch64::SQSHLUv2i64_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_631_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_63 }, }, + { 2739 /* sqshlu */, AArch64::SQSHLUv2i32_shift, Convert__VectorReg641_1__VectorReg641_2__Imm0_311_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm0_31 }, }, + { 2739 /* sqshlu */, AArch64::SQSHLUv4i16_shift, Convert__VectorReg641_1__VectorReg641_2__Imm0_151_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm0_15 }, }, + { 2739 /* sqshlu */, AArch64::SQSHLUv4i32_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_311_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_31 }, }, + { 2739 /* sqshlu */, AArch64::SQSHLUv8i8_shift, Convert__VectorReg641_1__VectorReg641_2__Imm0_71_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm0_7 }, }, + { 2739 /* sqshlu */, AArch64::SQSHLUv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_151_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_15 }, }, + { 2746 /* sqshrn */, AArch64::SQSHRNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, }, + { 2746 /* sqshrn */, AArch64::SQSHRNs, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR64, MCK_Imm1_32 }, }, + { 2746 /* sqshrn */, AArch64::SQSHRNb, Convert__Reg1_0__Reg1_1__Imm1_81_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR16, MCK_Imm1_8 }, }, + { 2746 /* sqshrn */, AArch64::SQSHRNv2i32_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 2746 /* sqshrn */, AArch64::SQSHRNv4i16_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 2746 /* sqshrn */, AArch64::SQSHRNv8i8_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 2753 /* sqshrn2 */, AArch64::SQSHRNv16i8_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 2753 /* sqshrn2 */, AArch64::SQSHRNv4i32_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 2753 /* sqshrn2 */, AArch64::SQSHRNv8i16_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 2761 /* sqshrun */, AArch64::SQSHRUNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, }, + { 2761 /* sqshrun */, AArch64::SQSHRUNs, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR64, MCK_Imm1_32 }, }, + { 2761 /* sqshrun */, AArch64::SQSHRUNb, Convert__Reg1_0__Reg1_1__Imm1_81_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR16, MCK_Imm1_8 }, }, + { 2761 /* sqshrun */, AArch64::SQSHRUNv2i32_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 2761 /* sqshrun */, AArch64::SQSHRUNv4i16_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 2761 /* sqshrun */, AArch64::SQSHRUNv8i8_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 2769 /* sqshrun2 */, AArch64::SQSHRUNv16i8_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 2769 /* sqshrun2 */, AArch64::SQSHRUNv4i32_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 2769 /* sqshrun2 */, AArch64::SQSHRUNv8i16_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 2778 /* sqsub */, AArch64::SQSUBv1i16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 2778 /* sqsub */, AArch64::SQSUBv1i32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 2778 /* sqsub */, AArch64::SQSUBv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 2778 /* sqsub */, AArch64::SQSUBv1i8, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR8, MCK_FPR8 }, }, + { 2778 /* sqsub */, AArch64::SQSUBv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2778 /* sqsub */, AArch64::SQSUBv2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2778 /* sqsub */, AArch64::SQSUBv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2778 /* sqsub */, AArch64::SQSUBv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2778 /* sqsub */, AArch64::SQSUBv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2778 /* sqsub */, AArch64::SQSUBv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2778 /* sqsub */, AArch64::SQSUBv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2784 /* sqxtn */, AArch64::SQXTNv1i16, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR16, MCK_FPR32 }, }, + { 2784 /* sqxtn */, AArch64::SQXTNv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR64 }, }, + { 2784 /* sqxtn */, AArch64::SQXTNv1i8, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR8, MCK_FPR16 }, }, + { 2784 /* sqxtn */, AArch64::SQXTNv2i32, Convert__VectorReg641_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg128 }, }, + { 2784 /* sqxtn */, AArch64::SQXTNv4i16, Convert__VectorReg641_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg128 }, }, + { 2784 /* sqxtn */, AArch64::SQXTNv8i8, Convert__VectorReg641_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg128 }, }, + { 2790 /* sqxtn2 */, AArch64::SQXTNv16i8, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2790 /* sqxtn2 */, AArch64::SQXTNv4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2790 /* sqxtn2 */, AArch64::SQXTNv8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2797 /* sqxtun */, AArch64::SQXTUNv1i16, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR16, MCK_FPR32 }, }, + { 2797 /* sqxtun */, AArch64::SQXTUNv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR64 }, }, + { 2797 /* sqxtun */, AArch64::SQXTUNv1i8, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR8, MCK_FPR16 }, }, + { 2797 /* sqxtun */, AArch64::SQXTUNv2i32, Convert__VectorReg641_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg128 }, }, + { 2797 /* sqxtun */, AArch64::SQXTUNv4i16, Convert__VectorReg641_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg128 }, }, + { 2797 /* sqxtun */, AArch64::SQXTUNv8i8, Convert__VectorReg641_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg128 }, }, + { 2804 /* sqxtun2 */, AArch64::SQXTUNv16i8, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2804 /* sqxtun2 */, AArch64::SQXTUNv4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2804 /* sqxtun2 */, AArch64::SQXTUNv8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2812 /* srhadd */, AArch64::SRHADDv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2812 /* srhadd */, AArch64::SRHADDv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2812 /* srhadd */, AArch64::SRHADDv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2812 /* srhadd */, AArch64::SRHADDv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2812 /* srhadd */, AArch64::SRHADDv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2812 /* srhadd */, AArch64::SRHADDv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2819 /* sri */, AArch64::SRId, Convert__Reg1_0__Tie0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 2819 /* sri */, AArch64::SRIv16i8_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 2819 /* sri */, AArch64::SRIv2i64_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_64 }, }, + { 2819 /* sri */, AArch64::SRIv2i32_shift, Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_32 }, }, + { 2819 /* sri */, AArch64::SRIv4i16_shift, Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_16 }, }, + { 2819 /* sri */, AArch64::SRIv4i32_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 2819 /* sri */, AArch64::SRIv8i8_shift, Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_8 }, }, + { 2819 /* sri */, AArch64::SRIv8i16_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 2823 /* srshl */, AArch64::SRSHLv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 2823 /* srshl */, AArch64::SRSHLv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2823 /* srshl */, AArch64::SRSHLv2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2823 /* srshl */, AArch64::SRSHLv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2823 /* srshl */, AArch64::SRSHLv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2823 /* srshl */, AArch64::SRSHLv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2823 /* srshl */, AArch64::SRSHLv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2823 /* srshl */, AArch64::SRSHLv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2829 /* srshr */, AArch64::SRSHRd, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 2829 /* srshr */, AArch64::SRSHRv16i8_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 2829 /* srshr */, AArch64::SRSHRv2i64_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_64 }, }, + { 2829 /* srshr */, AArch64::SRSHRv2i32_shift, Convert__VectorReg641_1__VectorReg641_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_32 }, }, + { 2829 /* srshr */, AArch64::SRSHRv4i16_shift, Convert__VectorReg641_1__VectorReg641_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_16 }, }, + { 2829 /* srshr */, AArch64::SRSHRv4i32_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 2829 /* srshr */, AArch64::SRSHRv8i8_shift, Convert__VectorReg641_1__VectorReg641_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_8 }, }, + { 2829 /* srshr */, AArch64::SRSHRv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 2835 /* srsra */, AArch64::SRSRAd, Convert__Reg1_0__Tie0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 2835 /* srsra */, AArch64::SRSRAv16i8_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 2835 /* srsra */, AArch64::SRSRAv2i64_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_64 }, }, + { 2835 /* srsra */, AArch64::SRSRAv2i32_shift, Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_32 }, }, + { 2835 /* srsra */, AArch64::SRSRAv4i16_shift, Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_16 }, }, + { 2835 /* srsra */, AArch64::SRSRAv4i32_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 2835 /* srsra */, AArch64::SRSRAv8i8_shift, Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_8 }, }, + { 2835 /* srsra */, AArch64::SRSRAv8i16_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 2841 /* sshl */, AArch64::SSHLv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 2841 /* sshl */, AArch64::SSHLv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2841 /* sshl */, AArch64::SSHLv2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2841 /* sshl */, AArch64::SSHLv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2841 /* sshl */, AArch64::SSHLv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2841 /* sshl */, AArch64::SSHLv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2841 /* sshl */, AArch64::SSHLv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2841 /* sshl */, AArch64::SSHLv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2846 /* sshll */, AArch64::SSHLLv2i32_shift, Convert__VectorReg1281_1__VectorReg641_2__Imm0_311_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_Imm0_31 }, }, + { 2846 /* sshll */, AArch64::SSHLLv4i16_shift, Convert__VectorReg1281_1__VectorReg641_2__Imm0_151_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_Imm0_15 }, }, + { 2846 /* sshll */, AArch64::SSHLLv8i8_shift, Convert__VectorReg1281_1__VectorReg641_2__Imm0_71_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg64, MCK_Imm0_7 }, }, + { 2852 /* sshll2 */, AArch64::SSHLLv4i32_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_311_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_31 }, }, + { 2852 /* sshll2 */, AArch64::SSHLLv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_151_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_15 }, }, + { 2852 /* sshll2 */, AArch64::SSHLLv16i8_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_71_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_7 }, }, + { 2859 /* sshr */, AArch64::SSHRd, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 2859 /* sshr */, AArch64::SSHRv16i8_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 2859 /* sshr */, AArch64::SSHRv2i64_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_64 }, }, + { 2859 /* sshr */, AArch64::SSHRv2i32_shift, Convert__VectorReg641_1__VectorReg641_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_32 }, }, + { 2859 /* sshr */, AArch64::SSHRv4i16_shift, Convert__VectorReg641_1__VectorReg641_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_16 }, }, + { 2859 /* sshr */, AArch64::SSHRv4i32_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 2859 /* sshr */, AArch64::SSHRv8i8_shift, Convert__VectorReg641_1__VectorReg641_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_8 }, }, + { 2859 /* sshr */, AArch64::SSHRv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 2864 /* ssra */, AArch64::SSRAd, Convert__Reg1_0__Tie0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 2864 /* ssra */, AArch64::SSRAv16i8_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 2864 /* ssra */, AArch64::SSRAv2i64_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_64 }, }, + { 2864 /* ssra */, AArch64::SSRAv2i32_shift, Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_32 }, }, + { 2864 /* ssra */, AArch64::SSRAv4i16_shift, Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_16 }, }, + { 2864 /* ssra */, AArch64::SSRAv4i32_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 2864 /* ssra */, AArch64::SSRAv8i8_shift, Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_8 }, }, + { 2864 /* ssra */, AArch64::SSRAv8i16_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 2869 /* ssubl */, AArch64::SSUBLv2i32_v2i64, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2869 /* ssubl */, AArch64::SSUBLv4i16_v4i32, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2869 /* ssubl */, AArch64::SSUBLv8i8_v8i16, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 2875 /* ssubl2 */, AArch64::SSUBLv4i32_v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2875 /* ssubl2 */, AArch64::SSUBLv8i16_v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2875 /* ssubl2 */, AArch64::SSUBLv16i8_v8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2882 /* ssubw */, AArch64::SSUBWv2i32_v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 2882 /* ssubw */, AArch64::SSUBWv4i16_v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 2882 /* ssubw */, AArch64::SSUBWv8i8_v8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 2888 /* ssubw2 */, AArch64::SSUBWv4i32_v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2888 /* ssubw2 */, AArch64::SSUBWv8i16_v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2888 /* ssubw2 */, AArch64::SSUBWv16i8_v8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv16b, Convert__TypedVectorList4_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv1d, Convert__TypedVectorList4_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2d, Convert__TypedVectorList4_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2s, Convert__TypedVectorList4_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4h, Convert__TypedVectorList4_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4s, Convert__TypedVectorList4_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8b, Convert__TypedVectorList4_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8h, Convert__TypedVectorList4_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev16b, Convert__TypedVectorList1_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev1d, Convert__TypedVectorList1_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev2d, Convert__TypedVectorList1_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev2s, Convert__TypedVectorList1_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev4h, Convert__TypedVectorList1_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev4s, Convert__TypedVectorList1_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev8b, Convert__TypedVectorList1_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev8h, Convert__TypedVectorList1_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList1_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev16b, Convert__TypedVectorList3_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev1d, Convert__TypedVectorList3_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev2d, Convert__TypedVectorList3_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev2s, Convert__TypedVectorList3_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev4h, Convert__TypedVectorList3_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev4s, Convert__TypedVectorList3_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev8b, Convert__TypedVectorList3_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev8h, Convert__TypedVectorList3_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov16b, Convert__TypedVectorList2_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov1d, Convert__TypedVectorList2_1d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_1d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov2d, Convert__TypedVectorList2_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov2s, Convert__TypedVectorList2_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov4h, Convert__TypedVectorList2_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov4s, Convert__TypedVectorList2_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov8b, Convert__TypedVectorList2_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov8h, Convert__TypedVectorList2_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv16b, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev16b, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev16b, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov16b, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv1d, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev1d, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev1d, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov1d, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2d, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev2d, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev2d, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov2d, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2s, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev2s, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev2s, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov2s, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4h, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev4h, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev4h, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov4h, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4s, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev4s, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev4s, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov4s, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8b, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev8b, Convert__VecListOne641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev8b, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov8b, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8h, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Onev8h, Convert__VecListOne1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev8h, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Twov8h, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Fourv16b_POST, Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv16b_POST, Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv1d_POST, Convert__Reg1_2__TypedVectorList4_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv1d_POST, Convert__Reg1_2__TypedVectorList4_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2d_POST, Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2d_POST, Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2s_POST, Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2s_POST, Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4h_POST, Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4h_POST, Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8b_POST, Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8b_POST, Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8h_POST, Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8h_POST, Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev16b_POST, Convert__Reg1_2__TypedVectorList1_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Onev16b_POST, Convert__Reg1_2__TypedVectorList1_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev1d_POST, Convert__Reg1_2__TypedVectorList1_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2895 /* st1 */, AArch64::ST1Onev1d_POST, Convert__Reg1_2__TypedVectorList1_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev2d_POST, Convert__Reg1_2__TypedVectorList1_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Onev2d_POST, Convert__Reg1_2__TypedVectorList1_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev2s_POST, Convert__Reg1_2__TypedVectorList1_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2895 /* st1 */, AArch64::ST1Onev2s_POST, Convert__Reg1_2__TypedVectorList1_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev4h_POST, Convert__Reg1_2__TypedVectorList1_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2895 /* st1 */, AArch64::ST1Onev4h_POST, Convert__Reg1_2__TypedVectorList1_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev4s_POST, Convert__Reg1_2__TypedVectorList1_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Onev4s_POST, Convert__Reg1_2__TypedVectorList1_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev8b_POST, Convert__Reg1_2__TypedVectorList1_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2895 /* st1 */, AArch64::ST1Onev8b_POST, Convert__Reg1_2__TypedVectorList1_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev8h_POST, Convert__Reg1_2__TypedVectorList1_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Onev8h_POST, Convert__Reg1_2__TypedVectorList1_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList1_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1i8, Convert__TypedVectorList1_0b1_0__VectorIndexB1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList1_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1i64, Convert__TypedVectorList1_0d1_0__VectorIndexD1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList1_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1i16, Convert__TypedVectorList1_0h1_0__VectorIndexH1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList1_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1i32, Convert__TypedVectorList1_0s1_0__VectorIndexS1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList1_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1Threev16b_POST, Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2895 /* st1 */, AArch64::ST1Threev16b_POST, Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev1d_POST, Convert__Reg1_2__TypedVectorList3_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2895 /* st1 */, AArch64::ST1Threev1d_POST, Convert__Reg1_2__TypedVectorList3_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2895 /* st1 */, AArch64::ST1Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2895 /* st1 */, AArch64::ST1Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2895 /* st1 */, AArch64::ST1Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2895 /* st1 */, AArch64::ST1Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev8b_POST, Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2895 /* st1 */, AArch64::ST1Threev8b_POST, Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev8h_POST, Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2895 /* st1 */, AArch64::ST1Threev8h_POST, Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov16b_POST, Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Twov16b_POST, Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov1d_POST, Convert__Reg1_2__TypedVectorList2_1d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Twov1d_POST, Convert__Reg1_2__TypedVectorList2_1d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_1d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov2s_POST, Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Twov2s_POST, Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov4h_POST, Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Twov4h_POST, Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov4s_POST, Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Twov4s_POST, Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov8b_POST, Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Twov8b_POST, Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov8h_POST, Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Twov8h_POST, Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv16b_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv16b_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev16b_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Onev16b_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2895 /* st1 */, AArch64::ST1Threev16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Twov16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv1d_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv1d_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev1d_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2895 /* st1 */, AArch64::ST1Onev1d_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev1d_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2895 /* st1 */, AArch64::ST1Threev1d_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov1d_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Twov1d_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev2d_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Onev2d_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev2d_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2895 /* st1 */, AArch64::ST1Threev2d_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov2d_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Twov2d_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev2s_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2895 /* st1 */, AArch64::ST1Onev2s_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2895 /* st1 */, AArch64::ST1Threev2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Twov2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev4h_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2895 /* st1 */, AArch64::ST1Onev4h_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev4h_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2895 /* st1 */, AArch64::ST1Threev4h_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov4h_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Twov4h_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev4s_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Onev4s_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2895 /* st1 */, AArch64::ST1Threev4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov4s_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Twov4s_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev8b_POST, Convert__Reg1_3__VecListOne641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2895 /* st1 */, AArch64::ST1Onev8b_POST, Convert__Reg1_3__VecListOne641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListOne64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev8b_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2895 /* st1 */, AArch64::ST1Threev8b_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Twov8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2895 /* st1 */, AArch64::ST1Fourv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Onev8h_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2895 /* st1 */, AArch64::ST1Onev8h_POST, Convert__Reg1_3__VecListOne1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListOne128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Threev8h_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2895 /* st1 */, AArch64::ST1Threev8h_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1Twov8h_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2895 /* st1 */, AArch64::ST1Twov8h_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1i8, Convert__VecListOne1281_1__VectorIndexB1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_b, MCK_VecListOne128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1i64, Convert__VecListOne1281_1__VectorIndexD1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_d, MCK_VecListOne128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1i16, Convert__VecListOne1281_1__VectorIndexH1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_h, MCK_VecListOne128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1i32, Convert__VecListOne1281_1__VectorIndexS1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_s, MCK_VecListOne128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2895 /* st1 */, AArch64::ST1i8_POST, Convert__Reg1_3__TypedVectorList1_0b1_0__VectorIndexB1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_1 }, }, + { 2895 /* st1 */, AArch64::ST1i8_POST, Convert__Reg1_3__TypedVectorList1_0b1_0__VectorIndexB1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList1_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1i64_POST, Convert__Reg1_3__TypedVectorList1_0d1_0__VectorIndexD1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2895 /* st1 */, AArch64::ST1i64_POST, Convert__Reg1_3__TypedVectorList1_0d1_0__VectorIndexD1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList1_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1i16_POST, Convert__Reg1_3__TypedVectorList1_0h1_0__VectorIndexH1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 2895 /* st1 */, AArch64::ST1i16_POST, Convert__Reg1_3__TypedVectorList1_0h1_0__VectorIndexH1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList1_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1i32_POST, Convert__Reg1_3__TypedVectorList1_0s1_0__VectorIndexS1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList1_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 2895 /* st1 */, AArch64::ST1i32_POST, Convert__Reg1_3__TypedVectorList1_0s1_0__VectorIndexS1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList1_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1i8_POST, Convert__Reg1_4__VecListOne1281_1__VectorIndexB1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_b, MCK_VecListOne128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_1 }, }, + { 2895 /* st1 */, AArch64::ST1i8_POST, Convert__Reg1_4__VecListOne1281_1__VectorIndexB1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_b, MCK_VecListOne128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1i64_POST, Convert__Reg1_4__VecListOne1281_1__VectorIndexD1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_d, MCK_VecListOne128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2895 /* st1 */, AArch64::ST1i64_POST, Convert__Reg1_4__VecListOne1281_1__VectorIndexD1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_d, MCK_VecListOne128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1i16_POST, Convert__Reg1_4__VecListOne1281_1__VectorIndexH1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_h, MCK_VecListOne128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 2895 /* st1 */, AArch64::ST1i16_POST, Convert__Reg1_4__VecListOne1281_1__VectorIndexH1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_h, MCK_VecListOne128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2895 /* st1 */, AArch64::ST1i32_POST, Convert__Reg1_4__VecListOne1281_1__VectorIndexS1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_s, MCK_VecListOne128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 2895 /* st1 */, AArch64::ST1i32_POST, Convert__Reg1_4__VecListOne1281_1__VectorIndexS1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_s, MCK_VecListOne128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov16b, Convert__TypedVectorList2_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov2d, Convert__TypedVectorList2_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov2s, Convert__TypedVectorList2_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov4h, Convert__TypedVectorList2_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov4s, Convert__TypedVectorList2_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov8b, Convert__TypedVectorList2_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov8h, Convert__TypedVectorList2_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov16b, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov2d, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov2s, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov4h, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov4s, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov8b, Convert__VecListTwo641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov8h, Convert__VecListTwo1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov16b_POST, Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2899 /* st2 */, AArch64::ST2Twov16b_POST, Convert__Reg1_2__TypedVectorList2_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2899 /* st2 */, AArch64::ST2Twov2d_POST, Convert__Reg1_2__TypedVectorList2_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov2s_POST, Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2899 /* st2 */, AArch64::ST2Twov2s_POST, Convert__Reg1_2__TypedVectorList2_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov4h_POST, Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2899 /* st2 */, AArch64::ST2Twov4h_POST, Convert__Reg1_2__TypedVectorList2_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov4s_POST, Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2899 /* st2 */, AArch64::ST2Twov4s_POST, Convert__Reg1_2__TypedVectorList2_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov8b_POST, Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2899 /* st2 */, AArch64::ST2Twov8b_POST, Convert__Reg1_2__TypedVectorList2_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov8h_POST, Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2899 /* st2 */, AArch64::ST2Twov8h_POST, Convert__Reg1_2__TypedVectorList2_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList2_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2i8, Convert__TypedVectorList2_0b1_0__VectorIndexB1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList2_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2i64, Convert__TypedVectorList2_0d1_0__VectorIndexD1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList2_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2i16, Convert__TypedVectorList2_0h1_0__VectorIndexH1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList2_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2i32, Convert__TypedVectorList2_0s1_0__VectorIndexS1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList2_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2Twov16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2899 /* st2 */, AArch64::ST2Twov16b_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov2d_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2899 /* st2 */, AArch64::ST2Twov2d_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2899 /* st2 */, AArch64::ST2Twov2s_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov4h_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2899 /* st2 */, AArch64::ST2Twov4h_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov4s_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2899 /* st2 */, AArch64::ST2Twov4s_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2899 /* st2 */, AArch64::ST2Twov8b_POST, Convert__Reg1_3__VecListTwo641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2Twov8h_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2899 /* st2 */, AArch64::ST2Twov8h_POST, Convert__Reg1_3__VecListTwo1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListTwo128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2i8, Convert__VecListTwo1281_1__VectorIndexB1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_b, MCK_VecListTwo128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2i64, Convert__VecListTwo1281_1__VectorIndexD1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_d, MCK_VecListTwo128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2i16, Convert__VecListTwo1281_1__VectorIndexH1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_h, MCK_VecListTwo128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2i32, Convert__VecListTwo1281_1__VectorIndexS1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_s, MCK_VecListTwo128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2899 /* st2 */, AArch64::ST2i8_POST, Convert__Reg1_3__TypedVectorList2_0b1_0__VectorIndexB1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 2899 /* st2 */, AArch64::ST2i8_POST, Convert__Reg1_3__TypedVectorList2_0b1_0__VectorIndexB1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList2_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2i64_POST, Convert__Reg1_3__TypedVectorList2_0d1_0__VectorIndexD1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2899 /* st2 */, AArch64::ST2i64_POST, Convert__Reg1_3__TypedVectorList2_0d1_0__VectorIndexD1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList2_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2i16_POST, Convert__Reg1_3__TypedVectorList2_0h1_0__VectorIndexH1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 2899 /* st2 */, AArch64::ST2i16_POST, Convert__Reg1_3__TypedVectorList2_0h1_0__VectorIndexH1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList2_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2i32_POST, Convert__Reg1_3__TypedVectorList2_0s1_0__VectorIndexS1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList2_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2899 /* st2 */, AArch64::ST2i32_POST, Convert__Reg1_3__TypedVectorList2_0s1_0__VectorIndexS1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList2_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2i8_POST, Convert__Reg1_4__VecListTwo1281_1__VectorIndexB1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_b, MCK_VecListTwo128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_2 }, }, + { 2899 /* st2 */, AArch64::ST2i8_POST, Convert__Reg1_4__VecListTwo1281_1__VectorIndexB1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_b, MCK_VecListTwo128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2i64_POST, Convert__Reg1_4__VecListTwo1281_1__VectorIndexD1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_d, MCK_VecListTwo128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2899 /* st2 */, AArch64::ST2i64_POST, Convert__Reg1_4__VecListTwo1281_1__VectorIndexD1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_d, MCK_VecListTwo128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2i16_POST, Convert__Reg1_4__VecListTwo1281_1__VectorIndexH1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_h, MCK_VecListTwo128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 2899 /* st2 */, AArch64::ST2i16_POST, Convert__Reg1_4__VecListTwo1281_1__VectorIndexH1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_h, MCK_VecListTwo128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2899 /* st2 */, AArch64::ST2i32_POST, Convert__Reg1_4__VecListTwo1281_1__VectorIndexS1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_s, MCK_VecListTwo128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2899 /* st2 */, AArch64::ST2i32_POST, Convert__Reg1_4__VecListTwo1281_1__VectorIndexS1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_s, MCK_VecListTwo128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev16b, Convert__TypedVectorList3_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev2d, Convert__TypedVectorList3_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev2s, Convert__TypedVectorList3_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev4h, Convert__TypedVectorList3_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev4s, Convert__TypedVectorList3_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev8b, Convert__TypedVectorList3_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev8h, Convert__TypedVectorList3_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev16b, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev2d, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev2s, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev4h, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev4s, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev8b, Convert__VecListThree641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev8h, Convert__VecListThree1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev16b_POST, Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2903 /* st3 */, AArch64::ST3Threev16b_POST, Convert__Reg1_2__TypedVectorList3_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2903 /* st3 */, AArch64::ST3Threev2d_POST, Convert__Reg1_2__TypedVectorList3_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2903 /* st3 */, AArch64::ST3Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2903 /* st3 */, AArch64::ST3Threev4h_POST, Convert__Reg1_2__TypedVectorList3_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2903 /* st3 */, AArch64::ST3Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev8b_POST, Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2903 /* st3 */, AArch64::ST3Threev8b_POST, Convert__Reg1_2__TypedVectorList3_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev8h_POST, Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2903 /* st3 */, AArch64::ST3Threev8h_POST, Convert__Reg1_2__TypedVectorList3_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList3_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3i8, Convert__TypedVectorList3_0b1_0__VectorIndexB1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList3_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3i64, Convert__TypedVectorList3_0d1_0__VectorIndexD1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList3_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3i16, Convert__TypedVectorList3_0h1_0__VectorIndexH1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList3_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3i32, Convert__TypedVectorList3_0s1_0__VectorIndexS1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList3_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3Threev16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2903 /* st3 */, AArch64::ST3Threev16b_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev2d_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2903 /* st3 */, AArch64::ST3Threev2d_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2903 /* st3 */, AArch64::ST3Threev2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev4h_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2903 /* st3 */, AArch64::ST3Threev4h_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2903 /* st3 */, AArch64::ST3Threev4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev8b_POST, Convert__Reg1_3__VecListThree641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2903 /* st3 */, AArch64::ST3Threev8b_POST, Convert__Reg1_3__VecListThree641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3Threev8h_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_48 }, }, + { 2903 /* st3 */, AArch64::ST3Threev8h_POST, Convert__Reg1_3__VecListThree1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3i8, Convert__VecListThree1281_1__VectorIndexB1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_b, MCK_VecListThree128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3i64, Convert__VecListThree1281_1__VectorIndexD1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_d, MCK_VecListThree128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3i16, Convert__VecListThree1281_1__VectorIndexH1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_h, MCK_VecListThree128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3i32, Convert__VecListThree1281_1__VectorIndexS1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_s, MCK_VecListThree128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2903 /* st3 */, AArch64::ST3i8_POST, Convert__Reg1_3__TypedVectorList3_0b1_0__VectorIndexB1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_3 }, }, + { 2903 /* st3 */, AArch64::ST3i8_POST, Convert__Reg1_3__TypedVectorList3_0b1_0__VectorIndexB1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList3_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3i64_POST, Convert__Reg1_3__TypedVectorList3_0d1_0__VectorIndexD1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2903 /* st3 */, AArch64::ST3i64_POST, Convert__Reg1_3__TypedVectorList3_0d1_0__VectorIndexD1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList3_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3i16_POST, Convert__Reg1_3__TypedVectorList3_0h1_0__VectorIndexH1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_6 }, }, + { 2903 /* st3 */, AArch64::ST3i16_POST, Convert__Reg1_3__TypedVectorList3_0h1_0__VectorIndexH1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList3_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3i32_POST, Convert__Reg1_3__TypedVectorList3_0s1_0__VectorIndexS1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList3_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_12 }, }, + { 2903 /* st3 */, AArch64::ST3i32_POST, Convert__Reg1_3__TypedVectorList3_0s1_0__VectorIndexS1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList3_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3i8_POST, Convert__Reg1_4__VecListThree1281_1__VectorIndexB1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_b, MCK_VecListThree128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_3 }, }, + { 2903 /* st3 */, AArch64::ST3i8_POST, Convert__Reg1_4__VecListThree1281_1__VectorIndexB1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_b, MCK_VecListThree128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3i64_POST, Convert__Reg1_4__VecListThree1281_1__VectorIndexD1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_d, MCK_VecListThree128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_24 }, }, + { 2903 /* st3 */, AArch64::ST3i64_POST, Convert__Reg1_4__VecListThree1281_1__VectorIndexD1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_d, MCK_VecListThree128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3i16_POST, Convert__Reg1_4__VecListThree1281_1__VectorIndexH1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_h, MCK_VecListThree128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_6 }, }, + { 2903 /* st3 */, AArch64::ST3i16_POST, Convert__Reg1_4__VecListThree1281_1__VectorIndexH1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_h, MCK_VecListThree128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2903 /* st3 */, AArch64::ST3i32_POST, Convert__Reg1_4__VecListThree1281_1__VectorIndexS1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_s, MCK_VecListThree128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_12 }, }, + { 2903 /* st3 */, AArch64::ST3i32_POST, Convert__Reg1_4__VecListThree1281_1__VectorIndexS1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_s, MCK_VecListThree128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv16b, Convert__TypedVectorList4_16b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2d, Convert__TypedVectorList4_2d1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2s, Convert__TypedVectorList4_2s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4h, Convert__TypedVectorList4_4h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4s, Convert__TypedVectorList4_4s1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8b, Convert__TypedVectorList4_8b1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8h, Convert__TypedVectorList4_8h1_0__Reg1_2, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv16b, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2d, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2s, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4h, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4s, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8b, Convert__VecListFour641_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8h, Convert__VecListFour1281_1__Reg1_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv16b_POST, Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv16b_POST, Convert__Reg1_2__TypedVectorList4_16b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_16b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2d_POST, Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2d_POST, Convert__Reg1_2__TypedVectorList4_2d1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_2d, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2s_POST, Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2s_POST, Convert__Reg1_2__TypedVectorList4_2s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_2s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4h_POST, Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4h_POST, Convert__Reg1_2__TypedVectorList4_4h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_4h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4s_POST, Convert__Reg1_2__TypedVectorList4_4s1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_4s, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8b_POST, Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8b_POST, Convert__Reg1_2__TypedVectorList4_8b1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_8b, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8h_POST, Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8h_POST, Convert__Reg1_2__TypedVectorList4_8h1_0__Tie0__Reg1_4, Feature_HasNEON, { MCK_TypedVectorList4_8h, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4i8, Convert__TypedVectorList4_0b1_0__VectorIndexB1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList4_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4i64, Convert__TypedVectorList4_0d1_0__VectorIndexD1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList4_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4i16, Convert__TypedVectorList4_0h1_0__VectorIndexH1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList4_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4i32, Convert__TypedVectorList4_0s1_0__VectorIndexS1_1__Reg1_3, Feature_HasNEON, { MCK_TypedVectorList4_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4Fourv16b_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv16b_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_16b, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2d_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2d, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv2s_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_2s, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv4s_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_4s, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8b_POST, Convert__Reg1_3__VecListFour641_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8b, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_64 }, }, + { 2907 /* st4 */, AArch64::ST4Fourv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0__Reg1_5, Feature_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4i8, Convert__VecListFour1281_1__VectorIndexB1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_b, MCK_VecListFour128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4i64, Convert__VecListFour1281_1__VectorIndexD1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_d, MCK_VecListFour128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4i16, Convert__VecListFour1281_1__VectorIndexH1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_h, MCK_VecListFour128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4i32, Convert__VecListFour1281_1__VectorIndexS1_2__Reg1_4, Feature_HasNEON, { MCK__DOT_s, MCK_VecListFour128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2907 /* st4 */, AArch64::ST4i8_POST, Convert__Reg1_3__TypedVectorList4_0b1_0__VectorIndexB1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 2907 /* st4 */, AArch64::ST4i8_POST, Convert__Reg1_3__TypedVectorList4_0b1_0__VectorIndexB1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList4_0b, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4i64_POST, Convert__Reg1_3__TypedVectorList4_0d1_0__VectorIndexD1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2907 /* st4 */, AArch64::ST4i64_POST, Convert__Reg1_3__TypedVectorList4_0d1_0__VectorIndexD1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList4_0d, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4i16_POST, Convert__Reg1_3__TypedVectorList4_0h1_0__VectorIndexH1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2907 /* st4 */, AArch64::ST4i16_POST, Convert__Reg1_3__TypedVectorList4_0h1_0__VectorIndexH1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList4_0h, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4i32_POST, Convert__Reg1_3__TypedVectorList4_0s1_0__VectorIndexS1_1__Tie0__regXZR, Feature_HasNEON, { MCK_TypedVectorList4_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2907 /* st4 */, AArch64::ST4i32_POST, Convert__Reg1_3__TypedVectorList4_0s1_0__VectorIndexS1_1__Tie0__Reg1_5, Feature_HasNEON, { MCK_TypedVectorList4_0s, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4i8_POST, Convert__Reg1_4__VecListFour1281_1__VectorIndexB1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_b, MCK_VecListFour128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_4 }, }, + { 2907 /* st4 */, AArch64::ST4i8_POST, Convert__Reg1_4__VecListFour1281_1__VectorIndexB1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_b, MCK_VecListFour128, MCK_VectorIndexB, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4i64_POST, Convert__Reg1_4__VecListFour1281_1__VectorIndexD1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_d, MCK_VecListFour128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_32 }, }, + { 2907 /* st4 */, AArch64::ST4i64_POST, Convert__Reg1_4__VecListFour1281_1__VectorIndexD1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_d, MCK_VecListFour128, MCK_VectorIndexD, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4i16_POST, Convert__Reg1_4__VecListFour1281_1__VectorIndexH1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_h, MCK_VecListFour128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_8 }, }, + { 2907 /* st4 */, AArch64::ST4i16_POST, Convert__Reg1_4__VecListFour1281_1__VectorIndexH1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_h, MCK_VecListFour128, MCK_VectorIndexH, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2907 /* st4 */, AArch64::ST4i32_POST, Convert__Reg1_4__VecListFour1281_1__VectorIndexS1_2__Tie0__regXZR, Feature_HasNEON, { MCK__DOT_s, MCK_VecListFour128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__35_16 }, }, + { 2907 /* st4 */, AArch64::ST4i32_POST, Convert__Reg1_4__VecListFour1281_1__VectorIndexS1_2__Tie0__Reg1_6, Feature_HasNEON, { MCK__DOT_s, MCK_VecListFour128, MCK_VectorIndexS, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, }, + { 2911 /* stadd */, AArch64::LDADDs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2911 /* stadd */, AArch64::LDADDd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2917 /* staddb */, AArch64::LDADDb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2924 /* staddh */, AArch64::LDADDh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2931 /* staddl */, AArch64::LDADDLs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2931 /* staddl */, AArch64::LDADDLd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2938 /* staddlb */, AArch64::LDADDLb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2946 /* staddlh */, AArch64::LDADDLh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2954 /* stclr */, AArch64::LDCLRs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2954 /* stclr */, AArch64::LDCLRd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2960 /* stclrb */, AArch64::LDCLRb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2967 /* stclrh */, AArch64::LDCLRh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2974 /* stclrl */, AArch64::LDCLRLs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2974 /* stclrl */, AArch64::LDCLRLd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2981 /* stclrlb */, AArch64::LDCLRLb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2989 /* stclrlh */, AArch64::LDCLRLh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2997 /* steor */, AArch64::LDEORs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 2997 /* steor */, AArch64::LDEORd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3003 /* steorb */, AArch64::LDEORb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3010 /* steorh */, AArch64::LDEORh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3017 /* steorl */, AArch64::LDEORLs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3017 /* steorl */, AArch64::LDEORLd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3024 /* steorlb */, AArch64::LDEORLb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3032 /* steorlh */, AArch64::LDEORLh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3040 /* stllr */, AArch64::STLLRW, Convert__Reg1_0__GPR64sp01_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3040 /* stllr */, AArch64::STLLRX, Convert__Reg1_0__GPR64sp01_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3046 /* stllrb */, AArch64::STLLRB, Convert__Reg1_0__GPR64sp01_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3053 /* stllrh */, AArch64::STLLRH, Convert__Reg1_0__GPR64sp01_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3060 /* stlr */, AArch64::STLRW, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3060 /* stlr */, AArch64::STLRX, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3065 /* stlrb */, AArch64::STLRB, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3071 /* stlrh */, AArch64::STLRH, Convert__Reg1_0__GPR64sp01_2, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3077 /* stlxp */, AArch64::STLXPW, Convert__Reg1_0__Reg1_1__Reg1_2__GPR64sp01_4, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3077 /* stlxp */, AArch64::STLXPX, Convert__Reg1_0__Reg1_1__Reg1_2__GPR64sp01_4, 0, { MCK_GPR32, MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3083 /* stlxr */, AArch64::STLXRW, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3083 /* stlxr */, AArch64::STLXRX, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR32, MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3089 /* stlxrb */, AArch64::STLXRB, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3096 /* stlxrh */, AArch64::STLXRH, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3103 /* stnp */, AArch64::STNPQi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3103 /* stnp */, AArch64::STNPSi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3103 /* stnp */, AArch64::STNPDi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3103 /* stnp */, AArch64::STNPWi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3103 /* stnp */, AArch64::STNPXi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3103 /* stnp */, AArch64::STNPQi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s161_4, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm7s16, MCK__93_ }, }, + { 3103 /* stnp */, AArch64::STNPSi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s41_4, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_ }, }, + { 3103 /* stnp */, AArch64::STNPDi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, }, + { 3103 /* stnp */, AArch64::STNPWi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s41_4, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_ }, }, + { 3103 /* stnp */, AArch64::STNPXi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, }, + { 3108 /* stp */, AArch64::STPQi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3108 /* stp */, AArch64::STPSi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3108 /* stp */, AArch64::STPDi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3108 /* stp */, AArch64::STPWi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3108 /* stp */, AArch64::STPXi, Convert__Reg1_0__Reg1_1__Reg1_3__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3108 /* stp */, AArch64::STPQpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s161_5, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s16 }, }, + { 3108 /* stp */, AArch64::STPQi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s161_4, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm7s16, MCK__93_ }, }, + { 3108 /* stp */, AArch64::STPSpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_5, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s4 }, }, + { 3108 /* stp */, AArch64::STPSi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s41_4, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_ }, }, + { 3108 /* stp */, AArch64::STPDpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s81_5, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s8 }, }, + { 3108 /* stp */, AArch64::STPDi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, }, + { 3108 /* stp */, AArch64::STPWpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_5, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s4 }, }, + { 3108 /* stp */, AArch64::STPWi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s41_4, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_ }, }, + { 3108 /* stp */, AArch64::STPXpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s81_5, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s8 }, }, + { 3108 /* stp */, AArch64::STPXi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, }, + { 3108 /* stp */, AArch64::STPQpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s161_4, 0, { MCK_FPR128, MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm7s16, MCK__93_, MCK__EXCLAIM_ }, }, + { 3108 /* stp */, AArch64::STPSpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_4, 0, { MCK_FPR32, MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_, MCK__EXCLAIM_ }, }, + { 3108 /* stp */, AArch64::STPDpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s81_4, 0, { MCK_FPR64, MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_, MCK__EXCLAIM_ }, }, + { 3108 /* stp */, AArch64::STPWpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s41_4, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm7s4, MCK__93_, MCK__EXCLAIM_ }, }, + { 3108 /* stp */, AArch64::STPXpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0__SImm7s81_4, 0, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_, MCK__EXCLAIM_ }, }, + { 3112 /* str */, AArch64::STRQui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRHui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRSui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRDui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRBui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRWui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRXui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRQpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 3112 /* str */, AArch64::STRQroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STURQi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB1281_3, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB128, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRQui, Convert__Reg1_0__Reg1_2__UImm12Offset161_3, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset16, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRHpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 3112 /* str */, AArch64::STRHroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STURHi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB161_3, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB16, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRHui, Convert__Reg1_0__Reg1_2__UImm12Offset21_3, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset2, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRSpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 3112 /* str */, AArch64::STRSroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STURSi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB321_3, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB32, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRSui, Convert__Reg1_0__Reg1_2__UImm12Offset41_3, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset4, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRDpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 3112 /* str */, AArch64::STRDroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STURDi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB641_3, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRDui, Convert__Reg1_0__Reg1_2__UImm12Offset81_3, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset8, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRBpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 3112 /* str */, AArch64::STRBroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STURBi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB81_3, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB8, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRBui, Convert__Reg1_0__Reg1_2__UImm12Offset11_3, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset1, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRWpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 3112 /* str */, AArch64::STRWroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STURWi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB321_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB32, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRWui, Convert__Reg1_0__Reg1_2__UImm12Offset41_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset4, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRXpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 3112 /* str */, AArch64::STRXroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STURXi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB641_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRXui, Convert__Reg1_0__Reg1_2__UImm12Offset81_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset8, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRQroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend1282_4, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend128, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRQroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend1282_4, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend128, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRQpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 3112 /* str */, AArch64::STRHroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend162_4, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend16, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRHroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend162_4, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend16, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRHpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 3112 /* str */, AArch64::STRSroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend322_4, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend32, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRSroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend322_4, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend32, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRSpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 3112 /* str */, AArch64::STRDroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend642_4, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRDroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend642_4, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRDpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 3112 /* str */, AArch64::STRBroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend82_4, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend8, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRBroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend82_4, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend8, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRBpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 3112 /* str */, AArch64::STRWroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend322_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend32, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRWroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend322_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend32, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRWpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 3112 /* str */, AArch64::STRXroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend642_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRXroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend642_4, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend64, MCK__93_ }, }, + { 3112 /* str */, AArch64::STRXpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 3116 /* strb */, AArch64::STRBBui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3116 /* strb */, AArch64::STRBBpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 3116 /* strb */, AArch64::STRBBroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 3116 /* strb */, AArch64::STURBBi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB81_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB8, MCK__93_ }, }, + { 3116 /* strb */, AArch64::STRBBui, Convert__Reg1_0__Reg1_2__UImm12Offset11_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset1, MCK__93_ }, }, + { 3116 /* strb */, AArch64::STRBBroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend82_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend8, MCK__93_ }, }, + { 3116 /* strb */, AArch64::STRBBroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend82_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend8, MCK__93_ }, }, + { 3116 /* strb */, AArch64::STRBBpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 3121 /* strh */, AArch64::STRHHui, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3121 /* strh */, AArch64::STRHHpost, Convert__Reg1_2__Reg1_0__Tie0__SImm91_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, }, + { 3121 /* strh */, AArch64::STRHHroX, Convert__Reg1_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, }, + { 3121 /* strh */, AArch64::STURHHi, Convert__Reg1_0__Reg1_2__SImm9OffsetFB161_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB16, MCK__93_ }, }, + { 3121 /* strh */, AArch64::STRHHui, Convert__Reg1_0__Reg1_2__UImm12Offset21_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset2, MCK__93_ }, }, + { 3121 /* strh */, AArch64::STRHHroW, Convert__Reg1_0__Reg1_2__Reg1_3__MemWExtend162_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend16, MCK__93_ }, }, + { 3121 /* strh */, AArch64::STRHHroX, Convert__Reg1_0__Reg1_2__Reg1_3__MemXExtend162_4, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend16, MCK__93_ }, }, + { 3121 /* strh */, AArch64::STRHHpre, Convert__Reg1_2__Reg1_0__Tie0__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, }, + { 3126 /* stset */, AArch64::LDSETs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3126 /* stset */, AArch64::LDSETd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3132 /* stsetb */, AArch64::LDSETb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3139 /* stseth */, AArch64::LDSETh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3146 /* stsetl */, AArch64::LDSETLs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3146 /* stsetl */, AArch64::LDSETLd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3153 /* stsetlb */, AArch64::LDSETLb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3161 /* stsetlh */, AArch64::LDSETLh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3169 /* stsmax */, AArch64::LDSMAXs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3169 /* stsmax */, AArch64::LDSMAXd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3176 /* stsmaxb */, AArch64::LDSMAXb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3184 /* stsmaxh */, AArch64::LDSMAXh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3192 /* stsmaxl */, AArch64::LDSMAXLs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3192 /* stsmaxl */, AArch64::LDSMAXLd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3200 /* stsmaxlb */, AArch64::LDSMAXLb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3209 /* stsmaxlh */, AArch64::LDSMAXLh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3218 /* stsmin */, AArch64::LDSMINs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3218 /* stsmin */, AArch64::LDSMINd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3225 /* stsminb */, AArch64::LDSMINb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3233 /* stsminh */, AArch64::LDSMINh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3241 /* stsminl */, AArch64::LDSMINLs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3241 /* stsminl */, AArch64::LDSMINLd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3249 /* stsminlb */, AArch64::LDSMINLb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3258 /* stsminlh */, AArch64::LDSMINLh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3267 /* sttr */, AArch64::STTRWi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3267 /* sttr */, AArch64::STTRXi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3267 /* sttr */, AArch64::STTRWi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3267 /* sttr */, AArch64::STTRXi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3272 /* sttrb */, AArch64::STTRBi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3272 /* sttrb */, AArch64::STTRBi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3278 /* sttrh */, AArch64::STTRHi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3278 /* sttrh */, AArch64::STTRHi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3284 /* stumax */, AArch64::LDUMAXs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3284 /* stumax */, AArch64::LDUMAXd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3291 /* stumaxb */, AArch64::LDUMAXb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3299 /* stumaxh */, AArch64::LDUMAXh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3307 /* stumaxl */, AArch64::LDUMAXLs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3307 /* stumaxl */, AArch64::LDUMAXLd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3315 /* stumaxlb */, AArch64::LDUMAXLb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3324 /* stumaxlh */, AArch64::LDUMAXLh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3333 /* stumin */, AArch64::LDUMINs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3333 /* stumin */, AArch64::LDUMINd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3340 /* stuminb */, AArch64::LDUMINb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3348 /* stuminh */, AArch64::LDUMINh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3356 /* stuminl */, AArch64::LDUMINLs, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3356 /* stuminl */, AArch64::LDUMINLd, Convert__regXZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3364 /* stuminlb */, AArch64::LDUMINLb, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3373 /* stuminlh */, AArch64::LDUMINLh, Convert__regWZR__Reg1_0__Reg1_2, Feature_HasV8_1a, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURQi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURHi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURSi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURDi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURBi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURWi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURXi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURQi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_FPR128, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURHi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_FPR16, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURSi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_FPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURDi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_FPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURBi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_FPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURWi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3382 /* stur */, AArch64::STURXi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3387 /* sturb */, AArch64::STURBBi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3387 /* sturb */, AArch64::STURBBi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3393 /* sturh */, AArch64::STURHHi, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3393 /* sturh */, AArch64::STURHHi, Convert__Reg1_0__Reg1_2__SImm91_3, 0, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, }, + { 3399 /* stxp */, AArch64::STXPW, Convert__Reg1_0__Reg1_1__Reg1_2__GPR64sp01_4, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3399 /* stxp */, AArch64::STXPX, Convert__Reg1_0__Reg1_1__Reg1_2__GPR64sp01_4, 0, { MCK_GPR32, MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3404 /* stxr */, AArch64::STXRW, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3404 /* stxr */, AArch64::STXRX, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR32, MCK_GPR64, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3409 /* stxrb */, AArch64::STXRB, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3415 /* stxrh */, AArch64::STXRH, Convert__Reg1_0__Reg1_1__GPR64sp01_3, 0, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp0, MCK__93_ }, }, + { 3421 /* sub */, AArch64::SUBWrx, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_GPR32sponly, MCK_GPR32sp, MCK_GPR32 }, }, + { 3421 /* sub */, AArch64::SUBXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, 0, { MCK_GPR64sponly, MCK_GPR64sp, MCK_GPR64 }, }, + { 3421 /* sub */, AArch64::SUBv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 3421 /* sub */, AArch64::SUBWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 3421 /* sub */, AArch64::SUBWrx, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_GPR32sp, MCK_GPR32sponly, MCK_GPR32 }, }, + { 3421 /* sub */, AArch64::ADDWri, Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2, 0, { MCK_GPR32sp, MCK_GPR32sp, MCK_AddSubImmNeg }, }, + { 3421 /* sub */, AArch64::SUBWri, Convert__Reg1_0__Reg1_1__AddSubImm2_2, 0, { MCK_GPR32sp, MCK_GPR32sp, MCK_AddSubImm }, }, + { 3421 /* sub */, AArch64::SUBXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 3421 /* sub */, AArch64::SUBXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, 0, { MCK_GPR64sp, MCK_GPR64sponly, MCK_GPR64 }, }, + { 3421 /* sub */, AArch64::ADDXri, Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2, 0, { MCK_GPR64sp, MCK_GPR64sp, MCK_AddSubImmNeg }, }, + { 3421 /* sub */, AArch64::SUBXri, Convert__Reg1_0__Reg1_1__AddSubImm2_2, 0, { MCK_GPR64sp, MCK_GPR64sp, MCK_AddSubImm }, }, + { 3421 /* sub */, AArch64::SUBv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3421 /* sub */, AArch64::SUBv2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3421 /* sub */, AArch64::SUBv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3421 /* sub */, AArch64::SUBv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3421 /* sub */, AArch64::SUBv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3421 /* sub */, AArch64::SUBv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3421 /* sub */, AArch64::SUBv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3421 /* sub */, AArch64::SUBWrs, Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, }, + { 3421 /* sub */, AArch64::SUBWrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, 0, { MCK_GPR32sp, MCK_GPR32sp, MCK_GPR32, MCK_Extend }, }, + { 3421 /* sub */, AArch64::SUBXrs, Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_ArithmeticShifter64 }, }, + { 3421 /* sub */, AArch64::SUBXrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend641_3, 0, { MCK_GPR64sp, MCK_GPR64sp, MCK_GPR32, MCK_Extend64 }, }, + { 3421 /* sub */, AArch64::SUBXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__ExtendLSL641_3, 0, { MCK_GPR64sp, MCK_GPR64sp, MCK_GPR64, MCK_ExtendLSL64 }, }, + { 3425 /* subhn */, AArch64::SUBHNv2i64_v2i32, Convert__VectorReg641_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3425 /* subhn */, AArch64::SUBHNv4i32_v4i16, Convert__VectorReg641_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3425 /* subhn */, AArch64::SUBHNv8i16_v8i8, Convert__VectorReg641_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3431 /* subhn2 */, AArch64::SUBHNv8i16_v16i8, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3431 /* subhn2 */, AArch64::SUBHNv2i64_v4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3431 /* subhn2 */, AArch64::SUBHNv4i32_v8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3438 /* subs */, AArch64::SUBSWrx, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_GPR32, MCK_GPR32sponly, MCK_GPR32 }, }, + { 3438 /* subs */, AArch64::SUBSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 3438 /* subs */, AArch64::ADDSWri, Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2, 0, { MCK_GPR32, MCK_GPR32sp, MCK_AddSubImmNeg }, }, + { 3438 /* subs */, AArch64::SUBSWri, Convert__Reg1_0__Reg1_1__AddSubImm2_2, 0, { MCK_GPR32, MCK_GPR32sp, MCK_AddSubImm }, }, + { 3438 /* subs */, AArch64::SUBSXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, 0, { MCK_GPR64, MCK_GPR64sponly, MCK_GPR64 }, }, + { 3438 /* subs */, AArch64::SUBSXrs, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 3438 /* subs */, AArch64::ADDSXri, Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2, 0, { MCK_GPR64, MCK_GPR64sp, MCK_AddSubImmNeg }, }, + { 3438 /* subs */, AArch64::SUBSXri, Convert__Reg1_0__Reg1_1__AddSubImm2_2, 0, { MCK_GPR64, MCK_GPR64sp, MCK_AddSubImm }, }, + { 3438 /* subs */, AArch64::SUBSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter321_3, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_ArithmeticShifter32 }, }, + { 3438 /* subs */, AArch64::SUBSWrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, 0, { MCK_GPR32, MCK_GPR32sp, MCK_GPR32, MCK_Extend }, }, + { 3438 /* subs */, AArch64::SUBSXrs, Convert__Reg1_0__Reg1_1__Reg1_2__ArithmeticShifter641_3, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_ArithmeticShifter64 }, }, + { 3438 /* subs */, AArch64::SUBSXrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, 0, { MCK_GPR64, MCK_GPR64sp, MCK_GPR32, MCK_Extend }, }, + { 3438 /* subs */, AArch64::SUBSXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__ExtendLSL641_3, 0, { MCK_GPR64, MCK_GPR64sp, MCK_GPR64, MCK_ExtendLSL64 }, }, + { 3443 /* suqadd */, AArch64::SUQADDv1i16, Convert__Reg1_0__Tie0__Reg1_1, Feature_HasNEON, { MCK_FPR16, MCK_FPR16 }, }, + { 3443 /* suqadd */, AArch64::SUQADDv1i32, Convert__Reg1_0__Tie0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 3443 /* suqadd */, AArch64::SUQADDv1i64, Convert__Reg1_0__Tie0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 3443 /* suqadd */, AArch64::SUQADDv1i8, Convert__Reg1_0__Tie0__Reg1_1, Feature_HasNEON, { MCK_FPR8, MCK_FPR8 }, }, + { 3443 /* suqadd */, AArch64::SUQADDv16i8, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3443 /* suqadd */, AArch64::SUQADDv2i64, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3443 /* suqadd */, AArch64::SUQADDv2i32, Convert__VectorReg641_1__Tie0__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3443 /* suqadd */, AArch64::SUQADDv4i16, Convert__VectorReg641_1__Tie0__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3443 /* suqadd */, AArch64::SUQADDv4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3443 /* suqadd */, AArch64::SUQADDv8i8, Convert__VectorReg641_1__Tie0__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3443 /* suqadd */, AArch64::SUQADDv8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3450 /* svc */, AArch64::SVC, Convert__Imm0_655351_0, 0, { MCK_Imm0_65535 }, }, + { 3454 /* swp */, AArch64::SWPs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3454 /* swp */, AArch64::SWPd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3458 /* swpa */, AArch64::SWPAs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3458 /* swpa */, AArch64::SWPAd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3463 /* swpab */, AArch64::SWPAb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3469 /* swpah */, AArch64::SWPAh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3475 /* swpal */, AArch64::SWPALs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3475 /* swpal */, AArch64::SWPALd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3481 /* swpalb */, AArch64::SWPALb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3488 /* swpalh */, AArch64::SWPALh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3495 /* swpb */, AArch64::SWPb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3500 /* swph */, AArch64::SWPh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3505 /* swpl */, AArch64::SWPLs, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3505 /* swpl */, AArch64::SWPLd, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3510 /* swplb */, AArch64::SWPLb, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3516 /* swplh */, AArch64::SWPLh, Convert__Reg1_1__Reg1_0__Reg1_3, Feature_HasV8_1a, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, }, + { 3522 /* sxtb */, AArch64::SBFMWri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_7, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 3522 /* sxtb */, AArch64::SBFMXri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_7, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 3527 /* sxth */, AArch64::SBFMWri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_15, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 3527 /* sxth */, AArch64::SBFMXri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_15, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 3532 /* sxtl */, AArch64::SSHLLv2i32_shift, Convert__VectorReg1281_1__VectorReg641_2__imm_95_0, 0, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 3532 /* sxtl */, AArch64::SSHLLv4i16_shift, Convert__VectorReg1281_1__VectorReg641_2__imm_95_0, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 3532 /* sxtl */, AArch64::SSHLLv8i8_shift, Convert__VectorReg1281_1__VectorReg641_2__imm_95_0, 0, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 3532 /* sxtl */, AArch64::SSHLLv2i32_shift, Convert__VectorReg1281_0__VectorReg641_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3532 /* sxtl */, AArch64::SSHLLv4i16_shift, Convert__VectorReg1281_0__VectorReg641_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3532 /* sxtl */, AArch64::SSHLLv8i8_shift, Convert__VectorReg1281_0__VectorReg641_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3537 /* sxtl2 */, AArch64::SSHLLv4i32_shift, Convert__VectorReg1281_1__VectorReg1281_2__imm_95_0, 0, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3537 /* sxtl2 */, AArch64::SSHLLv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__imm_95_0, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3537 /* sxtl2 */, AArch64::SSHLLv16i8_shift, Convert__VectorReg1281_1__VectorReg1281_2__imm_95_0, 0, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3537 /* sxtl2 */, AArch64::SSHLLv4i32_shift, Convert__VectorReg1281_0__VectorReg1281_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3537 /* sxtl2 */, AArch64::SSHLLv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3537 /* sxtl2 */, AArch64::SSHLLv16i8_shift, Convert__VectorReg1281_0__VectorReg1281_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3543 /* sxtw */, AArch64::SBFMXri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_31, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 3548 /* sys */, AArch64::SYSxt, Convert__Imm0_71_0__SysCR1_1__SysCR1_2__Imm0_71_3__regXZR, 0, { MCK_Imm0_7, MCK_SysCR, MCK_SysCR, MCK_Imm0_7 }, }, + { 3548 /* sys */, AArch64::SYSxt, Convert__Imm0_71_0__SysCR1_1__SysCR1_2__Imm0_71_3__Reg1_4, 0, { MCK_Imm0_7, MCK_SysCR, MCK_SysCR, MCK_Imm0_7, MCK_GPR64 }, }, + { 3552 /* sysl */, AArch64::SYSLxt, Convert__Reg1_0__Imm0_71_1__SysCR1_2__SysCR1_3__Imm0_71_4, 0, { MCK_GPR64, MCK_Imm0_7, MCK_SysCR, MCK_SysCR, MCK_Imm0_7 }, }, + { 3557 /* tbl */, AArch64::TBLv16i8Four, Convert__VectorReg1281_1__VecListFour1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VecListFour128, MCK_VectorReg128 }, }, + { 3557 /* tbl */, AArch64::TBLv16i8One, Convert__VectorReg1281_1__VecListOne1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VecListOne128, MCK_VectorReg128 }, }, + { 3557 /* tbl */, AArch64::TBLv16i8Three, Convert__VectorReg1281_1__VecListThree1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VecListThree128, MCK_VectorReg128 }, }, + { 3557 /* tbl */, AArch64::TBLv16i8Two, Convert__VectorReg1281_1__VecListTwo1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VecListTwo128, MCK_VectorReg128 }, }, + { 3557 /* tbl */, AArch64::TBLv8i8Four, Convert__VectorReg641_1__VecListFour1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VecListFour128, MCK_VectorReg64 }, }, + { 3557 /* tbl */, AArch64::TBLv8i8One, Convert__VectorReg641_1__VecListOne1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VecListOne128, MCK_VectorReg64 }, }, + { 3557 /* tbl */, AArch64::TBLv8i8Three, Convert__VectorReg641_1__VecListThree1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VecListThree128, MCK_VectorReg64 }, }, + { 3557 /* tbl */, AArch64::TBLv8i8Two, Convert__VectorReg641_1__VecListTwo1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VecListTwo128, MCK_VectorReg64 }, }, + { 3557 /* tbl */, AArch64::TBLv16i8Four, Convert__VectorReg1281_0__TypedVectorList4_16b1_2__VectorReg1281_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_TypedVectorList4_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3557 /* tbl */, AArch64::TBLv16i8One, Convert__VectorReg1281_0__TypedVectorList1_16b1_2__VectorReg1281_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_TypedVectorList1_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3557 /* tbl */, AArch64::TBLv16i8Three, Convert__VectorReg1281_0__TypedVectorList3_16b1_2__VectorReg1281_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_TypedVectorList3_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3557 /* tbl */, AArch64::TBLv16i8Two, Convert__VectorReg1281_0__TypedVectorList2_16b1_2__VectorReg1281_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_TypedVectorList2_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3557 /* tbl */, AArch64::TBLv8i8Four, Convert__VectorReg641_0__TypedVectorList4_16b1_2__VectorReg641_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_TypedVectorList4_16b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3557 /* tbl */, AArch64::TBLv8i8One, Convert__VectorReg641_0__TypedVectorList1_16b1_2__VectorReg641_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_TypedVectorList1_16b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3557 /* tbl */, AArch64::TBLv8i8Three, Convert__VectorReg641_0__TypedVectorList3_16b1_2__VectorReg641_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_TypedVectorList3_16b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3557 /* tbl */, AArch64::TBLv8i8Two, Convert__VectorReg641_0__TypedVectorList2_16b1_2__VectorReg641_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_TypedVectorList2_16b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3561 /* tbnz */, AArch64::TBNZW, Convert__Reg1_0__Imm0_311_1__BranchTarget141_2, 0, { MCK_GPR32, MCK_Imm0_31, MCK_BranchTarget14 }, }, + { 3561 /* tbnz */, AArch64::TBNZX, Convert__Reg1_0__Imm32_631_1__BranchTarget141_2, 0, { MCK_GPR64, MCK_Imm32_63, MCK_BranchTarget14 }, }, + { 3561 /* tbnz */, AArch64::TBNZW, Convert__GPR32as641_0__TBZImm0_311_1__BranchTarget141_2, 0, { MCK_GPR32as64, MCK_TBZImm0_31, MCK_BranchTarget14 }, }, + { 3566 /* tbx */, AArch64::TBXv16i8Four, Convert__VectorReg1281_1__Tie0__VecListFour1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VecListFour128, MCK_VectorReg128 }, }, + { 3566 /* tbx */, AArch64::TBXv16i8One, Convert__VectorReg1281_1__Tie0__VecListOne1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VecListOne128, MCK_VectorReg128 }, }, + { 3566 /* tbx */, AArch64::TBXv16i8Three, Convert__VectorReg1281_1__Tie0__VecListThree1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VecListThree128, MCK_VectorReg128 }, }, + { 3566 /* tbx */, AArch64::TBXv16i8Two, Convert__VectorReg1281_1__Tie0__VecListTwo1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VecListTwo128, MCK_VectorReg128 }, }, + { 3566 /* tbx */, AArch64::TBXv8i8Four, Convert__VectorReg641_1__Tie0__VecListFour1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VecListFour128, MCK_VectorReg64 }, }, + { 3566 /* tbx */, AArch64::TBXv8i8One, Convert__VectorReg641_1__Tie0__VecListOne1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VecListOne128, MCK_VectorReg64 }, }, + { 3566 /* tbx */, AArch64::TBXv8i8Three, Convert__VectorReg641_1__Tie0__VecListThree1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VecListThree128, MCK_VectorReg64 }, }, + { 3566 /* tbx */, AArch64::TBXv8i8Two, Convert__VectorReg641_1__Tie0__VecListTwo1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VecListTwo128, MCK_VectorReg64 }, }, + { 3566 /* tbx */, AArch64::TBXv16i8Four, Convert__VectorReg1281_0__Tie0__TypedVectorList4_16b1_2__VectorReg1281_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_TypedVectorList4_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3566 /* tbx */, AArch64::TBXv16i8One, Convert__VectorReg1281_0__Tie0__TypedVectorList1_16b1_2__VectorReg1281_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_TypedVectorList1_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3566 /* tbx */, AArch64::TBXv16i8Three, Convert__VectorReg1281_0__Tie0__TypedVectorList3_16b1_2__VectorReg1281_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_TypedVectorList3_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3566 /* tbx */, AArch64::TBXv16i8Two, Convert__VectorReg1281_0__Tie0__TypedVectorList2_16b1_2__VectorReg1281_3, Feature_HasNEON, { MCK_VectorReg128, MCK__DOT_16b, MCK_TypedVectorList2_16b, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3566 /* tbx */, AArch64::TBXv8i8Four, Convert__VectorReg641_0__Tie0__TypedVectorList4_16b1_2__VectorReg641_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_TypedVectorList4_16b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3566 /* tbx */, AArch64::TBXv8i8One, Convert__VectorReg641_0__Tie0__TypedVectorList1_16b1_2__VectorReg641_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_TypedVectorList1_16b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3566 /* tbx */, AArch64::TBXv8i8Three, Convert__VectorReg641_0__Tie0__TypedVectorList3_16b1_2__VectorReg641_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_TypedVectorList3_16b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3566 /* tbx */, AArch64::TBXv8i8Two, Convert__VectorReg641_0__Tie0__TypedVectorList2_16b1_2__VectorReg641_3, Feature_HasNEON, { MCK_VectorReg64, MCK__DOT_8b, MCK_TypedVectorList2_16b, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3570 /* tbz */, AArch64::TBZW, Convert__Reg1_0__Imm0_311_1__BranchTarget141_2, 0, { MCK_GPR32, MCK_Imm0_31, MCK_BranchTarget14 }, }, + { 3570 /* tbz */, AArch64::TBZX, Convert__Reg1_0__Imm32_631_1__BranchTarget141_2, 0, { MCK_GPR64, MCK_Imm32_63, MCK_BranchTarget14 }, }, + { 3570 /* tbz */, AArch64::TBZW, Convert__GPR32as641_0__TBZImm0_311_1__BranchTarget141_2, 0, { MCK_GPR32as64, MCK_TBZImm0_31, MCK_BranchTarget14 }, }, + { 3574 /* trn1 */, AArch64::TRN1v16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3574 /* trn1 */, AArch64::TRN1v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3574 /* trn1 */, AArch64::TRN1v2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3574 /* trn1 */, AArch64::TRN1v4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3574 /* trn1 */, AArch64::TRN1v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3574 /* trn1 */, AArch64::TRN1v8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3574 /* trn1 */, AArch64::TRN1v8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3579 /* trn2 */, AArch64::TRN2v16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3579 /* trn2 */, AArch64::TRN2v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3579 /* trn2 */, AArch64::TRN2v2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3579 /* trn2 */, AArch64::TRN2v4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3579 /* trn2 */, AArch64::TRN2v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3579 /* trn2 */, AArch64::TRN2v8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3579 /* trn2 */, AArch64::TRN2v8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3584 /* tst */, AArch64::ANDSWrs, Convert__regWZR__Reg1_0__Reg1_1__imm_95_0, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 3584 /* tst */, AArch64::ANDSWri, Convert__regWZR__Reg1_0__LogicalImm321_1, 0, { MCK_GPR32, MCK_LogicalImm32 }, }, + { 3584 /* tst */, AArch64::ANDSXrs, Convert__regXZR__Reg1_0__Reg1_1__imm_95_0, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 3584 /* tst */, AArch64::ANDSXri, Convert__regXZR__Reg1_0__LogicalImm641_1, 0, { MCK_GPR64, MCK_LogicalImm64 }, }, + { 3584 /* tst */, AArch64::ANDSWrs, Convert__regWZR__Reg1_0__Reg1_1__LogicalShifter321_2, 0, { MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, }, + { 3584 /* tst */, AArch64::ANDSXrs, Convert__regXZR__Reg1_0__Reg1_1__LogicalShifter641_2, 0, { MCK_GPR64, MCK_GPR64, MCK_LogicalShifter64 }, }, + { 3588 /* uaba */, AArch64::UABAv16i8, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3588 /* uaba */, AArch64::UABAv2i32, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3588 /* uaba */, AArch64::UABAv4i16, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3588 /* uaba */, AArch64::UABAv4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3588 /* uaba */, AArch64::UABAv8i8, Convert__VectorReg641_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3588 /* uaba */, AArch64::UABAv8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3593 /* uabal */, AArch64::UABALv2i32_v2i64, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3593 /* uabal */, AArch64::UABALv4i16_v4i32, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3593 /* uabal */, AArch64::UABALv8i8_v8i16, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3599 /* uabal2 */, AArch64::UABALv4i32_v2i64, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3599 /* uabal2 */, AArch64::UABALv8i16_v4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3599 /* uabal2 */, AArch64::UABALv16i8_v8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3606 /* uabd */, AArch64::UABDv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3606 /* uabd */, AArch64::UABDv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3606 /* uabd */, AArch64::UABDv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3606 /* uabd */, AArch64::UABDv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3606 /* uabd */, AArch64::UABDv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3606 /* uabd */, AArch64::UABDv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3611 /* uabdl */, AArch64::UABDLv2i32_v2i64, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3611 /* uabdl */, AArch64::UABDLv4i16_v4i32, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3611 /* uabdl */, AArch64::UABDLv8i8_v8i16, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3617 /* uabdl2 */, AArch64::UABDLv4i32_v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3617 /* uabdl2 */, AArch64::UABDLv8i16_v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3617 /* uabdl2 */, AArch64::UABDLv16i8_v8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3624 /* uadalp */, AArch64::UADALPv2i32_v1i64, Convert__VectorReg641_1__Tie0__VectorReg641_2, Feature_HasNEON, { MCK__DOT_1d, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3624 /* uadalp */, AArch64::UADALPv4i32_v2i64, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3624 /* uadalp */, AArch64::UADALPv4i16_v2i32, Convert__VectorReg641_1__Tie0__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3624 /* uadalp */, AArch64::UADALPv8i8_v4i16, Convert__VectorReg641_1__Tie0__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3624 /* uadalp */, AArch64::UADALPv8i16_v4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3624 /* uadalp */, AArch64::UADALPv16i8_v8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3631 /* uaddl */, AArch64::UADDLv2i32_v2i64, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3631 /* uaddl */, AArch64::UADDLv4i16_v4i32, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3631 /* uaddl */, AArch64::UADDLv8i8_v8i16, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3637 /* uaddl2 */, AArch64::UADDLv4i32_v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3637 /* uaddl2 */, AArch64::UADDLv8i16_v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3637 /* uaddl2 */, AArch64::UADDLv16i8_v8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3644 /* uaddlp */, AArch64::UADDLPv2i32_v1i64, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_1d, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3644 /* uaddlp */, AArch64::UADDLPv4i32_v2i64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3644 /* uaddlp */, AArch64::UADDLPv4i16_v2i32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3644 /* uaddlp */, AArch64::UADDLPv8i8_v4i16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3644 /* uaddlp */, AArch64::UADDLPv8i16_v4i32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3644 /* uaddlp */, AArch64::UADDLPv16i8_v8i16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3651 /* uaddlv */, AArch64::UADDLVv16i8v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_FPR16, MCK_VectorReg128 }, }, + { 3651 /* uaddlv */, AArch64::UADDLVv4i16v, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_FPR32, MCK_VectorReg64 }, }, + { 3651 /* uaddlv */, AArch64::UADDLVv4i32v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_FPR64, MCK_VectorReg128 }, }, + { 3651 /* uaddlv */, AArch64::UADDLVv8i8v, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_FPR16, MCK_VectorReg64 }, }, + { 3651 /* uaddlv */, AArch64::UADDLVv8i16v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_FPR32, MCK_VectorReg128 }, }, + { 3658 /* uaddw */, AArch64::UADDWv2i32_v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 3658 /* uaddw */, AArch64::UADDWv4i16_v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 3658 /* uaddw */, AArch64::UADDWv8i8_v8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 3664 /* uaddw2 */, AArch64::UADDWv4i32_v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3664 /* uaddw2 */, AArch64::UADDWv8i16_v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3664 /* uaddw2 */, AArch64::UADDWv16i8_v8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3671 /* ubfm */, AArch64::UBFMWri, Convert__Reg1_0__Reg1_1__Imm0_311_2__Imm0_311_3, 0, { MCK_GPR32, MCK_GPR32, MCK_Imm0_31, MCK_Imm0_31 }, }, + { 3671 /* ubfm */, AArch64::UBFMXri, Convert__Reg1_0__Reg1_1__Imm0_631_2__Imm0_631_3, 0, { MCK_GPR64, MCK_GPR64, MCK_Imm0_63, MCK_Imm0_63 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv1i16, Convert__Reg1_0__Reg1_1, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFUWHri, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_GPR32 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFUXHri, Convert__Reg1_0__Reg1_1, Feature_HasFullFP16, { MCK_FPR16, MCK_GPR64 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFUWSri, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_GPR32 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFUXSri, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR32, MCK_GPR64 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv1i64, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFUWDri, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_GPR32 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFUXDri, Convert__Reg1_0__Reg1_1, Feature_HasFPARMv8, { MCK_FPR64, MCK_GPR64 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv2f64, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv2f32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv4f16, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv4f32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv8f16, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFh, Convert__Reg1_0__Reg1_1__Imm1_161_2, Feature_HasNEON|Feature_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm1_16 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFSWHri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFullFP16, { MCK_FPR16, MCK_GPR32, MCK_Imm1_32 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFSXHri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFullFP16, { MCK_FPR16, MCK_GPR64, MCK_Imm1_64 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFs, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_Imm1_32 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFSWSri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_GPR32, MCK_Imm1_32 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFSXSri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFPARMv8, { MCK_FPR32, MCK_GPR64, MCK_Imm1_64 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFd, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFSWDri, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_GPR32, MCK_Imm1_32 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFSXDri, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasFPARMv8, { MCK_FPR64, MCK_GPR64, MCK_Imm1_64 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv2i64_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_64 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv2i32_shift, Convert__VectorReg641_1__VectorReg641_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_32 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv4i16_shift, Convert__VectorReg641_1__VectorReg641_2__Imm1_161_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_16 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv4i32_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 3676 /* ucvtf */, AArch64::UCVTFv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_161_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 3682 /* udiv */, AArch64::UDIVWr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR32, MCK_GPR32, MCK_GPR32 }, }, + { 3682 /* udiv */, AArch64::UDIVXr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 3687 /* uhadd */, AArch64::UHADDv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3687 /* uhadd */, AArch64::UHADDv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3687 /* uhadd */, AArch64::UHADDv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3687 /* uhadd */, AArch64::UHADDv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3687 /* uhadd */, AArch64::UHADDv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3687 /* uhadd */, AArch64::UHADDv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3693 /* uhsub */, AArch64::UHSUBv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3693 /* uhsub */, AArch64::UHSUBv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3693 /* uhsub */, AArch64::UHSUBv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3693 /* uhsub */, AArch64::UHSUBv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3693 /* uhsub */, AArch64::UHSUBv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3693 /* uhsub */, AArch64::UHSUBv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3699 /* umaddl */, AArch64::UMADDLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_GPR64, MCK_GPR32, MCK_GPR32, MCK_GPR64 }, }, + { 3706 /* umax */, AArch64::UMAXv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3706 /* umax */, AArch64::UMAXv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3706 /* umax */, AArch64::UMAXv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3706 /* umax */, AArch64::UMAXv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3706 /* umax */, AArch64::UMAXv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3706 /* umax */, AArch64::UMAXv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3711 /* umaxp */, AArch64::UMAXPv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3711 /* umaxp */, AArch64::UMAXPv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3711 /* umaxp */, AArch64::UMAXPv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3711 /* umaxp */, AArch64::UMAXPv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3711 /* umaxp */, AArch64::UMAXPv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3711 /* umaxp */, AArch64::UMAXPv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3717 /* umaxv */, AArch64::UMAXVv16i8v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_FPR8, MCK_VectorReg128 }, }, + { 3717 /* umaxv */, AArch64::UMAXVv4i16v, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_FPR16, MCK_VectorReg64 }, }, + { 3717 /* umaxv */, AArch64::UMAXVv4i32v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_FPR32, MCK_VectorReg128 }, }, + { 3717 /* umaxv */, AArch64::UMAXVv8i8v, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_FPR8, MCK_VectorReg64 }, }, + { 3717 /* umaxv */, AArch64::UMAXVv8i16v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_FPR16, MCK_VectorReg128 }, }, + { 3723 /* umin */, AArch64::UMINv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3723 /* umin */, AArch64::UMINv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3723 /* umin */, AArch64::UMINv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3723 /* umin */, AArch64::UMINv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3723 /* umin */, AArch64::UMINv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3723 /* umin */, AArch64::UMINv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3728 /* uminp */, AArch64::UMINPv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3728 /* uminp */, AArch64::UMINPv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3728 /* uminp */, AArch64::UMINPv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3728 /* uminp */, AArch64::UMINPv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3728 /* uminp */, AArch64::UMINPv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3728 /* uminp */, AArch64::UMINPv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3734 /* uminv */, AArch64::UMINVv16i8v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_FPR8, MCK_VectorReg128 }, }, + { 3734 /* uminv */, AArch64::UMINVv4i16v, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_FPR16, MCK_VectorReg64 }, }, + { 3734 /* uminv */, AArch64::UMINVv4i32v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_FPR32, MCK_VectorReg128 }, }, + { 3734 /* uminv */, AArch64::UMINVv8i8v, Convert__Reg1_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_FPR8, MCK_VectorReg64 }, }, + { 3734 /* uminv */, AArch64::UMINVv8i16v, Convert__Reg1_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_FPR16, MCK_VectorReg128 }, }, + { 3740 /* umlal */, AArch64::UMLALv2i32_v2i64, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3740 /* umlal */, AArch64::UMLALv4i16_v4i32, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3740 /* umlal */, AArch64::UMLALv8i8_v8i16, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3740 /* umlal */, AArch64::UMLALv2i32_indexed, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 3740 /* umlal */, AArch64::UMLALv4i16_indexed, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 3746 /* umlal2 */, AArch64::UMLALv4i32_v2i64, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3746 /* umlal2 */, AArch64::UMLALv8i16_v4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3746 /* umlal2 */, AArch64::UMLALv16i8_v8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3746 /* umlal2 */, AArch64::UMLALv4i32_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 3746 /* umlal2 */, AArch64::UMLALv8i16_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 3753 /* umlsl */, AArch64::UMLSLv2i32_v2i64, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3753 /* umlsl */, AArch64::UMLSLv4i16_v4i32, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3753 /* umlsl */, AArch64::UMLSLv8i8_v8i16, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3753 /* umlsl */, AArch64::UMLSLv2i32_indexed, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 3753 /* umlsl */, AArch64::UMLSLv4i16_indexed, Convert__VectorReg1281_1__Tie0__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 3759 /* umlsl2 */, AArch64::UMLSLv4i32_v2i64, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3759 /* umlsl2 */, AArch64::UMLSLv8i16_v4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3759 /* umlsl2 */, AArch64::UMLSLv16i8_v8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3759 /* umlsl2 */, AArch64::UMLSLv4i32_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 3759 /* umlsl2 */, AArch64::UMLSLv8i16_indexed, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 3766 /* umnegl */, AArch64::UMSUBLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__regXZR, 0, { MCK_GPR64, MCK_GPR32, MCK_GPR32 }, }, + { 3773 /* umov */, AArch64::UMOVvi8, Convert__Reg1_1__VectorReg1281_2__VectorIndexB1_3, Feature_HasNEON, { MCK__DOT_b, MCK_GPR32, MCK_VectorReg128, MCK_VectorIndexB }, }, + { 3773 /* umov */, AArch64::UMOVvi64, Convert__Reg1_1__VectorReg1281_2__VectorIndexD1_3, Feature_HasNEON, { MCK__DOT_d, MCK_GPR64, MCK_VectorReg128, MCK_VectorIndexD }, }, + { 3773 /* umov */, AArch64::UMOVvi16, Convert__Reg1_1__VectorReg1281_2__VectorIndexH1_3, Feature_HasNEON, { MCK__DOT_h, MCK_GPR32, MCK_VectorReg128, MCK_VectorIndexH }, }, + { 3773 /* umov */, AArch64::UMOVvi32, Convert__Reg1_1__VectorReg1281_2__VectorIndexS1_3, Feature_HasNEON, { MCK__DOT_s, MCK_GPR32, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 3778 /* umsubl */, AArch64::UMSUBLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_GPR64, MCK_GPR32, MCK_GPR32, MCK_GPR64 }, }, + { 3785 /* umulh */, AArch64::UMULHrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GPR64, MCK_GPR64, MCK_GPR64 }, }, + { 3791 /* umull */, AArch64::UMADDLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__regXZR, 0, { MCK_GPR64, MCK_GPR32, MCK_GPR32 }, }, + { 3791 /* umull */, AArch64::UMULLv2i32_v2i64, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3791 /* umull */, AArch64::UMULLv4i16_v4i32, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3791 /* umull */, AArch64::UMULLv8i8_v8i16, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3791 /* umull */, AArch64::UMULLv2i32_indexed, Convert__VectorReg1281_1__VectorReg641_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 3791 /* umull */, AArch64::UMULLv4i16_indexed, Convert__VectorReg1281_1__VectorReg641_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 3797 /* umull2 */, AArch64::UMULLv4i32_v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3797 /* umull2 */, AArch64::UMULLv8i16_v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3797 /* umull2 */, AArch64::UMULLv16i8_v8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3797 /* umull2 */, AArch64::UMULLv4i32_indexed, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3__VectorIndexS1_4, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorIndexS }, }, + { 3797 /* umull2 */, AArch64::UMULLv8i16_indexed, Convert__VectorReg1281_1__VectorReg1281_2__VectorRegLo1_3__VectorIndexH1_4, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorRegLo, MCK_VectorIndexH }, }, + { 3804 /* uqadd */, AArch64::UQADDv1i16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 3804 /* uqadd */, AArch64::UQADDv1i32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 3804 /* uqadd */, AArch64::UQADDv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 3804 /* uqadd */, AArch64::UQADDv1i8, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR8, MCK_FPR8 }, }, + { 3804 /* uqadd */, AArch64::UQADDv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3804 /* uqadd */, AArch64::UQADDv2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3804 /* uqadd */, AArch64::UQADDv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3804 /* uqadd */, AArch64::UQADDv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3804 /* uqadd */, AArch64::UQADDv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3804 /* uqadd */, AArch64::UQADDv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3804 /* uqadd */, AArch64::UQADDv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3810 /* uqrshl */, AArch64::UQRSHLv1i16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 3810 /* uqrshl */, AArch64::UQRSHLv1i32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 3810 /* uqrshl */, AArch64::UQRSHLv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 3810 /* uqrshl */, AArch64::UQRSHLv1i8, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR8, MCK_FPR8 }, }, + { 3810 /* uqrshl */, AArch64::UQRSHLv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3810 /* uqrshl */, AArch64::UQRSHLv2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3810 /* uqrshl */, AArch64::UQRSHLv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3810 /* uqrshl */, AArch64::UQRSHLv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3810 /* uqrshl */, AArch64::UQRSHLv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3810 /* uqrshl */, AArch64::UQRSHLv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3810 /* uqrshl */, AArch64::UQRSHLv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3817 /* uqrshrn */, AArch64::UQRSHRNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, }, + { 3817 /* uqrshrn */, AArch64::UQRSHRNs, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR64, MCK_Imm1_32 }, }, + { 3817 /* uqrshrn */, AArch64::UQRSHRNb, Convert__Reg1_0__Reg1_1__Imm1_81_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR16, MCK_Imm1_8 }, }, + { 3817 /* uqrshrn */, AArch64::UQRSHRNv2i32_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 3817 /* uqrshrn */, AArch64::UQRSHRNv4i16_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 3817 /* uqrshrn */, AArch64::UQRSHRNv8i8_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 3825 /* uqrshrn2 */, AArch64::UQRSHRNv16i8_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 3825 /* uqrshrn2 */, AArch64::UQRSHRNv4i32_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 3825 /* uqrshrn2 */, AArch64::UQRSHRNv8i16_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv1i16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 3834 /* uqshl */, AArch64::UQSHLh, Convert__Reg1_0__Reg1_1__Imm0_151_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv1i32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 3834 /* uqshl */, AArch64::UQSHLs, Convert__Reg1_0__Reg1_1__Imm0_311_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_Imm0_31 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 3834 /* uqshl */, AArch64::UQSHLd, Convert__Reg1_0__Reg1_1__Imm0_631_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm0_63 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv1i8, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR8, MCK_FPR8 }, }, + { 3834 /* uqshl */, AArch64::UQSHLb, Convert__Reg1_0__Reg1_1__Imm0_71_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR8, MCK_Imm0_7 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv16i8_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_71_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_7 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv2i64_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_631_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_63 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv2i32_shift, Convert__VectorReg641_1__VectorReg641_2__Imm0_311_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm0_31 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv4i16_shift, Convert__VectorReg641_1__VectorReg641_2__Imm0_151_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm0_15 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv4i32_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_311_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_31 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv8i8_shift, Convert__VectorReg641_1__VectorReg641_2__Imm0_71_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm0_7 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_151_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_15 }, }, + { 3834 /* uqshl */, AArch64::UQSHLv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3840 /* uqshrn */, AArch64::UQSHRNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, }, + { 3840 /* uqshrn */, AArch64::UQSHRNs, Convert__Reg1_0__Reg1_1__Imm1_321_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR64, MCK_Imm1_32 }, }, + { 3840 /* uqshrn */, AArch64::UQSHRNb, Convert__Reg1_0__Reg1_1__Imm1_81_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR16, MCK_Imm1_8 }, }, + { 3840 /* uqshrn */, AArch64::UQSHRNv2i32_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 3840 /* uqshrn */, AArch64::UQSHRNv4i16_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 3840 /* uqshrn */, AArch64::UQSHRNv8i8_shift, Convert__VectorReg641_1__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 3847 /* uqshrn2 */, AArch64::UQSHRNv16i8_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 3847 /* uqshrn2 */, AArch64::UQSHRNv4i32_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 3847 /* uqshrn2 */, AArch64::UQSHRNv8i16_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 3855 /* uqsub */, AArch64::UQSUBv1i16, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, }, + { 3855 /* uqsub */, AArch64::UQSUBv1i32, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, }, + { 3855 /* uqsub */, AArch64::UQSUBv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 3855 /* uqsub */, AArch64::UQSUBv1i8, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR8, MCK_FPR8, MCK_FPR8 }, }, + { 3855 /* uqsub */, AArch64::UQSUBv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3855 /* uqsub */, AArch64::UQSUBv2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3855 /* uqsub */, AArch64::UQSUBv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3855 /* uqsub */, AArch64::UQSUBv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3855 /* uqsub */, AArch64::UQSUBv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3855 /* uqsub */, AArch64::UQSUBv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3855 /* uqsub */, AArch64::UQSUBv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3861 /* uqxtn */, AArch64::UQXTNv1i16, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR16, MCK_FPR32 }, }, + { 3861 /* uqxtn */, AArch64::UQXTNv1i32, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR64 }, }, + { 3861 /* uqxtn */, AArch64::UQXTNv1i8, Convert__Reg1_0__Reg1_1, Feature_HasNEON, { MCK_FPR8, MCK_FPR16 }, }, + { 3861 /* uqxtn */, AArch64::UQXTNv2i32, Convert__VectorReg641_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg128 }, }, + { 3861 /* uqxtn */, AArch64::UQXTNv4i16, Convert__VectorReg641_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg128 }, }, + { 3861 /* uqxtn */, AArch64::UQXTNv8i8, Convert__VectorReg641_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg128 }, }, + { 3867 /* uqxtn2 */, AArch64::UQXTNv16i8, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3867 /* uqxtn2 */, AArch64::UQXTNv4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3867 /* uqxtn2 */, AArch64::UQXTNv8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3874 /* urecpe */, AArch64::URECPEv2i32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3874 /* urecpe */, AArch64::URECPEv4i32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3881 /* urhadd */, AArch64::URHADDv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3881 /* urhadd */, AArch64::URHADDv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3881 /* urhadd */, AArch64::URHADDv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3881 /* urhadd */, AArch64::URHADDv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3881 /* urhadd */, AArch64::URHADDv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3881 /* urhadd */, AArch64::URHADDv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3888 /* urshl */, AArch64::URSHLv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 3888 /* urshl */, AArch64::URSHLv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3888 /* urshl */, AArch64::URSHLv2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3888 /* urshl */, AArch64::URSHLv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3888 /* urshl */, AArch64::URSHLv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3888 /* urshl */, AArch64::URSHLv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3888 /* urshl */, AArch64::URSHLv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3888 /* urshl */, AArch64::URSHLv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3894 /* urshr */, AArch64::URSHRd, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 3894 /* urshr */, AArch64::URSHRv16i8_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 3894 /* urshr */, AArch64::URSHRv2i64_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_64 }, }, + { 3894 /* urshr */, AArch64::URSHRv2i32_shift, Convert__VectorReg641_1__VectorReg641_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_32 }, }, + { 3894 /* urshr */, AArch64::URSHRv4i16_shift, Convert__VectorReg641_1__VectorReg641_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_16 }, }, + { 3894 /* urshr */, AArch64::URSHRv4i32_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 3894 /* urshr */, AArch64::URSHRv8i8_shift, Convert__VectorReg641_1__VectorReg641_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_8 }, }, + { 3894 /* urshr */, AArch64::URSHRv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 3900 /* ursqrte */, AArch64::URSQRTEv2i32, Convert__VectorReg641_1__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3900 /* ursqrte */, AArch64::URSQRTEv4i32, Convert__VectorReg1281_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3908 /* ursra */, AArch64::URSRAd, Convert__Reg1_0__Tie0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 3908 /* ursra */, AArch64::URSRAv16i8_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 3908 /* ursra */, AArch64::URSRAv2i64_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_64 }, }, + { 3908 /* ursra */, AArch64::URSRAv2i32_shift, Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_32 }, }, + { 3908 /* ursra */, AArch64::URSRAv4i16_shift, Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_16 }, }, + { 3908 /* ursra */, AArch64::URSRAv4i32_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 3908 /* ursra */, AArch64::URSRAv8i8_shift, Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_8 }, }, + { 3908 /* ursra */, AArch64::URSRAv8i16_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 3914 /* ushl */, AArch64::USHLv1i64, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_FPR64 }, }, + { 3914 /* ushl */, AArch64::USHLv16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3914 /* ushl */, AArch64::USHLv2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3914 /* ushl */, AArch64::USHLv2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3914 /* ushl */, AArch64::USHLv4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3914 /* ushl */, AArch64::USHLv4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3914 /* ushl */, AArch64::USHLv8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3914 /* ushl */, AArch64::USHLv8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3919 /* ushll */, AArch64::USHLLv2i32_shift, Convert__VectorReg1281_1__VectorReg641_2__Imm0_311_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_Imm0_31 }, }, + { 3919 /* ushll */, AArch64::USHLLv4i16_shift, Convert__VectorReg1281_1__VectorReg641_2__Imm0_151_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_Imm0_15 }, }, + { 3919 /* ushll */, AArch64::USHLLv8i8_shift, Convert__VectorReg1281_1__VectorReg641_2__Imm0_71_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg64, MCK_Imm0_7 }, }, + { 3925 /* ushll2 */, AArch64::USHLLv4i32_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_311_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_31 }, }, + { 3925 /* ushll2 */, AArch64::USHLLv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_151_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_15 }, }, + { 3925 /* ushll2 */, AArch64::USHLLv16i8_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_71_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_7 }, }, + { 3932 /* ushr */, AArch64::USHRd, Convert__Reg1_0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 3932 /* ushr */, AArch64::USHRv16i8_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 3932 /* ushr */, AArch64::USHRv2i64_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_64 }, }, + { 3932 /* ushr */, AArch64::USHRv2i32_shift, Convert__VectorReg641_1__VectorReg641_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_32 }, }, + { 3932 /* ushr */, AArch64::USHRv4i16_shift, Convert__VectorReg641_1__VectorReg641_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_16 }, }, + { 3932 /* ushr */, AArch64::USHRv4i32_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 3932 /* ushr */, AArch64::USHRv8i8_shift, Convert__VectorReg641_1__VectorReg641_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_8 }, }, + { 3932 /* ushr */, AArch64::USHRv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 3937 /* usqadd */, AArch64::USQADDv1i16, Convert__Reg1_0__Tie0__Reg1_1, Feature_HasNEON, { MCK_FPR16, MCK_FPR16 }, }, + { 3937 /* usqadd */, AArch64::USQADDv1i32, Convert__Reg1_0__Tie0__Reg1_1, Feature_HasNEON, { MCK_FPR32, MCK_FPR32 }, }, + { 3937 /* usqadd */, AArch64::USQADDv1i64, Convert__Reg1_0__Tie0__Reg1_1, Feature_HasNEON, { MCK_FPR64, MCK_FPR64 }, }, + { 3937 /* usqadd */, AArch64::USQADDv1i8, Convert__Reg1_0__Tie0__Reg1_1, Feature_HasNEON, { MCK_FPR8, MCK_FPR8 }, }, + { 3937 /* usqadd */, AArch64::USQADDv16i8, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3937 /* usqadd */, AArch64::USQADDv2i64, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3937 /* usqadd */, AArch64::USQADDv2i32, Convert__VectorReg641_1__Tie0__VectorReg641_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3937 /* usqadd */, AArch64::USQADDv4i16, Convert__VectorReg641_1__Tie0__VectorReg641_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3937 /* usqadd */, AArch64::USQADDv4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3937 /* usqadd */, AArch64::USQADDv8i8, Convert__VectorReg641_1__Tie0__VectorReg641_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3937 /* usqadd */, AArch64::USQADDv8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3944 /* usra */, AArch64::USRAd, Convert__Reg1_0__Tie0__Reg1_1__Imm1_641_2, Feature_HasNEON, { MCK_FPR64, MCK_FPR64, MCK_Imm1_64 }, }, + { 3944 /* usra */, AArch64::USRAv16i8_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, }, + { 3944 /* usra */, AArch64::USRAv2i64_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_64 }, }, + { 3944 /* usra */, AArch64::USRAv2i32_shift, Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_32 }, }, + { 3944 /* usra */, AArch64::USRAv4i16_shift, Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_16 }, }, + { 3944 /* usra */, AArch64::USRAv4i32_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_321_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_32 }, }, + { 3944 /* usra */, AArch64::USRAv8i8_shift, Convert__VectorReg641_1__Tie0__VectorReg641_2__Imm1_81_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm1_8 }, }, + { 3944 /* usra */, AArch64::USRAv8i16_shift, Convert__VectorReg1281_1__Tie0__VectorReg1281_2__Imm1_161_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, }, + { 3949 /* usubl */, AArch64::USUBLv2i32_v2i64, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3949 /* usubl */, AArch64::USUBLv4i16_v4i32, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3949 /* usubl */, AArch64::USUBLv8i8_v8i16, Convert__VectorReg1281_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 3955 /* usubl2 */, AArch64::USUBLv4i32_v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3955 /* usubl2 */, AArch64::USUBLv8i16_v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3955 /* usubl2 */, AArch64::USUBLv16i8_v8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3962 /* usubw */, AArch64::USUBWv2i32_v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 3962 /* usubw */, AArch64::USUBWv4i16_v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 3962 /* usubw */, AArch64::USUBWv8i8_v8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 3968 /* usubw2 */, AArch64::USUBWv4i32_v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3968 /* usubw2 */, AArch64::USUBWv8i16_v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3968 /* usubw2 */, AArch64::USUBWv16i8_v8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3975 /* uxtb */, AArch64::UBFMWri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_7, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 3975 /* uxtb */, AArch64::UBFMXri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_7, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 3980 /* uxth */, AArch64::UBFMWri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_15, 0, { MCK_GPR32, MCK_GPR32 }, }, + { 3980 /* uxth */, AArch64::UBFMXri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_15, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 3985 /* uxtl */, AArch64::USHLLv2i32_shift, Convert__VectorReg1281_1__VectorReg641_2__imm_95_0, 0, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 3985 /* uxtl */, AArch64::USHLLv4i16_shift, Convert__VectorReg1281_1__VectorReg641_2__imm_95_0, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 3985 /* uxtl */, AArch64::USHLLv8i8_shift, Convert__VectorReg1281_1__VectorReg641_2__imm_95_0, 0, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg64 }, }, + { 3985 /* uxtl */, AArch64::USHLLv2i32_shift, Convert__VectorReg1281_0__VectorReg641_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg64, MCK__DOT_2s }, }, + { 3985 /* uxtl */, AArch64::USHLLv4i16_shift, Convert__VectorReg1281_0__VectorReg641_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h }, }, + { 3985 /* uxtl */, AArch64::USHLLv8i8_shift, Convert__VectorReg1281_0__VectorReg641_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg64, MCK__DOT_8b }, }, + { 3990 /* uxtl2 */, AArch64::USHLLv4i32_shift, Convert__VectorReg1281_1__VectorReg1281_2__imm_95_0, 0, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3990 /* uxtl2 */, AArch64::USHLLv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__imm_95_0, 0, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3990 /* uxtl2 */, AArch64::USHLLv16i8_shift, Convert__VectorReg1281_1__VectorReg1281_2__imm_95_0, 0, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 3990 /* uxtl2 */, AArch64::USHLLv4i32_shift, Convert__VectorReg1281_0__VectorReg1281_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s }, }, + { 3990 /* uxtl2 */, AArch64::USHLLv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h }, }, + { 3990 /* uxtl2 */, AArch64::USHLLv16i8_shift, Convert__VectorReg1281_0__VectorReg1281_2__imm_95_0, 0, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_16b }, }, + { 3996 /* uxtw */, AArch64::UBFMXri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_31, 0, { MCK_GPR64, MCK_GPR64 }, }, + { 4001 /* uzp1 */, AArch64::UZP1v16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 4001 /* uzp1 */, AArch64::UZP1v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 4001 /* uzp1 */, AArch64::UZP1v2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 4001 /* uzp1 */, AArch64::UZP1v4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 4001 /* uzp1 */, AArch64::UZP1v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 4001 /* uzp1 */, AArch64::UZP1v8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 4001 /* uzp1 */, AArch64::UZP1v8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 4006 /* uzp2 */, AArch64::UZP2v16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 4006 /* uzp2 */, AArch64::UZP2v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 4006 /* uzp2 */, AArch64::UZP2v2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 4006 /* uzp2 */, AArch64::UZP2v4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 4006 /* uzp2 */, AArch64::UZP2v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 4006 /* uzp2 */, AArch64::UZP2v8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 4006 /* uzp2 */, AArch64::UZP2v8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 4011 /* wfe */, AArch64::HINT, Convert__imm_95_2, 0, { }, }, + { 4015 /* wfi */, AArch64::HINT, Convert__imm_95_3, 0, { }, }, + { 4019 /* xtn */, AArch64::XTNv2i32, Convert__VectorReg641_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg128 }, }, + { 4019 /* xtn */, AArch64::XTNv4i16, Convert__VectorReg641_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg128 }, }, + { 4019 /* xtn */, AArch64::XTNv8i8, Convert__VectorReg641_1__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg128 }, }, + { 4023 /* xtn2 */, AArch64::XTNv16i8, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 4023 /* xtn2 */, AArch64::XTNv4i32, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 4023 /* xtn2 */, AArch64::XTNv8i16, Convert__VectorReg1281_1__Tie0__VectorReg1281_2, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 4028 /* yield */, AArch64::HINT, Convert__imm_95_1, 0, { }, }, + { 4034 /* zip1 */, AArch64::ZIP1v16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 4034 /* zip1 */, AArch64::ZIP1v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 4034 /* zip1 */, AArch64::ZIP1v2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 4034 /* zip1 */, AArch64::ZIP1v4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 4034 /* zip1 */, AArch64::ZIP1v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 4034 /* zip1 */, AArch64::ZIP1v8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 4034 /* zip1 */, AArch64::ZIP1v8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 4039 /* zip2 */, AArch64::ZIP2v16i8, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 4039 /* zip2 */, AArch64::ZIP2v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 4039 /* zip2 */, AArch64::ZIP2v2i32, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 4039 /* zip2 */, AArch64::ZIP2v4i16, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 4039 /* zip2 */, AArch64::ZIP2v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, + { 4039 /* zip2 */, AArch64::ZIP2v8i8, Convert__VectorReg641_1__VectorReg641_2__VectorReg641_3, Feature_HasNEON, { MCK__DOT_8b, MCK_VectorReg64, MCK_VectorReg64, MCK_VectorReg64 }, }, + { 4039 /* zip2 */, AArch64::ZIP2v8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorReg1281_3, Feature_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128 }, }, +}; + +unsigned AArch64AsmParser:: +MatchInstructionImpl(const OperandVector &Operands, + MCInst &Inst, uint64_t &ErrorInfo, + bool matchingInlineAsm, unsigned VariantID) { + // Eliminate obvious mismatches. + if (Operands.size() > 8) { + ErrorInfo = 8; + return Match_InvalidOperand; + } + + // Get the current feature set. + uint64_t AvailableFeatures = getAvailableFeatures(); + + // Get the instruction mnemonic, which is the first token. + StringRef Mnemonic = ((AArch64Operand&)*Operands[0]).getToken(); + + // Some state to try to produce better error messages. + bool HadMatchOtherThanFeatures = false; + bool HadMatchOtherThanPredicate = false; + unsigned RetCode = Match_InvalidOperand; + uint64_t MissingFeatures = ~0ULL; + // Set ErrorInfo to the operand that mismatches if it is + // wrong for all instances of the instruction. + ErrorInfo = ~0ULL; + // Find the appropriate table for this asm variant. + const MatchEntry *Start, *End; + switch (VariantID) { + default: llvm_unreachable("invalid variant!"); + case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; + case 1: Start = std::begin(MatchTable1); End = std::end(MatchTable1); break; + } + // Search the table. + auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode()); + + // Return a more specific error code if no mnemonics match. + if (MnemonicRange.first == MnemonicRange.second) + return Match_MnemonicFail; + + for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; + it != ie; ++it) { + // equal_range guarantees that instruction mnemonic matches. + assert(Mnemonic == it->getMnemonic()); + bool OperandsValid = true; + for (unsigned i = 0; i != 7; ++i) { + auto Formal = static_cast(it->Classes[i]); + if (i+1 >= Operands.size()) { + OperandsValid = (Formal == InvalidMatchClass); + if (!OperandsValid) ErrorInfo = i+1; + break; + } + MCParsedAsmOperand &Actual = *Operands[i+1]; + unsigned Diag = validateOperandClass(Actual, Formal); + if (Diag == Match_Success) + continue; + // If the generic handler indicates an invalid operand + // failure, check for a special case. + if (Diag == Match_InvalidOperand) { + Diag = validateTargetOperandClass(Actual, Formal); + if (Diag == Match_Success) + continue; + } + // If this operand is broken for all of the instances of this + // mnemonic, keep track of it so we can report loc info. + // If we already had a match that only failed due to a + // target predicate, that diagnostic is preferred. + if (!HadMatchOtherThanPredicate && + (it == MnemonicRange.first || ErrorInfo <= i+1)) { + ErrorInfo = i+1; + // InvalidOperand is the default. Prefer specificity. + if (Diag != Match_InvalidOperand) + RetCode = Diag; + } + // Otherwise, just reject this instance of the mnemonic. + OperandsValid = false; + break; + } + + if (!OperandsValid) continue; + if ((AvailableFeatures & it->RequiredFeatures) != it->RequiredFeatures) { + HadMatchOtherThanFeatures = true; + uint64_t NewMissingFeatures = it->RequiredFeatures & ~AvailableFeatures; + if (countPopulation(NewMissingFeatures) <= + countPopulation(MissingFeatures)) + MissingFeatures = NewMissingFeatures; + continue; + } + + Inst.clear(); + + if (matchingInlineAsm) { + Inst.setOpcode(it->Opcode); + convertToMapAndConstraints(it->ConvertFn, Operands); + return Match_Success; + } + + // We have selected a definite instruction, convert the parsed + // operands into the appropriate MCInst. + convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands); + + // We have a potential match. Check the target predicate to + // handle any context sensitive constraints. + unsigned MatchResult; + if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) { + Inst.clear(); + RetCode = MatchResult; + HadMatchOtherThanPredicate = true; + continue; + } + + return Match_Success; + } + + // Okay, we had no match. Try to return a useful error code. + if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures) + return RetCode; + + // Missing feature matches return which features were missing + ErrorInfo = MissingFeatures; + return Match_MissingFeature; +} + +namespace { + struct OperandMatchEntry { + uint8_t RequiredFeatures; + uint16_t Mnemonic; + uint16_t Class; + uint8_t OperandMask; + + StringRef getMnemonic() const { + return StringRef(MnemonicTable + Mnemonic + 1, + MnemonicTable[Mnemonic]); + } + }; + + // Predicate for searching for an opcode. + struct LessOpcodeOperand { + bool operator()(const OperandMatchEntry &LHS, StringRef RHS) { + return LHS.getMnemonic() < RHS; + } + bool operator()(StringRef LHS, const OperandMatchEntry &RHS) { + return LHS < RHS.getMnemonic(); + } + bool operator()(const OperandMatchEntry &LHS, const OperandMatchEntry &RHS) { + return LHS.getMnemonic() < RHS.getMnemonic(); + } + }; +} // end anonymous namespace. + +static const OperandMatchEntry OperandMatchTable[202] = { + /* Operand List Mask, Mnemonic, Operand Class, Features */ + { 0, 13 /* add */, MCK_AddSubImmNeg, 4 /* 2 */ }, + { 0, 13 /* add */, MCK_AddSubImmNeg, 4 /* 2 */ }, + { 0, 13 /* add */, MCK_AddSubImm, 4 /* 2 */ }, + { 0, 13 /* add */, MCK_AddSubImm, 4 /* 2 */ }, + { 0, 13 /* add */, MCK_AddSubImmNeg, 4 /* 2 */ }, + { 0, 13 /* add */, MCK_AddSubImmNeg, 4 /* 2 */ }, + { 0, 13 /* add */, MCK_AddSubImm, 4 /* 2 */ }, + { 0, 13 /* add */, MCK_AddSubImm, 4 /* 2 */ }, + { 0, 35 /* adds */, MCK_AddSubImmNeg, 4 /* 2 */ }, + { 0, 35 /* adds */, MCK_AddSubImmNeg, 4 /* 2 */ }, + { 0, 35 /* adds */, MCK_AddSubImm, 4 /* 2 */ }, + { 0, 35 /* adds */, MCK_AddSubImm, 4 /* 2 */ }, + { 0, 35 /* adds */, MCK_AddSubImmNeg, 4 /* 2 */ }, + { 0, 35 /* adds */, MCK_AddSubImmNeg, 4 /* 2 */ }, + { 0, 35 /* adds */, MCK_AddSubImm, 4 /* 2 */ }, + { 0, 35 /* adds */, MCK_AddSubImm, 4 /* 2 */ }, + { 0, 45 /* adr */, MCK_AdrLabel, 2 /* 1 */ }, + { 0, 45 /* adr */, MCK_AdrLabel, 2 /* 1 */ }, + { 0, 49 /* adrp */, MCK_AdrpLabel, 2 /* 1 */ }, + { 0, 49 /* adrp */, MCK_AdrpLabel, 2 /* 1 */ }, + { Feature_HasV8_1a, 204 /* casp */, MCK_WSeqPair, 3 /* 0, 1 */ }, + { Feature_HasV8_1a, 204 /* casp */, MCK_WSeqPair, 3 /* 0, 1 */ }, + { Feature_HasV8_1a, 204 /* casp */, MCK_XSeqPair, 3 /* 0, 1 */ }, + { Feature_HasV8_1a, 204 /* casp */, MCK_XSeqPair, 3 /* 0, 1 */ }, + { Feature_HasV8_1a, 209 /* caspa */, MCK_WSeqPair, 3 /* 0, 1 */ }, + { Feature_HasV8_1a, 209 /* caspa */, MCK_WSeqPair, 3 /* 0, 1 */ }, + { Feature_HasV8_1a, 209 /* caspa */, MCK_XSeqPair, 3 /* 0, 1 */ }, + { Feature_HasV8_1a, 209 /* caspa */, MCK_XSeqPair, 3 /* 0, 1 */ }, + { Feature_HasV8_1a, 215 /* caspal */, MCK_WSeqPair, 3 /* 0, 1 */ }, + { Feature_HasV8_1a, 215 /* caspal */, MCK_WSeqPair, 3 /* 0, 1 */ }, + { Feature_HasV8_1a, 215 /* caspal */, MCK_XSeqPair, 3 /* 0, 1 */ }, + { Feature_HasV8_1a, 215 /* caspal */, MCK_XSeqPair, 3 /* 0, 1 */ }, + { Feature_HasV8_1a, 222 /* caspl */, MCK_WSeqPair, 3 /* 0, 1 */ }, + { Feature_HasV8_1a, 222 /* caspl */, MCK_WSeqPair, 3 /* 0, 1 */ }, + { Feature_HasV8_1a, 222 /* caspl */, MCK_XSeqPair, 3 /* 0, 1 */ }, + { Feature_HasV8_1a, 222 /* caspl */, MCK_XSeqPair, 3 /* 0, 1 */ }, + { 0, 316 /* cmn */, MCK_AddSubImmNeg, 2 /* 1 */ }, + { 0, 316 /* cmn */, MCK_AddSubImmNeg, 2 /* 1 */ }, + { 0, 316 /* cmn */, MCK_AddSubImm, 2 /* 1 */ }, + { 0, 316 /* cmn */, MCK_AddSubImm, 2 /* 1 */ }, + { 0, 316 /* cmn */, MCK_AddSubImmNeg, 2 /* 1 */ }, + { 0, 316 /* cmn */, MCK_AddSubImmNeg, 2 /* 1 */ }, + { 0, 316 /* cmn */, MCK_AddSubImm, 2 /* 1 */ }, + { 0, 316 /* cmn */, MCK_AddSubImm, 2 /* 1 */ }, + { 0, 320 /* cmp */, MCK_AddSubImmNeg, 2 /* 1 */ }, + { 0, 320 /* cmp */, MCK_AddSubImmNeg, 2 /* 1 */ }, + { 0, 320 /* cmp */, MCK_AddSubImm, 2 /* 1 */ }, + { 0, 320 /* cmp */, MCK_AddSubImm, 2 /* 1 */ }, + { 0, 320 /* cmp */, MCK_AddSubImmNeg, 2 /* 1 */ }, + { 0, 320 /* cmp */, MCK_AddSubImmNeg, 2 /* 1 */ }, + { 0, 320 /* cmp */, MCK_AddSubImm, 2 /* 1 */ }, + { 0, 320 /* cmp */, MCK_AddSubImm, 2 /* 1 */ }, + { 0, 451 /* dmb */, MCK_Barrier, 1 /* 0 */ }, + { 0, 451 /* dmb */, MCK_Barrier, 1 /* 0 */ }, + { 0, 460 /* dsb */, MCK_Barrier, 1 /* 0 */ }, + { 0, 460 /* dsb */, MCK_Barrier, 1 /* 0 */ }, + { Feature_HasFullFP16, 812 /* fmov */, MCK_FPImm, 2 /* 1 */ }, + { Feature_HasFullFP16, 812 /* fmov */, MCK_FPImm, 2 /* 1 */ }, + { Feature_HasFPARMv8, 812 /* fmov */, MCK_FPImm, 2 /* 1 */ }, + { Feature_HasFPARMv8, 812 /* fmov */, MCK_FPImm, 2 /* 1 */ }, + { Feature_HasFPARMv8, 812 /* fmov */, MCK_FPImm, 2 /* 1 */ }, + { Feature_HasFPARMv8, 812 /* fmov */, MCK_FPImm, 2 /* 1 */ }, + { Feature_HasNEON, 812 /* fmov */, MCK_FPImm, 4 /* 2 */ }, + { Feature_HasNEON, 812 /* fmov */, MCK_FPImm, 4 /* 2 */ }, + { Feature_HasNEON|Feature_HasFullFP16, 812 /* fmov */, MCK_FPImm, 4 /* 2 */ }, + { Feature_HasNEON, 812 /* fmov */, MCK_FPImm, 4 /* 2 */ }, + { Feature_HasNEON|Feature_HasFullFP16, 812 /* fmov */, MCK_FPImm, 4 /* 2 */ }, + { Feature_HasNEON, 812 /* fmov */, MCK_FPImm, 4 /* 2 */ }, + { Feature_HasNEON, 812 /* fmov */, MCK_FPImm, 4 /* 2 */ }, + { Feature_HasNEON|Feature_HasFullFP16, 812 /* fmov */, MCK_FPImm, 4 /* 2 */ }, + { Feature_HasNEON, 812 /* fmov */, MCK_FPImm, 4 /* 2 */ }, + { Feature_HasNEON|Feature_HasFullFP16, 812 /* fmov */, MCK_FPImm, 4 /* 2 */ }, + { 0, 973 /* isb */, MCK_Barrier, 1 /* 0 */ }, + { 0, 973 /* isb */, MCK_Barrier, 1 /* 0 */ }, + { 0, 1105 /* ldar */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 1105 /* ldar */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 1105 /* ldar */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 1105 /* ldar */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 1110 /* ldarb */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 1110 /* ldarb */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 1116 /* ldarh */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 1116 /* ldarh */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 1122 /* ldaxp */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 1122 /* ldaxp */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 1122 /* ldaxp */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 1122 /* ldaxp */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 1128 /* ldaxr */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 1128 /* ldaxr */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 1128 /* ldaxr */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 1128 /* ldaxr */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 1134 /* ldaxrb */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 1134 /* ldaxrb */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 1141 /* ldaxrh */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 1141 /* ldaxrh */, MCK_GPR64sp0, 4 /* 2 */ }, + { Feature_HasV8_1a, 1332 /* ldlar */, MCK_GPR64sp0, 4 /* 2 */ }, + { Feature_HasV8_1a, 1332 /* ldlar */, MCK_GPR64sp0, 4 /* 2 */ }, + { Feature_HasV8_1a, 1332 /* ldlar */, MCK_GPR64sp0, 4 /* 2 */ }, + { Feature_HasV8_1a, 1332 /* ldlar */, MCK_GPR64sp0, 4 /* 2 */ }, + { Feature_HasV8_1a, 1338 /* ldlarb */, MCK_GPR64sp0, 4 /* 2 */ }, + { Feature_HasV8_1a, 1338 /* ldlarb */, MCK_GPR64sp0, 4 /* 2 */ }, + { Feature_HasV8_1a, 1345 /* ldlarh */, MCK_GPR64sp0, 4 /* 2 */ }, + { Feature_HasV8_1a, 1345 /* ldlarh */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 1983 /* ldxp */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 1983 /* ldxp */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 1983 /* ldxp */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 1983 /* ldxp */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 1988 /* ldxr */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 1988 /* ldxr */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 1988 /* ldxr */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 1988 /* ldxr */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 1993 /* ldxrb */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 1993 /* ldxrb */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 1999 /* ldxrh */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 1999 /* ldxrh */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 2065 /* mrs */, MCK_MRSSystemRegister, 2 /* 1 */ }, + { 0, 2065 /* mrs */, MCK_MRSSystemRegister, 2 /* 1 */ }, + { 0, 2069 /* msr */, MCK_MSRSystemRegister, 1 /* 0 */ }, + { 0, 2069 /* msr */, MCK_MSRSystemRegister, 1 /* 0 */ }, + { 0, 2069 /* msr */, MCK_SystemPStateFieldWithImm0_15, 1 /* 0 */ }, + { 0, 2069 /* msr */, MCK_SystemPStateFieldWithImm0_15, 1 /* 0 */ }, + { 0, 2069 /* msr */, MCK_SystemPStateFieldWithImm0_1, 1 /* 0 */ }, + { 0, 2069 /* msr */, MCK_SystemPStateFieldWithImm0_1, 1 /* 0 */ }, + { 0, 2143 /* prfm */, MCK_Prefetch, 1 /* 0 */ }, + { 0, 2143 /* prfm */, MCK_Prefetch, 1 /* 0 */ }, + { 0, 2143 /* prfm */, MCK_Prefetch, 1 /* 0 */ }, + { 0, 2143 /* prfm */, MCK_Prefetch, 1 /* 0 */ }, + { 0, 2143 /* prfm */, MCK_Prefetch, 1 /* 0 */ }, + { 0, 2143 /* prfm */, MCK_Prefetch, 1 /* 0 */ }, + { 0, 2143 /* prfm */, MCK_Prefetch, 1 /* 0 */ }, + { 0, 2143 /* prfm */, MCK_Prefetch, 1 /* 0 */ }, + { 0, 2143 /* prfm */, MCK_Prefetch, 1 /* 0 */ }, + { 0, 2143 /* prfm */, MCK_Prefetch, 1 /* 0 */ }, + { 0, 2143 /* prfm */, MCK_Prefetch, 1 /* 0 */ }, + { 0, 2143 /* prfm */, MCK_Prefetch, 1 /* 0 */ }, + { 0, 2148 /* prfum */, MCK_Prefetch, 1 /* 0 */ }, + { 0, 2148 /* prfum */, MCK_Prefetch, 1 /* 0 */ }, + { 0, 2148 /* prfum */, MCK_Prefetch, 1 /* 0 */ }, + { 0, 2148 /* prfum */, MCK_Prefetch, 1 /* 0 */ }, + { Feature_HasSPE, 2154 /* psb */, MCK_PSBHint, 1 /* 0 */ }, + { Feature_HasSPE, 2154 /* psb */, MCK_PSBHint, 1 /* 0 */ }, + { Feature_HasV8_1a, 3040 /* stllr */, MCK_GPR64sp0, 4 /* 2 */ }, + { Feature_HasV8_1a, 3040 /* stllr */, MCK_GPR64sp0, 4 /* 2 */ }, + { Feature_HasV8_1a, 3040 /* stllr */, MCK_GPR64sp0, 4 /* 2 */ }, + { Feature_HasV8_1a, 3040 /* stllr */, MCK_GPR64sp0, 4 /* 2 */ }, + { Feature_HasV8_1a, 3046 /* stllrb */, MCK_GPR64sp0, 4 /* 2 */ }, + { Feature_HasV8_1a, 3046 /* stllrb */, MCK_GPR64sp0, 4 /* 2 */ }, + { Feature_HasV8_1a, 3053 /* stllrh */, MCK_GPR64sp0, 4 /* 2 */ }, + { Feature_HasV8_1a, 3053 /* stllrh */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 3060 /* stlr */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 3060 /* stlr */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 3060 /* stlr */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 3060 /* stlr */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 3065 /* stlrb */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 3065 /* stlrb */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 3071 /* stlrh */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 3071 /* stlrh */, MCK_GPR64sp0, 4 /* 2 */ }, + { 0, 3077 /* stlxp */, MCK_GPR64sp0, 16 /* 4 */ }, + { 0, 3077 /* stlxp */, MCK_GPR64sp0, 16 /* 4 */ }, + { 0, 3077 /* stlxp */, MCK_GPR64sp0, 16 /* 4 */ }, + { 0, 3077 /* stlxp */, MCK_GPR64sp0, 16 /* 4 */ }, + { 0, 3083 /* stlxr */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 3083 /* stlxr */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 3083 /* stlxr */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 3083 /* stlxr */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 3089 /* stlxrb */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 3089 /* stlxrb */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 3096 /* stlxrh */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 3096 /* stlxrh */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 3399 /* stxp */, MCK_GPR64sp0, 16 /* 4 */ }, + { 0, 3399 /* stxp */, MCK_GPR64sp0, 16 /* 4 */ }, + { 0, 3399 /* stxp */, MCK_GPR64sp0, 16 /* 4 */ }, + { 0, 3399 /* stxp */, MCK_GPR64sp0, 16 /* 4 */ }, + { 0, 3404 /* stxr */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 3404 /* stxr */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 3404 /* stxr */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 3404 /* stxr */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 3409 /* stxrb */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 3409 /* stxrb */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 3415 /* stxrh */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 3415 /* stxrh */, MCK_GPR64sp0, 8 /* 3 */ }, + { 0, 3421 /* sub */, MCK_AddSubImmNeg, 4 /* 2 */ }, + { 0, 3421 /* sub */, MCK_AddSubImmNeg, 4 /* 2 */ }, + { 0, 3421 /* sub */, MCK_AddSubImm, 4 /* 2 */ }, + { 0, 3421 /* sub */, MCK_AddSubImm, 4 /* 2 */ }, + { 0, 3421 /* sub */, MCK_AddSubImmNeg, 4 /* 2 */ }, + { 0, 3421 /* sub */, MCK_AddSubImmNeg, 4 /* 2 */ }, + { 0, 3421 /* sub */, MCK_AddSubImm, 4 /* 2 */ }, + { 0, 3421 /* sub */, MCK_AddSubImm, 4 /* 2 */ }, + { 0, 3438 /* subs */, MCK_AddSubImmNeg, 4 /* 2 */ }, + { 0, 3438 /* subs */, MCK_AddSubImmNeg, 4 /* 2 */ }, + { 0, 3438 /* subs */, MCK_AddSubImm, 4 /* 2 */ }, + { 0, 3438 /* subs */, MCK_AddSubImm, 4 /* 2 */ }, + { 0, 3438 /* subs */, MCK_AddSubImmNeg, 4 /* 2 */ }, + { 0, 3438 /* subs */, MCK_AddSubImmNeg, 4 /* 2 */ }, + { 0, 3438 /* subs */, MCK_AddSubImm, 4 /* 2 */ }, + { 0, 3438 /* subs */, MCK_AddSubImm, 4 /* 2 */ }, + { 0, 3548 /* sys */, MCK_SysCR, 6 /* 1, 2 */ }, + { 0, 3548 /* sys */, MCK_SysCR, 6 /* 1, 2 */ }, + { 0, 3548 /* sys */, MCK_SysCR, 6 /* 1, 2 */ }, + { 0, 3548 /* sys */, MCK_SysCR, 6 /* 1, 2 */ }, + { 0, 3552 /* sysl */, MCK_SysCR, 12 /* 2, 3 */ }, + { 0, 3552 /* sysl */, MCK_SysCR, 12 /* 2, 3 */ }, +}; + +AArch64AsmParser::OperandMatchResultTy AArch64AsmParser:: +tryCustomParseOperand(OperandVector &Operands, + unsigned MCK) { + + switch(MCK) { + case MCK_AddSubImmNeg: + return tryParseAddSubImm(Operands); + case MCK_AddSubImm: + return tryParseAddSubImm(Operands); + case MCK_AdrLabel: + return tryParseAdrLabel(Operands); + case MCK_AdrpLabel: + return tryParseAdrpLabel(Operands); + case MCK_Barrier: + return tryParseBarrierOperand(Operands); + case MCK_FPImm: + return tryParseFPImm(Operands); + case MCK_GPR64sp0: + return tryParseGPR64sp0Operand(Operands); + case MCK_MRSSystemRegister: + return tryParseSysReg(Operands); + case MCK_MSRSystemRegister: + return tryParseSysReg(Operands); + case MCK_PSBHint: + return tryParsePSBHint(Operands); + case MCK_Prefetch: + return tryParsePrefetch(Operands); + case MCK_SysCR: + return tryParseSysCROperand(Operands); + case MCK_SystemPStateFieldWithImm0_15: + return tryParseSysReg(Operands); + case MCK_SystemPStateFieldWithImm0_1: + return tryParseSysReg(Operands); + case MCK_WSeqPair: + return tryParseGPRSeqPair(Operands); + case MCK_XSeqPair: + return tryParseGPRSeqPair(Operands); + default: + return MatchOperand_NoMatch; + } + return MatchOperand_NoMatch; +} + +AArch64AsmParser::OperandMatchResultTy AArch64AsmParser:: +MatchOperandParserImpl(OperandVector &Operands, + StringRef Mnemonic) { + // Get the current feature set. + uint64_t AvailableFeatures = getAvailableFeatures(); + + // Get the next operand index. + unsigned NextOpNum = Operands.size() - 1; + // Search the table. + auto MnemonicRange = + std::equal_range(std::begin(OperandMatchTable), std::end(OperandMatchTable), + Mnemonic, LessOpcodeOperand()); + + if (MnemonicRange.first == MnemonicRange.second) + return MatchOperand_NoMatch; + + for (const OperandMatchEntry *it = MnemonicRange.first, + *ie = MnemonicRange.second; it != ie; ++it) { + // equal_range guarantees that instruction mnemonic matches. + assert(Mnemonic == it->getMnemonic()); + + // check if the available features match + if ((AvailableFeatures & it->RequiredFeatures) != it->RequiredFeatures) { + continue; + } + + // check if the operand in question has a custom parser. + if (!(it->OperandMask & (1 << NextOpNum))) + continue; + + // call custom parse method to handle the operand + OperandMatchResultTy Result = tryCustomParseOperand(Operands, it->Class); + if (Result != MatchOperand_NoMatch) + return Result; + } + + // Okay, we had no match. + return MatchOperand_NoMatch; +} + +#endif // GET_MATCHER_IMPLEMENTATION + diff --git a/llvm/lib/Target/AArch64/AArch64GenInstrInfo.inc b/llvm/lib/Target/AArch64/AArch64GenInstrInfo.inc new file mode 100644 index 0000000..082011a --- /dev/null +++ b/llvm/lib/Target/AArch64/AArch64GenInstrInfo.inc @@ -0,0 +1,6692 @@ +/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ +|* *| +|* Target Instruction Enum Values *| +|* *| +|* Automatically generated file, do not edit! *| +|* *| +\*===----------------------------------------------------------------------===*/ + + +#ifdef GET_INSTRINFO_ENUM +#undef GET_INSTRINFO_ENUM +namespace llvm_ks { + +namespace AArch64 { + enum { + PHI = 0, + INLINEASM = 1, + CFI_INSTRUCTION = 2, + EH_LABEL = 3, + GC_LABEL = 4, + KILL = 5, + EXTRACT_SUBREG = 6, + INSERT_SUBREG = 7, + IMPLICIT_DEF = 8, + SUBREG_TO_REG = 9, + COPY_TO_REGCLASS = 10, + DBG_VALUE = 11, + REG_SEQUENCE = 12, + COPY = 13, + BUNDLE = 14, + LIFETIME_START = 15, + LIFETIME_END = 16, + STACKMAP = 17, + PATCHPOINT = 18, + LOAD_STACK_GUARD = 19, + STATEPOINT = 20, + LOCAL_ESCAPE = 21, + FAULTING_LOAD_OP = 22, + G_ADD = 23, + ABSv16i8 = 24, + ABSv1i64 = 25, + ABSv2i32 = 26, + ABSv2i64 = 27, + ABSv4i16 = 28, + ABSv4i32 = 29, + ABSv8i16 = 30, + ABSv8i8 = 31, + ADCSWr = 32, + ADCSXr = 33, + ADCWr = 34, + ADCXr = 35, + ADDHNv2i64_v2i32 = 36, + ADDHNv2i64_v4i32 = 37, + ADDHNv4i32_v4i16 = 38, + ADDHNv4i32_v8i16 = 39, + ADDHNv8i16_v16i8 = 40, + ADDHNv8i16_v8i8 = 41, + ADDPv16i8 = 42, + ADDPv2i32 = 43, + ADDPv2i64 = 44, + ADDPv2i64p = 45, + ADDPv4i16 = 46, + ADDPv4i32 = 47, + ADDPv8i16 = 48, + ADDPv8i8 = 49, + ADDSWri = 50, + ADDSWrr = 51, + ADDSWrs = 52, + ADDSWrx = 53, + ADDSXri = 54, + ADDSXrr = 55, + ADDSXrs = 56, + ADDSXrx = 57, + ADDSXrx64 = 58, + ADDVv16i8v = 59, + ADDVv4i16v = 60, + ADDVv4i32v = 61, + ADDVv8i16v = 62, + ADDVv8i8v = 63, + ADDWri = 64, + ADDWrr = 65, + ADDWrs = 66, + ADDWrx = 67, + ADDXri = 68, + ADDXrr = 69, + ADDXrs = 70, + ADDXrx = 71, + ADDXrx64 = 72, + ADDv16i8 = 73, + ADDv1i64 = 74, + ADDv2i32 = 75, + ADDv2i64 = 76, + ADDv4i16 = 77, + ADDv4i32 = 78, + ADDv8i16 = 79, + ADDv8i8 = 80, + ADJCALLSTACKDOWN = 81, + ADJCALLSTACKUP = 82, + ADR = 83, + ADRP = 84, + AESDrr = 85, + AESErr = 86, + AESIMCrr = 87, + AESMCrr = 88, + ANDSWri = 89, + ANDSWrr = 90, + ANDSWrs = 91, + ANDSXri = 92, + ANDSXrr = 93, + ANDSXrs = 94, + ANDWri = 95, + ANDWrr = 96, + ANDWrs = 97, + ANDXri = 98, + ANDXrr = 99, + ANDXrs = 100, + ANDv16i8 = 101, + ANDv8i8 = 102, + ASRVWr = 103, + ASRVXr = 104, + B = 105, + BFMWri = 106, + BFMXri = 107, + BICSWrr = 108, + BICSWrs = 109, + BICSXrr = 110, + BICSXrs = 111, + BICWrr = 112, + BICWrs = 113, + BICXrr = 114, + BICXrs = 115, + BICv16i8 = 116, + BICv2i32 = 117, + BICv4i16 = 118, + BICv4i32 = 119, + BICv8i16 = 120, + BICv8i8 = 121, + BIFv16i8 = 122, + BIFv8i8 = 123, + BITv16i8 = 124, + BITv8i8 = 125, + BL = 126, + BLR = 127, + BR = 128, + BRK = 129, + BSLv16i8 = 130, + BSLv8i8 = 131, + Bcc = 132, + CASALb = 133, + CASALd = 134, + CASALh = 135, + CASALs = 136, + CASAb = 137, + CASAd = 138, + CASAh = 139, + CASAs = 140, + CASLb = 141, + CASLd = 142, + CASLh = 143, + CASLs = 144, + CASPALd = 145, + CASPALs = 146, + CASPAd = 147, + CASPAs = 148, + CASPLd = 149, + CASPLs = 150, + CASPd = 151, + CASPs = 152, + CASb = 153, + CASd = 154, + CASh = 155, + CASs = 156, + CBNZW = 157, + CBNZX = 158, + CBZW = 159, + CBZX = 160, + CCMNWi = 161, + CCMNWr = 162, + CCMNXi = 163, + CCMNXr = 164, + CCMPWi = 165, + CCMPWr = 166, + CCMPXi = 167, + CCMPXr = 168, + CLREX = 169, + CLSWr = 170, + CLSXr = 171, + CLSv16i8 = 172, + CLSv2i32 = 173, + CLSv4i16 = 174, + CLSv4i32 = 175, + CLSv8i16 = 176, + CLSv8i8 = 177, + CLZWr = 178, + CLZXr = 179, + CLZv16i8 = 180, + CLZv2i32 = 181, + CLZv4i16 = 182, + CLZv4i32 = 183, + CLZv8i16 = 184, + CLZv8i8 = 185, + CMEQv16i8 = 186, + CMEQv16i8rz = 187, + CMEQv1i64 = 188, + CMEQv1i64rz = 189, + CMEQv2i32 = 190, + CMEQv2i32rz = 191, + CMEQv2i64 = 192, + CMEQv2i64rz = 193, + CMEQv4i16 = 194, + CMEQv4i16rz = 195, + CMEQv4i32 = 196, + CMEQv4i32rz = 197, + CMEQv8i16 = 198, + CMEQv8i16rz = 199, + CMEQv8i8 = 200, + CMEQv8i8rz = 201, + CMGEv16i8 = 202, + CMGEv16i8rz = 203, + CMGEv1i64 = 204, + CMGEv1i64rz = 205, + CMGEv2i32 = 206, + CMGEv2i32rz = 207, + CMGEv2i64 = 208, + CMGEv2i64rz = 209, + CMGEv4i16 = 210, + CMGEv4i16rz = 211, + CMGEv4i32 = 212, + CMGEv4i32rz = 213, + CMGEv8i16 = 214, + CMGEv8i16rz = 215, + CMGEv8i8 = 216, + CMGEv8i8rz = 217, + CMGTv16i8 = 218, + CMGTv16i8rz = 219, + CMGTv1i64 = 220, + CMGTv1i64rz = 221, + CMGTv2i32 = 222, + CMGTv2i32rz = 223, + CMGTv2i64 = 224, + CMGTv2i64rz = 225, + CMGTv4i16 = 226, + CMGTv4i16rz = 227, + CMGTv4i32 = 228, + CMGTv4i32rz = 229, + CMGTv8i16 = 230, + CMGTv8i16rz = 231, + CMGTv8i8 = 232, + CMGTv8i8rz = 233, + CMHIv16i8 = 234, + CMHIv1i64 = 235, + CMHIv2i32 = 236, + CMHIv2i64 = 237, + CMHIv4i16 = 238, + CMHIv4i32 = 239, + CMHIv8i16 = 240, + CMHIv8i8 = 241, + CMHSv16i8 = 242, + CMHSv1i64 = 243, + CMHSv2i32 = 244, + CMHSv2i64 = 245, + CMHSv4i16 = 246, + CMHSv4i32 = 247, + CMHSv8i16 = 248, + CMHSv8i8 = 249, + CMLEv16i8rz = 250, + CMLEv1i64rz = 251, + CMLEv2i32rz = 252, + CMLEv2i64rz = 253, + CMLEv4i16rz = 254, + CMLEv4i32rz = 255, + CMLEv8i16rz = 256, + CMLEv8i8rz = 257, + CMLTv16i8rz = 258, + CMLTv1i64rz = 259, + CMLTv2i32rz = 260, + CMLTv2i64rz = 261, + CMLTv4i16rz = 262, + CMLTv4i32rz = 263, + CMLTv8i16rz = 264, + CMLTv8i8rz = 265, + CMTSTv16i8 = 266, + CMTSTv1i64 = 267, + CMTSTv2i32 = 268, + CMTSTv2i64 = 269, + CMTSTv4i16 = 270, + CMTSTv4i32 = 271, + CMTSTv8i16 = 272, + CMTSTv8i8 = 273, + CNTv16i8 = 274, + CNTv8i8 = 275, + CPYi16 = 276, + CPYi32 = 277, + CPYi64 = 278, + CPYi8 = 279, + CRC32Brr = 280, + CRC32CBrr = 281, + CRC32CHrr = 282, + CRC32CWrr = 283, + CRC32CXrr = 284, + CRC32Hrr = 285, + CRC32Wrr = 286, + CRC32Xrr = 287, + CSELWr = 288, + CSELXr = 289, + CSINCWr = 290, + CSINCXr = 291, + CSINVWr = 292, + CSINVXr = 293, + CSNEGWr = 294, + CSNEGXr = 295, + DCPS1 = 296, + DCPS2 = 297, + DCPS3 = 298, + DMB = 299, + DRPS = 300, + DSB = 301, + DUPv16i8gpr = 302, + DUPv16i8lane = 303, + DUPv2i32gpr = 304, + DUPv2i32lane = 305, + DUPv2i64gpr = 306, + DUPv2i64lane = 307, + DUPv4i16gpr = 308, + DUPv4i16lane = 309, + DUPv4i32gpr = 310, + DUPv4i32lane = 311, + DUPv8i16gpr = 312, + DUPv8i16lane = 313, + DUPv8i8gpr = 314, + DUPv8i8lane = 315, + EONWrr = 316, + EONWrs = 317, + EONXrr = 318, + EONXrs = 319, + EORWri = 320, + EORWrr = 321, + EORWrs = 322, + EORXri = 323, + EORXrr = 324, + EORXrs = 325, + EORv16i8 = 326, + EORv8i8 = 327, + ERET = 328, + EXTRWrri = 329, + EXTRXrri = 330, + EXTv16i8 = 331, + EXTv8i8 = 332, + F128CSEL = 333, + FABD16 = 334, + FABD32 = 335, + FABD64 = 336, + FABDv2f32 = 337, + FABDv2f64 = 338, + FABDv4f16 = 339, + FABDv4f32 = 340, + FABDv8f16 = 341, + FABSDr = 342, + FABSHr = 343, + FABSSr = 344, + FABSv2f32 = 345, + FABSv2f64 = 346, + FABSv4f16 = 347, + FABSv4f32 = 348, + FABSv8f16 = 349, + FACGE16 = 350, + FACGE32 = 351, + FACGE64 = 352, + FACGEv2f32 = 353, + FACGEv2f64 = 354, + FACGEv4f16 = 355, + FACGEv4f32 = 356, + FACGEv8f16 = 357, + FACGT16 = 358, + FACGT32 = 359, + FACGT64 = 360, + FACGTv2f32 = 361, + FACGTv2f64 = 362, + FACGTv4f16 = 363, + FACGTv4f32 = 364, + FACGTv8f16 = 365, + FADDDrr = 366, + FADDHrr = 367, + FADDPv2f32 = 368, + FADDPv2f64 = 369, + FADDPv2i16p = 370, + FADDPv2i32p = 371, + FADDPv2i64p = 372, + FADDPv4f16 = 373, + FADDPv4f32 = 374, + FADDPv8f16 = 375, + FADDSrr = 376, + FADDv2f32 = 377, + FADDv2f64 = 378, + FADDv4f16 = 379, + FADDv4f32 = 380, + FADDv8f16 = 381, + FCCMPDrr = 382, + FCCMPEDrr = 383, + FCCMPEHrr = 384, + FCCMPESrr = 385, + FCCMPHrr = 386, + FCCMPSrr = 387, + FCMEQ16 = 388, + FCMEQ32 = 389, + FCMEQ64 = 390, + FCMEQv1i16rz = 391, + FCMEQv1i32rz = 392, + FCMEQv1i64rz = 393, + FCMEQv2f32 = 394, + FCMEQv2f64 = 395, + FCMEQv2i32rz = 396, + FCMEQv2i64rz = 397, + FCMEQv4f16 = 398, + FCMEQv4f32 = 399, + FCMEQv4i16rz = 400, + FCMEQv4i32rz = 401, + FCMEQv8f16 = 402, + FCMEQv8i16rz = 403, + FCMGE16 = 404, + FCMGE32 = 405, + FCMGE64 = 406, + FCMGEv1i16rz = 407, + FCMGEv1i32rz = 408, + FCMGEv1i64rz = 409, + FCMGEv2f32 = 410, + FCMGEv2f64 = 411, + FCMGEv2i32rz = 412, + FCMGEv2i64rz = 413, + FCMGEv4f16 = 414, + FCMGEv4f32 = 415, + FCMGEv4i16rz = 416, + FCMGEv4i32rz = 417, + FCMGEv8f16 = 418, + FCMGEv8i16rz = 419, + FCMGT16 = 420, + FCMGT32 = 421, + FCMGT64 = 422, + FCMGTv1i16rz = 423, + FCMGTv1i32rz = 424, + FCMGTv1i64rz = 425, + FCMGTv2f32 = 426, + FCMGTv2f64 = 427, + FCMGTv2i32rz = 428, + FCMGTv2i64rz = 429, + FCMGTv4f16 = 430, + FCMGTv4f32 = 431, + FCMGTv4i16rz = 432, + FCMGTv4i32rz = 433, + FCMGTv8f16 = 434, + FCMGTv8i16rz = 435, + FCMLEv1i16rz = 436, + FCMLEv1i32rz = 437, + FCMLEv1i64rz = 438, + FCMLEv2i32rz = 439, + FCMLEv2i64rz = 440, + FCMLEv4i16rz = 441, + FCMLEv4i32rz = 442, + FCMLEv8i16rz = 443, + FCMLTv1i16rz = 444, + FCMLTv1i32rz = 445, + FCMLTv1i64rz = 446, + FCMLTv2i32rz = 447, + FCMLTv2i64rz = 448, + FCMLTv4i16rz = 449, + FCMLTv4i32rz = 450, + FCMLTv8i16rz = 451, + FCMPDri = 452, + FCMPDrr = 453, + FCMPEDri = 454, + FCMPEDrr = 455, + FCMPEHri = 456, + FCMPEHrr = 457, + FCMPESri = 458, + FCMPESrr = 459, + FCMPHri = 460, + FCMPHrr = 461, + FCMPSri = 462, + FCMPSrr = 463, + FCSELDrrr = 464, + FCSELHrrr = 465, + FCSELSrrr = 466, + FCVTASUWDr = 467, + FCVTASUWHr = 468, + FCVTASUWSr = 469, + FCVTASUXDr = 470, + FCVTASUXHr = 471, + FCVTASUXSr = 472, + FCVTASv1f16 = 473, + FCVTASv1i32 = 474, + FCVTASv1i64 = 475, + FCVTASv2f32 = 476, + FCVTASv2f64 = 477, + FCVTASv4f16 = 478, + FCVTASv4f32 = 479, + FCVTASv8f16 = 480, + FCVTAUUWDr = 481, + FCVTAUUWHr = 482, + FCVTAUUWSr = 483, + FCVTAUUXDr = 484, + FCVTAUUXHr = 485, + FCVTAUUXSr = 486, + FCVTAUv1f16 = 487, + FCVTAUv1i32 = 488, + FCVTAUv1i64 = 489, + FCVTAUv2f32 = 490, + FCVTAUv2f64 = 491, + FCVTAUv4f16 = 492, + FCVTAUv4f32 = 493, + FCVTAUv8f16 = 494, + FCVTDHr = 495, + FCVTDSr = 496, + FCVTHDr = 497, + FCVTHSr = 498, + FCVTLv2i32 = 499, + FCVTLv4i16 = 500, + FCVTLv4i32 = 501, + FCVTLv8i16 = 502, + FCVTMSUWDr = 503, + FCVTMSUWHr = 504, + FCVTMSUWSr = 505, + FCVTMSUXDr = 506, + FCVTMSUXHr = 507, + FCVTMSUXSr = 508, + FCVTMSv1f16 = 509, + FCVTMSv1i32 = 510, + FCVTMSv1i64 = 511, + FCVTMSv2f32 = 512, + FCVTMSv2f64 = 513, + FCVTMSv4f16 = 514, + FCVTMSv4f32 = 515, + FCVTMSv8f16 = 516, + FCVTMUUWDr = 517, + FCVTMUUWHr = 518, + FCVTMUUWSr = 519, + FCVTMUUXDr = 520, + FCVTMUUXHr = 521, + FCVTMUUXSr = 522, + FCVTMUv1f16 = 523, + FCVTMUv1i32 = 524, + FCVTMUv1i64 = 525, + FCVTMUv2f32 = 526, + FCVTMUv2f64 = 527, + FCVTMUv4f16 = 528, + FCVTMUv4f32 = 529, + FCVTMUv8f16 = 530, + FCVTNSUWDr = 531, + FCVTNSUWHr = 532, + FCVTNSUWSr = 533, + FCVTNSUXDr = 534, + FCVTNSUXHr = 535, + FCVTNSUXSr = 536, + FCVTNSv1f16 = 537, + FCVTNSv1i32 = 538, + FCVTNSv1i64 = 539, + FCVTNSv2f32 = 540, + FCVTNSv2f64 = 541, + FCVTNSv4f16 = 542, + FCVTNSv4f32 = 543, + FCVTNSv8f16 = 544, + FCVTNUUWDr = 545, + FCVTNUUWHr = 546, + FCVTNUUWSr = 547, + FCVTNUUXDr = 548, + FCVTNUUXHr = 549, + FCVTNUUXSr = 550, + FCVTNUv1f16 = 551, + FCVTNUv1i32 = 552, + FCVTNUv1i64 = 553, + FCVTNUv2f32 = 554, + FCVTNUv2f64 = 555, + FCVTNUv4f16 = 556, + FCVTNUv4f32 = 557, + FCVTNUv8f16 = 558, + FCVTNv2i32 = 559, + FCVTNv4i16 = 560, + FCVTNv4i32 = 561, + FCVTNv8i16 = 562, + FCVTPSUWDr = 563, + FCVTPSUWHr = 564, + FCVTPSUWSr = 565, + FCVTPSUXDr = 566, + FCVTPSUXHr = 567, + FCVTPSUXSr = 568, + FCVTPSv1f16 = 569, + FCVTPSv1i32 = 570, + FCVTPSv1i64 = 571, + FCVTPSv2f32 = 572, + FCVTPSv2f64 = 573, + FCVTPSv4f16 = 574, + FCVTPSv4f32 = 575, + FCVTPSv8f16 = 576, + FCVTPUUWDr = 577, + FCVTPUUWHr = 578, + FCVTPUUWSr = 579, + FCVTPUUXDr = 580, + FCVTPUUXHr = 581, + FCVTPUUXSr = 582, + FCVTPUv1f16 = 583, + FCVTPUv1i32 = 584, + FCVTPUv1i64 = 585, + FCVTPUv2f32 = 586, + FCVTPUv2f64 = 587, + FCVTPUv4f16 = 588, + FCVTPUv4f32 = 589, + FCVTPUv8f16 = 590, + FCVTSDr = 591, + FCVTSHr = 592, + FCVTXNv1i64 = 593, + FCVTXNv2f32 = 594, + FCVTXNv4f32 = 595, + FCVTZSSWDri = 596, + FCVTZSSWHri = 597, + FCVTZSSWSri = 598, + FCVTZSSXDri = 599, + FCVTZSSXHri = 600, + FCVTZSSXSri = 601, + FCVTZSUWDr = 602, + FCVTZSUWHr = 603, + FCVTZSUWSr = 604, + FCVTZSUXDr = 605, + FCVTZSUXHr = 606, + FCVTZSUXSr = 607, + FCVTZS_IntSWDri = 608, + FCVTZS_IntSWHri = 609, + FCVTZS_IntSWSri = 610, + FCVTZS_IntSXDri = 611, + FCVTZS_IntSXHri = 612, + FCVTZS_IntSXSri = 613, + FCVTZS_IntUWDr = 614, + FCVTZS_IntUWHr = 615, + FCVTZS_IntUWSr = 616, + FCVTZS_IntUXDr = 617, + FCVTZS_IntUXHr = 618, + FCVTZS_IntUXSr = 619, + FCVTZS_Intv2f32 = 620, + FCVTZS_Intv2f64 = 621, + FCVTZS_Intv4f16 = 622, + FCVTZS_Intv4f32 = 623, + FCVTZS_Intv8f16 = 624, + FCVTZSd = 625, + FCVTZSh = 626, + FCVTZSs = 627, + FCVTZSv1f16 = 628, + FCVTZSv1i32 = 629, + FCVTZSv1i64 = 630, + FCVTZSv2f32 = 631, + FCVTZSv2f64 = 632, + FCVTZSv2i32_shift = 633, + FCVTZSv2i64_shift = 634, + FCVTZSv4f16 = 635, + FCVTZSv4f32 = 636, + FCVTZSv4i16_shift = 637, + FCVTZSv4i32_shift = 638, + FCVTZSv8f16 = 639, + FCVTZSv8i16_shift = 640, + FCVTZUSWDri = 641, + FCVTZUSWHri = 642, + FCVTZUSWSri = 643, + FCVTZUSXDri = 644, + FCVTZUSXHri = 645, + FCVTZUSXSri = 646, + FCVTZUUWDr = 647, + FCVTZUUWHr = 648, + FCVTZUUWSr = 649, + FCVTZUUXDr = 650, + FCVTZUUXHr = 651, + FCVTZUUXSr = 652, + FCVTZU_IntSWDri = 653, + FCVTZU_IntSWHri = 654, + FCVTZU_IntSWSri = 655, + FCVTZU_IntSXDri = 656, + FCVTZU_IntSXHri = 657, + FCVTZU_IntSXSri = 658, + FCVTZU_IntUWDr = 659, + FCVTZU_IntUWHr = 660, + FCVTZU_IntUWSr = 661, + FCVTZU_IntUXDr = 662, + FCVTZU_IntUXHr = 663, + FCVTZU_IntUXSr = 664, + FCVTZU_Intv2f32 = 665, + FCVTZU_Intv2f64 = 666, + FCVTZU_Intv4f16 = 667, + FCVTZU_Intv4f32 = 668, + FCVTZU_Intv8f16 = 669, + FCVTZUd = 670, + FCVTZUh = 671, + FCVTZUs = 672, + FCVTZUv1f16 = 673, + FCVTZUv1i32 = 674, + FCVTZUv1i64 = 675, + FCVTZUv2f32 = 676, + FCVTZUv2f64 = 677, + FCVTZUv2i32_shift = 678, + FCVTZUv2i64_shift = 679, + FCVTZUv4f16 = 680, + FCVTZUv4f32 = 681, + FCVTZUv4i16_shift = 682, + FCVTZUv4i32_shift = 683, + FCVTZUv8f16 = 684, + FCVTZUv8i16_shift = 685, + FDIVDrr = 686, + FDIVHrr = 687, + FDIVSrr = 688, + FDIVv2f32 = 689, + FDIVv2f64 = 690, + FDIVv4f16 = 691, + FDIVv4f32 = 692, + FDIVv8f16 = 693, + FMADDDrrr = 694, + FMADDHrrr = 695, + FMADDSrrr = 696, + FMAXDrr = 697, + FMAXHrr = 698, + FMAXNMDrr = 699, + FMAXNMHrr = 700, + FMAXNMPv2f32 = 701, + FMAXNMPv2f64 = 702, + FMAXNMPv2i16p = 703, + FMAXNMPv2i32p = 704, + FMAXNMPv2i64p = 705, + FMAXNMPv4f16 = 706, + FMAXNMPv4f32 = 707, + FMAXNMPv8f16 = 708, + FMAXNMSrr = 709, + FMAXNMVv4i16v = 710, + FMAXNMVv4i32v = 711, + FMAXNMVv8i16v = 712, + FMAXNMv2f32 = 713, + FMAXNMv2f64 = 714, + FMAXNMv4f16 = 715, + FMAXNMv4f32 = 716, + FMAXNMv8f16 = 717, + FMAXPv2f32 = 718, + FMAXPv2f64 = 719, + FMAXPv2i16p = 720, + FMAXPv2i32p = 721, + FMAXPv2i64p = 722, + FMAXPv4f16 = 723, + FMAXPv4f32 = 724, + FMAXPv8f16 = 725, + FMAXSrr = 726, + FMAXVv4i16v = 727, + FMAXVv4i32v = 728, + FMAXVv8i16v = 729, + FMAXv2f32 = 730, + FMAXv2f64 = 731, + FMAXv4f16 = 732, + FMAXv4f32 = 733, + FMAXv8f16 = 734, + FMINDrr = 735, + FMINHrr = 736, + FMINNMDrr = 737, + FMINNMHrr = 738, + FMINNMPv2f32 = 739, + FMINNMPv2f64 = 740, + FMINNMPv2i16p = 741, + FMINNMPv2i32p = 742, + FMINNMPv2i64p = 743, + FMINNMPv4f16 = 744, + FMINNMPv4f32 = 745, + FMINNMPv8f16 = 746, + FMINNMSrr = 747, + FMINNMVv4i16v = 748, + FMINNMVv4i32v = 749, + FMINNMVv8i16v = 750, + FMINNMv2f32 = 751, + FMINNMv2f64 = 752, + FMINNMv4f16 = 753, + FMINNMv4f32 = 754, + FMINNMv8f16 = 755, + FMINPv2f32 = 756, + FMINPv2f64 = 757, + FMINPv2i16p = 758, + FMINPv2i32p = 759, + FMINPv2i64p = 760, + FMINPv4f16 = 761, + FMINPv4f32 = 762, + FMINPv8f16 = 763, + FMINSrr = 764, + FMINVv4i16v = 765, + FMINVv4i32v = 766, + FMINVv8i16v = 767, + FMINv2f32 = 768, + FMINv2f64 = 769, + FMINv4f16 = 770, + FMINv4f32 = 771, + FMINv8f16 = 772, + FMLAv1i16_indexed = 773, + FMLAv1i32_indexed = 774, + FMLAv1i64_indexed = 775, + FMLAv2f32 = 776, + FMLAv2f64 = 777, + FMLAv2i32_indexed = 778, + FMLAv2i64_indexed = 779, + FMLAv4f16 = 780, + FMLAv4f32 = 781, + FMLAv4i16_indexed = 782, + FMLAv4i32_indexed = 783, + FMLAv8f16 = 784, + FMLAv8i16_indexed = 785, + FMLSv1i16_indexed = 786, + FMLSv1i32_indexed = 787, + FMLSv1i64_indexed = 788, + FMLSv2f32 = 789, + FMLSv2f64 = 790, + FMLSv2i32_indexed = 791, + FMLSv2i64_indexed = 792, + FMLSv4f16 = 793, + FMLSv4f32 = 794, + FMLSv4i16_indexed = 795, + FMLSv4i32_indexed = 796, + FMLSv8f16 = 797, + FMLSv8i16_indexed = 798, + FMOVD0 = 799, + FMOVDXHighr = 800, + FMOVDXr = 801, + FMOVDi = 802, + FMOVDr = 803, + FMOVHWr = 804, + FMOVHXr = 805, + FMOVHi = 806, + FMOVHr = 807, + FMOVS0 = 808, + FMOVSWr = 809, + FMOVSi = 810, + FMOVSr = 811, + FMOVWHr = 812, + FMOVWSr = 813, + FMOVXDHighr = 814, + FMOVXDr = 815, + FMOVXHr = 816, + FMOVv2f32_ns = 817, + FMOVv2f64_ns = 818, + FMOVv4f16_ns = 819, + FMOVv4f32_ns = 820, + FMOVv8f16_ns = 821, + FMSUBDrrr = 822, + FMSUBHrrr = 823, + FMSUBSrrr = 824, + FMULDrr = 825, + FMULHrr = 826, + FMULSrr = 827, + FMULX16 = 828, + FMULX32 = 829, + FMULX64 = 830, + FMULXv1i16_indexed = 831, + FMULXv1i32_indexed = 832, + FMULXv1i64_indexed = 833, + FMULXv2f32 = 834, + FMULXv2f64 = 835, + FMULXv2i32_indexed = 836, + FMULXv2i64_indexed = 837, + FMULXv4f16 = 838, + FMULXv4f32 = 839, + FMULXv4i16_indexed = 840, + FMULXv4i32_indexed = 841, + FMULXv8f16 = 842, + FMULXv8i16_indexed = 843, + FMULv1i16_indexed = 844, + FMULv1i32_indexed = 845, + FMULv1i64_indexed = 846, + FMULv2f32 = 847, + FMULv2f64 = 848, + FMULv2i32_indexed = 849, + FMULv2i64_indexed = 850, + FMULv4f16 = 851, + FMULv4f32 = 852, + FMULv4i16_indexed = 853, + FMULv4i32_indexed = 854, + FMULv8f16 = 855, + FMULv8i16_indexed = 856, + FNEGDr = 857, + FNEGHr = 858, + FNEGSr = 859, + FNEGv2f32 = 860, + FNEGv2f64 = 861, + FNEGv4f16 = 862, + FNEGv4f32 = 863, + FNEGv8f16 = 864, + FNMADDDrrr = 865, + FNMADDHrrr = 866, + FNMADDSrrr = 867, + FNMSUBDrrr = 868, + FNMSUBHrrr = 869, + FNMSUBSrrr = 870, + FNMULDrr = 871, + FNMULHrr = 872, + FNMULSrr = 873, + FRECPEv1f16 = 874, + FRECPEv1i32 = 875, + FRECPEv1i64 = 876, + FRECPEv2f32 = 877, + FRECPEv2f64 = 878, + FRECPEv4f16 = 879, + FRECPEv4f32 = 880, + FRECPEv8f16 = 881, + FRECPS16 = 882, + FRECPS32 = 883, + FRECPS64 = 884, + FRECPSv2f32 = 885, + FRECPSv2f64 = 886, + FRECPSv4f16 = 887, + FRECPSv4f32 = 888, + FRECPSv8f16 = 889, + FRECPXv1f16 = 890, + FRECPXv1i32 = 891, + FRECPXv1i64 = 892, + FRINTADr = 893, + FRINTAHr = 894, + FRINTASr = 895, + FRINTAv2f32 = 896, + FRINTAv2f64 = 897, + FRINTAv4f16 = 898, + FRINTAv4f32 = 899, + FRINTAv8f16 = 900, + FRINTIDr = 901, + FRINTIHr = 902, + FRINTISr = 903, + FRINTIv2f32 = 904, + FRINTIv2f64 = 905, + FRINTIv4f16 = 906, + FRINTIv4f32 = 907, + FRINTIv8f16 = 908, + FRINTMDr = 909, + FRINTMHr = 910, + FRINTMSr = 911, + FRINTMv2f32 = 912, + FRINTMv2f64 = 913, + FRINTMv4f16 = 914, + FRINTMv4f32 = 915, + FRINTMv8f16 = 916, + FRINTNDr = 917, + FRINTNHr = 918, + FRINTNSr = 919, + FRINTNv2f32 = 920, + FRINTNv2f64 = 921, + FRINTNv4f16 = 922, + FRINTNv4f32 = 923, + FRINTNv8f16 = 924, + FRINTPDr = 925, + FRINTPHr = 926, + FRINTPSr = 927, + FRINTPv2f32 = 928, + FRINTPv2f64 = 929, + FRINTPv4f16 = 930, + FRINTPv4f32 = 931, + FRINTPv8f16 = 932, + FRINTXDr = 933, + FRINTXHr = 934, + FRINTXSr = 935, + FRINTXv2f32 = 936, + FRINTXv2f64 = 937, + FRINTXv4f16 = 938, + FRINTXv4f32 = 939, + FRINTXv8f16 = 940, + FRINTZDr = 941, + FRINTZHr = 942, + FRINTZSr = 943, + FRINTZv2f32 = 944, + FRINTZv2f64 = 945, + FRINTZv4f16 = 946, + FRINTZv4f32 = 947, + FRINTZv8f16 = 948, + FRSQRTEv1f16 = 949, + FRSQRTEv1i32 = 950, + FRSQRTEv1i64 = 951, + FRSQRTEv2f32 = 952, + FRSQRTEv2f64 = 953, + FRSQRTEv4f16 = 954, + FRSQRTEv4f32 = 955, + FRSQRTEv8f16 = 956, + FRSQRTS16 = 957, + FRSQRTS32 = 958, + FRSQRTS64 = 959, + FRSQRTSv2f32 = 960, + FRSQRTSv2f64 = 961, + FRSQRTSv4f16 = 962, + FRSQRTSv4f32 = 963, + FRSQRTSv8f16 = 964, + FSQRTDr = 965, + FSQRTHr = 966, + FSQRTSr = 967, + FSQRTv2f32 = 968, + FSQRTv2f64 = 969, + FSQRTv4f16 = 970, + FSQRTv4f32 = 971, + FSQRTv8f16 = 972, + FSUBDrr = 973, + FSUBHrr = 974, + FSUBSrr = 975, + FSUBv2f32 = 976, + FSUBv2f64 = 977, + FSUBv4f16 = 978, + FSUBv4f32 = 979, + FSUBv8f16 = 980, + HINT = 981, + HLT = 982, + HVC = 983, + INSvi16gpr = 984, + INSvi16lane = 985, + INSvi32gpr = 986, + INSvi32lane = 987, + INSvi64gpr = 988, + INSvi64lane = 989, + INSvi8gpr = 990, + INSvi8lane = 991, + ISB = 992, + LD1Fourv16b = 993, + LD1Fourv16b_POST = 994, + LD1Fourv1d = 995, + LD1Fourv1d_POST = 996, + LD1Fourv2d = 997, + LD1Fourv2d_POST = 998, + LD1Fourv2s = 999, + LD1Fourv2s_POST = 1000, + LD1Fourv4h = 1001, + LD1Fourv4h_POST = 1002, + LD1Fourv4s = 1003, + LD1Fourv4s_POST = 1004, + LD1Fourv8b = 1005, + LD1Fourv8b_POST = 1006, + LD1Fourv8h = 1007, + LD1Fourv8h_POST = 1008, + LD1Onev16b = 1009, + LD1Onev16b_POST = 1010, + LD1Onev1d = 1011, + LD1Onev1d_POST = 1012, + LD1Onev2d = 1013, + LD1Onev2d_POST = 1014, + LD1Onev2s = 1015, + LD1Onev2s_POST = 1016, + LD1Onev4h = 1017, + LD1Onev4h_POST = 1018, + LD1Onev4s = 1019, + LD1Onev4s_POST = 1020, + LD1Onev8b = 1021, + LD1Onev8b_POST = 1022, + LD1Onev8h = 1023, + LD1Onev8h_POST = 1024, + LD1Rv16b = 1025, + LD1Rv16b_POST = 1026, + LD1Rv1d = 1027, + LD1Rv1d_POST = 1028, + LD1Rv2d = 1029, + LD1Rv2d_POST = 1030, + LD1Rv2s = 1031, + LD1Rv2s_POST = 1032, + LD1Rv4h = 1033, + LD1Rv4h_POST = 1034, + LD1Rv4s = 1035, + LD1Rv4s_POST = 1036, + LD1Rv8b = 1037, + LD1Rv8b_POST = 1038, + LD1Rv8h = 1039, + LD1Rv8h_POST = 1040, + LD1Threev16b = 1041, + LD1Threev16b_POST = 1042, + LD1Threev1d = 1043, + LD1Threev1d_POST = 1044, + LD1Threev2d = 1045, + LD1Threev2d_POST = 1046, + LD1Threev2s = 1047, + LD1Threev2s_POST = 1048, + LD1Threev4h = 1049, + LD1Threev4h_POST = 1050, + LD1Threev4s = 1051, + LD1Threev4s_POST = 1052, + LD1Threev8b = 1053, + LD1Threev8b_POST = 1054, + LD1Threev8h = 1055, + LD1Threev8h_POST = 1056, + LD1Twov16b = 1057, + LD1Twov16b_POST = 1058, + LD1Twov1d = 1059, + LD1Twov1d_POST = 1060, + LD1Twov2d = 1061, + LD1Twov2d_POST = 1062, + LD1Twov2s = 1063, + LD1Twov2s_POST = 1064, + LD1Twov4h = 1065, + LD1Twov4h_POST = 1066, + LD1Twov4s = 1067, + LD1Twov4s_POST = 1068, + LD1Twov8b = 1069, + LD1Twov8b_POST = 1070, + LD1Twov8h = 1071, + LD1Twov8h_POST = 1072, + LD1i16 = 1073, + LD1i16_POST = 1074, + LD1i32 = 1075, + LD1i32_POST = 1076, + LD1i64 = 1077, + LD1i64_POST = 1078, + LD1i8 = 1079, + LD1i8_POST = 1080, + LD2Rv16b = 1081, + LD2Rv16b_POST = 1082, + LD2Rv1d = 1083, + LD2Rv1d_POST = 1084, + LD2Rv2d = 1085, + LD2Rv2d_POST = 1086, + LD2Rv2s = 1087, + LD2Rv2s_POST = 1088, + LD2Rv4h = 1089, + LD2Rv4h_POST = 1090, + LD2Rv4s = 1091, + LD2Rv4s_POST = 1092, + LD2Rv8b = 1093, + LD2Rv8b_POST = 1094, + LD2Rv8h = 1095, + LD2Rv8h_POST = 1096, + LD2Twov16b = 1097, + LD2Twov16b_POST = 1098, + LD2Twov2d = 1099, + LD2Twov2d_POST = 1100, + LD2Twov2s = 1101, + LD2Twov2s_POST = 1102, + LD2Twov4h = 1103, + LD2Twov4h_POST = 1104, + LD2Twov4s = 1105, + LD2Twov4s_POST = 1106, + LD2Twov8b = 1107, + LD2Twov8b_POST = 1108, + LD2Twov8h = 1109, + LD2Twov8h_POST = 1110, + LD2i16 = 1111, + LD2i16_POST = 1112, + LD2i32 = 1113, + LD2i32_POST = 1114, + LD2i64 = 1115, + LD2i64_POST = 1116, + LD2i8 = 1117, + LD2i8_POST = 1118, + LD3Rv16b = 1119, + LD3Rv16b_POST = 1120, + LD3Rv1d = 1121, + LD3Rv1d_POST = 1122, + LD3Rv2d = 1123, + LD3Rv2d_POST = 1124, + LD3Rv2s = 1125, + LD3Rv2s_POST = 1126, + LD3Rv4h = 1127, + LD3Rv4h_POST = 1128, + LD3Rv4s = 1129, + LD3Rv4s_POST = 1130, + LD3Rv8b = 1131, + LD3Rv8b_POST = 1132, + LD3Rv8h = 1133, + LD3Rv8h_POST = 1134, + LD3Threev16b = 1135, + LD3Threev16b_POST = 1136, + LD3Threev2d = 1137, + LD3Threev2d_POST = 1138, + LD3Threev2s = 1139, + LD3Threev2s_POST = 1140, + LD3Threev4h = 1141, + LD3Threev4h_POST = 1142, + LD3Threev4s = 1143, + LD3Threev4s_POST = 1144, + LD3Threev8b = 1145, + LD3Threev8b_POST = 1146, + LD3Threev8h = 1147, + LD3Threev8h_POST = 1148, + LD3i16 = 1149, + LD3i16_POST = 1150, + LD3i32 = 1151, + LD3i32_POST = 1152, + LD3i64 = 1153, + LD3i64_POST = 1154, + LD3i8 = 1155, + LD3i8_POST = 1156, + LD4Fourv16b = 1157, + LD4Fourv16b_POST = 1158, + LD4Fourv2d = 1159, + LD4Fourv2d_POST = 1160, + LD4Fourv2s = 1161, + LD4Fourv2s_POST = 1162, + LD4Fourv4h = 1163, + LD4Fourv4h_POST = 1164, + LD4Fourv4s = 1165, + LD4Fourv4s_POST = 1166, + LD4Fourv8b = 1167, + LD4Fourv8b_POST = 1168, + LD4Fourv8h = 1169, + LD4Fourv8h_POST = 1170, + LD4Rv16b = 1171, + LD4Rv16b_POST = 1172, + LD4Rv1d = 1173, + LD4Rv1d_POST = 1174, + LD4Rv2d = 1175, + LD4Rv2d_POST = 1176, + LD4Rv2s = 1177, + LD4Rv2s_POST = 1178, + LD4Rv4h = 1179, + LD4Rv4h_POST = 1180, + LD4Rv4s = 1181, + LD4Rv4s_POST = 1182, + LD4Rv8b = 1183, + LD4Rv8b_POST = 1184, + LD4Rv8h = 1185, + LD4Rv8h_POST = 1186, + LD4i16 = 1187, + LD4i16_POST = 1188, + LD4i32 = 1189, + LD4i32_POST = 1190, + LD4i64 = 1191, + LD4i64_POST = 1192, + LD4i8 = 1193, + LD4i8_POST = 1194, + LDADDALb = 1195, + LDADDALd = 1196, + LDADDALh = 1197, + LDADDALs = 1198, + LDADDAb = 1199, + LDADDAd = 1200, + LDADDAh = 1201, + LDADDAs = 1202, + LDADDLb = 1203, + LDADDLd = 1204, + LDADDLh = 1205, + LDADDLs = 1206, + LDADDb = 1207, + LDADDd = 1208, + LDADDh = 1209, + LDADDs = 1210, + LDARB = 1211, + LDARH = 1212, + LDARW = 1213, + LDARX = 1214, + LDAXPW = 1215, + LDAXPX = 1216, + LDAXRB = 1217, + LDAXRH = 1218, + LDAXRW = 1219, + LDAXRX = 1220, + LDCLRALb = 1221, + LDCLRALd = 1222, + LDCLRALh = 1223, + LDCLRALs = 1224, + LDCLRAb = 1225, + LDCLRAd = 1226, + LDCLRAh = 1227, + LDCLRAs = 1228, + LDCLRLb = 1229, + LDCLRLd = 1230, + LDCLRLh = 1231, + LDCLRLs = 1232, + LDCLRb = 1233, + LDCLRd = 1234, + LDCLRh = 1235, + LDCLRs = 1236, + LDEORALb = 1237, + LDEORALd = 1238, + LDEORALh = 1239, + LDEORALs = 1240, + LDEORAb = 1241, + LDEORAd = 1242, + LDEORAh = 1243, + LDEORAs = 1244, + LDEORLb = 1245, + LDEORLd = 1246, + LDEORLh = 1247, + LDEORLs = 1248, + LDEORb = 1249, + LDEORd = 1250, + LDEORh = 1251, + LDEORs = 1252, + LDLARB = 1253, + LDLARH = 1254, + LDLARW = 1255, + LDLARX = 1256, + LDNPDi = 1257, + LDNPQi = 1258, + LDNPSi = 1259, + LDNPWi = 1260, + LDNPXi = 1261, + LDPDi = 1262, + LDPDpost = 1263, + LDPDpre = 1264, + LDPQi = 1265, + LDPQpost = 1266, + LDPQpre = 1267, + LDPSWi = 1268, + LDPSWpost = 1269, + LDPSWpre = 1270, + LDPSi = 1271, + LDPSpost = 1272, + LDPSpre = 1273, + LDPWi = 1274, + LDPWpost = 1275, + LDPWpre = 1276, + LDPXi = 1277, + LDPXpost = 1278, + LDPXpre = 1279, + LDRBBpost = 1280, + LDRBBpre = 1281, + LDRBBroW = 1282, + LDRBBroX = 1283, + LDRBBui = 1284, + LDRBpost = 1285, + LDRBpre = 1286, + LDRBroW = 1287, + LDRBroX = 1288, + LDRBui = 1289, + LDRDl = 1290, + LDRDpost = 1291, + LDRDpre = 1292, + LDRDroW = 1293, + LDRDroX = 1294, + LDRDui = 1295, + LDRHHpost = 1296, + LDRHHpre = 1297, + LDRHHroW = 1298, + LDRHHroX = 1299, + LDRHHui = 1300, + LDRHpost = 1301, + LDRHpre = 1302, + LDRHroW = 1303, + LDRHroX = 1304, + LDRHui = 1305, + LDRQl = 1306, + LDRQpost = 1307, + LDRQpre = 1308, + LDRQroW = 1309, + LDRQroX = 1310, + LDRQui = 1311, + LDRSBWpost = 1312, + LDRSBWpre = 1313, + LDRSBWroW = 1314, + LDRSBWroX = 1315, + LDRSBWui = 1316, + LDRSBXpost = 1317, + LDRSBXpre = 1318, + LDRSBXroW = 1319, + LDRSBXroX = 1320, + LDRSBXui = 1321, + LDRSHWpost = 1322, + LDRSHWpre = 1323, + LDRSHWroW = 1324, + LDRSHWroX = 1325, + LDRSHWui = 1326, + LDRSHXpost = 1327, + LDRSHXpre = 1328, + LDRSHXroW = 1329, + LDRSHXroX = 1330, + LDRSHXui = 1331, + LDRSWl = 1332, + LDRSWpost = 1333, + LDRSWpre = 1334, + LDRSWroW = 1335, + LDRSWroX = 1336, + LDRSWui = 1337, + LDRSl = 1338, + LDRSpost = 1339, + LDRSpre = 1340, + LDRSroW = 1341, + LDRSroX = 1342, + LDRSui = 1343, + LDRWl = 1344, + LDRWpost = 1345, + LDRWpre = 1346, + LDRWroW = 1347, + LDRWroX = 1348, + LDRWui = 1349, + LDRXl = 1350, + LDRXpost = 1351, + LDRXpre = 1352, + LDRXroW = 1353, + LDRXroX = 1354, + LDRXui = 1355, + LDSETALb = 1356, + LDSETALd = 1357, + LDSETALh = 1358, + LDSETALs = 1359, + LDSETAb = 1360, + LDSETAd = 1361, + LDSETAh = 1362, + LDSETAs = 1363, + LDSETLb = 1364, + LDSETLd = 1365, + LDSETLh = 1366, + LDSETLs = 1367, + LDSETb = 1368, + LDSETd = 1369, + LDSETh = 1370, + LDSETs = 1371, + LDSMAXALb = 1372, + LDSMAXALd = 1373, + LDSMAXALh = 1374, + LDSMAXALs = 1375, + LDSMAXAb = 1376, + LDSMAXAd = 1377, + LDSMAXAh = 1378, + LDSMAXAs = 1379, + LDSMAXLb = 1380, + LDSMAXLd = 1381, + LDSMAXLh = 1382, + LDSMAXLs = 1383, + LDSMAXb = 1384, + LDSMAXd = 1385, + LDSMAXh = 1386, + LDSMAXs = 1387, + LDSMINALb = 1388, + LDSMINALd = 1389, + LDSMINALh = 1390, + LDSMINALs = 1391, + LDSMINAb = 1392, + LDSMINAd = 1393, + LDSMINAh = 1394, + LDSMINAs = 1395, + LDSMINLb = 1396, + LDSMINLd = 1397, + LDSMINLh = 1398, + LDSMINLs = 1399, + LDSMINb = 1400, + LDSMINd = 1401, + LDSMINh = 1402, + LDSMINs = 1403, + LDTRBi = 1404, + LDTRHi = 1405, + LDTRSBWi = 1406, + LDTRSBXi = 1407, + LDTRSHWi = 1408, + LDTRSHXi = 1409, + LDTRSWi = 1410, + LDTRWi = 1411, + LDTRXi = 1412, + LDUMAXALb = 1413, + LDUMAXALd = 1414, + LDUMAXALh = 1415, + LDUMAXALs = 1416, + LDUMAXAb = 1417, + LDUMAXAd = 1418, + LDUMAXAh = 1419, + LDUMAXAs = 1420, + LDUMAXLb = 1421, + LDUMAXLd = 1422, + LDUMAXLh = 1423, + LDUMAXLs = 1424, + LDUMAXb = 1425, + LDUMAXd = 1426, + LDUMAXh = 1427, + LDUMAXs = 1428, + LDUMINALb = 1429, + LDUMINALd = 1430, + LDUMINALh = 1431, + LDUMINALs = 1432, + LDUMINAb = 1433, + LDUMINAd = 1434, + LDUMINAh = 1435, + LDUMINAs = 1436, + LDUMINLb = 1437, + LDUMINLd = 1438, + LDUMINLh = 1439, + LDUMINLs = 1440, + LDUMINb = 1441, + LDUMINd = 1442, + LDUMINh = 1443, + LDUMINs = 1444, + LDURBBi = 1445, + LDURBi = 1446, + LDURDi = 1447, + LDURHHi = 1448, + LDURHi = 1449, + LDURQi = 1450, + LDURSBWi = 1451, + LDURSBXi = 1452, + LDURSHWi = 1453, + LDURSHXi = 1454, + LDURSWi = 1455, + LDURSi = 1456, + LDURWi = 1457, + LDURXi = 1458, + LDXPW = 1459, + LDXPX = 1460, + LDXRB = 1461, + LDXRH = 1462, + LDXRW = 1463, + LDXRX = 1464, + LOADgot = 1465, + LSLVWr = 1466, + LSLVXr = 1467, + LSRVWr = 1468, + LSRVXr = 1469, + MADDWrrr = 1470, + MADDXrrr = 1471, + MLAv16i8 = 1472, + MLAv2i32 = 1473, + MLAv2i32_indexed = 1474, + MLAv4i16 = 1475, + MLAv4i16_indexed = 1476, + MLAv4i32 = 1477, + MLAv4i32_indexed = 1478, + MLAv8i16 = 1479, + MLAv8i16_indexed = 1480, + MLAv8i8 = 1481, + MLSv16i8 = 1482, + MLSv2i32 = 1483, + MLSv2i32_indexed = 1484, + MLSv4i16 = 1485, + MLSv4i16_indexed = 1486, + MLSv4i32 = 1487, + MLSv4i32_indexed = 1488, + MLSv8i16 = 1489, + MLSv8i16_indexed = 1490, + MLSv8i8 = 1491, + MOVID = 1492, + MOVIv16b_ns = 1493, + MOVIv2d_ns = 1494, + MOVIv2i32 = 1495, + MOVIv2s_msl = 1496, + MOVIv4i16 = 1497, + MOVIv4i32 = 1498, + MOVIv4s_msl = 1499, + MOVIv8b_ns = 1500, + MOVIv8i16 = 1501, + MOVKWi = 1502, + MOVKXi = 1503, + MOVNWi = 1504, + MOVNXi = 1505, + MOVZWi = 1506, + MOVZXi = 1507, + MOVaddr = 1508, + MOVaddrBA = 1509, + MOVaddrCP = 1510, + MOVaddrEXT = 1511, + MOVaddrJT = 1512, + MOVaddrTLS = 1513, + MOVi32imm = 1514, + MOVi64imm = 1515, + MRS = 1516, + MSR = 1517, + MSRpstateImm1 = 1518, + MSRpstateImm4 = 1519, + MSUBWrrr = 1520, + MSUBXrrr = 1521, + MULv16i8 = 1522, + MULv2i32 = 1523, + MULv2i32_indexed = 1524, + MULv4i16 = 1525, + MULv4i16_indexed = 1526, + MULv4i32 = 1527, + MULv4i32_indexed = 1528, + MULv8i16 = 1529, + MULv8i16_indexed = 1530, + MULv8i8 = 1531, + MVNIv2i32 = 1532, + MVNIv2s_msl = 1533, + MVNIv4i16 = 1534, + MVNIv4i32 = 1535, + MVNIv4s_msl = 1536, + MVNIv8i16 = 1537, + NEGv16i8 = 1538, + NEGv1i64 = 1539, + NEGv2i32 = 1540, + NEGv2i64 = 1541, + NEGv4i16 = 1542, + NEGv4i32 = 1543, + NEGv8i16 = 1544, + NEGv8i8 = 1545, + NOTv16i8 = 1546, + NOTv8i8 = 1547, + ORNWrr = 1548, + ORNWrs = 1549, + ORNXrr = 1550, + ORNXrs = 1551, + ORNv16i8 = 1552, + ORNv8i8 = 1553, + ORRWri = 1554, + ORRWrr = 1555, + ORRWrs = 1556, + ORRXri = 1557, + ORRXrr = 1558, + ORRXrs = 1559, + ORRv16i8 = 1560, + ORRv2i32 = 1561, + ORRv4i16 = 1562, + ORRv4i32 = 1563, + ORRv8i16 = 1564, + ORRv8i8 = 1565, + PMULLv16i8 = 1566, + PMULLv1i64 = 1567, + PMULLv2i64 = 1568, + PMULLv8i8 = 1569, + PMULv16i8 = 1570, + PMULv8i8 = 1571, + PRFMl = 1572, + PRFMroW = 1573, + PRFMroX = 1574, + PRFMui = 1575, + PRFUMi = 1576, + RADDHNv2i64_v2i32 = 1577, + RADDHNv2i64_v4i32 = 1578, + RADDHNv4i32_v4i16 = 1579, + RADDHNv4i32_v8i16 = 1580, + RADDHNv8i16_v16i8 = 1581, + RADDHNv8i16_v8i8 = 1582, + RBITWr = 1583, + RBITXr = 1584, + RBITv16i8 = 1585, + RBITv8i8 = 1586, + RET = 1587, + RET_ReallyLR = 1588, + REV16Wr = 1589, + REV16Xr = 1590, + REV16v16i8 = 1591, + REV16v8i8 = 1592, + REV32Xr = 1593, + REV32v16i8 = 1594, + REV32v4i16 = 1595, + REV32v8i16 = 1596, + REV32v8i8 = 1597, + REV64v16i8 = 1598, + REV64v2i32 = 1599, + REV64v4i16 = 1600, + REV64v4i32 = 1601, + REV64v8i16 = 1602, + REV64v8i8 = 1603, + REVWr = 1604, + REVXr = 1605, + RORVWr = 1606, + RORVXr = 1607, + RSHRNv16i8_shift = 1608, + RSHRNv2i32_shift = 1609, + RSHRNv4i16_shift = 1610, + RSHRNv4i32_shift = 1611, + RSHRNv8i16_shift = 1612, + RSHRNv8i8_shift = 1613, + RSUBHNv2i64_v2i32 = 1614, + RSUBHNv2i64_v4i32 = 1615, + RSUBHNv4i32_v4i16 = 1616, + RSUBHNv4i32_v8i16 = 1617, + RSUBHNv8i16_v16i8 = 1618, + RSUBHNv8i16_v8i8 = 1619, + SABALv16i8_v8i16 = 1620, + SABALv2i32_v2i64 = 1621, + SABALv4i16_v4i32 = 1622, + SABALv4i32_v2i64 = 1623, + SABALv8i16_v4i32 = 1624, + SABALv8i8_v8i16 = 1625, + SABAv16i8 = 1626, + SABAv2i32 = 1627, + SABAv4i16 = 1628, + SABAv4i32 = 1629, + SABAv8i16 = 1630, + SABAv8i8 = 1631, + SABDLv16i8_v8i16 = 1632, + SABDLv2i32_v2i64 = 1633, + SABDLv4i16_v4i32 = 1634, + SABDLv4i32_v2i64 = 1635, + SABDLv8i16_v4i32 = 1636, + SABDLv8i8_v8i16 = 1637, + SABDv16i8 = 1638, + SABDv2i32 = 1639, + SABDv4i16 = 1640, + SABDv4i32 = 1641, + SABDv8i16 = 1642, + SABDv8i8 = 1643, + SADALPv16i8_v8i16 = 1644, + SADALPv2i32_v1i64 = 1645, + SADALPv4i16_v2i32 = 1646, + SADALPv4i32_v2i64 = 1647, + SADALPv8i16_v4i32 = 1648, + SADALPv8i8_v4i16 = 1649, + SADDLPv16i8_v8i16 = 1650, + SADDLPv2i32_v1i64 = 1651, + SADDLPv4i16_v2i32 = 1652, + SADDLPv4i32_v2i64 = 1653, + SADDLPv8i16_v4i32 = 1654, + SADDLPv8i8_v4i16 = 1655, + SADDLVv16i8v = 1656, + SADDLVv4i16v = 1657, + SADDLVv4i32v = 1658, + SADDLVv8i16v = 1659, + SADDLVv8i8v = 1660, + SADDLv16i8_v8i16 = 1661, + SADDLv2i32_v2i64 = 1662, + SADDLv4i16_v4i32 = 1663, + SADDLv4i32_v2i64 = 1664, + SADDLv8i16_v4i32 = 1665, + SADDLv8i8_v8i16 = 1666, + SADDWv16i8_v8i16 = 1667, + SADDWv2i32_v2i64 = 1668, + SADDWv4i16_v4i32 = 1669, + SADDWv4i32_v2i64 = 1670, + SADDWv8i16_v4i32 = 1671, + SADDWv8i8_v8i16 = 1672, + SBCSWr = 1673, + SBCSXr = 1674, + SBCWr = 1675, + SBCXr = 1676, + SBFMWri = 1677, + SBFMXri = 1678, + SCVTFSWDri = 1679, + SCVTFSWHri = 1680, + SCVTFSWSri = 1681, + SCVTFSXDri = 1682, + SCVTFSXHri = 1683, + SCVTFSXSri = 1684, + SCVTFUWDri = 1685, + SCVTFUWHri = 1686, + SCVTFUWSri = 1687, + SCVTFUXDri = 1688, + SCVTFUXHri = 1689, + SCVTFUXSri = 1690, + SCVTFd = 1691, + SCVTFh = 1692, + SCVTFs = 1693, + SCVTFv1i16 = 1694, + SCVTFv1i32 = 1695, + SCVTFv1i64 = 1696, + SCVTFv2f32 = 1697, + SCVTFv2f64 = 1698, + SCVTFv2i32_shift = 1699, + SCVTFv2i64_shift = 1700, + SCVTFv4f16 = 1701, + SCVTFv4f32 = 1702, + SCVTFv4i16_shift = 1703, + SCVTFv4i32_shift = 1704, + SCVTFv8f16 = 1705, + SCVTFv8i16_shift = 1706, + SDIVWr = 1707, + SDIVXr = 1708, + SDIV_IntWr = 1709, + SDIV_IntXr = 1710, + SHA1Crrr = 1711, + SHA1Hrr = 1712, + SHA1Mrrr = 1713, + SHA1Prrr = 1714, + SHA1SU0rrr = 1715, + SHA1SU1rr = 1716, + SHA256H2rrr = 1717, + SHA256Hrrr = 1718, + SHA256SU0rr = 1719, + SHA256SU1rrr = 1720, + SHADDv16i8 = 1721, + SHADDv2i32 = 1722, + SHADDv4i16 = 1723, + SHADDv4i32 = 1724, + SHADDv8i16 = 1725, + SHADDv8i8 = 1726, + SHLLv16i8 = 1727, + SHLLv2i32 = 1728, + SHLLv4i16 = 1729, + SHLLv4i32 = 1730, + SHLLv8i16 = 1731, + SHLLv8i8 = 1732, + SHLd = 1733, + SHLv16i8_shift = 1734, + SHLv2i32_shift = 1735, + SHLv2i64_shift = 1736, + SHLv4i16_shift = 1737, + SHLv4i32_shift = 1738, + SHLv8i16_shift = 1739, + SHLv8i8_shift = 1740, + SHRNv16i8_shift = 1741, + SHRNv2i32_shift = 1742, + SHRNv4i16_shift = 1743, + SHRNv4i32_shift = 1744, + SHRNv8i16_shift = 1745, + SHRNv8i8_shift = 1746, + SHSUBv16i8 = 1747, + SHSUBv2i32 = 1748, + SHSUBv4i16 = 1749, + SHSUBv4i32 = 1750, + SHSUBv8i16 = 1751, + SHSUBv8i8 = 1752, + SLId = 1753, + SLIv16i8_shift = 1754, + SLIv2i32_shift = 1755, + SLIv2i64_shift = 1756, + SLIv4i16_shift = 1757, + SLIv4i32_shift = 1758, + SLIv8i16_shift = 1759, + SLIv8i8_shift = 1760, + SMADDLrrr = 1761, + SMAXPv16i8 = 1762, + SMAXPv2i32 = 1763, + SMAXPv4i16 = 1764, + SMAXPv4i32 = 1765, + SMAXPv8i16 = 1766, + SMAXPv8i8 = 1767, + SMAXVv16i8v = 1768, + SMAXVv4i16v = 1769, + SMAXVv4i32v = 1770, + SMAXVv8i16v = 1771, + SMAXVv8i8v = 1772, + SMAXv16i8 = 1773, + SMAXv2i32 = 1774, + SMAXv4i16 = 1775, + SMAXv4i32 = 1776, + SMAXv8i16 = 1777, + SMAXv8i8 = 1778, + SMC = 1779, + SMINPv16i8 = 1780, + SMINPv2i32 = 1781, + SMINPv4i16 = 1782, + SMINPv4i32 = 1783, + SMINPv8i16 = 1784, + SMINPv8i8 = 1785, + SMINVv16i8v = 1786, + SMINVv4i16v = 1787, + SMINVv4i32v = 1788, + SMINVv8i16v = 1789, + SMINVv8i8v = 1790, + SMINv16i8 = 1791, + SMINv2i32 = 1792, + SMINv4i16 = 1793, + SMINv4i32 = 1794, + SMINv8i16 = 1795, + SMINv8i8 = 1796, + SMLALv16i8_v8i16 = 1797, + SMLALv2i32_indexed = 1798, + SMLALv2i32_v2i64 = 1799, + SMLALv4i16_indexed = 1800, + SMLALv4i16_v4i32 = 1801, + SMLALv4i32_indexed = 1802, + SMLALv4i32_v2i64 = 1803, + SMLALv8i16_indexed = 1804, + SMLALv8i16_v4i32 = 1805, + SMLALv8i8_v8i16 = 1806, + SMLSLv16i8_v8i16 = 1807, + SMLSLv2i32_indexed = 1808, + SMLSLv2i32_v2i64 = 1809, + SMLSLv4i16_indexed = 1810, + SMLSLv4i16_v4i32 = 1811, + SMLSLv4i32_indexed = 1812, + SMLSLv4i32_v2i64 = 1813, + SMLSLv8i16_indexed = 1814, + SMLSLv8i16_v4i32 = 1815, + SMLSLv8i8_v8i16 = 1816, + SMOVvi16to32 = 1817, + SMOVvi16to64 = 1818, + SMOVvi32to64 = 1819, + SMOVvi8to32 = 1820, + SMOVvi8to64 = 1821, + SMSUBLrrr = 1822, + SMULHrr = 1823, + SMULLv16i8_v8i16 = 1824, + SMULLv2i32_indexed = 1825, + SMULLv2i32_v2i64 = 1826, + SMULLv4i16_indexed = 1827, + SMULLv4i16_v4i32 = 1828, + SMULLv4i32_indexed = 1829, + SMULLv4i32_v2i64 = 1830, + SMULLv8i16_indexed = 1831, + SMULLv8i16_v4i32 = 1832, + SMULLv8i8_v8i16 = 1833, + SQABSv16i8 = 1834, + SQABSv1i16 = 1835, + SQABSv1i32 = 1836, + SQABSv1i64 = 1837, + SQABSv1i8 = 1838, + SQABSv2i32 = 1839, + SQABSv2i64 = 1840, + SQABSv4i16 = 1841, + SQABSv4i32 = 1842, + SQABSv8i16 = 1843, + SQABSv8i8 = 1844, + SQADDv16i8 = 1845, + SQADDv1i16 = 1846, + SQADDv1i32 = 1847, + SQADDv1i64 = 1848, + SQADDv1i8 = 1849, + SQADDv2i32 = 1850, + SQADDv2i64 = 1851, + SQADDv4i16 = 1852, + SQADDv4i32 = 1853, + SQADDv8i16 = 1854, + SQADDv8i8 = 1855, + SQDMLALi16 = 1856, + SQDMLALi32 = 1857, + SQDMLALv1i32_indexed = 1858, + SQDMLALv1i64_indexed = 1859, + SQDMLALv2i32_indexed = 1860, + SQDMLALv2i32_v2i64 = 1861, + SQDMLALv4i16_indexed = 1862, + SQDMLALv4i16_v4i32 = 1863, + SQDMLALv4i32_indexed = 1864, + SQDMLALv4i32_v2i64 = 1865, + SQDMLALv8i16_indexed = 1866, + SQDMLALv8i16_v4i32 = 1867, + SQDMLSLi16 = 1868, + SQDMLSLi32 = 1869, + SQDMLSLv1i32_indexed = 1870, + SQDMLSLv1i64_indexed = 1871, + SQDMLSLv2i32_indexed = 1872, + SQDMLSLv2i32_v2i64 = 1873, + SQDMLSLv4i16_indexed = 1874, + SQDMLSLv4i16_v4i32 = 1875, + SQDMLSLv4i32_indexed = 1876, + SQDMLSLv4i32_v2i64 = 1877, + SQDMLSLv8i16_indexed = 1878, + SQDMLSLv8i16_v4i32 = 1879, + SQDMULHv1i16 = 1880, + SQDMULHv1i16_indexed = 1881, + SQDMULHv1i32 = 1882, + SQDMULHv1i32_indexed = 1883, + SQDMULHv2i32 = 1884, + SQDMULHv2i32_indexed = 1885, + SQDMULHv4i16 = 1886, + SQDMULHv4i16_indexed = 1887, + SQDMULHv4i32 = 1888, + SQDMULHv4i32_indexed = 1889, + SQDMULHv8i16 = 1890, + SQDMULHv8i16_indexed = 1891, + SQDMULLi16 = 1892, + SQDMULLi32 = 1893, + SQDMULLv1i32_indexed = 1894, + SQDMULLv1i64_indexed = 1895, + SQDMULLv2i32_indexed = 1896, + SQDMULLv2i32_v2i64 = 1897, + SQDMULLv4i16_indexed = 1898, + SQDMULLv4i16_v4i32 = 1899, + SQDMULLv4i32_indexed = 1900, + SQDMULLv4i32_v2i64 = 1901, + SQDMULLv8i16_indexed = 1902, + SQDMULLv8i16_v4i32 = 1903, + SQNEGv16i8 = 1904, + SQNEGv1i16 = 1905, + SQNEGv1i32 = 1906, + SQNEGv1i64 = 1907, + SQNEGv1i8 = 1908, + SQNEGv2i32 = 1909, + SQNEGv2i64 = 1910, + SQNEGv4i16 = 1911, + SQNEGv4i32 = 1912, + SQNEGv8i16 = 1913, + SQNEGv8i8 = 1914, + SQRDMLAHi16_indexed = 1915, + SQRDMLAHi32_indexed = 1916, + SQRDMLAHv1i16 = 1917, + SQRDMLAHv1i32 = 1918, + SQRDMLAHv2i32 = 1919, + SQRDMLAHv2i32_indexed = 1920, + SQRDMLAHv4i16 = 1921, + SQRDMLAHv4i16_indexed = 1922, + SQRDMLAHv4i32 = 1923, + SQRDMLAHv4i32_indexed = 1924, + SQRDMLAHv8i16 = 1925, + SQRDMLAHv8i16_indexed = 1926, + SQRDMLSHi16_indexed = 1927, + SQRDMLSHi32_indexed = 1928, + SQRDMLSHv1i16 = 1929, + SQRDMLSHv1i32 = 1930, + SQRDMLSHv2i32 = 1931, + SQRDMLSHv2i32_indexed = 1932, + SQRDMLSHv4i16 = 1933, + SQRDMLSHv4i16_indexed = 1934, + SQRDMLSHv4i32 = 1935, + SQRDMLSHv4i32_indexed = 1936, + SQRDMLSHv8i16 = 1937, + SQRDMLSHv8i16_indexed = 1938, + SQRDMULHv1i16 = 1939, + SQRDMULHv1i16_indexed = 1940, + SQRDMULHv1i32 = 1941, + SQRDMULHv1i32_indexed = 1942, + SQRDMULHv2i32 = 1943, + SQRDMULHv2i32_indexed = 1944, + SQRDMULHv4i16 = 1945, + SQRDMULHv4i16_indexed = 1946, + SQRDMULHv4i32 = 1947, + SQRDMULHv4i32_indexed = 1948, + SQRDMULHv8i16 = 1949, + SQRDMULHv8i16_indexed = 1950, + SQRSHLv16i8 = 1951, + SQRSHLv1i16 = 1952, + SQRSHLv1i32 = 1953, + SQRSHLv1i64 = 1954, + SQRSHLv1i8 = 1955, + SQRSHLv2i32 = 1956, + SQRSHLv2i64 = 1957, + SQRSHLv4i16 = 1958, + SQRSHLv4i32 = 1959, + SQRSHLv8i16 = 1960, + SQRSHLv8i8 = 1961, + SQRSHRNb = 1962, + SQRSHRNh = 1963, + SQRSHRNs = 1964, + SQRSHRNv16i8_shift = 1965, + SQRSHRNv2i32_shift = 1966, + SQRSHRNv4i16_shift = 1967, + SQRSHRNv4i32_shift = 1968, + SQRSHRNv8i16_shift = 1969, + SQRSHRNv8i8_shift = 1970, + SQRSHRUNb = 1971, + SQRSHRUNh = 1972, + SQRSHRUNs = 1973, + SQRSHRUNv16i8_shift = 1974, + SQRSHRUNv2i32_shift = 1975, + SQRSHRUNv4i16_shift = 1976, + SQRSHRUNv4i32_shift = 1977, + SQRSHRUNv8i16_shift = 1978, + SQRSHRUNv8i8_shift = 1979, + SQSHLUb = 1980, + SQSHLUd = 1981, + SQSHLUh = 1982, + SQSHLUs = 1983, + SQSHLUv16i8_shift = 1984, + SQSHLUv2i32_shift = 1985, + SQSHLUv2i64_shift = 1986, + SQSHLUv4i16_shift = 1987, + SQSHLUv4i32_shift = 1988, + SQSHLUv8i16_shift = 1989, + SQSHLUv8i8_shift = 1990, + SQSHLb = 1991, + SQSHLd = 1992, + SQSHLh = 1993, + SQSHLs = 1994, + SQSHLv16i8 = 1995, + SQSHLv16i8_shift = 1996, + SQSHLv1i16 = 1997, + SQSHLv1i32 = 1998, + SQSHLv1i64 = 1999, + SQSHLv1i8 = 2000, + SQSHLv2i32 = 2001, + SQSHLv2i32_shift = 2002, + SQSHLv2i64 = 2003, + SQSHLv2i64_shift = 2004, + SQSHLv4i16 = 2005, + SQSHLv4i16_shift = 2006, + SQSHLv4i32 = 2007, + SQSHLv4i32_shift = 2008, + SQSHLv8i16 = 2009, + SQSHLv8i16_shift = 2010, + SQSHLv8i8 = 2011, + SQSHLv8i8_shift = 2012, + SQSHRNb = 2013, + SQSHRNh = 2014, + SQSHRNs = 2015, + SQSHRNv16i8_shift = 2016, + SQSHRNv2i32_shift = 2017, + SQSHRNv4i16_shift = 2018, + SQSHRNv4i32_shift = 2019, + SQSHRNv8i16_shift = 2020, + SQSHRNv8i8_shift = 2021, + SQSHRUNb = 2022, + SQSHRUNh = 2023, + SQSHRUNs = 2024, + SQSHRUNv16i8_shift = 2025, + SQSHRUNv2i32_shift = 2026, + SQSHRUNv4i16_shift = 2027, + SQSHRUNv4i32_shift = 2028, + SQSHRUNv8i16_shift = 2029, + SQSHRUNv8i8_shift = 2030, + SQSUBv16i8 = 2031, + SQSUBv1i16 = 2032, + SQSUBv1i32 = 2033, + SQSUBv1i64 = 2034, + SQSUBv1i8 = 2035, + SQSUBv2i32 = 2036, + SQSUBv2i64 = 2037, + SQSUBv4i16 = 2038, + SQSUBv4i32 = 2039, + SQSUBv8i16 = 2040, + SQSUBv8i8 = 2041, + SQXTNv16i8 = 2042, + SQXTNv1i16 = 2043, + SQXTNv1i32 = 2044, + SQXTNv1i8 = 2045, + SQXTNv2i32 = 2046, + SQXTNv4i16 = 2047, + SQXTNv4i32 = 2048, + SQXTNv8i16 = 2049, + SQXTNv8i8 = 2050, + SQXTUNv16i8 = 2051, + SQXTUNv1i16 = 2052, + SQXTUNv1i32 = 2053, + SQXTUNv1i8 = 2054, + SQXTUNv2i32 = 2055, + SQXTUNv4i16 = 2056, + SQXTUNv4i32 = 2057, + SQXTUNv8i16 = 2058, + SQXTUNv8i8 = 2059, + SRHADDv16i8 = 2060, + SRHADDv2i32 = 2061, + SRHADDv4i16 = 2062, + SRHADDv4i32 = 2063, + SRHADDv8i16 = 2064, + SRHADDv8i8 = 2065, + SRId = 2066, + SRIv16i8_shift = 2067, + SRIv2i32_shift = 2068, + SRIv2i64_shift = 2069, + SRIv4i16_shift = 2070, + SRIv4i32_shift = 2071, + SRIv8i16_shift = 2072, + SRIv8i8_shift = 2073, + SRSHLv16i8 = 2074, + SRSHLv1i64 = 2075, + SRSHLv2i32 = 2076, + SRSHLv2i64 = 2077, + SRSHLv4i16 = 2078, + SRSHLv4i32 = 2079, + SRSHLv8i16 = 2080, + SRSHLv8i8 = 2081, + SRSHRd = 2082, + SRSHRv16i8_shift = 2083, + SRSHRv2i32_shift = 2084, + SRSHRv2i64_shift = 2085, + SRSHRv4i16_shift = 2086, + SRSHRv4i32_shift = 2087, + SRSHRv8i16_shift = 2088, + SRSHRv8i8_shift = 2089, + SRSRAd = 2090, + SRSRAv16i8_shift = 2091, + SRSRAv2i32_shift = 2092, + SRSRAv2i64_shift = 2093, + SRSRAv4i16_shift = 2094, + SRSRAv4i32_shift = 2095, + SRSRAv8i16_shift = 2096, + SRSRAv8i8_shift = 2097, + SSHLLv16i8_shift = 2098, + SSHLLv2i32_shift = 2099, + SSHLLv4i16_shift = 2100, + SSHLLv4i32_shift = 2101, + SSHLLv8i16_shift = 2102, + SSHLLv8i8_shift = 2103, + SSHLv16i8 = 2104, + SSHLv1i64 = 2105, + SSHLv2i32 = 2106, + SSHLv2i64 = 2107, + SSHLv4i16 = 2108, + SSHLv4i32 = 2109, + SSHLv8i16 = 2110, + SSHLv8i8 = 2111, + SSHRd = 2112, + SSHRv16i8_shift = 2113, + SSHRv2i32_shift = 2114, + SSHRv2i64_shift = 2115, + SSHRv4i16_shift = 2116, + SSHRv4i32_shift = 2117, + SSHRv8i16_shift = 2118, + SSHRv8i8_shift = 2119, + SSRAd = 2120, + SSRAv16i8_shift = 2121, + SSRAv2i32_shift = 2122, + SSRAv2i64_shift = 2123, + SSRAv4i16_shift = 2124, + SSRAv4i32_shift = 2125, + SSRAv8i16_shift = 2126, + SSRAv8i8_shift = 2127, + SSUBLv16i8_v8i16 = 2128, + SSUBLv2i32_v2i64 = 2129, + SSUBLv4i16_v4i32 = 2130, + SSUBLv4i32_v2i64 = 2131, + SSUBLv8i16_v4i32 = 2132, + SSUBLv8i8_v8i16 = 2133, + SSUBWv16i8_v8i16 = 2134, + SSUBWv2i32_v2i64 = 2135, + SSUBWv4i16_v4i32 = 2136, + SSUBWv4i32_v2i64 = 2137, + SSUBWv8i16_v4i32 = 2138, + SSUBWv8i8_v8i16 = 2139, + ST1Fourv16b = 2140, + ST1Fourv16b_POST = 2141, + ST1Fourv1d = 2142, + ST1Fourv1d_POST = 2143, + ST1Fourv2d = 2144, + ST1Fourv2d_POST = 2145, + ST1Fourv2s = 2146, + ST1Fourv2s_POST = 2147, + ST1Fourv4h = 2148, + ST1Fourv4h_POST = 2149, + ST1Fourv4s = 2150, + ST1Fourv4s_POST = 2151, + ST1Fourv8b = 2152, + ST1Fourv8b_POST = 2153, + ST1Fourv8h = 2154, + ST1Fourv8h_POST = 2155, + ST1Onev16b = 2156, + ST1Onev16b_POST = 2157, + ST1Onev1d = 2158, + ST1Onev1d_POST = 2159, + ST1Onev2d = 2160, + ST1Onev2d_POST = 2161, + ST1Onev2s = 2162, + ST1Onev2s_POST = 2163, + ST1Onev4h = 2164, + ST1Onev4h_POST = 2165, + ST1Onev4s = 2166, + ST1Onev4s_POST = 2167, + ST1Onev8b = 2168, + ST1Onev8b_POST = 2169, + ST1Onev8h = 2170, + ST1Onev8h_POST = 2171, + ST1Threev16b = 2172, + ST1Threev16b_POST = 2173, + ST1Threev1d = 2174, + ST1Threev1d_POST = 2175, + ST1Threev2d = 2176, + ST1Threev2d_POST = 2177, + ST1Threev2s = 2178, + ST1Threev2s_POST = 2179, + ST1Threev4h = 2180, + ST1Threev4h_POST = 2181, + ST1Threev4s = 2182, + ST1Threev4s_POST = 2183, + ST1Threev8b = 2184, + ST1Threev8b_POST = 2185, + ST1Threev8h = 2186, + ST1Threev8h_POST = 2187, + ST1Twov16b = 2188, + ST1Twov16b_POST = 2189, + ST1Twov1d = 2190, + ST1Twov1d_POST = 2191, + ST1Twov2d = 2192, + ST1Twov2d_POST = 2193, + ST1Twov2s = 2194, + ST1Twov2s_POST = 2195, + ST1Twov4h = 2196, + ST1Twov4h_POST = 2197, + ST1Twov4s = 2198, + ST1Twov4s_POST = 2199, + ST1Twov8b = 2200, + ST1Twov8b_POST = 2201, + ST1Twov8h = 2202, + ST1Twov8h_POST = 2203, + ST1i16 = 2204, + ST1i16_POST = 2205, + ST1i32 = 2206, + ST1i32_POST = 2207, + ST1i64 = 2208, + ST1i64_POST = 2209, + ST1i8 = 2210, + ST1i8_POST = 2211, + ST2Twov16b = 2212, + ST2Twov16b_POST = 2213, + ST2Twov2d = 2214, + ST2Twov2d_POST = 2215, + ST2Twov2s = 2216, + ST2Twov2s_POST = 2217, + ST2Twov4h = 2218, + ST2Twov4h_POST = 2219, + ST2Twov4s = 2220, + ST2Twov4s_POST = 2221, + ST2Twov8b = 2222, + ST2Twov8b_POST = 2223, + ST2Twov8h = 2224, + ST2Twov8h_POST = 2225, + ST2i16 = 2226, + ST2i16_POST = 2227, + ST2i32 = 2228, + ST2i32_POST = 2229, + ST2i64 = 2230, + ST2i64_POST = 2231, + ST2i8 = 2232, + ST2i8_POST = 2233, + ST3Threev16b = 2234, + ST3Threev16b_POST = 2235, + ST3Threev2d = 2236, + ST3Threev2d_POST = 2237, + ST3Threev2s = 2238, + ST3Threev2s_POST = 2239, + ST3Threev4h = 2240, + ST3Threev4h_POST = 2241, + ST3Threev4s = 2242, + ST3Threev4s_POST = 2243, + ST3Threev8b = 2244, + ST3Threev8b_POST = 2245, + ST3Threev8h = 2246, + ST3Threev8h_POST = 2247, + ST3i16 = 2248, + ST3i16_POST = 2249, + ST3i32 = 2250, + ST3i32_POST = 2251, + ST3i64 = 2252, + ST3i64_POST = 2253, + ST3i8 = 2254, + ST3i8_POST = 2255, + ST4Fourv16b = 2256, + ST4Fourv16b_POST = 2257, + ST4Fourv2d = 2258, + ST4Fourv2d_POST = 2259, + ST4Fourv2s = 2260, + ST4Fourv2s_POST = 2261, + ST4Fourv4h = 2262, + ST4Fourv4h_POST = 2263, + ST4Fourv4s = 2264, + ST4Fourv4s_POST = 2265, + ST4Fourv8b = 2266, + ST4Fourv8b_POST = 2267, + ST4Fourv8h = 2268, + ST4Fourv8h_POST = 2269, + ST4i16 = 2270, + ST4i16_POST = 2271, + ST4i32 = 2272, + ST4i32_POST = 2273, + ST4i64 = 2274, + ST4i64_POST = 2275, + ST4i8 = 2276, + ST4i8_POST = 2277, + STLLRB = 2278, + STLLRH = 2279, + STLLRW = 2280, + STLLRX = 2281, + STLRB = 2282, + STLRH = 2283, + STLRW = 2284, + STLRX = 2285, + STLXPW = 2286, + STLXPX = 2287, + STLXRB = 2288, + STLXRH = 2289, + STLXRW = 2290, + STLXRX = 2291, + STNPDi = 2292, + STNPQi = 2293, + STNPSi = 2294, + STNPWi = 2295, + STNPXi = 2296, + STPDi = 2297, + STPDpost = 2298, + STPDpre = 2299, + STPQi = 2300, + STPQpost = 2301, + STPQpre = 2302, + STPSi = 2303, + STPSpost = 2304, + STPSpre = 2305, + STPWi = 2306, + STPWpost = 2307, + STPWpre = 2308, + STPXi = 2309, + STPXpost = 2310, + STPXpre = 2311, + STRBBpost = 2312, + STRBBpre = 2313, + STRBBroW = 2314, + STRBBroX = 2315, + STRBBui = 2316, + STRBpost = 2317, + STRBpre = 2318, + STRBroW = 2319, + STRBroX = 2320, + STRBui = 2321, + STRDpost = 2322, + STRDpre = 2323, + STRDroW = 2324, + STRDroX = 2325, + STRDui = 2326, + STRHHpost = 2327, + STRHHpre = 2328, + STRHHroW = 2329, + STRHHroX = 2330, + STRHHui = 2331, + STRHpost = 2332, + STRHpre = 2333, + STRHroW = 2334, + STRHroX = 2335, + STRHui = 2336, + STRQpost = 2337, + STRQpre = 2338, + STRQroW = 2339, + STRQroX = 2340, + STRQui = 2341, + STRSpost = 2342, + STRSpre = 2343, + STRSroW = 2344, + STRSroX = 2345, + STRSui = 2346, + STRWpost = 2347, + STRWpre = 2348, + STRWroW = 2349, + STRWroX = 2350, + STRWui = 2351, + STRXpost = 2352, + STRXpre = 2353, + STRXroW = 2354, + STRXroX = 2355, + STRXui = 2356, + STTRBi = 2357, + STTRHi = 2358, + STTRWi = 2359, + STTRXi = 2360, + STURBBi = 2361, + STURBi = 2362, + STURDi = 2363, + STURHHi = 2364, + STURHi = 2365, + STURQi = 2366, + STURSi = 2367, + STURWi = 2368, + STURXi = 2369, + STXPW = 2370, + STXPX = 2371, + STXRB = 2372, + STXRH = 2373, + STXRW = 2374, + STXRX = 2375, + SUBHNv2i64_v2i32 = 2376, + SUBHNv2i64_v4i32 = 2377, + SUBHNv4i32_v4i16 = 2378, + SUBHNv4i32_v8i16 = 2379, + SUBHNv8i16_v16i8 = 2380, + SUBHNv8i16_v8i8 = 2381, + SUBSWri = 2382, + SUBSWrr = 2383, + SUBSWrs = 2384, + SUBSWrx = 2385, + SUBSXri = 2386, + SUBSXrr = 2387, + SUBSXrs = 2388, + SUBSXrx = 2389, + SUBSXrx64 = 2390, + SUBWri = 2391, + SUBWrr = 2392, + SUBWrs = 2393, + SUBWrx = 2394, + SUBXri = 2395, + SUBXrr = 2396, + SUBXrs = 2397, + SUBXrx = 2398, + SUBXrx64 = 2399, + SUBv16i8 = 2400, + SUBv1i64 = 2401, + SUBv2i32 = 2402, + SUBv2i64 = 2403, + SUBv4i16 = 2404, + SUBv4i32 = 2405, + SUBv8i16 = 2406, + SUBv8i8 = 2407, + SUQADDv16i8 = 2408, + SUQADDv1i16 = 2409, + SUQADDv1i32 = 2410, + SUQADDv1i64 = 2411, + SUQADDv1i8 = 2412, + SUQADDv2i32 = 2413, + SUQADDv2i64 = 2414, + SUQADDv4i16 = 2415, + SUQADDv4i32 = 2416, + SUQADDv8i16 = 2417, + SUQADDv8i8 = 2418, + SVC = 2419, + SWPALb = 2420, + SWPALd = 2421, + SWPALh = 2422, + SWPALs = 2423, + SWPAb = 2424, + SWPAd = 2425, + SWPAh = 2426, + SWPAs = 2427, + SWPLb = 2428, + SWPLd = 2429, + SWPLh = 2430, + SWPLs = 2431, + SWPb = 2432, + SWPd = 2433, + SWPh = 2434, + SWPs = 2435, + SYSLxt = 2436, + SYSxt = 2437, + TBLv16i8Four = 2438, + TBLv16i8One = 2439, + TBLv16i8Three = 2440, + TBLv16i8Two = 2441, + TBLv8i8Four = 2442, + TBLv8i8One = 2443, + TBLv8i8Three = 2444, + TBLv8i8Two = 2445, + TBNZW = 2446, + TBNZX = 2447, + TBXv16i8Four = 2448, + TBXv16i8One = 2449, + TBXv16i8Three = 2450, + TBXv16i8Two = 2451, + TBXv8i8Four = 2452, + TBXv8i8One = 2453, + TBXv8i8Three = 2454, + TBXv8i8Two = 2455, + TBZW = 2456, + TBZX = 2457, + TCRETURNdi = 2458, + TCRETURNri = 2459, + TLSDESCCALL = 2460, + TLSDESC_CALLSEQ = 2461, + TRN1v16i8 = 2462, + TRN1v2i32 = 2463, + TRN1v2i64 = 2464, + TRN1v4i16 = 2465, + TRN1v4i32 = 2466, + TRN1v8i16 = 2467, + TRN1v8i8 = 2468, + TRN2v16i8 = 2469, + TRN2v2i32 = 2470, + TRN2v2i64 = 2471, + TRN2v4i16 = 2472, + TRN2v4i32 = 2473, + TRN2v8i16 = 2474, + TRN2v8i8 = 2475, + UABALv16i8_v8i16 = 2476, + UABALv2i32_v2i64 = 2477, + UABALv4i16_v4i32 = 2478, + UABALv4i32_v2i64 = 2479, + UABALv8i16_v4i32 = 2480, + UABALv8i8_v8i16 = 2481, + UABAv16i8 = 2482, + UABAv2i32 = 2483, + UABAv4i16 = 2484, + UABAv4i32 = 2485, + UABAv8i16 = 2486, + UABAv8i8 = 2487, + UABDLv16i8_v8i16 = 2488, + UABDLv2i32_v2i64 = 2489, + UABDLv4i16_v4i32 = 2490, + UABDLv4i32_v2i64 = 2491, + UABDLv8i16_v4i32 = 2492, + UABDLv8i8_v8i16 = 2493, + UABDv16i8 = 2494, + UABDv2i32 = 2495, + UABDv4i16 = 2496, + UABDv4i32 = 2497, + UABDv8i16 = 2498, + UABDv8i8 = 2499, + UADALPv16i8_v8i16 = 2500, + UADALPv2i32_v1i64 = 2501, + UADALPv4i16_v2i32 = 2502, + UADALPv4i32_v2i64 = 2503, + UADALPv8i16_v4i32 = 2504, + UADALPv8i8_v4i16 = 2505, + UADDLPv16i8_v8i16 = 2506, + UADDLPv2i32_v1i64 = 2507, + UADDLPv4i16_v2i32 = 2508, + UADDLPv4i32_v2i64 = 2509, + UADDLPv8i16_v4i32 = 2510, + UADDLPv8i8_v4i16 = 2511, + UADDLVv16i8v = 2512, + UADDLVv4i16v = 2513, + UADDLVv4i32v = 2514, + UADDLVv8i16v = 2515, + UADDLVv8i8v = 2516, + UADDLv16i8_v8i16 = 2517, + UADDLv2i32_v2i64 = 2518, + UADDLv4i16_v4i32 = 2519, + UADDLv4i32_v2i64 = 2520, + UADDLv8i16_v4i32 = 2521, + UADDLv8i8_v8i16 = 2522, + UADDWv16i8_v8i16 = 2523, + UADDWv2i32_v2i64 = 2524, + UADDWv4i16_v4i32 = 2525, + UADDWv4i32_v2i64 = 2526, + UADDWv8i16_v4i32 = 2527, + UADDWv8i8_v8i16 = 2528, + UBFMWri = 2529, + UBFMXri = 2530, + UCVTFSWDri = 2531, + UCVTFSWHri = 2532, + UCVTFSWSri = 2533, + UCVTFSXDri = 2534, + UCVTFSXHri = 2535, + UCVTFSXSri = 2536, + UCVTFUWDri = 2537, + UCVTFUWHri = 2538, + UCVTFUWSri = 2539, + UCVTFUXDri = 2540, + UCVTFUXHri = 2541, + UCVTFUXSri = 2542, + UCVTFd = 2543, + UCVTFh = 2544, + UCVTFs = 2545, + UCVTFv1i16 = 2546, + UCVTFv1i32 = 2547, + UCVTFv1i64 = 2548, + UCVTFv2f32 = 2549, + UCVTFv2f64 = 2550, + UCVTFv2i32_shift = 2551, + UCVTFv2i64_shift = 2552, + UCVTFv4f16 = 2553, + UCVTFv4f32 = 2554, + UCVTFv4i16_shift = 2555, + UCVTFv4i32_shift = 2556, + UCVTFv8f16 = 2557, + UCVTFv8i16_shift = 2558, + UDIVWr = 2559, + UDIVXr = 2560, + UDIV_IntWr = 2561, + UDIV_IntXr = 2562, + UHADDv16i8 = 2563, + UHADDv2i32 = 2564, + UHADDv4i16 = 2565, + UHADDv4i32 = 2566, + UHADDv8i16 = 2567, + UHADDv8i8 = 2568, + UHSUBv16i8 = 2569, + UHSUBv2i32 = 2570, + UHSUBv4i16 = 2571, + UHSUBv4i32 = 2572, + UHSUBv8i16 = 2573, + UHSUBv8i8 = 2574, + UMADDLrrr = 2575, + UMAXPv16i8 = 2576, + UMAXPv2i32 = 2577, + UMAXPv4i16 = 2578, + UMAXPv4i32 = 2579, + UMAXPv8i16 = 2580, + UMAXPv8i8 = 2581, + UMAXVv16i8v = 2582, + UMAXVv4i16v = 2583, + UMAXVv4i32v = 2584, + UMAXVv8i16v = 2585, + UMAXVv8i8v = 2586, + UMAXv16i8 = 2587, + UMAXv2i32 = 2588, + UMAXv4i16 = 2589, + UMAXv4i32 = 2590, + UMAXv8i16 = 2591, + UMAXv8i8 = 2592, + UMINPv16i8 = 2593, + UMINPv2i32 = 2594, + UMINPv4i16 = 2595, + UMINPv4i32 = 2596, + UMINPv8i16 = 2597, + UMINPv8i8 = 2598, + UMINVv16i8v = 2599, + UMINVv4i16v = 2600, + UMINVv4i32v = 2601, + UMINVv8i16v = 2602, + UMINVv8i8v = 2603, + UMINv16i8 = 2604, + UMINv2i32 = 2605, + UMINv4i16 = 2606, + UMINv4i32 = 2607, + UMINv8i16 = 2608, + UMINv8i8 = 2609, + UMLALv16i8_v8i16 = 2610, + UMLALv2i32_indexed = 2611, + UMLALv2i32_v2i64 = 2612, + UMLALv4i16_indexed = 2613, + UMLALv4i16_v4i32 = 2614, + UMLALv4i32_indexed = 2615, + UMLALv4i32_v2i64 = 2616, + UMLALv8i16_indexed = 2617, + UMLALv8i16_v4i32 = 2618, + UMLALv8i8_v8i16 = 2619, + UMLSLv16i8_v8i16 = 2620, + UMLSLv2i32_indexed = 2621, + UMLSLv2i32_v2i64 = 2622, + UMLSLv4i16_indexed = 2623, + UMLSLv4i16_v4i32 = 2624, + UMLSLv4i32_indexed = 2625, + UMLSLv4i32_v2i64 = 2626, + UMLSLv8i16_indexed = 2627, + UMLSLv8i16_v4i32 = 2628, + UMLSLv8i8_v8i16 = 2629, + UMOVvi16 = 2630, + UMOVvi32 = 2631, + UMOVvi64 = 2632, + UMOVvi8 = 2633, + UMSUBLrrr = 2634, + UMULHrr = 2635, + UMULLv16i8_v8i16 = 2636, + UMULLv2i32_indexed = 2637, + UMULLv2i32_v2i64 = 2638, + UMULLv4i16_indexed = 2639, + UMULLv4i16_v4i32 = 2640, + UMULLv4i32_indexed = 2641, + UMULLv4i32_v2i64 = 2642, + UMULLv8i16_indexed = 2643, + UMULLv8i16_v4i32 = 2644, + UMULLv8i8_v8i16 = 2645, + UQADDv16i8 = 2646, + UQADDv1i16 = 2647, + UQADDv1i32 = 2648, + UQADDv1i64 = 2649, + UQADDv1i8 = 2650, + UQADDv2i32 = 2651, + UQADDv2i64 = 2652, + UQADDv4i16 = 2653, + UQADDv4i32 = 2654, + UQADDv8i16 = 2655, + UQADDv8i8 = 2656, + UQRSHLv16i8 = 2657, + UQRSHLv1i16 = 2658, + UQRSHLv1i32 = 2659, + UQRSHLv1i64 = 2660, + UQRSHLv1i8 = 2661, + UQRSHLv2i32 = 2662, + UQRSHLv2i64 = 2663, + UQRSHLv4i16 = 2664, + UQRSHLv4i32 = 2665, + UQRSHLv8i16 = 2666, + UQRSHLv8i8 = 2667, + UQRSHRNb = 2668, + UQRSHRNh = 2669, + UQRSHRNs = 2670, + UQRSHRNv16i8_shift = 2671, + UQRSHRNv2i32_shift = 2672, + UQRSHRNv4i16_shift = 2673, + UQRSHRNv4i32_shift = 2674, + UQRSHRNv8i16_shift = 2675, + UQRSHRNv8i8_shift = 2676, + UQSHLb = 2677, + UQSHLd = 2678, + UQSHLh = 2679, + UQSHLs = 2680, + UQSHLv16i8 = 2681, + UQSHLv16i8_shift = 2682, + UQSHLv1i16 = 2683, + UQSHLv1i32 = 2684, + UQSHLv1i64 = 2685, + UQSHLv1i8 = 2686, + UQSHLv2i32 = 2687, + UQSHLv2i32_shift = 2688, + UQSHLv2i64 = 2689, + UQSHLv2i64_shift = 2690, + UQSHLv4i16 = 2691, + UQSHLv4i16_shift = 2692, + UQSHLv4i32 = 2693, + UQSHLv4i32_shift = 2694, + UQSHLv8i16 = 2695, + UQSHLv8i16_shift = 2696, + UQSHLv8i8 = 2697, + UQSHLv8i8_shift = 2698, + UQSHRNb = 2699, + UQSHRNh = 2700, + UQSHRNs = 2701, + UQSHRNv16i8_shift = 2702, + UQSHRNv2i32_shift = 2703, + UQSHRNv4i16_shift = 2704, + UQSHRNv4i32_shift = 2705, + UQSHRNv8i16_shift = 2706, + UQSHRNv8i8_shift = 2707, + UQSUBv16i8 = 2708, + UQSUBv1i16 = 2709, + UQSUBv1i32 = 2710, + UQSUBv1i64 = 2711, + UQSUBv1i8 = 2712, + UQSUBv2i32 = 2713, + UQSUBv2i64 = 2714, + UQSUBv4i16 = 2715, + UQSUBv4i32 = 2716, + UQSUBv8i16 = 2717, + UQSUBv8i8 = 2718, + UQXTNv16i8 = 2719, + UQXTNv1i16 = 2720, + UQXTNv1i32 = 2721, + UQXTNv1i8 = 2722, + UQXTNv2i32 = 2723, + UQXTNv4i16 = 2724, + UQXTNv4i32 = 2725, + UQXTNv8i16 = 2726, + UQXTNv8i8 = 2727, + URECPEv2i32 = 2728, + URECPEv4i32 = 2729, + URHADDv16i8 = 2730, + URHADDv2i32 = 2731, + URHADDv4i16 = 2732, + URHADDv4i32 = 2733, + URHADDv8i16 = 2734, + URHADDv8i8 = 2735, + URSHLv16i8 = 2736, + URSHLv1i64 = 2737, + URSHLv2i32 = 2738, + URSHLv2i64 = 2739, + URSHLv4i16 = 2740, + URSHLv4i32 = 2741, + URSHLv8i16 = 2742, + URSHLv8i8 = 2743, + URSHRd = 2744, + URSHRv16i8_shift = 2745, + URSHRv2i32_shift = 2746, + URSHRv2i64_shift = 2747, + URSHRv4i16_shift = 2748, + URSHRv4i32_shift = 2749, + URSHRv8i16_shift = 2750, + URSHRv8i8_shift = 2751, + URSQRTEv2i32 = 2752, + URSQRTEv4i32 = 2753, + URSRAd = 2754, + URSRAv16i8_shift = 2755, + URSRAv2i32_shift = 2756, + URSRAv2i64_shift = 2757, + URSRAv4i16_shift = 2758, + URSRAv4i32_shift = 2759, + URSRAv8i16_shift = 2760, + URSRAv8i8_shift = 2761, + USHLLv16i8_shift = 2762, + USHLLv2i32_shift = 2763, + USHLLv4i16_shift = 2764, + USHLLv4i32_shift = 2765, + USHLLv8i16_shift = 2766, + USHLLv8i8_shift = 2767, + USHLv16i8 = 2768, + USHLv1i64 = 2769, + USHLv2i32 = 2770, + USHLv2i64 = 2771, + USHLv4i16 = 2772, + USHLv4i32 = 2773, + USHLv8i16 = 2774, + USHLv8i8 = 2775, + USHRd = 2776, + USHRv16i8_shift = 2777, + USHRv2i32_shift = 2778, + USHRv2i64_shift = 2779, + USHRv4i16_shift = 2780, + USHRv4i32_shift = 2781, + USHRv8i16_shift = 2782, + USHRv8i8_shift = 2783, + USQADDv16i8 = 2784, + USQADDv1i16 = 2785, + USQADDv1i32 = 2786, + USQADDv1i64 = 2787, + USQADDv1i8 = 2788, + USQADDv2i32 = 2789, + USQADDv2i64 = 2790, + USQADDv4i16 = 2791, + USQADDv4i32 = 2792, + USQADDv8i16 = 2793, + USQADDv8i8 = 2794, + USRAd = 2795, + USRAv16i8_shift = 2796, + USRAv2i32_shift = 2797, + USRAv2i64_shift = 2798, + USRAv4i16_shift = 2799, + USRAv4i32_shift = 2800, + USRAv8i16_shift = 2801, + USRAv8i8_shift = 2802, + USUBLv16i8_v8i16 = 2803, + USUBLv2i32_v2i64 = 2804, + USUBLv4i16_v4i32 = 2805, + USUBLv4i32_v2i64 = 2806, + USUBLv8i16_v4i32 = 2807, + USUBLv8i8_v8i16 = 2808, + USUBWv16i8_v8i16 = 2809, + USUBWv2i32_v2i64 = 2810, + USUBWv4i16_v4i32 = 2811, + USUBWv4i32_v2i64 = 2812, + USUBWv8i16_v4i32 = 2813, + USUBWv8i8_v8i16 = 2814, + UZP1v16i8 = 2815, + UZP1v2i32 = 2816, + UZP1v2i64 = 2817, + UZP1v4i16 = 2818, + UZP1v4i32 = 2819, + UZP1v8i16 = 2820, + UZP1v8i8 = 2821, + UZP2v16i8 = 2822, + UZP2v2i32 = 2823, + UZP2v2i64 = 2824, + UZP2v4i16 = 2825, + UZP2v4i32 = 2826, + UZP2v8i16 = 2827, + UZP2v8i8 = 2828, + XTNv16i8 = 2829, + XTNv2i32 = 2830, + XTNv4i16 = 2831, + XTNv4i32 = 2832, + XTNv8i16 = 2833, + XTNv8i8 = 2834, + ZIP1v16i8 = 2835, + ZIP1v2i32 = 2836, + ZIP1v2i64 = 2837, + ZIP1v4i16 = 2838, + ZIP1v4i32 = 2839, + ZIP1v8i16 = 2840, + ZIP1v8i8 = 2841, + ZIP2v16i8 = 2842, + ZIP2v2i32 = 2843, + ZIP2v2i64 = 2844, + ZIP2v4i16 = 2845, + ZIP2v4i32 = 2846, + ZIP2v8i16 = 2847, + ZIP2v8i8 = 2848, + INSTRUCTION_LIST_END = 2849 + }; + +namespace Sched { + enum { + NoInstrModel = 0, + WriteV = 1, + WriteI_ReadI_ReadI = 2, + WriteI_ReadI = 3, + WriteISReg_ReadI_ReadISReg = 4, + WriteIEReg_ReadI_ReadIEReg = 5, + WriteI = 6, + WriteIS_ReadI = 7, + WriteBr = 8, + WriteBrReg = 9, + WriteSys = 10, + WriteBarrier = 11, + WriteExtr_ReadExtrHi = 12, + WriteF = 13, + WriteFCmp = 14, + WriteFCvt = 15, + WriteFDiv = 16, + WriteFMul = 17, + WriteFCopy = 18, + WriteFImm = 19, + WriteHint = 20, + WriteLD = 21, + WriteLD_WriteLDHi = 22, + WriteLD_WriteLDHi_WriteAdr = 23, + WriteLD_WriteI = 24, + WriteLD_WriteAdr = 25, + WriteLDIdx_ReadAdrBase = 26, + WriteLDAdr = 27, + WriteIM32_ReadIM_ReadIM_ReadIMA = 28, + WriteIM64_ReadIM_ReadIM_ReadIMA = 29, + WriteImm = 30, + WriteAdrAdr = 31, + WriteID32_ReadID_ReadID = 32, + WriteID64_ReadID_ReadID = 33, + WriteIM64_ReadIM_ReadIM = 34, + WriteST = 35, + WriteSTX = 36, + WriteSTP = 37, + WriteAdr_WriteSTP = 38, + WriteAdr_WriteST_ReadAdrBase = 39, + WriteAdr_WriteST = 40, + WriteSTIdx_ReadAdrBase = 41, + COPY = 42, + LD1i16_LD1i32_LD1i64_LD1i8 = 43, + LD1Rv16b_LD1Rv1d_LD1Rv2d_LD1Rv2s_LD1Rv4h_LD1Rv4s_LD1Rv8b_LD1Rv8h = 44, + LD1Onev16b_LD1Onev1d_LD1Onev2d_LD1Onev2s_LD1Onev4h_LD1Onev4s_LD1Onev8b_LD1Onev8h = 45, + LD1Twov16b_LD1Twov1d_LD1Twov2d_LD1Twov2s_LD1Twov4h_LD1Twov4s_LD1Twov8b_LD1Twov8h = 46, + LD1Threev16b_LD1Threev1d_LD1Threev2d_LD1Threev2s_LD1Threev4h_LD1Threev4s_LD1Threev8b_LD1Threev8h = 47, + LD1Fourv16b_LD1Fourv1d_LD1Fourv2d_LD1Fourv2s_LD1Fourv4h_LD1Fourv4s_LD1Fourv8b_LD1Fourv8h = 48, + LD1i16_POST_LD1i32_POST_LD1i64_POST_LD1i8_POST = 49, + LD1Rv16b_POST_LD1Rv1d_POST_LD1Rv2d_POST_LD1Rv2s_POST_LD1Rv4h_POST_LD1Rv4s_POST_LD1Rv8b_POST_LD1Rv8h_POST = 50, + LD1Onev16b_POST_LD1Onev1d_POST_LD1Onev2d_POST_LD1Onev2s_POST_LD1Onev4h_POST_LD1Onev4s_POST_LD1Onev8b_POST_LD1Onev8h_POST = 51, + LD1Twov16b_POST_LD1Twov1d_POST_LD1Twov2d_POST_LD1Twov2s_POST_LD1Twov4h_POST_LD1Twov4s_POST_LD1Twov8b_POST_LD1Twov8h_POST = 52, + LD1Threev16b_POST_LD1Threev1d_POST_LD1Threev2d_POST_LD1Threev2s_POST_LD1Threev4h_POST_LD1Threev4s_POST_LD1Threev8b_POST_LD1Threev8h_POST = 53, + LD1Fourv16b_POST_LD1Fourv1d_POST_LD1Fourv2d_POST_LD1Fourv2s_POST_LD1Fourv4h_POST_LD1Fourv4s_POST_LD1Fourv8b_POST_LD1Fourv8h_POST = 54, + LD2i16_LD2i32_LD2i64_LD2i8 = 55, + LD2Rv16b_LD2Rv1d_LD2Rv2d_LD2Rv2s_LD2Rv4h_LD2Rv4s_LD2Rv8b_LD2Rv8h = 56, + LD2Twov2s_LD2Twov4h_LD2Twov8b = 57, + LD2Twov16b_LD2Twov2d_LD2Twov4s_LD2Twov8h = 58, + LD2i16_POST_LD2i32_POST_LD2i64_POST_LD2i8_POST = 59, + LD2Rv16b_POST_LD2Rv1d_POST_LD2Rv2d_POST_LD2Rv2s_POST_LD2Rv4h_POST_LD2Rv4s_POST_LD2Rv8b_POST_LD2Rv8h_POST = 60, + LD2Twov2s_POST_LD2Twov4h_POST_LD2Twov8b_POST = 61, + LD2Twov16b_POST_LD2Twov2d_POST_LD2Twov4s_POST_LD2Twov8h_POST = 62, + LD3i16_LD3i32_LD3i64_LD3i8 = 63, + LD3Rv16b_LD3Rv1d_LD3Rv2d_LD3Rv2s_LD3Rv4h_LD3Rv4s_LD3Rv8b_LD3Rv8h = 64, + LD3Threev16b_LD3Threev2s_LD3Threev4h_LD3Threev4s_LD3Threev8b_LD3Threev8h = 65, + LD3Threev2d = 66, + LD3i16_POST_LD3i32_POST_LD3i64_POST_LD3i8_POST = 67, + LD3Rv16b_POST_LD3Rv1d_POST_LD3Rv2d_POST_LD3Rv2s_POST_LD3Rv4h_POST_LD3Rv4s_POST_LD3Rv8b_POST_LD3Rv8h_POST = 68, + LD3Threev16b_POST_LD3Threev2s_POST_LD3Threev4h_POST_LD3Threev4s_POST_LD3Threev8b_POST_LD3Threev8h_POST = 69, + LD3Threev2d_POST = 70, + LD4i16_LD4i32_LD4i64_LD4i8 = 71, + LD4Rv16b_LD4Rv1d_LD4Rv2d_LD4Rv2s_LD4Rv4h_LD4Rv4s_LD4Rv8b_LD4Rv8h = 72, + LD4Fourv16b_LD4Fourv2s_LD4Fourv4h_LD4Fourv4s_LD4Fourv8b_LD4Fourv8h = 73, + LD4Fourv2d = 74, + LD4i16_POST_LD4i32_POST_LD4i64_POST_LD4i8_POST = 75, + LD4Rv16b_POST_LD4Rv1d_POST_LD4Rv2d_POST_LD4Rv2s_POST_LD4Rv4h_POST_LD4Rv4s_POST_LD4Rv8b_POST_LD4Rv8h_POST = 76, + LD4Fourv16b_POST_LD4Fourv2s_POST_LD4Fourv4h_POST_LD4Fourv4s_POST_LD4Fourv8b_POST_LD4Fourv8h_POST = 77, + LD4Fourv2d_POST = 78, + ST1i16_ST1i32_ST1i64_ST1i8 = 79, + ST1Onev16b_ST1Onev1d_ST1Onev2d_ST1Onev2s_ST1Onev4h_ST1Onev4s_ST1Onev8b_ST1Onev8h = 80, + ST1Twov16b_ST1Twov1d_ST1Twov2d_ST1Twov2s_ST1Twov4h_ST1Twov4s_ST1Twov8b_ST1Twov8h = 81, + ST1Threev16b_ST1Threev1d_ST1Threev2d_ST1Threev2s_ST1Threev4h_ST1Threev4s_ST1Threev8b_ST1Threev8h = 82, + ST1Fourv16b_ST1Fourv1d_ST1Fourv2d_ST1Fourv2s_ST1Fourv4h_ST1Fourv4s_ST1Fourv8b_ST1Fourv8h = 83, + ST1i16_POST_ST1i32_POST_ST1i64_POST_ST1i8_POST = 84, + ST1Onev16b_POST_ST1Onev1d_POST_ST1Onev2d_POST_ST1Onev2s_POST_ST1Onev4h_POST_ST1Onev4s_POST_ST1Onev8b_POST_ST1Onev8h_POST = 85, + ST1Twov16b_POST_ST1Twov1d_POST_ST1Twov2d_POST_ST1Twov2s_POST_ST1Twov4h_POST_ST1Twov4s_POST_ST1Twov8b_POST_ST1Twov8h_POST = 86, + ST1Threev16b_POST_ST1Threev1d_POST_ST1Threev2d_POST_ST1Threev2s_POST_ST1Threev4h_POST_ST1Threev4s_POST_ST1Threev8b_POST_ST1Threev8h_POST = 87, + ST1Fourv16b_POST_ST1Fourv1d_POST_ST1Fourv2d_POST_ST1Fourv2s_POST_ST1Fourv4h_POST_ST1Fourv4s_POST_ST1Fourv8b_POST_ST1Fourv8h_POST = 88, + ST2i16_ST2i32_ST2i64_ST2i8 = 89, + ST2Twov2s_ST2Twov4h_ST2Twov8b = 90, + ST2Twov16b_ST2Twov2d_ST2Twov4s_ST2Twov8h = 91, + ST2i16_POST_ST2i32_POST_ST2i64_POST_ST2i8_POST = 92, + ST2Twov2s_POST_ST2Twov4h_POST_ST2Twov8b_POST = 93, + ST2Twov16b_POST_ST2Twov2d_POST_ST2Twov4s_POST_ST2Twov8h_POST = 94, + ST3i16_ST3i32_ST3i64_ST3i8 = 95, + ST3Threev16b_ST3Threev2s_ST3Threev4h_ST3Threev4s_ST3Threev8b_ST3Threev8h = 96, + ST3Threev2d = 97, + ST3i16_POST_ST3i32_POST_ST3i64_POST_ST3i8_POST = 98, + ST3Threev16b_POST_ST3Threev2s_POST_ST3Threev4h_POST_ST3Threev4s_POST_ST3Threev8b_POST_ST3Threev8h_POST = 99, + ST3Threev2d_POST = 100, + ST4i16_ST4i32_ST4i64_ST4i8 = 101, + ST4Fourv16b_ST4Fourv2s_ST4Fourv4h_ST4Fourv4s_ST4Fourv8b_ST4Fourv8h = 102, + ST4Fourv2d = 103, + ST4i16_POST_ST4i32_POST_ST4i64_POST_ST4i8_POST = 104, + ST4Fourv16b_POST_ST4Fourv2s_POST_ST4Fourv4h_POST_ST4Fourv4s_POST_ST4Fourv8b_POST_ST4Fourv8h_POST = 105, + ST4Fourv2d_POST = 106, + FMADDDrrr_FMADDHrrr_FMADDSrrr_FMSUBDrrr_FMSUBHrrr_FMSUBSrrr_FNMADDDrrr_FNMADDHrrr_FNMADDSrrr_FNMSUBDrrr_FNMSUBHrrr_FNMSUBSrrr = 107, + FMLAv1i16_indexed_FMLAv1i32_indexed_FMLAv1i64_indexed_FMLAv2f32_FMLAv2f64_FMLAv2i32_indexed_FMLAv2i64_indexed_FMLAv4f16_FMLAv4f32_FMLAv4i16_indexed_FMLAv4i32_indexed_FMLAv8f16_FMLAv8i16_indexed_FMLSv1i16_indexed_FMLSv1i32_indexed_FMLSv1i64_indexed_FMLSv2f32_FMLSv2f64_FMLSv2i32_indexed_FMLSv2i64_indexed_FMLSv4f16_FMLSv4f32_FMLSv4i16_indexed_FMLSv4i32_indexed_FMLSv8f16_FMLSv8i16_indexed = 108, + FDIVSrr = 109, + FDIVDrr = 110, + FDIVv2f32_FDIVv4f32 = 111, + FDIVv2f64 = 112, + FRSQRTEv1i32_FRSQRTEv2f32_FRSQRTEv4f32_FRSQRTS32_FRSQRTSv2f32_FRSQRTSv4f32_FSQRTv2f32_FSQRTv4f32_URSQRTEv2i32_URSQRTEv4i32 = 113, + FRSQRTEv1i64_FRSQRTEv2f64_FRSQRTS64_FRSQRTSv2f64_FSQRTv2f64 = 114, + BL = 115, + BLR = 116, + ADDSWrs_ADDSXrs_ADDWrs_ADDXrs_ANDSWrs_ANDSXrs_ANDWrs_ANDXrs_BICSWrs_BICSXrs_BICWrs_BICXrs_EONWrs_EONXrs_EORWrs_EORXrs_ORNWrs_ORNXrs_ORRWrs_ORRXrs_SUBSWrs_SUBSXrs_SUBWrs_SUBXrs = 117, + SMULHrr_UMULHrr = 118, + EXTRWrri = 119, + EXTRXrri = 120, + BFMWri_BFMXri = 121, + AESDrr_AESErr_AESIMCrr_AESMCrr = 122, + SHA1SU0rrr = 123, + SHA1Hrr_SHA1SU1rr = 124, + SHA1Crrr_SHA1Mrrr_SHA1Prrr = 125, + SHA256SU0rr = 126, + SHA256H2rrr_SHA256Hrrr_SHA256SU1rrr = 127, + CRC32Brr_CRC32CBrr_CRC32CHrr_CRC32CWrr_CRC32CXrr_CRC32Hrr_CRC32Wrr_CRC32Xrr = 128, + LD1i16_LD1i32_LD1i8 = 129, + LD1i16_POST_LD1i32_POST_LD1i8_POST = 130, + LD1Rv2s_LD1Rv4h_LD1Rv8b = 131, + LD1Rv2s_POST_LD1Rv4h_POST_LD1Rv8b_POST = 132, + LD1Rv1d = 133, + LD1Rv1d_POST = 134, + LD1Onev1d_LD1Onev2s_LD1Onev4h_LD1Onev8b = 135, + LD1Onev1d_POST_LD1Onev2s_POST_LD1Onev4h_POST_LD1Onev8b_POST = 136, + LD1Twov1d_LD1Twov2s_LD1Twov4h_LD1Twov8b = 137, + LD1Twov1d_POST_LD1Twov2s_POST_LD1Twov4h_POST_LD1Twov8b_POST = 138, + LD1Threev1d_LD1Threev2s_LD1Threev4h_LD1Threev8b = 139, + LD1Threev1d_POST_LD1Threev2s_POST_LD1Threev4h_POST_LD1Threev8b_POST = 140, + LD1Fourv1d_LD1Fourv2s_LD1Fourv4h_LD1Fourv8b = 141, + LD1Fourv1d_POST_LD1Fourv2s_POST_LD1Fourv4h_POST_LD1Fourv8b_POST = 142, + LD2i16_LD2i8 = 143, + LD2i16_POST_LD2i8_POST = 144, + LD2i32 = 145, + LD2i32_POST = 146, + LD2Rv2s_LD2Rv4h_LD2Rv8b = 147, + LD2Rv2s_POST_LD2Rv4h_POST_LD2Rv8b_POST = 148, + LD2Rv1d = 149, + LD2Rv1d_POST = 150, + LD2Twov16b_LD2Twov4s_LD2Twov8h = 151, + LD2Twov16b_POST_LD2Twov4s_POST_LD2Twov8h_POST = 152, + LD3i16_LD3i8 = 153, + LD3i16_POST_LD3i8_POST = 154, + LD3i32 = 155, + LD3i32_POST = 156, + LD3Rv2s_LD3Rv4h_LD3Rv8b = 157, + LD3Rv2s_POST_LD3Rv4h_POST_LD3Rv8b_POST = 158, + LD3Rv1d = 159, + LD3Rv1d_POST = 160, + LD3Rv16b_LD3Rv4s_LD3Rv8h = 161, + LD3Rv16b_POST_LD3Rv4s_POST_LD3Rv8h_POST = 162, + LD3Threev2s_LD3Threev4h_LD3Threev8b = 163, + LD3Threev2s_POST_LD3Threev4h_POST_LD3Threev8b_POST = 164, + LD4i16_LD4i8 = 165, + LD4i16_POST_LD4i8_POST = 166, + LD4i32 = 167, + LD4i32_POST = 168, + LD4Rv2s_LD4Rv4h_LD4Rv8b = 169, + LD4Rv2s_POST_LD4Rv4h_POST_LD4Rv8b_POST = 170, + LD4Rv1d = 171, + LD4Rv1d_POST = 172, + LD4Rv16b_LD4Rv4s_LD4Rv8h = 173, + LD4Rv16b_POST_LD4Rv4s_POST_LD4Rv8h_POST = 174, + LD4Fourv2s_LD4Fourv4h_LD4Fourv8b = 175, + LD4Fourv2s_POST_LD4Fourv4h_POST_LD4Fourv8b_POST = 176, + ST1i16_ST1i32_ST1i8 = 177, + ST1i16_POST_ST1i32_POST_ST1i8_POST = 178, + ST1Onev1d_ST1Onev2s_ST1Onev4h_ST1Onev8b = 179, + ST1Onev1d_POST_ST1Onev2s_POST_ST1Onev4h_POST_ST1Onev8b_POST = 180, + ST1Twov1d_ST1Twov2s_ST1Twov4h_ST1Twov8b = 181, + ST1Twov1d_POST_ST1Twov2s_POST_ST1Twov4h_POST_ST1Twov8b_POST = 182, + ST1Threev1d_ST1Threev2s_ST1Threev4h_ST1Threev8b = 183, + ST1Threev1d_POST_ST1Threev2s_POST_ST1Threev4h_POST_ST1Threev8b_POST = 184, + ST1Fourv1d_ST1Fourv2s_ST1Fourv4h_ST1Fourv8b = 185, + ST1Fourv1d_POST_ST1Fourv2s_POST_ST1Fourv4h_POST_ST1Fourv8b_POST = 186, + ST2i16_ST2i32_ST2i8 = 187, + ST2i16_POST_ST2i32_POST_ST2i8_POST = 188, + ST2Twov16b_ST2Twov4s_ST2Twov8h = 189, + ST2Twov16b_POST_ST2Twov4s_POST_ST2Twov8h_POST = 190, + ST3i16_ST3i8 = 191, + ST3i16_POST_ST3i8_POST = 192, + ST3i32 = 193, + ST3i32_POST = 194, + ST3Threev2s_ST3Threev4h_ST3Threev8b = 195, + ST3Threev2s_POST_ST3Threev4h_POST_ST3Threev8b_POST = 196, + ST4i16_ST4i8 = 197, + ST4i16_POST_ST4i8_POST = 198, + ST4i32 = 199, + ST4i32_POST = 200, + ST4Fourv2s_ST4Fourv4h_ST4Fourv8b = 201, + ST4Fourv2s_POST_ST4Fourv4h_POST_ST4Fourv8b_POST = 202, + SABAv2i32_SABAv4i16_SABAv8i8_UABAv2i32_UABAv4i16_UABAv8i8 = 203, + SABAv16i8_SABAv4i32_SABAv8i16_UABAv16i8_UABAv4i32_UABAv8i16 = 204, + SABALv16i8_v8i16_SABALv2i32_v2i64_SABALv4i16_v4i32_SABALv4i32_v2i64_SABALv8i16_v4i32_SABALv8i8_v8i16_UABALv16i8_v8i16_UABALv2i32_v2i64_UABALv4i16_v4i32_UABALv4i32_v2i64_UABALv8i16_v4i32_UABALv8i8_v8i16 = 205, + ADDVv4i16v_ADDVv8i8v_SADDLVv4i16v_SADDLVv8i8v_UADDLVv4i16v_UADDLVv8i8v = 206, + ADDVv4i32v_ADDVv8i16v_SADDLVv4i32v_SADDLVv8i16v_UADDLVv4i32v_UADDLVv8i16v = 207, + ADDVv16i8v_SADDLVv16i8v_UADDLVv16i8v = 208, + SMAXVv4i16v_SMAXVv4i32v_SMINVv4i16v_SMINVv4i32v_UMAXVv4i16v_UMAXVv4i32v_UMINVv4i16v_UMINVv4i32v = 209, + SMAXVv8i16v_SMAXVv8i8v_SMINVv8i16v_SMINVv8i8v_UMAXVv8i16v_UMAXVv8i8v_UMINVv8i16v_UMINVv8i8v = 210, + SMAXVv16i8v_SMINVv16i8v_UMAXVv16i8v_UMINVv16i8v = 211, + MULv2i32_MULv2i32_indexed_MULv4i16_MULv4i16_indexed_MULv8i8_PMULv8i8_SQDMULHv1i16_SQDMULHv1i16_indexed_SQDMULHv1i32_SQDMULHv1i32_indexed_SQDMULHv2i32_SQDMULHv2i32_indexed_SQDMULHv4i16_SQDMULHv4i16_indexed_SQRDMULHv1i16_SQRDMULHv1i16_indexed_SQRDMULHv1i32_SQRDMULHv1i32_indexed_SQRDMULHv2i32_SQRDMULHv2i32_indexed_SQRDMULHv4i16_SQRDMULHv4i16_indexed = 212, + MULv16i8_MULv4i32_MULv4i32_indexed_MULv8i16_MULv8i16_indexed_PMULv16i8_SQDMULHv4i32_SQDMULHv4i32_indexed_SQDMULHv8i16_SQDMULHv8i16_indexed_SQRDMULHv4i32_SQRDMULHv4i32_indexed_SQRDMULHv8i16_SQRDMULHv8i16_indexed = 213, + MLAv2i32_MLAv2i32_indexed_MLAv4i16_MLAv4i16_indexed_MLAv8i8_MLSv2i32_MLSv2i32_indexed_MLSv4i16_MLSv4i16_indexed_MLSv8i8 = 214, + MLAv16i8_MLAv4i32_MLAv4i32_indexed_MLAv8i16_MLAv8i16_indexed_MLSv16i8_MLSv4i32_MLSv4i32_indexed_MLSv8i16_MLSv8i16_indexed = 215, + SMLALv16i8_v8i16_SMLALv2i32_indexed_SMLALv2i32_v2i64_SMLALv4i16_indexed_SMLALv4i16_v4i32_SMLALv4i32_indexed_SMLALv4i32_v2i64_SMLALv8i16_indexed_SMLALv8i16_v4i32_SMLALv8i8_v8i16_SMLSLv16i8_v8i16_SMLSLv2i32_indexed_SMLSLv2i32_v2i64_SMLSLv4i16_indexed_SMLSLv4i16_v4i32_SMLSLv4i32_indexed_SMLSLv4i32_v2i64_SMLSLv8i16_indexed_SMLSLv8i16_v4i32_SMLSLv8i8_v8i16_SQDMLALi16_SQDMLALi32_SQDMLALv1i32_indexed_SQDMLALv1i64_indexed_SQDMLALv2i32_indexed_SQDMLALv2i32_v2i64_SQDMLALv4i16_indexed_SQDMLALv4i16_v4i32_SQDMLALv4i32_indexed_SQDMLALv4i32_v2i64_SQDMLALv8i16_indexed_SQDMLALv8i16_v4i32_SQDMLSLi16_SQDMLSLi32_SQDMLSLv1i32_indexed_SQDMLSLv1i64_indexed_SQDMLSLv2i32_indexed_SQDMLSLv2i32_v2i64_SQDMLSLv4i16_indexed_SQDMLSLv4i16_v4i32_SQDMLSLv4i32_indexed_SQDMLSLv4i32_v2i64_SQDMLSLv8i16_indexed_SQDMLSLv8i16_v4i32_UMLALv16i8_v8i16_UMLALv2i32_indexed_UMLALv2i32_v2i64_UMLALv4i16_indexed_UMLALv4i16_v4i32_UMLALv4i32_indexed_UMLALv4i32_v2i64_UMLALv8i16_indexed_UMLALv8i16_v4i32_UMLALv8i8_v8i16_UMLSLv16i8_v8i16_UMLSLv2i32_indexed_UMLSLv2i32_v2i64_UMLSLv4i16_indexed_UMLSLv4i16_v4i32_UMLSLv4i32_indexed_UMLSLv4i32_v2i64_UMLSLv8i16_indexed_UMLSLv8i16_v4i32_UMLSLv8i8_v8i16 = 216, + SMULLv16i8_v8i16_SMULLv2i32_indexed_SMULLv2i32_v2i64_SMULLv4i16_indexed_SMULLv4i16_v4i32_SMULLv4i32_indexed_SMULLv4i32_v2i64_SMULLv8i16_indexed_SMULLv8i16_v4i32_SMULLv8i8_v8i16_SQDMULLi16_SQDMULLi32_SQDMULLv1i32_indexed_SQDMULLv1i64_indexed_SQDMULLv2i32_indexed_SQDMULLv2i32_v2i64_SQDMULLv4i16_indexed_SQDMULLv4i16_v4i32_SQDMULLv4i32_indexed_SQDMULLv4i32_v2i64_SQDMULLv8i16_indexed_SQDMULLv8i16_v4i32_UMULLv16i8_v8i16_UMULLv2i32_indexed_UMULLv2i32_v2i64_UMULLv4i16_indexed_UMULLv4i16_v4i32_UMULLv4i32_indexed_UMULLv4i32_v2i64_UMULLv8i16_indexed_UMULLv8i16_v4i32_UMULLv8i8_v8i16 = 217, + PMULLv16i8_PMULLv8i8 = 218, + PMULLv1i64_PMULLv2i64 = 219, + SADALPv16i8_v8i16_SADALPv2i32_v1i64_SADALPv4i16_v2i32_SADALPv4i32_v2i64_SADALPv8i16_v4i32_SADALPv8i8_v4i16_UADALPv16i8_v8i16_UADALPv2i32_v1i64_UADALPv4i16_v2i32_UADALPv4i32_v2i64_UADALPv8i16_v4i32_UADALPv8i8_v4i16 = 220, + SRSRAd_SRSRAv16i8_shift_SRSRAv2i32_shift_SRSRAv2i64_shift_SRSRAv4i16_shift_SRSRAv4i32_shift_SRSRAv8i16_shift_SRSRAv8i8_shift_SSRAd_SSRAv16i8_shift_SSRAv2i32_shift_SSRAv2i64_shift_SSRAv4i16_shift_SSRAv4i32_shift_SSRAv8i16_shift_SSRAv8i8_shift_URSRAd_URSRAv16i8_shift_URSRAv2i32_shift_URSRAv2i64_shift_URSRAv4i16_shift_URSRAv4i32_shift_URSRAv8i16_shift_URSRAv8i8_shift_USRAd_USRAv16i8_shift_USRAv2i32_shift_USRAv2i64_shift_USRAv4i16_shift_USRAv4i32_shift_USRAv8i16_shift_USRAv8i8_shift = 221, + RSHRNv16i8_shift_RSHRNv2i32_shift_RSHRNv4i16_shift_RSHRNv4i32_shift_RSHRNv8i16_shift_RSHRNv8i8_shift_SQRSHRNb_SQRSHRNh_SQRSHRNs_SQRSHRNv16i8_shift_SQRSHRNv2i32_shift_SQRSHRNv4i16_shift_SQRSHRNv4i32_shift_SQRSHRNv8i16_shift_SQRSHRNv8i8_shift_SQRSHRUNb_SQRSHRUNh_SQRSHRUNs_SQRSHRUNv16i8_shift_SQRSHRUNv2i32_shift_SQRSHRUNv4i16_shift_SQRSHRUNv4i32_shift_SQRSHRUNv8i16_shift_SQRSHRUNv8i8_shift_SQSHRNb_SQSHRNh_SQSHRNs_SQSHRNv16i8_shift_SQSHRNv2i32_shift_SQSHRNv4i16_shift_SQSHRNv4i32_shift_SQSHRNv8i16_shift_SQSHRNv8i8_shift_SQSHRUNb_SQSHRUNh_SQSHRUNs_SQSHRUNv16i8_shift_SQSHRUNv2i32_shift_SQSHRUNv4i16_shift_SQSHRUNv4i32_shift_SQSHRUNv8i16_shift_SQSHRUNv8i8_shift_SRSHRd_SRSHRv16i8_shift_SRSHRv2i32_shift_SRSHRv2i64_shift_SRSHRv4i16_shift_SRSHRv4i32_shift_SRSHRv8i16_shift_SRSHRv8i8_shift_UQRSHRNb_UQRSHRNh_UQRSHRNs_UQRSHRNv16i8_shift_UQRSHRNv2i32_shift_UQRSHRNv4i16_shift_UQRSHRNv4i32_shift_UQRSHRNv8i16_shift_UQRSHRNv8i8_shift_UQSHRNb_UQSHRNh_UQSHRNs_UQSHRNv16i8_shift_UQSHRNv2i32_shift_UQSHRNv4i16_shift_UQSHRNv4i32_shift_UQSHRNv8i16_shift_UQSHRNv8i8_shift_URSHRd_URSHRv16i8_shift_URSHRv2i32_shift_URSHRv2i64_shift_URSHRv4i16_shift_URSHRv4i32_shift_URSHRv8i16_shift_URSHRv8i8_shift = 222, + SQSHLUb_SQSHLUd_SQSHLUh_SQSHLUs_SQSHLUv16i8_shift_SQSHLUv2i32_shift_SQSHLUv2i64_shift_SQSHLUv4i16_shift_SQSHLUv4i32_shift_SQSHLUv8i16_shift_SQSHLUv8i8_shift = 223, + SSHLv16i8_SSHLv2i64_SSHLv4i32_SSHLv8i16_USHLv16i8_USHLv2i64_USHLv4i32_USHLv8i16 = 224, + SQRSHLv1i16_SQRSHLv1i32_SQRSHLv1i64_SQRSHLv1i8_SQRSHLv2i32_SQRSHLv4i16_SQRSHLv8i8_SQSHLb_SQSHLd_SQSHLh_SQSHLs_SQSHLv1i16_SQSHLv1i32_SQSHLv1i64_SQSHLv1i8_SQSHLv2i32_SQSHLv2i32_shift_SQSHLv4i16_SQSHLv4i16_shift_SQSHLv8i8_SQSHLv8i8_shift_SRSHLv1i64_SRSHLv2i32_SRSHLv4i16_SRSHLv8i8_UQRSHLv1i16_UQRSHLv1i32_UQRSHLv1i64_UQRSHLv1i8_UQRSHLv2i32_UQRSHLv4i16_UQRSHLv8i8_UQSHLb_UQSHLd_UQSHLh_UQSHLs_UQSHLv1i16_UQSHLv1i32_UQSHLv1i64_UQSHLv1i8_UQSHLv2i32_UQSHLv2i32_shift_UQSHLv4i16_UQSHLv4i16_shift_UQSHLv8i8_UQSHLv8i8_shift_URSHLv1i64_URSHLv2i32_URSHLv4i16_URSHLv8i8 = 225, + SQRSHLv16i8_SQRSHLv2i64_SQRSHLv4i32_SQRSHLv8i16_SQSHLv16i8_SQSHLv16i8_shift_SQSHLv2i64_SQSHLv2i64_shift_SQSHLv4i32_SQSHLv4i32_shift_SQSHLv8i16_SQSHLv8i16_shift_SRSHLv16i8_SRSHLv2i64_SRSHLv4i32_SRSHLv8i16_UQRSHLv16i8_UQRSHLv2i64_UQRSHLv4i32_UQRSHLv8i16_UQSHLv16i8_UQSHLv16i8_shift_UQSHLv2i64_UQSHLv2i64_shift_UQSHLv4i32_UQSHLv4i32_shift_UQSHLv8i16_UQSHLv8i16_shift_URSHLv16i8_URSHLv2i64_URSHLv4i32_URSHLv8i16 = 226, + FABD32_FABD64_FABDv2f32_FADDv2f32_FSUBv2f32 = 227, + FABDv2f64_FABDv4f32_FADDv2f64_FADDv4f32_FSUBv2f64_FSUBv4f32 = 228, + FADDPv2f32_FADDPv2i32p = 229, + FADDPv2f64_FADDPv2i64p_FADDPv4f32 = 230, + FACGE32_FACGE64_FACGEv2f32_FACGT32_FACGT64_FACGTv2f32_FCMEQ32_FCMEQ64_FCMEQv1i32rz_FCMEQv1i64rz_FCMEQv2f32_FCMEQv2i32rz_FCMGE32_FCMGE64_FCMGEv1i32rz_FCMGEv1i64rz_FCMGEv2f32_FCMGEv2i32rz_FCMGT32_FCMGT64_FCMGTv1i32rz_FCMGTv1i64rz_FCMGTv2f32_FCMGTv2i32rz_FCMLEv1i32rz_FCMLEv1i64rz_FCMLEv2i32rz_FCMLTv1i32rz_FCMLTv1i64rz_FCMLTv2i32rz = 231, + FACGEv2f64_FACGEv4f32_FACGTv2f64_FACGTv4f32_FCMEQv2f64_FCMEQv2i64rz_FCMEQv4f32_FCMEQv4i32rz_FCMGEv2f64_FCMGEv2i64rz_FCMGEv4f32_FCMGEv4i32rz_FCMGTv2f64_FCMGTv2i64rz_FCMGTv4f32_FCMGTv4i32rz_FCMLEv2i64rz_FCMLEv4i32rz_FCMLTv2i64rz_FCMLTv4i32rz = 232, + FCVTLv2i32_FCVTLv4i16_FCVTLv4i32_FCVTLv8i16_FCVTNv2i32_FCVTNv4i16_FCVTNv4i32_FCVTNv8i16_FCVTXNv1i64_FCVTXNv2f32_FCVTXNv4f32 = 233, + FCVTASv1i32_FCVTASv1i64_FCVTASv2f32_FCVTAUv1i32_FCVTAUv1i64_FCVTAUv2f32_FCVTMSv1i32_FCVTMSv1i64_FCVTMSv2f32_FCVTMUv1i32_FCVTMUv1i64_FCVTMUv2f32_FCVTNSv1i32_FCVTNSv1i64_FCVTNSv2f32_FCVTNUv1i32_FCVTNUv1i64_FCVTNUv2f32_FCVTPSv1i32_FCVTPSv1i64_FCVTPSv2f32_FCVTPUv1i32_FCVTPUv1i64_FCVTPUv2f32_FCVTZS_Intv2f32_FCVTZSv1i32_FCVTZSv1i64_FCVTZSv2f32_FCVTZSv2i32_shift_FCVTZU_Intv2f32_FCVTZUv1i32_FCVTZUv1i64_FCVTZUv2f32_FCVTZUv2i32_shift = 234, + FCVTASv2f64_FCVTASv4f32_FCVTAUv2f64_FCVTAUv4f32_FCVTMSv2f64_FCVTMSv4f32_FCVTMUv2f64_FCVTMUv4f32_FCVTNSv2f64_FCVTNSv4f32_FCVTNUv2f64_FCVTNUv4f32_FCVTPSv2f64_FCVTPSv4f32_FCVTPUv2f64_FCVTPUv4f32_FCVTZS_Intv2f64_FCVTZS_Intv4f32_FCVTZSv2f64_FCVTZSv2i64_shift_FCVTZSv4f32_FCVTZSv4i32_shift_FCVTZU_Intv2f64_FCVTZU_Intv4f32_FCVTZUv2f64_FCVTZUv2i64_shift_FCVTZUv4f32_FCVTZUv4i32_shift = 235, + FDIVv2f32 = 236, + FSQRTv2f32 = 237, + FSQRTv4f32 = 238, + FSQRTv2f64 = 239, + FMAXNMv2f32_FMAXv2f32_FMINNMv2f32_FMINv2f32 = 240, + FMAXNMv2f64_FMAXNMv4f32_FMAXv2f64_FMAXv4f32_FMINNMv2f64_FMINNMv4f32_FMINv2f64_FMINv4f32 = 241, + FMAXNMPv2f32_FMAXNMPv2i32p_FMAXPv2f32_FMAXPv2i32p_FMINNMPv2f32_FMINNMPv2i32p_FMINPv2f32_FMINPv2i32p = 242, + FMAXNMPv2f64_FMAXNMPv2i64p_FMAXNMPv4f32_FMAXPv2f64_FMAXPv2i64p_FMAXPv4f32_FMINNMPv2f64_FMINNMPv2i64p_FMINNMPv4f32_FMINPv2f64_FMINPv2i64p_FMINPv4f32 = 243, + FMAXNMVv4i16v_FMAXNMVv4i32v_FMAXNMVv8i16v_FMAXVv4i16v_FMAXVv4i32v_FMAXVv8i16v_FMINNMVv4i16v_FMINNMVv4i32v_FMINNMVv8i16v_FMINVv4i16v_FMINVv4i32v_FMINVv8i16v = 244, + FMULX32_FMULX64_FMULXv1i32_indexed_FMULXv1i64_indexed_FMULXv2f32_FMULXv2i32_indexed_FMULv1i32_indexed_FMULv1i64_indexed_FMULv2f32_FMULv2i32_indexed = 245, + FMULXv2f64_FMULXv2i64_indexed_FMULXv4f32_FMULXv4i32_indexed_FMULv2f64_FMULv2i64_indexed_FMULv4f32_FMULv4i32_indexed = 246, + FMLAv1i32_indexed_FMLAv1i64_indexed_FMLAv2f32_FMLAv2i32_indexed_FMLSv1i32_indexed_FMLSv1i64_indexed_FMLSv2f32_FMLSv2i32_indexed = 247, + FMLAv2f64_FMLAv2i64_indexed_FMLAv4f32_FMLAv4i32_indexed_FMLSv2f64_FMLSv2i64_indexed_FMLSv4f32_FMLSv4i32_indexed = 248, + FRINTAv2f32_FRINTIv2f32_FRINTMv2f32_FRINTNv2f32_FRINTPv2f32_FRINTXv2f32_FRINTZv2f32 = 249, + FRINTAv2f64_FRINTAv4f32_FRINTIv2f64_FRINTIv4f32_FRINTMv2f64_FRINTMv4f32_FRINTNv2f64_FRINTNv4f32_FRINTPv2f64_FRINTPv4f32_FRINTXv2f64_FRINTXv4f32_FRINTZv2f64_FRINTZv4f32 = 250, + BIFv16i8_BITv16i8_BSLv16i8 = 251, + CPYi16_CPYi32_CPYi64_CPYi8 = 252, + DUPv16i8gpr_DUPv2i32gpr_DUPv2i64gpr_DUPv4i16gpr_DUPv4i32gpr_DUPv8i16gpr_DUPv8i8gpr = 253, + SQXTNv16i8_SQXTNv1i16_SQXTNv1i32_SQXTNv1i8_SQXTNv2i32_SQXTNv4i16_SQXTNv4i32_SQXTNv8i16_SQXTNv8i8_SQXTUNv16i8_SQXTUNv1i16_SQXTUNv1i32_SQXTUNv1i8_SQXTUNv2i32_SQXTUNv4i16_SQXTUNv4i32_SQXTUNv8i16_SQXTUNv8i8_UQXTNv16i8_UQXTNv1i16_UQXTNv1i32_UQXTNv1i8_UQXTNv2i32_UQXTNv4i16_UQXTNv4i32_UQXTNv8i16_UQXTNv8i8 = 254, + FRECPEv1i32_FRECPEv1i64_FRECPEv2f32_FRECPXv1i32_FRECPXv1i64_URECPEv2i32 = 255, + FRSQRTEv1i32_FRSQRTEv2f32_URSQRTEv2i32 = 256, + FRSQRTEv1i64 = 257, + FRECPEv2f64_FRECPEv4f32_URECPEv4i32 = 258, + FRSQRTEv2f64 = 259, + FRSQRTEv4f32_URSQRTEv4i32 = 260, + FRECPS32_FRECPS64_FRECPSv2f32 = 261, + FRSQRTS32_FRSQRTSv2f32 = 262, + FRSQRTS64 = 263, + FRECPSv2f64_FRECPSv4f32 = 264, + TBLv8i8One_TBXv8i8One = 265, + TBLv8i8Two_TBXv8i8Two = 266, + TBLv8i8Three_TBXv8i8Three = 267, + TBLv8i8Four_TBXv8i8Four = 268, + TBLv16i8One_TBXv16i8One = 269, + TBLv16i8Two_TBXv16i8Two = 270, + TBLv16i8Three_TBXv16i8Three = 271, + TBLv16i8Four_TBXv16i8Four = 272, + SMOVvi16to32_SMOVvi16to64_SMOVvi32to64_SMOVvi8to32_SMOVvi8to64_UMOVvi16_UMOVvi32_UMOVvi64_UMOVvi8 = 273, + INSvi16gpr_INSvi16lane_INSvi32gpr_INSvi32lane_INSvi64gpr_INSvi64lane_INSvi8gpr_INSvi8lane = 274, + UZP1v16i8_UZP1v2i64_UZP1v4i32_UZP1v8i16_UZP2v16i8_UZP2v2i64_UZP2v4i32_UZP2v8i16_ZIP1v16i8_ZIP1v2i64_ZIP1v4i32_ZIP1v8i16_ZIP2v16i8_ZIP2v2i64_ZIP2v4i32_ZIP2v8i16 = 275, + FADDDrr_FADDSrr_FSUBDrr_FSUBSrr = 276, + FMADDDrrr_FMADDSrrr_FMSUBDrrr_FMSUBSrrr_FNMADDDrrr_FNMADDSrrr_FNMSUBDrrr_FNMSUBSrrr = 277, + FCVTASUWDr_FCVTASUWSr_FCVTASUXDr_FCVTASUXSr_FCVTAUUWDr_FCVTAUUWSr_FCVTAUUXDr_FCVTAUUXSr_FCVTMSUWDr_FCVTMSUWSr_FCVTMSUXDr_FCVTMSUXSr_FCVTMUUWDr_FCVTMUUWSr_FCVTMUUXDr_FCVTMUUXSr_FCVTNSUWDr_FCVTNSUWSr_FCVTNSUXDr_FCVTNSUXSr_FCVTNUUWDr_FCVTNUUWSr_FCVTNUUXDr_FCVTNUUXSr_FCVTPSUWDr_FCVTPSUWSr_FCVTPSUXDr_FCVTPSUXSr_FCVTPUUWDr_FCVTPUUWSr_FCVTPUUXDr_FCVTPUUXSr_FCVTZSSWDri_FCVTZSSWSri_FCVTZSSXDri_FCVTZSSXSri_FCVTZSUWDr_FCVTZSUWSr_FCVTZSUXDr_FCVTZSUXSr_FCVTZS_IntSWDri_FCVTZS_IntSWSri_FCVTZS_IntSXDri_FCVTZS_IntSXSri_FCVTZS_IntUWDr_FCVTZS_IntUWSr_FCVTZS_IntUXDr_FCVTZS_IntUXSr_FCVTZUSWDri_FCVTZUSWSri_FCVTZUSXDri_FCVTZUSXSri_FCVTZUUWDr_FCVTZUUWSr_FCVTZUUXDr_FCVTZUUXSr_FCVTZU_IntSWDri_FCVTZU_IntSWSri_FCVTZU_IntSXDri_FCVTZU_IntSXSri_FCVTZU_IntUWDr_FCVTZU_IntUWSr_FCVTZU_IntUXDr_FCVTZU_IntUXSr = 278, + FCVTZSd_FCVTZSs_FCVTZUd_FCVTZUs = 279, + SCVTFSWDri_SCVTFSWHri_SCVTFSWSri_SCVTFSXDri_SCVTFSXHri_SCVTFSXSri_SCVTFUWDri_SCVTFUWHri_SCVTFUWSri_SCVTFUXDri_SCVTFUXHri_SCVTFUXSri_UCVTFSWDri_UCVTFSWHri_UCVTFSWSri_UCVTFSXDri_UCVTFSXHri_UCVTFSXSri_UCVTFUWDri_UCVTFUWHri_UCVTFUWSri_UCVTFUXDri_UCVTFUXHri_UCVTFUXSri = 280, + SCVTFd_SCVTFh_SCVTFs_SCVTFv1i16_SCVTFv1i32_SCVTFv1i64_SCVTFv2f32_SCVTFv2f64_SCVTFv2i32_shift_SCVTFv2i64_shift_SCVTFv4f16_SCVTFv4f32_SCVTFv4i16_shift_SCVTFv4i32_shift_SCVTFv8f16_SCVTFv8i16_shift_UCVTFd_UCVTFh_UCVTFs_UCVTFv1i16_UCVTFv1i32_UCVTFv1i64_UCVTFv2f32_UCVTFv2f64_UCVTFv2i32_shift_UCVTFv2i64_shift_UCVTFv4f16_UCVTFv4f32_UCVTFv4i16_shift_UCVTFv4i32_shift_UCVTFv8f16_UCVTFv8i16_shift = 281, + FMAXDrr_FMAXHrr_FMAXNMDrr_FMAXNMHrr_FMAXNMSrr_FMAXSrr_FMINDrr_FMINHrr_FMINNMDrr_FMINNMHrr_FMINNMSrr_FMINSrr = 282, + FRINTADr_FRINTAHr_FRINTASr_FRINTIDr_FRINTIHr_FRINTISr_FRINTMDr_FRINTMHr_FRINTMSr_FRINTNDr_FRINTNHr_FRINTNSr_FRINTPDr_FRINTPHr_FRINTPSr_FRINTXDr_FRINTXHr_FRINTXSr_FRINTZDr_FRINTZHr_FRINTZSr = 283, + FSQRTDr = 284, + FSQRTSr = 285, + LDNPDi = 286, + LDNPQi = 287, + LDNPSi = 288, + LDPDi = 289, + LDPDpost = 290, + LDPDpre = 291, + LDPQi = 292, + LDPQpost = 293, + LDPQpre = 294, + LDPSWi = 295, + LDPSWpost = 296, + LDPSWpre = 297, + LDPSi = 298, + LDPSpost = 299, + LDPSpre = 300, + LDRBpost = 301, + LDRBpre = 302, + LDRBroW = 303, + LDRBroX = 304, + LDRBui = 305, + LDRDl = 306, + LDRDpost = 307, + LDRDpre = 308, + LDRDroW = 309, + LDRDroX = 310, + LDRDui = 311, + LDRHHroW = 312, + LDRHHroX = 313, + LDRHpost = 314, + LDRHpre = 315, + LDRHroW = 316, + LDRHroX = 317, + LDRHui = 318, + LDRQl = 319, + LDRQpost = 320, + LDRQpre = 321, + LDRQroW = 322, + LDRQroX = 323, + LDRQui = 324, + LDRSHWroW = 325, + LDRSHWroX = 326, + LDRSHXroW = 327, + LDRSHXroX = 328, + LDRSl = 329, + LDRSpost = 330, + LDRSpre = 331, + LDRSroW = 332, + LDRSroX = 333, + LDRSui = 334, + LDURBi = 335, + LDURDi = 336, + LDURHi = 337, + LDURQi = 338, + LDURSi = 339, + STNPDi = 340, + STNPQi = 341, + STNPXi = 342, + STPDi = 343, + STPDpost = 344, + STPDpre = 345, + STPQi = 346, + STPQpost = 347, + STPQpre = 348, + STPSpost = 349, + STPSpre = 350, + STPWpost = 351, + STPWpre = 352, + STPXi = 353, + STPXpost = 354, + STPXpre = 355, + STRBBpost = 356, + STRBBpre = 357, + STRBpost = 358, + STRBpre = 359, + STRBroW = 360, + STRBroX = 361, + STRDpost = 362, + STRDpre = 363, + STRHHpost = 364, + STRHHpre = 365, + STRHHroW = 366, + STRHHroX = 367, + STRHpost = 368, + STRHpre = 369, + STRHroW = 370, + STRHroX = 371, + STRQpost = 372, + STRQpre = 373, + STRQroW = 374, + STRQroX = 375, + STRQui = 376, + STRSpost = 377, + STRSpre = 378, + STRWpost = 379, + STRWpre = 380, + STRXpost = 381, + STRXpre = 382, + STURQi = 383, + MOVZWi_MOVZXi = 384, + ANDWri_ANDXri = 385, + ORRXrr_ADDXrr = 386, + ISB = 387, + ORRv16i8 = 388, + FMOVSWr_FMOVDXr_FMOVDXHighr = 389, + DUPv16i8lane_DUPv2i32lane_DUPv2i64lane_DUPv4i16lane_DUPv4i32lane_DUPv8i16lane_DUPv8i8lane = 390, + ABSv16i8_ABSv1i64_ABSv2i32_ABSv2i64_ABSv4i16_ABSv4i32_ABSv8i16_ABSv8i8 = 391, + SQABSv16i8_SQABSv1i16_SQABSv1i32_SQABSv1i64_SQABSv1i8_SQABSv2i32_SQABSv2i64_SQABSv4i16_SQABSv4i32_SQABSv8i16_SQABSv8i8_SQNEGv16i8_SQNEGv1i16_SQNEGv1i32_SQNEGv1i64_SQNEGv1i8_SQNEGv2i32_SQNEGv2i64_SQNEGv4i16_SQNEGv4i32_SQNEGv8i16_SQNEGv8i8 = 392, + SADDLPv16i8_v8i16_SADDLPv2i32_v1i64_SADDLPv4i16_v2i32_SADDLPv4i32_v2i64_SADDLPv8i16_v4i32_SADDLPv8i8_v4i16_UADDLPv16i8_v8i16_UADDLPv2i32_v1i64_UADDLPv4i16_v2i32_UADDLPv4i32_v2i64_UADDLPv8i16_v4i32_UADDLPv8i8_v4i16 = 393, + ADDVv16i8v = 394, + ADDVv4i16v_ADDVv8i8v = 395, + ADDVv4i32v_ADDVv8i16v = 396, + SQADDv16i8_SQADDv1i16_SQADDv1i32_SQADDv1i64_SQADDv1i8_SQADDv2i32_SQADDv2i64_SQADDv4i16_SQADDv4i32_SQADDv8i16_SQADDv8i8_SQSUBv16i8_SQSUBv1i16_SQSUBv1i32_SQSUBv1i64_SQSUBv1i8_SQSUBv2i32_SQSUBv2i64_SQSUBv4i16_SQSUBv4i32_SQSUBv8i16_SQSUBv8i8_UQADDv16i8_UQADDv1i16_UQADDv1i32_UQADDv1i64_UQADDv1i8_UQADDv2i32_UQADDv2i64_UQADDv4i16_UQADDv4i32_UQADDv8i16_UQADDv8i8_UQSUBv16i8_UQSUBv1i16_UQSUBv1i32_UQSUBv1i64_UQSUBv1i8_UQSUBv2i32_UQSUBv2i64_UQSUBv4i16_UQSUBv4i32_UQSUBv8i16_UQSUBv8i8 = 397, + SUQADDv16i8_SUQADDv1i16_SUQADDv1i32_SUQADDv1i64_SUQADDv1i8_SUQADDv2i32_SUQADDv2i64_SUQADDv4i16_SUQADDv4i32_SUQADDv8i16_SUQADDv8i8_USQADDv16i8_USQADDv1i16_USQADDv1i32_USQADDv1i64_USQADDv1i8_USQADDv2i32_USQADDv2i64_USQADDv4i16_USQADDv4i32_USQADDv8i16_USQADDv8i8 = 398, + ADDHNv2i64_v2i32_ADDHNv2i64_v4i32_ADDHNv4i32_v4i16_ADDHNv4i32_v8i16_ADDHNv8i16_v16i8_ADDHNv8i16_v8i8_RADDHNv2i64_v2i32_RADDHNv2i64_v4i32_RADDHNv4i32_v4i16_RADDHNv4i32_v8i16_RADDHNv8i16_v16i8_RADDHNv8i16_v8i8_RSUBHNv2i64_v2i32_RSUBHNv2i64_v4i32_RSUBHNv4i32_v4i16_RSUBHNv4i32_v8i16_RSUBHNv8i16_v16i8_RSUBHNv8i16_v8i8_SUBHNv2i64_v2i32_SUBHNv2i64_v4i32_SUBHNv4i32_v4i16_SUBHNv4i32_v8i16_SUBHNv8i16_v16i8_SUBHNv8i16_v8i8 = 399, + CMEQv16i8_CMEQv16i8rz_CMEQv1i64_CMEQv1i64rz_CMEQv2i32_CMEQv2i32rz_CMEQv2i64_CMEQv2i64rz_CMEQv4i16_CMEQv4i16rz_CMEQv4i32_CMEQv4i32rz_CMEQv8i16_CMEQv8i16rz_CMEQv8i8_CMEQv8i8rz_CMGEv16i8_CMGEv16i8rz_CMGEv1i64_CMGEv1i64rz_CMGEv2i32_CMGEv2i32rz_CMGEv2i64_CMGEv2i64rz_CMGEv4i16_CMGEv4i16rz_CMGEv4i32_CMGEv4i32rz_CMGEv8i16_CMGEv8i16rz_CMGEv8i8_CMGEv8i8rz_CMGTv16i8_CMGTv16i8rz_CMGTv1i64_CMGTv1i64rz_CMGTv2i32_CMGTv2i32rz_CMGTv2i64_CMGTv2i64rz_CMGTv4i16_CMGTv4i16rz_CMGTv4i32_CMGTv4i32rz_CMGTv8i16_CMGTv8i16rz_CMGTv8i8_CMGTv8i8rz_CMHIv16i8_CMHIv1i64_CMHIv2i32_CMHIv2i64_CMHIv4i16_CMHIv4i32_CMHIv8i16_CMHIv8i8_CMHSv16i8_CMHSv1i64_CMHSv2i32_CMHSv2i64_CMHSv4i16_CMHSv4i32_CMHSv8i16_CMHSv8i8_CMLEv16i8rz_CMLEv1i64rz_CMLEv2i32rz_CMLEv2i64rz_CMLEv4i16rz_CMLEv4i32rz_CMLEv8i16rz_CMLEv8i8rz_CMLTv16i8rz_CMLTv1i64rz_CMLTv2i32rz_CMLTv2i64rz_CMLTv4i16rz_CMLTv4i32rz_CMLTv8i16rz_CMLTv8i8rz = 400, + SMAXPv16i8_SMAXPv2i32_SMAXPv4i16_SMAXPv4i32_SMAXPv8i16_SMAXPv8i8_SMAXv16i8_SMAXv2i32_SMAXv4i16_SMAXv4i32_SMAXv8i16_SMAXv8i8_SMINPv16i8_SMINPv2i32_SMINPv4i16_SMINPv4i32_SMINPv8i16_SMINPv8i8_SMINv16i8_SMINv2i32_SMINv4i16_SMINv4i32_SMINv8i16_SMINv8i8_UMAXPv16i8_UMAXPv2i32_UMAXPv4i16_UMAXPv4i32_UMAXPv8i16_UMAXPv8i8_UMAXv16i8_UMAXv2i32_UMAXv4i16_UMAXv4i32_UMAXv8i16_UMAXv8i8_UMINPv16i8_UMINPv2i32_UMINPv4i16_UMINPv4i32_UMINPv8i16_UMINPv8i8_UMINv16i8_UMINv2i32_UMINv4i16_UMINv4i32_UMINv8i16_UMINv8i8 = 401, + SABDLv16i8_v8i16_SABDLv2i32_v2i64_SABDLv4i16_v4i32_SABDLv4i32_v2i64_SABDLv8i16_v4i32_SABDLv8i8_v8i16_SABDv16i8_SABDv2i32_SABDv4i16_SABDv4i32_SABDv8i16_SABDv8i8_UABDLv16i8_v8i16_UABDLv2i32_v2i64_UABDLv4i16_v4i32_UABDLv4i32_v2i64_UABDLv8i16_v4i32_UABDLv8i8_v8i16_UABDv16i8_UABDv2i32_UABDv4i16_UABDv4i32_UABDv8i16_UABDv8i8 = 402, + FADDPv2i32p = 403, + FADDPv2i64p = 404, + FMAXNMPv2i16p_FMAXPv2i16p_FMINNMPv2i16p_FMINPv2i16p = 405, + FMAXNMPv2i32p_FMAXPv2i32p_FMINNMPv2i32p_FMINPv2i32p = 406, + FMAXNMPv2i64p_FMAXPv2i64p_FMINNMPv2i64p_FMINPv2i64p = 407, + FADDSrr_FSUBSrr = 408, + FADDv2f32_FSUBv2f32_FABD32_FABDv2f32 = 409, + FADDv4f32_FSUBv4f32_FABDv4f32 = 410, + FADDPv4f32 = 411, + FCMEQ16_FCMEQv1i16rz_FCMEQv4f16_FCMEQv4i16rz_FCMEQv8f16_FCMEQv8i16rz_FCMGT16_FCMGTv1i16rz_FCMGTv4f16_FCMGTv4i16rz_FCMGTv8f16_FCMGTv8i16rz_FCMLEv1i16rz_FCMLEv4i16rz_FCMLEv8i16rz_FCMLTv1i16rz_FCMLTv4i16rz_FCMLTv8i16rz = 412, + FCMEQ32_FCMEQ64_FCMEQv1i32rz_FCMEQv1i64rz_FCMEQv2f32_FCMEQv2i32rz_FCMGT32_FCMGT64_FCMGTv1i32rz_FCMGTv1i64rz_FCMGTv2f32_FCMGTv2i32rz_FCMLEv1i32rz_FCMLEv1i64rz_FCMLEv2i32rz_FCMLTv1i32rz_FCMLTv1i64rz_FCMLTv2i32rz = 413, + FCMEQv2f64_FCMEQv2i64rz_FCMEQv4f32_FCMEQv4i32rz_FCMGTv2f64_FCMGTv2i64rz_FCMGTv4f32_FCMGTv4i32rz_FCMLEv2i64rz_FCMLEv4i32rz_FCMLTv2i64rz_FCMLTv4i32rz = 414, + FACGE16_FACGEv4f16_FACGEv8f16_FACGT16_FACGTv4f16_FACGTv8f16_FMAXNMPv4f16_FMAXNMv4f16_FMAXNMv8f16_FMAXPv4f16_FMAXv4f16_FMAXv8f16_FMINNMPv4f16_FMINNMv4f16_FMINNMv8f16_FMINPv4f16_FMINv4f16_FMINv8f16 = 415, + FACGE32_FACGE64_FACGEv2f32_FACGT32_FACGT64_FACGTv2f32 = 416, + FACGEv2f64_FACGEv4f32_FACGTv2f64_FACGTv4f32 = 417, + FMAXDrr_FMAXNMDrr_FMAXNMSrr_FMAXSrr_FMINDrr_FMINNMDrr_FMINNMSrr_FMINSrr = 418, + SSHRv16i8_shift_SSHRv2i32_shift_SSHRv2i64_shift_SSHRv4i16_shift_SSHRv4i32_shift_SSHRv8i16_shift_SSHRv8i8_shift_USHRv16i8_shift_USHRv2i32_shift_USHRv2i64_shift_USHRv4i16_shift_USHRv4i32_shift_USHRv8i16_shift_USHRv8i8_shift = 419, + SRSHRv16i8_shift_SRSHRv2i32_shift_SRSHRv2i64_shift_SRSHRv4i16_shift_SRSHRv4i32_shift_SRSHRv8i16_shift_SRSHRv8i8_shift_URSHRv16i8_shift_URSHRv2i32_shift_URSHRv2i64_shift_URSHRv4i16_shift_URSHRv4i32_shift_URSHRv8i16_shift_URSHRv8i8_shift = 420, + SRSRAv16i8_shift_SRSRAv2i32_shift_SRSRAv2i64_shift_SRSRAv4i16_shift_SRSRAv4i32_shift_SRSRAv8i16_shift_SRSRAv8i8_shift_SSRAv16i8_shift_SSRAv2i32_shift_SSRAv2i64_shift_SSRAv4i16_shift_SSRAv4i32_shift_SSRAv8i16_shift_SSRAv8i8_shift_URSRAv16i8_shift_URSRAv2i32_shift_URSRAv2i64_shift_URSRAv4i16_shift_URSRAv4i32_shift_URSRAv8i16_shift_URSRAv8i8_shift_USRAv16i8_shift_USRAv2i32_shift_USRAv2i64_shift_USRAv4i16_shift_USRAv4i32_shift_USRAv8i16_shift_USRAv8i8_shift = 421, + SRSHLv16i8_SRSHLv2i64_SRSHLv4i32_SRSHLv8i16_URSHLv16i8_URSHLv2i64_URSHLv4i32_URSHLv8i16 = 422, + SRSHLv1i64_SRSHLv2i32_SRSHLv4i16_SRSHLv8i8_URSHLv1i64_URSHLv2i32_URSHLv4i16_URSHLv8i8 = 423, + SQRSHLv16i8_SQRSHLv2i64_SQRSHLv4i32_SQRSHLv8i16_UQRSHLv16i8_UQRSHLv2i64_UQRSHLv4i32_UQRSHLv8i16 = 424, + SQRSHLv1i16_SQRSHLv1i32_SQRSHLv1i64_SQRSHLv1i8_SQRSHLv2i32_SQRSHLv4i16_SQRSHLv8i8_UQRSHLv1i16_UQRSHLv1i32_UQRSHLv1i64_UQRSHLv1i8_UQRSHLv2i32_UQRSHLv4i16_UQRSHLv8i8 = 425, + RSHRNv16i8_shift_RSHRNv2i32_shift_RSHRNv4i16_shift_RSHRNv4i32_shift_RSHRNv8i16_shift_RSHRNv8i8_shift_SQRSHRNv16i8_shift_SQRSHRNv2i32_shift_SQRSHRNv4i16_shift_SQRSHRNv4i32_shift_SQRSHRNv8i16_shift_SQRSHRNv8i8_shift_SQRSHRUNv16i8_shift_SQRSHRUNv2i32_shift_SQRSHRUNv4i16_shift_SQRSHRUNv4i32_shift_SQRSHRUNv8i16_shift_SQRSHRUNv8i8_shift_SQSHRNv16i8_shift_SQSHRNv2i32_shift_SQSHRNv4i16_shift_SQSHRNv4i32_shift_SQSHRNv8i16_shift_SQSHRNv8i8_shift_SQSHRUNv16i8_shift_SQSHRUNv2i32_shift_SQSHRUNv4i16_shift_SQSHRUNv4i32_shift_SQSHRUNv8i16_shift_SQSHRUNv8i8_shift_UQRSHRNv16i8_shift_UQRSHRNv2i32_shift_UQRSHRNv4i16_shift_UQRSHRNv4i32_shift_UQRSHRNv8i16_shift_UQRSHRNv8i8_shift_UQSHRNv16i8_shift_UQSHRNv2i32_shift_UQSHRNv4i16_shift_UQSHRNv4i32_shift_UQSHRNv8i16_shift_UQSHRNv8i8_shift = 426, + SHRNv16i8_shift_SHRNv2i32_shift_SHRNv4i16_shift_SHRNv4i32_shift_SHRNv8i16_shift_SHRNv8i8_shift = 427, + MULv16i8_MULv4i32_MULv4i32_indexed_MULv8i16_MULv8i16_indexed_SQDMULHv4i32_SQDMULHv4i32_indexed_SQDMULHv8i16_SQDMULHv8i16_indexed_SQRDMULHv4i32_SQRDMULHv4i32_indexed_SQRDMULHv8i16_SQRDMULHv8i16_indexed = 428, + MULv2i32_MULv2i32_indexed_MULv4i16_MULv4i16_indexed_MULv8i8_SQDMULHv1i16_SQDMULHv1i16_indexed_SQDMULHv1i32_SQDMULHv1i32_indexed_SQDMULHv2i32_SQDMULHv2i32_indexed_SQDMULHv4i16_SQDMULHv4i16_indexed_SQRDMULHv1i16_SQRDMULHv1i16_indexed_SQRDMULHv1i32_SQRDMULHv1i32_indexed_SQRDMULHv2i32_SQRDMULHv2i32_indexed_SQRDMULHv4i16_SQRDMULHv4i16_indexed = 429, + SMULLv16i8_v8i16_SMULLv2i32_indexed_SMULLv2i32_v2i64_SMULLv4i16_indexed_SMULLv4i16_v4i32_SMULLv4i32_indexed_SMULLv4i32_v2i64_SMULLv8i16_indexed_SMULLv8i16_v4i32_SMULLv8i8_v8i16_SQDMULLv1i32_indexed_SQDMULLv1i64_indexed_SQDMULLv2i32_indexed_SQDMULLv2i32_v2i64_SQDMULLv4i16_indexed_SQDMULLv4i16_v4i32_SQDMULLv4i32_indexed_SQDMULLv4i32_v2i64_SQDMULLv8i16_indexed_SQDMULLv8i16_v4i32_UMULLv16i8_v8i16_UMULLv2i32_indexed_UMULLv2i32_v2i64_UMULLv4i16_indexed_UMULLv4i16_v4i32_UMULLv4i32_indexed_UMULLv4i32_v2i64_UMULLv8i16_indexed_UMULLv8i16_v4i32_UMULLv8i8_v8i16 = 430, + FMULDrr_FNMULDrr = 431, + FMULv2f64_FMULv2i64_indexed_FMULXv2f64_FMULXv2i64_indexed = 432, + FMULX64 = 433, + FMADDSrrr_FMSUBSrrr_FNMADDSrrr_FNMSUBSrrr = 434, + FMLAv2f32_FMLAv1i32_indexed_FMLAv1i64_indexed_FMLAv2i32_indexed = 435, + FMLAv4f32 = 436, + FMLAv2f64_FMLAv2i64_indexed_FMLSv2f64_FMLSv2i64_indexed = 437, + FRECPEv1f16_FRECPEv4f16_FRECPEv8f16_FRECPXv1f16 = 438, + URSQRTEv2i32 = 439, + URSQRTEv4i32 = 440, + FRSQRTEv1f16_FRSQRTEv4f16_FRSQRTEv8f16 = 441, + FRECPSv2f32 = 442, + FRECPSv4f16_FRECPSv8f16 = 443, + FRSQRTSv2f32 = 444, + FRSQRTSv4f16_FRSQRTSv8f16 = 445, + FCVTSHr_FCVTDHr_FCVTDSr = 446, + FCVTASUWDr_FCVTASUWSr_FCVTASUXDr_FCVTASUXSr_FCVTAUUWDr_FCVTAUUWSr_FCVTAUUXDr_FCVTAUUXSr_FCVTMSUWDr_FCVTMSUWSr_FCVTMSUXDr_FCVTMSUXSr_FCVTMUUWDr_FCVTMUUWSr_FCVTMUUXDr_FCVTMUUXSr_FCVTNSUWDr_FCVTNSUWSr_FCVTNSUXDr_FCVTNSUXSr_FCVTNUUWDr_FCVTNUUWSr_FCVTNUUXDr_FCVTNUUXSr_FCVTPSUWDr_FCVTPSUWSr_FCVTPSUXDr_FCVTPSUXSr_FCVTPUUWDr_FCVTPUUWSr_FCVTPUUXDr_FCVTPUUXSr_FCVTZSSWDri_FCVTZSSWSri_FCVTZSSXDri_FCVTZSSXSri_FCVTZSUWDr_FCVTZSUWSr_FCVTZSUXDr_FCVTZSUXSr_FCVTZUSWDri_FCVTZUSWSri_FCVTZUSXDri_FCVTZUSXSri_FCVTZUUWDr_FCVTZUUWSr_FCVTZUUXDr_FCVTZUUXSr = 447, + SCVTFSWDri_SCVTFSWSri_SCVTFSXDri_SCVTFSXSri_SCVTFUWDri_SCVTFUWSri_SCVTFUXDri_SCVTFUXSri_UCVTFSWDri_UCVTFSWSri_UCVTFSXDri_UCVTFSXSri_UCVTFUWDri_UCVTFUWSri_UCVTFUXDri_UCVTFUXSri = 448, + SHA256SU1rrr = 449, + SCHED_LIST_END = 450 + }; +} // end Sched namespace +} // end AArch64 namespace +} // end llvm namespace +#endif // GET_INSTRINFO_ENUM + +/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ +|* *| +|* Target Instruction Descriptors *| +|* *| +|* Automatically generated file, do not edit! *| +|* *| +\*===----------------------------------------------------------------------===*/ + + +#ifdef GET_INSTRINFO_MC_DESC +#undef GET_INSTRINFO_MC_DESC +namespace llvm_ks { + +static const MCPhysReg ImplicitList1[] = { AArch64::NZCV, 0 }; +static const MCPhysReg ImplicitList2[] = { AArch64::SP, 0 }; +static const MCPhysReg ImplicitList3[] = { AArch64::LR, 0 }; +static const MCPhysReg ImplicitList4[] = { AArch64::LR, AArch64::X0, AArch64::X1, 0 }; + +static const MCOperandInfo OperandInfo2[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; +static const MCOperandInfo OperandInfo3[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; +static const MCOperandInfo OperandInfo4[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; +static const MCOperandInfo OperandInfo5[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, }; +static const MCOperandInfo OperandInfo6[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; +static const MCOperandInfo OperandInfo7[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, }; +static const MCOperandInfo OperandInfo8[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; +static const MCOperandInfo OperandInfo9[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; +static const MCOperandInfo OperandInfo10[] = { { 0, 0|(1<InitMCInstrInfo(AArch64Insts, NULL, NULL, 2849); +} + +} // end llvm namespace +#endif // GET_INSTRINFO_MC_DESC + + +#ifdef GET_INSTRINFO_HEADER +#undef GET_INSTRINFO_HEADER +namespace llvm_ks { +struct AArch64GenInstrInfo : public TargetInstrInfo { + explicit AArch64GenInstrInfo(int CFSetupOpcode = -1, int CFDestroyOpcode = -1, int CatchRetOpcode = -1); + ~AArch64GenInstrInfo() override {} +}; +} // end llvm namespace +#endif // GET_INSTRINFO_HEADER + + +#ifdef GET_INSTRINFO_OPERAND_ENUM +#undef GET_INSTRINFO_OPERAND_ENUM +namespace llvm_ks { +namespace AArch64 { +namespace OpName { +enum { +OPERAND_LAST +}; +} // end namespace OpName +} // end namespace AArch64 +} // end namespace llvm_ks +#endif //GET_INSTRINFO_OPERAND_ENUM +#ifdef GET_INSTRINFO_NAMED_OPS +#undef GET_INSTRINFO_NAMED_OPS +namespace llvm_ks { +namespace AArch64 { +LLVM_READONLY +int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx) { + return -1; +} +} // end namespace AArch64 +} // end namespace llvm_ks +#endif //GET_INSTRINFO_NAMED_OPS + +#ifdef GET_INSTRINFO_OPERAND_TYPES_ENUM +#undef GET_INSTRINFO_OPERAND_TYPES_ENUM +namespace llvm_ks { +namespace AArch64 { +namespace OpTypes { +enum OperandType { + ADDSanonymous_758 = 0, + ADDSanonymous_759 = 1, + ADDanonymous_748 = 2, + ADDanonymous_749 = 3, + SUBSanonymous_758 = 4, + SUBSanonymous_759 = 5, + SUBanonymous_748 = 6, + SUBanonymous_749 = 7, + VectorIndex1 = 8, + VectorIndexB = 9, + VectorIndexD = 10, + VectorIndexH = 11, + VectorIndexS = 12, + addsub_shifted_imm32 = 13, + addsub_shifted_imm32_neg = 14, + addsub_shifted_imm64 = 15, + addsub_shifted_imm64_neg = 16, + adrlabel = 17, + adrplabel = 18, + am_b_target = 19, + am_bl_target = 20, + am_brcond = 21, + am_ldrlit = 22, + am_tbrcond = 23, + anonymous_1025_movimm = 24, + anonymous_1026_movimm = 25, + anonymous_1027_movimm = 26, + anonymous_1028_movimm = 27, + anonymous_1029_movimm = 28, + anonymous_1030_movimm = 29, + anonymous_1031_movimm = 30, + anonymous_1032_movimm = 31, + anonymous_1033_movimm = 32, + anonymous_1034_movimm = 33, + anonymous_1035_movimm = 34, + anonymous_1036_movimm = 35, + arith_extend = 40, + arith_extend64 = 41, + arith_extendlsl64 = 42, + arith_shift32 = 43, + arith_shift64 = 44, + arith_shifted_reg32 = 45, + arith_shifted_reg64 = 46, + barrier_op = 47, + ccode = 48, + f32imm = 49, + f64imm = 50, + fixedpoint_f16_i32 = 51, + fixedpoint_f16_i64 = 52, + fixedpoint_f32_i32 = 53, + fixedpoint_f32_i64 = 54, + fixedpoint_f64_i32 = 55, + fixedpoint_f64_i64 = 56, + fpimm16 = 57, + fpimm32 = 58, + fpimm64 = 59, + fpimm8 = 60, + i16imm = 61, + i1imm = 62, + i32imm = 63, + i32shift_a = 64, + i32shift_b = 65, + i32shift_sext_i16 = 66, + i32shift_sext_i8 = 67, + i64imm = 68, + i64shift_a = 69, + i64shift_b = 70, + i64shift_sext_i16 = 71, + i64shift_sext_i32 = 72, + i64shift_sext_i8 = 73, + i8imm = 74, + imm0_1 = 75, + imm0_127 = 76, + imm0_15 = 77, + imm0_255 = 78, + imm0_31 = 79, + imm0_63 = 80, + imm0_65535 = 81, + imm0_7 = 82, + imm32_0_15 = 83, + imm32_0_31 = 84, + inv_ccode = 85, + logical_imm32 = 86, + logical_imm32_not = 87, + logical_imm64 = 88, + logical_imm64_not = 89, + logical_shift32 = 90, + logical_shift64 = 91, + logical_shifted_reg32 = 92, + logical_shifted_reg64 = 93, + logical_vec_hw_shift = 94, + logical_vec_shift = 95, + maski16_or_more = 96, + maski8_or_more = 97, + move_vec_shift = 98, + movimm32_imm = 99, + movimm32_shift = 100, + movimm64_shift = 101, + movk_symbol_g0 = 102, + movk_symbol_g1 = 103, + movk_symbol_g2 = 104, + movk_symbol_g3 = 105, + movz_symbol_g0 = 106, + movz_symbol_g1 = 107, + movz_symbol_g2 = 108, + movz_symbol_g3 = 109, + mrs_sysreg_op = 110, + msr_sysreg_op = 111, + neg_addsub_shifted_imm32 = 112, + neg_addsub_shifted_imm64 = 113, + prfop = 114, + psbhint_op = 115, + pstatefield1_op = 116, + pstatefield4_op = 117, + ro_Wextend128 = 118, + ro_Wextend16 = 119, + ro_Wextend32 = 120, + ro_Wextend64 = 121, + ro_Wextend8 = 122, + ro_Xextend128 = 123, + ro_Xextend16 = 124, + ro_Xextend32 = 125, + ro_Xextend64 = 126, + ro_Xextend8 = 127, + simdimmtype10 = 128, + simm7s16 = 129, + simm7s4 = 130, + simm7s8 = 131, + simm9 = 132, + simm9_offset_fb128 = 133, + simm9_offset_fb16 = 134, + simm9_offset_fb32 = 135, + simm9_offset_fb64 = 136, + simm9_offset_fb8 = 137, + sys_cr_op = 138, + tbz_imm0_31_diag = 139, + tbz_imm0_31_nodiag = 140, + tbz_imm32_63 = 141, + uimm12s1 = 142, + uimm12s16 = 143, + uimm12s2 = 144, + uimm12s4 = 145, + uimm12s8 = 146, + vecshiftL16 = 147, + vecshiftL32 = 148, + vecshiftL64 = 149, + vecshiftL8 = 150, + vecshiftR16 = 151, + vecshiftR16Narrow = 152, + vecshiftR32 = 153, + vecshiftR32Narrow = 154, + vecshiftR64 = 155, + vecshiftR64Narrow = 156, + vecshiftR8 = 157, + OPERAND_TYPE_LIST_END +}; +} // end namespace OpTypes +} // end namespace AArch64 +} // end namespace llvm_ks +#endif // GET_INSTRINFO_OPERAND_TYPES_ENUM diff --git a/llvm/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc b/llvm/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc new file mode 100644 index 0000000..7b81bfd --- /dev/null +++ b/llvm/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc @@ -0,0 +1,7241 @@ +/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ +|* *| +|* Machine Code Emitter *| +|* *| +|* Automatically generated file, do not edit! *| +|* *| +\*===----------------------------------------------------------------------===*/ + +uint64_t AArch64MCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + static const uint64_t InstBits[] = { + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(1310767104), // ABSv16i8 + UINT64_C(1591785472), // ABSv1i64 + UINT64_C(245413888), // ABSv2i32 + UINT64_C(1323350016), // ABSv2i64 + UINT64_C(241219584), // ABSv4i16 + UINT64_C(1319155712), // ABSv4i32 + UINT64_C(1314961408), // ABSv8i16 + UINT64_C(237025280), // ABSv8i8 + UINT64_C(973078528), // ADCSWr + UINT64_C(3120562176), // ADCSXr + UINT64_C(436207616), // ADCWr + UINT64_C(2583691264), // ADCXr + UINT64_C(245383168), // ADDHNv2i64_v2i32 + UINT64_C(1319124992), // ADDHNv2i64_v4i32 + UINT64_C(241188864), // ADDHNv4i32_v4i16 + UINT64_C(1314930688), // ADDHNv4i32_v8i16 + UINT64_C(1310736384), // ADDHNv8i16_v16i8 + UINT64_C(236994560), // ADDHNv8i16_v8i8 + UINT64_C(1310768128), // ADDPv16i8 + UINT64_C(245414912), // ADDPv2i32 + UINT64_C(1323351040), // ADDPv2i64 + UINT64_C(1592899584), // ADDPv2i64p + UINT64_C(241220608), // ADDPv4i16 + UINT64_C(1319156736), // ADDPv4i32 + UINT64_C(1314962432), // ADDPv8i16 + UINT64_C(237026304), // ADDPv8i8 + UINT64_C(822083584), // ADDSWri + UINT64_C(0), // ADDSWrr + UINT64_C(721420288), // ADDSWrs + UINT64_C(723517440), // ADDSWrx + UINT64_C(2969567232), // ADDSXri + UINT64_C(0), // ADDSXrr + UINT64_C(2868903936), // ADDSXrs + UINT64_C(2871001088), // ADDSXrx + UINT64_C(2871025664), // ADDSXrx64 + UINT64_C(1311881216), // ADDVv16i8v + UINT64_C(242333696), // ADDVv4i16v + UINT64_C(1320269824), // ADDVv4i32v + UINT64_C(1316075520), // ADDVv8i16v + UINT64_C(238139392), // ADDVv8i8v + UINT64_C(285212672), // ADDWri + UINT64_C(0), // ADDWrr + UINT64_C(184549376), // ADDWrs + UINT64_C(186646528), // ADDWrx + UINT64_C(2432696320), // ADDXri + UINT64_C(0), // ADDXrr + UINT64_C(2332033024), // ADDXrs + UINT64_C(2334130176), // ADDXrx + UINT64_C(2334154752), // ADDXrx64 + UINT64_C(1310753792), // ADDv16i8 + UINT64_C(1591772160), // ADDv1i64 + UINT64_C(245400576), // ADDv2i32 + UINT64_C(1323336704), // ADDv2i64 + UINT64_C(241206272), // ADDv4i16 + UINT64_C(1319142400), // ADDv4i32 + UINT64_C(1314948096), // ADDv8i16 + UINT64_C(237011968), // ADDv8i8 + UINT64_C(0), // ADJCALLSTACKDOWN + UINT64_C(0), // ADJCALLSTACKUP + UINT64_C(268435456), // ADR + UINT64_C(2415919104), // ADRP + UINT64_C(1311266816), // AESDrr + UINT64_C(1311262720), // AESErr + UINT64_C(1311275008), // AESIMCrr + UINT64_C(1311270912), // AESMCrr + UINT64_C(1912602624), // ANDSWri + UINT64_C(0), // ANDSWrr + UINT64_C(1778384896), // ANDSWrs + UINT64_C(4060086272), // ANDSXri + UINT64_C(0), // ANDSXrr + UINT64_C(3925868544), // ANDSXrs + UINT64_C(301989888), // ANDWri + UINT64_C(0), // ANDWrr + UINT64_C(167772160), // ANDWrs + UINT64_C(2449473536), // ANDXri + UINT64_C(0), // ANDXrr + UINT64_C(2315255808), // ANDXrs + UINT64_C(1310727168), // ANDv16i8 + UINT64_C(236985344), // ANDv8i8 + UINT64_C(448800768), // ASRVWr + UINT64_C(2596284416), // ASRVXr + UINT64_C(335544320), // B + UINT64_C(855638016), // BFMWri + UINT64_C(3007315968), // BFMXri + UINT64_C(0), // BICSWrr + UINT64_C(1780482048), // BICSWrs + UINT64_C(0), // BICSXrr + UINT64_C(3927965696), // BICSXrs + UINT64_C(0), // BICWrr + UINT64_C(169869312), // BICWrs + UINT64_C(0), // BICXrr + UINT64_C(2317352960), // BICXrs + UINT64_C(1314921472), // BICv16i8 + UINT64_C(788534272), // BICv2i32 + UINT64_C(788567040), // BICv4i16 + UINT64_C(1862276096), // BICv4i32 + UINT64_C(1862308864), // BICv8i16 + UINT64_C(241179648), // BICv8i8 + UINT64_C(1860180992), // BIFv16i8 + UINT64_C(786439168), // BIFv8i8 + UINT64_C(1855986688), // BITv16i8 + UINT64_C(782244864), // BITv8i8 + UINT64_C(2483027968), // BL + UINT64_C(3594452992), // BLR + UINT64_C(3592355840), // BR + UINT64_C(3558866944), // BRK + UINT64_C(1851792384), // BSLv16i8 + UINT64_C(778050560), // BSLv8i8 + UINT64_C(1409286144), // Bcc + UINT64_C(148962304), // CASALb + UINT64_C(3370187776), // CASALd + UINT64_C(1222704128), // CASALh + UINT64_C(2296445952), // CASALs + UINT64_C(148929536), // CASAb + UINT64_C(3370155008), // CASAd + UINT64_C(1222671360), // CASAh + UINT64_C(2296413184), // CASAs + UINT64_C(144768000), // CASLb + UINT64_C(3365993472), // CASLd + UINT64_C(1218509824), // CASLh + UINT64_C(2292251648), // CASLs + UINT64_C(1214315520), // CASPALd + UINT64_C(140573696), // CASPALs + UINT64_C(1214282752), // CASPAd + UINT64_C(140540928), // CASPAs + UINT64_C(1210121216), // CASPLd + UINT64_C(136379392), // CASPLs + UINT64_C(1210088448), // CASPd + UINT64_C(136346624), // CASPs + UINT64_C(144735232), // CASb + UINT64_C(3365960704), // CASd + UINT64_C(1218477056), // CASh + UINT64_C(2292218880), // CASs + UINT64_C(889192448), // CBNZW + UINT64_C(3036676096), // CBNZX + UINT64_C(872415232), // CBZW + UINT64_C(3019898880), // CBZX + UINT64_C(977274880), // CCMNWi + UINT64_C(977272832), // CCMNWr + UINT64_C(3124758528), // CCMNXi + UINT64_C(3124756480), // CCMNXr + UINT64_C(2051016704), // CCMPWi + UINT64_C(2051014656), // CCMPWr + UINT64_C(4198500352), // CCMPXi + UINT64_C(4198498304), // CCMPXr + UINT64_C(3573755999), // CLREX + UINT64_C(1522537472), // CLSWr + UINT64_C(3670021120), // CLSXr + UINT64_C(1310738432), // CLSv16i8 + UINT64_C(245385216), // CLSv2i32 + UINT64_C(241190912), // CLSv4i16 + UINT64_C(1319127040), // CLSv4i32 + UINT64_C(1314932736), // CLSv8i16 + UINT64_C(236996608), // CLSv8i8 + UINT64_C(1522536448), // CLZWr + UINT64_C(3670020096), // CLZXr + UINT64_C(1847609344), // CLZv16i8 + UINT64_C(782256128), // CLZv2i32 + UINT64_C(778061824), // CLZv4i16 + UINT64_C(1855997952), // CLZv4i32 + UINT64_C(1851803648), // CLZv8i16 + UINT64_C(773867520), // CLZv8i8 + UINT64_C(1847626752), // CMEQv16i8 + UINT64_C(1310758912), // CMEQv16i8rz + UINT64_C(2128645120), // CMEQv1i64 + UINT64_C(1591777280), // CMEQv1i64rz + UINT64_C(782273536), // CMEQv2i32 + UINT64_C(245405696), // CMEQv2i32rz + UINT64_C(1860209664), // CMEQv2i64 + UINT64_C(1323341824), // CMEQv2i64rz + UINT64_C(778079232), // CMEQv4i16 + UINT64_C(241211392), // CMEQv4i16rz + UINT64_C(1856015360), // CMEQv4i32 + UINT64_C(1319147520), // CMEQv4i32rz + UINT64_C(1851821056), // CMEQv8i16 + UINT64_C(1314953216), // CMEQv8i16rz + UINT64_C(773884928), // CMEQv8i8 + UINT64_C(237017088), // CMEQv8i8rz + UINT64_C(1310735360), // CMGEv16i8 + UINT64_C(1847625728), // CMGEv16i8rz + UINT64_C(1591753728), // CMGEv1i64 + UINT64_C(2128644096), // CMGEv1i64rz + UINT64_C(245382144), // CMGEv2i32 + UINT64_C(782272512), // CMGEv2i32rz + UINT64_C(1323318272), // CMGEv2i64 + UINT64_C(1860208640), // CMGEv2i64rz + UINT64_C(241187840), // CMGEv4i16 + UINT64_C(778078208), // CMGEv4i16rz + UINT64_C(1319123968), // CMGEv4i32 + UINT64_C(1856014336), // CMGEv4i32rz + UINT64_C(1314929664), // CMGEv8i16 + UINT64_C(1851820032), // CMGEv8i16rz + UINT64_C(236993536), // CMGEv8i8 + UINT64_C(773883904), // CMGEv8i8rz + UINT64_C(1310733312), // CMGTv16i8 + UINT64_C(1310754816), // CMGTv16i8rz + UINT64_C(1591751680), // CMGTv1i64 + UINT64_C(1591773184), // CMGTv1i64rz + UINT64_C(245380096), // CMGTv2i32 + UINT64_C(245401600), // CMGTv2i32rz + UINT64_C(1323316224), // CMGTv2i64 + UINT64_C(1323337728), // CMGTv2i64rz + UINT64_C(241185792), // CMGTv4i16 + UINT64_C(241207296), // CMGTv4i16rz + UINT64_C(1319121920), // CMGTv4i32 + UINT64_C(1319143424), // CMGTv4i32rz + UINT64_C(1314927616), // CMGTv8i16 + UINT64_C(1314949120), // CMGTv8i16rz + UINT64_C(236991488), // CMGTv8i8 + UINT64_C(237012992), // CMGTv8i8rz + UINT64_C(1847604224), // CMHIv16i8 + UINT64_C(2128622592), // CMHIv1i64 + UINT64_C(782251008), // CMHIv2i32 + UINT64_C(1860187136), // CMHIv2i64 + UINT64_C(778056704), // CMHIv4i16 + UINT64_C(1855992832), // CMHIv4i32 + UINT64_C(1851798528), // CMHIv8i16 + UINT64_C(773862400), // CMHIv8i8 + UINT64_C(1847606272), // CMHSv16i8 + UINT64_C(2128624640), // CMHSv1i64 + UINT64_C(782253056), // CMHSv2i32 + UINT64_C(1860189184), // CMHSv2i64 + UINT64_C(778058752), // CMHSv4i16 + UINT64_C(1855994880), // CMHSv4i32 + UINT64_C(1851800576), // CMHSv8i16 + UINT64_C(773864448), // CMHSv8i8 + UINT64_C(1847629824), // CMLEv16i8rz + UINT64_C(2128648192), // CMLEv1i64rz + UINT64_C(782276608), // CMLEv2i32rz + UINT64_C(1860212736), // CMLEv2i64rz + UINT64_C(778082304), // CMLEv4i16rz + UINT64_C(1856018432), // CMLEv4i32rz + UINT64_C(1851824128), // CMLEv8i16rz + UINT64_C(773888000), // CMLEv8i8rz + UINT64_C(1310763008), // CMLTv16i8rz + UINT64_C(1591781376), // CMLTv1i64rz + UINT64_C(245409792), // CMLTv2i32rz + UINT64_C(1323345920), // CMLTv2i64rz + UINT64_C(241215488), // CMLTv4i16rz + UINT64_C(1319151616), // CMLTv4i32rz + UINT64_C(1314957312), // CMLTv8i16rz + UINT64_C(237021184), // CMLTv8i8rz + UINT64_C(1310755840), // CMTSTv16i8 + UINT64_C(1591774208), // CMTSTv1i64 + UINT64_C(245402624), // CMTSTv2i32 + UINT64_C(1323338752), // CMTSTv2i64 + UINT64_C(241208320), // CMTSTv4i16 + UINT64_C(1319144448), // CMTSTv4i32 + UINT64_C(1314950144), // CMTSTv8i16 + UINT64_C(237014016), // CMTSTv8i8 + UINT64_C(1310742528), // CNTv16i8 + UINT64_C(237000704), // CNTv8i8 + UINT64_C(1577190400), // CPYi16 + UINT64_C(1577321472), // CPYi32 + UINT64_C(1577583616), // CPYi64 + UINT64_C(1577124864), // CPYi8 + UINT64_C(448806912), // CRC32Brr + UINT64_C(448811008), // CRC32CBrr + UINT64_C(448812032), // CRC32CHrr + UINT64_C(448813056), // CRC32CWrr + UINT64_C(2596297728), // CRC32CXrr + UINT64_C(448807936), // CRC32Hrr + UINT64_C(448808960), // CRC32Wrr + UINT64_C(2596293632), // CRC32Xrr + UINT64_C(444596224), // CSELWr + UINT64_C(2592079872), // CSELXr + UINT64_C(444597248), // CSINCWr + UINT64_C(2592080896), // CSINCXr + UINT64_C(1518338048), // CSINVWr + UINT64_C(3665821696), // CSINVXr + UINT64_C(1518339072), // CSNEGWr + UINT64_C(3665822720), // CSNEGXr + UINT64_C(3567255553), // DCPS1 + UINT64_C(3567255554), // DCPS2 + UINT64_C(3567255555), // DCPS3 + UINT64_C(3573756095), // DMB + UINT64_C(3602842592), // DRPS + UINT64_C(3573756063), // DSB + UINT64_C(1308691456), // DUPv16i8gpr + UINT64_C(1308689408), // DUPv16i8lane + UINT64_C(235146240), // DUPv2i32gpr + UINT64_C(235144192), // DUPv2i32lane + UINT64_C(1309150208), // DUPv2i64gpr + UINT64_C(1309148160), // DUPv2i64lane + UINT64_C(235015168), // DUPv4i16gpr + UINT64_C(235013120), // DUPv4i16lane + UINT64_C(1308888064), // DUPv4i32gpr + UINT64_C(1308886016), // DUPv4i32lane + UINT64_C(1308756992), // DUPv8i16gpr + UINT64_C(1308754944), // DUPv8i16lane + UINT64_C(234949632), // DUPv8i8gpr + UINT64_C(234947584), // DUPv8i8lane + UINT64_C(0), // EONWrr + UINT64_C(1243611136), // EONWrs + UINT64_C(0), // EONXrr + UINT64_C(3391094784), // EONXrs + UINT64_C(1375731712), // EORWri + UINT64_C(0), // EORWrr + UINT64_C(1241513984), // EORWrs + UINT64_C(3523215360), // EORXri + UINT64_C(0), // EORXrr + UINT64_C(3388997632), // EORXrs + UINT64_C(1847598080), // EORv16i8 + UINT64_C(773856256), // EORv8i8 + UINT64_C(3600745440), // ERET + UINT64_C(327155712), // EXTRWrri + UINT64_C(2478833664), // EXTRXrri + UINT64_C(1845493760), // EXTv16i8 + UINT64_C(771751936), // EXTv8i8 + UINT64_C(0), // F128CSEL + UINT64_C(2126517248), // FABD16 + UINT64_C(2124469248), // FABD32 + UINT64_C(2128663552), // FABD64 + UINT64_C(782291968), // FABDv2f32 + UINT64_C(1860228096), // FABDv2f64 + UINT64_C(784339968), // FABDv4f16 + UINT64_C(1856033792), // FABDv4f32 + UINT64_C(1858081792), // FABDv8f16 + UINT64_C(509657088), // FABSDr + UINT64_C(518045696), // FABSHr + UINT64_C(505462784), // FABSSr + UINT64_C(245430272), // FABSv2f32 + UINT64_C(1323366400), // FABSv2f64 + UINT64_C(251197440), // FABSv4f16 + UINT64_C(1319172096), // FABSv4f32 + UINT64_C(1324939264), // FABSv8f16 + UINT64_C(2118134784), // FACGE16 + UINT64_C(2116086784), // FACGE32 + UINT64_C(2120281088), // FACGE64 + UINT64_C(773909504), // FACGEv2f32 + UINT64_C(1851845632), // FACGEv2f64 + UINT64_C(775957504), // FACGEv4f16 + UINT64_C(1847651328), // FACGEv4f32 + UINT64_C(1849699328), // FACGEv8f16 + UINT64_C(2126523392), // FACGT16 + UINT64_C(2124475392), // FACGT32 + UINT64_C(2128669696), // FACGT64 + UINT64_C(782298112), // FACGTv2f32 + UINT64_C(1860234240), // FACGTv2f64 + UINT64_C(784346112), // FACGTv4f16 + UINT64_C(1856039936), // FACGTv4f32 + UINT64_C(1858087936), // FACGTv8f16 + UINT64_C(509618176), // FADDDrr + UINT64_C(518006784), // FADDHrr + UINT64_C(773903360), // FADDPv2f32 + UINT64_C(1851839488), // FADDPv2f64 + UINT64_C(1580259328), // FADDPv2i16p + UINT64_C(2117130240), // FADDPv2i32p + UINT64_C(2121324544), // FADDPv2i64p + UINT64_C(775951360), // FADDPv4f16 + UINT64_C(1847645184), // FADDPv4f32 + UINT64_C(1849693184), // FADDPv8f16 + UINT64_C(505423872), // FADDSrr + UINT64_C(237032448), // FADDv2f32 + UINT64_C(1314968576), // FADDv2f64 + UINT64_C(239080448), // FADDv4f16 + UINT64_C(1310774272), // FADDv4f32 + UINT64_C(1312822272), // FADDv8f16 + UINT64_C(509608960), // FCCMPDrr + UINT64_C(509608976), // FCCMPEDrr + UINT64_C(517997584), // FCCMPEHrr + UINT64_C(505414672), // FCCMPESrr + UINT64_C(517997568), // FCCMPHrr + UINT64_C(505414656), // FCCMPSrr + UINT64_C(1581261824), // FCMEQ16 + UINT64_C(1579213824), // FCMEQ32 + UINT64_C(1583408128), // FCMEQ64 + UINT64_C(1593366528), // FCMEQv1i16rz + UINT64_C(1587599360), // FCMEQv1i32rz + UINT64_C(1591793664), // FCMEQv1i64rz + UINT64_C(237036544), // FCMEQv2f32 + UINT64_C(1314972672), // FCMEQv2f64 + UINT64_C(245422080), // FCMEQv2i32rz + UINT64_C(1323358208), // FCMEQv2i64rz + UINT64_C(239084544), // FCMEQv4f16 + UINT64_C(1310778368), // FCMEQv4f32 + UINT64_C(251189248), // FCMEQv4i16rz + UINT64_C(1319163904), // FCMEQv4i32rz + UINT64_C(1312826368), // FCMEQv8f16 + UINT64_C(1324931072), // FCMEQv8i16rz + UINT64_C(2118132736), // FCMGE16 + UINT64_C(2116084736), // FCMGE32 + UINT64_C(2120279040), // FCMGE64 + UINT64_C(2130233344), // FCMGEv1i16rz + UINT64_C(2124466176), // FCMGEv1i32rz + UINT64_C(2128660480), // FCMGEv1i64rz + UINT64_C(773907456), // FCMGEv2f32 + UINT64_C(1851843584), // FCMGEv2f64 + UINT64_C(782288896), // FCMGEv2i32rz + UINT64_C(1860225024), // FCMGEv2i64rz + UINT64_C(775955456), // FCMGEv4f16 + UINT64_C(1847649280), // FCMGEv4f32 + UINT64_C(788056064), // FCMGEv4i16rz + UINT64_C(1856030720), // FCMGEv4i32rz + UINT64_C(1849697280), // FCMGEv8f16 + UINT64_C(1861797888), // FCMGEv8i16rz + UINT64_C(2126521344), // FCMGT16 + UINT64_C(2124473344), // FCMGT32 + UINT64_C(2128667648), // FCMGT64 + UINT64_C(1593362432), // FCMGTv1i16rz + UINT64_C(1587595264), // FCMGTv1i32rz + UINT64_C(1591789568), // FCMGTv1i64rz + UINT64_C(782296064), // FCMGTv2f32 + UINT64_C(1860232192), // FCMGTv2f64 + UINT64_C(245417984), // FCMGTv2i32rz + UINT64_C(1323354112), // FCMGTv2i64rz + UINT64_C(784344064), // FCMGTv4f16 + UINT64_C(1856037888), // FCMGTv4f32 + UINT64_C(251185152), // FCMGTv4i16rz + UINT64_C(1319159808), // FCMGTv4i32rz + UINT64_C(1858085888), // FCMGTv8f16 + UINT64_C(1324926976), // FCMGTv8i16rz + UINT64_C(2130237440), // FCMLEv1i16rz + UINT64_C(2124470272), // FCMLEv1i32rz + UINT64_C(2128664576), // FCMLEv1i64rz + UINT64_C(782292992), // FCMLEv2i32rz + UINT64_C(1860229120), // FCMLEv2i64rz + UINT64_C(788060160), // FCMLEv4i16rz + UINT64_C(1856034816), // FCMLEv4i32rz + UINT64_C(1861801984), // FCMLEv8i16rz + UINT64_C(1593370624), // FCMLTv1i16rz + UINT64_C(1587603456), // FCMLTv1i32rz + UINT64_C(1591797760), // FCMLTv1i64rz + UINT64_C(245426176), // FCMLTv2i32rz + UINT64_C(1323362304), // FCMLTv2i64rz + UINT64_C(251193344), // FCMLTv4i16rz + UINT64_C(1319168000), // FCMLTv4i32rz + UINT64_C(1324935168), // FCMLTv8i16rz + UINT64_C(509616136), // FCMPDri + UINT64_C(509616128), // FCMPDrr + UINT64_C(509616152), // FCMPEDri + UINT64_C(509616144), // FCMPEDrr + UINT64_C(518004760), // FCMPEHri + UINT64_C(518004752), // FCMPEHrr + UINT64_C(505421848), // FCMPESri + UINT64_C(505421840), // FCMPESrr + UINT64_C(518004744), // FCMPHri + UINT64_C(518004736), // FCMPHrr + UINT64_C(505421832), // FCMPSri + UINT64_C(505421824), // FCMPSrr + UINT64_C(509611008), // FCSELDrrr + UINT64_C(517999616), // FCSELHrrr + UINT64_C(505416704), // FCSELSrrr + UINT64_C(509870080), // FCVTASUWDr + UINT64_C(518258688), // FCVTASUWHr + UINT64_C(505675776), // FCVTASUWSr + UINT64_C(2657353728), // FCVTASUXDr + UINT64_C(2665742336), // FCVTASUXHr + UINT64_C(2653159424), // FCVTASUXSr + UINT64_C(1585039360), // FCVTASv1f16 + UINT64_C(1579272192), // FCVTASv1i32 + UINT64_C(1583466496), // FCVTASv1i64 + UINT64_C(237094912), // FCVTASv2f32 + UINT64_C(1315031040), // FCVTASv2f64 + UINT64_C(242862080), // FCVTASv4f16 + UINT64_C(1310836736), // FCVTASv4f32 + UINT64_C(1316603904), // FCVTASv8f16 + UINT64_C(509935616), // FCVTAUUWDr + UINT64_C(518324224), // FCVTAUUWHr + UINT64_C(505741312), // FCVTAUUWSr + UINT64_C(2657419264), // FCVTAUUXDr + UINT64_C(2665807872), // FCVTAUUXHr + UINT64_C(2653224960), // FCVTAUUXSr + UINT64_C(2121910272), // FCVTAUv1f16 + UINT64_C(2116143104), // FCVTAUv1i32 + UINT64_C(2120337408), // FCVTAUv1i64 + UINT64_C(773965824), // FCVTAUv2f32 + UINT64_C(1851901952), // FCVTAUv2f64 + UINT64_C(779732992), // FCVTAUv4f16 + UINT64_C(1847707648), // FCVTAUv4f32 + UINT64_C(1853474816), // FCVTAUv8f16 + UINT64_C(518176768), // FCVTDHr + UINT64_C(505593856), // FCVTDSr + UINT64_C(509853696), // FCVTHDr + UINT64_C(505659392), // FCVTHSr + UINT64_C(241268736), // FCVTLv2i32 + UINT64_C(237074432), // FCVTLv4i16 + UINT64_C(1315010560), // FCVTLv4i32 + UINT64_C(1310816256), // FCVTLv8i16 + UINT64_C(510656512), // FCVTMSUWDr + UINT64_C(519045120), // FCVTMSUWHr + UINT64_C(506462208), // FCVTMSUWSr + UINT64_C(2658140160), // FCVTMSUXDr + UINT64_C(2666528768), // FCVTMSUXHr + UINT64_C(2653945856), // FCVTMSUXSr + UINT64_C(1585035264), // FCVTMSv1f16 + UINT64_C(1579268096), // FCVTMSv1i32 + UINT64_C(1583462400), // FCVTMSv1i64 + UINT64_C(237090816), // FCVTMSv2f32 + UINT64_C(1315026944), // FCVTMSv2f64 + UINT64_C(242857984), // FCVTMSv4f16 + UINT64_C(1310832640), // FCVTMSv4f32 + UINT64_C(1316599808), // FCVTMSv8f16 + UINT64_C(510722048), // FCVTMUUWDr + UINT64_C(519110656), // FCVTMUUWHr + UINT64_C(506527744), // FCVTMUUWSr + UINT64_C(2658205696), // FCVTMUUXDr + UINT64_C(2666594304), // FCVTMUUXHr + UINT64_C(2654011392), // FCVTMUUXSr + UINT64_C(2121906176), // FCVTMUv1f16 + UINT64_C(2116139008), // FCVTMUv1i32 + UINT64_C(2120333312), // FCVTMUv1i64 + UINT64_C(773961728), // FCVTMUv2f32 + UINT64_C(1851897856), // FCVTMUv2f64 + UINT64_C(779728896), // FCVTMUv4f16 + UINT64_C(1847703552), // FCVTMUv4f32 + UINT64_C(1853470720), // FCVTMUv8f16 + UINT64_C(509607936), // FCVTNSUWDr + UINT64_C(517996544), // FCVTNSUWHr + UINT64_C(505413632), // FCVTNSUWSr + UINT64_C(2657091584), // FCVTNSUXDr + UINT64_C(2665480192), // FCVTNSUXHr + UINT64_C(2652897280), // FCVTNSUXSr + UINT64_C(1585031168), // FCVTNSv1f16 + UINT64_C(1579264000), // FCVTNSv1i32 + UINT64_C(1583458304), // FCVTNSv1i64 + UINT64_C(237086720), // FCVTNSv2f32 + UINT64_C(1315022848), // FCVTNSv2f64 + UINT64_C(242853888), // FCVTNSv4f16 + UINT64_C(1310828544), // FCVTNSv4f32 + UINT64_C(1316595712), // FCVTNSv8f16 + UINT64_C(509673472), // FCVTNUUWDr + UINT64_C(518062080), // FCVTNUUWHr + UINT64_C(505479168), // FCVTNUUWSr + UINT64_C(2657157120), // FCVTNUUXDr + UINT64_C(2665545728), // FCVTNUUXHr + UINT64_C(2652962816), // FCVTNUUXSr + UINT64_C(2121902080), // FCVTNUv1f16 + UINT64_C(2116134912), // FCVTNUv1i32 + UINT64_C(2120329216), // FCVTNUv1i64 + UINT64_C(773957632), // FCVTNUv2f32 + UINT64_C(1851893760), // FCVTNUv2f64 + UINT64_C(779724800), // FCVTNUv4f16 + UINT64_C(1847699456), // FCVTNUv4f32 + UINT64_C(1853466624), // FCVTNUv8f16 + UINT64_C(241264640), // FCVTNv2i32 + UINT64_C(237070336), // FCVTNv4i16 + UINT64_C(1315006464), // FCVTNv4i32 + UINT64_C(1310812160), // FCVTNv8i16 + UINT64_C(510132224), // FCVTPSUWDr + UINT64_C(518520832), // FCVTPSUWHr + UINT64_C(505937920), // FCVTPSUWSr + UINT64_C(2657615872), // FCVTPSUXDr + UINT64_C(2666004480), // FCVTPSUXHr + UINT64_C(2653421568), // FCVTPSUXSr + UINT64_C(1593419776), // FCVTPSv1f16 + UINT64_C(1587652608), // FCVTPSv1i32 + UINT64_C(1591846912), // FCVTPSv1i64 + UINT64_C(245475328), // FCVTPSv2f32 + UINT64_C(1323411456), // FCVTPSv2f64 + UINT64_C(251242496), // FCVTPSv4f16 + UINT64_C(1319217152), // FCVTPSv4f32 + UINT64_C(1324984320), // FCVTPSv8f16 + UINT64_C(510197760), // FCVTPUUWDr + UINT64_C(518586368), // FCVTPUUWHr + UINT64_C(506003456), // FCVTPUUWSr + UINT64_C(2657681408), // FCVTPUUXDr + UINT64_C(2666070016), // FCVTPUUXHr + UINT64_C(2653487104), // FCVTPUUXSr + UINT64_C(2130290688), // FCVTPUv1f16 + UINT64_C(2124523520), // FCVTPUv1i32 + UINT64_C(2128717824), // FCVTPUv1i64 + UINT64_C(782346240), // FCVTPUv2f32 + UINT64_C(1860282368), // FCVTPUv2f64 + UINT64_C(788113408), // FCVTPUv4f16 + UINT64_C(1856088064), // FCVTPUv4f32 + UINT64_C(1861855232), // FCVTPUv8f16 + UINT64_C(509755392), // FCVTSDr + UINT64_C(518144000), // FCVTSHr + UINT64_C(2120312832), // FCVTXNv1i64 + UINT64_C(778135552), // FCVTXNv2f32 + UINT64_C(1851877376), // FCVTXNv4f32 + UINT64_C(509116416), // FCVTZSSWDri + UINT64_C(517505024), // FCVTZSSWHri + UINT64_C(504922112), // FCVTZSSWSri + UINT64_C(2656567296), // FCVTZSSXDri + UINT64_C(2664955904), // FCVTZSSXHri + UINT64_C(2652372992), // FCVTZSSXSri + UINT64_C(511180800), // FCVTZSUWDr + UINT64_C(519569408), // FCVTZSUWHr + UINT64_C(506986496), // FCVTZSUWSr + UINT64_C(2658664448), // FCVTZSUXDr + UINT64_C(2667053056), // FCVTZSUXHr + UINT64_C(2654470144), // FCVTZSUXSr + UINT64_C(509116416), // FCVTZS_IntSWDri + UINT64_C(517505024), // FCVTZS_IntSWHri + UINT64_C(504922112), // FCVTZS_IntSWSri + UINT64_C(2656567296), // FCVTZS_IntSXDri + UINT64_C(2664955904), // FCVTZS_IntSXHri + UINT64_C(2652372992), // FCVTZS_IntSXSri + UINT64_C(511180800), // FCVTZS_IntUWDr + UINT64_C(519569408), // FCVTZS_IntUWHr + UINT64_C(506986496), // FCVTZS_IntUWSr + UINT64_C(2658664448), // FCVTZS_IntUXDr + UINT64_C(2667053056), // FCVTZS_IntUXHr + UINT64_C(2654470144), // FCVTZS_IntUXSr + UINT64_C(245479424), // FCVTZS_Intv2f32 + UINT64_C(1323415552), // FCVTZS_Intv2f64 + UINT64_C(251246592), // FCVTZS_Intv4f16 + UINT64_C(1319221248), // FCVTZS_Intv4f32 + UINT64_C(1324988416), // FCVTZS_Intv8f16 + UINT64_C(1598094336), // FCVTZSd + UINT64_C(1594948608), // FCVTZSh + UINT64_C(1595997184), // FCVTZSs + UINT64_C(1593423872), // FCVTZSv1f16 + UINT64_C(1587656704), // FCVTZSv1i32 + UINT64_C(1591851008), // FCVTZSv1i64 + UINT64_C(245479424), // FCVTZSv2f32 + UINT64_C(1323415552), // FCVTZSv2f64 + UINT64_C(253819904), // FCVTZSv2i32_shift + UINT64_C(1329658880), // FCVTZSv2i64_shift + UINT64_C(251246592), // FCVTZSv4f16 + UINT64_C(1319221248), // FCVTZSv4f32 + UINT64_C(252771328), // FCVTZSv4i16_shift + UINT64_C(1327561728), // FCVTZSv4i32_shift + UINT64_C(1324988416), // FCVTZSv8f16 + UINT64_C(1326513152), // FCVTZSv8i16_shift + UINT64_C(509181952), // FCVTZUSWDri + UINT64_C(517570560), // FCVTZUSWHri + UINT64_C(504987648), // FCVTZUSWSri + UINT64_C(2656632832), // FCVTZUSXDri + UINT64_C(2665021440), // FCVTZUSXHri + UINT64_C(2652438528), // FCVTZUSXSri + UINT64_C(511246336), // FCVTZUUWDr + UINT64_C(519634944), // FCVTZUUWHr + UINT64_C(507052032), // FCVTZUUWSr + UINT64_C(2658729984), // FCVTZUUXDr + UINT64_C(2667118592), // FCVTZUUXHr + UINT64_C(2654535680), // FCVTZUUXSr + UINT64_C(509181952), // FCVTZU_IntSWDri + UINT64_C(517570560), // FCVTZU_IntSWHri + UINT64_C(504987648), // FCVTZU_IntSWSri + UINT64_C(2656632832), // FCVTZU_IntSXDri + UINT64_C(2665021440), // FCVTZU_IntSXHri + UINT64_C(2652438528), // FCVTZU_IntSXSri + UINT64_C(511246336), // FCVTZU_IntUWDr + UINT64_C(519634944), // FCVTZU_IntUWHr + UINT64_C(507052032), // FCVTZU_IntUWSr + UINT64_C(2658729984), // FCVTZU_IntUXDr + UINT64_C(2667118592), // FCVTZU_IntUXHr + UINT64_C(2654535680), // FCVTZU_IntUXSr + UINT64_C(782350336), // FCVTZU_Intv2f32 + UINT64_C(1860286464), // FCVTZU_Intv2f64 + UINT64_C(788117504), // FCVTZU_Intv4f16 + UINT64_C(1856092160), // FCVTZU_Intv4f32 + UINT64_C(1861859328), // FCVTZU_Intv8f16 + UINT64_C(2134965248), // FCVTZUd + UINT64_C(2131819520), // FCVTZUh + UINT64_C(2132868096), // FCVTZUs + UINT64_C(2130294784), // FCVTZUv1f16 + UINT64_C(2124527616), // FCVTZUv1i32 + UINT64_C(2128721920), // FCVTZUv1i64 + UINT64_C(782350336), // FCVTZUv2f32 + UINT64_C(1860286464), // FCVTZUv2f64 + UINT64_C(790690816), // FCVTZUv2i32_shift + UINT64_C(1866529792), // FCVTZUv2i64_shift + UINT64_C(788117504), // FCVTZUv4f16 + UINT64_C(1856092160), // FCVTZUv4f32 + UINT64_C(789642240), // FCVTZUv4i16_shift + UINT64_C(1864432640), // FCVTZUv4i32_shift + UINT64_C(1861859328), // FCVTZUv8f16 + UINT64_C(1863384064), // FCVTZUv8i16_shift + UINT64_C(509614080), // FDIVDrr + UINT64_C(518002688), // FDIVHrr + UINT64_C(505419776), // FDIVSrr + UINT64_C(773913600), // FDIVv2f32 + UINT64_C(1851849728), // FDIVv2f64 + UINT64_C(775961600), // FDIVv4f16 + UINT64_C(1847655424), // FDIVv4f32 + UINT64_C(1849703424), // FDIVv8f16 + UINT64_C(524288000), // FMADDDrrr + UINT64_C(532676608), // FMADDHrrr + UINT64_C(520093696), // FMADDSrrr + UINT64_C(509626368), // FMAXDrr + UINT64_C(518014976), // FMAXHrr + UINT64_C(509634560), // FMAXNMDrr + UINT64_C(518023168), // FMAXNMHrr + UINT64_C(773899264), // FMAXNMPv2f32 + UINT64_C(1851835392), // FMAXNMPv2f64 + UINT64_C(1580255232), // FMAXNMPv2i16p + UINT64_C(2117126144), // FMAXNMPv2i32p + UINT64_C(2121320448), // FMAXNMPv2i64p + UINT64_C(775947264), // FMAXNMPv4f16 + UINT64_C(1847641088), // FMAXNMPv4f32 + UINT64_C(1849689088), // FMAXNMPv8f16 + UINT64_C(505440256), // FMAXNMSrr + UINT64_C(238077952), // FMAXNMVv4i16v + UINT64_C(1848690688), // FMAXNMVv4i32v + UINT64_C(1311819776), // FMAXNMVv8i16v + UINT64_C(237028352), // FMAXNMv2f32 + UINT64_C(1314964480), // FMAXNMv2f64 + UINT64_C(239076352), // FMAXNMv4f16 + UINT64_C(1310770176), // FMAXNMv4f32 + UINT64_C(1312818176), // FMAXNMv8f16 + UINT64_C(773911552), // FMAXPv2f32 + UINT64_C(1851847680), // FMAXPv2f64 + UINT64_C(1580267520), // FMAXPv2i16p + UINT64_C(2117138432), // FMAXPv2i32p + UINT64_C(2121332736), // FMAXPv2i64p + UINT64_C(775959552), // FMAXPv4f16 + UINT64_C(1847653376), // FMAXPv4f32 + UINT64_C(1849701376), // FMAXPv8f16 + UINT64_C(505432064), // FMAXSrr + UINT64_C(238090240), // FMAXVv4i16v + UINT64_C(1848702976), // FMAXVv4i32v + UINT64_C(1311832064), // FMAXVv8i16v + UINT64_C(237040640), // FMAXv2f32 + UINT64_C(1314976768), // FMAXv2f64 + UINT64_C(239088640), // FMAXv4f16 + UINT64_C(1310782464), // FMAXv4f32 + UINT64_C(1312830464), // FMAXv8f16 + UINT64_C(509630464), // FMINDrr + UINT64_C(518019072), // FMINHrr + UINT64_C(509638656), // FMINNMDrr + UINT64_C(518027264), // FMINNMHrr + UINT64_C(782287872), // FMINNMPv2f32 + UINT64_C(1860224000), // FMINNMPv2f64 + UINT64_C(1588643840), // FMINNMPv2i16p + UINT64_C(2125514752), // FMINNMPv2i32p + UINT64_C(2129709056), // FMINNMPv2i64p + UINT64_C(784335872), // FMINNMPv4f16 + UINT64_C(1856029696), // FMINNMPv4f32 + UINT64_C(1858077696), // FMINNMPv8f16 + UINT64_C(505444352), // FMINNMSrr + UINT64_C(246466560), // FMINNMVv4i16v + UINT64_C(1857079296), // FMINNMVv4i32v + UINT64_C(1320208384), // FMINNMVv8i16v + UINT64_C(245416960), // FMINNMv2f32 + UINT64_C(1323353088), // FMINNMv2f64 + UINT64_C(247464960), // FMINNMv4f16 + UINT64_C(1319158784), // FMINNMv4f32 + UINT64_C(1321206784), // FMINNMv8f16 + UINT64_C(782300160), // FMINPv2f32 + UINT64_C(1860236288), // FMINPv2f64 + UINT64_C(1588656128), // FMINPv2i16p + UINT64_C(2125527040), // FMINPv2i32p + UINT64_C(2129721344), // FMINPv2i64p + UINT64_C(784348160), // FMINPv4f16 + UINT64_C(1856041984), // FMINPv4f32 + UINT64_C(1858089984), // FMINPv8f16 + UINT64_C(505436160), // FMINSrr + UINT64_C(246478848), // FMINVv4i16v + UINT64_C(1857091584), // FMINVv4i32v + UINT64_C(1320220672), // FMINVv8i16v + UINT64_C(245429248), // FMINv2f32 + UINT64_C(1323365376), // FMINv2f64 + UINT64_C(247477248), // FMINv4f16 + UINT64_C(1319171072), // FMINv4f32 + UINT64_C(1321219072), // FMINv8f16 + UINT64_C(1593839616), // FMLAv1i16_indexed + UINT64_C(1602228224), // FMLAv1i32_indexed + UINT64_C(1606422528), // FMLAv1i64_indexed + UINT64_C(237030400), // FMLAv2f32 + UINT64_C(1314966528), // FMLAv2f64 + UINT64_C(260050944), // FMLAv2i32_indexed + UINT64_C(1337987072), // FMLAv2i64_indexed + UINT64_C(239078400), // FMLAv4f16 + UINT64_C(1310772224), // FMLAv4f32 + UINT64_C(251662336), // FMLAv4i16_indexed + UINT64_C(1333792768), // FMLAv4i32_indexed + UINT64_C(1312820224), // FMLAv8f16 + UINT64_C(1325404160), // FMLAv8i16_indexed + UINT64_C(1593856000), // FMLSv1i16_indexed + UINT64_C(1602244608), // FMLSv1i32_indexed + UINT64_C(1606438912), // FMLSv1i64_indexed + UINT64_C(245419008), // FMLSv2f32 + UINT64_C(1323355136), // FMLSv2f64 + UINT64_C(260067328), // FMLSv2i32_indexed + UINT64_C(1338003456), // FMLSv2i64_indexed + UINT64_C(247467008), // FMLSv4f16 + UINT64_C(1319160832), // FMLSv4f32 + UINT64_C(251678720), // FMLSv4i16_indexed + UINT64_C(1333809152), // FMLSv4i32_indexed + UINT64_C(1321208832), // FMLSv8f16 + UINT64_C(1325420544), // FMLSv8i16_indexed + UINT64_C(0), + UINT64_C(2662203392), // FMOVDXHighr + UINT64_C(2657484800), // FMOVDXr + UINT64_C(509612032), // FMOVDi + UINT64_C(509624320), // FMOVDr + UINT64_C(518389760), // FMOVHWr + UINT64_C(2665873408), // FMOVHXr + UINT64_C(518000640), // FMOVHi + UINT64_C(518012928), // FMOVHr + UINT64_C(0), + UINT64_C(505806848), // FMOVSWr + UINT64_C(505417728), // FMOVSi + UINT64_C(505430016), // FMOVSr + UINT64_C(518455296), // FMOVWHr + UINT64_C(505872384), // FMOVWSr + UINT64_C(2662268928), // FMOVXDHighr + UINT64_C(2657550336), // FMOVXDr + UINT64_C(2665938944), // FMOVXHr + UINT64_C(251720704), // FMOVv2f32_ns + UINT64_C(1862333440), // FMOVv2f64_ns + UINT64_C(251722752), // FMOVv4f16_ns + UINT64_C(1325462528), // FMOVv4f32_ns + UINT64_C(1325464576), // FMOVv8f16_ns + UINT64_C(524320768), // FMSUBDrrr + UINT64_C(532709376), // FMSUBHrrr + UINT64_C(520126464), // FMSUBSrrr + UINT64_C(509609984), // FMULDrr + UINT64_C(517998592), // FMULHrr + UINT64_C(505415680), // FMULSrr + UINT64_C(1581259776), // FMULX16 + UINT64_C(1579211776), // FMULX32 + UINT64_C(1583406080), // FMULX64 + UINT64_C(2130743296), // FMULXv1i16_indexed + UINT64_C(2139131904), // FMULXv1i32_indexed + UINT64_C(2143326208), // FMULXv1i64_indexed + UINT64_C(237034496), // FMULXv2f32 + UINT64_C(1314970624), // FMULXv2f64 + UINT64_C(796954624), // FMULXv2i32_indexed + UINT64_C(1874890752), // FMULXv2i64_indexed + UINT64_C(239082496), // FMULXv4f16 + UINT64_C(1310776320), // FMULXv4f32 + UINT64_C(788566016), // FMULXv4i16_indexed + UINT64_C(1870696448), // FMULXv4i32_indexed + UINT64_C(1312824320), // FMULXv8f16 + UINT64_C(1862307840), // FMULXv8i16_indexed + UINT64_C(1593872384), // FMULv1i16_indexed + UINT64_C(1602260992), // FMULv1i32_indexed + UINT64_C(1606455296), // FMULv1i64_indexed + UINT64_C(773905408), // FMULv2f32 + UINT64_C(1851841536), // FMULv2f64 + UINT64_C(260083712), // FMULv2i32_indexed + UINT64_C(1338019840), // FMULv2i64_indexed + UINT64_C(775953408), // FMULv4f16 + UINT64_C(1847647232), // FMULv4f32 + UINT64_C(251695104), // FMULv4i16_indexed + UINT64_C(1333825536), // FMULv4i32_indexed + UINT64_C(1849695232), // FMULv8f16 + UINT64_C(1325436928), // FMULv8i16_indexed + UINT64_C(509689856), // FNEGDr + UINT64_C(518078464), // FNEGHr + UINT64_C(505495552), // FNEGSr + UINT64_C(782301184), // FNEGv2f32 + UINT64_C(1860237312), // FNEGv2f64 + UINT64_C(788068352), // FNEGv4f16 + UINT64_C(1856043008), // FNEGv4f32 + UINT64_C(1861810176), // FNEGv8f16 + UINT64_C(526385152), // FNMADDDrrr + UINT64_C(534773760), // FNMADDHrrr + UINT64_C(522190848), // FNMADDSrrr + UINT64_C(526417920), // FNMSUBDrrr + UINT64_C(534806528), // FNMSUBHrrr + UINT64_C(522223616), // FNMSUBSrrr + UINT64_C(509642752), // FNMULDrr + UINT64_C(518031360), // FNMULHrr + UINT64_C(505448448), // FNMULSrr + UINT64_C(1593432064), // FRECPEv1f16 + UINT64_C(1587664896), // FRECPEv1i32 + UINT64_C(1591859200), // FRECPEv1i64 + UINT64_C(245487616), // FRECPEv2f32 + UINT64_C(1323423744), // FRECPEv2f64 + UINT64_C(251254784), // FRECPEv4f16 + UINT64_C(1319229440), // FRECPEv4f32 + UINT64_C(1324996608), // FRECPEv8f16 + UINT64_C(1581267968), // FRECPS16 + UINT64_C(1579219968), // FRECPS32 + UINT64_C(1583414272), // FRECPS64 + UINT64_C(237042688), // FRECPSv2f32 + UINT64_C(1314978816), // FRECPSv2f64 + UINT64_C(239090688), // FRECPSv4f16 + UINT64_C(1310784512), // FRECPSv4f32 + UINT64_C(1312832512), // FRECPSv8f16 + UINT64_C(1593440256), // FRECPXv1f16 + UINT64_C(1587673088), // FRECPXv1i32 + UINT64_C(1591867392), // FRECPXv1i64 + UINT64_C(510017536), // FRINTADr + UINT64_C(518406144), // FRINTAHr + UINT64_C(505823232), // FRINTASr + UINT64_C(773949440), // FRINTAv2f32 + UINT64_C(1851885568), // FRINTAv2f64 + UINT64_C(779716608), // FRINTAv4f16 + UINT64_C(1847691264), // FRINTAv4f32 + UINT64_C(1853458432), // FRINTAv8f16 + UINT64_C(510115840), // FRINTIDr + UINT64_C(518504448), // FRINTIHr + UINT64_C(505921536), // FRINTISr + UINT64_C(782342144), // FRINTIv2f32 + UINT64_C(1860278272), // FRINTIv2f64 + UINT64_C(788109312), // FRINTIv4f16 + UINT64_C(1856083968), // FRINTIv4f32 + UINT64_C(1861851136), // FRINTIv8f16 + UINT64_C(509952000), // FRINTMDr + UINT64_C(518340608), // FRINTMHr + UINT64_C(505757696), // FRINTMSr + UINT64_C(237082624), // FRINTMv2f32 + UINT64_C(1315018752), // FRINTMv2f64 + UINT64_C(242849792), // FRINTMv4f16 + UINT64_C(1310824448), // FRINTMv4f32 + UINT64_C(1316591616), // FRINTMv8f16 + UINT64_C(509886464), // FRINTNDr + UINT64_C(518275072), // FRINTNHr + UINT64_C(505692160), // FRINTNSr + UINT64_C(237078528), // FRINTNv2f32 + UINT64_C(1315014656), // FRINTNv2f64 + UINT64_C(242845696), // FRINTNv4f16 + UINT64_C(1310820352), // FRINTNv4f32 + UINT64_C(1316587520), // FRINTNv8f16 + UINT64_C(509919232), // FRINTPDr + UINT64_C(518307840), // FRINTPHr + UINT64_C(505724928), // FRINTPSr + UINT64_C(245467136), // FRINTPv2f32 + UINT64_C(1323403264), // FRINTPv2f64 + UINT64_C(251234304), // FRINTPv4f16 + UINT64_C(1319208960), // FRINTPv4f32 + UINT64_C(1324976128), // FRINTPv8f16 + UINT64_C(510083072), // FRINTXDr + UINT64_C(518471680), // FRINTXHr + UINT64_C(505888768), // FRINTXSr + UINT64_C(773953536), // FRINTXv2f32 + UINT64_C(1851889664), // FRINTXv2f64 + UINT64_C(779720704), // FRINTXv4f16 + UINT64_C(1847695360), // FRINTXv4f32 + UINT64_C(1853462528), // FRINTXv8f16 + UINT64_C(509984768), // FRINTZDr + UINT64_C(518373376), // FRINTZHr + UINT64_C(505790464), // FRINTZSr + UINT64_C(245471232), // FRINTZv2f32 + UINT64_C(1323407360), // FRINTZv2f64 + UINT64_C(251238400), // FRINTZv4f16 + UINT64_C(1319213056), // FRINTZv4f32 + UINT64_C(1324980224), // FRINTZv8f16 + UINT64_C(2130302976), // FRSQRTEv1f16 + UINT64_C(2124535808), // FRSQRTEv1i32 + UINT64_C(2128730112), // FRSQRTEv1i64 + UINT64_C(782358528), // FRSQRTEv2f32 + UINT64_C(1860294656), // FRSQRTEv2f64 + UINT64_C(788125696), // FRSQRTEv4f16 + UINT64_C(1856100352), // FRSQRTEv4f32 + UINT64_C(1861867520), // FRSQRTEv8f16 + UINT64_C(1589656576), // FRSQRTS16 + UINT64_C(1587608576), // FRSQRTS32 + UINT64_C(1591802880), // FRSQRTS64 + UINT64_C(245431296), // FRSQRTSv2f32 + UINT64_C(1323367424), // FRSQRTSv2f64 + UINT64_C(247479296), // FRSQRTSv4f16 + UINT64_C(1319173120), // FRSQRTSv4f32 + UINT64_C(1321221120), // FRSQRTSv8f16 + UINT64_C(509722624), // FSQRTDr + UINT64_C(518111232), // FSQRTHr + UINT64_C(505528320), // FSQRTSr + UINT64_C(782366720), // FSQRTv2f32 + UINT64_C(1860302848), // FSQRTv2f64 + UINT64_C(788133888), // FSQRTv4f16 + UINT64_C(1856108544), // FSQRTv4f32 + UINT64_C(1861875712), // FSQRTv8f16 + UINT64_C(509622272), // FSUBDrr + UINT64_C(518010880), // FSUBHrr + UINT64_C(505427968), // FSUBSrr + UINT64_C(245421056), // FSUBv2f32 + UINT64_C(1323357184), // FSUBv2f64 + UINT64_C(247469056), // FSUBv4f16 + UINT64_C(1319162880), // FSUBv4f32 + UINT64_C(1321210880), // FSUBv8f16 + UINT64_C(3573751839), // HINT + UINT64_C(3560964096), // HLT + UINT64_C(3556769794), // HVC + UINT64_C(1308761088), // INSvi16gpr + UINT64_C(1845625856), // INSvi16lane + UINT64_C(1308892160), // INSvi32gpr + UINT64_C(1845756928), // INSvi32lane + UINT64_C(1309154304), // INSvi64gpr + UINT64_C(1846019072), // INSvi64lane + UINT64_C(1308695552), // INSvi8gpr + UINT64_C(1845560320), // INSvi8lane + UINT64_C(3573756127), // ISB + UINT64_C(1279270912), // LD1Fourv16b + UINT64_C(1287659520), // LD1Fourv16b_POST + UINT64_C(205532160), // LD1Fourv1d + UINT64_C(213920768), // LD1Fourv1d_POST + UINT64_C(1279273984), // LD1Fourv2d + UINT64_C(1287662592), // LD1Fourv2d_POST + UINT64_C(205531136), // LD1Fourv2s + UINT64_C(213919744), // LD1Fourv2s_POST + UINT64_C(205530112), // LD1Fourv4h + UINT64_C(213918720), // LD1Fourv4h_POST + UINT64_C(1279272960), // LD1Fourv4s + UINT64_C(1287661568), // LD1Fourv4s_POST + UINT64_C(205529088), // LD1Fourv8b + UINT64_C(213917696), // LD1Fourv8b_POST + UINT64_C(1279271936), // LD1Fourv8h + UINT64_C(1287660544), // LD1Fourv8h_POST + UINT64_C(1279291392), // LD1Onev16b + UINT64_C(1287680000), // LD1Onev16b_POST + UINT64_C(205552640), // LD1Onev1d + UINT64_C(213941248), // LD1Onev1d_POST + UINT64_C(1279294464), // LD1Onev2d + UINT64_C(1287683072), // LD1Onev2d_POST + UINT64_C(205551616), // LD1Onev2s + UINT64_C(213940224), // LD1Onev2s_POST + UINT64_C(205550592), // LD1Onev4h + UINT64_C(213939200), // LD1Onev4h_POST + UINT64_C(1279293440), // LD1Onev4s + UINT64_C(1287682048), // LD1Onev4s_POST + UINT64_C(205549568), // LD1Onev8b + UINT64_C(213938176), // LD1Onev8b_POST + UINT64_C(1279292416), // LD1Onev8h + UINT64_C(1287681024), // LD1Onev8h_POST + UINT64_C(1296089088), // LD1Rv16b + UINT64_C(1304477696), // LD1Rv16b_POST + UINT64_C(222350336), // LD1Rv1d + UINT64_C(230738944), // LD1Rv1d_POST + UINT64_C(1296092160), // LD1Rv2d + UINT64_C(1304480768), // LD1Rv2d_POST + UINT64_C(222349312), // LD1Rv2s + UINT64_C(230737920), // LD1Rv2s_POST + UINT64_C(222348288), // LD1Rv4h + UINT64_C(230736896), // LD1Rv4h_POST + UINT64_C(1296091136), // LD1Rv4s + UINT64_C(1304479744), // LD1Rv4s_POST + UINT64_C(222347264), // LD1Rv8b + UINT64_C(230735872), // LD1Rv8b_POST + UINT64_C(1296090112), // LD1Rv8h + UINT64_C(1304478720), // LD1Rv8h_POST + UINT64_C(1279287296), // LD1Threev16b + UINT64_C(1287675904), // LD1Threev16b_POST + UINT64_C(205548544), // LD1Threev1d + UINT64_C(213937152), // LD1Threev1d_POST + UINT64_C(1279290368), // LD1Threev2d + UINT64_C(1287678976), // LD1Threev2d_POST + UINT64_C(205547520), // LD1Threev2s + UINT64_C(213936128), // LD1Threev2s_POST + UINT64_C(205546496), // LD1Threev4h + UINT64_C(213935104), // LD1Threev4h_POST + UINT64_C(1279289344), // LD1Threev4s + UINT64_C(1287677952), // LD1Threev4s_POST + UINT64_C(205545472), // LD1Threev8b + UINT64_C(213934080), // LD1Threev8b_POST + UINT64_C(1279288320), // LD1Threev8h + UINT64_C(1287676928), // LD1Threev8h_POST + UINT64_C(1279303680), // LD1Twov16b + UINT64_C(1287692288), // LD1Twov16b_POST + UINT64_C(205564928), // LD1Twov1d + UINT64_C(213953536), // LD1Twov1d_POST + UINT64_C(1279306752), // LD1Twov2d + UINT64_C(1287695360), // LD1Twov2d_POST + UINT64_C(205563904), // LD1Twov2s + UINT64_C(213952512), // LD1Twov2s_POST + UINT64_C(205562880), // LD1Twov4h + UINT64_C(213951488), // LD1Twov4h_POST + UINT64_C(1279305728), // LD1Twov4s + UINT64_C(1287694336), // LD1Twov4s_POST + UINT64_C(205561856), // LD1Twov8b + UINT64_C(213950464), // LD1Twov8b_POST + UINT64_C(1279304704), // LD1Twov8h + UINT64_C(1287693312), // LD1Twov8h_POST + UINT64_C(222314496), // LD1i16 + UINT64_C(230703104), // LD1i16_POST + UINT64_C(222330880), // LD1i32 + UINT64_C(230719488), // LD1i32_POST + UINT64_C(222331904), // LD1i64 + UINT64_C(230720512), // LD1i64_POST + UINT64_C(222298112), // LD1i8 + UINT64_C(230686720), // LD1i8_POST + UINT64_C(1298186240), // LD2Rv16b + UINT64_C(1306574848), // LD2Rv16b_POST + UINT64_C(224447488), // LD2Rv1d + UINT64_C(232836096), // LD2Rv1d_POST + UINT64_C(1298189312), // LD2Rv2d + UINT64_C(1306577920), // LD2Rv2d_POST + UINT64_C(224446464), // LD2Rv2s + UINT64_C(232835072), // LD2Rv2s_POST + UINT64_C(224445440), // LD2Rv4h + UINT64_C(232834048), // LD2Rv4h_POST + UINT64_C(1298188288), // LD2Rv4s + UINT64_C(1306576896), // LD2Rv4s_POST + UINT64_C(224444416), // LD2Rv8b + UINT64_C(232833024), // LD2Rv8b_POST + UINT64_C(1298187264), // LD2Rv8h + UINT64_C(1306575872), // LD2Rv8h_POST + UINT64_C(1279295488), // LD2Twov16b + UINT64_C(1287684096), // LD2Twov16b_POST + UINT64_C(1279298560), // LD2Twov2d + UINT64_C(1287687168), // LD2Twov2d_POST + UINT64_C(205555712), // LD2Twov2s + UINT64_C(213944320), // LD2Twov2s_POST + UINT64_C(205554688), // LD2Twov4h + UINT64_C(213943296), // LD2Twov4h_POST + UINT64_C(1279297536), // LD2Twov4s + UINT64_C(1287686144), // LD2Twov4s_POST + UINT64_C(205553664), // LD2Twov8b + UINT64_C(213942272), // LD2Twov8b_POST + UINT64_C(1279296512), // LD2Twov8h + UINT64_C(1287685120), // LD2Twov8h_POST + UINT64_C(224411648), // LD2i16 + UINT64_C(232800256), // LD2i16_POST + UINT64_C(224428032), // LD2i32 + UINT64_C(232816640), // LD2i32_POST + UINT64_C(224429056), // LD2i64 + UINT64_C(232817664), // LD2i64_POST + UINT64_C(224395264), // LD2i8 + UINT64_C(232783872), // LD2i8_POST + UINT64_C(1296097280), // LD3Rv16b + UINT64_C(1304485888), // LD3Rv16b_POST + UINT64_C(222358528), // LD3Rv1d + UINT64_C(230747136), // LD3Rv1d_POST + UINT64_C(1296100352), // LD3Rv2d + UINT64_C(1304488960), // LD3Rv2d_POST + UINT64_C(222357504), // LD3Rv2s + UINT64_C(230746112), // LD3Rv2s_POST + UINT64_C(222356480), // LD3Rv4h + UINT64_C(230745088), // LD3Rv4h_POST + UINT64_C(1296099328), // LD3Rv4s + UINT64_C(1304487936), // LD3Rv4s_POST + UINT64_C(222355456), // LD3Rv8b + UINT64_C(230744064), // LD3Rv8b_POST + UINT64_C(1296098304), // LD3Rv8h + UINT64_C(1304486912), // LD3Rv8h_POST + UINT64_C(1279279104), // LD3Threev16b + UINT64_C(1287667712), // LD3Threev16b_POST + UINT64_C(1279282176), // LD3Threev2d + UINT64_C(1287670784), // LD3Threev2d_POST + UINT64_C(205539328), // LD3Threev2s + UINT64_C(213927936), // LD3Threev2s_POST + UINT64_C(205538304), // LD3Threev4h + UINT64_C(213926912), // LD3Threev4h_POST + UINT64_C(1279281152), // LD3Threev4s + UINT64_C(1287669760), // LD3Threev4s_POST + UINT64_C(205537280), // LD3Threev8b + UINT64_C(213925888), // LD3Threev8b_POST + UINT64_C(1279280128), // LD3Threev8h + UINT64_C(1287668736), // LD3Threev8h_POST + UINT64_C(222322688), // LD3i16 + UINT64_C(230711296), // LD3i16_POST + UINT64_C(222339072), // LD3i32 + UINT64_C(230727680), // LD3i32_POST + UINT64_C(222340096), // LD3i64 + UINT64_C(230728704), // LD3i64_POST + UINT64_C(222306304), // LD3i8 + UINT64_C(230694912), // LD3i8_POST + UINT64_C(1279262720), // LD4Fourv16b + UINT64_C(1287651328), // LD4Fourv16b_POST + UINT64_C(1279265792), // LD4Fourv2d + UINT64_C(1287654400), // LD4Fourv2d_POST + UINT64_C(205522944), // LD4Fourv2s + UINT64_C(213911552), // LD4Fourv2s_POST + UINT64_C(205521920), // LD4Fourv4h + UINT64_C(213910528), // LD4Fourv4h_POST + UINT64_C(1279264768), // LD4Fourv4s + UINT64_C(1287653376), // LD4Fourv4s_POST + UINT64_C(205520896), // LD4Fourv8b + UINT64_C(213909504), // LD4Fourv8b_POST + UINT64_C(1279263744), // LD4Fourv8h + UINT64_C(1287652352), // LD4Fourv8h_POST + UINT64_C(1298194432), // LD4Rv16b + UINT64_C(1306583040), // LD4Rv16b_POST + UINT64_C(224455680), // LD4Rv1d + UINT64_C(232844288), // LD4Rv1d_POST + UINT64_C(1298197504), // LD4Rv2d + UINT64_C(1306586112), // LD4Rv2d_POST + UINT64_C(224454656), // LD4Rv2s + UINT64_C(232843264), // LD4Rv2s_POST + UINT64_C(224453632), // LD4Rv4h + UINT64_C(232842240), // LD4Rv4h_POST + UINT64_C(1298196480), // LD4Rv4s + UINT64_C(1306585088), // LD4Rv4s_POST + UINT64_C(224452608), // LD4Rv8b + UINT64_C(232841216), // LD4Rv8b_POST + UINT64_C(1298195456), // LD4Rv8h + UINT64_C(1306584064), // LD4Rv8h_POST + UINT64_C(224419840), // LD4i16 + UINT64_C(232808448), // LD4i16_POST + UINT64_C(224436224), // LD4i32 + UINT64_C(232824832), // LD4i32_POST + UINT64_C(224437248), // LD4i64 + UINT64_C(232825856), // LD4i64_POST + UINT64_C(224403456), // LD4i8 + UINT64_C(232792064), // LD4i8_POST + UINT64_C(954204160), // LDADDALb + UINT64_C(4175429632), // LDADDALd + UINT64_C(2027945984), // LDADDALh + UINT64_C(3101687808), // LDADDALs + UINT64_C(950009856), // LDADDAb + UINT64_C(4171235328), // LDADDAd + UINT64_C(2023751680), // LDADDAh + UINT64_C(3097493504), // LDADDAs + UINT64_C(945815552), // LDADDLb + UINT64_C(4167041024), // LDADDLd + UINT64_C(2019557376), // LDADDLh + UINT64_C(3093299200), // LDADDLs + UINT64_C(941621248), // LDADDb + UINT64_C(4162846720), // LDADDd + UINT64_C(2015363072), // LDADDh + UINT64_C(3089104896), // LDADDs + UINT64_C(148896768), // LDARB + UINT64_C(1222638592), // LDARH + UINT64_C(2296380416), // LDARW + UINT64_C(3370122240), // LDARX + UINT64_C(2288025600), // LDAXPW + UINT64_C(3361767424), // LDAXPX + UINT64_C(140508160), // LDAXRB + UINT64_C(1214249984), // LDAXRH + UINT64_C(2287991808), // LDAXRW + UINT64_C(3361733632), // LDAXRX + UINT64_C(954208256), // LDCLRALb + UINT64_C(4175433728), // LDCLRALd + UINT64_C(2027950080), // LDCLRALh + UINT64_C(3101691904), // LDCLRALs + UINT64_C(950013952), // LDCLRAb + UINT64_C(4171239424), // LDCLRAd + UINT64_C(2023755776), // LDCLRAh + UINT64_C(3097497600), // LDCLRAs + UINT64_C(945819648), // LDCLRLb + UINT64_C(4167045120), // LDCLRLd + UINT64_C(2019561472), // LDCLRLh + UINT64_C(3093303296), // LDCLRLs + UINT64_C(941625344), // LDCLRb + UINT64_C(4162850816), // LDCLRd + UINT64_C(2015367168), // LDCLRh + UINT64_C(3089108992), // LDCLRs + UINT64_C(954212352), // LDEORALb + UINT64_C(4175437824), // LDEORALd + UINT64_C(2027954176), // LDEORALh + UINT64_C(3101696000), // LDEORALs + UINT64_C(950018048), // LDEORAb + UINT64_C(4171243520), // LDEORAd + UINT64_C(2023759872), // LDEORAh + UINT64_C(3097501696), // LDEORAs + UINT64_C(945823744), // LDEORLb + UINT64_C(4167049216), // LDEORLd + UINT64_C(2019565568), // LDEORLh + UINT64_C(3093307392), // LDEORLs + UINT64_C(941629440), // LDEORb + UINT64_C(4162854912), // LDEORd + UINT64_C(2015371264), // LDEORh + UINT64_C(3089113088), // LDEORs + UINT64_C(148864000), // LDLARB + UINT64_C(1222605824), // LDLARH + UINT64_C(2296347648), // LDLARW + UINT64_C(3370089472), // LDLARX + UINT64_C(1816133632), // LDNPDi + UINT64_C(2889875456), // LDNPQi + UINT64_C(742391808), // LDNPSi + UINT64_C(675282944), // LDNPWi + UINT64_C(2822766592), // LDNPXi + UINT64_C(1832910848), // LDPDi + UINT64_C(1824522240), // LDPDpost + UINT64_C(1841299456), // LDPDpre + UINT64_C(2906652672), // LDPQi + UINT64_C(2898264064), // LDPQpost + UINT64_C(2915041280), // LDPQpre + UINT64_C(1765801984), // LDPSWi + UINT64_C(1757413376), // LDPSWpost + UINT64_C(1774190592), // LDPSWpre + UINT64_C(759169024), // LDPSi + UINT64_C(750780416), // LDPSpost + UINT64_C(767557632), // LDPSpre + UINT64_C(692060160), // LDPWi + UINT64_C(683671552), // LDPWpost + UINT64_C(700448768), // LDPWpre + UINT64_C(2839543808), // LDPXi + UINT64_C(2831155200), // LDPXpost + UINT64_C(2847932416), // LDPXpre + UINT64_C(943719424), // LDRBBpost + UINT64_C(943721472), // LDRBBpre + UINT64_C(945833984), // LDRBBroW + UINT64_C(945842176), // LDRBBroX + UINT64_C(960495616), // LDRBBui + UINT64_C(1010828288), // LDRBpost + UINT64_C(1010830336), // LDRBpre + UINT64_C(1012942848), // LDRBroW + UINT64_C(1012951040), // LDRBroX + UINT64_C(1027604480), // LDRBui + UINT64_C(1543503872), // LDRDl + UINT64_C(4232053760), // LDRDpost + UINT64_C(4232055808), // LDRDpre + UINT64_C(4234168320), // LDRDroW + UINT64_C(4234176512), // LDRDroX + UINT64_C(4248829952), // LDRDui + UINT64_C(2017461248), // LDRHHpost + UINT64_C(2017463296), // LDRHHpre + UINT64_C(2019575808), // LDRHHroW + UINT64_C(2019584000), // LDRHHroX + UINT64_C(2034237440), // LDRHHui + UINT64_C(2084570112), // LDRHpost + UINT64_C(2084572160), // LDRHpre + UINT64_C(2086684672), // LDRHroW + UINT64_C(2086692864), // LDRHroX + UINT64_C(2101346304), // LDRHui + UINT64_C(2617245696), // LDRQl + UINT64_C(1019216896), // LDRQpost + UINT64_C(1019218944), // LDRQpre + UINT64_C(1021331456), // LDRQroW + UINT64_C(1021339648), // LDRQroX + UINT64_C(1035993088), // LDRQui + UINT64_C(952108032), // LDRSBWpost + UINT64_C(952110080), // LDRSBWpre + UINT64_C(954222592), // LDRSBWroW + UINT64_C(954230784), // LDRSBWroX + UINT64_C(968884224), // LDRSBWui + UINT64_C(947913728), // LDRSBXpost + UINT64_C(947915776), // LDRSBXpre + UINT64_C(950028288), // LDRSBXroW + UINT64_C(950036480), // LDRSBXroX + UINT64_C(964689920), // LDRSBXui + UINT64_C(2025849856), // LDRSHWpost + UINT64_C(2025851904), // LDRSHWpre + UINT64_C(2027964416), // LDRSHWroW + UINT64_C(2027972608), // LDRSHWroX + UINT64_C(2042626048), // LDRSHWui + UINT64_C(2021655552), // LDRSHXpost + UINT64_C(2021657600), // LDRSHXpre + UINT64_C(2023770112), // LDRSHXroW + UINT64_C(2023778304), // LDRSHXroX + UINT64_C(2038431744), // LDRSHXui + UINT64_C(2550136832), // LDRSWl + UINT64_C(3095397376), // LDRSWpost + UINT64_C(3095399424), // LDRSWpre + UINT64_C(3097511936), // LDRSWroW + UINT64_C(3097520128), // LDRSWroX + UINT64_C(3112173568), // LDRSWui + UINT64_C(469762048), // LDRSl + UINT64_C(3158311936), // LDRSpost + UINT64_C(3158313984), // LDRSpre + UINT64_C(3160426496), // LDRSroW + UINT64_C(3160434688), // LDRSroX + UINT64_C(3175088128), // LDRSui + UINT64_C(402653184), // LDRWl + UINT64_C(3091203072), // LDRWpost + UINT64_C(3091205120), // LDRWpre + UINT64_C(3093317632), // LDRWroW + UINT64_C(3093325824), // LDRWroX + UINT64_C(3107979264), // LDRWui + UINT64_C(1476395008), // LDRXl + UINT64_C(4164944896), // LDRXpost + UINT64_C(4164946944), // LDRXpre + UINT64_C(4167059456), // LDRXroW + UINT64_C(4167067648), // LDRXroX + UINT64_C(4181721088), // LDRXui + UINT64_C(954216448), // LDSETALb + UINT64_C(4175441920), // LDSETALd + UINT64_C(2027958272), // LDSETALh + UINT64_C(3101700096), // LDSETALs + UINT64_C(950022144), // LDSETAb + UINT64_C(4171247616), // LDSETAd + UINT64_C(2023763968), // LDSETAh + UINT64_C(3097505792), // LDSETAs + UINT64_C(945827840), // LDSETLb + UINT64_C(4167053312), // LDSETLd + UINT64_C(2019569664), // LDSETLh + UINT64_C(3093311488), // LDSETLs + UINT64_C(941633536), // LDSETb + UINT64_C(4162859008), // LDSETd + UINT64_C(2015375360), // LDSETh + UINT64_C(3089117184), // LDSETs + UINT64_C(954220544), // LDSMAXALb + UINT64_C(4175446016), // LDSMAXALd + UINT64_C(2027962368), // LDSMAXALh + UINT64_C(3101704192), // LDSMAXALs + UINT64_C(950026240), // LDSMAXAb + UINT64_C(4171251712), // LDSMAXAd + UINT64_C(2023768064), // LDSMAXAh + UINT64_C(3097509888), // LDSMAXAs + UINT64_C(945831936), // LDSMAXLb + UINT64_C(4167057408), // LDSMAXLd + UINT64_C(2019573760), // LDSMAXLh + UINT64_C(3093315584), // LDSMAXLs + UINT64_C(941637632), // LDSMAXb + UINT64_C(4162863104), // LDSMAXd + UINT64_C(2015379456), // LDSMAXh + UINT64_C(3089121280), // LDSMAXs + UINT64_C(954224640), // LDSMINALb + UINT64_C(4175450112), // LDSMINALd + UINT64_C(2027966464), // LDSMINALh + UINT64_C(3101708288), // LDSMINALs + UINT64_C(950030336), // LDSMINAb + UINT64_C(4171255808), // LDSMINAd + UINT64_C(2023772160), // LDSMINAh + UINT64_C(3097513984), // LDSMINAs + UINT64_C(945836032), // LDSMINLb + UINT64_C(4167061504), // LDSMINLd + UINT64_C(2019577856), // LDSMINLh + UINT64_C(3093319680), // LDSMINLs + UINT64_C(941641728), // LDSMINb + UINT64_C(4162867200), // LDSMINd + UINT64_C(2015383552), // LDSMINh + UINT64_C(3089125376), // LDSMINs + UINT64_C(943720448), // LDTRBi + UINT64_C(2017462272), // LDTRHi + UINT64_C(952109056), // LDTRSBWi + UINT64_C(947914752), // LDTRSBXi + UINT64_C(2025850880), // LDTRSHWi + UINT64_C(2021656576), // LDTRSHXi + UINT64_C(3095398400), // LDTRSWi + UINT64_C(3091204096), // LDTRWi + UINT64_C(4164945920), // LDTRXi + UINT64_C(954228736), // LDUMAXALb + UINT64_C(4175454208), // LDUMAXALd + UINT64_C(2027970560), // LDUMAXALh + UINT64_C(3101712384), // LDUMAXALs + UINT64_C(950034432), // LDUMAXAb + UINT64_C(4171259904), // LDUMAXAd + UINT64_C(2023776256), // LDUMAXAh + UINT64_C(3097518080), // LDUMAXAs + UINT64_C(945840128), // LDUMAXLb + UINT64_C(4167065600), // LDUMAXLd + UINT64_C(2019581952), // LDUMAXLh + UINT64_C(3093323776), // LDUMAXLs + UINT64_C(941645824), // LDUMAXb + UINT64_C(4162871296), // LDUMAXd + UINT64_C(2015387648), // LDUMAXh + UINT64_C(3089129472), // LDUMAXs + UINT64_C(954232832), // LDUMINALb + UINT64_C(4175458304), // LDUMINALd + UINT64_C(2027974656), // LDUMINALh + UINT64_C(3101716480), // LDUMINALs + UINT64_C(950038528), // LDUMINAb + UINT64_C(4171264000), // LDUMINAd + UINT64_C(2023780352), // LDUMINAh + UINT64_C(3097522176), // LDUMINAs + UINT64_C(945844224), // LDUMINLb + UINT64_C(4167069696), // LDUMINLd + UINT64_C(2019586048), // LDUMINLh + UINT64_C(3093327872), // LDUMINLs + UINT64_C(941649920), // LDUMINb + UINT64_C(4162875392), // LDUMINd + UINT64_C(2015391744), // LDUMINh + UINT64_C(3089133568), // LDUMINs + UINT64_C(943718400), // LDURBBi + UINT64_C(1010827264), // LDURBi + UINT64_C(4232052736), // LDURDi + UINT64_C(2017460224), // LDURHHi + UINT64_C(2084569088), // LDURHi + UINT64_C(1019215872), // LDURQi + UINT64_C(952107008), // LDURSBWi + UINT64_C(947912704), // LDURSBXi + UINT64_C(2025848832), // LDURSHWi + UINT64_C(2021654528), // LDURSHXi + UINT64_C(3095396352), // LDURSWi + UINT64_C(3158310912), // LDURSi + UINT64_C(3091202048), // LDURWi + UINT64_C(4164943872), // LDURXi + UINT64_C(2287992832), // LDXPW + UINT64_C(3361734656), // LDXPX + UINT64_C(140475392), // LDXRB + UINT64_C(1214217216), // LDXRH + UINT64_C(2287959040), // LDXRW + UINT64_C(3361700864), // LDXRX + UINT64_C(0), // LOADgot + UINT64_C(448798720), // LSLVWr + UINT64_C(2596282368), // LSLVXr + UINT64_C(448799744), // LSRVWr + UINT64_C(2596283392), // LSRVXr + UINT64_C(452984832), // MADDWrrr + UINT64_C(2600468480), // MADDXrrr + UINT64_C(1310757888), // MLAv16i8 + UINT64_C(245404672), // MLAv2i32 + UINT64_C(796917760), // MLAv2i32_indexed + UINT64_C(241210368), // MLAv4i16 + UINT64_C(792723456), // MLAv4i16_indexed + UINT64_C(1319146496), // MLAv4i32 + UINT64_C(1870659584), // MLAv4i32_indexed + UINT64_C(1314952192), // MLAv8i16 + UINT64_C(1866465280), // MLAv8i16_indexed + UINT64_C(237016064), // MLAv8i8 + UINT64_C(1847628800), // MLSv16i8 + UINT64_C(782275584), // MLSv2i32 + UINT64_C(796934144), // MLSv2i32_indexed + UINT64_C(778081280), // MLSv4i16 + UINT64_C(792739840), // MLSv4i16_indexed + UINT64_C(1856017408), // MLSv4i32 + UINT64_C(1870675968), // MLSv4i32_indexed + UINT64_C(1851823104), // MLSv8i16 + UINT64_C(1866481664), // MLSv8i16_indexed + UINT64_C(773886976), // MLSv8i8 + UINT64_C(788587520), // MOVID + UINT64_C(1325458432), // MOVIv16b_ns + UINT64_C(1862329344), // MOVIv2d_ns + UINT64_C(251659264), // MOVIv2i32 + UINT64_C(251708416), // MOVIv2s_msl + UINT64_C(251692032), // MOVIv4i16 + UINT64_C(1325401088), // MOVIv4i32 + UINT64_C(1325450240), // MOVIv4s_msl + UINT64_C(251716608), // MOVIv8b_ns + UINT64_C(1325433856), // MOVIv8i16 + UINT64_C(1920991232), // MOVKWi + UINT64_C(4068474880), // MOVKXi + UINT64_C(310378496), // MOVNWi + UINT64_C(2457862144), // MOVNXi + UINT64_C(1384120320), // MOVZWi + UINT64_C(3531603968), // MOVZXi + UINT64_C(0), // MOVaddr + UINT64_C(0), // MOVaddrBA + UINT64_C(0), // MOVaddrCP + UINT64_C(0), // MOVaddrEXT + UINT64_C(0), // MOVaddrJT + UINT64_C(0), // MOVaddrTLS + UINT64_C(0), // MOVi32imm + UINT64_C(0), // MOVi64imm + UINT64_C(3575644160), // MRS + UINT64_C(3573547008), // MSR + UINT64_C(3573563423), // MSRpstateImm1 + UINT64_C(3573563423), // MSRpstateImm4 + UINT64_C(453017600), // MSUBWrrr + UINT64_C(2600501248), // MSUBXrrr + UINT64_C(1310759936), // MULv16i8 + UINT64_C(245406720), // MULv2i32 + UINT64_C(260079616), // MULv2i32_indexed + UINT64_C(241212416), // MULv4i16 + UINT64_C(255885312), // MULv4i16_indexed + UINT64_C(1319148544), // MULv4i32 + UINT64_C(1333821440), // MULv4i32_indexed + UINT64_C(1314954240), // MULv8i16 + UINT64_C(1329627136), // MULv8i16_indexed + UINT64_C(237018112), // MULv8i8 + UINT64_C(788530176), // MVNIv2i32 + UINT64_C(788579328), // MVNIv2s_msl + UINT64_C(788562944), // MVNIv4i16 + UINT64_C(1862272000), // MVNIv4i32 + UINT64_C(1862321152), // MVNIv4s_msl + UINT64_C(1862304768), // MVNIv8i16 + UINT64_C(1847638016), // NEGv16i8 + UINT64_C(2128656384), // NEGv1i64 + UINT64_C(782284800), // NEGv2i32 + UINT64_C(1860220928), // NEGv2i64 + UINT64_C(778090496), // NEGv4i16 + UINT64_C(1856026624), // NEGv4i32 + UINT64_C(1851832320), // NEGv8i16 + UINT64_C(773896192), // NEGv8i8 + UINT64_C(1847613440), // NOTv16i8 + UINT64_C(773871616), // NOTv8i8 + UINT64_C(0), // ORNWrr + UINT64_C(706740224), // ORNWrs + UINT64_C(0), // ORNXrr + UINT64_C(2854223872), // ORNXrs + UINT64_C(1323310080), // ORNv16i8 + UINT64_C(249568256), // ORNv8i8 + UINT64_C(838860800), // ORRWri + UINT64_C(0), // ORRWrr + UINT64_C(704643072), // ORRWrs + UINT64_C(2986344448), // ORRXri + UINT64_C(0), // ORRXrr + UINT64_C(2852126720), // ORRXrs + UINT64_C(1319115776), // ORRv16i8 + UINT64_C(251663360), // ORRv2i32 + UINT64_C(251696128), // ORRv4i16 + UINT64_C(1325405184), // ORRv4i32 + UINT64_C(1325437952), // ORRv8i16 + UINT64_C(245373952), // ORRv8i8 + UINT64_C(1310777344), // PMULLv16i8 + UINT64_C(249618432), // PMULLv1i64 + UINT64_C(1323360256), // PMULLv2i64 + UINT64_C(237035520), // PMULLv8i8 + UINT64_C(1847630848), // PMULv16i8 + UINT64_C(773889024), // PMULv8i8 + UINT64_C(3623878656), // PRFMl + UINT64_C(4171253760), // PRFMroW + UINT64_C(4171261952), // PRFMroX + UINT64_C(4185915392), // PRFMui + UINT64_C(4169138176), // PRFUMi + UINT64_C(782254080), // RADDHNv2i64_v2i32 + UINT64_C(1855995904), // RADDHNv2i64_v4i32 + UINT64_C(778059776), // RADDHNv4i32_v4i16 + UINT64_C(1851801600), // RADDHNv4i32_v8i16 + UINT64_C(1847607296), // RADDHNv8i16_v16i8 + UINT64_C(773865472), // RADDHNv8i16_v8i8 + UINT64_C(1522532352), // RBITWr + UINT64_C(3670016000), // RBITXr + UINT64_C(1851807744), // RBITv16i8 + UINT64_C(778065920), // RBITv8i8 + UINT64_C(3596550144), // RET + UINT64_C(0), // RET_ReallyLR + UINT64_C(1522533376), // REV16Wr + UINT64_C(3670017024), // REV16Xr + UINT64_C(1310726144), // REV16v16i8 + UINT64_C(236984320), // REV16v8i8 + UINT64_C(3670018048), // REV32Xr + UINT64_C(1847592960), // REV32v16i8 + UINT64_C(778045440), // REV32v4i16 + UINT64_C(1851787264), // REV32v8i16 + UINT64_C(773851136), // REV32v8i8 + UINT64_C(1310722048), // REV64v16i8 + UINT64_C(245368832), // REV64v2i32 + UINT64_C(241174528), // REV64v4i16 + UINT64_C(1319110656), // REV64v4i32 + UINT64_C(1314916352), // REV64v8i16 + UINT64_C(236980224), // REV64v8i8 + UINT64_C(1522534400), // REVWr + UINT64_C(3670019072), // REVXr + UINT64_C(448801792), // RORVWr + UINT64_C(2596285440), // RORVXr + UINT64_C(1325960192), // RSHRNv16i8_shift + UINT64_C(253791232), // RSHRNv2i32_shift + UINT64_C(252742656), // RSHRNv4i16_shift + UINT64_C(1327533056), // RSHRNv4i32_shift + UINT64_C(1326484480), // RSHRNv8i16_shift + UINT64_C(252218368), // RSHRNv8i8_shift + UINT64_C(782262272), // RSUBHNv2i64_v2i32 + UINT64_C(1856004096), // RSUBHNv2i64_v4i32 + UINT64_C(778067968), // RSUBHNv4i32_v4i16 + UINT64_C(1851809792), // RSUBHNv4i32_v8i16 + UINT64_C(1847615488), // RSUBHNv8i16_v16i8 + UINT64_C(773873664), // RSUBHNv8i16_v8i8 + UINT64_C(1310740480), // SABALv16i8_v8i16 + UINT64_C(245387264), // SABALv2i32_v2i64 + UINT64_C(241192960), // SABALv4i16_v4i32 + UINT64_C(1319129088), // SABALv4i32_v2i64 + UINT64_C(1314934784), // SABALv8i16_v4i32 + UINT64_C(236998656), // SABALv8i8_v8i16 + UINT64_C(1310751744), // SABAv16i8 + UINT64_C(245398528), // SABAv2i32 + UINT64_C(241204224), // SABAv4i16 + UINT64_C(1319140352), // SABAv4i32 + UINT64_C(1314946048), // SABAv8i16 + UINT64_C(237009920), // SABAv8i8 + UINT64_C(1310748672), // SABDLv16i8_v8i16 + UINT64_C(245395456), // SABDLv2i32_v2i64 + UINT64_C(241201152), // SABDLv4i16_v4i32 + UINT64_C(1319137280), // SABDLv4i32_v2i64 + UINT64_C(1314942976), // SABDLv8i16_v4i32 + UINT64_C(237006848), // SABDLv8i8_v8i16 + UINT64_C(1310749696), // SABDv16i8 + UINT64_C(245396480), // SABDv2i32 + UINT64_C(241202176), // SABDv4i16 + UINT64_C(1319138304), // SABDv4i32 + UINT64_C(1314944000), // SABDv8i16 + UINT64_C(237007872), // SABDv8i8 + UINT64_C(1310746624), // SADALPv16i8_v8i16 + UINT64_C(245393408), // SADALPv2i32_v1i64 + UINT64_C(241199104), // SADALPv4i16_v2i32 + UINT64_C(1319135232), // SADALPv4i32_v2i64 + UINT64_C(1314940928), // SADALPv8i16_v4i32 + UINT64_C(237004800), // SADALPv8i8_v4i16 + UINT64_C(1310730240), // SADDLPv16i8_v8i16 + UINT64_C(245377024), // SADDLPv2i32_v1i64 + UINT64_C(241182720), // SADDLPv4i16_v2i32 + UINT64_C(1319118848), // SADDLPv4i32_v2i64 + UINT64_C(1314924544), // SADDLPv8i16_v4i32 + UINT64_C(236988416), // SADDLPv8i8_v4i16 + UINT64_C(1311782912), // SADDLVv16i8v + UINT64_C(242235392), // SADDLVv4i16v + UINT64_C(1320171520), // SADDLVv4i32v + UINT64_C(1315977216), // SADDLVv8i16v + UINT64_C(238041088), // SADDLVv8i8v + UINT64_C(1310720000), // SADDLv16i8_v8i16 + UINT64_C(245366784), // SADDLv2i32_v2i64 + UINT64_C(241172480), // SADDLv4i16_v4i32 + UINT64_C(1319108608), // SADDLv4i32_v2i64 + UINT64_C(1314914304), // SADDLv8i16_v4i32 + UINT64_C(236978176), // SADDLv8i8_v8i16 + UINT64_C(1310724096), // SADDWv16i8_v8i16 + UINT64_C(245370880), // SADDWv2i32_v2i64 + UINT64_C(241176576), // SADDWv4i16_v4i32 + UINT64_C(1319112704), // SADDWv4i32_v2i64 + UINT64_C(1314918400), // SADDWv8i16_v4i32 + UINT64_C(236982272), // SADDWv8i8_v8i16 + UINT64_C(2046820352), // SBCSWr + UINT64_C(4194304000), // SBCSXr + UINT64_C(1509949440), // SBCWr + UINT64_C(3657433088), // SBCXr + UINT64_C(318767104), // SBFMWri + UINT64_C(2470445056), // SBFMXri + UINT64_C(507674624), // SCVTFSWDri + UINT64_C(516063232), // SCVTFSWHri + UINT64_C(503480320), // SCVTFSWSri + UINT64_C(2655125504), // SCVTFSXDri + UINT64_C(2663514112), // SCVTFSXHri + UINT64_C(2650931200), // SCVTFSXSri + UINT64_C(509739008), // SCVTFUWDri + UINT64_C(518127616), // SCVTFUWHri + UINT64_C(505544704), // SCVTFUWSri + UINT64_C(2657222656), // SCVTFUXDri + UINT64_C(2665611264), // SCVTFUXHri + UINT64_C(2653028352), // SCVTFUXSri + UINT64_C(1598088192), // SCVTFd + UINT64_C(1594942464), // SCVTFh + UINT64_C(1595991040), // SCVTFs + UINT64_C(1585043456), // SCVTFv1i16 + UINT64_C(1579276288), // SCVTFv1i32 + UINT64_C(1583470592), // SCVTFv1i64 + UINT64_C(237099008), // SCVTFv2f32 + UINT64_C(1315035136), // SCVTFv2f64 + UINT64_C(253813760), // SCVTFv2i32_shift + UINT64_C(1329652736), // SCVTFv2i64_shift + UINT64_C(242866176), // SCVTFv4f16 + UINT64_C(1310840832), // SCVTFv4f32 + UINT64_C(252765184), // SCVTFv4i16_shift + UINT64_C(1327555584), // SCVTFv4i32_shift + UINT64_C(1316608000), // SCVTFv8f16 + UINT64_C(1326507008), // SCVTFv8i16_shift + UINT64_C(448793600), // SDIVWr + UINT64_C(2596277248), // SDIVXr + UINT64_C(448793600), // SDIV_IntWr + UINT64_C(2596277248), // SDIV_IntXr + UINT64_C(1577058304), // SHA1Crrr + UINT64_C(1579681792), // SHA1Hrr + UINT64_C(1577066496), // SHA1Mrrr + UINT64_C(1577062400), // SHA1Prrr + UINT64_C(1577070592), // SHA1SU0rrr + UINT64_C(1579685888), // SHA1SU1rr + UINT64_C(1577078784), // SHA256H2rrr + UINT64_C(1577074688), // SHA256Hrrr + UINT64_C(1579689984), // SHA256SU0rr + UINT64_C(1577082880), // SHA256SU1rrr + UINT64_C(1310721024), // SHADDv16i8 + UINT64_C(245367808), // SHADDv2i32 + UINT64_C(241173504), // SHADDv4i16 + UINT64_C(1319109632), // SHADDv4i32 + UINT64_C(1314915328), // SHADDv8i16 + UINT64_C(236979200), // SHADDv8i8 + UINT64_C(1847670784), // SHLLv16i8 + UINT64_C(782317568), // SHLLv2i32 + UINT64_C(778123264), // SHLLv4i16 + UINT64_C(1856059392), // SHLLv4i32 + UINT64_C(1851865088), // SHLLv8i16 + UINT64_C(773928960), // SHLLv8i8 + UINT64_C(1598051328), // SHLd + UINT64_C(1325945856), // SHLv16i8_shift + UINT64_C(253776896), // SHLv2i32_shift + UINT64_C(1329615872), // SHLv2i64_shift + UINT64_C(252728320), // SHLv4i16_shift + UINT64_C(1327518720), // SHLv4i32_shift + UINT64_C(1326470144), // SHLv8i16_shift + UINT64_C(252204032), // SHLv8i8_shift + UINT64_C(1325958144), // SHRNv16i8_shift + UINT64_C(253789184), // SHRNv2i32_shift + UINT64_C(252740608), // SHRNv4i16_shift + UINT64_C(1327531008), // SHRNv4i32_shift + UINT64_C(1326482432), // SHRNv8i16_shift + UINT64_C(252216320), // SHRNv8i8_shift + UINT64_C(1310729216), // SHSUBv16i8 + UINT64_C(245376000), // SHSUBv2i32 + UINT64_C(241181696), // SHSUBv4i16 + UINT64_C(1319117824), // SHSUBv4i32 + UINT64_C(1314923520), // SHSUBv8i16 + UINT64_C(236987392), // SHSUBv8i8 + UINT64_C(2134922240), // SLId + UINT64_C(1862816768), // SLIv16i8_shift + UINT64_C(790647808), // SLIv2i32_shift + UINT64_C(1866486784), // SLIv2i64_shift + UINT64_C(789599232), // SLIv4i16_shift + UINT64_C(1864389632), // SLIv4i32_shift + UINT64_C(1863341056), // SLIv8i16_shift + UINT64_C(789074944), // SLIv8i8_shift + UINT64_C(2602565632), // SMADDLrrr + UINT64_C(1310761984), // SMAXPv16i8 + UINT64_C(245408768), // SMAXPv2i32 + UINT64_C(241214464), // SMAXPv4i16 + UINT64_C(1319150592), // SMAXPv4i32 + UINT64_C(1314956288), // SMAXPv8i16 + UINT64_C(237020160), // SMAXPv8i8 + UINT64_C(1311811584), // SMAXVv16i8v + UINT64_C(242264064), // SMAXVv4i16v + UINT64_C(1320200192), // SMAXVv4i32v + UINT64_C(1316005888), // SMAXVv8i16v + UINT64_C(238069760), // SMAXVv8i8v + UINT64_C(1310745600), // SMAXv16i8 + UINT64_C(245392384), // SMAXv2i32 + UINT64_C(241198080), // SMAXv4i16 + UINT64_C(1319134208), // SMAXv4i32 + UINT64_C(1314939904), // SMAXv8i16 + UINT64_C(237003776), // SMAXv8i8 + UINT64_C(3556769795), // SMC + UINT64_C(1310764032), // SMINPv16i8 + UINT64_C(245410816), // SMINPv2i32 + UINT64_C(241216512), // SMINPv4i16 + UINT64_C(1319152640), // SMINPv4i32 + UINT64_C(1314958336), // SMINPv8i16 + UINT64_C(237022208), // SMINPv8i8 + UINT64_C(1311877120), // SMINVv16i8v + UINT64_C(242329600), // SMINVv4i16v + UINT64_C(1320265728), // SMINVv4i32v + UINT64_C(1316071424), // SMINVv8i16v + UINT64_C(238135296), // SMINVv8i8v + UINT64_C(1310747648), // SMINv16i8 + UINT64_C(245394432), // SMINv2i32 + UINT64_C(241200128), // SMINv4i16 + UINT64_C(1319136256), // SMINv4i32 + UINT64_C(1314941952), // SMINv8i16 + UINT64_C(237005824), // SMINv8i8 + UINT64_C(1310752768), // SMLALv16i8_v8i16 + UINT64_C(260055040), // SMLALv2i32_indexed + UINT64_C(245399552), // SMLALv2i32_v2i64 + UINT64_C(255860736), // SMLALv4i16_indexed + UINT64_C(241205248), // SMLALv4i16_v4i32 + UINT64_C(1333796864), // SMLALv4i32_indexed + UINT64_C(1319141376), // SMLALv4i32_v2i64 + UINT64_C(1329602560), // SMLALv8i16_indexed + UINT64_C(1314947072), // SMLALv8i16_v4i32 + UINT64_C(237010944), // SMLALv8i8_v8i16 + UINT64_C(1310760960), // SMLSLv16i8_v8i16 + UINT64_C(260071424), // SMLSLv2i32_indexed + UINT64_C(245407744), // SMLSLv2i32_v2i64 + UINT64_C(255877120), // SMLSLv4i16_indexed + UINT64_C(241213440), // SMLSLv4i16_v4i32 + UINT64_C(1333813248), // SMLSLv4i32_indexed + UINT64_C(1319149568), // SMLSLv4i32_v2i64 + UINT64_C(1329618944), // SMLSLv8i16_indexed + UINT64_C(1314955264), // SMLSLv8i16_v4i32 + UINT64_C(237019136), // SMLSLv8i8_v8i16 + UINT64_C(235023360), // SMOVvi16to32 + UINT64_C(1308765184), // SMOVvi16to64 + UINT64_C(1308896256), // SMOVvi32to64 + UINT64_C(234957824), // SMOVvi8to32 + UINT64_C(1308699648), // SMOVvi8to64 + UINT64_C(2602598400), // SMSUBLrrr + UINT64_C(2604662784), // SMULHrr + UINT64_C(1310769152), // SMULLv16i8_v8i16 + UINT64_C(260087808), // SMULLv2i32_indexed + UINT64_C(245415936), // SMULLv2i32_v2i64 + UINT64_C(255893504), // SMULLv4i16_indexed + UINT64_C(241221632), // SMULLv4i16_v4i32 + UINT64_C(1333829632), // SMULLv4i32_indexed + UINT64_C(1319157760), // SMULLv4i32_v2i64 + UINT64_C(1329635328), // SMULLv8i16_indexed + UINT64_C(1314963456), // SMULLv8i16_v4i32 + UINT64_C(237027328), // SMULLv8i8_v8i16 + UINT64_C(1310750720), // SQABSv16i8 + UINT64_C(1583380480), // SQABSv1i16 + UINT64_C(1587574784), // SQABSv1i32 + UINT64_C(1591769088), // SQABSv1i64 + UINT64_C(1579186176), // SQABSv1i8 + UINT64_C(245397504), // SQABSv2i32 + UINT64_C(1323333632), // SQABSv2i64 + UINT64_C(241203200), // SQABSv4i16 + UINT64_C(1319139328), // SQABSv4i32 + UINT64_C(1314945024), // SQABSv8i16 + UINT64_C(237008896), // SQABSv8i8 + UINT64_C(1310723072), // SQADDv16i8 + UINT64_C(1583352832), // SQADDv1i16 + UINT64_C(1587547136), // SQADDv1i32 + UINT64_C(1591741440), // SQADDv1i64 + UINT64_C(1579158528), // SQADDv1i8 + UINT64_C(245369856), // SQADDv2i32 + UINT64_C(1323305984), // SQADDv2i64 + UINT64_C(241175552), // SQADDv4i16 + UINT64_C(1319111680), // SQADDv4i32 + UINT64_C(1314917376), // SQADDv8i16 + UINT64_C(236981248), // SQADDv8i8 + UINT64_C(1583386624), // SQDMLALi16 + UINT64_C(1587580928), // SQDMLALi32 + UINT64_C(1598042112), // SQDMLALv1i32_indexed + UINT64_C(1602236416), // SQDMLALv1i64_indexed + UINT64_C(260059136), // SQDMLALv2i32_indexed + UINT64_C(245403648), // SQDMLALv2i32_v2i64 + UINT64_C(255864832), // SQDMLALv4i16_indexed + UINT64_C(241209344), // SQDMLALv4i16_v4i32 + UINT64_C(1333800960), // SQDMLALv4i32_indexed + UINT64_C(1319145472), // SQDMLALv4i32_v2i64 + UINT64_C(1329606656), // SQDMLALv8i16_indexed + UINT64_C(1314951168), // SQDMLALv8i16_v4i32 + UINT64_C(1583394816), // SQDMLSLi16 + UINT64_C(1587589120), // SQDMLSLi32 + UINT64_C(1598058496), // SQDMLSLv1i32_indexed + UINT64_C(1602252800), // SQDMLSLv1i64_indexed + UINT64_C(260075520), // SQDMLSLv2i32_indexed + UINT64_C(245411840), // SQDMLSLv2i32_v2i64 + UINT64_C(255881216), // SQDMLSLv4i16_indexed + UINT64_C(241217536), // SQDMLSLv4i16_v4i32 + UINT64_C(1333817344), // SQDMLSLv4i32_indexed + UINT64_C(1319153664), // SQDMLSLv4i32_v2i64 + UINT64_C(1329623040), // SQDMLSLv8i16_indexed + UINT64_C(1314959360), // SQDMLSLv8i16_v4i32 + UINT64_C(1583395840), // SQDMULHv1i16 + UINT64_C(1598078976), // SQDMULHv1i16_indexed + UINT64_C(1587590144), // SQDMULHv1i32 + UINT64_C(1602273280), // SQDMULHv1i32_indexed + UINT64_C(245412864), // SQDMULHv2i32 + UINT64_C(260096000), // SQDMULHv2i32_indexed + UINT64_C(241218560), // SQDMULHv4i16 + UINT64_C(255901696), // SQDMULHv4i16_indexed + UINT64_C(1319154688), // SQDMULHv4i32 + UINT64_C(1333837824), // SQDMULHv4i32_indexed + UINT64_C(1314960384), // SQDMULHv8i16 + UINT64_C(1329643520), // SQDMULHv8i16_indexed + UINT64_C(1583403008), // SQDMULLi16 + UINT64_C(1587597312), // SQDMULLi32 + UINT64_C(1598074880), // SQDMULLv1i32_indexed + UINT64_C(1602269184), // SQDMULLv1i64_indexed + UINT64_C(260091904), // SQDMULLv2i32_indexed + UINT64_C(245420032), // SQDMULLv2i32_v2i64 + UINT64_C(255897600), // SQDMULLv4i16_indexed + UINT64_C(241225728), // SQDMULLv4i16_v4i32 + UINT64_C(1333833728), // SQDMULLv4i32_indexed + UINT64_C(1319161856), // SQDMULLv4i32_v2i64 + UINT64_C(1329639424), // SQDMULLv8i16_indexed + UINT64_C(1314967552), // SQDMULLv8i16_v4i32 + UINT64_C(1847621632), // SQNEGv16i8 + UINT64_C(2120251392), // SQNEGv1i16 + UINT64_C(2124445696), // SQNEGv1i32 + UINT64_C(2128640000), // SQNEGv1i64 + UINT64_C(2116057088), // SQNEGv1i8 + UINT64_C(782268416), // SQNEGv2i32 + UINT64_C(1860204544), // SQNEGv2i64 + UINT64_C(778074112), // SQNEGv4i16 + UINT64_C(1856010240), // SQNEGv4i32 + UINT64_C(1851815936), // SQNEGv8i16 + UINT64_C(773879808), // SQNEGv8i8 + UINT64_C(2134953984), // SQRDMLAHi16_indexed + UINT64_C(2139148288), // SQRDMLAHi32_indexed + UINT64_C(2118157312), // SQRDMLAHv1i16 + UINT64_C(2122351616), // SQRDMLAHv1i32 + UINT64_C(780174336), // SQRDMLAHv2i32 + UINT64_C(796971008), // SQRDMLAHv2i32_indexed + UINT64_C(775980032), // SQRDMLAHv4i16 + UINT64_C(792776704), // SQRDMLAHv4i16_indexed + UINT64_C(1853916160), // SQRDMLAHv4i32 + UINT64_C(1870712832), // SQRDMLAHv4i32_indexed + UINT64_C(1849721856), // SQRDMLAHv8i16 + UINT64_C(1866518528), // SQRDMLAHv8i16_indexed + UINT64_C(2134962176), // SQRDMLSHi16_indexed + UINT64_C(2139156480), // SQRDMLSHi32_indexed + UINT64_C(2118159360), // SQRDMLSHv1i16 + UINT64_C(2122353664), // SQRDMLSHv1i32 + UINT64_C(780176384), // SQRDMLSHv2i32 + UINT64_C(796979200), // SQRDMLSHv2i32_indexed + UINT64_C(775982080), // SQRDMLSHv4i16 + UINT64_C(792784896), // SQRDMLSHv4i16_indexed + UINT64_C(1853918208), // SQRDMLSHv4i32 + UINT64_C(1870721024), // SQRDMLSHv4i32_indexed + UINT64_C(1849723904), // SQRDMLSHv8i16 + UINT64_C(1866526720), // SQRDMLSHv8i16_indexed + UINT64_C(2120266752), // SQRDMULHv1i16 + UINT64_C(1598083072), // SQRDMULHv1i16_indexed + UINT64_C(2124461056), // SQRDMULHv1i32 + UINT64_C(1602277376), // SQRDMULHv1i32_indexed + UINT64_C(782283776), // SQRDMULHv2i32 + UINT64_C(260100096), // SQRDMULHv2i32_indexed + UINT64_C(778089472), // SQRDMULHv4i16 + UINT64_C(255905792), // SQRDMULHv4i16_indexed + UINT64_C(1856025600), // SQRDMULHv4i32 + UINT64_C(1333841920), // SQRDMULHv4i32_indexed + UINT64_C(1851831296), // SQRDMULHv8i16 + UINT64_C(1329647616), // SQRDMULHv8i16_indexed + UINT64_C(1310743552), // SQRSHLv16i8 + UINT64_C(1583373312), // SQRSHLv1i16 + UINT64_C(1587567616), // SQRSHLv1i32 + UINT64_C(1591761920), // SQRSHLv1i64 + UINT64_C(1579179008), // SQRSHLv1i8 + UINT64_C(245390336), // SQRSHLv2i32 + UINT64_C(1323326464), // SQRSHLv2i64 + UINT64_C(241196032), // SQRSHLv4i16 + UINT64_C(1319132160), // SQRSHLv4i32 + UINT64_C(1314937856), // SQRSHLv8i16 + UINT64_C(237001728), // SQRSHLv8i8 + UINT64_C(1594399744), // SQRSHRNb + UINT64_C(1594924032), // SQRSHRNh + UINT64_C(1595972608), // SQRSHRNs + UINT64_C(1325964288), // SQRSHRNv16i8_shift + UINT64_C(253795328), // SQRSHRNv2i32_shift + UINT64_C(252746752), // SQRSHRNv4i16_shift + UINT64_C(1327537152), // SQRSHRNv4i32_shift + UINT64_C(1326488576), // SQRSHRNv8i16_shift + UINT64_C(252222464), // SQRSHRNv8i8_shift + UINT64_C(2131266560), // SQRSHRUNb + UINT64_C(2131790848), // SQRSHRUNh + UINT64_C(2132839424), // SQRSHRUNs + UINT64_C(1862831104), // SQRSHRUNv16i8_shift + UINT64_C(790662144), // SQRSHRUNv2i32_shift + UINT64_C(789613568), // SQRSHRUNv4i16_shift + UINT64_C(1864403968), // SQRSHRUNv4i32_shift + UINT64_C(1863355392), // SQRSHRUNv8i16_shift + UINT64_C(789089280), // SQRSHRUNv8i8_shift + UINT64_C(2131256320), // SQSHLUb + UINT64_C(2134926336), // SQSHLUd + UINT64_C(2131780608), // SQSHLUh + UINT64_C(2132829184), // SQSHLUs + UINT64_C(1862820864), // SQSHLUv16i8_shift + UINT64_C(790651904), // SQSHLUv2i32_shift + UINT64_C(1866490880), // SQSHLUv2i64_shift + UINT64_C(789603328), // SQSHLUv4i16_shift + UINT64_C(1864393728), // SQSHLUv4i32_shift + UINT64_C(1863345152), // SQSHLUv8i16_shift + UINT64_C(789079040), // SQSHLUv8i8_shift + UINT64_C(1594389504), // SQSHLb + UINT64_C(1598059520), // SQSHLd + UINT64_C(1594913792), // SQSHLh + UINT64_C(1595962368), // SQSHLs + UINT64_C(1310739456), // SQSHLv16i8 + UINT64_C(1325954048), // SQSHLv16i8_shift + UINT64_C(1583369216), // SQSHLv1i16 + UINT64_C(1587563520), // SQSHLv1i32 + UINT64_C(1591757824), // SQSHLv1i64 + UINT64_C(1579174912), // SQSHLv1i8 + UINT64_C(245386240), // SQSHLv2i32 + UINT64_C(253785088), // SQSHLv2i32_shift + UINT64_C(1323322368), // SQSHLv2i64 + UINT64_C(1329624064), // SQSHLv2i64_shift + UINT64_C(241191936), // SQSHLv4i16 + UINT64_C(252736512), // SQSHLv4i16_shift + UINT64_C(1319128064), // SQSHLv4i32 + UINT64_C(1327526912), // SQSHLv4i32_shift + UINT64_C(1314933760), // SQSHLv8i16 + UINT64_C(1326478336), // SQSHLv8i16_shift + UINT64_C(236997632), // SQSHLv8i8 + UINT64_C(252212224), // SQSHLv8i8_shift + UINT64_C(1594397696), // SQSHRNb + UINT64_C(1594921984), // SQSHRNh + UINT64_C(1595970560), // SQSHRNs + UINT64_C(1325962240), // SQSHRNv16i8_shift + UINT64_C(253793280), // SQSHRNv2i32_shift + UINT64_C(252744704), // SQSHRNv4i16_shift + UINT64_C(1327535104), // SQSHRNv4i32_shift + UINT64_C(1326486528), // SQSHRNv8i16_shift + UINT64_C(252220416), // SQSHRNv8i8_shift + UINT64_C(2131264512), // SQSHRUNb + UINT64_C(2131788800), // SQSHRUNh + UINT64_C(2132837376), // SQSHRUNs + UINT64_C(1862829056), // SQSHRUNv16i8_shift + UINT64_C(790660096), // SQSHRUNv2i32_shift + UINT64_C(789611520), // SQSHRUNv4i16_shift + UINT64_C(1864401920), // SQSHRUNv4i32_shift + UINT64_C(1863353344), // SQSHRUNv8i16_shift + UINT64_C(789087232), // SQSHRUNv8i8_shift + UINT64_C(1310731264), // SQSUBv16i8 + UINT64_C(1583361024), // SQSUBv1i16 + UINT64_C(1587555328), // SQSUBv1i32 + UINT64_C(1591749632), // SQSUBv1i64 + UINT64_C(1579166720), // SQSUBv1i8 + UINT64_C(245378048), // SQSUBv2i32 + UINT64_C(1323314176), // SQSUBv2i64 + UINT64_C(241183744), // SQSUBv4i16 + UINT64_C(1319119872), // SQSUBv4i32 + UINT64_C(1314925568), // SQSUBv8i16 + UINT64_C(236989440), // SQSUBv8i8 + UINT64_C(1310803968), // SQXTNv16i8 + UINT64_C(1583433728), // SQXTNv1i16 + UINT64_C(1587628032), // SQXTNv1i32 + UINT64_C(1579239424), // SQXTNv1i8 + UINT64_C(245450752), // SQXTNv2i32 + UINT64_C(241256448), // SQXTNv4i16 + UINT64_C(1319192576), // SQXTNv4i32 + UINT64_C(1314998272), // SQXTNv8i16 + UINT64_C(237062144), // SQXTNv8i8 + UINT64_C(1847666688), // SQXTUNv16i8 + UINT64_C(2120296448), // SQXTUNv1i16 + UINT64_C(2124490752), // SQXTUNv1i32 + UINT64_C(2116102144), // SQXTUNv1i8 + UINT64_C(782313472), // SQXTUNv2i32 + UINT64_C(778119168), // SQXTUNv4i16 + UINT64_C(1856055296), // SQXTUNv4i32 + UINT64_C(1851860992), // SQXTUNv8i16 + UINT64_C(773924864), // SQXTUNv8i8 + UINT64_C(1310725120), // SRHADDv16i8 + UINT64_C(245371904), // SRHADDv2i32 + UINT64_C(241177600), // SRHADDv4i16 + UINT64_C(1319113728), // SRHADDv4i32 + UINT64_C(1314919424), // SRHADDv8i16 + UINT64_C(236983296), // SRHADDv8i8 + UINT64_C(2134918144), // SRId + UINT64_C(1862812672), // SRIv16i8_shift + UINT64_C(790643712), // SRIv2i32_shift + UINT64_C(1866482688), // SRIv2i64_shift + UINT64_C(789595136), // SRIv4i16_shift + UINT64_C(1864385536), // SRIv4i32_shift + UINT64_C(1863336960), // SRIv8i16_shift + UINT64_C(789070848), // SRIv8i8_shift + UINT64_C(1310741504), // SRSHLv16i8 + UINT64_C(1591759872), // SRSHLv1i64 + UINT64_C(245388288), // SRSHLv2i32 + UINT64_C(1323324416), // SRSHLv2i64 + UINT64_C(241193984), // SRSHLv4i16 + UINT64_C(1319130112), // SRSHLv4i32 + UINT64_C(1314935808), // SRSHLv8i16 + UINT64_C(236999680), // SRSHLv8i8 + UINT64_C(1598039040), // SRSHRd + UINT64_C(1325933568), // SRSHRv16i8_shift + UINT64_C(253764608), // SRSHRv2i32_shift + UINT64_C(1329603584), // SRSHRv2i64_shift + UINT64_C(252716032), // SRSHRv4i16_shift + UINT64_C(1327506432), // SRSHRv4i32_shift + UINT64_C(1326457856), // SRSHRv8i16_shift + UINT64_C(252191744), // SRSHRv8i8_shift + UINT64_C(1598043136), // SRSRAd + UINT64_C(1325937664), // SRSRAv16i8_shift + UINT64_C(253768704), // SRSRAv2i32_shift + UINT64_C(1329607680), // SRSRAv2i64_shift + UINT64_C(252720128), // SRSRAv4i16_shift + UINT64_C(1327510528), // SRSRAv4i32_shift + UINT64_C(1326461952), // SRSRAv8i16_shift + UINT64_C(252195840), // SRSRAv8i8_shift + UINT64_C(1325966336), // SSHLLv16i8_shift + UINT64_C(253797376), // SSHLLv2i32_shift + UINT64_C(252748800), // SSHLLv4i16_shift + UINT64_C(1327539200), // SSHLLv4i32_shift + UINT64_C(1326490624), // SSHLLv8i16_shift + UINT64_C(252224512), // SSHLLv8i8_shift + UINT64_C(1310737408), // SSHLv16i8 + UINT64_C(1591755776), // SSHLv1i64 + UINT64_C(245384192), // SSHLv2i32 + UINT64_C(1323320320), // SSHLv2i64 + UINT64_C(241189888), // SSHLv4i16 + UINT64_C(1319126016), // SSHLv4i32 + UINT64_C(1314931712), // SSHLv8i16 + UINT64_C(236995584), // SSHLv8i8 + UINT64_C(1598030848), // SSHRd + UINT64_C(1325925376), // SSHRv16i8_shift + UINT64_C(253756416), // SSHRv2i32_shift + UINT64_C(1329595392), // SSHRv2i64_shift + UINT64_C(252707840), // SSHRv4i16_shift + UINT64_C(1327498240), // SSHRv4i32_shift + UINT64_C(1326449664), // SSHRv8i16_shift + UINT64_C(252183552), // SSHRv8i8_shift + UINT64_C(1598034944), // SSRAd + UINT64_C(1325929472), // SSRAv16i8_shift + UINT64_C(253760512), // SSRAv2i32_shift + UINT64_C(1329599488), // SSRAv2i64_shift + UINT64_C(252711936), // SSRAv4i16_shift + UINT64_C(1327502336), // SSRAv4i32_shift + UINT64_C(1326453760), // SSRAv8i16_shift + UINT64_C(252187648), // SSRAv8i8_shift + UINT64_C(1310728192), // SSUBLv16i8_v8i16 + UINT64_C(245374976), // SSUBLv2i32_v2i64 + UINT64_C(241180672), // SSUBLv4i16_v4i32 + UINT64_C(1319116800), // SSUBLv4i32_v2i64 + UINT64_C(1314922496), // SSUBLv8i16_v4i32 + UINT64_C(236986368), // SSUBLv8i8_v8i16 + UINT64_C(1310732288), // SSUBWv16i8_v8i16 + UINT64_C(245379072), // SSUBWv2i32_v2i64 + UINT64_C(241184768), // SSUBWv4i16_v4i32 + UINT64_C(1319120896), // SSUBWv4i32_v2i64 + UINT64_C(1314926592), // SSUBWv8i16_v4i32 + UINT64_C(236990464), // SSUBWv8i8_v8i16 + UINT64_C(1275076608), // ST1Fourv16b + UINT64_C(1283465216), // ST1Fourv16b_POST + UINT64_C(201337856), // ST1Fourv1d + UINT64_C(209726464), // ST1Fourv1d_POST + UINT64_C(1275079680), // ST1Fourv2d + UINT64_C(1283468288), // ST1Fourv2d_POST + UINT64_C(201336832), // ST1Fourv2s + UINT64_C(209725440), // ST1Fourv2s_POST + UINT64_C(201335808), // ST1Fourv4h + UINT64_C(209724416), // ST1Fourv4h_POST + UINT64_C(1275078656), // ST1Fourv4s + UINT64_C(1283467264), // ST1Fourv4s_POST + UINT64_C(201334784), // ST1Fourv8b + UINT64_C(209723392), // ST1Fourv8b_POST + UINT64_C(1275077632), // ST1Fourv8h + UINT64_C(1283466240), // ST1Fourv8h_POST + UINT64_C(1275097088), // ST1Onev16b + UINT64_C(1283485696), // ST1Onev16b_POST + UINT64_C(201358336), // ST1Onev1d + UINT64_C(209746944), // ST1Onev1d_POST + UINT64_C(1275100160), // ST1Onev2d + UINT64_C(1283488768), // ST1Onev2d_POST + UINT64_C(201357312), // ST1Onev2s + UINT64_C(209745920), // ST1Onev2s_POST + UINT64_C(201356288), // ST1Onev4h + UINT64_C(209744896), // ST1Onev4h_POST + UINT64_C(1275099136), // ST1Onev4s + UINT64_C(1283487744), // ST1Onev4s_POST + UINT64_C(201355264), // ST1Onev8b + UINT64_C(209743872), // ST1Onev8b_POST + UINT64_C(1275098112), // ST1Onev8h + UINT64_C(1283486720), // ST1Onev8h_POST + UINT64_C(1275092992), // ST1Threev16b + UINT64_C(1283481600), // ST1Threev16b_POST + UINT64_C(201354240), // ST1Threev1d + UINT64_C(209742848), // ST1Threev1d_POST + UINT64_C(1275096064), // ST1Threev2d + UINT64_C(1283484672), // ST1Threev2d_POST + UINT64_C(201353216), // ST1Threev2s + UINT64_C(209741824), // ST1Threev2s_POST + UINT64_C(201352192), // ST1Threev4h + UINT64_C(209740800), // ST1Threev4h_POST + UINT64_C(1275095040), // ST1Threev4s + UINT64_C(1283483648), // ST1Threev4s_POST + UINT64_C(201351168), // ST1Threev8b + UINT64_C(209739776), // ST1Threev8b_POST + UINT64_C(1275094016), // ST1Threev8h + UINT64_C(1283482624), // ST1Threev8h_POST + UINT64_C(1275109376), // ST1Twov16b + UINT64_C(1283497984), // ST1Twov16b_POST + UINT64_C(201370624), // ST1Twov1d + UINT64_C(209759232), // ST1Twov1d_POST + UINT64_C(1275112448), // ST1Twov2d + UINT64_C(1283501056), // ST1Twov2d_POST + UINT64_C(201369600), // ST1Twov2s + UINT64_C(209758208), // ST1Twov2s_POST + UINT64_C(201368576), // ST1Twov4h + UINT64_C(209757184), // ST1Twov4h_POST + UINT64_C(1275111424), // ST1Twov4s + UINT64_C(1283500032), // ST1Twov4s_POST + UINT64_C(201367552), // ST1Twov8b + UINT64_C(209756160), // ST1Twov8b_POST + UINT64_C(1275110400), // ST1Twov8h + UINT64_C(1283499008), // ST1Twov8h_POST + UINT64_C(218120192), // ST1i16 + UINT64_C(226508800), // ST1i16_POST + UINT64_C(218136576), // ST1i32 + UINT64_C(226525184), // ST1i32_POST + UINT64_C(218137600), // ST1i64 + UINT64_C(226526208), // ST1i64_POST + UINT64_C(218103808), // ST1i8 + UINT64_C(226492416), // ST1i8_POST + UINT64_C(1275101184), // ST2Twov16b + UINT64_C(1283489792), // ST2Twov16b_POST + UINT64_C(1275104256), // ST2Twov2d + UINT64_C(1283492864), // ST2Twov2d_POST + UINT64_C(201361408), // ST2Twov2s + UINT64_C(209750016), // ST2Twov2s_POST + UINT64_C(201360384), // ST2Twov4h + UINT64_C(209748992), // ST2Twov4h_POST + UINT64_C(1275103232), // ST2Twov4s + UINT64_C(1283491840), // ST2Twov4s_POST + UINT64_C(201359360), // ST2Twov8b + UINT64_C(209747968), // ST2Twov8b_POST + UINT64_C(1275102208), // ST2Twov8h + UINT64_C(1283490816), // ST2Twov8h_POST + UINT64_C(220217344), // ST2i16 + UINT64_C(228605952), // ST2i16_POST + UINT64_C(220233728), // ST2i32 + UINT64_C(228622336), // ST2i32_POST + UINT64_C(220234752), // ST2i64 + UINT64_C(228623360), // ST2i64_POST + UINT64_C(220200960), // ST2i8 + UINT64_C(228589568), // ST2i8_POST + UINT64_C(1275084800), // ST3Threev16b + UINT64_C(1283473408), // ST3Threev16b_POST + UINT64_C(1275087872), // ST3Threev2d + UINT64_C(1283476480), // ST3Threev2d_POST + UINT64_C(201345024), // ST3Threev2s + UINT64_C(209733632), // ST3Threev2s_POST + UINT64_C(201344000), // ST3Threev4h + UINT64_C(209732608), // ST3Threev4h_POST + UINT64_C(1275086848), // ST3Threev4s + UINT64_C(1283475456), // ST3Threev4s_POST + UINT64_C(201342976), // ST3Threev8b + UINT64_C(209731584), // ST3Threev8b_POST + UINT64_C(1275085824), // ST3Threev8h + UINT64_C(1283474432), // ST3Threev8h_POST + UINT64_C(218128384), // ST3i16 + UINT64_C(226516992), // ST3i16_POST + UINT64_C(218144768), // ST3i32 + UINT64_C(226533376), // ST3i32_POST + UINT64_C(218145792), // ST3i64 + UINT64_C(226534400), // ST3i64_POST + UINT64_C(218112000), // ST3i8 + UINT64_C(226500608), // ST3i8_POST + UINT64_C(1275068416), // ST4Fourv16b + UINT64_C(1283457024), // ST4Fourv16b_POST + UINT64_C(1275071488), // ST4Fourv2d + UINT64_C(1283460096), // ST4Fourv2d_POST + UINT64_C(201328640), // ST4Fourv2s + UINT64_C(209717248), // ST4Fourv2s_POST + UINT64_C(201327616), // ST4Fourv4h + UINT64_C(209716224), // ST4Fourv4h_POST + UINT64_C(1275070464), // ST4Fourv4s + UINT64_C(1283459072), // ST4Fourv4s_POST + UINT64_C(201326592), // ST4Fourv8b + UINT64_C(209715200), // ST4Fourv8b_POST + UINT64_C(1275069440), // ST4Fourv8h + UINT64_C(1283458048), // ST4Fourv8h_POST + UINT64_C(220225536), // ST4i16 + UINT64_C(228614144), // ST4i16_POST + UINT64_C(220241920), // ST4i32 + UINT64_C(228630528), // ST4i32_POST + UINT64_C(220242944), // ST4i64 + UINT64_C(228631552), // ST4i64_POST + UINT64_C(220209152), // ST4i8 + UINT64_C(228597760), // ST4i8_POST + UINT64_C(144669696), // STLLRB + UINT64_C(1218411520), // STLLRH + UINT64_C(2292153344), // STLLRW + UINT64_C(3365895168), // STLLRX + UINT64_C(144702464), // STLRB + UINT64_C(1218444288), // STLRH + UINT64_C(2292186112), // STLRW + UINT64_C(3365927936), // STLRX + UINT64_C(2283831296), // STLXPW + UINT64_C(3357573120), // STLXPX + UINT64_C(134250496), // STLXRB + UINT64_C(1207992320), // STLXRH + UINT64_C(2281734144), // STLXRW + UINT64_C(3355475968), // STLXRX + UINT64_C(1811939328), // STNPDi + UINT64_C(2885681152), // STNPQi + UINT64_C(738197504), // STNPSi + UINT64_C(671088640), // STNPWi + UINT64_C(2818572288), // STNPXi + UINT64_C(1828716544), // STPDi + UINT64_C(1820327936), // STPDpost + UINT64_C(1837105152), // STPDpre + UINT64_C(2902458368), // STPQi + UINT64_C(2894069760), // STPQpost + UINT64_C(2910846976), // STPQpre + UINT64_C(754974720), // STPSi + UINT64_C(746586112), // STPSpost + UINT64_C(763363328), // STPSpre + UINT64_C(687865856), // STPWi + UINT64_C(679477248), // STPWpost + UINT64_C(696254464), // STPWpre + UINT64_C(2835349504), // STPXi + UINT64_C(2826960896), // STPXpost + UINT64_C(2843738112), // STPXpre + UINT64_C(939525120), // STRBBpost + UINT64_C(939527168), // STRBBpre + UINT64_C(941639680), // STRBBroW + UINT64_C(941647872), // STRBBroX + UINT64_C(956301312), // STRBBui + UINT64_C(1006633984), // STRBpost + UINT64_C(1006636032), // STRBpre + UINT64_C(1008748544), // STRBroW + UINT64_C(1008756736), // STRBroX + UINT64_C(1023410176), // STRBui + UINT64_C(4227859456), // STRDpost + UINT64_C(4227861504), // STRDpre + UINT64_C(4229974016), // STRDroW + UINT64_C(4229982208), // STRDroX + UINT64_C(4244635648), // STRDui + UINT64_C(2013266944), // STRHHpost + UINT64_C(2013268992), // STRHHpre + UINT64_C(2015381504), // STRHHroW + UINT64_C(2015389696), // STRHHroX + UINT64_C(2030043136), // STRHHui + UINT64_C(2080375808), // STRHpost + UINT64_C(2080377856), // STRHpre + UINT64_C(2082490368), // STRHroW + UINT64_C(2082498560), // STRHroX + UINT64_C(2097152000), // STRHui + UINT64_C(1015022592), // STRQpost + UINT64_C(1015024640), // STRQpre + UINT64_C(1017137152), // STRQroW + UINT64_C(1017145344), // STRQroX + UINT64_C(1031798784), // STRQui + UINT64_C(3154117632), // STRSpost + UINT64_C(3154119680), // STRSpre + UINT64_C(3156232192), // STRSroW + UINT64_C(3156240384), // STRSroX + UINT64_C(3170893824), // STRSui + UINT64_C(3087008768), // STRWpost + UINT64_C(3087010816), // STRWpre + UINT64_C(3089123328), // STRWroW + UINT64_C(3089131520), // STRWroX + UINT64_C(3103784960), // STRWui + UINT64_C(4160750592), // STRXpost + UINT64_C(4160752640), // STRXpre + UINT64_C(4162865152), // STRXroW + UINT64_C(4162873344), // STRXroX + UINT64_C(4177526784), // STRXui + UINT64_C(939526144), // STTRBi + UINT64_C(2013267968), // STTRHi + UINT64_C(3087009792), // STTRWi + UINT64_C(4160751616), // STTRXi + UINT64_C(939524096), // STURBBi + UINT64_C(1006632960), // STURBi + UINT64_C(4227858432), // STURDi + UINT64_C(2013265920), // STURHHi + UINT64_C(2080374784), // STURHi + UINT64_C(1015021568), // STURQi + UINT64_C(3154116608), // STURSi + UINT64_C(3087007744), // STURWi + UINT64_C(4160749568), // STURXi + UINT64_C(2283798528), // STXPW + UINT64_C(3357540352), // STXPX + UINT64_C(134217728), // STXRB + UINT64_C(1207959552), // STXRH + UINT64_C(2281701376), // STXRW + UINT64_C(3355443200), // STXRX + UINT64_C(245391360), // SUBHNv2i64_v2i32 + UINT64_C(1319133184), // SUBHNv2i64_v4i32 + UINT64_C(241197056), // SUBHNv4i32_v4i16 + UINT64_C(1314938880), // SUBHNv4i32_v8i16 + UINT64_C(1310744576), // SUBHNv8i16_v16i8 + UINT64_C(237002752), // SUBHNv8i16_v8i8 + UINT64_C(1895825408), // SUBSWri + UINT64_C(0), // SUBSWrr + UINT64_C(1795162112), // SUBSWrs + UINT64_C(1797259264), // SUBSWrx + UINT64_C(4043309056), // SUBSXri + UINT64_C(0), // SUBSXrr + UINT64_C(3942645760), // SUBSXrs + UINT64_C(3944742912), // SUBSXrx + UINT64_C(3944767488), // SUBSXrx64 + UINT64_C(1358954496), // SUBWri + UINT64_C(0), // SUBWrr + UINT64_C(1258291200), // SUBWrs + UINT64_C(1260388352), // SUBWrx + UINT64_C(3506438144), // SUBXri + UINT64_C(0), // SUBXrr + UINT64_C(3405774848), // SUBXrs + UINT64_C(3407872000), // SUBXrx + UINT64_C(3407896576), // SUBXrx64 + UINT64_C(1847624704), // SUBv16i8 + UINT64_C(2128643072), // SUBv1i64 + UINT64_C(782271488), // SUBv2i32 + UINT64_C(1860207616), // SUBv2i64 + UINT64_C(778077184), // SUBv4i16 + UINT64_C(1856013312), // SUBv4i32 + UINT64_C(1851819008), // SUBv8i16 + UINT64_C(773882880), // SUBv8i8 + UINT64_C(1310734336), // SUQADDv16i8 + UINT64_C(1583364096), // SUQADDv1i16 + UINT64_C(1587558400), // SUQADDv1i32 + UINT64_C(1591752704), // SUQADDv1i64 + UINT64_C(1579169792), // SUQADDv1i8 + UINT64_C(245381120), // SUQADDv2i32 + UINT64_C(1323317248), // SUQADDv2i64 + UINT64_C(241186816), // SUQADDv4i16 + UINT64_C(1319122944), // SUQADDv4i32 + UINT64_C(1314928640), // SUQADDv8i16 + UINT64_C(236992512), // SUQADDv8i8 + UINT64_C(3556769793), // SVC + UINT64_C(954236928), // SWPALb + UINT64_C(4175462400), // SWPALd + UINT64_C(2027978752), // SWPALh + UINT64_C(3101720576), // SWPALs + UINT64_C(950042624), // SWPAb + UINT64_C(4171268096), // SWPAd + UINT64_C(2023784448), // SWPAh + UINT64_C(3097526272), // SWPAs + UINT64_C(945848320), // SWPLb + UINT64_C(4167073792), // SWPLd + UINT64_C(2019590144), // SWPLh + UINT64_C(3093331968), // SWPLs + UINT64_C(941654016), // SWPb + UINT64_C(4162879488), // SWPd + UINT64_C(2015395840), // SWPh + UINT64_C(3089137664), // SWPs + UINT64_C(3576168448), // SYSLxt + UINT64_C(3574071296), // SYSxt + UINT64_C(1308647424), // TBLv16i8Four + UINT64_C(1308622848), // TBLv16i8One + UINT64_C(1308639232), // TBLv16i8Three + UINT64_C(1308631040), // TBLv16i8Two + UINT64_C(234905600), // TBLv8i8Four + UINT64_C(234881024), // TBLv8i8One + UINT64_C(234897408), // TBLv8i8Three + UINT64_C(234889216), // TBLv8i8Two + UINT64_C(922746880), // TBNZW + UINT64_C(3070230528), // TBNZX + UINT64_C(1308651520), // TBXv16i8Four + UINT64_C(1308626944), // TBXv16i8One + UINT64_C(1308643328), // TBXv16i8Three + UINT64_C(1308635136), // TBXv16i8Two + UINT64_C(234909696), // TBXv8i8Four + UINT64_C(234885120), // TBXv8i8One + UINT64_C(234901504), // TBXv8i8Three + UINT64_C(234893312), // TBXv8i8Two + UINT64_C(905969664), // TBZW + UINT64_C(3053453312), // TBZX + UINT64_C(0), // TCRETURNdi + UINT64_C(0), // TCRETURNri + UINT64_C(0), // TLSDESCCALL + UINT64_C(0), // TLSDESC_CALLSEQ + UINT64_C(1308633088), // TRN1v16i8 + UINT64_C(243279872), // TRN1v2i32 + UINT64_C(1321216000), // TRN1v2i64 + UINT64_C(239085568), // TRN1v4i16 + UINT64_C(1317021696), // TRN1v4i32 + UINT64_C(1312827392), // TRN1v8i16 + UINT64_C(234891264), // TRN1v8i8 + UINT64_C(1308649472), // TRN2v16i8 + UINT64_C(243296256), // TRN2v2i32 + UINT64_C(1321232384), // TRN2v2i64 + UINT64_C(239101952), // TRN2v4i16 + UINT64_C(1317038080), // TRN2v4i32 + UINT64_C(1312843776), // TRN2v8i16 + UINT64_C(234907648), // TRN2v8i8 + UINT64_C(1847611392), // UABALv16i8_v8i16 + UINT64_C(782258176), // UABALv2i32_v2i64 + UINT64_C(778063872), // UABALv4i16_v4i32 + UINT64_C(1856000000), // UABALv4i32_v2i64 + UINT64_C(1851805696), // UABALv8i16_v4i32 + UINT64_C(773869568), // UABALv8i8_v8i16 + UINT64_C(1847622656), // UABAv16i8 + UINT64_C(782269440), // UABAv2i32 + UINT64_C(778075136), // UABAv4i16 + UINT64_C(1856011264), // UABAv4i32 + UINT64_C(1851816960), // UABAv8i16 + UINT64_C(773880832), // UABAv8i8 + UINT64_C(1847619584), // UABDLv16i8_v8i16 + UINT64_C(782266368), // UABDLv2i32_v2i64 + UINT64_C(778072064), // UABDLv4i16_v4i32 + UINT64_C(1856008192), // UABDLv4i32_v2i64 + UINT64_C(1851813888), // UABDLv8i16_v4i32 + UINT64_C(773877760), // UABDLv8i8_v8i16 + UINT64_C(1847620608), // UABDv16i8 + UINT64_C(782267392), // UABDv2i32 + UINT64_C(778073088), // UABDv4i16 + UINT64_C(1856009216), // UABDv4i32 + UINT64_C(1851814912), // UABDv8i16 + UINT64_C(773878784), // UABDv8i8 + UINT64_C(1847617536), // UADALPv16i8_v8i16 + UINT64_C(782264320), // UADALPv2i32_v1i64 + UINT64_C(778070016), // UADALPv4i16_v2i32 + UINT64_C(1856006144), // UADALPv4i32_v2i64 + UINT64_C(1851811840), // UADALPv8i16_v4i32 + UINT64_C(773875712), // UADALPv8i8_v4i16 + UINT64_C(1847601152), // UADDLPv16i8_v8i16 + UINT64_C(782247936), // UADDLPv2i32_v1i64 + UINT64_C(778053632), // UADDLPv4i16_v2i32 + UINT64_C(1855989760), // UADDLPv4i32_v2i64 + UINT64_C(1851795456), // UADDLPv8i16_v4i32 + UINT64_C(773859328), // UADDLPv8i8_v4i16 + UINT64_C(1848653824), // UADDLVv16i8v + UINT64_C(779106304), // UADDLVv4i16v + UINT64_C(1857042432), // UADDLVv4i32v + UINT64_C(1852848128), // UADDLVv8i16v + UINT64_C(774912000), // UADDLVv8i8v + UINT64_C(1847590912), // UADDLv16i8_v8i16 + UINT64_C(782237696), // UADDLv2i32_v2i64 + UINT64_C(778043392), // UADDLv4i16_v4i32 + UINT64_C(1855979520), // UADDLv4i32_v2i64 + UINT64_C(1851785216), // UADDLv8i16_v4i32 + UINT64_C(773849088), // UADDLv8i8_v8i16 + UINT64_C(1847595008), // UADDWv16i8_v8i16 + UINT64_C(782241792), // UADDWv2i32_v2i64 + UINT64_C(778047488), // UADDWv4i16_v4i32 + UINT64_C(1855983616), // UADDWv4i32_v2i64 + UINT64_C(1851789312), // UADDWv8i16_v4i32 + UINT64_C(773853184), // UADDWv8i8_v8i16 + UINT64_C(1392508928), // UBFMWri + UINT64_C(3544186880), // UBFMXri + UINT64_C(507740160), // UCVTFSWDri + UINT64_C(516128768), // UCVTFSWHri + UINT64_C(503545856), // UCVTFSWSri + UINT64_C(2655191040), // UCVTFSXDri + UINT64_C(2663579648), // UCVTFSXHri + UINT64_C(2650996736), // UCVTFSXSri + UINT64_C(509804544), // UCVTFUWDri + UINT64_C(518193152), // UCVTFUWHri + UINT64_C(505610240), // UCVTFUWSri + UINT64_C(2657288192), // UCVTFUXDri + UINT64_C(2665676800), // UCVTFUXHri + UINT64_C(2653093888), // UCVTFUXSri + UINT64_C(2134959104), // UCVTFd + UINT64_C(2131813376), // UCVTFh + UINT64_C(2132861952), // UCVTFs + UINT64_C(2121914368), // UCVTFv1i16 + UINT64_C(2116147200), // UCVTFv1i32 + UINT64_C(2120341504), // UCVTFv1i64 + UINT64_C(773969920), // UCVTFv2f32 + UINT64_C(1851906048), // UCVTFv2f64 + UINT64_C(790684672), // UCVTFv2i32_shift + UINT64_C(1866523648), // UCVTFv2i64_shift + UINT64_C(779737088), // UCVTFv4f16 + UINT64_C(1847711744), // UCVTFv4f32 + UINT64_C(789636096), // UCVTFv4i16_shift + UINT64_C(1864426496), // UCVTFv4i32_shift + UINT64_C(1853478912), // UCVTFv8f16 + UINT64_C(1863377920), // UCVTFv8i16_shift + UINT64_C(448792576), // UDIVWr + UINT64_C(2596276224), // UDIVXr + UINT64_C(448792576), // UDIV_IntWr + UINT64_C(2596276224), // UDIV_IntXr + UINT64_C(1847591936), // UHADDv16i8 + UINT64_C(782238720), // UHADDv2i32 + UINT64_C(778044416), // UHADDv4i16 + UINT64_C(1855980544), // UHADDv4i32 + UINT64_C(1851786240), // UHADDv8i16 + UINT64_C(773850112), // UHADDv8i8 + UINT64_C(1847600128), // UHSUBv16i8 + UINT64_C(782246912), // UHSUBv2i32 + UINT64_C(778052608), // UHSUBv4i16 + UINT64_C(1855988736), // UHSUBv4i32 + UINT64_C(1851794432), // UHSUBv8i16 + UINT64_C(773858304), // UHSUBv8i8 + UINT64_C(2610954240), // UMADDLrrr + UINT64_C(1847632896), // UMAXPv16i8 + UINT64_C(782279680), // UMAXPv2i32 + UINT64_C(778085376), // UMAXPv4i16 + UINT64_C(1856021504), // UMAXPv4i32 + UINT64_C(1851827200), // UMAXPv8i16 + UINT64_C(773891072), // UMAXPv8i8 + UINT64_C(1848682496), // UMAXVv16i8v + UINT64_C(779134976), // UMAXVv4i16v + UINT64_C(1857071104), // UMAXVv4i32v + UINT64_C(1852876800), // UMAXVv8i16v + UINT64_C(774940672), // UMAXVv8i8v + UINT64_C(1847616512), // UMAXv16i8 + UINT64_C(782263296), // UMAXv2i32 + UINT64_C(778068992), // UMAXv4i16 + UINT64_C(1856005120), // UMAXv4i32 + UINT64_C(1851810816), // UMAXv8i16 + UINT64_C(773874688), // UMAXv8i8 + UINT64_C(1847634944), // UMINPv16i8 + UINT64_C(782281728), // UMINPv2i32 + UINT64_C(778087424), // UMINPv4i16 + UINT64_C(1856023552), // UMINPv4i32 + UINT64_C(1851829248), // UMINPv8i16 + UINT64_C(773893120), // UMINPv8i8 + UINT64_C(1848748032), // UMINVv16i8v + UINT64_C(779200512), // UMINVv4i16v + UINT64_C(1857136640), // UMINVv4i32v + UINT64_C(1852942336), // UMINVv8i16v + UINT64_C(775006208), // UMINVv8i8v + UINT64_C(1847618560), // UMINv16i8 + UINT64_C(782265344), // UMINv2i32 + UINT64_C(778071040), // UMINv4i16 + UINT64_C(1856007168), // UMINv4i32 + UINT64_C(1851812864), // UMINv8i16 + UINT64_C(773876736), // UMINv8i8 + UINT64_C(1847623680), // UMLALv16i8_v8i16 + UINT64_C(796925952), // UMLALv2i32_indexed + UINT64_C(782270464), // UMLALv2i32_v2i64 + UINT64_C(792731648), // UMLALv4i16_indexed + UINT64_C(778076160), // UMLALv4i16_v4i32 + UINT64_C(1870667776), // UMLALv4i32_indexed + UINT64_C(1856012288), // UMLALv4i32_v2i64 + UINT64_C(1866473472), // UMLALv8i16_indexed + UINT64_C(1851817984), // UMLALv8i16_v4i32 + UINT64_C(773881856), // UMLALv8i8_v8i16 + UINT64_C(1847631872), // UMLSLv16i8_v8i16 + UINT64_C(796942336), // UMLSLv2i32_indexed + UINT64_C(782278656), // UMLSLv2i32_v2i64 + UINT64_C(792748032), // UMLSLv4i16_indexed + UINT64_C(778084352), // UMLSLv4i16_v4i32 + UINT64_C(1870684160), // UMLSLv4i32_indexed + UINT64_C(1856020480), // UMLSLv4i32_v2i64 + UINT64_C(1866489856), // UMLSLv8i16_indexed + UINT64_C(1851826176), // UMLSLv8i16_v4i32 + UINT64_C(773890048), // UMLSLv8i8_v8i16 + UINT64_C(235027456), // UMOVvi16 + UINT64_C(235158528), // UMOVvi32 + UINT64_C(1309162496), // UMOVvi64 + UINT64_C(234961920), // UMOVvi8 + UINT64_C(2610987008), // UMSUBLrrr + UINT64_C(2613051392), // UMULHrr + UINT64_C(1847640064), // UMULLv16i8_v8i16 + UINT64_C(796958720), // UMULLv2i32_indexed + UINT64_C(782286848), // UMULLv2i32_v2i64 + UINT64_C(792764416), // UMULLv4i16_indexed + UINT64_C(778092544), // UMULLv4i16_v4i32 + UINT64_C(1870700544), // UMULLv4i32_indexed + UINT64_C(1856028672), // UMULLv4i32_v2i64 + UINT64_C(1866506240), // UMULLv8i16_indexed + UINT64_C(1851834368), // UMULLv8i16_v4i32 + UINT64_C(773898240), // UMULLv8i8_v8i16 + UINT64_C(1847593984), // UQADDv16i8 + UINT64_C(2120223744), // UQADDv1i16 + UINT64_C(2124418048), // UQADDv1i32 + UINT64_C(2128612352), // UQADDv1i64 + UINT64_C(2116029440), // UQADDv1i8 + UINT64_C(782240768), // UQADDv2i32 + UINT64_C(1860176896), // UQADDv2i64 + UINT64_C(778046464), // UQADDv4i16 + UINT64_C(1855982592), // UQADDv4i32 + UINT64_C(1851788288), // UQADDv8i16 + UINT64_C(773852160), // UQADDv8i8 + UINT64_C(1847614464), // UQRSHLv16i8 + UINT64_C(2120244224), // UQRSHLv1i16 + UINT64_C(2124438528), // UQRSHLv1i32 + UINT64_C(2128632832), // UQRSHLv1i64 + UINT64_C(2116049920), // UQRSHLv1i8 + UINT64_C(782261248), // UQRSHLv2i32 + UINT64_C(1860197376), // UQRSHLv2i64 + UINT64_C(778066944), // UQRSHLv4i16 + UINT64_C(1856003072), // UQRSHLv4i32 + UINT64_C(1851808768), // UQRSHLv8i16 + UINT64_C(773872640), // UQRSHLv8i8 + UINT64_C(2131270656), // UQRSHRNb + UINT64_C(2131794944), // UQRSHRNh + UINT64_C(2132843520), // UQRSHRNs + UINT64_C(1862835200), // UQRSHRNv16i8_shift + UINT64_C(790666240), // UQRSHRNv2i32_shift + UINT64_C(789617664), // UQRSHRNv4i16_shift + UINT64_C(1864408064), // UQRSHRNv4i32_shift + UINT64_C(1863359488), // UQRSHRNv8i16_shift + UINT64_C(789093376), // UQRSHRNv8i8_shift + UINT64_C(2131260416), // UQSHLb + UINT64_C(2134930432), // UQSHLd + UINT64_C(2131784704), // UQSHLh + UINT64_C(2132833280), // UQSHLs + UINT64_C(1847610368), // UQSHLv16i8 + UINT64_C(1862824960), // UQSHLv16i8_shift + UINT64_C(2120240128), // UQSHLv1i16 + UINT64_C(2124434432), // UQSHLv1i32 + UINT64_C(2128628736), // UQSHLv1i64 + UINT64_C(2116045824), // UQSHLv1i8 + UINT64_C(782257152), // UQSHLv2i32 + UINT64_C(790656000), // UQSHLv2i32_shift + UINT64_C(1860193280), // UQSHLv2i64 + UINT64_C(1866494976), // UQSHLv2i64_shift + UINT64_C(778062848), // UQSHLv4i16 + UINT64_C(789607424), // UQSHLv4i16_shift + UINT64_C(1855998976), // UQSHLv4i32 + UINT64_C(1864397824), // UQSHLv4i32_shift + UINT64_C(1851804672), // UQSHLv8i16 + UINT64_C(1863349248), // UQSHLv8i16_shift + UINT64_C(773868544), // UQSHLv8i8 + UINT64_C(789083136), // UQSHLv8i8_shift + UINT64_C(2131268608), // UQSHRNb + UINT64_C(2131792896), // UQSHRNh + UINT64_C(2132841472), // UQSHRNs + UINT64_C(1862833152), // UQSHRNv16i8_shift + UINT64_C(790664192), // UQSHRNv2i32_shift + UINT64_C(789615616), // UQSHRNv4i16_shift + UINT64_C(1864406016), // UQSHRNv4i32_shift + UINT64_C(1863357440), // UQSHRNv8i16_shift + UINT64_C(789091328), // UQSHRNv8i8_shift + UINT64_C(1847602176), // UQSUBv16i8 + UINT64_C(2120231936), // UQSUBv1i16 + UINT64_C(2124426240), // UQSUBv1i32 + UINT64_C(2128620544), // UQSUBv1i64 + UINT64_C(2116037632), // UQSUBv1i8 + UINT64_C(782248960), // UQSUBv2i32 + UINT64_C(1860185088), // UQSUBv2i64 + UINT64_C(778054656), // UQSUBv4i16 + UINT64_C(1855990784), // UQSUBv4i32 + UINT64_C(1851796480), // UQSUBv8i16 + UINT64_C(773860352), // UQSUBv8i8 + UINT64_C(1847674880), // UQXTNv16i8 + UINT64_C(2120304640), // UQXTNv1i16 + UINT64_C(2124498944), // UQXTNv1i32 + UINT64_C(2116110336), // UQXTNv1i8 + UINT64_C(782321664), // UQXTNv2i32 + UINT64_C(778127360), // UQXTNv4i16 + UINT64_C(1856063488), // UQXTNv4i32 + UINT64_C(1851869184), // UQXTNv8i16 + UINT64_C(773933056), // UQXTNv8i8 + UINT64_C(245483520), // URECPEv2i32 + UINT64_C(1319225344), // URECPEv4i32 + UINT64_C(1847596032), // URHADDv16i8 + UINT64_C(782242816), // URHADDv2i32 + UINT64_C(778048512), // URHADDv4i16 + UINT64_C(1855984640), // URHADDv4i32 + UINT64_C(1851790336), // URHADDv8i16 + UINT64_C(773854208), // URHADDv8i8 + UINT64_C(1847612416), // URSHLv16i8 + UINT64_C(2128630784), // URSHLv1i64 + UINT64_C(782259200), // URSHLv2i32 + UINT64_C(1860195328), // URSHLv2i64 + UINT64_C(778064896), // URSHLv4i16 + UINT64_C(1856001024), // URSHLv4i32 + UINT64_C(1851806720), // URSHLv8i16 + UINT64_C(773870592), // URSHLv8i8 + UINT64_C(2134909952), // URSHRd + UINT64_C(1862804480), // URSHRv16i8_shift + UINT64_C(790635520), // URSHRv2i32_shift + UINT64_C(1866474496), // URSHRv2i64_shift + UINT64_C(789586944), // URSHRv4i16_shift + UINT64_C(1864377344), // URSHRv4i32_shift + UINT64_C(1863328768), // URSHRv8i16_shift + UINT64_C(789062656), // URSHRv8i8_shift + UINT64_C(782354432), // URSQRTEv2i32 + UINT64_C(1856096256), // URSQRTEv4i32 + UINT64_C(2134914048), // URSRAd + UINT64_C(1862808576), // URSRAv16i8_shift + UINT64_C(790639616), // URSRAv2i32_shift + UINT64_C(1866478592), // URSRAv2i64_shift + UINT64_C(789591040), // URSRAv4i16_shift + UINT64_C(1864381440), // URSRAv4i32_shift + UINT64_C(1863332864), // URSRAv8i16_shift + UINT64_C(789066752), // URSRAv8i8_shift + UINT64_C(1862837248), // USHLLv16i8_shift + UINT64_C(790668288), // USHLLv2i32_shift + UINT64_C(789619712), // USHLLv4i16_shift + UINT64_C(1864410112), // USHLLv4i32_shift + UINT64_C(1863361536), // USHLLv8i16_shift + UINT64_C(789095424), // USHLLv8i8_shift + UINT64_C(1847608320), // USHLv16i8 + UINT64_C(2128626688), // USHLv1i64 + UINT64_C(782255104), // USHLv2i32 + UINT64_C(1860191232), // USHLv2i64 + UINT64_C(778060800), // USHLv4i16 + UINT64_C(1855996928), // USHLv4i32 + UINT64_C(1851802624), // USHLv8i16 + UINT64_C(773866496), // USHLv8i8 + UINT64_C(2134901760), // USHRd + UINT64_C(1862796288), // USHRv16i8_shift + UINT64_C(790627328), // USHRv2i32_shift + UINT64_C(1866466304), // USHRv2i64_shift + UINT64_C(789578752), // USHRv4i16_shift + UINT64_C(1864369152), // USHRv4i32_shift + UINT64_C(1863320576), // USHRv8i16_shift + UINT64_C(789054464), // USHRv8i8_shift + UINT64_C(1847605248), // USQADDv16i8 + UINT64_C(2120235008), // USQADDv1i16 + UINT64_C(2124429312), // USQADDv1i32 + UINT64_C(2128623616), // USQADDv1i64 + UINT64_C(2116040704), // USQADDv1i8 + UINT64_C(782252032), // USQADDv2i32 + UINT64_C(1860188160), // USQADDv2i64 + UINT64_C(778057728), // USQADDv4i16 + UINT64_C(1855993856), // USQADDv4i32 + UINT64_C(1851799552), // USQADDv8i16 + UINT64_C(773863424), // USQADDv8i8 + UINT64_C(2134905856), // USRAd + UINT64_C(1862800384), // USRAv16i8_shift + UINT64_C(790631424), // USRAv2i32_shift + UINT64_C(1866470400), // USRAv2i64_shift + UINT64_C(789582848), // USRAv4i16_shift + UINT64_C(1864373248), // USRAv4i32_shift + UINT64_C(1863324672), // USRAv8i16_shift + UINT64_C(789058560), // USRAv8i8_shift + UINT64_C(1847599104), // USUBLv16i8_v8i16 + UINT64_C(782245888), // USUBLv2i32_v2i64 + UINT64_C(778051584), // USUBLv4i16_v4i32 + UINT64_C(1855987712), // USUBLv4i32_v2i64 + UINT64_C(1851793408), // USUBLv8i16_v4i32 + UINT64_C(773857280), // USUBLv8i8_v8i16 + UINT64_C(1847603200), // USUBWv16i8_v8i16 + UINT64_C(782249984), // USUBWv2i32_v2i64 + UINT64_C(778055680), // USUBWv4i16_v4i32 + UINT64_C(1855991808), // USUBWv4i32_v2i64 + UINT64_C(1851797504), // USUBWv8i16_v4i32 + UINT64_C(773861376), // USUBWv8i8_v8i16 + UINT64_C(1308628992), // UZP1v16i8 + UINT64_C(243275776), // UZP1v2i32 + UINT64_C(1321211904), // UZP1v2i64 + UINT64_C(239081472), // UZP1v4i16 + UINT64_C(1317017600), // UZP1v4i32 + UINT64_C(1312823296), // UZP1v8i16 + UINT64_C(234887168), // UZP1v8i8 + UINT64_C(1308645376), // UZP2v16i8 + UINT64_C(243292160), // UZP2v2i32 + UINT64_C(1321228288), // UZP2v2i64 + UINT64_C(239097856), // UZP2v4i16 + UINT64_C(1317033984), // UZP2v4i32 + UINT64_C(1312839680), // UZP2v8i16 + UINT64_C(234903552), // UZP2v8i8 + UINT64_C(1310795776), // XTNv16i8 + UINT64_C(245442560), // XTNv2i32 + UINT64_C(241248256), // XTNv4i16 + UINT64_C(1319184384), // XTNv4i32 + UINT64_C(1314990080), // XTNv8i16 + UINT64_C(237053952), // XTNv8i8 + UINT64_C(1308637184), // ZIP1v16i8 + UINT64_C(243283968), // ZIP1v2i32 + UINT64_C(1321220096), // ZIP1v2i64 + UINT64_C(239089664), // ZIP1v4i16 + UINT64_C(1317025792), // ZIP1v4i32 + UINT64_C(1312831488), // ZIP1v8i16 + UINT64_C(234895360), // ZIP1v8i8 + UINT64_C(1308653568), // ZIP2v16i8 + UINT64_C(243300352), // ZIP2v2i32 + UINT64_C(1321236480), // ZIP2v2i64 + UINT64_C(239106048), // ZIP2v4i16 + UINT64_C(1317042176), // ZIP2v4i32 + UINT64_C(1312847872), // ZIP2v8i16 + UINT64_C(234911744), // ZIP2v8i8 + UINT64_C(0) + }; + const unsigned opcode = MI.getOpcode(); + uint64_t Value = InstBits[opcode]; + uint64_t op = 0; + (void)op; // suppress warning + switch (opcode) { + case AArch64::ADDSWrr: + case AArch64::ADDSXrr: + case AArch64::ADDWrr: + case AArch64::ADDXrr: + case AArch64::ADJCALLSTACKDOWN: + case AArch64::ADJCALLSTACKUP: + case AArch64::ANDSWrr: + case AArch64::ANDSXrr: + case AArch64::ANDWrr: + case AArch64::ANDXrr: + case AArch64::BICSWrr: + case AArch64::BICSXrr: + case AArch64::BICWrr: + case AArch64::BICXrr: + case AArch64::DRPS: + case AArch64::EONWrr: + case AArch64::EONXrr: + case AArch64::EORWrr: + case AArch64::EORXrr: + case AArch64::ERET: + case AArch64::F128CSEL: + case AArch64::LOADgot: + case AArch64::MOVaddr: + case AArch64::MOVaddrBA: + case AArch64::MOVaddrCP: + case AArch64::MOVaddrEXT: + case AArch64::MOVaddrJT: + case AArch64::MOVaddrTLS: + case AArch64::MOVi32imm: + case AArch64::MOVi64imm: + case AArch64::ORNWrr: + case AArch64::ORNXrr: + case AArch64::ORRWrr: + case AArch64::ORRXrr: + case AArch64::RET_ReallyLR: + case AArch64::SUBSWrr: + case AArch64::SUBSXrr: + case AArch64::SUBWrr: + case AArch64::SUBXrr: + case AArch64::TCRETURNdi: + case AArch64::TCRETURNri: + case AArch64::TLSDESCCALL: + case AArch64::TLSDESC_CALLSEQ: { + break; + } + case AArch64::CLREX: + case AArch64::DMB: + case AArch64::DSB: + case AArch64::ISB: { + // op: CRm + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + break; + } + case AArch64::ABSv16i8: + case AArch64::ABSv1i64: + case AArch64::ABSv2i32: + case AArch64::ABSv2i64: + case AArch64::ABSv4i16: + case AArch64::ABSv4i32: + case AArch64::ABSv8i16: + case AArch64::ABSv8i8: + case AArch64::ADDPv2i64p: + case AArch64::ADDVv16i8v: + case AArch64::ADDVv4i16v: + case AArch64::ADDVv4i32v: + case AArch64::ADDVv8i16v: + case AArch64::ADDVv8i8v: + case AArch64::AESIMCrr: + case AArch64::AESMCrr: + case AArch64::CLSWr: + case AArch64::CLSXr: + case AArch64::CLSv16i8: + case AArch64::CLSv2i32: + case AArch64::CLSv4i16: + case AArch64::CLSv4i32: + case AArch64::CLSv8i16: + case AArch64::CLSv8i8: + case AArch64::CLZWr: + case AArch64::CLZXr: + case AArch64::CLZv16i8: + case AArch64::CLZv2i32: + case AArch64::CLZv4i16: + case AArch64::CLZv4i32: + case AArch64::CLZv8i16: + case AArch64::CLZv8i8: + case AArch64::CMEQv16i8rz: + case AArch64::CMEQv1i64rz: + case AArch64::CMEQv2i32rz: + case AArch64::CMEQv2i64rz: + case AArch64::CMEQv4i16rz: + case AArch64::CMEQv4i32rz: + case AArch64::CMEQv8i16rz: + case AArch64::CMEQv8i8rz: + case AArch64::CMGEv16i8rz: + case AArch64::CMGEv1i64rz: + case AArch64::CMGEv2i32rz: + case AArch64::CMGEv2i64rz: + case AArch64::CMGEv4i16rz: + case AArch64::CMGEv4i32rz: + case AArch64::CMGEv8i16rz: + case AArch64::CMGEv8i8rz: + case AArch64::CMGTv16i8rz: + case AArch64::CMGTv1i64rz: + case AArch64::CMGTv2i32rz: + case AArch64::CMGTv2i64rz: + case AArch64::CMGTv4i16rz: + case AArch64::CMGTv4i32rz: + case AArch64::CMGTv8i16rz: + case AArch64::CMGTv8i8rz: + case AArch64::CMLEv16i8rz: + case AArch64::CMLEv1i64rz: + case AArch64::CMLEv2i32rz: + case AArch64::CMLEv2i64rz: + case AArch64::CMLEv4i16rz: + case AArch64::CMLEv4i32rz: + case AArch64::CMLEv8i16rz: + case AArch64::CMLEv8i8rz: + case AArch64::CMLTv16i8rz: + case AArch64::CMLTv1i64rz: + case AArch64::CMLTv2i32rz: + case AArch64::CMLTv2i64rz: + case AArch64::CMLTv4i16rz: + case AArch64::CMLTv4i32rz: + case AArch64::CMLTv8i16rz: + case AArch64::CMLTv8i8rz: + case AArch64::CNTv16i8: + case AArch64::CNTv8i8: + case AArch64::DUPv16i8gpr: + case AArch64::DUPv2i32gpr: + case AArch64::DUPv2i64gpr: + case AArch64::DUPv4i16gpr: + case AArch64::DUPv4i32gpr: + case AArch64::DUPv8i16gpr: + case AArch64::DUPv8i8gpr: + case AArch64::FABSDr: + case AArch64::FABSHr: + case AArch64::FABSSr: + case AArch64::FABSv2f32: + case AArch64::FABSv2f64: + case AArch64::FABSv4f16: + case AArch64::FABSv4f32: + case AArch64::FABSv8f16: + case AArch64::FADDPv2i16p: + case AArch64::FADDPv2i32p: + case AArch64::FADDPv2i64p: + case AArch64::FCMEQv1i16rz: + case AArch64::FCMEQv1i32rz: + case AArch64::FCMEQv1i64rz: + case AArch64::FCMEQv2i32rz: + case AArch64::FCMEQv2i64rz: + case AArch64::FCMEQv4i16rz: + case AArch64::FCMEQv4i32rz: + case AArch64::FCMEQv8i16rz: + case AArch64::FCMGEv1i16rz: + case AArch64::FCMGEv1i32rz: + case AArch64::FCMGEv1i64rz: + case AArch64::FCMGEv2i32rz: + case AArch64::FCMGEv2i64rz: + case AArch64::FCMGEv4i16rz: + case AArch64::FCMGEv4i32rz: + case AArch64::FCMGEv8i16rz: + case AArch64::FCMGTv1i16rz: + case AArch64::FCMGTv1i32rz: + case AArch64::FCMGTv1i64rz: + case AArch64::FCMGTv2i32rz: + case AArch64::FCMGTv2i64rz: + case AArch64::FCMGTv4i16rz: + case AArch64::FCMGTv4i32rz: + case AArch64::FCMGTv8i16rz: + case AArch64::FCMLEv1i16rz: + case AArch64::FCMLEv1i32rz: + case AArch64::FCMLEv1i64rz: + case AArch64::FCMLEv2i32rz: + case AArch64::FCMLEv2i64rz: + case AArch64::FCMLEv4i16rz: + case AArch64::FCMLEv4i32rz: + case AArch64::FCMLEv8i16rz: + case AArch64::FCMLTv1i16rz: + case AArch64::FCMLTv1i32rz: + case AArch64::FCMLTv1i64rz: + case AArch64::FCMLTv2i32rz: + case AArch64::FCMLTv2i64rz: + case AArch64::FCMLTv4i16rz: + case AArch64::FCMLTv4i32rz: + case AArch64::FCMLTv8i16rz: + case AArch64::FCVTASUWDr: + case AArch64::FCVTASUWHr: + case AArch64::FCVTASUWSr: + case AArch64::FCVTASUXDr: + case AArch64::FCVTASUXHr: + case AArch64::FCVTASUXSr: + case AArch64::FCVTASv1f16: + case AArch64::FCVTASv1i32: + case AArch64::FCVTASv1i64: + case AArch64::FCVTASv2f32: + case AArch64::FCVTASv2f64: + case AArch64::FCVTASv4f16: + case AArch64::FCVTASv4f32: + case AArch64::FCVTASv8f16: + case AArch64::FCVTAUUWDr: + case AArch64::FCVTAUUWHr: + case AArch64::FCVTAUUWSr: + case AArch64::FCVTAUUXDr: + case AArch64::FCVTAUUXHr: + case AArch64::FCVTAUUXSr: + case AArch64::FCVTAUv1f16: + case AArch64::FCVTAUv1i32: + case AArch64::FCVTAUv1i64: + case AArch64::FCVTAUv2f32: + case AArch64::FCVTAUv2f64: + case AArch64::FCVTAUv4f16: + case AArch64::FCVTAUv4f32: + case AArch64::FCVTAUv8f16: + case AArch64::FCVTDHr: + case AArch64::FCVTDSr: + case AArch64::FCVTHDr: + case AArch64::FCVTHSr: + case AArch64::FCVTLv2i32: + case AArch64::FCVTLv4i16: + case AArch64::FCVTLv4i32: + case AArch64::FCVTLv8i16: + case AArch64::FCVTMSUWDr: + case AArch64::FCVTMSUWHr: + case AArch64::FCVTMSUWSr: + case AArch64::FCVTMSUXDr: + case AArch64::FCVTMSUXHr: + case AArch64::FCVTMSUXSr: + case AArch64::FCVTMSv1f16: + case AArch64::FCVTMSv1i32: + case AArch64::FCVTMSv1i64: + case AArch64::FCVTMSv2f32: + case AArch64::FCVTMSv2f64: + case AArch64::FCVTMSv4f16: + case AArch64::FCVTMSv4f32: + case AArch64::FCVTMSv8f16: + case AArch64::FCVTMUUWDr: + case AArch64::FCVTMUUWHr: + case AArch64::FCVTMUUWSr: + case AArch64::FCVTMUUXDr: + case AArch64::FCVTMUUXHr: + case AArch64::FCVTMUUXSr: + case AArch64::FCVTMUv1f16: + case AArch64::FCVTMUv1i32: + case AArch64::FCVTMUv1i64: + case AArch64::FCVTMUv2f32: + case AArch64::FCVTMUv2f64: + case AArch64::FCVTMUv4f16: + case AArch64::FCVTMUv4f32: + case AArch64::FCVTMUv8f16: + case AArch64::FCVTNSUWDr: + case AArch64::FCVTNSUWHr: + case AArch64::FCVTNSUWSr: + case AArch64::FCVTNSUXDr: + case AArch64::FCVTNSUXHr: + case AArch64::FCVTNSUXSr: + case AArch64::FCVTNSv1f16: + case AArch64::FCVTNSv1i32: + case AArch64::FCVTNSv1i64: + case AArch64::FCVTNSv2f32: + case AArch64::FCVTNSv2f64: + case AArch64::FCVTNSv4f16: + case AArch64::FCVTNSv4f32: + case AArch64::FCVTNSv8f16: + case AArch64::FCVTNUUWDr: + case AArch64::FCVTNUUWHr: + case AArch64::FCVTNUUWSr: + case AArch64::FCVTNUUXDr: + case AArch64::FCVTNUUXHr: + case AArch64::FCVTNUUXSr: + case AArch64::FCVTNUv1f16: + case AArch64::FCVTNUv1i32: + case AArch64::FCVTNUv1i64: + case AArch64::FCVTNUv2f32: + case AArch64::FCVTNUv2f64: + case AArch64::FCVTNUv4f16: + case AArch64::FCVTNUv4f32: + case AArch64::FCVTNUv8f16: + case AArch64::FCVTNv2i32: + case AArch64::FCVTNv4i16: + case AArch64::FCVTPSUWDr: + case AArch64::FCVTPSUWHr: + case AArch64::FCVTPSUWSr: + case AArch64::FCVTPSUXDr: + case AArch64::FCVTPSUXHr: + case AArch64::FCVTPSUXSr: + case AArch64::FCVTPSv1f16: + case AArch64::FCVTPSv1i32: + case AArch64::FCVTPSv1i64: + case AArch64::FCVTPSv2f32: + case AArch64::FCVTPSv2f64: + case AArch64::FCVTPSv4f16: + case AArch64::FCVTPSv4f32: + case AArch64::FCVTPSv8f16: + case AArch64::FCVTPUUWDr: + case AArch64::FCVTPUUWHr: + case AArch64::FCVTPUUWSr: + case AArch64::FCVTPUUXDr: + case AArch64::FCVTPUUXHr: + case AArch64::FCVTPUUXSr: + case AArch64::FCVTPUv1f16: + case AArch64::FCVTPUv1i32: + case AArch64::FCVTPUv1i64: + case AArch64::FCVTPUv2f32: + case AArch64::FCVTPUv2f64: + case AArch64::FCVTPUv4f16: + case AArch64::FCVTPUv4f32: + case AArch64::FCVTPUv8f16: + case AArch64::FCVTSDr: + case AArch64::FCVTSHr: + case AArch64::FCVTXNv1i64: + case AArch64::FCVTXNv2f32: + case AArch64::FCVTZSUWDr: + case AArch64::FCVTZSUWHr: + case AArch64::FCVTZSUWSr: + case AArch64::FCVTZSUXDr: + case AArch64::FCVTZSUXHr: + case AArch64::FCVTZSUXSr: + case AArch64::FCVTZS_IntUWDr: + case AArch64::FCVTZS_IntUWHr: + case AArch64::FCVTZS_IntUWSr: + case AArch64::FCVTZS_IntUXDr: + case AArch64::FCVTZS_IntUXHr: + case AArch64::FCVTZS_IntUXSr: + case AArch64::FCVTZS_Intv2f32: + case AArch64::FCVTZS_Intv2f64: + case AArch64::FCVTZS_Intv4f16: + case AArch64::FCVTZS_Intv4f32: + case AArch64::FCVTZS_Intv8f16: + case AArch64::FCVTZSv1f16: + case AArch64::FCVTZSv1i32: + case AArch64::FCVTZSv1i64: + case AArch64::FCVTZSv2f32: + case AArch64::FCVTZSv2f64: + case AArch64::FCVTZSv4f16: + case AArch64::FCVTZSv4f32: + case AArch64::FCVTZSv8f16: + case AArch64::FCVTZUUWDr: + case AArch64::FCVTZUUWHr: + case AArch64::FCVTZUUWSr: + case AArch64::FCVTZUUXDr: + case AArch64::FCVTZUUXHr: + case AArch64::FCVTZUUXSr: + case AArch64::FCVTZU_IntUWDr: + case AArch64::FCVTZU_IntUWHr: + case AArch64::FCVTZU_IntUWSr: + case AArch64::FCVTZU_IntUXDr: + case AArch64::FCVTZU_IntUXHr: + case AArch64::FCVTZU_IntUXSr: + case AArch64::FCVTZU_Intv2f32: + case AArch64::FCVTZU_Intv2f64: + case AArch64::FCVTZU_Intv4f16: + case AArch64::FCVTZU_Intv4f32: + case AArch64::FCVTZU_Intv8f16: + case AArch64::FCVTZUv1f16: + case AArch64::FCVTZUv1i32: + case AArch64::FCVTZUv1i64: + case AArch64::FCVTZUv2f32: + case AArch64::FCVTZUv2f64: + case AArch64::FCVTZUv4f16: + case AArch64::FCVTZUv4f32: + case AArch64::FCVTZUv8f16: + case AArch64::FMAXNMPv2i16p: + case AArch64::FMAXNMPv2i32p: + case AArch64::FMAXNMPv2i64p: + case AArch64::FMAXNMVv4i16v: + case AArch64::FMAXNMVv4i32v: + case AArch64::FMAXNMVv8i16v: + case AArch64::FMAXPv2i16p: + case AArch64::FMAXPv2i32p: + case AArch64::FMAXPv2i64p: + case AArch64::FMAXVv4i16v: + case AArch64::FMAXVv4i32v: + case AArch64::FMAXVv8i16v: + case AArch64::FMINNMPv2i16p: + case AArch64::FMINNMPv2i32p: + case AArch64::FMINNMPv2i64p: + case AArch64::FMINNMVv4i16v: + case AArch64::FMINNMVv4i32v: + case AArch64::FMINNMVv8i16v: + case AArch64::FMINPv2i16p: + case AArch64::FMINPv2i32p: + case AArch64::FMINPv2i64p: + case AArch64::FMINVv4i16v: + case AArch64::FMINVv4i32v: + case AArch64::FMINVv8i16v: + case AArch64::FMOVDXHighr: + case AArch64::FMOVDXr: + case AArch64::FMOVDr: + case AArch64::FMOVHWr: + case AArch64::FMOVHXr: + case AArch64::FMOVHr: + case AArch64::FMOVSWr: + case AArch64::FMOVSr: + case AArch64::FMOVWHr: + case AArch64::FMOVWSr: + case AArch64::FMOVXDHighr: + case AArch64::FMOVXDr: + case AArch64::FMOVXHr: + case AArch64::FNEGDr: + case AArch64::FNEGHr: + case AArch64::FNEGSr: + case AArch64::FNEGv2f32: + case AArch64::FNEGv2f64: + case AArch64::FNEGv4f16: + case AArch64::FNEGv4f32: + case AArch64::FNEGv8f16: + case AArch64::FRECPEv1f16: + case AArch64::FRECPEv1i32: + case AArch64::FRECPEv1i64: + case AArch64::FRECPEv2f32: + case AArch64::FRECPEv2f64: + case AArch64::FRECPEv4f16: + case AArch64::FRECPEv4f32: + case AArch64::FRECPEv8f16: + case AArch64::FRECPXv1f16: + case AArch64::FRECPXv1i32: + case AArch64::FRECPXv1i64: + case AArch64::FRINTADr: + case AArch64::FRINTAHr: + case AArch64::FRINTASr: + case AArch64::FRINTAv2f32: + case AArch64::FRINTAv2f64: + case AArch64::FRINTAv4f16: + case AArch64::FRINTAv4f32: + case AArch64::FRINTAv8f16: + case AArch64::FRINTIDr: + case AArch64::FRINTIHr: + case AArch64::FRINTISr: + case AArch64::FRINTIv2f32: + case AArch64::FRINTIv2f64: + case AArch64::FRINTIv4f16: + case AArch64::FRINTIv4f32: + case AArch64::FRINTIv8f16: + case AArch64::FRINTMDr: + case AArch64::FRINTMHr: + case AArch64::FRINTMSr: + case AArch64::FRINTMv2f32: + case AArch64::FRINTMv2f64: + case AArch64::FRINTMv4f16: + case AArch64::FRINTMv4f32: + case AArch64::FRINTMv8f16: + case AArch64::FRINTNDr: + case AArch64::FRINTNHr: + case AArch64::FRINTNSr: + case AArch64::FRINTNv2f32: + case AArch64::FRINTNv2f64: + case AArch64::FRINTNv4f16: + case AArch64::FRINTNv4f32: + case AArch64::FRINTNv8f16: + case AArch64::FRINTPDr: + case AArch64::FRINTPHr: + case AArch64::FRINTPSr: + case AArch64::FRINTPv2f32: + case AArch64::FRINTPv2f64: + case AArch64::FRINTPv4f16: + case AArch64::FRINTPv4f32: + case AArch64::FRINTPv8f16: + case AArch64::FRINTXDr: + case AArch64::FRINTXHr: + case AArch64::FRINTXSr: + case AArch64::FRINTXv2f32: + case AArch64::FRINTXv2f64: + case AArch64::FRINTXv4f16: + case AArch64::FRINTXv4f32: + case AArch64::FRINTXv8f16: + case AArch64::FRINTZDr: + case AArch64::FRINTZHr: + case AArch64::FRINTZSr: + case AArch64::FRINTZv2f32: + case AArch64::FRINTZv2f64: + case AArch64::FRINTZv4f16: + case AArch64::FRINTZv4f32: + case AArch64::FRINTZv8f16: + case AArch64::FRSQRTEv1f16: + case AArch64::FRSQRTEv1i32: + case AArch64::FRSQRTEv1i64: + case AArch64::FRSQRTEv2f32: + case AArch64::FRSQRTEv2f64: + case AArch64::FRSQRTEv4f16: + case AArch64::FRSQRTEv4f32: + case AArch64::FRSQRTEv8f16: + case AArch64::FSQRTDr: + case AArch64::FSQRTHr: + case AArch64::FSQRTSr: + case AArch64::FSQRTv2f32: + case AArch64::FSQRTv2f64: + case AArch64::FSQRTv4f16: + case AArch64::FSQRTv4f32: + case AArch64::FSQRTv8f16: + case AArch64::NEGv16i8: + case AArch64::NEGv1i64: + case AArch64::NEGv2i32: + case AArch64::NEGv2i64: + case AArch64::NEGv4i16: + case AArch64::NEGv4i32: + case AArch64::NEGv8i16: + case AArch64::NEGv8i8: + case AArch64::NOTv16i8: + case AArch64::NOTv8i8: + case AArch64::RBITWr: + case AArch64::RBITXr: + case AArch64::RBITv16i8: + case AArch64::RBITv8i8: + case AArch64::REV16Wr: + case AArch64::REV16Xr: + case AArch64::REV16v16i8: + case AArch64::REV16v8i8: + case AArch64::REV32Xr: + case AArch64::REV32v16i8: + case AArch64::REV32v4i16: + case AArch64::REV32v8i16: + case AArch64::REV32v8i8: + case AArch64::REV64v16i8: + case AArch64::REV64v2i32: + case AArch64::REV64v4i16: + case AArch64::REV64v4i32: + case AArch64::REV64v8i16: + case AArch64::REV64v8i8: + case AArch64::REVWr: + case AArch64::REVXr: + case AArch64::SADDLPv16i8_v8i16: + case AArch64::SADDLPv2i32_v1i64: + case AArch64::SADDLPv4i16_v2i32: + case AArch64::SADDLPv4i32_v2i64: + case AArch64::SADDLPv8i16_v4i32: + case AArch64::SADDLPv8i8_v4i16: + case AArch64::SADDLVv16i8v: + case AArch64::SADDLVv4i16v: + case AArch64::SADDLVv4i32v: + case AArch64::SADDLVv8i16v: + case AArch64::SADDLVv8i8v: + case AArch64::SCVTFUWDri: + case AArch64::SCVTFUWHri: + case AArch64::SCVTFUWSri: + case AArch64::SCVTFUXDri: + case AArch64::SCVTFUXHri: + case AArch64::SCVTFUXSri: + case AArch64::SCVTFv1i16: + case AArch64::SCVTFv1i32: + case AArch64::SCVTFv1i64: + case AArch64::SCVTFv2f32: + case AArch64::SCVTFv2f64: + case AArch64::SCVTFv4f16: + case AArch64::SCVTFv4f32: + case AArch64::SCVTFv8f16: + case AArch64::SHA1Hrr: + case AArch64::SHLLv16i8: + case AArch64::SHLLv2i32: + case AArch64::SHLLv4i16: + case AArch64::SHLLv4i32: + case AArch64::SHLLv8i16: + case AArch64::SHLLv8i8: + case AArch64::SMAXVv16i8v: + case AArch64::SMAXVv4i16v: + case AArch64::SMAXVv4i32v: + case AArch64::SMAXVv8i16v: + case AArch64::SMAXVv8i8v: + case AArch64::SMINVv16i8v: + case AArch64::SMINVv4i16v: + case AArch64::SMINVv4i32v: + case AArch64::SMINVv8i16v: + case AArch64::SMINVv8i8v: + case AArch64::SQABSv16i8: + case AArch64::SQABSv1i16: + case AArch64::SQABSv1i32: + case AArch64::SQABSv1i64: + case AArch64::SQABSv1i8: + case AArch64::SQABSv2i32: + case AArch64::SQABSv2i64: + case AArch64::SQABSv4i16: + case AArch64::SQABSv4i32: + case AArch64::SQABSv8i16: + case AArch64::SQABSv8i8: + case AArch64::SQNEGv16i8: + case AArch64::SQNEGv1i16: + case AArch64::SQNEGv1i32: + case AArch64::SQNEGv1i64: + case AArch64::SQNEGv1i8: + case AArch64::SQNEGv2i32: + case AArch64::SQNEGv2i64: + case AArch64::SQNEGv4i16: + case AArch64::SQNEGv4i32: + case AArch64::SQNEGv8i16: + case AArch64::SQNEGv8i8: + case AArch64::SQXTNv1i16: + case AArch64::SQXTNv1i32: + case AArch64::SQXTNv1i8: + case AArch64::SQXTNv2i32: + case AArch64::SQXTNv4i16: + case AArch64::SQXTNv8i8: + case AArch64::SQXTUNv1i16: + case AArch64::SQXTUNv1i32: + case AArch64::SQXTUNv1i8: + case AArch64::SQXTUNv2i32: + case AArch64::SQXTUNv4i16: + case AArch64::SQXTUNv8i8: + case AArch64::UADDLPv16i8_v8i16: + case AArch64::UADDLPv2i32_v1i64: + case AArch64::UADDLPv4i16_v2i32: + case AArch64::UADDLPv4i32_v2i64: + case AArch64::UADDLPv8i16_v4i32: + case AArch64::UADDLPv8i8_v4i16: + case AArch64::UADDLVv16i8v: + case AArch64::UADDLVv4i16v: + case AArch64::UADDLVv4i32v: + case AArch64::UADDLVv8i16v: + case AArch64::UADDLVv8i8v: + case AArch64::UCVTFUWDri: + case AArch64::UCVTFUWHri: + case AArch64::UCVTFUWSri: + case AArch64::UCVTFUXDri: + case AArch64::UCVTFUXHri: + case AArch64::UCVTFUXSri: + case AArch64::UCVTFv1i16: + case AArch64::UCVTFv1i32: + case AArch64::UCVTFv1i64: + case AArch64::UCVTFv2f32: + case AArch64::UCVTFv2f64: + case AArch64::UCVTFv4f16: + case AArch64::UCVTFv4f32: + case AArch64::UCVTFv8f16: + case AArch64::UMAXVv16i8v: + case AArch64::UMAXVv4i16v: + case AArch64::UMAXVv4i32v: + case AArch64::UMAXVv8i16v: + case AArch64::UMAXVv8i8v: + case AArch64::UMINVv16i8v: + case AArch64::UMINVv4i16v: + case AArch64::UMINVv4i32v: + case AArch64::UMINVv8i16v: + case AArch64::UMINVv8i8v: + case AArch64::UQXTNv1i16: + case AArch64::UQXTNv1i32: + case AArch64::UQXTNv1i8: + case AArch64::UQXTNv2i32: + case AArch64::UQXTNv4i16: + case AArch64::UQXTNv8i8: + case AArch64::URECPEv2i32: + case AArch64::URECPEv4i32: + case AArch64::URSQRTEv2i32: + case AArch64::URSQRTEv4i32: + case AArch64::XTNv2i32: + case AArch64::XTNv4i16: + case AArch64::XTNv8i8: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + break; + } + case AArch64::FMULXv1i16_indexed: + case AArch64::FMULXv4i16_indexed: + case AArch64::FMULXv8i16_indexed: + case AArch64::FMULv1i16_indexed: + case AArch64::FMULv4i16_indexed: + case AArch64::FMULv8i16_indexed: + case AArch64::MULv4i16_indexed: + case AArch64::MULv8i16_indexed: + case AArch64::SMULLv4i16_indexed: + case AArch64::SMULLv8i16_indexed: + case AArch64::SQDMULHv1i16_indexed: + case AArch64::SQDMULHv4i16_indexed: + case AArch64::SQDMULHv8i16_indexed: + case AArch64::SQDMULLv1i32_indexed: + case AArch64::SQDMULLv4i16_indexed: + case AArch64::SQDMULLv8i16_indexed: + case AArch64::SQRDMULHv1i16_indexed: + case AArch64::SQRDMULHv4i16_indexed: + case AArch64::SQRDMULHv8i16_indexed: + case AArch64::UMULLv4i16_indexed: + case AArch64::UMULLv8i16_indexed: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(3)) << 20; + Value |= (op & UINT64_C(4)) << 9; + break; + } + case AArch64::ADCSWr: + case AArch64::ADCSXr: + case AArch64::ADCWr: + case AArch64::ADCXr: + case AArch64::ADDHNv2i64_v2i32: + case AArch64::ADDHNv4i32_v4i16: + case AArch64::ADDHNv8i16_v8i8: + case AArch64::ADDPv16i8: + case AArch64::ADDPv2i32: + case AArch64::ADDPv2i64: + case AArch64::ADDPv4i16: + case AArch64::ADDPv4i32: + case AArch64::ADDPv8i16: + case AArch64::ADDPv8i8: + case AArch64::ADDv16i8: + case AArch64::ADDv1i64: + case AArch64::ADDv2i32: + case AArch64::ADDv2i64: + case AArch64::ADDv4i16: + case AArch64::ADDv4i32: + case AArch64::ADDv8i16: + case AArch64::ADDv8i8: + case AArch64::ANDv16i8: + case AArch64::ANDv8i8: + case AArch64::ASRVWr: + case AArch64::ASRVXr: + case AArch64::BICv16i8: + case AArch64::BICv8i8: + case AArch64::BIFv16i8: + case AArch64::BIFv8i8: + case AArch64::CMEQv16i8: + case AArch64::CMEQv1i64: + case AArch64::CMEQv2i32: + case AArch64::CMEQv2i64: + case AArch64::CMEQv4i16: + case AArch64::CMEQv4i32: + case AArch64::CMEQv8i16: + case AArch64::CMEQv8i8: + case AArch64::CMGEv16i8: + case AArch64::CMGEv1i64: + case AArch64::CMGEv2i32: + case AArch64::CMGEv2i64: + case AArch64::CMGEv4i16: + case AArch64::CMGEv4i32: + case AArch64::CMGEv8i16: + case AArch64::CMGEv8i8: + case AArch64::CMGTv16i8: + case AArch64::CMGTv1i64: + case AArch64::CMGTv2i32: + case AArch64::CMGTv2i64: + case AArch64::CMGTv4i16: + case AArch64::CMGTv4i32: + case AArch64::CMGTv8i16: + case AArch64::CMGTv8i8: + case AArch64::CMHIv16i8: + case AArch64::CMHIv1i64: + case AArch64::CMHIv2i32: + case AArch64::CMHIv2i64: + case AArch64::CMHIv4i16: + case AArch64::CMHIv4i32: + case AArch64::CMHIv8i16: + case AArch64::CMHIv8i8: + case AArch64::CMHSv16i8: + case AArch64::CMHSv1i64: + case AArch64::CMHSv2i32: + case AArch64::CMHSv2i64: + case AArch64::CMHSv4i16: + case AArch64::CMHSv4i32: + case AArch64::CMHSv8i16: + case AArch64::CMHSv8i8: + case AArch64::CMTSTv16i8: + case AArch64::CMTSTv1i64: + case AArch64::CMTSTv2i32: + case AArch64::CMTSTv2i64: + case AArch64::CMTSTv4i16: + case AArch64::CMTSTv4i32: + case AArch64::CMTSTv8i16: + case AArch64::CMTSTv8i8: + case AArch64::CRC32Brr: + case AArch64::CRC32CBrr: + case AArch64::CRC32CHrr: + case AArch64::CRC32CWrr: + case AArch64::CRC32CXrr: + case AArch64::CRC32Hrr: + case AArch64::CRC32Wrr: + case AArch64::CRC32Xrr: + case AArch64::EORv16i8: + case AArch64::EORv8i8: + case AArch64::FABD16: + case AArch64::FABD32: + case AArch64::FABD64: + case AArch64::FABDv2f32: + case AArch64::FABDv2f64: + case AArch64::FABDv4f16: + case AArch64::FABDv4f32: + case AArch64::FABDv8f16: + case AArch64::FACGE16: + case AArch64::FACGE32: + case AArch64::FACGE64: + case AArch64::FACGEv2f32: + case AArch64::FACGEv2f64: + case AArch64::FACGEv4f16: + case AArch64::FACGEv4f32: + case AArch64::FACGEv8f16: + case AArch64::FACGT16: + case AArch64::FACGT32: + case AArch64::FACGT64: + case AArch64::FACGTv2f32: + case AArch64::FACGTv2f64: + case AArch64::FACGTv4f16: + case AArch64::FACGTv4f32: + case AArch64::FACGTv8f16: + case AArch64::FADDDrr: + case AArch64::FADDHrr: + case AArch64::FADDPv2f32: + case AArch64::FADDPv2f64: + case AArch64::FADDPv4f16: + case AArch64::FADDPv4f32: + case AArch64::FADDPv8f16: + case AArch64::FADDSrr: + case AArch64::FADDv2f32: + case AArch64::FADDv2f64: + case AArch64::FADDv4f16: + case AArch64::FADDv4f32: + case AArch64::FADDv8f16: + case AArch64::FCMEQ16: + case AArch64::FCMEQ32: + case AArch64::FCMEQ64: + case AArch64::FCMEQv2f32: + case AArch64::FCMEQv2f64: + case AArch64::FCMEQv4f16: + case AArch64::FCMEQv4f32: + case AArch64::FCMEQv8f16: + case AArch64::FCMGE16: + case AArch64::FCMGE32: + case AArch64::FCMGE64: + case AArch64::FCMGEv2f32: + case AArch64::FCMGEv2f64: + case AArch64::FCMGEv4f16: + case AArch64::FCMGEv4f32: + case AArch64::FCMGEv8f16: + case AArch64::FCMGT16: + case AArch64::FCMGT32: + case AArch64::FCMGT64: + case AArch64::FCMGTv2f32: + case AArch64::FCMGTv2f64: + case AArch64::FCMGTv4f16: + case AArch64::FCMGTv4f32: + case AArch64::FCMGTv8f16: + case AArch64::FDIVDrr: + case AArch64::FDIVHrr: + case AArch64::FDIVSrr: + case AArch64::FDIVv2f32: + case AArch64::FDIVv2f64: + case AArch64::FDIVv4f16: + case AArch64::FDIVv4f32: + case AArch64::FDIVv8f16: + case AArch64::FMAXDrr: + case AArch64::FMAXHrr: + case AArch64::FMAXNMDrr: + case AArch64::FMAXNMHrr: + case AArch64::FMAXNMPv2f32: + case AArch64::FMAXNMPv2f64: + case AArch64::FMAXNMPv4f16: + case AArch64::FMAXNMPv4f32: + case AArch64::FMAXNMPv8f16: + case AArch64::FMAXNMSrr: + case AArch64::FMAXNMv2f32: + case AArch64::FMAXNMv2f64: + case AArch64::FMAXNMv4f16: + case AArch64::FMAXNMv4f32: + case AArch64::FMAXNMv8f16: + case AArch64::FMAXPv2f32: + case AArch64::FMAXPv2f64: + case AArch64::FMAXPv4f16: + case AArch64::FMAXPv4f32: + case AArch64::FMAXPv8f16: + case AArch64::FMAXSrr: + case AArch64::FMAXv2f32: + case AArch64::FMAXv2f64: + case AArch64::FMAXv4f16: + case AArch64::FMAXv4f32: + case AArch64::FMAXv8f16: + case AArch64::FMINDrr: + case AArch64::FMINHrr: + case AArch64::FMINNMDrr: + case AArch64::FMINNMHrr: + case AArch64::FMINNMPv2f32: + case AArch64::FMINNMPv2f64: + case AArch64::FMINNMPv4f16: + case AArch64::FMINNMPv4f32: + case AArch64::FMINNMPv8f16: + case AArch64::FMINNMSrr: + case AArch64::FMINNMv2f32: + case AArch64::FMINNMv2f64: + case AArch64::FMINNMv4f16: + case AArch64::FMINNMv4f32: + case AArch64::FMINNMv8f16: + case AArch64::FMINPv2f32: + case AArch64::FMINPv2f64: + case AArch64::FMINPv4f16: + case AArch64::FMINPv4f32: + case AArch64::FMINPv8f16: + case AArch64::FMINSrr: + case AArch64::FMINv2f32: + case AArch64::FMINv2f64: + case AArch64::FMINv4f16: + case AArch64::FMINv4f32: + case AArch64::FMINv8f16: + case AArch64::FMULDrr: + case AArch64::FMULHrr: + case AArch64::FMULSrr: + case AArch64::FMULX16: + case AArch64::FMULX32: + case AArch64::FMULX64: + case AArch64::FMULXv2f32: + case AArch64::FMULXv2f64: + case AArch64::FMULXv4f16: + case AArch64::FMULXv4f32: + case AArch64::FMULXv8f16: + case AArch64::FMULv2f32: + case AArch64::FMULv2f64: + case AArch64::FMULv4f16: + case AArch64::FMULv4f32: + case AArch64::FMULv8f16: + case AArch64::FNMULDrr: + case AArch64::FNMULHrr: + case AArch64::FNMULSrr: + case AArch64::FRECPS16: + case AArch64::FRECPS32: + case AArch64::FRECPS64: + case AArch64::FRECPSv2f32: + case AArch64::FRECPSv2f64: + case AArch64::FRECPSv4f16: + case AArch64::FRECPSv4f32: + case AArch64::FRECPSv8f16: + case AArch64::FRSQRTS16: + case AArch64::FRSQRTS32: + case AArch64::FRSQRTS64: + case AArch64::FRSQRTSv2f32: + case AArch64::FRSQRTSv2f64: + case AArch64::FRSQRTSv4f16: + case AArch64::FRSQRTSv4f32: + case AArch64::FRSQRTSv8f16: + case AArch64::FSUBDrr: + case AArch64::FSUBHrr: + case AArch64::FSUBSrr: + case AArch64::FSUBv2f32: + case AArch64::FSUBv2f64: + case AArch64::FSUBv4f16: + case AArch64::FSUBv4f32: + case AArch64::FSUBv8f16: + case AArch64::LSLVWr: + case AArch64::LSLVXr: + case AArch64::LSRVWr: + case AArch64::LSRVXr: + case AArch64::MULv16i8: + case AArch64::MULv2i32: + case AArch64::MULv4i16: + case AArch64::MULv4i32: + case AArch64::MULv8i16: + case AArch64::MULv8i8: + case AArch64::ORNv16i8: + case AArch64::ORNv8i8: + case AArch64::ORRv16i8: + case AArch64::ORRv8i8: + case AArch64::PMULLv16i8: + case AArch64::PMULLv1i64: + case AArch64::PMULLv2i64: + case AArch64::PMULLv8i8: + case AArch64::PMULv16i8: + case AArch64::PMULv8i8: + case AArch64::RADDHNv2i64_v2i32: + case AArch64::RADDHNv4i32_v4i16: + case AArch64::RADDHNv8i16_v8i8: + case AArch64::RORVWr: + case AArch64::RORVXr: + case AArch64::RSUBHNv2i64_v2i32: + case AArch64::RSUBHNv4i32_v4i16: + case AArch64::RSUBHNv8i16_v8i8: + case AArch64::SABDLv16i8_v8i16: + case AArch64::SABDLv2i32_v2i64: + case AArch64::SABDLv4i16_v4i32: + case AArch64::SABDLv4i32_v2i64: + case AArch64::SABDLv8i16_v4i32: + case AArch64::SABDLv8i8_v8i16: + case AArch64::SABDv16i8: + case AArch64::SABDv2i32: + case AArch64::SABDv4i16: + case AArch64::SABDv4i32: + case AArch64::SABDv8i16: + case AArch64::SABDv8i8: + case AArch64::SADDLv16i8_v8i16: + case AArch64::SADDLv2i32_v2i64: + case AArch64::SADDLv4i16_v4i32: + case AArch64::SADDLv4i32_v2i64: + case AArch64::SADDLv8i16_v4i32: + case AArch64::SADDLv8i8_v8i16: + case AArch64::SADDWv16i8_v8i16: + case AArch64::SADDWv2i32_v2i64: + case AArch64::SADDWv4i16_v4i32: + case AArch64::SADDWv4i32_v2i64: + case AArch64::SADDWv8i16_v4i32: + case AArch64::SADDWv8i8_v8i16: + case AArch64::SBCSWr: + case AArch64::SBCSXr: + case AArch64::SBCWr: + case AArch64::SBCXr: + case AArch64::SDIVWr: + case AArch64::SDIVXr: + case AArch64::SDIV_IntWr: + case AArch64::SDIV_IntXr: + case AArch64::SHADDv16i8: + case AArch64::SHADDv2i32: + case AArch64::SHADDv4i16: + case AArch64::SHADDv4i32: + case AArch64::SHADDv8i16: + case AArch64::SHADDv8i8: + case AArch64::SHSUBv16i8: + case AArch64::SHSUBv2i32: + case AArch64::SHSUBv4i16: + case AArch64::SHSUBv4i32: + case AArch64::SHSUBv8i16: + case AArch64::SHSUBv8i8: + case AArch64::SMAXPv16i8: + case AArch64::SMAXPv2i32: + case AArch64::SMAXPv4i16: + case AArch64::SMAXPv4i32: + case AArch64::SMAXPv8i16: + case AArch64::SMAXPv8i8: + case AArch64::SMAXv16i8: + case AArch64::SMAXv2i32: + case AArch64::SMAXv4i16: + case AArch64::SMAXv4i32: + case AArch64::SMAXv8i16: + case AArch64::SMAXv8i8: + case AArch64::SMINPv16i8: + case AArch64::SMINPv2i32: + case AArch64::SMINPv4i16: + case AArch64::SMINPv4i32: + case AArch64::SMINPv8i16: + case AArch64::SMINPv8i8: + case AArch64::SMINv16i8: + case AArch64::SMINv2i32: + case AArch64::SMINv4i16: + case AArch64::SMINv4i32: + case AArch64::SMINv8i16: + case AArch64::SMINv8i8: + case AArch64::SMULLv16i8_v8i16: + case AArch64::SMULLv2i32_v2i64: + case AArch64::SMULLv4i16_v4i32: + case AArch64::SMULLv4i32_v2i64: + case AArch64::SMULLv8i16_v4i32: + case AArch64::SMULLv8i8_v8i16: + case AArch64::SQADDv16i8: + case AArch64::SQADDv1i16: + case AArch64::SQADDv1i32: + case AArch64::SQADDv1i64: + case AArch64::SQADDv1i8: + case AArch64::SQADDv2i32: + case AArch64::SQADDv2i64: + case AArch64::SQADDv4i16: + case AArch64::SQADDv4i32: + case AArch64::SQADDv8i16: + case AArch64::SQADDv8i8: + case AArch64::SQDMULHv1i16: + case AArch64::SQDMULHv1i32: + case AArch64::SQDMULHv2i32: + case AArch64::SQDMULHv4i16: + case AArch64::SQDMULHv4i32: + case AArch64::SQDMULHv8i16: + case AArch64::SQDMULLi16: + case AArch64::SQDMULLi32: + case AArch64::SQDMULLv2i32_v2i64: + case AArch64::SQDMULLv4i16_v4i32: + case AArch64::SQDMULLv4i32_v2i64: + case AArch64::SQDMULLv8i16_v4i32: + case AArch64::SQRDMULHv1i16: + case AArch64::SQRDMULHv1i32: + case AArch64::SQRDMULHv2i32: + case AArch64::SQRDMULHv4i16: + case AArch64::SQRDMULHv4i32: + case AArch64::SQRDMULHv8i16: + case AArch64::SQRSHLv16i8: + case AArch64::SQRSHLv1i16: + case AArch64::SQRSHLv1i32: + case AArch64::SQRSHLv1i64: + case AArch64::SQRSHLv1i8: + case AArch64::SQRSHLv2i32: + case AArch64::SQRSHLv2i64: + case AArch64::SQRSHLv4i16: + case AArch64::SQRSHLv4i32: + case AArch64::SQRSHLv8i16: + case AArch64::SQRSHLv8i8: + case AArch64::SQSHLv16i8: + case AArch64::SQSHLv1i16: + case AArch64::SQSHLv1i32: + case AArch64::SQSHLv1i64: + case AArch64::SQSHLv1i8: + case AArch64::SQSHLv2i32: + case AArch64::SQSHLv2i64: + case AArch64::SQSHLv4i16: + case AArch64::SQSHLv4i32: + case AArch64::SQSHLv8i16: + case AArch64::SQSHLv8i8: + case AArch64::SQSUBv16i8: + case AArch64::SQSUBv1i16: + case AArch64::SQSUBv1i32: + case AArch64::SQSUBv1i64: + case AArch64::SQSUBv1i8: + case AArch64::SQSUBv2i32: + case AArch64::SQSUBv2i64: + case AArch64::SQSUBv4i16: + case AArch64::SQSUBv4i32: + case AArch64::SQSUBv8i16: + case AArch64::SQSUBv8i8: + case AArch64::SRHADDv16i8: + case AArch64::SRHADDv2i32: + case AArch64::SRHADDv4i16: + case AArch64::SRHADDv4i32: + case AArch64::SRHADDv8i16: + case AArch64::SRHADDv8i8: + case AArch64::SRSHLv16i8: + case AArch64::SRSHLv1i64: + case AArch64::SRSHLv2i32: + case AArch64::SRSHLv2i64: + case AArch64::SRSHLv4i16: + case AArch64::SRSHLv4i32: + case AArch64::SRSHLv8i16: + case AArch64::SRSHLv8i8: + case AArch64::SSHLv16i8: + case AArch64::SSHLv1i64: + case AArch64::SSHLv2i32: + case AArch64::SSHLv2i64: + case AArch64::SSHLv4i16: + case AArch64::SSHLv4i32: + case AArch64::SSHLv8i16: + case AArch64::SSHLv8i8: + case AArch64::SSUBLv16i8_v8i16: + case AArch64::SSUBLv2i32_v2i64: + case AArch64::SSUBLv4i16_v4i32: + case AArch64::SSUBLv4i32_v2i64: + case AArch64::SSUBLv8i16_v4i32: + case AArch64::SSUBLv8i8_v8i16: + case AArch64::SSUBWv16i8_v8i16: + case AArch64::SSUBWv2i32_v2i64: + case AArch64::SSUBWv4i16_v4i32: + case AArch64::SSUBWv4i32_v2i64: + case AArch64::SSUBWv8i16_v4i32: + case AArch64::SSUBWv8i8_v8i16: + case AArch64::SUBHNv2i64_v2i32: + case AArch64::SUBHNv4i32_v4i16: + case AArch64::SUBHNv8i16_v8i8: + case AArch64::SUBv16i8: + case AArch64::SUBv1i64: + case AArch64::SUBv2i32: + case AArch64::SUBv2i64: + case AArch64::SUBv4i16: + case AArch64::SUBv4i32: + case AArch64::SUBv8i16: + case AArch64::SUBv8i8: + case AArch64::TRN1v16i8: + case AArch64::TRN1v2i32: + case AArch64::TRN1v2i64: + case AArch64::TRN1v4i16: + case AArch64::TRN1v4i32: + case AArch64::TRN1v8i16: + case AArch64::TRN1v8i8: + case AArch64::TRN2v16i8: + case AArch64::TRN2v2i32: + case AArch64::TRN2v2i64: + case AArch64::TRN2v4i16: + case AArch64::TRN2v4i32: + case AArch64::TRN2v8i16: + case AArch64::TRN2v8i8: + case AArch64::UABDLv16i8_v8i16: + case AArch64::UABDLv2i32_v2i64: + case AArch64::UABDLv4i16_v4i32: + case AArch64::UABDLv4i32_v2i64: + case AArch64::UABDLv8i16_v4i32: + case AArch64::UABDLv8i8_v8i16: + case AArch64::UABDv16i8: + case AArch64::UABDv2i32: + case AArch64::UABDv4i16: + case AArch64::UABDv4i32: + case AArch64::UABDv8i16: + case AArch64::UABDv8i8: + case AArch64::UADDLv16i8_v8i16: + case AArch64::UADDLv2i32_v2i64: + case AArch64::UADDLv4i16_v4i32: + case AArch64::UADDLv4i32_v2i64: + case AArch64::UADDLv8i16_v4i32: + case AArch64::UADDLv8i8_v8i16: + case AArch64::UADDWv16i8_v8i16: + case AArch64::UADDWv2i32_v2i64: + case AArch64::UADDWv4i16_v4i32: + case AArch64::UADDWv4i32_v2i64: + case AArch64::UADDWv8i16_v4i32: + case AArch64::UADDWv8i8_v8i16: + case AArch64::UDIVWr: + case AArch64::UDIVXr: + case AArch64::UDIV_IntWr: + case AArch64::UDIV_IntXr: + case AArch64::UHADDv16i8: + case AArch64::UHADDv2i32: + case AArch64::UHADDv4i16: + case AArch64::UHADDv4i32: + case AArch64::UHADDv8i16: + case AArch64::UHADDv8i8: + case AArch64::UHSUBv16i8: + case AArch64::UHSUBv2i32: + case AArch64::UHSUBv4i16: + case AArch64::UHSUBv4i32: + case AArch64::UHSUBv8i16: + case AArch64::UHSUBv8i8: + case AArch64::UMAXPv16i8: + case AArch64::UMAXPv2i32: + case AArch64::UMAXPv4i16: + case AArch64::UMAXPv4i32: + case AArch64::UMAXPv8i16: + case AArch64::UMAXPv8i8: + case AArch64::UMAXv16i8: + case AArch64::UMAXv2i32: + case AArch64::UMAXv4i16: + case AArch64::UMAXv4i32: + case AArch64::UMAXv8i16: + case AArch64::UMAXv8i8: + case AArch64::UMINPv16i8: + case AArch64::UMINPv2i32: + case AArch64::UMINPv4i16: + case AArch64::UMINPv4i32: + case AArch64::UMINPv8i16: + case AArch64::UMINPv8i8: + case AArch64::UMINv16i8: + case AArch64::UMINv2i32: + case AArch64::UMINv4i16: + case AArch64::UMINv4i32: + case AArch64::UMINv8i16: + case AArch64::UMINv8i8: + case AArch64::UMULLv16i8_v8i16: + case AArch64::UMULLv2i32_v2i64: + case AArch64::UMULLv4i16_v4i32: + case AArch64::UMULLv4i32_v2i64: + case AArch64::UMULLv8i16_v4i32: + case AArch64::UMULLv8i8_v8i16: + case AArch64::UQADDv16i8: + case AArch64::UQADDv1i16: + case AArch64::UQADDv1i32: + case AArch64::UQADDv1i64: + case AArch64::UQADDv1i8: + case AArch64::UQADDv2i32: + case AArch64::UQADDv2i64: + case AArch64::UQADDv4i16: + case AArch64::UQADDv4i32: + case AArch64::UQADDv8i16: + case AArch64::UQADDv8i8: + case AArch64::UQRSHLv16i8: + case AArch64::UQRSHLv1i16: + case AArch64::UQRSHLv1i32: + case AArch64::UQRSHLv1i64: + case AArch64::UQRSHLv1i8: + case AArch64::UQRSHLv2i32: + case AArch64::UQRSHLv2i64: + case AArch64::UQRSHLv4i16: + case AArch64::UQRSHLv4i32: + case AArch64::UQRSHLv8i16: + case AArch64::UQRSHLv8i8: + case AArch64::UQSHLv16i8: + case AArch64::UQSHLv1i16: + case AArch64::UQSHLv1i32: + case AArch64::UQSHLv1i64: + case AArch64::UQSHLv1i8: + case AArch64::UQSHLv2i32: + case AArch64::UQSHLv2i64: + case AArch64::UQSHLv4i16: + case AArch64::UQSHLv4i32: + case AArch64::UQSHLv8i16: + case AArch64::UQSHLv8i8: + case AArch64::UQSUBv16i8: + case AArch64::UQSUBv1i16: + case AArch64::UQSUBv1i32: + case AArch64::UQSUBv1i64: + case AArch64::UQSUBv1i8: + case AArch64::UQSUBv2i32: + case AArch64::UQSUBv2i64: + case AArch64::UQSUBv4i16: + case AArch64::UQSUBv4i32: + case AArch64::UQSUBv8i16: + case AArch64::UQSUBv8i8: + case AArch64::URHADDv16i8: + case AArch64::URHADDv2i32: + case AArch64::URHADDv4i16: + case AArch64::URHADDv4i32: + case AArch64::URHADDv8i16: + case AArch64::URHADDv8i8: + case AArch64::URSHLv16i8: + case AArch64::URSHLv1i64: + case AArch64::URSHLv2i32: + case AArch64::URSHLv2i64: + case AArch64::URSHLv4i16: + case AArch64::URSHLv4i32: + case AArch64::URSHLv8i16: + case AArch64::URSHLv8i8: + case AArch64::USHLv16i8: + case AArch64::USHLv1i64: + case AArch64::USHLv2i32: + case AArch64::USHLv2i64: + case AArch64::USHLv4i16: + case AArch64::USHLv4i32: + case AArch64::USHLv8i16: + case AArch64::USHLv8i8: + case AArch64::USUBLv16i8_v8i16: + case AArch64::USUBLv2i32_v2i64: + case AArch64::USUBLv4i16_v4i32: + case AArch64::USUBLv4i32_v2i64: + case AArch64::USUBLv8i16_v4i32: + case AArch64::USUBLv8i8_v8i16: + case AArch64::USUBWv16i8_v8i16: + case AArch64::USUBWv2i32_v2i64: + case AArch64::USUBWv4i16_v4i32: + case AArch64::USUBWv4i32_v2i64: + case AArch64::USUBWv8i16_v4i32: + case AArch64::USUBWv8i8_v8i16: + case AArch64::UZP1v16i8: + case AArch64::UZP1v2i32: + case AArch64::UZP1v2i64: + case AArch64::UZP1v4i16: + case AArch64::UZP1v4i32: + case AArch64::UZP1v8i16: + case AArch64::UZP1v8i8: + case AArch64::UZP2v16i8: + case AArch64::UZP2v2i32: + case AArch64::UZP2v2i64: + case AArch64::UZP2v4i16: + case AArch64::UZP2v4i32: + case AArch64::UZP2v8i16: + case AArch64::UZP2v8i8: + case AArch64::ZIP1v16i8: + case AArch64::ZIP1v2i32: + case AArch64::ZIP1v2i64: + case AArch64::ZIP1v4i16: + case AArch64::ZIP1v4i32: + case AArch64::ZIP1v8i16: + case AArch64::ZIP1v8i8: + case AArch64::ZIP2v16i8: + case AArch64::ZIP2v2i32: + case AArch64::ZIP2v2i64: + case AArch64::ZIP2v4i16: + case AArch64::ZIP2v4i32: + case AArch64::ZIP2v8i16: + case AArch64::ZIP2v8i8: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + break; + } + case AArch64::FMADDDrrr: + case AArch64::FMADDHrrr: + case AArch64::FMADDSrrr: + case AArch64::FMSUBDrrr: + case AArch64::FMSUBHrrr: + case AArch64::FMSUBSrrr: + case AArch64::FNMADDDrrr: + case AArch64::FNMADDHrrr: + case AArch64::FNMADDSrrr: + case AArch64::FNMSUBDrrr: + case AArch64::FNMSUBHrrr: + case AArch64::FNMSUBSrrr: + case AArch64::MADDWrrr: + case AArch64::MADDXrrr: + case AArch64::MSUBWrrr: + case AArch64::MSUBXrrr: + case AArch64::SMADDLrrr: + case AArch64::SMSUBLrrr: + case AArch64::UMADDLrrr: + case AArch64::UMSUBLrrr: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: Ra + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 10; + break; + } + case AArch64::CSELWr: + case AArch64::CSELXr: + case AArch64::CSINCWr: + case AArch64::CSINCXr: + case AArch64::CSINVWr: + case AArch64::CSINVXr: + case AArch64::CSNEGWr: + case AArch64::CSNEGXr: + case AArch64::FCSELDrrr: + case AArch64::FCSELHrrr: + case AArch64::FCSELSrrr: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: cond + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + break; + } + case AArch64::ADDSXrx64: + case AArch64::ADDXrx64: + case AArch64::SUBSXrx64: + case AArch64::SUBXrx64: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: ext + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(32)) << 10; + Value |= (op & UINT64_C(7)) << 10; + break; + } + case AArch64::ADDSWrx: + case AArch64::ADDSXrx: + case AArch64::ADDWrx: + case AArch64::ADDXrx: + case AArch64::SUBSWrx: + case AArch64::SUBSXrx: + case AArch64::SUBWrx: + case AArch64::SUBXrx: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: ext + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(63)) << 10; + break; + } + case AArch64::FMULXv1i64_indexed: + case AArch64::FMULXv2i64_indexed: + case AArch64::FMULv1i64_indexed: + case AArch64::FMULv2i64_indexed: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(1)) << 11; + break; + } + case AArch64::FMULXv1i32_indexed: + case AArch64::FMULXv2i32_indexed: + case AArch64::FMULXv4i32_indexed: + case AArch64::FMULv1i32_indexed: + case AArch64::FMULv2i32_indexed: + case AArch64::FMULv4i32_indexed: + case AArch64::MULv2i32_indexed: + case AArch64::MULv4i32_indexed: + case AArch64::SMULLv2i32_indexed: + case AArch64::SMULLv4i32_indexed: + case AArch64::SQDMULHv1i32_indexed: + case AArch64::SQDMULHv2i32_indexed: + case AArch64::SQDMULHv4i32_indexed: + case AArch64::SQDMULLv1i64_indexed: + case AArch64::SQDMULLv2i32_indexed: + case AArch64::SQDMULLv4i32_indexed: + case AArch64::SQRDMULHv1i32_indexed: + case AArch64::SQRDMULHv2i32_indexed: + case AArch64::SQRDMULHv4i32_indexed: + case AArch64::UMULLv2i32_indexed: + case AArch64::UMULLv4i32_indexed: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(1)) << 21; + Value |= (op & UINT64_C(2)) << 10; + break; + } + case AArch64::EXTv16i8: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: imm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 11; + break; + } + case AArch64::EXTRWrri: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: imm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 10; + break; + } + case AArch64::EXTRXrri: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: imm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(63)) << 10; + break; + } + case AArch64::EXTv8i8: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: imm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(7)) << 11; + break; + } + case AArch64::SMULHrr: + case AArch64::UMULHrr: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + Value = fixMulHigh(MI, Value, STI); + break; + } + case AArch64::DUPv2i64lane: + case AArch64::UMOVvi64: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + break; + } + case AArch64::DUPv16i8lane: + case AArch64::DUPv8i8lane: + case AArch64::SMOVvi8to32: + case AArch64::SMOVvi8to64: + case AArch64::UMOVvi8: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 17; + break; + } + case AArch64::DUPv2i32lane: + case AArch64::DUPv4i32lane: + case AArch64::SMOVvi32to64: + case AArch64::UMOVvi32: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(3)) << 19; + break; + } + case AArch64::DUPv4i16lane: + case AArch64::DUPv8i16lane: + case AArch64::SMOVvi16to32: + case AArch64::SMOVvi16to64: + case AArch64::UMOVvi16: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(7)) << 18; + break; + } + case AArch64::ADDSWri: + case AArch64::ADDSXri: + case AArch64::ADDWri: + case AArch64::ADDXri: + case AArch64::SUBSWri: + case AArch64::SUBSXri: + case AArch64::SUBWri: + case AArch64::SUBXri: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getAddSubImmOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(16383)) << 10; + break; + } + case AArch64::ANDSWri: + case AArch64::ANDWri: + case AArch64::EORWri: + case AArch64::ORRWri: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(4095)) << 10; + break; + } + case AArch64::ANDSXri: + case AArch64::ANDXri: + case AArch64::EORXri: + case AArch64::ORRXri: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(8191)) << 10; + break; + } + case AArch64::SHLv4i16_shift: + case AArch64::SHLv8i16_shift: + case AArch64::SQSHLUh: + case AArch64::SQSHLUv4i16_shift: + case AArch64::SQSHLUv8i16_shift: + case AArch64::SQSHLh: + case AArch64::SQSHLv4i16_shift: + case AArch64::SQSHLv8i16_shift: + case AArch64::SSHLLv4i16_shift: + case AArch64::SSHLLv8i16_shift: + case AArch64::UQSHLh: + case AArch64::UQSHLv4i16_shift: + case AArch64::UQSHLv8i16_shift: + case AArch64::USHLLv4i16_shift: + case AArch64::USHLLv8i16_shift: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getVecShiftL16OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case AArch64::SHLv2i32_shift: + case AArch64::SHLv4i32_shift: + case AArch64::SQSHLUs: + case AArch64::SQSHLUv2i32_shift: + case AArch64::SQSHLUv4i32_shift: + case AArch64::SQSHLs: + case AArch64::SQSHLv2i32_shift: + case AArch64::SQSHLv4i32_shift: + case AArch64::SSHLLv2i32_shift: + case AArch64::SSHLLv4i32_shift: + case AArch64::UQSHLs: + case AArch64::UQSHLv2i32_shift: + case AArch64::UQSHLv4i32_shift: + case AArch64::USHLLv2i32_shift: + case AArch64::USHLLv4i32_shift: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getVecShiftL32OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + break; + } + case AArch64::SHLd: + case AArch64::SHLv2i64_shift: + case AArch64::SQSHLUd: + case AArch64::SQSHLUv2i64_shift: + case AArch64::SQSHLd: + case AArch64::SQSHLv2i64_shift: + case AArch64::UQSHLd: + case AArch64::UQSHLv2i64_shift: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getVecShiftL64OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(63)) << 16; + break; + } + case AArch64::SHLv16i8_shift: + case AArch64::SHLv8i8_shift: + case AArch64::SQSHLUb: + case AArch64::SQSHLUv16i8_shift: + case AArch64::SQSHLUv8i8_shift: + case AArch64::SQSHLb: + case AArch64::SQSHLv16i8_shift: + case AArch64::SQSHLv8i8_shift: + case AArch64::SSHLLv16i8_shift: + case AArch64::SSHLLv8i8_shift: + case AArch64::UQSHLb: + case AArch64::UQSHLv16i8_shift: + case AArch64::UQSHLv8i8_shift: + case AArch64::USHLLv16i8_shift: + case AArch64::USHLLv8i8_shift: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getVecShiftL8OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(7)) << 16; + break; + } + case AArch64::FCVTZSh: + case AArch64::FCVTZSv4i16_shift: + case AArch64::FCVTZSv8i16_shift: + case AArch64::FCVTZUh: + case AArch64::FCVTZUv4i16_shift: + case AArch64::FCVTZUv8i16_shift: + case AArch64::SCVTFh: + case AArch64::SCVTFv4i16_shift: + case AArch64::SCVTFv8i16_shift: + case AArch64::SQRSHRNh: + case AArch64::SQRSHRUNh: + case AArch64::SQSHRNh: + case AArch64::SQSHRUNh: + case AArch64::SRSHRv4i16_shift: + case AArch64::SRSHRv8i16_shift: + case AArch64::SSHRv4i16_shift: + case AArch64::SSHRv8i16_shift: + case AArch64::UCVTFh: + case AArch64::UCVTFv4i16_shift: + case AArch64::UCVTFv8i16_shift: + case AArch64::UQRSHRNh: + case AArch64::UQSHRNh: + case AArch64::URSHRv4i16_shift: + case AArch64::URSHRv8i16_shift: + case AArch64::USHRv4i16_shift: + case AArch64::USHRv8i16_shift: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getVecShiftR16OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case AArch64::RSHRNv8i8_shift: + case AArch64::SHRNv8i8_shift: + case AArch64::SQRSHRNv8i8_shift: + case AArch64::SQRSHRUNv8i8_shift: + case AArch64::SQSHRNv8i8_shift: + case AArch64::SQSHRUNv8i8_shift: + case AArch64::UQRSHRNv8i8_shift: + case AArch64::UQSHRNv8i8_shift: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getVecShiftR16OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(7)) << 16; + break; + } + case AArch64::RSHRNv4i16_shift: + case AArch64::SHRNv4i16_shift: + case AArch64::SQRSHRNv4i16_shift: + case AArch64::SQRSHRUNv4i16_shift: + case AArch64::SQSHRNv4i16_shift: + case AArch64::SQSHRUNv4i16_shift: + case AArch64::UQRSHRNv4i16_shift: + case AArch64::UQSHRNv4i16_shift: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getVecShiftR32OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case AArch64::FCVTZSs: + case AArch64::FCVTZSv2i32_shift: + case AArch64::FCVTZSv4i32_shift: + case AArch64::FCVTZUs: + case AArch64::FCVTZUv2i32_shift: + case AArch64::FCVTZUv4i32_shift: + case AArch64::SCVTFs: + case AArch64::SCVTFv2i32_shift: + case AArch64::SCVTFv4i32_shift: + case AArch64::SQRSHRNs: + case AArch64::SQRSHRUNs: + case AArch64::SQSHRNs: + case AArch64::SQSHRUNs: + case AArch64::SRSHRv2i32_shift: + case AArch64::SRSHRv4i32_shift: + case AArch64::SSHRv2i32_shift: + case AArch64::SSHRv4i32_shift: + case AArch64::UCVTFs: + case AArch64::UCVTFv2i32_shift: + case AArch64::UCVTFv4i32_shift: + case AArch64::UQRSHRNs: + case AArch64::UQSHRNs: + case AArch64::URSHRv2i32_shift: + case AArch64::URSHRv4i32_shift: + case AArch64::USHRv2i32_shift: + case AArch64::USHRv4i32_shift: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getVecShiftR32OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + break; + } + case AArch64::RSHRNv2i32_shift: + case AArch64::SHRNv2i32_shift: + case AArch64::SQRSHRNv2i32_shift: + case AArch64::SQRSHRUNv2i32_shift: + case AArch64::SQSHRNv2i32_shift: + case AArch64::SQSHRUNv2i32_shift: + case AArch64::UQRSHRNv2i32_shift: + case AArch64::UQSHRNv2i32_shift: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getVecShiftR64OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + break; + } + case AArch64::FCVTZSd: + case AArch64::FCVTZSv2i64_shift: + case AArch64::FCVTZUd: + case AArch64::FCVTZUv2i64_shift: + case AArch64::SCVTFd: + case AArch64::SCVTFv2i64_shift: + case AArch64::SRSHRd: + case AArch64::SRSHRv2i64_shift: + case AArch64::SSHRd: + case AArch64::SSHRv2i64_shift: + case AArch64::UCVTFd: + case AArch64::UCVTFv2i64_shift: + case AArch64::URSHRd: + case AArch64::URSHRv2i64_shift: + case AArch64::USHRd: + case AArch64::USHRv2i64_shift: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getVecShiftR64OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(63)) << 16; + break; + } + case AArch64::SQRSHRNb: + case AArch64::SQRSHRUNb: + case AArch64::SQSHRNb: + case AArch64::SQSHRUNb: + case AArch64::SRSHRv16i8_shift: + case AArch64::SRSHRv8i8_shift: + case AArch64::SSHRv16i8_shift: + case AArch64::SSHRv8i8_shift: + case AArch64::UQRSHRNb: + case AArch64::UQSHRNb: + case AArch64::URSHRv16i8_shift: + case AArch64::URSHRv8i8_shift: + case AArch64::USHRv16i8_shift: + case AArch64::USHRv8i8_shift: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getVecShiftR8OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(7)) << 16; + break; + } + case AArch64::SBFMWri: + case AArch64::UBFMWri: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: immr + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: imms + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 10; + break; + } + case AArch64::SBFMXri: + case AArch64::UBFMXri: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: immr + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(63)) << 16; + // op: imms + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(63)) << 10; + break; + } + case AArch64::FCVTZSSWDri: + case AArch64::FCVTZSSWHri: + case AArch64::FCVTZSSWSri: + case AArch64::FCVTZS_IntSWDri: + case AArch64::FCVTZS_IntSWHri: + case AArch64::FCVTZS_IntSWSri: + case AArch64::FCVTZUSWDri: + case AArch64::FCVTZUSWHri: + case AArch64::FCVTZUSWSri: + case AArch64::FCVTZU_IntSWDri: + case AArch64::FCVTZU_IntSWHri: + case AArch64::FCVTZU_IntSWSri: + case AArch64::SCVTFSWDri: + case AArch64::SCVTFSWHri: + case AArch64::SCVTFSWSri: + case AArch64::UCVTFSWDri: + case AArch64::UCVTFSWHri: + case AArch64::UCVTFSWSri: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: scale + op = getFixedPointScaleOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(31)) << 10; + break; + } + case AArch64::FCVTZSSXDri: + case AArch64::FCVTZSSXHri: + case AArch64::FCVTZSSXSri: + case AArch64::FCVTZS_IntSXDri: + case AArch64::FCVTZS_IntSXHri: + case AArch64::FCVTZS_IntSXSri: + case AArch64::FCVTZUSXDri: + case AArch64::FCVTZUSXHri: + case AArch64::FCVTZUSXSri: + case AArch64::FCVTZU_IntSXDri: + case AArch64::FCVTZU_IntSXHri: + case AArch64::FCVTZU_IntSXSri: + case AArch64::SCVTFSXDri: + case AArch64::SCVTFSXHri: + case AArch64::SCVTFSXSri: + case AArch64::UCVTFSXDri: + case AArch64::UCVTFSXHri: + case AArch64::UCVTFSXSri: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: scale + op = getFixedPointScaleOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(63)) << 10; + break; + } + case AArch64::BFMWri: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: immr + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: imms + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(31)) << 10; + break; + } + case AArch64::BFMXri: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: immr + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(63)) << 16; + // op: imms + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(63)) << 10; + break; + } + case AArch64::FMOVDi: + case AArch64::FMOVHi: + case AArch64::FMOVSi: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: imm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(255)) << 13; + break; + } + case AArch64::MOVNWi: + case AArch64::MOVNXi: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: imm + op = getMoveWideImmOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(65535)) << 5; + // op: shift + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(48)) << 17; + break; + } + case AArch64::MOVZWi: + case AArch64::MOVZXi: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: imm + op = getMoveWideImmOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(65535)) << 5; + // op: shift + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(48)) << 17; + Value = fixMOVZ(MI, Value, STI); + break; + } + case AArch64::MOVKWi: + case AArch64::MOVKXi: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: imm + op = getMoveWideImmOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(65535)) << 5; + // op: shift + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(48)) << 17; + break; + } + case AArch64::FMOVv2f32_ns: + case AArch64::FMOVv2f64_ns: + case AArch64::FMOVv4f16_ns: + case AArch64::FMOVv4f32_ns: + case AArch64::FMOVv8f16_ns: + case AArch64::MOVID: + case AArch64::MOVIv16b_ns: + case AArch64::MOVIv2d_ns: + case AArch64::MOVIv8b_ns: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: imm8 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(224)) << 11; + Value |= (op & UINT64_C(31)) << 5; + break; + } + case AArch64::MOVIv2s_msl: + case AArch64::MOVIv4s_msl: + case AArch64::MVNIv2s_msl: + case AArch64::MVNIv4s_msl: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: imm8 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(224)) << 11; + Value |= (op & UINT64_C(31)) << 5; + // op: shift + op = getMoveVecShifterOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(1)) << 12; + break; + } + case AArch64::MOVIv4i16: + case AArch64::MOVIv8i16: + case AArch64::MVNIv4i16: + case AArch64::MVNIv8i16: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: imm8 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(224)) << 11; + Value |= (op & UINT64_C(31)) << 5; + // op: shift + op = getVecShifterOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(1)) << 13; + break; + } + case AArch64::MOVIv2i32: + case AArch64::MOVIv4i32: + case AArch64::MVNIv2i32: + case AArch64::MVNIv4i32: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: imm8 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(224)) << 11; + Value |= (op & UINT64_C(31)) << 5; + // op: shift + op = getVecShifterOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(3)) << 13; + break; + } + case AArch64::AESDrr: + case AArch64::AESErr: + case AArch64::FCVTNv4i32: + case AArch64::FCVTNv8i16: + case AArch64::FCVTXNv4f32: + case AArch64::SADALPv16i8_v8i16: + case AArch64::SADALPv2i32_v1i64: + case AArch64::SADALPv4i16_v2i32: + case AArch64::SADALPv4i32_v2i64: + case AArch64::SADALPv8i16_v4i32: + case AArch64::SADALPv8i8_v4i16: + case AArch64::SHA1SU1rr: + case AArch64::SHA256SU0rr: + case AArch64::SQXTNv16i8: + case AArch64::SQXTNv4i32: + case AArch64::SQXTNv8i16: + case AArch64::SQXTUNv16i8: + case AArch64::SQXTUNv4i32: + case AArch64::SQXTUNv8i16: + case AArch64::SUQADDv16i8: + case AArch64::SUQADDv1i16: + case AArch64::SUQADDv1i32: + case AArch64::SUQADDv1i64: + case AArch64::SUQADDv1i8: + case AArch64::SUQADDv2i32: + case AArch64::SUQADDv2i64: + case AArch64::SUQADDv4i16: + case AArch64::SUQADDv4i32: + case AArch64::SUQADDv8i16: + case AArch64::SUQADDv8i8: + case AArch64::UADALPv16i8_v8i16: + case AArch64::UADALPv2i32_v1i64: + case AArch64::UADALPv4i16_v2i32: + case AArch64::UADALPv4i32_v2i64: + case AArch64::UADALPv8i16_v4i32: + case AArch64::UADALPv8i8_v4i16: + case AArch64::UQXTNv16i8: + case AArch64::UQXTNv4i32: + case AArch64::UQXTNv8i16: + case AArch64::USQADDv16i8: + case AArch64::USQADDv1i16: + case AArch64::USQADDv1i32: + case AArch64::USQADDv1i64: + case AArch64::USQADDv1i8: + case AArch64::USQADDv2i32: + case AArch64::USQADDv2i64: + case AArch64::USQADDv4i16: + case AArch64::USQADDv4i32: + case AArch64::USQADDv8i16: + case AArch64::USQADDv8i8: + case AArch64::XTNv16i8: + case AArch64::XTNv4i32: + case AArch64::XTNv8i16: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + break; + } + case AArch64::FMLAv1i16_indexed: + case AArch64::FMLAv4i16_indexed: + case AArch64::FMLAv8i16_indexed: + case AArch64::FMLSv1i16_indexed: + case AArch64::FMLSv4i16_indexed: + case AArch64::FMLSv8i16_indexed: + case AArch64::MLAv4i16_indexed: + case AArch64::MLAv8i16_indexed: + case AArch64::MLSv4i16_indexed: + case AArch64::MLSv8i16_indexed: + case AArch64::SMLALv4i16_indexed: + case AArch64::SMLALv8i16_indexed: + case AArch64::SMLSLv4i16_indexed: + case AArch64::SMLSLv8i16_indexed: + case AArch64::SQDMLALv1i32_indexed: + case AArch64::SQDMLALv4i16_indexed: + case AArch64::SQDMLALv8i16_indexed: + case AArch64::SQDMLSLv1i32_indexed: + case AArch64::SQDMLSLv4i16_indexed: + case AArch64::SQDMLSLv8i16_indexed: + case AArch64::SQRDMLAHi16_indexed: + case AArch64::SQRDMLAHv4i16_indexed: + case AArch64::SQRDMLAHv8i16_indexed: + case AArch64::SQRDMLSHi16_indexed: + case AArch64::SQRDMLSHv4i16_indexed: + case AArch64::SQRDMLSHv8i16_indexed: + case AArch64::UMLALv4i16_indexed: + case AArch64::UMLALv8i16_indexed: + case AArch64::UMLSLv4i16_indexed: + case AArch64::UMLSLv8i16_indexed: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(3)) << 20; + Value |= (op & UINT64_C(4)) << 9; + break; + } + case AArch64::ADDHNv2i64_v4i32: + case AArch64::ADDHNv4i32_v8i16: + case AArch64::ADDHNv8i16_v16i8: + case AArch64::BITv16i8: + case AArch64::BITv8i8: + case AArch64::BSLv16i8: + case AArch64::BSLv8i8: + case AArch64::FMLAv2f32: + case AArch64::FMLAv2f64: + case AArch64::FMLAv4f16: + case AArch64::FMLAv4f32: + case AArch64::FMLAv8f16: + case AArch64::FMLSv2f32: + case AArch64::FMLSv2f64: + case AArch64::FMLSv4f16: + case AArch64::FMLSv4f32: + case AArch64::FMLSv8f16: + case AArch64::MLAv16i8: + case AArch64::MLAv2i32: + case AArch64::MLAv4i16: + case AArch64::MLAv4i32: + case AArch64::MLAv8i16: + case AArch64::MLAv8i8: + case AArch64::MLSv16i8: + case AArch64::MLSv2i32: + case AArch64::MLSv4i16: + case AArch64::MLSv4i32: + case AArch64::MLSv8i16: + case AArch64::MLSv8i8: + case AArch64::RADDHNv2i64_v4i32: + case AArch64::RADDHNv4i32_v8i16: + case AArch64::RADDHNv8i16_v16i8: + case AArch64::RSUBHNv2i64_v4i32: + case AArch64::RSUBHNv4i32_v8i16: + case AArch64::RSUBHNv8i16_v16i8: + case AArch64::SABALv16i8_v8i16: + case AArch64::SABALv2i32_v2i64: + case AArch64::SABALv4i16_v4i32: + case AArch64::SABALv4i32_v2i64: + case AArch64::SABALv8i16_v4i32: + case AArch64::SABALv8i8_v8i16: + case AArch64::SABAv16i8: + case AArch64::SABAv2i32: + case AArch64::SABAv4i16: + case AArch64::SABAv4i32: + case AArch64::SABAv8i16: + case AArch64::SABAv8i8: + case AArch64::SHA1Crrr: + case AArch64::SHA1Mrrr: + case AArch64::SHA1Prrr: + case AArch64::SHA1SU0rrr: + case AArch64::SHA256H2rrr: + case AArch64::SHA256Hrrr: + case AArch64::SHA256SU1rrr: + case AArch64::SMLALv16i8_v8i16: + case AArch64::SMLALv2i32_v2i64: + case AArch64::SMLALv4i16_v4i32: + case AArch64::SMLALv4i32_v2i64: + case AArch64::SMLALv8i16_v4i32: + case AArch64::SMLALv8i8_v8i16: + case AArch64::SMLSLv16i8_v8i16: + case AArch64::SMLSLv2i32_v2i64: + case AArch64::SMLSLv4i16_v4i32: + case AArch64::SMLSLv4i32_v2i64: + case AArch64::SMLSLv8i16_v4i32: + case AArch64::SMLSLv8i8_v8i16: + case AArch64::SQDMLALi16: + case AArch64::SQDMLALi32: + case AArch64::SQDMLALv2i32_v2i64: + case AArch64::SQDMLALv4i16_v4i32: + case AArch64::SQDMLALv4i32_v2i64: + case AArch64::SQDMLALv8i16_v4i32: + case AArch64::SQDMLSLi16: + case AArch64::SQDMLSLi32: + case AArch64::SQDMLSLv2i32_v2i64: + case AArch64::SQDMLSLv4i16_v4i32: + case AArch64::SQDMLSLv4i32_v2i64: + case AArch64::SQDMLSLv8i16_v4i32: + case AArch64::SQRDMLAHv1i16: + case AArch64::SQRDMLAHv1i32: + case AArch64::SQRDMLAHv2i32: + case AArch64::SQRDMLAHv4i16: + case AArch64::SQRDMLAHv4i32: + case AArch64::SQRDMLAHv8i16: + case AArch64::SQRDMLSHv1i16: + case AArch64::SQRDMLSHv1i32: + case AArch64::SQRDMLSHv2i32: + case AArch64::SQRDMLSHv4i16: + case AArch64::SQRDMLSHv4i32: + case AArch64::SQRDMLSHv8i16: + case AArch64::SUBHNv2i64_v4i32: + case AArch64::SUBHNv4i32_v8i16: + case AArch64::SUBHNv8i16_v16i8: + case AArch64::UABALv16i8_v8i16: + case AArch64::UABALv2i32_v2i64: + case AArch64::UABALv4i16_v4i32: + case AArch64::UABALv4i32_v2i64: + case AArch64::UABALv8i16_v4i32: + case AArch64::UABALv8i8_v8i16: + case AArch64::UABAv16i8: + case AArch64::UABAv2i32: + case AArch64::UABAv4i16: + case AArch64::UABAv4i32: + case AArch64::UABAv8i16: + case AArch64::UABAv8i8: + case AArch64::UMLALv16i8_v8i16: + case AArch64::UMLALv2i32_v2i64: + case AArch64::UMLALv4i16_v4i32: + case AArch64::UMLALv4i32_v2i64: + case AArch64::UMLALv8i16_v4i32: + case AArch64::UMLALv8i8_v8i16: + case AArch64::UMLSLv16i8_v8i16: + case AArch64::UMLSLv2i32_v2i64: + case AArch64::UMLSLv4i16_v4i32: + case AArch64::UMLSLv4i32_v2i64: + case AArch64::UMLSLv8i16_v4i32: + case AArch64::UMLSLv8i8_v8i16: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + break; + } + case AArch64::FMLAv1i64_indexed: + case AArch64::FMLAv2i64_indexed: + case AArch64::FMLSv1i64_indexed: + case AArch64::FMLSv2i64_indexed: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(1)) << 11; + break; + } + case AArch64::FMLAv1i32_indexed: + case AArch64::FMLAv2i32_indexed: + case AArch64::FMLAv4i32_indexed: + case AArch64::FMLSv1i32_indexed: + case AArch64::FMLSv2i32_indexed: + case AArch64::FMLSv4i32_indexed: + case AArch64::MLAv2i32_indexed: + case AArch64::MLAv4i32_indexed: + case AArch64::MLSv2i32_indexed: + case AArch64::MLSv4i32_indexed: + case AArch64::SMLALv2i32_indexed: + case AArch64::SMLALv4i32_indexed: + case AArch64::SMLSLv2i32_indexed: + case AArch64::SMLSLv4i32_indexed: + case AArch64::SQDMLALv1i64_indexed: + case AArch64::SQDMLALv2i32_indexed: + case AArch64::SQDMLALv4i32_indexed: + case AArch64::SQDMLSLv1i64_indexed: + case AArch64::SQDMLSLv2i32_indexed: + case AArch64::SQDMLSLv4i32_indexed: + case AArch64::SQRDMLAHi32_indexed: + case AArch64::SQRDMLAHv2i32_indexed: + case AArch64::SQRDMLAHv4i32_indexed: + case AArch64::SQRDMLSHi32_indexed: + case AArch64::SQRDMLSHv2i32_indexed: + case AArch64::SQRDMLSHv4i32_indexed: + case AArch64::UMLALv2i32_indexed: + case AArch64::UMLALv4i32_indexed: + case AArch64::UMLSLv2i32_indexed: + case AArch64::UMLSLv4i32_indexed: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(1)) << 21; + Value |= (op & UINT64_C(2)) << 10; + break; + } + case AArch64::SLIv4i16_shift: + case AArch64::SLIv8i16_shift: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getVecShiftL16OpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case AArch64::SLIv2i32_shift: + case AArch64::SLIv4i32_shift: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getVecShiftL32OpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + break; + } + case AArch64::SLId: + case AArch64::SLIv2i64_shift: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getVecShiftL64OpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(63)) << 16; + break; + } + case AArch64::SLIv16i8_shift: + case AArch64::SLIv8i8_shift: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getVecShiftL8OpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(7)) << 16; + break; + } + case AArch64::SRIv4i16_shift: + case AArch64::SRIv8i16_shift: + case AArch64::SRSRAv4i16_shift: + case AArch64::SRSRAv8i16_shift: + case AArch64::SSRAv4i16_shift: + case AArch64::SSRAv8i16_shift: + case AArch64::URSRAv4i16_shift: + case AArch64::URSRAv8i16_shift: + case AArch64::USRAv4i16_shift: + case AArch64::USRAv8i16_shift: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getVecShiftR16OpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case AArch64::RSHRNv16i8_shift: + case AArch64::SHRNv16i8_shift: + case AArch64::SQRSHRNv16i8_shift: + case AArch64::SQRSHRUNv16i8_shift: + case AArch64::SQSHRNv16i8_shift: + case AArch64::SQSHRUNv16i8_shift: + case AArch64::UQRSHRNv16i8_shift: + case AArch64::UQSHRNv16i8_shift: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getVecShiftR16OpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(7)) << 16; + break; + } + case AArch64::RSHRNv8i16_shift: + case AArch64::SHRNv8i16_shift: + case AArch64::SQRSHRNv8i16_shift: + case AArch64::SQRSHRUNv8i16_shift: + case AArch64::SQSHRNv8i16_shift: + case AArch64::SQSHRUNv8i16_shift: + case AArch64::UQRSHRNv8i16_shift: + case AArch64::UQSHRNv8i16_shift: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getVecShiftR32OpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case AArch64::SRIv2i32_shift: + case AArch64::SRIv4i32_shift: + case AArch64::SRSRAv2i32_shift: + case AArch64::SRSRAv4i32_shift: + case AArch64::SSRAv2i32_shift: + case AArch64::SSRAv4i32_shift: + case AArch64::URSRAv2i32_shift: + case AArch64::URSRAv4i32_shift: + case AArch64::USRAv2i32_shift: + case AArch64::USRAv4i32_shift: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getVecShiftR32OpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + break; + } + case AArch64::RSHRNv4i32_shift: + case AArch64::SHRNv4i32_shift: + case AArch64::SQRSHRNv4i32_shift: + case AArch64::SQRSHRUNv4i32_shift: + case AArch64::SQSHRNv4i32_shift: + case AArch64::SQSHRUNv4i32_shift: + case AArch64::UQRSHRNv4i32_shift: + case AArch64::UQSHRNv4i32_shift: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getVecShiftR64OpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + break; + } + case AArch64::SRId: + case AArch64::SRIv2i64_shift: + case AArch64::SRSRAd: + case AArch64::SRSRAv2i64_shift: + case AArch64::SSRAd: + case AArch64::SSRAv2i64_shift: + case AArch64::URSRAd: + case AArch64::URSRAv2i64_shift: + case AArch64::USRAd: + case AArch64::USRAv2i64_shift: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getVecShiftR64OpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(63)) << 16; + break; + } + case AArch64::SRIv16i8_shift: + case AArch64::SRIv8i8_shift: + case AArch64::SRSRAv16i8_shift: + case AArch64::SRSRAv8i8_shift: + case AArch64::SSRAv16i8_shift: + case AArch64::SSRAv8i8_shift: + case AArch64::URSRAv16i8_shift: + case AArch64::URSRAv8i8_shift: + case AArch64::USRAv16i8_shift: + case AArch64::USRAv8i8_shift: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getVecShiftR8OpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(7)) << 16; + break; + } + case AArch64::INSvi64gpr: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + break; + } + case AArch64::INSvi64lane: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + // op: idx2 + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(1)) << 14; + break; + } + case AArch64::INSvi8gpr: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 17; + break; + } + case AArch64::INSvi8lane: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 17; + // op: idx2 + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 11; + break; + } + case AArch64::INSvi32gpr: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(3)) << 19; + break; + } + case AArch64::INSvi32lane: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(3)) << 19; + // op: idx2 + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(3)) << 13; + break; + } + case AArch64::INSvi16gpr: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(7)) << 18; + break; + } + case AArch64::INSvi16lane: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(7)) << 18; + // op: idx2 + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(7)) << 12; + break; + } + case AArch64::BICv4i16: + case AArch64::BICv8i16: + case AArch64::ORRv4i16: + case AArch64::ORRv8i16: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: imm8 + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(224)) << 11; + Value |= (op & UINT64_C(31)) << 5; + // op: shift + op = getVecShifterOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(1)) << 13; + break; + } + case AArch64::BICv2i32: + case AArch64::BICv4i32: + case AArch64::ORRv2i32: + case AArch64::ORRv4i32: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: imm8 + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(224)) << 11; + Value |= (op & UINT64_C(31)) << 5; + // op: shift + op = getVecShifterOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(3)) << 13; + break; + } + case AArch64::FCMPDrr: + case AArch64::FCMPEDrr: + case AArch64::FCMPEHrr: + case AArch64::FCMPESrr: + case AArch64::FCMPHrr: + case AArch64::FCMPSrr: { + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + break; + } + case AArch64::BLR: + case AArch64::BR: + case AArch64::RET: { + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + break; + } + case AArch64::CCMNWr: + case AArch64::CCMNXr: + case AArch64::CCMPWr: + case AArch64::CCMPXr: + case AArch64::FCCMPDrr: + case AArch64::FCCMPEDrr: + case AArch64::FCCMPEHrr: + case AArch64::FCCMPESrr: + case AArch64::FCCMPHrr: + case AArch64::FCCMPSrr: { + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: nzcv + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(15); + // op: cond + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + break; + } + case AArch64::CCMNWi: + case AArch64::CCMNXi: + case AArch64::CCMPWi: + case AArch64::CCMPXi: { + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: imm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: nzcv + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(15); + // op: cond + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + break; + } + case AArch64::FCMPDri: + case AArch64::FCMPEDri: + case AArch64::FCMPEHri: + case AArch64::FCMPESri: + case AArch64::FCMPHri: + case AArch64::FCMPSri: { + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + Value = fixOneOperandFPComparison(MI, Value, STI); + break; + } + case AArch64::LDADDALb: + case AArch64::LDADDALd: + case AArch64::LDADDALh: + case AArch64::LDADDALs: + case AArch64::LDADDAb: + case AArch64::LDADDAd: + case AArch64::LDADDAh: + case AArch64::LDADDAs: + case AArch64::LDADDLb: + case AArch64::LDADDLd: + case AArch64::LDADDLh: + case AArch64::LDADDLs: + case AArch64::LDADDb: + case AArch64::LDADDd: + case AArch64::LDADDh: + case AArch64::LDADDs: + case AArch64::LDCLRALb: + case AArch64::LDCLRALd: + case AArch64::LDCLRALh: + case AArch64::LDCLRALs: + case AArch64::LDCLRAb: + case AArch64::LDCLRAd: + case AArch64::LDCLRAh: + case AArch64::LDCLRAs: + case AArch64::LDCLRLb: + case AArch64::LDCLRLd: + case AArch64::LDCLRLh: + case AArch64::LDCLRLs: + case AArch64::LDCLRb: + case AArch64::LDCLRd: + case AArch64::LDCLRh: + case AArch64::LDCLRs: + case AArch64::LDEORALb: + case AArch64::LDEORALd: + case AArch64::LDEORALh: + case AArch64::LDEORALs: + case AArch64::LDEORAb: + case AArch64::LDEORAd: + case AArch64::LDEORAh: + case AArch64::LDEORAs: + case AArch64::LDEORLb: + case AArch64::LDEORLd: + case AArch64::LDEORLh: + case AArch64::LDEORLs: + case AArch64::LDEORb: + case AArch64::LDEORd: + case AArch64::LDEORh: + case AArch64::LDEORs: + case AArch64::LDSETALb: + case AArch64::LDSETALd: + case AArch64::LDSETALh: + case AArch64::LDSETALs: + case AArch64::LDSETAb: + case AArch64::LDSETAd: + case AArch64::LDSETAh: + case AArch64::LDSETAs: + case AArch64::LDSETLb: + case AArch64::LDSETLd: + case AArch64::LDSETLh: + case AArch64::LDSETLs: + case AArch64::LDSETb: + case AArch64::LDSETd: + case AArch64::LDSETh: + case AArch64::LDSETs: + case AArch64::LDSMAXALb: + case AArch64::LDSMAXALd: + case AArch64::LDSMAXALh: + case AArch64::LDSMAXALs: + case AArch64::LDSMAXAb: + case AArch64::LDSMAXAd: + case AArch64::LDSMAXAh: + case AArch64::LDSMAXAs: + case AArch64::LDSMAXLb: + case AArch64::LDSMAXLd: + case AArch64::LDSMAXLh: + case AArch64::LDSMAXLs: + case AArch64::LDSMAXb: + case AArch64::LDSMAXd: + case AArch64::LDSMAXh: + case AArch64::LDSMAXs: + case AArch64::LDSMINALb: + case AArch64::LDSMINALd: + case AArch64::LDSMINALh: + case AArch64::LDSMINALs: + case AArch64::LDSMINAb: + case AArch64::LDSMINAd: + case AArch64::LDSMINAh: + case AArch64::LDSMINAs: + case AArch64::LDSMINLb: + case AArch64::LDSMINLd: + case AArch64::LDSMINLh: + case AArch64::LDSMINLs: + case AArch64::LDSMINb: + case AArch64::LDSMINd: + case AArch64::LDSMINh: + case AArch64::LDSMINs: + case AArch64::LDUMAXALb: + case AArch64::LDUMAXALd: + case AArch64::LDUMAXALh: + case AArch64::LDUMAXALs: + case AArch64::LDUMAXAb: + case AArch64::LDUMAXAd: + case AArch64::LDUMAXAh: + case AArch64::LDUMAXAs: + case AArch64::LDUMAXLb: + case AArch64::LDUMAXLd: + case AArch64::LDUMAXLh: + case AArch64::LDUMAXLs: + case AArch64::LDUMAXb: + case AArch64::LDUMAXd: + case AArch64::LDUMAXh: + case AArch64::LDUMAXs: + case AArch64::LDUMINALb: + case AArch64::LDUMINALd: + case AArch64::LDUMINALh: + case AArch64::LDUMINALs: + case AArch64::LDUMINAb: + case AArch64::LDUMINAd: + case AArch64::LDUMINAh: + case AArch64::LDUMINAs: + case AArch64::LDUMINLb: + case AArch64::LDUMINLd: + case AArch64::LDUMINLh: + case AArch64::LDUMINLs: + case AArch64::LDUMINb: + case AArch64::LDUMINd: + case AArch64::LDUMINh: + case AArch64::LDUMINs: + case AArch64::SWPALb: + case AArch64::SWPALd: + case AArch64::SWPALh: + case AArch64::SWPALs: + case AArch64::SWPAb: + case AArch64::SWPAd: + case AArch64::SWPAh: + case AArch64::SWPAs: + case AArch64::SWPLb: + case AArch64::SWPLd: + case AArch64::SWPLh: + case AArch64::SWPLs: + case AArch64::SWPb: + case AArch64::SWPd: + case AArch64::SWPh: + case AArch64::SWPs: { + // op: Rs + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + break; + } + case AArch64::CASALb: + case AArch64::CASALd: + case AArch64::CASALh: + case AArch64::CASALs: + case AArch64::CASAb: + case AArch64::CASAd: + case AArch64::CASAh: + case AArch64::CASAs: + case AArch64::CASLb: + case AArch64::CASLd: + case AArch64::CASLh: + case AArch64::CASLs: + case AArch64::CASPALd: + case AArch64::CASPALs: + case AArch64::CASPAd: + case AArch64::CASPAs: + case AArch64::CASPLd: + case AArch64::CASPLs: + case AArch64::CASPd: + case AArch64::CASPs: + case AArch64::CASb: + case AArch64::CASd: + case AArch64::CASh: + case AArch64::CASs: { + // op: Rs + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(31); + break; + } + case AArch64::LDRBBroW: + case AArch64::LDRBBroX: + case AArch64::LDRBroW: + case AArch64::LDRBroX: + case AArch64::LDRDroW: + case AArch64::LDRDroX: + case AArch64::LDRHHroW: + case AArch64::LDRHHroX: + case AArch64::LDRHroW: + case AArch64::LDRHroX: + case AArch64::LDRQroW: + case AArch64::LDRQroX: + case AArch64::LDRSBWroW: + case AArch64::LDRSBWroX: + case AArch64::LDRSBXroW: + case AArch64::LDRSBXroX: + case AArch64::LDRSHWroW: + case AArch64::LDRSHWroX: + case AArch64::LDRSHXroW: + case AArch64::LDRSHXroX: + case AArch64::LDRSWroW: + case AArch64::LDRSWroX: + case AArch64::LDRSroW: + case AArch64::LDRSroX: + case AArch64::LDRWroW: + case AArch64::LDRWroX: + case AArch64::LDRXroW: + case AArch64::LDRXroX: + case AArch64::PRFMroW: + case AArch64::PRFMroX: + case AArch64::STRBBroW: + case AArch64::STRBBroX: + case AArch64::STRBroW: + case AArch64::STRBroX: + case AArch64::STRDroW: + case AArch64::STRDroX: + case AArch64::STRHHroW: + case AArch64::STRHHroX: + case AArch64::STRHroW: + case AArch64::STRHroX: + case AArch64::STRQroW: + case AArch64::STRQroX: + case AArch64::STRSroW: + case AArch64::STRSroX: + case AArch64::STRWroW: + case AArch64::STRWroX: + case AArch64::STRXroW: + case AArch64::STRXroX: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: extend + op = getMemExtendOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(2)) << 14; + Value |= (op & UINT64_C(1)) << 12; + break; + } + case AArch64::LDRQui: + case AArch64::STRQui: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: offset + op = getLdStUImm12OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(4095)) << 10; + break; + } + case AArch64::LDRBBui: + case AArch64::LDRBui: + case AArch64::LDRSBWui: + case AArch64::LDRSBXui: + case AArch64::STRBBui: + case AArch64::STRBui: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: offset + op = getLdStUImm12OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(4095)) << 10; + break; + } + case AArch64::LDRHHui: + case AArch64::LDRHui: + case AArch64::LDRSHWui: + case AArch64::LDRSHXui: + case AArch64::STRHHui: + case AArch64::STRHui: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: offset + op = getLdStUImm12OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(4095)) << 10; + break; + } + case AArch64::LDRSWui: + case AArch64::LDRSui: + case AArch64::LDRWui: + case AArch64::STRSui: + case AArch64::STRWui: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: offset + op = getLdStUImm12OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(4095)) << 10; + break; + } + case AArch64::LDRDui: + case AArch64::LDRXui: + case AArch64::PRFMui: + case AArch64::STRDui: + case AArch64::STRXui: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: offset + op = getLdStUImm12OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(4095)) << 10; + break; + } + case AArch64::LDTRBi: + case AArch64::LDTRHi: + case AArch64::LDTRSBWi: + case AArch64::LDTRSBXi: + case AArch64::LDTRSHWi: + case AArch64::LDTRSHXi: + case AArch64::LDTRSWi: + case AArch64::LDTRWi: + case AArch64::LDTRXi: + case AArch64::LDURBBi: + case AArch64::LDURBi: + case AArch64::LDURDi: + case AArch64::LDURHHi: + case AArch64::LDURHi: + case AArch64::LDURQi: + case AArch64::LDURSBWi: + case AArch64::LDURSBXi: + case AArch64::LDURSHWi: + case AArch64::LDURSHXi: + case AArch64::LDURSWi: + case AArch64::LDURSi: + case AArch64::LDURWi: + case AArch64::LDURXi: + case AArch64::PRFUMi: + case AArch64::STTRBi: + case AArch64::STTRHi: + case AArch64::STTRWi: + case AArch64::STTRXi: + case AArch64::STURBBi: + case AArch64::STURBi: + case AArch64::STURDi: + case AArch64::STURHHi: + case AArch64::STURHi: + case AArch64::STURQi: + case AArch64::STURSi: + case AArch64::STURWi: + case AArch64::STURXi: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: offset + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(511)) << 12; + break; + } + case AArch64::LDARB: + case AArch64::LDARH: + case AArch64::LDARW: + case AArch64::LDARX: + case AArch64::LDAXRB: + case AArch64::LDAXRH: + case AArch64::LDAXRW: + case AArch64::LDAXRX: + case AArch64::LDLARB: + case AArch64::LDLARH: + case AArch64::LDLARW: + case AArch64::LDLARX: + case AArch64::LDXRB: + case AArch64::LDXRH: + case AArch64::LDXRW: + case AArch64::LDXRX: + case AArch64::STLLRB: + case AArch64::STLLRH: + case AArch64::STLLRW: + case AArch64::STLLRX: + case AArch64::STLRB: + case AArch64::STLRH: + case AArch64::STLRW: + case AArch64::STLRX: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + Value = fixLoadStoreExclusive<0,0>(MI, Value, STI); + break; + } + case AArch64::LDNPDi: + case AArch64::LDNPQi: + case AArch64::LDNPSi: + case AArch64::LDNPWi: + case AArch64::LDNPXi: + case AArch64::LDPDi: + case AArch64::LDPQi: + case AArch64::LDPSWi: + case AArch64::LDPSi: + case AArch64::LDPWi: + case AArch64::LDPXi: + case AArch64::STNPDi: + case AArch64::STNPQi: + case AArch64::STNPSi: + case AArch64::STNPWi: + case AArch64::STNPXi: + case AArch64::STPDi: + case AArch64::STPQi: + case AArch64::STPSi: + case AArch64::STPWi: + case AArch64::STPXi: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rt2 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 10; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: offset + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(127)) << 15; + break; + } + case AArch64::LDAXPW: + case AArch64::LDAXPX: + case AArch64::LDXPW: + case AArch64::LDXPX: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rt2 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 10; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + Value = fixLoadStoreExclusive<0,1>(MI, Value, STI); + break; + } + case AArch64::TBNZW: + case AArch64::TBNZX: + case AArch64::TBZW: + case AArch64::TBZX: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: bit_off + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 19; + // op: target + op = getTestBranchTargetOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(16383)) << 5; + break; + } + case AArch64::LDRDl: + case AArch64::LDRQl: + case AArch64::LDRSWl: + case AArch64::LDRSl: + case AArch64::LDRWl: + case AArch64::LDRXl: + case AArch64::PRFMl: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: label + op = getLoadLiteralOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(524287)) << 5; + break; + } + case AArch64::SYSLxt: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: op1 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(7)) << 16; + // op: Cn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Cm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: op2 + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + break; + } + case AArch64::MRS: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: systemreg + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(65535)) << 5; + break; + } + case AArch64::CBNZW: + case AArch64::CBNZX: + case AArch64::CBZW: + case AArch64::CBZX: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: target + op = getCondBranchTargetOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(524287)) << 5; + break; + } + case AArch64::LDRBBpost: + case AArch64::LDRBBpre: + case AArch64::LDRBpost: + case AArch64::LDRBpre: + case AArch64::LDRDpost: + case AArch64::LDRDpre: + case AArch64::LDRHHpost: + case AArch64::LDRHHpre: + case AArch64::LDRHpost: + case AArch64::LDRHpre: + case AArch64::LDRQpost: + case AArch64::LDRQpre: + case AArch64::LDRSBWpost: + case AArch64::LDRSBWpre: + case AArch64::LDRSBXpost: + case AArch64::LDRSBXpre: + case AArch64::LDRSHWpost: + case AArch64::LDRSHWpre: + case AArch64::LDRSHXpost: + case AArch64::LDRSHXpre: + case AArch64::LDRSWpost: + case AArch64::LDRSWpre: + case AArch64::LDRSpost: + case AArch64::LDRSpre: + case AArch64::LDRWpost: + case AArch64::LDRWpre: + case AArch64::LDRXpost: + case AArch64::LDRXpre: + case AArch64::STRBBpost: + case AArch64::STRBBpre: + case AArch64::STRBpost: + case AArch64::STRBpre: + case AArch64::STRDpost: + case AArch64::STRDpre: + case AArch64::STRHHpost: + case AArch64::STRHHpre: + case AArch64::STRHpost: + case AArch64::STRHpre: + case AArch64::STRQpost: + case AArch64::STRQpre: + case AArch64::STRSpost: + case AArch64::STRSpre: + case AArch64::STRWpost: + case AArch64::STRWpre: + case AArch64::STRXpost: + case AArch64::STRXpre: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: offset + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(511)) << 12; + break; + } + case AArch64::LDPDpost: + case AArch64::LDPDpre: + case AArch64::LDPQpost: + case AArch64::LDPQpre: + case AArch64::LDPSWpost: + case AArch64::LDPSWpre: + case AArch64::LDPSpost: + case AArch64::LDPSpre: + case AArch64::LDPWpost: + case AArch64::LDPWpre: + case AArch64::LDPXpost: + case AArch64::LDPXpre: + case AArch64::STPDpost: + case AArch64::STPDpre: + case AArch64::STPQpost: + case AArch64::STPQpre: + case AArch64::STPSpost: + case AArch64::STPSpre: + case AArch64::STPWpost: + case AArch64::STPWpre: + case AArch64::STPXpost: + case AArch64::STPXpre: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rt2 + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 10; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: offset + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(127)) << 15; + break; + } + case AArch64::MSR: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: systemreg + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(65535)) << 5; + break; + } + case AArch64::SYSxt: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= op & UINT64_C(31); + // op: op1 + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(7)) << 16; + // op: Cn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Cm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: op2 + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + break; + } + case AArch64::TBLv16i8Four: + case AArch64::TBLv16i8One: + case AArch64::TBLv16i8Three: + case AArch64::TBLv16i8Two: + case AArch64::TBLv8i8Four: + case AArch64::TBLv8i8One: + case AArch64::TBLv8i8Three: + case AArch64::TBLv8i8Two: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Vn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + break; + } + case AArch64::TBXv16i8Four: + case AArch64::TBXv16i8One: + case AArch64::TBXv16i8Three: + case AArch64::TBXv16i8Two: + case AArch64::TBXv8i8Four: + case AArch64::TBXv8i8One: + case AArch64::TBXv8i8Three: + case AArch64::TBXv8i8Two: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Vn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + break; + } + case AArch64::LD1Fourv16b: + case AArch64::LD1Fourv1d: + case AArch64::LD1Fourv2d: + case AArch64::LD1Fourv2s: + case AArch64::LD1Fourv4h: + case AArch64::LD1Fourv4s: + case AArch64::LD1Fourv8b: + case AArch64::LD1Fourv8h: + case AArch64::LD1Onev16b: + case AArch64::LD1Onev1d: + case AArch64::LD1Onev2d: + case AArch64::LD1Onev2s: + case AArch64::LD1Onev4h: + case AArch64::LD1Onev4s: + case AArch64::LD1Onev8b: + case AArch64::LD1Onev8h: + case AArch64::LD1Rv16b: + case AArch64::LD1Rv1d: + case AArch64::LD1Rv2d: + case AArch64::LD1Rv2s: + case AArch64::LD1Rv4h: + case AArch64::LD1Rv4s: + case AArch64::LD1Rv8b: + case AArch64::LD1Rv8h: + case AArch64::LD1Threev16b: + case AArch64::LD1Threev1d: + case AArch64::LD1Threev2d: + case AArch64::LD1Threev2s: + case AArch64::LD1Threev4h: + case AArch64::LD1Threev4s: + case AArch64::LD1Threev8b: + case AArch64::LD1Threev8h: + case AArch64::LD1Twov16b: + case AArch64::LD1Twov1d: + case AArch64::LD1Twov2d: + case AArch64::LD1Twov2s: + case AArch64::LD1Twov4h: + case AArch64::LD1Twov4s: + case AArch64::LD1Twov8b: + case AArch64::LD1Twov8h: + case AArch64::LD2Rv16b: + case AArch64::LD2Rv1d: + case AArch64::LD2Rv2d: + case AArch64::LD2Rv2s: + case AArch64::LD2Rv4h: + case AArch64::LD2Rv4s: + case AArch64::LD2Rv8b: + case AArch64::LD2Rv8h: + case AArch64::LD2Twov16b: + case AArch64::LD2Twov2d: + case AArch64::LD2Twov2s: + case AArch64::LD2Twov4h: + case AArch64::LD2Twov4s: + case AArch64::LD2Twov8b: + case AArch64::LD2Twov8h: + case AArch64::LD3Rv16b: + case AArch64::LD3Rv1d: + case AArch64::LD3Rv2d: + case AArch64::LD3Rv2s: + case AArch64::LD3Rv4h: + case AArch64::LD3Rv4s: + case AArch64::LD3Rv8b: + case AArch64::LD3Rv8h: + case AArch64::LD3Threev16b: + case AArch64::LD3Threev2d: + case AArch64::LD3Threev2s: + case AArch64::LD3Threev4h: + case AArch64::LD3Threev4s: + case AArch64::LD3Threev8b: + case AArch64::LD3Threev8h: + case AArch64::LD4Fourv16b: + case AArch64::LD4Fourv2d: + case AArch64::LD4Fourv2s: + case AArch64::LD4Fourv4h: + case AArch64::LD4Fourv4s: + case AArch64::LD4Fourv8b: + case AArch64::LD4Fourv8h: + case AArch64::LD4Rv16b: + case AArch64::LD4Rv1d: + case AArch64::LD4Rv2d: + case AArch64::LD4Rv2s: + case AArch64::LD4Rv4h: + case AArch64::LD4Rv4s: + case AArch64::LD4Rv8b: + case AArch64::LD4Rv8h: + case AArch64::ST1Fourv16b: + case AArch64::ST1Fourv1d: + case AArch64::ST1Fourv2d: + case AArch64::ST1Fourv2s: + case AArch64::ST1Fourv4h: + case AArch64::ST1Fourv4s: + case AArch64::ST1Fourv8b: + case AArch64::ST1Fourv8h: + case AArch64::ST1Onev16b: + case AArch64::ST1Onev1d: + case AArch64::ST1Onev2d: + case AArch64::ST1Onev2s: + case AArch64::ST1Onev4h: + case AArch64::ST1Onev4s: + case AArch64::ST1Onev8b: + case AArch64::ST1Onev8h: + case AArch64::ST1Threev16b: + case AArch64::ST1Threev1d: + case AArch64::ST1Threev2d: + case AArch64::ST1Threev2s: + case AArch64::ST1Threev4h: + case AArch64::ST1Threev4s: + case AArch64::ST1Threev8b: + case AArch64::ST1Threev8h: + case AArch64::ST1Twov16b: + case AArch64::ST1Twov1d: + case AArch64::ST1Twov2d: + case AArch64::ST1Twov2s: + case AArch64::ST1Twov4h: + case AArch64::ST1Twov4s: + case AArch64::ST1Twov8b: + case AArch64::ST1Twov8h: + case AArch64::ST2Twov16b: + case AArch64::ST2Twov2d: + case AArch64::ST2Twov2s: + case AArch64::ST2Twov4h: + case AArch64::ST2Twov4s: + case AArch64::ST2Twov8b: + case AArch64::ST2Twov8h: + case AArch64::ST3Threev16b: + case AArch64::ST3Threev2d: + case AArch64::ST3Threev2s: + case AArch64::ST3Threev4h: + case AArch64::ST3Threev4s: + case AArch64::ST3Threev8b: + case AArch64::ST3Threev8h: + case AArch64::ST4Fourv16b: + case AArch64::ST4Fourv2d: + case AArch64::ST4Fourv2s: + case AArch64::ST4Fourv4h: + case AArch64::ST4Fourv4s: + case AArch64::ST4Fourv8b: + case AArch64::ST4Fourv8h: { + // op: Vt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + break; + } + case AArch64::ST1i64: + case AArch64::ST2i64: + case AArch64::ST3i64: + case AArch64::ST4i64: { + // op: Vt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(1)) << 30; + break; + } + case AArch64::ST1i32: + case AArch64::ST2i32: + case AArch64::ST3i32: + case AArch64::ST4i32: { + // op: Vt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(2)) << 29; + Value |= (op & UINT64_C(1)) << 12; + break; + } + case AArch64::ST1i16: + case AArch64::ST2i16: + case AArch64::ST3i16: + case AArch64::ST4i16: { + // op: Vt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(4)) << 28; + Value |= (op & UINT64_C(3)) << 11; + break; + } + case AArch64::ST1i8: + case AArch64::ST2i8: + case AArch64::ST3i8: + case AArch64::ST4i8: { + // op: Vt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(8)) << 27; + Value |= (op & UINT64_C(7)) << 10; + break; + } + case AArch64::LD1Fourv16b_POST: + case AArch64::LD1Fourv1d_POST: + case AArch64::LD1Fourv2d_POST: + case AArch64::LD1Fourv2s_POST: + case AArch64::LD1Fourv4h_POST: + case AArch64::LD1Fourv4s_POST: + case AArch64::LD1Fourv8b_POST: + case AArch64::LD1Fourv8h_POST: + case AArch64::LD1Onev16b_POST: + case AArch64::LD1Onev1d_POST: + case AArch64::LD1Onev2d_POST: + case AArch64::LD1Onev2s_POST: + case AArch64::LD1Onev4h_POST: + case AArch64::LD1Onev4s_POST: + case AArch64::LD1Onev8b_POST: + case AArch64::LD1Onev8h_POST: + case AArch64::LD1Rv16b_POST: + case AArch64::LD1Rv1d_POST: + case AArch64::LD1Rv2d_POST: + case AArch64::LD1Rv2s_POST: + case AArch64::LD1Rv4h_POST: + case AArch64::LD1Rv4s_POST: + case AArch64::LD1Rv8b_POST: + case AArch64::LD1Rv8h_POST: + case AArch64::LD1Threev16b_POST: + case AArch64::LD1Threev1d_POST: + case AArch64::LD1Threev2d_POST: + case AArch64::LD1Threev2s_POST: + case AArch64::LD1Threev4h_POST: + case AArch64::LD1Threev4s_POST: + case AArch64::LD1Threev8b_POST: + case AArch64::LD1Threev8h_POST: + case AArch64::LD1Twov16b_POST: + case AArch64::LD1Twov1d_POST: + case AArch64::LD1Twov2d_POST: + case AArch64::LD1Twov2s_POST: + case AArch64::LD1Twov4h_POST: + case AArch64::LD1Twov4s_POST: + case AArch64::LD1Twov8b_POST: + case AArch64::LD1Twov8h_POST: + case AArch64::LD2Rv16b_POST: + case AArch64::LD2Rv1d_POST: + case AArch64::LD2Rv2d_POST: + case AArch64::LD2Rv2s_POST: + case AArch64::LD2Rv4h_POST: + case AArch64::LD2Rv4s_POST: + case AArch64::LD2Rv8b_POST: + case AArch64::LD2Rv8h_POST: + case AArch64::LD2Twov16b_POST: + case AArch64::LD2Twov2d_POST: + case AArch64::LD2Twov2s_POST: + case AArch64::LD2Twov4h_POST: + case AArch64::LD2Twov4s_POST: + case AArch64::LD2Twov8b_POST: + case AArch64::LD2Twov8h_POST: + case AArch64::LD3Rv16b_POST: + case AArch64::LD3Rv1d_POST: + case AArch64::LD3Rv2d_POST: + case AArch64::LD3Rv2s_POST: + case AArch64::LD3Rv4h_POST: + case AArch64::LD3Rv4s_POST: + case AArch64::LD3Rv8b_POST: + case AArch64::LD3Rv8h_POST: + case AArch64::LD3Threev16b_POST: + case AArch64::LD3Threev2d_POST: + case AArch64::LD3Threev2s_POST: + case AArch64::LD3Threev4h_POST: + case AArch64::LD3Threev4s_POST: + case AArch64::LD3Threev8b_POST: + case AArch64::LD3Threev8h_POST: + case AArch64::LD4Fourv16b_POST: + case AArch64::LD4Fourv2d_POST: + case AArch64::LD4Fourv2s_POST: + case AArch64::LD4Fourv4h_POST: + case AArch64::LD4Fourv4s_POST: + case AArch64::LD4Fourv8b_POST: + case AArch64::LD4Fourv8h_POST: + case AArch64::LD4Rv16b_POST: + case AArch64::LD4Rv1d_POST: + case AArch64::LD4Rv2d_POST: + case AArch64::LD4Rv2s_POST: + case AArch64::LD4Rv4h_POST: + case AArch64::LD4Rv4s_POST: + case AArch64::LD4Rv8b_POST: + case AArch64::LD4Rv8h_POST: + case AArch64::ST1Fourv16b_POST: + case AArch64::ST1Fourv1d_POST: + case AArch64::ST1Fourv2d_POST: + case AArch64::ST1Fourv2s_POST: + case AArch64::ST1Fourv4h_POST: + case AArch64::ST1Fourv4s_POST: + case AArch64::ST1Fourv8b_POST: + case AArch64::ST1Fourv8h_POST: + case AArch64::ST1Onev16b_POST: + case AArch64::ST1Onev1d_POST: + case AArch64::ST1Onev2d_POST: + case AArch64::ST1Onev2s_POST: + case AArch64::ST1Onev4h_POST: + case AArch64::ST1Onev4s_POST: + case AArch64::ST1Onev8b_POST: + case AArch64::ST1Onev8h_POST: + case AArch64::ST1Threev16b_POST: + case AArch64::ST1Threev1d_POST: + case AArch64::ST1Threev2d_POST: + case AArch64::ST1Threev2s_POST: + case AArch64::ST1Threev4h_POST: + case AArch64::ST1Threev4s_POST: + case AArch64::ST1Threev8b_POST: + case AArch64::ST1Threev8h_POST: + case AArch64::ST1Twov16b_POST: + case AArch64::ST1Twov1d_POST: + case AArch64::ST1Twov2d_POST: + case AArch64::ST1Twov2s_POST: + case AArch64::ST1Twov4h_POST: + case AArch64::ST1Twov4s_POST: + case AArch64::ST1Twov8b_POST: + case AArch64::ST1Twov8h_POST: + case AArch64::ST2Twov16b_POST: + case AArch64::ST2Twov2d_POST: + case AArch64::ST2Twov2s_POST: + case AArch64::ST2Twov4h_POST: + case AArch64::ST2Twov4s_POST: + case AArch64::ST2Twov8b_POST: + case AArch64::ST2Twov8h_POST: + case AArch64::ST3Threev16b_POST: + case AArch64::ST3Threev2d_POST: + case AArch64::ST3Threev2s_POST: + case AArch64::ST3Threev4h_POST: + case AArch64::ST3Threev4s_POST: + case AArch64::ST3Threev8b_POST: + case AArch64::ST3Threev8h_POST: + case AArch64::ST4Fourv16b_POST: + case AArch64::ST4Fourv2d_POST: + case AArch64::ST4Fourv2s_POST: + case AArch64::ST4Fourv4h_POST: + case AArch64::ST4Fourv4s_POST: + case AArch64::ST4Fourv8b_POST: + case AArch64::ST4Fourv8h_POST: { + // op: Vt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: Xm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + break; + } + case AArch64::LD1i64: + case AArch64::LD2i64: + case AArch64::LD3i64: + case AArch64::LD4i64: { + // op: Vt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(1)) << 30; + break; + } + case AArch64::ST1i64_POST: + case AArch64::ST2i64_POST: + case AArch64::ST3i64_POST: + case AArch64::ST4i64_POST: { + // op: Vt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(1)) << 30; + // op: Xm + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + break; + } + case AArch64::LD1i32: + case AArch64::LD2i32: + case AArch64::LD3i32: + case AArch64::LD4i32: { + // op: Vt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(2)) << 29; + Value |= (op & UINT64_C(1)) << 12; + break; + } + case AArch64::ST1i32_POST: + case AArch64::ST2i32_POST: + case AArch64::ST3i32_POST: + case AArch64::ST4i32_POST: { + // op: Vt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(2)) << 29; + Value |= (op & UINT64_C(1)) << 12; + // op: Xm + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + break; + } + case AArch64::LD1i16: + case AArch64::LD2i16: + case AArch64::LD3i16: + case AArch64::LD4i16: { + // op: Vt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(4)) << 28; + Value |= (op & UINT64_C(3)) << 11; + break; + } + case AArch64::ST1i16_POST: + case AArch64::ST2i16_POST: + case AArch64::ST3i16_POST: + case AArch64::ST4i16_POST: { + // op: Vt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(4)) << 28; + Value |= (op & UINT64_C(3)) << 11; + // op: Xm + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + break; + } + case AArch64::LD1i8: + case AArch64::LD2i8: + case AArch64::LD3i8: + case AArch64::LD4i8: { + // op: Vt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(8)) << 27; + Value |= (op & UINT64_C(7)) << 10; + break; + } + case AArch64::ST1i8_POST: + case AArch64::ST2i8_POST: + case AArch64::ST3i8_POST: + case AArch64::ST4i8_POST: { + // op: Vt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(8)) << 27; + Value |= (op & UINT64_C(7)) << 10; + // op: Xm + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + break; + } + case AArch64::LD1i64_POST: + case AArch64::LD2i64_POST: + case AArch64::LD3i64_POST: + case AArch64::LD4i64_POST: { + // op: Vt + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(1)) << 30; + // op: Xm + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + break; + } + case AArch64::LD1i32_POST: + case AArch64::LD2i32_POST: + case AArch64::LD3i32_POST: + case AArch64::LD4i32_POST: { + // op: Vt + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(2)) << 29; + Value |= (op & UINT64_C(1)) << 12; + // op: Xm + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + break; + } + case AArch64::LD1i16_POST: + case AArch64::LD2i16_POST: + case AArch64::LD3i16_POST: + case AArch64::LD4i16_POST: { + // op: Vt + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(4)) << 28; + Value |= (op & UINT64_C(3)) << 11; + // op: Xm + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + break; + } + case AArch64::LD1i8_POST: + case AArch64::LD2i8_POST: + case AArch64::LD3i8_POST: + case AArch64::LD4i8_POST: { + // op: Vt + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(8)) << 27; + Value |= (op & UINT64_C(7)) << 10; + // op: Xm + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + break; + } + case AArch64::STLXRB: + case AArch64::STLXRH: + case AArch64::STLXRW: + case AArch64::STLXRX: + case AArch64::STXRB: + case AArch64::STXRH: + case AArch64::STXRW: + case AArch64::STXRX: { + // op: Ws + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + Value = fixLoadStoreExclusive<1,0>(MI, Value, STI); + break; + } + case AArch64::STLXPW: + case AArch64::STLXPX: + case AArch64::STXPW: + case AArch64::STXPX: { + // op: Ws + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: Rt2 + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 10; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + break; + } + case AArch64::ADR: + case AArch64::ADRP: { + // op: Xd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: label + op = getAdrLabelOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(3)) << 29; + Value |= (op & UINT64_C(2097148)) << 3; + break; + } + case AArch64::B: + case AArch64::BL: { + // op: addr + op = getBranchTargetOpValue(MI, 0, Fixups, STI); + Value |= op & UINT64_C(67108863); + break; + } + case AArch64::Bcc: { + // op: cond + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(15); + // op: target + op = getCondBranchTargetOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(524287)) << 5; + break; + } + case AArch64::CPYi64: { + // op: dst + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: src + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + break; + } + case AArch64::CPYi8: { + // op: dst + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: src + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 17; + break; + } + case AArch64::CPYi32: { + // op: dst + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: src + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(3)) << 19; + break; + } + case AArch64::CPYi16: { + // op: dst + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: src + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: idx + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(7)) << 18; + break; + } + case AArch64::ADDSWrs: + case AArch64::ADDSXrs: + case AArch64::ADDWrs: + case AArch64::ADDXrs: + case AArch64::ANDSWrs: + case AArch64::ANDSXrs: + case AArch64::ANDWrs: + case AArch64::ANDXrs: + case AArch64::BICSWrs: + case AArch64::BICSXrs: + case AArch64::BICWrs: + case AArch64::BICXrs: + case AArch64::EONWrs: + case AArch64::EONXrs: + case AArch64::EORWrs: + case AArch64::EORXrs: + case AArch64::ORNWrs: + case AArch64::ORNXrs: + case AArch64::ORRWrs: + case AArch64::ORRXrs: + case AArch64::SUBSWrs: + case AArch64::SUBSXrs: + case AArch64::SUBWrs: + case AArch64::SUBXrs: { + // op: dst + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + // op: src1 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 5; + // op: src2 + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: shift + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(192)) << 16; + Value |= (op & UINT64_C(63)) << 10; + break; + } + case AArch64::HINT: { + // op: imm + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(127)) << 5; + break; + } + case AArch64::BRK: + case AArch64::DCPS1: + case AArch64::DCPS2: + case AArch64::DCPS3: + case AArch64::HLT: + case AArch64::HVC: + case AArch64::SMC: + case AArch64::SVC: { + // op: imm + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(65535)) << 5; + break; + } + case AArch64::MSRpstateImm1: { + // op: pstatefield + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(56)) << 13; + Value |= (op & UINT64_C(7)) << 5; + // op: imm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(1)) << 8; + break; + } + case AArch64::MSRpstateImm4: { + // op: pstatefield + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(56)) << 13; + Value |= (op & UINT64_C(7)) << 5; + // op: imm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + break; + } + default: + std::string msg; + raw_string_ostream Msg(msg); + Msg << "Not supported instr: " << MI; + report_fatal_error(Msg.str()); + } + return Value; +} + diff --git a/llvm/lib/Target/AArch64/AArch64GenRegisterInfo.inc b/llvm/lib/Target/AArch64/AArch64GenRegisterInfo.inc new file mode 100644 index 0000000..574cb4a --- /dev/null +++ b/llvm/lib/Target/AArch64/AArch64GenRegisterInfo.inc @@ -0,0 +1,3384 @@ +/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ +|* *| +|* Target Register Enum Values *| +|* *| +|* Automatically generated file, do not edit! *| +|* *| +\*===----------------------------------------------------------------------===*/ + + +#ifdef GET_REGINFO_ENUM +#undef GET_REGINFO_ENUM +namespace llvm_ks { + +class MCRegisterClass; +extern const MCRegisterClass AArch64MCRegisterClasses[]; + +namespace AArch64 { +enum { + NoRegister, + FP = 1, + LR = 2, + NZCV = 3, + SP = 4, + WSP = 5, + WZR = 6, + XZR = 7, + B0 = 8, + B1 = 9, + B2 = 10, + B3 = 11, + B4 = 12, + B5 = 13, + B6 = 14, + B7 = 15, + B8 = 16, + B9 = 17, + B10 = 18, + B11 = 19, + B12 = 20, + B13 = 21, + B14 = 22, + B15 = 23, + B16 = 24, + B17 = 25, + B18 = 26, + B19 = 27, + B20 = 28, + B21 = 29, + B22 = 30, + B23 = 31, + B24 = 32, + B25 = 33, + B26 = 34, + B27 = 35, + B28 = 36, + B29 = 37, + B30 = 38, + B31 = 39, + D0 = 40, + D1 = 41, + D2 = 42, + D3 = 43, + D4 = 44, + D5 = 45, + D6 = 46, + D7 = 47, + D8 = 48, + D9 = 49, + D10 = 50, + D11 = 51, + D12 = 52, + D13 = 53, + D14 = 54, + D15 = 55, + D16 = 56, + D17 = 57, + D18 = 58, + D19 = 59, + D20 = 60, + D21 = 61, + D22 = 62, + D23 = 63, + D24 = 64, + D25 = 65, + D26 = 66, + D27 = 67, + D28 = 68, + D29 = 69, + D30 = 70, + D31 = 71, + H0 = 72, + H1 = 73, + H2 = 74, + H3 = 75, + H4 = 76, + H5 = 77, + H6 = 78, + H7 = 79, + H8 = 80, + H9 = 81, + H10 = 82, + H11 = 83, + H12 = 84, + H13 = 85, + H14 = 86, + H15 = 87, + H16 = 88, + H17 = 89, + H18 = 90, + H19 = 91, + H20 = 92, + H21 = 93, + H22 = 94, + H23 = 95, + H24 = 96, + H25 = 97, + H26 = 98, + H27 = 99, + H28 = 100, + H29 = 101, + H30 = 102, + H31 = 103, + Q0 = 104, + Q1 = 105, + Q2 = 106, + Q3 = 107, + Q4 = 108, + Q5 = 109, + Q6 = 110, + Q7 = 111, + Q8 = 112, + Q9 = 113, + Q10 = 114, + Q11 = 115, + Q12 = 116, + Q13 = 117, + Q14 = 118, + Q15 = 119, + Q16 = 120, + Q17 = 121, + Q18 = 122, + Q19 = 123, + Q20 = 124, + Q21 = 125, + Q22 = 126, + Q23 = 127, + Q24 = 128, + Q25 = 129, + Q26 = 130, + Q27 = 131, + Q28 = 132, + Q29 = 133, + Q30 = 134, + Q31 = 135, + S0 = 136, + S1 = 137, + S2 = 138, + S3 = 139, + S4 = 140, + S5 = 141, + S6 = 142, + S7 = 143, + S8 = 144, + S9 = 145, + S10 = 146, + S11 = 147, + S12 = 148, + S13 = 149, + S14 = 150, + S15 = 151, + S16 = 152, + S17 = 153, + S18 = 154, + S19 = 155, + S20 = 156, + S21 = 157, + S22 = 158, + S23 = 159, + S24 = 160, + S25 = 161, + S26 = 162, + S27 = 163, + S28 = 164, + S29 = 165, + S30 = 166, + S31 = 167, + W0 = 168, + W1 = 169, + W2 = 170, + W3 = 171, + W4 = 172, + W5 = 173, + W6 = 174, + W7 = 175, + W8 = 176, + W9 = 177, + W10 = 178, + W11 = 179, + W12 = 180, + W13 = 181, + W14 = 182, + W15 = 183, + W16 = 184, + W17 = 185, + W18 = 186, + W19 = 187, + W20 = 188, + W21 = 189, + W22 = 190, + W23 = 191, + W24 = 192, + W25 = 193, + W26 = 194, + W27 = 195, + W28 = 196, + W29 = 197, + W30 = 198, + X0 = 199, + X1 = 200, + X2 = 201, + X3 = 202, + X4 = 203, + X5 = 204, + X6 = 205, + X7 = 206, + X8 = 207, + X9 = 208, + X10 = 209, + X11 = 210, + X12 = 211, + X13 = 212, + X14 = 213, + X15 = 214, + X16 = 215, + X17 = 216, + X18 = 217, + X19 = 218, + X20 = 219, + X21 = 220, + X22 = 221, + X23 = 222, + X24 = 223, + X25 = 224, + X26 = 225, + X27 = 226, + X28 = 227, + D0_D1 = 228, + D1_D2 = 229, + D2_D3 = 230, + D3_D4 = 231, + D4_D5 = 232, + D5_D6 = 233, + D6_D7 = 234, + D7_D8 = 235, + D8_D9 = 236, + D9_D10 = 237, + D10_D11 = 238, + D11_D12 = 239, + D12_D13 = 240, + D13_D14 = 241, + D14_D15 = 242, + D15_D16 = 243, + D16_D17 = 244, + D17_D18 = 245, + D18_D19 = 246, + D19_D20 = 247, + D20_D21 = 248, + D21_D22 = 249, + D22_D23 = 250, + D23_D24 = 251, + D24_D25 = 252, + D25_D26 = 253, + D26_D27 = 254, + D27_D28 = 255, + D28_D29 = 256, + D29_D30 = 257, + D30_D31 = 258, + D31_D0 = 259, + D0_D1_D2_D3 = 260, + D1_D2_D3_D4 = 261, + D2_D3_D4_D5 = 262, + D3_D4_D5_D6 = 263, + D4_D5_D6_D7 = 264, + D5_D6_D7_D8 = 265, + D6_D7_D8_D9 = 266, + D7_D8_D9_D10 = 267, + D8_D9_D10_D11 = 268, + D9_D10_D11_D12 = 269, + D10_D11_D12_D13 = 270, + D11_D12_D13_D14 = 271, + D12_D13_D14_D15 = 272, + D13_D14_D15_D16 = 273, + D14_D15_D16_D17 = 274, + D15_D16_D17_D18 = 275, + D16_D17_D18_D19 = 276, + D17_D18_D19_D20 = 277, + D18_D19_D20_D21 = 278, + D19_D20_D21_D22 = 279, + D20_D21_D22_D23 = 280, + D21_D22_D23_D24 = 281, + D22_D23_D24_D25 = 282, + D23_D24_D25_D26 = 283, + D24_D25_D26_D27 = 284, + D25_D26_D27_D28 = 285, + D26_D27_D28_D29 = 286, + D27_D28_D29_D30 = 287, + D28_D29_D30_D31 = 288, + D29_D30_D31_D0 = 289, + D30_D31_D0_D1 = 290, + D31_D0_D1_D2 = 291, + D0_D1_D2 = 292, + D1_D2_D3 = 293, + D2_D3_D4 = 294, + D3_D4_D5 = 295, + D4_D5_D6 = 296, + D5_D6_D7 = 297, + D6_D7_D8 = 298, + D7_D8_D9 = 299, + D8_D9_D10 = 300, + D9_D10_D11 = 301, + D10_D11_D12 = 302, + D11_D12_D13 = 303, + D12_D13_D14 = 304, + D13_D14_D15 = 305, + D14_D15_D16 = 306, + D15_D16_D17 = 307, + D16_D17_D18 = 308, + D17_D18_D19 = 309, + D18_D19_D20 = 310, + D19_D20_D21 = 311, + D20_D21_D22 = 312, + D21_D22_D23 = 313, + D22_D23_D24 = 314, + D23_D24_D25 = 315, + D24_D25_D26 = 316, + D25_D26_D27 = 317, + D26_D27_D28 = 318, + D27_D28_D29 = 319, + D28_D29_D30 = 320, + D29_D30_D31 = 321, + D30_D31_D0 = 322, + D31_D0_D1 = 323, + Q0_Q1 = 324, + Q1_Q2 = 325, + Q2_Q3 = 326, + Q3_Q4 = 327, + Q4_Q5 = 328, + Q5_Q6 = 329, + Q6_Q7 = 330, + Q7_Q8 = 331, + Q8_Q9 = 332, + Q9_Q10 = 333, + Q10_Q11 = 334, + Q11_Q12 = 335, + Q12_Q13 = 336, + Q13_Q14 = 337, + Q14_Q15 = 338, + Q15_Q16 = 339, + Q16_Q17 = 340, + Q17_Q18 = 341, + Q18_Q19 = 342, + Q19_Q20 = 343, + Q20_Q21 = 344, + Q21_Q22 = 345, + Q22_Q23 = 346, + Q23_Q24 = 347, + Q24_Q25 = 348, + Q25_Q26 = 349, + Q26_Q27 = 350, + Q27_Q28 = 351, + Q28_Q29 = 352, + Q29_Q30 = 353, + Q30_Q31 = 354, + Q31_Q0 = 355, + Q0_Q1_Q2_Q3 = 356, + Q1_Q2_Q3_Q4 = 357, + Q2_Q3_Q4_Q5 = 358, + Q3_Q4_Q5_Q6 = 359, + Q4_Q5_Q6_Q7 = 360, + Q5_Q6_Q7_Q8 = 361, + Q6_Q7_Q8_Q9 = 362, + Q7_Q8_Q9_Q10 = 363, + Q8_Q9_Q10_Q11 = 364, + Q9_Q10_Q11_Q12 = 365, + Q10_Q11_Q12_Q13 = 366, + Q11_Q12_Q13_Q14 = 367, + Q12_Q13_Q14_Q15 = 368, + Q13_Q14_Q15_Q16 = 369, + Q14_Q15_Q16_Q17 = 370, + Q15_Q16_Q17_Q18 = 371, + Q16_Q17_Q18_Q19 = 372, + Q17_Q18_Q19_Q20 = 373, + Q18_Q19_Q20_Q21 = 374, + Q19_Q20_Q21_Q22 = 375, + Q20_Q21_Q22_Q23 = 376, + Q21_Q22_Q23_Q24 = 377, + Q22_Q23_Q24_Q25 = 378, + Q23_Q24_Q25_Q26 = 379, + Q24_Q25_Q26_Q27 = 380, + Q25_Q26_Q27_Q28 = 381, + Q26_Q27_Q28_Q29 = 382, + Q27_Q28_Q29_Q30 = 383, + Q28_Q29_Q30_Q31 = 384, + Q29_Q30_Q31_Q0 = 385, + Q30_Q31_Q0_Q1 = 386, + Q31_Q0_Q1_Q2 = 387, + Q0_Q1_Q2 = 388, + Q1_Q2_Q3 = 389, + Q2_Q3_Q4 = 390, + Q3_Q4_Q5 = 391, + Q4_Q5_Q6 = 392, + Q5_Q6_Q7 = 393, + Q6_Q7_Q8 = 394, + Q7_Q8_Q9 = 395, + Q8_Q9_Q10 = 396, + Q9_Q10_Q11 = 397, + Q10_Q11_Q12 = 398, + Q11_Q12_Q13 = 399, + Q12_Q13_Q14 = 400, + Q13_Q14_Q15 = 401, + Q14_Q15_Q16 = 402, + Q15_Q16_Q17 = 403, + Q16_Q17_Q18 = 404, + Q17_Q18_Q19 = 405, + Q18_Q19_Q20 = 406, + Q19_Q20_Q21 = 407, + Q20_Q21_Q22 = 408, + Q21_Q22_Q23 = 409, + Q22_Q23_Q24 = 410, + Q23_Q24_Q25 = 411, + Q24_Q25_Q26 = 412, + Q25_Q26_Q27 = 413, + Q26_Q27_Q28 = 414, + Q27_Q28_Q29 = 415, + Q28_Q29_Q30 = 416, + Q29_Q30_Q31 = 417, + Q30_Q31_Q0 = 418, + Q31_Q0_Q1 = 419, + WZR_W0 = 420, + W30_WZR = 421, + W0_W1 = 422, + W1_W2 = 423, + W2_W3 = 424, + W3_W4 = 425, + W4_W5 = 426, + W5_W6 = 427, + W6_W7 = 428, + W7_W8 = 429, + W8_W9 = 430, + W9_W10 = 431, + W10_W11 = 432, + W11_W12 = 433, + W12_W13 = 434, + W13_W14 = 435, + W14_W15 = 436, + W15_W16 = 437, + W16_W17 = 438, + W17_W18 = 439, + W18_W19 = 440, + W19_W20 = 441, + W20_W21 = 442, + W21_W22 = 443, + W22_W23 = 444, + W23_W24 = 445, + W24_W25 = 446, + W25_W26 = 447, + W26_W27 = 448, + W27_W28 = 449, + W28_W29 = 450, + W29_W30 = 451, + FP_LR = 452, + LR_XZR = 453, + XZR_X0 = 454, + X28_FP = 455, + X0_X1 = 456, + X1_X2 = 457, + X2_X3 = 458, + X3_X4 = 459, + X4_X5 = 460, + X5_X6 = 461, + X6_X7 = 462, + X7_X8 = 463, + X8_X9 = 464, + X9_X10 = 465, + X10_X11 = 466, + X11_X12 = 467, + X12_X13 = 468, + X13_X14 = 469, + X14_X15 = 470, + X15_X16 = 471, + X16_X17 = 472, + X17_X18 = 473, + X18_X19 = 474, + X19_X20 = 475, + X20_X21 = 476, + X21_X22 = 477, + X22_X23 = 478, + X23_X24 = 479, + X24_X25 = 480, + X25_X26 = 481, + X26_X27 = 482, + X27_X28 = 483, + NUM_TARGET_REGS // 484 +}; +} + +// Register classes +namespace AArch64 { +enum { + FPR8RegClassID = 0, + FPR16RegClassID = 1, + GPR32allRegClassID = 2, + FPR32RegClassID = 3, + GPR32RegClassID = 4, + GPR32spRegClassID = 5, + GPR32commonRegClassID = 6, + CCRRegClassID = 7, + GPR32sponlyRegClassID = 8, + WSeqPairsClassRegClassID = 9, + WSeqPairsClass_with_sube32_in_GPR32commonRegClassID = 10, + WSeqPairsClass_with_subo32_in_GPR32commonRegClassID = 11, + WSeqPairsClass_with_sube32_in_GPR32common_and_WSeqPairsClass_with_subo32_in_GPR32commonRegClassID = 12, + GPR64allRegClassID = 13, + FPR64RegClassID = 14, + GPR64RegClassID = 15, + GPR64spRegClassID = 16, + GPR64commonRegClassID = 17, + tcGPR64RegClassID = 18, + GPR64sponlyRegClassID = 19, + DDRegClassID = 20, + XSeqPairsClassRegClassID = 21, + XSeqPairsClass_with_sub_32_in_GPR32commonRegClassID = 22, + XSeqPairsClass_with_subo64_in_GPR64commonRegClassID = 23, + XSeqPairsClass_with_sub_32_in_GPR32common_and_XSeqPairsClass_with_subo64_in_GPR64commonRegClassID = 24, + XSeqPairsClass_with_sube64_in_tcGPR64RegClassID = 25, + XSeqPairsClass_with_subo64_in_tcGPR64RegClassID = 26, + XSeqPairsClass_with_sub_32_in_GPR32common_and_XSeqPairsClass_with_subo64_in_tcGPR64RegClassID = 27, + FPR128RegClassID = 28, + FPR128_loRegClassID = 29, + DDDRegClassID = 30, + DDDDRegClassID = 31, + QQRegClassID = 32, + QQ_with_qsub0_in_FPR128_loRegClassID = 33, + QQ_with_qsub1_in_FPR128_loRegClassID = 34, + QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_loRegClassID = 35, + QQQRegClassID = 36, + QQQ_with_qsub0_in_FPR128_loRegClassID = 37, + QQQ_with_qsub1_in_FPR128_loRegClassID = 38, + QQQ_with_qsub2_in_FPR128_loRegClassID = 39, + QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_loRegClassID = 40, + QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loRegClassID = 41, + QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loRegClassID = 42, + QQQQRegClassID = 43, + QQQQ_with_qsub0_in_FPR128_loRegClassID = 44, + QQQQ_with_qsub1_in_FPR128_loRegClassID = 45, + QQQQ_with_qsub2_in_FPR128_loRegClassID = 46, + QQQQ_with_qsub3_in_FPR128_loRegClassID = 47, + QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_loRegClassID = 48, + QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClassID = 49, + QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID = 50, + QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClassID = 51, + QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID = 52, + QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID = 53, + + }; +} + +// Register alternate name indices +namespace AArch64 { +enum { + NoRegAltName, // 0 + vlist1, // 1 + vreg, // 2 + NUM_TARGET_REG_ALT_NAMES = 3 +}; +} + +// Subregister indices +namespace AArch64 { +enum { + NoSubRegister, + bsub, // 1 + dsub, // 2 + dsub0, // 3 + dsub1, // 4 + dsub2, // 5 + dsub3, // 6 + hsub, // 7 + qhisub, // 8 + qsub, // 9 + qsub0, // 10 + qsub1, // 11 + qsub2, // 12 + qsub3, // 13 + ssub, // 14 + sub_32, // 15 + sube32, // 16 + sube64, // 17 + subo32, // 18 + subo64, // 19 + dsub1_then_bsub, // 20 + dsub1_then_hsub, // 21 + dsub1_then_ssub, // 22 + dsub3_then_bsub, // 23 + dsub3_then_hsub, // 24 + dsub3_then_ssub, // 25 + dsub2_then_bsub, // 26 + dsub2_then_hsub, // 27 + dsub2_then_ssub, // 28 + qsub1_then_bsub, // 29 + qsub1_then_dsub, // 30 + qsub1_then_hsub, // 31 + qsub1_then_ssub, // 32 + qsub3_then_bsub, // 33 + qsub3_then_dsub, // 34 + qsub3_then_hsub, // 35 + qsub3_then_ssub, // 36 + qsub2_then_bsub, // 37 + qsub2_then_dsub, // 38 + qsub2_then_hsub, // 39 + qsub2_then_ssub, // 40 + subo64_then_sub_32, // 41 + dsub0_dsub1, // 42 + dsub0_dsub1_dsub2, // 43 + dsub1_dsub2, // 44 + dsub1_dsub2_dsub3, // 45 + dsub2_dsub3, // 46 + dsub_qsub1_then_dsub, // 47 + dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub, // 48 + dsub_qsub1_then_dsub_qsub2_then_dsub, // 49 + qsub0_qsub1, // 50 + qsub0_qsub1_qsub2, // 51 + qsub1_qsub2, // 52 + qsub1_qsub2_qsub3, // 53 + qsub2_qsub3, // 54 + qsub1_then_dsub_qsub2_then_dsub, // 55 + qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub, // 56 + qsub2_then_dsub_qsub3_then_dsub, // 57 + sub_32_subo64_then_sub_32, // 58 + NUM_TARGET_SUBREGS +}; +} +} // End llvm namespace +#endif // GET_REGINFO_ENUM + +/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ +|* *| +|* MC Register Information *| +|* *| +|* Automatically generated file, do not edit! *| +|* *| +\*===----------------------------------------------------------------------===*/ + + +#ifdef GET_REGINFO_MC_DESC +#undef GET_REGINFO_MC_DESC +namespace llvm_ks { + +extern const MCPhysReg AArch64RegDiffLists[] = { + /* 0 */ 0, 1, 0, + /* 3 */ 65185, 1, 1, 1, 0, + /* 8 */ 65281, 1, 1, 1, 0, + /* 13 */ 5, 29, 1, 1, 0, + /* 18 */ 65340, 419, 30, 1, 1, 0, + /* 24 */ 65153, 1, 1, 0, + /* 28 */ 65249, 1, 1, 0, + /* 32 */ 5, 1, 29, 1, 0, + /* 37 */ 5, 30, 1, 0, + /* 41 */ 1, 413, 1, 32, 1, 0, + /* 47 */ 31, 222, 1, 33, 1, 0, + /* 53 */ 65284, 96, 65472, 65472, 33, 96, 65472, 65472, 33, 96, 65472, 65472, 218, 1, 0, + /* 68 */ 65284, 96, 65472, 65472, 33, 96, 65472, 65472, 1, 96, 65472, 65472, 250, 1, 0, + /* 83 */ 256, 1, 0, + /* 86 */ 446, 1, 0, + /* 89 */ 450, 1, 0, + /* 92 */ 65117, 1, 0, + /* 95 */ 65151, 1, 0, + /* 98 */ 65217, 1, 0, + /* 101 */ 65282, 1, 0, + /* 104 */ 65313, 1, 0, + /* 107 */ 64, 64, 65440, 64, 123, 1, 62, 65503, 34, 65503, 34, 65503, 1, 63, 1, 62, 65503, 34, 65503, 34, 65503, 1, 0, + /* 130 */ 219, 1, 62, 65503, 34, 65503, 34, 65503, 1, 0, + /* 140 */ 64, 64, 65440, 64, 124, 31, 33, 65504, 62, 65503, 34, 65503, 1, 33, 31, 33, 65504, 62, 65503, 34, 65503, 1, 0, + /* 163 */ 220, 31, 33, 65504, 62, 65503, 34, 65503, 1, 0, + /* 173 */ 63, 65503, 34, 65503, 1, 64, 63, 65503, 34, 65503, 1, 0, + /* 185 */ 64, 64, 65440, 64, 123, 1, 63, 1, 65503, 1, 62, 65503, 1, 33, 1, 63, 1, 65503, 1, 62, 65503, 1, 0, + /* 208 */ 219, 1, 63, 1, 65503, 1, 62, 65503, 1, 0, + /* 218 */ 64, 65504, 63, 65503, 1, 33, 64, 65504, 63, 65503, 1, 0, + /* 230 */ 65503, 1, 128, 65503, 1, 0, + /* 236 */ 31, 221, 2, 32, 2, 0, + /* 242 */ 255, 2, 0, + /* 245 */ 65340, 449, 1, 1, 3, 0, + /* 251 */ 451, 3, 0, + /* 254 */ 65084, 3, 0, + /* 257 */ 4, 0, + /* 259 */ 5, 0, + /* 261 */ 31, 222, 1, 5, 28, 0, + /* 267 */ 228, 28, 0, + /* 270 */ 5, 1, 1, 29, 0, + /* 275 */ 64, 64, 65440, 64, 123, 1, 62, 1, 65503, 34, 65503, 1, 29, 34, 1, 62, 1, 65503, 34, 65503, 1, 29, 0, + /* 298 */ 219, 1, 62, 1, 65503, 34, 65503, 1, 29, 0, + /* 308 */ 5, 1, 30, 0, + /* 312 */ 63, 1, 65503, 1, 30, 34, 63, 1, 65503, 1, 30, 0, + /* 324 */ 5, 31, 0, + /* 327 */ 65504, 31, 97, 65504, 31, 0, + /* 333 */ 32, 0, + /* 335 */ 4, 33, 0, + /* 338 */ 64178, 33, 0, + /* 341 */ 34, 0, + /* 343 */ 0, 65, 0, + /* 346 */ 96, 0, + /* 348 */ 65122, 162, 0, + /* 351 */ 196, 0, + /* 353 */ 65316, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 219, 0, + /* 365 */ 65316, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 251, 0, + /* 377 */ 65089, 65535, 193, 65505, 252, 0, + /* 383 */ 65085, 196, 65341, 196, 253, 0, + /* 389 */ 65308, 65505, 65341, 196, 253, 0, + /* 395 */ 65279, 65505, 32, 65505, 253, 0, + /* 401 */ 65085, 196, 65345, 65535, 415, 0, + /* 407 */ 65339, 0, + /* 409 */ 65313, 65344, 0, + /* 412 */ 65374, 0, + /* 414 */ 65405, 0, + /* 416 */ 65437, 0, + /* 418 */ 65252, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 218, 64, 32, 1, 65440, 0, + /* 439 */ 65252, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 250, 64, 32, 1, 65440, 0, + /* 460 */ 65252, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 250, 64, 32, 65505, 65440, 0, + /* 481 */ 65284, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 249, 32, 32, 32, 64, 65473, 64, 65441, 65471, 64, 65441, 0, + /* 513 */ 65316, 96, 65472, 65472, 33, 96, 65472, 65472, 1, 96, 65472, 65472, 33, 96, 65472, 65472, 249, 64, 65473, 64, 65441, 0, + /* 535 */ 65469, 0, + /* 537 */ 65348, 96, 65472, 65472, 1, 96, 65472, 65472, 0, + /* 546 */ 65348, 96, 65472, 65472, 33, 96, 65472, 65472, 0, + /* 555 */ 65472, 96, 65472, 65472, 0, + /* 560 */ 65284, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 249, 32, 32, 32, 64, 65441, 64, 65473, 65439, 64, 65473, 0, + /* 592 */ 65284, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 217, 32, 32, 32, 64, 65473, 64, 65473, 65439, 64, 65473, 0, + /* 624 */ 65284, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 97, 65472, 96, 65472, 65472, 65, 65472, 96, 65472, 65472, 249, 32, 32, 32, 64, 65473, 64, 65473, 65439, 64, 65473, 0, + /* 656 */ 65316, 96, 65472, 65472, 1, 96, 65472, 65472, 33, 96, 65472, 65472, 33, 96, 65472, 65472, 249, 64, 65441, 64, 65473, 0, + /* 678 */ 65316, 96, 65472, 65472, 33, 96, 65472, 65472, 33, 96, 65472, 65472, 33, 96, 65472, 65472, 217, 64, 65473, 64, 65473, 0, + /* 700 */ 65316, 96, 65472, 65472, 33, 96, 65472, 65472, 33, 96, 65472, 65472, 1, 96, 65472, 65472, 249, 64, 65473, 64, 65473, 0, + /* 722 */ 65501, 0, + /* 724 */ 65284, 96, 65472, 65472, 1, 96, 65472, 65472, 33, 96, 65472, 65472, 250, 65505, 0, + /* 739 */ 65533, 0, + /* 741 */ 65535, 0, +}; + +extern const unsigned AArch64LaneMaskLists[] = { + /* 0 */ 0x00000000, ~0u, + /* 2 */ 0x00000040, 0x00000001, ~0u, + /* 5 */ 0x00000040, 0x00000100, 0x00000080, 0x00000001, ~0u, + /* 10 */ 0x00000040, 0x00000100, 0x00000001, ~0u, + /* 14 */ 0x00000200, 0x00000001, ~0u, + /* 17 */ 0x00000200, 0x00000800, 0x00000400, 0x00000001, ~0u, + /* 22 */ 0x00000200, 0x00000800, 0x00000001, ~0u, + /* 26 */ 0x00001000, 0x00000008, ~0u, + /* 29 */ 0x00000020, 0x00000010, ~0u, + /* 32 */ 0x00000010, 0x00000020, ~0u, + /* 35 */ 0x00000100, 0x00000080, 0x00000001, 0x00000040, ~0u, + /* 40 */ 0x00000100, 0x00000001, 0x00000040, ~0u, + /* 44 */ 0x00000001, 0x00000040, 0x00000100, 0x00000080, ~0u, + /* 49 */ 0x00000080, 0x00000001, 0x00000040, 0x00000100, ~0u, + /* 54 */ 0x00000800, 0x00000400, 0x00000001, 0x00000200, ~0u, + /* 59 */ 0x00000800, 0x00000001, 0x00000200, ~0u, + /* 63 */ 0x00000001, 0x00000200, 0x00000800, 0x00000400, ~0u, + /* 68 */ 0x00000400, 0x00000001, 0x00000200, 0x00000800, ~0u, + /* 73 */ 0x00000008, 0x00001000, ~0u, +}; + +extern const uint16_t AArch64SubRegIdxLists[] = { + /* 0 */ 2, 14, 7, 1, 0, + /* 5 */ 15, 0, + /* 7 */ 16, 18, 0, + /* 10 */ 3, 14, 7, 1, 4, 22, 21, 20, 0, + /* 19 */ 3, 14, 7, 1, 4, 22, 21, 20, 5, 28, 27, 26, 42, 44, 0, + /* 34 */ 3, 14, 7, 1, 4, 22, 21, 20, 5, 28, 27, 26, 6, 25, 24, 23, 42, 43, 44, 45, 46, 0, + /* 56 */ 10, 2, 14, 7, 1, 11, 30, 32, 31, 29, 47, 0, + /* 68 */ 10, 2, 14, 7, 1, 11, 30, 32, 31, 29, 12, 38, 40, 39, 37, 47, 49, 50, 52, 55, 0, + /* 89 */ 10, 2, 14, 7, 1, 11, 30, 32, 31, 29, 12, 38, 40, 39, 37, 13, 34, 36, 35, 33, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 0, + /* 121 */ 17, 15, 19, 41, 58, 0, +}; + +extern const MCRegisterInfo::SubRegCoveredBits AArch64SubRegIdxRanges[] = { + { 65535, 65535 }, + { 0, 8 }, // bsub + { 0, 32 }, // dsub + { 0, 64 }, // dsub0 + { 0, 64 }, // dsub1 + { 0, 64 }, // dsub2 + { 0, 64 }, // dsub3 + { 0, 16 }, // hsub + { 0, 64 }, // qhisub + { 0, 64 }, // qsub + { 0, 128 }, // qsub0 + { 0, 128 }, // qsub1 + { 0, 128 }, // qsub2 + { 0, 128 }, // qsub3 + { 0, 32 }, // ssub + { 0, 32 }, // sub_32 + { 0, 32 }, // sube32 + { 0, 64 }, // sube64 + { 0, 32 }, // subo32 + { 0, 64 }, // subo64 + { 0, 8 }, // dsub1_then_bsub + { 0, 16 }, // dsub1_then_hsub + { 0, 32 }, // dsub1_then_ssub + { 0, 8 }, // dsub3_then_bsub + { 0, 16 }, // dsub3_then_hsub + { 0, 32 }, // dsub3_then_ssub + { 0, 8 }, // dsub2_then_bsub + { 0, 16 }, // dsub2_then_hsub + { 0, 32 }, // dsub2_then_ssub + { 0, 8 }, // qsub1_then_bsub + { 0, 32 }, // qsub1_then_dsub + { 0, 16 }, // qsub1_then_hsub + { 0, 32 }, // qsub1_then_ssub + { 0, 8 }, // qsub3_then_bsub + { 0, 32 }, // qsub3_then_dsub + { 0, 16 }, // qsub3_then_hsub + { 0, 32 }, // qsub3_then_ssub + { 0, 8 }, // qsub2_then_bsub + { 0, 32 }, // qsub2_then_dsub + { 0, 16 }, // qsub2_then_hsub + { 0, 32 }, // qsub2_then_ssub + { 0, 32 }, // subo64_then_sub_32 + { 65535, 128 }, // dsub0_dsub1 + { 65535, 192 }, // dsub0_dsub1_dsub2 + { 65535, 128 }, // dsub1_dsub2 + { 65535, 192 }, // dsub1_dsub2_dsub3 + { 65535, 128 }, // dsub2_dsub3 + { 65535, 64 }, // dsub_qsub1_then_dsub + { 65535, 128 }, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub + { 65535, 96 }, // dsub_qsub1_then_dsub_qsub2_then_dsub + { 65535, 256 }, // qsub0_qsub1 + { 65535, 384 }, // qsub0_qsub1_qsub2 + { 65535, 256 }, // qsub1_qsub2 + { 65535, 384 }, // qsub1_qsub2_qsub3 + { 65535, 256 }, // qsub2_qsub3 + { 65535, 64 }, // qsub1_then_dsub_qsub2_then_dsub + { 65535, 96 }, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub + { 65535, 64 }, // qsub2_then_dsub_qsub3_then_dsub + { 65535, 64 }, // sub_32_subo64_then_sub_32 +}; + +extern const char AArch64RegStrings[] = { + /* 0 */ 'B', '1', '0', 0, + /* 4 */ 'D', '7', '_', 'D', '8', '_', 'D', '9', '_', 'D', '1', '0', 0, + /* 17 */ 'H', '1', '0', 0, + /* 21 */ 'Q', '7', '_', 'Q', '8', '_', 'Q', '9', '_', 'Q', '1', '0', 0, + /* 34 */ 'S', '1', '0', 0, + /* 38 */ 'W', '9', '_', 'W', '1', '0', 0, + /* 45 */ 'X', '9', '_', 'X', '1', '0', 0, + /* 52 */ 'B', '2', '0', 0, + /* 56 */ 'D', '1', '7', '_', 'D', '1', '8', '_', 'D', '1', '9', '_', 'D', '2', '0', 0, + /* 72 */ 'H', '2', '0', 0, + /* 76 */ 'Q', '1', '7', '_', 'Q', '1', '8', '_', 'Q', '1', '9', '_', 'Q', '2', '0', 0, + /* 92 */ 'S', '2', '0', 0, + /* 96 */ 'W', '1', '9', '_', 'W', '2', '0', 0, + /* 104 */ 'X', '1', '9', '_', 'X', '2', '0', 0, + /* 112 */ 'B', '3', '0', 0, + /* 116 */ 'D', '2', '7', '_', 'D', '2', '8', '_', 'D', '2', '9', '_', 'D', '3', '0', 0, + /* 132 */ 'H', '3', '0', 0, + /* 136 */ 'Q', '2', '7', '_', 'Q', '2', '8', '_', 'Q', '2', '9', '_', 'Q', '3', '0', 0, + /* 152 */ 'S', '3', '0', 0, + /* 156 */ 'W', '2', '9', '_', 'W', '3', '0', 0, + /* 164 */ 'B', '0', 0, + /* 167 */ 'D', '2', '9', '_', 'D', '3', '0', '_', 'D', '3', '1', '_', 'D', '0', 0, + /* 182 */ 'H', '0', 0, + /* 185 */ 'Q', '2', '9', '_', 'Q', '3', '0', '_', 'Q', '3', '1', '_', 'Q', '0', 0, + /* 200 */ 'S', '0', 0, + /* 203 */ 'W', 'Z', 'R', '_', 'W', '0', 0, + /* 210 */ 'X', 'Z', 'R', '_', 'X', '0', 0, + /* 217 */ 'B', '1', '1', 0, + /* 221 */ 'D', '8', '_', 'D', '9', '_', 'D', '1', '0', '_', 'D', '1', '1', 0, + /* 235 */ 'H', '1', '1', 0, + /* 239 */ 'Q', '8', '_', 'Q', '9', '_', 'Q', '1', '0', '_', 'Q', '1', '1', 0, + /* 253 */ 'S', '1', '1', 0, + /* 257 */ 'W', '1', '0', '_', 'W', '1', '1', 0, + /* 265 */ 'X', '1', '0', '_', 'X', '1', '1', 0, + /* 273 */ 'B', '2', '1', 0, + /* 277 */ 'D', '1', '8', '_', 'D', '1', '9', '_', 'D', '2', '0', '_', 'D', '2', '1', 0, + /* 293 */ 'H', '2', '1', 0, + /* 297 */ 'Q', '1', '8', '_', 'Q', '1', '9', '_', 'Q', '2', '0', '_', 'Q', '2', '1', 0, + /* 313 */ 'S', '2', '1', 0, + /* 317 */ 'W', '2', '0', '_', 'W', '2', '1', 0, + /* 325 */ 'X', '2', '0', '_', 'X', '2', '1', 0, + /* 333 */ 'B', '3', '1', 0, + /* 337 */ 'D', '2', '8', '_', 'D', '2', '9', '_', 'D', '3', '0', '_', 'D', '3', '1', 0, + /* 353 */ 'H', '3', '1', 0, + /* 357 */ 'Q', '2', '8', '_', 'Q', '2', '9', '_', 'Q', '3', '0', '_', 'Q', '3', '1', 0, + /* 373 */ 'S', '3', '1', 0, + /* 377 */ 'B', '1', 0, + /* 380 */ 'D', '3', '0', '_', 'D', '3', '1', '_', 'D', '0', '_', 'D', '1', 0, + /* 394 */ 'H', '1', 0, + /* 397 */ 'Q', '3', '0', '_', 'Q', '3', '1', '_', 'Q', '0', '_', 'Q', '1', 0, + /* 411 */ 'S', '1', 0, + /* 414 */ 'W', '0', '_', 'W', '1', 0, + /* 420 */ 'X', '0', '_', 'X', '1', 0, + /* 426 */ 'B', '1', '2', 0, + /* 430 */ 'D', '9', '_', 'D', '1', '0', '_', 'D', '1', '1', '_', 'D', '1', '2', 0, + /* 445 */ 'H', '1', '2', 0, + /* 449 */ 'Q', '9', '_', 'Q', '1', '0', '_', 'Q', '1', '1', '_', 'Q', '1', '2', 0, + /* 464 */ 'S', '1', '2', 0, + /* 468 */ 'W', '1', '1', '_', 'W', '1', '2', 0, + /* 476 */ 'X', '1', '1', '_', 'X', '1', '2', 0, + /* 484 */ 'B', '2', '2', 0, + /* 488 */ 'D', '1', '9', '_', 'D', '2', '0', '_', 'D', '2', '1', '_', 'D', '2', '2', 0, + /* 504 */ 'H', '2', '2', 0, + /* 508 */ 'Q', '1', '9', '_', 'Q', '2', '0', '_', 'Q', '2', '1', '_', 'Q', '2', '2', 0, + /* 524 */ 'S', '2', '2', 0, + /* 528 */ 'W', '2', '1', '_', 'W', '2', '2', 0, + /* 536 */ 'X', '2', '1', '_', 'X', '2', '2', 0, + /* 544 */ 'B', '2', 0, + /* 547 */ 'D', '3', '1', '_', 'D', '0', '_', 'D', '1', '_', 'D', '2', 0, + /* 560 */ 'H', '2', 0, + /* 563 */ 'Q', '3', '1', '_', 'Q', '0', '_', 'Q', '1', '_', 'Q', '2', 0, + /* 576 */ 'S', '2', 0, + /* 579 */ 'W', '1', '_', 'W', '2', 0, + /* 585 */ 'X', '1', '_', 'X', '2', 0, + /* 591 */ 'B', '1', '3', 0, + /* 595 */ 'D', '1', '0', '_', 'D', '1', '1', '_', 'D', '1', '2', '_', 'D', '1', '3', 0, + /* 611 */ 'H', '1', '3', 0, + /* 615 */ 'Q', '1', '0', '_', 'Q', '1', '1', '_', 'Q', '1', '2', '_', 'Q', '1', '3', 0, + /* 631 */ 'S', '1', '3', 0, + /* 635 */ 'W', '1', '2', '_', 'W', '1', '3', 0, + /* 643 */ 'X', '1', '2', '_', 'X', '1', '3', 0, + /* 651 */ 'B', '2', '3', 0, + /* 655 */ 'D', '2', '0', '_', 'D', '2', '1', '_', 'D', '2', '2', '_', 'D', '2', '3', 0, + /* 671 */ 'H', '2', '3', 0, + /* 675 */ 'Q', '2', '0', '_', 'Q', '2', '1', '_', 'Q', '2', '2', '_', 'Q', '2', '3', 0, + /* 691 */ 'S', '2', '3', 0, + /* 695 */ 'W', '2', '2', '_', 'W', '2', '3', 0, + /* 703 */ 'X', '2', '2', '_', 'X', '2', '3', 0, + /* 711 */ 'B', '3', 0, + /* 714 */ 'D', '0', '_', 'D', '1', '_', 'D', '2', '_', 'D', '3', 0, + /* 726 */ 'H', '3', 0, + /* 729 */ 'Q', '0', '_', 'Q', '1', '_', 'Q', '2', '_', 'Q', '3', 0, + /* 741 */ 'S', '3', 0, + /* 744 */ 'W', '2', '_', 'W', '3', 0, + /* 750 */ 'X', '2', '_', 'X', '3', 0, + /* 756 */ 'B', '1', '4', 0, + /* 760 */ 'D', '1', '1', '_', 'D', '1', '2', '_', 'D', '1', '3', '_', 'D', '1', '4', 0, + /* 776 */ 'H', '1', '4', 0, + /* 780 */ 'Q', '1', '1', '_', 'Q', '1', '2', '_', 'Q', '1', '3', '_', 'Q', '1', '4', 0, + /* 796 */ 'S', '1', '4', 0, + /* 800 */ 'W', '1', '3', '_', 'W', '1', '4', 0, + /* 808 */ 'X', '1', '3', '_', 'X', '1', '4', 0, + /* 816 */ 'B', '2', '4', 0, + /* 820 */ 'D', '2', '1', '_', 'D', '2', '2', '_', 'D', '2', '3', '_', 'D', '2', '4', 0, + /* 836 */ 'H', '2', '4', 0, + /* 840 */ 'Q', '2', '1', '_', 'Q', '2', '2', '_', 'Q', '2', '3', '_', 'Q', '2', '4', 0, + /* 856 */ 'S', '2', '4', 0, + /* 860 */ 'W', '2', '3', '_', 'W', '2', '4', 0, + /* 868 */ 'X', '2', '3', '_', 'X', '2', '4', 0, + /* 876 */ 'B', '4', 0, + /* 879 */ 'D', '1', '_', 'D', '2', '_', 'D', '3', '_', 'D', '4', 0, + /* 891 */ 'H', '4', 0, + /* 894 */ 'Q', '1', '_', 'Q', '2', '_', 'Q', '3', '_', 'Q', '4', 0, + /* 906 */ 'S', '4', 0, + /* 909 */ 'W', '3', '_', 'W', '4', 0, + /* 915 */ 'X', '3', '_', 'X', '4', 0, + /* 921 */ 'B', '1', '5', 0, + /* 925 */ 'D', '1', '2', '_', 'D', '1', '3', '_', 'D', '1', '4', '_', 'D', '1', '5', 0, + /* 941 */ 'H', '1', '5', 0, + /* 945 */ 'Q', '1', '2', '_', 'Q', '1', '3', '_', 'Q', '1', '4', '_', 'Q', '1', '5', 0, + /* 961 */ 'S', '1', '5', 0, + /* 965 */ 'W', '1', '4', '_', 'W', '1', '5', 0, + /* 973 */ 'X', '1', '4', '_', 'X', '1', '5', 0, + /* 981 */ 'B', '2', '5', 0, + /* 985 */ 'D', '2', '2', '_', 'D', '2', '3', '_', 'D', '2', '4', '_', 'D', '2', '5', 0, + /* 1001 */ 'H', '2', '5', 0, + /* 1005 */ 'Q', '2', '2', '_', 'Q', '2', '3', '_', 'Q', '2', '4', '_', 'Q', '2', '5', 0, + /* 1021 */ 'S', '2', '5', 0, + /* 1025 */ 'W', '2', '4', '_', 'W', '2', '5', 0, + /* 1033 */ 'X', '2', '4', '_', 'X', '2', '5', 0, + /* 1041 */ 'B', '5', 0, + /* 1044 */ 'D', '2', '_', 'D', '3', '_', 'D', '4', '_', 'D', '5', 0, + /* 1056 */ 'H', '5', 0, + /* 1059 */ 'Q', '2', '_', 'Q', '3', '_', 'Q', '4', '_', 'Q', '5', 0, + /* 1071 */ 'S', '5', 0, + /* 1074 */ 'W', '4', '_', 'W', '5', 0, + /* 1080 */ 'X', '4', '_', 'X', '5', 0, + /* 1086 */ 'B', '1', '6', 0, + /* 1090 */ 'D', '1', '3', '_', 'D', '1', '4', '_', 'D', '1', '5', '_', 'D', '1', '6', 0, + /* 1106 */ 'H', '1', '6', 0, + /* 1110 */ 'Q', '1', '3', '_', 'Q', '1', '4', '_', 'Q', '1', '5', '_', 'Q', '1', '6', 0, + /* 1126 */ 'S', '1', '6', 0, + /* 1130 */ 'W', '1', '5', '_', 'W', '1', '6', 0, + /* 1138 */ 'X', '1', '5', '_', 'X', '1', '6', 0, + /* 1146 */ 'B', '2', '6', 0, + /* 1150 */ 'D', '2', '3', '_', 'D', '2', '4', '_', 'D', '2', '5', '_', 'D', '2', '6', 0, + /* 1166 */ 'H', '2', '6', 0, + /* 1170 */ 'Q', '2', '3', '_', 'Q', '2', '4', '_', 'Q', '2', '5', '_', 'Q', '2', '6', 0, + /* 1186 */ 'S', '2', '6', 0, + /* 1190 */ 'W', '2', '5', '_', 'W', '2', '6', 0, + /* 1198 */ 'X', '2', '5', '_', 'X', '2', '6', 0, + /* 1206 */ 'B', '6', 0, + /* 1209 */ 'D', '3', '_', 'D', '4', '_', 'D', '5', '_', 'D', '6', 0, + /* 1221 */ 'H', '6', 0, + /* 1224 */ 'Q', '3', '_', 'Q', '4', '_', 'Q', '5', '_', 'Q', '6', 0, + /* 1236 */ 'S', '6', 0, + /* 1239 */ 'W', '5', '_', 'W', '6', 0, + /* 1245 */ 'X', '5', '_', 'X', '6', 0, + /* 1251 */ 'B', '1', '7', 0, + /* 1255 */ 'D', '1', '4', '_', 'D', '1', '5', '_', 'D', '1', '6', '_', 'D', '1', '7', 0, + /* 1271 */ 'H', '1', '7', 0, + /* 1275 */ 'Q', '1', '4', '_', 'Q', '1', '5', '_', 'Q', '1', '6', '_', 'Q', '1', '7', 0, + /* 1291 */ 'S', '1', '7', 0, + /* 1295 */ 'W', '1', '6', '_', 'W', '1', '7', 0, + /* 1303 */ 'X', '1', '6', '_', 'X', '1', '7', 0, + /* 1311 */ 'B', '2', '7', 0, + /* 1315 */ 'D', '2', '4', '_', 'D', '2', '5', '_', 'D', '2', '6', '_', 'D', '2', '7', 0, + /* 1331 */ 'H', '2', '7', 0, + /* 1335 */ 'Q', '2', '4', '_', 'Q', '2', '5', '_', 'Q', '2', '6', '_', 'Q', '2', '7', 0, + /* 1351 */ 'S', '2', '7', 0, + /* 1355 */ 'W', '2', '6', '_', 'W', '2', '7', 0, + /* 1363 */ 'X', '2', '6', '_', 'X', '2', '7', 0, + /* 1371 */ 'B', '7', 0, + /* 1374 */ 'D', '4', '_', 'D', '5', '_', 'D', '6', '_', 'D', '7', 0, + /* 1386 */ 'H', '7', 0, + /* 1389 */ 'Q', '4', '_', 'Q', '5', '_', 'Q', '6', '_', 'Q', '7', 0, + /* 1401 */ 'S', '7', 0, + /* 1404 */ 'W', '6', '_', 'W', '7', 0, + /* 1410 */ 'X', '6', '_', 'X', '7', 0, + /* 1416 */ 'B', '1', '8', 0, + /* 1420 */ 'D', '1', '5', '_', 'D', '1', '6', '_', 'D', '1', '7', '_', 'D', '1', '8', 0, + /* 1436 */ 'H', '1', '8', 0, + /* 1440 */ 'Q', '1', '5', '_', 'Q', '1', '6', '_', 'Q', '1', '7', '_', 'Q', '1', '8', 0, + /* 1456 */ 'S', '1', '8', 0, + /* 1460 */ 'W', '1', '7', '_', 'W', '1', '8', 0, + /* 1468 */ 'X', '1', '7', '_', 'X', '1', '8', 0, + /* 1476 */ 'B', '2', '8', 0, + /* 1480 */ 'D', '2', '5', '_', 'D', '2', '6', '_', 'D', '2', '7', '_', 'D', '2', '8', 0, + /* 1496 */ 'H', '2', '8', 0, + /* 1500 */ 'Q', '2', '5', '_', 'Q', '2', '6', '_', 'Q', '2', '7', '_', 'Q', '2', '8', 0, + /* 1516 */ 'S', '2', '8', 0, + /* 1520 */ 'W', '2', '7', '_', 'W', '2', '8', 0, + /* 1528 */ 'X', '2', '7', '_', 'X', '2', '8', 0, + /* 1536 */ 'B', '8', 0, + /* 1539 */ 'D', '5', '_', 'D', '6', '_', 'D', '7', '_', 'D', '8', 0, + /* 1551 */ 'H', '8', 0, + /* 1554 */ 'Q', '5', '_', 'Q', '6', '_', 'Q', '7', '_', 'Q', '8', 0, + /* 1566 */ 'S', '8', 0, + /* 1569 */ 'W', '7', '_', 'W', '8', 0, + /* 1575 */ 'X', '7', '_', 'X', '8', 0, + /* 1581 */ 'B', '1', '9', 0, + /* 1585 */ 'D', '1', '6', '_', 'D', '1', '7', '_', 'D', '1', '8', '_', 'D', '1', '9', 0, + /* 1601 */ 'H', '1', '9', 0, + /* 1605 */ 'Q', '1', '6', '_', 'Q', '1', '7', '_', 'Q', '1', '8', '_', 'Q', '1', '9', 0, + /* 1621 */ 'S', '1', '9', 0, + /* 1625 */ 'W', '1', '8', '_', 'W', '1', '9', 0, + /* 1633 */ 'X', '1', '8', '_', 'X', '1', '9', 0, + /* 1641 */ 'B', '2', '9', 0, + /* 1645 */ 'D', '2', '6', '_', 'D', '2', '7', '_', 'D', '2', '8', '_', 'D', '2', '9', 0, + /* 1661 */ 'H', '2', '9', 0, + /* 1665 */ 'Q', '2', '6', '_', 'Q', '2', '7', '_', 'Q', '2', '8', '_', 'Q', '2', '9', 0, + /* 1681 */ 'S', '2', '9', 0, + /* 1685 */ 'W', '2', '8', '_', 'W', '2', '9', 0, + /* 1693 */ 'B', '9', 0, + /* 1696 */ 'D', '6', '_', 'D', '7', '_', 'D', '8', '_', 'D', '9', 0, + /* 1708 */ 'H', '9', 0, + /* 1711 */ 'Q', '6', '_', 'Q', '7', '_', 'Q', '8', '_', 'Q', '9', 0, + /* 1723 */ 'S', '9', 0, + /* 1726 */ 'W', '8', '_', 'W', '9', 0, + /* 1732 */ 'X', '8', '_', 'X', '9', 0, + /* 1738 */ 'X', '2', '8', '_', 'F', 'P', 0, + /* 1745 */ 'W', 'S', 'P', 0, + /* 1749 */ 'F', 'P', '_', 'L', 'R', 0, + /* 1755 */ 'W', '3', '0', '_', 'W', 'Z', 'R', 0, + /* 1763 */ 'L', 'R', '_', 'X', 'Z', 'R', 0, + /* 1770 */ 'N', 'Z', 'C', 'V', 0, +}; + +extern const MCRegisterDesc AArch64RegDesc[] = { // Descriptors + { 3, 0, 0, 0, 0, 0 }, + { 1742, 351, 251, 5, 11857, 27 }, + { 1752, 351, 89, 5, 11857, 27 }, + { 1770, 2, 2, 4, 11857, 0 }, + { 1746, 1, 2, 5, 3984, 27 }, + { 1745, 2, 741, 4, 3984, 0 }, + { 1759, 2, 41, 4, 4112, 0 }, + { 1766, 741, 86, 5, 4112, 27 }, + { 164, 2, 140, 4, 11825, 0 }, + { 377, 2, 185, 4, 11825, 0 }, + { 544, 2, 275, 4, 11825, 0 }, + { 711, 2, 107, 4, 11825, 0 }, + { 876, 2, 107, 4, 11825, 0 }, + { 1041, 2, 107, 4, 11825, 0 }, + { 1206, 2, 107, 4, 11825, 0 }, + { 1371, 2, 107, 4, 11825, 0 }, + { 1536, 2, 107, 4, 11825, 0 }, + { 1693, 2, 107, 4, 11825, 0 }, + { 0, 2, 107, 4, 11825, 0 }, + { 217, 2, 107, 4, 11825, 0 }, + { 426, 2, 107, 4, 11825, 0 }, + { 591, 2, 107, 4, 11825, 0 }, + { 756, 2, 107, 4, 11825, 0 }, + { 921, 2, 107, 4, 11825, 0 }, + { 1086, 2, 107, 4, 11825, 0 }, + { 1251, 2, 107, 4, 11825, 0 }, + { 1416, 2, 107, 4, 11825, 0 }, + { 1581, 2, 107, 4, 11825, 0 }, + { 52, 2, 107, 4, 11825, 0 }, + { 273, 2, 107, 4, 11825, 0 }, + { 484, 2, 107, 4, 11825, 0 }, + { 651, 2, 107, 4, 11825, 0 }, + { 816, 2, 107, 4, 11825, 0 }, + { 981, 2, 107, 4, 11825, 0 }, + { 1146, 2, 107, 4, 11825, 0 }, + { 1311, 2, 107, 4, 11825, 0 }, + { 1476, 2, 107, 4, 11825, 0 }, + { 1641, 2, 107, 4, 11825, 0 }, + { 112, 2, 107, 4, 11825, 0 }, + { 333, 2, 107, 4, 11825, 0 }, + { 179, 542, 143, 1, 11553, 3 }, + { 391, 542, 188, 1, 11553, 3 }, + { 557, 542, 278, 1, 11553, 3 }, + { 723, 542, 110, 1, 11553, 3 }, + { 888, 542, 110, 1, 11553, 3 }, + { 1053, 542, 110, 1, 11553, 3 }, + { 1218, 542, 110, 1, 11553, 3 }, + { 1383, 542, 110, 1, 11553, 3 }, + { 1548, 542, 110, 1, 11553, 3 }, + { 1705, 542, 110, 1, 11553, 3 }, + { 13, 542, 110, 1, 11553, 3 }, + { 231, 542, 110, 1, 11553, 3 }, + { 441, 542, 110, 1, 11553, 3 }, + { 607, 542, 110, 1, 11553, 3 }, + { 772, 542, 110, 1, 11553, 3 }, + { 937, 542, 110, 1, 11553, 3 }, + { 1102, 542, 110, 1, 11553, 3 }, + { 1267, 542, 110, 1, 11553, 3 }, + { 1432, 542, 110, 1, 11553, 3 }, + { 1597, 542, 110, 1, 11553, 3 }, + { 68, 542, 110, 1, 11553, 3 }, + { 289, 542, 110, 1, 11553, 3 }, + { 500, 542, 110, 1, 11553, 3 }, + { 667, 542, 110, 1, 11553, 3 }, + { 832, 542, 110, 1, 11553, 3 }, + { 997, 542, 110, 1, 11553, 3 }, + { 1162, 542, 110, 1, 11553, 3 }, + { 1327, 542, 110, 1, 11553, 3 }, + { 1492, 542, 110, 1, 11553, 3 }, + { 1657, 542, 110, 1, 11553, 3 }, + { 128, 542, 110, 1, 11553, 3 }, + { 349, 542, 110, 1, 11553, 3 }, + { 182, 544, 141, 3, 8561, 3 }, + { 394, 544, 186, 3, 8561, 3 }, + { 560, 544, 276, 3, 8561, 3 }, + { 726, 544, 108, 3, 8561, 3 }, + { 891, 544, 108, 3, 8561, 3 }, + { 1056, 544, 108, 3, 8561, 3 }, + { 1221, 544, 108, 3, 8561, 3 }, + { 1386, 544, 108, 3, 8561, 3 }, + { 1551, 544, 108, 3, 8561, 3 }, + { 1708, 544, 108, 3, 8561, 3 }, + { 17, 544, 108, 3, 8561, 3 }, + { 235, 544, 108, 3, 8561, 3 }, + { 445, 544, 108, 3, 8561, 3 }, + { 611, 544, 108, 3, 8561, 3 }, + { 776, 544, 108, 3, 8561, 3 }, + { 941, 544, 108, 3, 8561, 3 }, + { 1106, 544, 108, 3, 8561, 3 }, + { 1271, 544, 108, 3, 8561, 3 }, + { 1436, 544, 108, 3, 8561, 3 }, + { 1601, 544, 108, 3, 8561, 3 }, + { 72, 544, 108, 3, 8561, 3 }, + { 293, 544, 108, 3, 8561, 3 }, + { 504, 544, 108, 3, 8561, 3 }, + { 671, 544, 108, 3, 8561, 3 }, + { 836, 544, 108, 3, 8561, 3 }, + { 1001, 544, 108, 3, 8561, 3 }, + { 1166, 544, 108, 3, 8561, 3 }, + { 1331, 544, 108, 3, 8561, 3 }, + { 1496, 544, 108, 3, 8561, 3 }, + { 1661, 544, 108, 3, 8561, 3 }, + { 132, 544, 108, 3, 8561, 3 }, + { 353, 544, 108, 3, 8561, 3 }, + { 197, 555, 163, 0, 6657, 3 }, + { 408, 555, 208, 0, 6657, 3 }, + { 573, 555, 298, 0, 6657, 3 }, + { 738, 555, 130, 0, 6657, 3 }, + { 903, 555, 130, 0, 6657, 3 }, + { 1068, 555, 130, 0, 6657, 3 }, + { 1233, 555, 130, 0, 6657, 3 }, + { 1398, 555, 130, 0, 6657, 3 }, + { 1563, 555, 130, 0, 6657, 3 }, + { 1720, 555, 130, 0, 6657, 3 }, + { 30, 555, 130, 0, 6657, 3 }, + { 249, 555, 130, 0, 6657, 3 }, + { 460, 555, 130, 0, 6657, 3 }, + { 627, 555, 130, 0, 6657, 3 }, + { 792, 555, 130, 0, 6657, 3 }, + { 957, 555, 130, 0, 6657, 3 }, + { 1122, 555, 130, 0, 6657, 3 }, + { 1287, 555, 130, 0, 6657, 3 }, + { 1452, 555, 130, 0, 6657, 3 }, + { 1617, 555, 130, 0, 6657, 3 }, + { 88, 555, 130, 0, 6657, 3 }, + { 309, 555, 130, 0, 6657, 3 }, + { 520, 555, 130, 0, 6657, 3 }, + { 687, 555, 130, 0, 6657, 3 }, + { 852, 555, 130, 0, 6657, 3 }, + { 1017, 555, 130, 0, 6657, 3 }, + { 1182, 555, 130, 0, 6657, 3 }, + { 1347, 555, 130, 0, 6657, 3 }, + { 1512, 555, 130, 0, 6657, 3 }, + { 1677, 555, 130, 0, 6657, 3 }, + { 148, 555, 130, 0, 6657, 3 }, + { 369, 555, 130, 0, 6657, 3 }, + { 200, 543, 142, 2, 6625, 3 }, + { 411, 543, 187, 2, 6625, 3 }, + { 576, 543, 277, 2, 6625, 3 }, + { 741, 543, 109, 2, 6625, 3 }, + { 906, 543, 109, 2, 6625, 3 }, + { 1071, 543, 109, 2, 6625, 3 }, + { 1236, 543, 109, 2, 6625, 3 }, + { 1401, 543, 109, 2, 6625, 3 }, + { 1566, 543, 109, 2, 6625, 3 }, + { 1723, 543, 109, 2, 6625, 3 }, + { 34, 543, 109, 2, 6625, 3 }, + { 253, 543, 109, 2, 6625, 3 }, + { 464, 543, 109, 2, 6625, 3 }, + { 631, 543, 109, 2, 6625, 3 }, + { 796, 543, 109, 2, 6625, 3 }, + { 961, 543, 109, 2, 6625, 3 }, + { 1126, 543, 109, 2, 6625, 3 }, + { 1291, 543, 109, 2, 6625, 3 }, + { 1456, 543, 109, 2, 6625, 3 }, + { 1621, 543, 109, 2, 6625, 3 }, + { 92, 543, 109, 2, 6625, 3 }, + { 313, 543, 109, 2, 6625, 3 }, + { 524, 543, 109, 2, 6625, 3 }, + { 691, 543, 109, 2, 6625, 3 }, + { 856, 543, 109, 2, 6625, 3 }, + { 1021, 543, 109, 2, 6625, 3 }, + { 1186, 543, 109, 2, 6625, 3 }, + { 1351, 543, 109, 2, 6625, 3 }, + { 1516, 543, 109, 2, 6625, 3 }, + { 1681, 543, 109, 2, 6625, 3 }, + { 152, 543, 109, 2, 6625, 3 }, + { 373, 543, 109, 2, 6625, 3 }, + { 207, 2, 236, 4, 6625, 0 }, + { 417, 2, 47, 4, 6625, 0 }, + { 582, 2, 47, 4, 6625, 0 }, + { 747, 2, 47, 4, 6625, 0 }, + { 912, 2, 47, 4, 6625, 0 }, + { 1077, 2, 47, 4, 6625, 0 }, + { 1242, 2, 47, 4, 6625, 0 }, + { 1407, 2, 47, 4, 6625, 0 }, + { 1572, 2, 47, 4, 6625, 0 }, + { 1729, 2, 47, 4, 6625, 0 }, + { 41, 2, 47, 4, 6625, 0 }, + { 261, 2, 47, 4, 6625, 0 }, + { 472, 2, 47, 4, 6625, 0 }, + { 639, 2, 47, 4, 6625, 0 }, + { 804, 2, 47, 4, 6625, 0 }, + { 969, 2, 47, 4, 6625, 0 }, + { 1134, 2, 47, 4, 6625, 0 }, + { 1299, 2, 47, 4, 6625, 0 }, + { 1464, 2, 47, 4, 6625, 0 }, + { 1629, 2, 47, 4, 6625, 0 }, + { 100, 2, 47, 4, 6625, 0 }, + { 321, 2, 47, 4, 6625, 0 }, + { 532, 2, 47, 4, 6625, 0 }, + { 699, 2, 47, 4, 6625, 0 }, + { 864, 2, 47, 4, 6625, 0 }, + { 1029, 2, 47, 4, 6625, 0 }, + { 1194, 2, 47, 4, 6625, 0 }, + { 1359, 2, 47, 4, 6625, 0 }, + { 1524, 2, 261, 4, 6625, 0 }, + { 1689, 2, 245, 4, 6513, 0 }, + { 160, 2, 18, 4, 6513, 0 }, + { 214, 737, 242, 5, 6593, 27 }, + { 423, 737, 83, 5, 6593, 27 }, + { 588, 737, 83, 5, 6593, 27 }, + { 753, 737, 83, 5, 6593, 27 }, + { 918, 737, 83, 5, 6593, 27 }, + { 1083, 737, 83, 5, 6593, 27 }, + { 1248, 737, 83, 5, 6593, 27 }, + { 1413, 737, 83, 5, 6593, 27 }, + { 1578, 737, 83, 5, 6593, 27 }, + { 1735, 737, 83, 5, 6593, 27 }, + { 48, 737, 83, 5, 6593, 27 }, + { 269, 737, 83, 5, 6593, 27 }, + { 480, 737, 83, 5, 6593, 27 }, + { 647, 737, 83, 5, 6593, 27 }, + { 812, 737, 83, 5, 6593, 27 }, + { 977, 737, 83, 5, 6593, 27 }, + { 1142, 737, 83, 5, 6593, 27 }, + { 1307, 737, 83, 5, 6593, 27 }, + { 1472, 737, 83, 5, 6593, 27 }, + { 1637, 737, 83, 5, 6593, 27 }, + { 108, 737, 83, 5, 6593, 27 }, + { 329, 737, 83, 5, 6593, 27 }, + { 540, 737, 83, 5, 6593, 27 }, + { 707, 737, 83, 5, 6593, 27 }, + { 872, 737, 83, 5, 6593, 27 }, + { 1037, 737, 83, 5, 6593, 27 }, + { 1202, 737, 83, 5, 6593, 27 }, + { 1367, 737, 83, 5, 6593, 27 }, + { 1532, 737, 267, 5, 6593, 27 }, + { 388, 546, 218, 10, 1665, 37 }, + { 554, 546, 312, 10, 1665, 37 }, + { 720, 546, 173, 10, 1665, 37 }, + { 885, 546, 173, 10, 1665, 37 }, + { 1050, 546, 173, 10, 1665, 37 }, + { 1215, 546, 173, 10, 1665, 37 }, + { 1380, 546, 173, 10, 1665, 37 }, + { 1545, 546, 173, 10, 1665, 37 }, + { 1702, 546, 173, 10, 1665, 37 }, + { 10, 546, 173, 10, 1665, 37 }, + { 227, 546, 173, 10, 1665, 37 }, + { 437, 546, 173, 10, 1665, 37 }, + { 603, 546, 173, 10, 1665, 37 }, + { 768, 546, 173, 10, 1665, 37 }, + { 933, 546, 173, 10, 1665, 37 }, + { 1098, 546, 173, 10, 1665, 37 }, + { 1263, 546, 173, 10, 1665, 37 }, + { 1428, 546, 173, 10, 1665, 37 }, + { 1593, 546, 173, 10, 1665, 37 }, + { 64, 546, 173, 10, 1665, 37 }, + { 285, 546, 173, 10, 1665, 37 }, + { 496, 546, 173, 10, 1665, 37 }, + { 663, 546, 173, 10, 1665, 37 }, + { 828, 546, 173, 10, 1665, 37 }, + { 993, 546, 173, 10, 1665, 37 }, + { 1158, 546, 173, 10, 1665, 37 }, + { 1323, 546, 173, 10, 1665, 37 }, + { 1488, 546, 173, 10, 1665, 37 }, + { 1653, 546, 173, 10, 1665, 37 }, + { 124, 546, 173, 10, 1665, 37 }, + { 345, 546, 173, 10, 1665, 37 }, + { 175, 537, 173, 10, 5184, 2 }, + { 714, 678, 346, 34, 129, 44 }, + { 879, 678, 346, 34, 129, 44 }, + { 1044, 678, 346, 34, 129, 44 }, + { 1209, 678, 346, 34, 129, 44 }, + { 1374, 678, 346, 34, 129, 44 }, + { 1539, 678, 346, 34, 129, 44 }, + { 1696, 678, 346, 34, 129, 44 }, + { 4, 678, 346, 34, 129, 44 }, + { 221, 678, 346, 34, 129, 44 }, + { 430, 678, 346, 34, 129, 44 }, + { 595, 678, 346, 34, 129, 44 }, + { 760, 678, 346, 34, 129, 44 }, + { 925, 678, 346, 34, 129, 44 }, + { 1090, 678, 346, 34, 129, 44 }, + { 1255, 678, 346, 34, 129, 44 }, + { 1420, 678, 346, 34, 129, 44 }, + { 1585, 678, 346, 34, 129, 44 }, + { 56, 678, 346, 34, 129, 44 }, + { 277, 678, 346, 34, 129, 44 }, + { 488, 678, 346, 34, 129, 44 }, + { 655, 678, 346, 34, 129, 44 }, + { 820, 678, 346, 34, 129, 44 }, + { 985, 678, 346, 34, 129, 44 }, + { 1150, 678, 346, 34, 129, 44 }, + { 1315, 678, 346, 34, 129, 44 }, + { 1480, 678, 346, 34, 129, 44 }, + { 1645, 678, 346, 34, 129, 44 }, + { 116, 678, 346, 34, 129, 44 }, + { 337, 678, 346, 34, 129, 44 }, + { 167, 700, 346, 34, 208, 49 }, + { 380, 513, 346, 34, 512, 35 }, + { 547, 656, 346, 34, 4320, 5 }, + { 551, 53, 327, 19, 449, 50 }, + { 717, 53, 230, 19, 449, 50 }, + { 882, 53, 230, 19, 449, 50 }, + { 1047, 53, 230, 19, 449, 50 }, + { 1212, 53, 230, 19, 449, 50 }, + { 1377, 53, 230, 19, 449, 50 }, + { 1542, 53, 230, 19, 449, 50 }, + { 1699, 53, 230, 19, 449, 50 }, + { 7, 53, 230, 19, 449, 50 }, + { 224, 53, 230, 19, 449, 50 }, + { 433, 53, 230, 19, 449, 50 }, + { 599, 53, 230, 19, 449, 50 }, + { 764, 53, 230, 19, 449, 50 }, + { 929, 53, 230, 19, 449, 50 }, + { 1094, 53, 230, 19, 449, 50 }, + { 1259, 53, 230, 19, 449, 50 }, + { 1424, 53, 230, 19, 449, 50 }, + { 1589, 53, 230, 19, 449, 50 }, + { 60, 53, 230, 19, 449, 50 }, + { 281, 53, 230, 19, 449, 50 }, + { 492, 53, 230, 19, 449, 50 }, + { 659, 53, 230, 19, 449, 50 }, + { 824, 53, 230, 19, 449, 50 }, + { 989, 53, 230, 19, 449, 50 }, + { 1154, 53, 230, 19, 449, 50 }, + { 1319, 53, 230, 19, 449, 50 }, + { 1484, 53, 230, 19, 449, 50 }, + { 1649, 53, 230, 19, 449, 50 }, + { 120, 53, 230, 19, 449, 50 }, + { 341, 53, 230, 19, 449, 50 }, + { 171, 68, 230, 19, 592, 40 }, + { 384, 724, 230, 19, 4928, 10 }, + { 405, 353, 224, 56, 1569, 56 }, + { 570, 353, 318, 56, 1569, 56 }, + { 735, 353, 179, 56, 1569, 56 }, + { 900, 353, 179, 56, 1569, 56 }, + { 1065, 353, 179, 56, 1569, 56 }, + { 1230, 353, 179, 56, 1569, 56 }, + { 1395, 353, 179, 56, 1569, 56 }, + { 1560, 353, 179, 56, 1569, 56 }, + { 1717, 353, 179, 56, 1569, 56 }, + { 27, 353, 179, 56, 1569, 56 }, + { 245, 353, 179, 56, 1569, 56 }, + { 456, 353, 179, 56, 1569, 56 }, + { 623, 353, 179, 56, 1569, 56 }, + { 788, 353, 179, 56, 1569, 56 }, + { 953, 353, 179, 56, 1569, 56 }, + { 1118, 353, 179, 56, 1569, 56 }, + { 1283, 353, 179, 56, 1569, 56 }, + { 1448, 353, 179, 56, 1569, 56 }, + { 1613, 353, 179, 56, 1569, 56 }, + { 84, 353, 179, 56, 1569, 56 }, + { 305, 353, 179, 56, 1569, 56 }, + { 516, 353, 179, 56, 1569, 56 }, + { 683, 353, 179, 56, 1569, 56 }, + { 848, 353, 179, 56, 1569, 56 }, + { 1013, 353, 179, 56, 1569, 56 }, + { 1178, 353, 179, 56, 1569, 56 }, + { 1343, 353, 179, 56, 1569, 56 }, + { 1508, 353, 179, 56, 1569, 56 }, + { 1673, 353, 179, 56, 1569, 56 }, + { 144, 353, 179, 56, 1569, 56 }, + { 365, 353, 179, 56, 1569, 56 }, + { 193, 365, 179, 56, 5184, 14 }, + { 729, 592, 2, 89, 49, 63 }, + { 894, 592, 2, 89, 49, 63 }, + { 1059, 592, 2, 89, 49, 63 }, + { 1224, 592, 2, 89, 49, 63 }, + { 1389, 592, 2, 89, 49, 63 }, + { 1554, 592, 2, 89, 49, 63 }, + { 1711, 592, 2, 89, 49, 63 }, + { 21, 592, 2, 89, 49, 63 }, + { 239, 592, 2, 89, 49, 63 }, + { 449, 592, 2, 89, 49, 63 }, + { 615, 592, 2, 89, 49, 63 }, + { 780, 592, 2, 89, 49, 63 }, + { 945, 592, 2, 89, 49, 63 }, + { 1110, 592, 2, 89, 49, 63 }, + { 1275, 592, 2, 89, 49, 63 }, + { 1440, 592, 2, 89, 49, 63 }, + { 1605, 592, 2, 89, 49, 63 }, + { 76, 592, 2, 89, 49, 63 }, + { 297, 592, 2, 89, 49, 63 }, + { 508, 592, 2, 89, 49, 63 }, + { 675, 592, 2, 89, 49, 63 }, + { 840, 592, 2, 89, 49, 63 }, + { 1005, 592, 2, 89, 49, 63 }, + { 1170, 592, 2, 89, 49, 63 }, + { 1335, 592, 2, 89, 49, 63 }, + { 1500, 592, 2, 89, 49, 63 }, + { 1665, 592, 2, 89, 49, 63 }, + { 136, 592, 2, 89, 49, 63 }, + { 357, 592, 2, 89, 49, 63 }, + { 185, 624, 2, 89, 208, 68 }, + { 397, 481, 2, 89, 512, 54 }, + { 563, 560, 2, 89, 4320, 17 }, + { 567, 418, 330, 68, 385, 69 }, + { 732, 418, 127, 68, 385, 69 }, + { 897, 418, 127, 68, 385, 69 }, + { 1062, 418, 127, 68, 385, 69 }, + { 1227, 418, 127, 68, 385, 69 }, + { 1392, 418, 127, 68, 385, 69 }, + { 1557, 418, 127, 68, 385, 69 }, + { 1714, 418, 127, 68, 385, 69 }, + { 24, 418, 127, 68, 385, 69 }, + { 242, 418, 127, 68, 385, 69 }, + { 452, 418, 127, 68, 385, 69 }, + { 619, 418, 127, 68, 385, 69 }, + { 784, 418, 127, 68, 385, 69 }, + { 949, 418, 127, 68, 385, 69 }, + { 1114, 418, 127, 68, 385, 69 }, + { 1279, 418, 127, 68, 385, 69 }, + { 1444, 418, 127, 68, 385, 69 }, + { 1609, 418, 127, 68, 385, 69 }, + { 80, 418, 127, 68, 385, 69 }, + { 301, 418, 127, 68, 385, 69 }, + { 512, 418, 127, 68, 385, 69 }, + { 679, 418, 127, 68, 385, 69 }, + { 844, 418, 127, 68, 385, 69 }, + { 1009, 418, 127, 68, 385, 69 }, + { 1174, 418, 127, 68, 385, 69 }, + { 1339, 418, 127, 68, 385, 69 }, + { 1504, 418, 127, 68, 385, 69 }, + { 1669, 418, 127, 68, 385, 69 }, + { 140, 418, 127, 68, 385, 69 }, + { 361, 418, 127, 68, 385, 69 }, + { 189, 439, 127, 68, 592, 59 }, + { 401, 460, 127, 68, 4928, 22 }, + { 203, 348, 341, 7, 5360, 32 }, + { 1755, 409, 333, 7, 3968, 32 }, + { 414, 101, 341, 7, 1521, 32 }, + { 579, 101, 341, 7, 1521, 32 }, + { 744, 101, 341, 7, 1521, 32 }, + { 909, 101, 341, 7, 1521, 32 }, + { 1074, 101, 341, 7, 1521, 32 }, + { 1239, 101, 341, 7, 1521, 32 }, + { 1404, 101, 341, 7, 1521, 32 }, + { 1569, 101, 341, 7, 1521, 32 }, + { 1726, 101, 341, 7, 1521, 32 }, + { 38, 101, 341, 7, 1521, 32 }, + { 257, 101, 341, 7, 1521, 32 }, + { 468, 101, 341, 7, 1521, 32 }, + { 635, 101, 341, 7, 1521, 32 }, + { 800, 101, 341, 7, 1521, 32 }, + { 965, 101, 341, 7, 1521, 32 }, + { 1130, 101, 341, 7, 1521, 32 }, + { 1295, 101, 341, 7, 1521, 32 }, + { 1460, 101, 341, 7, 1521, 32 }, + { 1625, 101, 341, 7, 1521, 32 }, + { 96, 101, 341, 7, 1521, 32 }, + { 317, 101, 341, 7, 1521, 32 }, + { 528, 101, 341, 7, 1521, 32 }, + { 695, 101, 341, 7, 1521, 32 }, + { 860, 101, 341, 7, 1521, 32 }, + { 1025, 101, 341, 7, 1521, 32 }, + { 1190, 101, 341, 7, 1521, 32 }, + { 1355, 101, 341, 7, 1521, 32 }, + { 1520, 101, 341, 7, 1521, 32 }, + { 1685, 101, 259, 7, 5488, 29 }, + { 156, 101, 1, 7, 0, 32 }, + { 1749, 383, 2, 121, 0, 73 }, + { 1763, 401, 2, 121, 4065, 73 }, + { 210, 377, 2, 121, 5411, 73 }, + { 1738, 389, 2, 121, 5488, 26 }, + { 420, 395, 2, 121, 1473, 73 }, + { 585, 395, 2, 121, 1473, 73 }, + { 750, 395, 2, 121, 1473, 73 }, + { 915, 395, 2, 121, 1473, 73 }, + { 1080, 395, 2, 121, 1473, 73 }, + { 1245, 395, 2, 121, 1473, 73 }, + { 1410, 395, 2, 121, 1473, 73 }, + { 1575, 395, 2, 121, 1473, 73 }, + { 1732, 395, 2, 121, 1473, 73 }, + { 45, 395, 2, 121, 1473, 73 }, + { 265, 395, 2, 121, 1473, 73 }, + { 476, 395, 2, 121, 1473, 73 }, + { 643, 395, 2, 121, 1473, 73 }, + { 808, 395, 2, 121, 1473, 73 }, + { 973, 395, 2, 121, 1473, 73 }, + { 1138, 395, 2, 121, 1473, 73 }, + { 1303, 395, 2, 121, 1473, 73 }, + { 1468, 395, 2, 121, 1473, 73 }, + { 1633, 395, 2, 121, 1473, 73 }, + { 104, 395, 2, 121, 1473, 73 }, + { 325, 395, 2, 121, 1473, 73 }, + { 536, 395, 2, 121, 1473, 73 }, + { 703, 395, 2, 121, 1473, 73 }, + { 868, 395, 2, 121, 1473, 73 }, + { 1033, 395, 2, 121, 1473, 73 }, + { 1198, 395, 2, 121, 1473, 73 }, + { 1363, 395, 2, 121, 1473, 73 }, + { 1528, 395, 2, 121, 1473, 73 }, +}; + +extern const MCPhysReg AArch64RegUnitRoots[][2] = { + { AArch64::W29 }, + { AArch64::W30 }, + { AArch64::NZCV }, + { AArch64::WSP }, + { AArch64::WZR }, + { AArch64::B0 }, + { AArch64::B1 }, + { AArch64::B2 }, + { AArch64::B3 }, + { AArch64::B4 }, + { AArch64::B5 }, + { AArch64::B6 }, + { AArch64::B7 }, + { AArch64::B8 }, + { AArch64::B9 }, + { AArch64::B10 }, + { AArch64::B11 }, + { AArch64::B12 }, + { AArch64::B13 }, + { AArch64::B14 }, + { AArch64::B15 }, + { AArch64::B16 }, + { AArch64::B17 }, + { AArch64::B18 }, + { AArch64::B19 }, + { AArch64::B20 }, + { AArch64::B21 }, + { AArch64::B22 }, + { AArch64::B23 }, + { AArch64::B24 }, + { AArch64::B25 }, + { AArch64::B26 }, + { AArch64::B27 }, + { AArch64::B28 }, + { AArch64::B29 }, + { AArch64::B30 }, + { AArch64::B31 }, + { AArch64::W0 }, + { AArch64::W1 }, + { AArch64::W2 }, + { AArch64::W3 }, + { AArch64::W4 }, + { AArch64::W5 }, + { AArch64::W6 }, + { AArch64::W7 }, + { AArch64::W8 }, + { AArch64::W9 }, + { AArch64::W10 }, + { AArch64::W11 }, + { AArch64::W12 }, + { AArch64::W13 }, + { AArch64::W14 }, + { AArch64::W15 }, + { AArch64::W16 }, + { AArch64::W17 }, + { AArch64::W18 }, + { AArch64::W19 }, + { AArch64::W20 }, + { AArch64::W21 }, + { AArch64::W22 }, + { AArch64::W23 }, + { AArch64::W24 }, + { AArch64::W25 }, + { AArch64::W26 }, + { AArch64::W27 }, + { AArch64::W28 }, +}; + +namespace { // Register classes... + // FPR8 Register Class... + const MCPhysReg FPR8[] = { + AArch64::B0, AArch64::B1, AArch64::B2, AArch64::B3, AArch64::B4, AArch64::B5, AArch64::B6, AArch64::B7, AArch64::B8, AArch64::B9, AArch64::B10, AArch64::B11, AArch64::B12, AArch64::B13, AArch64::B14, AArch64::B15, AArch64::B16, AArch64::B17, AArch64::B18, AArch64::B19, AArch64::B20, AArch64::B21, AArch64::B22, AArch64::B23, AArch64::B24, AArch64::B25, AArch64::B26, AArch64::B27, AArch64::B28, AArch64::B29, AArch64::B30, AArch64::B31, + }; + + // FPR8 Bit set. + const uint8_t FPR8Bits[] = { + 0x00, 0xff, 0xff, 0xff, 0xff, + }; + + // FPR16 Register Class... + const MCPhysReg FPR16[] = { + AArch64::H0, AArch64::H1, AArch64::H2, AArch64::H3, AArch64::H4, AArch64::H5, AArch64::H6, AArch64::H7, AArch64::H8, AArch64::H9, AArch64::H10, AArch64::H11, AArch64::H12, AArch64::H13, AArch64::H14, AArch64::H15, AArch64::H16, AArch64::H17, AArch64::H18, AArch64::H19, AArch64::H20, AArch64::H21, AArch64::H22, AArch64::H23, AArch64::H24, AArch64::H25, AArch64::H26, AArch64::H27, AArch64::H28, AArch64::H29, AArch64::H30, AArch64::H31, + }; + + // FPR16 Bit set. + const uint8_t FPR16Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, + }; + + // GPR32all Register Class... + const MCPhysReg GPR32all[] = { + AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7, AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19, AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24, AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, AArch64::WZR, AArch64::WSP, + }; + + // GPR32all Bit set. + const uint8_t GPR32allBits[] = { + 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x7f, + }; + + // FPR32 Register Class... + const MCPhysReg FPR32[] = { + AArch64::S0, AArch64::S1, AArch64::S2, AArch64::S3, AArch64::S4, AArch64::S5, AArch64::S6, AArch64::S7, AArch64::S8, AArch64::S9, AArch64::S10, AArch64::S11, AArch64::S12, AArch64::S13, AArch64::S14, AArch64::S15, AArch64::S16, AArch64::S17, AArch64::S18, AArch64::S19, AArch64::S20, AArch64::S21, AArch64::S22, AArch64::S23, AArch64::S24, AArch64::S25, AArch64::S26, AArch64::S27, AArch64::S28, AArch64::S29, AArch64::S30, AArch64::S31, + }; + + // FPR32 Bit set. + const uint8_t FPR32Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, + }; + + // GPR32 Register Class... + const MCPhysReg GPR32[] = { + AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7, AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19, AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24, AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, AArch64::WZR, + }; + + // GPR32 Bit set. + const uint8_t GPR32Bits[] = { + 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x7f, + }; + + // GPR32sp Register Class... + const MCPhysReg GPR32sp[] = { + AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7, AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19, AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24, AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, AArch64::WSP, + }; + + // GPR32sp Bit set. + const uint8_t GPR32spBits[] = { + 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x7f, + }; + + // GPR32common Register Class... + const MCPhysReg GPR32common[] = { + AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7, AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19, AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24, AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, + }; + + // GPR32common Bit set. + const uint8_t GPR32commonBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x7f, + }; + + // CCR Register Class... + const MCPhysReg CCR[] = { + AArch64::NZCV, + }; + + // CCR Bit set. + const uint8_t CCRBits[] = { + 0x08, + }; + + // GPR32sponly Register Class... + const MCPhysReg GPR32sponly[] = { + AArch64::WSP, + }; + + // GPR32sponly Bit set. + const uint8_t GPR32sponlyBits[] = { + 0x20, + }; + + // WSeqPairsClass Register Class... + const MCPhysReg WSeqPairsClass[] = { + AArch64::W0_W1, AArch64::W1_W2, AArch64::W2_W3, AArch64::W3_W4, AArch64::W4_W5, AArch64::W5_W6, AArch64::W6_W7, AArch64::W7_W8, AArch64::W8_W9, AArch64::W9_W10, AArch64::W10_W11, AArch64::W11_W12, AArch64::W12_W13, AArch64::W13_W14, AArch64::W14_W15, AArch64::W15_W16, AArch64::W16_W17, AArch64::W17_W18, AArch64::W18_W19, AArch64::W19_W20, AArch64::W20_W21, AArch64::W21_W22, AArch64::W22_W23, AArch64::W23_W24, AArch64::W24_W25, AArch64::W25_W26, AArch64::W26_W27, AArch64::W27_W28, AArch64::W28_W29, AArch64::W29_W30, AArch64::W30_WZR, AArch64::WZR_W0, + }; + + // WSeqPairsClass Bit set. + const uint8_t WSeqPairsClassBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, + }; + + // WSeqPairsClass_with_sube32_in_GPR32common Register Class... + const MCPhysReg WSeqPairsClass_with_sube32_in_GPR32common[] = { + AArch64::W0_W1, AArch64::W1_W2, AArch64::W2_W3, AArch64::W3_W4, AArch64::W4_W5, AArch64::W5_W6, AArch64::W6_W7, AArch64::W7_W8, AArch64::W8_W9, AArch64::W9_W10, AArch64::W10_W11, AArch64::W11_W12, AArch64::W12_W13, AArch64::W13_W14, AArch64::W14_W15, AArch64::W15_W16, AArch64::W16_W17, AArch64::W17_W18, AArch64::W18_W19, AArch64::W19_W20, AArch64::W20_W21, AArch64::W21_W22, AArch64::W22_W23, AArch64::W23_W24, AArch64::W24_W25, AArch64::W25_W26, AArch64::W26_W27, AArch64::W27_W28, AArch64::W28_W29, AArch64::W29_W30, AArch64::W30_WZR, + }; + + // WSeqPairsClass_with_sube32_in_GPR32common Bit set. + const uint8_t WSeqPairsClass_with_sube32_in_GPR32commonBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x0f, + }; + + // WSeqPairsClass_with_subo32_in_GPR32common Register Class... + const MCPhysReg WSeqPairsClass_with_subo32_in_GPR32common[] = { + AArch64::W0_W1, AArch64::W1_W2, AArch64::W2_W3, AArch64::W3_W4, AArch64::W4_W5, AArch64::W5_W6, AArch64::W6_W7, AArch64::W7_W8, AArch64::W8_W9, AArch64::W9_W10, AArch64::W10_W11, AArch64::W11_W12, AArch64::W12_W13, AArch64::W13_W14, AArch64::W14_W15, AArch64::W15_W16, AArch64::W16_W17, AArch64::W17_W18, AArch64::W18_W19, AArch64::W19_W20, AArch64::W20_W21, AArch64::W21_W22, AArch64::W22_W23, AArch64::W23_W24, AArch64::W24_W25, AArch64::W25_W26, AArch64::W26_W27, AArch64::W27_W28, AArch64::W28_W29, AArch64::W29_W30, AArch64::WZR_W0, + }; + + // WSeqPairsClass_with_subo32_in_GPR32common Bit set. + const uint8_t WSeqPairsClass_with_subo32_in_GPR32commonBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd0, 0xff, 0xff, 0xff, 0x0f, + }; + + // WSeqPairsClass_with_sube32_in_GPR32common_and_WSeqPairsClass_with_subo32_in_GPR32common Register Class... + const MCPhysReg WSeqPairsClass_with_sube32_in_GPR32common_and_WSeqPairsClass_with_subo32_in_GPR32common[] = { + AArch64::W0_W1, AArch64::W1_W2, AArch64::W2_W3, AArch64::W3_W4, AArch64::W4_W5, AArch64::W5_W6, AArch64::W6_W7, AArch64::W7_W8, AArch64::W8_W9, AArch64::W9_W10, AArch64::W10_W11, AArch64::W11_W12, AArch64::W12_W13, AArch64::W13_W14, AArch64::W14_W15, AArch64::W15_W16, AArch64::W16_W17, AArch64::W17_W18, AArch64::W18_W19, AArch64::W19_W20, AArch64::W20_W21, AArch64::W21_W22, AArch64::W22_W23, AArch64::W23_W24, AArch64::W24_W25, AArch64::W25_W26, AArch64::W26_W27, AArch64::W27_W28, AArch64::W28_W29, AArch64::W29_W30, + }; + + // WSeqPairsClass_with_sube32_in_GPR32common_and_WSeqPairsClass_with_subo32_in_GPR32common Bit set. + const uint8_t WSeqPairsClass_with_sube32_in_GPR32common_and_WSeqPairsClass_with_subo32_in_GPR32commonBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x0f, + }; + + // GPR64all Register Class... + const MCPhysReg GPR64all[] = { + AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::XZR, AArch64::SP, + }; + + // GPR64all Bit set. + const uint8_t GPR64allBits[] = { + 0x96, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x0f, + }; + + // FPR64 Register Class... + const MCPhysReg FPR64[] = { + AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::D16, AArch64::D17, AArch64::D18, AArch64::D19, AArch64::D20, AArch64::D21, AArch64::D22, AArch64::D23, AArch64::D24, AArch64::D25, AArch64::D26, AArch64::D27, AArch64::D28, AArch64::D29, AArch64::D30, AArch64::D31, + }; + + // FPR64 Bit set. + const uint8_t FPR64Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, + }; + + // GPR64 Register Class... + const MCPhysReg GPR64[] = { + AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::XZR, + }; + + // GPR64 Bit set. + const uint8_t GPR64Bits[] = { + 0x86, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x0f, + }; + + // GPR64sp Register Class... + const MCPhysReg GPR64sp[] = { + AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::SP, + }; + + // GPR64sp Bit set. + const uint8_t GPR64spBits[] = { + 0x16, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x0f, + }; + + // GPR64common Register Class... + const MCPhysReg GPR64common[] = { + AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, + }; + + // GPR64common Bit set. + const uint8_t GPR64commonBits[] = { + 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x0f, + }; + + // tcGPR64 Register Class... + const MCPhysReg tcGPR64[] = { + AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, + }; + + // tcGPR64 Bit set. + const uint8_t tcGPR64Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x03, + }; + + // GPR64sponly Register Class... + const MCPhysReg GPR64sponly[] = { + AArch64::SP, + }; + + // GPR64sponly Bit set. + const uint8_t GPR64sponlyBits[] = { + 0x10, + }; + + // DD Register Class... + const MCPhysReg DD[] = { + AArch64::D0_D1, AArch64::D1_D2, AArch64::D2_D3, AArch64::D3_D4, AArch64::D4_D5, AArch64::D5_D6, AArch64::D6_D7, AArch64::D7_D8, AArch64::D8_D9, AArch64::D9_D10, AArch64::D10_D11, AArch64::D11_D12, AArch64::D12_D13, AArch64::D13_D14, AArch64::D14_D15, AArch64::D15_D16, AArch64::D16_D17, AArch64::D17_D18, AArch64::D18_D19, AArch64::D19_D20, AArch64::D20_D21, AArch64::D21_D22, AArch64::D22_D23, AArch64::D23_D24, AArch64::D24_D25, AArch64::D25_D26, AArch64::D26_D27, AArch64::D27_D28, AArch64::D28_D29, AArch64::D29_D30, AArch64::D30_D31, AArch64::D31_D0, + }; + + // DD Bit set. + const uint8_t DDBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, + }; + + // XSeqPairsClass Register Class... + const MCPhysReg XSeqPairsClass[] = { + AArch64::X0_X1, AArch64::X1_X2, AArch64::X2_X3, AArch64::X3_X4, AArch64::X4_X5, AArch64::X5_X6, AArch64::X6_X7, AArch64::X7_X8, AArch64::X8_X9, AArch64::X9_X10, AArch64::X10_X11, AArch64::X11_X12, AArch64::X12_X13, AArch64::X13_X14, AArch64::X14_X15, AArch64::X15_X16, AArch64::X16_X17, AArch64::X17_X18, AArch64::X18_X19, AArch64::X19_X20, AArch64::X20_X21, AArch64::X21_X22, AArch64::X22_X23, AArch64::X23_X24, AArch64::X24_X25, AArch64::X25_X26, AArch64::X26_X27, AArch64::X27_X28, AArch64::X28_FP, AArch64::FP_LR, AArch64::LR_XZR, AArch64::XZR_X0, + }; + + // XSeqPairsClass Bit set. + const uint8_t XSeqPairsClassBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, + }; + + // XSeqPairsClass_with_sub_32_in_GPR32common Register Class... + const MCPhysReg XSeqPairsClass_with_sub_32_in_GPR32common[] = { + AArch64::X0_X1, AArch64::X1_X2, AArch64::X2_X3, AArch64::X3_X4, AArch64::X4_X5, AArch64::X5_X6, AArch64::X6_X7, AArch64::X7_X8, AArch64::X8_X9, AArch64::X9_X10, AArch64::X10_X11, AArch64::X11_X12, AArch64::X12_X13, AArch64::X13_X14, AArch64::X14_X15, AArch64::X15_X16, AArch64::X16_X17, AArch64::X17_X18, AArch64::X18_X19, AArch64::X19_X20, AArch64::X20_X21, AArch64::X21_X22, AArch64::X22_X23, AArch64::X23_X24, AArch64::X24_X25, AArch64::X25_X26, AArch64::X26_X27, AArch64::X27_X28, AArch64::X28_FP, AArch64::FP_LR, AArch64::LR_XZR, + }; + + // XSeqPairsClass_with_sub_32_in_GPR32common Bit set. + const uint8_t XSeqPairsClass_with_sub_32_in_GPR32commonBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xb0, 0xff, 0xff, 0xff, 0x0f, + }; + + // XSeqPairsClass_with_subo64_in_GPR64common Register Class... + const MCPhysReg XSeqPairsClass_with_subo64_in_GPR64common[] = { + AArch64::X0_X1, AArch64::X1_X2, AArch64::X2_X3, AArch64::X3_X4, AArch64::X4_X5, AArch64::X5_X6, AArch64::X6_X7, AArch64::X7_X8, AArch64::X8_X9, AArch64::X9_X10, AArch64::X10_X11, AArch64::X11_X12, AArch64::X12_X13, AArch64::X13_X14, AArch64::X14_X15, AArch64::X15_X16, AArch64::X16_X17, AArch64::X17_X18, AArch64::X18_X19, AArch64::X19_X20, AArch64::X20_X21, AArch64::X21_X22, AArch64::X22_X23, AArch64::X23_X24, AArch64::X24_X25, AArch64::X25_X26, AArch64::X26_X27, AArch64::X27_X28, AArch64::X28_FP, AArch64::FP_LR, AArch64::XZR_X0, + }; + + // XSeqPairsClass_with_subo64_in_GPR64common Bit set. + const uint8_t XSeqPairsClass_with_subo64_in_GPR64commonBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd0, 0xff, 0xff, 0xff, 0x0f, + }; + + // XSeqPairsClass_with_sub_32_in_GPR32common_and_XSeqPairsClass_with_subo64_in_GPR64common Register Class... + const MCPhysReg XSeqPairsClass_with_sub_32_in_GPR32common_and_XSeqPairsClass_with_subo64_in_GPR64common[] = { + AArch64::X0_X1, AArch64::X1_X2, AArch64::X2_X3, AArch64::X3_X4, AArch64::X4_X5, AArch64::X5_X6, AArch64::X6_X7, AArch64::X7_X8, AArch64::X8_X9, AArch64::X9_X10, AArch64::X10_X11, AArch64::X11_X12, AArch64::X12_X13, AArch64::X13_X14, AArch64::X14_X15, AArch64::X15_X16, AArch64::X16_X17, AArch64::X17_X18, AArch64::X18_X19, AArch64::X19_X20, AArch64::X20_X21, AArch64::X21_X22, AArch64::X22_X23, AArch64::X23_X24, AArch64::X24_X25, AArch64::X25_X26, AArch64::X26_X27, AArch64::X27_X28, AArch64::X28_FP, AArch64::FP_LR, + }; + + // XSeqPairsClass_with_sub_32_in_GPR32common_and_XSeqPairsClass_with_subo64_in_GPR64common Bit set. + const uint8_t XSeqPairsClass_with_sub_32_in_GPR32common_and_XSeqPairsClass_with_subo64_in_GPR64commonBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x90, 0xff, 0xff, 0xff, 0x0f, + }; + + // XSeqPairsClass_with_sube64_in_tcGPR64 Register Class... + const MCPhysReg XSeqPairsClass_with_sube64_in_tcGPR64[] = { + AArch64::X0_X1, AArch64::X1_X2, AArch64::X2_X3, AArch64::X3_X4, AArch64::X4_X5, AArch64::X5_X6, AArch64::X6_X7, AArch64::X7_X8, AArch64::X8_X9, AArch64::X9_X10, AArch64::X10_X11, AArch64::X11_X12, AArch64::X12_X13, AArch64::X13_X14, AArch64::X14_X15, AArch64::X15_X16, AArch64::X16_X17, AArch64::X17_X18, AArch64::X18_X19, + }; + + // XSeqPairsClass_with_sube64_in_tcGPR64 Bit set. + const uint8_t XSeqPairsClass_with_sube64_in_tcGPR64Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x07, + }; + + // XSeqPairsClass_with_subo64_in_tcGPR64 Register Class... + const MCPhysReg XSeqPairsClass_with_subo64_in_tcGPR64[] = { + AArch64::X0_X1, AArch64::X1_X2, AArch64::X2_X3, AArch64::X3_X4, AArch64::X4_X5, AArch64::X5_X6, AArch64::X6_X7, AArch64::X7_X8, AArch64::X8_X9, AArch64::X9_X10, AArch64::X10_X11, AArch64::X11_X12, AArch64::X12_X13, AArch64::X13_X14, AArch64::X14_X15, AArch64::X15_X16, AArch64::X16_X17, AArch64::X17_X18, AArch64::XZR_X0, + }; + + // XSeqPairsClass_with_subo64_in_tcGPR64 Bit set. + const uint8_t XSeqPairsClass_with_subo64_in_tcGPR64Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0xff, 0xff, 0x03, + }; + + // XSeqPairsClass_with_sub_32_in_GPR32common_and_XSeqPairsClass_with_subo64_in_tcGPR64 Register Class... + const MCPhysReg XSeqPairsClass_with_sub_32_in_GPR32common_and_XSeqPairsClass_with_subo64_in_tcGPR64[] = { + AArch64::X0_X1, AArch64::X1_X2, AArch64::X2_X3, AArch64::X3_X4, AArch64::X4_X5, AArch64::X5_X6, AArch64::X6_X7, AArch64::X7_X8, AArch64::X8_X9, AArch64::X9_X10, AArch64::X10_X11, AArch64::X11_X12, AArch64::X12_X13, AArch64::X13_X14, AArch64::X14_X15, AArch64::X15_X16, AArch64::X16_X17, AArch64::X17_X18, + }; + + // XSeqPairsClass_with_sub_32_in_GPR32common_and_XSeqPairsClass_with_subo64_in_tcGPR64 Bit set. + const uint8_t XSeqPairsClass_with_sub_32_in_GPR32common_and_XSeqPairsClass_with_subo64_in_tcGPR64Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x03, + }; + + // FPR128 Register Class... + const MCPhysReg FPR128[] = { + AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24, AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArch64::Q30, AArch64::Q31, + }; + + // FPR128 Bit set. + const uint8_t FPR128Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, + }; + + // FPR128_lo Register Class... + const MCPhysReg FPR128_lo[] = { + AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, + }; + + // FPR128_lo Bit set. + const uint8_t FPR128_loBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, + }; + + // DDD Register Class... + const MCPhysReg DDD[] = { + AArch64::D0_D1_D2, AArch64::D1_D2_D3, AArch64::D2_D3_D4, AArch64::D3_D4_D5, AArch64::D4_D5_D6, AArch64::D5_D6_D7, AArch64::D6_D7_D8, AArch64::D7_D8_D9, AArch64::D8_D9_D10, AArch64::D9_D10_D11, AArch64::D10_D11_D12, AArch64::D11_D12_D13, AArch64::D12_D13_D14, AArch64::D13_D14_D15, AArch64::D14_D15_D16, AArch64::D15_D16_D17, AArch64::D16_D17_D18, AArch64::D17_D18_D19, AArch64::D18_D19_D20, AArch64::D19_D20_D21, AArch64::D20_D21_D22, AArch64::D21_D22_D23, AArch64::D22_D23_D24, AArch64::D23_D24_D25, AArch64::D24_D25_D26, AArch64::D25_D26_D27, AArch64::D26_D27_D28, AArch64::D27_D28_D29, AArch64::D28_D29_D30, AArch64::D29_D30_D31, AArch64::D30_D31_D0, AArch64::D31_D0_D1, + }; + + // DDD Bit set. + const uint8_t DDDBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, + }; + + // DDDD Register Class... + const MCPhysReg DDDD[] = { + AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5, AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8, AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11, AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14, AArch64::D12_D13_D14_D15, AArch64::D13_D14_D15_D16, AArch64::D14_D15_D16_D17, AArch64::D15_D16_D17_D18, AArch64::D16_D17_D18_D19, AArch64::D17_D18_D19_D20, AArch64::D18_D19_D20_D21, AArch64::D19_D20_D21_D22, AArch64::D20_D21_D22_D23, AArch64::D21_D22_D23_D24, AArch64::D22_D23_D24_D25, AArch64::D23_D24_D25_D26, AArch64::D24_D25_D26_D27, AArch64::D25_D26_D27_D28, AArch64::D26_D27_D28_D29, AArch64::D27_D28_D29_D30, AArch64::D28_D29_D30_D31, AArch64::D29_D30_D31_D0, AArch64::D30_D31_D0_D1, AArch64::D31_D0_D1_D2, + }; + + // DDDD Bit set. + const uint8_t DDDDBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, + }; + + // QQ Register Class... + const MCPhysReg QQ[] = { + AArch64::Q0_Q1, AArch64::Q1_Q2, AArch64::Q2_Q3, AArch64::Q3_Q4, AArch64::Q4_Q5, AArch64::Q5_Q6, AArch64::Q6_Q7, AArch64::Q7_Q8, AArch64::Q8_Q9, AArch64::Q9_Q10, AArch64::Q10_Q11, AArch64::Q11_Q12, AArch64::Q12_Q13, AArch64::Q13_Q14, AArch64::Q14_Q15, AArch64::Q15_Q16, AArch64::Q16_Q17, AArch64::Q17_Q18, AArch64::Q18_Q19, AArch64::Q19_Q20, AArch64::Q20_Q21, AArch64::Q21_Q22, AArch64::Q22_Q23, AArch64::Q23_Q24, AArch64::Q24_Q25, AArch64::Q25_Q26, AArch64::Q26_Q27, AArch64::Q27_Q28, AArch64::Q28_Q29, AArch64::Q29_Q30, AArch64::Q30_Q31, AArch64::Q31_Q0, + }; + + // QQ Bit set. + const uint8_t QQBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, + }; + + // QQ_with_qsub0_in_FPR128_lo Register Class... + const MCPhysReg QQ_with_qsub0_in_FPR128_lo[] = { + AArch64::Q0_Q1, AArch64::Q1_Q2, AArch64::Q2_Q3, AArch64::Q3_Q4, AArch64::Q4_Q5, AArch64::Q5_Q6, AArch64::Q6_Q7, AArch64::Q7_Q8, AArch64::Q8_Q9, AArch64::Q9_Q10, AArch64::Q10_Q11, AArch64::Q11_Q12, AArch64::Q12_Q13, AArch64::Q13_Q14, AArch64::Q14_Q15, AArch64::Q15_Q16, + }; + + // QQ_with_qsub0_in_FPR128_lo Bit set. + const uint8_t QQ_with_qsub0_in_FPR128_loBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, + }; + + // QQ_with_qsub1_in_FPR128_lo Register Class... + const MCPhysReg QQ_with_qsub1_in_FPR128_lo[] = { + AArch64::Q0_Q1, AArch64::Q1_Q2, AArch64::Q2_Q3, AArch64::Q3_Q4, AArch64::Q4_Q5, AArch64::Q5_Q6, AArch64::Q6_Q7, AArch64::Q7_Q8, AArch64::Q8_Q9, AArch64::Q9_Q10, AArch64::Q10_Q11, AArch64::Q11_Q12, AArch64::Q12_Q13, AArch64::Q13_Q14, AArch64::Q14_Q15, AArch64::Q31_Q0, + }; + + // QQ_with_qsub1_in_FPR128_lo Bit set. + const uint8_t QQ_with_qsub1_in_FPR128_loBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, 0x00, 0x08, + }; + + // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_lo Register Class... + const MCPhysReg QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_lo[] = { + AArch64::Q0_Q1, AArch64::Q1_Q2, AArch64::Q2_Q3, AArch64::Q3_Q4, AArch64::Q4_Q5, AArch64::Q5_Q6, AArch64::Q6_Q7, AArch64::Q7_Q8, AArch64::Q8_Q9, AArch64::Q9_Q10, AArch64::Q10_Q11, AArch64::Q11_Q12, AArch64::Q12_Q13, AArch64::Q13_Q14, AArch64::Q14_Q15, + }; + + // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_lo Bit set. + const uint8_t QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_loBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, + }; + + // QQQ Register Class... + const MCPhysReg QQQ[] = { + AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, AArch64::Q7_Q8_Q9, AArch64::Q8_Q9_Q10, AArch64::Q9_Q10_Q11, AArch64::Q10_Q11_Q12, AArch64::Q11_Q12_Q13, AArch64::Q12_Q13_Q14, AArch64::Q13_Q14_Q15, AArch64::Q14_Q15_Q16, AArch64::Q15_Q16_Q17, AArch64::Q16_Q17_Q18, AArch64::Q17_Q18_Q19, AArch64::Q18_Q19_Q20, AArch64::Q19_Q20_Q21, AArch64::Q20_Q21_Q22, AArch64::Q21_Q22_Q23, AArch64::Q22_Q23_Q24, AArch64::Q23_Q24_Q25, AArch64::Q24_Q25_Q26, AArch64::Q25_Q26_Q27, AArch64::Q26_Q27_Q28, AArch64::Q27_Q28_Q29, AArch64::Q28_Q29_Q30, AArch64::Q29_Q30_Q31, AArch64::Q30_Q31_Q0, AArch64::Q31_Q0_Q1, + }; + + // QQQ Bit set. + const uint8_t QQQBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, + }; + + // QQQ_with_qsub0_in_FPR128_lo Register Class... + const MCPhysReg QQQ_with_qsub0_in_FPR128_lo[] = { + AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, AArch64::Q7_Q8_Q9, AArch64::Q8_Q9_Q10, AArch64::Q9_Q10_Q11, AArch64::Q10_Q11_Q12, AArch64::Q11_Q12_Q13, AArch64::Q12_Q13_Q14, AArch64::Q13_Q14_Q15, AArch64::Q14_Q15_Q16, AArch64::Q15_Q16_Q17, + }; + + // QQQ_with_qsub0_in_FPR128_lo Bit set. + const uint8_t QQQ_with_qsub0_in_FPR128_loBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, + }; + + // QQQ_with_qsub1_in_FPR128_lo Register Class... + const MCPhysReg QQQ_with_qsub1_in_FPR128_lo[] = { + AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, AArch64::Q7_Q8_Q9, AArch64::Q8_Q9_Q10, AArch64::Q9_Q10_Q11, AArch64::Q10_Q11_Q12, AArch64::Q11_Q12_Q13, AArch64::Q12_Q13_Q14, AArch64::Q13_Q14_Q15, AArch64::Q14_Q15_Q16, AArch64::Q31_Q0_Q1, + }; + + // QQQ_with_qsub1_in_FPR128_lo Bit set. + const uint8_t QQQ_with_qsub1_in_FPR128_loBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, 0x00, 0x08, + }; + + // QQQ_with_qsub2_in_FPR128_lo Register Class... + const MCPhysReg QQQ_with_qsub2_in_FPR128_lo[] = { + AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, AArch64::Q7_Q8_Q9, AArch64::Q8_Q9_Q10, AArch64::Q9_Q10_Q11, AArch64::Q10_Q11_Q12, AArch64::Q11_Q12_Q13, AArch64::Q12_Q13_Q14, AArch64::Q13_Q14_Q15, AArch64::Q30_Q31_Q0, AArch64::Q31_Q0_Q1, + }; + + // QQQ_with_qsub2_in_FPR128_lo Bit set. + const uint8_t QQQ_with_qsub2_in_FPR128_loBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, 0x00, 0x0c, + }; + + // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_lo Register Class... + const MCPhysReg QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_lo[] = { + AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, AArch64::Q7_Q8_Q9, AArch64::Q8_Q9_Q10, AArch64::Q9_Q10_Q11, AArch64::Q10_Q11_Q12, AArch64::Q11_Q12_Q13, AArch64::Q12_Q13_Q14, AArch64::Q13_Q14_Q15, AArch64::Q14_Q15_Q16, + }; + + // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_lo Bit set. + const uint8_t QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_loBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, + }; + + // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo Register Class... + const MCPhysReg QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo[] = { + AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, AArch64::Q7_Q8_Q9, AArch64::Q8_Q9_Q10, AArch64::Q9_Q10_Q11, AArch64::Q10_Q11_Q12, AArch64::Q11_Q12_Q13, AArch64::Q12_Q13_Q14, AArch64::Q13_Q14_Q15, AArch64::Q31_Q0_Q1, + }; + + // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo Bit set. + const uint8_t QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, 0x00, 0x08, + }; + + // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo Register Class... + const MCPhysReg QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo[] = { + AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, AArch64::Q7_Q8_Q9, AArch64::Q8_Q9_Q10, AArch64::Q9_Q10_Q11, AArch64::Q10_Q11_Q12, AArch64::Q11_Q12_Q13, AArch64::Q12_Q13_Q14, AArch64::Q13_Q14_Q15, + }; + + // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo Bit set. + const uint8_t QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, + }; + + // QQQQ Register Class... + const MCPhysReg QQQQ[] = { + AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q13_Q14_Q15_Q16, AArch64::Q14_Q15_Q16_Q17, AArch64::Q15_Q16_Q17_Q18, AArch64::Q16_Q17_Q18_Q19, AArch64::Q17_Q18_Q19_Q20, AArch64::Q18_Q19_Q20_Q21, AArch64::Q19_Q20_Q21_Q22, AArch64::Q20_Q21_Q22_Q23, AArch64::Q21_Q22_Q23_Q24, AArch64::Q22_Q23_Q24_Q25, AArch64::Q23_Q24_Q25_Q26, AArch64::Q24_Q25_Q26_Q27, AArch64::Q25_Q26_Q27_Q28, AArch64::Q26_Q27_Q28_Q29, AArch64::Q27_Q28_Q29_Q30, AArch64::Q28_Q29_Q30_Q31, AArch64::Q29_Q30_Q31_Q0, AArch64::Q30_Q31_Q0_Q1, AArch64::Q31_Q0_Q1_Q2, + }; + + // QQQQ Bit set. + const uint8_t QQQQBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, + }; + + // QQQQ_with_qsub0_in_FPR128_lo Register Class... + const MCPhysReg QQQQ_with_qsub0_in_FPR128_lo[] = { + AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q13_Q14_Q15_Q16, AArch64::Q14_Q15_Q16_Q17, AArch64::Q15_Q16_Q17_Q18, + }; + + // QQQQ_with_qsub0_in_FPR128_lo Bit set. + const uint8_t QQQQ_with_qsub0_in_FPR128_loBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, + }; + + // QQQQ_with_qsub1_in_FPR128_lo Register Class... + const MCPhysReg QQQQ_with_qsub1_in_FPR128_lo[] = { + AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q13_Q14_Q15_Q16, AArch64::Q14_Q15_Q16_Q17, AArch64::Q31_Q0_Q1_Q2, + }; + + // QQQQ_with_qsub1_in_FPR128_lo Bit set. + const uint8_t QQQQ_with_qsub1_in_FPR128_loBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, 0x00, 0x08, + }; + + // QQQQ_with_qsub2_in_FPR128_lo Register Class... + const MCPhysReg QQQQ_with_qsub2_in_FPR128_lo[] = { + AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q13_Q14_Q15_Q16, AArch64::Q30_Q31_Q0_Q1, AArch64::Q31_Q0_Q1_Q2, + }; + + // QQQQ_with_qsub2_in_FPR128_lo Bit set. + const uint8_t QQQQ_with_qsub2_in_FPR128_loBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, 0x00, 0x0c, + }; + + // QQQQ_with_qsub3_in_FPR128_lo Register Class... + const MCPhysReg QQQQ_with_qsub3_in_FPR128_lo[] = { + AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q29_Q30_Q31_Q0, AArch64::Q30_Q31_Q0_Q1, AArch64::Q31_Q0_Q1_Q2, + }; + + // QQQQ_with_qsub3_in_FPR128_lo Bit set. + const uint8_t QQQQ_with_qsub3_in_FPR128_loBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01, 0x00, 0x0e, + }; + + // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_lo Register Class... + const MCPhysReg QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_lo[] = { + AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q13_Q14_Q15_Q16, AArch64::Q14_Q15_Q16_Q17, + }; + + // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_lo Bit set. + const uint8_t QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_loBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, + }; + + // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo Register Class... + const MCPhysReg QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo[] = { + AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q13_Q14_Q15_Q16, AArch64::Q31_Q0_Q1_Q2, + }; + + // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo Bit set. + const uint8_t QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, 0x00, 0x08, + }; + + // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo Register Class... + const MCPhysReg QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo[] = { + AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q30_Q31_Q0_Q1, AArch64::Q31_Q0_Q1_Q2, + }; + + // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo Bit set. + const uint8_t QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01, 0x00, 0x0c, + }; + + // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo Register Class... + const MCPhysReg QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo[] = { + AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q13_Q14_Q15_Q16, + }; + + // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo Bit set. + const uint8_t QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, + }; + + // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo Register Class... + const MCPhysReg QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo[] = { + AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q31_Q0_Q1_Q2, + }; + + // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo Bit set. + const uint8_t QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01, 0x00, 0x08, + }; + + // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo Register Class... + const MCPhysReg QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo[] = { + AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, + }; + + // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo Bit set. + const uint8_t QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01, + }; + +} + +extern const char AArch64RegClassStrings[] = { + /* 0 */ 'F', 'P', 'R', '3', '2', 0, + /* 6 */ 'G', 'P', 'R', '3', '2', 0, + /* 12 */ 'F', 'P', 'R', '6', '4', 0, + /* 18 */ 'X', 'S', 'e', 'q', 'P', 'a', 'i', 'r', 's', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 's', 'u', 'b', 'e', '6', '4', '_', 'i', 'n', '_', 't', 'c', 'G', 'P', 'R', '6', '4', 0, + /* 56 */ 'X', 'S', 'e', 'q', 'P', 'a', 'i', 'r', 's', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 's', 'u', 'b', '_', '3', '2', '_', 'i', 'n', '_', 'G', 'P', 'R', '3', '2', 'c', 'o', 'm', 'm', 'o', 'n', '_', 'a', 'n', 'd', '_', 'X', 'S', 'e', 'q', 'P', 'a', 'i', 'r', 's', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 's', 'u', 'b', 'o', '6', '4', '_', 'i', 'n', '_', 't', 'c', 'G', 'P', 'R', '6', '4', 0, + /* 140 */ 'F', 'P', 'R', '1', '6', 0, + /* 146 */ 'F', 'P', 'R', '1', '2', '8', 0, + /* 153 */ 'F', 'P', 'R', '8', 0, + /* 158 */ 'D', 'D', 'D', 'D', 0, + /* 163 */ 'Q', 'Q', 'Q', 'Q', 0, + /* 168 */ 'C', 'C', 'R', 0, + /* 172 */ 'G', 'P', 'R', '3', '2', 'a', 'l', 'l', 0, + /* 181 */ 'G', 'P', 'R', '6', '4', 'a', 'l', 'l', 0, + /* 190 */ 'X', 'S', 'e', 'q', 'P', 'a', 'i', 'r', 's', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 's', 'u', 'b', '_', '3', '2', '_', 'i', 'n', '_', 'G', 'P', 'R', '3', '2', 'c', 'o', 'm', 'm', 'o', 'n', 0, + /* 232 */ 'W', 'S', 'e', 'q', 'P', 'a', 'i', 'r', 's', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 's', 'u', 'b', 'e', '3', '2', '_', 'i', 'n', '_', 'G', 'P', 'R', '3', '2', 'c', 'o', 'm', 'm', 'o', 'n', 0, + /* 274 */ 'W', 'S', 'e', 'q', 'P', 'a', 'i', 'r', 's', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 's', 'u', 'b', 'e', '3', '2', '_', 'i', 'n', '_', 'G', 'P', 'R', '3', '2', 'c', 'o', 'm', 'm', 'o', 'n', '_', 'a', 'n', 'd', '_', 'W', 'S', 'e', 'q', 'P', 'a', 'i', 'r', 's', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 's', 'u', 'b', 'o', '3', '2', '_', 'i', 'n', '_', 'G', 'P', 'R', '3', '2', 'c', 'o', 'm', 'm', 'o', 'n', 0, + /* 362 */ 'X', 'S', 'e', 'q', 'P', 'a', 'i', 'r', 's', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 's', 'u', 'b', '_', '3', '2', '_', 'i', 'n', '_', 'G', 'P', 'R', '3', '2', 'c', 'o', 'm', 'm', 'o', 'n', '_', 'a', 'n', 'd', '_', 'X', 'S', 'e', 'q', 'P', 'a', 'i', 'r', 's', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 's', 'u', 'b', 'o', '6', '4', '_', 'i', 'n', '_', 'G', 'P', 'R', '6', '4', 'c', 'o', 'm', 'm', 'o', 'n', 0, + /* 450 */ 'Q', 'Q', 'Q', 'Q', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '0', '_', 'i', 'n', '_', 'F', 'P', 'R', '1', '2', '8', '_', 'l', 'o', 0, + /* 479 */ 'Q', 'Q', 'Q', 'Q', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '0', '_', 'i', 'n', '_', 'F', 'P', 'R', '1', '2', '8', '_', 'l', 'o', '_', 'a', 'n', 'd', '_', 'Q', 'Q', 'Q', 'Q', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '1', '_', 'i', 'n', '_', 'F', 'P', 'R', '1', '2', '8', '_', 'l', 'o', 0, + /* 541 */ 'Q', 'Q', 'Q', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '0', '_', 'i', 'n', '_', 'F', 'P', 'R', '1', '2', '8', '_', 'l', 'o', '_', 'a', 'n', 'd', '_', 'Q', 'Q', 'Q', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '1', '_', 'i', 'n', '_', 'F', 'P', 'R', '1', '2', '8', '_', 'l', 'o', 0, + /* 601 */ 'Q', 'Q', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '0', '_', 'i', 'n', '_', 'F', 'P', 'R', '1', '2', '8', '_', 'l', 'o', '_', 'a', 'n', 'd', '_', 'Q', 'Q', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '1', '_', 'i', 'n', '_', 'F', 'P', 'R', '1', '2', '8', '_', 'l', 'o', 0, + /* 659 */ 'Q', 'Q', 'Q', 'Q', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '0', '_', 'i', 'n', '_', 'F', 'P', 'R', '1', '2', '8', '_', 'l', 'o', '_', 'a', 'n', 'd', '_', 'Q', 'Q', 'Q', 'Q', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '2', '_', 'i', 'n', '_', 'F', 'P', 'R', '1', '2', '8', '_', 'l', 'o', 0, + /* 721 */ 'Q', 'Q', 'Q', 'Q', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '1', '_', 'i', 'n', '_', 'F', 'P', 'R', '1', '2', '8', '_', 'l', 'o', '_', 'a', 'n', 'd', '_', 'Q', 'Q', 'Q', 'Q', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '2', '_', 'i', 'n', '_', 'F', 'P', 'R', '1', '2', '8', '_', 'l', 'o', 0, + /* 783 */ 'Q', 'Q', 'Q', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '0', '_', 'i', 'n', '_', 'F', 'P', 'R', '1', '2', '8', '_', 'l', 'o', '_', 'a', 'n', 'd', '_', 'Q', 'Q', 'Q', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '2', '_', 'i', 'n', '_', 'F', 'P', 'R', '1', '2', '8', '_', 'l', 'o', 0, + /* 843 */ 'Q', 'Q', 'Q', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '1', '_', 'i', 'n', '_', 'F', 'P', 'R', '1', '2', '8', '_', 'l', 'o', '_', 'a', 'n', 'd', '_', 'Q', 'Q', 'Q', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '2', '_', 'i', 'n', '_', 'F', 'P', 'R', '1', '2', '8', '_', 'l', 'o', 0, + /* 903 */ 'Q', 'Q', 'Q', 'Q', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '0', '_', 'i', 'n', '_', 'F', 'P', 'R', '1', '2', '8', '_', 'l', 'o', '_', 'a', 'n', 'd', '_', 'Q', 'Q', 'Q', 'Q', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '3', '_', 'i', 'n', '_', 'F', 'P', 'R', '1', '2', '8', '_', 'l', 'o', 0, + /* 965 */ 'Q', 'Q', 'Q', 'Q', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '1', '_', 'i', 'n', '_', 'F', 'P', 'R', '1', '2', '8', '_', 'l', 'o', '_', 'a', 'n', 'd', '_', 'Q', 'Q', 'Q', 'Q', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '3', '_', 'i', 'n', '_', 'F', 'P', 'R', '1', '2', '8', '_', 'l', 'o', 0, + /* 1027 */ 'Q', 'Q', 'Q', 'Q', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '2', '_', 'i', 'n', '_', 'F', 'P', 'R', '1', '2', '8', '_', 'l', 'o', '_', 'a', 'n', 'd', '_', 'Q', 'Q', 'Q', 'Q', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '3', '_', 'i', 'n', '_', 'F', 'P', 'R', '1', '2', '8', '_', 'l', 'o', 0, + /* 1089 */ 'G', 'P', 'R', '3', '2', 's', 'p', 0, + /* 1097 */ 'G', 'P', 'R', '6', '4', 's', 'p', 0, + /* 1105 */ 'W', 'S', 'e', 'q', 'P', 'a', 'i', 'r', 's', 'C', 'l', 'a', 's', 's', 0, + /* 1120 */ 'X', 'S', 'e', 'q', 'P', 'a', 'i', 'r', 's', 'C', 'l', 'a', 's', 's', 0, + /* 1135 */ 'G', 'P', 'R', '3', '2', 's', 'p', 'o', 'n', 'l', 'y', 0, + /* 1147 */ 'G', 'P', 'R', '6', '4', 's', 'p', 'o', 'n', 'l', 'y', 0, +}; + +extern const MCRegisterClass AArch64MCRegisterClasses[] = { + { FPR8, FPR8Bits, 153, 32, sizeof(FPR8Bits), AArch64::FPR8RegClassID, 1, 1, 1, 1 }, + { FPR16, FPR16Bits, 140, 32, sizeof(FPR16Bits), AArch64::FPR16RegClassID, 2, 2, 1, 1 }, + { GPR32all, GPR32allBits, 172, 33, sizeof(GPR32allBits), AArch64::GPR32allRegClassID, 4, 4, 1, 1 }, + { FPR32, FPR32Bits, 0, 32, sizeof(FPR32Bits), AArch64::FPR32RegClassID, 4, 4, 1, 1 }, + { GPR32, GPR32Bits, 6, 32, sizeof(GPR32Bits), AArch64::GPR32RegClassID, 4, 4, 1, 1 }, + { GPR32sp, GPR32spBits, 1089, 32, sizeof(GPR32spBits), AArch64::GPR32spRegClassID, 4, 4, 1, 1 }, + { GPR32common, GPR32commonBits, 220, 31, sizeof(GPR32commonBits), AArch64::GPR32commonRegClassID, 4, 4, 1, 1 }, + { CCR, CCRBits, 168, 1, sizeof(CCRBits), AArch64::CCRRegClassID, 4, 4, -1, 0 }, + { GPR32sponly, GPR32sponlyBits, 1135, 1, sizeof(GPR32sponlyBits), AArch64::GPR32sponlyRegClassID, 4, 4, 1, 1 }, + { WSeqPairsClass, WSeqPairsClassBits, 1105, 32, sizeof(WSeqPairsClassBits), AArch64::WSeqPairsClassRegClassID, 8, 4, 1, 1 }, + { WSeqPairsClass_with_sube32_in_GPR32common, WSeqPairsClass_with_sube32_in_GPR32commonBits, 232, 31, sizeof(WSeqPairsClass_with_sube32_in_GPR32commonBits), AArch64::WSeqPairsClass_with_sube32_in_GPR32commonRegClassID, 8, 4, 1, 1 }, + { WSeqPairsClass_with_subo32_in_GPR32common, WSeqPairsClass_with_subo32_in_GPR32commonBits, 320, 31, sizeof(WSeqPairsClass_with_subo32_in_GPR32commonBits), AArch64::WSeqPairsClass_with_subo32_in_GPR32commonRegClassID, 8, 4, 1, 1 }, + { WSeqPairsClass_with_sube32_in_GPR32common_and_WSeqPairsClass_with_subo32_in_GPR32common, WSeqPairsClass_with_sube32_in_GPR32common_and_WSeqPairsClass_with_subo32_in_GPR32commonBits, 274, 30, sizeof(WSeqPairsClass_with_sube32_in_GPR32common_and_WSeqPairsClass_with_subo32_in_GPR32commonBits), AArch64::WSeqPairsClass_with_sube32_in_GPR32common_and_WSeqPairsClass_with_subo32_in_GPR32commonRegClassID, 8, 4, 1, 1 }, + { GPR64all, GPR64allBits, 181, 33, sizeof(GPR64allBits), AArch64::GPR64allRegClassID, 8, 8, 1, 1 }, + { FPR64, FPR64Bits, 12, 32, sizeof(FPR64Bits), AArch64::FPR64RegClassID, 8, 8, 1, 1 }, + { GPR64, GPR64Bits, 50, 32, sizeof(GPR64Bits), AArch64::GPR64RegClassID, 8, 8, 1, 1 }, + { GPR64sp, GPR64spBits, 1097, 32, sizeof(GPR64spBits), AArch64::GPR64spRegClassID, 8, 8, 1, 1 }, + { GPR64common, GPR64commonBits, 438, 31, sizeof(GPR64commonBits), AArch64::GPR64commonRegClassID, 8, 8, 1, 1 }, + { tcGPR64, tcGPR64Bits, 48, 19, sizeof(tcGPR64Bits), AArch64::tcGPR64RegClassID, 8, 8, 1, 1 }, + { GPR64sponly, GPR64sponlyBits, 1147, 1, sizeof(GPR64sponlyBits), AArch64::GPR64sponlyRegClassID, 8, 8, 1, 1 }, + { DD, DDBits, 160, 32, sizeof(DDBits), AArch64::DDRegClassID, 16, 8, 1, 1 }, + { XSeqPairsClass, XSeqPairsClassBits, 1120, 32, sizeof(XSeqPairsClassBits), AArch64::XSeqPairsClassRegClassID, 16, 8, 1, 1 }, + { XSeqPairsClass_with_sub_32_in_GPR32common, XSeqPairsClass_with_sub_32_in_GPR32commonBits, 190, 31, sizeof(XSeqPairsClass_with_sub_32_in_GPR32commonBits), AArch64::XSeqPairsClass_with_sub_32_in_GPR32commonRegClassID, 16, 8, 1, 1 }, + { XSeqPairsClass_with_subo64_in_GPR64common, XSeqPairsClass_with_subo64_in_GPR64commonBits, 408, 31, sizeof(XSeqPairsClass_with_subo64_in_GPR64commonBits), AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClassID, 16, 8, 1, 1 }, + { XSeqPairsClass_with_sub_32_in_GPR32common_and_XSeqPairsClass_with_subo64_in_GPR64common, XSeqPairsClass_with_sub_32_in_GPR32common_and_XSeqPairsClass_with_subo64_in_GPR64commonBits, 362, 30, sizeof(XSeqPairsClass_with_sub_32_in_GPR32common_and_XSeqPairsClass_with_subo64_in_GPR64commonBits), AArch64::XSeqPairsClass_with_sub_32_in_GPR32common_and_XSeqPairsClass_with_subo64_in_GPR64commonRegClassID, 16, 8, 1, 1 }, + { XSeqPairsClass_with_sube64_in_tcGPR64, XSeqPairsClass_with_sube64_in_tcGPR64Bits, 18, 19, sizeof(XSeqPairsClass_with_sube64_in_tcGPR64Bits), AArch64::XSeqPairsClass_with_sube64_in_tcGPR64RegClassID, 16, 8, 1, 1 }, + { XSeqPairsClass_with_subo64_in_tcGPR64, XSeqPairsClass_with_subo64_in_tcGPR64Bits, 102, 19, sizeof(XSeqPairsClass_with_subo64_in_tcGPR64Bits), AArch64::XSeqPairsClass_with_subo64_in_tcGPR64RegClassID, 16, 8, 1, 1 }, + { XSeqPairsClass_with_sub_32_in_GPR32common_and_XSeqPairsClass_with_subo64_in_tcGPR64, XSeqPairsClass_with_sub_32_in_GPR32common_and_XSeqPairsClass_with_subo64_in_tcGPR64Bits, 56, 18, sizeof(XSeqPairsClass_with_sub_32_in_GPR32common_and_XSeqPairsClass_with_subo64_in_tcGPR64Bits), AArch64::XSeqPairsClass_with_sub_32_in_GPR32common_and_XSeqPairsClass_with_subo64_in_tcGPR64RegClassID, 16, 8, 1, 1 }, + { FPR128, FPR128Bits, 146, 32, sizeof(FPR128Bits), AArch64::FPR128RegClassID, 16, 16, 1, 1 }, + { FPR128_lo, FPR128_loBits, 469, 16, sizeof(FPR128_loBits), AArch64::FPR128_loRegClassID, 16, 16, 1, 1 }, + { DDD, DDDBits, 159, 32, sizeof(DDDBits), AArch64::DDDRegClassID, 24, 8, 1, 1 }, + { DDDD, DDDDBits, 158, 32, sizeof(DDDDBits), AArch64::DDDDRegClassID, 32, 8, 1, 1 }, + { QQ, QQBits, 165, 32, sizeof(QQBits), AArch64::QQRegClassID, 32, 16, 1, 1 }, + { QQ_with_qsub0_in_FPR128_lo, QQ_with_qsub0_in_FPR128_loBits, 452, 16, sizeof(QQ_with_qsub0_in_FPR128_loBits), AArch64::QQ_with_qsub0_in_FPR128_loRegClassID, 32, 16, 1, 1 }, + { QQ_with_qsub1_in_FPR128_lo, QQ_with_qsub1_in_FPR128_loBits, 514, 16, sizeof(QQ_with_qsub1_in_FPR128_loBits), AArch64::QQ_with_qsub1_in_FPR128_loRegClassID, 32, 16, 1, 1 }, + { QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_lo, QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_loBits, 601, 15, sizeof(QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_loBits), AArch64::QQ_with_qsub0_in_FPR128_lo_and_QQ_with_qsub1_in_FPR128_loRegClassID, 32, 16, 1, 1 }, + { QQQ, QQQBits, 164, 32, sizeof(QQQBits), AArch64::QQQRegClassID, 48, 16, 1, 1 }, + { QQQ_with_qsub0_in_FPR128_lo, QQQ_with_qsub0_in_FPR128_loBits, 451, 16, sizeof(QQQ_with_qsub0_in_FPR128_loBits), AArch64::QQQ_with_qsub0_in_FPR128_loRegClassID, 48, 16, 1, 1 }, + { QQQ_with_qsub1_in_FPR128_lo, QQQ_with_qsub1_in_FPR128_loBits, 513, 16, sizeof(QQQ_with_qsub1_in_FPR128_loBits), AArch64::QQQ_with_qsub1_in_FPR128_loRegClassID, 48, 16, 1, 1 }, + { QQQ_with_qsub2_in_FPR128_lo, QQQ_with_qsub2_in_FPR128_loBits, 693, 16, sizeof(QQQ_with_qsub2_in_FPR128_loBits), AArch64::QQQ_with_qsub2_in_FPR128_loRegClassID, 48, 16, 1, 1 }, + { QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_lo, QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_loBits, 541, 15, sizeof(QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_loBits), AArch64::QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub1_in_FPR128_loRegClassID, 48, 16, 1, 1 }, + { QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo, QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loBits, 843, 15, sizeof(QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loBits), AArch64::QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loRegClassID, 48, 16, 1, 1 }, + { QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo, QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loBits, 783, 14, sizeof(QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loBits), AArch64::QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loRegClassID, 48, 16, 1, 1 }, + { QQQQ, QQQQBits, 163, 32, sizeof(QQQQBits), AArch64::QQQQRegClassID, 64, 16, 1, 1 }, + { QQQQ_with_qsub0_in_FPR128_lo, QQQQ_with_qsub0_in_FPR128_loBits, 450, 16, sizeof(QQQQ_with_qsub0_in_FPR128_loBits), AArch64::QQQQ_with_qsub0_in_FPR128_loRegClassID, 64, 16, 1, 1 }, + { QQQQ_with_qsub1_in_FPR128_lo, QQQQ_with_qsub1_in_FPR128_loBits, 512, 16, sizeof(QQQQ_with_qsub1_in_FPR128_loBits), AArch64::QQQQ_with_qsub1_in_FPR128_loRegClassID, 64, 16, 1, 1 }, + { QQQQ_with_qsub2_in_FPR128_lo, QQQQ_with_qsub2_in_FPR128_loBits, 692, 16, sizeof(QQQQ_with_qsub2_in_FPR128_loBits), AArch64::QQQQ_with_qsub2_in_FPR128_loRegClassID, 64, 16, 1, 1 }, + { QQQQ_with_qsub3_in_FPR128_lo, QQQQ_with_qsub3_in_FPR128_loBits, 936, 16, sizeof(QQQQ_with_qsub3_in_FPR128_loBits), AArch64::QQQQ_with_qsub3_in_FPR128_loRegClassID, 64, 16, 1, 1 }, + { QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_lo, QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_loBits, 479, 15, sizeof(QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_loBits), AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub1_in_FPR128_loRegClassID, 64, 16, 1, 1 }, + { QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo, QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loBits, 721, 15, sizeof(QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loBits), AArch64::QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClassID, 64, 16, 1, 1 }, + { QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo, QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits, 1027, 15, sizeof(QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits), AArch64::QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID, 64, 16, 1, 1 }, + { QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo, QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loBits, 659, 14, sizeof(QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loBits), AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClassID, 64, 16, 1, 1 }, + { QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo, QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits, 965, 14, sizeof(QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits), AArch64::QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID, 64, 16, 1, 1 }, + { QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo, QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits, 903, 13, sizeof(QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits), AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID, 64, 16, 1, 1 }, +}; + +// AArch64 Dwarf<->LLVM register mappings. +extern const MCRegisterInfo::DwarfLLVMRegPair AArch64DwarfFlavour0Dwarf2L[] = { + { 0U, AArch64::W0 }, + { 1U, AArch64::W1 }, + { 2U, AArch64::W2 }, + { 3U, AArch64::W3 }, + { 4U, AArch64::W4 }, + { 5U, AArch64::W5 }, + { 6U, AArch64::W6 }, + { 7U, AArch64::W7 }, + { 8U, AArch64::W8 }, + { 9U, AArch64::W9 }, + { 10U, AArch64::W10 }, + { 11U, AArch64::W11 }, + { 12U, AArch64::W12 }, + { 13U, AArch64::W13 }, + { 14U, AArch64::W14 }, + { 15U, AArch64::W15 }, + { 16U, AArch64::W16 }, + { 17U, AArch64::W17 }, + { 18U, AArch64::W18 }, + { 19U, AArch64::W19 }, + { 20U, AArch64::W20 }, + { 21U, AArch64::W21 }, + { 22U, AArch64::W22 }, + { 23U, AArch64::W23 }, + { 24U, AArch64::W24 }, + { 25U, AArch64::W25 }, + { 26U, AArch64::W26 }, + { 27U, AArch64::W27 }, + { 28U, AArch64::W28 }, + { 29U, AArch64::W29 }, + { 30U, AArch64::W30 }, + { 31U, AArch64::WSP }, + { 64U, AArch64::B0 }, + { 65U, AArch64::B1 }, + { 66U, AArch64::B2 }, + { 67U, AArch64::B3 }, + { 68U, AArch64::B4 }, + { 69U, AArch64::B5 }, + { 70U, AArch64::B6 }, + { 71U, AArch64::B7 }, + { 72U, AArch64::B8 }, + { 73U, AArch64::B9 }, + { 74U, AArch64::B10 }, + { 75U, AArch64::B11 }, + { 76U, AArch64::B12 }, + { 77U, AArch64::B13 }, + { 78U, AArch64::B14 }, + { 79U, AArch64::B15 }, + { 80U, AArch64::B16 }, + { 81U, AArch64::B17 }, + { 82U, AArch64::B18 }, + { 83U, AArch64::B19 }, + { 84U, AArch64::B20 }, + { 85U, AArch64::B21 }, + { 86U, AArch64::B22 }, + { 87U, AArch64::B23 }, + { 88U, AArch64::B24 }, + { 89U, AArch64::B25 }, + { 90U, AArch64::B26 }, + { 91U, AArch64::B27 }, + { 92U, AArch64::B28 }, + { 93U, AArch64::B29 }, + { 94U, AArch64::B30 }, + { 95U, AArch64::B31 }, +}; +extern const unsigned AArch64DwarfFlavour0Dwarf2LSize = array_lengthof(AArch64DwarfFlavour0Dwarf2L); + +extern const MCRegisterInfo::DwarfLLVMRegPair AArch64EHFlavour0Dwarf2L[] = { + { 0U, AArch64::W0 }, + { 1U, AArch64::W1 }, + { 2U, AArch64::W2 }, + { 3U, AArch64::W3 }, + { 4U, AArch64::W4 }, + { 5U, AArch64::W5 }, + { 6U, AArch64::W6 }, + { 7U, AArch64::W7 }, + { 8U, AArch64::W8 }, + { 9U, AArch64::W9 }, + { 10U, AArch64::W10 }, + { 11U, AArch64::W11 }, + { 12U, AArch64::W12 }, + { 13U, AArch64::W13 }, + { 14U, AArch64::W14 }, + { 15U, AArch64::W15 }, + { 16U, AArch64::W16 }, + { 17U, AArch64::W17 }, + { 18U, AArch64::W18 }, + { 19U, AArch64::W19 }, + { 20U, AArch64::W20 }, + { 21U, AArch64::W21 }, + { 22U, AArch64::W22 }, + { 23U, AArch64::W23 }, + { 24U, AArch64::W24 }, + { 25U, AArch64::W25 }, + { 26U, AArch64::W26 }, + { 27U, AArch64::W27 }, + { 28U, AArch64::W28 }, + { 29U, AArch64::W29 }, + { 30U, AArch64::W30 }, + { 31U, AArch64::WSP }, + { 64U, AArch64::B0 }, + { 65U, AArch64::B1 }, + { 66U, AArch64::B2 }, + { 67U, AArch64::B3 }, + { 68U, AArch64::B4 }, + { 69U, AArch64::B5 }, + { 70U, AArch64::B6 }, + { 71U, AArch64::B7 }, + { 72U, AArch64::B8 }, + { 73U, AArch64::B9 }, + { 74U, AArch64::B10 }, + { 75U, AArch64::B11 }, + { 76U, AArch64::B12 }, + { 77U, AArch64::B13 }, + { 78U, AArch64::B14 }, + { 79U, AArch64::B15 }, + { 80U, AArch64::B16 }, + { 81U, AArch64::B17 }, + { 82U, AArch64::B18 }, + { 83U, AArch64::B19 }, + { 84U, AArch64::B20 }, + { 85U, AArch64::B21 }, + { 86U, AArch64::B22 }, + { 87U, AArch64::B23 }, + { 88U, AArch64::B24 }, + { 89U, AArch64::B25 }, + { 90U, AArch64::B26 }, + { 91U, AArch64::B27 }, + { 92U, AArch64::B28 }, + { 93U, AArch64::B29 }, + { 94U, AArch64::B30 }, + { 95U, AArch64::B31 }, +}; +extern const unsigned AArch64EHFlavour0Dwarf2LSize = array_lengthof(AArch64EHFlavour0Dwarf2L); + +extern const MCRegisterInfo::DwarfLLVMRegPair AArch64DwarfFlavour0L2Dwarf[] = { + { AArch64::FP, 29U }, + { AArch64::LR, 30U }, + { AArch64::SP, 31U }, + { AArch64::WSP, 31U }, + { AArch64::WZR, 31U }, + { AArch64::XZR, 31U }, + { AArch64::B0, 64U }, + { AArch64::B1, 65U }, + { AArch64::B2, 66U }, + { AArch64::B3, 67U }, + { AArch64::B4, 68U }, + { AArch64::B5, 69U }, + { AArch64::B6, 70U }, + { AArch64::B7, 71U }, + { AArch64::B8, 72U }, + { AArch64::B9, 73U }, + { AArch64::B10, 74U }, + { AArch64::B11, 75U }, + { AArch64::B12, 76U }, + { AArch64::B13, 77U }, + { AArch64::B14, 78U }, + { AArch64::B15, 79U }, + { AArch64::B16, 80U }, + { AArch64::B17, 81U }, + { AArch64::B18, 82U }, + { AArch64::B19, 83U }, + { AArch64::B20, 84U }, + { AArch64::B21, 85U }, + { AArch64::B22, 86U }, + { AArch64::B23, 87U }, + { AArch64::B24, 88U }, + { AArch64::B25, 89U }, + { AArch64::B26, 90U }, + { AArch64::B27, 91U }, + { AArch64::B28, 92U }, + { AArch64::B29, 93U }, + { AArch64::B30, 94U }, + { AArch64::B31, 95U }, + { AArch64::D0, 64U }, + { AArch64::D1, 65U }, + { AArch64::D2, 66U }, + { AArch64::D3, 67U }, + { AArch64::D4, 68U }, + { AArch64::D5, 69U }, + { AArch64::D6, 70U }, + { AArch64::D7, 71U }, + { AArch64::D8, 72U }, + { AArch64::D9, 73U }, + { AArch64::D10, 74U }, + { AArch64::D11, 75U }, + { AArch64::D12, 76U }, + { AArch64::D13, 77U }, + { AArch64::D14, 78U }, + { AArch64::D15, 79U }, + { AArch64::D16, 80U }, + { AArch64::D17, 81U }, + { AArch64::D18, 82U }, + { AArch64::D19, 83U }, + { AArch64::D20, 84U }, + { AArch64::D21, 85U }, + { AArch64::D22, 86U }, + { AArch64::D23, 87U }, + { AArch64::D24, 88U }, + { AArch64::D25, 89U }, + { AArch64::D26, 90U }, + { AArch64::D27, 91U }, + { AArch64::D28, 92U }, + { AArch64::D29, 93U }, + { AArch64::D30, 94U }, + { AArch64::D31, 95U }, + { AArch64::H0, 64U }, + { AArch64::H1, 65U }, + { AArch64::H2, 66U }, + { AArch64::H3, 67U }, + { AArch64::H4, 68U }, + { AArch64::H5, 69U }, + { AArch64::H6, 70U }, + { AArch64::H7, 71U }, + { AArch64::H8, 72U }, + { AArch64::H9, 73U }, + { AArch64::H10, 74U }, + { AArch64::H11, 75U }, + { AArch64::H12, 76U }, + { AArch64::H13, 77U }, + { AArch64::H14, 78U }, + { AArch64::H15, 79U }, + { AArch64::H16, 80U }, + { AArch64::H17, 81U }, + { AArch64::H18, 82U }, + { AArch64::H19, 83U }, + { AArch64::H20, 84U }, + { AArch64::H21, 85U }, + { AArch64::H22, 86U }, + { AArch64::H23, 87U }, + { AArch64::H24, 88U }, + { AArch64::H25, 89U }, + { AArch64::H26, 90U }, + { AArch64::H27, 91U }, + { AArch64::H28, 92U }, + { AArch64::H29, 93U }, + { AArch64::H30, 94U }, + { AArch64::H31, 95U }, + { AArch64::Q0, 64U }, + { AArch64::Q1, 65U }, + { AArch64::Q2, 66U }, + { AArch64::Q3, 67U }, + { AArch64::Q4, 68U }, + { AArch64::Q5, 69U }, + { AArch64::Q6, 70U }, + { AArch64::Q7, 71U }, + { AArch64::Q8, 72U }, + { AArch64::Q9, 73U }, + { AArch64::Q10, 74U }, + { AArch64::Q11, 75U }, + { AArch64::Q12, 76U }, + { AArch64::Q13, 77U }, + { AArch64::Q14, 78U }, + { AArch64::Q15, 79U }, + { AArch64::Q16, 80U }, + { AArch64::Q17, 81U }, + { AArch64::Q18, 82U }, + { AArch64::Q19, 83U }, + { AArch64::Q20, 84U }, + { AArch64::Q21, 85U }, + { AArch64::Q22, 86U }, + { AArch64::Q23, 87U }, + { AArch64::Q24, 88U }, + { AArch64::Q25, 89U }, + { AArch64::Q26, 90U }, + { AArch64::Q27, 91U }, + { AArch64::Q28, 92U }, + { AArch64::Q29, 93U }, + { AArch64::Q30, 94U }, + { AArch64::Q31, 95U }, + { AArch64::S0, 64U }, + { AArch64::S1, 65U }, + { AArch64::S2, 66U }, + { AArch64::S3, 67U }, + { AArch64::S4, 68U }, + { AArch64::S5, 69U }, + { AArch64::S6, 70U }, + { AArch64::S7, 71U }, + { AArch64::S8, 72U }, + { AArch64::S9, 73U }, + { AArch64::S10, 74U }, + { AArch64::S11, 75U }, + { AArch64::S12, 76U }, + { AArch64::S13, 77U }, + { AArch64::S14, 78U }, + { AArch64::S15, 79U }, + { AArch64::S16, 80U }, + { AArch64::S17, 81U }, + { AArch64::S18, 82U }, + { AArch64::S19, 83U }, + { AArch64::S20, 84U }, + { AArch64::S21, 85U }, + { AArch64::S22, 86U }, + { AArch64::S23, 87U }, + { AArch64::S24, 88U }, + { AArch64::S25, 89U }, + { AArch64::S26, 90U }, + { AArch64::S27, 91U }, + { AArch64::S28, 92U }, + { AArch64::S29, 93U }, + { AArch64::S30, 94U }, + { AArch64::S31, 95U }, + { AArch64::W0, 0U }, + { AArch64::W1, 1U }, + { AArch64::W2, 2U }, + { AArch64::W3, 3U }, + { AArch64::W4, 4U }, + { AArch64::W5, 5U }, + { AArch64::W6, 6U }, + { AArch64::W7, 7U }, + { AArch64::W8, 8U }, + { AArch64::W9, 9U }, + { AArch64::W10, 10U }, + { AArch64::W11, 11U }, + { AArch64::W12, 12U }, + { AArch64::W13, 13U }, + { AArch64::W14, 14U }, + { AArch64::W15, 15U }, + { AArch64::W16, 16U }, + { AArch64::W17, 17U }, + { AArch64::W18, 18U }, + { AArch64::W19, 19U }, + { AArch64::W20, 20U }, + { AArch64::W21, 21U }, + { AArch64::W22, 22U }, + { AArch64::W23, 23U }, + { AArch64::W24, 24U }, + { AArch64::W25, 25U }, + { AArch64::W26, 26U }, + { AArch64::W27, 27U }, + { AArch64::W28, 28U }, + { AArch64::W29, 29U }, + { AArch64::W30, 30U }, + { AArch64::X0, 0U }, + { AArch64::X1, 1U }, + { AArch64::X2, 2U }, + { AArch64::X3, 3U }, + { AArch64::X4, 4U }, + { AArch64::X5, 5U }, + { AArch64::X6, 6U }, + { AArch64::X7, 7U }, + { AArch64::X8, 8U }, + { AArch64::X9, 9U }, + { AArch64::X10, 10U }, + { AArch64::X11, 11U }, + { AArch64::X12, 12U }, + { AArch64::X13, 13U }, + { AArch64::X14, 14U }, + { AArch64::X15, 15U }, + { AArch64::X16, 16U }, + { AArch64::X17, 17U }, + { AArch64::X18, 18U }, + { AArch64::X19, 19U }, + { AArch64::X20, 20U }, + { AArch64::X21, 21U }, + { AArch64::X22, 22U }, + { AArch64::X23, 23U }, + { AArch64::X24, 24U }, + { AArch64::X25, 25U }, + { AArch64::X26, 26U }, + { AArch64::X27, 27U }, + { AArch64::X28, 28U }, +}; +extern const unsigned AArch64DwarfFlavour0L2DwarfSize = array_lengthof(AArch64DwarfFlavour0L2Dwarf); + +extern const MCRegisterInfo::DwarfLLVMRegPair AArch64EHFlavour0L2Dwarf[] = { + { AArch64::FP, 29U }, + { AArch64::LR, 30U }, + { AArch64::SP, 31U }, + { AArch64::WSP, 31U }, + { AArch64::WZR, 31U }, + { AArch64::XZR, 31U }, + { AArch64::B0, 64U }, + { AArch64::B1, 65U }, + { AArch64::B2, 66U }, + { AArch64::B3, 67U }, + { AArch64::B4, 68U }, + { AArch64::B5, 69U }, + { AArch64::B6, 70U }, + { AArch64::B7, 71U }, + { AArch64::B8, 72U }, + { AArch64::B9, 73U }, + { AArch64::B10, 74U }, + { AArch64::B11, 75U }, + { AArch64::B12, 76U }, + { AArch64::B13, 77U }, + { AArch64::B14, 78U }, + { AArch64::B15, 79U }, + { AArch64::B16, 80U }, + { AArch64::B17, 81U }, + { AArch64::B18, 82U }, + { AArch64::B19, 83U }, + { AArch64::B20, 84U }, + { AArch64::B21, 85U }, + { AArch64::B22, 86U }, + { AArch64::B23, 87U }, + { AArch64::B24, 88U }, + { AArch64::B25, 89U }, + { AArch64::B26, 90U }, + { AArch64::B27, 91U }, + { AArch64::B28, 92U }, + { AArch64::B29, 93U }, + { AArch64::B30, 94U }, + { AArch64::B31, 95U }, + { AArch64::D0, 64U }, + { AArch64::D1, 65U }, + { AArch64::D2, 66U }, + { AArch64::D3, 67U }, + { AArch64::D4, 68U }, + { AArch64::D5, 69U }, + { AArch64::D6, 70U }, + { AArch64::D7, 71U }, + { AArch64::D8, 72U }, + { AArch64::D9, 73U }, + { AArch64::D10, 74U }, + { AArch64::D11, 75U }, + { AArch64::D12, 76U }, + { AArch64::D13, 77U }, + { AArch64::D14, 78U }, + { AArch64::D15, 79U }, + { AArch64::D16, 80U }, + { AArch64::D17, 81U }, + { AArch64::D18, 82U }, + { AArch64::D19, 83U }, + { AArch64::D20, 84U }, + { AArch64::D21, 85U }, + { AArch64::D22, 86U }, + { AArch64::D23, 87U }, + { AArch64::D24, 88U }, + { AArch64::D25, 89U }, + { AArch64::D26, 90U }, + { AArch64::D27, 91U }, + { AArch64::D28, 92U }, + { AArch64::D29, 93U }, + { AArch64::D30, 94U }, + { AArch64::D31, 95U }, + { AArch64::H0, 64U }, + { AArch64::H1, 65U }, + { AArch64::H2, 66U }, + { AArch64::H3, 67U }, + { AArch64::H4, 68U }, + { AArch64::H5, 69U }, + { AArch64::H6, 70U }, + { AArch64::H7, 71U }, + { AArch64::H8, 72U }, + { AArch64::H9, 73U }, + { AArch64::H10, 74U }, + { AArch64::H11, 75U }, + { AArch64::H12, 76U }, + { AArch64::H13, 77U }, + { AArch64::H14, 78U }, + { AArch64::H15, 79U }, + { AArch64::H16, 80U }, + { AArch64::H17, 81U }, + { AArch64::H18, 82U }, + { AArch64::H19, 83U }, + { AArch64::H20, 84U }, + { AArch64::H21, 85U }, + { AArch64::H22, 86U }, + { AArch64::H23, 87U }, + { AArch64::H24, 88U }, + { AArch64::H25, 89U }, + { AArch64::H26, 90U }, + { AArch64::H27, 91U }, + { AArch64::H28, 92U }, + { AArch64::H29, 93U }, + { AArch64::H30, 94U }, + { AArch64::H31, 95U }, + { AArch64::Q0, 64U }, + { AArch64::Q1, 65U }, + { AArch64::Q2, 66U }, + { AArch64::Q3, 67U }, + { AArch64::Q4, 68U }, + { AArch64::Q5, 69U }, + { AArch64::Q6, 70U }, + { AArch64::Q7, 71U }, + { AArch64::Q8, 72U }, + { AArch64::Q9, 73U }, + { AArch64::Q10, 74U }, + { AArch64::Q11, 75U }, + { AArch64::Q12, 76U }, + { AArch64::Q13, 77U }, + { AArch64::Q14, 78U }, + { AArch64::Q15, 79U }, + { AArch64::Q16, 80U }, + { AArch64::Q17, 81U }, + { AArch64::Q18, 82U }, + { AArch64::Q19, 83U }, + { AArch64::Q20, 84U }, + { AArch64::Q21, 85U }, + { AArch64::Q22, 86U }, + { AArch64::Q23, 87U }, + { AArch64::Q24, 88U }, + { AArch64::Q25, 89U }, + { AArch64::Q26, 90U }, + { AArch64::Q27, 91U }, + { AArch64::Q28, 92U }, + { AArch64::Q29, 93U }, + { AArch64::Q30, 94U }, + { AArch64::Q31, 95U }, + { AArch64::S0, 64U }, + { AArch64::S1, 65U }, + { AArch64::S2, 66U }, + { AArch64::S3, 67U }, + { AArch64::S4, 68U }, + { AArch64::S5, 69U }, + { AArch64::S6, 70U }, + { AArch64::S7, 71U }, + { AArch64::S8, 72U }, + { AArch64::S9, 73U }, + { AArch64::S10, 74U }, + { AArch64::S11, 75U }, + { AArch64::S12, 76U }, + { AArch64::S13, 77U }, + { AArch64::S14, 78U }, + { AArch64::S15, 79U }, + { AArch64::S16, 80U }, + { AArch64::S17, 81U }, + { AArch64::S18, 82U }, + { AArch64::S19, 83U }, + { AArch64::S20, 84U }, + { AArch64::S21, 85U }, + { AArch64::S22, 86U }, + { AArch64::S23, 87U }, + { AArch64::S24, 88U }, + { AArch64::S25, 89U }, + { AArch64::S26, 90U }, + { AArch64::S27, 91U }, + { AArch64::S28, 92U }, + { AArch64::S29, 93U }, + { AArch64::S30, 94U }, + { AArch64::S31, 95U }, + { AArch64::W0, 0U }, + { AArch64::W1, 1U }, + { AArch64::W2, 2U }, + { AArch64::W3, 3U }, + { AArch64::W4, 4U }, + { AArch64::W5, 5U }, + { AArch64::W6, 6U }, + { AArch64::W7, 7U }, + { AArch64::W8, 8U }, + { AArch64::W9, 9U }, + { AArch64::W10, 10U }, + { AArch64::W11, 11U }, + { AArch64::W12, 12U }, + { AArch64::W13, 13U }, + { AArch64::W14, 14U }, + { AArch64::W15, 15U }, + { AArch64::W16, 16U }, + { AArch64::W17, 17U }, + { AArch64::W18, 18U }, + { AArch64::W19, 19U }, + { AArch64::W20, 20U }, + { AArch64::W21, 21U }, + { AArch64::W22, 22U }, + { AArch64::W23, 23U }, + { AArch64::W24, 24U }, + { AArch64::W25, 25U }, + { AArch64::W26, 26U }, + { AArch64::W27, 27U }, + { AArch64::W28, 28U }, + { AArch64::W29, 29U }, + { AArch64::W30, 30U }, + { AArch64::X0, 0U }, + { AArch64::X1, 1U }, + { AArch64::X2, 2U }, + { AArch64::X3, 3U }, + { AArch64::X4, 4U }, + { AArch64::X5, 5U }, + { AArch64::X6, 6U }, + { AArch64::X7, 7U }, + { AArch64::X8, 8U }, + { AArch64::X9, 9U }, + { AArch64::X10, 10U }, + { AArch64::X11, 11U }, + { AArch64::X12, 12U }, + { AArch64::X13, 13U }, + { AArch64::X14, 14U }, + { AArch64::X15, 15U }, + { AArch64::X16, 16U }, + { AArch64::X17, 17U }, + { AArch64::X18, 18U }, + { AArch64::X19, 19U }, + { AArch64::X20, 20U }, + { AArch64::X21, 21U }, + { AArch64::X22, 22U }, + { AArch64::X23, 23U }, + { AArch64::X24, 24U }, + { AArch64::X25, 25U }, + { AArch64::X26, 26U }, + { AArch64::X27, 27U }, + { AArch64::X28, 28U }, +}; +extern const unsigned AArch64EHFlavour0L2DwarfSize = array_lengthof(AArch64EHFlavour0L2Dwarf); + +extern const uint16_t AArch64RegEncodingTable[] = { + 0, + 29, + 30, + 0, + 31, + 31, + 31, + 31, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 13, + 14, + 15, + 16, + 17, + 18, + 19, + 20, + 21, + 22, + 23, + 24, + 25, + 26, + 27, + 28, + 29, + 30, + 31, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 13, + 14, + 15, + 16, + 17, + 18, + 19, + 20, + 21, + 22, + 23, + 24, + 25, + 26, + 27, + 28, + 29, + 30, + 31, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 13, + 14, + 15, + 16, + 17, + 18, + 19, + 20, + 21, + 22, + 23, + 24, + 25, + 26, + 27, + 28, + 29, + 30, + 31, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 13, + 14, + 15, + 16, + 17, + 18, + 19, + 20, + 21, + 22, + 23, + 24, + 25, + 26, + 27, + 28, + 29, + 30, + 31, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 13, + 14, + 15, + 16, + 17, + 18, + 19, + 20, + 21, + 22, + 23, + 24, + 25, + 26, + 27, + 28, + 29, + 30, + 31, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 13, + 14, + 15, + 16, + 17, + 18, + 19, + 20, + 21, + 22, + 23, + 24, + 25, + 26, + 27, + 28, + 29, + 30, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 13, + 14, + 15, + 16, + 17, + 18, + 19, + 20, + 21, + 22, + 23, + 24, + 25, + 26, + 27, + 28, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 13, + 14, + 15, + 16, + 17, + 18, + 19, + 20, + 21, + 22, + 23, + 24, + 25, + 26, + 27, + 28, + 29, + 30, + 31, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 13, + 14, + 15, + 16, + 17, + 18, + 19, + 20, + 21, + 22, + 23, + 24, + 25, + 26, + 27, + 28, + 29, + 30, + 31, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 13, + 14, + 15, + 16, + 17, + 18, + 19, + 20, + 21, + 22, + 23, + 24, + 25, + 26, + 27, + 28, + 29, + 30, + 31, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 13, + 14, + 15, + 16, + 17, + 18, + 19, + 20, + 21, + 22, + 23, + 24, + 25, + 26, + 27, + 28, + 29, + 30, + 31, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 13, + 14, + 15, + 16, + 17, + 18, + 19, + 20, + 21, + 22, + 23, + 24, + 25, + 26, + 27, + 28, + 29, + 30, + 31, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 13, + 14, + 15, + 16, + 17, + 18, + 19, + 20, + 21, + 22, + 23, + 24, + 25, + 26, + 27, + 28, + 29, + 30, + 31, + 31, + 30, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 13, + 14, + 15, + 16, + 17, + 18, + 19, + 20, + 21, + 22, + 23, + 24, + 25, + 26, + 27, + 28, + 29, + 29, + 30, + 31, + 28, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 13, + 14, + 15, + 16, + 17, + 18, + 19, + 20, + 21, + 22, + 23, + 24, + 25, + 26, + 27, +}; +static inline void InitAArch64MCRegisterInfo(MCRegisterInfo *RI, unsigned RA, unsigned DwarfFlavour = 0, unsigned EHFlavour = 0, unsigned PC = 0) { + RI->InitMCRegisterInfo(AArch64RegDesc, 484, RA, PC, AArch64MCRegisterClasses, 54, AArch64RegUnitRoots, 66, AArch64RegDiffLists, AArch64LaneMaskLists, AArch64RegStrings, AArch64RegClassStrings, AArch64SubRegIdxLists, 59, +AArch64SubRegIdxRanges, AArch64RegEncodingTable); + + switch (DwarfFlavour) { + default: + llvm_unreachable("Unknown DWARF flavour"); + case 0: + RI->mapDwarfRegsToLLVMRegs(AArch64DwarfFlavour0Dwarf2L, AArch64DwarfFlavour0Dwarf2LSize, false); + break; + } + switch (EHFlavour) { + default: + llvm_unreachable("Unknown DWARF flavour"); + case 0: + RI->mapDwarfRegsToLLVMRegs(AArch64EHFlavour0Dwarf2L, AArch64EHFlavour0Dwarf2LSize, true); + break; + } + switch (DwarfFlavour) { + default: + llvm_unreachable("Unknown DWARF flavour"); + case 0: + RI->mapLLVMRegsToDwarfRegs(AArch64DwarfFlavour0L2Dwarf, AArch64DwarfFlavour0L2DwarfSize, false); + break; + } + switch (EHFlavour) { + default: + llvm_unreachable("Unknown DWARF flavour"); + case 0: + RI->mapLLVMRegsToDwarfRegs(AArch64EHFlavour0L2Dwarf, AArch64EHFlavour0L2DwarfSize, true); + break; + } +} + +} // End llvm namespace +#endif // GET_REGINFO_MC_DESC diff --git a/llvm/lib/Target/AArch64/AArch64GenSubtargetInfo.inc b/llvm/lib/Target/AArch64/AArch64GenSubtargetInfo.inc new file mode 100644 index 0000000..1af5e91 --- /dev/null +++ b/llvm/lib/Target/AArch64/AArch64GenSubtargetInfo.inc @@ -0,0 +1,126 @@ +/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ +|* *| +|* Subtarget Enumeration Source Fragment *| +|* *| +|* Automatically generated file, do not edit! *| +|* *| +\*===----------------------------------------------------------------------===*/ + + +#ifdef GET_SUBTARGETINFO_ENUM +#undef GET_SUBTARGETINFO_ENUM +namespace llvm_ks { +namespace AArch64 { +enum : uint64_t { + FeatureCRC = 0, + FeatureCrypto = 1, + FeatureFPARMv8 = 2, + FeatureFullFP16 = 3, + FeatureNEON = 4, + FeaturePerfMon = 5, + FeatureReserveX18 = 6, + FeatureSPE = 7, + FeatureStrictAlign = 8, + FeatureZCRegMove = 9, + FeatureZCZeroing = 10, + HasV8_1aOps = 11, + HasV8_2aOps = 12, + ProcA35 = 13, + ProcA53 = 14, + ProcA57 = 15, + ProcCyclone = 16, + ProcExynosM1 = 17 +}; +} +} // end llvm namespace +#endif // GET_SUBTARGETINFO_ENUM + + +#ifdef GET_SUBTARGETINFO_MC_DESC +#undef GET_SUBTARGETINFO_MC_DESC +namespace llvm_ks { +// Sorted (by key) array of values for CPU features. +extern const llvm_ks::SubtargetFeatureKV AArch64FeatureKV[] = { + { "a35", "Cortex-A35 ARM processors", { AArch64::ProcA35 }, { AArch64::FeatureFPARMv8, AArch64::FeatureNEON, AArch64::FeatureCrypto, AArch64::FeatureCRC, AArch64::FeaturePerfMon } }, + { "a53", "Cortex-A53 ARM processors", { AArch64::ProcA53 }, { AArch64::FeatureFPARMv8, AArch64::FeatureNEON, AArch64::FeatureCrypto, AArch64::FeatureCRC, AArch64::FeaturePerfMon } }, + { "a57", "Cortex-A57 ARM processors", { AArch64::ProcA57 }, { AArch64::FeatureFPARMv8, AArch64::FeatureNEON, AArch64::FeatureCrypto, AArch64::FeatureCRC, AArch64::FeaturePerfMon } }, + { "crc", "Enable ARMv8 CRC-32 checksum instructions", { AArch64::FeatureCRC }, { } }, + { "crypto", "Enable cryptographic instructions", { AArch64::FeatureCrypto }, { } }, + { "cyclone", "Cyclone", { AArch64::ProcCyclone }, { AArch64::FeatureFPARMv8, AArch64::FeatureNEON, AArch64::FeatureCrypto, AArch64::FeatureCRC, AArch64::FeaturePerfMon, AArch64::FeatureZCRegMove, AArch64::FeatureZCZeroing } }, + { "exynosm1", "Samsung Exynos-M1 processors", { AArch64::ProcExynosM1 }, { AArch64::FeatureFPARMv8, AArch64::FeatureNEON, AArch64::FeatureCrypto, AArch64::FeatureCRC, AArch64::FeaturePerfMon } }, + { "fp-armv8", "Enable ARMv8 FP", { AArch64::FeatureFPARMv8 }, { } }, + { "fullfp16", "Full FP16", { AArch64::FeatureFullFP16 }, { AArch64::FeatureFPARMv8 } }, + { "neon", "Enable Advanced SIMD instructions", { AArch64::FeatureNEON }, { AArch64::FeatureFPARMv8 } }, + { "perfmon", "Enable ARMv8 PMUv3 Performance Monitors extension", { AArch64::FeaturePerfMon }, { } }, + { "reserve-x18", "Reserve X18, making it unavailable as a GPR", { AArch64::FeatureReserveX18 }, { } }, + { "spe", "Enable Statistical Profiling extension", { AArch64::FeatureSPE }, { } }, + { "strict-align", "Disallow all unaligned memory access", { AArch64::FeatureStrictAlign }, { } }, + { "v8.1a", "Support ARM v8.1a instructions", { AArch64::HasV8_1aOps }, { AArch64::FeatureCRC } }, + { "v8.2a", "Support ARM v8.2a instructions", { AArch64::HasV8_2aOps }, { AArch64::HasV8_1aOps } }, + { "zcm", "Has zero-cycle register moves", { AArch64::FeatureZCRegMove }, { } }, + { "zcz", "Has zero-cycle zeroing instructions", { AArch64::FeatureZCZeroing }, { } } +}; + +// Sorted (by key) array of values for CPU subtype. +extern const llvm_ks::SubtargetFeatureKV AArch64SubTypeKV[] = { + { "cortex-a35", "Select the cortex-a35 processor", { AArch64::ProcA35 }, { } }, + { "cortex-a53", "Select the cortex-a53 processor", { AArch64::ProcA53 }, { } }, + { "cortex-a57", "Select the cortex-a57 processor", { AArch64::ProcA57 }, { } }, + { "cortex-a72", "Select the cortex-a72 processor", { AArch64::ProcA57 }, { } }, + { "cyclone", "Select the cyclone processor", { AArch64::ProcCyclone }, { } }, + { "exynos-m1", "Select the exynos-m1 processor", { AArch64::ProcExynosM1 }, { } }, + { "generic", "Select the generic processor", { AArch64::FeatureFPARMv8, AArch64::FeatureNEON, AArch64::FeatureCRC, AArch64::FeaturePerfMon }, { } } +}; + +#ifdef DBGFIELD +#error "GenSubtargetInfo.inc requires a DBGFIELD macro" +#endif +#ifndef NDEBUG +#define DBGFIELD(x) x, +#else +#define DBGFIELD(x) +#endif + +// =============================================================== +// Data tables for the new per-operand machine model. + +#undef DBGFIELD +static inline MCSubtargetInfo *createAArch64MCSubtargetInfoImpl(const Triple &TT, StringRef CPU, StringRef FS) { + return new MCSubtargetInfo(TT, CPU, FS, AArch64FeatureKV, AArch64SubTypeKV, NULL); +} + +} // end llvm namespace +#endif // GET_SUBTARGETINFO_MC_DESC + + +#ifdef GET_SUBTARGETINFO_TARGET_DESC +#undef GET_SUBTARGETINFO_TARGET_DESC +#include "llvm/Support/Debug.h" +#include "llvm/Support/raw_ostream.h" +// ParseSubtargetFeatures - Parses features string setting specified +// subtarget options. +void llvm_ks::AArch64Subtarget::ParseSubtargetFeatures(StringRef CPU, StringRef FS) { + DEBUG(dbgs() << "\nFeatures:" << FS); + DEBUG(dbgs() << "\nCPU:" << CPU << "\n\n"); + InitMCProcessorInfo(CPU, FS); + const FeatureBitset& Bits = getFeatureBits(); + if (Bits[AArch64::FeatureCRC]) HasCRC = true; + if (Bits[AArch64::FeatureCrypto]) HasCrypto = true; + if (Bits[AArch64::FeatureFPARMv8]) HasFPARMv8 = true; + if (Bits[AArch64::FeatureFullFP16]) HasFullFP16 = true; + if (Bits[AArch64::FeatureNEON]) HasNEON = true; + if (Bits[AArch64::FeaturePerfMon]) HasPerfMon = true; + if (Bits[AArch64::FeatureReserveX18]) ReserveX18 = true; + if (Bits[AArch64::FeatureSPE]) HasSPE = true; + if (Bits[AArch64::FeatureStrictAlign]) StrictAlign = true; + if (Bits[AArch64::FeatureZCRegMove]) HasZeroCycleRegMove = true; + if (Bits[AArch64::FeatureZCZeroing]) HasZeroCycleZeroing = true; + if (Bits[AArch64::HasV8_1aOps]) HasV8_1aOps = true; + if (Bits[AArch64::HasV8_2aOps]) HasV8_2aOps = true; + if (Bits[AArch64::ProcA35] && ARMProcFamily < CortexA35) ARMProcFamily = CortexA35; + if (Bits[AArch64::ProcA53] && ARMProcFamily < CortexA53) ARMProcFamily = CortexA53; + if (Bits[AArch64::ProcA57] && ARMProcFamily < CortexA57) ARMProcFamily = CortexA57; + if (Bits[AArch64::ProcCyclone] && ARMProcFamily < Cyclone) ARMProcFamily = Cyclone; + if (Bits[AArch64::ProcExynosM1] && ARMProcFamily < ExynosM1) ARMProcFamily = ExynosM1; +} +#endif // GET_SUBTARGETINFO_TARGET_DESC diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp new file mode 100644 index 0000000..aef22a4 --- /dev/null +++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp @@ -0,0 +1,4803 @@ +//==- AArch64AsmParser.cpp - Parse AArch64 assembly to MCInst instructions -==// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "MCTargetDesc/AArch64AddressingModes.h" +#include "MCTargetDesc/AArch64MCExpr.h" +#include "MCTargetDesc/AArch64TargetStreamer.h" +#include "Utils/AArch64BaseInfo.h" +#include "llvm/ADT/APInt.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/SmallString.h" +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/StringSwitch.h" +#include "llvm/ADT/Twine.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCInst.h" +#include "llvm/MC/MCObjectFileInfo.h" +#include "llvm/MC/MCParser/MCAsmLexer.h" +#include "llvm/MC/MCParser/MCAsmParser.h" +#include "llvm/MC/MCParser/MCParsedAsmOperand.h" +#include "llvm/MC/MCParser/MCTargetAsmParser.h" +#include "llvm/MC/MCRegisterInfo.h" +#include "llvm/MC/MCStreamer.h" +#include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/SourceMgr.h" +#include "llvm/Support/TargetRegistry.h" +#include "llvm/Support/raw_ostream.h" + +#include "keystone/arm64.h" + +#include +using namespace llvm_ks; + +namespace { + +class AArch64Operand; + +class AArch64AsmParser : public MCTargetAsmParser { +private: + StringRef Mnemonic; ///< Instruction mnemonic. + + // Map of register aliases registers via the .req directive. + StringMap > RegisterReqs; + + AArch64TargetStreamer &getTargetStreamer() { + MCTargetStreamer &TS = *getParser().getStreamer().getTargetStreamer(); + return static_cast(TS); + } + + SMLoc getLoc() const { return getParser().getTok().getLoc(); } + + bool parseSysAlias(StringRef Name, SMLoc NameLoc, OperandVector &Operands); + AArch64CC::CondCode parseCondCodeString(StringRef Cond); + bool parseCondCode(OperandVector &Operands, bool invertCondCode); + unsigned matchRegisterNameAlias(StringRef Name, bool isVector); + int tryParseRegister(); + int tryMatchVectorRegister(StringRef &Kind, bool expected); + bool parseRegister(OperandVector &Operands); + bool parseSymbolicImmVal(const MCExpr *&ImmVal); + bool parseVectorList(OperandVector &Operands); + bool parseOperand(OperandVector &Operands, bool isCondCode, + bool invertCondCode); + + void Warning(SMLoc L, const Twine &Msg) { getParser().Warning(L, Msg); } + //bool Error(SMLoc L, const Twine &Msg) { return getParser().Error(L, Msg); } + //bool Error(SMLoc L, const Twine &Msg) { return true; } + bool showMatchError(SMLoc Loc, unsigned ErrCode); + + bool parseDirectiveWord(unsigned Size, SMLoc L); + bool parseDirectiveInst(SMLoc L); + + bool parseDirectiveTLSDescCall(SMLoc L); + + bool parseDirectiveLOH(StringRef LOH, SMLoc L); + bool parseDirectiveLtorg(SMLoc L); + + bool parseDirectiveReq(StringRef Name, SMLoc L); + bool parseDirectiveUnreq(SMLoc L); + + bool validateInstruction(MCInst &Inst, SmallVectorImpl &Loc); + bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, + OperandVector &Operands, MCStreamer &Out, + uint64_t &ErrorInfo, + bool MatchingInlineAsm, unsigned int &ErrorCode, uint64_t &Address) override; +/// @name Auto-generated Match Functions +/// { + +#define GET_ASSEMBLER_HEADER +#include "AArch64GenAsmMatcher.inc" + + /// } + + OperandMatchResultTy tryParseOptionalShiftExtend(OperandVector &Operands); + OperandMatchResultTy tryParseBarrierOperand(OperandVector &Operands); + OperandMatchResultTy tryParseMRSSystemRegister(OperandVector &Operands); + OperandMatchResultTy tryParseSysReg(OperandVector &Operands); + OperandMatchResultTy tryParseSysCROperand(OperandVector &Operands); + OperandMatchResultTy tryParsePrefetch(OperandVector &Operands); + OperandMatchResultTy tryParsePSBHint(OperandVector &Operands); + OperandMatchResultTy tryParseAdrpLabel(OperandVector &Operands); + OperandMatchResultTy tryParseAdrLabel(OperandVector &Operands); + OperandMatchResultTy tryParseFPImm(OperandVector &Operands); + OperandMatchResultTy tryParseAddSubImm(OperandVector &Operands); + OperandMatchResultTy tryParseGPR64sp0Operand(OperandVector &Operands); + bool tryParseVectorRegister(OperandVector &Operands); + OperandMatchResultTy tryParseGPRSeqPair(OperandVector &Operands); + +public: + enum AArch64MatchResultTy { + Match_InvalidSuffix = FIRST_TARGET_MATCH_RESULT_TY, +#define GET_OPERAND_DIAGNOSTIC_TYPES +#include "AArch64GenAsmMatcher.inc" + }; + AArch64AsmParser(const MCSubtargetInfo &STI, MCAsmParser &Parser, + const MCInstrInfo &MII, const MCTargetOptions &Options) + : MCTargetAsmParser(Options, STI) { + MCAsmParserExtension::Initialize(Parser); + MCStreamer &S = getParser().getStreamer(); + if (S.getTargetStreamer() == nullptr) + new AArch64TargetStreamer(S); + + // Initialize the set of available features. + setAvailableFeatures(ComputeAvailableFeatures(getSTI().getFeatureBits())); + } + + bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, + SMLoc NameLoc, OperandVector &Operands, unsigned int &ErrorCode) override; + bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc, unsigned int &ErrorCode) override; + bool ParseDirective(AsmToken DirectiveID) override; + unsigned validateTargetOperandClass(MCParsedAsmOperand &Op, + unsigned Kind) override; + + static bool classifySymbolRef(const MCExpr *Expr, + AArch64MCExpr::VariantKind &ELFRefKind, + MCSymbolRefExpr::VariantKind &DarwinRefKind, + int64_t &Addend); +}; +} // end anonymous namespace + +namespace { + +/// AArch64Operand - Instances of this class represent a parsed AArch64 machine +/// instruction. +class AArch64Operand : public MCParsedAsmOperand { +private: + enum KindTy { + k_Immediate, + k_ShiftedImm, + k_CondCode, + k_Register, + k_VectorList, + k_VectorIndex, + k_Token, + k_SysReg, + k_SysCR, + k_Prefetch, + k_ShiftExtend, + k_FPImm, + k_Barrier, + k_PSBHint, + } Kind; + + SMLoc StartLoc, EndLoc; + + struct TokOp { + const char *Data; + unsigned Length; + bool IsSuffix; // Is the operand actually a suffix on the mnemonic. + }; + + struct RegOp { + unsigned RegNum; + bool isVector; + }; + + struct VectorListOp { + unsigned RegNum; + unsigned Count; + unsigned NumElements; + unsigned ElementKind; + }; + + struct VectorIndexOp { + unsigned Val; + }; + + struct ImmOp { + const MCExpr *Val; + }; + + struct ShiftedImmOp { + const MCExpr *Val; + unsigned ShiftAmount; + }; + + struct CondCodeOp { + AArch64CC::CondCode Code; + }; + + struct FPImmOp { + unsigned Val; // Encoded 8-bit representation. + }; + + struct BarrierOp { + unsigned Val; // Not the enum since not all values have names. + const char *Data; + unsigned Length; + }; + + struct SysRegOp { + const char *Data; + unsigned Length; + uint32_t MRSReg; + uint32_t MSRReg; + uint32_t PStateField; + }; + + struct SysCRImmOp { + unsigned Val; + }; + + struct PrefetchOp { + unsigned Val; + const char *Data; + unsigned Length; + }; + + struct PSBHintOp { + unsigned Val; + const char *Data; + unsigned Length; + }; + + struct ShiftExtendOp { + AArch64_AM::ShiftExtendType Type; + unsigned Amount; + bool HasExplicitAmount; + }; + + struct ExtendOp { + unsigned Val; + }; + + union { + struct TokOp Tok; + struct RegOp Reg; + struct VectorListOp VectorList; + struct VectorIndexOp VectorIndex; + struct ImmOp Imm; + struct ShiftedImmOp ShiftedImm; + struct CondCodeOp CondCode; + struct FPImmOp FPImm; + struct BarrierOp Barrier; + struct SysRegOp SysReg; + struct SysCRImmOp SysCRImm; + struct PrefetchOp Prefetch; + struct PSBHintOp PSBHint; + struct ShiftExtendOp ShiftExtend; + }; + + // Keep the MCContext around as the MCExprs may need manipulated during + // the add<>Operands() calls. + MCContext &Ctx; + +public: + AArch64Operand(KindTy K, MCContext &Ctx) : Kind(K), Ctx(Ctx) {} + + AArch64Operand(const AArch64Operand &o) : MCParsedAsmOperand(), Ctx(o.Ctx) { + Kind = o.Kind; + StartLoc = o.StartLoc; + EndLoc = o.EndLoc; + switch (Kind) { + case k_Token: + Tok = o.Tok; + break; + case k_Immediate: + Imm = o.Imm; + break; + case k_ShiftedImm: + ShiftedImm = o.ShiftedImm; + break; + case k_CondCode: + CondCode = o.CondCode; + break; + case k_FPImm: + FPImm = o.FPImm; + break; + case k_Barrier: + Barrier = o.Barrier; + break; + case k_Register: + Reg = o.Reg; + break; + case k_VectorList: + VectorList = o.VectorList; + break; + case k_VectorIndex: + VectorIndex = o.VectorIndex; + break; + case k_SysReg: + SysReg = o.SysReg; + break; + case k_SysCR: + SysCRImm = o.SysCRImm; + break; + case k_Prefetch: + Prefetch = o.Prefetch; + break; + case k_PSBHint: + PSBHint = o.PSBHint; + break; + case k_ShiftExtend: + ShiftExtend = o.ShiftExtend; + break; + } + } + + /// getStartLoc - Get the location of the first token of this operand. + SMLoc getStartLoc() const override { return StartLoc; } + /// getEndLoc - Get the location of the last token of this operand. + SMLoc getEndLoc() const override { return EndLoc; } + + StringRef getToken() const { + assert(Kind == k_Token && "Invalid access!"); + return StringRef(Tok.Data, Tok.Length); + } + + bool isTokenSuffix() const { + assert(Kind == k_Token && "Invalid access!"); + return Tok.IsSuffix; + } + + const MCExpr *getImm() const { + assert(Kind == k_Immediate && "Invalid access!"); + return Imm.Val; + } + + const MCExpr *getShiftedImmVal() const { + assert(Kind == k_ShiftedImm && "Invalid access!"); + return ShiftedImm.Val; + } + + unsigned getShiftedImmShift() const { + assert(Kind == k_ShiftedImm && "Invalid access!"); + return ShiftedImm.ShiftAmount; + } + + AArch64CC::CondCode getCondCode() const { + assert(Kind == k_CondCode && "Invalid access!"); + return CondCode.Code; + } + + unsigned getFPImm() const { + assert(Kind == k_FPImm && "Invalid access!"); + return FPImm.Val; + } + + unsigned getBarrier() const { + assert(Kind == k_Barrier && "Invalid access!"); + return Barrier.Val; + } + + StringRef getBarrierName() const { + assert(Kind == k_Barrier && "Invalid access!"); + return StringRef(Barrier.Data, Barrier.Length); + } + + unsigned getReg() const override { + assert(Kind == k_Register && "Invalid access!"); + return Reg.RegNum; + } + + unsigned getVectorListStart() const { + assert(Kind == k_VectorList && "Invalid access!"); + return VectorList.RegNum; + } + + unsigned getVectorListCount() const { + assert(Kind == k_VectorList && "Invalid access!"); + return VectorList.Count; + } + + unsigned getVectorIndex() const { + assert(Kind == k_VectorIndex && "Invalid access!"); + return VectorIndex.Val; + } + + StringRef getSysReg() const { + assert(Kind == k_SysReg && "Invalid access!"); + return StringRef(SysReg.Data, SysReg.Length); + } + + unsigned getSysCR() const { + assert(Kind == k_SysCR && "Invalid access!"); + return SysCRImm.Val; + } + + unsigned getPrefetch() const { + assert(Kind == k_Prefetch && "Invalid access!"); + return Prefetch.Val; + } + + unsigned getPSBHint() const { + assert(Kind == k_PSBHint && "Invalid access!"); + return PSBHint.Val; + } + + StringRef getPSBHintName() const { + assert(Kind == k_PSBHint && "Invalid access!"); + return StringRef(PSBHint.Data, PSBHint.Length); + } + + StringRef getPrefetchName() const { + assert(Kind == k_Prefetch && "Invalid access!"); + return StringRef(Prefetch.Data, Prefetch.Length); + } + + AArch64_AM::ShiftExtendType getShiftExtendType() const { + assert(Kind == k_ShiftExtend && "Invalid access!"); + return ShiftExtend.Type; + } + + unsigned getShiftExtendAmount() const { + assert(Kind == k_ShiftExtend && "Invalid access!"); + return ShiftExtend.Amount; + } + + bool hasShiftExtendAmount() const { + assert(Kind == k_ShiftExtend && "Invalid access!"); + return ShiftExtend.HasExplicitAmount; + } + + bool isImm() const override { return Kind == k_Immediate; } + bool isMem() const override { return false; } + bool isSImm9() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + int64_t Val = MCE->getValue(); + return (Val >= -256 && Val < 256); + } + bool isSImm7s4() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + int64_t Val = MCE->getValue(); + return (Val >= -256 && Val <= 252 && (Val & 3) == 0); + } + bool isSImm7s8() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + int64_t Val = MCE->getValue(); + return (Val >= -512 && Val <= 504 && (Val & 7) == 0); + } + bool isSImm7s16() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + int64_t Val = MCE->getValue(); + return (Val >= -1024 && Val <= 1008 && (Val & 15) == 0); + } + + bool isSymbolicUImm12Offset(const MCExpr *Expr, unsigned Scale) const { + AArch64MCExpr::VariantKind ELFRefKind; + MCSymbolRefExpr::VariantKind DarwinRefKind; + int64_t Addend; + if (!AArch64AsmParser::classifySymbolRef(Expr, ELFRefKind, DarwinRefKind, + Addend)) { + // If we don't understand the expression, assume the best and + // let the fixup and relocation code deal with it. + return true; + } + + if (DarwinRefKind == MCSymbolRefExpr::VK_PAGEOFF || + ELFRefKind == AArch64MCExpr::VK_LO12 || + ELFRefKind == AArch64MCExpr::VK_GOT_LO12 || + ELFRefKind == AArch64MCExpr::VK_DTPREL_LO12 || + ELFRefKind == AArch64MCExpr::VK_DTPREL_LO12_NC || + ELFRefKind == AArch64MCExpr::VK_TPREL_LO12 || + ELFRefKind == AArch64MCExpr::VK_TPREL_LO12_NC || + ELFRefKind == AArch64MCExpr::VK_GOTTPREL_LO12_NC || + ELFRefKind == AArch64MCExpr::VK_TLSDESC_LO12) { + // Note that we don't range-check the addend. It's adjusted modulo page + // size when converted, so there is no "out of range" condition when using + // @pageoff. + return Addend >= 0 && (Addend % Scale) == 0; + } else if (DarwinRefKind == MCSymbolRefExpr::VK_GOTPAGEOFF || + DarwinRefKind == MCSymbolRefExpr::VK_TLVPPAGEOFF) { + // @gotpageoff/@tlvppageoff can only be used directly, not with an addend. + return Addend == 0; + } + + return false; + } + + template bool isUImm12Offset() const { + if (!isImm()) + return false; + + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return isSymbolicUImm12Offset(getImm(), Scale); + + int64_t Val = MCE->getValue(); + return (Val % Scale) == 0 && Val >= 0 && (Val / Scale) < 0x1000; + } + + bool isImm0_1() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + int64_t Val = MCE->getValue(); + return (Val >= 0 && Val < 2); + } + bool isImm0_7() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + int64_t Val = MCE->getValue(); + return (Val >= 0 && Val < 8); + } + bool isImm1_8() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + int64_t Val = MCE->getValue(); + return (Val > 0 && Val < 9); + } + bool isImm0_15() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + int64_t Val = MCE->getValue(); + return (Val >= 0 && Val < 16); + } + bool isImm1_16() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + int64_t Val = MCE->getValue(); + return (Val > 0 && Val < 17); + } + bool isImm0_31() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + int64_t Val = MCE->getValue(); + return (Val >= 0 && Val < 32); + } + bool isImm1_31() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + int64_t Val = MCE->getValue(); + return (Val >= 1 && Val < 32); + } + bool isImm1_32() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + int64_t Val = MCE->getValue(); + return (Val >= 1 && Val < 33); + } + bool isImm0_63() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + int64_t Val = MCE->getValue(); + return (Val >= 0 && Val < 64); + } + bool isImm1_63() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + int64_t Val = MCE->getValue(); + return (Val >= 1 && Val < 64); + } + bool isImm1_64() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + int64_t Val = MCE->getValue(); + return (Val >= 1 && Val < 65); + } + bool isImm0_127() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + int64_t Val = MCE->getValue(); + return (Val >= 0 && Val < 128); + } + bool isImm0_255() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + int64_t Val = MCE->getValue(); + return (Val >= 0 && Val < 256); + } + bool isImm0_65535() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + int64_t Val = MCE->getValue(); + return (Val >= 0 && Val < 65536); + } + bool isImm32_63() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + int64_t Val = MCE->getValue(); + return (Val >= 32 && Val < 64); + } + bool isLogicalImm32() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + int64_t Val = MCE->getValue(); + if (Val >> 32 != 0 && Val >> 32 != ~0LL) + return false; + Val &= 0xFFFFFFFF; + return AArch64_AM::isLogicalImmediate(Val, 32); + } + bool isLogicalImm64() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + return AArch64_AM::isLogicalImmediate(MCE->getValue(), 64); + } + bool isLogicalImm32Not() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + int64_t Val = ~MCE->getValue() & 0xFFFFFFFF; + return AArch64_AM::isLogicalImmediate(Val, 32); + } + bool isLogicalImm64Not() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + return AArch64_AM::isLogicalImmediate(~MCE->getValue(), 64); + } + bool isShiftedImm() const { return Kind == k_ShiftedImm; } + bool isAddSubImm() const { + if (!isShiftedImm() && !isImm()) + return false; + + const MCExpr *Expr; + + // An ADD/SUB shifter is either 'lsl #0' or 'lsl #12'. + if (isShiftedImm()) { + unsigned Shift = ShiftedImm.ShiftAmount; + Expr = ShiftedImm.Val; + if (Shift != 0 && Shift != 12) + return false; + } else { + Expr = getImm(); + } + + AArch64MCExpr::VariantKind ELFRefKind; + MCSymbolRefExpr::VariantKind DarwinRefKind; + int64_t Addend; + if (AArch64AsmParser::classifySymbolRef(Expr, ELFRefKind, + DarwinRefKind, Addend)) { + return DarwinRefKind == MCSymbolRefExpr::VK_PAGEOFF + || DarwinRefKind == MCSymbolRefExpr::VK_TLVPPAGEOFF + || (DarwinRefKind == MCSymbolRefExpr::VK_GOTPAGEOFF && Addend == 0) + || ELFRefKind == AArch64MCExpr::VK_LO12 + || ELFRefKind == AArch64MCExpr::VK_DTPREL_HI12 + || ELFRefKind == AArch64MCExpr::VK_DTPREL_LO12 + || ELFRefKind == AArch64MCExpr::VK_DTPREL_LO12_NC + || ELFRefKind == AArch64MCExpr::VK_TPREL_HI12 + || ELFRefKind == AArch64MCExpr::VK_TPREL_LO12 + || ELFRefKind == AArch64MCExpr::VK_TPREL_LO12_NC + || ELFRefKind == AArch64MCExpr::VK_TLSDESC_LO12; + } + + // Otherwise it should be a real immediate in range: + const MCConstantExpr *CE = cast(Expr); + return CE->getValue() >= 0 && CE->getValue() <= 0xfff; + } + bool isAddSubImmNeg() const { + if (!isShiftedImm() && !isImm()) + return false; + + const MCExpr *Expr; + + // An ADD/SUB shifter is either 'lsl #0' or 'lsl #12'. + if (isShiftedImm()) { + unsigned Shift = ShiftedImm.ShiftAmount; + Expr = ShiftedImm.Val; + if (Shift != 0 && Shift != 12) + return false; + } else + Expr = getImm(); + + // Otherwise it should be a real negative immediate in range: + const MCConstantExpr *CE = dyn_cast(Expr); + return CE != nullptr && CE->getValue() < 0 && -CE->getValue() <= 0xfff; + } + bool isCondCode() const { return Kind == k_CondCode; } + bool isSIMDImmType10() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return false; + return AArch64_AM::isAdvSIMDModImmType10(MCE->getValue()); + } + bool isBranchTarget26() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return true; + int64_t Val = MCE->getValue(); + return ((Val & 0x3) == 0); + } + bool isPCRelLabel19() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return true; + int64_t Val = MCE->getValue(); + return ((Val & 0x3) == 0); + } + bool isBranchTarget14() const { + if (!isImm()) + return false; + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + return true; + int64_t Val = MCE->getValue(); + return ((Val & 0x3) == 0); + } + + bool + isMovWSymbol(ArrayRef AllowedModifiers) const { + if (!isImm()) + return false; + + AArch64MCExpr::VariantKind ELFRefKind; + MCSymbolRefExpr::VariantKind DarwinRefKind; + int64_t Addend; + if (!AArch64AsmParser::classifySymbolRef(getImm(), ELFRefKind, + DarwinRefKind, Addend)) { + return false; + } + if (DarwinRefKind != MCSymbolRefExpr::VK_None) + return false; + + for (unsigned i = 0; i != AllowedModifiers.size(); ++i) { + if (ELFRefKind == AllowedModifiers[i]) + return Addend == 0; + } + + return false; + } + + bool isMovZSymbolG3() const { + return isMovWSymbol(AArch64MCExpr::VK_ABS_G3); + } + + bool isMovZSymbolG2() const { + return isMovWSymbol({AArch64MCExpr::VK_ABS_G2, AArch64MCExpr::VK_ABS_G2_S, + AArch64MCExpr::VK_TPREL_G2, + AArch64MCExpr::VK_DTPREL_G2}); + } + + bool isMovZSymbolG1() const { + return isMovWSymbol({ + AArch64MCExpr::VK_ABS_G1, AArch64MCExpr::VK_ABS_G1_S, + AArch64MCExpr::VK_GOTTPREL_G1, AArch64MCExpr::VK_TPREL_G1, + AArch64MCExpr::VK_DTPREL_G1, + }); + } + + bool isMovZSymbolG0() const { + return isMovWSymbol({AArch64MCExpr::VK_ABS_G0, AArch64MCExpr::VK_ABS_G0_S, + AArch64MCExpr::VK_TPREL_G0, + AArch64MCExpr::VK_DTPREL_G0}); + } + + bool isMovKSymbolG3() const { + return isMovWSymbol(AArch64MCExpr::VK_ABS_G3); + } + + bool isMovKSymbolG2() const { + return isMovWSymbol(AArch64MCExpr::VK_ABS_G2_NC); + } + + bool isMovKSymbolG1() const { + return isMovWSymbol({AArch64MCExpr::VK_ABS_G1_NC, + AArch64MCExpr::VK_TPREL_G1_NC, + AArch64MCExpr::VK_DTPREL_G1_NC}); + } + + bool isMovKSymbolG0() const { + return isMovWSymbol( + {AArch64MCExpr::VK_ABS_G0_NC, AArch64MCExpr::VK_GOTTPREL_G0_NC, + AArch64MCExpr::VK_TPREL_G0_NC, AArch64MCExpr::VK_DTPREL_G0_NC}); + } + + template + bool isMOVZMovAlias() const { + if (!isImm()) return false; + + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + uint64_t Value = CE->getValue(); + + if (RegWidth == 32) + Value &= 0xffffffffULL; + + // "lsl #0" takes precedence: in practice this only affects "#0, lsl #0". + if (Value == 0 && Shift != 0) + return false; + + return (Value & ~(0xffffULL << Shift)) == 0; + } + + template + bool isMOVNMovAlias() const { + if (!isImm()) return false; + + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + uint64_t Value = CE->getValue(); + + // MOVZ takes precedence over MOVN. + for (int MOVZShift = 0; MOVZShift <= 48; MOVZShift += 16) + if ((Value & ~(0xffffULL << MOVZShift)) == 0) + return false; + + Value = ~Value; + if (RegWidth == 32) + Value &= 0xffffffffULL; + + return (Value & ~(0xffffULL << Shift)) == 0; + } + + bool isFPImm() const { return Kind == k_FPImm; } + bool isBarrier() const { return Kind == k_Barrier; } + bool isSysReg() const { return Kind == k_SysReg; } + bool isMRSSystemRegister() const { + if (!isSysReg()) return false; + + return SysReg.MRSReg != -1U; + } + bool isMSRSystemRegister() const { + if (!isSysReg()) return false; + return SysReg.MSRReg != -1U; + } + bool isSystemPStateFieldWithImm0_1() const { + if (!isSysReg()) return false; + return (SysReg.PStateField == AArch64PState::PAN || + SysReg.PStateField == AArch64PState::UAO); + } + bool isSystemPStateFieldWithImm0_15() const { + if (!isSysReg() || isSystemPStateFieldWithImm0_1()) return false; + return SysReg.PStateField != -1U; + } + bool isReg() const override { return Kind == k_Register && !Reg.isVector; } + bool isVectorReg() const { return Kind == k_Register && Reg.isVector; } + bool isVectorRegLo() const { + return Kind == k_Register && Reg.isVector && + AArch64MCRegisterClasses[AArch64::FPR128_loRegClassID].contains( + Reg.RegNum); + } + bool isGPR32as64() const { + return Kind == k_Register && !Reg.isVector && + AArch64MCRegisterClasses[AArch64::GPR64RegClassID].contains(Reg.RegNum); + } + bool isWSeqPair() const { + return Kind == k_Register && !Reg.isVector && + AArch64MCRegisterClasses[AArch64::WSeqPairsClassRegClassID].contains( + Reg.RegNum); + } + bool isXSeqPair() const { + return Kind == k_Register && !Reg.isVector && + AArch64MCRegisterClasses[AArch64::XSeqPairsClassRegClassID].contains( + Reg.RegNum); + } + + bool isGPR64sp0() const { + return Kind == k_Register && !Reg.isVector && + AArch64MCRegisterClasses[AArch64::GPR64spRegClassID].contains(Reg.RegNum); + } + + /// Is this a vector list with the type implicit (presumably attached to the + /// instruction itself)? + template bool isImplicitlyTypedVectorList() const { + return Kind == k_VectorList && VectorList.Count == NumRegs && + !VectorList.ElementKind; + } + + template + bool isTypedVectorList() const { + if (Kind != k_VectorList) + return false; + if (VectorList.Count != NumRegs) + return false; + if (VectorList.ElementKind != ElementKind) + return false; + return VectorList.NumElements == NumElements; + } + + bool isVectorIndex1() const { + return Kind == k_VectorIndex && VectorIndex.Val == 1; + } + bool isVectorIndexB() const { + return Kind == k_VectorIndex && VectorIndex.Val < 16; + } + bool isVectorIndexH() const { + return Kind == k_VectorIndex && VectorIndex.Val < 8; + } + bool isVectorIndexS() const { + return Kind == k_VectorIndex && VectorIndex.Val < 4; + } + bool isVectorIndexD() const { + return Kind == k_VectorIndex && VectorIndex.Val < 2; + } + bool isToken() const override { return Kind == k_Token; } + bool isTokenEqual(StringRef Str) const { + return Kind == k_Token && getToken() == Str; + } + bool isSysCR() const { return Kind == k_SysCR; } + bool isPrefetch() const { return Kind == k_Prefetch; } + bool isPSBHint() const { return Kind == k_PSBHint; } + bool isShiftExtend() const { return Kind == k_ShiftExtend; } + bool isShifter() const { + if (!isShiftExtend()) + return false; + + AArch64_AM::ShiftExtendType ST = getShiftExtendType(); + return (ST == AArch64_AM::LSL || ST == AArch64_AM::LSR || + ST == AArch64_AM::ASR || ST == AArch64_AM::ROR || + ST == AArch64_AM::MSL); + } + bool isExtend() const { + if (!isShiftExtend()) + return false; + + AArch64_AM::ShiftExtendType ET = getShiftExtendType(); + return (ET == AArch64_AM::UXTB || ET == AArch64_AM::SXTB || + ET == AArch64_AM::UXTH || ET == AArch64_AM::SXTH || + ET == AArch64_AM::UXTW || ET == AArch64_AM::SXTW || + ET == AArch64_AM::UXTX || ET == AArch64_AM::SXTX || + ET == AArch64_AM::LSL) && + getShiftExtendAmount() <= 4; + } + + bool isExtend64() const { + if (!isExtend()) + return false; + // UXTX and SXTX require a 64-bit source register (the ExtendLSL64 class). + AArch64_AM::ShiftExtendType ET = getShiftExtendType(); + return ET != AArch64_AM::UXTX && ET != AArch64_AM::SXTX; + } + bool isExtendLSL64() const { + if (!isExtend()) + return false; + AArch64_AM::ShiftExtendType ET = getShiftExtendType(); + return (ET == AArch64_AM::UXTX || ET == AArch64_AM::SXTX || + ET == AArch64_AM::LSL) && + getShiftExtendAmount() <= 4; + } + + template bool isMemXExtend() const { + if (!isExtend()) + return false; + AArch64_AM::ShiftExtendType ET = getShiftExtendType(); + return (ET == AArch64_AM::LSL || ET == AArch64_AM::SXTX) && + (getShiftExtendAmount() == Log2_32(Width / 8) || + getShiftExtendAmount() == 0); + } + + template bool isMemWExtend() const { + if (!isExtend()) + return false; + AArch64_AM::ShiftExtendType ET = getShiftExtendType(); + return (ET == AArch64_AM::UXTW || ET == AArch64_AM::SXTW) && + (getShiftExtendAmount() == Log2_32(Width / 8) || + getShiftExtendAmount() == 0); + } + + template + bool isArithmeticShifter() const { + if (!isShifter()) + return false; + + // An arithmetic shifter is LSL, LSR, or ASR. + AArch64_AM::ShiftExtendType ST = getShiftExtendType(); + return (ST == AArch64_AM::LSL || ST == AArch64_AM::LSR || + ST == AArch64_AM::ASR) && getShiftExtendAmount() < width; + } + + template + bool isLogicalShifter() const { + if (!isShifter()) + return false; + + // A logical shifter is LSL, LSR, ASR or ROR. + AArch64_AM::ShiftExtendType ST = getShiftExtendType(); + return (ST == AArch64_AM::LSL || ST == AArch64_AM::LSR || + ST == AArch64_AM::ASR || ST == AArch64_AM::ROR) && + getShiftExtendAmount() < width; + } + + bool isMovImm32Shifter() const { + if (!isShifter()) + return false; + + // A MOVi shifter is LSL of 0, 16, 32, or 48. + AArch64_AM::ShiftExtendType ST = getShiftExtendType(); + if (ST != AArch64_AM::LSL) + return false; + uint64_t Val = getShiftExtendAmount(); + return (Val == 0 || Val == 16); + } + + bool isMovImm64Shifter() const { + if (!isShifter()) + return false; + + // A MOVi shifter is LSL of 0 or 16. + AArch64_AM::ShiftExtendType ST = getShiftExtendType(); + if (ST != AArch64_AM::LSL) + return false; + uint64_t Val = getShiftExtendAmount(); + return (Val == 0 || Val == 16 || Val == 32 || Val == 48); + } + + bool isLogicalVecShifter() const { + if (!isShifter()) + return false; + + // A logical vector shifter is a left shift by 0, 8, 16, or 24. + unsigned Shift = getShiftExtendAmount(); + return getShiftExtendType() == AArch64_AM::LSL && + (Shift == 0 || Shift == 8 || Shift == 16 || Shift == 24); + } + + bool isLogicalVecHalfWordShifter() const { + if (!isLogicalVecShifter()) + return false; + + // A logical vector shifter is a left shift by 0 or 8. + unsigned Shift = getShiftExtendAmount(); + return getShiftExtendType() == AArch64_AM::LSL && + (Shift == 0 || Shift == 8); + } + + bool isMoveVecShifter() const { + if (!isShiftExtend()) + return false; + + // A logical vector shifter is a left shift by 8 or 16. + unsigned Shift = getShiftExtendAmount(); + return getShiftExtendType() == AArch64_AM::MSL && + (Shift == 8 || Shift == 16); + } + + // Fallback unscaled operands are for aliases of LDR/STR that fall back + // to LDUR/STUR when the offset is not legal for the former but is for + // the latter. As such, in addition to checking for being a legal unscaled + // address, also check that it is not a legal scaled address. This avoids + // ambiguity in the matcher. + template + bool isSImm9OffsetFB() const { + return isSImm9() && !isUImm12Offset(); + } + + bool isAdrpLabel() const { + // Validation was handled during parsing, so we just sanity check that + // something didn't go haywire. + if (!isImm()) + return false; + + if (const MCConstantExpr *CE = dyn_cast(Imm.Val)) { + int64_t Val = CE->getValue(); + int64_t Offset = Val - Ctx.getBaseAddress(); + int64_t Min = - (4096 * (1LL << (21 - 1))); + int64_t Max = 4096 * ((1LL << (21 - 1)) - 1); + return (Val % 4096) == 0 && Offset >= Min && Offset <= Max; + } + + return true; + } + + bool isAdrLabel() const { + // Validation was handled during parsing, so we just sanity check that + // something didn't go haywire. + if (!isImm()) + return false; + + if (const MCConstantExpr *CE = dyn_cast(Imm.Val)) { + int64_t Val = CE->getValue(); + int64_t Min = - (1LL << (21 - 1)); + int64_t Max = ((1LL << (21 - 1)) - 1); + return Val >= Min && Val <= Max; + } + + return true; + } + + void addExpr(MCInst &Inst, const MCExpr *Expr) const { + // Add as immediates when possible. Null MCExpr = 0. + if (!Expr) + Inst.addOperand(MCOperand::createImm(0)); + else if (const MCConstantExpr *CE = dyn_cast(Expr)) + Inst.addOperand(MCOperand::createImm(CE->getValue())); + else + Inst.addOperand(MCOperand::createExpr(Expr)); + } + + void addRegOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createReg(getReg())); + } + + void addGPR32as64Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + assert( + AArch64MCRegisterClasses[AArch64::GPR64RegClassID].contains(getReg())); + + const MCRegisterInfo *RI = Ctx.getRegisterInfo(); + uint32_t Reg = RI->getRegClass(AArch64::GPR32RegClassID).getRegister( + RI->getEncodingValue(getReg())); + + Inst.addOperand(MCOperand::createReg(Reg)); + } + + void addVectorReg64Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + assert( + AArch64MCRegisterClasses[AArch64::FPR128RegClassID].contains(getReg())); + Inst.addOperand(MCOperand::createReg(AArch64::D0 + getReg() - AArch64::Q0)); + } + + void addVectorReg128Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + assert( + AArch64MCRegisterClasses[AArch64::FPR128RegClassID].contains(getReg())); + Inst.addOperand(MCOperand::createReg(getReg())); + } + + void addVectorRegLoOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createReg(getReg())); + } + + template + void addVectorList64Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + static const unsigned FirstRegs[] = { AArch64::D0, + AArch64::D0_D1, + AArch64::D0_D1_D2, + AArch64::D0_D1_D2_D3 }; + unsigned FirstReg = FirstRegs[NumRegs - 1]; + + Inst.addOperand( + MCOperand::createReg(FirstReg + getVectorListStart() - AArch64::Q0)); + } + + template + void addVectorList128Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + static const unsigned FirstRegs[] = { AArch64::Q0, + AArch64::Q0_Q1, + AArch64::Q0_Q1_Q2, + AArch64::Q0_Q1_Q2_Q3 }; + unsigned FirstReg = FirstRegs[NumRegs - 1]; + + Inst.addOperand( + MCOperand::createReg(FirstReg + getVectorListStart() - AArch64::Q0)); + } + + void addVectorIndex1Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(getVectorIndex())); + } + + void addVectorIndexBOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(getVectorIndex())); + } + + void addVectorIndexHOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(getVectorIndex())); + } + + void addVectorIndexSOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(getVectorIndex())); + } + + void addVectorIndexDOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(getVectorIndex())); + } + + void addImmOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // If this is a pageoff symrefexpr with an addend, adjust the addend + // to be only the page-offset portion. Otherwise, just add the expr + // as-is. + addExpr(Inst, getImm()); + } + + void addAddSubImmOperands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + if (isShiftedImm()) { + addExpr(Inst, getShiftedImmVal()); + Inst.addOperand(MCOperand::createImm(getShiftedImmShift())); + } else { + addExpr(Inst, getImm()); + Inst.addOperand(MCOperand::createImm(0)); + } + } + + void addAddSubImmNegOperands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + + const MCExpr *MCE = isShiftedImm() ? getShiftedImmVal() : getImm(); + const MCConstantExpr *CE = cast(MCE); + int64_t Val = -CE->getValue(); + unsigned ShiftAmt = isShiftedImm() ? ShiftedImm.ShiftAmount : 0; + + Inst.addOperand(MCOperand::createImm(Val)); + Inst.addOperand(MCOperand::createImm(ShiftAmt)); + } + + void addCondCodeOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(getCondCode())); + } + + void addAdrpLabelOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) + addExpr(Inst, getImm()); + else + Inst.addOperand(MCOperand::createImm(MCE->getValue() >> 12)); + } + + void addAdrLabelOperands(MCInst &Inst, unsigned N) const { + addImmOperands(Inst, N); + } + + template + void addUImm12OffsetOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = dyn_cast(getImm()); + + if (!MCE) { + Inst.addOperand(MCOperand::createExpr(getImm())); + return; + } + Inst.addOperand(MCOperand::createImm(MCE->getValue() / Scale)); + } + + void addSImm9Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + Inst.addOperand(MCOperand::createImm(MCE->getValue())); + } + + void addSImm7s4Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + Inst.addOperand(MCOperand::createImm(MCE->getValue() / 4)); + } + + void addSImm7s8Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + Inst.addOperand(MCOperand::createImm(MCE->getValue() / 8)); + } + + void addSImm7s16Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + Inst.addOperand(MCOperand::createImm(MCE->getValue() / 16)); + } + + void addImm0_1Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + Inst.addOperand(MCOperand::createImm(MCE->getValue())); + } + + void addImm0_7Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + Inst.addOperand(MCOperand::createImm(MCE->getValue())); + } + + void addImm1_8Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + Inst.addOperand(MCOperand::createImm(MCE->getValue())); + } + + void addImm0_15Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + Inst.addOperand(MCOperand::createImm(MCE->getValue())); + } + + void addImm1_16Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + assert(MCE && "Invalid constant immediate operand!"); + Inst.addOperand(MCOperand::createImm(MCE->getValue())); + } + + void addImm0_31Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + Inst.addOperand(MCOperand::createImm(MCE->getValue())); + } + + void addImm1_31Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + Inst.addOperand(MCOperand::createImm(MCE->getValue())); + } + + void addImm1_32Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + Inst.addOperand(MCOperand::createImm(MCE->getValue())); + } + + void addImm0_63Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + Inst.addOperand(MCOperand::createImm(MCE->getValue())); + } + + void addImm1_63Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + Inst.addOperand(MCOperand::createImm(MCE->getValue())); + } + + void addImm1_64Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + Inst.addOperand(MCOperand::createImm(MCE->getValue())); + } + + void addImm0_127Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + Inst.addOperand(MCOperand::createImm(MCE->getValue())); + } + + void addImm0_255Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + Inst.addOperand(MCOperand::createImm(MCE->getValue())); + } + + void addImm0_65535Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + Inst.addOperand(MCOperand::createImm(MCE->getValue())); + } + + void addImm32_63Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + Inst.addOperand(MCOperand::createImm(MCE->getValue())); + } + + void addLogicalImm32Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + uint64_t encoding = + AArch64_AM::encodeLogicalImmediate(MCE->getValue() & 0xFFFFFFFF, 32); + Inst.addOperand(MCOperand::createImm(encoding)); + } + + void addLogicalImm64Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + uint64_t encoding = AArch64_AM::encodeLogicalImmediate(MCE->getValue(), 64); + Inst.addOperand(MCOperand::createImm(encoding)); + } + + void addLogicalImm32NotOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + int64_t Val = ~MCE->getValue() & 0xFFFFFFFF; + uint64_t encoding = AArch64_AM::encodeLogicalImmediate(Val, 32); + Inst.addOperand(MCOperand::createImm(encoding)); + } + + void addLogicalImm64NotOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + uint64_t encoding = + AArch64_AM::encodeLogicalImmediate(~MCE->getValue(), 64); + Inst.addOperand(MCOperand::createImm(encoding)); + } + + void addSIMDImmType10Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = cast(getImm()); + uint64_t encoding = AArch64_AM::encodeAdvSIMDModImmType10(MCE->getValue()); + Inst.addOperand(MCOperand::createImm(encoding)); + } + + void addBranchTarget26Operands(MCInst &Inst, unsigned N) const { + // Branch operands don't encode the low bits, so shift them off + // here. If it's a label, however, just put it on directly as there's + // not enough information now to do anything. + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) { + addExpr(Inst, getImm()); + return; + } + assert(MCE && "Invalid constant immediate operand!"); + Inst.addOperand(MCOperand::createImm(MCE->getValue() >> 2)); + } + + void addPCRelLabel19Operands(MCInst &Inst, unsigned N) const { + // Branch operands don't encode the low bits, so shift them off + // here. If it's a label, however, just put it on directly as there's + // not enough information now to do anything. + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) { + addExpr(Inst, getImm()); + return; + } + assert(MCE && "Invalid constant immediate operand!"); + Inst.addOperand(MCOperand::createImm(MCE->getValue() >> 2)); + } + + void addBranchTarget14Operands(MCInst &Inst, unsigned N) const { + // Branch operands don't encode the low bits, so shift them off + // here. If it's a label, however, just put it on directly as there's + // not enough information now to do anything. + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *MCE = dyn_cast(getImm()); + if (!MCE) { + addExpr(Inst, getImm()); + return; + } + assert(MCE && "Invalid constant immediate operand!"); + Inst.addOperand(MCOperand::createImm(MCE->getValue() >> 2)); + } + + void addFPImmOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(getFPImm())); + } + + void addBarrierOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(getBarrier())); + } + + void addMRSSystemRegisterOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + + Inst.addOperand(MCOperand::createImm(SysReg.MRSReg)); + } + + void addMSRSystemRegisterOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + + Inst.addOperand(MCOperand::createImm(SysReg.MSRReg)); + } + + void addSystemPStateFieldWithImm0_1Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + + Inst.addOperand(MCOperand::createImm(SysReg.PStateField)); + } + + void addSystemPStateFieldWithImm0_15Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + + Inst.addOperand(MCOperand::createImm(SysReg.PStateField)); + } + + void addSysCROperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(getSysCR())); + } + + void addPrefetchOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(getPrefetch())); + } + + void addPSBHintOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(getPSBHint())); + } + + void addShifterOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + unsigned Imm = + AArch64_AM::getShifterImm(getShiftExtendType(), getShiftExtendAmount()); + Inst.addOperand(MCOperand::createImm(Imm)); + } + + void addExtendOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + AArch64_AM::ShiftExtendType ET = getShiftExtendType(); + if (ET == AArch64_AM::LSL) ET = AArch64_AM::UXTW; + unsigned Imm = AArch64_AM::getArithExtendImm(ET, getShiftExtendAmount()); + Inst.addOperand(MCOperand::createImm(Imm)); + } + + void addExtend64Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + AArch64_AM::ShiftExtendType ET = getShiftExtendType(); + if (ET == AArch64_AM::LSL) ET = AArch64_AM::UXTX; + unsigned Imm = AArch64_AM::getArithExtendImm(ET, getShiftExtendAmount()); + Inst.addOperand(MCOperand::createImm(Imm)); + } + + void addMemExtendOperands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + AArch64_AM::ShiftExtendType ET = getShiftExtendType(); + bool IsSigned = ET == AArch64_AM::SXTW || ET == AArch64_AM::SXTX; + Inst.addOperand(MCOperand::createImm(IsSigned)); + Inst.addOperand(MCOperand::createImm(getShiftExtendAmount() != 0)); + } + + // For 8-bit load/store instructions with a register offset, both the + // "DoShift" and "NoShift" variants have a shift of 0. Because of this, + // they're disambiguated by whether the shift was explicit or implicit rather + // than its size. + void addMemExtend8Operands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + AArch64_AM::ShiftExtendType ET = getShiftExtendType(); + bool IsSigned = ET == AArch64_AM::SXTW || ET == AArch64_AM::SXTX; + Inst.addOperand(MCOperand::createImm(IsSigned)); + Inst.addOperand(MCOperand::createImm(hasShiftExtendAmount())); + } + + template + void addMOVZMovAliasOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + + const MCConstantExpr *CE = cast(getImm()); + uint64_t Value = CE->getValue(); + Inst.addOperand(MCOperand::createImm((Value >> Shift) & 0xffff)); + } + + template + void addMOVNMovAliasOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + + const MCConstantExpr *CE = cast(getImm()); + uint64_t Value = CE->getValue(); + Inst.addOperand(MCOperand::createImm((~Value >> Shift) & 0xffff)); + } + + void print(raw_ostream &OS) const override; + + static std::unique_ptr + CreateToken(StringRef Str, bool IsSuffix, SMLoc S, MCContext &Ctx) { + auto Op = make_unique(k_Token, Ctx); + Op->Tok.Data = Str.data(); + Op->Tok.Length = Str.size(); + Op->Tok.IsSuffix = IsSuffix; + Op->StartLoc = S; + Op->EndLoc = S; + return Op; + } + + static std::unique_ptr + CreateReg(unsigned RegNum, bool isVector, SMLoc S, SMLoc E, MCContext &Ctx) { + auto Op = make_unique(k_Register, Ctx); + Op->Reg.RegNum = RegNum; + Op->Reg.isVector = isVector; + Op->StartLoc = S; + Op->EndLoc = E; + return Op; + } + + static std::unique_ptr + CreateVectorList(unsigned RegNum, unsigned Count, unsigned NumElements, + char ElementKind, SMLoc S, SMLoc E, MCContext &Ctx) { + auto Op = make_unique(k_VectorList, Ctx); + Op->VectorList.RegNum = RegNum; + Op->VectorList.Count = Count; + Op->VectorList.NumElements = NumElements; + Op->VectorList.ElementKind = ElementKind; + Op->StartLoc = S; + Op->EndLoc = E; + return Op; + } + + static std::unique_ptr + CreateVectorIndex(unsigned Idx, SMLoc S, SMLoc E, MCContext &Ctx) { + auto Op = make_unique(k_VectorIndex, Ctx); + Op->VectorIndex.Val = Idx; + Op->StartLoc = S; + Op->EndLoc = E; + return Op; + } + + static std::unique_ptr CreateImm(const MCExpr *Val, SMLoc S, + SMLoc E, MCContext &Ctx) { + auto Op = make_unique(k_Immediate, Ctx); + Op->Imm.Val = Val; + Op->StartLoc = S; + Op->EndLoc = E; + return Op; + } + + static std::unique_ptr CreateShiftedImm(const MCExpr *Val, + unsigned ShiftAmount, + SMLoc S, SMLoc E, + MCContext &Ctx) { + auto Op = make_unique(k_ShiftedImm, Ctx); + Op->ShiftedImm .Val = Val; + Op->ShiftedImm.ShiftAmount = ShiftAmount; + Op->StartLoc = S; + Op->EndLoc = E; + return Op; + } + + static std::unique_ptr + CreateCondCode(AArch64CC::CondCode Code, SMLoc S, SMLoc E, MCContext &Ctx) { + auto Op = make_unique(k_CondCode, Ctx); + Op->CondCode.Code = Code; + Op->StartLoc = S; + Op->EndLoc = E; + return Op; + } + + static std::unique_ptr CreateFPImm(unsigned Val, SMLoc S, + MCContext &Ctx) { + auto Op = make_unique(k_FPImm, Ctx); + Op->FPImm.Val = Val; + Op->StartLoc = S; + Op->EndLoc = S; + return Op; + } + + static std::unique_ptr CreateBarrier(unsigned Val, + StringRef Str, + SMLoc S, + MCContext &Ctx) { + auto Op = make_unique(k_Barrier, Ctx); + Op->Barrier.Val = Val; + Op->Barrier.Data = Str.data(); + Op->Barrier.Length = Str.size(); + Op->StartLoc = S; + Op->EndLoc = S; + return Op; + } + + static std::unique_ptr CreateSysReg(StringRef Str, SMLoc S, + uint32_t MRSReg, + uint32_t MSRReg, + uint32_t PStateField, + MCContext &Ctx) { + auto Op = make_unique(k_SysReg, Ctx); + Op->SysReg.Data = Str.data(); + Op->SysReg.Length = Str.size(); + Op->SysReg.MRSReg = MRSReg; + Op->SysReg.MSRReg = MSRReg; + Op->SysReg.PStateField = PStateField; + Op->StartLoc = S; + Op->EndLoc = S; + return Op; + } + + static std::unique_ptr CreateSysCR(unsigned Val, SMLoc S, + SMLoc E, MCContext &Ctx) { + auto Op = make_unique(k_SysCR, Ctx); + Op->SysCRImm.Val = Val; + Op->StartLoc = S; + Op->EndLoc = E; + return Op; + } + + static std::unique_ptr CreatePrefetch(unsigned Val, + StringRef Str, + SMLoc S, + MCContext &Ctx) { + auto Op = make_unique(k_Prefetch, Ctx); + Op->Prefetch.Val = Val; + Op->Barrier.Data = Str.data(); + Op->Barrier.Length = Str.size(); + Op->StartLoc = S; + Op->EndLoc = S; + return Op; + } + + static std::unique_ptr CreatePSBHint(unsigned Val, + StringRef Str, + SMLoc S, + MCContext &Ctx) { + auto Op = make_unique(k_PSBHint, Ctx); + Op->PSBHint.Val = Val; + Op->PSBHint.Data = Str.data(); + Op->PSBHint.Length = Str.size(); + Op->StartLoc = S; + Op->EndLoc = S; + return Op; + } + + static std::unique_ptr + CreateShiftExtend(AArch64_AM::ShiftExtendType ShOp, unsigned Val, + bool HasExplicitAmount, SMLoc S, SMLoc E, MCContext &Ctx) { + auto Op = make_unique(k_ShiftExtend, Ctx); + Op->ShiftExtend.Type = ShOp; + Op->ShiftExtend.Amount = Val; + Op->ShiftExtend.HasExplicitAmount = HasExplicitAmount; + Op->StartLoc = S; + Op->EndLoc = E; + return Op; + } +}; + +} // end anonymous namespace. + +void AArch64Operand::print(raw_ostream &OS) const { + switch (Kind) { + case k_FPImm: + OS << ""; + break; + case k_Barrier: { + StringRef Name = getBarrierName(); + if (!Name.empty()) + OS << ""; + else + OS << ""; + break; + } + case k_Immediate: + OS << *getImm(); + break; + case k_ShiftedImm: { + unsigned Shift = getShiftedImmShift(); + OS << ""; + break; + } + case k_CondCode: + OS << ""; + break; + case k_Register: + OS << ""; + break; + case k_VectorList: { + OS << ""; + break; + } + case k_VectorIndex: + OS << ""; + break; + case k_SysReg: + OS << "'; + break; + case k_Token: + OS << "'" << getToken() << "'"; + break; + case k_SysCR: + OS << "c" << getSysCR(); + break; + case k_Prefetch: { + StringRef Name = getPrefetchName(); + if (!Name.empty()) + OS << ""; + else + OS << ""; + break; + } + case k_PSBHint: { + OS << getPSBHintName(); + break; + } + case k_ShiftExtend: { + OS << "<" << AArch64_AM::getShiftExtendName(getShiftExtendType()) << " #" + << getShiftExtendAmount(); + if (!hasShiftExtendAmount()) + OS << ""; + OS << '>'; + break; + } + } +} + +/// @name Auto-generated Match Functions +/// { + +static unsigned MatchRegisterName(StringRef Name); + +/// } + +static unsigned matchVectorRegName(StringRef Name) { + return StringSwitch(Name.lower()) + .Case("v0", AArch64::Q0) + .Case("v1", AArch64::Q1) + .Case("v2", AArch64::Q2) + .Case("v3", AArch64::Q3) + .Case("v4", AArch64::Q4) + .Case("v5", AArch64::Q5) + .Case("v6", AArch64::Q6) + .Case("v7", AArch64::Q7) + .Case("v8", AArch64::Q8) + .Case("v9", AArch64::Q9) + .Case("v10", AArch64::Q10) + .Case("v11", AArch64::Q11) + .Case("v12", AArch64::Q12) + .Case("v13", AArch64::Q13) + .Case("v14", AArch64::Q14) + .Case("v15", AArch64::Q15) + .Case("v16", AArch64::Q16) + .Case("v17", AArch64::Q17) + .Case("v18", AArch64::Q18) + .Case("v19", AArch64::Q19) + .Case("v20", AArch64::Q20) + .Case("v21", AArch64::Q21) + .Case("v22", AArch64::Q22) + .Case("v23", AArch64::Q23) + .Case("v24", AArch64::Q24) + .Case("v25", AArch64::Q25) + .Case("v26", AArch64::Q26) + .Case("v27", AArch64::Q27) + .Case("v28", AArch64::Q28) + .Case("v29", AArch64::Q29) + .Case("v30", AArch64::Q30) + .Case("v31", AArch64::Q31) + .Default(0); +} + +static bool isValidVectorKind(StringRef Name) { + return StringSwitch(Name.lower()) + .Case(".8b", true) + .Case(".16b", true) + .Case(".4h", true) + .Case(".8h", true) + .Case(".2s", true) + .Case(".4s", true) + .Case(".1d", true) + .Case(".2d", true) + .Case(".1q", true) + // Accept the width neutral ones, too, for verbose syntax. If those + // aren't used in the right places, the token operand won't match so + // all will work out. + .Case(".b", true) + .Case(".h", true) + .Case(".s", true) + .Case(".d", true) + // Needed for fp16 scalar pairwise reductions + .Case(".2h", true) + .Default(false); +} + +static void parseValidVectorKind(StringRef Name, unsigned &NumElements, + char &ElementKind) { + assert(isValidVectorKind(Name)); + + ElementKind = Name.lower()[Name.size() - 1]; + NumElements = 0; + + if (Name.size() == 2) + return; + + // Parse the lane count + Name = Name.drop_front(); + while (isdigit(Name.front())) { + NumElements = 10 * NumElements + (Name.front() - '0'); + Name = Name.drop_front(); + } +} + +bool AArch64AsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc, + SMLoc &EndLoc, unsigned int &ErrorCode) { + StartLoc = getLoc(); + RegNo = tryParseRegister(); + EndLoc = SMLoc::getFromPointer(getLoc().getPointer() - 1); + return (RegNo == (unsigned)-1); +} + +// Matches a register name or register alias previously defined by '.req' +unsigned AArch64AsmParser::matchRegisterNameAlias(StringRef Name, + bool isVector) { + unsigned RegNum = isVector ? matchVectorRegName(Name) + : MatchRegisterName(Name); + + if (RegNum == 0) { + // Check for aliases registered via .req. Canonicalize to lower case. + // That's more consistent since register names are case insensitive, and + // it's how the original entry was passed in from MC/MCParser/AsmParser. + auto Entry = RegisterReqs.find(Name.lower()); + if (Entry == RegisterReqs.end()) + return 0; + // set RegNum if the match is the right kind of register + if (isVector == Entry->getValue().first) + RegNum = Entry->getValue().second; + } + return RegNum; +} + +/// tryParseRegister - Try to parse a register name. The token must be an +/// Identifier when called, and if it is a register name the token is eaten and +/// the register is added to the operand list. +int AArch64AsmParser::tryParseRegister() { + MCAsmParser &Parser = getParser(); + const AsmToken &Tok = Parser.getTok(); + assert(Tok.is(AsmToken::Identifier) && "Token is not an Identifier"); + + std::string lowerCase = Tok.getString().lower(); + unsigned RegNum = matchRegisterNameAlias(lowerCase, false); + // Also handle a few aliases of registers. + if (RegNum == 0) + RegNum = StringSwitch(lowerCase) + .Case("fp", AArch64::FP) + .Case("lr", AArch64::LR) + .Case("x31", AArch64::XZR) + .Case("w31", AArch64::WZR) + .Default(0); + + if (RegNum == 0) + return -1; + + Parser.Lex(); // Eat identifier token. + return RegNum; +} + +/// tryMatchVectorRegister - Try to parse a vector register name with optional +/// kind specifier. If it is a register specifier, eat the token and return it. +int AArch64AsmParser::tryMatchVectorRegister(StringRef &Kind, bool expected) +{ + MCAsmParser &Parser = getParser(); + if (Parser.getTok().isNot(AsmToken::Identifier)) { + //TokError("vector register expected"); + return -1; + } + + StringRef Name = Parser.getTok().getString(); + // If there is a kind specifier, it's separated from the register name by + // a '.'. + size_t Start = 0, Next = Name.find('.'); + StringRef Head = Name.slice(Start, Next); + unsigned RegNum = matchRegisterNameAlias(Head, true); + + if (RegNum) { + if (Next != StringRef::npos) { + Kind = Name.slice(Next, StringRef::npos); + if (!isValidVectorKind(Kind)) { + //TokError("invalid vector kind qualifier"); + return -1; + } + } + Parser.Lex(); // Eat the register token. + return RegNum; + } + + //if (expected) + // TokError("vector register expected"); + return -1; +} + +/// tryParseSysCROperand - Try to parse a system instruction CR operand name. +AArch64AsmParser::OperandMatchResultTy +AArch64AsmParser::tryParseSysCROperand(OperandVector &Operands) +{ + MCAsmParser &Parser = getParser(); + SMLoc S = getLoc(); + + if (Parser.getTok().isNot(AsmToken::Identifier)) { + //Error(S, "Expected cN operand where 0 <= N <= 15"); + return MatchOperand_ParseFail; + } + + StringRef Tok = Parser.getTok().getIdentifier(); + if (Tok[0] != 'c' && Tok[0] != 'C') { + //Error(S, "Expected cN operand where 0 <= N <= 15"); + return MatchOperand_ParseFail; + } + + uint32_t CRNum; + bool BadNum = Tok.drop_front().getAsInteger(10, CRNum); + if (BadNum || CRNum > 15) { + //Error(S, "Expected cN operand where 0 <= N <= 15"); + return MatchOperand_ParseFail; + } + + Parser.Lex(); // Eat identifier token. + Operands.push_back( + AArch64Operand::CreateSysCR(CRNum, S, getLoc(), getContext())); + return MatchOperand_Success; +} + +/// tryParsePrefetch - Try to parse a prefetch operand. +AArch64AsmParser::OperandMatchResultTy +AArch64AsmParser::tryParsePrefetch(OperandVector &Operands) { + MCAsmParser &Parser = getParser(); + SMLoc S = getLoc(); + const AsmToken &Tok = Parser.getTok(); + // Either an identifier for named values or a 5-bit immediate. + bool Hash = Tok.is(AsmToken::Hash); + if (Hash || Tok.is(AsmToken::Integer)) { + if (Hash) + Parser.Lex(); // Eat hash token. + const MCExpr *ImmVal; + if (getParser().parseExpression(ImmVal)) + return MatchOperand_ParseFail; + + const MCConstantExpr *MCE = dyn_cast(ImmVal); + if (!MCE) { + //TokError("immediate value expected for prefetch operand"); + return MatchOperand_ParseFail; + } + unsigned prfop = MCE->getValue(); + if (prfop > 31) { + //TokError("prefetch operand out of range, [0,31] expected"); + return MatchOperand_ParseFail; + } + + bool Valid; + auto Mapper = AArch64PRFM::PRFMMapper(); + StringRef Name = + Mapper.toString(MCE->getValue(), getSTI().getFeatureBits(), Valid); + Operands.push_back(AArch64Operand::CreatePrefetch(prfop, Name, + S, getContext())); + return MatchOperand_Success; + } + + if (Tok.isNot(AsmToken::Identifier)) { + //TokError("pre-fetch hint expected"); + return MatchOperand_ParseFail; + } + + bool Valid; + auto Mapper = AArch64PRFM::PRFMMapper(); + unsigned prfop = + Mapper.fromString(Tok.getString(), getSTI().getFeatureBits(), Valid); + if (!Valid) { + //TokError("pre-fetch hint expected"); + return MatchOperand_ParseFail; + } + + Parser.Lex(); // Eat identifier token. + Operands.push_back(AArch64Operand::CreatePrefetch(prfop, Tok.getString(), + S, getContext())); + return MatchOperand_Success; +} + +/// tryParsePSBHint - Try to parse a PSB operand, mapped to Hint command +AArch64AsmParser::OperandMatchResultTy +AArch64AsmParser::tryParsePSBHint(OperandVector &Operands) { + MCAsmParser &Parser = getParser(); + SMLoc S = getLoc(); + const AsmToken &Tok = Parser.getTok(); + if (Tok.isNot(AsmToken::Identifier)) { + //TokError("invalid operand for instruction"); + return MatchOperand_ParseFail; + } + + bool Valid; + auto Mapper = AArch64PSBHint::PSBHintMapper(); + unsigned psbhint = + Mapper.fromString(Tok.getString(), getSTI().getFeatureBits(), Valid); + if (!Valid) { + //TokError("invalid operand for instruction"); + return MatchOperand_ParseFail; + } + + Parser.Lex(); // Eat identifier token. + Operands.push_back(AArch64Operand::CreatePSBHint(psbhint, Tok.getString(), + S, getContext())); + return MatchOperand_Success; +} + +/// tryParseAdrpLabel - Parse and validate a source label for the ADRP +/// instruction. +AArch64AsmParser::OperandMatchResultTy +AArch64AsmParser::tryParseAdrpLabel(OperandVector &Operands) { + MCAsmParser &Parser = getParser(); + SMLoc S = getLoc(); + const MCExpr *Expr; + + if (Parser.getTok().is(AsmToken::Hash)) { + Parser.Lex(); // Eat hash token. + } + + if (parseSymbolicImmVal(Expr)) + return MatchOperand_ParseFail; + + AArch64MCExpr::VariantKind ELFRefKind; + MCSymbolRefExpr::VariantKind DarwinRefKind; + int64_t Addend; + if (classifySymbolRef(Expr, ELFRefKind, DarwinRefKind, Addend)) { + if (DarwinRefKind == MCSymbolRefExpr::VK_None && + ELFRefKind == AArch64MCExpr::VK_INVALID) { + // No modifier was specified at all; this is the syntax for an ELF basic + // ADRP relocation (unfortunately). + Expr = + AArch64MCExpr::create(Expr, AArch64MCExpr::VK_ABS_PAGE, getContext()); + } else if ((DarwinRefKind == MCSymbolRefExpr::VK_GOTPAGE || + DarwinRefKind == MCSymbolRefExpr::VK_TLVPPAGE) && + Addend != 0) { + //Error(S, "gotpage label reference not allowed an addend"); + return MatchOperand_ParseFail; + } else if (DarwinRefKind != MCSymbolRefExpr::VK_PAGE && + DarwinRefKind != MCSymbolRefExpr::VK_GOTPAGE && + DarwinRefKind != MCSymbolRefExpr::VK_TLVPPAGE && + ELFRefKind != AArch64MCExpr::VK_GOT_PAGE && + ELFRefKind != AArch64MCExpr::VK_GOTTPREL_PAGE && + ELFRefKind != AArch64MCExpr::VK_TLSDESC_PAGE) { + // The operand must be an @page or @gotpage qualified symbolref. + //Error(S, "page or gotpage label reference expected"); + return MatchOperand_ParseFail; + } + } + + // We have either a label reference possibly with addend or an immediate. The + // addend is a raw value here. The linker will adjust it to only reference the + // page. + SMLoc E = SMLoc::getFromPointer(getLoc().getPointer() - 1); + Operands.push_back(AArch64Operand::CreateImm(Expr, S, E, getContext())); + + return MatchOperand_Success; +} + +/// tryParseAdrLabel - Parse and validate a source label for the ADR +/// instruction. +AArch64AsmParser::OperandMatchResultTy +AArch64AsmParser::tryParseAdrLabel(OperandVector &Operands) { + MCAsmParser &Parser = getParser(); + SMLoc S = getLoc(); + const MCExpr *Expr; + + if (Parser.getTok().is(AsmToken::Hash)) { + Parser.Lex(); // Eat hash token. + } + + if (getParser().parseExpression(Expr)) + return MatchOperand_ParseFail; + + SMLoc E = SMLoc::getFromPointer(getLoc().getPointer() - 1); + Operands.push_back(AArch64Operand::CreateImm(Expr, S, E, getContext())); + + return MatchOperand_Success; +} + +/// tryParseFPImm - A floating point immediate expression operand. +AArch64AsmParser::OperandMatchResultTy +AArch64AsmParser::tryParseFPImm(OperandVector &Operands) { + MCAsmParser &Parser = getParser(); + SMLoc S = getLoc(); + + bool Hash = false; + if (Parser.getTok().is(AsmToken::Hash)) { + Parser.Lex(); // Eat '#' + Hash = true; + } + + // Handle negation, as that still comes through as a separate token. + bool isNegative = false; + if (Parser.getTok().is(AsmToken::Minus)) { + isNegative = true; + Parser.Lex(); + } + const AsmToken &Tok = Parser.getTok(); + if (Tok.is(AsmToken::Real)) { + APFloat RealVal(APFloat::IEEEdouble, Tok.getString()); + if (isNegative) + RealVal.changeSign(); + + if (RealVal.bitcastToAPInt().getActiveBits() > 64) + return MatchOperand_ParseFail; + uint64_t IntVal = RealVal.bitcastToAPInt().getZExtValue(); + int Val = AArch64_AM::getFP64Imm(APInt(64, IntVal)); + Parser.Lex(); // Eat the token. + // Check for out of range values. As an exception, we let Zero through, + // as we handle that special case in post-processing before matching in + // order to use the zero register for it. + if (Val == -1 && !RealVal.isPosZero()) { + //TokError("expected compatible register or floating-point constant"); + return MatchOperand_ParseFail; + } + Operands.push_back(AArch64Operand::CreateFPImm(Val, S, getContext())); + return MatchOperand_Success; + } + if (Tok.is(AsmToken::Integer)) { + int64_t Val; + if (!isNegative && Tok.getString().startswith("0x")) { + bool valid; + Val = Tok.getIntVal(valid); + if (!valid) + return MatchOperand_ParseFail; + if (Val > 255 || Val < 0) { + //TokError("encoded floating point value out of range"); + return MatchOperand_ParseFail; + } + } else { + APFloat RealVal(APFloat::IEEEdouble, Tok.getString()); + if (RealVal.bitcastToAPInt().getActiveBits() > 64) + return MatchOperand_ParseFail; + uint64_t IntVal = RealVal.bitcastToAPInt().getZExtValue(); + // If we had a '-' in front, toggle the sign bit. + IntVal ^= (uint64_t)isNegative << 63; + Val = AArch64_AM::getFP64Imm(APInt(64, IntVal)); + } + Parser.Lex(); // Eat the token. + Operands.push_back(AArch64Operand::CreateFPImm(Val, S, getContext())); + return MatchOperand_Success; + } + + if (!Hash) + return MatchOperand_NoMatch; + + //TokError("invalid floating point immediate"); + return MatchOperand_ParseFail; +} + +/// tryParseAddSubImm - Parse ADD/SUB shifted immediate operand +AArch64AsmParser::OperandMatchResultTy +AArch64AsmParser::tryParseAddSubImm(OperandVector &Operands) { + MCAsmParser &Parser = getParser(); + SMLoc S = getLoc(); + + if (Parser.getTok().is(AsmToken::Hash)) + Parser.Lex(); // Eat '#' + else if (Parser.getTok().isNot(AsmToken::Integer)) + // Operand should start from # or should be integer, emit error otherwise. + return MatchOperand_NoMatch; + + const MCExpr *Imm; + if (parseSymbolicImmVal(Imm)) + return MatchOperand_ParseFail; + else if (Parser.getTok().isNot(AsmToken::Comma)) { + uint64_t ShiftAmount = 0; + const MCConstantExpr *MCE = dyn_cast(Imm); + if (MCE) { + int64_t Val = MCE->getValue(); + if (Val > 0xfff && (Val & 0xfff) == 0) { + Imm = MCConstantExpr::create(Val >> 12, getContext()); + ShiftAmount = 12; + } + } + SMLoc E = Parser.getTok().getLoc(); + Operands.push_back(AArch64Operand::CreateShiftedImm(Imm, ShiftAmount, S, E, + getContext())); + return MatchOperand_Success; + } + + // Eat ',' + Parser.Lex(); + + // The optional operand must be "lsl #N" where N is non-negative. + if (!Parser.getTok().is(AsmToken::Identifier) || + !Parser.getTok().getIdentifier().equals_lower("lsl")) { + //Error(Parser.getTok().getLoc(), "only 'lsl #+N' valid after immediate"); + return MatchOperand_ParseFail; + } + + // Eat 'lsl' + Parser.Lex(); + + if (Parser.getTok().is(AsmToken::Hash)) { + Parser.Lex(); + } + + if (Parser.getTok().isNot(AsmToken::Integer)) { + //Error(Parser.getTok().getLoc(), "only 'lsl #+N' valid after immediate"); + return MatchOperand_ParseFail; + } + + bool valid; + int64_t ShiftAmount = Parser.getTok().getIntVal(valid); + if (!valid) + return MatchOperand_ParseFail; + + if (ShiftAmount < 0) { + //Error(Parser.getTok().getLoc(), "positive shift amount required"); + return MatchOperand_ParseFail; + } + Parser.Lex(); // Eat the number + + SMLoc E = Parser.getTok().getLoc(); + Operands.push_back(AArch64Operand::CreateShiftedImm(Imm, ShiftAmount, + S, E, getContext())); + return MatchOperand_Success; +} + +/// parseCondCodeString - Parse a Condition Code string. +AArch64CC::CondCode AArch64AsmParser::parseCondCodeString(StringRef Cond) { + AArch64CC::CondCode CC = StringSwitch(Cond.lower()) + .Case("eq", AArch64CC::EQ) + .Case("ne", AArch64CC::NE) + .Case("cs", AArch64CC::HS) + .Case("hs", AArch64CC::HS) + .Case("cc", AArch64CC::LO) + .Case("lo", AArch64CC::LO) + .Case("mi", AArch64CC::MI) + .Case("pl", AArch64CC::PL) + .Case("vs", AArch64CC::VS) + .Case("vc", AArch64CC::VC) + .Case("hi", AArch64CC::HI) + .Case("ls", AArch64CC::LS) + .Case("ge", AArch64CC::GE) + .Case("lt", AArch64CC::LT) + .Case("gt", AArch64CC::GT) + .Case("le", AArch64CC::LE) + .Case("al", AArch64CC::AL) + .Case("nv", AArch64CC::NV) + .Default(AArch64CC::Invalid); + return CC; +} + +/// parseCondCode - Parse a Condition Code operand. +bool AArch64AsmParser::parseCondCode(OperandVector &Operands, + bool invertCondCode) { + MCAsmParser &Parser = getParser(); + SMLoc S = getLoc(); + const AsmToken &Tok = Parser.getTok(); + assert(Tok.is(AsmToken::Identifier) && "Token is not an Identifier"); + + StringRef Cond = Tok.getString(); + AArch64CC::CondCode CC = parseCondCodeString(Cond); + if (CC == AArch64CC::Invalid) + //return TokError("invalid condition code"); + return true; + Parser.Lex(); // Eat identifier token. + + if (invertCondCode) { + if (CC == AArch64CC::AL || CC == AArch64CC::NV) + //return TokError("condition codes AL and NV are invalid for this instruction"); + return true; + CC = AArch64CC::getInvertedCondCode(AArch64CC::CondCode(CC)); + } + + Operands.push_back( + AArch64Operand::CreateCondCode(CC, S, getLoc(), getContext())); + return false; +} + +/// tryParseOptionalShift - Some operands take an optional shift argument. Parse +/// them if present. +AArch64AsmParser::OperandMatchResultTy +AArch64AsmParser::tryParseOptionalShiftExtend(OperandVector &Operands) { + MCAsmParser &Parser = getParser(); + const AsmToken &Tok = Parser.getTok(); + std::string LowerID = Tok.getString().lower(); + AArch64_AM::ShiftExtendType ShOp = + StringSwitch(LowerID) + .Case("lsl", AArch64_AM::LSL) + .Case("lsr", AArch64_AM::LSR) + .Case("asr", AArch64_AM::ASR) + .Case("ror", AArch64_AM::ROR) + .Case("msl", AArch64_AM::MSL) + .Case("uxtb", AArch64_AM::UXTB) + .Case("uxth", AArch64_AM::UXTH) + .Case("uxtw", AArch64_AM::UXTW) + .Case("uxtx", AArch64_AM::UXTX) + .Case("sxtb", AArch64_AM::SXTB) + .Case("sxth", AArch64_AM::SXTH) + .Case("sxtw", AArch64_AM::SXTW) + .Case("sxtx", AArch64_AM::SXTX) + .Default(AArch64_AM::InvalidShiftExtend); + + if (ShOp == AArch64_AM::InvalidShiftExtend) + return MatchOperand_NoMatch; + + SMLoc S = Tok.getLoc(); + Parser.Lex(); + + bool Hash = getLexer().is(AsmToken::Hash); + if (!Hash && getLexer().isNot(AsmToken::Integer)) { + if (ShOp == AArch64_AM::LSL || ShOp == AArch64_AM::LSR || + ShOp == AArch64_AM::ASR || ShOp == AArch64_AM::ROR || + ShOp == AArch64_AM::MSL) { + // We expect a number here. + //TokError("expected #imm after shift specifier"); + return MatchOperand_ParseFail; + } + + // "extend" type operatoins don't need an immediate, #0 is implicit. + SMLoc E = SMLoc::getFromPointer(getLoc().getPointer() - 1); + Operands.push_back( + AArch64Operand::CreateShiftExtend(ShOp, 0, false, S, E, getContext())); + return MatchOperand_Success; + } + + if (Hash) + Parser.Lex(); // Eat the '#'. + + // Make sure we do actually have a number or a parenthesized expression. + SMLoc E = Parser.getTok().getLoc(); + if (!Parser.getTok().is(AsmToken::Integer) && + !Parser.getTok().is(AsmToken::LParen)) { + //Error(E, "expected integer shift amount"); + return MatchOperand_ParseFail; + } + + const MCExpr *ImmVal; + if (getParser().parseExpression(ImmVal)) + return MatchOperand_ParseFail; + + const MCConstantExpr *MCE = dyn_cast(ImmVal); + if (!MCE) { + //Error(E, "expected constant '#imm' after shift specifier"); + return MatchOperand_ParseFail; + } + + E = SMLoc::getFromPointer(getLoc().getPointer() - 1); + Operands.push_back(AArch64Operand::CreateShiftExtend( + ShOp, MCE->getValue(), true, S, E, getContext())); + return MatchOperand_Success; +} + +/// parseSysAlias - The IC, DC, AT, and TLBI instructions are simple aliases for +/// the SYS instruction. Parse them specially so that we create a SYS MCInst. +bool AArch64AsmParser::parseSysAlias(StringRef Name, SMLoc NameLoc, + OperandVector &Operands) +{ + if (Name.find('.') != StringRef::npos) + //return TokError("invalid operand"); + return true; + + Mnemonic = Name; + Operands.push_back( + AArch64Operand::CreateToken("sys", false, NameLoc, getContext())); + + MCAsmParser &Parser = getParser(); + const AsmToken &Tok = Parser.getTok(); + StringRef Op = Tok.getString(); + SMLoc S = Tok.getLoc(); + + const MCExpr *Expr = nullptr; + +#define SYS_ALIAS(op1, Cn, Cm, op2) \ + do { \ + Expr = MCConstantExpr::create(op1, getContext()); \ + Operands.push_back( \ + AArch64Operand::CreateImm(Expr, S, getLoc(), getContext())); \ + Operands.push_back( \ + AArch64Operand::CreateSysCR(Cn, S, getLoc(), getContext())); \ + Operands.push_back( \ + AArch64Operand::CreateSysCR(Cm, S, getLoc(), getContext())); \ + Expr = MCConstantExpr::create(op2, getContext()); \ + Operands.push_back( \ + AArch64Operand::CreateImm(Expr, S, getLoc(), getContext())); \ + } while (0) + + if (Mnemonic == "ic") { + if (!Op.compare_lower("ialluis")) { + // SYS #0, C7, C1, #0 + SYS_ALIAS(0, 7, 1, 0); + } else if (!Op.compare_lower("iallu")) { + // SYS #0, C7, C5, #0 + SYS_ALIAS(0, 7, 5, 0); + } else if (!Op.compare_lower("ivau")) { + // SYS #3, C7, C5, #1 + SYS_ALIAS(3, 7, 5, 1); + } else { + //return TokError("invalid operand for IC instruction"); + return true; + } + } else if (Mnemonic == "dc") { + if (!Op.compare_lower("zva")) { + // SYS #3, C7, C4, #1 + SYS_ALIAS(3, 7, 4, 1); + } else if (!Op.compare_lower("ivac")) { + // SYS #3, C7, C6, #1 + SYS_ALIAS(0, 7, 6, 1); + } else if (!Op.compare_lower("isw")) { + // SYS #0, C7, C6, #2 + SYS_ALIAS(0, 7, 6, 2); + } else if (!Op.compare_lower("cvac")) { + // SYS #3, C7, C10, #1 + SYS_ALIAS(3, 7, 10, 1); + } else if (!Op.compare_lower("csw")) { + // SYS #0, C7, C10, #2 + SYS_ALIAS(0, 7, 10, 2); + } else if (!Op.compare_lower("cvau")) { + // SYS #3, C7, C11, #1 + SYS_ALIAS(3, 7, 11, 1); + } else if (!Op.compare_lower("civac")) { + // SYS #3, C7, C14, #1 + SYS_ALIAS(3, 7, 14, 1); + } else if (!Op.compare_lower("cisw")) { + // SYS #0, C7, C14, #2 + SYS_ALIAS(0, 7, 14, 2); + } else if (!Op.compare_lower("cvap")) { + if (getSTI().getFeatureBits()[AArch64::HasV8_2aOps]) { + // SYS #3, C7, C12, #1 + SYS_ALIAS(3, 7, 12, 1); + } else { + //return TokError("DC CVAP requires ARMv8.2a"); + return true; + } + } else { + //return TokError("invalid operand for DC instruction"); + return true; + } + } else if (Mnemonic == "at") { + if (!Op.compare_lower("s1e1r")) { + // SYS #0, C7, C8, #0 + SYS_ALIAS(0, 7, 8, 0); + } else if (!Op.compare_lower("s1e2r")) { + // SYS #4, C7, C8, #0 + SYS_ALIAS(4, 7, 8, 0); + } else if (!Op.compare_lower("s1e3r")) { + // SYS #6, C7, C8, #0 + SYS_ALIAS(6, 7, 8, 0); + } else if (!Op.compare_lower("s1e1w")) { + // SYS #0, C7, C8, #1 + SYS_ALIAS(0, 7, 8, 1); + } else if (!Op.compare_lower("s1e2w")) { + // SYS #4, C7, C8, #1 + SYS_ALIAS(4, 7, 8, 1); + } else if (!Op.compare_lower("s1e3w")) { + // SYS #6, C7, C8, #1 + SYS_ALIAS(6, 7, 8, 1); + } else if (!Op.compare_lower("s1e0r")) { + // SYS #0, C7, C8, #3 + SYS_ALIAS(0, 7, 8, 2); + } else if (!Op.compare_lower("s1e0w")) { + // SYS #0, C7, C8, #3 + SYS_ALIAS(0, 7, 8, 3); + } else if (!Op.compare_lower("s12e1r")) { + // SYS #4, C7, C8, #4 + SYS_ALIAS(4, 7, 8, 4); + } else if (!Op.compare_lower("s12e1w")) { + // SYS #4, C7, C8, #5 + SYS_ALIAS(4, 7, 8, 5); + } else if (!Op.compare_lower("s12e0r")) { + // SYS #4, C7, C8, #6 + SYS_ALIAS(4, 7, 8, 6); + } else if (!Op.compare_lower("s12e0w")) { + // SYS #4, C7, C8, #7 + SYS_ALIAS(4, 7, 8, 7); + } else if (!Op.compare_lower("s1e1rp")) { + if (getSTI().getFeatureBits()[AArch64::HasV8_2aOps]) { + // SYS #0, C7, C9, #0 + SYS_ALIAS(0, 7, 9, 0); + } else { + //return TokError("AT S1E1RP requires ARMv8.2a"); + return true; + } + } else if (!Op.compare_lower("s1e1wp")) { + if (getSTI().getFeatureBits()[AArch64::HasV8_2aOps]) { + // SYS #0, C7, C9, #1 + SYS_ALIAS(0, 7, 9, 1); + } else { + //return TokError("AT S1E1WP requires ARMv8.2a"); + return true; + } + } else { + //return TokError("invalid operand for AT instruction"); + return true; + } + } else if (Mnemonic == "tlbi") { + if (!Op.compare_lower("vmalle1is")) { + // SYS #0, C8, C3, #0 + SYS_ALIAS(0, 8, 3, 0); + } else if (!Op.compare_lower("alle2is")) { + // SYS #4, C8, C3, #0 + SYS_ALIAS(4, 8, 3, 0); + } else if (!Op.compare_lower("alle3is")) { + // SYS #6, C8, C3, #0 + SYS_ALIAS(6, 8, 3, 0); + } else if (!Op.compare_lower("vae1is")) { + // SYS #0, C8, C3, #1 + SYS_ALIAS(0, 8, 3, 1); + } else if (!Op.compare_lower("vae2is")) { + // SYS #4, C8, C3, #1 + SYS_ALIAS(4, 8, 3, 1); + } else if (!Op.compare_lower("vae3is")) { + // SYS #6, C8, C3, #1 + SYS_ALIAS(6, 8, 3, 1); + } else if (!Op.compare_lower("aside1is")) { + // SYS #0, C8, C3, #2 + SYS_ALIAS(0, 8, 3, 2); + } else if (!Op.compare_lower("vaae1is")) { + // SYS #0, C8, C3, #3 + SYS_ALIAS(0, 8, 3, 3); + } else if (!Op.compare_lower("alle1is")) { + // SYS #4, C8, C3, #4 + SYS_ALIAS(4, 8, 3, 4); + } else if (!Op.compare_lower("vale1is")) { + // SYS #0, C8, C3, #5 + SYS_ALIAS(0, 8, 3, 5); + } else if (!Op.compare_lower("vaale1is")) { + // SYS #0, C8, C3, #7 + SYS_ALIAS(0, 8, 3, 7); + } else if (!Op.compare_lower("vmalle1")) { + // SYS #0, C8, C7, #0 + SYS_ALIAS(0, 8, 7, 0); + } else if (!Op.compare_lower("alle2")) { + // SYS #4, C8, C7, #0 + SYS_ALIAS(4, 8, 7, 0); + } else if (!Op.compare_lower("vale2is")) { + // SYS #4, C8, C3, #5 + SYS_ALIAS(4, 8, 3, 5); + } else if (!Op.compare_lower("vale3is")) { + // SYS #6, C8, C3, #5 + SYS_ALIAS(6, 8, 3, 5); + } else if (!Op.compare_lower("alle3")) { + // SYS #6, C8, C7, #0 + SYS_ALIAS(6, 8, 7, 0); + } else if (!Op.compare_lower("vae1")) { + // SYS #0, C8, C7, #1 + SYS_ALIAS(0, 8, 7, 1); + } else if (!Op.compare_lower("vae2")) { + // SYS #4, C8, C7, #1 + SYS_ALIAS(4, 8, 7, 1); + } else if (!Op.compare_lower("vae3")) { + // SYS #6, C8, C7, #1 + SYS_ALIAS(6, 8, 7, 1); + } else if (!Op.compare_lower("aside1")) { + // SYS #0, C8, C7, #2 + SYS_ALIAS(0, 8, 7, 2); + } else if (!Op.compare_lower("vaae1")) { + // SYS #0, C8, C7, #3 + SYS_ALIAS(0, 8, 7, 3); + } else if (!Op.compare_lower("alle1")) { + // SYS #4, C8, C7, #4 + SYS_ALIAS(4, 8, 7, 4); + } else if (!Op.compare_lower("vale1")) { + // SYS #0, C8, C7, #5 + SYS_ALIAS(0, 8, 7, 5); + } else if (!Op.compare_lower("vale2")) { + // SYS #4, C8, C7, #5 + SYS_ALIAS(4, 8, 7, 5); + } else if (!Op.compare_lower("vale3")) { + // SYS #6, C8, C7, #5 + SYS_ALIAS(6, 8, 7, 5); + } else if (!Op.compare_lower("vaale1")) { + // SYS #0, C8, C7, #7 + SYS_ALIAS(0, 8, 7, 7); + } else if (!Op.compare_lower("ipas2e1")) { + // SYS #4, C8, C4, #1 + SYS_ALIAS(4, 8, 4, 1); + } else if (!Op.compare_lower("ipas2le1")) { + // SYS #4, C8, C4, #5 + SYS_ALIAS(4, 8, 4, 5); + } else if (!Op.compare_lower("ipas2e1is")) { + // SYS #4, C8, C4, #1 + SYS_ALIAS(4, 8, 0, 1); + } else if (!Op.compare_lower("ipas2le1is")) { + // SYS #4, C8, C4, #5 + SYS_ALIAS(4, 8, 0, 5); + } else if (!Op.compare_lower("vmalls12e1")) { + // SYS #4, C8, C7, #6 + SYS_ALIAS(4, 8, 7, 6); + } else if (!Op.compare_lower("vmalls12e1is")) { + // SYS #4, C8, C3, #6 + SYS_ALIAS(4, 8, 3, 6); + } else { + //return TokError("invalid operand for TLBI instruction"); + return true; + } + } + +#undef SYS_ALIAS + + Parser.Lex(); // Eat operand. + + bool ExpectRegister = (Op.lower().find("all") == StringRef::npos); + bool HasRegister = false; + + // Check for the optional register operand. + if (getLexer().is(AsmToken::Comma)) { + Parser.Lex(); // Eat comma. + + if (Tok.isNot(AsmToken::Identifier) || parseRegister(Operands)) + //return TokError("expected register operand"); + return true; + + HasRegister = true; + } + + if (getLexer().isNot(AsmToken::EndOfStatement)) { + Parser.eatToEndOfStatement(); + //return TokError("unexpected token in argument list"); + return true; + } + + if (ExpectRegister && !HasRegister) { + //return TokError("specified " + Mnemonic + " op requires a register"); + return true; + } + else if (!ExpectRegister && HasRegister) { + //return TokError("specified " + Mnemonic + " op does not use a register"); + return true; + } + + Parser.Lex(); // Consume the EndOfStatement + return false; +} + +AArch64AsmParser::OperandMatchResultTy +AArch64AsmParser::tryParseBarrierOperand(OperandVector &Operands) +{ + MCAsmParser &Parser = getParser(); + const AsmToken &Tok = Parser.getTok(); + + // Can be either a #imm style literal or an option name + bool Hash = Tok.is(AsmToken::Hash); + if (Hash || Tok.is(AsmToken::Integer)) { + // Immediate operand. + if (Hash) + Parser.Lex(); // Eat the '#' + const MCExpr *ImmVal; + SMLoc ExprLoc = getLoc(); + if (getParser().parseExpression(ImmVal)) + return MatchOperand_ParseFail; + const MCConstantExpr *MCE = dyn_cast(ImmVal); + if (!MCE) { + //Error(ExprLoc, "immediate value expected for barrier operand"); + return MatchOperand_ParseFail; + } + if (MCE->getValue() < 0 || MCE->getValue() > 15) { + //Error(ExprLoc, "barrier operand out of range"); + return MatchOperand_ParseFail; + } + bool Valid; + auto Mapper = AArch64DB::DBarrierMapper(); + StringRef Name = + Mapper.toString(MCE->getValue(), getSTI().getFeatureBits(), Valid); + Operands.push_back( AArch64Operand::CreateBarrier(MCE->getValue(), Name, + ExprLoc, getContext())); + return MatchOperand_Success; + } + + if (Tok.isNot(AsmToken::Identifier)) { + //TokError("invalid operand for instruction"); + return MatchOperand_ParseFail; + } + + bool Valid; + auto Mapper = AArch64DB::DBarrierMapper(); + unsigned Opt = + Mapper.fromString(Tok.getString(), getSTI().getFeatureBits(), Valid); + if (!Valid) { + //TokError("invalid barrier option name"); + return MatchOperand_ParseFail; + } + + // The only valid named option for ISB is 'sy' + if (Mnemonic == "isb" && Opt != AArch64DB::SY) { + //TokError("'sy' or #imm operand expected"); + return MatchOperand_ParseFail; + } + + Operands.push_back( AArch64Operand::CreateBarrier(Opt, Tok.getString(), + getLoc(), getContext())); + Parser.Lex(); // Consume the option + + return MatchOperand_Success; +} + +AArch64AsmParser::OperandMatchResultTy +AArch64AsmParser::tryParseSysReg(OperandVector &Operands) +{ + MCAsmParser &Parser = getParser(); + const AsmToken &Tok = Parser.getTok(); + + if (Tok.isNot(AsmToken::Identifier)) + return MatchOperand_NoMatch; + + bool IsKnown; + auto MRSMapper = AArch64SysReg::MRSMapper(); + uint32_t MRSReg = MRSMapper.fromString(Tok.getString(), + getSTI().getFeatureBits(), IsKnown); + assert(IsKnown == (MRSReg != -1U) && + "register should be -1 if and only if it's unknown"); + + auto MSRMapper = AArch64SysReg::MSRMapper(); + uint32_t MSRReg = MSRMapper.fromString(Tok.getString(), + getSTI().getFeatureBits(), IsKnown); + assert(IsKnown == (MSRReg != -1U) && + "register should be -1 if and only if it's unknown"); + + auto PStateMapper = AArch64PState::PStateMapper(); + uint32_t PStateField = + PStateMapper.fromString(Tok.getString(), + getSTI().getFeatureBits(), IsKnown); + assert(IsKnown == (PStateField != -1U) && + "register should be -1 if and only if it's unknown"); + + Operands.push_back(AArch64Operand::CreateSysReg( + Tok.getString(), getLoc(), MRSReg, MSRReg, PStateField, getContext())); + Parser.Lex(); // Eat identifier + + return MatchOperand_Success; +} + +/// tryParseVectorRegister - Parse a vector register operand. +// return true on error +bool AArch64AsmParser::tryParseVectorRegister(OperandVector &Operands) +{ + MCAsmParser &Parser = getParser(); + if (Parser.getTok().isNot(AsmToken::Identifier)) + return true; + + SMLoc S = getLoc(); + // Check for a vector register specifier first. + StringRef Kind; + int64_t Reg = tryMatchVectorRegister(Kind, false); + if (Reg == -1) + return true; + Operands.push_back( + AArch64Operand::CreateReg(Reg, true, S, getLoc(), getContext())); + // If there was an explicit qualifier, that goes on as a literal text + // operand. + if (!Kind.empty()) + Operands.push_back( + AArch64Operand::CreateToken(Kind, false, S, getContext())); + + // If there is an index specifier following the register, parse that too. + if (Parser.getTok().is(AsmToken::LBrac)) { + SMLoc SIdx = getLoc(); + Parser.Lex(); // Eat left bracket token. + + const MCExpr *ImmVal; + if (getParser().parseExpression(ImmVal)) + return false; + const MCConstantExpr *MCE = dyn_cast(ImmVal); + if (!MCE) { + //TokError("immediate value expected for vector index"); + return true; + } + + SMLoc E = getLoc(); + if (Parser.getTok().isNot(AsmToken::RBrac)) { + //Error(E, "']' expected"); + return true; + } + + Parser.Lex(); // Eat right bracket token. + + Operands.push_back(AArch64Operand::CreateVectorIndex(MCE->getValue(), SIdx, + E, getContext())); + } + + return false; +} + +/// parseRegister - Parse a non-vector register operand. +// return true on error +bool AArch64AsmParser::parseRegister(OperandVector &Operands) +{ + MCAsmParser &Parser = getParser(); + SMLoc S = getLoc(); + // Try for a vector register. + if (!tryParseVectorRegister(Operands)) + return false; + + // Try for a scalar register. + int64_t Reg = tryParseRegister(); + if (Reg == -1) + return true; + Operands.push_back( + AArch64Operand::CreateReg(Reg, false, S, getLoc(), getContext())); + + // A small number of instructions (FMOVXDhighr, for example) have "[1]" + // as a string token in the instruction itself. + if (getLexer().getKind() == AsmToken::LBrac) { + SMLoc LBracS = getLoc(); + Parser.Lex(); + const AsmToken &Tok = Parser.getTok(); + if (Tok.is(AsmToken::Integer)) { + SMLoc IntS = getLoc(); + bool valid; + int64_t Val = Tok.getIntVal(valid); + if (!valid) + return true; + if (Val == 1) { + Parser.Lex(); + if (getLexer().getKind() == AsmToken::RBrac) { + SMLoc RBracS = getLoc(); + Parser.Lex(); + Operands.push_back( + AArch64Operand::CreateToken("[", false, LBracS, getContext())); + Operands.push_back( + AArch64Operand::CreateToken("1", false, IntS, getContext())); + Operands.push_back( + AArch64Operand::CreateToken("]", false, RBracS, getContext())); + return false; + } + } + } + } + + return false; +} + +bool AArch64AsmParser::parseSymbolicImmVal(const MCExpr *&ImmVal) +{ + MCAsmParser &Parser = getParser(); + bool HasELFModifier = false; + AArch64MCExpr::VariantKind RefKind; + + if (Parser.getTok().is(AsmToken::Colon)) { + Parser.Lex(); // Eat ':" + HasELFModifier = true; + + if (Parser.getTok().isNot(AsmToken::Identifier)) { + //Error(Parser.getTok().getLoc(), + // "expect relocation specifier in operand after ':'"); + return true; + } + + std::string LowerCase = Parser.getTok().getIdentifier().lower(); + RefKind = StringSwitch(LowerCase) + .Case("lo12", AArch64MCExpr::VK_LO12) + .Case("abs_g3", AArch64MCExpr::VK_ABS_G3) + .Case("abs_g2", AArch64MCExpr::VK_ABS_G2) + .Case("abs_g2_s", AArch64MCExpr::VK_ABS_G2_S) + .Case("abs_g2_nc", AArch64MCExpr::VK_ABS_G2_NC) + .Case("abs_g1", AArch64MCExpr::VK_ABS_G1) + .Case("abs_g1_s", AArch64MCExpr::VK_ABS_G1_S) + .Case("abs_g1_nc", AArch64MCExpr::VK_ABS_G1_NC) + .Case("abs_g0", AArch64MCExpr::VK_ABS_G0) + .Case("abs_g0_s", AArch64MCExpr::VK_ABS_G0_S) + .Case("abs_g0_nc", AArch64MCExpr::VK_ABS_G0_NC) + .Case("dtprel_g2", AArch64MCExpr::VK_DTPREL_G2) + .Case("dtprel_g1", AArch64MCExpr::VK_DTPREL_G1) + .Case("dtprel_g1_nc", AArch64MCExpr::VK_DTPREL_G1_NC) + .Case("dtprel_g0", AArch64MCExpr::VK_DTPREL_G0) + .Case("dtprel_g0_nc", AArch64MCExpr::VK_DTPREL_G0_NC) + .Case("dtprel_hi12", AArch64MCExpr::VK_DTPREL_HI12) + .Case("dtprel_lo12", AArch64MCExpr::VK_DTPREL_LO12) + .Case("dtprel_lo12_nc", AArch64MCExpr::VK_DTPREL_LO12_NC) + .Case("tprel_g2", AArch64MCExpr::VK_TPREL_G2) + .Case("tprel_g1", AArch64MCExpr::VK_TPREL_G1) + .Case("tprel_g1_nc", AArch64MCExpr::VK_TPREL_G1_NC) + .Case("tprel_g0", AArch64MCExpr::VK_TPREL_G0) + .Case("tprel_g0_nc", AArch64MCExpr::VK_TPREL_G0_NC) + .Case("tprel_hi12", AArch64MCExpr::VK_TPREL_HI12) + .Case("tprel_lo12", AArch64MCExpr::VK_TPREL_LO12) + .Case("tprel_lo12_nc", AArch64MCExpr::VK_TPREL_LO12_NC) + .Case("tlsdesc_lo12", AArch64MCExpr::VK_TLSDESC_LO12) + .Case("got", AArch64MCExpr::VK_GOT_PAGE) + .Case("got_lo12", AArch64MCExpr::VK_GOT_LO12) + .Case("gottprel", AArch64MCExpr::VK_GOTTPREL_PAGE) + .Case("gottprel_lo12", AArch64MCExpr::VK_GOTTPREL_LO12_NC) + .Case("gottprel_g1", AArch64MCExpr::VK_GOTTPREL_G1) + .Case("gottprel_g0_nc", AArch64MCExpr::VK_GOTTPREL_G0_NC) + .Case("tlsdesc", AArch64MCExpr::VK_TLSDESC_PAGE) + .Default(AArch64MCExpr::VK_INVALID); + + if (RefKind == AArch64MCExpr::VK_INVALID) { + //Error(Parser.getTok().getLoc(), + // "expect relocation specifier in operand after ':'"); + return true; + } + + Parser.Lex(); // Eat identifier + + if (Parser.getTok().isNot(AsmToken::Colon)) { + //Error(Parser.getTok().getLoc(), "expect ':' after relocation specifier"); + return true; + } + Parser.Lex(); // Eat ':' + } + + if (getParser().parseExpression(ImmVal)) + return true; + + if (HasELFModifier) + ImmVal = AArch64MCExpr::create(ImmVal, RefKind, getContext()); + + return false; +} + +/// parseVectorList - Parse a vector list operand for AdvSIMD instructions. +// return true on error +bool AArch64AsmParser::parseVectorList(OperandVector &Operands) +{ + MCAsmParser &Parser = getParser(); + assert(Parser.getTok().is(AsmToken::LCurly) && "Token is not a Left Bracket"); + SMLoc S = getLoc(); + Parser.Lex(); // Eat left bracket token. + StringRef Kind; + int64_t FirstReg = tryMatchVectorRegister(Kind, true); + if (FirstReg == -1) + return true; + int64_t PrevReg = FirstReg; + unsigned Count = 1; + + if (Parser.getTok().is(AsmToken::Minus)) { + Parser.Lex(); // Eat the minus. + + //SMLoc Loc = getLoc(); + StringRef NextKind; + int64_t Reg = tryMatchVectorRegister(NextKind, true); + if (Reg == -1) + return true; + // Any Kind suffices must match on all regs in the list. + if (Kind != NextKind) + //return Error(Loc, "mismatched register size suffix"); + return true; + + unsigned Space = (PrevReg < Reg) ? (Reg - PrevReg) : (Reg + 32 - PrevReg); + + if (Space == 0 || Space > 3) { + //return Error(Loc, "invalid number of vectors"); + return true; + } + + Count += Space; + } + else { + while (Parser.getTok().is(AsmToken::Comma)) { + Parser.Lex(); // Eat the comma token. + + //SMLoc Loc = getLoc(); + StringRef NextKind; + int64_t Reg = tryMatchVectorRegister(NextKind, true); + if (Reg == -1) + return true; + // Any Kind suffices must match on all regs in the list. + if (Kind != NextKind) + //return Error(Loc, "mismatched register size suffix"); + return true; + + // Registers must be incremental (with wraparound at 31) + if (getContext().getRegisterInfo()->getEncodingValue(Reg) != + (getContext().getRegisterInfo()->getEncodingValue(PrevReg) + 1) % 32) + //return Error(Loc, "registers must be sequential"); + return true; + + PrevReg = Reg; + ++Count; + } + } + + if (Parser.getTok().isNot(AsmToken::RCurly)) + //return Error(getLoc(), "'}' expected"); + return true; + Parser.Lex(); // Eat the '}' token. + + if (Count > 4) + //return Error(S, "invalid number of vectors"); + return true; + + unsigned NumElements = 0; + char ElementKind = 0; + if (!Kind.empty()) + parseValidVectorKind(Kind, NumElements, ElementKind); + + Operands.push_back(AArch64Operand::CreateVectorList( + FirstReg, Count, NumElements, ElementKind, S, getLoc(), getContext())); + + // If there is an index specifier following the list, parse that too. + if (Parser.getTok().is(AsmToken::LBrac)) { + SMLoc SIdx = getLoc(); + Parser.Lex(); // Eat left bracket token. + + const MCExpr *ImmVal; + if (getParser().parseExpression(ImmVal)) + return false; + const MCConstantExpr *MCE = dyn_cast(ImmVal); + if (!MCE) { + //TokError("immediate value expected for vector index"); + return false; + } + + SMLoc E = getLoc(); + if (Parser.getTok().isNot(AsmToken::RBrac)) { + //Error(E, "']' expected"); + return false; + } + + Parser.Lex(); // Eat right bracket token. + + Operands.push_back(AArch64Operand::CreateVectorIndex(MCE->getValue(), SIdx, + E, getContext())); + } + return false; +} + +AArch64AsmParser::OperandMatchResultTy +AArch64AsmParser::tryParseGPR64sp0Operand(OperandVector &Operands) +{ + MCAsmParser &Parser = getParser(); + const AsmToken &Tok = Parser.getTok(); + if (!Tok.is(AsmToken::Identifier)) + return MatchOperand_NoMatch; + + unsigned RegNum = matchRegisterNameAlias(Tok.getString().lower(), false); + + MCContext &Ctx = getContext(); + const MCRegisterInfo *RI = Ctx.getRegisterInfo(); + if (!RI->getRegClass(AArch64::GPR64spRegClassID).contains(RegNum)) + return MatchOperand_NoMatch; + + SMLoc S = getLoc(); + Parser.Lex(); // Eat register + + if (Parser.getTok().isNot(AsmToken::Comma)) { + Operands.push_back( + AArch64Operand::CreateReg(RegNum, false, S, getLoc(), Ctx)); + return MatchOperand_Success; + } + Parser.Lex(); // Eat comma. + + if (Parser.getTok().is(AsmToken::Hash)) + Parser.Lex(); // Eat hash + + if (Parser.getTok().isNot(AsmToken::Integer)) { + //Error(getLoc(), "index must be absent or #0"); + return MatchOperand_ParseFail; + } + + const MCExpr *ImmVal; + if (Parser.parseExpression(ImmVal) || !isa(ImmVal) || + cast(ImmVal)->getValue() != 0) { + //Error(getLoc(), "index must be absent or #0"); + return MatchOperand_ParseFail; + } + + Operands.push_back( + AArch64Operand::CreateReg(RegNum, false, S, getLoc(), Ctx)); + return MatchOperand_Success; +} + +/// parseOperand - Parse a arm instruction operand. For now this parses the +/// operand regardless of the mnemonic. +// return true on failure +bool AArch64AsmParser::parseOperand(OperandVector &Operands, bool isCondCode, + bool invertCondCode) +{ + MCAsmParser &Parser = getParser(); + // Check if the current operand has a custom associated parser, if so, try to + // custom parse the operand, or fallback to the general approach. + OperandMatchResultTy ResTy = MatchOperandParserImpl(Operands, Mnemonic); + if (ResTy == MatchOperand_Success) + return false; + // If there wasn't a custom match, try the generic matcher below. Otherwise, + // there was a match, but an error occurred, in which case, just return that + // the operand parsing failed. + if (ResTy == MatchOperand_ParseFail) + return true; + + // Nothing custom, so do general case parsing. + SMLoc S, E; + switch (getLexer().getKind()) { + default: { + SMLoc S = getLoc(); + const MCExpr *Expr; + if (parseSymbolicImmVal(Expr)) + //return Error(S, "invalid operand"); + return true; + + SMLoc E = SMLoc::getFromPointer(getLoc().getPointer() - 1); + Operands.push_back(AArch64Operand::CreateImm(Expr, S, E, getContext())); + return false; + } + case AsmToken::LBrac: { + SMLoc Loc = Parser.getTok().getLoc(); + Operands.push_back(AArch64Operand::CreateToken("[", false, Loc, + getContext())); + Parser.Lex(); // Eat '[' + + // There's no comma after a '[', so we can parse the next operand + // immediately. + return parseOperand(Operands, false, false); + } + case AsmToken::LCurly: + return parseVectorList(Operands); + case AsmToken::Identifier: { + // If we're expecting a Condition Code operand, then just parse that. + if (isCondCode) + return parseCondCode(Operands, invertCondCode); + + // If it's a register name, parse it. + if (!parseRegister(Operands)) + return false; + + // This could be an optional "shift" or "extend" operand. + OperandMatchResultTy GotShift = tryParseOptionalShiftExtend(Operands); + // We can only continue if no tokens were eaten. + if (GotShift != MatchOperand_NoMatch) + return GotShift; + + // This was not a register so parse other operands that start with an + // identifier (like labels) as expressions and create them as immediates. + const MCExpr *IdVal; + S = getLoc(); + if (getParser().parseExpression(IdVal)) + return true; + + E = SMLoc::getFromPointer(getLoc().getPointer() - 1); + Operands.push_back(AArch64Operand::CreateImm(IdVal, S, E, getContext())); + return false; + } + case AsmToken::Integer: + case AsmToken::Real: + case AsmToken::Hash: { + // #42 -> immediate. + S = getLoc(); + if (getLexer().is(AsmToken::Hash)) + Parser.Lex(); + + // Parse a negative sign + bool isNegative = false; + if (Parser.getTok().is(AsmToken::Minus)) { + isNegative = true; + // We need to consume this token only when we have a Real, otherwise + // we let parseSymbolicImmVal take care of it + if (Parser.getLexer().peekTok().is(AsmToken::Real)) + Parser.Lex(); + } + + // The only Real that should come through here is a literal #0.0 for + // the fcmp[e] r, #0.0 instructions. They expect raw token operands, + // so convert the value. + const AsmToken &Tok = Parser.getTok(); + if (Tok.is(AsmToken::Real)) { + APFloat RealVal(APFloat::IEEEdouble, Tok.getString()); + if (RealVal.bitcastToAPInt().getActiveBits() > 64) + return true; + uint64_t IntVal = RealVal.bitcastToAPInt().getZExtValue(); + if (Mnemonic != "fcmp" && Mnemonic != "fcmpe" && Mnemonic != "fcmeq" && + Mnemonic != "fcmge" && Mnemonic != "fcmgt" && Mnemonic != "fcmle" && + Mnemonic != "fcmlt") + //return TokError("unexpected floating point literal"); + return true; + else if (IntVal != 0 || isNegative) + //return TokError("expected floating-point constant #0.0"); + return true; + Parser.Lex(); // Eat the token. + + Operands.push_back( + AArch64Operand::CreateToken("#0", false, S, getContext())); + Operands.push_back( + AArch64Operand::CreateToken(".0", false, S, getContext())); + return false; + } + + const MCExpr *ImmVal; + if (parseSymbolicImmVal(ImmVal)) + return true; + + E = SMLoc::getFromPointer(getLoc().getPointer() - 1); + Operands.push_back(AArch64Operand::CreateImm(ImmVal, S, E, getContext())); + return false; + } + case AsmToken::Equal: { + SMLoc Loc = Parser.getTok().getLoc(); + if (Mnemonic != "ldr") // only parse for ldr pseudo (e.g. ldr r0, =val) + //return Error(Loc, "unexpected token in operand"); + return true; + Parser.Lex(); // Eat '=' + const MCExpr *SubExprVal; + if (getParser().parseExpression(SubExprVal)) + return true; + + if (Operands.size() < 2 || + !static_cast(*Operands[1]).isReg()) + //return Error(Loc, "Only valid when first operand is register"); + return true; + + bool IsXReg = + AArch64MCRegisterClasses[AArch64::GPR64allRegClassID].contains( + Operands[1]->getReg()); + + MCContext& Ctx = getContext(); + E = SMLoc::getFromPointer(Loc.getPointer() - 1); + // If the op is an imm and can be fit into a mov, then replace ldr with mov. + if (isa(SubExprVal)) { + uint64_t Imm = (cast(SubExprVal))->getValue(); + uint32_t ShiftAmt = 0, MaxShiftAmt = IsXReg ? 48 : 16; + while(Imm > 0xFFFF && countTrailingZeros(Imm) >= 16) { + ShiftAmt += 16; + Imm >>= 16; + } + if (ShiftAmt <= MaxShiftAmt && Imm <= 0xFFFF) { + Operands[0] = AArch64Operand::CreateToken("movz", false, Loc, Ctx); + Operands.push_back(AArch64Operand::CreateImm( + MCConstantExpr::create(Imm, Ctx), S, E, Ctx)); + if (ShiftAmt) + Operands.push_back(AArch64Operand::CreateShiftExtend(AArch64_AM::LSL, + ShiftAmt, true, S, E, Ctx)); + return false; + } + APInt Simm = APInt(64, Imm << ShiftAmt); + // check if the immediate is an unsigned or signed 32-bit int for W regs + if (!IsXReg && !(Simm.isIntN(32) || Simm.isSignedIntN(32))) + //return Error(Loc, "Immediate too large for register"); + return true; + } + // If it is a label or an imm that cannot fit in a movz, put it into CP. + const MCExpr *CPLoc = + getTargetStreamer().addConstantPoolEntry(SubExprVal, IsXReg ? 8 : 4, Loc); + Operands.push_back(AArch64Operand::CreateImm(CPLoc, S, E, Ctx)); + return false; + } + } +} + +/// ParseInstruction - Parse an AArch64 instruction mnemonic followed by its +/// operands. +// return true on error +bool AArch64AsmParser::ParseInstruction(ParseInstructionInfo &Info, + StringRef Name, SMLoc NameLoc, + OperandVector &Operands, unsigned int &ErrorCode) +{ + MCAsmParser &Parser = getParser(); + Name = StringSwitch(Name.lower()) + .Case("beq", "b.eq") + .Case("bne", "b.ne") + .Case("bhs", "b.hs") + .Case("bcs", "b.cs") + .Case("blo", "b.lo") + .Case("bcc", "b.cc") + .Case("bmi", "b.mi") + .Case("bpl", "b.pl") + .Case("bvs", "b.vs") + .Case("bvc", "b.vc") + .Case("bhi", "b.hi") + .Case("bls", "b.ls") + .Case("bge", "b.ge") + .Case("blt", "b.lt") + .Case("bgt", "b.gt") + .Case("ble", "b.le") + .Case("bal", "b.al") + .Case("bnv", "b.nv") + .Default(Name); + + // First check for the AArch64-specific .req directive. + if (Parser.getTok().is(AsmToken::Identifier) && + Parser.getTok().getIdentifier() == ".req") { + parseDirectiveReq(Name, NameLoc); + // We always return 'error' for this, as we're done with this + // statement and don't need to match the 'instruction." + return true; + } + + // Create the leading tokens for the mnemonic, split by '.' characters. + size_t Start = 0, Next = Name.find('.'); + StringRef Head = Name.slice(Start, Next); + + // IC, DC, AT, and TLBI instructions are aliases for the SYS instruction. + if (Head == "ic" || Head == "dc" || Head == "at" || Head == "tlbi") { + bool IsError = parseSysAlias(Head, NameLoc, Operands); + if (IsError && getLexer().isNot(AsmToken::EndOfStatement)) + Parser.eatToEndOfStatement(); + return IsError; + } + + Operands.push_back( + AArch64Operand::CreateToken(Head, false, NameLoc, getContext())); + Mnemonic = Head; + + // Handle condition codes for a branch mnemonic + if (Head == "b" && Next != StringRef::npos) { + Start = Next; + Next = Name.find('.', Start + 1); + Head = Name.slice(Start + 1, Next); + + SMLoc SuffixLoc = SMLoc::getFromPointer(NameLoc.getPointer() + + (Head.data() - Name.data())); + AArch64CC::CondCode CC = parseCondCodeString(Head); + if (CC == AArch64CC::Invalid) + //return Error(SuffixLoc, "invalid condition code"); + return true; + Operands.push_back( + AArch64Operand::CreateToken(".", true, SuffixLoc, getContext())); + Operands.push_back( + AArch64Operand::CreateCondCode(CC, NameLoc, NameLoc, getContext())); + } + + // Add the remaining tokens in the mnemonic. + while (Next != StringRef::npos) { + Start = Next; + Next = Name.find('.', Start + 1); + Head = Name.slice(Start, Next); + SMLoc SuffixLoc = SMLoc::getFromPointer(NameLoc.getPointer() + + (Head.data() - Name.data()) + 1); + Operands.push_back( + AArch64Operand::CreateToken(Head, true, SuffixLoc, getContext())); + } + + // Conditional compare instructions have a Condition Code operand, which needs + // to be parsed and an immediate operand created. + bool condCodeFourthOperand = + (Head == "ccmp" || Head == "ccmn" || Head == "fccmp" || + Head == "fccmpe" || Head == "fcsel" || Head == "csel" || + Head == "csinc" || Head == "csinv" || Head == "csneg"); + + // These instructions are aliases to some of the conditional select + // instructions. However, the condition code is inverted in the aliased + // instruction. + // + // FIXME: Is this the correct way to handle these? Or should the parser + // generate the aliased instructions directly? + bool condCodeSecondOperand = (Head == "cset" || Head == "csetm"); + bool condCodeThirdOperand = + (Head == "cinc" || Head == "cinv" || Head == "cneg"); + + // Read the remaining operands. + if (getLexer().isNot(AsmToken::EndOfStatement)) { + // Read the first operand. + if (parseOperand(Operands, false, false)) { + Parser.eatToEndOfStatement(); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return true; + } + + unsigned N = 2; + while (getLexer().is(AsmToken::Comma)) { + Parser.Lex(); // Eat the comma. + + // Parse and remember the operand. + if (parseOperand(Operands, (N == 4 && condCodeFourthOperand) || + (N == 3 && condCodeThirdOperand) || + (N == 2 && condCodeSecondOperand), + condCodeSecondOperand || condCodeThirdOperand)) { + Parser.eatToEndOfStatement(); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return true; + } + + // After successfully parsing some operands there are two special cases to + // consider (i.e. notional operands not separated by commas). Both are due + // to memory specifiers: + // + An RBrac will end an address for load/store/prefetch + // + An '!' will indicate a pre-indexed operation. + // + // It's someone else's responsibility to make sure these tokens are sane + // in the given context! + if (Parser.getTok().is(AsmToken::RBrac)) { + SMLoc Loc = Parser.getTok().getLoc(); + Operands.push_back(AArch64Operand::CreateToken("]", false, Loc, + getContext())); + Parser.Lex(); + } + + if (Parser.getTok().is(AsmToken::Exclaim)) { + SMLoc Loc = Parser.getTok().getLoc(); + Operands.push_back(AArch64Operand::CreateToken("!", false, Loc, + getContext())); + Parser.Lex(); + } + + ++N; + } + } + + if (getLexer().isNot(AsmToken::EndOfStatement)) { + //SMLoc Loc = Parser.getTok().getLoc(); + Parser.eatToEndOfStatement(); + //return Error(Loc, "unexpected token in argument list"); + return true; + } + + Parser.Lex(); // Consume the EndOfStatement + return false; +} + +// FIXME: This entire function is a giant hack to provide us with decent +// operand range validation/diagnostics until TableGen/MC can be extended +// to support autogeneration of this kind of validation. +bool AArch64AsmParser::validateInstruction(MCInst &Inst, + SmallVectorImpl &Loc) +{ + const MCRegisterInfo *RI = getContext().getRegisterInfo(); + // Check for indexed addressing modes w/ the base register being the + // same as a destination/source register or pair load where + // the Rt == Rt2. All of those are undefined behaviour. + switch (Inst.getOpcode()) { + case AArch64::LDPSWpre: + case AArch64::LDPWpost: + case AArch64::LDPWpre: + case AArch64::LDPXpost: + case AArch64::LDPXpre: { + unsigned Rt = Inst.getOperand(1).getReg(); + unsigned Rt2 = Inst.getOperand(2).getReg(); + unsigned Rn = Inst.getOperand(3).getReg(); + if (RI->isSubRegisterEq(Rn, Rt)) + //return Error(Loc[0], "unpredictable LDP instruction, writeback base " + // "is also a destination"); + return true; + if (RI->isSubRegisterEq(Rn, Rt2)) + //return Error(Loc[1], "unpredictable LDP instruction, writeback base " + // "is also a destination"); + return true; + // FALLTHROUGH + } + case AArch64::LDPDi: + case AArch64::LDPQi: + case AArch64::LDPSi: + case AArch64::LDPSWi: + case AArch64::LDPWi: + case AArch64::LDPXi: { + unsigned Rt = Inst.getOperand(0).getReg(); + unsigned Rt2 = Inst.getOperand(1).getReg(); + if (Rt == Rt2) + //return Error(Loc[1], "unpredictable LDP instruction, Rt2==Rt"); + return true; + break; + } + case AArch64::LDPDpost: + case AArch64::LDPDpre: + case AArch64::LDPQpost: + case AArch64::LDPQpre: + case AArch64::LDPSpost: + case AArch64::LDPSpre: + case AArch64::LDPSWpost: { + unsigned Rt = Inst.getOperand(1).getReg(); + unsigned Rt2 = Inst.getOperand(2).getReg(); + if (Rt == Rt2) + //return Error(Loc[1], "unpredictable LDP instruction, Rt2==Rt"); + return true; + break; + } + case AArch64::STPDpost: + case AArch64::STPDpre: + case AArch64::STPQpost: + case AArch64::STPQpre: + case AArch64::STPSpost: + case AArch64::STPSpre: + case AArch64::STPWpost: + case AArch64::STPWpre: + case AArch64::STPXpost: + case AArch64::STPXpre: { + unsigned Rt = Inst.getOperand(1).getReg(); + unsigned Rt2 = Inst.getOperand(2).getReg(); + unsigned Rn = Inst.getOperand(3).getReg(); + if (RI->isSubRegisterEq(Rn, Rt)) + //return Error(Loc[0], "unpredictable STP instruction, writeback base " + // "is also a source"); + return true; + if (RI->isSubRegisterEq(Rn, Rt2)) + //return Error(Loc[1], "unpredictable STP instruction, writeback base " + // "is also a source"); + return true; + break; + } + case AArch64::LDRBBpre: + case AArch64::LDRBpre: + case AArch64::LDRHHpre: + case AArch64::LDRHpre: + case AArch64::LDRSBWpre: + case AArch64::LDRSBXpre: + case AArch64::LDRSHWpre: + case AArch64::LDRSHXpre: + case AArch64::LDRSWpre: + case AArch64::LDRWpre: + case AArch64::LDRXpre: + case AArch64::LDRBBpost: + case AArch64::LDRBpost: + case AArch64::LDRHHpost: + case AArch64::LDRHpost: + case AArch64::LDRSBWpost: + case AArch64::LDRSBXpost: + case AArch64::LDRSHWpost: + case AArch64::LDRSHXpost: + case AArch64::LDRSWpost: + case AArch64::LDRWpost: + case AArch64::LDRXpost: { + unsigned Rt = Inst.getOperand(1).getReg(); + unsigned Rn = Inst.getOperand(2).getReg(); + if (RI->isSubRegisterEq(Rn, Rt)) + //return Error(Loc[0], "unpredictable LDR instruction, writeback base " + // "is also a source"); + return true; + break; + } + case AArch64::STRBBpost: + case AArch64::STRBpost: + case AArch64::STRHHpost: + case AArch64::STRHpost: + case AArch64::STRWpost: + case AArch64::STRXpost: + case AArch64::STRBBpre: + case AArch64::STRBpre: + case AArch64::STRHHpre: + case AArch64::STRHpre: + case AArch64::STRWpre: + case AArch64::STRXpre: { + unsigned Rt = Inst.getOperand(1).getReg(); + unsigned Rn = Inst.getOperand(2).getReg(); + if (RI->isSubRegisterEq(Rn, Rt)) + //return Error(Loc[0], "unpredictable STR instruction, writeback base " + // "is also a source"); + return true; + break; + } + } + + // Now check immediate ranges. Separate from the above as there is overlap + // in the instructions being checked and this keeps the nested conditionals + // to a minimum. + switch (Inst.getOpcode()) { + case AArch64::ADDSWri: + case AArch64::ADDSXri: + case AArch64::ADDWri: + case AArch64::ADDXri: + case AArch64::SUBSWri: + case AArch64::SUBSXri: + case AArch64::SUBWri: + case AArch64::SUBXri: { + // Annoyingly we can't do this in the isAddSubImm predicate, so there is + // some slight duplication here. + if (Inst.getOperand(2).isExpr()) { + const MCExpr *Expr = Inst.getOperand(2).getExpr(); + AArch64MCExpr::VariantKind ELFRefKind; + MCSymbolRefExpr::VariantKind DarwinRefKind; + int64_t Addend; + if (!classifySymbolRef(Expr, ELFRefKind, DarwinRefKind, Addend)) { + //return Error(Loc[2], "invalid immediate expression"); + return true; + } + + // Only allow these with ADDXri. + if ((DarwinRefKind == MCSymbolRefExpr::VK_PAGEOFF || + DarwinRefKind == MCSymbolRefExpr::VK_TLVPPAGEOFF) && + Inst.getOpcode() == AArch64::ADDXri) + return false; + + // Only allow these with ADDXri/ADDWri + if ((ELFRefKind == AArch64MCExpr::VK_LO12 || + ELFRefKind == AArch64MCExpr::VK_DTPREL_HI12 || + ELFRefKind == AArch64MCExpr::VK_DTPREL_LO12 || + ELFRefKind == AArch64MCExpr::VK_DTPREL_LO12_NC || + ELFRefKind == AArch64MCExpr::VK_TPREL_HI12 || + ELFRefKind == AArch64MCExpr::VK_TPREL_LO12 || + ELFRefKind == AArch64MCExpr::VK_TPREL_LO12_NC || + ELFRefKind == AArch64MCExpr::VK_TLSDESC_LO12) && + (Inst.getOpcode() == AArch64::ADDXri || + Inst.getOpcode() == AArch64::ADDWri)) + return false; + + // Don't allow expressions in the immediate field otherwise + //return Error(Loc[2], "invalid immediate expression"); + return true; + } + return false; + } + default: + return false; + } +} + +bool AArch64AsmParser::showMatchError(SMLoc Loc, unsigned ErrCode) +{ + switch (ErrCode) { + case Match_MissingFeature: + //return Error(Loc, + // "instruction requires a CPU feature not currently enabled"); + return true; + case Match_InvalidOperand: + //return Error(Loc, "invalid operand for instruction"); + return true; + case Match_InvalidSuffix: + //return Error(Loc, "invalid type suffix for instruction"); + return true; + case Match_InvalidCondCode: + //return Error(Loc, "expected AArch64 condition code"); + return true; + case Match_AddSubRegExtendSmall: + //return Error(Loc, + // "expected '[su]xt[bhw]' or 'lsl' with optional integer in range [0, 4]"); + return true; + case Match_AddSubRegExtendLarge: + //return Error(Loc, + // "expected 'sxtx' 'uxtx' or 'lsl' with optional integer in range [0, 4]"); + return true; + case Match_AddSubSecondSource: + //return Error(Loc, + // "expected compatible register, symbol or integer in range [0, 4095]"); + return true; + case Match_LogicalSecondSource: + //return Error(Loc, "expected compatible register or logical immediate"); + return true; + case Match_InvalidMovImm32Shift: + //return Error(Loc, "expected 'lsl' with optional integer 0 or 16"); + return true; + case Match_InvalidMovImm64Shift: + //return Error(Loc, "expected 'lsl' with optional integer 0, 16, 32 or 48"); + return true; + case Match_AddSubRegShift32: + //return Error(Loc, + // "expected 'lsl', 'lsr' or 'asr' with optional integer in range [0, 31]"); + return true; + case Match_AddSubRegShift64: + //return Error(Loc, + // "expected 'lsl', 'lsr' or 'asr' with optional integer in range [0, 63]"); + return true; + case Match_InvalidFPImm: + //return Error(Loc, + // "expected compatible register or floating-point constant"); + return true; + case Match_InvalidMemoryIndexedSImm9: + //return Error(Loc, "index must be an integer in range [-256, 255]."); + return true; + case Match_InvalidMemoryIndexed4SImm7: + //return Error(Loc, "index must be a multiple of 4 in range [-256, 252]."); + return true; + case Match_InvalidMemoryIndexed8SImm7: + //return Error(Loc, "index must be a multiple of 8 in range [-512, 504]."); + return true; + case Match_InvalidMemoryIndexed16SImm7: + //return Error(Loc, "index must be a multiple of 16 in range [-1024, 1008]."); + return true; + case Match_InvalidMemoryWExtend8: + //return Error(Loc, + // "expected 'uxtw' or 'sxtw' with optional shift of #0"); + return true; + case Match_InvalidMemoryWExtend16: + //return Error(Loc, + // "expected 'uxtw' or 'sxtw' with optional shift of #0 or #1"); + return true; + case Match_InvalidMemoryWExtend32: + //return Error(Loc, + // "expected 'uxtw' or 'sxtw' with optional shift of #0 or #2"); + return true; + case Match_InvalidMemoryWExtend64: + //return Error(Loc, + // "expected 'uxtw' or 'sxtw' with optional shift of #0 or #3"); + return true; + case Match_InvalidMemoryWExtend128: + //return Error(Loc, + // "expected 'uxtw' or 'sxtw' with optional shift of #0 or #4"); + return true; + case Match_InvalidMemoryXExtend8: + //return Error(Loc, + // "expected 'lsl' or 'sxtx' with optional shift of #0"); + return true; + case Match_InvalidMemoryXExtend16: + //return Error(Loc, + // "expected 'lsl' or 'sxtx' with optional shift of #0 or #1"); + return true; + case Match_InvalidMemoryXExtend32: + //return Error(Loc, + // "expected 'lsl' or 'sxtx' with optional shift of #0 or #2"); + return true; + case Match_InvalidMemoryXExtend64: + //return Error(Loc, + // "expected 'lsl' or 'sxtx' with optional shift of #0 or #3"); + return true; + case Match_InvalidMemoryXExtend128: + //return Error(Loc, + // "expected 'lsl' or 'sxtx' with optional shift of #0 or #4"); + return true; + case Match_InvalidMemoryIndexed1: + //return Error(Loc, "index must be an integer in range [0, 4095]."); + return true; + case Match_InvalidMemoryIndexed2: + //return Error(Loc, "index must be a multiple of 2 in range [0, 8190]."); + return true; + case Match_InvalidMemoryIndexed4: + //return Error(Loc, "index must be a multiple of 4 in range [0, 16380]."); + return true; + case Match_InvalidMemoryIndexed8: + //return Error(Loc, "index must be a multiple of 8 in range [0, 32760]."); + return true; + case Match_InvalidMemoryIndexed16: + //return Error(Loc, "index must be a multiple of 16 in range [0, 65520]."); + return true; + case Match_InvalidImm0_1: + //return Error(Loc, "immediate must be an integer in range [0, 1]."); + return true; + case Match_InvalidImm0_7: + //return Error(Loc, "immediate must be an integer in range [0, 7]."); + return true; + case Match_InvalidImm0_15: + //return Error(Loc, "immediate must be an integer in range [0, 15]."); + return true; + case Match_InvalidImm0_31: + //return Error(Loc, "immediate must be an integer in range [0, 31]."); + return true; + case Match_InvalidImm0_63: + //return Error(Loc, "immediate must be an integer in range [0, 63]."); + return true; + case Match_InvalidImm0_127: + //return Error(Loc, "immediate must be an integer in range [0, 127]."); + return true; + case Match_InvalidImm0_65535: + //return Error(Loc, "immediate must be an integer in range [0, 65535]."); + return true; + case Match_InvalidImm1_8: + //return Error(Loc, "immediate must be an integer in range [1, 8]."); + return true; + case Match_InvalidImm1_16: + //return Error(Loc, "immediate must be an integer in range [1, 16]."); + return true; + case Match_InvalidImm1_32: + //return Error(Loc, "immediate must be an integer in range [1, 32]."); + return true; + case Match_InvalidImm1_64: + //return Error(Loc, "immediate must be an integer in range [1, 64]."); + return true; + case Match_InvalidIndex1: + //return Error(Loc, "expected lane specifier '[1]'"); + return true; + case Match_InvalidIndexB: + //return Error(Loc, "vector lane must be an integer in range [0, 15]."); + return true; + case Match_InvalidIndexH: + //return Error(Loc, "vector lane must be an integer in range [0, 7]."); + return true; + case Match_InvalidIndexS: + //return Error(Loc, "vector lane must be an integer in range [0, 3]."); + return true; + case Match_InvalidIndexD: + //return Error(Loc, "vector lane must be an integer in range [0, 1]."); + return true; + case Match_InvalidLabel: + //return Error(Loc, "expected label or encodable integer pc offset"); + return true; + case Match_MRS: + //return Error(Loc, "expected readable system register"); + return true; + case Match_MSR: + //return Error(Loc, "expected writable system register or pstate"); + return true; + case Match_MnemonicFail: + //return Error(Loc, "unrecognized instruction mnemonic"); + return true; + default: + llvm_unreachable("unexpected error code!"); + } +} + +static const char *getSubtargetFeatureName(uint64_t Val); + +// return True on error +bool AArch64AsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, + OperandVector &Operands, + MCStreamer &Out, + uint64_t &ErrorInfo, + bool MatchingInlineAsm, unsigned int &ErrorCode, uint64_t &Address) +{ + assert(!Operands.empty() && "Unexpect empty operand list!"); + AArch64Operand &Op = static_cast(*Operands[0]); + assert(Op.isToken() && "Leading operand should always be a mnemonic!"); + + StringRef Tok = Op.getToken(); + unsigned NumOperands = Operands.size(); + + if (NumOperands == 4 && Tok == "lsl") { + AArch64Operand &Op2 = static_cast(*Operands[2]); + AArch64Operand &Op3 = static_cast(*Operands[3]); + if (Op2.isReg() && Op3.isImm()) { + const MCConstantExpr *Op3CE = dyn_cast(Op3.getImm()); + if (Op3CE) { + uint64_t Op3Val = Op3CE->getValue(); + uint64_t NewOp3Val = 0; + uint64_t NewOp4Val = 0; + if (AArch64MCRegisterClasses[AArch64::GPR32allRegClassID].contains( + Op2.getReg())) { + NewOp3Val = (32 - Op3Val) & 0x1f; + NewOp4Val = 31 - Op3Val; + } else { + NewOp3Val = (64 - Op3Val) & 0x3f; + NewOp4Val = 63 - Op3Val; + } + + const MCExpr *NewOp3 = MCConstantExpr::create(NewOp3Val, getContext()); + const MCExpr *NewOp4 = MCConstantExpr::create(NewOp4Val, getContext()); + + Operands[0] = AArch64Operand::CreateToken( + "ubfm", false, Op.getStartLoc(), getContext()); + Operands.push_back(AArch64Operand::CreateImm( + NewOp4, Op3.getStartLoc(), Op3.getEndLoc(), getContext())); + Operands[3] = AArch64Operand::CreateImm(NewOp3, Op3.getStartLoc(), + Op3.getEndLoc(), getContext()); + } + } + } else if (NumOperands == 4 && Tok == "bfc") { + // FIXME: Horrible hack to handle BFC->BFM alias. + AArch64Operand &Op1 = static_cast(*Operands[1]); + AArch64Operand LSBOp = static_cast(*Operands[2]); + AArch64Operand WidthOp = static_cast(*Operands[3]); + + if (Op1.isReg() && LSBOp.isImm() && WidthOp.isImm()) { + const MCConstantExpr *LSBCE = dyn_cast(LSBOp.getImm()); + const MCConstantExpr *WidthCE = dyn_cast(WidthOp.getImm()); + + if (LSBCE && WidthCE) { + uint64_t LSB = LSBCE->getValue(); + uint64_t Width = WidthCE->getValue(); + + uint64_t RegWidth = 0; + if (AArch64MCRegisterClasses[AArch64::GPR64allRegClassID].contains( + Op1.getReg())) + RegWidth = 64; + else + RegWidth = 32; + + if (LSB >= RegWidth) { + //return Error(LSBOp.getStartLoc(), + // "expected integer in range [0, 31]"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return true; + } + if (Width < 1 || Width > RegWidth) { + //return Error(WidthOp.getStartLoc(), + // "expected integer in range [1, 32]"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return true; + } + + uint64_t ImmR = 0; + if (RegWidth == 32) + ImmR = (32 - LSB) & 0x1f; + else + ImmR = (64 - LSB) & 0x3f; + + uint64_t ImmS = Width - 1; + + if (ImmR != 0 && ImmS >= ImmR) { + //return Error(WidthOp.getStartLoc(), + // "requested insert overflows register"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return true; + } + + const MCExpr *ImmRExpr = MCConstantExpr::create(ImmR, getContext()); + const MCExpr *ImmSExpr = MCConstantExpr::create(ImmS, getContext()); + Operands[0] = AArch64Operand::CreateToken( + "bfm", false, Op.getStartLoc(), getContext()); + Operands[2] = AArch64Operand::CreateReg( + RegWidth == 32 ? AArch64::WZR : AArch64::XZR, false, SMLoc(), + SMLoc(), getContext()); + Operands[3] = AArch64Operand::CreateImm( + ImmRExpr, LSBOp.getStartLoc(), LSBOp.getEndLoc(), getContext()); + Operands.emplace_back( + AArch64Operand::CreateImm(ImmSExpr, WidthOp.getStartLoc(), + WidthOp.getEndLoc(), getContext())); + } + } + } else if (NumOperands == 5) { + // FIXME: Horrible hack to handle the BFI -> BFM, SBFIZ->SBFM, and + // UBFIZ -> UBFM aliases. + if (Tok == "bfi" || Tok == "sbfiz" || Tok == "ubfiz") { + AArch64Operand &Op1 = static_cast(*Operands[1]); + AArch64Operand &Op3 = static_cast(*Operands[3]); + AArch64Operand &Op4 = static_cast(*Operands[4]); + + if (Op1.isReg() && Op3.isImm() && Op4.isImm()) { + const MCConstantExpr *Op3CE = dyn_cast(Op3.getImm()); + const MCConstantExpr *Op4CE = dyn_cast(Op4.getImm()); + + if (Op3CE && Op4CE) { + uint64_t Op3Val = Op3CE->getValue(); + uint64_t Op4Val = Op4CE->getValue(); + + uint64_t RegWidth = 0; + if (AArch64MCRegisterClasses[AArch64::GPR64allRegClassID].contains( + Op1.getReg())) + RegWidth = 64; + else + RegWidth = 32; + + if (Op3Val >= RegWidth) { + //return Error(Op3.getStartLoc(), + // "expected integer in range [0, 31]"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return true; + } + if (Op4Val < 1 || Op4Val > RegWidth) { + //return Error(Op4.getStartLoc(), + // "expected integer in range [1, 32]"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return true; + } + + uint64_t NewOp3Val = 0; + if (RegWidth == 32) + NewOp3Val = (32 - Op3Val) & 0x1f; + else + NewOp3Val = (64 - Op3Val) & 0x3f; + + uint64_t NewOp4Val = Op4Val - 1; + + if (NewOp3Val != 0 && NewOp4Val >= NewOp3Val) { + //return Error(Op4.getStartLoc(), + // "requested insert overflows register"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return true; + } + + const MCExpr *NewOp3 = + MCConstantExpr::create(NewOp3Val, getContext()); + const MCExpr *NewOp4 = + MCConstantExpr::create(NewOp4Val, getContext()); + Operands[3] = AArch64Operand::CreateImm( + NewOp3, Op3.getStartLoc(), Op3.getEndLoc(), getContext()); + Operands[4] = AArch64Operand::CreateImm( + NewOp4, Op4.getStartLoc(), Op4.getEndLoc(), getContext()); + if (Tok == "bfi") + Operands[0] = AArch64Operand::CreateToken( + "bfm", false, Op.getStartLoc(), getContext()); + else if (Tok == "sbfiz") + Operands[0] = AArch64Operand::CreateToken( + "sbfm", false, Op.getStartLoc(), getContext()); + else if (Tok == "ubfiz") + Operands[0] = AArch64Operand::CreateToken( + "ubfm", false, Op.getStartLoc(), getContext()); + else + llvm_unreachable("No valid mnemonic for alias?"); + } + } + + // FIXME: Horrible hack to handle the BFXIL->BFM, SBFX->SBFM, and + // UBFX -> UBFM aliases. + } else if (NumOperands == 5 && + (Tok == "bfxil" || Tok == "sbfx" || Tok == "ubfx")) { + AArch64Operand &Op1 = static_cast(*Operands[1]); + AArch64Operand &Op3 = static_cast(*Operands[3]); + AArch64Operand &Op4 = static_cast(*Operands[4]); + + if (Op1.isReg() && Op3.isImm() && Op4.isImm()) { + const MCConstantExpr *Op3CE = dyn_cast(Op3.getImm()); + const MCConstantExpr *Op4CE = dyn_cast(Op4.getImm()); + + if (Op3CE && Op4CE) { + uint64_t Op3Val = Op3CE->getValue(); + uint64_t Op4Val = Op4CE->getValue(); + + uint64_t RegWidth = 0; + if (AArch64MCRegisterClasses[AArch64::GPR64allRegClassID].contains( + Op1.getReg())) + RegWidth = 64; + else + RegWidth = 32; + + if (Op3Val >= RegWidth) { + // TODO: save ErrorCode + //return Error(Op3.getStartLoc(), + // "expected integer in range [0, 31]"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return true; + } + if (Op4Val < 1 || Op4Val > RegWidth) { + // TODO: save ErrorCode + //return Error(Op4.getStartLoc(), + // "expected integer in range [1, 32]"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return true; + } + + uint64_t NewOp4Val = Op3Val + Op4Val - 1; + + if (NewOp4Val >= RegWidth || NewOp4Val < Op3Val) { + // TODO: save ErrorCode + //return Error(Op4.getStartLoc(), + // "requested extract overflows register"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return true; + } + + const MCExpr *NewOp4 = + MCConstantExpr::create(NewOp4Val, getContext()); + Operands[4] = AArch64Operand::CreateImm( + NewOp4, Op4.getStartLoc(), Op4.getEndLoc(), getContext()); + if (Tok == "bfxil") + Operands[0] = AArch64Operand::CreateToken( + "bfm", false, Op.getStartLoc(), getContext()); + else if (Tok == "sbfx") + Operands[0] = AArch64Operand::CreateToken( + "sbfm", false, Op.getStartLoc(), getContext()); + else if (Tok == "ubfx") + Operands[0] = AArch64Operand::CreateToken( + "ubfm", false, Op.getStartLoc(), getContext()); + else + llvm_unreachable("No valid mnemonic for alias?"); + } + } + } + } + // FIXME: Horrible hack for sxtw and uxtw with Wn src and Xd dst operands. + // InstAlias can't quite handle this since the reg classes aren't + // subclasses. + if (NumOperands == 3 && (Tok == "sxtw" || Tok == "uxtw")) { + // The source register can be Wn here, but the matcher expects a + // GPR64. Twiddle it here if necessary. + AArch64Operand &Op = static_cast(*Operands[2]); + if (Op.isReg()) { + unsigned Reg = getXRegFromWReg(Op.getReg()); + Operands[2] = AArch64Operand::CreateReg(Reg, false, Op.getStartLoc(), + Op.getEndLoc(), getContext()); + } + } + // FIXME: Likewise for sxt[bh] with a Xd dst operand + else if (NumOperands == 3 && (Tok == "sxtb" || Tok == "sxth")) { + AArch64Operand &Op = static_cast(*Operands[1]); + if (Op.isReg() && + AArch64MCRegisterClasses[AArch64::GPR64allRegClassID].contains( + Op.getReg())) { + // The source register can be Wn here, but the matcher expects a + // GPR64. Twiddle it here if necessary. + AArch64Operand &Op = static_cast(*Operands[2]); + if (Op.isReg()) { + unsigned Reg = getXRegFromWReg(Op.getReg()); + Operands[2] = AArch64Operand::CreateReg(Reg, false, Op.getStartLoc(), + Op.getEndLoc(), getContext()); + } + } + } + // FIXME: Likewise for uxt[bh] with a Xd dst operand + else if (NumOperands == 3 && (Tok == "uxtb" || Tok == "uxth")) { + AArch64Operand &Op = static_cast(*Operands[1]); + if (Op.isReg() && + AArch64MCRegisterClasses[AArch64::GPR64allRegClassID].contains( + Op.getReg())) { + // The source register can be Wn here, but the matcher expects a + // GPR32. Twiddle it here if necessary. + AArch64Operand &Op = static_cast(*Operands[1]); + if (Op.isReg()) { + unsigned Reg = getWRegFromXReg(Op.getReg()); + Operands[1] = AArch64Operand::CreateReg(Reg, false, Op.getStartLoc(), + Op.getEndLoc(), getContext()); + } + } + } + + // Yet another horrible hack to handle FMOV Rd, #0.0 using [WX]ZR. + if (NumOperands == 3 && Tok == "fmov") { + AArch64Operand &RegOp = static_cast(*Operands[1]); + AArch64Operand &ImmOp = static_cast(*Operands[2]); + if (RegOp.isReg() && ImmOp.isFPImm() && ImmOp.getFPImm() == (unsigned)-1) { + unsigned zreg = + !AArch64MCRegisterClasses[AArch64::FPR64RegClassID].contains( + RegOp.getReg()) + ? AArch64::WZR + : AArch64::XZR; + Operands[2] = AArch64Operand::CreateReg(zreg, false, Op.getStartLoc(), + Op.getEndLoc(), getContext()); + } + } + + MCInst Inst(Address); + // First try to match against the secondary set of tables containing the + // short-form NEON instructions (e.g. "fadd.2s v0, v1, v2"). + unsigned MatchResult = + MatchInstructionImpl(Operands, Inst, ErrorInfo, MatchingInlineAsm, 1); + + // If that fails, try against the alternate table containing long-form NEON: + // "fadd v0.2s, v1.2s, v2.2s" + if (MatchResult != Match_Success) { + // But first, save the short-form match result: we can use it in case the + // long-form match also fails. + auto ShortFormNEONErrorInfo = ErrorInfo; + auto ShortFormNEONMatchResult = MatchResult; + + MatchResult = + MatchInstructionImpl(Operands, Inst, ErrorInfo, MatchingInlineAsm, 0); + + // Now, both matches failed, and the long-form match failed on the mnemonic + // suffix token operand. The short-form match failure is probably more + // relevant: use it instead. + if (MatchResult == Match_InvalidOperand && ErrorInfo == 1 && + Operands.size() > 1 && ((AArch64Operand &)*Operands[1]).isToken() && + ((AArch64Operand &)*Operands[1]).isTokenSuffix()) { + MatchResult = ShortFormNEONMatchResult; + ErrorInfo = ShortFormNEONErrorInfo; + } + } + + // save the error code + ErrorCode = MatchResult; + + switch (MatchResult) { + case Match_Success: { + // Perform range checking and other semantic validations + SmallVector OperandLocs; + NumOperands = Operands.size(); + for (unsigned i = 1; i < NumOperands; ++i) + OperandLocs.push_back(Operands[i]->getStartLoc()); + if (validateInstruction(Inst, OperandLocs)) + return true; + + Inst.setLoc(IDLoc); + Out.EmitInstruction(Inst, getSTI(), ErrorCode); + if (ErrorCode == 0) { + Address = Inst.getAddress(); // Keystone update address + return false; + } else + return true; + } + case Match_MissingFeature: { + assert(ErrorInfo && "Unknown missing feature!"); + // Special case the error message for the very common case where only + // a single subtarget feature is missing (neon, e.g.). + std::string Msg = "instruction requires:"; + uint64_t Mask = 1; + for (unsigned i = 0; i < (sizeof(ErrorInfo)*8-1); ++i) { + if (ErrorInfo & Mask) { + Msg += " "; + Msg += getSubtargetFeatureName(ErrorInfo & Mask); + } + Mask <<= 1; + } + //return Error(IDLoc, Msg); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return true; + } + case Match_MnemonicFail: + return showMatchError(IDLoc, MatchResult); + case Match_InvalidOperand: { + SMLoc ErrorLoc = IDLoc; + + if (ErrorInfo != ~0ULL) { + if (ErrorInfo >= Operands.size()) { + //return Error(IDLoc, "too few operands for instruction"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return true; + } + + ErrorLoc = ((AArch64Operand &)*Operands[ErrorInfo]).getStartLoc(); + if (ErrorLoc == SMLoc()) + ErrorLoc = IDLoc; + } + // If the match failed on a suffix token operand, tweak the diagnostic + // accordingly. + if (((AArch64Operand &)*Operands[ErrorInfo]).isToken() && + ((AArch64Operand &)*Operands[ErrorInfo]).isTokenSuffix()) + MatchResult = Match_InvalidSuffix; + + return showMatchError(ErrorLoc, MatchResult); + } + case Match_InvalidMemoryIndexed1: + case Match_InvalidMemoryIndexed2: + case Match_InvalidMemoryIndexed4: + case Match_InvalidMemoryIndexed8: + case Match_InvalidMemoryIndexed16: + case Match_InvalidCondCode: + case Match_AddSubRegExtendSmall: + case Match_AddSubRegExtendLarge: + case Match_AddSubSecondSource: + case Match_LogicalSecondSource: + case Match_AddSubRegShift32: + case Match_AddSubRegShift64: + case Match_InvalidMovImm32Shift: + case Match_InvalidMovImm64Shift: + case Match_InvalidFPImm: + case Match_InvalidMemoryWExtend8: + case Match_InvalidMemoryWExtend16: + case Match_InvalidMemoryWExtend32: + case Match_InvalidMemoryWExtend64: + case Match_InvalidMemoryWExtend128: + case Match_InvalidMemoryXExtend8: + case Match_InvalidMemoryXExtend16: + case Match_InvalidMemoryXExtend32: + case Match_InvalidMemoryXExtend64: + case Match_InvalidMemoryXExtend128: + case Match_InvalidMemoryIndexed4SImm7: + case Match_InvalidMemoryIndexed8SImm7: + case Match_InvalidMemoryIndexed16SImm7: + case Match_InvalidMemoryIndexedSImm9: + case Match_InvalidImm0_1: + case Match_InvalidImm0_7: + case Match_InvalidImm0_15: + case Match_InvalidImm0_31: + case Match_InvalidImm0_63: + case Match_InvalidImm0_127: + case Match_InvalidImm0_65535: + case Match_InvalidImm1_8: + case Match_InvalidImm1_16: + case Match_InvalidImm1_32: + case Match_InvalidImm1_64: + case Match_InvalidIndex1: + case Match_InvalidIndexB: + case Match_InvalidIndexH: + case Match_InvalidIndexS: + case Match_InvalidIndexD: + case Match_InvalidLabel: + case Match_MSR: + case Match_MRS: { + if (ErrorInfo >= Operands.size()) { + //return Error(IDLoc, "too few operands for instruction"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return true; + } + // Any time we get here, there's nothing fancy to do. Just get the + // operand SMLoc and display the diagnostic. + SMLoc ErrorLoc = ((AArch64Operand &)*Operands[ErrorInfo]).getStartLoc(); + if (ErrorLoc == SMLoc()) + ErrorLoc = IDLoc; + return showMatchError(ErrorLoc, MatchResult); + } + } + + llvm_unreachable("Implement any new match types added!"); +} + +/// ParseDirective parses the arm specific directives +bool AArch64AsmParser::ParseDirective(AsmToken DirectiveID) { + const MCObjectFileInfo::Environment Format = + getContext().getObjectFileInfo()->getObjectFileType(); + bool IsMachO = Format == MCObjectFileInfo::IsMachO; + bool IsCOFF = Format == MCObjectFileInfo::IsCOFF; + + StringRef IDVal = DirectiveID.getIdentifier(); + SMLoc Loc = DirectiveID.getLoc(); + if (IDVal == ".hword") + return parseDirectiveWord(2, Loc); + if (IDVal == ".word") + return parseDirectiveWord(4, Loc); + if (IDVal == ".xword") + return parseDirectiveWord(8, Loc); + if (IDVal == ".tlsdesccall") + return parseDirectiveTLSDescCall(Loc); + if (IDVal == ".ltorg" || IDVal == ".pool") + return parseDirectiveLtorg(Loc); + if (IDVal == ".unreq") + return parseDirectiveUnreq(Loc); + + if (!IsMachO && !IsCOFF) { + if (IDVal == ".inst") + return parseDirectiveInst(Loc); + } + + return parseDirectiveLOH(IDVal, Loc); +} + +/// parseDirectiveWord +/// ::= .word [ expression (, expression)* ] +bool AArch64AsmParser::parseDirectiveWord(unsigned Size, SMLoc L) +{ + MCAsmParser &Parser = getParser(); + if (getLexer().isNot(AsmToken::EndOfStatement)) { + for (;;) { + const MCExpr *Value; + if (getParser().parseExpression(Value)) + return true; + + getParser().getStreamer().EmitValue(Value, Size, L); + + if (getLexer().is(AsmToken::EndOfStatement)) + break; + + // FIXME: Improve diagnostic. + if (getLexer().isNot(AsmToken::Comma)) + //return Error(L, "unexpected token in directive"); + return true; + Parser.Lex(); + } + } + + Parser.Lex(); + return false; +} + +/// parseDirectiveInst +/// ::= .inst opcode [, ...] +bool AArch64AsmParser::parseDirectiveInst(SMLoc Loc) +{ + MCAsmParser &Parser = getParser(); + if (getLexer().is(AsmToken::EndOfStatement)) { + Parser.eatToEndOfStatement(); + //Error(Loc, "expected expression following directive"); + return false; + } + + for (;;) { + const MCExpr *Expr; + + if (getParser().parseExpression(Expr)) { + //Error(Loc, "expected expression"); + return false; + } + + const MCConstantExpr *Value = dyn_cast_or_null(Expr); + if (!Value) { + //Error(Loc, "expected constant expression"); + return false; + } + + getTargetStreamer().emitInst(Value->getValue()); + + if (getLexer().is(AsmToken::EndOfStatement)) + break; + + if (getLexer().isNot(AsmToken::Comma)) { + //Error(Loc, "unexpected token in directive"); + return false; + } + + Parser.Lex(); // Eat comma. + } + + Parser.Lex(); + return false; +} + +// parseDirectiveTLSDescCall: +// ::= .tlsdesccall symbol +bool AArch64AsmParser::parseDirectiveTLSDescCall(SMLoc L) { + StringRef Name; + if (getParser().parseIdentifier(Name)) + //return Error(L, "expected symbol after directive"); + return true; + + MCSymbol *Sym = getContext().getOrCreateSymbol(Name); + const MCExpr *Expr = MCSymbolRefExpr::create(Sym, getContext()); + Expr = AArch64MCExpr::create(Expr, AArch64MCExpr::VK_TLSDESC, getContext()); + + MCInst Inst; + Inst.setOpcode(AArch64::TLSDESCCALL); + Inst.addOperand(MCOperand::createExpr(Expr)); + + unsigned int KsError; + getParser().getStreamer().EmitInstruction(Inst, getSTI(), KsError); + return false; +} + +/// ::= .loh label1, ..., labelN +/// The number of arguments depends on the loh identifier. +bool AArch64AsmParser::parseDirectiveLOH(StringRef IDVal, SMLoc Loc) +{ + if (IDVal != MCLOHDirectiveName()) + return true; + MCLOHType Kind; + if (getParser().getTok().isNot(AsmToken::Identifier)) { + if (getParser().getTok().isNot(AsmToken::Integer)) + //return TokError("expected an identifier or a number in directive"); + return true; + // We successfully get a numeric value for the identifier. + // Check if it is valid. + bool valid; + int64_t Id = getParser().getTok().getIntVal(valid); + if (!valid) + return true; + if (Id <= -1U && !isValidMCLOHType(Id)) + //return TokError("invalid numeric identifier in directive"); + return true; + Kind = (MCLOHType)Id; + } else { + StringRef Name = getTok().getIdentifier(); + // We successfully parse an identifier. + // Check if it is a recognized one. + int Id = MCLOHNameToId(Name); + + if (Id == -1) + //return TokError("invalid identifier in directive"); + return true; + Kind = (MCLOHType)Id; + } + // Consume the identifier. + Lex(); + // Get the number of arguments of this LOH. + int NbArgs = MCLOHIdToNbArgs(Kind); + + assert(NbArgs != -1 && "Invalid number of arguments"); + + SmallVector Args; + for (int Idx = 0; Idx < NbArgs; ++Idx) { + StringRef Name; + if (getParser().parseIdentifier(Name)) + //return TokError("expected identifier in directive"); + return true; + Args.push_back(getContext().getOrCreateSymbol(Name)); + + if (Idx + 1 == NbArgs) + break; + if (getLexer().isNot(AsmToken::Comma)) + //return TokError("unexpected token in '" + Twine(IDVal) + "' directive"); + return true; + Lex(); + } + if (getLexer().isNot(AsmToken::EndOfStatement)) + //return TokError("unexpected token in '" + Twine(IDVal) + "' directive"); + return true; + + getStreamer().EmitLOHDirective((MCLOHType)Kind, Args); + return false; +} + +/// parseDirectiveLtorg +/// ::= .ltorg | .pool +bool AArch64AsmParser::parseDirectiveLtorg(SMLoc L) { + getTargetStreamer().emitCurrentConstantPool(); + return false; +} + +/// parseDirectiveReq +/// ::= name .req registername +bool AArch64AsmParser::parseDirectiveReq(StringRef Name, SMLoc L) +{ + MCAsmParser &Parser = getParser(); + Parser.Lex(); // Eat the '.req' token. + //SMLoc SRegLoc = getLoc(); + unsigned RegNum = tryParseRegister(); + bool IsVector = false; + + if (RegNum == static_cast(-1)) { + StringRef Kind; + RegNum = tryMatchVectorRegister(Kind, false); + if (!Kind.empty()) { + //Error(SRegLoc, "vector register without type specifier expected"); + return false; + } + IsVector = true; + } + + if (RegNum == static_cast(-1)) { + Parser.eatToEndOfStatement(); + //Error(SRegLoc, "register name or alias expected"); + return false; + } + + // Shouldn't be anything else. + if (Parser.getTok().isNot(AsmToken::EndOfStatement)) { + //Error(Parser.getTok().getLoc(), "unexpected input in .req directive"); + Parser.eatToEndOfStatement(); + return false; + } + + Parser.Lex(); // Consume the EndOfStatement + + auto pair = std::make_pair(IsVector, RegNum); + if (RegisterReqs.insert(std::make_pair(Name, pair)).first->second != pair) + Warning(L, "ignoring redefinition of register alias '" + Name + "'"); + + return true; +} + +/// parseDirectiveUneq +/// ::= .unreq registername +bool AArch64AsmParser::parseDirectiveUnreq(SMLoc L) +{ + MCAsmParser &Parser = getParser(); + if (Parser.getTok().isNot(AsmToken::Identifier)) { + //Error(Parser.getTok().getLoc(), "unexpected input in .unreq directive."); + Parser.eatToEndOfStatement(); + return false; + } + RegisterReqs.erase(Parser.getTok().getIdentifier().lower()); + Parser.Lex(); // Eat the identifier. + return false; +} + +bool +AArch64AsmParser::classifySymbolRef(const MCExpr *Expr, + AArch64MCExpr::VariantKind &ELFRefKind, + MCSymbolRefExpr::VariantKind &DarwinRefKind, + int64_t &Addend) { + ELFRefKind = AArch64MCExpr::VK_INVALID; + DarwinRefKind = MCSymbolRefExpr::VK_None; + Addend = 0; + + if (const AArch64MCExpr *AE = dyn_cast(Expr)) { + ELFRefKind = AE->getKind(); + Expr = AE->getSubExpr(); + } + + const MCSymbolRefExpr *SE = dyn_cast(Expr); + if (SE) { + // It's a simple symbol reference with no addend. + DarwinRefKind = SE->getKind(); + return true; + } + + const MCBinaryExpr *BE = dyn_cast(Expr); + if (!BE) + return false; + + SE = dyn_cast(BE->getLHS()); + if (!SE) + return false; + DarwinRefKind = SE->getKind(); + + if (BE->getOpcode() != MCBinaryExpr::Add && + BE->getOpcode() != MCBinaryExpr::Sub) + return false; + + // See if the addend is is a constant, otherwise there's more going + // on here than we can deal with. + auto AddendExpr = dyn_cast(BE->getRHS()); + if (!AddendExpr) + return false; + + Addend = AddendExpr->getValue(); + if (BE->getOpcode() == MCBinaryExpr::Sub) + Addend = -Addend; + + // It's some symbol reference + a constant addend, but really + // shouldn't use both Darwin and ELF syntax. + return ELFRefKind == AArch64MCExpr::VK_INVALID || + DarwinRefKind == MCSymbolRefExpr::VK_None; +} + +/// Force static initialization. +extern "C" void LLVMInitializeAArch64AsmParser() { + RegisterMCAsmParser X(TheAArch64leTarget); + RegisterMCAsmParser Y(TheAArch64beTarget); + RegisterMCAsmParser Z(TheARM64Target); +} + +#define GET_REGISTER_MATCHER +#define GET_SUBTARGET_FEATURE_NAME +#define GET_MATCHER_IMPLEMENTATION +#include "AArch64GenAsmMatcher.inc" + +// Define this matcher function after the auto-generated include so we +// have the match class enum definitions. +unsigned AArch64AsmParser::validateTargetOperandClass(MCParsedAsmOperand &AsmOp, + unsigned Kind) { + AArch64Operand &Op = static_cast(AsmOp); + // If the kind is a token for a literal immediate, check if our asm + // operand matches. This is for InstAliases which have a fixed-value + // immediate in the syntax. + int64_t ExpectedVal; + switch (Kind) { + default: + return Match_InvalidOperand; + case MCK__35_0: + ExpectedVal = 0; + break; + case MCK__35_1: + ExpectedVal = 1; + break; + case MCK__35_12: + ExpectedVal = 12; + break; + case MCK__35_16: + ExpectedVal = 16; + break; + case MCK__35_2: + ExpectedVal = 2; + break; + case MCK__35_24: + ExpectedVal = 24; + break; + case MCK__35_3: + ExpectedVal = 3; + break; + case MCK__35_32: + ExpectedVal = 32; + break; + case MCK__35_4: + ExpectedVal = 4; + break; + case MCK__35_48: + ExpectedVal = 48; + break; + case MCK__35_6: + ExpectedVal = 6; + break; + case MCK__35_64: + ExpectedVal = 64; + break; + case MCK__35_8: + ExpectedVal = 8; + break; + } + if (!Op.isImm()) + return Match_InvalidOperand; + const MCConstantExpr *CE = dyn_cast(Op.getImm()); + if (!CE) + return Match_InvalidOperand; + if (CE->getValue() == ExpectedVal) + return Match_Success; + return Match_InvalidOperand; +} + + +AArch64AsmParser::OperandMatchResultTy +AArch64AsmParser::tryParseGPRSeqPair(OperandVector &Operands) +{ + SMLoc S = getLoc(); + + if (getParser().getTok().isNot(AsmToken::Identifier)) { + //Error(S, "expected register"); + return MatchOperand_ParseFail; + } + + int FirstReg = tryParseRegister(); + if (FirstReg == -1) { + return MatchOperand_ParseFail; + } + const MCRegisterClass &WRegClass = + AArch64MCRegisterClasses[AArch64::GPR32RegClassID]; + const MCRegisterClass &XRegClass = + AArch64MCRegisterClasses[AArch64::GPR64RegClassID]; + + bool isXReg = XRegClass.contains(FirstReg), + isWReg = WRegClass.contains(FirstReg); + if (!isXReg && !isWReg) { + //Error(S, "expected first even register of a " + // "consecutive same-size even/odd register pair"); + return MatchOperand_ParseFail; + } + + const MCRegisterInfo *RI = getContext().getRegisterInfo(); + unsigned FirstEncoding = RI->getEncodingValue(FirstReg); + + if (FirstEncoding & 0x1) { + //Error(S, "expected first even register of a " + // "consecutive same-size even/odd register pair"); + return MatchOperand_ParseFail; + } + + //SMLoc M = getLoc(); + if (getParser().getTok().isNot(AsmToken::Comma)) { + //Error(M, "expected comma"); + return MatchOperand_ParseFail; + } + // Eat the comma + getParser().Lex(); + + //SMLoc E = getLoc(); + int SecondReg = tryParseRegister(); + if (SecondReg ==-1) { + return MatchOperand_ParseFail; + } + + if (RI->getEncodingValue(SecondReg) != FirstEncoding + 1 || + (isXReg && !XRegClass.contains(SecondReg)) || + (isWReg && !WRegClass.contains(SecondReg))) { + //Error(E,"expected second odd register of a " + // "consecutive same-size even/odd register pair"); + return MatchOperand_ParseFail; + } + + unsigned Pair = 0; + if(isXReg) { + Pair = RI->getMatchingSuperReg(FirstReg, AArch64::sube64, + &AArch64MCRegisterClasses[AArch64::XSeqPairsClassRegClassID]); + } else { + Pair = RI->getMatchingSuperReg(FirstReg, AArch64::sube32, + &AArch64MCRegisterClasses[AArch64::WSeqPairsClassRegClassID]); + } + + Operands.push_back(AArch64Operand::CreateReg(Pair, false, S, getLoc(), + getContext())); + + return MatchOperand_Success; +} diff --git a/llvm/lib/Target/AArch64/AsmParser/CMakeLists.txt b/llvm/lib/Target/AArch64/AsmParser/CMakeLists.txt new file mode 100644 index 0000000..cc0a9d8 --- /dev/null +++ b/llvm/lib/Target/AArch64/AsmParser/CMakeLists.txt @@ -0,0 +1,6 @@ +include_directories( ${CMAKE_CURRENT_BINARY_DIR}/.. ${CMAKE_CURRENT_SOURCE_DIR}/.. ) + +add_llvm_library(LLVMAArch64AsmParser + AArch64AsmParser.cpp + ) + diff --git a/llvm/lib/Target/AArch64/AsmParser/LLVMBuild.txt b/llvm/lib/Target/AArch64/AsmParser/LLVMBuild.txt new file mode 100644 index 0000000..d0d3db1 --- /dev/null +++ b/llvm/lib/Target/AArch64/AsmParser/LLVMBuild.txt @@ -0,0 +1,23 @@ +;===- ./lib/Target/AArch64/AsmParser/LLVMBuild.txt ---------------*- Conf -*--===; +; +; The LLVM Compiler Infrastructure +; +; This file is distributed under the University of Illinois Open Source +; License. See LICENSE.TXT for details. +; +;===------------------------------------------------------------------------===; +; +; This is an LLVMBuild description file for the components in this subdirectory. +; +; For more information on the LLVMBuild system, please see: +; +; http://llvm.org/docs/LLVMBuild.html +; +;===------------------------------------------------------------------------===; + +[component_0] +type = Library +name = AArch64AsmParser +parent = AArch64 +required_libraries = AArch64Desc AArch64Info MC MCParser Support AArch64Utils +add_to_library_groups = AArch64 diff --git a/llvm/lib/Target/AArch64/CMakeLists.txt b/llvm/lib/Target/AArch64/CMakeLists.txt new file mode 100644 index 0000000..e69de29 diff --git a/llvm/lib/Target/AArch64/LLVMBuild.txt b/llvm/lib/Target/AArch64/LLVMBuild.txt new file mode 100644 index 0000000..139c2f9 --- /dev/null +++ b/llvm/lib/Target/AArch64/LLVMBuild.txt @@ -0,0 +1,22 @@ +;===- ./lib/Target/AArch64/LLVMBuild.txt -------------------------*- Conf -*--===; +; +; The LLVM Compiler Infrastructure +; +; This file is distributed under the University of Illinois Open Source +; License. See LICENSE.TXT for details. +; +;===------------------------------------------------------------------------===; +; +; This is an LLVMBuild description file for the components in this subdirectory. +; +; For more information on the LLVMBuild system, please see: +; +; http://llvm.org/docs/LLVMBuild.html +; +;===------------------------------------------------------------------------===; + +[component_0] +type = TargetGroup +name = AArch64 +parent = Target +has_asmparser = 1 diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h new file mode 100644 index 0000000..60a9a36 --- /dev/null +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h @@ -0,0 +1,760 @@ +//===- AArch64AddressingModes.h - AArch64 Addressing Modes ------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains the AArch64 addressing mode implementation stuff. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64ADDRESSINGMODES_H +#define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64ADDRESSINGMODES_H + +#include "llvm/ADT/APFloat.h" +#include "llvm/ADT/APInt.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/MathExtras.h" +#include + +namespace llvm_ks { + +/// AArch64_AM - AArch64 Addressing Mode Stuff +namespace AArch64_AM { + +//===----------------------------------------------------------------------===// +// Shifts +// + +enum ShiftExtendType { + InvalidShiftExtend = -1, + LSL = 0, + LSR, + ASR, + ROR, + MSL, + + UXTB, + UXTH, + UXTW, + UXTX, + + SXTB, + SXTH, + SXTW, + SXTX, +}; + +/// getShiftName - Get the string encoding for the shift type. +static inline const char *getShiftExtendName(AArch64_AM::ShiftExtendType ST) { + switch (ST) { + default: llvm_unreachable("unhandled shift type!"); + case AArch64_AM::LSL: return "lsl"; + case AArch64_AM::LSR: return "lsr"; + case AArch64_AM::ASR: return "asr"; + case AArch64_AM::ROR: return "ror"; + case AArch64_AM::MSL: return "msl"; + case AArch64_AM::UXTB: return "uxtb"; + case AArch64_AM::UXTH: return "uxth"; + case AArch64_AM::UXTW: return "uxtw"; + case AArch64_AM::UXTX: return "uxtx"; + case AArch64_AM::SXTB: return "sxtb"; + case AArch64_AM::SXTH: return "sxth"; + case AArch64_AM::SXTW: return "sxtw"; + case AArch64_AM::SXTX: return "sxtx"; + } + return nullptr; +} + +/// getShiftType - Extract the shift type. +static inline AArch64_AM::ShiftExtendType getShiftType(unsigned Imm) { + switch ((Imm >> 6) & 0x7) { + default: return AArch64_AM::InvalidShiftExtend; + case 0: return AArch64_AM::LSL; + case 1: return AArch64_AM::LSR; + case 2: return AArch64_AM::ASR; + case 3: return AArch64_AM::ROR; + case 4: return AArch64_AM::MSL; + } +} + +/// getShiftValue - Extract the shift value. +static inline unsigned getShiftValue(unsigned Imm) { + return Imm & 0x3f; +} + +/// getShifterImm - Encode the shift type and amount: +/// imm: 6-bit shift amount +/// shifter: 000 ==> lsl +/// 001 ==> lsr +/// 010 ==> asr +/// 011 ==> ror +/// 100 ==> msl +/// {8-6} = shifter +/// {5-0} = imm +static inline unsigned getShifterImm(AArch64_AM::ShiftExtendType ST, + unsigned Imm) { + assert((Imm & 0x3f) == Imm && "Illegal shifted immedate value!"); + unsigned STEnc = 0; + switch (ST) { + default: llvm_unreachable("Invalid shift requested"); + case AArch64_AM::LSL: STEnc = 0; break; + case AArch64_AM::LSR: STEnc = 1; break; + case AArch64_AM::ASR: STEnc = 2; break; + case AArch64_AM::ROR: STEnc = 3; break; + case AArch64_AM::MSL: STEnc = 4; break; + } + return (STEnc << 6) | (Imm & 0x3f); +} + +//===----------------------------------------------------------------------===// +// Extends +// + +/// getArithShiftValue - get the arithmetic shift value. +static inline unsigned getArithShiftValue(unsigned Imm) { + return Imm & 0x7; +} + +/// getExtendType - Extract the extend type for operands of arithmetic ops. +static inline AArch64_AM::ShiftExtendType getExtendType(unsigned Imm) { + assert((Imm & 0x7) == Imm && "invalid immediate!"); + switch (Imm) { + default: llvm_unreachable("Compiler bug!"); + case 0: return AArch64_AM::UXTB; + case 1: return AArch64_AM::UXTH; + case 2: return AArch64_AM::UXTW; + case 3: return AArch64_AM::UXTX; + case 4: return AArch64_AM::SXTB; + case 5: return AArch64_AM::SXTH; + case 6: return AArch64_AM::SXTW; + case 7: return AArch64_AM::SXTX; + } +} + +static inline AArch64_AM::ShiftExtendType getArithExtendType(unsigned Imm) { + return getExtendType((Imm >> 3) & 0x7); +} + +/// Mapping from extend bits to required operation: +/// shifter: 000 ==> uxtb +/// 001 ==> uxth +/// 010 ==> uxtw +/// 011 ==> uxtx +/// 100 ==> sxtb +/// 101 ==> sxth +/// 110 ==> sxtw +/// 111 ==> sxtx +inline unsigned getExtendEncoding(AArch64_AM::ShiftExtendType ET) { + switch (ET) { + default: llvm_unreachable("Invalid extend type requested"); + case AArch64_AM::UXTB: return 0; break; + case AArch64_AM::UXTH: return 1; break; + case AArch64_AM::UXTW: return 2; break; + case AArch64_AM::UXTX: return 3; break; + case AArch64_AM::SXTB: return 4; break; + case AArch64_AM::SXTH: return 5; break; + case AArch64_AM::SXTW: return 6; break; + case AArch64_AM::SXTX: return 7; break; + } +} + +/// getArithExtendImm - Encode the extend type and shift amount for an +/// arithmetic instruction: +/// imm: 3-bit extend amount +/// {5-3} = shifter +/// {2-0} = imm3 +static inline unsigned getArithExtendImm(AArch64_AM::ShiftExtendType ET, + unsigned Imm) { + assert((Imm & 0x7) == Imm && "Illegal shifted immedate value!"); + return (getExtendEncoding(ET) << 3) | (Imm & 0x7); +} + +/// getMemDoShift - Extract the "do shift" flag value for load/store +/// instructions. +static inline bool getMemDoShift(unsigned Imm) { + return (Imm & 0x1) != 0; +} + +/// getExtendType - Extract the extend type for the offset operand of +/// loads/stores. +static inline AArch64_AM::ShiftExtendType getMemExtendType(unsigned Imm) { + return getExtendType((Imm >> 1) & 0x7); +} + +/// getExtendImm - Encode the extend type and amount for a load/store inst: +/// doshift: should the offset be scaled by the access size +/// shifter: 000 ==> uxtb +/// 001 ==> uxth +/// 010 ==> uxtw +/// 011 ==> uxtx +/// 100 ==> sxtb +/// 101 ==> sxth +/// 110 ==> sxtw +/// 111 ==> sxtx +/// {3-1} = shifter +/// {0} = doshift +static inline unsigned getMemExtendImm(AArch64_AM::ShiftExtendType ET, + bool DoShift) { + return (getExtendEncoding(ET) << 1) | unsigned(DoShift); +} + +static inline uint64_t ror(uint64_t elt, unsigned size) { + return ((elt & 1) << (size-1)) | (elt >> 1); +} + +/// processLogicalImmediate - Determine if an immediate value can be encoded +/// as the immediate operand of a logical instruction for the given register +/// size. If so, return true with "encoding" set to the encoded value in +/// the form N:immr:imms. +static inline bool processLogicalImmediate(uint64_t Imm, unsigned RegSize, + uint64_t &Encoding) { + if (Imm == 0ULL || Imm == ~0ULL || + (RegSize != 64 && (Imm >> RegSize != 0 || Imm == ~0U))) + return false; + + // First, determine the element size. + unsigned Size = RegSize; + + do { + Size /= 2; + uint64_t Mask = (1ULL << Size) - 1; + + if ((Imm & Mask) != ((Imm >> Size) & Mask)) { + Size *= 2; + break; + } + } while (Size > 2); + + // Second, determine the rotation to make the element be: 0^m 1^n. + uint32_t CTO, I; + uint64_t Mask = ((uint64_t)-1LL) >> (64 - Size); + Imm &= Mask; + + if (isShiftedMask_64(Imm)) { + I = countTrailingZeros(Imm); + assert(I < 64 && "undefined behavior"); + CTO = countTrailingOnes(Imm >> I); + } else { + Imm |= ~Mask; + if (!isShiftedMask_64(~Imm)) + return false; + + unsigned CLO = countLeadingOnes(Imm); + I = 64 - CLO; + CTO = CLO + countTrailingOnes(Imm) - (64 - Size); + } + + // Encode in Immr the number of RORs it would take to get *from* 0^m 1^n + // to our target value, where I is the number of RORs to go the opposite + // direction. + assert(Size > I && "I should be smaller than element size"); + unsigned Immr = (Size - I) & (Size - 1); + + // If size has a 1 in the n'th bit, create a value that has zeroes in + // bits [0, n] and ones above that. + uint64_t NImms = ~(Size-1) << 1; + + // Or the CTO value into the low bits, which must be below the Nth bit + // bit mentioned above. + NImms |= (CTO-1); + + // Extract the seventh bit and toggle it to create the N field. + unsigned N = ((NImms >> 6) & 1) ^ 1; + + Encoding = (N << 12) | (Immr << 6) | (NImms & 0x3f); + return true; +} + +/// isLogicalImmediate - Return true if the immediate is valid for a logical +/// immediate instruction of the given register size. Return false otherwise. +static inline bool isLogicalImmediate(uint64_t imm, unsigned regSize) { + uint64_t encoding; + return processLogicalImmediate(imm, regSize, encoding); +} + +/// encodeLogicalImmediate - Return the encoded immediate value for a logical +/// immediate instruction of the given register size. +static inline uint64_t encodeLogicalImmediate(uint64_t imm, unsigned regSize) { + uint64_t encoding = 0; + bool res = processLogicalImmediate(imm, regSize, encoding); + assert(res && "invalid logical immediate"); + (void)res; + return encoding; +} + +/// decodeLogicalImmediate - Decode a logical immediate value in the form +/// "N:immr:imms" (where the immr and imms fields are each 6 bits) into the +/// integer value it represents with regSize bits. +static inline uint64_t decodeLogicalImmediate(uint64_t val, unsigned regSize) { + // Extract the N, imms, and immr fields. + unsigned N = (val >> 12) & 1; + unsigned immr = (val >> 6) & 0x3f; + unsigned imms = val & 0x3f; + + assert((regSize == 64 || N == 0) && "undefined logical immediate encoding"); + int len = 31 - countLeadingZeros((N << 6) | (~imms & 0x3f)); + assert(len >= 0 && "undefined logical immediate encoding"); + unsigned size = (1 << len); + unsigned R = immr & (size - 1); + unsigned S = imms & (size - 1); + assert(S != size - 1 && "undefined logical immediate encoding"); + uint64_t pattern = (1ULL << (S + 1)) - 1; + for (unsigned i = 0; i < R; ++i) + pattern = ror(pattern, size); + + // Replicate the pattern to fill the regSize. + while (size != regSize) { + pattern |= (pattern << size); + size *= 2; + } + return pattern; +} + +/// isValidDecodeLogicalImmediate - Check to see if the logical immediate value +/// in the form "N:immr:imms" (where the immr and imms fields are each 6 bits) +/// is a valid encoding for an integer value with regSize bits. +static inline bool isValidDecodeLogicalImmediate(uint64_t val, + unsigned regSize) { + // Extract the N and imms fields needed for checking. + unsigned N = (val >> 12) & 1; + unsigned imms = val & 0x3f; + + if (regSize == 32 && N != 0) // undefined logical immediate encoding + return false; + int len = 31 - countLeadingZeros((N << 6) | (~imms & 0x3f)); + if (len < 0) // undefined logical immediate encoding + return false; + unsigned size = (1 << len); + unsigned S = imms & (size - 1); + if (S == size - 1) // undefined logical immediate encoding + return false; + + return true; +} + +//===----------------------------------------------------------------------===// +// Floating-point Immediates +// +static inline float getFPImmFloat(unsigned Imm) { + // We expect an 8-bit binary encoding of a floating-point number here. + union { + uint32_t I; + float F; + } FPUnion; + + uint8_t Sign = (Imm >> 7) & 0x1; + uint8_t Exp = (Imm >> 4) & 0x7; + uint8_t Mantissa = Imm & 0xf; + + // 8-bit FP iEEEE Float Encoding + // abcd efgh aBbbbbbc defgh000 00000000 00000000 + // + // where B = NOT(b); + + FPUnion.I = 0; + FPUnion.I |= Sign << 31; + FPUnion.I |= ((Exp & 0x4) != 0 ? 0 : 1) << 30; + FPUnion.I |= ((Exp & 0x4) != 0 ? 0x1f : 0) << 25; + FPUnion.I |= (Exp & 0x3) << 23; + FPUnion.I |= Mantissa << 19; + return FPUnion.F; +} + +/// getFP16Imm - Return an 8-bit floating-point version of the 16-bit +/// floating-point value. If the value cannot be represented as an 8-bit +/// floating-point value, then return -1. +static inline int getFP16Imm(const APInt &Imm) { + uint32_t Sign = Imm.lshr(15).getZExtValue() & 1; + int32_t Exp = (Imm.lshr(10).getSExtValue() & 0x1f) - 15; // -14 to 15 + int32_t Mantissa = Imm.getZExtValue() & 0x3ff; // 10 bits + + // We can handle 4 bits of mantissa. + // mantissa = (16+UInt(e:f:g:h))/16. + if (Mantissa & 0x3f) + return -1; + Mantissa >>= 6; + + // We can handle 3 bits of exponent: exp == UInt(NOT(b):c:d)-3 + if (Exp < -3 || Exp > 4) + return -1; + Exp = ((Exp+3) & 0x7) ^ 4; + + return ((int)Sign << 7) | (Exp << 4) | Mantissa; +} + +static inline int getFP16Imm(const APFloat &FPImm) { + return getFP16Imm(FPImm.bitcastToAPInt()); +} + +/// getFP32Imm - Return an 8-bit floating-point version of the 32-bit +/// floating-point value. If the value cannot be represented as an 8-bit +/// floating-point value, then return -1. +static inline int getFP32Imm(const APInt &Imm) { + uint32_t Sign = Imm.lshr(31).getZExtValue() & 1; + int32_t Exp = (Imm.lshr(23).getSExtValue() & 0xff) - 127; // -126 to 127 + int64_t Mantissa = Imm.getZExtValue() & 0x7fffff; // 23 bits + + // We can handle 4 bits of mantissa. + // mantissa = (16+UInt(e:f:g:h))/16. + if (Mantissa & 0x7ffff) + return -1; + Mantissa >>= 19; + if ((Mantissa & 0xf) != Mantissa) + return -1; + + // We can handle 3 bits of exponent: exp == UInt(NOT(b):c:d)-3 + if (Exp < -3 || Exp > 4) + return -1; + Exp = ((Exp+3) & 0x7) ^ 4; + + return ((int)Sign << 7) | (Exp << 4) | Mantissa; +} + +static inline int getFP32Imm(const APFloat &FPImm) { + return getFP32Imm(FPImm.bitcastToAPInt()); +} + +/// getFP64Imm - Return an 8-bit floating-point version of the 64-bit +/// floating-point value. If the value cannot be represented as an 8-bit +/// floating-point value, then return -1. +static inline int getFP64Imm(const APInt &Imm) { + uint64_t Sign = Imm.lshr(63).getZExtValue() & 1; + int64_t Exp = (Imm.lshr(52).getSExtValue() & 0x7ff) - 1023; // -1022 to 1023 + uint64_t Mantissa = Imm.getZExtValue() & 0xfffffffffffffULL; + + // We can handle 4 bits of mantissa. + // mantissa = (16+UInt(e:f:g:h))/16. + if (Mantissa & 0xffffffffffffULL) + return -1; + Mantissa >>= 48; + if ((Mantissa & 0xf) != Mantissa) + return -1; + + // We can handle 3 bits of exponent: exp == UInt(NOT(b):c:d)-3 + if (Exp < -3 || Exp > 4) + return -1; + Exp = ((Exp+3) & 0x7) ^ 4; + + return ((int)Sign << 7) | (Exp << 4) | Mantissa; +} + +static inline int getFP64Imm(const APFloat &FPImm) { + return getFP64Imm(FPImm.bitcastToAPInt()); +} + +//===--------------------------------------------------------------------===// +// AdvSIMD Modified Immediates +//===--------------------------------------------------------------------===// + +// 0x00 0x00 0x00 abcdefgh 0x00 0x00 0x00 abcdefgh +static inline bool isAdvSIMDModImmType1(uint64_t Imm) { + return ((Imm >> 32) == (Imm & 0xffffffffULL)) && + ((Imm & 0xffffff00ffffff00ULL) == 0); +} + +static inline uint8_t encodeAdvSIMDModImmType1(uint64_t Imm) { + return (Imm & 0xffULL); +} + +static inline uint64_t decodeAdvSIMDModImmType1(uint8_t Imm) { + uint64_t EncVal = Imm; + return (EncVal << 32) | EncVal; +} + +// 0x00 0x00 abcdefgh 0x00 0x00 0x00 abcdefgh 0x00 +static inline bool isAdvSIMDModImmType2(uint64_t Imm) { + return ((Imm >> 32) == (Imm & 0xffffffffULL)) && + ((Imm & 0xffff00ffffff00ffULL) == 0); +} + +static inline uint8_t encodeAdvSIMDModImmType2(uint64_t Imm) { + return (Imm & 0xff00ULL) >> 8; +} + +static inline uint64_t decodeAdvSIMDModImmType2(uint8_t Imm) { + uint64_t EncVal = Imm; + return (EncVal << 40) | (EncVal << 8); +} + +// 0x00 abcdefgh 0x00 0x00 0x00 abcdefgh 0x00 0x00 +static inline bool isAdvSIMDModImmType3(uint64_t Imm) { + return ((Imm >> 32) == (Imm & 0xffffffffULL)) && + ((Imm & 0xff00ffffff00ffffULL) == 0); +} + +static inline uint8_t encodeAdvSIMDModImmType3(uint64_t Imm) { + return (Imm & 0xff0000ULL) >> 16; +} + +static inline uint64_t decodeAdvSIMDModImmType3(uint8_t Imm) { + uint64_t EncVal = Imm; + return (EncVal << 48) | (EncVal << 16); +} + +// abcdefgh 0x00 0x00 0x00 abcdefgh 0x00 0x00 0x00 +static inline bool isAdvSIMDModImmType4(uint64_t Imm) { + return ((Imm >> 32) == (Imm & 0xffffffffULL)) && + ((Imm & 0x00ffffff00ffffffULL) == 0); +} + +static inline uint8_t encodeAdvSIMDModImmType4(uint64_t Imm) { + return (Imm & 0xff000000ULL) >> 24; +} + +static inline uint64_t decodeAdvSIMDModImmType4(uint8_t Imm) { + uint64_t EncVal = Imm; + return (EncVal << 56) | (EncVal << 24); +} + +// 0x00 abcdefgh 0x00 abcdefgh 0x00 abcdefgh 0x00 abcdefgh +static inline bool isAdvSIMDModImmType5(uint64_t Imm) { + return ((Imm >> 32) == (Imm & 0xffffffffULL)) && + (((Imm & 0x00ff0000ULL) >> 16) == (Imm & 0x000000ffULL)) && + ((Imm & 0xff00ff00ff00ff00ULL) == 0); +} + +static inline uint8_t encodeAdvSIMDModImmType5(uint64_t Imm) { + return (Imm & 0xffULL); +} + +static inline uint64_t decodeAdvSIMDModImmType5(uint8_t Imm) { + uint64_t EncVal = Imm; + return (EncVal << 48) | (EncVal << 32) | (EncVal << 16) | EncVal; +} + +// abcdefgh 0x00 abcdefgh 0x00 abcdefgh 0x00 abcdefgh 0x00 +static inline bool isAdvSIMDModImmType6(uint64_t Imm) { + return ((Imm >> 32) == (Imm & 0xffffffffULL)) && + (((Imm & 0xff000000ULL) >> 16) == (Imm & 0x0000ff00ULL)) && + ((Imm & 0x00ff00ff00ff00ffULL) == 0); +} + +static inline uint8_t encodeAdvSIMDModImmType6(uint64_t Imm) { + return (Imm & 0xff00ULL) >> 8; +} + +static inline uint64_t decodeAdvSIMDModImmType6(uint8_t Imm) { + uint64_t EncVal = Imm; + return (EncVal << 56) | (EncVal << 40) | (EncVal << 24) | (EncVal << 8); +} + +// 0x00 0x00 abcdefgh 0xFF 0x00 0x00 abcdefgh 0xFF +static inline bool isAdvSIMDModImmType7(uint64_t Imm) { + return ((Imm >> 32) == (Imm & 0xffffffffULL)) && + ((Imm & 0xffff00ffffff00ffULL) == 0x000000ff000000ffULL); +} + +static inline uint8_t encodeAdvSIMDModImmType7(uint64_t Imm) { + return (Imm & 0xff00ULL) >> 8; +} + +static inline uint64_t decodeAdvSIMDModImmType7(uint8_t Imm) { + uint64_t EncVal = Imm; + return (EncVal << 40) | (EncVal << 8) | 0x000000ff000000ffULL; +} + +// 0x00 abcdefgh 0xFF 0xFF 0x00 abcdefgh 0xFF 0xFF +static inline bool isAdvSIMDModImmType8(uint64_t Imm) { + return ((Imm >> 32) == (Imm & 0xffffffffULL)) && + ((Imm & 0xff00ffffff00ffffULL) == 0x0000ffff0000ffffULL); +} + +static inline uint64_t decodeAdvSIMDModImmType8(uint8_t Imm) { + uint64_t EncVal = Imm; + return (EncVal << 48) | (EncVal << 16) | 0x0000ffff0000ffffULL; +} + +static inline uint8_t encodeAdvSIMDModImmType8(uint64_t Imm) { + return (Imm & 0x00ff0000ULL) >> 16; +} + +// abcdefgh abcdefgh abcdefgh abcdefgh abcdefgh abcdefgh abcdefgh abcdefgh +static inline bool isAdvSIMDModImmType9(uint64_t Imm) { + return ((Imm >> 32) == (Imm & 0xffffffffULL)) && + ((Imm >> 48) == (Imm & 0x0000ffffULL)) && + ((Imm >> 56) == (Imm & 0x000000ffULL)); +} + +static inline uint8_t encodeAdvSIMDModImmType9(uint64_t Imm) { + return (Imm & 0xffULL); +} + +static inline uint64_t decodeAdvSIMDModImmType9(uint8_t Imm) { + uint64_t EncVal = Imm; + EncVal |= (EncVal << 8); + EncVal |= (EncVal << 16); + EncVal |= (EncVal << 32); + return EncVal; +} + +// aaaaaaaa bbbbbbbb cccccccc dddddddd eeeeeeee ffffffff gggggggg hhhhhhhh +// cmode: 1110, op: 1 +static inline bool isAdvSIMDModImmType10(uint64_t Imm) { + uint64_t ByteA = Imm & 0xff00000000000000ULL; + uint64_t ByteB = Imm & 0x00ff000000000000ULL; + uint64_t ByteC = Imm & 0x0000ff0000000000ULL; + uint64_t ByteD = Imm & 0x000000ff00000000ULL; + uint64_t ByteE = Imm & 0x00000000ff000000ULL; + uint64_t ByteF = Imm & 0x0000000000ff0000ULL; + uint64_t ByteG = Imm & 0x000000000000ff00ULL; + uint64_t ByteH = Imm & 0x00000000000000ffULL; + + return (ByteA == 0ULL || ByteA == 0xff00000000000000ULL) && + (ByteB == 0ULL || ByteB == 0x00ff000000000000ULL) && + (ByteC == 0ULL || ByteC == 0x0000ff0000000000ULL) && + (ByteD == 0ULL || ByteD == 0x000000ff00000000ULL) && + (ByteE == 0ULL || ByteE == 0x00000000ff000000ULL) && + (ByteF == 0ULL || ByteF == 0x0000000000ff0000ULL) && + (ByteG == 0ULL || ByteG == 0x000000000000ff00ULL) && + (ByteH == 0ULL || ByteH == 0x00000000000000ffULL); +} + +static inline uint8_t encodeAdvSIMDModImmType10(uint64_t Imm) { + uint8_t BitA = (Imm & 0xff00000000000000ULL) != 0; + uint8_t BitB = (Imm & 0x00ff000000000000ULL) != 0; + uint8_t BitC = (Imm & 0x0000ff0000000000ULL) != 0; + uint8_t BitD = (Imm & 0x000000ff00000000ULL) != 0; + uint8_t BitE = (Imm & 0x00000000ff000000ULL) != 0; + uint8_t BitF = (Imm & 0x0000000000ff0000ULL) != 0; + uint8_t BitG = (Imm & 0x000000000000ff00ULL) != 0; + uint8_t BitH = (Imm & 0x00000000000000ffULL) != 0; + + uint8_t EncVal = BitA; + EncVal <<= 1; + EncVal |= BitB; + EncVal <<= 1; + EncVal |= BitC; + EncVal <<= 1; + EncVal |= BitD; + EncVal <<= 1; + EncVal |= BitE; + EncVal <<= 1; + EncVal |= BitF; + EncVal <<= 1; + EncVal |= BitG; + EncVal <<= 1; + EncVal |= BitH; + return EncVal; +} + +static inline uint64_t decodeAdvSIMDModImmType10(uint8_t Imm) { + uint64_t EncVal = 0; + if (Imm & 0x80) EncVal |= 0xff00000000000000ULL; + if (Imm & 0x40) EncVal |= 0x00ff000000000000ULL; + if (Imm & 0x20) EncVal |= 0x0000ff0000000000ULL; + if (Imm & 0x10) EncVal |= 0x000000ff00000000ULL; + if (Imm & 0x08) EncVal |= 0x00000000ff000000ULL; + if (Imm & 0x04) EncVal |= 0x0000000000ff0000ULL; + if (Imm & 0x02) EncVal |= 0x000000000000ff00ULL; + if (Imm & 0x01) EncVal |= 0x00000000000000ffULL; + return EncVal; +} + +// aBbbbbbc defgh000 0x00 0x00 aBbbbbbc defgh000 0x00 0x00 +static inline bool isAdvSIMDModImmType11(uint64_t Imm) { + uint64_t BString = (Imm & 0x7E000000ULL) >> 25; + return ((Imm >> 32) == (Imm & 0xffffffffULL)) && + (BString == 0x1f || BString == 0x20) && + ((Imm & 0x0007ffff0007ffffULL) == 0); +} + +static inline uint8_t encodeAdvSIMDModImmType11(uint64_t Imm) { + uint8_t BitA = (Imm & 0x80000000ULL) != 0; + uint8_t BitB = (Imm & 0x20000000ULL) != 0; + uint8_t BitC = (Imm & 0x01000000ULL) != 0; + uint8_t BitD = (Imm & 0x00800000ULL) != 0; + uint8_t BitE = (Imm & 0x00400000ULL) != 0; + uint8_t BitF = (Imm & 0x00200000ULL) != 0; + uint8_t BitG = (Imm & 0x00100000ULL) != 0; + uint8_t BitH = (Imm & 0x00080000ULL) != 0; + + uint8_t EncVal = BitA; + EncVal <<= 1; + EncVal |= BitB; + EncVal <<= 1; + EncVal |= BitC; + EncVal <<= 1; + EncVal |= BitD; + EncVal <<= 1; + EncVal |= BitE; + EncVal <<= 1; + EncVal |= BitF; + EncVal <<= 1; + EncVal |= BitG; + EncVal <<= 1; + EncVal |= BitH; + return EncVal; +} + +static inline uint64_t decodeAdvSIMDModImmType11(uint8_t Imm) { + uint64_t EncVal = 0; + if (Imm & 0x80) EncVal |= 0x80000000ULL; + if (Imm & 0x40) EncVal |= 0x3e000000ULL; + else EncVal |= 0x40000000ULL; + if (Imm & 0x20) EncVal |= 0x01000000ULL; + if (Imm & 0x10) EncVal |= 0x00800000ULL; + if (Imm & 0x08) EncVal |= 0x00400000ULL; + if (Imm & 0x04) EncVal |= 0x00200000ULL; + if (Imm & 0x02) EncVal |= 0x00100000ULL; + if (Imm & 0x01) EncVal |= 0x00080000ULL; + return (EncVal << 32) | EncVal; +} + +// aBbbbbbb bbcdefgh 0x00 0x00 0x00 0x00 0x00 0x00 +static inline bool isAdvSIMDModImmType12(uint64_t Imm) { + uint64_t BString = (Imm & 0x7fc0000000000000ULL) >> 54; + return ((BString == 0xff || BString == 0x100) && + ((Imm & 0x0000ffffffffffffULL) == 0)); +} + +static inline uint8_t encodeAdvSIMDModImmType12(uint64_t Imm) { + uint8_t BitA = (Imm & 0x8000000000000000ULL) != 0; + uint8_t BitB = (Imm & 0x0040000000000000ULL) != 0; + uint8_t BitC = (Imm & 0x0020000000000000ULL) != 0; + uint8_t BitD = (Imm & 0x0010000000000000ULL) != 0; + uint8_t BitE = (Imm & 0x0008000000000000ULL) != 0; + uint8_t BitF = (Imm & 0x0004000000000000ULL) != 0; + uint8_t BitG = (Imm & 0x0002000000000000ULL) != 0; + uint8_t BitH = (Imm & 0x0001000000000000ULL) != 0; + + uint8_t EncVal = BitA; + EncVal <<= 1; + EncVal |= BitB; + EncVal <<= 1; + EncVal |= BitC; + EncVal <<= 1; + EncVal |= BitD; + EncVal <<= 1; + EncVal |= BitE; + EncVal <<= 1; + EncVal |= BitF; + EncVal <<= 1; + EncVal |= BitG; + EncVal <<= 1; + EncVal |= BitH; + return EncVal; +} + +static inline uint64_t decodeAdvSIMDModImmType12(uint8_t Imm) { + uint64_t EncVal = 0; + if (Imm & 0x80) EncVal |= 0x8000000000000000ULL; + if (Imm & 0x40) EncVal |= 0x3fc0000000000000ULL; + else EncVal |= 0x4000000000000000ULL; + if (Imm & 0x20) EncVal |= 0x0020000000000000ULL; + if (Imm & 0x10) EncVal |= 0x0010000000000000ULL; + if (Imm & 0x08) EncVal |= 0x0008000000000000ULL; + if (Imm & 0x04) EncVal |= 0x0004000000000000ULL; + if (Imm & 0x02) EncVal |= 0x0002000000000000ULL; + if (Imm & 0x01) EncVal |= 0x0001000000000000ULL; + return (EncVal << 32) | EncVal; +} + +} // end namespace AArch64_AM + +} // end namespace llvm_ks + +#endif diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp new file mode 100644 index 0000000..39dbdb8 --- /dev/null +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp @@ -0,0 +1,431 @@ +//===-- AArch64AsmBackend.cpp - AArch64 Assembler Backend -----------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/MC/MCRegisterInfo.h" +#include "Utils/AArch64BaseInfo.h" +#include "MCTargetDesc/AArch64MCTargetDesc.h" +#include "MCTargetDesc/AArch64FixupKinds.h" +#include "llvm/ADT/Triple.h" +#include "llvm/MC/MCAsmBackend.h" +#include "llvm/MC/MCDirectives.h" +#include "llvm/MC/MCELFObjectWriter.h" +#include "llvm/MC/MCFixupKindInfo.h" +#include "llvm/MC/MCObjectWriter.h" +#include "llvm/MC/MCSectionELF.h" +#include "llvm/MC/MCSectionMachO.h" +#include "llvm/MC/MCValue.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/MachO.h" + +#include + +using namespace llvm_ks; + +namespace { + +class AArch64AsmBackend : public MCAsmBackend { + static const unsigned PCRelFlagVal = + MCFixupKindInfo::FKF_IsAlignedDownTo32Bits | MCFixupKindInfo::FKF_IsPCRel; +public: + bool IsLittleEndian; + +public: + AArch64AsmBackend(const Target &T, bool IsLittleEndian) + : MCAsmBackend(), IsLittleEndian(IsLittleEndian) {} + + unsigned getNumFixupKinds() const override { + return AArch64::NumTargetFixupKinds; + } + + const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override { + const static MCFixupKindInfo Infos[AArch64::NumTargetFixupKinds] = { + // This table *must* be in the order that the fixup_* kinds are defined in + // AArch64FixupKinds.h. + // + // Name Offset (bits) Size (bits) Flags + { "fixup_aarch64_pcrel_adr_imm21", 0, 32, PCRelFlagVal }, + { "fixup_aarch64_pcrel_adrp_imm21", 0, 32, PCRelFlagVal }, + { "fixup_aarch64_add_imm12", 10, 12, 0 }, + { "fixup_aarch64_ldst_imm12_scale1", 10, 12, 0 }, + { "fixup_aarch64_ldst_imm12_scale2", 10, 12, 0 }, + { "fixup_aarch64_ldst_imm12_scale4", 10, 12, 0 }, + { "fixup_aarch64_ldst_imm12_scale8", 10, 12, 0 }, + { "fixup_aarch64_ldst_imm12_scale16", 10, 12, 0 }, + { "fixup_aarch64_ldr_pcrel_imm19", 5, 19, PCRelFlagVal }, + { "fixup_aarch64_movw", 5, 16, 0 }, + { "fixup_aarch64_pcrel_branch14", 5, 14, PCRelFlagVal }, + { "fixup_aarch64_pcrel_branch19", 5, 19, PCRelFlagVal }, + { "fixup_aarch64_pcrel_branch26", 0, 26, PCRelFlagVal }, + { "fixup_aarch64_pcrel_call26", 0, 26, PCRelFlagVal }, + { "fixup_aarch64_tlsdesc_call", 0, 0, 0 } + }; + + if (Kind < FirstTargetFixupKind) + return MCAsmBackend::getFixupKindInfo(Kind); + + assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() && + "Invalid kind!"); + return Infos[Kind - FirstTargetFixupKind]; + } + + void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize, + uint64_t Value, bool IsPCRel, unsigned int &KsError) const override; + + bool mayNeedRelaxation(const MCInst &Inst) const override; + bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, + const MCRelaxableFragment *DF, + const MCAsmLayout &Layout, unsigned &KsError) const override; + void relaxInstruction(const MCInst &Inst, MCInst &Res) const override; + bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override; + + void HandleAssemblerFlag(MCAssemblerFlag Flag) {} + + unsigned getPointerSize() const { return 8; } + + unsigned getFixupKindContainereSizeInBytes(unsigned Kind) const; +}; + +} // end anonymous namespace + +/// \brief The number of bytes the fixup may change. +static unsigned getFixupKindNumBytes(unsigned Kind) { + switch (Kind) { + default: + llvm_unreachable("Unknown fixup kind!"); + + case AArch64::fixup_aarch64_tlsdesc_call: + return 0; + + case FK_Data_1: + return 1; + + case FK_Data_2: + case AArch64::fixup_aarch64_movw: + return 2; + + case AArch64::fixup_aarch64_pcrel_branch14: + case AArch64::fixup_aarch64_add_imm12: + case AArch64::fixup_aarch64_ldst_imm12_scale1: + case AArch64::fixup_aarch64_ldst_imm12_scale2: + case AArch64::fixup_aarch64_ldst_imm12_scale4: + case AArch64::fixup_aarch64_ldst_imm12_scale8: + case AArch64::fixup_aarch64_ldst_imm12_scale16: + case AArch64::fixup_aarch64_ldr_pcrel_imm19: + case AArch64::fixup_aarch64_pcrel_branch19: + return 3; + + case AArch64::fixup_aarch64_pcrel_adr_imm21: + case AArch64::fixup_aarch64_pcrel_adrp_imm21: + case AArch64::fixup_aarch64_pcrel_branch26: + case AArch64::fixup_aarch64_pcrel_call26: + case FK_Data_4: + return 4; + + case FK_Data_8: + return 8; + } +} + +static unsigned AdrImmBits(unsigned Value) { + unsigned lo2 = Value & 0x3; + unsigned hi19 = (Value & 0x1ffffc) >> 2; + return (hi19 << 5) | (lo2 << 29); +} + +static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) { + int64_t SignedValue = static_cast(Value); + switch (Kind) { + default: + llvm_unreachable("Unknown fixup kind!"); + case AArch64::fixup_aarch64_pcrel_adr_imm21: + if (SignedValue > 2097151 || SignedValue < -2097152) + report_fatal_error("fixup value out of range"); + return AdrImmBits(Value & 0x1fffffULL); + case AArch64::fixup_aarch64_pcrel_adrp_imm21: + return AdrImmBits((Value & 0x1fffff000ULL) >> 12); + case AArch64::fixup_aarch64_ldr_pcrel_imm19: + case AArch64::fixup_aarch64_pcrel_branch19: + // Signed 21-bit immediate + if (SignedValue > 2097151 || SignedValue < -2097152) + report_fatal_error("fixup value out of range"); + // Low two bits are not encoded. + return (Value >> 2) & 0x7ffff; + case AArch64::fixup_aarch64_add_imm12: + case AArch64::fixup_aarch64_ldst_imm12_scale1: + // Unsigned 12-bit immediate + if (Value >= 0x1000) + report_fatal_error("invalid imm12 fixup value"); + return Value; + case AArch64::fixup_aarch64_ldst_imm12_scale2: + // Unsigned 12-bit immediate which gets multiplied by 2 + if (Value & 1 || Value >= 0x2000) + report_fatal_error("invalid imm12 fixup value"); + return Value >> 1; + case AArch64::fixup_aarch64_ldst_imm12_scale4: + // Unsigned 12-bit immediate which gets multiplied by 4 + if (Value & 3 || Value >= 0x4000) + report_fatal_error("invalid imm12 fixup value"); + return Value >> 2; + case AArch64::fixup_aarch64_ldst_imm12_scale8: + // Unsigned 12-bit immediate which gets multiplied by 8 + if (Value & 7 || Value >= 0x8000) + report_fatal_error("invalid imm12 fixup value"); + return Value >> 3; + case AArch64::fixup_aarch64_ldst_imm12_scale16: + // Unsigned 12-bit immediate which gets multiplied by 16 + if (Value & 15 || Value >= 0x10000) + report_fatal_error("invalid imm12 fixup value"); + return Value >> 4; + case AArch64::fixup_aarch64_movw: + report_fatal_error("no resolvable MOVZ/MOVK fixups supported yet"); + return Value; + case AArch64::fixup_aarch64_pcrel_branch14: + // Signed 16-bit immediate + if (SignedValue > 32767 || SignedValue < -32768) + report_fatal_error("fixup value out of range"); + // Low two bits are not encoded (4-byte alignment assumed). + if (Value & 0x3) + report_fatal_error("fixup not sufficiently aligned"); + return (Value >> 2) & 0x3fff; + case AArch64::fixup_aarch64_pcrel_branch26: + case AArch64::fixup_aarch64_pcrel_call26: + // Signed 28-bit immediate + if (SignedValue > 134217727 || SignedValue < -134217728) + report_fatal_error("fixup value out of range"); + // Low two bits are not encoded (4-byte alignment assumed). + if (Value & 0x3) + report_fatal_error("fixup not sufficiently aligned"); + return (Value >> 2) & 0x3ffffff; + case FK_Data_1: + case FK_Data_2: + case FK_Data_4: + case FK_Data_8: + return Value; + } +} + +/// getFixupKindContainereSizeInBytes - The number of bytes of the +/// container involved in big endian or 0 if the item is little endian +unsigned AArch64AsmBackend::getFixupKindContainereSizeInBytes(unsigned Kind) const { + if (IsLittleEndian) + return 0; + + switch (Kind) { + default: + llvm_unreachable("Unknown fixup kind!"); + + case FK_Data_1: + return 1; + case FK_Data_2: + return 2; + case FK_Data_4: + return 4; + case FK_Data_8: + return 8; + + case AArch64::fixup_aarch64_tlsdesc_call: + case AArch64::fixup_aarch64_movw: + case AArch64::fixup_aarch64_pcrel_branch14: + case AArch64::fixup_aarch64_add_imm12: + case AArch64::fixup_aarch64_ldst_imm12_scale1: + case AArch64::fixup_aarch64_ldst_imm12_scale2: + case AArch64::fixup_aarch64_ldst_imm12_scale4: + case AArch64::fixup_aarch64_ldst_imm12_scale8: + case AArch64::fixup_aarch64_ldst_imm12_scale16: + case AArch64::fixup_aarch64_ldr_pcrel_imm19: + case AArch64::fixup_aarch64_pcrel_branch19: + case AArch64::fixup_aarch64_pcrel_adr_imm21: + case AArch64::fixup_aarch64_pcrel_adrp_imm21: + case AArch64::fixup_aarch64_pcrel_branch26: + case AArch64::fixup_aarch64_pcrel_call26: + // Instructions are always little endian + return 0; + } +} + +void AArch64AsmBackend::applyFixup(const MCFixup &Fixup, char *Data, + unsigned DataSize, uint64_t Value, + bool IsPCRel, unsigned int &KsError) const { + unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind()); + if (!Value) + return; // Doesn't change encoding. + MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind()); + // Apply any target-specific value adjustments. + Value = adjustFixupValue(Fixup.getKind(), Value); + + // Shift the value into position. + Value <<= Info.TargetOffset; + + unsigned Offset = Fixup.getOffset(); + //assert(Offset + NumBytes <= DataSize && "Invalid fixup offset!"); + if (Offset + NumBytes > DataSize) { + KsError = KS_ERR_ASM_FIXUP_INVALID; + return; + } + + // Used to point to big endian bytes. + unsigned FulleSizeInBytes = getFixupKindContainereSizeInBytes(Fixup.getKind()); + + // For each byte of the fragment that the fixup touches, mask in the + // bits from the fixup value. + if (FulleSizeInBytes == 0) { + // Handle as little-endian + for (unsigned i = 0; i != NumBytes; ++i) { + Data[Offset + i] |= uint8_t((Value >> (i * 8)) & 0xff); + } + } else { + // Handle as big-endian + //assert((Offset + FulleSizeInBytes) <= DataSize && "Invalid fixup size!"); + //assert(NumBytes <= FulleSizeInBytes && "Invalid fixup size!"); + if ((Offset + FulleSizeInBytes) > DataSize || + NumBytes > FulleSizeInBytes) { + KsError = KS_ERR_ASM_FIXUP_INVALID; + return; + } + for (unsigned i = 0; i != NumBytes; ++i) { + unsigned Idx = FulleSizeInBytes - 1 - i; + Data[Offset + Idx] |= uint8_t((Value >> (i * 8)) & 0xff); + } + } +} + +bool AArch64AsmBackend::mayNeedRelaxation(const MCInst &Inst) const { + return false; +} + +bool AArch64AsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup, + uint64_t Value, + const MCRelaxableFragment *DF, + const MCAsmLayout &Layout, unsigned &KsError) const { + // FIXME: This isn't correct for AArch64. Just moving the "generic" logic + // into the targets for now. + // + // Relax if the value is too big for a (signed) i8. + return int64_t(Value) != int64_t(int8_t(Value)); +} + +void AArch64AsmBackend::relaxInstruction(const MCInst &Inst, + MCInst &Res) const { + llvm_unreachable("AArch64AsmBackend::relaxInstruction() unimplemented"); +} + +bool AArch64AsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const { + // If the count is not 4-byte aligned, we must be writing data into the text + // section (otherwise we have unaligned instructions, and thus have far + // bigger problems), so just write zeros instead. + OW->WriteZeros(Count % 4); + + // We are properly aligned, so write NOPs as requested. + Count /= 4; + for (uint64_t i = 0; i != Count; ++i) + OW->write32(0xd503201f); + return true; +} + +namespace { + +namespace CU { + +/// \brief Compact unwind encoding values. +enum CompactUnwindEncodings { + /// \brief A "frameless" leaf function, where no non-volatile registers are + /// saved. The return remains in LR throughout the function. + UNWIND_AArch64_MODE_FRAMELESS = 0x02000000, + + /// \brief No compact unwind encoding available. Instead the low 23-bits of + /// the compact unwind encoding is the offset of the DWARF FDE in the + /// __eh_frame section. This mode is never used in object files. It is only + /// generated by the linker in final linked images, which have only DWARF info + /// for a function. + UNWIND_AArch64_MODE_DWARF = 0x03000000, + + /// \brief This is a standard arm64 prologue where FP/LR are immediately + /// pushed on the stack, then SP is copied to FP. If there are any + /// non-volatile register saved, they are copied into the stack fame in pairs + /// in a contiguous ranger right below the saved FP/LR pair. Any subset of the + /// five X pairs and four D pairs can be saved, but the memory layout must be + /// in register number order. + UNWIND_AArch64_MODE_FRAME = 0x04000000, + + /// \brief Frame register pair encodings. + UNWIND_AArch64_FRAME_X19_X20_PAIR = 0x00000001, + UNWIND_AArch64_FRAME_X21_X22_PAIR = 0x00000002, + UNWIND_AArch64_FRAME_X23_X24_PAIR = 0x00000004, + UNWIND_AArch64_FRAME_X25_X26_PAIR = 0x00000008, + UNWIND_AArch64_FRAME_X27_X28_PAIR = 0x00000010, + UNWIND_AArch64_FRAME_D8_D9_PAIR = 0x00000100, + UNWIND_AArch64_FRAME_D10_D11_PAIR = 0x00000200, + UNWIND_AArch64_FRAME_D12_D13_PAIR = 0x00000400, + UNWIND_AArch64_FRAME_D14_D15_PAIR = 0x00000800 +}; + +} // end CU namespace + +} // end anonymous namespace + +namespace { + +class ELFAArch64AsmBackend : public AArch64AsmBackend { +public: + uint8_t OSABI; + + ELFAArch64AsmBackend(const Target &T, uint8_t OSABI, bool IsLittleEndian) + : AArch64AsmBackend(T, IsLittleEndian), OSABI(OSABI) {} + + MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override { + return createAArch64ELFObjectWriter(OS, OSABI, IsLittleEndian); + } + + void processFixupValue(const MCAssembler &Asm, const MCAsmLayout &Layout, + const MCFixup &Fixup, const MCFragment *DF, + const MCValue &Target, uint64_t &Value, + bool &IsResolved) override; +}; + +void ELFAArch64AsmBackend::processFixupValue( + const MCAssembler &Asm, const MCAsmLayout &Layout, const MCFixup &Fixup, + const MCFragment *DF, const MCValue &Target, uint64_t &Value, + bool &IsResolved) { + // The ADRP instruction adds some multiple of 0x1000 to the current PC & + // ~0xfff. This means that the required offset to reach a symbol can vary by + // up to one step depending on where the ADRP is in memory. For example: + // + // ADRP x0, there + // there: + // + // If the ADRP occurs at address 0xffc then "there" will be at 0x1000 and + // we'll need that as an offset. At any other address "there" will be in the + // same page as the ADRP and the instruction should encode 0x0. Assuming the + // section isn't 0x1000-aligned, we therefore need to delegate this decision + // to the linker -- a relocation! + if ((uint32_t)Fixup.getKind() == AArch64::fixup_aarch64_pcrel_adrp_imm21) + IsResolved = false; +} + +} + +MCAsmBackend *llvm_ks::createAArch64leAsmBackend(const Target &T, + const MCRegisterInfo &MRI, + const Triple &TheTriple, + StringRef CPU) { + assert(TheTriple.isOSBinFormatELF() && "Expect either MachO or ELF target"); + uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TheTriple.getOS()); + return new ELFAArch64AsmBackend(T, OSABI, /*IsLittleEndian=*/true); +} + +MCAsmBackend *llvm_ks::createAArch64beAsmBackend(const Target &T, + const MCRegisterInfo &MRI, + const Triple &TheTriple, + StringRef CPU) { + assert(TheTriple.isOSBinFormatELF() && + "Big endian is only supported for ELF targets!"); + uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TheTriple.getOS()); + return new ELFAArch64AsmBackend(T, OSABI, + /*IsLittleEndian=*/false); +} diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp new file mode 100644 index 0000000..a19b504 --- /dev/null +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp @@ -0,0 +1,258 @@ +//===-- AArch64ELFObjectWriter.cpp - AArch64 ELF Writer -------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file handles ELF-specific object emission, converting LLVM's internal +// fixups into the appropriate relocations. +// +//===----------------------------------------------------------------------===// + +#include "MCTargetDesc/AArch64FixupKinds.h" +#include "MCTargetDesc/AArch64MCExpr.h" +#include "MCTargetDesc/AArch64MCTargetDesc.h" +#include "llvm/MC/MCELFObjectWriter.h" +#include "llvm/MC/MCValue.h" +#include "llvm/Support/ErrorHandling.h" + +using namespace llvm_ks; + +namespace { +class AArch64ELFObjectWriter : public MCELFObjectTargetWriter { +public: + AArch64ELFObjectWriter(uint8_t OSABI, bool IsLittleEndian); + + ~AArch64ELFObjectWriter() override; + +protected: + unsigned getRelocType(MCContext &Ctx, const MCValue &Target, + const MCFixup &Fixup, bool IsPCRel) const override; + +private: +}; +} + +AArch64ELFObjectWriter::AArch64ELFObjectWriter(uint8_t OSABI, + bool IsLittleEndian) + : MCELFObjectTargetWriter(/*Is64Bit*/ true, OSABI, ELF::EM_AARCH64, + /*HasRelocationAddend*/ true) {} + +AArch64ELFObjectWriter::~AArch64ELFObjectWriter() {} + +unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx, + const MCValue &Target, + const MCFixup &Fixup, + bool IsPCRel) const { + AArch64MCExpr::VariantKind RefKind = + static_cast(Target.getRefKind()); + AArch64MCExpr::VariantKind SymLoc = AArch64MCExpr::getSymbolLoc(RefKind); + bool IsNC = AArch64MCExpr::isNotChecked(RefKind); + + assert((!Target.getSymA() || + Target.getSymA()->getKind() == MCSymbolRefExpr::VK_None) && + "Should only be expression-level modifiers here"); + + assert((!Target.getSymB() || + Target.getSymB()->getKind() == MCSymbolRefExpr::VK_None) && + "Should only be expression-level modifiers here"); + + if (IsPCRel) { + switch ((unsigned)Fixup.getKind()) { + case FK_Data_2: + return ELF::R_AARCH64_PREL16; + case FK_Data_4: + return ELF::R_AARCH64_PREL32; + case FK_Data_8: + return ELF::R_AARCH64_PREL64; + case AArch64::fixup_aarch64_pcrel_adr_imm21: + assert(SymLoc == AArch64MCExpr::VK_NONE && "unexpected ADR relocation"); + return ELF::R_AARCH64_ADR_PREL_LO21; + case AArch64::fixup_aarch64_pcrel_adrp_imm21: + if (SymLoc == AArch64MCExpr::VK_ABS && !IsNC) + return ELF::R_AARCH64_ADR_PREL_PG_HI21; + if (SymLoc == AArch64MCExpr::VK_GOT && !IsNC) + return ELF::R_AARCH64_ADR_GOT_PAGE; + if (SymLoc == AArch64MCExpr::VK_GOTTPREL && !IsNC) + return ELF::R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21; + if (SymLoc == AArch64MCExpr::VK_TLSDESC && !IsNC) + return ELF::R_AARCH64_TLSDESC_ADR_PAGE21; + llvm_unreachable("invalid symbol kind for ADRP relocation"); + case AArch64::fixup_aarch64_pcrel_branch26: + return ELF::R_AARCH64_JUMP26; + case AArch64::fixup_aarch64_pcrel_call26: + return ELF::R_AARCH64_CALL26; + case AArch64::fixup_aarch64_ldr_pcrel_imm19: + if (SymLoc == AArch64MCExpr::VK_GOTTPREL) + return ELF::R_AARCH64_TLSIE_LD_GOTTPREL_PREL19; + return ELF::R_AARCH64_LD_PREL_LO19; + case AArch64::fixup_aarch64_pcrel_branch14: + return ELF::R_AARCH64_TSTBR14; + case AArch64::fixup_aarch64_pcrel_branch19: + return ELF::R_AARCH64_CONDBR19; + default: + llvm_unreachable("Unsupported pc-relative fixup kind"); + } + } else { + switch ((unsigned)Fixup.getKind()) { + case FK_Data_2: + return ELF::R_AARCH64_ABS16; + case FK_Data_4: + return ELF::R_AARCH64_ABS32; + case FK_Data_8: + return ELF::R_AARCH64_ABS64; + case AArch64::fixup_aarch64_add_imm12: + if (RefKind == AArch64MCExpr::VK_DTPREL_HI12) + return ELF::R_AARCH64_TLSLD_ADD_DTPREL_HI12; + if (RefKind == AArch64MCExpr::VK_TPREL_HI12) + return ELF::R_AARCH64_TLSLE_ADD_TPREL_HI12; + if (RefKind == AArch64MCExpr::VK_DTPREL_LO12_NC) + return ELF::R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC; + if (RefKind == AArch64MCExpr::VK_DTPREL_LO12) + return ELF::R_AARCH64_TLSLD_ADD_DTPREL_LO12; + if (RefKind == AArch64MCExpr::VK_TPREL_LO12_NC) + return ELF::R_AARCH64_TLSLE_ADD_TPREL_LO12_NC; + if (RefKind == AArch64MCExpr::VK_TPREL_LO12) + return ELF::R_AARCH64_TLSLE_ADD_TPREL_LO12; + if (RefKind == AArch64MCExpr::VK_TLSDESC_LO12) + return ELF::R_AARCH64_TLSDESC_ADD_LO12_NC; + if (SymLoc == AArch64MCExpr::VK_ABS && IsNC) + return ELF::R_AARCH64_ADD_ABS_LO12_NC; + + report_fatal_error("invalid fixup for add (uimm12) instruction"); + return 0; + case AArch64::fixup_aarch64_ldst_imm12_scale1: + if (SymLoc == AArch64MCExpr::VK_ABS && IsNC) + return ELF::R_AARCH64_LDST8_ABS_LO12_NC; + if (SymLoc == AArch64MCExpr::VK_DTPREL && !IsNC) + return ELF::R_AARCH64_TLSLD_LDST8_DTPREL_LO12; + if (SymLoc == AArch64MCExpr::VK_DTPREL && IsNC) + return ELF::R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC; + if (SymLoc == AArch64MCExpr::VK_TPREL && !IsNC) + return ELF::R_AARCH64_TLSLE_LDST8_TPREL_LO12; + if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC) + return ELF::R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC; + + report_fatal_error("invalid fixup for 8-bit load/store instruction"); + return 0; + case AArch64::fixup_aarch64_ldst_imm12_scale2: + if (SymLoc == AArch64MCExpr::VK_ABS && IsNC) + return ELF::R_AARCH64_LDST16_ABS_LO12_NC; + if (SymLoc == AArch64MCExpr::VK_DTPREL && !IsNC) + return ELF::R_AARCH64_TLSLD_LDST16_DTPREL_LO12; + if (SymLoc == AArch64MCExpr::VK_DTPREL && IsNC) + return ELF::R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC; + if (SymLoc == AArch64MCExpr::VK_TPREL && !IsNC) + return ELF::R_AARCH64_TLSLE_LDST16_TPREL_LO12; + if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC) + return ELF::R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC; + + report_fatal_error("invalid fixup for 16-bit load/store instruction"); + return 0; + case AArch64::fixup_aarch64_ldst_imm12_scale4: + if (SymLoc == AArch64MCExpr::VK_ABS && IsNC) + return ELF::R_AARCH64_LDST32_ABS_LO12_NC; + if (SymLoc == AArch64MCExpr::VK_DTPREL && !IsNC) + return ELF::R_AARCH64_TLSLD_LDST32_DTPREL_LO12; + if (SymLoc == AArch64MCExpr::VK_DTPREL && IsNC) + return ELF::R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC; + if (SymLoc == AArch64MCExpr::VK_TPREL && !IsNC) + return ELF::R_AARCH64_TLSLE_LDST32_TPREL_LO12; + if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC) + return ELF::R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC; + + report_fatal_error("invalid fixup for 32-bit load/store instruction"); + return 0; + case AArch64::fixup_aarch64_ldst_imm12_scale8: + if (SymLoc == AArch64MCExpr::VK_ABS && IsNC) + return ELF::R_AARCH64_LDST64_ABS_LO12_NC; + if (SymLoc == AArch64MCExpr::VK_GOT && IsNC) + return ELF::R_AARCH64_LD64_GOT_LO12_NC; + if (SymLoc == AArch64MCExpr::VK_DTPREL && !IsNC) + return ELF::R_AARCH64_TLSLD_LDST64_DTPREL_LO12; + if (SymLoc == AArch64MCExpr::VK_DTPREL && IsNC) + return ELF::R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC; + if (SymLoc == AArch64MCExpr::VK_TPREL && !IsNC) + return ELF::R_AARCH64_TLSLE_LDST64_TPREL_LO12; + if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC) + return ELF::R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC; + if (SymLoc == AArch64MCExpr::VK_GOTTPREL && IsNC) + return ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC; + if (SymLoc == AArch64MCExpr::VK_TLSDESC && IsNC) + return ELF::R_AARCH64_TLSDESC_LD64_LO12_NC; + + report_fatal_error("invalid fixup for 64-bit load/store instruction"); + return 0; + case AArch64::fixup_aarch64_ldst_imm12_scale16: + if (SymLoc == AArch64MCExpr::VK_ABS && IsNC) + return ELF::R_AARCH64_LDST128_ABS_LO12_NC; + + report_fatal_error("invalid fixup for 128-bit load/store instruction"); + return 0; + case AArch64::fixup_aarch64_movw: + if (RefKind == AArch64MCExpr::VK_ABS_G3) + return ELF::R_AARCH64_MOVW_UABS_G3; + if (RefKind == AArch64MCExpr::VK_ABS_G2) + return ELF::R_AARCH64_MOVW_UABS_G2; + if (RefKind == AArch64MCExpr::VK_ABS_G2_S) + return ELF::R_AARCH64_MOVW_SABS_G2; + if (RefKind == AArch64MCExpr::VK_ABS_G2_NC) + return ELF::R_AARCH64_MOVW_UABS_G2_NC; + if (RefKind == AArch64MCExpr::VK_ABS_G1) + return ELF::R_AARCH64_MOVW_UABS_G1; + if (RefKind == AArch64MCExpr::VK_ABS_G1_S) + return ELF::R_AARCH64_MOVW_SABS_G1; + if (RefKind == AArch64MCExpr::VK_ABS_G1_NC) + return ELF::R_AARCH64_MOVW_UABS_G1_NC; + if (RefKind == AArch64MCExpr::VK_ABS_G0) + return ELF::R_AARCH64_MOVW_UABS_G0; + if (RefKind == AArch64MCExpr::VK_ABS_G0_S) + return ELF::R_AARCH64_MOVW_SABS_G0; + if (RefKind == AArch64MCExpr::VK_ABS_G0_NC) + return ELF::R_AARCH64_MOVW_UABS_G0_NC; + if (RefKind == AArch64MCExpr::VK_DTPREL_G2) + return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G2; + if (RefKind == AArch64MCExpr::VK_DTPREL_G1) + return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G1; + if (RefKind == AArch64MCExpr::VK_DTPREL_G1_NC) + return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC; + if (RefKind == AArch64MCExpr::VK_DTPREL_G0) + return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G0; + if (RefKind == AArch64MCExpr::VK_DTPREL_G0_NC) + return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC; + if (RefKind == AArch64MCExpr::VK_TPREL_G2) + return ELF::R_AARCH64_TLSLE_MOVW_TPREL_G2; + if (RefKind == AArch64MCExpr::VK_TPREL_G1) + return ELF::R_AARCH64_TLSLE_MOVW_TPREL_G1; + if (RefKind == AArch64MCExpr::VK_TPREL_G1_NC) + return ELF::R_AARCH64_TLSLE_MOVW_TPREL_G1_NC; + if (RefKind == AArch64MCExpr::VK_TPREL_G0) + return ELF::R_AARCH64_TLSLE_MOVW_TPREL_G0; + if (RefKind == AArch64MCExpr::VK_TPREL_G0_NC) + return ELF::R_AARCH64_TLSLE_MOVW_TPREL_G0_NC; + if (RefKind == AArch64MCExpr::VK_GOTTPREL_G1) + return ELF::R_AARCH64_TLSIE_MOVW_GOTTPREL_G1; + if (RefKind == AArch64MCExpr::VK_GOTTPREL_G0_NC) + return ELF::R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC; + report_fatal_error("invalid fixup for movz/movk instruction"); + return 0; + case AArch64::fixup_aarch64_tlsdesc_call: + return ELF::R_AARCH64_TLSDESC_CALL; + default: + llvm_unreachable("Unknown ELF relocation type"); + } + } + + llvm_unreachable("Unimplemented fixup -> relocation"); +} + +MCObjectWriter *llvm_ks::createAArch64ELFObjectWriter(raw_pwrite_stream &OS, + uint8_t OSABI, + bool IsLittleEndian) { + MCELFObjectTargetWriter *MOTW = + new AArch64ELFObjectWriter(OSABI, IsLittleEndian); + return createELFObjectWriter(MOTW, OS, IsLittleEndian); +} diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.h b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.h new file mode 100644 index 0000000..c2f94b4 --- /dev/null +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.h @@ -0,0 +1,26 @@ +//===-- AArch64ELFStreamer.h - ELF Streamer for AArch64 ---------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements ELF streamer information for the AArch64 backend. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64ELFSTREAMER_H +#define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64ELFSTREAMER_H + +#include "llvm/MC/MCELFStreamer.h" + +namespace llvm_ks { + +MCELFStreamer *createAArch64ELFStreamer(MCContext &Context, MCAsmBackend &TAB, + raw_pwrite_stream &OS, + MCCodeEmitter *Emitter, bool RelaxAll); +} + +#endif diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64FixupKinds.h b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64FixupKinds.h new file mode 100644 index 0000000..acd1c1f --- /dev/null +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64FixupKinds.h @@ -0,0 +1,76 @@ +//===-- AArch64FixupKinds.h - AArch64 Specific Fixup Entries ----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64FIXUPKINDS_H +#define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64FIXUPKINDS_H + +#include "llvm/MC/MCFixup.h" + +namespace llvm_ks { +namespace AArch64 { + +enum Fixups { + // fixup_aarch64_pcrel_adr_imm21 - A 21-bit pc-relative immediate inserted into + // an ADR instruction. + fixup_aarch64_pcrel_adr_imm21 = FirstTargetFixupKind, + + // fixup_aarch64_pcrel_adrp_imm21 - A 21-bit pc-relative immediate inserted into + // an ADRP instruction. + fixup_aarch64_pcrel_adrp_imm21, + + // fixup_aarch64_imm12 - 12-bit fixup for add/sub instructions. + // No alignment adjustment. All value bits are encoded. + fixup_aarch64_add_imm12, + + // fixup_aarch64_ldst_imm12_* - unsigned 12-bit fixups for load and + // store instructions. + fixup_aarch64_ldst_imm12_scale1, + fixup_aarch64_ldst_imm12_scale2, + fixup_aarch64_ldst_imm12_scale4, + fixup_aarch64_ldst_imm12_scale8, + fixup_aarch64_ldst_imm12_scale16, + + // fixup_aarch64_ldr_pcrel_imm19 - The high 19 bits of a 21-bit pc-relative + // immediate. Same encoding as fixup_aarch64_pcrel_adrhi, except this is used by + // pc-relative loads and generates relocations directly when necessary. + fixup_aarch64_ldr_pcrel_imm19, + + // FIXME: comment + fixup_aarch64_movw, + + // fixup_aarch64_pcrel_imm14 - The high 14 bits of a 21-bit pc-relative + // immediate. + fixup_aarch64_pcrel_branch14, + + // fixup_aarch64_pcrel_branch19 - The high 19 bits of a 21-bit pc-relative + // immediate. Same encoding as fixup_aarch64_pcrel_adrhi, except this is use by + // b.cc and generates relocations directly when necessary. + fixup_aarch64_pcrel_branch19, + + // fixup_aarch64_pcrel_branch26 - The high 26 bits of a 28-bit pc-relative + // immediate. + fixup_aarch64_pcrel_branch26, + + // fixup_aarch64_pcrel_call26 - The high 26 bits of a 28-bit pc-relative + // immediate. Distinguished from branch26 only on ELF. + fixup_aarch64_pcrel_call26, + + // fixup_aarch64_tlsdesc_call - zero-space placeholder for the ELF + // R_AARCH64_TLSDESC_CALL relocation. + fixup_aarch64_tlsdesc_call, + + // Marker + LastTargetFixupKind, + NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind +}; + +} // end namespace AArch64 +} // end namespace llvm_ks + +#endif diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp new file mode 100644 index 0000000..9a2b07a --- /dev/null +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp @@ -0,0 +1,96 @@ +//===-- AArch64MCAsmInfo.cpp - AArch64 asm properties ---------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains the declarations of the AArch64MCAsmInfo properties. +// +//===----------------------------------------------------------------------===// + +#include "AArch64MCAsmInfo.h" +#include "llvm/ADT/Triple.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCStreamer.h" + +using namespace llvm_ks; + +enum AsmWriterVariantTy { + Default = -1, + Generic = 0, + Apple = 1 +}; + +static AsmWriterVariantTy AsmWriterVariant = Default; + +AArch64MCAsmInfoDarwin::AArch64MCAsmInfoDarwin() { + // We prefer NEON instructions to be printed in the short form. + AssemblerDialect = AsmWriterVariant == Default ? 1 : AsmWriterVariant; + + PrivateGlobalPrefix = "L"; + PrivateLabelPrefix = "L"; + SeparatorString = "%%"; + CommentString = ";"; + PointerSize = CalleeSaveStackSlotSize = 8; + + AlignmentIsInBytes = false; + UsesELFSectionDirectiveForBSS = true; + SupportsDebugInformation = true; + UseDataRegionDirectives = true; + + ExceptionsType = ExceptionHandling::DwarfCFI; +} + +const MCExpr *AArch64MCAsmInfoDarwin::getExprForPersonalitySymbol( + const MCSymbol *Sym, unsigned Encoding, MCStreamer &Streamer) const { + // On Darwin, we can reference dwarf symbols with foo@GOT-., which + // is an indirect pc-relative reference. The default implementation + // won't reference using the GOT, so we need this target-specific + // version. + MCContext &Context = Streamer.getContext(); + const MCExpr *Res = + MCSymbolRefExpr::create(Sym, MCSymbolRefExpr::VK_GOT, Context); + MCSymbol *PCSym = Context.createTempSymbol(); + Streamer.EmitLabel(PCSym); + const MCExpr *PC = MCSymbolRefExpr::create(PCSym, Context); + return MCBinaryExpr::createSub(Res, PC, Context); +} + +AArch64MCAsmInfoELF::AArch64MCAsmInfoELF(const Triple &T) { + if (T.getArch() == Triple::aarch64_be) + IsLittleEndian = false; + + // We prefer NEON instructions to be printed in the short form. + AssemblerDialect = AsmWriterVariant == Default ? 0 : AsmWriterVariant; + + PointerSize = 8; + + // ".comm align is in bytes but .align is pow-2." + AlignmentIsInBytes = false; + + CommentString = "//"; + PrivateGlobalPrefix = ".L"; + PrivateLabelPrefix = ".L"; + Code32Directive = ".code\t32"; + + Data16bitsDirective = "\t.hword\t"; + Data32bitsDirective = "\t.word\t"; + Data64bitsDirective = "\t.xword\t"; + + UseDataRegionDirectives = false; + + WeakRefDirective = "\t.weak\t"; + + SupportsDebugInformation = true; + + // Exceptions handling + ExceptionsType = ExceptionHandling::DwarfCFI; + + UseIntegratedAssembler = true; + + HasIdentDirective = true; +} diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.h b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.h new file mode 100644 index 0000000..6b39a02 --- /dev/null +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.h @@ -0,0 +1,38 @@ +//=====-- AArch64MCAsmInfo.h - AArch64 asm properties ---------*- C++ -*--====// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains the declaration of the AArch64MCAsmInfo class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCASMINFO_H +#define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCASMINFO_H + +#include "llvm/MC/MCAsmInfoDarwin.h" +#include "llvm/MC/MCAsmInfoELF.h" + +namespace llvm_ks { +class MCStreamer; +class Target; +class Triple; + +struct AArch64MCAsmInfoDarwin : public MCAsmInfoDarwin { + explicit AArch64MCAsmInfoDarwin(); + const MCExpr * + getExprForPersonalitySymbol(const MCSymbol *Sym, unsigned Encoding, + MCStreamer &Streamer) const override; +}; + +struct AArch64MCAsmInfoELF : public MCAsmInfoELF { + explicit AArch64MCAsmInfoELF(const Triple &T); +}; + +} // namespace llvm_ks + +#endif diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp new file mode 100644 index 0000000..c07084e --- /dev/null +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp @@ -0,0 +1,576 @@ +//=- AArch64/AArch64MCCodeEmitter.cpp - Convert AArch64 code to machine code-=// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the AArch64MCCodeEmitter class. +// +//===----------------------------------------------------------------------===// + +#include "MCTargetDesc/AArch64AddressingModes.h" +#include "MCTargetDesc/AArch64FixupKinds.h" +#include "MCTargetDesc/AArch64MCExpr.h" +#include "Utils/AArch64BaseInfo.h" +#include "llvm/MC/MCCodeEmitter.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCInst.h" +#include "llvm/MC/MCInstrInfo.h" +#include "llvm/MC/MCRegisterInfo.h" +#include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/Support/EndianStream.h" +#include "llvm/Support/raw_ostream.h" +using namespace llvm_ks; + +#define DEBUG_TYPE "mccodeemitter" + + +namespace { + +class AArch64MCCodeEmitter : public MCCodeEmitter { + MCContext &Ctx; + + AArch64MCCodeEmitter(const AArch64MCCodeEmitter &); // DO NOT IMPLEMENT + void operator=(const AArch64MCCodeEmitter &); // DO NOT IMPLEMENT +public: + AArch64MCCodeEmitter(const MCInstrInfo &mcii, MCContext &ctx) : Ctx(ctx) {} + + ~AArch64MCCodeEmitter() override {} + + // getBinaryCodeForInstr - TableGen'erated function for getting the + // binary encoding for an instruction. + uint64_t getBinaryCodeForInstr(const MCInst &MI, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + + /// getMachineOpValue - Return binary encoding of operand. If the machine + /// operand requires relocation, record the relocation and return zero. + unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + + /// getLdStUImm12OpValue - Return encoding info for 12-bit unsigned immediate + /// attached to a load, store or prfm instruction. If operand requires a + /// relocation, record it and return zero in that part of the encoding. + template + uint32_t getLdStUImm12OpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + + /// getAdrLabelOpValue - Return encoding info for 21-bit immediate ADR label + /// target. + uint32_t getAdrLabelOpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + + /// getAddSubImmOpValue - Return encoding for the 12-bit immediate value and + /// the 2-bit shift field. + uint32_t getAddSubImmOpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + + /// getCondBranchTargetOpValue - Return the encoded value for a conditional + /// branch target. + uint32_t getCondBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + + /// getLoadLiteralOpValue - Return the encoded value for a load-literal + /// pc-relative address. + uint32_t getLoadLiteralOpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + + /// getMemExtendOpValue - Return the encoded value for a reg-extend load/store + /// instruction: bit 0 is whether a shift is present, bit 1 is whether the + /// operation is a sign extend (as opposed to a zero extend). + uint32_t getMemExtendOpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + + /// getTestBranchTargetOpValue - Return the encoded value for a test-bit-and- + /// branch target. + uint32_t getTestBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + + /// getBranchTargetOpValue - Return the encoded value for an unconditional + /// branch target. + uint32_t getBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + + /// getMoveWideImmOpValue - Return the encoded value for the immediate operand + /// of a MOVZ or MOVK instruction. + uint32_t getMoveWideImmOpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + + /// getVecShifterOpValue - Return the encoded value for the vector shifter. + uint32_t getVecShifterOpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + + /// getMoveVecShifterOpValue - Return the encoded value for the vector move + /// shifter (MSL). + uint32_t getMoveVecShifterOpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + + /// getFixedPointScaleOpValue - Return the encoded value for the + // FP-to-fixed-point scale factor. + uint32_t getFixedPointScaleOpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + + uint32_t getVecShiftR64OpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + uint32_t getVecShiftR32OpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + uint32_t getVecShiftR16OpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + uint32_t getVecShiftR8OpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + uint32_t getVecShiftL64OpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + uint32_t getVecShiftL32OpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + uint32_t getVecShiftL16OpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + uint32_t getVecShiftL8OpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const; + + unsigned fixMOVZ(const MCInst &MI, unsigned EncodedValue, + const MCSubtargetInfo &STI) const; + + void encodeInstruction(MCInst &MI, raw_ostream &OS, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI, + unsigned int &KsError) const override; + + unsigned fixMulHigh(const MCInst &MI, unsigned EncodedValue, + const MCSubtargetInfo &STI) const; + + template unsigned + fixLoadStoreExclusive(const MCInst &MI, unsigned EncodedValue, + const MCSubtargetInfo &STI) const; + + unsigned fixOneOperandFPComparison(const MCInst &MI, unsigned EncodedValue, + const MCSubtargetInfo &STI) const; +}; + +} // end anonymous namespace + +MCCodeEmitter *llvm_ks::createAArch64MCCodeEmitter(const MCInstrInfo &MCII, + const MCRegisterInfo &MRI, + MCContext &Ctx) { + return new AArch64MCCodeEmitter(MCII, Ctx); +} + +/// getMachineOpValue - Return binary encoding of operand. If the machine +/// operand requires relocation, record the relocation and return zero. +unsigned +AArch64MCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + if (MO.isReg()) + return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); + + assert(MO.isImm() && "did not expect relocated expression"); + return static_cast(MO.getImm()); +} + +template uint32_t +AArch64MCCodeEmitter::getLdStUImm12OpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + const MCOperand &MO = MI.getOperand(OpIdx); + uint32_t ImmVal = 0; + + if (MO.isImm()) + ImmVal = static_cast(MO.getImm()); + else { + assert(MO.isExpr() && "unable to encode load/store imm operand"); + MCFixupKind Kind = MCFixupKind(FixupKind); + Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc())); + } + + return ImmVal; +} + +/// getAdrLabelOpValue - Return encoding info for 21-bit immediate ADR label +/// target. +uint32_t +AArch64MCCodeEmitter::getAdrLabelOpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + const MCOperand &MO = MI.getOperand(OpIdx); + + // If the destination is an immediate, we have nothing to do. + if (MO.isImm()) + return MO.getImm() - (MI.getAddress() >> 12); + assert(MO.isExpr() && "Unexpected target type!"); + const MCExpr *Expr = MO.getExpr(); + + MCFixupKind Kind = MI.getOpcode() == AArch64::ADR + ? MCFixupKind(AArch64::fixup_aarch64_pcrel_adr_imm21) + : MCFixupKind(AArch64::fixup_aarch64_pcrel_adrp_imm21); + Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc())); + + // All of the information is in the fixup. + return 0; +} + +/// getAddSubImmOpValue - Return encoding for the 12-bit immediate value and +/// the 2-bit shift field. The shift field is stored in bits 13-14 of the +/// return value. +uint32_t +AArch64MCCodeEmitter::getAddSubImmOpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + // Suboperands are [imm, shifter]. + const MCOperand &MO = MI.getOperand(OpIdx); + const MCOperand &MO1 = MI.getOperand(OpIdx + 1); + assert(AArch64_AM::getShiftType(MO1.getImm()) == AArch64_AM::LSL && + "unexpected shift type for add/sub immediate"); + unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); + assert((ShiftVal == 0 || ShiftVal == 12) && + "unexpected shift value for add/sub immediate"); + if (MO.isImm()) + return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << 12)); + assert(MO.isExpr() && "Unable to encode MCOperand!"); + const MCExpr *Expr = MO.getExpr(); + + // Encode the 12 bits of the fixup. + MCFixupKind Kind = MCFixupKind(AArch64::fixup_aarch64_add_imm12); + Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc())); + + return 0; +} + +/// getCondBranchTargetOpValue - Return the encoded value for a conditional +/// branch target. +uint32_t AArch64MCCodeEmitter::getCondBranchTargetOpValue( + const MCInst &MI, unsigned OpIdx, SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + const MCOperand &MO = MI.getOperand(OpIdx); + + // If the destination is an immediate, we have nothing to do. + if (MO.isImm()) + return (MO.getImm() * 4 - MI.getAddress()) / 4; + assert(MO.isExpr() && "Unexpected target type!"); + + MCFixupKind Kind = MCFixupKind(AArch64::fixup_aarch64_pcrel_branch19); + Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc())); + + // All of the information is in the fixup. + return 0; +} + +/// getLoadLiteralOpValue - Return the encoded value for a load-literal +/// pc-relative address. +uint32_t +AArch64MCCodeEmitter::getLoadLiteralOpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + const MCOperand &MO = MI.getOperand(OpIdx); + + // If the destination is an immediate, we have nothing to do. + if (MO.isImm()) + return (MO.getImm() * 4 - MI.getAddress()) / 4; + assert(MO.isExpr() && "Unexpected target type!"); + + MCFixupKind Kind = MCFixupKind(AArch64::fixup_aarch64_ldr_pcrel_imm19); + Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc())); + + // All of the information is in the fixup. + return 0; +} + +uint32_t +AArch64MCCodeEmitter::getMemExtendOpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + unsigned SignExtend = MI.getOperand(OpIdx).getImm(); + unsigned DoShift = MI.getOperand(OpIdx + 1).getImm(); + return (SignExtend << 1) | DoShift; +} + +uint32_t +AArch64MCCodeEmitter::getMoveWideImmOpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + const MCOperand &MO = MI.getOperand(OpIdx); + + if (MO.isImm()) + return MO.getImm(); + assert(MO.isExpr() && "Unexpected movz/movk immediate"); + + Fixups.push_back(MCFixup::create( + 0, MO.getExpr(), MCFixupKind(AArch64::fixup_aarch64_movw), MI.getLoc())); + + return 0; +} + +/// getTestBranchTargetOpValue - Return the encoded value for a test-bit-and- +/// branch target. +uint32_t AArch64MCCodeEmitter::getTestBranchTargetOpValue( + const MCInst &MI, unsigned OpIdx, SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + const MCOperand &MO = MI.getOperand(OpIdx); + + // If the destination is an immediate, we have nothing to do. + if (MO.isImm()) + return (MO.getImm() * 4 - MI.getAddress()) / 4; + assert(MO.isExpr() && "Unexpected ADR target type!"); + + MCFixupKind Kind = MCFixupKind(AArch64::fixup_aarch64_pcrel_branch14); + Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc())); + + // All of the information is in the fixup. + return 0; +} + +/// getBranchTargetOpValue - Return the encoded value for an unconditional +/// branch target. +uint32_t +AArch64MCCodeEmitter::getBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + const MCOperand &MO = MI.getOperand(OpIdx); + + // If the destination is an immediate, we have nothing to do. + if (MO.isImm()) { + // encode relative address + return (MO.getImm() * 4 - MI.getAddress()) / 4; + } + assert(MO.isExpr() && "Unexpected ADR target type!"); + + MCFixupKind Kind = MI.getOpcode() == AArch64::BL + ? MCFixupKind(AArch64::fixup_aarch64_pcrel_call26) + : MCFixupKind(AArch64::fixup_aarch64_pcrel_branch26); + Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc())); + + // All of the information is in the fixup. + return 0; +} + +/// getVecShifterOpValue - Return the encoded value for the vector shifter: +/// +/// 00 -> 0 +/// 01 -> 8 +/// 10 -> 16 +/// 11 -> 24 +uint32_t +AArch64MCCodeEmitter::getVecShifterOpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + const MCOperand &MO = MI.getOperand(OpIdx); + assert(MO.isImm() && "Expected an immediate value for the shift amount!"); + + switch (MO.getImm()) { + default: + break; + case 0: + return 0; + case 8: + return 1; + case 16: + return 2; + case 24: + return 3; + } + + llvm_unreachable("Invalid value for vector shift amount!"); +} + +/// getFixedPointScaleOpValue - Return the encoded value for the +// FP-to-fixed-point scale factor. +uint32_t AArch64MCCodeEmitter::getFixedPointScaleOpValue( + const MCInst &MI, unsigned OpIdx, SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + const MCOperand &MO = MI.getOperand(OpIdx); + assert(MO.isImm() && "Expected an immediate value for the scale amount!"); + return 64 - MO.getImm(); +} + +uint32_t +AArch64MCCodeEmitter::getVecShiftR64OpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + const MCOperand &MO = MI.getOperand(OpIdx); + assert(MO.isImm() && "Expected an immediate value for the scale amount!"); + return 64 - MO.getImm(); +} + +uint32_t +AArch64MCCodeEmitter::getVecShiftR32OpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + const MCOperand &MO = MI.getOperand(OpIdx); + assert(MO.isImm() && "Expected an immediate value for the scale amount!"); + return 32 - MO.getImm(); +} + +uint32_t +AArch64MCCodeEmitter::getVecShiftR16OpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + const MCOperand &MO = MI.getOperand(OpIdx); + assert(MO.isImm() && "Expected an immediate value for the scale amount!"); + return 16 - MO.getImm(); +} + +uint32_t +AArch64MCCodeEmitter::getVecShiftR8OpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + const MCOperand &MO = MI.getOperand(OpIdx); + assert(MO.isImm() && "Expected an immediate value for the scale amount!"); + return 8 - MO.getImm(); +} + +uint32_t +AArch64MCCodeEmitter::getVecShiftL64OpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + const MCOperand &MO = MI.getOperand(OpIdx); + assert(MO.isImm() && "Expected an immediate value for the scale amount!"); + return MO.getImm() - 64; +} + +uint32_t +AArch64MCCodeEmitter::getVecShiftL32OpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + const MCOperand &MO = MI.getOperand(OpIdx); + assert(MO.isImm() && "Expected an immediate value for the scale amount!"); + return MO.getImm() - 32; +} + +uint32_t +AArch64MCCodeEmitter::getVecShiftL16OpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + const MCOperand &MO = MI.getOperand(OpIdx); + assert(MO.isImm() && "Expected an immediate value for the scale amount!"); + return MO.getImm() - 16; +} + +uint32_t +AArch64MCCodeEmitter::getVecShiftL8OpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + const MCOperand &MO = MI.getOperand(OpIdx); + assert(MO.isImm() && "Expected an immediate value for the scale amount!"); + return MO.getImm() - 8; +} + +/// getMoveVecShifterOpValue - Return the encoded value for the vector move +/// shifter (MSL). +uint32_t AArch64MCCodeEmitter::getMoveVecShifterOpValue( + const MCInst &MI, unsigned OpIdx, SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + const MCOperand &MO = MI.getOperand(OpIdx); + assert(MO.isImm() && + "Expected an immediate value for the move shift amount!"); + unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); + assert((ShiftVal == 8 || ShiftVal == 16) && "Invalid shift amount!"); + return ShiftVal == 8 ? 0 : 1; +} + +unsigned AArch64MCCodeEmitter::fixMOVZ(const MCInst &MI, unsigned EncodedValue, + const MCSubtargetInfo &STI) const { + // If one of the signed fixup kinds is applied to a MOVZ instruction, the + // eventual result could be either a MOVZ or a MOVN. It's the MCCodeEmitter's + // job to ensure that any bits possibly affected by this are 0. This means we + // must zero out bit 30 (essentially emitting a MOVN). + MCOperand UImm16MO = MI.getOperand(1); + + // Nothing to do if there's no fixup. + if (UImm16MO.isImm()) + return EncodedValue; + + const AArch64MCExpr *A64E = cast(UImm16MO.getExpr()); + switch (A64E->getKind()) { + case AArch64MCExpr::VK_DTPREL_G2: + case AArch64MCExpr::VK_DTPREL_G1: + case AArch64MCExpr::VK_DTPREL_G0: + case AArch64MCExpr::VK_GOTTPREL_G1: + case AArch64MCExpr::VK_TPREL_G2: + case AArch64MCExpr::VK_TPREL_G1: + case AArch64MCExpr::VK_TPREL_G0: + return EncodedValue & ~(1u << 30); + default: + // Nothing to do for an unsigned fixup. + return EncodedValue; + } + + + return EncodedValue & ~(1u << 30); +} + +void AArch64MCCodeEmitter::encodeInstruction(MCInst &MI, raw_ostream &OS, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI, + unsigned int &KsError) const +{ + KsError = 0; +#if 0 + if (MI.getOpcode() == AArch64::TLSDESCCALL) { + // This is a directive which applies an R_AARCH64_TLSDESC_CALL to the + // following (BLR) instruction. It doesn't emit any code itself so it + // doesn't go through the normal TableGenerated channels. + MCFixupKind Fixup = MCFixupKind(AArch64::fixup_aarch64_tlsdesc_call); + Fixups.push_back(MCFixup::create(0, MI.getOperand(0).getExpr(), Fixup)); + return; + } +#endif + + uint64_t Binary = getBinaryCodeForInstr(MI, Fixups, STI); + support::endian::Writer(OS).write(Binary); + + // Keystone: update Inst.Address to point to the next instruction + MI.setAddress(MI.getAddress() + 4); +} + +unsigned +AArch64MCCodeEmitter::fixMulHigh(const MCInst &MI, + unsigned EncodedValue, + const MCSubtargetInfo &STI) const { + // The Ra field of SMULH and UMULH is unused: it should be assembled as 31 + // (i.e. all bits 1) but is ignored by the processor. + EncodedValue |= 0x1f << 10; + return EncodedValue; +} + +template unsigned +AArch64MCCodeEmitter::fixLoadStoreExclusive(const MCInst &MI, + unsigned EncodedValue, + const MCSubtargetInfo &STI) const { + if (!hasRs) EncodedValue |= 0x001F0000; + if (!hasRt2) EncodedValue |= 0x00007C00; + + return EncodedValue; +} + +unsigned AArch64MCCodeEmitter::fixOneOperandFPComparison( + const MCInst &MI, unsigned EncodedValue, const MCSubtargetInfo &STI) const { + // The Rm field of FCMP and friends is unused - it should be assembled + // as 0, but is ignored by the processor. + EncodedValue &= ~(0x1f << 16); + return EncodedValue; +} + +#include "AArch64GenMCCodeEmitter.inc" diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp new file mode 100644 index 0000000..7d34cfe --- /dev/null +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp @@ -0,0 +1,145 @@ +//===-- AArch64MCExpr.cpp - AArch64 specific MC expression classes --------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains the implementation of the assembly expression modifiers +// accepted by the AArch64 architecture (e.g. ":lo12:", ":gottprel_g1:", ...). +// +//===----------------------------------------------------------------------===// + +#include "AArch64MCExpr.h" +#include "llvm/MC/MCAssembler.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCStreamer.h" +#include "llvm/MC/MCSymbolELF.h" +#include "llvm/MC/MCValue.h" +#include "llvm/Object/ELF.h" +#include "llvm/Support/ErrorHandling.h" + +using namespace llvm_ks; + +#define DEBUG_TYPE "aarch64symbolrefexpr" + +const AArch64MCExpr *AArch64MCExpr::create(const MCExpr *Expr, VariantKind Kind, + MCContext &Ctx) { + return new (Ctx) AArch64MCExpr(Expr, Kind); +} + +StringRef AArch64MCExpr::getVariantKindName() const { + switch (static_cast(getKind())) { + case VK_CALL: return ""; + case VK_LO12: return ":lo12:"; + case VK_ABS_G3: return ":abs_g3:"; + case VK_ABS_G2: return ":abs_g2:"; + case VK_ABS_G2_S: return ":abs_g2_s:"; + case VK_ABS_G2_NC: return ":abs_g2_nc:"; + case VK_ABS_G1: return ":abs_g1:"; + case VK_ABS_G1_S: return ":abs_g1_s:"; + case VK_ABS_G1_NC: return ":abs_g1_nc:"; + case VK_ABS_G0: return ":abs_g0:"; + case VK_ABS_G0_S: return ":abs_g0_s:"; + case VK_ABS_G0_NC: return ":abs_g0_nc:"; + case VK_DTPREL_G2: return ":dtprel_g2:"; + case VK_DTPREL_G1: return ":dtprel_g1:"; + case VK_DTPREL_G1_NC: return ":dtprel_g1_nc:"; + case VK_DTPREL_G0: return ":dtprel_g0:"; + case VK_DTPREL_G0_NC: return ":dtprel_g0_nc:"; + case VK_DTPREL_HI12: return ":dtprel_hi12:"; + case VK_DTPREL_LO12: return ":dtprel_lo12:"; + case VK_DTPREL_LO12_NC: return ":dtprel_lo12_nc:"; + case VK_TPREL_G2: return ":tprel_g2:"; + case VK_TPREL_G1: return ":tprel_g1:"; + case VK_TPREL_G1_NC: return ":tprel_g1_nc:"; + case VK_TPREL_G0: return ":tprel_g0:"; + case VK_TPREL_G0_NC: return ":tprel_g0_nc:"; + case VK_TPREL_HI12: return ":tprel_hi12:"; + case VK_TPREL_LO12: return ":tprel_lo12:"; + case VK_TPREL_LO12_NC: return ":tprel_lo12_nc:"; + case VK_TLSDESC_LO12: return ":tlsdesc_lo12:"; + case VK_ABS_PAGE: return ""; + case VK_GOT_PAGE: return ":got:"; + case VK_GOT_LO12: return ":got_lo12:"; + case VK_GOTTPREL_PAGE: return ":gottprel:"; + case VK_GOTTPREL_LO12_NC: return ":gottprel_lo12:"; + case VK_GOTTPREL_G1: return ":gottprel_g1:"; + case VK_GOTTPREL_G0_NC: return ":gottprel_g0_nc:"; + case VK_TLSDESC: return ""; + case VK_TLSDESC_PAGE: return ":tlsdesc:"; + default: + llvm_unreachable("Invalid ELF symbol kind"); + } +} + +void AArch64MCExpr::printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const { + if (getKind() != VK_NONE) + OS << getVariantKindName(); + Expr->print(OS, MAI); +} + +void AArch64MCExpr::visitUsedExpr(MCStreamer &Streamer) const { + Streamer.visitUsedExpr(*getSubExpr()); +} + +MCFragment *AArch64MCExpr::findAssociatedFragment() const { + llvm_unreachable("FIXME: what goes here?"); +} + +bool AArch64MCExpr::evaluateAsRelocatableImpl(MCValue &Res, + const MCAsmLayout *Layout, + const MCFixup *Fixup) const { + if (!getSubExpr()->evaluateAsRelocatable(Res, Layout, Fixup)) + return false; + + Res = + MCValue::get(Res.getSymA(), Res.getSymB(), Res.getConstant(), getKind()); + + return true; +} + +static void fixELFSymbolsInTLSFixupsImpl(const MCExpr *Expr, MCAssembler &Asm) { + switch (Expr->getKind()) { + case MCExpr::Target: + llvm_unreachable("Can't handle nested target expression"); + break; + case MCExpr::Constant: + break; + + case MCExpr::Binary: { + const MCBinaryExpr *BE = cast(Expr); + fixELFSymbolsInTLSFixupsImpl(BE->getLHS(), Asm); + fixELFSymbolsInTLSFixupsImpl(BE->getRHS(), Asm); + break; + } + + case MCExpr::SymbolRef: { + // We're known to be under a TLS fixup, so any symbol should be + // modified. There should be only one. + const MCSymbolRefExpr &SymRef = *cast(Expr); + cast(SymRef.getSymbol()).setType(ELF::STT_TLS); + break; + } + + case MCExpr::Unary: + fixELFSymbolsInTLSFixupsImpl(cast(Expr)->getSubExpr(), Asm); + break; + } +} + +void AArch64MCExpr::fixELFSymbolsInTLSFixups(MCAssembler &Asm) const { + switch (getSymbolLoc(Kind)) { + default: + return; + case VK_DTPREL: + case VK_GOTTPREL: + case VK_TPREL: + case VK_TLSDESC: + break; + } + + fixELFSymbolsInTLSFixupsImpl(getSubExpr(), Asm); +} diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h new file mode 100644 index 0000000..59c30bf --- /dev/null +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h @@ -0,0 +1,167 @@ +//=--- AArch64MCExpr.h - AArch64 specific MC expression classes ---*- C++ -*-=// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file describes AArch64-specific MCExprs, used for modifiers like +// ":lo12:" or ":gottprel_g1:". +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCEXPR_H +#define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCEXPR_H + +#include "llvm/MC/MCExpr.h" +#include "llvm/Support/ErrorHandling.h" + +namespace llvm_ks { + +class AArch64MCExpr : public MCTargetExpr { +public: + enum VariantKind { + VK_NONE = 0x000, + + // Symbol locations specifying (roughly speaking) what calculation should be + // performed to construct the final address for the relocated + // symbol. E.g. direct, via the GOT, ... + VK_ABS = 0x001, + VK_SABS = 0x002, + VK_GOT = 0x003, + VK_DTPREL = 0x004, + VK_GOTTPREL = 0x005, + VK_TPREL = 0x006, + VK_TLSDESC = 0x007, + VK_SymLocBits = 0x00f, + + // Variants specifying which part of the final address calculation is + // used. E.g. the low 12 bits for an ADD/LDR, the middle 16 bits for a + // MOVZ/MOVK. + VK_PAGE = 0x010, + VK_PAGEOFF = 0x020, + VK_HI12 = 0x030, + VK_G0 = 0x040, + VK_G1 = 0x050, + VK_G2 = 0x060, + VK_G3 = 0x070, + VK_AddressFragBits = 0x0f0, + + // Whether the final relocation is a checked one (where a linker should + // perform a range-check on the final address) or not. Note that this field + // is unfortunately sometimes omitted from the assembly syntax. E.g. :lo12: + // on its own is a non-checked relocation. We side with ELF on being + // explicit about this! + VK_NC = 0x100, + + // Convenience definitions for referring to specific textual representations + // of relocation specifiers. Note that this means the "_NC" is sometimes + // omitted in line with assembly syntax here (VK_LO12 rather than VK_LO12_NC + // since a user would write ":lo12:"). + VK_CALL = VK_ABS, + VK_ABS_PAGE = VK_ABS | VK_PAGE, + VK_ABS_G3 = VK_ABS | VK_G3, + VK_ABS_G2 = VK_ABS | VK_G2, + VK_ABS_G2_S = VK_SABS | VK_G2, + VK_ABS_G2_NC = VK_ABS | VK_G2 | VK_NC, + VK_ABS_G1 = VK_ABS | VK_G1, + VK_ABS_G1_S = VK_SABS | VK_G1, + VK_ABS_G1_NC = VK_ABS | VK_G1 | VK_NC, + VK_ABS_G0 = VK_ABS | VK_G0, + VK_ABS_G0_S = VK_SABS | VK_G0, + VK_ABS_G0_NC = VK_ABS | VK_G0 | VK_NC, + VK_LO12 = VK_ABS | VK_PAGEOFF | VK_NC, + VK_GOT_LO12 = VK_GOT | VK_PAGEOFF | VK_NC, + VK_GOT_PAGE = VK_GOT | VK_PAGE, + VK_DTPREL_G2 = VK_DTPREL | VK_G2, + VK_DTPREL_G1 = VK_DTPREL | VK_G1, + VK_DTPREL_G1_NC = VK_DTPREL | VK_G1 | VK_NC, + VK_DTPREL_G0 = VK_DTPREL | VK_G0, + VK_DTPREL_G0_NC = VK_DTPREL | VK_G0 | VK_NC, + VK_DTPREL_HI12 = VK_DTPREL | VK_HI12, + VK_DTPREL_LO12 = VK_DTPREL | VK_PAGEOFF, + VK_DTPREL_LO12_NC = VK_DTPREL | VK_PAGEOFF | VK_NC, + VK_GOTTPREL_PAGE = VK_GOTTPREL | VK_PAGE, + VK_GOTTPREL_LO12_NC = VK_GOTTPREL | VK_PAGEOFF | VK_NC, + VK_GOTTPREL_G1 = VK_GOTTPREL | VK_G1, + VK_GOTTPREL_G0_NC = VK_GOTTPREL | VK_G0 | VK_NC, + VK_TPREL_G2 = VK_TPREL | VK_G2, + VK_TPREL_G1 = VK_TPREL | VK_G1, + VK_TPREL_G1_NC = VK_TPREL | VK_G1 | VK_NC, + VK_TPREL_G0 = VK_TPREL | VK_G0, + VK_TPREL_G0_NC = VK_TPREL | VK_G0 | VK_NC, + VK_TPREL_HI12 = VK_TPREL | VK_HI12, + VK_TPREL_LO12 = VK_TPREL | VK_PAGEOFF, + VK_TPREL_LO12_NC = VK_TPREL | VK_PAGEOFF | VK_NC, + VK_TLSDESC_LO12 = VK_TLSDESC | VK_PAGEOFF | VK_NC, + VK_TLSDESC_PAGE = VK_TLSDESC | VK_PAGE, + + VK_INVALID = 0xfff + }; + +private: + const MCExpr *Expr; + const VariantKind Kind; + + explicit AArch64MCExpr(const MCExpr *Expr, VariantKind Kind) + : Expr(Expr), Kind(Kind) {} + +public: + /// @name Construction + /// @{ + + static const AArch64MCExpr *create(const MCExpr *Expr, VariantKind Kind, + MCContext &Ctx); + + /// @} + /// @name Accessors + /// @{ + + /// Get the kind of this expression. + VariantKind getKind() const { return Kind; } + + /// Get the expression this modifier applies to. + const MCExpr *getSubExpr() const { return Expr; } + + /// @} + /// @name VariantKind information extractors. + /// @{ + + static VariantKind getSymbolLoc(VariantKind Kind) { + return static_cast(Kind & VK_SymLocBits); + } + + static VariantKind getAddressFrag(VariantKind Kind) { + return static_cast(Kind & VK_AddressFragBits); + } + + static bool isNotChecked(VariantKind Kind) { return Kind & VK_NC; } + + /// @} + + /// Convert the variant kind into an ELF-appropriate modifier + /// (e.g. ":got:", ":lo12:"). + StringRef getVariantKindName() const; + + void printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const override; + + void visitUsedExpr(MCStreamer &Streamer) const override; + + MCFragment *findAssociatedFragment() const override; + + bool evaluateAsRelocatableImpl(MCValue &Res, const MCAsmLayout *Layout, + const MCFixup *Fixup) const override; + + void fixELFSymbolsInTLSFixups(MCAssembler &Asm) const override; + + static bool classof(const MCExpr *E) { + return E->getKind() == MCExpr::Target; + } + + static bool classof(const AArch64MCExpr *) { return true; } +}; +} // end namespace llvm_ks + +#endif diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp new file mode 100644 index 0000000..971b8a4 --- /dev/null +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp @@ -0,0 +1,99 @@ +//===-- AArch64MCTargetDesc.cpp - AArch64 Target Descriptions ---*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file provides AArch64 specific target descriptions. +// +//===----------------------------------------------------------------------===// + +#include "AArch64MCTargetDesc.h" +#include "AArch64ELFStreamer.h" +#include "AArch64MCAsmInfo.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/MC/MCInstrInfo.h" +#include "llvm/MC/MCRegisterInfo.h" +#include "llvm/MC/MCStreamer.h" +#include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/TargetRegistry.h" + +using namespace llvm_ks; + +#define GET_INSTRINFO_MC_DESC +#include "AArch64GenInstrInfo.inc" + +#define GET_SUBTARGETINFO_MC_DESC +#include "AArch64GenSubtargetInfo.inc" + +#define GET_REGINFO_MC_DESC +#include "AArch64GenRegisterInfo.inc" + +static MCInstrInfo *createAArch64MCInstrInfo() { + MCInstrInfo *X = new MCInstrInfo(); + InitAArch64MCInstrInfo(X); + return X; +} + +static MCSubtargetInfo * +createAArch64MCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) { + if (CPU.empty()) + CPU = "generic"; + + return createAArch64MCSubtargetInfoImpl(TT, CPU, FS); +} + +static MCRegisterInfo *createAArch64MCRegisterInfo(const Triple &Triple) { + MCRegisterInfo *X = new MCRegisterInfo(); + InitAArch64MCRegisterInfo(X, AArch64::LR); + return X; +} + +static MCAsmInfo *createAArch64MCAsmInfo(const MCRegisterInfo &MRI, + const Triple &TheTriple) { + MCAsmInfo *MAI; + if (TheTriple.isOSBinFormatMachO()) + MAI = new AArch64MCAsmInfoDarwin(); + else { + assert(TheTriple.isOSBinFormatELF() && "Only expect Darwin or ELF"); + MAI = new AArch64MCAsmInfoELF(TheTriple); + } + + // Initial state of the frame pointer is SP. + unsigned Reg = MRI.getDwarfRegNum(AArch64::SP, true); + MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 0); + MAI->addInitialFrameState(Inst); + + return MAI; +} + +// Force static initialization. +extern "C" void LLVMInitializeAArch64TargetMC() { + for (Target *T : + {&TheAArch64leTarget, &TheAArch64beTarget, &TheARM64Target}) { + // Register the MC asm info. + RegisterMCAsmInfoFn X(*T, createAArch64MCAsmInfo); + + // Register the MC instruction info. + TargetRegistry::RegisterMCInstrInfo(*T, createAArch64MCInstrInfo); + + // Register the MC register info. + TargetRegistry::RegisterMCRegInfo(*T, createAArch64MCRegisterInfo); + + // Register the MC subtarget info. + TargetRegistry::RegisterMCSubtargetInfo(*T, createAArch64MCSubtargetInfo); + + // Register the MC Code Emitter + TargetRegistry::RegisterMCCodeEmitter(*T, createAArch64MCCodeEmitter); + } + + // Register the asm backend. + for (Target *T : {&TheAArch64leTarget, &TheARM64Target}) + TargetRegistry::RegisterMCAsmBackend(*T, createAArch64leAsmBackend); + TargetRegistry::RegisterMCAsmBackend(TheAArch64beTarget, + createAArch64beAsmBackend); +} diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h new file mode 100644 index 0000000..5c0bc40 --- /dev/null +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h @@ -0,0 +1,78 @@ +//===-- AArch64MCTargetDesc.h - AArch64 Target Descriptions -----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file provides AArch64 specific target descriptions. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCTARGETDESC_H +#define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCTARGETDESC_H + +#include "llvm/Support/DataTypes.h" +#include + +namespace llvm_ks { +class formatted_raw_ostream; +class MCAsmBackend; +class MCCodeEmitter; +class MCContext; +class MCInstrInfo; +class MCRegisterInfo; +class MCObjectWriter; +class MCStreamer; +class MCSubtargetInfo; +class MCTargetStreamer; +class StringRef; +class Target; +class Triple; +class raw_ostream; +class raw_pwrite_stream; + +extern Target TheAArch64leTarget; +extern Target TheAArch64beTarget; +extern Target TheARM64Target; + +MCCodeEmitter *createAArch64MCCodeEmitter(const MCInstrInfo &MCII, + const MCRegisterInfo &MRI, + MCContext &Ctx); +MCAsmBackend *createAArch64leAsmBackend(const Target &T, + const MCRegisterInfo &MRI, + const Triple &TT, StringRef CPU); +MCAsmBackend *createAArch64beAsmBackend(const Target &T, + const MCRegisterInfo &MRI, + const Triple &TT, StringRef CPU); + +MCObjectWriter *createAArch64ELFObjectWriter(raw_pwrite_stream &OS, + uint8_t OSABI, + bool IsLittleEndian); + +MCTargetStreamer *createAArch64AsmTargetStreamer(MCStreamer &S, + formatted_raw_ostream &OS, + bool isVerboseAsm); + +MCTargetStreamer *createAArch64ObjectTargetStreamer(MCStreamer &S, + const MCSubtargetInfo &STI); + +} // End llvm namespace + +// Defines symbolic names for AArch64 registers. This defines a mapping from +// register name to register number. +// +#define GET_REGINFO_ENUM +#include "AArch64GenRegisterInfo.inc" + +// Defines symbolic names for the AArch64 instructions. +// +#define GET_INSTRINFO_ENUM +#include "AArch64GenInstrInfo.inc" + +#define GET_SUBTARGETINFO_ENUM +#include "AArch64GenSubtargetInfo.inc" + +#endif diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp new file mode 100644 index 0000000..9c554e3 --- /dev/null +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp @@ -0,0 +1,41 @@ +//===- AArch64TargetStreamer.cpp - AArch64TargetStreamer class ------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the AArch64TargetStreamer class. +// +//===----------------------------------------------------------------------===// + +#include "AArch64TargetStreamer.h" +#include "llvm/MC/ConstantPools.h" +using namespace llvm_ks; + +// +// AArch64TargetStreamer Implemenation +// +AArch64TargetStreamer::AArch64TargetStreamer(MCStreamer &S) + : MCTargetStreamer(S), ConstantPools(new AssemblerConstantPools()) {} + +AArch64TargetStreamer::~AArch64TargetStreamer() {} + +// The constant pool handling is shared by all AArch64TargetStreamer +// implementations. +const MCExpr *AArch64TargetStreamer::addConstantPoolEntry(const MCExpr *Expr, + unsigned Size, + SMLoc Loc) { + return ConstantPools->addEntry(Streamer, Expr, Size, Loc); +} + +void AArch64TargetStreamer::emitCurrentConstantPool() { + ConstantPools->emitForCurrentSection(Streamer); +} + +// finish() - write out any non-empty assembler constant pools. +void AArch64TargetStreamer::finish() { ConstantPools->emitAll(Streamer); } + +void AArch64TargetStreamer::emitInst(uint32_t Inst) {} diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h new file mode 100644 index 0000000..5893110 --- /dev/null +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h @@ -0,0 +1,42 @@ +//===-- AArch64TargetStreamer.h - AArch64 Target Streamer ------*- C++ -*--===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64TARGETSTREAMER_H +#define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64TARGETSTREAMER_H + +#include "llvm/MC/MCStreamer.h" + +namespace llvm_ks { + +class AArch64TargetStreamer : public MCTargetStreamer { +public: + AArch64TargetStreamer(MCStreamer &S); + ~AArch64TargetStreamer() override; + + void finish() override; + + /// Callback used to implement the ldr= pseudo. + /// Add a new entry to the constant pool for the current section and return an + /// MCExpr that can be used to refer to the constant pool location. + const MCExpr *addConstantPoolEntry(const MCExpr *, unsigned Size, SMLoc Loc); + + /// Callback used to implemnt the .ltorg directive. + /// Emit contents of constant pool for the current section. + void emitCurrentConstantPool(); + + /// Callback used to implement the .inst directive. + virtual void emitInst(uint32_t Inst); + +private: + std::unique_ptr ConstantPools; +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/CMakeLists.txt b/llvm/lib/Target/AArch64/MCTargetDesc/CMakeLists.txt new file mode 100644 index 0000000..59e730e --- /dev/null +++ b/llvm/lib/Target/AArch64/MCTargetDesc/CMakeLists.txt @@ -0,0 +1,13 @@ +add_llvm_library(LLVMAArch64Desc + AArch64AsmBackend.cpp + AArch64ELFObjectWriter.cpp + AArch64MCAsmInfo.cpp + AArch64MCCodeEmitter.cpp + AArch64MCExpr.cpp + AArch64MCTargetDesc.cpp + AArch64MachObjectWriter.cpp + AArch64TargetStreamer.cpp +) + +# Hack: we need to include 'main' target directory to grab private headers +include_directories(${CMAKE_CURRENT_SOURCE_DIR}/.. ${CMAKE_CURRENT_BINARY_DIR}/..) diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/LLVMBuild.txt b/llvm/lib/Target/AArch64/MCTargetDesc/LLVMBuild.txt new file mode 100644 index 0000000..c6d03bb --- /dev/null +++ b/llvm/lib/Target/AArch64/MCTargetDesc/LLVMBuild.txt @@ -0,0 +1,24 @@ +;===- ./lib/Target/AArch64/MCTargetDesc/LLVMBuild.txt ------------*- Conf -*--===; +; +; The LLVM Compiler Infrastructure +; +; This file is distributed under the University of Illinois Open Source +; License. See LICENSE.TXT for details. +; +;===------------------------------------------------------------------------===; +; +; This is an LLVMBuild description file for the components in this subdirectory. +; +; For more information on the LLVMBuild system, please see: +; +; http://llvm.org/docs/LLVMBuild.html +; +;===------------------------------------------------------------------------===; + +[component_0] +type = Library +name = AArch64Desc +parent = AArch64 +required_libraries = AArch64Info MC Support +add_to_library_groups = AArch64 + diff --git a/llvm/lib/Target/AArch64/TargetInfo/AArch64TargetInfo.cpp b/llvm/lib/Target/AArch64/TargetInfo/AArch64TargetInfo.cpp new file mode 100644 index 0000000..9bd78fd --- /dev/null +++ b/llvm/lib/Target/AArch64/TargetInfo/AArch64TargetInfo.cpp @@ -0,0 +1,32 @@ +//===-- AArch64TargetInfo.cpp - AArch64 Target Implementation -----------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/Triple.h" +#include "llvm/Support/TargetRegistry.h" +using namespace llvm_ks; + +namespace llvm_ks { +Target TheAArch64leTarget; +Target TheAArch64beTarget; +Target TheARM64Target; +} // end namespace llvm_ks + +extern "C" void LLVMInitializeAArch64TargetInfo() { + // Now register the "arm64" name for use with "-march". We don't want it to + // take possession of the Triple::aarch64 tag though. + TargetRegistry::RegisterTarget(TheARM64Target, "arm64", + "ARM64 (little endian)", + [](Triple::ArchType) { return false; }); + + RegisterTarget Z( + TheAArch64leTarget, "aarch64", "AArch64 (little endian)"); + RegisterTarget W( + TheAArch64beTarget, "aarch64_be", "AArch64 (big endian)"); + +} diff --git a/llvm/lib/Target/AArch64/TargetInfo/CMakeLists.txt b/llvm/lib/Target/AArch64/TargetInfo/CMakeLists.txt new file mode 100644 index 0000000..5f2bef2 --- /dev/null +++ b/llvm/lib/Target/AArch64/TargetInfo/CMakeLists.txt @@ -0,0 +1,5 @@ +include_directories( ${CMAKE_CURRENT_BINARY_DIR}/.. ${CMAKE_CURRENT_SOURCE_DIR}/.. ) + +add_llvm_library(LLVMAArch64Info + AArch64TargetInfo.cpp + ) diff --git a/llvm/lib/Target/AArch64/TargetInfo/LLVMBuild.txt b/llvm/lib/Target/AArch64/TargetInfo/LLVMBuild.txt new file mode 100644 index 0000000..93c5407 --- /dev/null +++ b/llvm/lib/Target/AArch64/TargetInfo/LLVMBuild.txt @@ -0,0 +1,23 @@ +;===- ./lib/Target/AArch64/TargetInfo/LLVMBuild.txt --------------*- Conf -*--===; +; +; The LLVM Compiler Infrastructure +; +; This file is distributed under the University of Illinois Open Source +; License. See LICENSE.TXT for details. +; +;===------------------------------------------------------------------------===; +; +; This is an LLVMBuild description file for the components in this subdirectory. +; +; For more information on the LLVMBuild system, please see: +; +; http://llvm.org/docs/LLVMBuild.html +; +;===------------------------------------------------------------------------===; + +[component_0] +type = Library +name = AArch64Info +parent = AArch64 +required_libraries = Support +add_to_library_groups = AArch64 diff --git a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp new file mode 100644 index 0000000..6f286a9 --- /dev/null +++ b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp @@ -0,0 +1,945 @@ +//===-- AArch64BaseInfo.cpp - AArch64 Base encoding information------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file provides basic encoding and assembly information for AArch64. +// +//===----------------------------------------------------------------------===// +#include "AArch64BaseInfo.h" +#include "llvm/ADT/APFloat.h" +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/StringExtras.h" +#include "llvm/Support/Regex.h" + +using namespace llvm_ks; + +StringRef AArch64NamedImmMapper::toString(uint32_t Value, + const FeatureBitset& FeatureBits, bool &Valid) const { + for (unsigned i = 0; i < NumMappings; ++i) { + if (Mappings[i].isValueEqual(Value, FeatureBits)) { + Valid = true; + return Mappings[i].Name; + } + } + + Valid = false; + return StringRef(); +} + +uint32_t AArch64NamedImmMapper::fromString(StringRef Name, + const FeatureBitset& FeatureBits, bool &Valid) const { + std::string LowerCaseName = Name.lower(); + for (unsigned i = 0; i < NumMappings; ++i) { + if (Mappings[i].isNameEqual(LowerCaseName, FeatureBits)) { + Valid = true; + return Mappings[i].Value; + } + } + + Valid = false; + return -1; +} + +bool AArch64NamedImmMapper::validImm(uint32_t Value) const { + return Value < TooBigImm; +} + +const AArch64NamedImmMapper::Mapping AArch64AT::ATMapper::ATMappings[] = { + {"s1e1r", S1E1R, {}}, + {"s1e2r", S1E2R, {}}, + {"s1e3r", S1E3R, {}}, + {"s1e1w", S1E1W, {}}, + {"s1e2w", S1E2W, {}}, + {"s1e3w", S1E3W, {}}, + {"s1e0r", S1E0R, {}}, + {"s1e0w", S1E0W, {}}, + {"s12e1r", S12E1R, {}}, + {"s12e1w", S12E1W, {}}, + {"s12e0r", S12E0R, {}}, + {"s12e0w", S12E0W, {}}, +}; + +AArch64AT::ATMapper::ATMapper() + : AArch64NamedImmMapper(ATMappings, 0) {} + +const AArch64NamedImmMapper::Mapping AArch64DB::DBarrierMapper::DBarrierMappings[] = { + {"oshld", OSHLD, {}}, + {"oshst", OSHST, {}}, + {"osh", OSH, {}}, + {"nshld", NSHLD, {}}, + {"nshst", NSHST, {}}, + {"nsh", NSH, {}}, + {"ishld", ISHLD, {}}, + {"ishst", ISHST, {}}, + {"ish", ISH, {}}, + {"ld", LD, {}}, + {"st", ST, {}}, + {"sy", SY, {}} +}; + +AArch64DB::DBarrierMapper::DBarrierMapper() + : AArch64NamedImmMapper(DBarrierMappings, 16u) {} + +const AArch64NamedImmMapper::Mapping AArch64DC::DCMapper::DCMappings[] = { + {"zva", ZVA, {}}, + {"ivac", IVAC, {}}, + {"isw", ISW, {}}, + {"cvac", CVAC, {}}, + {"csw", CSW, {}}, + {"cvau", CVAU, {}}, + {"civac", CIVAC, {}}, + {"cisw", CISW, {}} +}; + +AArch64DC::DCMapper::DCMapper() + : AArch64NamedImmMapper(DCMappings, 0) {} + +const AArch64NamedImmMapper::Mapping AArch64IC::ICMapper::ICMappings[] = { + {"ialluis", IALLUIS, {}}, + {"iallu", IALLU, {}}, + {"ivau", IVAU, {}} +}; + +AArch64IC::ICMapper::ICMapper() + : AArch64NamedImmMapper(ICMappings, 0) {} + +const AArch64NamedImmMapper::Mapping AArch64ISB::ISBMapper::ISBMappings[] = { + {"sy", SY, {}}, +}; + +AArch64ISB::ISBMapper::ISBMapper() + : AArch64NamedImmMapper(ISBMappings, 16) {} + +const AArch64NamedImmMapper::Mapping AArch64PRFM::PRFMMapper::PRFMMappings[] = { + {"pldl1keep", PLDL1KEEP, {}}, + {"pldl1strm", PLDL1STRM, {}}, + {"pldl2keep", PLDL2KEEP, {}}, + {"pldl2strm", PLDL2STRM, {}}, + {"pldl3keep", PLDL3KEEP, {}}, + {"pldl3strm", PLDL3STRM, {}}, + {"plil1keep", PLIL1KEEP, {}}, + {"plil1strm", PLIL1STRM, {}}, + {"plil2keep", PLIL2KEEP, {}}, + {"plil2strm", PLIL2STRM, {}}, + {"plil3keep", PLIL3KEEP, {}}, + {"plil3strm", PLIL3STRM, {}}, + {"pstl1keep", PSTL1KEEP, {}}, + {"pstl1strm", PSTL1STRM, {}}, + {"pstl2keep", PSTL2KEEP, {}}, + {"pstl2strm", PSTL2STRM, {}}, + {"pstl3keep", PSTL3KEEP, {}}, + {"pstl3strm", PSTL3STRM, {}} +}; + +AArch64PRFM::PRFMMapper::PRFMMapper() + : AArch64NamedImmMapper(PRFMMappings, 32) {} + +const AArch64NamedImmMapper::Mapping AArch64PState::PStateMapper::PStateMappings[] = { + {"spsel", SPSel, {}}, + {"daifset", DAIFSet, {}}, + {"daifclr", DAIFClr, {}}, + + // v8.1a "Privileged Access Never" extension-specific PStates + {"pan", PAN, {AArch64::HasV8_1aOps}}, + + // v8.2a + {"uao", UAO, {AArch64::HasV8_2aOps}}, +}; + +AArch64PState::PStateMapper::PStateMapper() + : AArch64NamedImmMapper(PStateMappings, 0) {} + +const AArch64NamedImmMapper::Mapping AArch64PSBHint::PSBHintMapper::PSBHintMappings[] = { + // v8.2a "Statistical Profiling" extension-specific PSB operand + {"csync", CSync, {AArch64::FeatureSPE}}, +}; + +AArch64PSBHint::PSBHintMapper::PSBHintMapper() + : AArch64NamedImmMapper(PSBHintMappings, 0) {} + +const AArch64NamedImmMapper::Mapping AArch64SysReg::MRSMapper::MRSMappings[] = { + {"mdccsr_el0", MDCCSR_EL0, {}}, + {"dbgdtrrx_el0", DBGDTRRX_EL0, {}}, + {"mdrar_el1", MDRAR_EL1, {}}, + {"oslsr_el1", OSLSR_EL1, {}}, + {"dbgauthstatus_el1", DBGAUTHSTATUS_EL1, {}}, + {"pmceid0_el0", PMCEID0_EL0, {}}, + {"pmceid1_el0", PMCEID1_EL0, {}}, + {"midr_el1", MIDR_EL1, {}}, + {"ccsidr_el1", CCSIDR_EL1, {}}, + {"clidr_el1", CLIDR_EL1, {}}, + {"ctr_el0", CTR_EL0, {}}, + {"mpidr_el1", MPIDR_EL1, {}}, + {"revidr_el1", REVIDR_EL1, {}}, + {"aidr_el1", AIDR_EL1, {}}, + {"dczid_el0", DCZID_EL0, {}}, + {"id_pfr0_el1", ID_PFR0_EL1, {}}, + {"id_pfr1_el1", ID_PFR1_EL1, {}}, + {"id_dfr0_el1", ID_DFR0_EL1, {}}, + {"id_afr0_el1", ID_AFR0_EL1, {}}, + {"id_mmfr0_el1", ID_MMFR0_EL1, {}}, + {"id_mmfr1_el1", ID_MMFR1_EL1, {}}, + {"id_mmfr2_el1", ID_MMFR2_EL1, {}}, + {"id_mmfr3_el1", ID_MMFR3_EL1, {}}, + {"id_mmfr4_el1", ID_MMFR4_EL1, {}}, + {"id_isar0_el1", ID_ISAR0_EL1, {}}, + {"id_isar1_el1", ID_ISAR1_EL1, {}}, + {"id_isar2_el1", ID_ISAR2_EL1, {}}, + {"id_isar3_el1", ID_ISAR3_EL1, {}}, + {"id_isar4_el1", ID_ISAR4_EL1, {}}, + {"id_isar5_el1", ID_ISAR5_EL1, {}}, + {"id_aa64pfr0_el1", ID_A64PFR0_EL1, {}}, + {"id_aa64pfr1_el1", ID_A64PFR1_EL1, {}}, + {"id_aa64dfr0_el1", ID_A64DFR0_EL1, {}}, + {"id_aa64dfr1_el1", ID_A64DFR1_EL1, {}}, + {"id_aa64afr0_el1", ID_A64AFR0_EL1, {}}, + {"id_aa64afr1_el1", ID_A64AFR1_EL1, {}}, + {"id_aa64isar0_el1", ID_A64ISAR0_EL1, {}}, + {"id_aa64isar1_el1", ID_A64ISAR1_EL1, {}}, + {"id_aa64mmfr0_el1", ID_A64MMFR0_EL1, {}}, + {"id_aa64mmfr1_el1", ID_A64MMFR1_EL1, {}}, + {"id_aa64mmfr2_el1", ID_A64MMFR2_EL1, {AArch64::HasV8_2aOps}}, + {"mvfr0_el1", MVFR0_EL1, {}}, + {"mvfr1_el1", MVFR1_EL1, {}}, + {"mvfr2_el1", MVFR2_EL1, {}}, + {"rvbar_el1", RVBAR_EL1, {}}, + {"rvbar_el2", RVBAR_EL2, {}}, + {"rvbar_el3", RVBAR_EL3, {}}, + {"isr_el1", ISR_EL1, {}}, + {"cntpct_el0", CNTPCT_EL0, {}}, + {"cntvct_el0", CNTVCT_EL0, {}}, + + // Trace registers + {"trcstatr", TRCSTATR, {}}, + {"trcidr8", TRCIDR8, {}}, + {"trcidr9", TRCIDR9, {}}, + {"trcidr10", TRCIDR10, {}}, + {"trcidr11", TRCIDR11, {}}, + {"trcidr12", TRCIDR12, {}}, + {"trcidr13", TRCIDR13, {}}, + {"trcidr0", TRCIDR0, {}}, + {"trcidr1", TRCIDR1, {}}, + {"trcidr2", TRCIDR2, {}}, + {"trcidr3", TRCIDR3, {}}, + {"trcidr4", TRCIDR4, {}}, + {"trcidr5", TRCIDR5, {}}, + {"trcidr6", TRCIDR6, {}}, + {"trcidr7", TRCIDR7, {}}, + {"trcoslsr", TRCOSLSR, {}}, + {"trcpdsr", TRCPDSR, {}}, + {"trcdevaff0", TRCDEVAFF0, {}}, + {"trcdevaff1", TRCDEVAFF1, {}}, + {"trclsr", TRCLSR, {}}, + {"trcauthstatus", TRCAUTHSTATUS, {}}, + {"trcdevarch", TRCDEVARCH, {}}, + {"trcdevid", TRCDEVID, {}}, + {"trcdevtype", TRCDEVTYPE, {}}, + {"trcpidr4", TRCPIDR4, {}}, + {"trcpidr5", TRCPIDR5, {}}, + {"trcpidr6", TRCPIDR6, {}}, + {"trcpidr7", TRCPIDR7, {}}, + {"trcpidr0", TRCPIDR0, {}}, + {"trcpidr1", TRCPIDR1, {}}, + {"trcpidr2", TRCPIDR2, {}}, + {"trcpidr3", TRCPIDR3, {}}, + {"trccidr0", TRCCIDR0, {}}, + {"trccidr1", TRCCIDR1, {}}, + {"trccidr2", TRCCIDR2, {}}, + {"trccidr3", TRCCIDR3, {}}, + + // GICv3 registers + {"icc_iar1_el1", ICC_IAR1_EL1, {}}, + {"icc_iar0_el1", ICC_IAR0_EL1, {}}, + {"icc_hppir1_el1", ICC_HPPIR1_EL1, {}}, + {"icc_hppir0_el1", ICC_HPPIR0_EL1, {}}, + {"icc_rpr_el1", ICC_RPR_EL1, {}}, + {"ich_vtr_el2", ICH_VTR_EL2, {}}, + {"ich_eisr_el2", ICH_EISR_EL2, {}}, + {"ich_elsr_el2", ICH_ELSR_EL2, {}}, + + // v8.1a "Limited Ordering Regions" extension-specific system registers + {"lorid_el1", LORID_EL1, {AArch64::HasV8_1aOps}}, +}; + +AArch64SysReg::MRSMapper::MRSMapper() { + InstMappings = &MRSMappings[0]; + NumInstMappings = llvm_ks::array_lengthof(MRSMappings); +} + +const AArch64NamedImmMapper::Mapping AArch64SysReg::MSRMapper::MSRMappings[] = { + {"dbgdtrtx_el0", DBGDTRTX_EL0, {}}, + {"oslar_el1", OSLAR_EL1, {}}, + {"pmswinc_el0", PMSWINC_EL0, {}}, + + // Trace registers + {"trcoslar", TRCOSLAR, {}}, + {"trclar", TRCLAR, {}}, + + // GICv3 registers + {"icc_eoir1_el1", ICC_EOIR1_EL1, {}}, + {"icc_eoir0_el1", ICC_EOIR0_EL1, {}}, + {"icc_dir_el1", ICC_DIR_EL1, {}}, + {"icc_sgi1r_el1", ICC_SGI1R_EL1, {}}, + {"icc_asgi1r_el1", ICC_ASGI1R_EL1, {}}, + {"icc_sgi0r_el1", ICC_SGI0R_EL1, {}}, +}; + +AArch64SysReg::MSRMapper::MSRMapper() { + InstMappings = &MSRMappings[0]; + NumInstMappings = llvm_ks::array_lengthof(MSRMappings); +} + + +const AArch64NamedImmMapper::Mapping AArch64SysReg::SysRegMapper::SysRegMappings[] = { + {"osdtrrx_el1", OSDTRRX_EL1, {}}, + {"osdtrtx_el1", OSDTRTX_EL1, {}}, + {"teecr32_el1", TEECR32_EL1, {}}, + {"mdccint_el1", MDCCINT_EL1, {}}, + {"mdscr_el1", MDSCR_EL1, {}}, + {"dbgdtr_el0", DBGDTR_EL0, {}}, + {"oseccr_el1", OSECCR_EL1, {}}, + {"dbgvcr32_el2", DBGVCR32_EL2, {}}, + {"dbgbvr0_el1", DBGBVR0_EL1, {}}, + {"dbgbvr1_el1", DBGBVR1_EL1, {}}, + {"dbgbvr2_el1", DBGBVR2_EL1, {}}, + {"dbgbvr3_el1", DBGBVR3_EL1, {}}, + {"dbgbvr4_el1", DBGBVR4_EL1, {}}, + {"dbgbvr5_el1", DBGBVR5_EL1, {}}, + {"dbgbvr6_el1", DBGBVR6_EL1, {}}, + {"dbgbvr7_el1", DBGBVR7_EL1, {}}, + {"dbgbvr8_el1", DBGBVR8_EL1, {}}, + {"dbgbvr9_el1", DBGBVR9_EL1, {}}, + {"dbgbvr10_el1", DBGBVR10_EL1, {}}, + {"dbgbvr11_el1", DBGBVR11_EL1, {}}, + {"dbgbvr12_el1", DBGBVR12_EL1, {}}, + {"dbgbvr13_el1", DBGBVR13_EL1, {}}, + {"dbgbvr14_el1", DBGBVR14_EL1, {}}, + {"dbgbvr15_el1", DBGBVR15_EL1, {}}, + {"dbgbcr0_el1", DBGBCR0_EL1, {}}, + {"dbgbcr1_el1", DBGBCR1_EL1, {}}, + {"dbgbcr2_el1", DBGBCR2_EL1, {}}, + {"dbgbcr3_el1", DBGBCR3_EL1, {}}, + {"dbgbcr4_el1", DBGBCR4_EL1, {}}, + {"dbgbcr5_el1", DBGBCR5_EL1, {}}, + {"dbgbcr6_el1", DBGBCR6_EL1, {}}, + {"dbgbcr7_el1", DBGBCR7_EL1, {}}, + {"dbgbcr8_el1", DBGBCR8_EL1, {}}, + {"dbgbcr9_el1", DBGBCR9_EL1, {}}, + {"dbgbcr10_el1", DBGBCR10_EL1, {}}, + {"dbgbcr11_el1", DBGBCR11_EL1, {}}, + {"dbgbcr12_el1", DBGBCR12_EL1, {}}, + {"dbgbcr13_el1", DBGBCR13_EL1, {}}, + {"dbgbcr14_el1", DBGBCR14_EL1, {}}, + {"dbgbcr15_el1", DBGBCR15_EL1, {}}, + {"dbgwvr0_el1", DBGWVR0_EL1, {}}, + {"dbgwvr1_el1", DBGWVR1_EL1, {}}, + {"dbgwvr2_el1", DBGWVR2_EL1, {}}, + {"dbgwvr3_el1", DBGWVR3_EL1, {}}, + {"dbgwvr4_el1", DBGWVR4_EL1, {}}, + {"dbgwvr5_el1", DBGWVR5_EL1, {}}, + {"dbgwvr6_el1", DBGWVR6_EL1, {}}, + {"dbgwvr7_el1", DBGWVR7_EL1, {}}, + {"dbgwvr8_el1", DBGWVR8_EL1, {}}, + {"dbgwvr9_el1", DBGWVR9_EL1, {}}, + {"dbgwvr10_el1", DBGWVR10_EL1, {}}, + {"dbgwvr11_el1", DBGWVR11_EL1, {}}, + {"dbgwvr12_el1", DBGWVR12_EL1, {}}, + {"dbgwvr13_el1", DBGWVR13_EL1, {}}, + {"dbgwvr14_el1", DBGWVR14_EL1, {}}, + {"dbgwvr15_el1", DBGWVR15_EL1, {}}, + {"dbgwcr0_el1", DBGWCR0_EL1, {}}, + {"dbgwcr1_el1", DBGWCR1_EL1, {}}, + {"dbgwcr2_el1", DBGWCR2_EL1, {}}, + {"dbgwcr3_el1", DBGWCR3_EL1, {}}, + {"dbgwcr4_el1", DBGWCR4_EL1, {}}, + {"dbgwcr5_el1", DBGWCR5_EL1, {}}, + {"dbgwcr6_el1", DBGWCR6_EL1, {}}, + {"dbgwcr7_el1", DBGWCR7_EL1, {}}, + {"dbgwcr8_el1", DBGWCR8_EL1, {}}, + {"dbgwcr9_el1", DBGWCR9_EL1, {}}, + {"dbgwcr10_el1", DBGWCR10_EL1, {}}, + {"dbgwcr11_el1", DBGWCR11_EL1, {}}, + {"dbgwcr12_el1", DBGWCR12_EL1, {}}, + {"dbgwcr13_el1", DBGWCR13_EL1, {}}, + {"dbgwcr14_el1", DBGWCR14_EL1, {}}, + {"dbgwcr15_el1", DBGWCR15_EL1, {}}, + {"teehbr32_el1", TEEHBR32_EL1, {}}, + {"osdlr_el1", OSDLR_EL1, {}}, + {"dbgprcr_el1", DBGPRCR_EL1, {}}, + {"dbgclaimset_el1", DBGCLAIMSET_EL1, {}}, + {"dbgclaimclr_el1", DBGCLAIMCLR_EL1, {}}, + {"csselr_el1", CSSELR_EL1, {}}, + {"vpidr_el2", VPIDR_EL2, {}}, + {"vmpidr_el2", VMPIDR_EL2, {}}, + {"sctlr_el1", SCTLR_EL1, {}}, + {"sctlr_el2", SCTLR_EL2, {}}, + {"sctlr_el3", SCTLR_EL3, {}}, + {"actlr_el1", ACTLR_EL1, {}}, + {"actlr_el2", ACTLR_EL2, {}}, + {"actlr_el3", ACTLR_EL3, {}}, + {"cpacr_el1", CPACR_EL1, {}}, + {"hcr_el2", HCR_EL2, {}}, + {"scr_el3", SCR_EL3, {}}, + {"mdcr_el2", MDCR_EL2, {}}, + {"sder32_el3", SDER32_EL3, {}}, + {"cptr_el2", CPTR_EL2, {}}, + {"cptr_el3", CPTR_EL3, {}}, + {"hstr_el2", HSTR_EL2, {}}, + {"hacr_el2", HACR_EL2, {}}, + {"mdcr_el3", MDCR_EL3, {}}, + {"ttbr0_el1", TTBR0_EL1, {}}, + {"ttbr0_el2", TTBR0_EL2, {}}, + {"ttbr0_el3", TTBR0_EL3, {}}, + {"ttbr1_el1", TTBR1_EL1, {}}, + {"tcr_el1", TCR_EL1, {}}, + {"tcr_el2", TCR_EL2, {}}, + {"tcr_el3", TCR_EL3, {}}, + {"vttbr_el2", VTTBR_EL2, {}}, + {"vtcr_el2", VTCR_EL2, {}}, + {"dacr32_el2", DACR32_EL2, {}}, + {"spsr_el1", SPSR_EL1, {}}, + {"spsr_el2", SPSR_EL2, {}}, + {"spsr_el3", SPSR_EL3, {}}, + {"elr_el1", ELR_EL1, {}}, + {"elr_el2", ELR_EL2, {}}, + {"elr_el3", ELR_EL3, {}}, + {"sp_el0", SP_EL0, {}}, + {"sp_el1", SP_EL1, {}}, + {"sp_el2", SP_EL2, {}}, + {"spsel", SPSel, {}}, + {"nzcv", NZCV, {}}, + {"daif", DAIF, {}}, + {"currentel", CurrentEL, {}}, + {"spsr_irq", SPSR_irq, {}}, + {"spsr_abt", SPSR_abt, {}}, + {"spsr_und", SPSR_und, {}}, + {"spsr_fiq", SPSR_fiq, {}}, + {"fpcr", FPCR, {}}, + {"fpsr", FPSR, {}}, + {"dspsr_el0", DSPSR_EL0, {}}, + {"dlr_el0", DLR_EL0, {}}, + {"ifsr32_el2", IFSR32_EL2, {}}, + {"afsr0_el1", AFSR0_EL1, {}}, + {"afsr0_el2", AFSR0_EL2, {}}, + {"afsr0_el3", AFSR0_EL3, {}}, + {"afsr1_el1", AFSR1_EL1, {}}, + {"afsr1_el2", AFSR1_EL2, {}}, + {"afsr1_el3", AFSR1_EL3, {}}, + {"esr_el1", ESR_EL1, {}}, + {"esr_el2", ESR_EL2, {}}, + {"esr_el3", ESR_EL3, {}}, + {"fpexc32_el2", FPEXC32_EL2, {}}, + {"far_el1", FAR_EL1, {}}, + {"far_el2", FAR_EL2, {}}, + {"far_el3", FAR_EL3, {}}, + {"hpfar_el2", HPFAR_EL2, {}}, + {"par_el1", PAR_EL1, {}}, + {"pmcr_el0", PMCR_EL0, {}}, + {"pmcntenset_el0", PMCNTENSET_EL0, {}}, + {"pmcntenclr_el0", PMCNTENCLR_EL0, {}}, + {"pmovsclr_el0", PMOVSCLR_EL0, {}}, + {"pmselr_el0", PMSELR_EL0, {}}, + {"pmccntr_el0", PMCCNTR_EL0, {}}, + {"pmxevtyper_el0", PMXEVTYPER_EL0, {}}, + {"pmxevcntr_el0", PMXEVCNTR_EL0, {}}, + {"pmuserenr_el0", PMUSERENR_EL0, {}}, + {"pmintenset_el1", PMINTENSET_EL1, {}}, + {"pmintenclr_el1", PMINTENCLR_EL1, {}}, + {"pmovsset_el0", PMOVSSET_EL0, {}}, + {"mair_el1", MAIR_EL1, {}}, + {"mair_el2", MAIR_EL2, {}}, + {"mair_el3", MAIR_EL3, {}}, + {"amair_el1", AMAIR_EL1, {}}, + {"amair_el2", AMAIR_EL2, {}}, + {"amair_el3", AMAIR_EL3, {}}, + {"vbar_el1", VBAR_EL1, {}}, + {"vbar_el2", VBAR_EL2, {}}, + {"vbar_el3", VBAR_EL3, {}}, + {"rmr_el1", RMR_EL1, {}}, + {"rmr_el2", RMR_EL2, {}}, + {"rmr_el3", RMR_EL3, {}}, + {"contextidr_el1", CONTEXTIDR_EL1, {}}, + {"tpidr_el0", TPIDR_EL0, {}}, + {"tpidr_el2", TPIDR_EL2, {}}, + {"tpidr_el3", TPIDR_EL3, {}}, + {"tpidrro_el0", TPIDRRO_EL0, {}}, + {"tpidr_el1", TPIDR_EL1, {}}, + {"cntfrq_el0", CNTFRQ_EL0, {}}, + {"cntvoff_el2", CNTVOFF_EL2, {}}, + {"cntkctl_el1", CNTKCTL_EL1, {}}, + {"cnthctl_el2", CNTHCTL_EL2, {}}, + {"cntp_tval_el0", CNTP_TVAL_EL0, {}}, + {"cnthp_tval_el2", CNTHP_TVAL_EL2, {}}, + {"cntps_tval_el1", CNTPS_TVAL_EL1, {}}, + {"cntp_ctl_el0", CNTP_CTL_EL0, {}}, + {"cnthp_ctl_el2", CNTHP_CTL_EL2, {}}, + {"cntps_ctl_el1", CNTPS_CTL_EL1, {}}, + {"cntp_cval_el0", CNTP_CVAL_EL0, {}}, + {"cnthp_cval_el2", CNTHP_CVAL_EL2, {}}, + {"cntps_cval_el1", CNTPS_CVAL_EL1, {}}, + {"cntv_tval_el0", CNTV_TVAL_EL0, {}}, + {"cntv_ctl_el0", CNTV_CTL_EL0, {}}, + {"cntv_cval_el0", CNTV_CVAL_EL0, {}}, + {"pmevcntr0_el0", PMEVCNTR0_EL0, {}}, + {"pmevcntr1_el0", PMEVCNTR1_EL0, {}}, + {"pmevcntr2_el0", PMEVCNTR2_EL0, {}}, + {"pmevcntr3_el0", PMEVCNTR3_EL0, {}}, + {"pmevcntr4_el0", PMEVCNTR4_EL0, {}}, + {"pmevcntr5_el0", PMEVCNTR5_EL0, {}}, + {"pmevcntr6_el0", PMEVCNTR6_EL0, {}}, + {"pmevcntr7_el0", PMEVCNTR7_EL0, {}}, + {"pmevcntr8_el0", PMEVCNTR8_EL0, {}}, + {"pmevcntr9_el0", PMEVCNTR9_EL0, {}}, + {"pmevcntr10_el0", PMEVCNTR10_EL0, {}}, + {"pmevcntr11_el0", PMEVCNTR11_EL0, {}}, + {"pmevcntr12_el0", PMEVCNTR12_EL0, {}}, + {"pmevcntr13_el0", PMEVCNTR13_EL0, {}}, + {"pmevcntr14_el0", PMEVCNTR14_EL0, {}}, + {"pmevcntr15_el0", PMEVCNTR15_EL0, {}}, + {"pmevcntr16_el0", PMEVCNTR16_EL0, {}}, + {"pmevcntr17_el0", PMEVCNTR17_EL0, {}}, + {"pmevcntr18_el0", PMEVCNTR18_EL0, {}}, + {"pmevcntr19_el0", PMEVCNTR19_EL0, {}}, + {"pmevcntr20_el0", PMEVCNTR20_EL0, {}}, + {"pmevcntr21_el0", PMEVCNTR21_EL0, {}}, + {"pmevcntr22_el0", PMEVCNTR22_EL0, {}}, + {"pmevcntr23_el0", PMEVCNTR23_EL0, {}}, + {"pmevcntr24_el0", PMEVCNTR24_EL0, {}}, + {"pmevcntr25_el0", PMEVCNTR25_EL0, {}}, + {"pmevcntr26_el0", PMEVCNTR26_EL0, {}}, + {"pmevcntr27_el0", PMEVCNTR27_EL0, {}}, + {"pmevcntr28_el0", PMEVCNTR28_EL0, {}}, + {"pmevcntr29_el0", PMEVCNTR29_EL0, {}}, + {"pmevcntr30_el0", PMEVCNTR30_EL0, {}}, + {"pmccfiltr_el0", PMCCFILTR_EL0, {}}, + {"pmevtyper0_el0", PMEVTYPER0_EL0, {}}, + {"pmevtyper1_el0", PMEVTYPER1_EL0, {}}, + {"pmevtyper2_el0", PMEVTYPER2_EL0, {}}, + {"pmevtyper3_el0", PMEVTYPER3_EL0, {}}, + {"pmevtyper4_el0", PMEVTYPER4_EL0, {}}, + {"pmevtyper5_el0", PMEVTYPER5_EL0, {}}, + {"pmevtyper6_el0", PMEVTYPER6_EL0, {}}, + {"pmevtyper7_el0", PMEVTYPER7_EL0, {}}, + {"pmevtyper8_el0", PMEVTYPER8_EL0, {}}, + {"pmevtyper9_el0", PMEVTYPER9_EL0, {}}, + {"pmevtyper10_el0", PMEVTYPER10_EL0, {}}, + {"pmevtyper11_el0", PMEVTYPER11_EL0, {}}, + {"pmevtyper12_el0", PMEVTYPER12_EL0, {}}, + {"pmevtyper13_el0", PMEVTYPER13_EL0, {}}, + {"pmevtyper14_el0", PMEVTYPER14_EL0, {}}, + {"pmevtyper15_el0", PMEVTYPER15_EL0, {}}, + {"pmevtyper16_el0", PMEVTYPER16_EL0, {}}, + {"pmevtyper17_el0", PMEVTYPER17_EL0, {}}, + {"pmevtyper18_el0", PMEVTYPER18_EL0, {}}, + {"pmevtyper19_el0", PMEVTYPER19_EL0, {}}, + {"pmevtyper20_el0", PMEVTYPER20_EL0, {}}, + {"pmevtyper21_el0", PMEVTYPER21_EL0, {}}, + {"pmevtyper22_el0", PMEVTYPER22_EL0, {}}, + {"pmevtyper23_el0", PMEVTYPER23_EL0, {}}, + {"pmevtyper24_el0", PMEVTYPER24_EL0, {}}, + {"pmevtyper25_el0", PMEVTYPER25_EL0, {}}, + {"pmevtyper26_el0", PMEVTYPER26_EL0, {}}, + {"pmevtyper27_el0", PMEVTYPER27_EL0, {}}, + {"pmevtyper28_el0", PMEVTYPER28_EL0, {}}, + {"pmevtyper29_el0", PMEVTYPER29_EL0, {}}, + {"pmevtyper30_el0", PMEVTYPER30_EL0, {}}, + + // Trace registers + {"trcprgctlr", TRCPRGCTLR, {}}, + {"trcprocselr", TRCPROCSELR, {}}, + {"trcconfigr", TRCCONFIGR, {}}, + {"trcauxctlr", TRCAUXCTLR, {}}, + {"trceventctl0r", TRCEVENTCTL0R, {}}, + {"trceventctl1r", TRCEVENTCTL1R, {}}, + {"trcstallctlr", TRCSTALLCTLR, {}}, + {"trctsctlr", TRCTSCTLR, {}}, + {"trcsyncpr", TRCSYNCPR, {}}, + {"trcccctlr", TRCCCCTLR, {}}, + {"trcbbctlr", TRCBBCTLR, {}}, + {"trctraceidr", TRCTRACEIDR, {}}, + {"trcqctlr", TRCQCTLR, {}}, + {"trcvictlr", TRCVICTLR, {}}, + {"trcviiectlr", TRCVIIECTLR, {}}, + {"trcvissctlr", TRCVISSCTLR, {}}, + {"trcvipcssctlr", TRCVIPCSSCTLR, {}}, + {"trcvdctlr", TRCVDCTLR, {}}, + {"trcvdsacctlr", TRCVDSACCTLR, {}}, + {"trcvdarcctlr", TRCVDARCCTLR, {}}, + {"trcseqevr0", TRCSEQEVR0, {}}, + {"trcseqevr1", TRCSEQEVR1, {}}, + {"trcseqevr2", TRCSEQEVR2, {}}, + {"trcseqrstevr", TRCSEQRSTEVR, {}}, + {"trcseqstr", TRCSEQSTR, {}}, + {"trcextinselr", TRCEXTINSELR, {}}, + {"trccntrldvr0", TRCCNTRLDVR0, {}}, + {"trccntrldvr1", TRCCNTRLDVR1, {}}, + {"trccntrldvr2", TRCCNTRLDVR2, {}}, + {"trccntrldvr3", TRCCNTRLDVR3, {}}, + {"trccntctlr0", TRCCNTCTLR0, {}}, + {"trccntctlr1", TRCCNTCTLR1, {}}, + {"trccntctlr2", TRCCNTCTLR2, {}}, + {"trccntctlr3", TRCCNTCTLR3, {}}, + {"trccntvr0", TRCCNTVR0, {}}, + {"trccntvr1", TRCCNTVR1, {}}, + {"trccntvr2", TRCCNTVR2, {}}, + {"trccntvr3", TRCCNTVR3, {}}, + {"trcimspec0", TRCIMSPEC0, {}}, + {"trcimspec1", TRCIMSPEC1, {}}, + {"trcimspec2", TRCIMSPEC2, {}}, + {"trcimspec3", TRCIMSPEC3, {}}, + {"trcimspec4", TRCIMSPEC4, {}}, + {"trcimspec5", TRCIMSPEC5, {}}, + {"trcimspec6", TRCIMSPEC6, {}}, + {"trcimspec7", TRCIMSPEC7, {}}, + {"trcrsctlr2", TRCRSCTLR2, {}}, + {"trcrsctlr3", TRCRSCTLR3, {}}, + {"trcrsctlr4", TRCRSCTLR4, {}}, + {"trcrsctlr5", TRCRSCTLR5, {}}, + {"trcrsctlr6", TRCRSCTLR6, {}}, + {"trcrsctlr7", TRCRSCTLR7, {}}, + {"trcrsctlr8", TRCRSCTLR8, {}}, + {"trcrsctlr9", TRCRSCTLR9, {}}, + {"trcrsctlr10", TRCRSCTLR10, {}}, + {"trcrsctlr11", TRCRSCTLR11, {}}, + {"trcrsctlr12", TRCRSCTLR12, {}}, + {"trcrsctlr13", TRCRSCTLR13, {}}, + {"trcrsctlr14", TRCRSCTLR14, {}}, + {"trcrsctlr15", TRCRSCTLR15, {}}, + {"trcrsctlr16", TRCRSCTLR16, {}}, + {"trcrsctlr17", TRCRSCTLR17, {}}, + {"trcrsctlr18", TRCRSCTLR18, {}}, + {"trcrsctlr19", TRCRSCTLR19, {}}, + {"trcrsctlr20", TRCRSCTLR20, {}}, + {"trcrsctlr21", TRCRSCTLR21, {}}, + {"trcrsctlr22", TRCRSCTLR22, {}}, + {"trcrsctlr23", TRCRSCTLR23, {}}, + {"trcrsctlr24", TRCRSCTLR24, {}}, + {"trcrsctlr25", TRCRSCTLR25, {}}, + {"trcrsctlr26", TRCRSCTLR26, {}}, + {"trcrsctlr27", TRCRSCTLR27, {}}, + {"trcrsctlr28", TRCRSCTLR28, {}}, + {"trcrsctlr29", TRCRSCTLR29, {}}, + {"trcrsctlr30", TRCRSCTLR30, {}}, + {"trcrsctlr31", TRCRSCTLR31, {}}, + {"trcssccr0", TRCSSCCR0, {}}, + {"trcssccr1", TRCSSCCR1, {}}, + {"trcssccr2", TRCSSCCR2, {}}, + {"trcssccr3", TRCSSCCR3, {}}, + {"trcssccr4", TRCSSCCR4, {}}, + {"trcssccr5", TRCSSCCR5, {}}, + {"trcssccr6", TRCSSCCR6, {}}, + {"trcssccr7", TRCSSCCR7, {}}, + {"trcsscsr0", TRCSSCSR0, {}}, + {"trcsscsr1", TRCSSCSR1, {}}, + {"trcsscsr2", TRCSSCSR2, {}}, + {"trcsscsr3", TRCSSCSR3, {}}, + {"trcsscsr4", TRCSSCSR4, {}}, + {"trcsscsr5", TRCSSCSR5, {}}, + {"trcsscsr6", TRCSSCSR6, {}}, + {"trcsscsr7", TRCSSCSR7, {}}, + {"trcsspcicr0", TRCSSPCICR0, {}}, + {"trcsspcicr1", TRCSSPCICR1, {}}, + {"trcsspcicr2", TRCSSPCICR2, {}}, + {"trcsspcicr3", TRCSSPCICR3, {}}, + {"trcsspcicr4", TRCSSPCICR4, {}}, + {"trcsspcicr5", TRCSSPCICR5, {}}, + {"trcsspcicr6", TRCSSPCICR6, {}}, + {"trcsspcicr7", TRCSSPCICR7, {}}, + {"trcpdcr", TRCPDCR, {}}, + {"trcacvr0", TRCACVR0, {}}, + {"trcacvr1", TRCACVR1, {}}, + {"trcacvr2", TRCACVR2, {}}, + {"trcacvr3", TRCACVR3, {}}, + {"trcacvr4", TRCACVR4, {}}, + {"trcacvr5", TRCACVR5, {}}, + {"trcacvr6", TRCACVR6, {}}, + {"trcacvr7", TRCACVR7, {}}, + {"trcacvr8", TRCACVR8, {}}, + {"trcacvr9", TRCACVR9, {}}, + {"trcacvr10", TRCACVR10, {}}, + {"trcacvr11", TRCACVR11, {}}, + {"trcacvr12", TRCACVR12, {}}, + {"trcacvr13", TRCACVR13, {}}, + {"trcacvr14", TRCACVR14, {}}, + {"trcacvr15", TRCACVR15, {}}, + {"trcacatr0", TRCACATR0, {}}, + {"trcacatr1", TRCACATR1, {}}, + {"trcacatr2", TRCACATR2, {}}, + {"trcacatr3", TRCACATR3, {}}, + {"trcacatr4", TRCACATR4, {}}, + {"trcacatr5", TRCACATR5, {}}, + {"trcacatr6", TRCACATR6, {}}, + {"trcacatr7", TRCACATR7, {}}, + {"trcacatr8", TRCACATR8, {}}, + {"trcacatr9", TRCACATR9, {}}, + {"trcacatr10", TRCACATR10, {}}, + {"trcacatr11", TRCACATR11, {}}, + {"trcacatr12", TRCACATR12, {}}, + {"trcacatr13", TRCACATR13, {}}, + {"trcacatr14", TRCACATR14, {}}, + {"trcacatr15", TRCACATR15, {}}, + {"trcdvcvr0", TRCDVCVR0, {}}, + {"trcdvcvr1", TRCDVCVR1, {}}, + {"trcdvcvr2", TRCDVCVR2, {}}, + {"trcdvcvr3", TRCDVCVR3, {}}, + {"trcdvcvr4", TRCDVCVR4, {}}, + {"trcdvcvr5", TRCDVCVR5, {}}, + {"trcdvcvr6", TRCDVCVR6, {}}, + {"trcdvcvr7", TRCDVCVR7, {}}, + {"trcdvcmr0", TRCDVCMR0, {}}, + {"trcdvcmr1", TRCDVCMR1, {}}, + {"trcdvcmr2", TRCDVCMR2, {}}, + {"trcdvcmr3", TRCDVCMR3, {}}, + {"trcdvcmr4", TRCDVCMR4, {}}, + {"trcdvcmr5", TRCDVCMR5, {}}, + {"trcdvcmr6", TRCDVCMR6, {}}, + {"trcdvcmr7", TRCDVCMR7, {}}, + {"trccidcvr0", TRCCIDCVR0, {}}, + {"trccidcvr1", TRCCIDCVR1, {}}, + {"trccidcvr2", TRCCIDCVR2, {}}, + {"trccidcvr3", TRCCIDCVR3, {}}, + {"trccidcvr4", TRCCIDCVR4, {}}, + {"trccidcvr5", TRCCIDCVR5, {}}, + {"trccidcvr6", TRCCIDCVR6, {}}, + {"trccidcvr7", TRCCIDCVR7, {}}, + {"trcvmidcvr0", TRCVMIDCVR0, {}}, + {"trcvmidcvr1", TRCVMIDCVR1, {}}, + {"trcvmidcvr2", TRCVMIDCVR2, {}}, + {"trcvmidcvr3", TRCVMIDCVR3, {}}, + {"trcvmidcvr4", TRCVMIDCVR4, {}}, + {"trcvmidcvr5", TRCVMIDCVR5, {}}, + {"trcvmidcvr6", TRCVMIDCVR6, {}}, + {"trcvmidcvr7", TRCVMIDCVR7, {}}, + {"trccidcctlr0", TRCCIDCCTLR0, {}}, + {"trccidcctlr1", TRCCIDCCTLR1, {}}, + {"trcvmidcctlr0", TRCVMIDCCTLR0, {}}, + {"trcvmidcctlr1", TRCVMIDCCTLR1, {}}, + {"trcitctrl", TRCITCTRL, {}}, + {"trcclaimset", TRCCLAIMSET, {}}, + {"trcclaimclr", TRCCLAIMCLR, {}}, + + // GICv3 registers + {"icc_bpr1_el1", ICC_BPR1_EL1, {}}, + {"icc_bpr0_el1", ICC_BPR0_EL1, {}}, + {"icc_pmr_el1", ICC_PMR_EL1, {}}, + {"icc_ctlr_el1", ICC_CTLR_EL1, {}}, + {"icc_ctlr_el3", ICC_CTLR_EL3, {}}, + {"icc_sre_el1", ICC_SRE_EL1, {}}, + {"icc_sre_el2", ICC_SRE_EL2, {}}, + {"icc_sre_el3", ICC_SRE_EL3, {}}, + {"icc_igrpen0_el1", ICC_IGRPEN0_EL1, {}}, + {"icc_igrpen1_el1", ICC_IGRPEN1_EL1, {}}, + {"icc_igrpen1_el3", ICC_IGRPEN1_EL3, {}}, + {"icc_seien_el1", ICC_SEIEN_EL1, {}}, + {"icc_ap0r0_el1", ICC_AP0R0_EL1, {}}, + {"icc_ap0r1_el1", ICC_AP0R1_EL1, {}}, + {"icc_ap0r2_el1", ICC_AP0R2_EL1, {}}, + {"icc_ap0r3_el1", ICC_AP0R3_EL1, {}}, + {"icc_ap1r0_el1", ICC_AP1R0_EL1, {}}, + {"icc_ap1r1_el1", ICC_AP1R1_EL1, {}}, + {"icc_ap1r2_el1", ICC_AP1R2_EL1, {}}, + {"icc_ap1r3_el1", ICC_AP1R3_EL1, {}}, + {"ich_ap0r0_el2", ICH_AP0R0_EL2, {}}, + {"ich_ap0r1_el2", ICH_AP0R1_EL2, {}}, + {"ich_ap0r2_el2", ICH_AP0R2_EL2, {}}, + {"ich_ap0r3_el2", ICH_AP0R3_EL2, {}}, + {"ich_ap1r0_el2", ICH_AP1R0_EL2, {}}, + {"ich_ap1r1_el2", ICH_AP1R1_EL2, {}}, + {"ich_ap1r2_el2", ICH_AP1R2_EL2, {}}, + {"ich_ap1r3_el2", ICH_AP1R3_EL2, {}}, + {"ich_hcr_el2", ICH_HCR_EL2, {}}, + {"ich_misr_el2", ICH_MISR_EL2, {}}, + {"ich_vmcr_el2", ICH_VMCR_EL2, {}}, + {"ich_vseir_el2", ICH_VSEIR_EL2, {}}, + {"ich_lr0_el2", ICH_LR0_EL2, {}}, + {"ich_lr1_el2", ICH_LR1_EL2, {}}, + {"ich_lr2_el2", ICH_LR2_EL2, {}}, + {"ich_lr3_el2", ICH_LR3_EL2, {}}, + {"ich_lr4_el2", ICH_LR4_EL2, {}}, + {"ich_lr5_el2", ICH_LR5_EL2, {}}, + {"ich_lr6_el2", ICH_LR6_EL2, {}}, + {"ich_lr7_el2", ICH_LR7_EL2, {}}, + {"ich_lr8_el2", ICH_LR8_EL2, {}}, + {"ich_lr9_el2", ICH_LR9_EL2, {}}, + {"ich_lr10_el2", ICH_LR10_EL2, {}}, + {"ich_lr11_el2", ICH_LR11_EL2, {}}, + {"ich_lr12_el2", ICH_LR12_EL2, {}}, + {"ich_lr13_el2", ICH_LR13_EL2, {}}, + {"ich_lr14_el2", ICH_LR14_EL2, {}}, + {"ich_lr15_el2", ICH_LR15_EL2, {}}, + + // Cyclone registers + {"cpm_ioacc_ctl_el3", CPM_IOACC_CTL_EL3, {AArch64::ProcCyclone}}, + + // v8.1a "Privileged Access Never" extension-specific system registers + {"pan", PAN, {AArch64::HasV8_1aOps}}, + + // v8.1a "Limited Ordering Regions" extension-specific system registers + {"lorsa_el1", LORSA_EL1, {AArch64::HasV8_1aOps}}, + {"lorea_el1", LOREA_EL1, {AArch64::HasV8_1aOps}}, + {"lorn_el1", LORN_EL1, {AArch64::HasV8_1aOps}}, + {"lorc_el1", LORC_EL1, {AArch64::HasV8_1aOps}}, + + // v8.1a "Virtualization host extensions" system registers + {"ttbr1_el2", TTBR1_EL2, {AArch64::HasV8_1aOps}}, + {"contextidr_el2", CONTEXTIDR_EL2, {AArch64::HasV8_1aOps}}, + {"cnthv_tval_el2", CNTHV_TVAL_EL2, {AArch64::HasV8_1aOps}}, + {"cnthv_cval_el2", CNTHV_CVAL_EL2, {AArch64::HasV8_1aOps}}, + {"cnthv_ctl_el2", CNTHV_CTL_EL2, {AArch64::HasV8_1aOps}}, + {"sctlr_el12", SCTLR_EL12, {AArch64::HasV8_1aOps}}, + {"cpacr_el12", CPACR_EL12, {AArch64::HasV8_1aOps}}, + {"ttbr0_el12", TTBR0_EL12, {AArch64::HasV8_1aOps}}, + {"ttbr1_el12", TTBR1_EL12, {AArch64::HasV8_1aOps}}, + {"tcr_el12", TCR_EL12, {AArch64::HasV8_1aOps}}, + {"afsr0_el12", AFSR0_EL12, {AArch64::HasV8_1aOps}}, + {"afsr1_el12", AFSR1_EL12, {AArch64::HasV8_1aOps}}, + {"esr_el12", ESR_EL12, {AArch64::HasV8_1aOps}}, + {"far_el12", FAR_EL12, {AArch64::HasV8_1aOps}}, + {"mair_el12", MAIR_EL12, {AArch64::HasV8_1aOps}}, + {"amair_el12", AMAIR_EL12, {AArch64::HasV8_1aOps}}, + {"vbar_el12", VBAR_EL12, {AArch64::HasV8_1aOps}}, + {"contextidr_el12", CONTEXTIDR_EL12, {AArch64::HasV8_1aOps}}, + {"cntkctl_el12", CNTKCTL_EL12, {AArch64::HasV8_1aOps}}, + {"cntp_tval_el02", CNTP_TVAL_EL02, {AArch64::HasV8_1aOps}}, + {"cntp_ctl_el02", CNTP_CTL_EL02, {AArch64::HasV8_1aOps}}, + {"cntp_cval_el02", CNTP_CVAL_EL02, {AArch64::HasV8_1aOps}}, + {"cntv_tval_el02", CNTV_TVAL_EL02, {AArch64::HasV8_1aOps}}, + {"cntv_ctl_el02", CNTV_CTL_EL02, {AArch64::HasV8_1aOps}}, + {"cntv_cval_el02", CNTV_CVAL_EL02, {AArch64::HasV8_1aOps}}, + {"spsr_el12", SPSR_EL12, {AArch64::HasV8_1aOps}}, + {"elr_el12", ELR_EL12, {AArch64::HasV8_1aOps}}, + + // v8.2a registers + {"uao", UAO, {AArch64::HasV8_2aOps}}, + + // v8.2a "Statistical Profiling extension" registers + {"pmblimitr_el1", PMBLIMITR_EL1, {AArch64::FeatureSPE}}, + {"pmbptr_el1", PMBPTR_EL1, {AArch64::FeatureSPE}}, + {"pmbsr_el1", PMBSR_EL1, {AArch64::FeatureSPE}}, + {"pmbidr_el1", PMBIDR_EL1, {AArch64::FeatureSPE}}, + {"pmscr_el2", PMSCR_EL2, {AArch64::FeatureSPE}}, + {"pmscr_el12", PMSCR_EL12, {AArch64::FeatureSPE}}, + {"pmscr_el1", PMSCR_EL1, {AArch64::FeatureSPE}}, + {"pmsicr_el1", PMSICR_EL1, {AArch64::FeatureSPE}}, + {"pmsirr_el1", PMSIRR_EL1, {AArch64::FeatureSPE}}, + {"pmsfcr_el1", PMSFCR_EL1, {AArch64::FeatureSPE}}, + {"pmsevfr_el1", PMSEVFR_EL1, {AArch64::FeatureSPE}}, + {"pmslatfr_el1", PMSLATFR_EL1, {AArch64::FeatureSPE}}, + {"pmsidr_el1", PMSIDR_EL1, {AArch64::FeatureSPE}}, +}; + +uint32_t +AArch64SysReg::SysRegMapper::fromString(StringRef Name, + const FeatureBitset& FeatureBits, bool &Valid) const { + std::string NameLower = Name.lower(); + + // First search the registers shared by all + for (unsigned i = 0; i < array_lengthof(SysRegMappings); ++i) { + if (SysRegMappings[i].isNameEqual(NameLower, FeatureBits)) { + Valid = true; + return SysRegMappings[i].Value; + } + } + + // Now try the instruction-specific registers (either read-only or + // write-only). + for (unsigned i = 0; i < NumInstMappings; ++i) { + if (InstMappings[i].isNameEqual(NameLower, FeatureBits)) { + Valid = true; + return InstMappings[i].Value; + } + } + + // Try to parse an S____ register name + Regex GenericRegPattern("^s([0-3])_([0-7])_c([0-9]|1[0-5])_c([0-9]|1[0-5])_([0-7])$"); + + SmallVector Ops; + if (!GenericRegPattern.match(NameLower, &Ops)) { + Valid = false; + return -1; + } + + uint32_t Op0 = 0, Op1 = 0, CRn = 0, CRm = 0, Op2 = 0; + uint32_t Bits; + Ops[1].getAsInteger(10, Op0); + Ops[2].getAsInteger(10, Op1); + Ops[3].getAsInteger(10, CRn); + Ops[4].getAsInteger(10, CRm); + Ops[5].getAsInteger(10, Op2); + Bits = (Op0 << 14) | (Op1 << 11) | (CRn << 7) | (CRm << 3) | Op2; + + Valid = true; + return Bits; +} + +std::string +AArch64SysReg::SysRegMapper::toString(uint32_t Bits, + const FeatureBitset& FeatureBits) const { + // First search the registers shared by all + for (unsigned i = 0; i < array_lengthof(SysRegMappings); ++i) { + if (SysRegMappings[i].isValueEqual(Bits, FeatureBits)) { + return SysRegMappings[i].Name; + } + } + + // Now try the instruction-specific registers (either read-only or + // write-only). + for (unsigned i = 0; i < NumInstMappings; ++i) { + if (InstMappings[i].isValueEqual(Bits, FeatureBits)) { + return InstMappings[i].Name; + } + } + + assert(Bits < 0x10000); + uint32_t Op0 = (Bits >> 14) & 0x3; + uint32_t Op1 = (Bits >> 11) & 0x7; + uint32_t CRn = (Bits >> 7) & 0xf; + uint32_t CRm = (Bits >> 3) & 0xf; + uint32_t Op2 = Bits & 0x7; + + return "s" + utostr(Op0)+ "_" + utostr(Op1) + "_c" + utostr(CRn) + + "_c" + utostr(CRm) + "_" + utostr(Op2); +} + +const AArch64NamedImmMapper::Mapping AArch64TLBI::TLBIMapper::TLBIMappings[] = { + {"ipas2e1is", IPAS2E1IS, {}}, + {"ipas2le1is", IPAS2LE1IS, {}}, + {"vmalle1is", VMALLE1IS, {}}, + {"alle2is", ALLE2IS, {}}, + {"alle3is", ALLE3IS, {}}, + {"vae1is", VAE1IS, {}}, + {"vae2is", VAE2IS, {}}, + {"vae3is", VAE3IS, {}}, + {"aside1is", ASIDE1IS, {}}, + {"vaae1is", VAAE1IS, {}}, + {"alle1is", ALLE1IS, {}}, + {"vale1is", VALE1IS, {}}, + {"vale2is", VALE2IS, {}}, + {"vale3is", VALE3IS, {}}, + {"vmalls12e1is", VMALLS12E1IS, {}}, + {"vaale1is", VAALE1IS, {}}, + {"ipas2e1", IPAS2E1, {}}, + {"ipas2le1", IPAS2LE1, {}}, + {"vmalle1", VMALLE1, {}}, + {"alle2", ALLE2, {}}, + {"alle3", ALLE3, {}}, + {"vae1", VAE1, {}}, + {"vae2", VAE2, {}}, + {"vae3", VAE3, {}}, + {"aside1", ASIDE1, {}}, + {"vaae1", VAAE1, {}}, + {"alle1", ALLE1, {}}, + {"vale1", VALE1, {}}, + {"vale2", VALE2, {}}, + {"vale3", VALE3, {}}, + {"vmalls12e1", VMALLS12E1, {}}, + {"vaale1", VAALE1, {}} +}; + +AArch64TLBI::TLBIMapper::TLBIMapper() + : AArch64NamedImmMapper(TLBIMappings, 0) {} diff --git a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h new file mode 100644 index 0000000..45b3028 --- /dev/null +++ b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h @@ -0,0 +1,1393 @@ +//===-- AArch64BaseInfo.h - Top level definitions for AArch64 ---*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains small standalone helper functions and enum definitions for +// the AArch64 target useful for the compiler back-end and the MC libraries. +// As such, it deliberately does not include references to LLVM core +// code gen types, passes, etc.. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIB_TARGET_AARCH64_UTILS_AARCH64BASEINFO_H +#define LLVM_LIB_TARGET_AARCH64_UTILS_AARCH64BASEINFO_H + +// FIXME: Is it easiest to fix this layering violation by moving the .inc +// #includes from AArch64MCTargetDesc.h to here? +#include "MCTargetDesc/AArch64MCTargetDesc.h" // For AArch64::X0 and friends. +#include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/StringSwitch.h" +#include "llvm/MC/SubtargetFeature.h" +#include "llvm/Support/ErrorHandling.h" + +namespace llvm_ks { + +inline static unsigned getWRegFromXReg(unsigned Reg) { + switch (Reg) { + case AArch64::X0: return AArch64::W0; + case AArch64::X1: return AArch64::W1; + case AArch64::X2: return AArch64::W2; + case AArch64::X3: return AArch64::W3; + case AArch64::X4: return AArch64::W4; + case AArch64::X5: return AArch64::W5; + case AArch64::X6: return AArch64::W6; + case AArch64::X7: return AArch64::W7; + case AArch64::X8: return AArch64::W8; + case AArch64::X9: return AArch64::W9; + case AArch64::X10: return AArch64::W10; + case AArch64::X11: return AArch64::W11; + case AArch64::X12: return AArch64::W12; + case AArch64::X13: return AArch64::W13; + case AArch64::X14: return AArch64::W14; + case AArch64::X15: return AArch64::W15; + case AArch64::X16: return AArch64::W16; + case AArch64::X17: return AArch64::W17; + case AArch64::X18: return AArch64::W18; + case AArch64::X19: return AArch64::W19; + case AArch64::X20: return AArch64::W20; + case AArch64::X21: return AArch64::W21; + case AArch64::X22: return AArch64::W22; + case AArch64::X23: return AArch64::W23; + case AArch64::X24: return AArch64::W24; + case AArch64::X25: return AArch64::W25; + case AArch64::X26: return AArch64::W26; + case AArch64::X27: return AArch64::W27; + case AArch64::X28: return AArch64::W28; + case AArch64::FP: return AArch64::W29; + case AArch64::LR: return AArch64::W30; + case AArch64::SP: return AArch64::WSP; + case AArch64::XZR: return AArch64::WZR; + } + // For anything else, return it unchanged. + return Reg; +} + +inline static unsigned getXRegFromWReg(unsigned Reg) { + switch (Reg) { + case AArch64::W0: return AArch64::X0; + case AArch64::W1: return AArch64::X1; + case AArch64::W2: return AArch64::X2; + case AArch64::W3: return AArch64::X3; + case AArch64::W4: return AArch64::X4; + case AArch64::W5: return AArch64::X5; + case AArch64::W6: return AArch64::X6; + case AArch64::W7: return AArch64::X7; + case AArch64::W8: return AArch64::X8; + case AArch64::W9: return AArch64::X9; + case AArch64::W10: return AArch64::X10; + case AArch64::W11: return AArch64::X11; + case AArch64::W12: return AArch64::X12; + case AArch64::W13: return AArch64::X13; + case AArch64::W14: return AArch64::X14; + case AArch64::W15: return AArch64::X15; + case AArch64::W16: return AArch64::X16; + case AArch64::W17: return AArch64::X17; + case AArch64::W18: return AArch64::X18; + case AArch64::W19: return AArch64::X19; + case AArch64::W20: return AArch64::X20; + case AArch64::W21: return AArch64::X21; + case AArch64::W22: return AArch64::X22; + case AArch64::W23: return AArch64::X23; + case AArch64::W24: return AArch64::X24; + case AArch64::W25: return AArch64::X25; + case AArch64::W26: return AArch64::X26; + case AArch64::W27: return AArch64::X27; + case AArch64::W28: return AArch64::X28; + case AArch64::W29: return AArch64::FP; + case AArch64::W30: return AArch64::LR; + case AArch64::WSP: return AArch64::SP; + case AArch64::WZR: return AArch64::XZR; + } + // For anything else, return it unchanged. + return Reg; +} + +static inline unsigned getBRegFromDReg(unsigned Reg) { + switch (Reg) { + case AArch64::D0: return AArch64::B0; + case AArch64::D1: return AArch64::B1; + case AArch64::D2: return AArch64::B2; + case AArch64::D3: return AArch64::B3; + case AArch64::D4: return AArch64::B4; + case AArch64::D5: return AArch64::B5; + case AArch64::D6: return AArch64::B6; + case AArch64::D7: return AArch64::B7; + case AArch64::D8: return AArch64::B8; + case AArch64::D9: return AArch64::B9; + case AArch64::D10: return AArch64::B10; + case AArch64::D11: return AArch64::B11; + case AArch64::D12: return AArch64::B12; + case AArch64::D13: return AArch64::B13; + case AArch64::D14: return AArch64::B14; + case AArch64::D15: return AArch64::B15; + case AArch64::D16: return AArch64::B16; + case AArch64::D17: return AArch64::B17; + case AArch64::D18: return AArch64::B18; + case AArch64::D19: return AArch64::B19; + case AArch64::D20: return AArch64::B20; + case AArch64::D21: return AArch64::B21; + case AArch64::D22: return AArch64::B22; + case AArch64::D23: return AArch64::B23; + case AArch64::D24: return AArch64::B24; + case AArch64::D25: return AArch64::B25; + case AArch64::D26: return AArch64::B26; + case AArch64::D27: return AArch64::B27; + case AArch64::D28: return AArch64::B28; + case AArch64::D29: return AArch64::B29; + case AArch64::D30: return AArch64::B30; + case AArch64::D31: return AArch64::B31; + } + // For anything else, return it unchanged. + return Reg; +} + + +static inline unsigned getDRegFromBReg(unsigned Reg) { + switch (Reg) { + case AArch64::B0: return AArch64::D0; + case AArch64::B1: return AArch64::D1; + case AArch64::B2: return AArch64::D2; + case AArch64::B3: return AArch64::D3; + case AArch64::B4: return AArch64::D4; + case AArch64::B5: return AArch64::D5; + case AArch64::B6: return AArch64::D6; + case AArch64::B7: return AArch64::D7; + case AArch64::B8: return AArch64::D8; + case AArch64::B9: return AArch64::D9; + case AArch64::B10: return AArch64::D10; + case AArch64::B11: return AArch64::D11; + case AArch64::B12: return AArch64::D12; + case AArch64::B13: return AArch64::D13; + case AArch64::B14: return AArch64::D14; + case AArch64::B15: return AArch64::D15; + case AArch64::B16: return AArch64::D16; + case AArch64::B17: return AArch64::D17; + case AArch64::B18: return AArch64::D18; + case AArch64::B19: return AArch64::D19; + case AArch64::B20: return AArch64::D20; + case AArch64::B21: return AArch64::D21; + case AArch64::B22: return AArch64::D22; + case AArch64::B23: return AArch64::D23; + case AArch64::B24: return AArch64::D24; + case AArch64::B25: return AArch64::D25; + case AArch64::B26: return AArch64::D26; + case AArch64::B27: return AArch64::D27; + case AArch64::B28: return AArch64::D28; + case AArch64::B29: return AArch64::D29; + case AArch64::B30: return AArch64::D30; + case AArch64::B31: return AArch64::D31; + } + // For anything else, return it unchanged. + return Reg; +} + +namespace AArch64CC { + +// The CondCodes constants map directly to the 4-bit encoding of the condition +// field for predicated instructions. +enum CondCode { // Meaning (integer) Meaning (floating-point) + EQ = 0x0, // Equal Equal + NE = 0x1, // Not equal Not equal, or unordered + HS = 0x2, // Unsigned higher or same >, ==, or unordered + LO = 0x3, // Unsigned lower Less than + MI = 0x4, // Minus, negative Less than + PL = 0x5, // Plus, positive or zero >, ==, or unordered + VS = 0x6, // Overflow Unordered + VC = 0x7, // No overflow Not unordered + HI = 0x8, // Unsigned higher Greater than, or unordered + LS = 0x9, // Unsigned lower or same Less than or equal + GE = 0xa, // Greater than or equal Greater than or equal + LT = 0xb, // Less than Less than, or unordered + GT = 0xc, // Greater than Greater than + LE = 0xd, // Less than or equal <, ==, or unordered + AL = 0xe, // Always (unconditional) Always (unconditional) + NV = 0xf, // Always (unconditional) Always (unconditional) + // Note the NV exists purely to disassemble 0b1111. Execution is "always". + Invalid +}; + +inline static const char *getCondCodeName(CondCode Code) { + switch (Code) { + default: llvm_unreachable("Unknown condition code"); + case EQ: return "eq"; + case NE: return "ne"; + case HS: return "hs"; + case LO: return "lo"; + case MI: return "mi"; + case PL: return "pl"; + case VS: return "vs"; + case VC: return "vc"; + case HI: return "hi"; + case LS: return "ls"; + case GE: return "ge"; + case LT: return "lt"; + case GT: return "gt"; + case LE: return "le"; + case AL: return "al"; + case NV: return "nv"; + } +} + +inline static CondCode getInvertedCondCode(CondCode Code) { + // To reverse a condition it's necessary to only invert the low bit: + + return static_cast(static_cast(Code) ^ 0x1); +} + +/// Given a condition code, return NZCV flags that would satisfy that condition. +/// The flag bits are in the format expected by the ccmp instructions. +/// Note that many different flag settings can satisfy a given condition code, +/// this function just returns one of them. +inline static unsigned getNZCVToSatisfyCondCode(CondCode Code) { + // NZCV flags encoded as expected by ccmp instructions, ARMv8 ISA 5.5.7. + enum { N = 8, Z = 4, C = 2, V = 1 }; + switch (Code) { + default: llvm_unreachable("Unknown condition code"); + case EQ: return Z; // Z == 1 + case NE: return 0; // Z == 0 + case HS: return C; // C == 1 + case LO: return 0; // C == 0 + case MI: return N; // N == 1 + case PL: return 0; // N == 0 + case VS: return V; // V == 1 + case VC: return 0; // V == 0 + case HI: return C; // C == 1 && Z == 0 + case LS: return 0; // C == 0 || Z == 1 + case GE: return 0; // N == V + case LT: return N; // N != V + case GT: return 0; // Z == 0 && N == V + case LE: return Z; // Z == 1 || N != V + } +} +} // end namespace AArch64CC + +/// Instances of this class can perform bidirectional mapping from random +/// identifier strings to operand encodings. For example "MSR" takes a named +/// system-register which must be encoded somehow and decoded for printing. This +/// central location means that the information for those transformations is not +/// duplicated and remains in sync. +/// +/// FIXME: currently the algorithm is a completely unoptimised linear +/// search. Obviously this could be improved, but we would probably want to work +/// out just how often these instructions are emitted before working on it. It +/// might even be optimal to just reorder the tables for the common instructions +/// rather than changing the algorithm. +struct AArch64NamedImmMapper { + struct Mapping { + const char *Name; + uint32_t Value; + // Set of features this mapping is available for + // Zero value of FeatureBitSet means the mapping is always available + FeatureBitset FeatureBitSet; + + bool isNameEqual(std::string Other, + const FeatureBitset& FeatureBits) const { + if (FeatureBitSet.any() && + (FeatureBitSet & FeatureBits).none()) + return false; + return Name == Other; + } + + bool isValueEqual(uint32_t Other, + const FeatureBitset& FeatureBits) const { + if (FeatureBitSet.any() && + (FeatureBitSet & FeatureBits).none()) + return false; + return Value == Other; + } + }; + + template + AArch64NamedImmMapper(const Mapping (&Mappings)[N], uint32_t TooBigImm) + : Mappings(&Mappings[0]), NumMappings(N), TooBigImm(TooBigImm) {} + + // Maps value to string, depending on availability for FeatureBits given + StringRef toString(uint32_t Value, const FeatureBitset& FeatureBits, + bool &Valid) const; + // Maps string to value, depending on availability for FeatureBits given + uint32_t fromString(StringRef Name, const FeatureBitset& FeatureBits, + bool &Valid) const; + + /// Many of the instructions allow an alternative assembly form consisting of + /// a simple immediate. Currently the only valid forms are ranges [0, N) where + /// N being 0 indicates no immediate syntax-form is allowed. + bool validImm(uint32_t Value) const; +protected: + const Mapping *Mappings; + size_t NumMappings; + uint32_t TooBigImm; +}; + +namespace AArch64AT { + enum ATValues { + Invalid = -1, // Op0 Op1 CRn CRm Op2 + S1E1R = 0x43c0, // 01 000 0111 1000 000 + S1E2R = 0x63c0, // 01 100 0111 1000 000 + S1E3R = 0x73c0, // 01 110 0111 1000 000 + S1E1W = 0x43c1, // 01 000 0111 1000 001 + S1E2W = 0x63c1, // 01 100 0111 1000 001 + S1E3W = 0x73c1, // 01 110 0111 1000 001 + S1E0R = 0x43c2, // 01 000 0111 1000 010 + S1E0W = 0x43c3, // 01 000 0111 1000 011 + S12E1R = 0x63c4, // 01 100 0111 1000 100 + S12E1W = 0x63c5, // 01 100 0111 1000 101 + S12E0R = 0x63c6, // 01 100 0111 1000 110 + S12E0W = 0x63c7, // 01 100 0111 1000 111 + S1E1RP = 0x43c8, // 01 000 0111 1001 000 + S1E1WP = 0x43c9 // 01 000 0111 1001 001 + }; + + struct ATMapper : AArch64NamedImmMapper { + const static Mapping ATMappings[]; + + ATMapper(); + }; + +} +namespace AArch64DB { + enum DBValues { + Invalid = -1, + OSHLD = 0x1, + OSHST = 0x2, + OSH = 0x3, + NSHLD = 0x5, + NSHST = 0x6, + NSH = 0x7, + ISHLD = 0x9, + ISHST = 0xa, + ISH = 0xb, + LD = 0xd, + ST = 0xe, + SY = 0xf + }; + + struct DBarrierMapper : AArch64NamedImmMapper { + const static Mapping DBarrierMappings[]; + + DBarrierMapper(); + }; +} + +namespace AArch64DC { + enum DCValues { + Invalid = -1, // Op1 CRn CRm Op2 + ZVA = 0x5ba1, // 01 011 0111 0100 001 + IVAC = 0x43b1, // 01 000 0111 0110 001 + ISW = 0x43b2, // 01 000 0111 0110 010 + CVAC = 0x5bd1, // 01 011 0111 1010 001 + CSW = 0x43d2, // 01 000 0111 1010 010 + CVAU = 0x5bd9, // 01 011 0111 1011 001 + CIVAC = 0x5bf1, // 01 011 0111 1110 001 + CISW = 0x43f2 // 01 000 0111 1110 010 + }; + + struct DCMapper : AArch64NamedImmMapper { + const static Mapping DCMappings[]; + + DCMapper(); + }; + +} + +namespace AArch64IC { + enum ICValues { + Invalid = -1, // Op1 CRn CRm Op2 + IALLUIS = 0x0388, // 000 0111 0001 000 + IALLU = 0x03a8, // 000 0111 0101 000 + IVAU = 0x1ba9 // 011 0111 0101 001 + }; + + + struct ICMapper : AArch64NamedImmMapper { + const static Mapping ICMappings[]; + + ICMapper(); + }; + + static inline bool NeedsRegister(ICValues Val) { + return Val == IVAU; + } +} + +namespace AArch64ISB { + enum ISBValues { + Invalid = -1, + SY = 0xf + }; + struct ISBMapper : AArch64NamedImmMapper { + const static Mapping ISBMappings[]; + + ISBMapper(); + }; +} + +namespace AArch64PRFM { + enum PRFMValues { + Invalid = -1, + PLDL1KEEP = 0x00, + PLDL1STRM = 0x01, + PLDL2KEEP = 0x02, + PLDL2STRM = 0x03, + PLDL3KEEP = 0x04, + PLDL3STRM = 0x05, + PLIL1KEEP = 0x08, + PLIL1STRM = 0x09, + PLIL2KEEP = 0x0a, + PLIL2STRM = 0x0b, + PLIL3KEEP = 0x0c, + PLIL3STRM = 0x0d, + PSTL1KEEP = 0x10, + PSTL1STRM = 0x11, + PSTL2KEEP = 0x12, + PSTL2STRM = 0x13, + PSTL3KEEP = 0x14, + PSTL3STRM = 0x15 + }; + + struct PRFMMapper : AArch64NamedImmMapper { + const static Mapping PRFMMappings[]; + + PRFMMapper(); + }; +} + +namespace AArch64PState { + enum PStateValues { + Invalid = -1, + SPSel = 0x05, + DAIFSet = 0x1e, + DAIFClr = 0x1f, + + // v8.1a "Privileged Access Never" extension-specific PStates + PAN = 0x04, + + // v8.2a "User Access Override" extension-specific PStates + UAO = 0x03 + }; + + struct PStateMapper : AArch64NamedImmMapper { + const static Mapping PStateMappings[]; + + PStateMapper(); + }; + +} + +namespace AArch64PSBHint { + enum PSBHintValues { + Invalid = -1, + // v8.2a "Statistical Profiling" extension-specific PSB operands + CSync = 0x11, // psb csync = hint #0x11 + }; + + struct PSBHintMapper : AArch64NamedImmMapper { + const static Mapping PSBHintMappings[]; + + PSBHintMapper(); + }; + +} + +namespace AArch64SE { + enum ShiftExtSpecifiers { + Invalid = -1, + LSL, + MSL, + LSR, + ASR, + ROR, + + UXTB, + UXTH, + UXTW, + UXTX, + + SXTB, + SXTH, + SXTW, + SXTX + }; +} + +namespace AArch64Layout { + enum VectorLayout { + Invalid = -1, + VL_8B, + VL_4H, + VL_2S, + VL_1D, + + VL_16B, + VL_8H, + VL_4S, + VL_2D, + + // Bare layout for the 128-bit vector + // (only show ".b", ".h", ".s", ".d" without vector number) + VL_B, + VL_H, + VL_S, + VL_D + }; +} + +inline static const char * +AArch64VectorLayoutToString(AArch64Layout::VectorLayout Layout) { + switch (Layout) { + case AArch64Layout::VL_8B: return ".8b"; + case AArch64Layout::VL_4H: return ".4h"; + case AArch64Layout::VL_2S: return ".2s"; + case AArch64Layout::VL_1D: return ".1d"; + case AArch64Layout::VL_16B: return ".16b"; + case AArch64Layout::VL_8H: return ".8h"; + case AArch64Layout::VL_4S: return ".4s"; + case AArch64Layout::VL_2D: return ".2d"; + case AArch64Layout::VL_B: return ".b"; + case AArch64Layout::VL_H: return ".h"; + case AArch64Layout::VL_S: return ".s"; + case AArch64Layout::VL_D: return ".d"; + default: llvm_unreachable("Unknown Vector Layout"); + } +} + +inline static AArch64Layout::VectorLayout +AArch64StringToVectorLayout(StringRef LayoutStr) { + return StringSwitch(LayoutStr) + .Case(".8b", AArch64Layout::VL_8B) + .Case(".4h", AArch64Layout::VL_4H) + .Case(".2s", AArch64Layout::VL_2S) + .Case(".1d", AArch64Layout::VL_1D) + .Case(".16b", AArch64Layout::VL_16B) + .Case(".8h", AArch64Layout::VL_8H) + .Case(".4s", AArch64Layout::VL_4S) + .Case(".2d", AArch64Layout::VL_2D) + .Case(".b", AArch64Layout::VL_B) + .Case(".h", AArch64Layout::VL_H) + .Case(".s", AArch64Layout::VL_S) + .Case(".d", AArch64Layout::VL_D) + .Default(AArch64Layout::Invalid); +} + +namespace AArch64SysReg { + enum SysRegROValues { + MDCCSR_EL0 = 0x9808, // 10 011 0000 0001 000 + DBGDTRRX_EL0 = 0x9828, // 10 011 0000 0101 000 + MDRAR_EL1 = 0x8080, // 10 000 0001 0000 000 + OSLSR_EL1 = 0x808c, // 10 000 0001 0001 100 + DBGAUTHSTATUS_EL1 = 0x83f6, // 10 000 0111 1110 110 + PMCEID0_EL0 = 0xdce6, // 11 011 1001 1100 110 + PMCEID1_EL0 = 0xdce7, // 11 011 1001 1100 111 + MIDR_EL1 = 0xc000, // 11 000 0000 0000 000 + CCSIDR_EL1 = 0xc800, // 11 001 0000 0000 000 + CLIDR_EL1 = 0xc801, // 11 001 0000 0000 001 + CTR_EL0 = 0xd801, // 11 011 0000 0000 001 + MPIDR_EL1 = 0xc005, // 11 000 0000 0000 101 + REVIDR_EL1 = 0xc006, // 11 000 0000 0000 110 + AIDR_EL1 = 0xc807, // 11 001 0000 0000 111 + DCZID_EL0 = 0xd807, // 11 011 0000 0000 111 + ID_PFR0_EL1 = 0xc008, // 11 000 0000 0001 000 + ID_PFR1_EL1 = 0xc009, // 11 000 0000 0001 001 + ID_DFR0_EL1 = 0xc00a, // 11 000 0000 0001 010 + ID_AFR0_EL1 = 0xc00b, // 11 000 0000 0001 011 + ID_MMFR0_EL1 = 0xc00c, // 11 000 0000 0001 100 + ID_MMFR1_EL1 = 0xc00d, // 11 000 0000 0001 101 + ID_MMFR2_EL1 = 0xc00e, // 11 000 0000 0001 110 + ID_MMFR3_EL1 = 0xc00f, // 11 000 0000 0001 111 + ID_ISAR0_EL1 = 0xc010, // 11 000 0000 0010 000 + ID_ISAR1_EL1 = 0xc011, // 11 000 0000 0010 001 + ID_ISAR2_EL1 = 0xc012, // 11 000 0000 0010 010 + ID_ISAR3_EL1 = 0xc013, // 11 000 0000 0010 011 + ID_ISAR4_EL1 = 0xc014, // 11 000 0000 0010 100 + ID_ISAR5_EL1 = 0xc015, // 11 000 0000 0010 101 + ID_A64PFR0_EL1 = 0xc020, // 11 000 0000 0100 000 + ID_A64PFR1_EL1 = 0xc021, // 11 000 0000 0100 001 + ID_A64DFR0_EL1 = 0xc028, // 11 000 0000 0101 000 + ID_A64DFR1_EL1 = 0xc029, // 11 000 0000 0101 001 + ID_A64AFR0_EL1 = 0xc02c, // 11 000 0000 0101 100 + ID_A64AFR1_EL1 = 0xc02d, // 11 000 0000 0101 101 + ID_A64ISAR0_EL1 = 0xc030, // 11 000 0000 0110 000 + ID_A64ISAR1_EL1 = 0xc031, // 11 000 0000 0110 001 + ID_A64MMFR0_EL1 = 0xc038, // 11 000 0000 0111 000 + ID_A64MMFR1_EL1 = 0xc039, // 11 000 0000 0111 001 + ID_A64MMFR2_EL1 = 0xc03a, // 11 000 0000 0111 010 + MVFR0_EL1 = 0xc018, // 11 000 0000 0011 000 + MVFR1_EL1 = 0xc019, // 11 000 0000 0011 001 + MVFR2_EL1 = 0xc01a, // 11 000 0000 0011 010 + RVBAR_EL1 = 0xc601, // 11 000 1100 0000 001 + RVBAR_EL2 = 0xe601, // 11 100 1100 0000 001 + RVBAR_EL3 = 0xf601, // 11 110 1100 0000 001 + ISR_EL1 = 0xc608, // 11 000 1100 0001 000 + CNTPCT_EL0 = 0xdf01, // 11 011 1110 0000 001 + CNTVCT_EL0 = 0xdf02, // 11 011 1110 0000 010 + ID_MMFR4_EL1 = 0xc016, // 11 000 0000 0010 110 + + // Trace registers + TRCSTATR = 0x8818, // 10 001 0000 0011 000 + TRCIDR8 = 0x8806, // 10 001 0000 0000 110 + TRCIDR9 = 0x880e, // 10 001 0000 0001 110 + TRCIDR10 = 0x8816, // 10 001 0000 0010 110 + TRCIDR11 = 0x881e, // 10 001 0000 0011 110 + TRCIDR12 = 0x8826, // 10 001 0000 0100 110 + TRCIDR13 = 0x882e, // 10 001 0000 0101 110 + TRCIDR0 = 0x8847, // 10 001 0000 1000 111 + TRCIDR1 = 0x884f, // 10 001 0000 1001 111 + TRCIDR2 = 0x8857, // 10 001 0000 1010 111 + TRCIDR3 = 0x885f, // 10 001 0000 1011 111 + TRCIDR4 = 0x8867, // 10 001 0000 1100 111 + TRCIDR5 = 0x886f, // 10 001 0000 1101 111 + TRCIDR6 = 0x8877, // 10 001 0000 1110 111 + TRCIDR7 = 0x887f, // 10 001 0000 1111 111 + TRCOSLSR = 0x888c, // 10 001 0001 0001 100 + TRCPDSR = 0x88ac, // 10 001 0001 0101 100 + TRCDEVAFF0 = 0x8bd6, // 10 001 0111 1010 110 + TRCDEVAFF1 = 0x8bde, // 10 001 0111 1011 110 + TRCLSR = 0x8bee, // 10 001 0111 1101 110 + TRCAUTHSTATUS = 0x8bf6, // 10 001 0111 1110 110 + TRCDEVARCH = 0x8bfe, // 10 001 0111 1111 110 + TRCDEVID = 0x8b97, // 10 001 0111 0010 111 + TRCDEVTYPE = 0x8b9f, // 10 001 0111 0011 111 + TRCPIDR4 = 0x8ba7, // 10 001 0111 0100 111 + TRCPIDR5 = 0x8baf, // 10 001 0111 0101 111 + TRCPIDR6 = 0x8bb7, // 10 001 0111 0110 111 + TRCPIDR7 = 0x8bbf, // 10 001 0111 0111 111 + TRCPIDR0 = 0x8bc7, // 10 001 0111 1000 111 + TRCPIDR1 = 0x8bcf, // 10 001 0111 1001 111 + TRCPIDR2 = 0x8bd7, // 10 001 0111 1010 111 + TRCPIDR3 = 0x8bdf, // 10 001 0111 1011 111 + TRCCIDR0 = 0x8be7, // 10 001 0111 1100 111 + TRCCIDR1 = 0x8bef, // 10 001 0111 1101 111 + TRCCIDR2 = 0x8bf7, // 10 001 0111 1110 111 + TRCCIDR3 = 0x8bff, // 10 001 0111 1111 111 + + // GICv3 registers + ICC_IAR1_EL1 = 0xc660, // 11 000 1100 1100 000 + ICC_IAR0_EL1 = 0xc640, // 11 000 1100 1000 000 + ICC_HPPIR1_EL1 = 0xc662, // 11 000 1100 1100 010 + ICC_HPPIR0_EL1 = 0xc642, // 11 000 1100 1000 010 + ICC_RPR_EL1 = 0xc65b, // 11 000 1100 1011 011 + ICH_VTR_EL2 = 0xe659, // 11 100 1100 1011 001 + ICH_EISR_EL2 = 0xe65b, // 11 100 1100 1011 011 + ICH_ELSR_EL2 = 0xe65d // 11 100 1100 1011 101 + }; + + enum SysRegWOValues { + DBGDTRTX_EL0 = 0x9828, // 10 011 0000 0101 000 + OSLAR_EL1 = 0x8084, // 10 000 0001 0000 100 + PMSWINC_EL0 = 0xdce4, // 11 011 1001 1100 100 + + // Trace Registers + TRCOSLAR = 0x8884, // 10 001 0001 0000 100 + TRCLAR = 0x8be6, // 10 001 0111 1100 110 + + // GICv3 registers + ICC_EOIR1_EL1 = 0xc661, // 11 000 1100 1100 001 + ICC_EOIR0_EL1 = 0xc641, // 11 000 1100 1000 001 + ICC_DIR_EL1 = 0xc659, // 11 000 1100 1011 001 + ICC_SGI1R_EL1 = 0xc65d, // 11 000 1100 1011 101 + ICC_ASGI1R_EL1 = 0xc65e, // 11 000 1100 1011 110 + ICC_SGI0R_EL1 = 0xc65f // 11 000 1100 1011 111 + }; + + enum SysRegValues { + Invalid = -1, // Op0 Op1 CRn CRm Op2 + OSDTRRX_EL1 = 0x8002, // 10 000 0000 0000 010 + OSDTRTX_EL1 = 0x801a, // 10 000 0000 0011 010 + TEECR32_EL1 = 0x9000, // 10 010 0000 0000 000 + MDCCINT_EL1 = 0x8010, // 10 000 0000 0010 000 + MDSCR_EL1 = 0x8012, // 10 000 0000 0010 010 + DBGDTR_EL0 = 0x9820, // 10 011 0000 0100 000 + OSECCR_EL1 = 0x8032, // 10 000 0000 0110 010 + DBGVCR32_EL2 = 0xa038, // 10 100 0000 0111 000 + DBGBVR0_EL1 = 0x8004, // 10 000 0000 0000 100 + DBGBVR1_EL1 = 0x800c, // 10 000 0000 0001 100 + DBGBVR2_EL1 = 0x8014, // 10 000 0000 0010 100 + DBGBVR3_EL1 = 0x801c, // 10 000 0000 0011 100 + DBGBVR4_EL1 = 0x8024, // 10 000 0000 0100 100 + DBGBVR5_EL1 = 0x802c, // 10 000 0000 0101 100 + DBGBVR6_EL1 = 0x8034, // 10 000 0000 0110 100 + DBGBVR7_EL1 = 0x803c, // 10 000 0000 0111 100 + DBGBVR8_EL1 = 0x8044, // 10 000 0000 1000 100 + DBGBVR9_EL1 = 0x804c, // 10 000 0000 1001 100 + DBGBVR10_EL1 = 0x8054, // 10 000 0000 1010 100 + DBGBVR11_EL1 = 0x805c, // 10 000 0000 1011 100 + DBGBVR12_EL1 = 0x8064, // 10 000 0000 1100 100 + DBGBVR13_EL1 = 0x806c, // 10 000 0000 1101 100 + DBGBVR14_EL1 = 0x8074, // 10 000 0000 1110 100 + DBGBVR15_EL1 = 0x807c, // 10 000 0000 1111 100 + DBGBCR0_EL1 = 0x8005, // 10 000 0000 0000 101 + DBGBCR1_EL1 = 0x800d, // 10 000 0000 0001 101 + DBGBCR2_EL1 = 0x8015, // 10 000 0000 0010 101 + DBGBCR3_EL1 = 0x801d, // 10 000 0000 0011 101 + DBGBCR4_EL1 = 0x8025, // 10 000 0000 0100 101 + DBGBCR5_EL1 = 0x802d, // 10 000 0000 0101 101 + DBGBCR6_EL1 = 0x8035, // 10 000 0000 0110 101 + DBGBCR7_EL1 = 0x803d, // 10 000 0000 0111 101 + DBGBCR8_EL1 = 0x8045, // 10 000 0000 1000 101 + DBGBCR9_EL1 = 0x804d, // 10 000 0000 1001 101 + DBGBCR10_EL1 = 0x8055, // 10 000 0000 1010 101 + DBGBCR11_EL1 = 0x805d, // 10 000 0000 1011 101 + DBGBCR12_EL1 = 0x8065, // 10 000 0000 1100 101 + DBGBCR13_EL1 = 0x806d, // 10 000 0000 1101 101 + DBGBCR14_EL1 = 0x8075, // 10 000 0000 1110 101 + DBGBCR15_EL1 = 0x807d, // 10 000 0000 1111 101 + DBGWVR0_EL1 = 0x8006, // 10 000 0000 0000 110 + DBGWVR1_EL1 = 0x800e, // 10 000 0000 0001 110 + DBGWVR2_EL1 = 0x8016, // 10 000 0000 0010 110 + DBGWVR3_EL1 = 0x801e, // 10 000 0000 0011 110 + DBGWVR4_EL1 = 0x8026, // 10 000 0000 0100 110 + DBGWVR5_EL1 = 0x802e, // 10 000 0000 0101 110 + DBGWVR6_EL1 = 0x8036, // 10 000 0000 0110 110 + DBGWVR7_EL1 = 0x803e, // 10 000 0000 0111 110 + DBGWVR8_EL1 = 0x8046, // 10 000 0000 1000 110 + DBGWVR9_EL1 = 0x804e, // 10 000 0000 1001 110 + DBGWVR10_EL1 = 0x8056, // 10 000 0000 1010 110 + DBGWVR11_EL1 = 0x805e, // 10 000 0000 1011 110 + DBGWVR12_EL1 = 0x8066, // 10 000 0000 1100 110 + DBGWVR13_EL1 = 0x806e, // 10 000 0000 1101 110 + DBGWVR14_EL1 = 0x8076, // 10 000 0000 1110 110 + DBGWVR15_EL1 = 0x807e, // 10 000 0000 1111 110 + DBGWCR0_EL1 = 0x8007, // 10 000 0000 0000 111 + DBGWCR1_EL1 = 0x800f, // 10 000 0000 0001 111 + DBGWCR2_EL1 = 0x8017, // 10 000 0000 0010 111 + DBGWCR3_EL1 = 0x801f, // 10 000 0000 0011 111 + DBGWCR4_EL1 = 0x8027, // 10 000 0000 0100 111 + DBGWCR5_EL1 = 0x802f, // 10 000 0000 0101 111 + DBGWCR6_EL1 = 0x8037, // 10 000 0000 0110 111 + DBGWCR7_EL1 = 0x803f, // 10 000 0000 0111 111 + DBGWCR8_EL1 = 0x8047, // 10 000 0000 1000 111 + DBGWCR9_EL1 = 0x804f, // 10 000 0000 1001 111 + DBGWCR10_EL1 = 0x8057, // 10 000 0000 1010 111 + DBGWCR11_EL1 = 0x805f, // 10 000 0000 1011 111 + DBGWCR12_EL1 = 0x8067, // 10 000 0000 1100 111 + DBGWCR13_EL1 = 0x806f, // 10 000 0000 1101 111 + DBGWCR14_EL1 = 0x8077, // 10 000 0000 1110 111 + DBGWCR15_EL1 = 0x807f, // 10 000 0000 1111 111 + TEEHBR32_EL1 = 0x9080, // 10 010 0001 0000 000 + OSDLR_EL1 = 0x809c, // 10 000 0001 0011 100 + DBGPRCR_EL1 = 0x80a4, // 10 000 0001 0100 100 + DBGCLAIMSET_EL1 = 0x83c6, // 10 000 0111 1000 110 + DBGCLAIMCLR_EL1 = 0x83ce, // 10 000 0111 1001 110 + CSSELR_EL1 = 0xd000, // 11 010 0000 0000 000 + VPIDR_EL2 = 0xe000, // 11 100 0000 0000 000 + VMPIDR_EL2 = 0xe005, // 11 100 0000 0000 101 + CPACR_EL1 = 0xc082, // 11 000 0001 0000 010 + SCTLR_EL1 = 0xc080, // 11 000 0001 0000 000 + SCTLR_EL2 = 0xe080, // 11 100 0001 0000 000 + SCTLR_EL3 = 0xf080, // 11 110 0001 0000 000 + ACTLR_EL1 = 0xc081, // 11 000 0001 0000 001 + ACTLR_EL2 = 0xe081, // 11 100 0001 0000 001 + ACTLR_EL3 = 0xf081, // 11 110 0001 0000 001 + HCR_EL2 = 0xe088, // 11 100 0001 0001 000 + SCR_EL3 = 0xf088, // 11 110 0001 0001 000 + MDCR_EL2 = 0xe089, // 11 100 0001 0001 001 + SDER32_EL3 = 0xf089, // 11 110 0001 0001 001 + CPTR_EL2 = 0xe08a, // 11 100 0001 0001 010 + CPTR_EL3 = 0xf08a, // 11 110 0001 0001 010 + HSTR_EL2 = 0xe08b, // 11 100 0001 0001 011 + HACR_EL2 = 0xe08f, // 11 100 0001 0001 111 + MDCR_EL3 = 0xf099, // 11 110 0001 0011 001 + TTBR0_EL1 = 0xc100, // 11 000 0010 0000 000 + TTBR0_EL2 = 0xe100, // 11 100 0010 0000 000 + TTBR0_EL3 = 0xf100, // 11 110 0010 0000 000 + TTBR1_EL1 = 0xc101, // 11 000 0010 0000 001 + TCR_EL1 = 0xc102, // 11 000 0010 0000 010 + TCR_EL2 = 0xe102, // 11 100 0010 0000 010 + TCR_EL3 = 0xf102, // 11 110 0010 0000 010 + VTTBR_EL2 = 0xe108, // 11 100 0010 0001 000 + VTCR_EL2 = 0xe10a, // 11 100 0010 0001 010 + DACR32_EL2 = 0xe180, // 11 100 0011 0000 000 + SPSR_EL1 = 0xc200, // 11 000 0100 0000 000 + SPSR_EL2 = 0xe200, // 11 100 0100 0000 000 + SPSR_EL3 = 0xf200, // 11 110 0100 0000 000 + ELR_EL1 = 0xc201, // 11 000 0100 0000 001 + ELR_EL2 = 0xe201, // 11 100 0100 0000 001 + ELR_EL3 = 0xf201, // 11 110 0100 0000 001 + SP_EL0 = 0xc208, // 11 000 0100 0001 000 + SP_EL1 = 0xe208, // 11 100 0100 0001 000 + SP_EL2 = 0xf208, // 11 110 0100 0001 000 + SPSel = 0xc210, // 11 000 0100 0010 000 + NZCV = 0xda10, // 11 011 0100 0010 000 + DAIF = 0xda11, // 11 011 0100 0010 001 + CurrentEL = 0xc212, // 11 000 0100 0010 010 + SPSR_irq = 0xe218, // 11 100 0100 0011 000 + SPSR_abt = 0xe219, // 11 100 0100 0011 001 + SPSR_und = 0xe21a, // 11 100 0100 0011 010 + SPSR_fiq = 0xe21b, // 11 100 0100 0011 011 + FPCR = 0xda20, // 11 011 0100 0100 000 + FPSR = 0xda21, // 11 011 0100 0100 001 + DSPSR_EL0 = 0xda28, // 11 011 0100 0101 000 + DLR_EL0 = 0xda29, // 11 011 0100 0101 001 + IFSR32_EL2 = 0xe281, // 11 100 0101 0000 001 + AFSR0_EL1 = 0xc288, // 11 000 0101 0001 000 + AFSR0_EL2 = 0xe288, // 11 100 0101 0001 000 + AFSR0_EL3 = 0xf288, // 11 110 0101 0001 000 + AFSR1_EL1 = 0xc289, // 11 000 0101 0001 001 + AFSR1_EL2 = 0xe289, // 11 100 0101 0001 001 + AFSR1_EL3 = 0xf289, // 11 110 0101 0001 001 + ESR_EL1 = 0xc290, // 11 000 0101 0010 000 + ESR_EL2 = 0xe290, // 11 100 0101 0010 000 + ESR_EL3 = 0xf290, // 11 110 0101 0010 000 + FPEXC32_EL2 = 0xe298, // 11 100 0101 0011 000 + FAR_EL1 = 0xc300, // 11 000 0110 0000 000 + FAR_EL2 = 0xe300, // 11 100 0110 0000 000 + FAR_EL3 = 0xf300, // 11 110 0110 0000 000 + HPFAR_EL2 = 0xe304, // 11 100 0110 0000 100 + PAR_EL1 = 0xc3a0, // 11 000 0111 0100 000 + PMCR_EL0 = 0xdce0, // 11 011 1001 1100 000 + PMCNTENSET_EL0 = 0xdce1, // 11 011 1001 1100 001 + PMCNTENCLR_EL0 = 0xdce2, // 11 011 1001 1100 010 + PMOVSCLR_EL0 = 0xdce3, // 11 011 1001 1100 011 + PMSELR_EL0 = 0xdce5, // 11 011 1001 1100 101 + PMCCNTR_EL0 = 0xdce8, // 11 011 1001 1101 000 + PMXEVTYPER_EL0 = 0xdce9, // 11 011 1001 1101 001 + PMXEVCNTR_EL0 = 0xdcea, // 11 011 1001 1101 010 + PMUSERENR_EL0 = 0xdcf0, // 11 011 1001 1110 000 + PMINTENSET_EL1 = 0xc4f1, // 11 000 1001 1110 001 + PMINTENCLR_EL1 = 0xc4f2, // 11 000 1001 1110 010 + PMOVSSET_EL0 = 0xdcf3, // 11 011 1001 1110 011 + MAIR_EL1 = 0xc510, // 11 000 1010 0010 000 + MAIR_EL2 = 0xe510, // 11 100 1010 0010 000 + MAIR_EL3 = 0xf510, // 11 110 1010 0010 000 + AMAIR_EL1 = 0xc518, // 11 000 1010 0011 000 + AMAIR_EL2 = 0xe518, // 11 100 1010 0011 000 + AMAIR_EL3 = 0xf518, // 11 110 1010 0011 000 + VBAR_EL1 = 0xc600, // 11 000 1100 0000 000 + VBAR_EL2 = 0xe600, // 11 100 1100 0000 000 + VBAR_EL3 = 0xf600, // 11 110 1100 0000 000 + RMR_EL1 = 0xc602, // 11 000 1100 0000 010 + RMR_EL2 = 0xe602, // 11 100 1100 0000 010 + RMR_EL3 = 0xf602, // 11 110 1100 0000 010 + CONTEXTIDR_EL1 = 0xc681, // 11 000 1101 0000 001 + TPIDR_EL0 = 0xde82, // 11 011 1101 0000 010 + TPIDR_EL2 = 0xe682, // 11 100 1101 0000 010 + TPIDR_EL3 = 0xf682, // 11 110 1101 0000 010 + TPIDRRO_EL0 = 0xde83, // 11 011 1101 0000 011 + TPIDR_EL1 = 0xc684, // 11 000 1101 0000 100 + CNTFRQ_EL0 = 0xdf00, // 11 011 1110 0000 000 + CNTVOFF_EL2 = 0xe703, // 11 100 1110 0000 011 + CNTKCTL_EL1 = 0xc708, // 11 000 1110 0001 000 + CNTHCTL_EL2 = 0xe708, // 11 100 1110 0001 000 + CNTP_TVAL_EL0 = 0xdf10, // 11 011 1110 0010 000 + CNTHP_TVAL_EL2 = 0xe710, // 11 100 1110 0010 000 + CNTPS_TVAL_EL1 = 0xff10, // 11 111 1110 0010 000 + CNTP_CTL_EL0 = 0xdf11, // 11 011 1110 0010 001 + CNTHP_CTL_EL2 = 0xe711, // 11 100 1110 0010 001 + CNTPS_CTL_EL1 = 0xff11, // 11 111 1110 0010 001 + CNTP_CVAL_EL0 = 0xdf12, // 11 011 1110 0010 010 + CNTHP_CVAL_EL2 = 0xe712, // 11 100 1110 0010 010 + CNTPS_CVAL_EL1 = 0xff12, // 11 111 1110 0010 010 + CNTV_TVAL_EL0 = 0xdf18, // 11 011 1110 0011 000 + CNTV_CTL_EL0 = 0xdf19, // 11 011 1110 0011 001 + CNTV_CVAL_EL0 = 0xdf1a, // 11 011 1110 0011 010 + PMEVCNTR0_EL0 = 0xdf40, // 11 011 1110 1000 000 + PMEVCNTR1_EL0 = 0xdf41, // 11 011 1110 1000 001 + PMEVCNTR2_EL0 = 0xdf42, // 11 011 1110 1000 010 + PMEVCNTR3_EL0 = 0xdf43, // 11 011 1110 1000 011 + PMEVCNTR4_EL0 = 0xdf44, // 11 011 1110 1000 100 + PMEVCNTR5_EL0 = 0xdf45, // 11 011 1110 1000 101 + PMEVCNTR6_EL0 = 0xdf46, // 11 011 1110 1000 110 + PMEVCNTR7_EL0 = 0xdf47, // 11 011 1110 1000 111 + PMEVCNTR8_EL0 = 0xdf48, // 11 011 1110 1001 000 + PMEVCNTR9_EL0 = 0xdf49, // 11 011 1110 1001 001 + PMEVCNTR10_EL0 = 0xdf4a, // 11 011 1110 1001 010 + PMEVCNTR11_EL0 = 0xdf4b, // 11 011 1110 1001 011 + PMEVCNTR12_EL0 = 0xdf4c, // 11 011 1110 1001 100 + PMEVCNTR13_EL0 = 0xdf4d, // 11 011 1110 1001 101 + PMEVCNTR14_EL0 = 0xdf4e, // 11 011 1110 1001 110 + PMEVCNTR15_EL0 = 0xdf4f, // 11 011 1110 1001 111 + PMEVCNTR16_EL0 = 0xdf50, // 11 011 1110 1010 000 + PMEVCNTR17_EL0 = 0xdf51, // 11 011 1110 1010 001 + PMEVCNTR18_EL0 = 0xdf52, // 11 011 1110 1010 010 + PMEVCNTR19_EL0 = 0xdf53, // 11 011 1110 1010 011 + PMEVCNTR20_EL0 = 0xdf54, // 11 011 1110 1010 100 + PMEVCNTR21_EL0 = 0xdf55, // 11 011 1110 1010 101 + PMEVCNTR22_EL0 = 0xdf56, // 11 011 1110 1010 110 + PMEVCNTR23_EL0 = 0xdf57, // 11 011 1110 1010 111 + PMEVCNTR24_EL0 = 0xdf58, // 11 011 1110 1011 000 + PMEVCNTR25_EL0 = 0xdf59, // 11 011 1110 1011 001 + PMEVCNTR26_EL0 = 0xdf5a, // 11 011 1110 1011 010 + PMEVCNTR27_EL0 = 0xdf5b, // 11 011 1110 1011 011 + PMEVCNTR28_EL0 = 0xdf5c, // 11 011 1110 1011 100 + PMEVCNTR29_EL0 = 0xdf5d, // 11 011 1110 1011 101 + PMEVCNTR30_EL0 = 0xdf5e, // 11 011 1110 1011 110 + PMCCFILTR_EL0 = 0xdf7f, // 11 011 1110 1111 111 + PMEVTYPER0_EL0 = 0xdf60, // 11 011 1110 1100 000 + PMEVTYPER1_EL0 = 0xdf61, // 11 011 1110 1100 001 + PMEVTYPER2_EL0 = 0xdf62, // 11 011 1110 1100 010 + PMEVTYPER3_EL0 = 0xdf63, // 11 011 1110 1100 011 + PMEVTYPER4_EL0 = 0xdf64, // 11 011 1110 1100 100 + PMEVTYPER5_EL0 = 0xdf65, // 11 011 1110 1100 101 + PMEVTYPER6_EL0 = 0xdf66, // 11 011 1110 1100 110 + PMEVTYPER7_EL0 = 0xdf67, // 11 011 1110 1100 111 + PMEVTYPER8_EL0 = 0xdf68, // 11 011 1110 1101 000 + PMEVTYPER9_EL0 = 0xdf69, // 11 011 1110 1101 001 + PMEVTYPER10_EL0 = 0xdf6a, // 11 011 1110 1101 010 + PMEVTYPER11_EL0 = 0xdf6b, // 11 011 1110 1101 011 + PMEVTYPER12_EL0 = 0xdf6c, // 11 011 1110 1101 100 + PMEVTYPER13_EL0 = 0xdf6d, // 11 011 1110 1101 101 + PMEVTYPER14_EL0 = 0xdf6e, // 11 011 1110 1101 110 + PMEVTYPER15_EL0 = 0xdf6f, // 11 011 1110 1101 111 + PMEVTYPER16_EL0 = 0xdf70, // 11 011 1110 1110 000 + PMEVTYPER17_EL0 = 0xdf71, // 11 011 1110 1110 001 + PMEVTYPER18_EL0 = 0xdf72, // 11 011 1110 1110 010 + PMEVTYPER19_EL0 = 0xdf73, // 11 011 1110 1110 011 + PMEVTYPER20_EL0 = 0xdf74, // 11 011 1110 1110 100 + PMEVTYPER21_EL0 = 0xdf75, // 11 011 1110 1110 101 + PMEVTYPER22_EL0 = 0xdf76, // 11 011 1110 1110 110 + PMEVTYPER23_EL0 = 0xdf77, // 11 011 1110 1110 111 + PMEVTYPER24_EL0 = 0xdf78, // 11 011 1110 1111 000 + PMEVTYPER25_EL0 = 0xdf79, // 11 011 1110 1111 001 + PMEVTYPER26_EL0 = 0xdf7a, // 11 011 1110 1111 010 + PMEVTYPER27_EL0 = 0xdf7b, // 11 011 1110 1111 011 + PMEVTYPER28_EL0 = 0xdf7c, // 11 011 1110 1111 100 + PMEVTYPER29_EL0 = 0xdf7d, // 11 011 1110 1111 101 + PMEVTYPER30_EL0 = 0xdf7e, // 11 011 1110 1111 110 + + // Trace registers + TRCPRGCTLR = 0x8808, // 10 001 0000 0001 000 + TRCPROCSELR = 0x8810, // 10 001 0000 0010 000 + TRCCONFIGR = 0x8820, // 10 001 0000 0100 000 + TRCAUXCTLR = 0x8830, // 10 001 0000 0110 000 + TRCEVENTCTL0R = 0x8840, // 10 001 0000 1000 000 + TRCEVENTCTL1R = 0x8848, // 10 001 0000 1001 000 + TRCSTALLCTLR = 0x8858, // 10 001 0000 1011 000 + TRCTSCTLR = 0x8860, // 10 001 0000 1100 000 + TRCSYNCPR = 0x8868, // 10 001 0000 1101 000 + TRCCCCTLR = 0x8870, // 10 001 0000 1110 000 + TRCBBCTLR = 0x8878, // 10 001 0000 1111 000 + TRCTRACEIDR = 0x8801, // 10 001 0000 0000 001 + TRCQCTLR = 0x8809, // 10 001 0000 0001 001 + TRCVICTLR = 0x8802, // 10 001 0000 0000 010 + TRCVIIECTLR = 0x880a, // 10 001 0000 0001 010 + TRCVISSCTLR = 0x8812, // 10 001 0000 0010 010 + TRCVIPCSSCTLR = 0x881a, // 10 001 0000 0011 010 + TRCVDCTLR = 0x8842, // 10 001 0000 1000 010 + TRCVDSACCTLR = 0x884a, // 10 001 0000 1001 010 + TRCVDARCCTLR = 0x8852, // 10 001 0000 1010 010 + TRCSEQEVR0 = 0x8804, // 10 001 0000 0000 100 + TRCSEQEVR1 = 0x880c, // 10 001 0000 0001 100 + TRCSEQEVR2 = 0x8814, // 10 001 0000 0010 100 + TRCSEQRSTEVR = 0x8834, // 10 001 0000 0110 100 + TRCSEQSTR = 0x883c, // 10 001 0000 0111 100 + TRCEXTINSELR = 0x8844, // 10 001 0000 1000 100 + TRCCNTRLDVR0 = 0x8805, // 10 001 0000 0000 101 + TRCCNTRLDVR1 = 0x880d, // 10 001 0000 0001 101 + TRCCNTRLDVR2 = 0x8815, // 10 001 0000 0010 101 + TRCCNTRLDVR3 = 0x881d, // 10 001 0000 0011 101 + TRCCNTCTLR0 = 0x8825, // 10 001 0000 0100 101 + TRCCNTCTLR1 = 0x882d, // 10 001 0000 0101 101 + TRCCNTCTLR2 = 0x8835, // 10 001 0000 0110 101 + TRCCNTCTLR3 = 0x883d, // 10 001 0000 0111 101 + TRCCNTVR0 = 0x8845, // 10 001 0000 1000 101 + TRCCNTVR1 = 0x884d, // 10 001 0000 1001 101 + TRCCNTVR2 = 0x8855, // 10 001 0000 1010 101 + TRCCNTVR3 = 0x885d, // 10 001 0000 1011 101 + TRCIMSPEC0 = 0x8807, // 10 001 0000 0000 111 + TRCIMSPEC1 = 0x880f, // 10 001 0000 0001 111 + TRCIMSPEC2 = 0x8817, // 10 001 0000 0010 111 + TRCIMSPEC3 = 0x881f, // 10 001 0000 0011 111 + TRCIMSPEC4 = 0x8827, // 10 001 0000 0100 111 + TRCIMSPEC5 = 0x882f, // 10 001 0000 0101 111 + TRCIMSPEC6 = 0x8837, // 10 001 0000 0110 111 + TRCIMSPEC7 = 0x883f, // 10 001 0000 0111 111 + TRCRSCTLR2 = 0x8890, // 10 001 0001 0010 000 + TRCRSCTLR3 = 0x8898, // 10 001 0001 0011 000 + TRCRSCTLR4 = 0x88a0, // 10 001 0001 0100 000 + TRCRSCTLR5 = 0x88a8, // 10 001 0001 0101 000 + TRCRSCTLR6 = 0x88b0, // 10 001 0001 0110 000 + TRCRSCTLR7 = 0x88b8, // 10 001 0001 0111 000 + TRCRSCTLR8 = 0x88c0, // 10 001 0001 1000 000 + TRCRSCTLR9 = 0x88c8, // 10 001 0001 1001 000 + TRCRSCTLR10 = 0x88d0, // 10 001 0001 1010 000 + TRCRSCTLR11 = 0x88d8, // 10 001 0001 1011 000 + TRCRSCTLR12 = 0x88e0, // 10 001 0001 1100 000 + TRCRSCTLR13 = 0x88e8, // 10 001 0001 1101 000 + TRCRSCTLR14 = 0x88f0, // 10 001 0001 1110 000 + TRCRSCTLR15 = 0x88f8, // 10 001 0001 1111 000 + TRCRSCTLR16 = 0x8881, // 10 001 0001 0000 001 + TRCRSCTLR17 = 0x8889, // 10 001 0001 0001 001 + TRCRSCTLR18 = 0x8891, // 10 001 0001 0010 001 + TRCRSCTLR19 = 0x8899, // 10 001 0001 0011 001 + TRCRSCTLR20 = 0x88a1, // 10 001 0001 0100 001 + TRCRSCTLR21 = 0x88a9, // 10 001 0001 0101 001 + TRCRSCTLR22 = 0x88b1, // 10 001 0001 0110 001 + TRCRSCTLR23 = 0x88b9, // 10 001 0001 0111 001 + TRCRSCTLR24 = 0x88c1, // 10 001 0001 1000 001 + TRCRSCTLR25 = 0x88c9, // 10 001 0001 1001 001 + TRCRSCTLR26 = 0x88d1, // 10 001 0001 1010 001 + TRCRSCTLR27 = 0x88d9, // 10 001 0001 1011 001 + TRCRSCTLR28 = 0x88e1, // 10 001 0001 1100 001 + TRCRSCTLR29 = 0x88e9, // 10 001 0001 1101 001 + TRCRSCTLR30 = 0x88f1, // 10 001 0001 1110 001 + TRCRSCTLR31 = 0x88f9, // 10 001 0001 1111 001 + TRCSSCCR0 = 0x8882, // 10 001 0001 0000 010 + TRCSSCCR1 = 0x888a, // 10 001 0001 0001 010 + TRCSSCCR2 = 0x8892, // 10 001 0001 0010 010 + TRCSSCCR3 = 0x889a, // 10 001 0001 0011 010 + TRCSSCCR4 = 0x88a2, // 10 001 0001 0100 010 + TRCSSCCR5 = 0x88aa, // 10 001 0001 0101 010 + TRCSSCCR6 = 0x88b2, // 10 001 0001 0110 010 + TRCSSCCR7 = 0x88ba, // 10 001 0001 0111 010 + TRCSSCSR0 = 0x88c2, // 10 001 0001 1000 010 + TRCSSCSR1 = 0x88ca, // 10 001 0001 1001 010 + TRCSSCSR2 = 0x88d2, // 10 001 0001 1010 010 + TRCSSCSR3 = 0x88da, // 10 001 0001 1011 010 + TRCSSCSR4 = 0x88e2, // 10 001 0001 1100 010 + TRCSSCSR5 = 0x88ea, // 10 001 0001 1101 010 + TRCSSCSR6 = 0x88f2, // 10 001 0001 1110 010 + TRCSSCSR7 = 0x88fa, // 10 001 0001 1111 010 + TRCSSPCICR0 = 0x8883, // 10 001 0001 0000 011 + TRCSSPCICR1 = 0x888b, // 10 001 0001 0001 011 + TRCSSPCICR2 = 0x8893, // 10 001 0001 0010 011 + TRCSSPCICR3 = 0x889b, // 10 001 0001 0011 011 + TRCSSPCICR4 = 0x88a3, // 10 001 0001 0100 011 + TRCSSPCICR5 = 0x88ab, // 10 001 0001 0101 011 + TRCSSPCICR6 = 0x88b3, // 10 001 0001 0110 011 + TRCSSPCICR7 = 0x88bb, // 10 001 0001 0111 011 + TRCPDCR = 0x88a4, // 10 001 0001 0100 100 + TRCACVR0 = 0x8900, // 10 001 0010 0000 000 + TRCACVR1 = 0x8910, // 10 001 0010 0010 000 + TRCACVR2 = 0x8920, // 10 001 0010 0100 000 + TRCACVR3 = 0x8930, // 10 001 0010 0110 000 + TRCACVR4 = 0x8940, // 10 001 0010 1000 000 + TRCACVR5 = 0x8950, // 10 001 0010 1010 000 + TRCACVR6 = 0x8960, // 10 001 0010 1100 000 + TRCACVR7 = 0x8970, // 10 001 0010 1110 000 + TRCACVR8 = 0x8901, // 10 001 0010 0000 001 + TRCACVR9 = 0x8911, // 10 001 0010 0010 001 + TRCACVR10 = 0x8921, // 10 001 0010 0100 001 + TRCACVR11 = 0x8931, // 10 001 0010 0110 001 + TRCACVR12 = 0x8941, // 10 001 0010 1000 001 + TRCACVR13 = 0x8951, // 10 001 0010 1010 001 + TRCACVR14 = 0x8961, // 10 001 0010 1100 001 + TRCACVR15 = 0x8971, // 10 001 0010 1110 001 + TRCACATR0 = 0x8902, // 10 001 0010 0000 010 + TRCACATR1 = 0x8912, // 10 001 0010 0010 010 + TRCACATR2 = 0x8922, // 10 001 0010 0100 010 + TRCACATR3 = 0x8932, // 10 001 0010 0110 010 + TRCACATR4 = 0x8942, // 10 001 0010 1000 010 + TRCACATR5 = 0x8952, // 10 001 0010 1010 010 + TRCACATR6 = 0x8962, // 10 001 0010 1100 010 + TRCACATR7 = 0x8972, // 10 001 0010 1110 010 + TRCACATR8 = 0x8903, // 10 001 0010 0000 011 + TRCACATR9 = 0x8913, // 10 001 0010 0010 011 + TRCACATR10 = 0x8923, // 10 001 0010 0100 011 + TRCACATR11 = 0x8933, // 10 001 0010 0110 011 + TRCACATR12 = 0x8943, // 10 001 0010 1000 011 + TRCACATR13 = 0x8953, // 10 001 0010 1010 011 + TRCACATR14 = 0x8963, // 10 001 0010 1100 011 + TRCACATR15 = 0x8973, // 10 001 0010 1110 011 + TRCDVCVR0 = 0x8904, // 10 001 0010 0000 100 + TRCDVCVR1 = 0x8924, // 10 001 0010 0100 100 + TRCDVCVR2 = 0x8944, // 10 001 0010 1000 100 + TRCDVCVR3 = 0x8964, // 10 001 0010 1100 100 + TRCDVCVR4 = 0x8905, // 10 001 0010 0000 101 + TRCDVCVR5 = 0x8925, // 10 001 0010 0100 101 + TRCDVCVR6 = 0x8945, // 10 001 0010 1000 101 + TRCDVCVR7 = 0x8965, // 10 001 0010 1100 101 + TRCDVCMR0 = 0x8906, // 10 001 0010 0000 110 + TRCDVCMR1 = 0x8926, // 10 001 0010 0100 110 + TRCDVCMR2 = 0x8946, // 10 001 0010 1000 110 + TRCDVCMR3 = 0x8966, // 10 001 0010 1100 110 + TRCDVCMR4 = 0x8907, // 10 001 0010 0000 111 + TRCDVCMR5 = 0x8927, // 10 001 0010 0100 111 + TRCDVCMR6 = 0x8947, // 10 001 0010 1000 111 + TRCDVCMR7 = 0x8967, // 10 001 0010 1100 111 + TRCCIDCVR0 = 0x8980, // 10 001 0011 0000 000 + TRCCIDCVR1 = 0x8990, // 10 001 0011 0010 000 + TRCCIDCVR2 = 0x89a0, // 10 001 0011 0100 000 + TRCCIDCVR3 = 0x89b0, // 10 001 0011 0110 000 + TRCCIDCVR4 = 0x89c0, // 10 001 0011 1000 000 + TRCCIDCVR5 = 0x89d0, // 10 001 0011 1010 000 + TRCCIDCVR6 = 0x89e0, // 10 001 0011 1100 000 + TRCCIDCVR7 = 0x89f0, // 10 001 0011 1110 000 + TRCVMIDCVR0 = 0x8981, // 10 001 0011 0000 001 + TRCVMIDCVR1 = 0x8991, // 10 001 0011 0010 001 + TRCVMIDCVR2 = 0x89a1, // 10 001 0011 0100 001 + TRCVMIDCVR3 = 0x89b1, // 10 001 0011 0110 001 + TRCVMIDCVR4 = 0x89c1, // 10 001 0011 1000 001 + TRCVMIDCVR5 = 0x89d1, // 10 001 0011 1010 001 + TRCVMIDCVR6 = 0x89e1, // 10 001 0011 1100 001 + TRCVMIDCVR7 = 0x89f1, // 10 001 0011 1110 001 + TRCCIDCCTLR0 = 0x8982, // 10 001 0011 0000 010 + TRCCIDCCTLR1 = 0x898a, // 10 001 0011 0001 010 + TRCVMIDCCTLR0 = 0x8992, // 10 001 0011 0010 010 + TRCVMIDCCTLR1 = 0x899a, // 10 001 0011 0011 010 + TRCITCTRL = 0x8b84, // 10 001 0111 0000 100 + TRCCLAIMSET = 0x8bc6, // 10 001 0111 1000 110 + TRCCLAIMCLR = 0x8bce, // 10 001 0111 1001 110 + + // GICv3 registers + ICC_BPR1_EL1 = 0xc663, // 11 000 1100 1100 011 + ICC_BPR0_EL1 = 0xc643, // 11 000 1100 1000 011 + ICC_PMR_EL1 = 0xc230, // 11 000 0100 0110 000 + ICC_CTLR_EL1 = 0xc664, // 11 000 1100 1100 100 + ICC_CTLR_EL3 = 0xf664, // 11 110 1100 1100 100 + ICC_SRE_EL1 = 0xc665, // 11 000 1100 1100 101 + ICC_SRE_EL2 = 0xe64d, // 11 100 1100 1001 101 + ICC_SRE_EL3 = 0xf665, // 11 110 1100 1100 101 + ICC_IGRPEN0_EL1 = 0xc666, // 11 000 1100 1100 110 + ICC_IGRPEN1_EL1 = 0xc667, // 11 000 1100 1100 111 + ICC_IGRPEN1_EL3 = 0xf667, // 11 110 1100 1100 111 + ICC_SEIEN_EL1 = 0xc668, // 11 000 1100 1101 000 + ICC_AP0R0_EL1 = 0xc644, // 11 000 1100 1000 100 + ICC_AP0R1_EL1 = 0xc645, // 11 000 1100 1000 101 + ICC_AP0R2_EL1 = 0xc646, // 11 000 1100 1000 110 + ICC_AP0R3_EL1 = 0xc647, // 11 000 1100 1000 111 + ICC_AP1R0_EL1 = 0xc648, // 11 000 1100 1001 000 + ICC_AP1R1_EL1 = 0xc649, // 11 000 1100 1001 001 + ICC_AP1R2_EL1 = 0xc64a, // 11 000 1100 1001 010 + ICC_AP1R3_EL1 = 0xc64b, // 11 000 1100 1001 011 + ICH_AP0R0_EL2 = 0xe640, // 11 100 1100 1000 000 + ICH_AP0R1_EL2 = 0xe641, // 11 100 1100 1000 001 + ICH_AP0R2_EL2 = 0xe642, // 11 100 1100 1000 010 + ICH_AP0R3_EL2 = 0xe643, // 11 100 1100 1000 011 + ICH_AP1R0_EL2 = 0xe648, // 11 100 1100 1001 000 + ICH_AP1R1_EL2 = 0xe649, // 11 100 1100 1001 001 + ICH_AP1R2_EL2 = 0xe64a, // 11 100 1100 1001 010 + ICH_AP1R3_EL2 = 0xe64b, // 11 100 1100 1001 011 + ICH_HCR_EL2 = 0xe658, // 11 100 1100 1011 000 + ICH_MISR_EL2 = 0xe65a, // 11 100 1100 1011 010 + ICH_VMCR_EL2 = 0xe65f, // 11 100 1100 1011 111 + ICH_VSEIR_EL2 = 0xe64c, // 11 100 1100 1001 100 + ICH_LR0_EL2 = 0xe660, // 11 100 1100 1100 000 + ICH_LR1_EL2 = 0xe661, // 11 100 1100 1100 001 + ICH_LR2_EL2 = 0xe662, // 11 100 1100 1100 010 + ICH_LR3_EL2 = 0xe663, // 11 100 1100 1100 011 + ICH_LR4_EL2 = 0xe664, // 11 100 1100 1100 100 + ICH_LR5_EL2 = 0xe665, // 11 100 1100 1100 101 + ICH_LR6_EL2 = 0xe666, // 11 100 1100 1100 110 + ICH_LR7_EL2 = 0xe667, // 11 100 1100 1100 111 + ICH_LR8_EL2 = 0xe668, // 11 100 1100 1101 000 + ICH_LR9_EL2 = 0xe669, // 11 100 1100 1101 001 + ICH_LR10_EL2 = 0xe66a, // 11 100 1100 1101 010 + ICH_LR11_EL2 = 0xe66b, // 11 100 1100 1101 011 + ICH_LR12_EL2 = 0xe66c, // 11 100 1100 1101 100 + ICH_LR13_EL2 = 0xe66d, // 11 100 1100 1101 101 + ICH_LR14_EL2 = 0xe66e, // 11 100 1100 1101 110 + ICH_LR15_EL2 = 0xe66f, // 11 100 1100 1101 111 + + // v8.1a "Privileged Access Never" extension-specific system registers + PAN = 0xc213, // 11 000 0100 0010 011 + + // v8.1a "Limited Ordering Regions" extension-specific system registers + LORSA_EL1 = 0xc520, // 11 000 1010 0100 000 + LOREA_EL1 = 0xc521, // 11 000 1010 0100 001 + LORN_EL1 = 0xc522, // 11 000 1010 0100 010 + LORC_EL1 = 0xc523, // 11 000 1010 0100 011 + LORID_EL1 = 0xc527, // 11 000 1010 0100 111 + + // v8.1a "Virtualization host extensions" system registers + TTBR1_EL2 = 0xe101, // 11 100 0010 0000 001 + CONTEXTIDR_EL2 = 0xe681, // 11 100 1101 0000 001 + CNTHV_TVAL_EL2 = 0xe718, // 11 100 1110 0011 000 + CNTHV_CVAL_EL2 = 0xe71a, // 11 100 1110 0011 010 + CNTHV_CTL_EL2 = 0xe719, // 11 100 1110 0011 001 + SCTLR_EL12 = 0xe880, // 11 101 0001 0000 000 + CPACR_EL12 = 0xe882, // 11 101 0001 0000 010 + TTBR0_EL12 = 0xe900, // 11 101 0010 0000 000 + TTBR1_EL12 = 0xe901, // 11 101 0010 0000 001 + TCR_EL12 = 0xe902, // 11 101 0010 0000 010 + AFSR0_EL12 = 0xea88, // 11 101 0101 0001 000 + AFSR1_EL12 = 0xea89, // 11 101 0101 0001 001 + ESR_EL12 = 0xea90, // 11 101 0101 0010 000 + FAR_EL12 = 0xeb00, // 11 101 0110 0000 000 + MAIR_EL12 = 0xed10, // 11 101 1010 0010 000 + AMAIR_EL12 = 0xed18, // 11 101 1010 0011 000 + VBAR_EL12 = 0xee00, // 11 101 1100 0000 000 + CONTEXTIDR_EL12 = 0xee81, // 11 101 1101 0000 001 + CNTKCTL_EL12 = 0xef08, // 11 101 1110 0001 000 + CNTP_TVAL_EL02 = 0xef10, // 11 101 1110 0010 000 + CNTP_CTL_EL02 = 0xef11, // 11 101 1110 0010 001 + CNTP_CVAL_EL02 = 0xef12, // 11 101 1110 0010 010 + CNTV_TVAL_EL02 = 0xef18, // 11 101 1110 0011 000 + CNTV_CTL_EL02 = 0xef19, // 11 101 1110 0011 001 + CNTV_CVAL_EL02 = 0xef1a, // 11 101 1110 0011 010 + SPSR_EL12 = 0xea00, // 11 101 0100 0000 000 + ELR_EL12 = 0xea01, // 11 101 0100 0000 001 + + // v8.2a registers + UAO = 0xc214, // 11 000 0100 0010 100 + + // v8.2a "Statistical Profiling extension" registers + PMBLIMITR_EL1 = 0xc4d0, // 11 000 1001 1010 000 + PMBPTR_EL1 = 0xc4d1, // 11 000 1001 1010 001 + PMBSR_EL1 = 0xc4d3, // 11 000 1001 1010 011 + PMBIDR_EL1 = 0xc4d7, // 11 000 1001 1010 111 + PMSCR_EL2 = 0xe4c8, // 11 100 1001 1001 000 + PMSCR_EL12 = 0xecc8, // 11 101 1001 1001 000 + PMSCR_EL1 = 0xc4c8, // 11 000 1001 1001 000 + PMSICR_EL1 = 0xc4ca, // 11 000 1001 1001 010 + PMSIRR_EL1 = 0xc4cb, // 11 000 1001 1001 011 + PMSFCR_EL1 = 0xc4cc, // 11 000 1001 1001 100 + PMSEVFR_EL1 = 0xc4cd, // 11 000 1001 1001 101 + PMSLATFR_EL1 = 0xc4ce, // 11 000 1001 1001 110 + PMSIDR_EL1 = 0xc4cf, // 11 000 1001 1001 111 + + // Cyclone specific system registers + CPM_IOACC_CTL_EL3 = 0xff90, + }; + + // Note that these do not inherit from AArch64NamedImmMapper. This class is + // sufficiently different in its behaviour that I don't believe it's worth + // burdening the common AArch64NamedImmMapper with abstractions only needed in + // this one case. + struct SysRegMapper { + static const AArch64NamedImmMapper::Mapping SysRegMappings[]; + + const AArch64NamedImmMapper::Mapping *InstMappings; + size_t NumInstMappings; + + SysRegMapper() { } + uint32_t fromString(StringRef Name, const FeatureBitset& FeatureBits, + bool &Valid) const; + std::string toString(uint32_t Bits, const FeatureBitset& FeatureBits) const; + }; + + struct MSRMapper : SysRegMapper { + static const AArch64NamedImmMapper::Mapping MSRMappings[]; + MSRMapper(); + }; + + struct MRSMapper : SysRegMapper { + static const AArch64NamedImmMapper::Mapping MRSMappings[]; + MRSMapper(); + }; + + uint32_t ParseGenericRegister(StringRef Name, bool &Valid); +} + +namespace AArch64TLBI { + enum TLBIValues { + Invalid = -1, // Op0 Op1 CRn CRm Op2 + IPAS2E1IS = 0x6401, // 01 100 1000 0000 001 + IPAS2LE1IS = 0x6405, // 01 100 1000 0000 101 + VMALLE1IS = 0x4418, // 01 000 1000 0011 000 + ALLE2IS = 0x6418, // 01 100 1000 0011 000 + ALLE3IS = 0x7418, // 01 110 1000 0011 000 + VAE1IS = 0x4419, // 01 000 1000 0011 001 + VAE2IS = 0x6419, // 01 100 1000 0011 001 + VAE3IS = 0x7419, // 01 110 1000 0011 001 + ASIDE1IS = 0x441a, // 01 000 1000 0011 010 + VAAE1IS = 0x441b, // 01 000 1000 0011 011 + ALLE1IS = 0x641c, // 01 100 1000 0011 100 + VALE1IS = 0x441d, // 01 000 1000 0011 101 + VALE2IS = 0x641d, // 01 100 1000 0011 101 + VALE3IS = 0x741d, // 01 110 1000 0011 101 + VMALLS12E1IS = 0x641e, // 01 100 1000 0011 110 + VAALE1IS = 0x441f, // 01 000 1000 0011 111 + IPAS2E1 = 0x6421, // 01 100 1000 0100 001 + IPAS2LE1 = 0x6425, // 01 100 1000 0100 101 + VMALLE1 = 0x4438, // 01 000 1000 0111 000 + ALLE2 = 0x6438, // 01 100 1000 0111 000 + ALLE3 = 0x7438, // 01 110 1000 0111 000 + VAE1 = 0x4439, // 01 000 1000 0111 001 + VAE2 = 0x6439, // 01 100 1000 0111 001 + VAE3 = 0x7439, // 01 110 1000 0111 001 + ASIDE1 = 0x443a, // 01 000 1000 0111 010 + VAAE1 = 0x443b, // 01 000 1000 0111 011 + ALLE1 = 0x643c, // 01 100 1000 0111 100 + VALE1 = 0x443d, // 01 000 1000 0111 101 + VALE2 = 0x643d, // 01 100 1000 0111 101 + VALE3 = 0x743d, // 01 110 1000 0111 101 + VMALLS12E1 = 0x643e, // 01 100 1000 0111 110 + VAALE1 = 0x443f // 01 000 1000 0111 111 + }; + + struct TLBIMapper : AArch64NamedImmMapper { + const static Mapping TLBIMappings[]; + + TLBIMapper(); + }; + + static inline bool NeedsRegister(TLBIValues Val) { + switch (Val) { + case VMALLE1IS: + case ALLE2IS: + case ALLE3IS: + case ALLE1IS: + case VMALLS12E1IS: + case VMALLE1: + case ALLE2: + case ALLE3: + case ALLE1: + case VMALLS12E1: + return false; + default: + return true; + } + } +} + +namespace AArch64II { + /// Target Operand Flag enum. + enum TOF { + //===------------------------------------------------------------------===// + // AArch64 Specific MachineOperand flags. + + MO_NO_FLAG, + + MO_FRAGMENT = 0xf, + + /// MO_PAGE - A symbol operand with this flag represents the pc-relative + /// offset of the 4K page containing the symbol. This is used with the + /// ADRP instruction. + MO_PAGE = 1, + + /// MO_PAGEOFF - A symbol operand with this flag represents the offset of + /// that symbol within a 4K page. This offset is added to the page address + /// to produce the complete address. + MO_PAGEOFF = 2, + + /// MO_G3 - A symbol operand with this flag (granule 3) represents the high + /// 16-bits of a 64-bit address, used in a MOVZ or MOVK instruction + MO_G3 = 3, + + /// MO_G2 - A symbol operand with this flag (granule 2) represents the bits + /// 32-47 of a 64-bit address, used in a MOVZ or MOVK instruction + MO_G2 = 4, + + /// MO_G1 - A symbol operand with this flag (granule 1) represents the bits + /// 16-31 of a 64-bit address, used in a MOVZ or MOVK instruction + MO_G1 = 5, + + /// MO_G0 - A symbol operand with this flag (granule 0) represents the bits + /// 0-15 of a 64-bit address, used in a MOVZ or MOVK instruction + MO_G0 = 6, + + /// MO_HI12 - This flag indicates that a symbol operand represents the bits + /// 13-24 of a 64-bit address, used in a arithmetic immediate-shifted-left- + /// by-12-bits instruction. + MO_HI12 = 7, + + /// MO_GOT - This flag indicates that a symbol operand represents the + /// address of the GOT entry for the symbol, rather than the address of + /// the symbol itself. + MO_GOT = 0x10, + + /// MO_NC - Indicates whether the linker is expected to check the symbol + /// reference for overflow. For example in an ADRP/ADD pair of relocations + /// the ADRP usually does check, but not the ADD. + MO_NC = 0x20, + + /// MO_TLS - Indicates that the operand being accessed is some kind of + /// thread-local symbol. On Darwin, only one type of thread-local access + /// exists (pre linker-relaxation), but on ELF the TLSModel used for the + /// referee will affect interpretation. + MO_TLS = 0x40, + + /// MO_CONSTPOOL - This flag indicates that a symbol operand represents + /// the address of a constant pool entry for the symbol, rather than the + /// address of the symbol itself. + MO_CONSTPOOL = 0x80 + }; +} // end namespace AArch64II + +} // end namespace llvm_ks + +#endif diff --git a/llvm/lib/Target/AArch64/Utils/CMakeLists.txt b/llvm/lib/Target/AArch64/Utils/CMakeLists.txt new file mode 100644 index 0000000..8ee03a7 --- /dev/null +++ b/llvm/lib/Target/AArch64/Utils/CMakeLists.txt @@ -0,0 +1,3 @@ +add_llvm_library(LLVMAArch64Utils + AArch64BaseInfo.cpp + ) diff --git a/llvm/lib/Target/AArch64/Utils/LLVMBuild.txt b/llvm/lib/Target/AArch64/Utils/LLVMBuild.txt new file mode 100644 index 0000000..bcefeb6 --- /dev/null +++ b/llvm/lib/Target/AArch64/Utils/LLVMBuild.txt @@ -0,0 +1,23 @@ +;===- ./lib/Target/AArch64/Utils/LLVMBuild.txt ----------------*- Conf -*--===; +; +; The LLVM Compiler Infrastructure +; +; This file is distributed under the University of Illinois Open Source +; License. See LICENSE.TXT for details. +; +;===------------------------------------------------------------------------===; +; +; This is an LLVMBuild description file for the components in this subdirectory. +; +; For more information on the LLVMBuild system, please see: +; +; http://llvm.org/docs/LLVMBuild.html +; +;===------------------------------------------------------------------------===; + +[component_0] +type = Library +name = AArch64Utils +parent = AArch64 +required_libraries = Support +add_to_library_groups = AArch64 diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h new file mode 100644 index 0000000..9054d11 --- /dev/null +++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h @@ -0,0 +1,199 @@ +//===-- ARMBaseRegisterInfo.h - ARM Register Information Impl ---*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains the base ARM implementation of TargetRegisterInfo class. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIB_TARGET_ARM_ARMBASEREGISTERINFO_H +#define LLVM_LIB_TARGET_ARM_ARMBASEREGISTERINFO_H + +#include "MCTargetDesc/ARMBaseInfo.h" + +#define GET_REGINFO_HEADER +#include "ARMGenRegisterInfo.inc" + +namespace llvm_ks { +/// Register allocation hints. +namespace ARMRI { + enum { + RegPairOdd = 1, + RegPairEven = 2 + }; +} + +/// isARMArea1Register - Returns true if the register is a low register (r0-r7) +/// or a stack/pc register that we should push/pop. +static inline bool isARMArea1Register(unsigned Reg, bool isIOS) { + using namespace ARM; + switch (Reg) { + case R0: case R1: case R2: case R3: + case R4: case R5: case R6: case R7: + case LR: case SP: case PC: + return true; + case R8: case R9: case R10: case R11: case R12: + // For iOS we want r7 and lr to be next to each other. + return !isIOS; + default: + return false; + } +} + +static inline bool isARMArea2Register(unsigned Reg, bool isIOS) { + using namespace ARM; + switch (Reg) { + case R8: case R9: case R10: case R11: case R12: + // iOS has this second area. + return isIOS; + default: + return false; + } +} + +static inline bool isARMArea3Register(unsigned Reg, bool isIOS) { + using namespace ARM; + switch (Reg) { + case D15: case D14: case D13: case D12: + case D11: case D10: case D9: case D8: + case D7: case D6: case D5: case D4: + case D3: case D2: case D1: case D0: + case D31: case D30: case D29: case D28: + case D27: case D26: case D25: case D24: + case D23: case D22: case D21: case D20: + case D19: case D18: case D17: case D16: + return true; + default: + return false; + } +} + +static inline bool isCalleeSavedRegister(unsigned Reg, + const MCPhysReg *CSRegs) { + for (unsigned i = 0; CSRegs[i]; ++i) + if (Reg == CSRegs[i]) + return true; + return false; +} + +class ARMBaseRegisterInfo : public ARMGenRegisterInfo { +protected: + /// BasePtr - ARM physical register used as a base ptr in complex stack + /// frames. I.e., when we need a 3rd base, not just SP and FP, due to + /// variable size stack objects. + unsigned BasePtr; + + // Can be only subclassed. + explicit ARMBaseRegisterInfo(); + + // Return the opcode that implements 'Op', or 0 if no opcode + unsigned getOpcode(int Op) const; + +public: + /// Code Generation virtual methods... + const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override; + const MCPhysReg * + getCalleeSavedRegsViaCopy(const MachineFunction *MF) const override; + const uint32_t *getCallPreservedMask(const MachineFunction &MF, + CallingConv::ID) const override; + const uint32_t *getNoPreservedMask() const override; + const uint32_t *getTLSCallPreservedMask(const MachineFunction &MF) const; + + /// getThisReturnPreservedMask - Returns a call preserved mask specific to the + /// case that 'returned' is on an i32 first argument if the calling convention + /// is one that can (partially) model this attribute with a preserved mask + /// (i.e. it is a calling convention that uses the same register for the first + /// i32 argument and an i32 return value) + /// + /// Should return NULL in the case that the calling convention does not have + /// this property + const uint32_t *getThisReturnPreservedMask(const MachineFunction &MF, + CallingConv::ID) const; + + BitVector getReservedRegs(const MachineFunction &MF) const override; + + const TargetRegisterClass * + getPointerRegClass(const MachineFunction &MF, + unsigned Kind = 0) const override; + const TargetRegisterClass * + getCrossCopyRegClass(const TargetRegisterClass *RC) const override; + + const TargetRegisterClass * + getLargestLegalSuperClass(const TargetRegisterClass *RC, + const MachineFunction &MF) const override; + + unsigned getRegPressureLimit(const TargetRegisterClass *RC, + MachineFunction &MF) const override; + + void getRegAllocationHints(unsigned VirtReg, + ArrayRef Order, + SmallVectorImpl &Hints, + const MachineFunction &MF, + const VirtRegMap *VRM, + const LiveRegMatrix *Matrix) const override; + + void updateRegAllocHint(unsigned Reg, unsigned NewReg, + MachineFunction &MF) const override; + + bool hasBasePointer(const MachineFunction &MF) const; + + bool canRealignStack(const MachineFunction &MF) const override; + int64_t getFrameIndexInstrOffset(const MachineInstr *MI, + int Idx) const override; + bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const override; + void materializeFrameBaseRegister(MachineBasicBlock *MBB, + unsigned BaseReg, int FrameIdx, + int64_t Offset) const override; + void resolveFrameIndex(MachineInstr &MI, unsigned BaseReg, + int64_t Offset) const override; + bool isFrameOffsetLegal(const MachineInstr *MI, unsigned BaseReg, + int64_t Offset) const override; + + bool cannotEliminateFrame(const MachineFunction &MF) const; + + // Debug information queries. + unsigned getFrameRegister(const MachineFunction &MF) const override; + unsigned getBaseRegister() const { return BasePtr; } + + bool isLowRegister(unsigned Reg) const; + + + /// emitLoadConstPool - Emits a load from constpool to materialize the + /// specified immediate. + virtual void emitLoadConstPool(MachineBasicBlock &MBB, + MachineBasicBlock::iterator &MBBI, + DebugLoc dl, unsigned DestReg, unsigned SubIdx, + int Val, ARMCC::CondCodes Pred = ARMCC::AL, + unsigned PredReg = 0, + unsigned MIFlags = MachineInstr::NoFlags)const; + + /// Code Generation virtual methods... + bool requiresRegisterScavenging(const MachineFunction &MF) const override; + + bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override; + + bool requiresFrameIndexScavenging(const MachineFunction &MF) const override; + + bool requiresVirtualBaseRegisters(const MachineFunction &MF) const override; + + void eliminateFrameIndex(MachineBasicBlock::iterator II, + int SPAdj, unsigned FIOperandNum, + RegScavenger *RS = nullptr) const override; + + /// \brief SrcRC and DstRC will be morphed into NewRC if this returns true + bool shouldCoalesce(MachineInstr *MI, + const TargetRegisterClass *SrcRC, + unsigned SubReg, + const TargetRegisterClass *DstRC, + unsigned DstSubReg, + const TargetRegisterClass *NewRC) const override; +}; + +} // end namespace llvm_ks + +#endif diff --git a/llvm/lib/Target/ARM/ARMFeatures.h b/llvm/lib/Target/ARM/ARMFeatures.h new file mode 100644 index 0000000..a672613 --- /dev/null +++ b/llvm/lib/Target/ARM/ARMFeatures.h @@ -0,0 +1,97 @@ +//===-- ARMFeatures.h - Checks for ARM instruction features -----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains the code shared between ARM CodeGen and ARM MC +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIB_TARGET_ARM_ARMFEATURES_H +#define LLVM_LIB_TARGET_ARM_ARMFEATURES_H + +#include "MCTargetDesc/ARMMCTargetDesc.h" + +namespace llvm_ks { + +template // could be MachineInstr or MCInst +bool IsCPSRDead(InstrType *Instr); + +template // could be MachineInstr or MCInst +inline bool isV8EligibleForIT(InstrType *Instr) { + switch (Instr->getOpcode()) { + default: + return false; + case ARM::tADC: + case ARM::tADDi3: + case ARM::tADDi8: + case ARM::tADDrr: + case ARM::tAND: + case ARM::tASRri: + case ARM::tASRrr: + case ARM::tBIC: + case ARM::tEOR: + case ARM::tLSLri: + case ARM::tLSLrr: + case ARM::tLSRri: + case ARM::tLSRrr: + case ARM::tMOVi8: + case ARM::tMUL: + case ARM::tMVN: + case ARM::tORR: + case ARM::tROR: + case ARM::tRSB: + case ARM::tSBC: + case ARM::tSUBi3: + case ARM::tSUBi8: + case ARM::tSUBrr: + // Outside of an IT block, these set CPSR. + return IsCPSRDead(Instr); + case ARM::tADDrSPi: + case ARM::tCMNz: + case ARM::tCMPi8: + case ARM::tCMPr: + case ARM::tLDRBi: + case ARM::tLDRBr: + case ARM::tLDRHi: + case ARM::tLDRHr: + case ARM::tLDRSB: + case ARM::tLDRSH: + case ARM::tLDRi: + case ARM::tLDRr: + case ARM::tLDRspi: + case ARM::tSTRBi: + case ARM::tSTRBr: + case ARM::tSTRHi: + case ARM::tSTRHr: + case ARM::tSTRi: + case ARM::tSTRr: + case ARM::tSTRspi: + case ARM::tTST: + return true; +// there are some "conditionally deprecated" opcodes + case ARM::tADDspr: + case ARM::tBLXr: + return Instr->getOperand(2).getReg() != ARM::PC; + // ADD PC, SP and BLX PC were always unpredictable, + // now on top of it they're deprecated + case ARM::tADDrSP: + case ARM::tBX: + return Instr->getOperand(0).getReg() != ARM::PC; + case ARM::tADDhirr: + return Instr->getOperand(0).getReg() != ARM::PC && + Instr->getOperand(2).getReg() != ARM::PC; + case ARM::tCMPhir: + case ARM::tMOVr: + return Instr->getOperand(0).getReg() != ARM::PC && + Instr->getOperand(1).getReg() != ARM::PC; + } +} + +} + +#endif diff --git a/llvm/lib/Target/ARM/ARMGenAsmMatcher.inc b/llvm/lib/Target/ARM/ARMGenAsmMatcher.inc new file mode 100644 index 0000000..8dca24e --- /dev/null +++ b/llvm/lib/Target/ARM/ARMGenAsmMatcher.inc @@ -0,0 +1,11498 @@ +/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ +|* *| +|* Assembly Matcher Source Fragment *| +|* *| +|* Automatically generated file, do not edit! *| +|* *| +\*===----------------------------------------------------------------------===*/ + + +#ifdef GET_ASSEMBLER_HEADER +#undef GET_ASSEMBLER_HEADER + // This should be included into the middle of the declaration of + // your subclasses implementation of MCTargetAsmParser. + uint64_t ComputeAvailableFeatures(const FeatureBitset& FB) const; + void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, + const OperandVector &Operands); + void convertToMapAndConstraints(unsigned Kind, + const OperandVector &Operands) override; + unsigned MatchInstructionImpl(const OperandVector &Operands, + MCInst &Inst, + uint64_t &ErrorInfo, bool matchingInlineAsm, + unsigned VariantID = 0); + + enum OperandMatchResultTy { + MatchOperand_Success, // operand matched successfully + MatchOperand_NoMatch, // operand did not match + MatchOperand_ParseFail // operand matched but had errors + }; + OperandMatchResultTy MatchOperandParserImpl( + OperandVector &Operands, + StringRef Mnemonic, unsigned int &ErrorCode); + OperandMatchResultTy tryCustomParseOperand( + OperandVector &Operands, + unsigned MCK, unsigned int &ErrorCode); + +#endif // GET_ASSEMBLER_HEADER_INFO + + +#ifdef GET_OPERAND_DIAGNOSTIC_TYPES +#undef GET_OPERAND_DIAGNOSTIC_TYPES + + Match_AlignedMemoryRequires16, + Match_AlignedMemoryRequires32, + Match_AlignedMemoryRequires64, + Match_AlignedMemoryRequires64or128, + Match_AlignedMemoryRequires64or128or256, + Match_AlignedMemoryRequiresNone, + Match_DupAlignedMemoryRequires16, + Match_DupAlignedMemoryRequires32, + Match_DupAlignedMemoryRequires64, + Match_DupAlignedMemoryRequires64or128, + Match_DupAlignedMemoryRequiresNone, + Match_ImmRange0_15, + Match_ImmRange0_239, + END_OPERAND_DIAGNOSTIC_TYPES +#endif // GET_OPERAND_DIAGNOSTIC_TYPES + + +#ifdef GET_REGISTER_MATCHER +#undef GET_REGISTER_MATCHER + +// Flags for subtarget features that participate in instruction matching. +enum SubtargetFeatureFlag : uint64_t { + Feature_HasV4T = (1ULL << 16), + Feature_HasV5T = (1ULL << 17), + Feature_HasV5TE = (1ULL << 18), + Feature_HasV6 = (1ULL << 19), + Feature_HasV6M = (1ULL << 21), + Feature_HasV8MBaseline = (1ULL << 26), + Feature_HasV8MMainline = (1ULL << 27), + Feature_HasV6T2 = (1ULL << 22), + Feature_HasV6K = (1ULL << 20), + Feature_HasV7 = (1ULL << 23), + Feature_HasV8 = (1ULL << 25), + Feature_PreV8 = (1ULL << 39), + Feature_HasV8_1a = (1ULL << 28), + Feature_HasV8_2a = (1ULL << 29), + Feature_HasVFP2 = (1ULL << 30), + Feature_HasVFP3 = (1ULL << 31), + Feature_HasVFP4 = (1ULL << 32), + Feature_HasDPVFP = (1ULL << 5), + Feature_HasFPARMv8 = (1ULL << 10), + Feature_HasNEON = (1ULL << 13), + Feature_HasCrypto = (1ULL << 3), + Feature_HasCRC = (1ULL << 2), + Feature_HasFP16 = (1ULL << 9), + Feature_HasFullFP16 = (1ULL << 11), + Feature_HasDivide = (1ULL << 7), + Feature_HasDivideInARM = (1ULL << 8), + Feature_HasT2ExtractPack = (1ULL << 14), + Feature_HasDSP = (1ULL << 6), + Feature_HasDB = (1ULL << 4), + Feature_HasV7Clrex = (1ULL << 24), + Feature_HasAcquireRelease = (1ULL << 1), + Feature_HasMP = (1ULL << 12), + Feature_HasVirtualization = (1ULL << 33), + Feature_HasTrustZone = (1ULL << 15), + Feature_Has8MSecExt = (1ULL << 0), + Feature_IsThumb = (1ULL << 37), + Feature_IsThumb2 = (1ULL << 38), + Feature_IsMClass = (1ULL << 35), + Feature_IsNotMClass = (1ULL << 36), + Feature_IsARM = (1ULL << 34), + Feature_UseNaClTrap = (1ULL << 40), + Feature_None = 0 +}; + +static unsigned MatchRegisterName(StringRef Name) { + switch (Name.size()) { + default: break; + case 2: // 43 strings to match. + switch (Name[0]) { + default: break; + case 'd': // 10 strings to match. + switch (Name[1]) { + default: break; + case '0': // 1 string to match. + return 14; // "d0" + case '1': // 1 string to match. + return 15; // "d1" + case '2': // 1 string to match. + return 16; // "d2" + case '3': // 1 string to match. + return 17; // "d3" + case '4': // 1 string to match. + return 18; // "d4" + case '5': // 1 string to match. + return 19; // "d5" + case '6': // 1 string to match. + return 20; // "d6" + case '7': // 1 string to match. + return 21; // "d7" + case '8': // 1 string to match. + return 22; // "d8" + case '9': // 1 string to match. + return 23; // "d9" + } + break; + case 'l': // 1 string to match. + if (Name[1] != 'r') + break; + return 10; // "lr" + case 'p': // 1 string to match. + if (Name[1] != 'c') + break; + return 11; // "pc" + case 'q': // 10 strings to match. + switch (Name[1]) { + default: break; + case '0': // 1 string to match. + return 50; // "q0" + case '1': // 1 string to match. + return 51; // "q1" + case '2': // 1 string to match. + return 52; // "q2" + case '3': // 1 string to match. + return 53; // "q3" + case '4': // 1 string to match. + return 54; // "q4" + case '5': // 1 string to match. + return 55; // "q5" + case '6': // 1 string to match. + return 56; // "q6" + case '7': // 1 string to match. + return 57; // "q7" + case '8': // 1 string to match. + return 58; // "q8" + case '9': // 1 string to match. + return 59; // "q9" + } + break; + case 'r': // 10 strings to match. + switch (Name[1]) { + default: break; + case '0': // 1 string to match. + return 66; // "r0" + case '1': // 1 string to match. + return 67; // "r1" + case '2': // 1 string to match. + return 68; // "r2" + case '3': // 1 string to match. + return 69; // "r3" + case '4': // 1 string to match. + return 70; // "r4" + case '5': // 1 string to match. + return 71; // "r5" + case '6': // 1 string to match. + return 72; // "r6" + case '7': // 1 string to match. + return 73; // "r7" + case '8': // 1 string to match. + return 74; // "r8" + case '9': // 1 string to match. + return 75; // "r9" + } + break; + case 's': // 11 strings to match. + switch (Name[1]) { + default: break; + case '0': // 1 string to match. + return 79; // "s0" + case '1': // 1 string to match. + return 80; // "s1" + case '2': // 1 string to match. + return 81; // "s2" + case '3': // 1 string to match. + return 82; // "s3" + case '4': // 1 string to match. + return 83; // "s4" + case '5': // 1 string to match. + return 84; // "s5" + case '6': // 1 string to match. + return 85; // "s6" + case '7': // 1 string to match. + return 86; // "s7" + case '8': // 1 string to match. + return 87; // "s8" + case '9': // 1 string to match. + return 88; // "s9" + case 'p': // 1 string to match. + return 12; // "sp" + } + break; + } + break; + case 3: // 53 strings to match. + switch (Name[0]) { + default: break; + case 'd': // 22 strings to match. + switch (Name[1]) { + default: break; + case '1': // 10 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 24; // "d10" + case '1': // 1 string to match. + return 25; // "d11" + case '2': // 1 string to match. + return 26; // "d12" + case '3': // 1 string to match. + return 27; // "d13" + case '4': // 1 string to match. + return 28; // "d14" + case '5': // 1 string to match. + return 29; // "d15" + case '6': // 1 string to match. + return 30; // "d16" + case '7': // 1 string to match. + return 31; // "d17" + case '8': // 1 string to match. + return 32; // "d18" + case '9': // 1 string to match. + return 33; // "d19" + } + break; + case '2': // 10 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 34; // "d20" + case '1': // 1 string to match. + return 35; // "d21" + case '2': // 1 string to match. + return 36; // "d22" + case '3': // 1 string to match. + return 37; // "d23" + case '4': // 1 string to match. + return 38; // "d24" + case '5': // 1 string to match. + return 39; // "d25" + case '6': // 1 string to match. + return 40; // "d26" + case '7': // 1 string to match. + return 41; // "d27" + case '8': // 1 string to match. + return 42; // "d28" + case '9': // 1 string to match. + return 43; // "d29" + } + break; + case '3': // 2 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 44; // "d30" + case '1': // 1 string to match. + return 45; // "d31" + } + break; + } + break; + case 'q': // 6 strings to match. + if (Name[1] != '1') + break; + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 60; // "q10" + case '1': // 1 string to match. + return 61; // "q11" + case '2': // 1 string to match. + return 62; // "q12" + case '3': // 1 string to match. + return 63; // "q13" + case '4': // 1 string to match. + return 64; // "q14" + case '5': // 1 string to match. + return 65; // "q15" + } + break; + case 'r': // 3 strings to match. + if (Name[1] != '1') + break; + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 76; // "r10" + case '1': // 1 string to match. + return 77; // "r11" + case '2': // 1 string to match. + return 78; // "r12" + } + break; + case 's': // 22 strings to match. + switch (Name[1]) { + default: break; + case '1': // 10 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 89; // "s10" + case '1': // 1 string to match. + return 90; // "s11" + case '2': // 1 string to match. + return 91; // "s12" + case '3': // 1 string to match. + return 92; // "s13" + case '4': // 1 string to match. + return 93; // "s14" + case '5': // 1 string to match. + return 94; // "s15" + case '6': // 1 string to match. + return 95; // "s16" + case '7': // 1 string to match. + return 96; // "s17" + case '8': // 1 string to match. + return 97; // "s18" + case '9': // 1 string to match. + return 98; // "s19" + } + break; + case '2': // 10 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 99; // "s20" + case '1': // 1 string to match. + return 100; // "s21" + case '2': // 1 string to match. + return 101; // "s22" + case '3': // 1 string to match. + return 102; // "s23" + case '4': // 1 string to match. + return 103; // "s24" + case '5': // 1 string to match. + return 104; // "s25" + case '6': // 1 string to match. + return 105; // "s26" + case '7': // 1 string to match. + return 106; // "s27" + case '8': // 1 string to match. + return 107; // "s28" + case '9': // 1 string to match. + return 108; // "s29" + } + break; + case '3': // 2 strings to match. + switch (Name[2]) { + default: break; + case '0': // 1 string to match. + return 109; // "s30" + case '1': // 1 string to match. + return 110; // "s31" + } + break; + } + break; + } + break; + case 4: // 3 strings to match. + switch (Name[0]) { + default: break; + case 'a': // 1 string to match. + if (memcmp(Name.data()+1, "psr", 3)) + break; + return 1; // "apsr" + case 'c': // 1 string to match. + if (memcmp(Name.data()+1, "psr", 3)) + break; + return 3; // "cpsr" + case 's': // 1 string to match. + if (memcmp(Name.data()+1, "psr", 3)) + break; + return 13; // "spsr" + } + break; + case 5: // 6 strings to match. + switch (Name[0]) { + default: break; + case 'f': // 3 strings to match. + if (Name[1] != 'p') + break; + switch (Name[2]) { + default: break; + case 'e': // 1 string to match. + if (memcmp(Name.data()+3, "xc", 2)) + break; + return 4; // "fpexc" + case 's': // 2 strings to match. + switch (Name[3]) { + default: break; + case 'c': // 1 string to match. + if (Name[4] != 'r') + break; + return 6; // "fpscr" + case 'i': // 1 string to match. + if (Name[4] != 'd') + break; + return 8; // "fpsid" + } + break; + } + break; + case 'm': // 3 strings to match. + if (memcmp(Name.data()+1, "vfr", 3)) + break; + switch (Name[4]) { + default: break; + case '0': // 1 string to match. + return 47; // "mvfr0" + case '1': // 1 string to match. + return 48; // "mvfr1" + case '2': // 1 string to match. + return 49; // "mvfr2" + } + break; + } + break; + case 6: // 1 string to match. + if (memcmp(Name.data()+0, "fpinst", 6)) + break; + return 5; // "fpinst" + case 7: // 2 strings to match. + switch (Name[0]) { + default: break; + case 'f': // 1 string to match. + if (memcmp(Name.data()+1, "pinst2", 6)) + break; + return 46; // "fpinst2" + case 'i': // 1 string to match. + if (memcmp(Name.data()+1, "tstate", 6)) + break; + return 9; // "itstate" + } + break; + case 9: // 1 string to match. + if (memcmp(Name.data()+0, "apsr_nzcv", 9)) + break; + return 2; // "apsr_nzcv" + case 10: // 1 string to match. + if (memcmp(Name.data()+0, "fpscr_nzcv", 10)) + break; + return 7; // "fpscr_nzcv" + } + return 0; +} + +#endif // GET_REGISTER_MATCHER + + +#ifdef GET_MATCHER_IMPLEMENTATION +#undef GET_MATCHER_IMPLEMENTATION + +static void applyMnemonicAliases(StringRef &Mnemonic, uint64_t Features, unsigned VariantID) { + switch (VariantID) { + case 0: + break; + } + switch (Mnemonic.size()) { + default: break; + case 3: // 4 strings to match. + switch (Mnemonic[0]) { + default: break; + case 'r': // 1 string to match. + if (memcmp(Mnemonic.data()+1, "fe", 2)) + break; + Mnemonic = "rfeia"; // "rfe" + return; + case 's': // 3 strings to match. + switch (Mnemonic[1]) { + default: break; + case 'm': // 1 string to match. + if (Mnemonic[2] != 'i') + break; + Mnemonic = "smc"; // "smi" + return; + case 'r': // 1 string to match. + if (Mnemonic[2] != 's') + break; + Mnemonic = "srsia"; // "srs" + return; + case 'w': // 1 string to match. + if (Mnemonic[2] != 'i') + break; + Mnemonic = "svc"; // "swi" + return; + } + break; + } + break; + case 4: // 10 strings to match. + switch (Mnemonic[0]) { + default: break; + case 'f': // 8 strings to match. + switch (Mnemonic[1]) { + default: break; + case 'l': // 2 strings to match. + if (Mnemonic[2] != 'd') + break; + switch (Mnemonic[3]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fldd" + Mnemonic = "vldr"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "flds" + Mnemonic = "vldr"; + return; + } + break; + case 'm': // 4 strings to match. + switch (Mnemonic[2]) { + default: break; + case 'r': // 2 strings to match. + switch (Mnemonic[3]) { + default: break; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fmrs" + Mnemonic = "vmov"; + return; + case 'x': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fmrx" + Mnemonic = "vmrs"; + return; + } + break; + case 's': // 1 string to match. + if (Mnemonic[3] != 'r') + break; + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fmsr" + Mnemonic = "vmov"; + return; + case 'x': // 1 string to match. + if (Mnemonic[3] != 'r') + break; + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fmxr" + Mnemonic = "vmsr"; + return; + } + break; + case 's': // 2 strings to match. + if (Mnemonic[2] != 't') + break; + switch (Mnemonic[3]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fstd" + Mnemonic = "vstr"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fsts" + Mnemonic = "vstr"; + return; + } + break; + } + break; + case 'v': // 2 strings to match. + switch (Mnemonic[1]) { + default: break; + case 'l': // 1 string to match. + if (memcmp(Mnemonic.data()+2, "dm", 2)) + break; + Mnemonic = "vldmia"; // "vldm" + return; + case 's': // 1 string to match. + if (memcmp(Mnemonic.data()+2, "tm", 2)) + break; + Mnemonic = "vstmia"; // "vstm" + return; + } + break; + } + break; + case 5: // 51 strings to match. + switch (Mnemonic[0]) { + default: break; + case 'f': // 18 strings to match. + switch (Mnemonic[1]) { + default: break; + case 'a': // 2 strings to match. + if (memcmp(Mnemonic.data()+2, "dd", 2)) + break; + switch (Mnemonic[4]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "faddd" + Mnemonic = "vadd.f64"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fadds" + Mnemonic = "vadd.f32"; + return; + } + break; + case 'c': // 4 strings to match. + switch (Mnemonic[2]) { + default: break; + case 'm': // 2 strings to match. + if (Mnemonic[3] != 'p') + break; + switch (Mnemonic[4]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fcmpd" + Mnemonic = "vcmp.f64"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fcmps" + Mnemonic = "vcmp.f32"; + return; + } + break; + case 'p': // 2 strings to match. + if (Mnemonic[3] != 'y') + break; + switch (Mnemonic[4]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fcpyd" + Mnemonic = "vmov.f64"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fcpys" + Mnemonic = "vmov.f32"; + return; + } + break; + } + break; + case 'd': // 2 strings to match. + if (memcmp(Mnemonic.data()+2, "iv", 2)) + break; + switch (Mnemonic[4]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fdivd" + Mnemonic = "vdiv.f64"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fdivs" + Mnemonic = "vdiv.f32"; + return; + } + break; + case 'm': // 8 strings to match. + switch (Mnemonic[2]) { + default: break; + case 'a': // 2 strings to match. + if (Mnemonic[3] != 'c') + break; + switch (Mnemonic[4]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fmacd" + Mnemonic = "vmla.f64"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fmacs" + Mnemonic = "vmla.f32"; + return; + } + break; + case 'd': // 1 string to match. + if (memcmp(Mnemonic.data()+3, "rr", 2)) + break; + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fmdrr" + Mnemonic = "vmov"; + return; + case 'r': // 3 strings to match. + switch (Mnemonic[3]) { + default: break; + case 'd': // 2 strings to match. + switch (Mnemonic[4]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fmrdd" + Mnemonic = "vmov"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fmrds" + Mnemonic = "vmov"; + return; + } + break; + case 'r': // 1 string to match. + if (Mnemonic[4] != 'd') + break; + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fmrrd" + Mnemonic = "vmov"; + return; + } + break; + case 'u': // 2 strings to match. + if (Mnemonic[3] != 'l') + break; + switch (Mnemonic[4]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fmuld" + Mnemonic = "vmul.f64"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fmuls" + Mnemonic = "vmul.f32"; + return; + } + break; + } + break; + case 'n': // 2 strings to match. + if (memcmp(Mnemonic.data()+2, "eg", 2)) + break; + switch (Mnemonic[4]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fnegd" + Mnemonic = "vneg.f64"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fnegs" + Mnemonic = "vneg.f32"; + return; + } + break; + } + break; + case 'l': // 3 strings to match. + if (memcmp(Mnemonic.data()+1, "dm", 2)) + break; + switch (Mnemonic[3]) { + default: break; + case 'e': // 1 string to match. + if (Mnemonic[4] != 'a') + break; + Mnemonic = "ldmdb"; // "ldmea" + return; + case 'f': // 1 string to match. + if (Mnemonic[4] != 'd') + break; + Mnemonic = "ldm"; // "ldmfd" + return; + case 'i': // 1 string to match. + if (Mnemonic[4] != 'a') + break; + Mnemonic = "ldm"; // "ldmia" + return; + } + break; + case 'r': // 4 strings to match. + if (memcmp(Mnemonic.data()+1, "fe", 2)) + break; + switch (Mnemonic[3]) { + default: break; + case 'e': // 2 strings to match. + switch (Mnemonic[4]) { + default: break; + case 'a': // 1 string to match. + Mnemonic = "rfedb"; // "rfeea" + return; + case 'd': // 1 string to match. + Mnemonic = "rfeib"; // "rfeed" + return; + } + break; + case 'f': // 2 strings to match. + switch (Mnemonic[4]) { + default: break; + case 'a': // 1 string to match. + Mnemonic = "rfeda"; // "rfefa" + return; + case 'd': // 1 string to match. + Mnemonic = "rfeia"; // "rfefd" + return; + } + break; + } + break; + case 's': // 7 strings to match. + switch (Mnemonic[1]) { + default: break; + case 'r': // 4 strings to match. + if (Mnemonic[2] != 's') + break; + switch (Mnemonic[3]) { + default: break; + case 'e': // 2 strings to match. + switch (Mnemonic[4]) { + default: break; + case 'a': // 1 string to match. + Mnemonic = "srsia"; // "srsea" + return; + case 'd': // 1 string to match. + Mnemonic = "srsda"; // "srsed" + return; + } + break; + case 'f': // 2 strings to match. + switch (Mnemonic[4]) { + default: break; + case 'a': // 1 string to match. + Mnemonic = "srsib"; // "srsfa" + return; + case 'd': // 1 string to match. + Mnemonic = "srsdb"; // "srsfd" + return; + } + break; + } + break; + case 't': // 3 strings to match. + if (Mnemonic[2] != 'm') + break; + switch (Mnemonic[3]) { + default: break; + case 'e': // 1 string to match. + if (Mnemonic[4] != 'a') + break; + Mnemonic = "stm"; // "stmea" + return; + case 'f': // 1 string to match. + if (Mnemonic[4] != 'd') + break; + Mnemonic = "stmdb"; // "stmfd" + return; + case 'i': // 1 string to match. + if (Mnemonic[4] != 'a') + break; + Mnemonic = "stm"; // "stmia" + return; + } + break; + } + break; + case 'v': // 19 strings to match. + switch (Mnemonic[1]) { + default: break; + case 'a': // 3 strings to match. + switch (Mnemonic[2]) { + default: break; + case 'b': // 1 string to match. + if (memcmp(Mnemonic.data()+3, "sq", 2)) + break; + if ((Features & Feature_HasNEON) == Feature_HasNEON) // "vabsq" + Mnemonic = "vabs"; + return; + case 'd': // 1 string to match. + if (memcmp(Mnemonic.data()+3, "dq", 2)) + break; + if ((Features & Feature_HasNEON) == Feature_HasNEON) // "vaddq" + Mnemonic = "vadd"; + return; + case 'n': // 1 string to match. + if (memcmp(Mnemonic.data()+3, "dq", 2)) + break; + if ((Features & Feature_HasNEON) == Feature_HasNEON) // "vandq" + Mnemonic = "vand"; + return; + } + break; + case 'b': // 1 string to match. + if (memcmp(Mnemonic.data()+2, "icq", 3)) + break; + if ((Features & Feature_HasNEON) == Feature_HasNEON) // "vbicq" + Mnemonic = "vbic"; + return; + case 'c': // 3 strings to match. + switch (Mnemonic[2]) { + default: break; + case 'e': // 1 string to match. + if (memcmp(Mnemonic.data()+3, "qq", 2)) + break; + if ((Features & Feature_HasNEON) == Feature_HasNEON) // "vceqq" + Mnemonic = "vceq"; + return; + case 'l': // 1 string to match. + if (memcmp(Mnemonic.data()+3, "eq", 2)) + break; + if ((Features & Feature_HasNEON) == Feature_HasNEON) // "vcleq" + Mnemonic = "vcle"; + return; + case 'v': // 1 string to match. + if (memcmp(Mnemonic.data()+3, "tq", 2)) + break; + if ((Features & Feature_HasNEON) == Feature_HasNEON) // "vcvtq" + Mnemonic = "vcvt"; + return; + } + break; + case 'e': // 1 string to match. + if (memcmp(Mnemonic.data()+2, "orq", 3)) + break; + if ((Features & Feature_HasNEON) == Feature_HasNEON) // "veorq" + Mnemonic = "veor"; + return; + case 'm': // 5 strings to match. + switch (Mnemonic[2]) { + default: break; + case 'a': // 1 string to match. + if (memcmp(Mnemonic.data()+3, "xq", 2)) + break; + if ((Features & Feature_HasNEON) == Feature_HasNEON) // "vmaxq" + Mnemonic = "vmax"; + return; + case 'i': // 1 string to match. + if (memcmp(Mnemonic.data()+3, "nq", 2)) + break; + if ((Features & Feature_HasNEON) == Feature_HasNEON) // "vminq" + Mnemonic = "vmin"; + return; + case 'o': // 1 string to match. + if (memcmp(Mnemonic.data()+3, "vq", 2)) + break; + if ((Features & Feature_HasNEON) == Feature_HasNEON) // "vmovq" + Mnemonic = "vmov"; + return; + case 'u': // 1 string to match. + if (memcmp(Mnemonic.data()+3, "lq", 2)) + break; + if ((Features & Feature_HasNEON) == Feature_HasNEON) // "vmulq" + Mnemonic = "vmul"; + return; + case 'v': // 1 string to match. + if (memcmp(Mnemonic.data()+3, "nq", 2)) + break; + if ((Features & Feature_HasNEON) == Feature_HasNEON) // "vmvnq" + Mnemonic = "vmvn"; + return; + } + break; + case 'o': // 1 string to match. + if (memcmp(Mnemonic.data()+2, "rrq", 3)) + break; + if ((Features & Feature_HasNEON) == Feature_HasNEON) // "vorrq" + Mnemonic = "vorr"; + return; + case 's': // 4 strings to match. + switch (Mnemonic[2]) { + default: break; + case 'h': // 2 strings to match. + switch (Mnemonic[3]) { + default: break; + case 'l': // 1 string to match. + if (Mnemonic[4] != 'q') + break; + if ((Features & Feature_HasNEON) == Feature_HasNEON) // "vshlq" + Mnemonic = "vshl"; + return; + case 'r': // 1 string to match. + if (Mnemonic[4] != 'q') + break; + if ((Features & Feature_HasNEON) == Feature_HasNEON) // "vshrq" + Mnemonic = "vshr"; + return; + } + break; + case 'u': // 1 string to match. + if (memcmp(Mnemonic.data()+3, "bq", 2)) + break; + if ((Features & Feature_HasNEON) == Feature_HasNEON) // "vsubq" + Mnemonic = "vsub"; + return; + case 'w': // 1 string to match. + if (memcmp(Mnemonic.data()+3, "pq", 2)) + break; + if ((Features & Feature_HasNEON) == Feature_HasNEON) // "vswpq" + Mnemonic = "vswp"; + return; + } + break; + case 'z': // 1 string to match. + if (memcmp(Mnemonic.data()+2, "ipq", 3)) + break; + if ((Features & Feature_HasNEON) == Feature_HasNEON) // "vzipq" + Mnemonic = "vzip"; + return; + } + break; + } + break; + case 6: // 10 strings to match. + if (Mnemonic[0] != 'f') + break; + switch (Mnemonic[1]) { + default: break; + case 's': // 4 strings to match. + switch (Mnemonic[2]) { + default: break; + case 'i': // 2 strings to match. + if (memcmp(Mnemonic.data()+3, "to", 2)) + break; + switch (Mnemonic[5]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fsitod" + Mnemonic = "vcvt.f64.s32"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fsitos" + Mnemonic = "vcvt.f32.s32"; + return; + } + break; + case 'q': // 2 strings to match. + if (memcmp(Mnemonic.data()+3, "rt", 2)) + break; + switch (Mnemonic[5]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fsqrtd" + Mnemonic = "vsqrt"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fsqrts" + Mnemonic = "vsqrt"; + return; + } + break; + } + break; + case 't': // 4 strings to match. + if (Mnemonic[2] != 'o') + break; + switch (Mnemonic[3]) { + default: break; + case 's': // 2 strings to match. + if (Mnemonic[4] != 'i') + break; + switch (Mnemonic[5]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "ftosid" + Mnemonic = "vcvtr.s32.f64"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "ftosis" + Mnemonic = "vcvtr.s32.f32"; + return; + } + break; + case 'u': // 2 strings to match. + if (Mnemonic[4] != 'i') + break; + switch (Mnemonic[5]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "ftouid" + Mnemonic = "vcvtr.u32.f64"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "ftouis" + Mnemonic = "vcvtr.u32.f32"; + return; + } + break; + } + break; + case 'u': // 2 strings to match. + if (memcmp(Mnemonic.data()+2, "ito", 3)) + break; + switch (Mnemonic[5]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fuitod" + Mnemonic = "vcvt.f64.u32"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fuitos" + Mnemonic = "vcvt.f32.u32"; + return; + } + break; + } + break; + case 7: // 24 strings to match. + if (Mnemonic[0] != 'f') + break; + switch (Mnemonic[1]) { + default: break; + case 'l': // 10 strings to match. + if (memcmp(Mnemonic.data()+2, "dm", 2)) + break; + switch (Mnemonic[4]) { + default: break; + case 'd': // 2 strings to match. + if (Mnemonic[5] != 'b') + break; + switch (Mnemonic[6]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fldmdbd" + Mnemonic = "vldmdb"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fldmdbs" + Mnemonic = "vldmdb"; + return; + } + break; + case 'e': // 3 strings to match. + if (Mnemonic[5] != 'a') + break; + switch (Mnemonic[6]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fldmead" + Mnemonic = "vldmdb"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fldmeas" + Mnemonic = "vldmdb"; + return; + case 'x': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fldmeax" + Mnemonic = "fldmdbx"; + return; + } + break; + case 'f': // 3 strings to match. + if (Mnemonic[5] != 'd') + break; + switch (Mnemonic[6]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fldmfdd" + Mnemonic = "vldmia"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fldmfds" + Mnemonic = "vldmia"; + return; + case 'x': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fldmfdx" + Mnemonic = "fldmiax"; + return; + } + break; + case 'i': // 2 strings to match. + if (Mnemonic[5] != 'a') + break; + switch (Mnemonic[6]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fldmiad" + Mnemonic = "vldmia"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fldmias" + Mnemonic = "vldmia"; + return; + } + break; + } + break; + case 's': // 10 strings to match. + if (memcmp(Mnemonic.data()+2, "tm", 2)) + break; + switch (Mnemonic[4]) { + default: break; + case 'd': // 2 strings to match. + if (Mnemonic[5] != 'b') + break; + switch (Mnemonic[6]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fstmdbd" + Mnemonic = "vstmdb"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fstmdbs" + Mnemonic = "vstmdb"; + return; + } + break; + case 'e': // 3 strings to match. + if (Mnemonic[5] != 'a') + break; + switch (Mnemonic[6]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fstmead" + Mnemonic = "vstmia"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fstmeas" + Mnemonic = "vstmia"; + return; + case 'x': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fstmeax" + Mnemonic = "fstmiax"; + return; + } + break; + case 'f': // 3 strings to match. + if (Mnemonic[5] != 'd') + break; + switch (Mnemonic[6]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fstmfdd" + Mnemonic = "vstmdb"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fstmfds" + Mnemonic = "vstmdb"; + return; + case 'x': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fstmfdx" + Mnemonic = "fstmdbx"; + return; + } + break; + case 'i': // 2 strings to match. + if (Mnemonic[5] != 'a') + break; + switch (Mnemonic[6]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fstmiad" + Mnemonic = "vstmia"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "fstmias" + Mnemonic = "vstmia"; + return; + } + break; + } + break; + case 't': // 4 strings to match. + if (Mnemonic[2] != 'o') + break; + switch (Mnemonic[3]) { + default: break; + case 's': // 2 strings to match. + if (memcmp(Mnemonic.data()+4, "iz", 2)) + break; + switch (Mnemonic[6]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "ftosizd" + Mnemonic = "vcvt.s32.f64"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "ftosizs" + Mnemonic = "vcvt.s32.f32"; + return; + } + break; + case 'u': // 2 strings to match. + if (memcmp(Mnemonic.data()+4, "iz", 2)) + break; + switch (Mnemonic[6]) { + default: break; + case 'd': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "ftouizd" + Mnemonic = "vcvt.u32.f64"; + return; + case 's': // 1 string to match. + if ((Features & Feature_HasVFP2) == Feature_HasVFP2) // "ftouizs" + Mnemonic = "vcvt.u32.f32"; + return; + } + break; + } + break; + } + break; + case 8: // 5 strings to match. + switch (Mnemonic[0]) { + default: break; + case 'q': // 1 string to match. + if (memcmp(Mnemonic.data()+1, "subaddx", 7)) + break; + Mnemonic = "qsax"; // "qsubaddx" + return; + case 's': // 2 strings to match. + switch (Mnemonic[1]) { + default: break; + case 'a': // 1 string to match. + if (memcmp(Mnemonic.data()+2, "ddsubx", 6)) + break; + Mnemonic = "sasx"; // "saddsubx" + return; + case 's': // 1 string to match. + if (memcmp(Mnemonic.data()+2, "ubaddx", 6)) + break; + Mnemonic = "ssax"; // "ssubaddx" + return; + } + break; + case 'u': // 2 strings to match. + switch (Mnemonic[1]) { + default: break; + case 'a': // 1 string to match. + if (memcmp(Mnemonic.data()+2, "ddsubx", 6)) + break; + Mnemonic = "uasx"; // "uaddsubx" + return; + case 's': // 1 string to match. + if (memcmp(Mnemonic.data()+2, "ubaddx", 6)) + break; + Mnemonic = "usax"; // "usubaddx" + return; + } + break; + } + break; + case 9: // 8 strings to match. + switch (Mnemonic[0]) { + default: break; + case 's': // 2 strings to match. + if (Mnemonic[1] != 'h') + break; + switch (Mnemonic[2]) { + default: break; + case 'a': // 1 string to match. + if (memcmp(Mnemonic.data()+3, "ddsubx", 6)) + break; + Mnemonic = "shasx"; // "shaddsubx" + return; + case 's': // 1 string to match. + if (memcmp(Mnemonic.data()+3, "ubaddx", 6)) + break; + Mnemonic = "shsax"; // "shsubaddx" + return; + } + break; + case 'u': // 4 strings to match. + switch (Mnemonic[1]) { + default: break; + case 'h': // 2 strings to match. + switch (Mnemonic[2]) { + default: break; + case 'a': // 1 string to match. + if (memcmp(Mnemonic.data()+3, "ddsubx", 6)) + break; + Mnemonic = "uhasx"; // "uhaddsubx" + return; + case 's': // 1 string to match. + if (memcmp(Mnemonic.data()+3, "ubaddx", 6)) + break; + Mnemonic = "uhsax"; // "uhsubaddx" + return; + } + break; + case 'q': // 2 strings to match. + switch (Mnemonic[2]) { + default: break; + case 'a': // 1 string to match. + if (memcmp(Mnemonic.data()+3, "ddsubx", 6)) + break; + Mnemonic = "uqasx"; // "uqaddsubx" + return; + case 's': // 1 string to match. + if (memcmp(Mnemonic.data()+3, "ubaddx", 6)) + break; + Mnemonic = "uqsax"; // "uqsubaddx" + return; + } + break; + } + break; + case 'v': // 2 strings to match. + if (memcmp(Mnemonic.data()+1, "movq.f", 6)) + break; + switch (Mnemonic[7]) { + default: break; + case '3': // 1 string to match. + if (Mnemonic[8] != '2') + break; + if ((Features & Feature_HasNEON) == Feature_HasNEON) // "vmovq.f32" + Mnemonic = "vmov.f32"; + return; + case '6': // 1 string to match. + if (Mnemonic[8] != '4') + break; + if ((Features & Feature_HasNEON) == Feature_HasNEON) // "vmovq.f64" + Mnemonic = "vmov.f64"; + return; + } + break; + } + break; + case 11: // 2 strings to match. + if (memcmp(Mnemonic.data()+0, "vrecpeq.", 8)) + break; + switch (Mnemonic[8]) { + default: break; + case 'f': // 1 string to match. + if (memcmp(Mnemonic.data()+9, "32", 2)) + break; + if ((Features & Feature_HasNEON) == Feature_HasNEON) // "vrecpeq.f32" + Mnemonic = "vrecpe.f32"; + return; + case 'u': // 1 string to match. + if (memcmp(Mnemonic.data()+9, "32", 2)) + break; + if ((Features & Feature_HasNEON) == Feature_HasNEON) // "vrecpeq.u32" + Mnemonic = "vrecpe.u32"; + return; + } + break; + } +} + +namespace { +enum OperatorConversionKind { + CVT_Done, + CVT_Reg, + CVT_Tied, + CVT_95_Reg, + CVT_95_addCCOutOperands, + CVT_95_addCondCodeOperands, + CVT_95_addRegShiftedRegOperands, + CVT_95_addModImmOperands, + CVT_95_addRegShiftedImmOperands, + CVT_95_addImmOperands, + CVT_95_addImm0_95_508s4Operands, + CVT_regSP, + CVT_95_addImm0_95_508s4NegOperands, + CVT_95_addImm0_95_4095NegOperands, + CVT_95_addT2SOImmNegOperands, + CVT_95_addModImmNegOperands, + CVT_95_addImm0_95_1020s4Operands, + CVT_95_addUnsignedOffset_95_b8s2Operands, + CVT_95_addAdrLabelOperands, + CVT_95_addT2SOImmNotOperands, + CVT_95_addModImmNotOperands, + CVT_95_addImmThumbSROperands, + CVT_cvtThumbBranches, + CVT_95_addBitfieldOperands, + CVT_imm_95_0, + CVT_95_addCoprocNumOperands, + CVT_95_addCoprocRegOperands, + CVT_95_addProcIFlagsOperands, + CVT_imm_95_15, + CVT_95_addMemBarrierOptOperands, + CVT_95_addFPImmOperands, + CVT_95_addDPRRegListOperands, + CVT_imm_95_1, + CVT_95_addInstSyncBarrierOptOperands, + CVT_95_addITCondCodeOperands, + CVT_95_addITMaskOperands, + CVT_95_addMemNoOffsetOperands, + CVT_95_addAddrMode5Operands, + CVT_95_addCoprocOptionOperands, + CVT_95_addPostIdxImm8s4Operands, + CVT_95_addRegListOperands, + CVT_95_addThumbMemPCOperands, + CVT_95_addMemThumbRIs4Operands, + CVT_95_addMemThumbRROperands, + CVT_95_addMemThumbSPIOperands, + CVT_95_addMemImm12OffsetOperands, + CVT_95_addMemNegImm8OffsetOperands, + CVT_95_addMemRegOffsetOperands, + CVT_95_addMemUImm12OffsetOperands, + CVT_95_addT2MemRegOffsetOperands, + CVT_95_addMemPCRelImm12Operands, + CVT_95_addMemImm8OffsetOperands, + CVT_95_addAM2OffsetImmOperands, + CVT_95_addPostIdxRegShiftedOperands, + CVT_95_addMemThumbRIs1Operands, + CVT_95_addMemPosImm8OffsetOperands, + CVT_95_addMemImm8s4OffsetOperands, + CVT_95_addAddrMode3Operands, + CVT_95_addAM3OffsetOperands, + CVT_95_addMemImm0_95_1020s4OffsetOperands, + CVT_95_addMemThumbRIs2Operands, + CVT_95_addPostIdxRegOperands, + CVT_95_addPostIdxImm8Operands, + CVT_reg0, + CVT_regCPSR, + CVT_imm_95_14, + CVT_95_addBankedRegOperands, + CVT_95_addMSRMaskOperands, + CVT_cvtThumbMultiply, + CVT_regR8, + CVT_regR0, + CVT_95_addPKHASRImmOperands, + CVT_95_addImm1_95_32Operands, + CVT_imm_95_4, + CVT_imm_95_5, + CVT_95_addShifterImmOperands, + CVT_95_addImm1_95_16Operands, + CVT_95_addRotImmOperands, + CVT_95_addMemTBBOperands, + CVT_95_addMemTBHOperands, + CVT_95_addNEONi16splatNotOperands, + CVT_95_addNEONi32splatNotOperands, + CVT_95_addNEONi16splatOperands, + CVT_95_addNEONi32splatOperands, + CVT_95_addFBits16Operands, + CVT_95_addFBits32Operands, + CVT_95_addVectorIndex16Operands, + CVT_95_addVectorIndex32Operands, + CVT_95_addVectorIndex8Operands, + CVT_95_addVecListOperands, + CVT_95_addDupAlignedMemory16Operands, + CVT_95_addAlignedMemory64or128Operands, + CVT_95_addAlignedMemory64or128or256Operands, + CVT_95_addAlignedMemory64Operands, + CVT_95_addVecListIndexedOperands, + CVT_95_addAlignedMemory16Operands, + CVT_95_addDupAlignedMemory32Operands, + CVT_95_addAlignedMemory32Operands, + CVT_95_addDupAlignedMemoryNoneOperands, + CVT_95_addAlignedMemoryNoneOperands, + CVT_95_addAlignedMemoryOperands, + CVT_95_addDupAlignedMemory64Operands, + CVT_95_addDupAlignedMemory64or128Operands, + CVT_95_addSPRRegListOperands, + CVT_95_addAddrMode5FP16Operands, + CVT_95_addNEONi32vmovOperands, + CVT_95_addNEONvmovByteReplicateOperands, + CVT_95_addNEONi32vmovNegOperands, + CVT_95_addNEONi64splatOperands, + CVT_95_addNEONi8splatOperands, + CVT_95_addNEONinvByteReplicateOperands, + CVT_imm_95_2, + CVT_imm_95_3, + CVT_NUM_CONVERTERS +}; + +enum InstructionConversionKind { + Convert__Reg1_2__CCOut1_0__Tie0__Reg1_3__CondCode2_1, + Convert__Reg1_2__Reg1_2__RegShiftedReg3_3__CondCode2_1__CCOut1_0, + Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, + Convert__Reg1_2__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, + Convert__Reg1_2__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, + Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, + Convert__Reg1_2__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, + Convert__Reg1_2__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0, + Convert__Reg1_2__Reg1_3__RegShiftedReg3_4__CondCode2_1__CCOut1_0, + Convert__Reg1_2__Reg1_3__ModImm1_4__CondCode2_1__CCOut1_0, + Convert__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, + Convert__Reg1_3__Reg1_4__RegShiftedImm2_5__CondCode2_1__CCOut1_0, + Convert__Reg1_1__Tie0__Reg1_2__CondCode2_0, + Convert__Reg1_1__Tie0__Imm0_508s41_2__CondCode2_0, + Convert__regSP__Tie0__Imm0_508s4Neg1_2__CondCode2_0, + Convert__Reg1_1__Reg1_1__Imm0_40951_2__CondCode2_0, + Convert__Reg1_1__Reg1_1__Imm0_4095Neg1_2__CondCode2_0, + Convert__Reg1_2__CCOut1_0__Tie0__Imm0_2551_3__CondCode2_1, + Convert__Reg1_2__Reg1_2__T2SOImm1_3__CondCode2_1__CCOut1_0, + Convert__Reg1_2__Reg1_2__T2SOImmNeg1_3__CondCode2_1__CCOut1_0, + Convert__Reg1_2__Reg1_2__ModImmNeg1_3__CondCode2_1__CCOut1_0, + Convert__regSP__Tie0__Imm0_508s41_3__CondCode2_0, + Convert__regSP__Tie0__Imm0_508s4Neg1_3__CondCode2_0, + Convert__Reg1_1__Reg1_2__Imm0_1020s41_3__CondCode2_0, + Convert__Reg1_1__Imm0_40951_3__CondCode2_0, + Convert__Reg1_1__Reg1_2__Imm0_40951_3__CondCode2_0, + Convert__Reg1_1__Reg1_2__Imm0_4095Neg1_3__CondCode2_0, + Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, + Convert__Reg1_3__Reg1_3__T2SOImmNeg1_4__CondCode2_1__CCOut1_0, + Convert__Reg1_2__CCOut1_0__Reg1_3__Reg1_4__CondCode2_1, + Convert__Reg1_2__CCOut1_0__Reg1_3__Imm0_71_4__CondCode2_1, + Convert__Reg1_2__Reg1_3__T2SOImmNeg1_4__CondCode2_1__CCOut1_0, + Convert__Reg1_2__Reg1_3__ModImmNeg1_4__CondCode2_1__CCOut1_0, + Convert__Reg1_3__Reg1_4__T2SOImm1_5__CondCode2_1__CCOut1_0, + Convert__Reg1_3__Reg1_4__T2SOImmNeg1_5__CondCode2_1__CCOut1_0, + Convert__Reg1_1__UnsignedOffset_b8s21_2__CondCode2_0, + Convert__Reg1_1__Imm1_2__CondCode2_0, + Convert__Reg1_1__AdrLabel1_2__CondCode2_0, + Convert__Reg1_2__Imm1_3__CondCode2_0, + Convert__Reg1_1__Tie0__Reg1_2, + Convert__Reg1_1__Reg1_2, + Convert__Reg1_2__Reg1_2__T2SOImmNot1_3__CondCode2_1__CCOut1_0, + Convert__Reg1_2__Reg1_2__ModImmNot1_3__CondCode2_1__CCOut1_0, + Convert__Reg1_3__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, + Convert__Reg1_3__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, + Convert__Reg1_3__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0, + Convert__Reg1_2__Reg1_3__T2SOImmNot1_4__CondCode2_1__CCOut1_0, + Convert__Reg1_2__Reg1_3__ModImmNot1_4__CondCode2_1__CCOut1_0, + Convert__Reg1_2__CCOut1_0__Reg1_2__ImmThumbSR1_3__CondCode2_1, + Convert__Reg1_2__Reg1_2__ImmThumbSR1_3__CondCode2_1__CCOut1_0, + Convert__Reg1_2__Reg1_2__Imm0_321_3__CondCode2_1__CCOut1_0, + Convert__Reg1_3__Reg1_3__ImmThumbSR1_4__CondCode2_1__CCOut1_0, + Convert__Reg1_2__CCOut1_0__Reg1_3__ImmThumbSR1_4__CondCode2_1, + Convert__Reg1_2__Reg1_3__ImmThumbSR1_4__CondCode2_1__CCOut1_0, + Convert__Reg1_2__Reg1_3__Imm0_321_4__CondCode2_1__CCOut1_0, + Convert__Reg1_3__Reg1_4__ImmThumbSR1_5__CondCode2_1__CCOut1_0, + Convert__Imm1_1__CondCode2_0, + ConvertCustom_cvtThumbBranches, + Convert__Reg1_1__Tie0__Bitfield1_2__CondCode2_0, + Convert__Reg1_1__Tie0__Reg1_2__Bitfield1_3__CondCode2_0, + Convert__imm_95_0, + Convert__Imm0_2551_0, + Convert__Imm0_655351_0, + Convert__Imm1_0, + Convert__CondCode2_0__Imm1_1, + Convert__Reg1_0, + Convert__Reg1_1__CondCode2_0, + Convert__CondCode2_0__Reg1_1, + Convert__CondCode2_0, + Convert__Reg1_0__Imm1_1, + Convert__CoprocNum1_1__Imm0_151_2__CoprocReg1_3__CoprocReg1_4__CoprocReg1_5__Imm0_71_6__CondCode2_0, + Convert__CoprocNum1_0__Imm0_151_1__CoprocReg1_2__CoprocReg1_3__CoprocReg1_4__Imm0_71_5, + Convert_NoOperands, + Convert__Reg1_1__Reg1_2__CondCode2_0, + Convert__Reg1_1__ModImmNeg1_2__CondCode2_0, + Convert__Reg1_1__T2SOImmNeg1_2__CondCode2_0, + Convert__Reg1_1__RegShiftedImm2_2__CondCode2_0, + Convert__Reg1_1__RegShiftedReg3_2__CondCode2_0, + Convert__Reg1_1__T2SOImm1_2__CondCode2_0, + Convert__Reg1_1__ModImm1_2__CondCode2_0, + Convert__Reg1_2__Reg1_3__CondCode2_0, + Convert__Reg1_2__RegShiftedImm2_3__CondCode2_0, + Convert__Reg1_2__T2SOImm1_3__CondCode2_0, + Convert__Reg1_1__Imm0_2551_2__CondCode2_0, + Convert__Imm0_311_0, + Convert__Imm1_0__imm_95_0, + Convert__Imm0_311_1, + Convert__Imm1_0__ProcIFlags1_1, + Convert__Imm1_0__ProcIFlags1_2, + Convert__Imm1_0__ProcIFlags1_1__Imm0_311_2, + Convert__Imm1_0__ProcIFlags1_1__Imm1_2, + Convert__Imm1_0__ProcIFlags1_2__Imm1_3, + Convert__Reg1_0__Reg1_1__Reg1_2, + Convert__Imm0_151_1__CondCode2_0, + Convert__imm_95_15, + Convert__imm_95_15__CondCode2_0, + Convert__MemBarrierOpt1_0, + Convert__MemBarrierOpt1_1__CondCode2_0, + Convert__imm_95_0__CondCode2_0, + Convert__Reg1_1__FPImm1_2__CondCode2_0, + Convert__Reg1_1__Tie0__CondCode2_0__DPRRegList1_3, + Convert__Reg1_1__CondCode2_0__DPRRegList1_2, + Convert__Reg1_1__Tie0__Reg1_2__imm_95_1__CondCode2_0, + Convert__Reg1_1__Tie0__Reg1_2__imm_95_0__CondCode2_0, + Convert__Imm0_2391_1__CondCode2_0, + Convert__Imm0_2391_2__CondCode2_0, + Convert__Imm0_631_0, + Convert__Imm0_655351_1, + Convert__InstSyncBarrierOpt1_0, + Convert__InstSyncBarrierOpt1_1__CondCode2_0, + Convert__ITCondCode1_1__ITMask1_0, + Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, + Convert__Reg1_1__Reg1_2__MemNoOffset1_3__CondCode2_0, + Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, + Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, + Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__PostIdxImm8s41_4__CondCode2_0, + Convert__CoprocNum1_0__CoprocReg1_1__AddrMode52_2, + Convert__CoprocNum1_0__CoprocReg1_1__MemNoOffset1_2__CoprocOption1_3, + Convert__CoprocNum1_0__CoprocReg1_1__MemNoOffset1_2__PostIdxImm8s41_3, + Convert__Reg1_1__CondCode2_0__RegList1_2, + Convert__Reg1_2__CondCode2_0__RegList1_3, + Convert__Reg1_1__CondCode2_0__RegList1_3, + Convert__Reg1_1__Tie0__CondCode2_0__RegList1_3, + Convert__Reg1_2__Tie0__CondCode2_0__RegList1_4, + Convert__Reg1_1__ThumbMemPC1_2__CondCode2_0, + Convert__Reg1_1__MemThumbRIs42_2__CondCode2_0, + Convert__Reg1_1__MemThumbRR2_2__CondCode2_0, + Convert__Reg1_1__MemThumbSPI2_2__CondCode2_0, + Convert__Reg1_1__MemImm12Offset2_2__CondCode2_0, + Convert__Reg1_1__MemNegImm8Offset2_2__CondCode2_0, + Convert__Reg1_1__MemRegOffset3_2__CondCode2_0, + Convert__Reg1_1__MemUImm12Offset2_2__CondCode2_0, + Convert__Reg1_1__T2MemRegOffset3_2__CondCode2_0, + Convert__Reg1_1__MemPCRelImm121_2__CondCode2_0, + Convert__Reg1_2__MemUImm12Offset2_3__CondCode2_0, + Convert__Reg1_2__T2MemRegOffset3_3__CondCode2_0, + Convert__Reg1_2__MemPCRelImm121_3__CondCode2_0, + Convert__Reg1_1__imm_95_0__MemImm12Offset2_2__CondCode2_0, + Convert__Reg1_1__imm_95_0__MemImm8Offset2_2__CondCode2_0, + Convert__Reg1_1__MemNoOffset1_2__Tie1__AM2OffsetImm2_3__CondCode2_0, + Convert__Reg1_1__MemNoOffset1_2__Tie1__Imm1_3__CondCode2_0, + Convert__Reg1_1__MemNoOffset1_2__Tie1__PostIdxRegShifted2_3__CondCode2_0, + Convert__Reg1_1__imm_95_0__MemRegOffset3_2__CondCode2_0, + Convert__Reg1_1__MemThumbRIs12_2__CondCode2_0, + Convert__Reg1_1__MemPosImm8Offset2_2__CondCode2_0, + Convert__Reg1_1__Reg1_2__MemImm8s4Offset2_3__CondCode2_0, + Convert__Reg1_1__Reg1_2__AddrMode33_3__CondCode2_0, + Convert__Reg1_1__Reg1_2__imm_95_0__MemImm8s4Offset2_3__CondCode2_0, + Convert__Reg1_1__Reg1_2__MemNoOffset1_3__Tie2__Imm1_4__CondCode2_0, + Convert__Reg1_1__Reg1_2__imm_95_0__AddrMode33_3__CondCode2_0, + Convert__Reg1_1__Reg1_2__MemNoOffset1_3__Tie2__AM3Offset2_4__CondCode2_0, + Convert__Reg1_1__MemImm0_1020s4Offset2_2__CondCode2_0, + Convert__Reg1_1__MemThumbRIs22_2__CondCode2_0, + Convert__Reg1_1__AddrMode33_2__CondCode2_0, + Convert__Reg1_1__imm_95_0__AddrMode33_2__CondCode2_0, + Convert__Reg1_1__MemNoOffset1_2__Tie1__AM3Offset2_3__CondCode2_0, + Convert__Reg1_1__MemNoOffset1_2__Tie1__PostIdxReg2_3__CondCode2_0, + Convert__Reg1_1__MemNoOffset1_2__Tie1__PostIdxImm81_3__CondCode2_0, + Convert__Reg1_2__CCOut1_0__Reg1_2__Imm0_311_3__CondCode2_1, + Convert__Reg1_2__Reg1_2__Imm0_311_3__CondCode2_1__CCOut1_0, + Convert__Reg1_3__Reg1_3__Imm0_311_4__CondCode2_1__CCOut1_0, + Convert__Reg1_2__CCOut1_0__Reg1_3__Imm0_311_4__CondCode2_1, + Convert__Reg1_2__Reg1_3__Imm0_311_4__CondCode2_1__CCOut1_0, + Convert__Reg1_3__Reg1_4__Imm0_311_5__CondCode2_1__CCOut1_0, + Convert__CoprocNum1_1__Imm0_71_2__Reg1_3__CoprocReg1_4__CoprocReg1_5__imm_95_0__CondCode2_0, + Convert__CoprocNum1_1__Imm0_71_2__Reg1_3__CoprocReg1_4__CoprocReg1_5__Imm0_71_6__CondCode2_0, + Convert__CoprocNum1_0__Imm0_71_1__Reg1_2__CoprocReg1_3__CoprocReg1_4__imm_95_0, + Convert__CoprocNum1_0__Imm0_71_1__Reg1_2__CoprocReg1_3__CoprocReg1_4__Imm0_71_5, + Convert__CoprocNum1_1__Imm0_151_2__Reg1_3__Reg1_4__CoprocReg1_5__CondCode2_0, + Convert__CoprocNum1_0__Imm0_151_1__Reg1_2__Reg1_3__CoprocReg1_4, + Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, + Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, + Convert__Reg1_1__Imm256_65535Expr1_2__CondCode2_0, + Convert__Reg1_1__T2SOImm1_2__CondCode2_0__reg0, + Convert__Reg1_1__T2SOImmNot1_2__CondCode2_0__reg0, + Convert__Reg1_1__Imm0_65535Expr1_2__CondCode2_0, + Convert__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, + Convert__Reg1_2__CCOut1_0__Imm0_2551_3__CondCode2_1, + Convert__Reg1_2__ModImmNot1_3__CondCode2_1__CCOut1_0, + Convert__Reg1_2__RegShiftedReg3_3__CondCode2_1__CCOut1_0, + Convert__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, + Convert__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, + Convert__Reg1_2__T2SOImm1_3__CondCode2_0__reg0, + Convert__Reg1_2__Reg1_3__CondCode2_0__reg0, + Convert__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0, + Convert__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, + Convert__Reg1_0__Reg1_1, + Convert__Reg1_0__regCPSR__Imm0_2551_1__imm_95_14__imm_95_0, + Convert__Reg1_1__T2SOImm1_2__CondCode2_0__regCPSR, + Convert__Reg1_1__Reg1_2__CondCode2_0__regCPSR, + Convert__Reg1_2__T2SOImm1_3__CondCode2_0__regCPSR, + Convert__Reg1_2__Reg1_3__CondCode2_0__regCPSR, + Convert__Reg1_1__Tie0__Imm0_65535Expr1_2__CondCode2_0, + Convert__Reg1_3__CoprocNum1_1__Imm0_71_2__CoprocReg1_4__CoprocReg1_5__imm_95_0__CondCode2_0, + Convert__Reg1_3__CoprocNum1_1__Imm0_71_2__CoprocReg1_4__CoprocReg1_5__Imm0_71_6__CondCode2_0, + Convert__Reg1_2__CoprocNum1_0__Imm0_71_1__CoprocReg1_3__CoprocReg1_4__imm_95_0, + Convert__Reg1_2__CoprocNum1_0__Imm0_71_1__CoprocReg1_3__CoprocReg1_4__Imm0_71_5, + Convert__Reg1_3__Reg1_4__CoprocNum1_1__Imm0_151_2__CoprocReg1_5__CondCode2_0, + Convert__Reg1_1__BankedReg1_2__CondCode2_0, + Convert__Reg1_1__MSRMask1_2__CondCode2_0, + Convert__BankedReg1_1__Reg1_2__CondCode2_0, + Convert__MSRMask1_1__Reg1_2__CondCode2_0, + Convert__MSRMask1_1__ModImm1_2__CondCode2_0, + Convert__Reg1_1__Reg1_2__Reg1_1__CondCode2_0, + ConvertCustom_cvtThumbMultiply, + Convert__Reg1_2__CCOut1_0__Reg1_3__CondCode2_1, + Convert__Reg1_2__T2SOImm1_3__CondCode2_1__CCOut1_0, + Convert__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, + Convert__Reg1_2__Reg1_3__imm_95_0__CondCode2_1__CCOut1_0, + Convert__regR8__regR8__imm_95_14__imm_95_0, + Convert__regR0__regR0__CondCode2_0__reg0, + Convert__Reg1_1__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, + Convert__Reg1_1__Reg1_2__Reg1_3__PKHLSLImm1_4__CondCode2_0, + Convert__Reg1_1__Reg1_3__Reg1_2__imm_95_0__CondCode2_0, + Convert__Reg1_1__Reg1_2__Reg1_3__PKHASRImm1_4__CondCode2_0, + Convert__MemImm12Offset2_0, + Convert__MemRegOffset3_0, + Convert__MemNegImm8Offset2_1__CondCode2_0, + Convert__MemUImm12Offset2_1__CondCode2_0, + Convert__T2MemRegOffset3_1__CondCode2_0, + Convert__MemPCRelImm121_1__CondCode2_0, + Convert__CondCode2_0__RegList1_1, + Convert__regSP__Tie0__CondCode2_0__RegList1_1, + Convert__regSP__Tie0__CondCode2_0__RegList1_2, + Convert__Reg1_1__Reg1_2__Imm0_311_3__Imm1_321_4__CondCode2_0, + Convert__SetEndImm1_0, + Convert__Imm0_11_0, + Convert__imm_95_4__CondCode2_0, + Convert__imm_95_5__CondCode2_0, + Convert__Reg1_1__Tie0__Reg1_2__Reg1_3, + Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__Tie0__Tie1__CondCode2_0, + Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_5__Tie0__Tie1__CondCode2_1__CCOut1_0, + Convert__Reg1_1__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, + Convert__Imm0_311_2, + Convert__Imm0_311_1__CondCode2_0, + Convert__Imm0_311_2__CondCode2_0, + Convert__Imm0_311_3__CondCode2_0, + Convert__Reg1_1__Imm1_321_2__Reg1_3__imm_95_0__CondCode2_0, + Convert__Reg1_1__Imm1_321_2__Reg1_3__ShifterImm1_4__CondCode2_0, + Convert__Reg1_1__Imm1_161_2__Reg1_3__CondCode2_0, + Convert__Reg1_1__Reg1_2__Reg1_3__MemNoOffset1_4__CondCode2_0, + Convert__imm_95_0__Reg1_1__MemImm8Offset2_2__CondCode2_0, + Convert__MemNoOffset1_2__Reg1_1__Tie0__Imm1_3__CondCode2_0, + Convert__imm_95_0__Reg1_1__MemImm12Offset2_2__CondCode2_0, + Convert__MemNoOffset1_2__Reg1_1__Tie0__AM2OffsetImm2_3__CondCode2_0, + Convert__MemNoOffset1_2__Reg1_1__Tie0__PostIdxRegShifted2_3__CondCode2_0, + Convert__imm_95_0__Reg1_1__MemRegOffset3_2__CondCode2_0, + Convert__Reg1_1__MemImm8Offset2_2__CondCode2_0, + Convert__imm_95_0__Reg1_1__Reg1_2__MemImm8s4Offset2_3__CondCode2_0, + Convert__MemNoOffset1_3__Reg1_1__Reg1_2__Tie0__Imm1_4__CondCode2_0, + Convert__imm_95_0__Reg1_1__Reg1_2__AddrMode33_3__CondCode2_0, + Convert__MemNoOffset1_3__Reg1_1__Reg1_2__Tie0__AM3Offset2_4__CondCode2_0, + Convert__Reg1_1__Reg1_2__MemImm0_1020s4Offset2_3__CondCode2_0, + Convert__imm_95_0__Reg1_1__AddrMode33_2__CondCode2_0, + Convert__MemNoOffset1_2__Reg1_1__Tie0__AM3Offset2_3__CondCode2_0, + Convert__MemNoOffset1_2__Reg1_1__Tie0__PostIdxImm81_3__CondCode2_0, + Convert__MemNoOffset1_2__Reg1_1__Tie0__PostIdxReg2_3__CondCode2_0, + Convert__Imm0_2551_3__CondCode2_0, + Convert__Imm0_2551_1__CondCode2_0, + Convert__Imm24bit1_1__CondCode2_0, + Convert__Reg1_1__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, + Convert__Reg1_1__Reg1_2__imm_95_0__CondCode2_0, + Convert__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, + Convert__Reg1_1__Reg1_2__RotImm1_3__CondCode2_0, + Convert__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, + Convert__MemTBB2_1__CondCode2_0, + Convert__MemTBH2_1__CondCode2_0, + Convert__Reg1_1__Imm0_311_2__Reg1_3__imm_95_0__CondCode2_0, + Convert__Reg1_1__Imm0_311_2__Reg1_3__ShifterImm1_4__CondCode2_0, + Convert__Reg1_1__Imm0_151_2__Reg1_3__CondCode2_0, + Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, + Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, + Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, + Convert__Reg1_2__Reg1_3__Reg1_2__CondCode2_0, + Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, + Convert__Reg1_1__Reg1_1__Reg1_2__CondCode2_0, + Convert__Reg1_2__NEONi16splatNot1_3__Tie0__CondCode2_0, + Convert__Reg1_2__NEONi32splatNot1_3__Tie0__CondCode2_0, + Convert__Reg1_2__NEONi16splat1_3__Tie0__CondCode2_0, + Convert__Reg1_2__NEONi32splat1_3__Tie0__CondCode2_0, + Convert__Reg1_1__Tie0__Reg1_2__Reg1_3__CondCode2_0, + Convert__Reg1_2__Reg1_2__CondCode2_0, + Convert__Reg1_2__CondCode2_0, + Convert__Reg1_3__Reg1_4__CondCode2_0, + Convert__Reg1_3__Tie0__FBits161_5__CondCode2_0, + Convert__Reg1_3__Reg1_4__Imm1_5__CondCode2_0, + Convert__Reg1_3__Tie0__FBits321_5__CondCode2_0, + Convert__Reg1_2__Reg1_3, + Convert__Reg1_2__Reg1_3__VectorIndex161_4__CondCode2_0, + Convert__Reg1_2__Reg1_3__VectorIndex321_4__CondCode2_0, + Convert__Reg1_2__Reg1_3__VectorIndex81_4__CondCode2_0, + Convert__Reg1_2__Reg1_2__Reg1_3__Imm0_151_4__CondCode2_0, + Convert__Reg1_2__Reg1_2__Reg1_3__Imm0_31_4__CondCode2_0, + Convert__Reg1_2__Reg1_2__Reg1_3__Imm0_11_4__CondCode2_0, + Convert__Reg1_2__Reg1_2__Reg1_3__Imm0_71_4__CondCode2_0, + Convert__Reg1_2__Reg1_3__Reg1_4__Imm0_151_5__CondCode2_0, + Convert__Reg1_2__Reg1_3__Reg1_4__Imm0_31_5__CondCode2_0, + Convert__Reg1_2__Reg1_3__Reg1_4__Imm0_11_5__CondCode2_0, + Convert__Reg1_2__Reg1_3__Reg1_4__Imm0_71_5__CondCode2_0, + Convert__VecListDPairAllLanes1_2__DupAlignedMemory162_3__CondCode2_0, + Convert__VecListDPair1_2__AlignedMemory64or1282_3__CondCode2_0, + Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__CondCode2_0, + Convert__VecListOneDAllLanes1_2__DupAlignedMemory162_3__CondCode2_0, + Convert__VecListOneD1_2__AlignedMemory642_3__CondCode2_0, + Convert__VecListOneDHWordIndexed2_2__AlignedMemory162_3__CondCode2_0, + Convert__VecListThreeD1_2__AlignedMemory642_3__CondCode2_0, + Convert__VecListDPairAllLanes1_2__DupAlignedMemory322_3__CondCode2_0, + Convert__VecListOneDAllLanes1_2__DupAlignedMemory322_3__CondCode2_0, + Convert__VecListOneDWordIndexed2_2__AlignedMemory322_3__CondCode2_0, + Convert__VecListDPairAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, + Convert__VecListOneDAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, + Convert__VecListOneDByteIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, + Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemory162_3__CondCode2_0, + Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemory162_3__Reg1_4__CondCode2_0, + Convert__VecListDPair1_2__imm_95_0__AlignedMemory64or1282_3__CondCode2_0, + Convert__VecListDPair1_2__imm_95_0__AlignedMemory64or1282_3__Reg1_4__CondCode2_0, + Convert__VecListFourD1_2__imm_95_0__AlignedMemory64or128or2562_3__CondCode2_0, + Convert__VecListFourD1_2__imm_95_0__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0, + Convert__VecListOneDAllLanes1_2__imm_95_0__DupAlignedMemory162_3__CondCode2_0, + Convert__VecListOneDAllLanes1_2__imm_95_0__DupAlignedMemory162_3__Reg1_4__CondCode2_0, + Convert__VecListOneD1_2__imm_95_0__AlignedMemory642_3__CondCode2_0, + Convert__VecListOneD1_2__imm_95_0__AlignedMemory642_3__Reg1_4__CondCode2_0, + Convert__VecListOneDHWordIndexed2_2__AlignedMemory162_3__Reg1_4__CondCode2_0, + Convert__VecListThreeD1_2__imm_95_0__AlignedMemory642_3__CondCode2_0, + Convert__VecListThreeD1_2__imm_95_0__AlignedMemory642_3__Reg1_4__CondCode2_0, + Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemory322_3__CondCode2_0, + Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemory322_3__Reg1_4__CondCode2_0, + Convert__VecListOneDAllLanes1_2__imm_95_0__DupAlignedMemory322_3__CondCode2_0, + Convert__VecListOneDAllLanes1_2__imm_95_0__DupAlignedMemory322_3__Reg1_4__CondCode2_0, + Convert__VecListOneDWordIndexed2_2__AlignedMemory322_3__Reg1_4__CondCode2_0, + Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemoryNone2_3__CondCode2_0, + Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemoryNone2_3__Reg1_4__CondCode2_0, + Convert__VecListOneDAllLanes1_2__imm_95_0__DupAlignedMemoryNone2_3__CondCode2_0, + Convert__VecListOneDAllLanes1_2__imm_95_0__DupAlignedMemoryNone2_3__Reg1_4__CondCode2_0, + Convert__VecListOneDByteIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0, + Convert__Reg1_3__AlignedMemory2_8__Tie0__Imm1_5__CondCode2_0, + Convert__Reg1_3__imm_95_0__AlignedMemory2_8__Imm1_9__Tie0__Imm1_5__CondCode2_0, + Convert__Reg1_3__Reg1_8__Imm1_9__Tie0__Imm1_5__CondCode2_0, + Convert__VecListDPairSpacedAllLanes1_2__DupAlignedMemory322_3__CondCode2_0, + Convert__VecListDPairSpaced1_2__AlignedMemory64or1282_3__CondCode2_0, + Convert__VecListTwoDHWordIndexed2_2__AlignedMemory322_3__CondCode2_0, + Convert__VecListTwoQHWordIndexed2_2__AlignedMemory322_3__CondCode2_0, + Convert__VecListDPairAllLanes1_2__DupAlignedMemory642_3__CondCode2_0, + Convert__VecListDPairSpacedAllLanes1_2__DupAlignedMemory642_3__CondCode2_0, + Convert__VecListTwoDWordIndexed2_2__AlignedMemory642_3__CondCode2_0, + Convert__VecListTwoQWordIndexed2_2__AlignedMemory642_3__CondCode2_0, + Convert__VecListDPairSpacedAllLanes1_2__DupAlignedMemory162_3__CondCode2_0, + Convert__VecListTwoDByteIndexed2_2__AlignedMemory162_3__CondCode2_0, + Convert__VecListDPairSpacedAllLanes1_2__imm_95_0__DupAlignedMemory322_3__CondCode2_0, + Convert__VecListDPairSpacedAllLanes1_2__imm_95_0__DupAlignedMemory322_3__Reg1_4__CondCode2_0, + Convert__VecListDPairSpaced1_2__imm_95_0__AlignedMemory64or1282_3__CondCode2_0, + Convert__VecListDPairSpaced1_2__imm_95_0__AlignedMemory64or1282_3__Reg1_4__CondCode2_0, + Convert__VecListTwoDHWordIndexed2_2__AlignedMemory322_3__Reg1_4__CondCode2_0, + Convert__VecListTwoQHWordIndexed2_2__AlignedMemory322_3__Reg1_4__CondCode2_0, + Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemory642_3__CondCode2_0, + Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemory642_3__Reg1_4__CondCode2_0, + Convert__VecListDPairSpacedAllLanes1_2__imm_95_0__DupAlignedMemory642_3__CondCode2_0, + Convert__VecListDPairSpacedAllLanes1_2__imm_95_0__DupAlignedMemory642_3__Reg1_4__CondCode2_0, + Convert__VecListTwoDWordIndexed2_2__AlignedMemory642_3__Reg1_4__CondCode2_0, + Convert__VecListTwoQWordIndexed2_2__AlignedMemory642_3__Reg1_4__CondCode2_0, + Convert__VecListDPairSpacedAllLanes1_2__imm_95_0__DupAlignedMemory162_3__CondCode2_0, + Convert__VecListDPairSpacedAllLanes1_2__imm_95_0__DupAlignedMemory162_3__Reg1_4__CondCode2_0, + Convert__VecListTwoDByteIndexed2_2__AlignedMemory162_3__Reg1_4__CondCode2_0, + Convert__VecListThreeDAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, + Convert__VecListThreeDHWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, + Convert__VecListThreeQAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, + Convert__VecListThreeQ1_2__AlignedMemory642_3__CondCode2_0, + Convert__VecListThreeQHWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, + Convert__VecListThreeDWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, + Convert__VecListThreeQWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, + Convert__VecListThreeDByteIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, + Convert__VecListThreeDAllLanes1_2__DupAlignedMemoryNone2_3__Reg1_4__CondCode2_0, + Convert__VecListThreeD1_2__AlignedMemory642_3__Reg1_4__CondCode2_0, + Convert__VecListThreeDHWordIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0, + Convert__VecListThreeQAllLanes1_2__DupAlignedMemoryNone2_3__Reg1_4__CondCode2_0, + Convert__VecListThreeQ1_2__AlignedMemory642_3__Reg1_4__CondCode2_0, + Convert__VecListThreeQHWordIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0, + Convert__VecListThreeDWordIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0, + Convert__VecListThreeQWordIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0, + Convert__VecListThreeDByteIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0, + Convert__Reg1_3__Reg1_4__Reg1_5__AlignedMemory2_7__CondCode2_0, + Convert__Reg1_3__Reg1_4__Reg1_5__imm_95_0__AlignedMemory2_7__Imm1_8__CondCode2_0, + Convert__Reg1_3__Reg1_6__Reg1_9__AlignedMemory2_13__CondCode2_0, + Convert__Reg1_3__Reg1_6__Reg1_9__imm_95_0__DupAlignedMemory642_13__Imm1_14__CondCode2_0, + Convert__VecListFourDAllLanes1_2__DupAlignedMemory642_3__CondCode2_0, + Convert__VecListFourDHWordIndexed2_2__AlignedMemory642_3__CondCode2_0, + Convert__VecListFourQAllLanes1_2__DupAlignedMemory642_3__CondCode2_0, + Convert__VecListFourQ1_2__AlignedMemory64or128or2562_3__CondCode2_0, + Convert__VecListFourQHWordIndexed2_2__AlignedMemory642_3__CondCode2_0, + Convert__VecListFourDAllLanes1_2__DupAlignedMemory64or1282_3__CondCode2_0, + Convert__VecListFourDWordIndexed2_2__AlignedMemory64or1282_3__CondCode2_0, + Convert__VecListFourQAllLanes1_2__DupAlignedMemory64or1282_3__CondCode2_0, + Convert__VecListFourQWordIndexed2_2__AlignedMemory64or1282_3__CondCode2_0, + Convert__VecListFourDAllLanes1_2__DupAlignedMemory322_3__CondCode2_0, + Convert__VecListFourDByteIndexed2_2__AlignedMemory322_3__CondCode2_0, + Convert__VecListFourQAllLanes1_2__DupAlignedMemory322_3__CondCode2_0, + Convert__VecListFourDAllLanes1_2__DupAlignedMemory642_3__Reg1_4__CondCode2_0, + Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0, + Convert__VecListFourDHWordIndexed2_2__AlignedMemory642_3__Reg1_4__CondCode2_0, + Convert__VecListFourQAllLanes1_2__DupAlignedMemory642_3__Reg1_4__CondCode2_0, + Convert__VecListFourQ1_2__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0, + Convert__VecListFourQHWordIndexed2_2__AlignedMemory642_3__Reg1_4__CondCode2_0, + Convert__VecListFourDAllLanes1_2__DupAlignedMemory64or1282_3__Reg1_4__CondCode2_0, + Convert__VecListFourDWordIndexed2_2__AlignedMemory64or1282_3__Reg1_4__CondCode2_0, + Convert__VecListFourQAllLanes1_2__DupAlignedMemory64or1282_3__Reg1_4__CondCode2_0, + Convert__VecListFourQWordIndexed2_2__AlignedMemory64or1282_3__Reg1_4__CondCode2_0, + Convert__VecListFourDAllLanes1_2__DupAlignedMemory322_3__Reg1_4__CondCode2_0, + Convert__VecListFourDByteIndexed2_2__AlignedMemory322_3__Reg1_4__CondCode2_0, + Convert__VecListFourQAllLanes1_2__DupAlignedMemory322_3__Reg1_4__CondCode2_0, + Convert__Reg1_3__Reg1_4__Reg1_5__Reg1_6__AlignedMemory2_8__CondCode2_0, + Convert__Reg1_3__Reg1_4__Reg1_5__Reg1_6__imm_95_0__AlignedMemory2_8__Imm1_9__CondCode2_0, + Convert__Reg1_3__Reg1_6__Reg1_9__Reg1_12__AlignedMemory2_16__CondCode2_0, + Convert__Reg1_3__Reg1_6__Reg1_9__Reg1_12__imm_95_0__AlignedMemory2_16__Imm1_17__CondCode2_0, + Convert__Reg1_1__Tie0__CondCode2_0__SPRRegList1_3, + Convert__Reg1_1__CondCode2_0__SPRRegList1_2, + Convert__Reg1_1__AddrMode52_2__CondCode2_0, + Convert__Reg1_2__AddrMode5FP162_3__CondCode2_0, + Convert__Reg1_2__AddrMode52_3__CondCode2_0, + Convert__Reg1_1__Reg1_2__Reg1_3, + Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, + Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, + Convert__Reg1_1__Reg1_2__Reg1_2__CondCode2_0, + Convert__Reg1_2__FPImm1_3__CondCode2_0, + Convert__Reg1_2__NEONi32vmov1_3__CondCode2_0, + Convert__Reg1_2__NEONi16splat1_3__CondCode2_0, + Convert__Reg1_2__NEONi16vmovByteReplicate1_3__CondCode2_0, + Convert__Reg1_2__NEONi32vmovByteReplicate1_3__CondCode2_0, + Convert__Reg1_2__NEONi32vmovNeg1_3__CondCode2_0, + Convert__Reg1_2__NEONi64splat1_3__CondCode2_0, + Convert__Reg1_2__NEONi8splat1_3__CondCode2_0, + Convert__Reg1_2__Reg1_3__Reg1_3__CondCode2_0, + Convert__Reg1_2__Tie0__Reg1_4__VectorIndex161_3__CondCode2_0, + Convert__Reg1_2__Tie0__Reg1_4__VectorIndex321_3__CondCode2_0, + Convert__Reg1_2__Tie0__Reg1_4__VectorIndex81_3__CondCode2_0, + Convert__Reg1_2__Reg1_2__Reg1_3__VectorIndex321_4__CondCode2_0, + Convert__Reg1_2__Reg1_2__Reg1_3__VectorIndex161_4__CondCode2_0, + Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, + Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, + Convert__Reg1_2__NEONi16invByteReplicate1_3__CondCode2_0, + Convert__Reg1_2__NEONi32invByteReplicate1_3__CondCode2_0, + Convert__Reg1_2__Tie0__Reg1_3__CondCode2_0, + Convert__regSP__Tie0__CondCode2_0__DPRRegList1_1, + Convert__regSP__Tie0__CondCode2_0__SPRRegList1_1, + Convert__regSP__Tie0__CondCode2_0__DPRRegList1_2, + Convert__regSP__Tie0__CondCode2_0__SPRRegList1_2, + Convert__Reg1_2__Reg1_3__ShrImm81_4__CondCode2_0, + Convert__Reg1_2__Reg1_3__ShrImm161_4__CondCode2_0, + Convert__Reg1_2__Reg1_3__ShrImm321_4__CondCode2_0, + Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, + Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, + Convert__Reg1_2__Reg1_2__ShrImm161_3__CondCode2_0, + Convert__Reg1_2__Reg1_2__ShrImm321_3__CondCode2_0, + Convert__Reg1_2__Reg1_2__ShrImm641_3__CondCode2_0, + Convert__Reg1_2__Reg1_2__ShrImm81_3__CondCode2_0, + Convert__Reg1_2__Reg1_3__ShrImm641_4__CondCode2_0, + Convert__Reg1_2__Tie0__Reg1_2__ShrImm161_3__CondCode2_0, + Convert__Reg1_2__Tie0__Reg1_2__ShrImm321_3__CondCode2_0, + Convert__Reg1_2__Tie0__Reg1_2__ShrImm641_3__CondCode2_0, + Convert__Reg1_2__Tie0__Reg1_2__ShrImm81_3__CondCode2_0, + Convert__Reg1_2__Tie0__Reg1_3__ShrImm161_4__CondCode2_0, + Convert__Reg1_2__Tie0__Reg1_3__ShrImm321_4__CondCode2_0, + Convert__Reg1_2__Tie0__Reg1_3__ShrImm641_4__CondCode2_0, + Convert__Reg1_2__Tie0__Reg1_3__ShrImm81_4__CondCode2_0, + Convert__Reg1_2__Reg1_3__Imm1_151_4__CondCode2_0, + Convert__Reg1_2__Reg1_3__Imm1_311_4__CondCode2_0, + Convert__Reg1_2__Reg1_3__Imm1_71_4__CondCode2_0, + Convert__Reg1_2__Reg1_3__Imm161_4__CondCode2_0, + Convert__Reg1_2__Reg1_3__Imm321_4__CondCode2_0, + Convert__Reg1_2__Reg1_3__Imm81_4__CondCode2_0, + Convert__Reg1_2__Tie0__Reg1_2__Imm1_3__CondCode2_0, + Convert__Reg1_2__Tie0__Reg1_3__Imm1_4__CondCode2_0, + Convert__AlignedMemory64or1282_3__VecListDPair1_2__CondCode2_0, + Convert__AlignedMemory64or128or2562_3__VecListFourD1_2__CondCode2_0, + Convert__AlignedMemory642_3__VecListOneD1_2__CondCode2_0, + Convert__AlignedMemory642_3__VecListThreeD1_2__CondCode2_0, + Convert__imm_95_0__AlignedMemory64or1282_3__VecListDPair1_2__CondCode2_0, + Convert__imm_95_0__AlignedMemory64or1282_3__Reg1_4__VecListDPair1_2__CondCode2_0, + Convert__imm_95_0__AlignedMemory64or128or2562_3__VecListFourD1_2__CondCode2_0, + Convert__imm_95_0__AlignedMemory64or128or2562_3__Reg1_4__VecListFourD1_2__CondCode2_0, + Convert__imm_95_0__AlignedMemory642_3__VecListOneD1_2__CondCode2_0, + Convert__imm_95_0__AlignedMemory642_3__Reg1_4__VecListOneD1_2__CondCode2_0, + Convert__imm_95_0__AlignedMemory642_3__VecListThreeD1_2__CondCode2_0, + Convert__imm_95_0__AlignedMemory642_3__Reg1_4__VecListThreeD1_2__CondCode2_0, + Convert__AlignedMemory2_8__Reg1_3__Imm1_5__CondCode2_0, + Convert__imm_95_0__AlignedMemory2_8__Imm1_9__Reg1_3__Imm1_5__CondCode2_0, + Convert__Reg1_8__Imm1_9__Reg1_3__Imm1_5__CondCode2_0, + Convert__imm_95_0__Reg1_8__Imm1_9__Imm1_10__Reg1_3__Imm1_5__CondCode2_0, + Convert__AlignedMemory64or1282_3__VecListDPairSpaced1_2__CondCode2_0, + Convert__imm_95_0__AlignedMemory64or1282_3__VecListDPairSpaced1_2__CondCode2_0, + Convert__imm_95_0__AlignedMemory64or1282_3__Reg1_4__VecListDPairSpaced1_2__CondCode2_0, + Convert__AlignedMemory2_7__Reg1_3__Reg1_4__Reg1_5__CondCode2_0, + Convert__imm_95_0__AlignedMemory2_7__Imm1_8__Reg1_3__Reg1_4__Reg1_5__CondCode2_0, + Convert__AlignedMemory2_8__Reg1_3__Reg1_4__Reg1_5__Reg1_6__CondCode2_0, + Convert__imm_95_0__AlignedMemory2_8__Imm1_9__Reg1_3__Reg1_4__Reg1_5__Reg1_6__CondCode2_0, + Convert__Reg1_1__Reg1_2__Tie0__Tie1__CondCode2_0, + Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, + Convert__Reg1_2__VecListDPair1_3__Reg1_4__CondCode2_0, + Convert__Reg1_2__VecListFourD1_3__Reg1_4__CondCode2_0, + Convert__Reg1_2__VecListOneD1_3__Reg1_4__CondCode2_0, + Convert__Reg1_2__VecListThreeD1_3__Reg1_4__CondCode2_0, + Convert__Reg1_2__Tie0__VecListDPair1_3__Reg1_4__CondCode2_0, + Convert__Reg1_2__Tie0__VecListFourD1_3__Reg1_4__CondCode2_0, + Convert__Reg1_2__Tie0__VecListOneD1_3__Reg1_4__CondCode2_0, + Convert__Reg1_2__Tie0__VecListThreeD1_3__Reg1_4__CondCode2_0, + Convert__imm_95_2__CondCode2_0, + Convert__imm_95_3__CondCode2_0, + Convert__imm_95_1__CondCode2_0, + CVT_NUM_SIGNATURES +}; + +} // end anonymous namespace + +static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][17] = { + // Convert__Reg1_2__CCOut1_0__Tie0__Reg1_3__CondCode2_1 + { CVT_95_Reg, 3, CVT_95_addCCOutOperands, 1, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addCondCodeOperands, 2, CVT_Done }, + // Convert__Reg1_2__Reg1_2__RegShiftedReg3_3__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_addRegShiftedRegOperands, 4, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_addModImmOperands, 4, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_addRegShiftedImmOperands, 4, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addRegShiftedImmOperands, 5, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__RegShiftedReg3_4__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addRegShiftedRegOperands, 5, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__ModImm1_4__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addModImmOperands, 5, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_4__RegShiftedImm2_5__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addRegShiftedImmOperands, 6, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_1__Tie0__Reg1_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Tie0__Imm0_508s41_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addImm0_95_508s4Operands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__regSP__Tie0__Imm0_508s4Neg1_2__CondCode2_0 + { CVT_regSP, 0, CVT_Tied, 0, CVT_95_addImm0_95_508s4NegOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_1__Imm0_40951_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_1__Imm0_4095Neg1_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImm0_95_4095NegOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__CCOut1_0__Tie0__Imm0_2551_3__CondCode2_1 + { CVT_95_Reg, 3, CVT_95_addCCOutOperands, 1, CVT_Tied, 0, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 2, CVT_Done }, + // Convert__Reg1_2__Reg1_2__T2SOImm1_3__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_2__T2SOImmNeg1_3__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_addT2SOImmNegOperands, 4, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_2__ModImmNeg1_3__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_addModImmNegOperands, 4, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__regSP__Tie0__Imm0_508s41_3__CondCode2_0 + { CVT_regSP, 0, CVT_Tied, 0, CVT_95_addImm0_95_508s4Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__regSP__Tie0__Imm0_508s4Neg1_3__CondCode2_0 + { CVT_regSP, 0, CVT_Tied, 0, CVT_95_addImm0_95_508s4NegOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_2__Imm0_1020s41_3__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImm0_95_1020s4Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Imm0_40951_3__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_2__Imm0_40951_3__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_2__Imm0_4095Neg1_3__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImm0_95_4095NegOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_3__T2SOImmNeg1_4__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 4, CVT_95_Reg, 4, CVT_95_addT2SOImmNegOperands, 5, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__CCOut1_0__Reg1_3__Reg1_4__CondCode2_1 + { CVT_95_Reg, 3, CVT_95_addCCOutOperands, 1, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 2, CVT_Done }, + // Convert__Reg1_2__CCOut1_0__Reg1_3__Imm0_71_4__CondCode2_1 + { CVT_95_Reg, 3, CVT_95_addCCOutOperands, 1, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 2, CVT_Done }, + // Convert__Reg1_2__Reg1_3__T2SOImmNeg1_4__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addT2SOImmNegOperands, 5, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__ModImmNeg1_4__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addModImmNegOperands, 5, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_4__T2SOImm1_5__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_4__T2SOImmNeg1_5__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addT2SOImmNegOperands, 6, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_1__UnsignedOffset_b8s21_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addUnsignedOffset_95_b8s2Operands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Imm1_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__AdrLabel1_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addAdrLabelOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Imm1_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Tie0__Reg1_2 + { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 3, CVT_Done }, + // Convert__Reg1_1__Reg1_2 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done }, + // Convert__Reg1_2__Reg1_2__T2SOImmNot1_3__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_addT2SOImmNotOperands, 4, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_2__ModImmNot1_3__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_addModImmNotOperands, 4, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 4, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 4, CVT_95_Reg, 4, CVT_95_addRegShiftedImmOperands, 5, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 4, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__T2SOImmNot1_4__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addT2SOImmNotOperands, 5, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__ModImmNot1_4__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addModImmNotOperands, 5, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__CCOut1_0__Reg1_2__ImmThumbSR1_3__CondCode2_1 + { CVT_95_Reg, 3, CVT_95_addCCOutOperands, 1, CVT_95_Reg, 3, CVT_95_addImmThumbSROperands, 4, CVT_95_addCondCodeOperands, 2, CVT_Done }, + // Convert__Reg1_2__Reg1_2__ImmThumbSR1_3__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_addImmThumbSROperands, 4, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_2__Imm0_321_3__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_3__ImmThumbSR1_4__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 4, CVT_95_Reg, 4, CVT_95_addImmThumbSROperands, 5, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__CCOut1_0__Reg1_3__ImmThumbSR1_4__CondCode2_1 + { CVT_95_Reg, 3, CVT_95_addCCOutOperands, 1, CVT_95_Reg, 4, CVT_95_addImmThumbSROperands, 5, CVT_95_addCondCodeOperands, 2, CVT_Done }, + // Convert__Reg1_2__Reg1_3__ImmThumbSR1_4__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmThumbSROperands, 5, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__Imm0_321_4__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_4__ImmThumbSR1_5__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addImmThumbSROperands, 6, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Imm1_1__CondCode2_0 + { CVT_95_addImmOperands, 2, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // ConvertCustom_cvtThumbBranches + { CVT_cvtThumbBranches, 0, CVT_Done }, + // Convert__Reg1_1__Tie0__Bitfield1_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addBitfieldOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Tie0__Reg1_2__Bitfield1_3__CondCode2_0 + { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addBitfieldOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_0 + { CVT_imm_95_0, 0, CVT_Done }, + // Convert__Imm0_2551_0 + { CVT_95_addImmOperands, 1, CVT_Done }, + // Convert__Imm0_655351_0 + { CVT_95_addImmOperands, 1, CVT_Done }, + // Convert__Imm1_0 + { CVT_95_addImmOperands, 1, CVT_Done }, + // Convert__CondCode2_0__Imm1_1 + { CVT_95_addCondCodeOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, + // Convert__Reg1_0 + { CVT_95_Reg, 1, CVT_Done }, + // Convert__Reg1_1__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__CondCode2_0__Reg1_1 + { CVT_95_addCondCodeOperands, 1, CVT_95_Reg, 2, CVT_Done }, + // Convert__CondCode2_0 + { CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_0__Imm1_1 + { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done }, + // Convert__CoprocNum1_1__Imm0_151_2__CoprocReg1_3__CoprocReg1_4__CoprocReg1_5__Imm0_71_6__CondCode2_0 + { CVT_95_addCoprocNumOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addCoprocRegOperands, 4, CVT_95_addCoprocRegOperands, 5, CVT_95_addCoprocRegOperands, 6, CVT_95_addImmOperands, 7, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__CoprocNum1_0__Imm0_151_1__CoprocReg1_2__CoprocReg1_3__CoprocReg1_4__Imm0_71_5 + { CVT_95_addCoprocNumOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addCoprocRegOperands, 3, CVT_95_addCoprocRegOperands, 4, CVT_95_addCoprocRegOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, + // Convert_NoOperands + { CVT_Done }, + // Convert__Reg1_1__Reg1_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__ModImmNeg1_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addModImmNegOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__T2SOImmNeg1_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addT2SOImmNegOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__RegShiftedImm2_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addRegShiftedImmOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__RegShiftedReg3_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addRegShiftedRegOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__T2SOImm1_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__ModImm1_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addModImmOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__RegShiftedImm2_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addRegShiftedImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__T2SOImm1_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Imm0_2551_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Imm0_311_0 + { CVT_95_addImmOperands, 1, CVT_Done }, + // Convert__Imm1_0__imm_95_0 + { CVT_95_addImmOperands, 1, CVT_imm_95_0, 0, CVT_Done }, + // Convert__Imm0_311_1 + { CVT_95_addImmOperands, 2, CVT_Done }, + // Convert__Imm1_0__ProcIFlags1_1 + { CVT_95_addImmOperands, 1, CVT_95_addProcIFlagsOperands, 2, CVT_Done }, + // Convert__Imm1_0__ProcIFlags1_2 + { CVT_95_addImmOperands, 1, CVT_95_addProcIFlagsOperands, 3, CVT_Done }, + // Convert__Imm1_0__ProcIFlags1_1__Imm0_311_2 + { CVT_95_addImmOperands, 1, CVT_95_addProcIFlagsOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, + // Convert__Imm1_0__ProcIFlags1_1__Imm1_2 + { CVT_95_addImmOperands, 1, CVT_95_addProcIFlagsOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, + // Convert__Imm1_0__ProcIFlags1_2__Imm1_3 + { CVT_95_addImmOperands, 1, CVT_95_addProcIFlagsOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, + // Convert__Reg1_0__Reg1_1__Reg1_2 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done }, + // Convert__Imm0_151_1__CondCode2_0 + { CVT_95_addImmOperands, 2, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_15 + { CVT_imm_95_15, 0, CVT_Done }, + // Convert__imm_95_15__CondCode2_0 + { CVT_imm_95_15, 0, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__MemBarrierOpt1_0 + { CVT_95_addMemBarrierOptOperands, 1, CVT_Done }, + // Convert__MemBarrierOpt1_1__CondCode2_0 + { CVT_95_addMemBarrierOptOperands, 2, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_0__CondCode2_0 + { CVT_imm_95_0, 0, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__FPImm1_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addFPImmOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Tie0__CondCode2_0__DPRRegList1_3 + { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addCondCodeOperands, 1, CVT_95_addDPRRegListOperands, 4, CVT_Done }, + // Convert__Reg1_1__CondCode2_0__DPRRegList1_2 + { CVT_95_Reg, 2, CVT_95_addCondCodeOperands, 1, CVT_95_addDPRRegListOperands, 3, CVT_Done }, + // Convert__Reg1_1__Tie0__Reg1_2__imm_95_1__CondCode2_0 + { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 3, CVT_imm_95_1, 0, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Tie0__Reg1_2__imm_95_0__CondCode2_0 + { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 3, CVT_imm_95_0, 0, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Imm0_2391_1__CondCode2_0 + { CVT_95_addImmOperands, 2, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Imm0_2391_2__CondCode2_0 + { CVT_95_addImmOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Imm0_631_0 + { CVT_95_addImmOperands, 1, CVT_Done }, + // Convert__Imm0_655351_1 + { CVT_95_addImmOperands, 2, CVT_Done }, + // Convert__InstSyncBarrierOpt1_0 + { CVT_95_addInstSyncBarrierOptOperands, 1, CVT_Done }, + // Convert__InstSyncBarrierOpt1_1__CondCode2_0 + { CVT_95_addInstSyncBarrierOptOperands, 2, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__ITCondCode1_1__ITMask1_0 + { CVT_95_addITCondCodeOperands, 2, CVT_95_addITMaskOperands, 1, CVT_Done }, + // Convert__Reg1_1__MemNoOffset1_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addMemNoOffsetOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_2__MemNoOffset1_3__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemNoOffsetOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0 + { CVT_95_addCoprocNumOperands, 2, CVT_95_addCoprocRegOperands, 3, CVT_95_addAddrMode5Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0 + { CVT_95_addCoprocNumOperands, 2, CVT_95_addCoprocRegOperands, 3, CVT_95_addMemNoOffsetOperands, 4, CVT_95_addCoprocOptionOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__PostIdxImm8s41_4__CondCode2_0 + { CVT_95_addCoprocNumOperands, 2, CVT_95_addCoprocRegOperands, 3, CVT_95_addMemNoOffsetOperands, 4, CVT_95_addPostIdxImm8s4Operands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__CoprocNum1_0__CoprocReg1_1__AddrMode52_2 + { CVT_95_addCoprocNumOperands, 1, CVT_95_addCoprocRegOperands, 2, CVT_95_addAddrMode5Operands, 3, CVT_Done }, + // Convert__CoprocNum1_0__CoprocReg1_1__MemNoOffset1_2__CoprocOption1_3 + { CVT_95_addCoprocNumOperands, 1, CVT_95_addCoprocRegOperands, 2, CVT_95_addMemNoOffsetOperands, 3, CVT_95_addCoprocOptionOperands, 4, CVT_Done }, + // Convert__CoprocNum1_0__CoprocReg1_1__MemNoOffset1_2__PostIdxImm8s41_3 + { CVT_95_addCoprocNumOperands, 1, CVT_95_addCoprocRegOperands, 2, CVT_95_addMemNoOffsetOperands, 3, CVT_95_addPostIdxImm8s4Operands, 4, CVT_Done }, + // Convert__Reg1_1__CondCode2_0__RegList1_2 + { CVT_95_Reg, 2, CVT_95_addCondCodeOperands, 1, CVT_95_addRegListOperands, 3, CVT_Done }, + // Convert__Reg1_2__CondCode2_0__RegList1_3 + { CVT_95_Reg, 3, CVT_95_addCondCodeOperands, 1, CVT_95_addRegListOperands, 4, CVT_Done }, + // Convert__Reg1_1__CondCode2_0__RegList1_3 + { CVT_95_Reg, 2, CVT_95_addCondCodeOperands, 1, CVT_95_addRegListOperands, 4, CVT_Done }, + // Convert__Reg1_1__Tie0__CondCode2_0__RegList1_3 + { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addCondCodeOperands, 1, CVT_95_addRegListOperands, 4, CVT_Done }, + // Convert__Reg1_2__Tie0__CondCode2_0__RegList1_4 + { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addCondCodeOperands, 1, CVT_95_addRegListOperands, 5, CVT_Done }, + // Convert__Reg1_1__ThumbMemPC1_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addThumbMemPCOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__MemThumbRIs42_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addMemThumbRIs4Operands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__MemThumbRR2_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addMemThumbRROperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__MemThumbSPI2_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addMemThumbSPIOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__MemImm12Offset2_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addMemImm12OffsetOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__MemNegImm8Offset2_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addMemNegImm8OffsetOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__MemRegOffset3_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addMemRegOffsetOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__MemUImm12Offset2_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addMemUImm12OffsetOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__T2MemRegOffset3_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addT2MemRegOffsetOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__MemPCRelImm121_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addMemPCRelImm12Operands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__MemUImm12Offset2_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addMemUImm12OffsetOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__T2MemRegOffset3_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addT2MemRegOffsetOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__MemPCRelImm121_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addMemPCRelImm12Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__imm_95_0__MemImm12Offset2_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_95_addMemImm12OffsetOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__imm_95_0__MemImm8Offset2_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_95_addMemImm8OffsetOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__MemNoOffset1_2__Tie1__AM2OffsetImm2_3__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addMemNoOffsetOperands, 3, CVT_Tied, 1, CVT_95_addAM2OffsetImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__MemNoOffset1_2__Tie1__Imm1_3__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addMemNoOffsetOperands, 3, CVT_Tied, 1, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__MemNoOffset1_2__Tie1__PostIdxRegShifted2_3__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addMemNoOffsetOperands, 3, CVT_Tied, 1, CVT_95_addPostIdxRegShiftedOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__imm_95_0__MemRegOffset3_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_95_addMemRegOffsetOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__MemThumbRIs12_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addMemThumbRIs1Operands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__MemPosImm8Offset2_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addMemPosImm8OffsetOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_2__MemImm8s4Offset2_3__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemImm8s4OffsetOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_2__AddrMode33_3__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addAddrMode3Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_2__imm_95_0__MemImm8s4Offset2_3__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_0, 0, CVT_95_addMemImm8s4OffsetOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_2__MemNoOffset1_3__Tie2__Imm1_4__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemNoOffsetOperands, 4, CVT_Tied, 2, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_2__imm_95_0__AddrMode33_3__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_0, 0, CVT_95_addAddrMode3Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_2__MemNoOffset1_3__Tie2__AM3Offset2_4__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemNoOffsetOperands, 4, CVT_Tied, 2, CVT_95_addAM3OffsetOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__MemImm0_1020s4Offset2_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addMemImm0_95_1020s4OffsetOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__MemThumbRIs22_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addMemThumbRIs2Operands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__AddrMode33_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addAddrMode3Operands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__imm_95_0__AddrMode33_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_95_addAddrMode3Operands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__MemNoOffset1_2__Tie1__AM3Offset2_3__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addMemNoOffsetOperands, 3, CVT_Tied, 1, CVT_95_addAM3OffsetOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__MemNoOffset1_2__Tie1__PostIdxReg2_3__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addMemNoOffsetOperands, 3, CVT_Tied, 1, CVT_95_addPostIdxRegOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__MemNoOffset1_2__Tie1__PostIdxImm81_3__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addMemNoOffsetOperands, 3, CVT_Tied, 1, CVT_95_addPostIdxImm8Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__CCOut1_0__Reg1_2__Imm0_311_3__CondCode2_1 + { CVT_95_Reg, 3, CVT_95_addCCOutOperands, 1, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 2, CVT_Done }, + // Convert__Reg1_2__Reg1_2__Imm0_311_3__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_3__Imm0_311_4__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 4, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__CCOut1_0__Reg1_3__Imm0_311_4__CondCode2_1 + { CVT_95_Reg, 3, CVT_95_addCCOutOperands, 1, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 2, CVT_Done }, + // Convert__Reg1_2__Reg1_3__Imm0_311_4__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_4__Imm0_311_5__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__CoprocNum1_1__Imm0_71_2__Reg1_3__CoprocReg1_4__CoprocReg1_5__imm_95_0__CondCode2_0 + { CVT_95_addCoprocNumOperands, 2, CVT_95_addImmOperands, 3, CVT_95_Reg, 4, CVT_95_addCoprocRegOperands, 5, CVT_95_addCoprocRegOperands, 6, CVT_imm_95_0, 0, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__CoprocNum1_1__Imm0_71_2__Reg1_3__CoprocReg1_4__CoprocReg1_5__Imm0_71_6__CondCode2_0 + { CVT_95_addCoprocNumOperands, 2, CVT_95_addImmOperands, 3, CVT_95_Reg, 4, CVT_95_addCoprocRegOperands, 5, CVT_95_addCoprocRegOperands, 6, CVT_95_addImmOperands, 7, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__CoprocNum1_0__Imm0_71_1__Reg1_2__CoprocReg1_3__CoprocReg1_4__imm_95_0 + { CVT_95_addCoprocNumOperands, 1, CVT_95_addImmOperands, 2, CVT_95_Reg, 3, CVT_95_addCoprocRegOperands, 4, CVT_95_addCoprocRegOperands, 5, CVT_imm_95_0, 0, CVT_Done }, + // Convert__CoprocNum1_0__Imm0_71_1__Reg1_2__CoprocReg1_3__CoprocReg1_4__Imm0_71_5 + { CVT_95_addCoprocNumOperands, 1, CVT_95_addImmOperands, 2, CVT_95_Reg, 3, CVT_95_addCoprocRegOperands, 4, CVT_95_addCoprocRegOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, + // Convert__CoprocNum1_1__Imm0_151_2__Reg1_3__Reg1_4__CoprocReg1_5__CondCode2_0 + { CVT_95_addCoprocNumOperands, 2, CVT_95_addImmOperands, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addCoprocRegOperands, 6, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__CoprocNum1_0__Imm0_151_1__Reg1_2__Reg1_3__CoprocReg1_4 + { CVT_95_addCoprocNumOperands, 1, CVT_95_addImmOperands, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addCoprocRegOperands, 5, CVT_Done }, + // Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_1__Imm256_65535Expr1_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__T2SOImm1_2__CondCode2_0__reg0 + { CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_reg0, 0, CVT_Done }, + // Convert__Reg1_1__T2SOImmNot1_2__CondCode2_0__reg0 + { CVT_95_Reg, 2, CVT_95_addT2SOImmNotOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_reg0, 0, CVT_Done }, + // Convert__Reg1_1__Imm0_65535Expr1_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__CCOut1_0__Imm0_2551_3__CondCode2_1 + { CVT_95_Reg, 3, CVT_95_addCCOutOperands, 1, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 2, CVT_Done }, + // Convert__Reg1_2__ModImmNot1_3__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_addModImmNotOperands, 4, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__RegShiftedReg3_3__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_addRegShiftedRegOperands, 4, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_addModImmOperands, 4, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_addRegShiftedImmOperands, 4, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__T2SOImm1_3__CondCode2_0__reg0 + { CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_reg0, 0, CVT_Done }, + // Convert__Reg1_2__Reg1_3__CondCode2_0__reg0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addCondCodeOperands, 1, CVT_reg0, 0, CVT_Done }, + // Convert__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_0__Reg1_1 + { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done }, + // Convert__Reg1_0__regCPSR__Imm0_2551_1__imm_95_14__imm_95_0 + { CVT_95_Reg, 1, CVT_regCPSR, 0, CVT_95_addImmOperands, 2, CVT_imm_95_14, 0, CVT_imm_95_0, 0, CVT_Done }, + // Convert__Reg1_1__T2SOImm1_2__CondCode2_0__regCPSR + { CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_regCPSR, 0, CVT_Done }, + // Convert__Reg1_1__Reg1_2__CondCode2_0__regCPSR + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addCondCodeOperands, 1, CVT_regCPSR, 0, CVT_Done }, + // Convert__Reg1_2__T2SOImm1_3__CondCode2_0__regCPSR + { CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_regCPSR, 0, CVT_Done }, + // Convert__Reg1_2__Reg1_3__CondCode2_0__regCPSR + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addCondCodeOperands, 1, CVT_regCPSR, 0, CVT_Done }, + // Convert__Reg1_1__Tie0__Imm0_65535Expr1_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addImmOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_3__CoprocNum1_1__Imm0_71_2__CoprocReg1_4__CoprocReg1_5__imm_95_0__CondCode2_0 + { CVT_95_Reg, 4, CVT_95_addCoprocNumOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addCoprocRegOperands, 5, CVT_95_addCoprocRegOperands, 6, CVT_imm_95_0, 0, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_3__CoprocNum1_1__Imm0_71_2__CoprocReg1_4__CoprocReg1_5__Imm0_71_6__CondCode2_0 + { CVT_95_Reg, 4, CVT_95_addCoprocNumOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addCoprocRegOperands, 5, CVT_95_addCoprocRegOperands, 6, CVT_95_addImmOperands, 7, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__CoprocNum1_0__Imm0_71_1__CoprocReg1_3__CoprocReg1_4__imm_95_0 + { CVT_95_Reg, 3, CVT_95_addCoprocNumOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addCoprocRegOperands, 4, CVT_95_addCoprocRegOperands, 5, CVT_imm_95_0, 0, CVT_Done }, + // Convert__Reg1_2__CoprocNum1_0__Imm0_71_1__CoprocReg1_3__CoprocReg1_4__Imm0_71_5 + { CVT_95_Reg, 3, CVT_95_addCoprocNumOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addCoprocRegOperands, 4, CVT_95_addCoprocRegOperands, 5, CVT_95_addImmOperands, 6, CVT_Done }, + // Convert__Reg1_3__Reg1_4__CoprocNum1_1__Imm0_151_2__CoprocReg1_5__CondCode2_0 + { CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addCoprocNumOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addCoprocRegOperands, 6, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__BankedReg1_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addBankedRegOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__MSRMask1_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addMSRMaskOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__BankedReg1_1__Reg1_2__CondCode2_0 + { CVT_95_addBankedRegOperands, 2, CVT_95_Reg, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__MSRMask1_1__Reg1_2__CondCode2_0 + { CVT_95_addMSRMaskOperands, 2, CVT_95_Reg, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__MSRMask1_1__ModImm1_2__CondCode2_0 + { CVT_95_addMSRMaskOperands, 2, CVT_95_addModImmOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_2__Reg1_1__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // ConvertCustom_cvtThumbMultiply + { CVT_cvtThumbMultiply, 0, CVT_Done }, + // Convert__Reg1_2__CCOut1_0__Reg1_3__CondCode2_1 + { CVT_95_Reg, 3, CVT_95_addCCOutOperands, 1, CVT_95_Reg, 4, CVT_95_addCondCodeOperands, 2, CVT_Done }, + // Convert__Reg1_2__T2SOImm1_3__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 4, CVT_95_addRegShiftedImmOperands, 5, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__imm_95_0__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_imm_95_0, 0, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__regR8__regR8__imm_95_14__imm_95_0 + { CVT_regR8, 0, CVT_regR8, 0, CVT_imm_95_14, 0, CVT_imm_95_0, 0, CVT_Done }, + // Convert__regR0__regR0__CondCode2_0__reg0 + { CVT_regR0, 0, CVT_regR0, 0, CVT_95_addCondCodeOperands, 1, CVT_reg0, 0, CVT_Done }, + // Convert__Reg1_1__Reg1_2__Reg1_3__imm_95_0__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_imm_95_0, 0, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_2__Reg1_3__PKHLSLImm1_4__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_3__Reg1_2__imm_95_0__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_imm_95_0, 0, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_2__Reg1_3__PKHASRImm1_4__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addPKHASRImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__MemImm12Offset2_0 + { CVT_95_addMemImm12OffsetOperands, 1, CVT_Done }, + // Convert__MemRegOffset3_0 + { CVT_95_addMemRegOffsetOperands, 1, CVT_Done }, + // Convert__MemNegImm8Offset2_1__CondCode2_0 + { CVT_95_addMemNegImm8OffsetOperands, 2, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__MemUImm12Offset2_1__CondCode2_0 + { CVT_95_addMemUImm12OffsetOperands, 2, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__T2MemRegOffset3_1__CondCode2_0 + { CVT_95_addT2MemRegOffsetOperands, 2, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__MemPCRelImm121_1__CondCode2_0 + { CVT_95_addMemPCRelImm12Operands, 2, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__CondCode2_0__RegList1_1 + { CVT_95_addCondCodeOperands, 1, CVT_95_addRegListOperands, 2, CVT_Done }, + // Convert__regSP__Tie0__CondCode2_0__RegList1_1 + { CVT_regSP, 0, CVT_Tied, 0, CVT_95_addCondCodeOperands, 1, CVT_95_addRegListOperands, 2, CVT_Done }, + // Convert__regSP__Tie0__CondCode2_0__RegList1_2 + { CVT_regSP, 0, CVT_Tied, 0, CVT_95_addCondCodeOperands, 1, CVT_95_addRegListOperands, 3, CVT_Done }, + // Convert__Reg1_1__Reg1_2__Imm0_311_3__Imm1_321_4__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_95_addImm1_95_32Operands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__SetEndImm1_0 + { CVT_95_addImmOperands, 1, CVT_Done }, + // Convert__Imm0_11_0 + { CVT_95_addImmOperands, 1, CVT_Done }, + // Convert__imm_95_4__CondCode2_0 + { CVT_imm_95_4, 0, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_5__CondCode2_0 + { CVT_imm_95_5, 0, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Tie0__Reg1_2__Reg1_3 + { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done }, + // Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__Tie0__Tie1__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_5__Tie0__Tie1__CondCode2_1__CCOut1_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addCondCodeOperands, 2, CVT_95_addCCOutOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_2__Reg1_4__Reg1_3__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Imm0_311_2 + { CVT_95_addImmOperands, 3, CVT_Done }, + // Convert__Imm0_311_1__CondCode2_0 + { CVT_95_addImmOperands, 2, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Imm0_311_2__CondCode2_0 + { CVT_95_addImmOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Imm0_311_3__CondCode2_0 + { CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Imm1_321_2__Reg1_3__imm_95_0__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addImm1_95_32Operands, 3, CVT_95_Reg, 4, CVT_imm_95_0, 0, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Imm1_321_2__Reg1_3__ShifterImm1_4__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addImm1_95_32Operands, 3, CVT_95_Reg, 4, CVT_95_addShifterImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Imm1_161_2__Reg1_3__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addImm1_95_16Operands, 3, CVT_95_Reg, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_2__Reg1_3__MemNoOffset1_4__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemNoOffsetOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_0__Reg1_1__MemImm8Offset2_2__CondCode2_0 + { CVT_imm_95_0, 0, CVT_95_Reg, 2, CVT_95_addMemImm8OffsetOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__MemNoOffset1_2__Reg1_1__Tie0__Imm1_3__CondCode2_0 + { CVT_95_addMemNoOffsetOperands, 3, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_0__Reg1_1__MemImm12Offset2_2__CondCode2_0 + { CVT_imm_95_0, 0, CVT_95_Reg, 2, CVT_95_addMemImm12OffsetOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__MemNoOffset1_2__Reg1_1__Tie0__AM2OffsetImm2_3__CondCode2_0 + { CVT_95_addMemNoOffsetOperands, 3, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addAM2OffsetImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__MemNoOffset1_2__Reg1_1__Tie0__PostIdxRegShifted2_3__CondCode2_0 + { CVT_95_addMemNoOffsetOperands, 3, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addPostIdxRegShiftedOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_0__Reg1_1__MemRegOffset3_2__CondCode2_0 + { CVT_imm_95_0, 0, CVT_95_Reg, 2, CVT_95_addMemRegOffsetOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__MemImm8Offset2_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addMemImm8OffsetOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_0__Reg1_1__Reg1_2__MemImm8s4Offset2_3__CondCode2_0 + { CVT_imm_95_0, 0, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemImm8s4OffsetOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__MemNoOffset1_3__Reg1_1__Reg1_2__Tie0__Imm1_4__CondCode2_0 + { CVT_95_addMemNoOffsetOperands, 4, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_0__Reg1_1__Reg1_2__AddrMode33_3__CondCode2_0 + { CVT_imm_95_0, 0, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addAddrMode3Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__MemNoOffset1_3__Reg1_1__Reg1_2__Tie0__AM3Offset2_4__CondCode2_0 + { CVT_95_addMemNoOffsetOperands, 4, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addAM3OffsetOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_2__MemImm0_1020s4Offset2_3__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemImm0_95_1020s4OffsetOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_0__Reg1_1__AddrMode33_2__CondCode2_0 + { CVT_imm_95_0, 0, CVT_95_Reg, 2, CVT_95_addAddrMode3Operands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__MemNoOffset1_2__Reg1_1__Tie0__AM3Offset2_3__CondCode2_0 + { CVT_95_addMemNoOffsetOperands, 3, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addAM3OffsetOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__MemNoOffset1_2__Reg1_1__Tie0__PostIdxImm81_3__CondCode2_0 + { CVT_95_addMemNoOffsetOperands, 3, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addPostIdxImm8Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__MemNoOffset1_2__Reg1_1__Tie0__PostIdxReg2_3__CondCode2_0 + { CVT_95_addMemNoOffsetOperands, 3, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addPostIdxRegOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Imm0_2551_3__CondCode2_0 + { CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Imm0_2551_1__CondCode2_0 + { CVT_95_addImmOperands, 2, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Imm24bit1_1__CondCode2_0 + { CVT_95_addImmOperands, 2, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addRotImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_2__imm_95_0__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_0, 0, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__imm_95_0__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_imm_95_0, 0, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_2__RotImm1_3__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addRotImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addRotImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__MemTBB2_1__CondCode2_0 + { CVT_95_addMemTBBOperands, 2, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__MemTBH2_1__CondCode2_0 + { CVT_95_addMemTBHOperands, 2, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Imm0_311_2__Reg1_3__imm_95_0__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_Reg, 4, CVT_imm_95_0, 0, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Imm0_311_2__Reg1_3__ShifterImm1_4__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_Reg, 4, CVT_95_addShifterImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Imm0_151_2__Reg1_3__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_Reg, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__Reg1_2__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_1__Reg1_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__NEONi16splatNot1_3__Tie0__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addNEONi16splatNotOperands, 4, CVT_Tied, 0, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__NEONi32splatNot1_3__Tie0__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addNEONi32splatNotOperands, 4, CVT_Tied, 0, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__NEONi16splat1_3__Tie0__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addNEONi16splatOperands, 4, CVT_Tied, 0, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__NEONi32splat1_3__Tie0__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addNEONi32splatOperands, 4, CVT_Tied, 0, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Tie0__Reg1_2__Reg1_3__CondCode2_0 + { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_2__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_4__CondCode2_0 + { CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_3__Tie0__FBits161_5__CondCode2_0 + { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_addFBits16Operands, 6, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_4__Imm1_5__CondCode2_0 + { CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_3__Tie0__FBits321_5__CondCode2_0 + { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_addFBits32Operands, 6, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done }, + // Convert__Reg1_2__Reg1_3__VectorIndex161_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addVectorIndex16Operands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__VectorIndex321_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addVectorIndex32Operands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__VectorIndex81_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addVectorIndex8Operands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_2__Reg1_3__Imm0_151_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_2__Reg1_3__Imm0_31_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_2__Reg1_3__Imm0_11_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_2__Reg1_3__Imm0_71_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__Reg1_4__Imm0_151_5__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__Reg1_4__Imm0_31_5__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__Reg1_4__Imm0_11_5__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__Reg1_4__Imm0_71_5__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairAllLanes1_2__DupAlignedMemory162_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemory16Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPair1_2__AlignedMemory64or1282_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addAlignedMemory64or128Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addAlignedMemory64or128or256Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListOneDAllLanes1_2__DupAlignedMemory162_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemory16Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListOneD1_2__AlignedMemory642_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addAlignedMemory64Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListOneDHWordIndexed2_2__AlignedMemory162_3__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory16Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListThreeD1_2__AlignedMemory642_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addAlignedMemory64Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairAllLanes1_2__DupAlignedMemory322_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemory32Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListOneDAllLanes1_2__DupAlignedMemory322_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemory32Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListOneDWordIndexed2_2__AlignedMemory322_3__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory32Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemoryNoneOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListOneDAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemoryNoneOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListOneDByteIndexed2_2__AlignedMemoryNone2_3__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemoryNoneOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemory162_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addDupAlignedMemory16Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemory162_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addDupAlignedMemory16Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPair1_2__imm_95_0__AlignedMemory64or1282_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addAlignedMemory64or128Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPair1_2__imm_95_0__AlignedMemory64or1282_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addAlignedMemory64or128Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourD1_2__imm_95_0__AlignedMemory64or128or2562_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addAlignedMemory64or128or256Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourD1_2__imm_95_0__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addAlignedMemory64or128or256Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListOneDAllLanes1_2__imm_95_0__DupAlignedMemory162_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addDupAlignedMemory16Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListOneDAllLanes1_2__imm_95_0__DupAlignedMemory162_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addDupAlignedMemory16Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListOneD1_2__imm_95_0__AlignedMemory642_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addAlignedMemory64Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListOneD1_2__imm_95_0__AlignedMemory642_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addAlignedMemory64Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListOneDHWordIndexed2_2__AlignedMemory162_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory16Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListThreeD1_2__imm_95_0__AlignedMemory642_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addAlignedMemory64Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListThreeD1_2__imm_95_0__AlignedMemory642_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addAlignedMemory64Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemory322_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addDupAlignedMemory32Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemory322_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addDupAlignedMemory32Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListOneDAllLanes1_2__imm_95_0__DupAlignedMemory322_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addDupAlignedMemory32Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListOneDAllLanes1_2__imm_95_0__DupAlignedMemory322_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addDupAlignedMemory32Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListOneDWordIndexed2_2__AlignedMemory322_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory32Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemoryNone2_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addDupAlignedMemoryNoneOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemoryNone2_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addDupAlignedMemoryNoneOperands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListOneDAllLanes1_2__imm_95_0__DupAlignedMemoryNone2_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addDupAlignedMemoryNoneOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListOneDAllLanes1_2__imm_95_0__DupAlignedMemoryNone2_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addDupAlignedMemoryNoneOperands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListOneDByteIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemoryNoneOperands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_3__AlignedMemory2_8__Tie0__Imm1_5__CondCode2_0 + { CVT_95_Reg, 4, CVT_95_addAlignedMemoryOperands, 9, CVT_Tied, 0, CVT_95_addImmOperands, 6, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_3__imm_95_0__AlignedMemory2_8__Imm1_9__Tie0__Imm1_5__CondCode2_0 + { CVT_95_Reg, 4, CVT_imm_95_0, 0, CVT_95_addAlignedMemoryOperands, 9, CVT_95_addImmOperands, 10, CVT_Tied, 0, CVT_95_addImmOperands, 6, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_8__Imm1_9__Tie0__Imm1_5__CondCode2_0 + { CVT_95_Reg, 4, CVT_95_Reg, 9, CVT_95_addImmOperands, 10, CVT_Tied, 0, CVT_95_addImmOperands, 6, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairSpacedAllLanes1_2__DupAlignedMemory322_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemory32Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairSpaced1_2__AlignedMemory64or1282_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addAlignedMemory64or128Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListTwoDHWordIndexed2_2__AlignedMemory322_3__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory32Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListTwoQHWordIndexed2_2__AlignedMemory322_3__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory32Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairAllLanes1_2__DupAlignedMemory642_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemory64Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairSpacedAllLanes1_2__DupAlignedMemory642_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemory64Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListTwoDWordIndexed2_2__AlignedMemory642_3__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory64Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListTwoQWordIndexed2_2__AlignedMemory642_3__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory64Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairSpacedAllLanes1_2__DupAlignedMemory162_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemory16Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListTwoDByteIndexed2_2__AlignedMemory162_3__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory16Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairSpacedAllLanes1_2__imm_95_0__DupAlignedMemory322_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addDupAlignedMemory32Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairSpacedAllLanes1_2__imm_95_0__DupAlignedMemory322_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addDupAlignedMemory32Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairSpaced1_2__imm_95_0__AlignedMemory64or1282_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addAlignedMemory64or128Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairSpaced1_2__imm_95_0__AlignedMemory64or1282_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addAlignedMemory64or128Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListTwoDHWordIndexed2_2__AlignedMemory322_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory32Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListTwoQHWordIndexed2_2__AlignedMemory322_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory32Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemory642_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addDupAlignedMemory64Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemory642_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addDupAlignedMemory64Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairSpacedAllLanes1_2__imm_95_0__DupAlignedMemory642_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addDupAlignedMemory64Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairSpacedAllLanes1_2__imm_95_0__DupAlignedMemory642_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addDupAlignedMemory64Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListTwoDWordIndexed2_2__AlignedMemory642_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory64Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListTwoQWordIndexed2_2__AlignedMemory642_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory64Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairSpacedAllLanes1_2__imm_95_0__DupAlignedMemory162_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addDupAlignedMemory16Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListDPairSpacedAllLanes1_2__imm_95_0__DupAlignedMemory162_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_imm_95_0, 0, CVT_95_addDupAlignedMemory16Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListTwoDByteIndexed2_2__AlignedMemory162_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory16Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListThreeDAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemoryNoneOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListThreeDHWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemoryNoneOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListThreeQAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemoryNoneOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListThreeQ1_2__AlignedMemory642_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addAlignedMemory64Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListThreeQHWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemoryNoneOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListThreeDWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemoryNoneOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListThreeQWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemoryNoneOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListThreeDByteIndexed2_2__AlignedMemoryNone2_3__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemoryNoneOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListThreeDAllLanes1_2__DupAlignedMemoryNone2_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemoryNoneOperands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListThreeD1_2__AlignedMemory642_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addAlignedMemory64Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListThreeDHWordIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemoryNoneOperands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListThreeQAllLanes1_2__DupAlignedMemoryNone2_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemoryNoneOperands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListThreeQ1_2__AlignedMemory642_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addAlignedMemory64Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListThreeQHWordIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemoryNoneOperands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListThreeDWordIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemoryNoneOperands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListThreeQWordIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemoryNoneOperands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListThreeDByteIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemoryNoneOperands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_4__Reg1_5__AlignedMemory2_7__CondCode2_0 + { CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addAlignedMemoryOperands, 8, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_4__Reg1_5__imm_95_0__AlignedMemory2_7__Imm1_8__CondCode2_0 + { CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_imm_95_0, 0, CVT_95_addAlignedMemoryOperands, 8, CVT_95_addImmOperands, 9, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_6__Reg1_9__AlignedMemory2_13__CondCode2_0 + { CVT_95_Reg, 4, CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_95_addAlignedMemoryOperands, 14, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_6__Reg1_9__imm_95_0__DupAlignedMemory642_13__Imm1_14__CondCode2_0 + { CVT_95_Reg, 4, CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_imm_95_0, 0, CVT_95_addDupAlignedMemory64Operands, 14, CVT_95_addImmOperands, 15, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourDAllLanes1_2__DupAlignedMemory642_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemory64Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourDHWordIndexed2_2__AlignedMemory642_3__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory64Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourQAllLanes1_2__DupAlignedMemory642_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemory64Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourQ1_2__AlignedMemory64or128or2562_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addAlignedMemory64or128or256Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourQHWordIndexed2_2__AlignedMemory642_3__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory64Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourDAllLanes1_2__DupAlignedMemory64or1282_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemory64or128Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourDWordIndexed2_2__AlignedMemory64or1282_3__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory64or128Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourQAllLanes1_2__DupAlignedMemory64or1282_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemory64or128Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourQWordIndexed2_2__AlignedMemory64or1282_3__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory64or128Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourDAllLanes1_2__DupAlignedMemory322_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemory32Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourDByteIndexed2_2__AlignedMemory322_3__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory32Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourQAllLanes1_2__DupAlignedMemory322_3__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemory32Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourDAllLanes1_2__DupAlignedMemory642_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemory64Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addAlignedMemory64or128or256Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourDHWordIndexed2_2__AlignedMemory642_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory64Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourQAllLanes1_2__DupAlignedMemory642_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemory64Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourQ1_2__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addAlignedMemory64or128or256Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourQHWordIndexed2_2__AlignedMemory642_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory64Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourDAllLanes1_2__DupAlignedMemory64or1282_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemory64or128Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourDWordIndexed2_2__AlignedMemory64or1282_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory64or128Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourQAllLanes1_2__DupAlignedMemory64or1282_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemory64or128Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourQWordIndexed2_2__AlignedMemory64or1282_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory64or128Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourDAllLanes1_2__DupAlignedMemory322_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemory32Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourDByteIndexed2_2__AlignedMemory322_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListIndexedOperands, 3, CVT_95_addAlignedMemory32Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__VecListFourQAllLanes1_2__DupAlignedMemory322_3__Reg1_4__CondCode2_0 + { CVT_95_addVecListOperands, 3, CVT_95_addDupAlignedMemory32Operands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_4__Reg1_5__Reg1_6__AlignedMemory2_8__CondCode2_0 + { CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addAlignedMemoryOperands, 9, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_4__Reg1_5__Reg1_6__imm_95_0__AlignedMemory2_8__Imm1_9__CondCode2_0 + { CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_imm_95_0, 0, CVT_95_addAlignedMemoryOperands, 9, CVT_95_addImmOperands, 10, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_6__Reg1_9__Reg1_12__AlignedMemory2_16__CondCode2_0 + { CVT_95_Reg, 4, CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_95_Reg, 13, CVT_95_addAlignedMemoryOperands, 17, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_3__Reg1_6__Reg1_9__Reg1_12__imm_95_0__AlignedMemory2_16__Imm1_17__CondCode2_0 + { CVT_95_Reg, 4, CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_95_Reg, 13, CVT_imm_95_0, 0, CVT_95_addAlignedMemoryOperands, 17, CVT_95_addImmOperands, 18, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Tie0__CondCode2_0__SPRRegList1_3 + { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addCondCodeOperands, 1, CVT_95_addSPRRegListOperands, 4, CVT_Done }, + // Convert__Reg1_1__CondCode2_0__SPRRegList1_2 + { CVT_95_Reg, 2, CVT_95_addCondCodeOperands, 1, CVT_95_addSPRRegListOperands, 3, CVT_Done }, + // Convert__Reg1_1__AddrMode52_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_addAddrMode5Operands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__AddrMode5FP162_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addAddrMode5FP16Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__AddrMode52_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addAddrMode5Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_2__Reg1_3 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done }, + // Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0 + { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addVectorIndex32Operands, 6, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0 + { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addVectorIndex16Operands, 6, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_2__Reg1_2__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__FPImm1_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addFPImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__NEONi32vmov1_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addNEONi32vmovOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__NEONi16splat1_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addNEONi16splatOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__NEONi16vmovByteReplicate1_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addNEONvmovByteReplicateOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__NEONi32vmovByteReplicate1_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addNEONvmovByteReplicateOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__NEONi32vmovNeg1_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addNEONi32vmovNegOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__NEONi64splat1_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addNEONi64splatOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__NEONi8splat1_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addNEONi8splatOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__Reg1_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Tie0__Reg1_4__VectorIndex161_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addVectorIndex16Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Tie0__Reg1_4__VectorIndex321_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addVectorIndex32Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Tie0__Reg1_4__VectorIndex81_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addVectorIndex8Operands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_2__Reg1_3__VectorIndex321_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addVectorIndex32Operands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_2__Reg1_3__VectorIndex161_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addVectorIndex16Operands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addVectorIndex32Operands, 6, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addVectorIndex16Operands, 6, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__NEONi16invByteReplicate1_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addNEONinvByteReplicateOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__NEONi32invByteReplicate1_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addNEONinvByteReplicateOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Tie0__Reg1_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__regSP__Tie0__CondCode2_0__DPRRegList1_1 + { CVT_regSP, 0, CVT_Tied, 0, CVT_95_addCondCodeOperands, 1, CVT_95_addDPRRegListOperands, 2, CVT_Done }, + // Convert__regSP__Tie0__CondCode2_0__SPRRegList1_1 + { CVT_regSP, 0, CVT_Tied, 0, CVT_95_addCondCodeOperands, 1, CVT_95_addSPRRegListOperands, 2, CVT_Done }, + // Convert__regSP__Tie0__CondCode2_0__DPRRegList1_2 + { CVT_regSP, 0, CVT_Tied, 0, CVT_95_addCondCodeOperands, 1, CVT_95_addDPRRegListOperands, 3, CVT_Done }, + // Convert__regSP__Tie0__CondCode2_0__SPRRegList1_2 + { CVT_regSP, 0, CVT_Tied, 0, CVT_95_addCondCodeOperands, 1, CVT_95_addSPRRegListOperands, 3, CVT_Done }, + // Convert__Reg1_2__Reg1_3__ShrImm81_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__ShrImm161_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__ShrImm321_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_2__ShrImm161_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_2__ShrImm321_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_2__ShrImm641_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_2__ShrImm81_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__ShrImm641_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Tie0__Reg1_2__ShrImm161_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Tie0__Reg1_2__ShrImm321_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Tie0__Reg1_2__ShrImm641_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Tie0__Reg1_2__ShrImm81_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Tie0__Reg1_3__ShrImm161_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Tie0__Reg1_3__ShrImm321_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Tie0__Reg1_3__ShrImm641_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Tie0__Reg1_3__ShrImm81_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__Imm1_151_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__Imm1_311_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__Imm1_71_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__Imm161_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__Imm321_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__Imm81_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Tie0__Reg1_2__Imm1_3__CondCode2_0 + { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Tie0__Reg1_3__Imm1_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__AlignedMemory64or1282_3__VecListDPair1_2__CondCode2_0 + { CVT_95_addAlignedMemory64or128Operands, 4, CVT_95_addVecListOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__AlignedMemory64or128or2562_3__VecListFourD1_2__CondCode2_0 + { CVT_95_addAlignedMemory64or128or256Operands, 4, CVT_95_addVecListOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__AlignedMemory642_3__VecListOneD1_2__CondCode2_0 + { CVT_95_addAlignedMemory64Operands, 4, CVT_95_addVecListOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__AlignedMemory642_3__VecListThreeD1_2__CondCode2_0 + { CVT_95_addAlignedMemory64Operands, 4, CVT_95_addVecListOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_0__AlignedMemory64or1282_3__VecListDPair1_2__CondCode2_0 + { CVT_imm_95_0, 0, CVT_95_addAlignedMemory64or128Operands, 4, CVT_95_addVecListOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_0__AlignedMemory64or1282_3__Reg1_4__VecListDPair1_2__CondCode2_0 + { CVT_imm_95_0, 0, CVT_95_addAlignedMemory64or128Operands, 4, CVT_95_Reg, 5, CVT_95_addVecListOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_0__AlignedMemory64or128or2562_3__VecListFourD1_2__CondCode2_0 + { CVT_imm_95_0, 0, CVT_95_addAlignedMemory64or128or256Operands, 4, CVT_95_addVecListOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_0__AlignedMemory64or128or2562_3__Reg1_4__VecListFourD1_2__CondCode2_0 + { CVT_imm_95_0, 0, CVT_95_addAlignedMemory64or128or256Operands, 4, CVT_95_Reg, 5, CVT_95_addVecListOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_0__AlignedMemory642_3__VecListOneD1_2__CondCode2_0 + { CVT_imm_95_0, 0, CVT_95_addAlignedMemory64Operands, 4, CVT_95_addVecListOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_0__AlignedMemory642_3__Reg1_4__VecListOneD1_2__CondCode2_0 + { CVT_imm_95_0, 0, CVT_95_addAlignedMemory64Operands, 4, CVT_95_Reg, 5, CVT_95_addVecListOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_0__AlignedMemory642_3__VecListThreeD1_2__CondCode2_0 + { CVT_imm_95_0, 0, CVT_95_addAlignedMemory64Operands, 4, CVT_95_addVecListOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_0__AlignedMemory642_3__Reg1_4__VecListThreeD1_2__CondCode2_0 + { CVT_imm_95_0, 0, CVT_95_addAlignedMemory64Operands, 4, CVT_95_Reg, 5, CVT_95_addVecListOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__AlignedMemory2_8__Reg1_3__Imm1_5__CondCode2_0 + { CVT_95_addAlignedMemoryOperands, 9, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_0__AlignedMemory2_8__Imm1_9__Reg1_3__Imm1_5__CondCode2_0 + { CVT_imm_95_0, 0, CVT_95_addAlignedMemoryOperands, 9, CVT_95_addImmOperands, 10, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_8__Imm1_9__Reg1_3__Imm1_5__CondCode2_0 + { CVT_95_Reg, 9, CVT_95_addImmOperands, 10, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_0__Reg1_8__Imm1_9__Imm1_10__Reg1_3__Imm1_5__CondCode2_0 + { CVT_imm_95_0, 0, CVT_95_Reg, 9, CVT_95_addImmOperands, 10, CVT_95_addImmOperands, 11, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__AlignedMemory64or1282_3__VecListDPairSpaced1_2__CondCode2_0 + { CVT_95_addAlignedMemory64or128Operands, 4, CVT_95_addVecListOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_0__AlignedMemory64or1282_3__VecListDPairSpaced1_2__CondCode2_0 + { CVT_imm_95_0, 0, CVT_95_addAlignedMemory64or128Operands, 4, CVT_95_addVecListOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_0__AlignedMemory64or1282_3__Reg1_4__VecListDPairSpaced1_2__CondCode2_0 + { CVT_imm_95_0, 0, CVT_95_addAlignedMemory64or128Operands, 4, CVT_95_Reg, 5, CVT_95_addVecListOperands, 3, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__AlignedMemory2_7__Reg1_3__Reg1_4__Reg1_5__CondCode2_0 + { CVT_95_addAlignedMemoryOperands, 8, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_0__AlignedMemory2_7__Imm1_8__Reg1_3__Reg1_4__Reg1_5__CondCode2_0 + { CVT_imm_95_0, 0, CVT_95_addAlignedMemoryOperands, 8, CVT_95_addImmOperands, 9, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__AlignedMemory2_8__Reg1_3__Reg1_4__Reg1_5__Reg1_6__CondCode2_0 + { CVT_95_addAlignedMemoryOperands, 9, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_0__AlignedMemory2_8__Imm1_9__Reg1_3__Reg1_4__Reg1_5__Reg1_6__CondCode2_0 + { CVT_imm_95_0, 0, CVT_95_addAlignedMemoryOperands, 9, CVT_95_addImmOperands, 10, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_1__Reg1_2__Tie0__Tie1__CondCode2_0 + { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__VecListDPair1_3__Reg1_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addVecListOperands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__VecListFourD1_3__Reg1_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addVecListOperands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__VecListOneD1_3__Reg1_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addVecListOperands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__VecListThreeD1_3__Reg1_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_95_addVecListOperands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Tie0__VecListDPair1_3__Reg1_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addVecListOperands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Tie0__VecListFourD1_3__Reg1_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addVecListOperands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Tie0__VecListOneD1_3__Reg1_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addVecListOperands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__Reg1_2__Tie0__VecListThreeD1_3__Reg1_4__CondCode2_0 + { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addVecListOperands, 4, CVT_95_Reg, 5, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_2__CondCode2_0 + { CVT_imm_95_2, 0, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_3__CondCode2_0 + { CVT_imm_95_3, 0, CVT_95_addCondCodeOperands, 1, CVT_Done }, + // Convert__imm_95_1__CondCode2_0 + { CVT_imm_95_1, 0, CVT_95_addCondCodeOperands, 1, CVT_Done }, +}; + +void ARMAsmParser:: +convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, + const OperandVector &Operands) { + assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); + const uint8_t *Converter = ConversionTable[Kind]; + Inst.setOpcode(Opcode); + for (const uint8_t *p = Converter; *p; p+= 2) { + switch (*p) { + default: llvm_unreachable("invalid conversion entry!"); + case CVT_Reg: + static_cast(*Operands[*(p + 1)]).addRegOperands(Inst, 1); + break; + case CVT_Tied: + Inst.addOperand(Inst.getOperand(*(p + 1))); + break; + case CVT_95_Reg: + static_cast(*Operands[*(p + 1)]).addRegOperands(Inst, 1); + break; + case CVT_95_addCCOutOperands: + static_cast(*Operands[*(p + 1)]).addCCOutOperands(Inst, 1); + break; + case CVT_95_addCondCodeOperands: + static_cast(*Operands[*(p + 1)]).addCondCodeOperands(Inst, 2); + break; + case CVT_95_addRegShiftedRegOperands: + static_cast(*Operands[*(p + 1)]).addRegShiftedRegOperands(Inst, 3); + break; + case CVT_95_addModImmOperands: + static_cast(*Operands[*(p + 1)]).addModImmOperands(Inst, 1); + break; + case CVT_95_addRegShiftedImmOperands: + static_cast(*Operands[*(p + 1)]).addRegShiftedImmOperands(Inst, 2); + break; + case CVT_95_addImmOperands: + static_cast(*Operands[*(p + 1)]).addImmOperands(Inst, 1); + break; + case CVT_95_addImm0_95_508s4Operands: + static_cast(*Operands[*(p + 1)]).addImm0_508s4Operands(Inst, 1); + break; + case CVT_regSP: + Inst.addOperand(MCOperand::createReg(ARM::SP)); + break; + case CVT_95_addImm0_95_508s4NegOperands: + static_cast(*Operands[*(p + 1)]).addImm0_508s4NegOperands(Inst, 1); + break; + case CVT_95_addImm0_95_4095NegOperands: + static_cast(*Operands[*(p + 1)]).addImm0_4095NegOperands(Inst, 1); + break; + case CVT_95_addT2SOImmNegOperands: + static_cast(*Operands[*(p + 1)]).addT2SOImmNegOperands(Inst, 1); + break; + case CVT_95_addModImmNegOperands: + static_cast(*Operands[*(p + 1)]).addModImmNegOperands(Inst, 1); + break; + case CVT_95_addImm0_95_1020s4Operands: + static_cast(*Operands[*(p + 1)]).addImm0_1020s4Operands(Inst, 1); + break; + case CVT_95_addUnsignedOffset_95_b8s2Operands: + static_cast(*Operands[*(p + 1)]).addUnsignedOffset_b8s2Operands(Inst, 1); + break; + case CVT_95_addAdrLabelOperands: + static_cast(*Operands[*(p + 1)]).addAdrLabelOperands(Inst, 1); + break; + case CVT_95_addT2SOImmNotOperands: + static_cast(*Operands[*(p + 1)]).addT2SOImmNotOperands(Inst, 1); + break; + case CVT_95_addModImmNotOperands: + static_cast(*Operands[*(p + 1)]).addModImmNotOperands(Inst, 1); + break; + case CVT_95_addImmThumbSROperands: + static_cast(*Operands[*(p + 1)]).addImmThumbSROperands(Inst, 1); + break; + case CVT_cvtThumbBranches: + cvtThumbBranches(Inst, Operands); + break; + case CVT_95_addBitfieldOperands: + static_cast(*Operands[*(p + 1)]).addBitfieldOperands(Inst, 1); + break; + case CVT_imm_95_0: + Inst.addOperand(MCOperand::createImm(0)); + break; + case CVT_95_addCoprocNumOperands: + static_cast(*Operands[*(p + 1)]).addCoprocNumOperands(Inst, 1); + break; + case CVT_95_addCoprocRegOperands: + static_cast(*Operands[*(p + 1)]).addCoprocRegOperands(Inst, 1); + break; + case CVT_95_addProcIFlagsOperands: + static_cast(*Operands[*(p + 1)]).addProcIFlagsOperands(Inst, 1); + break; + case CVT_imm_95_15: + Inst.addOperand(MCOperand::createImm(15)); + break; + case CVT_95_addMemBarrierOptOperands: + static_cast(*Operands[*(p + 1)]).addMemBarrierOptOperands(Inst, 1); + break; + case CVT_95_addFPImmOperands: + static_cast(*Operands[*(p + 1)]).addFPImmOperands(Inst, 1); + break; + case CVT_95_addDPRRegListOperands: + static_cast(*Operands[*(p + 1)]).addDPRRegListOperands(Inst, 1); + break; + case CVT_imm_95_1: + Inst.addOperand(MCOperand::createImm(1)); + break; + case CVT_95_addInstSyncBarrierOptOperands: + static_cast(*Operands[*(p + 1)]).addInstSyncBarrierOptOperands(Inst, 1); + break; + case CVT_95_addITCondCodeOperands: + static_cast(*Operands[*(p + 1)]).addITCondCodeOperands(Inst, 1); + break; + case CVT_95_addITMaskOperands: + static_cast(*Operands[*(p + 1)]).addITMaskOperands(Inst, 1); + break; + case CVT_95_addMemNoOffsetOperands: + static_cast(*Operands[*(p + 1)]).addMemNoOffsetOperands(Inst, 1); + break; + case CVT_95_addAddrMode5Operands: + static_cast(*Operands[*(p + 1)]).addAddrMode5Operands(Inst, 2); + break; + case CVT_95_addCoprocOptionOperands: + static_cast(*Operands[*(p + 1)]).addCoprocOptionOperands(Inst, 1); + break; + case CVT_95_addPostIdxImm8s4Operands: + static_cast(*Operands[*(p + 1)]).addPostIdxImm8s4Operands(Inst, 1); + break; + case CVT_95_addRegListOperands: + static_cast(*Operands[*(p + 1)]).addRegListOperands(Inst, 1); + break; + case CVT_95_addThumbMemPCOperands: + static_cast(*Operands[*(p + 1)]).addThumbMemPCOperands(Inst, 1); + break; + case CVT_95_addMemThumbRIs4Operands: + static_cast(*Operands[*(p + 1)]).addMemThumbRIs4Operands(Inst, 2); + break; + case CVT_95_addMemThumbRROperands: + static_cast(*Operands[*(p + 1)]).addMemThumbRROperands(Inst, 2); + break; + case CVT_95_addMemThumbSPIOperands: + static_cast(*Operands[*(p + 1)]).addMemThumbSPIOperands(Inst, 2); + break; + case CVT_95_addMemImm12OffsetOperands: + static_cast(*Operands[*(p + 1)]).addMemImm12OffsetOperands(Inst, 2); + break; + case CVT_95_addMemNegImm8OffsetOperands: + static_cast(*Operands[*(p + 1)]).addMemNegImm8OffsetOperands(Inst, 2); + break; + case CVT_95_addMemRegOffsetOperands: + static_cast(*Operands[*(p + 1)]).addMemRegOffsetOperands(Inst, 3); + break; + case CVT_95_addMemUImm12OffsetOperands: + static_cast(*Operands[*(p + 1)]).addMemUImm12OffsetOperands(Inst, 2); + break; + case CVT_95_addT2MemRegOffsetOperands: + static_cast(*Operands[*(p + 1)]).addT2MemRegOffsetOperands(Inst, 3); + break; + case CVT_95_addMemPCRelImm12Operands: + static_cast(*Operands[*(p + 1)]).addMemPCRelImm12Operands(Inst, 1); + break; + case CVT_95_addMemImm8OffsetOperands: + static_cast(*Operands[*(p + 1)]).addMemImm8OffsetOperands(Inst, 2); + break; + case CVT_95_addAM2OffsetImmOperands: + static_cast(*Operands[*(p + 1)]).addAM2OffsetImmOperands(Inst, 2); + break; + case CVT_95_addPostIdxRegShiftedOperands: + static_cast(*Operands[*(p + 1)]).addPostIdxRegShiftedOperands(Inst, 2); + break; + case CVT_95_addMemThumbRIs1Operands: + static_cast(*Operands[*(p + 1)]).addMemThumbRIs1Operands(Inst, 2); + break; + case CVT_95_addMemPosImm8OffsetOperands: + static_cast(*Operands[*(p + 1)]).addMemPosImm8OffsetOperands(Inst, 2); + break; + case CVT_95_addMemImm8s4OffsetOperands: + static_cast(*Operands[*(p + 1)]).addMemImm8s4OffsetOperands(Inst, 2); + break; + case CVT_95_addAddrMode3Operands: + static_cast(*Operands[*(p + 1)]).addAddrMode3Operands(Inst, 3); + break; + case CVT_95_addAM3OffsetOperands: + static_cast(*Operands[*(p + 1)]).addAM3OffsetOperands(Inst, 2); + break; + case CVT_95_addMemImm0_95_1020s4OffsetOperands: + static_cast(*Operands[*(p + 1)]).addMemImm0_1020s4OffsetOperands(Inst, 2); + break; + case CVT_95_addMemThumbRIs2Operands: + static_cast(*Operands[*(p + 1)]).addMemThumbRIs2Operands(Inst, 2); + break; + case CVT_95_addPostIdxRegOperands: + static_cast(*Operands[*(p + 1)]).addPostIdxRegOperands(Inst, 2); + break; + case CVT_95_addPostIdxImm8Operands: + static_cast(*Operands[*(p + 1)]).addPostIdxImm8Operands(Inst, 1); + break; + case CVT_reg0: + Inst.addOperand(MCOperand::createReg(0)); + break; + case CVT_regCPSR: + Inst.addOperand(MCOperand::createReg(ARM::CPSR)); + break; + case CVT_imm_95_14: + Inst.addOperand(MCOperand::createImm(14)); + break; + case CVT_95_addBankedRegOperands: + static_cast(*Operands[*(p + 1)]).addBankedRegOperands(Inst, 1); + break; + case CVT_95_addMSRMaskOperands: + static_cast(*Operands[*(p + 1)]).addMSRMaskOperands(Inst, 1); + break; + case CVT_cvtThumbMultiply: + cvtThumbMultiply(Inst, Operands); + break; + case CVT_regR8: + Inst.addOperand(MCOperand::createReg(ARM::R8)); + break; + case CVT_regR0: + Inst.addOperand(MCOperand::createReg(ARM::R0)); + break; + case CVT_95_addPKHASRImmOperands: + static_cast(*Operands[*(p + 1)]).addPKHASRImmOperands(Inst, 1); + break; + case CVT_95_addImm1_95_32Operands: + static_cast(*Operands[*(p + 1)]).addImm1_32Operands(Inst, 1); + break; + case CVT_imm_95_4: + Inst.addOperand(MCOperand::createImm(4)); + break; + case CVT_imm_95_5: + Inst.addOperand(MCOperand::createImm(5)); + break; + case CVT_95_addShifterImmOperands: + static_cast(*Operands[*(p + 1)]).addShifterImmOperands(Inst, 1); + break; + case CVT_95_addImm1_95_16Operands: + static_cast(*Operands[*(p + 1)]).addImm1_16Operands(Inst, 1); + break; + case CVT_95_addRotImmOperands: + static_cast(*Operands[*(p + 1)]).addRotImmOperands(Inst, 1); + break; + case CVT_95_addMemTBBOperands: + static_cast(*Operands[*(p + 1)]).addMemTBBOperands(Inst, 2); + break; + case CVT_95_addMemTBHOperands: + static_cast(*Operands[*(p + 1)]).addMemTBHOperands(Inst, 2); + break; + case CVT_95_addNEONi16splatNotOperands: + static_cast(*Operands[*(p + 1)]).addNEONi16splatNotOperands(Inst, 1); + break; + case CVT_95_addNEONi32splatNotOperands: + static_cast(*Operands[*(p + 1)]).addNEONi32splatNotOperands(Inst, 1); + break; + case CVT_95_addNEONi16splatOperands: + static_cast(*Operands[*(p + 1)]).addNEONi16splatOperands(Inst, 1); + break; + case CVT_95_addNEONi32splatOperands: + static_cast(*Operands[*(p + 1)]).addNEONi32splatOperands(Inst, 1); + break; + case CVT_95_addFBits16Operands: + static_cast(*Operands[*(p + 1)]).addFBits16Operands(Inst, 1); + break; + case CVT_95_addFBits32Operands: + static_cast(*Operands[*(p + 1)]).addFBits32Operands(Inst, 1); + break; + case CVT_95_addVectorIndex16Operands: + static_cast(*Operands[*(p + 1)]).addVectorIndex16Operands(Inst, 1); + break; + case CVT_95_addVectorIndex32Operands: + static_cast(*Operands[*(p + 1)]).addVectorIndex32Operands(Inst, 1); + break; + case CVT_95_addVectorIndex8Operands: + static_cast(*Operands[*(p + 1)]).addVectorIndex8Operands(Inst, 1); + break; + case CVT_95_addVecListOperands: + static_cast(*Operands[*(p + 1)]).addVecListOperands(Inst, 1); + break; + case CVT_95_addDupAlignedMemory16Operands: + static_cast(*Operands[*(p + 1)]).addDupAlignedMemory16Operands(Inst, 2); + break; + case CVT_95_addAlignedMemory64or128Operands: + static_cast(*Operands[*(p + 1)]).addAlignedMemory64or128Operands(Inst, 2); + break; + case CVT_95_addAlignedMemory64or128or256Operands: + static_cast(*Operands[*(p + 1)]).addAlignedMemory64or128or256Operands(Inst, 2); + break; + case CVT_95_addAlignedMemory64Operands: + static_cast(*Operands[*(p + 1)]).addAlignedMemory64Operands(Inst, 2); + break; + case CVT_95_addVecListIndexedOperands: + static_cast(*Operands[*(p + 1)]).addVecListIndexedOperands(Inst, 2); + break; + case CVT_95_addAlignedMemory16Operands: + static_cast(*Operands[*(p + 1)]).addAlignedMemory16Operands(Inst, 2); + break; + case CVT_95_addDupAlignedMemory32Operands: + static_cast(*Operands[*(p + 1)]).addDupAlignedMemory32Operands(Inst, 2); + break; + case CVT_95_addAlignedMemory32Operands: + static_cast(*Operands[*(p + 1)]).addAlignedMemory32Operands(Inst, 2); + break; + case CVT_95_addDupAlignedMemoryNoneOperands: + static_cast(*Operands[*(p + 1)]).addDupAlignedMemoryNoneOperands(Inst, 2); + break; + case CVT_95_addAlignedMemoryNoneOperands: + static_cast(*Operands[*(p + 1)]).addAlignedMemoryNoneOperands(Inst, 2); + break; + case CVT_95_addAlignedMemoryOperands: + static_cast(*Operands[*(p + 1)]).addAlignedMemoryOperands(Inst, 2); + break; + case CVT_95_addDupAlignedMemory64Operands: + static_cast(*Operands[*(p + 1)]).addDupAlignedMemory64Operands(Inst, 2); + break; + case CVT_95_addDupAlignedMemory64or128Operands: + static_cast(*Operands[*(p + 1)]).addDupAlignedMemory64or128Operands(Inst, 2); + break; + case CVT_95_addSPRRegListOperands: + static_cast(*Operands[*(p + 1)]).addSPRRegListOperands(Inst, 1); + break; + case CVT_95_addAddrMode5FP16Operands: + static_cast(*Operands[*(p + 1)]).addAddrMode5FP16Operands(Inst, 2); + break; + case CVT_95_addNEONi32vmovOperands: + static_cast(*Operands[*(p + 1)]).addNEONi32vmovOperands(Inst, 1); + break; + case CVT_95_addNEONvmovByteReplicateOperands: + static_cast(*Operands[*(p + 1)]).addNEONvmovByteReplicateOperands(Inst, 1); + break; + case CVT_95_addNEONi32vmovNegOperands: + static_cast(*Operands[*(p + 1)]).addNEONi32vmovNegOperands(Inst, 1); + break; + case CVT_95_addNEONi64splatOperands: + static_cast(*Operands[*(p + 1)]).addNEONi64splatOperands(Inst, 1); + break; + case CVT_95_addNEONi8splatOperands: + static_cast(*Operands[*(p + 1)]).addNEONi8splatOperands(Inst, 1); + break; + case CVT_95_addNEONinvByteReplicateOperands: + static_cast(*Operands[*(p + 1)]).addNEONinvByteReplicateOperands(Inst, 1); + break; + case CVT_imm_95_2: + Inst.addOperand(MCOperand::createImm(2)); + break; + case CVT_imm_95_3: + Inst.addOperand(MCOperand::createImm(3)); + break; + } + } +} + +void ARMAsmParser:: +convertToMapAndConstraints(unsigned Kind, + const OperandVector &Operands) { + assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); + unsigned NumMCOperands = 0; + const uint8_t *Converter = ConversionTable[Kind]; + for (const uint8_t *p = Converter; *p; p+= 2) { + switch (*p) { + default: llvm_unreachable("invalid conversion entry!"); + case CVT_Reg: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("r"); + ++NumMCOperands; + break; + case CVT_Tied: + ++NumMCOperands; + break; + case CVT_95_Reg: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("r"); + NumMCOperands += 1; + break; + case CVT_95_addCCOutOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addCondCodeOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addRegShiftedRegOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 3; + break; + case CVT_95_addModImmOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addRegShiftedImmOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addImmOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addImm0_95_508s4Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_regSP: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + ++NumMCOperands; + break; + case CVT_95_addImm0_95_508s4NegOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addImm0_95_4095NegOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addT2SOImmNegOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addModImmNegOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addImm0_95_1020s4Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addUnsignedOffset_95_b8s2Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addAdrLabelOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addT2SOImmNotOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addModImmNotOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addImmThumbSROperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addBitfieldOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_imm_95_0: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint(""); + ++NumMCOperands; + break; + case CVT_95_addCoprocNumOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addCoprocRegOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addProcIFlagsOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_imm_95_15: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint(""); + ++NumMCOperands; + break; + case CVT_95_addMemBarrierOptOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addFPImmOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addDPRRegListOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_imm_95_1: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint(""); + ++NumMCOperands; + break; + case CVT_95_addInstSyncBarrierOptOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addITCondCodeOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addITMaskOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addMemNoOffsetOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addAddrMode5Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addCoprocOptionOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addPostIdxImm8s4Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addRegListOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addThumbMemPCOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addMemThumbRIs4Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addMemThumbRROperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addMemThumbSPIOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addMemImm12OffsetOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addMemNegImm8OffsetOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addMemRegOffsetOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 3; + break; + case CVT_95_addMemUImm12OffsetOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addT2MemRegOffsetOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 3; + break; + case CVT_95_addMemPCRelImm12Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addMemImm8OffsetOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addAM2OffsetImmOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addPostIdxRegShiftedOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addMemThumbRIs1Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addMemPosImm8OffsetOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addMemImm8s4OffsetOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addAddrMode3Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 3; + break; + case CVT_95_addAM3OffsetOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addMemImm0_95_1020s4OffsetOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addMemThumbRIs2Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addPostIdxRegOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addPostIdxImm8Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_reg0: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + ++NumMCOperands; + break; + case CVT_regCPSR: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + ++NumMCOperands; + break; + case CVT_imm_95_14: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint(""); + ++NumMCOperands; + break; + case CVT_95_addBankedRegOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addMSRMaskOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_regR8: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + ++NumMCOperands; + break; + case CVT_regR0: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + ++NumMCOperands; + break; + case CVT_95_addPKHASRImmOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addImm1_95_32Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_imm_95_4: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint(""); + ++NumMCOperands; + break; + case CVT_imm_95_5: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint(""); + ++NumMCOperands; + break; + case CVT_95_addShifterImmOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addImm1_95_16Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addRotImmOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addMemTBBOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addMemTBHOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addNEONi16splatNotOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addNEONi32splatNotOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addNEONi16splatOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addNEONi32splatOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addFBits16Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addFBits32Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addVectorIndex16Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addVectorIndex32Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addVectorIndex8Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addVecListOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addDupAlignedMemory16Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addAlignedMemory64or128Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addAlignedMemory64or128or256Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addAlignedMemory64Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addVecListIndexedOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addAlignedMemory16Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addDupAlignedMemory32Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addAlignedMemory32Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addDupAlignedMemoryNoneOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addAlignedMemoryNoneOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addAlignedMemoryOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addDupAlignedMemory64Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addDupAlignedMemory64or128Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addSPRRegListOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addAddrMode5FP16Operands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 2; + break; + case CVT_95_addNEONi32vmovOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addNEONvmovByteReplicateOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addNEONi32vmovNegOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addNEONi64splatOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addNEONi8splatOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_95_addNEONinvByteReplicateOperands: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint("m"); + NumMCOperands += 1; + break; + case CVT_imm_95_2: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint(""); + ++NumMCOperands; + break; + case CVT_imm_95_3: + Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); + Operands[*(p + 1)]->setConstraint(""); + ++NumMCOperands; + break; + } + } +} + +namespace { + +/// MatchClassKind - The kinds of classes which participate in +/// instruction matching. +enum MatchClassKind { + InvalidMatchClass = 0, + MCK__DOT_d, // '.d' + MCK__DOT_f, // '.f' + MCK__DOT_s16, // '.s16' + MCK__DOT_s32, // '.s32' + MCK__DOT_s64, // '.s64' + MCK__DOT_s8, // '.s8' + MCK__DOT_u16, // '.u16' + MCK__DOT_u32, // '.u32' + MCK__DOT_u64, // '.u64' + MCK__DOT_u8, // '.u8' + MCK__DOT_f32, // '.f32' + MCK__DOT_f64, // '.f64' + MCK__DOT_i16, // '.i16' + MCK__DOT_i32, // '.i32' + MCK__DOT_i64, // '.i64' + MCK__DOT_i8, // '.i8' + MCK__DOT_p16, // '.p16' + MCK__DOT_p8, // '.p8' + MCK__EXCLAIM_, // '!' + MCK__35_0, // '#0' + MCK__DOT_16, // '.16' + MCK__DOT_32, // '.32' + MCK__DOT_64, // '.64' + MCK__DOT_8, // '.8' + MCK__DOT_f16, // '.f16' + MCK__DOT_p64, // '.p64' + MCK__DOT_w, // '.w' + MCK__91_, // '[' + MCK__93_, // ']' + MCK__94_, // '^' + MCK__123_, // '{' + MCK__125_, // '}' + MCK_Reg74, // derived register class + MCK_Reg58, // derived register class + MCK_Reg10, // derived register class + MCK_APSR, // register class 'APSR' + MCK_APSR_NZCV, // register class 'APSR_NZCV' + MCK_CCR, // register class 'CCR,CPSR' + MCK_FPEXC, // register class 'FPEXC' + MCK_FPINST, // register class 'FPINST' + MCK_FPINST2, // register class 'FPINST2' + MCK_FPSCR, // register class 'FPSCR' + MCK_FPSID, // register class 'FPSID' + MCK_GPRsp, // register class 'GPRsp,SP' + MCK_LR, // register class 'LR' + MCK_MVFR0, // register class 'MVFR0' + MCK_MVFR1, // register class 'MVFR1' + MCK_MVFR2, // register class 'MVFR2' + MCK_PC, // register class 'PC' + MCK_SPSR, // register class 'SPSR' + MCK_Reg99, // derived register class + MCK_Reg72, // derived register class + MCK_Reg67, // derived register class + MCK_Reg59, // derived register class + MCK_Reg100, // derived register class + MCK_Reg87, // derived register class + MCK_Reg82, // derived register class + MCK_Reg73, // derived register class + MCK_Reg71, // derived register class + MCK_Reg60, // derived register class + MCK_Reg44, // derived register class + MCK_Reg101, // derived register class + MCK_Reg92, // derived register class + MCK_Reg88, // derived register class + MCK_Reg83, // derived register class + MCK_Reg68, // derived register class + MCK_Reg61, // derived register class + MCK_Reg45, // derived register class + MCK_Reg0, // derived register class + MCK_QPR_8, // register class 'QPR_8' + MCK_Reg62, // derived register class + MCK_Reg56, // derived register class + MCK_tcGPR, // register class 'tcGPR' + MCK_Reg102, // derived register class + MCK_Reg93, // derived register class + MCK_Reg75, // derived register class + MCK_Reg69, // derived register class + MCK_Reg63, // derived register class + MCK_Reg57, // derived register class + MCK_Reg39, // derived register class + MCK_Reg9, // derived register class + MCK_Reg103, // derived register class + MCK_Reg89, // derived register class + MCK_Reg84, // derived register class + MCK_Reg76, // derived register class + MCK_Reg64, // derived register class + MCK_Reg54, // derived register class + MCK_Reg46, // derived register class + MCK_Reg25, // derived register class + MCK_Reg7, // derived register class + MCK_GPRPair, // register class 'GPRPair' + MCK_Reg104, // derived register class + MCK_Reg94, // derived register class + MCK_Reg90, // derived register class + MCK_Reg85, // derived register class + MCK_Reg77, // derived register class + MCK_Reg65, // derived register class + MCK_Reg55, // derived register class + MCK_Reg47, // derived register class + MCK_Reg40, // derived register class + MCK_Reg26, // derived register class + MCK_DPR_8, // register class 'DPR_8' + MCK_QPR_VFP2, // register class 'QPR_VFP2' + MCK_hGPR, // register class 'hGPR' + MCK_tGPR, // register class 'tGPR' + MCK_Reg95, // derived register class + MCK_Reg52, // derived register class + MCK_QQQQPR, // register class 'QQQQPR' + MCK_Reg105, // derived register class + MCK_Reg96, // derived register class + MCK_Reg78, // derived register class + MCK_Reg53, // derived register class + MCK_Reg41, // derived register class + MCK_rGPR, // register class 'rGPR' + MCK_Reg91, // derived register class + MCK_Reg86, // derived register class + MCK_Reg79, // derived register class + MCK_Reg50, // derived register class + MCK_Reg23, // derived register class + MCK_GPRnopc, // register class 'GPRnopc' + MCK_QQPR, // register class 'QQPR' + MCK_Reg97, // derived register class + MCK_Reg80, // derived register class + MCK_Reg51, // derived register class + MCK_Reg42, // derived register class + MCK_Reg24, // derived register class + MCK_DPR_VFP2, // register class 'DPR_VFP2' + MCK_GPR, // register class 'GPR' + MCK_GPRwithAPSR, // register class 'GPRwithAPSR' + MCK_QPR, // register class 'QPR' + MCK_SPR_8, // register class 'SPR_8' + MCK_DTripleSpc, // register class 'DTripleSpc,DQuadSpc' + MCK_DQuad, // register class 'DQuad' + MCK_DPairSpc, // register class 'DPairSpc' + MCK_DTriple, // register class 'DTriple' + MCK_DPair, // register class 'DPair' + MCK_DPR, // register class 'DPR' + MCK_SPR, // register class 'SPR' + MCK_AM2OffsetImm, // user defined class 'AM2OffsetImmAsmOperand' + MCK_AM3Offset, // user defined class 'AM3OffsetAsmOperand' + MCK_AddrMode2, // user defined class 'AddrMode2AsmOperand' + MCK_AddrMode3, // user defined class 'AddrMode3AsmOperand' + MCK_AddrMode5, // user defined class 'AddrMode5AsmOperand' + MCK_AddrMode5FP16, // user defined class 'AddrMode5FP16AsmOperand' + MCK_AlignedMemory16, // user defined class 'AddrMode6Align16AsmOperand' + MCK_AlignedMemory32, // user defined class 'AddrMode6Align32AsmOperand' + MCK_AlignedMemory64, // user defined class 'AddrMode6Align64AsmOperand' + MCK_AlignedMemory64or128, // user defined class 'AddrMode6Align64or128AsmOperand' + MCK_AlignedMemory64or128or256, // user defined class 'AddrMode6Align64or128or256AsmOperand' + MCK_AlignedMemoryNone, // user defined class 'AddrMode6AlignNoneAsmOperand' + MCK_AlignedMemory, // user defined class 'AddrMode6AsmOperand' + MCK_DupAlignedMemory16, // user defined class 'AddrMode6dupAlign16AsmOperand' + MCK_DupAlignedMemory32, // user defined class 'AddrMode6dupAlign32AsmOperand' + MCK_DupAlignedMemory64, // user defined class 'AddrMode6dupAlign64AsmOperand' + MCK_DupAlignedMemory64or128, // user defined class 'AddrMode6dupAlign64or128AsmOperand' + MCK_DupAlignedMemoryNone, // user defined class 'AddrMode6dupAlignNoneAsmOperand' + MCK_AdrLabel, // user defined class 'AdrLabelAsmOperand' + MCK_BankedReg, // user defined class 'BankedRegOperand' + MCK_Bitfield, // user defined class 'BitfieldAsmOperand' + MCK_CCOut, // user defined class 'CCOutOperand' + MCK_CondCode, // user defined class 'CondCodeOperand' + MCK_CoprocNum, // user defined class 'CoprocNumAsmOperand' + MCK_CoprocOption, // user defined class 'CoprocOptionAsmOperand' + MCK_CoprocReg, // user defined class 'CoprocRegAsmOperand' + MCK_DPRRegList, // user defined class 'DPRRegListAsmOperand' + MCK_FPImm, // user defined class 'FPImmOperand' + MCK_Imm0_15, // user defined class 'Imm0_15AsmOperand' + MCK_Imm0_1, // user defined class 'Imm0_1AsmOperand' + MCK_Imm0_239, // user defined class 'Imm0_239AsmOperand' + MCK_Imm0_255, // user defined class 'Imm0_255AsmOperand' + MCK_Imm0_31, // user defined class 'Imm0_31AsmOperand' + MCK_Imm0_32, // user defined class 'Imm0_32AsmOperand' + MCK_Imm0_3, // user defined class 'Imm0_3AsmOperand' + MCK_Imm0_63, // user defined class 'Imm0_63AsmOperand' + MCK_Imm0_65535, // user defined class 'Imm0_65535AsmOperand' + MCK_Imm0_65535Expr, // user defined class 'Imm0_65535ExprAsmOperand' + MCK_Imm0_7, // user defined class 'Imm0_7AsmOperand' + MCK_Imm16, // user defined class 'Imm16AsmOperand' + MCK_Imm1_15, // user defined class 'Imm1_15AsmOperand' + MCK_Imm1_16, // user defined class 'Imm1_16AsmOperand' + MCK_Imm1_31, // user defined class 'Imm1_31AsmOperand' + MCK_Imm1_32, // user defined class 'Imm1_32AsmOperand' + MCK_Imm1_7, // user defined class 'Imm1_7AsmOperand' + MCK_Imm24bit, // user defined class 'Imm24bitAsmOperand' + MCK_Imm256_65535Expr, // user defined class 'Imm256_65535ExprAsmOperand' + MCK_Imm32, // user defined class 'Imm32AsmOperand' + MCK_Imm8, // user defined class 'Imm8AsmOperand' + MCK_Imm, // user defined class 'ImmAsmOperand' + MCK_InstSyncBarrierOpt, // user defined class 'InstSyncBarrierOptOperand' + MCK_MSRMask, // user defined class 'MSRMaskOperand' + MCK_MemBarrierOpt, // user defined class 'MemBarrierOptOperand' + MCK_MemImm0_1020s4Offset, // user defined class 'MemImm0_1020s4OffsetAsmOperand' + MCK_MemImm12Offset, // user defined class 'MemImm12OffsetAsmOperand' + MCK_MemImm8Offset, // user defined class 'MemImm8OffsetAsmOperand' + MCK_MemImm8s4Offset, // user defined class 'MemImm8s4OffsetAsmOperand' + MCK_MemNegImm8Offset, // user defined class 'MemNegImm8OffsetAsmOperand' + MCK_MemNoOffset, // user defined class 'MemNoOffsetAsmOperand' + MCK_MemPosImm8Offset, // user defined class 'MemPosImm8OffsetAsmOperand' + MCK_MemRegOffset, // user defined class 'MemRegOffsetAsmOperand' + MCK_ModImm, // user defined class 'ModImmAsmOperand' + MCK_ModImmNeg, // user defined class 'ModImmNegAsmOperand' + MCK_ModImmNot, // user defined class 'ModImmNotAsmOperand' + MCK_PKHASRImm, // user defined class 'PKHASRAsmOperand' + MCK_PKHLSLImm, // user defined class 'PKHLSLAsmOperand' + MCK_PostIdxImm8, // user defined class 'PostIdxImm8AsmOperand' + MCK_PostIdxImm8s4, // user defined class 'PostIdxImm8s4AsmOperand' + MCK_PostIdxReg, // user defined class 'PostIdxRegAsmOperand' + MCK_PostIdxRegShifted, // user defined class 'PostIdxRegShiftedAsmOperand' + MCK_ProcIFlags, // user defined class 'ProcIFlagsOperand' + MCK_RegList, // user defined class 'RegListAsmOperand' + MCK_RotImm, // user defined class 'RotImmAsmOperand' + MCK_SPRRegList, // user defined class 'SPRRegListAsmOperand' + MCK_SetEndImm, // user defined class 'SetEndAsmOperand' + MCK_RegShiftedImm, // user defined class 'ShiftedImmAsmOperand' + MCK_RegShiftedReg, // user defined class 'ShiftedRegAsmOperand' + MCK_ShifterImm, // user defined class 'ShifterImmAsmOperand' + MCK_ThumbMemPC, // user defined class 'ThumbMemPC' + MCK_ImmThumbSR, // user defined class 'ThumbSRImmAsmOperand' + MCK_UnsignedOffset_b8s2, // user defined class 'UnsignedOffset_b8s2' + MCK_VecListDPairAllLanes, // user defined class 'VecListDPairAllLanesAsmOperand' + MCK_VecListDPair, // user defined class 'VecListDPairAsmOperand' + MCK_VecListDPairSpacedAllLanes, // user defined class 'VecListDPairSpacedAllLanesAsmOperand' + MCK_VecListDPairSpaced, // user defined class 'VecListDPairSpacedAsmOperand' + MCK_VecListFourDAllLanes, // user defined class 'VecListFourDAllLanesAsmOperand' + MCK_VecListFourD, // user defined class 'VecListFourDAsmOperand' + MCK_VecListFourDByteIndexed, // user defined class 'VecListFourDByteIndexAsmOperand' + MCK_VecListFourDHWordIndexed, // user defined class 'VecListFourDHWordIndexAsmOperand' + MCK_VecListFourDWordIndexed, // user defined class 'VecListFourDWordIndexAsmOperand' + MCK_VecListFourQAllLanes, // user defined class 'VecListFourQAllLanesAsmOperand' + MCK_VecListFourQ, // user defined class 'VecListFourQAsmOperand' + MCK_VecListFourQHWordIndexed, // user defined class 'VecListFourQHWordIndexAsmOperand' + MCK_VecListFourQWordIndexed, // user defined class 'VecListFourQWordIndexAsmOperand' + MCK_VecListOneDAllLanes, // user defined class 'VecListOneDAllLanesAsmOperand' + MCK_VecListOneD, // user defined class 'VecListOneDAsmOperand' + MCK_VecListOneDByteIndexed, // user defined class 'VecListOneDByteIndexAsmOperand' + MCK_VecListOneDHWordIndexed, // user defined class 'VecListOneDHWordIndexAsmOperand' + MCK_VecListOneDWordIndexed, // user defined class 'VecListOneDWordIndexAsmOperand' + MCK_VecListThreeDAllLanes, // user defined class 'VecListThreeDAllLanesAsmOperand' + MCK_VecListThreeD, // user defined class 'VecListThreeDAsmOperand' + MCK_VecListThreeDByteIndexed, // user defined class 'VecListThreeDByteIndexAsmOperand' + MCK_VecListThreeDHWordIndexed, // user defined class 'VecListThreeDHWordIndexAsmOperand' + MCK_VecListThreeDWordIndexed, // user defined class 'VecListThreeDWordIndexAsmOperand' + MCK_VecListThreeQAllLanes, // user defined class 'VecListThreeQAllLanesAsmOperand' + MCK_VecListThreeQ, // user defined class 'VecListThreeQAsmOperand' + MCK_VecListThreeQHWordIndexed, // user defined class 'VecListThreeQHWordIndexAsmOperand' + MCK_VecListThreeQWordIndexed, // user defined class 'VecListThreeQWordIndexAsmOperand' + MCK_VecListTwoDByteIndexed, // user defined class 'VecListTwoDByteIndexAsmOperand' + MCK_VecListTwoDHWordIndexed, // user defined class 'VecListTwoDHWordIndexAsmOperand' + MCK_VecListTwoDWordIndexed, // user defined class 'VecListTwoDWordIndexAsmOperand' + MCK_VecListTwoQHWordIndexed, // user defined class 'VecListTwoQHWordIndexAsmOperand' + MCK_VecListTwoQWordIndexed, // user defined class 'VecListTwoQWordIndexAsmOperand' + MCK_VectorIndex16, // user defined class 'VectorIndex16Operand' + MCK_VectorIndex32, // user defined class 'VectorIndex32Operand' + MCK_VectorIndex8, // user defined class 'VectorIndex8Operand' + MCK_MemTBB, // user defined class 'addrmode_tbb_asmoperand' + MCK_MemTBH, // user defined class 'addrmode_tbh_asmoperand' + MCK_FBits16, // user defined class 'fbits16_asm_operand' + MCK_FBits32, // user defined class 'fbits32_asm_operand' + MCK_Imm0_4095, // user defined class 'imm0_4095_asmoperand' + MCK_Imm0_4095Neg, // user defined class 'imm0_4095_neg_asmoperand' + MCK_ITMask, // user defined class 'it_mask_asmoperand' + MCK_ITCondCode, // user defined class 'it_pred_asmoperand' + MCK_NEONi16splat, // user defined class 'nImmSplatI16AsmOperand' + MCK_NEONi32splat, // user defined class 'nImmSplatI32AsmOperand' + MCK_NEONi64splat, // user defined class 'nImmSplatI64AsmOperand' + MCK_NEONi8splat, // user defined class 'nImmSplatI8AsmOperand' + MCK_NEONi16splatNot, // user defined class 'nImmSplatNotI16AsmOperand' + MCK_NEONi32splatNot, // user defined class 'nImmSplatNotI32AsmOperand' + MCK_NEONi16vmovByteReplicate, // user defined class 'nImmVMOVI16AsmOperandByteReplicate' + MCK_NEONi32vmov, // user defined class 'nImmVMOVI32AsmOperand' + MCK_NEONi32vmovByteReplicate, // user defined class 'nImmVMOVI32AsmOperandByteReplicate' + MCK_NEONi32vmovNeg, // user defined class 'nImmVMOVI32NegAsmOperand' + MCK_NEONi16invByteReplicate, // user defined class 'nImmVMVNI16AsmOperandByteReplicate' + MCK_NEONi32invByteReplicate, // user defined class 'nImmVMVNI32AsmOperandByteReplicate' + MCK_ShrImm16, // user defined class 'shr_imm16_asm_operand' + MCK_ShrImm32, // user defined class 'shr_imm32_asm_operand' + MCK_ShrImm64, // user defined class 'shr_imm64_asm_operand' + MCK_ShrImm8, // user defined class 'shr_imm8_asm_operand' + MCK_T2SOImm, // user defined class 't2_so_imm_asmoperand' + MCK_T2SOImmNeg, // user defined class 't2_so_imm_neg_asmoperand' + MCK_T2SOImmNot, // user defined class 't2_so_imm_not_asmoperand' + MCK_MemUImm12Offset, // user defined class 't2addrmode_imm12_asmoperand' + MCK_T2MemRegOffset, // user defined class 't2addrmode_so_reg_asmoperand' + MCK_Imm8s4, // user defined class 't2am_imm8s4_offset_asmoperand' + MCK_MemPCRelImm12, // user defined class 't2ldr_pcrel_imm12_asmoperand' + MCK_MemThumbRIs1, // user defined class 't_addrmode_is1_asm_operand' + MCK_MemThumbRIs2, // user defined class 't_addrmode_is2_asm_operand' + MCK_MemThumbRIs4, // user defined class 't_addrmode_is4_asm_operand' + MCK_MemThumbRR, // user defined class 't_addrmode_rr_asm_operand' + MCK_MemThumbSPI, // user defined class 't_addrmode_sp_asm_operand' + MCK_Imm0_1020s4, // user defined class 't_imm0_1020s4_asmoperand' + MCK_Imm0_508s4, // user defined class 't_imm0_508s4_asmoperand' + MCK_Imm0_508s4Neg, // user defined class 't_imm0_508s4_neg_asmoperand' + NumMatchClassKinds +}; + +} + +static MatchClassKind matchTokenString(StringRef Name) { + switch (Name.size()) { + default: break; + case 1: // 6 strings to match. + switch (Name[0]) { + default: break; + case '!': // 1 string to match. + return MCK__EXCLAIM_; // "!" + case '[': // 1 string to match. + return MCK__91_; // "[" + case ']': // 1 string to match. + return MCK__93_; // "]" + case '^': // 1 string to match. + return MCK__94_; // "^" + case '{': // 1 string to match. + return MCK__123_; // "{" + case '}': // 1 string to match. + return MCK__125_; // "}" + } + break; + case 2: // 5 strings to match. + switch (Name[0]) { + default: break; + case '#': // 1 string to match. + if (Name[1] != '0') + break; + return MCK__35_0; // "#0" + case '.': // 4 strings to match. + switch (Name[1]) { + default: break; + case '8': // 1 string to match. + return MCK__DOT_8; // ".8" + case 'd': // 1 string to match. + return MCK__DOT_d; // ".d" + case 'f': // 1 string to match. + return MCK__DOT_f; // ".f" + case 'w': // 1 string to match. + return MCK__DOT_w; // ".w" + } + break; + } + break; + case 3: // 7 strings to match. + if (Name[0] != '.') + break; + switch (Name[1]) { + default: break; + case '1': // 1 string to match. + if (Name[2] != '6') + break; + return MCK__DOT_16; // ".16" + case '3': // 1 string to match. + if (Name[2] != '2') + break; + return MCK__DOT_32; // ".32" + case '6': // 1 string to match. + if (Name[2] != '4') + break; + return MCK__DOT_64; // ".64" + case 'i': // 1 string to match. + if (Name[2] != '8') + break; + return MCK__DOT_i8; // ".i8" + case 'p': // 1 string to match. + if (Name[2] != '8') + break; + return MCK__DOT_p8; // ".p8" + case 's': // 1 string to match. + if (Name[2] != '8') + break; + return MCK__DOT_s8; // ".s8" + case 'u': // 1 string to match. + if (Name[2] != '8') + break; + return MCK__DOT_u8; // ".u8" + } + break; + case 4: // 14 strings to match. + if (Name[0] != '.') + break; + switch (Name[1]) { + default: break; + case 'f': // 3 strings to match. + switch (Name[2]) { + default: break; + case '1': // 1 string to match. + if (Name[3] != '6') + break; + return MCK__DOT_f16; // ".f16" + case '3': // 1 string to match. + if (Name[3] != '2') + break; + return MCK__DOT_f32; // ".f32" + case '6': // 1 string to match. + if (Name[3] != '4') + break; + return MCK__DOT_f64; // ".f64" + } + break; + case 'i': // 3 strings to match. + switch (Name[2]) { + default: break; + case '1': // 1 string to match. + if (Name[3] != '6') + break; + return MCK__DOT_i16; // ".i16" + case '3': // 1 string to match. + if (Name[3] != '2') + break; + return MCK__DOT_i32; // ".i32" + case '6': // 1 string to match. + if (Name[3] != '4') + break; + return MCK__DOT_i64; // ".i64" + } + break; + case 'p': // 2 strings to match. + switch (Name[2]) { + default: break; + case '1': // 1 string to match. + if (Name[3] != '6') + break; + return MCK__DOT_p16; // ".p16" + case '6': // 1 string to match. + if (Name[3] != '4') + break; + return MCK__DOT_p64; // ".p64" + } + break; + case 's': // 3 strings to match. + switch (Name[2]) { + default: break; + case '1': // 1 string to match. + if (Name[3] != '6') + break; + return MCK__DOT_s16; // ".s16" + case '3': // 1 string to match. + if (Name[3] != '2') + break; + return MCK__DOT_s32; // ".s32" + case '6': // 1 string to match. + if (Name[3] != '4') + break; + return MCK__DOT_s64; // ".s64" + } + break; + case 'u': // 3 strings to match. + switch (Name[2]) { + default: break; + case '1': // 1 string to match. + if (Name[3] != '6') + break; + return MCK__DOT_u16; // ".u16" + case '3': // 1 string to match. + if (Name[3] != '2') + break; + return MCK__DOT_u32; // ".u32" + case '6': // 1 string to match. + if (Name[3] != '4') + break; + return MCK__DOT_u64; // ".u64" + } + break; + } + break; + } + return InvalidMatchClass; +} + +/// isSubclass - Compute whether \p A is a subclass of \p B. +static bool isSubclass(MatchClassKind A, MatchClassKind B) { + if (A == B) + return true; + + switch (A) { + default: + return false; + + case MCK__DOT_d: + switch (B) { + default: return false; + case MCK__DOT_f64: return true; + case MCK__DOT_64: return true; + } + + case MCK__DOT_f: + switch (B) { + default: return false; + case MCK__DOT_f32: return true; + case MCK__DOT_32: return true; + } + + case MCK__DOT_s16: + switch (B) { + default: return false; + case MCK__DOT_i16: return true; + case MCK__DOT_16: return true; + } + + case MCK__DOT_s32: + switch (B) { + default: return false; + case MCK__DOT_i32: return true; + case MCK__DOT_32: return true; + } + + case MCK__DOT_s64: + switch (B) { + default: return false; + case MCK__DOT_i64: return true; + case MCK__DOT_64: return true; + } + + case MCK__DOT_s8: + switch (B) { + default: return false; + case MCK__DOT_i8: return true; + case MCK__DOT_8: return true; + } + + case MCK__DOT_u16: + switch (B) { + default: return false; + case MCK__DOT_i16: return true; + case MCK__DOT_16: return true; + } + + case MCK__DOT_u32: + switch (B) { + default: return false; + case MCK__DOT_i32: return true; + case MCK__DOT_32: return true; + } + + case MCK__DOT_u64: + switch (B) { + default: return false; + case MCK__DOT_i64: return true; + case MCK__DOT_64: return true; + } + + case MCK__DOT_u8: + switch (B) { + default: return false; + case MCK__DOT_i8: return true; + case MCK__DOT_8: return true; + } + + case MCK__DOT_f32: + return B == MCK__DOT_32; + + case MCK__DOT_f64: + return B == MCK__DOT_64; + + case MCK__DOT_i16: + return B == MCK__DOT_16; + + case MCK__DOT_i32: + return B == MCK__DOT_32; + + case MCK__DOT_i64: + return B == MCK__DOT_64; + + case MCK__DOT_i8: + return B == MCK__DOT_8; + + case MCK__DOT_p16: + return B == MCK__DOT_16; + + case MCK__DOT_p8: + return B == MCK__DOT_8; + + case MCK_Reg74: + switch (B) { + default: return false; + case MCK_Reg73: return true; + case MCK_Reg71: return true; + case MCK_GPRPair: return true; + } + + case MCK_Reg58: + switch (B) { + default: return false; + case MCK_Reg59: return true; + case MCK_Reg60: return true; + case MCK_Reg61: return true; + case MCK_Reg62: return true; + case MCK_Reg63: return true; + case MCK_Reg64: return true; + case MCK_Reg65: return true; + case MCK_QQQQPR: return true; + } + + case MCK_Reg10: + switch (B) { + default: return false; + case MCK_tcGPR: return true; + case MCK_Reg9: return true; + case MCK_Reg7: return true; + case MCK_hGPR: return true; + case MCK_rGPR: return true; + case MCK_GPRnopc: return true; + case MCK_GPR: return true; + case MCK_GPRwithAPSR: return true; + } + + case MCK_APSR_NZCV: + return B == MCK_GPRwithAPSR; + + case MCK_GPRsp: + switch (B) { + default: return false; + case MCK_Reg7: return true; + case MCK_hGPR: return true; + case MCK_GPRnopc: return true; + case MCK_GPR: return true; + case MCK_GPRwithAPSR: return true; + } + + case MCK_LR: + switch (B) { + default: return false; + case MCK_Reg9: return true; + case MCK_Reg7: return true; + case MCK_hGPR: return true; + case MCK_rGPR: return true; + case MCK_GPRnopc: return true; + case MCK_GPR: return true; + case MCK_GPRwithAPSR: return true; + } + + case MCK_PC: + switch (B) { + default: return false; + case MCK_hGPR: return true; + case MCK_GPR: return true; + } + + case MCK_Reg99: + switch (B) { + default: return false; + case MCK_Reg100: return true; + case MCK_Reg101: return true; + case MCK_Reg56: return true; + case MCK_Reg102: return true; + case MCK_Reg57: return true; + case MCK_Reg103: return true; + case MCK_Reg54: return true; + case MCK_Reg104: return true; + case MCK_Reg55: return true; + case MCK_Reg52: return true; + case MCK_Reg105: return true; + case MCK_Reg53: return true; + case MCK_Reg50: return true; + case MCK_Reg51: return true; + case MCK_DQuad: return true; + } + + case MCK_Reg72: + switch (B) { + default: return false; + case MCK_Reg73: return true; + case MCK_Reg69: return true; + case MCK_GPRPair: return true; + } + + case MCK_Reg67: + switch (B) { + default: return false; + case MCK_Reg71: return true; + case MCK_Reg68: return true; + case MCK_Reg69: return true; + case MCK_GPRPair: return true; + } + + case MCK_Reg59: + switch (B) { + default: return false; + case MCK_Reg60: return true; + case MCK_Reg61: return true; + case MCK_Reg62: return true; + case MCK_Reg63: return true; + case MCK_Reg64: return true; + case MCK_Reg65: return true; + case MCK_QQQQPR: return true; + } + + case MCK_Reg100: + switch (B) { + default: return false; + case MCK_Reg101: return true; + case MCK_Reg102: return true; + case MCK_Reg57: return true; + case MCK_Reg103: return true; + case MCK_Reg54: return true; + case MCK_Reg104: return true; + case MCK_Reg55: return true; + case MCK_Reg52: return true; + case MCK_Reg105: return true; + case MCK_Reg53: return true; + case MCK_Reg50: return true; + case MCK_Reg51: return true; + case MCK_DQuad: return true; + } + + case MCK_Reg87: + switch (B) { + default: return false; + case MCK_Reg88: return true; + case MCK_Reg75: return true; + case MCK_Reg89: return true; + case MCK_Reg76: return true; + case MCK_Reg90: return true; + case MCK_Reg77: return true; + case MCK_Reg78: return true; + case MCK_Reg91: return true; + case MCK_Reg79: return true; + case MCK_Reg80: return true; + case MCK_DTriple: return true; + } + + case MCK_Reg82: + switch (B) { + default: return false; + case MCK_Reg83: return true; + case MCK_Reg75: return true; + case MCK_Reg84: return true; + case MCK_Reg76: return true; + case MCK_Reg85: return true; + case MCK_Reg77: return true; + case MCK_Reg78: return true; + case MCK_Reg86: return true; + case MCK_Reg79: return true; + case MCK_Reg80: return true; + case MCK_DTriple: return true; + } + + case MCK_Reg73: + return B == MCK_GPRPair; + + case MCK_Reg71: + return B == MCK_GPRPair; + + case MCK_Reg60: + switch (B) { + default: return false; + case MCK_Reg61: return true; + case MCK_Reg62: return true; + case MCK_Reg63: return true; + case MCK_Reg64: return true; + case MCK_Reg65: return true; + case MCK_QQQQPR: return true; + } + + case MCK_Reg44: + switch (B) { + default: return false; + case MCK_Reg45: return true; + case MCK_Reg56: return true; + case MCK_Reg57: return true; + case MCK_Reg54: return true; + case MCK_Reg46: return true; + case MCK_Reg55: return true; + case MCK_Reg47: return true; + case MCK_Reg52: return true; + case MCK_Reg53: return true; + case MCK_Reg50: return true; + case MCK_QQPR: return true; + case MCK_Reg51: return true; + case MCK_DQuad: return true; + } + + case MCK_Reg101: + switch (B) { + default: return false; + case MCK_Reg102: return true; + case MCK_Reg103: return true; + case MCK_Reg104: return true; + case MCK_Reg55: return true; + case MCK_Reg52: return true; + case MCK_Reg105: return true; + case MCK_Reg53: return true; + case MCK_Reg50: return true; + case MCK_Reg51: return true; + case MCK_DQuad: return true; + } + + case MCK_Reg92: + switch (B) { + default: return false; + case MCK_Reg93: return true; + case MCK_Reg94: return true; + case MCK_Reg95: return true; + case MCK_Reg96: return true; + case MCK_Reg97: return true; + case MCK_DTripleSpc: return true; + } + + case MCK_Reg88: + switch (B) { + default: return false; + case MCK_Reg89: return true; + case MCK_Reg90: return true; + case MCK_Reg77: return true; + case MCK_Reg78: return true; + case MCK_Reg91: return true; + case MCK_Reg79: return true; + case MCK_Reg80: return true; + case MCK_DTriple: return true; + } + + case MCK_Reg83: + switch (B) { + default: return false; + case MCK_Reg84: return true; + case MCK_Reg76: return true; + case MCK_Reg85: return true; + case MCK_Reg77: return true; + case MCK_Reg78: return true; + case MCK_Reg86: return true; + case MCK_Reg79: return true; + case MCK_Reg80: return true; + case MCK_DTriple: return true; + } + + case MCK_Reg68: + switch (B) { + default: return false; + case MCK_Reg69: return true; + case MCK_GPRPair: return true; + } + + case MCK_Reg61: + switch (B) { + default: return false; + case MCK_Reg62: return true; + case MCK_Reg63: return true; + case MCK_Reg64: return true; + case MCK_Reg65: return true; + case MCK_QQQQPR: return true; + } + + case MCK_Reg45: + switch (B) { + default: return false; + case MCK_Reg54: return true; + case MCK_Reg46: return true; + case MCK_Reg55: return true; + case MCK_Reg47: return true; + case MCK_Reg52: return true; + case MCK_Reg53: return true; + case MCK_Reg50: return true; + case MCK_QQPR: return true; + case MCK_Reg51: return true; + case MCK_DQuad: return true; + } + + case MCK_Reg0: + switch (B) { + default: return false; + case MCK_tcGPR: return true; + case MCK_tGPR: return true; + case MCK_rGPR: return true; + case MCK_GPRnopc: return true; + case MCK_GPR: return true; + case MCK_GPRwithAPSR: return true; + } + + case MCK_QPR_8: + switch (B) { + default: return false; + case MCK_Reg25: return true; + case MCK_Reg26: return true; + case MCK_QPR_VFP2: return true; + case MCK_Reg23: return true; + case MCK_Reg24: return true; + case MCK_QPR: return true; + case MCK_DPair: return true; + } + + case MCK_Reg62: + switch (B) { + default: return false; + case MCK_Reg63: return true; + case MCK_Reg64: return true; + case MCK_Reg65: return true; + case MCK_QQQQPR: return true; + } + + case MCK_Reg56: + switch (B) { + default: return false; + case MCK_Reg57: return true; + case MCK_Reg54: return true; + case MCK_Reg55: return true; + case MCK_Reg52: return true; + case MCK_Reg53: return true; + case MCK_Reg50: return true; + case MCK_Reg51: return true; + case MCK_DQuad: return true; + } + + case MCK_tcGPR: + switch (B) { + default: return false; + case MCK_rGPR: return true; + case MCK_GPRnopc: return true; + case MCK_GPR: return true; + case MCK_GPRwithAPSR: return true; + } + + case MCK_Reg102: + switch (B) { + default: return false; + case MCK_Reg103: return true; + case MCK_Reg104: return true; + case MCK_Reg52: return true; + case MCK_Reg105: return true; + case MCK_Reg53: return true; + case MCK_Reg50: return true; + case MCK_Reg51: return true; + case MCK_DQuad: return true; + } + + case MCK_Reg93: + switch (B) { + default: return false; + case MCK_Reg94: return true; + case MCK_Reg95: return true; + case MCK_Reg96: return true; + case MCK_Reg97: return true; + case MCK_DTripleSpc: return true; + } + + case MCK_Reg75: + switch (B) { + default: return false; + case MCK_Reg76: return true; + case MCK_Reg77: return true; + case MCK_Reg78: return true; + case MCK_Reg79: return true; + case MCK_Reg80: return true; + case MCK_DTriple: return true; + } + + case MCK_Reg69: + return B == MCK_GPRPair; + + case MCK_Reg63: + switch (B) { + default: return false; + case MCK_Reg64: return true; + case MCK_Reg65: return true; + case MCK_QQQQPR: return true; + } + + case MCK_Reg57: + switch (B) { + default: return false; + case MCK_Reg54: return true; + case MCK_Reg55: return true; + case MCK_Reg52: return true; + case MCK_Reg53: return true; + case MCK_Reg50: return true; + case MCK_Reg51: return true; + case MCK_DQuad: return true; + } + + case MCK_Reg39: + switch (B) { + default: return false; + case MCK_Reg40: return true; + case MCK_Reg41: return true; + case MCK_Reg42: return true; + case MCK_DPairSpc: return true; + } + + case MCK_Reg9: + switch (B) { + default: return false; + case MCK_Reg7: return true; + case MCK_hGPR: return true; + case MCK_rGPR: return true; + case MCK_GPRnopc: return true; + case MCK_GPR: return true; + case MCK_GPRwithAPSR: return true; + } + + case MCK_Reg103: + switch (B) { + default: return false; + case MCK_Reg104: return true; + case MCK_Reg105: return true; + case MCK_Reg53: return true; + case MCK_Reg50: return true; + case MCK_Reg51: return true; + case MCK_DQuad: return true; + } + + case MCK_Reg89: + switch (B) { + default: return false; + case MCK_Reg90: return true; + case MCK_Reg78: return true; + case MCK_Reg91: return true; + case MCK_Reg79: return true; + case MCK_Reg80: return true; + case MCK_DTriple: return true; + } + + case MCK_Reg84: + switch (B) { + default: return false; + case MCK_Reg85: return true; + case MCK_Reg78: return true; + case MCK_Reg86: return true; + case MCK_Reg79: return true; + case MCK_Reg80: return true; + case MCK_DTriple: return true; + } + + case MCK_Reg76: + switch (B) { + default: return false; + case MCK_Reg77: return true; + case MCK_Reg78: return true; + case MCK_Reg79: return true; + case MCK_Reg80: return true; + case MCK_DTriple: return true; + } + + case MCK_Reg64: + switch (B) { + default: return false; + case MCK_Reg65: return true; + case MCK_QQQQPR: return true; + } + + case MCK_Reg54: + switch (B) { + default: return false; + case MCK_Reg55: return true; + case MCK_Reg52: return true; + case MCK_Reg53: return true; + case MCK_Reg50: return true; + case MCK_Reg51: return true; + case MCK_DQuad: return true; + } + + case MCK_Reg46: + switch (B) { + default: return false; + case MCK_Reg47: return true; + case MCK_Reg52: return true; + case MCK_Reg53: return true; + case MCK_Reg50: return true; + case MCK_QQPR: return true; + case MCK_Reg51: return true; + case MCK_DQuad: return true; + } + + case MCK_Reg25: + switch (B) { + default: return false; + case MCK_Reg26: return true; + case MCK_Reg23: return true; + case MCK_Reg24: return true; + case MCK_DPair: return true; + } + + case MCK_Reg7: + switch (B) { + default: return false; + case MCK_hGPR: return true; + case MCK_GPRnopc: return true; + case MCK_GPR: return true; + case MCK_GPRwithAPSR: return true; + } + + case MCK_Reg104: + switch (B) { + default: return false; + case MCK_Reg105: return true; + case MCK_Reg51: return true; + case MCK_DQuad: return true; + } + + case MCK_Reg94: + switch (B) { + default: return false; + case MCK_Reg95: return true; + case MCK_Reg96: return true; + case MCK_Reg97: return true; + case MCK_DTripleSpc: return true; + } + + case MCK_Reg90: + switch (B) { + default: return false; + case MCK_Reg91: return true; + case MCK_Reg80: return true; + case MCK_DTriple: return true; + } + + case MCK_Reg85: + switch (B) { + default: return false; + case MCK_Reg86: return true; + case MCK_Reg79: return true; + case MCK_Reg80: return true; + case MCK_DTriple: return true; + } + + case MCK_Reg77: + switch (B) { + default: return false; + case MCK_Reg78: return true; + case MCK_Reg79: return true; + case MCK_Reg80: return true; + case MCK_DTriple: return true; + } + + case MCK_Reg65: + return B == MCK_QQQQPR; + + case MCK_Reg55: + switch (B) { + default: return false; + case MCK_Reg52: return true; + case MCK_Reg53: return true; + case MCK_Reg50: return true; + case MCK_Reg51: return true; + case MCK_DQuad: return true; + } + + case MCK_Reg47: + switch (B) { + default: return false; + case MCK_Reg50: return true; + case MCK_QQPR: return true; + case MCK_Reg51: return true; + case MCK_DQuad: return true; + } + + case MCK_Reg40: + switch (B) { + default: return false; + case MCK_Reg41: return true; + case MCK_Reg42: return true; + case MCK_DPairSpc: return true; + } + + case MCK_Reg26: + switch (B) { + default: return false; + case MCK_Reg23: return true; + case MCK_Reg24: return true; + case MCK_DPair: return true; + } + + case MCK_DPR_8: + switch (B) { + default: return false; + case MCK_DPR_VFP2: return true; + case MCK_DPR: return true; + } + + case MCK_QPR_VFP2: + switch (B) { + default: return false; + case MCK_Reg23: return true; + case MCK_Reg24: return true; + case MCK_QPR: return true; + case MCK_DPair: return true; + } + + case MCK_hGPR: + return B == MCK_GPR; + + case MCK_tGPR: + switch (B) { + default: return false; + case MCK_rGPR: return true; + case MCK_GPRnopc: return true; + case MCK_GPR: return true; + case MCK_GPRwithAPSR: return true; + } + + case MCK_Reg95: + switch (B) { + default: return false; + case MCK_Reg96: return true; + case MCK_Reg97: return true; + case MCK_DTripleSpc: return true; + } + + case MCK_Reg52: + switch (B) { + default: return false; + case MCK_Reg53: return true; + case MCK_Reg50: return true; + case MCK_Reg51: return true; + case MCK_DQuad: return true; + } + + case MCK_Reg105: + return B == MCK_DQuad; + + case MCK_Reg96: + switch (B) { + default: return false; + case MCK_Reg97: return true; + case MCK_DTripleSpc: return true; + } + + case MCK_Reg78: + switch (B) { + default: return false; + case MCK_Reg79: return true; + case MCK_Reg80: return true; + case MCK_DTriple: return true; + } + + case MCK_Reg53: + switch (B) { + default: return false; + case MCK_Reg50: return true; + case MCK_Reg51: return true; + case MCK_DQuad: return true; + } + + case MCK_Reg41: + switch (B) { + default: return false; + case MCK_Reg42: return true; + case MCK_DPairSpc: return true; + } + + case MCK_rGPR: + switch (B) { + default: return false; + case MCK_GPRnopc: return true; + case MCK_GPR: return true; + case MCK_GPRwithAPSR: return true; + } + + case MCK_Reg91: + return B == MCK_DTriple; + + case MCK_Reg86: + return B == MCK_DTriple; + + case MCK_Reg79: + switch (B) { + default: return false; + case MCK_Reg80: return true; + case MCK_DTriple: return true; + } + + case MCK_Reg50: + switch (B) { + default: return false; + case MCK_Reg51: return true; + case MCK_DQuad: return true; + } + + case MCK_Reg23: + switch (B) { + default: return false; + case MCK_Reg24: return true; + case MCK_DPair: return true; + } + + case MCK_GPRnopc: + switch (B) { + default: return false; + case MCK_GPR: return true; + case MCK_GPRwithAPSR: return true; + } + + case MCK_QQPR: + return B == MCK_DQuad; + + case MCK_Reg97: + return B == MCK_DTripleSpc; + + case MCK_Reg80: + return B == MCK_DTriple; + + case MCK_Reg51: + return B == MCK_DQuad; + + case MCK_Reg42: + return B == MCK_DPairSpc; + + case MCK_Reg24: + return B == MCK_DPair; + + case MCK_DPR_VFP2: + return B == MCK_DPR; + + case MCK_QPR: + return B == MCK_DPair; + + case MCK_SPR_8: + return B == MCK_SPR; + } +} + +static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) { + ARMOperand &Operand = (ARMOperand&)GOp; + if (Kind == InvalidMatchClass) + return MCTargetAsmParser::Match_InvalidOperand; + + if (Operand.isToken()) + return isSubclass(matchTokenString(Operand.getToken()), Kind) ? + MCTargetAsmParser::Match_Success : + MCTargetAsmParser::Match_InvalidOperand; + + // 'AM2OffsetImm' class + if (Kind == MCK_AM2OffsetImm) { + if (Operand.isAM2OffsetImm()) + return MCTargetAsmParser::Match_Success; + } + + // 'AM3Offset' class + if (Kind == MCK_AM3Offset) { + if (Operand.isAM3Offset()) + return MCTargetAsmParser::Match_Success; + } + + // 'AddrMode2' class + if (Kind == MCK_AddrMode2) { + if (Operand.isAddrMode2()) + return MCTargetAsmParser::Match_Success; + } + + // 'AddrMode3' class + if (Kind == MCK_AddrMode3) { + if (Operand.isAddrMode3()) + return MCTargetAsmParser::Match_Success; + } + + // 'AddrMode5' class + if (Kind == MCK_AddrMode5) { + if (Operand.isAddrMode5()) + return MCTargetAsmParser::Match_Success; + } + + // 'AddrMode5FP16' class + if (Kind == MCK_AddrMode5FP16) { + if (Operand.isAddrMode5FP16()) + return MCTargetAsmParser::Match_Success; + } + + // 'AlignedMemory16' class + if (Kind == MCK_AlignedMemory16) { + if (Operand.isAlignedMemory16()) + return MCTargetAsmParser::Match_Success; + return ARMAsmParser::Match_AlignedMemoryRequires16; + } + + // 'AlignedMemory32' class + if (Kind == MCK_AlignedMemory32) { + if (Operand.isAlignedMemory32()) + return MCTargetAsmParser::Match_Success; + return ARMAsmParser::Match_AlignedMemoryRequires32; + } + + // 'AlignedMemory64' class + if (Kind == MCK_AlignedMemory64) { + if (Operand.isAlignedMemory64()) + return MCTargetAsmParser::Match_Success; + return ARMAsmParser::Match_AlignedMemoryRequires64; + } + + // 'AlignedMemory64or128' class + if (Kind == MCK_AlignedMemory64or128) { + if (Operand.isAlignedMemory64or128()) + return MCTargetAsmParser::Match_Success; + return ARMAsmParser::Match_AlignedMemoryRequires64or128; + } + + // 'AlignedMemory64or128or256' class + if (Kind == MCK_AlignedMemory64or128or256) { + if (Operand.isAlignedMemory64or128or256()) + return MCTargetAsmParser::Match_Success; + return ARMAsmParser::Match_AlignedMemoryRequires64or128or256; + } + + // 'AlignedMemoryNone' class + if (Kind == MCK_AlignedMemoryNone) { + if (Operand.isAlignedMemoryNone()) + return MCTargetAsmParser::Match_Success; + return ARMAsmParser::Match_AlignedMemoryRequiresNone; + } + + // 'AlignedMemory' class + if (Kind == MCK_AlignedMemory) { + if (Operand.isAlignedMemory()) + return MCTargetAsmParser::Match_Success; + } + + // 'DupAlignedMemory16' class + if (Kind == MCK_DupAlignedMemory16) { + if (Operand.isDupAlignedMemory16()) + return MCTargetAsmParser::Match_Success; + return ARMAsmParser::Match_DupAlignedMemoryRequires16; + } + + // 'DupAlignedMemory32' class + if (Kind == MCK_DupAlignedMemory32) { + if (Operand.isDupAlignedMemory32()) + return MCTargetAsmParser::Match_Success; + return ARMAsmParser::Match_DupAlignedMemoryRequires32; + } + + // 'DupAlignedMemory64' class + if (Kind == MCK_DupAlignedMemory64) { + if (Operand.isDupAlignedMemory64()) + return MCTargetAsmParser::Match_Success; + return ARMAsmParser::Match_DupAlignedMemoryRequires64; + } + + // 'DupAlignedMemory64or128' class + if (Kind == MCK_DupAlignedMemory64or128) { + if (Operand.isDupAlignedMemory64or128()) + return MCTargetAsmParser::Match_Success; + return ARMAsmParser::Match_DupAlignedMemoryRequires64or128; + } + + // 'DupAlignedMemoryNone' class + if (Kind == MCK_DupAlignedMemoryNone) { + if (Operand.isDupAlignedMemoryNone()) + return MCTargetAsmParser::Match_Success; + return ARMAsmParser::Match_DupAlignedMemoryRequiresNone; + } + + // 'AdrLabel' class + if (Kind == MCK_AdrLabel) { + if (Operand.isAdrLabel()) + return MCTargetAsmParser::Match_Success; + } + + // 'BankedReg' class + if (Kind == MCK_BankedReg) { + if (Operand.isBankedReg()) + return MCTargetAsmParser::Match_Success; + } + + // 'Bitfield' class + if (Kind == MCK_Bitfield) { + if (Operand.isBitfield()) + return MCTargetAsmParser::Match_Success; + } + + // 'CCOut' class + if (Kind == MCK_CCOut) { + if (Operand.isCCOut()) + return MCTargetAsmParser::Match_Success; + } + + // 'CondCode' class + if (Kind == MCK_CondCode) { + if (Operand.isCondCode()) + return MCTargetAsmParser::Match_Success; + } + + // 'CoprocNum' class + if (Kind == MCK_CoprocNum) { + if (Operand.isCoprocNum()) + return MCTargetAsmParser::Match_Success; + } + + // 'CoprocOption' class + if (Kind == MCK_CoprocOption) { + if (Operand.isCoprocOption()) + return MCTargetAsmParser::Match_Success; + } + + // 'CoprocReg' class + if (Kind == MCK_CoprocReg) { + if (Operand.isCoprocReg()) + return MCTargetAsmParser::Match_Success; + } + + // 'DPRRegList' class + if (Kind == MCK_DPRRegList) { + if (Operand.isDPRRegList()) + return MCTargetAsmParser::Match_Success; + } + + // 'FPImm' class + if (Kind == MCK_FPImm) { + if (Operand.isFPImm()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm0_15' class + if (Kind == MCK_Imm0_15) { + if (Operand.isImm0_15()) + return MCTargetAsmParser::Match_Success; + return ARMAsmParser::Match_ImmRange0_15; + } + + // 'Imm0_1' class + if (Kind == MCK_Imm0_1) { + if (Operand.isImm0_1()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm0_239' class + if (Kind == MCK_Imm0_239) { + if (Operand.isImm0_239()) + return MCTargetAsmParser::Match_Success; + return ARMAsmParser::Match_ImmRange0_239; + } + + // 'Imm0_255' class + if (Kind == MCK_Imm0_255) { + if (Operand.isImm0_255()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm0_31' class + if (Kind == MCK_Imm0_31) { + if (Operand.isImm0_31()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm0_32' class + if (Kind == MCK_Imm0_32) { + if (Operand.isImm0_32()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm0_3' class + if (Kind == MCK_Imm0_3) { + if (Operand.isImm0_3()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm0_63' class + if (Kind == MCK_Imm0_63) { + if (Operand.isImm0_63()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm0_65535' class + if (Kind == MCK_Imm0_65535) { + if (Operand.isImm0_65535()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm0_65535Expr' class + if (Kind == MCK_Imm0_65535Expr) { + if (Operand.isImm0_65535Expr()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm0_7' class + if (Kind == MCK_Imm0_7) { + if (Operand.isImm0_7()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm16' class + if (Kind == MCK_Imm16) { + if (Operand.isImm16()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm1_15' class + if (Kind == MCK_Imm1_15) { + if (Operand.isImm1_15()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm1_16' class + if (Kind == MCK_Imm1_16) { + if (Operand.isImm1_16()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm1_31' class + if (Kind == MCK_Imm1_31) { + if (Operand.isImm1_31()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm1_32' class + if (Kind == MCK_Imm1_32) { + if (Operand.isImm1_32()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm1_7' class + if (Kind == MCK_Imm1_7) { + if (Operand.isImm1_7()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm24bit' class + if (Kind == MCK_Imm24bit) { + if (Operand.isImm24bit()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm256_65535Expr' class + if (Kind == MCK_Imm256_65535Expr) { + if (Operand.isImm256_65535Expr()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm32' class + if (Kind == MCK_Imm32) { + if (Operand.isImm32()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm8' class + if (Kind == MCK_Imm8) { + if (Operand.isImm8()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm' class + if (Kind == MCK_Imm) { + if (Operand.isImm()) + return MCTargetAsmParser::Match_Success; + } + + // 'InstSyncBarrierOpt' class + if (Kind == MCK_InstSyncBarrierOpt) { + if (Operand.isInstSyncBarrierOpt()) + return MCTargetAsmParser::Match_Success; + } + + // 'MSRMask' class + if (Kind == MCK_MSRMask) { + if (Operand.isMSRMask()) + return MCTargetAsmParser::Match_Success; + } + + // 'MemBarrierOpt' class + if (Kind == MCK_MemBarrierOpt) { + if (Operand.isMemBarrierOpt()) + return MCTargetAsmParser::Match_Success; + } + + // 'MemImm0_1020s4Offset' class + if (Kind == MCK_MemImm0_1020s4Offset) { + if (Operand.isMemImm0_1020s4Offset()) + return MCTargetAsmParser::Match_Success; + } + + // 'MemImm12Offset' class + if (Kind == MCK_MemImm12Offset) { + if (Operand.isMemImm12Offset()) + return MCTargetAsmParser::Match_Success; + } + + // 'MemImm8Offset' class + if (Kind == MCK_MemImm8Offset) { + if (Operand.isMemImm8Offset()) + return MCTargetAsmParser::Match_Success; + } + + // 'MemImm8s4Offset' class + if (Kind == MCK_MemImm8s4Offset) { + if (Operand.isMemImm8s4Offset()) + return MCTargetAsmParser::Match_Success; + } + + // 'MemNegImm8Offset' class + if (Kind == MCK_MemNegImm8Offset) { + if (Operand.isMemNegImm8Offset()) + return MCTargetAsmParser::Match_Success; + } + + // 'MemNoOffset' class + if (Kind == MCK_MemNoOffset) { + if (Operand.isMemNoOffset()) + return MCTargetAsmParser::Match_Success; + } + + // 'MemPosImm8Offset' class + if (Kind == MCK_MemPosImm8Offset) { + if (Operand.isMemPosImm8Offset()) + return MCTargetAsmParser::Match_Success; + } + + // 'MemRegOffset' class + if (Kind == MCK_MemRegOffset) { + if (Operand.isMemRegOffset()) + return MCTargetAsmParser::Match_Success; + } + + // 'ModImm' class + if (Kind == MCK_ModImm) { + if (Operand.isModImm()) + return MCTargetAsmParser::Match_Success; + } + + // 'ModImmNeg' class + if (Kind == MCK_ModImmNeg) { + if (Operand.isModImmNeg()) + return MCTargetAsmParser::Match_Success; + } + + // 'ModImmNot' class + if (Kind == MCK_ModImmNot) { + if (Operand.isModImmNot()) + return MCTargetAsmParser::Match_Success; + } + + // 'PKHASRImm' class + if (Kind == MCK_PKHASRImm) { + if (Operand.isPKHASRImm()) + return MCTargetAsmParser::Match_Success; + } + + // 'PKHLSLImm' class + if (Kind == MCK_PKHLSLImm) { + if (Operand.isPKHLSLImm()) + return MCTargetAsmParser::Match_Success; + } + + // 'PostIdxImm8' class + if (Kind == MCK_PostIdxImm8) { + if (Operand.isPostIdxImm8()) + return MCTargetAsmParser::Match_Success; + } + + // 'PostIdxImm8s4' class + if (Kind == MCK_PostIdxImm8s4) { + if (Operand.isPostIdxImm8s4()) + return MCTargetAsmParser::Match_Success; + } + + // 'PostIdxReg' class + if (Kind == MCK_PostIdxReg) { + if (Operand.isPostIdxReg()) + return MCTargetAsmParser::Match_Success; + } + + // 'PostIdxRegShifted' class + if (Kind == MCK_PostIdxRegShifted) { + if (Operand.isPostIdxRegShifted()) + return MCTargetAsmParser::Match_Success; + } + + // 'ProcIFlags' class + if (Kind == MCK_ProcIFlags) { + if (Operand.isProcIFlags()) + return MCTargetAsmParser::Match_Success; + } + + // 'RegList' class + if (Kind == MCK_RegList) { + if (Operand.isRegList()) + return MCTargetAsmParser::Match_Success; + } + + // 'RotImm' class + if (Kind == MCK_RotImm) { + if (Operand.isRotImm()) + return MCTargetAsmParser::Match_Success; + } + + // 'SPRRegList' class + if (Kind == MCK_SPRRegList) { + if (Operand.isSPRRegList()) + return MCTargetAsmParser::Match_Success; + } + + // 'SetEndImm' class + if (Kind == MCK_SetEndImm) { + if (Operand.isSetEndImm()) + return MCTargetAsmParser::Match_Success; + } + + // 'RegShiftedImm' class + if (Kind == MCK_RegShiftedImm) { + if (Operand.isRegShiftedImm()) + return MCTargetAsmParser::Match_Success; + } + + // 'RegShiftedReg' class + if (Kind == MCK_RegShiftedReg) { + if (Operand.isRegShiftedReg()) + return MCTargetAsmParser::Match_Success; + } + + // 'ShifterImm' class + if (Kind == MCK_ShifterImm) { + if (Operand.isShifterImm()) + return MCTargetAsmParser::Match_Success; + } + + // 'ThumbMemPC' class + if (Kind == MCK_ThumbMemPC) { + if (Operand.isThumbMemPC()) + return MCTargetAsmParser::Match_Success; + } + + // 'ImmThumbSR' class + if (Kind == MCK_ImmThumbSR) { + if (Operand.isImmThumbSR()) + return MCTargetAsmParser::Match_Success; + } + + // 'UnsignedOffset_b8s2' class + if (Kind == MCK_UnsignedOffset_b8s2) { + if (Operand.isUnsignedOffset<8, 2>()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListDPairAllLanes' class + if (Kind == MCK_VecListDPairAllLanes) { + if (Operand.isVecListDPairAllLanes()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListDPair' class + if (Kind == MCK_VecListDPair) { + if (Operand.isVecListDPair()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListDPairSpacedAllLanes' class + if (Kind == MCK_VecListDPairSpacedAllLanes) { + if (Operand.isVecListDPairSpacedAllLanes()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListDPairSpaced' class + if (Kind == MCK_VecListDPairSpaced) { + if (Operand.isVecListDPairSpaced()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListFourDAllLanes' class + if (Kind == MCK_VecListFourDAllLanes) { + if (Operand.isVecListFourDAllLanes()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListFourD' class + if (Kind == MCK_VecListFourD) { + if (Operand.isVecListFourD()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListFourDByteIndexed' class + if (Kind == MCK_VecListFourDByteIndexed) { + if (Operand.isVecListFourDByteIndexed()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListFourDHWordIndexed' class + if (Kind == MCK_VecListFourDHWordIndexed) { + if (Operand.isVecListFourDHWordIndexed()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListFourDWordIndexed' class + if (Kind == MCK_VecListFourDWordIndexed) { + if (Operand.isVecListFourDWordIndexed()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListFourQAllLanes' class + if (Kind == MCK_VecListFourQAllLanes) { + if (Operand.isVecListFourQAllLanes()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListFourQ' class + if (Kind == MCK_VecListFourQ) { + if (Operand.isVecListFourQ()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListFourQHWordIndexed' class + if (Kind == MCK_VecListFourQHWordIndexed) { + if (Operand.isVecListFourQHWordIndexed()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListFourQWordIndexed' class + if (Kind == MCK_VecListFourQWordIndexed) { + if (Operand.isVecListFourQWordIndexed()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListOneDAllLanes' class + if (Kind == MCK_VecListOneDAllLanes) { + if (Operand.isVecListOneDAllLanes()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListOneD' class + if (Kind == MCK_VecListOneD) { + if (Operand.isVecListOneD()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListOneDByteIndexed' class + if (Kind == MCK_VecListOneDByteIndexed) { + if (Operand.isVecListOneDByteIndexed()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListOneDHWordIndexed' class + if (Kind == MCK_VecListOneDHWordIndexed) { + if (Operand.isVecListOneDHWordIndexed()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListOneDWordIndexed' class + if (Kind == MCK_VecListOneDWordIndexed) { + if (Operand.isVecListOneDWordIndexed()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListThreeDAllLanes' class + if (Kind == MCK_VecListThreeDAllLanes) { + if (Operand.isVecListThreeDAllLanes()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListThreeD' class + if (Kind == MCK_VecListThreeD) { + if (Operand.isVecListThreeD()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListThreeDByteIndexed' class + if (Kind == MCK_VecListThreeDByteIndexed) { + if (Operand.isVecListThreeDByteIndexed()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListThreeDHWordIndexed' class + if (Kind == MCK_VecListThreeDHWordIndexed) { + if (Operand.isVecListThreeDHWordIndexed()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListThreeDWordIndexed' class + if (Kind == MCK_VecListThreeDWordIndexed) { + if (Operand.isVecListThreeDWordIndexed()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListThreeQAllLanes' class + if (Kind == MCK_VecListThreeQAllLanes) { + if (Operand.isVecListThreeQAllLanes()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListThreeQ' class + if (Kind == MCK_VecListThreeQ) { + if (Operand.isVecListThreeQ()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListThreeQHWordIndexed' class + if (Kind == MCK_VecListThreeQHWordIndexed) { + if (Operand.isVecListThreeQHWordIndexed()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListThreeQWordIndexed' class + if (Kind == MCK_VecListThreeQWordIndexed) { + if (Operand.isVecListThreeQWordIndexed()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListTwoDByteIndexed' class + if (Kind == MCK_VecListTwoDByteIndexed) { + if (Operand.isVecListTwoDByteIndexed()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListTwoDHWordIndexed' class + if (Kind == MCK_VecListTwoDHWordIndexed) { + if (Operand.isVecListTwoDHWordIndexed()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListTwoDWordIndexed' class + if (Kind == MCK_VecListTwoDWordIndexed) { + if (Operand.isVecListTwoDWordIndexed()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListTwoQHWordIndexed' class + if (Kind == MCK_VecListTwoQHWordIndexed) { + if (Operand.isVecListTwoQHWordIndexed()) + return MCTargetAsmParser::Match_Success; + } + + // 'VecListTwoQWordIndexed' class + if (Kind == MCK_VecListTwoQWordIndexed) { + if (Operand.isVecListTwoQWordIndexed()) + return MCTargetAsmParser::Match_Success; + } + + // 'VectorIndex16' class + if (Kind == MCK_VectorIndex16) { + if (Operand.isVectorIndex16()) + return MCTargetAsmParser::Match_Success; + } + + // 'VectorIndex32' class + if (Kind == MCK_VectorIndex32) { + if (Operand.isVectorIndex32()) + return MCTargetAsmParser::Match_Success; + } + + // 'VectorIndex8' class + if (Kind == MCK_VectorIndex8) { + if (Operand.isVectorIndex8()) + return MCTargetAsmParser::Match_Success; + } + + // 'MemTBB' class + if (Kind == MCK_MemTBB) { + if (Operand.isMemTBB()) + return MCTargetAsmParser::Match_Success; + } + + // 'MemTBH' class + if (Kind == MCK_MemTBH) { + if (Operand.isMemTBH()) + return MCTargetAsmParser::Match_Success; + } + + // 'FBits16' class + if (Kind == MCK_FBits16) { + if (Operand.isFBits16()) + return MCTargetAsmParser::Match_Success; + } + + // 'FBits32' class + if (Kind == MCK_FBits32) { + if (Operand.isFBits32()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm0_4095' class + if (Kind == MCK_Imm0_4095) { + if (Operand.isImm0_4095()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm0_4095Neg' class + if (Kind == MCK_Imm0_4095Neg) { + if (Operand.isImm0_4095Neg()) + return MCTargetAsmParser::Match_Success; + } + + // 'ITMask' class + if (Kind == MCK_ITMask) { + if (Operand.isITMask()) + return MCTargetAsmParser::Match_Success; + } + + // 'ITCondCode' class + if (Kind == MCK_ITCondCode) { + if (Operand.isITCondCode()) + return MCTargetAsmParser::Match_Success; + } + + // 'NEONi16splat' class + if (Kind == MCK_NEONi16splat) { + if (Operand.isNEONi16splat()) + return MCTargetAsmParser::Match_Success; + } + + // 'NEONi32splat' class + if (Kind == MCK_NEONi32splat) { + if (Operand.isNEONi32splat()) + return MCTargetAsmParser::Match_Success; + } + + // 'NEONi64splat' class + if (Kind == MCK_NEONi64splat) { + if (Operand.isNEONi64splat()) + return MCTargetAsmParser::Match_Success; + } + + // 'NEONi8splat' class + if (Kind == MCK_NEONi8splat) { + if (Operand.isNEONi8splat()) + return MCTargetAsmParser::Match_Success; + } + + // 'NEONi16splatNot' class + if (Kind == MCK_NEONi16splatNot) { + if (Operand.isNEONi16splatNot()) + return MCTargetAsmParser::Match_Success; + } + + // 'NEONi32splatNot' class + if (Kind == MCK_NEONi32splatNot) { + if (Operand.isNEONi32splatNot()) + return MCTargetAsmParser::Match_Success; + } + + // 'NEONi16vmovByteReplicate' class + if (Kind == MCK_NEONi16vmovByteReplicate) { + if (Operand.isNEONi16ByteReplicate()) + return MCTargetAsmParser::Match_Success; + } + + // 'NEONi32vmov' class + if (Kind == MCK_NEONi32vmov) { + if (Operand.isNEONi32vmov()) + return MCTargetAsmParser::Match_Success; + } + + // 'NEONi32vmovByteReplicate' class + if (Kind == MCK_NEONi32vmovByteReplicate) { + if (Operand.isNEONi32ByteReplicate()) + return MCTargetAsmParser::Match_Success; + } + + // 'NEONi32vmovNeg' class + if (Kind == MCK_NEONi32vmovNeg) { + if (Operand.isNEONi32vmovNeg()) + return MCTargetAsmParser::Match_Success; + } + + // 'NEONi16invByteReplicate' class + if (Kind == MCK_NEONi16invByteReplicate) { + if (Operand.isNEONi16ByteReplicate()) + return MCTargetAsmParser::Match_Success; + } + + // 'NEONi32invByteReplicate' class + if (Kind == MCK_NEONi32invByteReplicate) { + if (Operand.isNEONi32ByteReplicate()) + return MCTargetAsmParser::Match_Success; + } + + // 'ShrImm16' class + if (Kind == MCK_ShrImm16) { + if (Operand.isShrImm16()) + return MCTargetAsmParser::Match_Success; + } + + // 'ShrImm32' class + if (Kind == MCK_ShrImm32) { + if (Operand.isShrImm32()) + return MCTargetAsmParser::Match_Success; + } + + // 'ShrImm64' class + if (Kind == MCK_ShrImm64) { + if (Operand.isShrImm64()) + return MCTargetAsmParser::Match_Success; + } + + // 'ShrImm8' class + if (Kind == MCK_ShrImm8) { + if (Operand.isShrImm8()) + return MCTargetAsmParser::Match_Success; + } + + // 'T2SOImm' class + if (Kind == MCK_T2SOImm) { + if (Operand.isT2SOImm()) + return MCTargetAsmParser::Match_Success; + } + + // 'T2SOImmNeg' class + if (Kind == MCK_T2SOImmNeg) { + if (Operand.isT2SOImmNeg()) + return MCTargetAsmParser::Match_Success; + } + + // 'T2SOImmNot' class + if (Kind == MCK_T2SOImmNot) { + if (Operand.isT2SOImmNot()) + return MCTargetAsmParser::Match_Success; + } + + // 'MemUImm12Offset' class + if (Kind == MCK_MemUImm12Offset) { + if (Operand.isMemUImm12Offset()) + return MCTargetAsmParser::Match_Success; + } + + // 'T2MemRegOffset' class + if (Kind == MCK_T2MemRegOffset) { + if (Operand.isT2MemRegOffset()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm8s4' class + if (Kind == MCK_Imm8s4) { + if (Operand.isImm8s4()) + return MCTargetAsmParser::Match_Success; + } + + // 'MemPCRelImm12' class + if (Kind == MCK_MemPCRelImm12) { + if (Operand.isMemPCRelImm12()) + return MCTargetAsmParser::Match_Success; + } + + // 'MemThumbRIs1' class + if (Kind == MCK_MemThumbRIs1) { + if (Operand.isMemThumbRIs1()) + return MCTargetAsmParser::Match_Success; + } + + // 'MemThumbRIs2' class + if (Kind == MCK_MemThumbRIs2) { + if (Operand.isMemThumbRIs2()) + return MCTargetAsmParser::Match_Success; + } + + // 'MemThumbRIs4' class + if (Kind == MCK_MemThumbRIs4) { + if (Operand.isMemThumbRIs4()) + return MCTargetAsmParser::Match_Success; + } + + // 'MemThumbRR' class + if (Kind == MCK_MemThumbRR) { + if (Operand.isMemThumbRR()) + return MCTargetAsmParser::Match_Success; + } + + // 'MemThumbSPI' class + if (Kind == MCK_MemThumbSPI) { + if (Operand.isMemThumbSPI()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm0_1020s4' class + if (Kind == MCK_Imm0_1020s4) { + if (Operand.isImm0_1020s4()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm0_508s4' class + if (Kind == MCK_Imm0_508s4) { + if (Operand.isImm0_508s4()) + return MCTargetAsmParser::Match_Success; + } + + // 'Imm0_508s4Neg' class + if (Kind == MCK_Imm0_508s4Neg) { + if (Operand.isImm0_508s4Neg()) + return MCTargetAsmParser::Match_Success; + } + + if (Operand.isReg()) { + MatchClassKind OpKind; + switch (Operand.getReg()) { + default: OpKind = InvalidMatchClass; break; + case ARM::R0: OpKind = MCK_Reg0; break; + case ARM::R1: OpKind = MCK_Reg0; break; + case ARM::R2: OpKind = MCK_Reg0; break; + case ARM::R3: OpKind = MCK_Reg0; break; + case ARM::R4: OpKind = MCK_tGPR; break; + case ARM::R5: OpKind = MCK_tGPR; break; + case ARM::R6: OpKind = MCK_tGPR; break; + case ARM::R7: OpKind = MCK_tGPR; break; + case ARM::R8: OpKind = MCK_Reg9; break; + case ARM::R9: OpKind = MCK_Reg9; break; + case ARM::R10: OpKind = MCK_Reg9; break; + case ARM::R11: OpKind = MCK_Reg9; break; + case ARM::R12: OpKind = MCK_Reg10; break; + case ARM::SP: OpKind = MCK_GPRsp; break; + case ARM::LR: OpKind = MCK_LR; break; + case ARM::PC: OpKind = MCK_PC; break; + case ARM::S0: OpKind = MCK_SPR_8; break; + case ARM::S1: OpKind = MCK_SPR_8; break; + case ARM::S2: OpKind = MCK_SPR_8; break; + case ARM::S3: OpKind = MCK_SPR_8; break; + case ARM::S4: OpKind = MCK_SPR_8; break; + case ARM::S5: OpKind = MCK_SPR_8; break; + case ARM::S6: OpKind = MCK_SPR_8; break; + case ARM::S7: OpKind = MCK_SPR_8; break; + case ARM::S8: OpKind = MCK_SPR_8; break; + case ARM::S9: OpKind = MCK_SPR_8; break; + case ARM::S10: OpKind = MCK_SPR_8; break; + case ARM::S11: OpKind = MCK_SPR_8; break; + case ARM::S12: OpKind = MCK_SPR_8; break; + case ARM::S13: OpKind = MCK_SPR_8; break; + case ARM::S14: OpKind = MCK_SPR_8; break; + case ARM::S15: OpKind = MCK_SPR_8; break; + case ARM::S16: OpKind = MCK_SPR; break; + case ARM::S17: OpKind = MCK_SPR; break; + case ARM::S18: OpKind = MCK_SPR; break; + case ARM::S19: OpKind = MCK_SPR; break; + case ARM::S20: OpKind = MCK_SPR; break; + case ARM::S21: OpKind = MCK_SPR; break; + case ARM::S22: OpKind = MCK_SPR; break; + case ARM::S23: OpKind = MCK_SPR; break; + case ARM::S24: OpKind = MCK_SPR; break; + case ARM::S25: OpKind = MCK_SPR; break; + case ARM::S26: OpKind = MCK_SPR; break; + case ARM::S27: OpKind = MCK_SPR; break; + case ARM::S28: OpKind = MCK_SPR; break; + case ARM::S29: OpKind = MCK_SPR; break; + case ARM::S30: OpKind = MCK_SPR; break; + case ARM::S31: OpKind = MCK_SPR; break; + case ARM::D0: OpKind = MCK_DPR_8; break; + case ARM::D1: OpKind = MCK_DPR_8; break; + case ARM::D2: OpKind = MCK_DPR_8; break; + case ARM::D3: OpKind = MCK_DPR_8; break; + case ARM::D4: OpKind = MCK_DPR_8; break; + case ARM::D5: OpKind = MCK_DPR_8; break; + case ARM::D6: OpKind = MCK_DPR_8; break; + case ARM::D7: OpKind = MCK_DPR_8; break; + case ARM::D8: OpKind = MCK_DPR_VFP2; break; + case ARM::D9: OpKind = MCK_DPR_VFP2; break; + case ARM::D10: OpKind = MCK_DPR_VFP2; break; + case ARM::D11: OpKind = MCK_DPR_VFP2; break; + case ARM::D12: OpKind = MCK_DPR_VFP2; break; + case ARM::D13: OpKind = MCK_DPR_VFP2; break; + case ARM::D14: OpKind = MCK_DPR_VFP2; break; + case ARM::D15: OpKind = MCK_DPR_VFP2; break; + case ARM::D16: OpKind = MCK_DPR; break; + case ARM::D17: OpKind = MCK_DPR; break; + case ARM::D18: OpKind = MCK_DPR; break; + case ARM::D19: OpKind = MCK_DPR; break; + case ARM::D20: OpKind = MCK_DPR; break; + case ARM::D21: OpKind = MCK_DPR; break; + case ARM::D22: OpKind = MCK_DPR; break; + case ARM::D23: OpKind = MCK_DPR; break; + case ARM::D24: OpKind = MCK_DPR; break; + case ARM::D25: OpKind = MCK_DPR; break; + case ARM::D26: OpKind = MCK_DPR; break; + case ARM::D27: OpKind = MCK_DPR; break; + case ARM::D28: OpKind = MCK_DPR; break; + case ARM::D29: OpKind = MCK_DPR; break; + case ARM::D30: OpKind = MCK_DPR; break; + case ARM::D31: OpKind = MCK_DPR; break; + case ARM::Q0: OpKind = MCK_QPR_8; break; + case ARM::Q1: OpKind = MCK_QPR_8; break; + case ARM::Q2: OpKind = MCK_QPR_8; break; + case ARM::Q3: OpKind = MCK_QPR_8; break; + case ARM::Q4: OpKind = MCK_QPR_VFP2; break; + case ARM::Q5: OpKind = MCK_QPR_VFP2; break; + case ARM::Q6: OpKind = MCK_QPR_VFP2; break; + case ARM::Q7: OpKind = MCK_QPR_VFP2; break; + case ARM::Q8: OpKind = MCK_QPR; break; + case ARM::Q9: OpKind = MCK_QPR; break; + case ARM::Q10: OpKind = MCK_QPR; break; + case ARM::Q11: OpKind = MCK_QPR; break; + case ARM::Q12: OpKind = MCK_QPR; break; + case ARM::Q13: OpKind = MCK_QPR; break; + case ARM::Q14: OpKind = MCK_QPR; break; + case ARM::Q15: OpKind = MCK_QPR; break; + case ARM::CPSR: OpKind = MCK_CCR; break; + case ARM::APSR: OpKind = MCK_APSR; break; + case ARM::APSR_NZCV: OpKind = MCK_APSR_NZCV; break; + case ARM::SPSR: OpKind = MCK_SPSR; break; + case ARM::FPSCR: OpKind = MCK_FPSCR; break; + case ARM::FPSID: OpKind = MCK_FPSID; break; + case ARM::MVFR2: OpKind = MCK_MVFR2; break; + case ARM::MVFR1: OpKind = MCK_MVFR1; break; + case ARM::MVFR0: OpKind = MCK_MVFR0; break; + case ARM::FPEXC: OpKind = MCK_FPEXC; break; + case ARM::FPINST: OpKind = MCK_FPINST; break; + case ARM::FPINST2: OpKind = MCK_FPINST2; break; + case ARM::D0_D2: OpKind = MCK_Reg39; break; + case ARM::D1_D3: OpKind = MCK_Reg39; break; + case ARM::D2_D4: OpKind = MCK_Reg39; break; + case ARM::D3_D5: OpKind = MCK_Reg39; break; + case ARM::D4_D6: OpKind = MCK_Reg39; break; + case ARM::D5_D7: OpKind = MCK_Reg39; break; + case ARM::D6_D8: OpKind = MCK_Reg40; break; + case ARM::D7_D9: OpKind = MCK_Reg40; break; + case ARM::D8_D10: OpKind = MCK_Reg41; break; + case ARM::D9_D11: OpKind = MCK_Reg41; break; + case ARM::D10_D12: OpKind = MCK_Reg41; break; + case ARM::D11_D13: OpKind = MCK_Reg41; break; + case ARM::D12_D14: OpKind = MCK_Reg41; break; + case ARM::D13_D15: OpKind = MCK_Reg41; break; + case ARM::D14_D16: OpKind = MCK_Reg42; break; + case ARM::D15_D17: OpKind = MCK_Reg42; break; + case ARM::D16_D18: OpKind = MCK_DPairSpc; break; + case ARM::D17_D19: OpKind = MCK_DPairSpc; break; + case ARM::D18_D20: OpKind = MCK_DPairSpc; break; + case ARM::D19_D21: OpKind = MCK_DPairSpc; break; + case ARM::D20_D22: OpKind = MCK_DPairSpc; break; + case ARM::D21_D23: OpKind = MCK_DPairSpc; break; + case ARM::D22_D24: OpKind = MCK_DPairSpc; break; + case ARM::D23_D25: OpKind = MCK_DPairSpc; break; + case ARM::D24_D26: OpKind = MCK_DPairSpc; break; + case ARM::D25_D27: OpKind = MCK_DPairSpc; break; + case ARM::D26_D28: OpKind = MCK_DPairSpc; break; + case ARM::D27_D29: OpKind = MCK_DPairSpc; break; + case ARM::D28_D30: OpKind = MCK_DPairSpc; break; + case ARM::D29_D31: OpKind = MCK_DPairSpc; break; + case ARM::Q0_Q1: OpKind = MCK_Reg44; break; + case ARM::Q1_Q2: OpKind = MCK_Reg44; break; + case ARM::Q2_Q3: OpKind = MCK_Reg44; break; + case ARM::Q3_Q4: OpKind = MCK_Reg45; break; + case ARM::Q4_Q5: OpKind = MCK_Reg46; break; + case ARM::Q5_Q6: OpKind = MCK_Reg46; break; + case ARM::Q6_Q7: OpKind = MCK_Reg46; break; + case ARM::Q7_Q8: OpKind = MCK_Reg47; break; + case ARM::Q8_Q9: OpKind = MCK_QQPR; break; + case ARM::Q9_Q10: OpKind = MCK_QQPR; break; + case ARM::Q10_Q11: OpKind = MCK_QQPR; break; + case ARM::Q11_Q12: OpKind = MCK_QQPR; break; + case ARM::Q12_Q13: OpKind = MCK_QQPR; break; + case ARM::Q13_Q14: OpKind = MCK_QQPR; break; + case ARM::Q14_Q15: OpKind = MCK_QQPR; break; + case ARM::Q0_Q1_Q2_Q3: OpKind = MCK_Reg58; break; + case ARM::Q1_Q2_Q3_Q4: OpKind = MCK_Reg59; break; + case ARM::Q2_Q3_Q4_Q5: OpKind = MCK_Reg60; break; + case ARM::Q3_Q4_Q5_Q6: OpKind = MCK_Reg61; break; + case ARM::Q4_Q5_Q6_Q7: OpKind = MCK_Reg62; break; + case ARM::Q5_Q6_Q7_Q8: OpKind = MCK_Reg63; break; + case ARM::Q6_Q7_Q8_Q9: OpKind = MCK_Reg64; break; + case ARM::Q7_Q8_Q9_Q10: OpKind = MCK_Reg65; break; + case ARM::Q8_Q9_Q10_Q11: OpKind = MCK_QQQQPR; break; + case ARM::Q9_Q10_Q11_Q12: OpKind = MCK_QQQQPR; break; + case ARM::Q10_Q11_Q12_Q13: OpKind = MCK_QQQQPR; break; + case ARM::Q11_Q12_Q13_Q14: OpKind = MCK_QQQQPR; break; + case ARM::Q12_Q13_Q14_Q15: OpKind = MCK_QQQQPR; break; + case ARM::R0_R1: OpKind = MCK_Reg67; break; + case ARM::R2_R3: OpKind = MCK_Reg67; break; + case ARM::R4_R5: OpKind = MCK_Reg68; break; + case ARM::R6_R7: OpKind = MCK_Reg68; break; + case ARM::R8_R9: OpKind = MCK_Reg72; break; + case ARM::R10_R11: OpKind = MCK_Reg72; break; + case ARM::R12_SP: OpKind = MCK_Reg74; break; + case ARM::D0_D1_D2: OpKind = MCK_Reg82; break; + case ARM::D1_D2_D3: OpKind = MCK_Reg87; break; + case ARM::D2_D3_D4: OpKind = MCK_Reg82; break; + case ARM::D3_D4_D5: OpKind = MCK_Reg87; break; + case ARM::D4_D5_D6: OpKind = MCK_Reg82; break; + case ARM::D5_D6_D7: OpKind = MCK_Reg87; break; + case ARM::D6_D7_D8: OpKind = MCK_Reg83; break; + case ARM::D7_D8_D9: OpKind = MCK_Reg88; break; + case ARM::D8_D9_D10: OpKind = MCK_Reg84; break; + case ARM::D9_D10_D11: OpKind = MCK_Reg89; break; + case ARM::D10_D11_D12: OpKind = MCK_Reg84; break; + case ARM::D11_D12_D13: OpKind = MCK_Reg89; break; + case ARM::D12_D13_D14: OpKind = MCK_Reg84; break; + case ARM::D13_D14_D15: OpKind = MCK_Reg89; break; + case ARM::D14_D15_D16: OpKind = MCK_Reg85; break; + case ARM::D15_D16_D17: OpKind = MCK_Reg90; break; + case ARM::D16_D17_D18: OpKind = MCK_Reg86; break; + case ARM::D17_D18_D19: OpKind = MCK_Reg91; break; + case ARM::D18_D19_D20: OpKind = MCK_Reg86; break; + case ARM::D19_D20_D21: OpKind = MCK_Reg91; break; + case ARM::D20_D21_D22: OpKind = MCK_Reg86; break; + case ARM::D21_D22_D23: OpKind = MCK_Reg91; break; + case ARM::D22_D23_D24: OpKind = MCK_Reg86; break; + case ARM::D23_D24_D25: OpKind = MCK_Reg91; break; + case ARM::D24_D25_D26: OpKind = MCK_Reg86; break; + case ARM::D25_D26_D27: OpKind = MCK_Reg91; break; + case ARM::D26_D27_D28: OpKind = MCK_Reg86; break; + case ARM::D27_D28_D29: OpKind = MCK_Reg91; break; + case ARM::D28_D29_D30: OpKind = MCK_Reg86; break; + case ARM::D29_D30_D31: OpKind = MCK_Reg91; break; + case ARM::D0_D2_D4: OpKind = MCK_Reg92; break; + case ARM::D1_D3_D5: OpKind = MCK_Reg92; break; + case ARM::D2_D4_D6: OpKind = MCK_Reg92; break; + case ARM::D3_D5_D7: OpKind = MCK_Reg92; break; + case ARM::D4_D6_D8: OpKind = MCK_Reg93; break; + case ARM::D5_D7_D9: OpKind = MCK_Reg93; break; + case ARM::D6_D8_D10: OpKind = MCK_Reg94; break; + case ARM::D7_D9_D11: OpKind = MCK_Reg94; break; + case ARM::D8_D10_D12: OpKind = MCK_Reg95; break; + case ARM::D9_D11_D13: OpKind = MCK_Reg95; break; + case ARM::D10_D12_D14: OpKind = MCK_Reg95; break; + case ARM::D11_D13_D15: OpKind = MCK_Reg95; break; + case ARM::D12_D14_D16: OpKind = MCK_Reg96; break; + case ARM::D13_D15_D17: OpKind = MCK_Reg96; break; + case ARM::D14_D16_D18: OpKind = MCK_Reg97; break; + case ARM::D15_D17_D19: OpKind = MCK_Reg97; break; + case ARM::D16_D18_D20: OpKind = MCK_DTripleSpc; break; + case ARM::D17_D19_D21: OpKind = MCK_DTripleSpc; break; + case ARM::D18_D20_D22: OpKind = MCK_DTripleSpc; break; + case ARM::D19_D21_D23: OpKind = MCK_DTripleSpc; break; + case ARM::D20_D22_D24: OpKind = MCK_DTripleSpc; break; + case ARM::D21_D23_D25: OpKind = MCK_DTripleSpc; break; + case ARM::D22_D24_D26: OpKind = MCK_DTripleSpc; break; + case ARM::D23_D25_D27: OpKind = MCK_DTripleSpc; break; + case ARM::D24_D26_D28: OpKind = MCK_DTripleSpc; break; + case ARM::D25_D27_D29: OpKind = MCK_DTripleSpc; break; + case ARM::D26_D28_D30: OpKind = MCK_DTripleSpc; break; + case ARM::D27_D29_D31: OpKind = MCK_DTripleSpc; break; + case ARM::D1_D2: OpKind = MCK_Reg25; break; + case ARM::D3_D4: OpKind = MCK_Reg25; break; + case ARM::D5_D6: OpKind = MCK_Reg25; break; + case ARM::D7_D8: OpKind = MCK_Reg26; break; + case ARM::D9_D10: OpKind = MCK_Reg23; break; + case ARM::D11_D12: OpKind = MCK_Reg23; break; + case ARM::D13_D14: OpKind = MCK_Reg23; break; + case ARM::D15_D16: OpKind = MCK_Reg24; break; + case ARM::D17_D18: OpKind = MCK_DPair; break; + case ARM::D19_D20: OpKind = MCK_DPair; break; + case ARM::D21_D22: OpKind = MCK_DPair; break; + case ARM::D23_D24: OpKind = MCK_DPair; break; + case ARM::D25_D26: OpKind = MCK_DPair; break; + case ARM::D27_D28: OpKind = MCK_DPair; break; + case ARM::D29_D30: OpKind = MCK_DPair; break; + case ARM::D1_D2_D3_D4: OpKind = MCK_Reg99; break; + case ARM::D3_D4_D5_D6: OpKind = MCK_Reg99; break; + case ARM::D5_D6_D7_D8: OpKind = MCK_Reg100; break; + case ARM::D7_D8_D9_D10: OpKind = MCK_Reg101; break; + case ARM::D9_D10_D11_D12: OpKind = MCK_Reg102; break; + case ARM::D11_D12_D13_D14: OpKind = MCK_Reg102; break; + case ARM::D13_D14_D15_D16: OpKind = MCK_Reg103; break; + case ARM::D15_D16_D17_D18: OpKind = MCK_Reg104; break; + case ARM::D17_D18_D19_D20: OpKind = MCK_Reg105; break; + case ARM::D19_D20_D21_D22: OpKind = MCK_Reg105; break; + case ARM::D21_D22_D23_D24: OpKind = MCK_Reg105; break; + case ARM::D23_D24_D25_D26: OpKind = MCK_Reg105; break; + case ARM::D25_D26_D27_D28: OpKind = MCK_Reg105; break; + case ARM::D27_D28_D29_D30: OpKind = MCK_Reg105; break; + } + return isSubclass(OpKind, Kind) ? MCTargetAsmParser::Match_Success : + MCTargetAsmParser::Match_InvalidOperand; + } + + return MCTargetAsmParser::Match_InvalidOperand; +} + +uint64_t ARMAsmParser:: +ComputeAvailableFeatures(const FeatureBitset& FB) const { + uint64_t Features = 0; + if ((FB[ARM::HasV4TOps])) + Features |= Feature_HasV4T; + if ((FB[ARM::HasV5TOps])) + Features |= Feature_HasV5T; + if ((FB[ARM::HasV5TEOps])) + Features |= Feature_HasV5TE; + if ((FB[ARM::HasV6Ops])) + Features |= Feature_HasV6; + if ((FB[ARM::HasV6MOps])) + Features |= Feature_HasV6M; + if ((FB[ARM::HasV8MBaselineOps])) + Features |= Feature_HasV8MBaseline; + if ((FB[ARM::HasV8MMainlineOps])) + Features |= Feature_HasV8MMainline; + if ((FB[ARM::HasV6T2Ops])) + Features |= Feature_HasV6T2; + if ((FB[ARM::HasV6KOps])) + Features |= Feature_HasV6K; + if ((FB[ARM::HasV7Ops])) + Features |= Feature_HasV7; + if ((FB[ARM::HasV8Ops])) + Features |= Feature_HasV8; + if ((!FB[ARM::HasV8Ops])) + Features |= Feature_PreV8; + if ((FB[ARM::HasV8_1aOps])) + Features |= Feature_HasV8_1a; + if ((FB[ARM::HasV8_2aOps])) + Features |= Feature_HasV8_2a; + if ((FB[ARM::FeatureVFP2])) + Features |= Feature_HasVFP2; + if ((FB[ARM::FeatureVFP3])) + Features |= Feature_HasVFP3; + if ((FB[ARM::FeatureVFP4])) + Features |= Feature_HasVFP4; + if ((!FB[ARM::FeatureVFPOnlySP])) + Features |= Feature_HasDPVFP; + if ((FB[ARM::FeatureFPARMv8])) + Features |= Feature_HasFPARMv8; + if ((FB[ARM::FeatureNEON])) + Features |= Feature_HasNEON; + if ((FB[ARM::FeatureCrypto])) + Features |= Feature_HasCrypto; + if ((FB[ARM::FeatureCRC])) + Features |= Feature_HasCRC; + if ((FB[ARM::FeatureFP16])) + Features |= Feature_HasFP16; + if ((FB[ARM::FeatureFullFP16])) + Features |= Feature_HasFullFP16; + if ((FB[ARM::FeatureHWDiv])) + Features |= Feature_HasDivide; + if ((FB[ARM::FeatureHWDivARM])) + Features |= Feature_HasDivideInARM; + if ((FB[ARM::FeatureT2XtPk])) + Features |= Feature_HasT2ExtractPack; + if ((FB[ARM::FeatureDSP])) + Features |= Feature_HasDSP; + if ((FB[ARM::FeatureDB])) + Features |= Feature_HasDB; + if ((FB[ARM::FeatureV7Clrex])) + Features |= Feature_HasV7Clrex; + if ((FB[ARM::FeatureAcquireRelease])) + Features |= Feature_HasAcquireRelease; + if ((FB[ARM::FeatureMP])) + Features |= Feature_HasMP; + if ((FB[ARM::FeatureVirtualization])) + Features |= Feature_HasVirtualization; + if ((FB[ARM::FeatureTrustZone])) + Features |= Feature_HasTrustZone; + if ((FB[ARM::Feature8MSecExt])) + Features |= Feature_Has8MSecExt; + if ((FB[ARM::ModeThumb])) + Features |= Feature_IsThumb; + if ((FB[ARM::ModeThumb]) && (FB[ARM::FeatureThumb2])) + Features |= Feature_IsThumb2; + if ((FB[ARM::FeatureMClass])) + Features |= Feature_IsMClass; + if ((!FB[ARM::FeatureMClass])) + Features |= Feature_IsNotMClass; + if ((!FB[ARM::ModeThumb])) + Features |= Feature_IsARM; + if ((FB[ARM::FeatureNaClTrap])) + Features |= Feature_UseNaClTrap; + return Features; +} + +static const char *const MnemonicTable = + "\003adc\003add\004addw\003adr\004aesd\004aese\006aesimc\005aesmc\003and" + "\003asr\001b\003bfc\003bfi\003bic\004bkpt\002bl\003blx\005blxns\002bx\003" + "bxj\004bxns\004cbnz\003cbz\003cdp\004cdp2\005clrex\003clz\003cmn\003cmp" + "\003cps\006crc32b\007crc32cb\007crc32ch\007crc32cw\006crc32h\006crc32w\003" + "dbg\005dcps1\005dcps2\005dcps3\003dmb\003dsb\003eor\004eret\005faddd\005" + "fadds\006fcmpzd\006fcmpzs\007fconstd\007fconsts\007fldmdbx\007fldmiax\005" + "fmdhr\005fmdlr\006fmstat\007fstmdbx\007fstmiax\005fsubd\005fsubs\004hin" + "t\003hlt\003hvc\003isb\002it\003lda\004ldab\005ldaex\006ldaexb\006ldaex" + "d\006ldaexh\004ldah\003ldc\004ldc2\005ldc2l\004ldcl\003ldm\005ldmda\005" + "ldmdb\005ldmib\003ldr\004ldrb\005ldrbt\004ldrd\005ldrex\006ldrexb\006ld" + "rexd\006ldrexh\004ldrh\005ldrht\005ldrsb\006ldrsbt\005ldrsh\006ldrsht\004" + "ldrt\003lsl\003lsr\003mcr\004mcr2\004mcrr\005mcrr2\003mla\003mls\003mov" + "\004movs\004movt\004movw\003mrc\004mrc2\004mrrc\005mrrc2\003mrs\003msr\003" + "mul\003mvn\003neg\003nop\003orn\003orr\005pkhbt\005pkhtb\003pld\004pldw" + "\003pli\003pop\004push\004qadd\006qadd16\005qadd8\004qasx\005qdadd\005q" + "dsub\004qsax\004qsub\006qsub16\005qsub8\004rbit\003rev\005rev16\005revs" + "h\005rfeda\005rfedb\005rfeia\005rfeib\003ror\003rrx\003rsb\003rsc\006sa" + "dd16\005sadd8\004sasx\003sbc\004sbfx\004sdiv\003sel\006setend\006setpan" + "\003sev\004sevl\002sg\005sha1c\005sha1h\005sha1m\005sha1p\007sha1su0\007" + "sha1su1\007sha256h\010sha256h2\tsha256su0\tsha256su1\007shadd16\006shad" + "d8\005shasx\005shsax\007shsub16\006shsub8\003smc\006smlabb\006smlabt\005" + "smlad\006smladx\005smlal\007smlalbb\007smlalbt\006smlald\007smlaldx\007" + "smlaltb\007smlaltt\006smlatb\006smlatt\006smlawb\006smlawt\005smlsd\006" + "smlsdx\006smlsld\007smlsldx\005smmla\006smmlar\005smmls\006smmlsr\005sm" + "mul\006smmulr\005smuad\006smuadx\006smulbb\006smulbt\005smull\006smultb" + "\006smultt\006smulwb\006smulwt\005smusd\006smusdx\005srsda\005srsdb\005" + "srsia\005srsib\004ssat\006ssat16\004ssax\006ssub16\005ssub8\003stc\004s" + "tc2\005stc2l\004stcl\003stl\004stlb\005stlex\006stlexb\006stlexd\006stl" + "exh\004stlh\003stm\005stmda\005stmdb\005stmib\003str\004strb\005strbt\004" + "strd\005strex\006strexb\006strexd\006strexh\004strh\005strht\004strt\003" + "sub\004subs\004subw\003svc\003swp\004swpb\005sxtab\007sxtab16\005sxtah\004" + "sxtb\006sxtb16\004sxth\003tbb\003tbh\003teq\004trap\003tst\002tt\003tta" + "\004ttat\003ttt\006uadd16\005uadd8\004uasx\004ubfx\003udf\004udiv\007uh" + "add16\006uhadd8\005uhasx\005uhsax\007uhsub16\006uhsub8\005umaal\005umla" + "l\005umull\007uqadd16\006uqadd8\005uqasx\005uqsax\007uqsub16\006uqsub8\005" + "usad8\006usada8\004usat\006usat16\004usax\006usub16\005usub8\005uxtab\007" + "uxtab16\005uxtah\004uxtb\006uxtb16\004uxth\004vaba\005vabal\004vabd\005" + "vabdl\004vabs\005vacge\005vacgt\005vacle\005vaclt\004vadd\006vaddhn\005" + "vaddl\005vaddw\004vand\004vbic\004vbif\004vbit\004vbsl\004vceq\004vcge\004" + "vcgt\004vcle\004vcls\004vclt\004vclz\004vcmp\005vcmpe\004vcnt\004vcvt\005" + "vcvta\005vcvtb\005vcvtm\005vcvtn\005vcvtp\005vcvtr\005vcvtt\004vdiv\004" + "vdup\004veor\004vext\004vfma\004vfms\005vfnma\005vfnms\005vhadd\005vhsu" + "b\004vins\004vld1\004vld2\004vld3\004vld4\006vldmdb\006vldmia\004vldr\005" + "vlldm\005vlstm\004vmax\006vmaxnm\004vmin\006vminnm\004vmla\005vmlal\004" + "vmls\005vmlsl\004vmov\005vmovl\005vmovn\005vmovx\004vmrs\004vmsr\004vmu" + "l\005vmull\004vmvn\004vneg\005vnmla\005vnmls\005vnmul\004vorn\004vorr\006" + "vpadal\005vpadd\006vpaddl\005vpmax\005vpmin\004vpop\005vpush\005vqabs\005" + "vqadd\007vqdmlal\007vqdmlsl\007vqdmulh\007vqdmull\006vqmovn\007vqmovun\005" + "vqneg\010vqrdmlah\010vqrdmlsh\010vqrdmulh\006vqrshl\007vqrshrn\010vqrsh" + "run\005vqshl\006vqshlu\006vqshrn\007vqshrun\005vqsub\007vraddhn\006vrec" + "pe\006vrecps\006vrev16\006vrev32\006vrev64\006vrhadd\006vrinta\006vrint" + "m\006vrintn\006vrintp\006vrintr\006vrintx\006vrintz\005vrshl\005vrshr\006" + "vrshrn\007vrsqrte\007vrsqrts\005vrsra\007vrsubhn\006vseleq\006vselge\006" + "vselgt\006vselvs\004vshl\005vshll\004vshr\005vshrn\004vsli\005vsqrt\004" + "vsra\004vsri\004vst1\004vst2\004vst3\004vst4\006vstmdb\006vstmia\004vst" + "r\004vsub\006vsubhn\005vsubl\005vsubw\004vswp\004vtbl\004vtbx\004vtrn\004" + "vtst\004vuzp\004vzip\003wfe\003wfi\005yield"; + +namespace { + struct MatchEntry { + uint16_t Mnemonic; + uint16_t Opcode; + uint16_t ConvertFn; + uint64_t RequiredFeatures; + uint16_t Classes[18]; + StringRef getMnemonic() const { + return StringRef(MnemonicTable + Mnemonic + 1, + MnemonicTable[Mnemonic]); + } + }; + + // Predicate for searching for an opcode. + struct LessOpcode { + bool operator()(const MatchEntry &LHS, StringRef RHS) { + return LHS.getMnemonic() < RHS; + } + bool operator()(StringRef LHS, const MatchEntry &RHS) { + return LHS < RHS.getMnemonic(); + } + bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) { + return LHS.getMnemonic() < RHS.getMnemonic(); + } + }; +} // end anonymous namespace. + +static const MatchEntry MatchTable0[] = { + { 0 /* adc */, ARM::tADC, Convert__Reg1_2__CCOut1_0__Tie0__Reg1_3__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR }, }, + { 0 /* adc */, ARM::ADCrsr, Convert__Reg1_2__Reg1_2__RegShiftedReg3_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_RegShiftedReg }, }, + { 0 /* adc */, ARM::ADCrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 0 /* adc */, ARM::ADCri, Convert__Reg1_2__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, }, + { 0 /* adc */, ARM::ADCrsi, Convert__Reg1_2__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_RegShiftedImm }, }, + { 0 /* adc */, ARM::t2ADCrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 0 /* adc */, ARM::t2ADCrs, Convert__Reg1_2__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_RegShiftedImm }, }, + { 0 /* adc */, ARM::t2ADCri, Convert__Reg1_2__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_T2SOImm }, }, + { 0 /* adc */, ARM::ADCrsr, Convert__Reg1_2__Reg1_3__RegShiftedReg3_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_RegShiftedReg }, }, + { 0 /* adc */, ARM::ADCrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 0 /* adc */, ARM::ADCri, Convert__Reg1_2__Reg1_3__ModImm1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_ModImm }, }, + { 0 /* adc */, ARM::ADCrsi, Convert__Reg1_2__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_RegShiftedImm }, }, + { 0 /* adc */, ARM::t2ADCrr, Convert__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 0 /* adc */, ARM::t2ADCrs, Convert__Reg1_3__Reg1_4__RegShiftedImm2_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_RegShiftedImm }, }, + { 4 /* add */, ARM::tADDspr, Convert__Reg1_1__Tie0__Reg1_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_GPRsp, MCK_GPR }, }, + { 4 /* add */, ARM::tADDspi, Convert__Reg1_1__Tie0__Imm0_508s41_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_GPRsp, MCK_Imm0_508s4 }, }, + { 4 /* add */, ARM::tSUBspi, Convert__regSP__Tie0__Imm0_508s4Neg1_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_GPRsp, MCK_Imm0_508s4Neg }, }, + { 4 /* add */, ARM::t2ADDri12, Convert__Reg1_1__Reg1_1__Imm0_40951_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_Imm0_4095 }, }, + { 4 /* add */, ARM::t2SUBri12, Convert__Reg1_1__Reg1_1__Imm0_4095Neg1_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_Imm0_4095Neg }, }, + { 4 /* add */, ARM::tADDhirr, Convert__Reg1_1__Tie0__Reg1_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 4 /* add */, ARM::tADDi8, Convert__Reg1_2__CCOut1_0__Tie0__Imm0_2551_3__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_Imm0_255 }, }, + { 4 /* add */, ARM::t2ADDrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_rGPR }, }, + { 4 /* add */, ARM::t2ADDrs, Convert__Reg1_2__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_RegShiftedImm }, }, + { 4 /* add */, ARM::t2ADDri, Convert__Reg1_2__Reg1_2__T2SOImm1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_T2SOImm }, }, + { 4 /* add */, ARM::t2SUBri, Convert__Reg1_2__Reg1_2__T2SOImmNeg1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_T2SOImmNeg }, }, + { 4 /* add */, ARM::t2SUBri, Convert__Reg1_2__Reg1_2__T2SOImmNeg1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_T2SOImmNeg }, }, + { 4 /* add */, ARM::ADDrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 4 /* add */, ARM::ADDri, Convert__Reg1_2__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, }, + { 4 /* add */, ARM::SUBri, Convert__Reg1_2__Reg1_2__ModImmNeg1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImmNeg }, }, + { 4 /* add */, ARM::ADDrsi, Convert__Reg1_2__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_RegShiftedImm }, }, + { 4 /* add */, ARM::ADDrsr, Convert__Reg1_2__Reg1_2__RegShiftedReg3_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_RegShiftedReg }, }, + { 4 /* add */, ARM::tADDspi, Convert__regSP__Tie0__Imm0_508s41_3__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_GPRsp, MCK_GPRsp, MCK_Imm0_508s4 }, }, + { 4 /* add */, ARM::tSUBspi, Convert__regSP__Tie0__Imm0_508s4Neg1_3__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_GPRsp, MCK_GPRsp, MCK_Imm0_508s4Neg }, }, + { 4 /* add */, ARM::tADDrSPi, Convert__Reg1_1__Reg1_2__Imm0_1020s41_3__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_GPRsp, MCK_Imm0_1020s4 }, }, + { 4 /* add */, ARM::t2ADR, Convert__Reg1_1__Imm0_40951_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_PC, MCK_Imm0_4095 }, }, + { 4 /* add */, ARM::t2ADDri12, Convert__Reg1_1__Reg1_2__Imm0_40951_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_GPR, MCK_Imm0_4095 }, }, + { 4 /* add */, ARM::t2SUBri12, Convert__Reg1_1__Reg1_2__Imm0_4095Neg1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_GPR, MCK_Imm0_4095Neg }, }, + { 4 /* add */, ARM::tADDrSP, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_GPR, MCK_GPRsp, MCK_GPR }, }, + { 4 /* add */, ARM::t2SUBri, Convert__Reg1_3__Reg1_3__T2SOImmNeg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_T2SOImmNeg }, }, + { 4 /* add */, ARM::tADDrr, Convert__Reg1_2__CCOut1_0__Reg1_3__Reg1_4__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR, MCK_tGPR }, }, + { 4 /* add */, ARM::tADDi3, Convert__Reg1_2__CCOut1_0__Reg1_3__Imm0_71_4__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR, MCK_Imm0_7 }, }, + { 4 /* add */, ARM::t2ADDrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_rGPR }, }, + { 4 /* add */, ARM::t2ADDrs, Convert__Reg1_2__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_RegShiftedImm }, }, + { 4 /* add */, ARM::t2ADDri, Convert__Reg1_2__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_T2SOImm }, }, + { 4 /* add */, ARM::t2SUBri, Convert__Reg1_2__Reg1_3__T2SOImmNeg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_T2SOImmNeg }, }, + { 4 /* add */, ARM::t2SUBri, Convert__Reg1_2__Reg1_3__T2SOImmNeg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_T2SOImmNeg }, }, + { 4 /* add */, ARM::ADDrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 4 /* add */, ARM::ADDri, Convert__Reg1_2__Reg1_3__ModImm1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_ModImm }, }, + { 4 /* add */, ARM::SUBri, Convert__Reg1_2__Reg1_3__ModImmNeg1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_ModImmNeg }, }, + { 4 /* add */, ARM::ADDrsi, Convert__Reg1_2__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_RegShiftedImm }, }, + { 4 /* add */, ARM::ADDrsr, Convert__Reg1_2__Reg1_3__RegShiftedReg3_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_RegShiftedReg }, }, + { 4 /* add */, ARM::t2ADDrr, Convert__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_GPRnopc, MCK_rGPR }, }, + { 4 /* add */, ARM::t2ADDrs, Convert__Reg1_3__Reg1_4__RegShiftedImm2_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_GPRnopc, MCK_RegShiftedImm }, }, + { 4 /* add */, ARM::t2ADDri, Convert__Reg1_3__Reg1_4__T2SOImm1_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_GPRnopc, MCK_T2SOImm }, }, + { 4 /* add */, ARM::t2SUBri, Convert__Reg1_3__Reg1_4__T2SOImmNeg1_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_GPRnopc, MCK_T2SOImmNeg }, }, + { 8 /* addw */, ARM::t2SUBri12, Convert__Reg1_1__Reg1_1__Imm0_4095Neg1_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_Imm0_4095Neg }, }, + { 8 /* addw */, ARM::t2ADDri12, Convert__Reg1_1__Reg1_2__Imm0_40951_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_GPR, MCK_Imm0_4095 }, }, + { 8 /* addw */, ARM::t2SUBri12, Convert__Reg1_1__Reg1_2__Imm0_4095Neg1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_GPR, MCK_Imm0_4095Neg }, }, + { 13 /* adr */, ARM::tADR, Convert__Reg1_1__UnsignedOffset_b8s21_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_UnsignedOffset_b8s2 }, }, + { 13 /* adr */, ARM::t2ADR, Convert__Reg1_1__Imm1_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_Imm }, }, + { 13 /* adr */, ARM::ADR, Convert__Reg1_1__AdrLabel1_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_AdrLabel }, }, + { 13 /* adr */, ARM::t2ADR, Convert__Reg1_2__Imm1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_Imm }, }, + { 17 /* aesd */, ARM::AESD, Convert__Reg1_1__Tie0__Reg1_2, Feature_HasV8|Feature_HasCrypto, { MCK__DOT_8, MCK_QPR, MCK_QPR }, }, + { 22 /* aese */, ARM::AESE, Convert__Reg1_1__Tie0__Reg1_2, Feature_HasV8|Feature_HasCrypto, { MCK__DOT_8, MCK_QPR, MCK_QPR }, }, + { 27 /* aesimc */, ARM::AESIMC, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasCrypto, { MCK__DOT_8, MCK_QPR, MCK_QPR }, }, + { 34 /* aesmc */, ARM::AESMC, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasCrypto, { MCK__DOT_8, MCK_QPR, MCK_QPR }, }, + { 40 /* and */, ARM::tAND, Convert__Reg1_2__CCOut1_0__Tie0__Reg1_3__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR }, }, + { 40 /* and */, ARM::t2ANDrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 40 /* and */, ARM::t2ANDrs, Convert__Reg1_2__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_RegShiftedImm }, }, + { 40 /* and */, ARM::t2ANDri, Convert__Reg1_2__Reg1_2__T2SOImm1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_T2SOImm }, }, + { 40 /* and */, ARM::t2BICri, Convert__Reg1_2__Reg1_2__T2SOImmNot1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_T2SOImmNot }, }, + { 40 /* and */, ARM::ANDrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 40 /* and */, ARM::ANDri, Convert__Reg1_2__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, }, + { 40 /* and */, ARM::BICri, Convert__Reg1_2__Reg1_2__ModImmNot1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImmNot }, }, + { 40 /* and */, ARM::ANDrsi, Convert__Reg1_2__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_RegShiftedImm }, }, + { 40 /* and */, ARM::ANDrsr, Convert__Reg1_2__Reg1_2__RegShiftedReg3_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_RegShiftedReg }, }, + { 40 /* and */, ARM::t2ANDrr, Convert__Reg1_3__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR }, }, + { 40 /* and */, ARM::t2ANDrs, Convert__Reg1_3__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_RegShiftedImm }, }, + { 40 /* and */, ARM::t2ANDri, Convert__Reg1_3__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_T2SOImm }, }, + { 40 /* and */, ARM::t2ANDrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 40 /* and */, ARM::t2ANDrs, Convert__Reg1_2__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_RegShiftedImm }, }, + { 40 /* and */, ARM::t2ANDri, Convert__Reg1_2__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_T2SOImm }, }, + { 40 /* and */, ARM::t2BICri, Convert__Reg1_2__Reg1_3__T2SOImmNot1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_T2SOImmNot }, }, + { 40 /* and */, ARM::ANDrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 40 /* and */, ARM::ANDri, Convert__Reg1_2__Reg1_3__ModImm1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_ModImm }, }, + { 40 /* and */, ARM::BICri, Convert__Reg1_2__Reg1_3__ModImmNot1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_ModImmNot }, }, + { 40 /* and */, ARM::ANDrsi, Convert__Reg1_2__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_RegShiftedImm }, }, + { 40 /* and */, ARM::ANDrsr, Convert__Reg1_2__Reg1_3__RegShiftedReg3_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_RegShiftedReg }, }, + { 40 /* and */, ARM::t2ANDrr, Convert__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 40 /* and */, ARM::t2ANDrs, Convert__Reg1_3__Reg1_4__RegShiftedImm2_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_RegShiftedImm }, }, + { 40 /* and */, ARM::t2ANDri, Convert__Reg1_3__Reg1_4__T2SOImm1_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_T2SOImm }, }, + { 44 /* asr */, ARM::tASRrr, Convert__Reg1_2__CCOut1_0__Tie0__Reg1_3__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR }, }, + { 44 /* asr */, ARM::tASRri, Convert__Reg1_2__CCOut1_0__Reg1_2__ImmThumbSR1_3__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_ImmThumbSR }, }, + { 44 /* asr */, ARM::t2ASRrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 44 /* asr */, ARM::t2ASRri, Convert__Reg1_2__Reg1_2__ImmThumbSR1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_ImmThumbSR }, }, + { 44 /* asr */, ARM::ASRr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc }, }, + { 44 /* asr */, ARM::ASRi, Convert__Reg1_2__Reg1_2__Imm0_321_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_Imm0_32 }, }, + { 44 /* asr */, ARM::t2ASRrr, Convert__Reg1_3__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR }, }, + { 44 /* asr */, ARM::t2ASRri, Convert__Reg1_3__Reg1_3__ImmThumbSR1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_ImmThumbSR }, }, + { 44 /* asr */, ARM::tASRri, Convert__Reg1_2__CCOut1_0__Reg1_3__ImmThumbSR1_4__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR, MCK_ImmThumbSR }, }, + { 44 /* asr */, ARM::t2ASRrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 44 /* asr */, ARM::t2ASRri, Convert__Reg1_2__Reg1_3__ImmThumbSR1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_ImmThumbSR }, }, + { 44 /* asr */, ARM::ASRr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 44 /* asr */, ARM::ASRi, Convert__Reg1_2__Reg1_3__Imm0_321_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_Imm0_32 }, }, + { 44 /* asr */, ARM::t2ASRrr, Convert__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 44 /* asr */, ARM::t2ASRri, Convert__Reg1_3__Reg1_4__ImmThumbSR1_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_ImmThumbSR }, }, + { 48 /* b */, ARM::Bcc, Convert__Imm1_1__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_Imm }, }, + { 48 /* b */, ARM::tB, ConvertCustom_cvtThumbBranches, Feature_IsThumb, { MCK_CondCode, MCK_Imm }, }, + { 48 /* b */, ARM::tBcc, ConvertCustom_cvtThumbBranches, Feature_IsThumb, { MCK_CondCode, MCK_Imm }, }, + { 48 /* b */, ARM::t2B, ConvertCustom_cvtThumbBranches, Feature_IsThumb|Feature_HasV8MBaseline, { MCK_CondCode, MCK__DOT_w, MCK_Imm }, }, + { 48 /* b */, ARM::t2Bcc, ConvertCustom_cvtThumbBranches, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_Imm }, }, + { 50 /* bfc */, ARM::t2BFC, Convert__Reg1_1__Tie0__Bitfield1_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_Bitfield }, }, + { 50 /* bfc */, ARM::BFC, Convert__Reg1_1__Tie0__Bitfield1_2__CondCode2_0, Feature_IsARM|Feature_HasV6T2, { MCK_CondCode, MCK_GPR, MCK_Bitfield }, }, + { 54 /* bfi */, ARM::t2BFI, Convert__Reg1_1__Tie0__Reg1_2__Bitfield1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_Bitfield }, }, + { 54 /* bfi */, ARM::BFI, Convert__Reg1_1__Tie0__Reg1_2__Bitfield1_3__CondCode2_0, Feature_IsARM|Feature_HasV6T2, { MCK_CondCode, MCK_GPRnopc, MCK_GPR, MCK_Bitfield }, }, + { 58 /* bic */, ARM::tBIC, Convert__Reg1_2__CCOut1_0__Tie0__Reg1_3__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR }, }, + { 58 /* bic */, ARM::t2BICrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 58 /* bic */, ARM::t2BICrs, Convert__Reg1_2__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_RegShiftedImm }, }, + { 58 /* bic */, ARM::t2BICri, Convert__Reg1_2__Reg1_2__T2SOImm1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_T2SOImm }, }, + { 58 /* bic */, ARM::t2ANDri, Convert__Reg1_2__Reg1_2__T2SOImmNot1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_T2SOImmNot }, }, + { 58 /* bic */, ARM::BICrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 58 /* bic */, ARM::BICri, Convert__Reg1_2__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, }, + { 58 /* bic */, ARM::ANDri, Convert__Reg1_2__Reg1_2__ModImmNot1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImmNot }, }, + { 58 /* bic */, ARM::BICrsi, Convert__Reg1_2__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_RegShiftedImm }, }, + { 58 /* bic */, ARM::BICrsr, Convert__Reg1_2__Reg1_2__RegShiftedReg3_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_RegShiftedReg }, }, + { 58 /* bic */, ARM::t2BICrr, Convert__Reg1_3__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR }, }, + { 58 /* bic */, ARM::t2BICrs, Convert__Reg1_3__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_RegShiftedImm }, }, + { 58 /* bic */, ARM::t2BICri, Convert__Reg1_3__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_T2SOImm }, }, + { 58 /* bic */, ARM::t2BICrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 58 /* bic */, ARM::t2BICrs, Convert__Reg1_2__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_RegShiftedImm }, }, + { 58 /* bic */, ARM::t2BICri, Convert__Reg1_2__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_T2SOImm }, }, + { 58 /* bic */, ARM::t2ANDri, Convert__Reg1_2__Reg1_3__T2SOImmNot1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_T2SOImmNot }, }, + { 58 /* bic */, ARM::BICrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 58 /* bic */, ARM::BICri, Convert__Reg1_2__Reg1_3__ModImm1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_ModImm }, }, + { 58 /* bic */, ARM::ANDri, Convert__Reg1_2__Reg1_3__ModImmNot1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_ModImmNot }, }, + { 58 /* bic */, ARM::BICrsi, Convert__Reg1_2__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_RegShiftedImm }, }, + { 58 /* bic */, ARM::BICrsr, Convert__Reg1_2__Reg1_3__RegShiftedReg3_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_RegShiftedReg }, }, + { 58 /* bic */, ARM::t2BICrr, Convert__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 58 /* bic */, ARM::t2BICrs, Convert__Reg1_3__Reg1_4__RegShiftedImm2_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_RegShiftedImm }, }, + { 58 /* bic */, ARM::t2BICri, Convert__Reg1_3__Reg1_4__T2SOImm1_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_T2SOImm }, }, + { 62 /* bkpt */, ARM::BKPT, Convert__imm_95_0, Feature_IsARM, { }, }, + { 62 /* bkpt */, ARM::tBKPT, Convert__imm_95_0, Feature_IsThumb, { }, }, + { 62 /* bkpt */, ARM::tBKPT, Convert__Imm0_2551_0, Feature_IsThumb, { MCK_Imm0_255 }, }, + { 62 /* bkpt */, ARM::BKPT, Convert__Imm0_655351_0, Feature_IsARM, { MCK_Imm0_65535 }, }, + { 67 /* bl */, ARM::BL, Convert__Imm1_0, Feature_IsARM, { MCK_Imm }, }, + { 67 /* bl */, ARM::BL_pred, Convert__Imm1_1__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_Imm }, }, + { 67 /* bl */, ARM::tBL, Convert__CondCode2_0__Imm1_1, Feature_IsThumb, { MCK_CondCode, MCK_Imm }, }, + { 70 /* blx */, ARM::BLX, Convert__Reg1_0, Feature_IsARM|Feature_HasV5T, { MCK_GPR }, }, + { 70 /* blx */, ARM::BLXi, Convert__Imm1_0, Feature_IsARM|Feature_HasV5T, { MCK_Imm }, }, + { 70 /* blx */, ARM::BLX_pred, Convert__Reg1_1__CondCode2_0, Feature_IsARM|Feature_HasV5T, { MCK_CondCode, MCK_GPR }, }, + { 70 /* blx */, ARM::tBLXr, Convert__CondCode2_0__Reg1_1, Feature_IsThumb|Feature_HasV5T, { MCK_CondCode, MCK_GPR }, }, + { 70 /* blx */, ARM::tBLXi, Convert__CondCode2_0__Imm1_1, Feature_IsThumb|Feature_HasV5T|Feature_IsNotMClass, { MCK_CondCode, MCK_Imm }, }, + { 74 /* blxns */, ARM::tBLXNSr, Convert__CondCode2_0__Reg1_1, Feature_IsThumb|Feature_Has8MSecExt, { MCK_CondCode, MCK_GPRnopc }, }, + { 80 /* bx */, ARM::BX, Convert__Reg1_0, Feature_IsARM|Feature_HasV4T, { MCK_GPR }, }, + { 80 /* bx */, ARM::BX_RET, Convert__CondCode2_0, Feature_IsARM|Feature_HasV4T, { MCK_CondCode, MCK_LR }, }, + { 80 /* bx */, ARM::BX_pred, Convert__Reg1_1__CondCode2_0, Feature_IsARM|Feature_HasV4T, { MCK_CondCode, MCK_GPR }, }, + { 80 /* bx */, ARM::tBX, Convert__Reg1_1__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_GPR }, }, + { 83 /* bxj */, ARM::t2BXJ, Convert__Reg1_1__CondCode2_0, Feature_IsThumb2|Feature_IsNotMClass, { MCK_CondCode, MCK_GPRnopc }, }, + { 83 /* bxj */, ARM::BXJ, Convert__Reg1_1__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR }, }, + { 87 /* bxns */, ARM::tBXNS, Convert__Reg1_1__CondCode2_0, Feature_IsThumb|Feature_Has8MSecExt, { MCK_CondCode, MCK_GPR }, }, + { 92 /* cbnz */, ARM::tCBNZ, Convert__Reg1_0__Imm1_1, Feature_IsThumb|Feature_HasV8MBaseline, { MCK_tGPR, MCK_Imm }, }, + { 97 /* cbz */, ARM::tCBZ, Convert__Reg1_0__Imm1_1, Feature_IsThumb|Feature_HasV8MBaseline, { MCK_tGPR, MCK_Imm }, }, + { 101 /* cdp */, ARM::t2CDP, Convert__CoprocNum1_1__Imm0_151_2__CoprocReg1_3__CoprocReg1_4__CoprocReg1_5__Imm0_71_6__CondCode2_0, Feature_IsThumb2|Feature_PreV8, { MCK_CondCode, MCK_CoprocNum, MCK_Imm0_15, MCK_CoprocReg, MCK_CoprocReg, MCK_CoprocReg, MCK_Imm0_7 }, }, + { 101 /* cdp */, ARM::CDP, Convert__CoprocNum1_1__Imm0_151_2__CoprocReg1_3__CoprocReg1_4__CoprocReg1_5__Imm0_71_6__CondCode2_0, Feature_PreV8, { MCK_CondCode, MCK_CoprocNum, MCK_Imm0_15, MCK_CoprocReg, MCK_CoprocReg, MCK_CoprocReg, MCK_Imm0_7 }, }, + { 105 /* cdp2 */, ARM::CDP2, Convert__CoprocNum1_0__Imm0_151_1__CoprocReg1_2__CoprocReg1_3__CoprocReg1_4__Imm0_71_5, Feature_PreV8, { MCK_CoprocNum, MCK_Imm0_15, MCK_CoprocReg, MCK_CoprocReg, MCK_CoprocReg, MCK_Imm0_7 }, }, + { 105 /* cdp2 */, ARM::t2CDP2, Convert__CoprocNum1_1__Imm0_151_2__CoprocReg1_3__CoprocReg1_4__CoprocReg1_5__Imm0_71_6__CondCode2_0, Feature_IsThumb2|Feature_PreV8, { MCK_CondCode, MCK_CoprocNum, MCK_Imm0_15, MCK_CoprocReg, MCK_CoprocReg, MCK_CoprocReg, MCK_Imm0_7 }, }, + { 110 /* clrex */, ARM::CLREX, Convert_NoOperands, Feature_IsARM|Feature_HasV6K, { }, }, + { 110 /* clrex */, ARM::t2CLREX, Convert__CondCode2_0, Feature_IsThumb|Feature_HasV7Clrex, { MCK_CondCode }, }, + { 116 /* clz */, ARM::t2CLZ, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 116 /* clz */, ARM::CLZ, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsARM|Feature_HasV5T, { MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 120 /* cmn */, ARM::tCMNz, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_tGPR }, }, + { 120 /* cmn */, ARM::CMPri, Convert__Reg1_1__ModImmNeg1_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_rGPR, MCK_ModImmNeg }, }, + { 120 /* cmn */, ARM::t2CMPri, Convert__Reg1_1__T2SOImmNeg1_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_T2SOImmNeg }, }, + { 120 /* cmn */, ARM::t2CMNzrr, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_rGPR }, }, + { 120 /* cmn */, ARM::t2CMNzrs, Convert__Reg1_1__RegShiftedImm2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_RegShiftedImm }, }, + { 120 /* cmn */, ARM::CMNzrsr, Convert__Reg1_1__RegShiftedReg3_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_RegShiftedReg }, }, + { 120 /* cmn */, ARM::t2CMNri, Convert__Reg1_1__T2SOImm1_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_T2SOImm }, }, + { 120 /* cmn */, ARM::CMNzrr, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 120 /* cmn */, ARM::CMNri, Convert__Reg1_1__ModImm1_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_ModImm }, }, + { 120 /* cmn */, ARM::CMNzrsi, Convert__Reg1_1__RegShiftedImm2_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_RegShiftedImm }, }, + { 120 /* cmn */, ARM::t2CMNzrr, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_rGPR }, }, + { 120 /* cmn */, ARM::t2CMNzrs, Convert__Reg1_2__RegShiftedImm2_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_RegShiftedImm }, }, + { 120 /* cmn */, ARM::t2CMNri, Convert__Reg1_2__T2SOImm1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_T2SOImm }, }, + { 124 /* cmp */, ARM::tCMPr, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_tGPR }, }, + { 124 /* cmp */, ARM::tCMPi8, Convert__Reg1_1__Imm0_2551_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_Imm0_255 }, }, + { 124 /* cmp */, ARM::CMNri, Convert__Reg1_1__ModImmNeg1_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_rGPR, MCK_ModImmNeg }, }, + { 124 /* cmp */, ARM::t2CMNri, Convert__Reg1_1__T2SOImmNeg1_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_T2SOImmNeg }, }, + { 124 /* cmp */, ARM::t2CMPrs, Convert__Reg1_1__RegShiftedImm2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_RegShiftedImm }, }, + { 124 /* cmp */, ARM::CMPrsr, Convert__Reg1_1__RegShiftedReg3_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_RegShiftedReg }, }, + { 124 /* cmp */, ARM::t2CMPri, Convert__Reg1_1__T2SOImm1_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_T2SOImm }, }, + { 124 /* cmp */, ARM::CMPrr, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 124 /* cmp */, ARM::tCMPhir, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 124 /* cmp */, ARM::CMPri, Convert__Reg1_1__ModImm1_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_ModImm }, }, + { 124 /* cmp */, ARM::CMPrsi, Convert__Reg1_1__RegShiftedImm2_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_RegShiftedImm }, }, + { 124 /* cmp */, ARM::t2CMPrr, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_rGPR }, }, + { 124 /* cmp */, ARM::t2CMPrs, Convert__Reg1_2__RegShiftedImm2_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_RegShiftedImm }, }, + { 124 /* cmp */, ARM::t2CMPri, Convert__Reg1_2__T2SOImm1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_T2SOImm }, }, + { 128 /* cps */, ARM::t2CPS1p, Convert__Imm0_311_0, Feature_IsThumb2|Feature_IsNotMClass, { MCK_Imm0_31 }, }, + { 128 /* cps */, ARM::CPS1p, Convert__Imm0_311_0, Feature_IsARM, { MCK_Imm0_31 }, }, + { 128 /* cps */, ARM::tCPS, Convert__Imm1_0__imm_95_0, Feature_IsThumb, { MCK_Imm }, }, + { 128 /* cps */, ARM::tCPS, Convert__Imm1_0__imm_95_0, Feature_IsThumb, { MCK_Imm }, }, + { 128 /* cps */, ARM::t2CPS1p, Convert__Imm0_311_1, Feature_IsThumb2, { MCK__DOT_w, MCK_Imm0_31 }, }, + { 128 /* cps */, ARM::CPS2p, Convert__Imm1_0__ProcIFlags1_1, Feature_IsARM, { MCK_Imm, MCK_ProcIFlags }, }, + { 128 /* cps */, ARM::tCPS, Convert__Imm1_0__ProcIFlags1_1, Feature_IsThumb, { MCK_Imm, MCK_ProcIFlags }, }, + { 128 /* cps */, ARM::t2CPS2p, Convert__Imm1_0__ProcIFlags1_2, Feature_IsThumb2|Feature_IsNotMClass, { MCK_Imm, MCK__DOT_w, MCK_ProcIFlags }, }, + { 128 /* cps */, ARM::CPS3p, Convert__Imm1_0__ProcIFlags1_1__Imm0_311_2, Feature_IsARM, { MCK_Imm, MCK_ProcIFlags, MCK_Imm0_31 }, }, + { 128 /* cps */, ARM::t2CPS3p, Convert__Imm1_0__ProcIFlags1_1__Imm1_2, Feature_IsThumb2|Feature_IsNotMClass, { MCK_Imm, MCK_ProcIFlags, MCK_Imm }, }, + { 128 /* cps */, ARM::t2CPS3p, Convert__Imm1_0__ProcIFlags1_2__Imm1_3, Feature_IsThumb2, { MCK_Imm, MCK__DOT_w, MCK_ProcIFlags, MCK_Imm }, }, + { 132 /* crc32b */, ARM::t2CRC32B, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_IsThumb2|Feature_HasV8|Feature_HasCRC, { MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 132 /* crc32b */, ARM::CRC32B, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_IsARM|Feature_HasV8|Feature_HasCRC, { MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 139 /* crc32cb */, ARM::t2CRC32CB, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_IsThumb2|Feature_HasV8|Feature_HasCRC, { MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 139 /* crc32cb */, ARM::CRC32CB, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_IsARM|Feature_HasV8|Feature_HasCRC, { MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 147 /* crc32ch */, ARM::t2CRC32CH, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_IsThumb2|Feature_HasV8|Feature_HasCRC, { MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 147 /* crc32ch */, ARM::CRC32CH, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_IsARM|Feature_HasV8|Feature_HasCRC, { MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 155 /* crc32cw */, ARM::t2CRC32CW, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_IsThumb2|Feature_HasV8|Feature_HasCRC, { MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 155 /* crc32cw */, ARM::CRC32CW, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_IsARM|Feature_HasV8|Feature_HasCRC, { MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 163 /* crc32h */, ARM::t2CRC32H, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_IsThumb2|Feature_HasV8|Feature_HasCRC, { MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 163 /* crc32h */, ARM::CRC32H, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_IsARM|Feature_HasV8|Feature_HasCRC, { MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 170 /* crc32w */, ARM::t2CRC32W, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_IsThumb2|Feature_HasV8|Feature_HasCRC, { MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 170 /* crc32w */, ARM::CRC32W, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_IsARM|Feature_HasV8|Feature_HasCRC, { MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 177 /* dbg */, ARM::DBG, Convert__Imm0_151_1__CondCode2_0, Feature_IsARM|Feature_HasV7, { MCK_CondCode, MCK_Imm0_15 }, }, + { 177 /* dbg */, ARM::t2DBG, Convert__Imm0_151_1__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_Imm0_15 }, }, + { 181 /* dcps1 */, ARM::t2DCPS1, Convert__CondCode2_0, Feature_IsThumb2|Feature_HasV8, { MCK_CondCode }, }, + { 187 /* dcps2 */, ARM::t2DCPS2, Convert__CondCode2_0, Feature_IsThumb2|Feature_HasV8, { MCK_CondCode }, }, + { 193 /* dcps3 */, ARM::t2DCPS3, Convert__CondCode2_0, Feature_IsThumb2|Feature_HasV8, { MCK_CondCode }, }, + { 199 /* dmb */, ARM::DMB, Convert__imm_95_15, Feature_IsARM|Feature_HasDB, { }, }, + { 199 /* dmb */, ARM::t2DMB, Convert__imm_95_15__CondCode2_0, Feature_HasDB, { MCK_CondCode }, }, + { 199 /* dmb */, ARM::DMB, Convert__MemBarrierOpt1_0, Feature_IsARM|Feature_HasDB, { MCK_MemBarrierOpt }, }, + { 199 /* dmb */, ARM::t2DMB, Convert__MemBarrierOpt1_1__CondCode2_0, Feature_IsThumb|Feature_HasDB, { MCK_CondCode, MCK_MemBarrierOpt }, }, + { 203 /* dsb */, ARM::DSB, Convert__imm_95_15, Feature_IsARM|Feature_HasDB, { }, }, + { 203 /* dsb */, ARM::t2DSB, Convert__imm_95_15__CondCode2_0, Feature_HasDB, { MCK_CondCode }, }, + { 203 /* dsb */, ARM::DSB, Convert__MemBarrierOpt1_0, Feature_IsARM|Feature_HasDB, { MCK_MemBarrierOpt }, }, + { 203 /* dsb */, ARM::t2DSB, Convert__MemBarrierOpt1_1__CondCode2_0, Feature_IsThumb|Feature_HasDB, { MCK_CondCode, MCK_MemBarrierOpt }, }, + { 207 /* eor */, ARM::tEOR, Convert__Reg1_2__CCOut1_0__Tie0__Reg1_3__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR }, }, + { 207 /* eor */, ARM::t2EORrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 207 /* eor */, ARM::t2EORrs, Convert__Reg1_2__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_RegShiftedImm }, }, + { 207 /* eor */, ARM::t2EORri, Convert__Reg1_2__Reg1_2__T2SOImm1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_T2SOImm }, }, + { 207 /* eor */, ARM::EORrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 207 /* eor */, ARM::EORri, Convert__Reg1_2__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, }, + { 207 /* eor */, ARM::EORrsi, Convert__Reg1_2__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_RegShiftedImm }, }, + { 207 /* eor */, ARM::EORrsr, Convert__Reg1_2__Reg1_2__RegShiftedReg3_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_RegShiftedReg }, }, + { 207 /* eor */, ARM::t2EORrr, Convert__Reg1_3__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR }, }, + { 207 /* eor */, ARM::t2EORrs, Convert__Reg1_3__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_RegShiftedImm }, }, + { 207 /* eor */, ARM::t2EORri, Convert__Reg1_3__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_T2SOImm }, }, + { 207 /* eor */, ARM::t2EORrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 207 /* eor */, ARM::t2EORrs, Convert__Reg1_2__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_RegShiftedImm }, }, + { 207 /* eor */, ARM::t2EORri, Convert__Reg1_2__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_T2SOImm }, }, + { 207 /* eor */, ARM::EORrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 207 /* eor */, ARM::EORri, Convert__Reg1_2__Reg1_3__ModImm1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_ModImm }, }, + { 207 /* eor */, ARM::EORrsi, Convert__Reg1_2__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_RegShiftedImm }, }, + { 207 /* eor */, ARM::EORrsr, Convert__Reg1_2__Reg1_3__RegShiftedReg3_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_RegShiftedReg }, }, + { 207 /* eor */, ARM::t2EORrr, Convert__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 207 /* eor */, ARM::t2EORrs, Convert__Reg1_3__Reg1_4__RegShiftedImm2_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_RegShiftedImm }, }, + { 207 /* eor */, ARM::t2EORri, Convert__Reg1_3__Reg1_4__T2SOImm1_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_T2SOImm }, }, + { 211 /* eret */, ARM::ERET, Convert__CondCode2_0, Feature_IsARM|Feature_HasVirtualization, { MCK_CondCode }, }, + { 211 /* eret */, ARM::t2SUBS_PC_LR, Convert__imm_95_0__CondCode2_0, Feature_IsThumb2|Feature_HasVirtualization, { MCK_CondCode }, }, + { 216 /* faddd */, ARM::VADDD, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 222 /* fadds */, ARM::VADDS, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 228 /* fcmpzd */, ARM::VCMPZD, Convert__Reg1_1__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK_DPR }, }, + { 235 /* fcmpzs */, ARM::VCMPZS, Convert__Reg1_1__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_SPR }, }, + { 242 /* fconstd */, ARM::FCONSTD, Convert__Reg1_1__FPImm1_2__CondCode2_0, Feature_HasVFP3, { MCK_CondCode, MCK_DPR, MCK_FPImm }, }, + { 250 /* fconsts */, ARM::FCONSTS, Convert__Reg1_1__FPImm1_2__CondCode2_0, Feature_HasVFP3, { MCK_CondCode, MCK_SPR, MCK_FPImm }, }, + { 258 /* fldmdbx */, ARM::FLDMXDB_UPD, Convert__Reg1_1__Tie0__CondCode2_0__DPRRegList1_3, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_DPRRegList }, }, + { 266 /* fldmiax */, ARM::FLDMXIA, Convert__Reg1_1__CondCode2_0__DPRRegList1_2, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK_DPRRegList }, }, + { 266 /* fldmiax */, ARM::FLDMXIA_UPD, Convert__Reg1_1__Tie0__CondCode2_0__DPRRegList1_3, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_DPRRegList }, }, + { 274 /* fmdhr */, ARM::VSETLNi32, Convert__Reg1_1__Tie0__Reg1_2__imm_95_1__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_DPR, MCK_GPR }, }, + { 280 /* fmdlr */, ARM::VSETLNi32, Convert__Reg1_1__Tie0__Reg1_2__imm_95_0__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_DPR, MCK_GPR }, }, + { 286 /* fmstat */, ARM::FMSTAT, Convert__CondCode2_0, Feature_HasVFP2, { MCK_CondCode }, }, + { 293 /* fstmdbx */, ARM::FSTMXDB_UPD, Convert__Reg1_1__Tie0__CondCode2_0__DPRRegList1_3, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_DPRRegList }, }, + { 301 /* fstmiax */, ARM::FSTMXIA, Convert__Reg1_1__CondCode2_0__DPRRegList1_2, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK_DPRRegList }, }, + { 301 /* fstmiax */, ARM::FSTMXIA_UPD, Convert__Reg1_1__Tie0__CondCode2_0__DPRRegList1_3, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_DPRRegList }, }, + { 309 /* fsubd */, ARM::VSUBD, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 315 /* fsubs */, ARM::VSUBS, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 321 /* hint */, ARM::tHINT, Convert__Imm0_151_1__CondCode2_0, Feature_IsThumb|Feature_HasV6M, { MCK_CondCode, MCK_Imm0_15 }, }, + { 321 /* hint */, ARM::HINT, Convert__Imm0_2391_1__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_Imm0_239 }, }, + { 321 /* hint */, ARM::t2HINT, Convert__Imm0_2391_1__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_Imm0_239 }, }, + { 321 /* hint */, ARM::t2HINT, Convert__Imm0_2391_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_Imm0_239 }, }, + { 326 /* hlt */, ARM::tHLT, Convert__Imm0_631_0, Feature_IsThumb|Feature_HasV8, { MCK_Imm0_63 }, }, + { 326 /* hlt */, ARM::HLT, Convert__Imm0_655351_0, Feature_IsARM|Feature_HasV8, { MCK_Imm0_65535 }, }, + { 330 /* hvc */, ARM::HVC, Convert__Imm0_655351_0, Feature_IsARM|Feature_HasVirtualization, { MCK_Imm0_65535 }, }, + { 330 /* hvc */, ARM::t2HVC, Convert__Imm0_655351_0, Feature_IsThumb2, { MCK_Imm0_65535 }, }, + { 330 /* hvc */, ARM::t2HVC, Convert__Imm0_655351_1, Feature_IsThumb2|Feature_HasVirtualization, { MCK__DOT_w, MCK_Imm0_65535 }, }, + { 334 /* isb */, ARM::ISB, Convert__imm_95_15, Feature_IsARM|Feature_HasDB, { }, }, + { 334 /* isb */, ARM::t2ISB, Convert__imm_95_15__CondCode2_0, Feature_HasDB, { MCK_CondCode }, }, + { 334 /* isb */, ARM::ISB, Convert__InstSyncBarrierOpt1_0, Feature_IsARM|Feature_HasDB, { MCK_InstSyncBarrierOpt }, }, + { 334 /* isb */, ARM::t2ISB, Convert__InstSyncBarrierOpt1_1__CondCode2_0, Feature_IsThumb|Feature_HasDB, { MCK_CondCode, MCK_InstSyncBarrierOpt }, }, + { 338 /* it */, ARM::ITasm, Convert__ITCondCode1_1__ITMask1_0, Feature_IsARM, { MCK_ITMask, MCK_ITCondCode }, }, + { 338 /* it */, ARM::t2IT, Convert__ITCondCode1_1__ITMask1_0, Feature_IsThumb2, { MCK_ITMask, MCK_ITCondCode }, }, + { 341 /* lda */, ARM::t2LDA, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsThumb|Feature_HasAcquireRelease, { MCK_CondCode, MCK_rGPR, MCK_MemNoOffset }, }, + { 341 /* lda */, ARM::LDA, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsARM|Feature_HasAcquireRelease, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset }, }, + { 345 /* ldab */, ARM::t2LDAB, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsThumb|Feature_HasAcquireRelease, { MCK_CondCode, MCK_rGPR, MCK_MemNoOffset }, }, + { 345 /* ldab */, ARM::LDAB, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsARM|Feature_HasAcquireRelease, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset }, }, + { 350 /* ldaex */, ARM::t2LDAEX, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsThumb|Feature_HasAcquireRelease|Feature_HasV7Clrex, { MCK_CondCode, MCK_rGPR, MCK_MemNoOffset }, }, + { 350 /* ldaex */, ARM::LDAEX, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsARM|Feature_HasAcquireRelease|Feature_HasV7Clrex, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset }, }, + { 356 /* ldaexb */, ARM::t2LDAEXB, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsThumb|Feature_HasAcquireRelease|Feature_HasV7Clrex, { MCK_CondCode, MCK_rGPR, MCK_MemNoOffset }, }, + { 356 /* ldaexb */, ARM::LDAEXB, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsARM|Feature_HasAcquireRelease|Feature_HasV7Clrex, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset }, }, + { 363 /* ldaexd */, ARM::LDAEXD, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsARM|Feature_HasAcquireRelease|Feature_HasV7Clrex, { MCK_CondCode, MCK_GPRPair, MCK_MemNoOffset }, }, + { 363 /* ldaexd */, ARM::t2LDAEXD, Convert__Reg1_1__Reg1_2__MemNoOffset1_3__CondCode2_0, Feature_IsThumb|Feature_HasAcquireRelease|Feature_HasV7Clrex|Feature_IsNotMClass, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_MemNoOffset }, }, + { 370 /* ldaexh */, ARM::t2LDAEXH, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsThumb|Feature_HasAcquireRelease|Feature_HasV7Clrex, { MCK_CondCode, MCK_rGPR, MCK_MemNoOffset }, }, + { 370 /* ldaexh */, ARM::LDAEXH, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsARM|Feature_HasAcquireRelease|Feature_HasV7Clrex, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset }, }, + { 377 /* ldah */, ARM::t2LDAH, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsThumb|Feature_HasAcquireRelease, { MCK_CondCode, MCK_rGPR, MCK_MemNoOffset }, }, + { 377 /* ldah */, ARM::LDAH, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsARM|Feature_HasAcquireRelease, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset }, }, + { 382 /* ldc */, ARM::LDC_OFFSET, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5 }, }, + { 382 /* ldc */, ARM::t2LDC_OFFSET, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5 }, }, + { 382 /* ldc */, ARM::LDC_PRE, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5, MCK__EXCLAIM_ }, }, + { 382 /* ldc */, ARM::t2LDC_PRE, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5, MCK__EXCLAIM_ }, }, + { 382 /* ldc */, ARM::LDC_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, }, + { 382 /* ldc */, ARM::t2LDC_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, }, + { 382 /* ldc */, ARM::LDC_POST, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__PostIdxImm8s41_4__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_PostIdxImm8s4 }, }, + { 382 /* ldc */, ARM::t2LDC_POST, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__PostIdxImm8s41_4__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_PostIdxImm8s4 }, }, + { 386 /* ldc2 */, ARM::LDC2_OFFSET, Convert__CoprocNum1_0__CoprocReg1_1__AddrMode52_2, Feature_PreV8, { MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5 }, }, + { 386 /* ldc2 */, ARM::t2LDC2_OFFSET, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_PreV8|Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5 }, }, + { 386 /* ldc2 */, ARM::LDC2_PRE, Convert__CoprocNum1_0__CoprocReg1_1__AddrMode52_2, Feature_PreV8, { MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5, MCK__EXCLAIM_ }, }, + { 386 /* ldc2 */, ARM::LDC2_OPTION, Convert__CoprocNum1_0__CoprocReg1_1__MemNoOffset1_2__CoprocOption1_3, Feature_PreV8, { MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, }, + { 386 /* ldc2 */, ARM::LDC2_POST, Convert__CoprocNum1_0__CoprocReg1_1__MemNoOffset1_2__PostIdxImm8s41_3, Feature_PreV8, { MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_PostIdxImm8s4 }, }, + { 386 /* ldc2 */, ARM::t2LDC2_PRE, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_PreV8|Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5, MCK__EXCLAIM_ }, }, + { 386 /* ldc2 */, ARM::t2LDC2_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, Feature_PreV8|Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, }, + { 386 /* ldc2 */, ARM::t2LDC2_POST, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__PostIdxImm8s41_4__CondCode2_0, Feature_PreV8|Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_PostIdxImm8s4 }, }, + { 391 /* ldc2l */, ARM::LDC2L_OFFSET, Convert__CoprocNum1_0__CoprocReg1_1__AddrMode52_2, Feature_PreV8, { MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5 }, }, + { 391 /* ldc2l */, ARM::t2LDC2L_OFFSET, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_PreV8|Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5 }, }, + { 391 /* ldc2l */, ARM::LDC2L_PRE, Convert__CoprocNum1_0__CoprocReg1_1__AddrMode52_2, Feature_PreV8, { MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5, MCK__EXCLAIM_ }, }, + { 391 /* ldc2l */, ARM::LDC2L_OPTION, Convert__CoprocNum1_0__CoprocReg1_1__MemNoOffset1_2__CoprocOption1_3, Feature_PreV8, { MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, }, + { 391 /* ldc2l */, ARM::LDC2L_POST, Convert__CoprocNum1_0__CoprocReg1_1__MemNoOffset1_2__PostIdxImm8s41_3, Feature_PreV8, { MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_PostIdxImm8s4 }, }, + { 391 /* ldc2l */, ARM::t2LDC2L_PRE, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_PreV8|Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5, MCK__EXCLAIM_ }, }, + { 391 /* ldc2l */, ARM::t2LDC2L_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, Feature_PreV8|Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, }, + { 391 /* ldc2l */, ARM::t2LDC2L_POST, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__PostIdxImm8s41_4__CondCode2_0, Feature_PreV8|Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_PostIdxImm8s4 }, }, + { 397 /* ldcl */, ARM::LDCL_OFFSET, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5 }, }, + { 397 /* ldcl */, ARM::t2LDCL_OFFSET, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5 }, }, + { 397 /* ldcl */, ARM::LDCL_PRE, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5, MCK__EXCLAIM_ }, }, + { 397 /* ldcl */, ARM::t2LDCL_PRE, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5, MCK__EXCLAIM_ }, }, + { 397 /* ldcl */, ARM::LDCL_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, }, + { 397 /* ldcl */, ARM::t2LDCL_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, }, + { 397 /* ldcl */, ARM::LDCL_POST, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__PostIdxImm8s41_4__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_PostIdxImm8s4 }, }, + { 397 /* ldcl */, ARM::t2LDCL_POST, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__PostIdxImm8s41_4__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_PostIdxImm8s4 }, }, + { 402 /* ldm */, ARM::tLDMIA, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_RegList }, }, + { 402 /* ldm */, ARM::LDMIA, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_RegList }, }, + { 402 /* ldm */, ARM::t2LDMIA, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_RegList }, }, + { 402 /* ldm */, ARM::t2LDMIA, Convert__Reg1_2__CondCode2_0__RegList1_3, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPR, MCK_RegList }, }, + { 402 /* ldm */, ARM::tLDMIA, Convert__Reg1_1__CondCode2_0__RegList1_3, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK__EXCLAIM_, MCK_RegList }, }, + { 402 /* ldm */, ARM::LDMIA_UPD, Convert__Reg1_1__Tie0__CondCode2_0__RegList1_3, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_RegList }, }, + { 402 /* ldm */, ARM::t2LDMIA_UPD, Convert__Reg1_1__Tie0__CondCode2_0__RegList1_3, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_RegList }, }, + { 402 /* ldm */, ARM::sysLDMIA, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_RegList, MCK__94_ }, }, + { 402 /* ldm */, ARM::t2LDMIA_UPD, Convert__Reg1_2__Tie0__CondCode2_0__RegList1_4, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPR, MCK__EXCLAIM_, MCK_RegList }, }, + { 402 /* ldm */, ARM::sysLDMIA_UPD, Convert__Reg1_1__Tie0__CondCode2_0__RegList1_3, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_RegList, MCK__94_ }, }, + { 406 /* ldmda */, ARM::LDMDA, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_RegList }, }, + { 406 /* ldmda */, ARM::LDMDA_UPD, Convert__Reg1_1__Tie0__CondCode2_0__RegList1_3, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_RegList }, }, + { 406 /* ldmda */, ARM::sysLDMDA, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_RegList, MCK__94_ }, }, + { 406 /* ldmda */, ARM::sysLDMDA_UPD, Convert__Reg1_1__Tie0__CondCode2_0__RegList1_3, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_RegList, MCK__94_ }, }, + { 412 /* ldmdb */, ARM::LDMDB, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_RegList }, }, + { 412 /* ldmdb */, ARM::t2LDMDB, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_RegList }, }, + { 412 /* ldmdb */, ARM::t2LDMDB, Convert__Reg1_2__CondCode2_0__RegList1_3, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPR, MCK_RegList }, }, + { 412 /* ldmdb */, ARM::LDMDB_UPD, Convert__Reg1_1__Tie0__CondCode2_0__RegList1_3, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_RegList }, }, + { 412 /* ldmdb */, ARM::t2LDMDB_UPD, Convert__Reg1_1__Tie0__CondCode2_0__RegList1_3, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_RegList }, }, + { 412 /* ldmdb */, ARM::sysLDMDB, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_RegList, MCK__94_ }, }, + { 412 /* ldmdb */, ARM::t2LDMDB_UPD, Convert__Reg1_2__Tie0__CondCode2_0__RegList1_4, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPR, MCK__EXCLAIM_, MCK_RegList }, }, + { 412 /* ldmdb */, ARM::sysLDMDB_UPD, Convert__Reg1_1__Tie0__CondCode2_0__RegList1_3, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_RegList, MCK__94_ }, }, + { 418 /* ldmib */, ARM::LDMIB, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_RegList }, }, + { 418 /* ldmib */, ARM::LDMIB_UPD, Convert__Reg1_1__Tie0__CondCode2_0__RegList1_3, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_RegList }, }, + { 418 /* ldmib */, ARM::sysLDMIB, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_RegList, MCK__94_ }, }, + { 418 /* ldmib */, ARM::sysLDMIB_UPD, Convert__Reg1_1__Tie0__CondCode2_0__RegList1_3, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_RegList, MCK__94_ }, }, + { 424 /* ldr */, ARM::tLDRpci, Convert__Reg1_1__ThumbMemPC1_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_ThumbMemPC }, }, + { 424 /* ldr */, ARM::tLDRi, Convert__Reg1_1__MemThumbRIs42_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_MemThumbRIs4 }, }, + { 424 /* ldr */, ARM::tLDRr, Convert__Reg1_1__MemThumbRR2_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_MemThumbRR }, }, + { 424 /* ldr */, ARM::tLDRspi, Convert__Reg1_1__MemThumbSPI2_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_MemThumbSPI }, }, + { 424 /* ldr */, ARM::t2LDRpci, Convert__Reg1_1__Imm1_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_Imm }, }, + { 424 /* ldr */, ARM::LDRi12, Convert__Reg1_1__MemImm12Offset2_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemImm12Offset }, }, + { 424 /* ldr */, ARM::t2LDRi8, Convert__Reg1_1__MemNegImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_MemNegImm8Offset }, }, + { 424 /* ldr */, ARM::LDRrs, Convert__Reg1_1__MemRegOffset3_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemRegOffset }, }, + { 424 /* ldr */, ARM::t2LDRi12, Convert__Reg1_1__MemUImm12Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_MemUImm12Offset }, }, + { 424 /* ldr */, ARM::t2LDRs, Convert__Reg1_1__T2MemRegOffset3_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_T2MemRegOffset }, }, + { 424 /* ldr */, ARM::t2LDRpcrel, Convert__Reg1_1__MemPCRelImm121_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_MemPCRelImm12 }, }, + { 424 /* ldr */, ARM::t2LDRpci, Convert__Reg1_2__Imm1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPR, MCK_Imm }, }, + { 424 /* ldr */, ARM::t2LDRi12, Convert__Reg1_2__MemUImm12Offset2_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPR, MCK_MemUImm12Offset }, }, + { 424 /* ldr */, ARM::t2LDRs, Convert__Reg1_2__T2MemRegOffset3_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPR, MCK_T2MemRegOffset }, }, + { 424 /* ldr */, ARM::t2LDRpcrel, Convert__Reg1_2__MemPCRelImm121_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPR, MCK_MemPCRelImm12 }, }, + { 424 /* ldr */, ARM::LDR_PRE_IMM, Convert__Reg1_1__imm_95_0__MemImm12Offset2_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemImm12Offset, MCK__EXCLAIM_ }, }, + { 424 /* ldr */, ARM::t2LDR_PRE, Convert__Reg1_1__imm_95_0__MemImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_MemImm8Offset, MCK__EXCLAIM_ }, }, + { 424 /* ldr */, ARM::LDR_POST_IMM, Convert__Reg1_1__MemNoOffset1_2__Tie1__AM2OffsetImm2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_AM2OffsetImm }, }, + { 424 /* ldr */, ARM::t2LDR_POST, Convert__Reg1_1__MemNoOffset1_2__Tie1__Imm1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_Imm }, }, + { 424 /* ldr */, ARM::LDR_POST_REG, Convert__Reg1_1__MemNoOffset1_2__Tie1__PostIdxRegShifted2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_PostIdxRegShifted }, }, + { 424 /* ldr */, ARM::LDR_PRE_REG, Convert__Reg1_1__imm_95_0__MemRegOffset3_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemRegOffset, MCK__EXCLAIM_ }, }, + { 428 /* ldrb */, ARM::tLDRBi, Convert__Reg1_1__MemThumbRIs12_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_MemThumbRIs1 }, }, + { 428 /* ldrb */, ARM::tLDRBr, Convert__Reg1_1__MemThumbRR2_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_MemThumbRR }, }, + { 428 /* ldrb */, ARM::t2LDRBpci, Convert__Reg1_1__Imm1_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_Imm }, }, + { 428 /* ldrb */, ARM::t2LDRBi12, Convert__Reg1_1__MemUImm12Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_MemUImm12Offset }, }, + { 428 /* ldrb */, ARM::t2LDRBs, Convert__Reg1_1__T2MemRegOffset3_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_T2MemRegOffset }, }, + { 428 /* ldrb */, ARM::LDRBi12, Convert__Reg1_1__MemImm12Offset2_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_MemImm12Offset }, }, + { 428 /* ldrb */, ARM::t2LDRBi8, Convert__Reg1_1__MemNegImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_MemNegImm8Offset }, }, + { 428 /* ldrb */, ARM::LDRBrs, Convert__Reg1_1__MemRegOffset3_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_MemRegOffset }, }, + { 428 /* ldrb */, ARM::t2LDRBpcrel, Convert__Reg1_1__MemPCRelImm121_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_MemPCRelImm12 }, }, + { 428 /* ldrb */, ARM::t2LDRBpci, Convert__Reg1_2__Imm1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_Imm }, }, + { 428 /* ldrb */, ARM::t2LDRBi12, Convert__Reg1_2__MemUImm12Offset2_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_MemUImm12Offset }, }, + { 428 /* ldrb */, ARM::t2LDRBs, Convert__Reg1_2__T2MemRegOffset3_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_T2MemRegOffset }, }, + { 428 /* ldrb */, ARM::t2LDRBpcrel, Convert__Reg1_2__MemPCRelImm121_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_MemPCRelImm12 }, }, + { 428 /* ldrb */, ARM::LDRB_PRE_IMM, Convert__Reg1_1__imm_95_0__MemImm12Offset2_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemImm12Offset, MCK__EXCLAIM_ }, }, + { 428 /* ldrb */, ARM::t2LDRB_PRE, Convert__Reg1_1__imm_95_0__MemImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_MemImm8Offset, MCK__EXCLAIM_ }, }, + { 428 /* ldrb */, ARM::LDRB_POST_IMM, Convert__Reg1_1__MemNoOffset1_2__Tie1__AM2OffsetImm2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_AM2OffsetImm }, }, + { 428 /* ldrb */, ARM::t2LDRB_POST, Convert__Reg1_1__MemNoOffset1_2__Tie1__Imm1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_Imm }, }, + { 428 /* ldrb */, ARM::LDRB_POST_REG, Convert__Reg1_1__MemNoOffset1_2__Tie1__PostIdxRegShifted2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_PostIdxRegShifted }, }, + { 428 /* ldrb */, ARM::LDRB_PRE_REG, Convert__Reg1_1__imm_95_0__MemRegOffset3_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemRegOffset, MCK__EXCLAIM_ }, }, + { 433 /* ldrbt */, ARM::t2LDRBT, Convert__Reg1_1__MemPosImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_MemPosImm8Offset }, }, + { 433 /* ldrbt */, ARM::LDRBT_POST, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset }, }, + { 433 /* ldrbt */, ARM::LDRBT_POST_IMM, Convert__Reg1_1__MemNoOffset1_2__Tie1__AM2OffsetImm2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_AM2OffsetImm }, }, + { 433 /* ldrbt */, ARM::LDRBT_POST_REG, Convert__Reg1_1__MemNoOffset1_2__Tie1__PostIdxRegShifted2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_PostIdxRegShifted }, }, + { 439 /* ldrd */, ARM::t2LDRDi8, Convert__Reg1_1__Reg1_2__MemImm8s4Offset2_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_MemImm8s4Offset }, }, + { 439 /* ldrd */, ARM::LDRD, Convert__Reg1_1__Reg1_2__AddrMode33_3__CondCode2_0, Feature_IsARM|Feature_HasV5TE, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_AddrMode3 }, }, + { 439 /* ldrd */, ARM::t2LDRD_PRE, Convert__Reg1_1__Reg1_2__imm_95_0__MemImm8s4Offset2_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_MemImm8s4Offset, MCK__EXCLAIM_ }, }, + { 439 /* ldrd */, ARM::t2LDRD_POST, Convert__Reg1_1__Reg1_2__MemNoOffset1_3__Tie2__Imm1_4__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_MemNoOffset, MCK_Imm }, }, + { 439 /* ldrd */, ARM::LDRD_PRE, Convert__Reg1_1__Reg1_2__imm_95_0__AddrMode33_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_AddrMode3, MCK__EXCLAIM_ }, }, + { 439 /* ldrd */, ARM::LDRD_POST, Convert__Reg1_1__Reg1_2__MemNoOffset1_3__Tie2__AM3Offset2_4__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_MemNoOffset, MCK_AM3Offset }, }, + { 444 /* ldrex */, ARM::t2LDREX, Convert__Reg1_1__MemImm0_1020s4Offset2_2__CondCode2_0, Feature_IsThumb|Feature_HasV8MBaseline, { MCK_CondCode, MCK_rGPR, MCK_MemImm0_1020s4Offset }, }, + { 444 /* ldrex */, ARM::LDREX, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset }, }, + { 450 /* ldrexb */, ARM::t2LDREXB, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsThumb|Feature_HasV8MBaseline, { MCK_CondCode, MCK_rGPR, MCK_MemNoOffset }, }, + { 450 /* ldrexb */, ARM::LDREXB, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset }, }, + { 457 /* ldrexd */, ARM::LDREXD, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRPair, MCK_MemNoOffset }, }, + { 457 /* ldrexd */, ARM::t2LDREXD, Convert__Reg1_1__Reg1_2__MemNoOffset1_3__CondCode2_0, Feature_IsThumb2|Feature_IsNotMClass, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_MemNoOffset }, }, + { 464 /* ldrexh */, ARM::t2LDREXH, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsThumb|Feature_HasV8MBaseline, { MCK_CondCode, MCK_rGPR, MCK_MemNoOffset }, }, + { 464 /* ldrexh */, ARM::LDREXH, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset }, }, + { 471 /* ldrh */, ARM::tLDRHi, Convert__Reg1_1__MemThumbRIs22_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_MemThumbRIs2 }, }, + { 471 /* ldrh */, ARM::tLDRHr, Convert__Reg1_1__MemThumbRR2_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_MemThumbRR }, }, + { 471 /* ldrh */, ARM::t2LDRHpci, Convert__Reg1_1__Imm1_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_Imm }, }, + { 471 /* ldrh */, ARM::t2LDRHi12, Convert__Reg1_1__MemUImm12Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_MemUImm12Offset }, }, + { 471 /* ldrh */, ARM::t2LDRHs, Convert__Reg1_1__T2MemRegOffset3_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_T2MemRegOffset }, }, + { 471 /* ldrh */, ARM::t2LDRHi8, Convert__Reg1_1__MemNegImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_MemNegImm8Offset }, }, + { 471 /* ldrh */, ARM::t2LDRHpcrel, Convert__Reg1_1__MemPCRelImm121_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_MemPCRelImm12 }, }, + { 471 /* ldrh */, ARM::LDRH, Convert__Reg1_1__AddrMode33_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_AddrMode3 }, }, + { 471 /* ldrh */, ARM::t2LDRHpci, Convert__Reg1_2__Imm1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_Imm }, }, + { 471 /* ldrh */, ARM::t2LDRHi12, Convert__Reg1_2__MemUImm12Offset2_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_MemUImm12Offset }, }, + { 471 /* ldrh */, ARM::t2LDRHs, Convert__Reg1_2__T2MemRegOffset3_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_T2MemRegOffset }, }, + { 471 /* ldrh */, ARM::t2LDRHpcrel, Convert__Reg1_2__MemPCRelImm121_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_MemPCRelImm12 }, }, + { 471 /* ldrh */, ARM::LDRH_PRE, Convert__Reg1_1__imm_95_0__AddrMode33_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_AddrMode3, MCK__EXCLAIM_ }, }, + { 471 /* ldrh */, ARM::t2LDRH_PRE, Convert__Reg1_1__imm_95_0__MemImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_MemImm8Offset, MCK__EXCLAIM_ }, }, + { 471 /* ldrh */, ARM::LDRH_POST, Convert__Reg1_1__MemNoOffset1_2__Tie1__AM3Offset2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_AM3Offset }, }, + { 471 /* ldrh */, ARM::t2LDRH_POST, Convert__Reg1_1__MemNoOffset1_2__Tie1__Imm1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_Imm }, }, + { 476 /* ldrht */, ARM::t2LDRHT, Convert__Reg1_1__MemPosImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_MemPosImm8Offset }, }, + { 476 /* ldrht */, ARM::LDRHTr, Convert__Reg1_1__MemNoOffset1_2__Tie1__PostIdxReg2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_MemNoOffset, MCK_PostIdxReg }, }, + { 476 /* ldrht */, ARM::LDRHTi, Convert__Reg1_1__MemNoOffset1_2__Tie1__PostIdxImm81_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_PostIdxImm8 }, }, + { 482 /* ldrsb */, ARM::tLDRSB, Convert__Reg1_1__MemThumbRR2_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_MemThumbRR }, }, + { 482 /* ldrsb */, ARM::t2LDRSBpci, Convert__Reg1_1__Imm1_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_Imm }, }, + { 482 /* ldrsb */, ARM::t2LDRSBi12, Convert__Reg1_1__MemUImm12Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_MemUImm12Offset }, }, + { 482 /* ldrsb */, ARM::t2LDRSBs, Convert__Reg1_1__T2MemRegOffset3_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_T2MemRegOffset }, }, + { 482 /* ldrsb */, ARM::t2LDRSBi8, Convert__Reg1_1__MemNegImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_MemNegImm8Offset }, }, + { 482 /* ldrsb */, ARM::t2LDRSBpcrel, Convert__Reg1_1__MemPCRelImm121_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_MemPCRelImm12 }, }, + { 482 /* ldrsb */, ARM::LDRSB, Convert__Reg1_1__AddrMode33_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_AddrMode3 }, }, + { 482 /* ldrsb */, ARM::t2LDRSBpci, Convert__Reg1_2__Imm1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_Imm }, }, + { 482 /* ldrsb */, ARM::t2LDRSBi12, Convert__Reg1_2__MemUImm12Offset2_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_MemUImm12Offset }, }, + { 482 /* ldrsb */, ARM::t2LDRSBs, Convert__Reg1_2__T2MemRegOffset3_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_T2MemRegOffset }, }, + { 482 /* ldrsb */, ARM::t2LDRSBpcrel, Convert__Reg1_2__MemPCRelImm121_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_MemPCRelImm12 }, }, + { 482 /* ldrsb */, ARM::LDRSB_PRE, Convert__Reg1_1__imm_95_0__AddrMode33_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_AddrMode3, MCK__EXCLAIM_ }, }, + { 482 /* ldrsb */, ARM::t2LDRSB_PRE, Convert__Reg1_1__imm_95_0__MemImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_MemImm8Offset, MCK__EXCLAIM_ }, }, + { 482 /* ldrsb */, ARM::LDRSB_POST, Convert__Reg1_1__MemNoOffset1_2__Tie1__AM3Offset2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_AM3Offset }, }, + { 482 /* ldrsb */, ARM::t2LDRSB_POST, Convert__Reg1_1__MemNoOffset1_2__Tie1__Imm1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_Imm }, }, + { 488 /* ldrsbt */, ARM::t2LDRSBT, Convert__Reg1_1__MemPosImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_MemPosImm8Offset }, }, + { 488 /* ldrsbt */, ARM::LDRSBTr, Convert__Reg1_1__MemNoOffset1_2__Tie1__PostIdxReg2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_MemNoOffset, MCK_PostIdxReg }, }, + { 488 /* ldrsbt */, ARM::LDRSBTi, Convert__Reg1_1__MemNoOffset1_2__Tie1__PostIdxImm81_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_PostIdxImm8 }, }, + { 495 /* ldrsh */, ARM::tLDRSH, Convert__Reg1_1__MemThumbRR2_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_MemThumbRR }, }, + { 495 /* ldrsh */, ARM::t2LDRSHpci, Convert__Reg1_1__Imm1_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_Imm }, }, + { 495 /* ldrsh */, ARM::t2LDRSHi12, Convert__Reg1_1__MemUImm12Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_MemUImm12Offset }, }, + { 495 /* ldrsh */, ARM::t2LDRSHs, Convert__Reg1_1__T2MemRegOffset3_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_T2MemRegOffset }, }, + { 495 /* ldrsh */, ARM::t2LDRSHi8, Convert__Reg1_1__MemNegImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_MemNegImm8Offset }, }, + { 495 /* ldrsh */, ARM::t2LDRSHpcrel, Convert__Reg1_1__MemPCRelImm121_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_MemPCRelImm12 }, }, + { 495 /* ldrsh */, ARM::LDRSH, Convert__Reg1_1__AddrMode33_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_AddrMode3 }, }, + { 495 /* ldrsh */, ARM::t2LDRSHpci, Convert__Reg1_2__Imm1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_Imm }, }, + { 495 /* ldrsh */, ARM::t2LDRSHi12, Convert__Reg1_2__MemUImm12Offset2_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_MemUImm12Offset }, }, + { 495 /* ldrsh */, ARM::t2LDRSHs, Convert__Reg1_2__T2MemRegOffset3_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_T2MemRegOffset }, }, + { 495 /* ldrsh */, ARM::t2LDRSHpcrel, Convert__Reg1_2__MemPCRelImm121_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_MemPCRelImm12 }, }, + { 495 /* ldrsh */, ARM::LDRSH_PRE, Convert__Reg1_1__imm_95_0__AddrMode33_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_AddrMode3, MCK__EXCLAIM_ }, }, + { 495 /* ldrsh */, ARM::t2LDRSH_PRE, Convert__Reg1_1__imm_95_0__MemImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_MemImm8Offset, MCK__EXCLAIM_ }, }, + { 495 /* ldrsh */, ARM::LDRSH_POST, Convert__Reg1_1__MemNoOffset1_2__Tie1__AM3Offset2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_AM3Offset }, }, + { 495 /* ldrsh */, ARM::t2LDRSH_POST, Convert__Reg1_1__MemNoOffset1_2__Tie1__Imm1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_Imm }, }, + { 501 /* ldrsht */, ARM::t2LDRSHT, Convert__Reg1_1__MemPosImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_MemPosImm8Offset }, }, + { 501 /* ldrsht */, ARM::LDRSHTr, Convert__Reg1_1__MemNoOffset1_2__Tie1__PostIdxReg2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_MemNoOffset, MCK_PostIdxReg }, }, + { 501 /* ldrsht */, ARM::LDRSHTi, Convert__Reg1_1__MemNoOffset1_2__Tie1__PostIdxImm81_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_PostIdxImm8 }, }, + { 508 /* ldrt */, ARM::t2LDRT, Convert__Reg1_1__MemPosImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_MemPosImm8Offset }, }, + { 508 /* ldrt */, ARM::LDRT_POST, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset }, }, + { 508 /* ldrt */, ARM::LDRT_POST_IMM, Convert__Reg1_1__MemNoOffset1_2__Tie1__AM2OffsetImm2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_AM2OffsetImm }, }, + { 508 /* ldrt */, ARM::LDRT_POST_REG, Convert__Reg1_1__MemNoOffset1_2__Tie1__PostIdxRegShifted2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_PostIdxRegShifted }, }, + { 513 /* lsl */, ARM::tLSLrr, Convert__Reg1_2__CCOut1_0__Tie0__Reg1_3__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR }, }, + { 513 /* lsl */, ARM::tLSLri, Convert__Reg1_2__CCOut1_0__Reg1_2__Imm0_311_3__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_Imm0_31 }, }, + { 513 /* lsl */, ARM::t2LSLrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 513 /* lsl */, ARM::t2LSLri, Convert__Reg1_2__Reg1_2__Imm0_311_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_Imm0_31 }, }, + { 513 /* lsl */, ARM::LSLr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc }, }, + { 513 /* lsl */, ARM::LSLi, Convert__Reg1_2__Reg1_2__Imm0_311_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_Imm0_31 }, }, + { 513 /* lsl */, ARM::t2LSLrr, Convert__Reg1_3__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR }, }, + { 513 /* lsl */, ARM::t2LSLri, Convert__Reg1_3__Reg1_3__Imm0_311_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_Imm0_31 }, }, + { 513 /* lsl */, ARM::tLSLri, Convert__Reg1_2__CCOut1_0__Reg1_3__Imm0_311_4__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR, MCK_Imm0_31 }, }, + { 513 /* lsl */, ARM::t2LSLrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 513 /* lsl */, ARM::t2LSLri, Convert__Reg1_2__Reg1_3__Imm0_311_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_Imm0_31 }, }, + { 513 /* lsl */, ARM::LSLr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 513 /* lsl */, ARM::LSLi, Convert__Reg1_2__Reg1_3__Imm0_311_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_Imm0_31 }, }, + { 513 /* lsl */, ARM::t2LSLrr, Convert__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 513 /* lsl */, ARM::t2LSLri, Convert__Reg1_3__Reg1_4__Imm0_311_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_Imm0_31 }, }, + { 517 /* lsr */, ARM::tLSRrr, Convert__Reg1_2__CCOut1_0__Tie0__Reg1_3__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR }, }, + { 517 /* lsr */, ARM::tLSRri, Convert__Reg1_2__CCOut1_0__Reg1_2__ImmThumbSR1_3__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_ImmThumbSR }, }, + { 517 /* lsr */, ARM::t2LSRrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 517 /* lsr */, ARM::t2LSRri, Convert__Reg1_2__Reg1_2__ImmThumbSR1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_ImmThumbSR }, }, + { 517 /* lsr */, ARM::LSRr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc }, }, + { 517 /* lsr */, ARM::LSRi, Convert__Reg1_2__Reg1_2__Imm0_321_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_Imm0_32 }, }, + { 517 /* lsr */, ARM::t2LSRrr, Convert__Reg1_3__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR }, }, + { 517 /* lsr */, ARM::t2LSRri, Convert__Reg1_3__Reg1_3__ImmThumbSR1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_ImmThumbSR }, }, + { 517 /* lsr */, ARM::tLSRri, Convert__Reg1_2__CCOut1_0__Reg1_3__ImmThumbSR1_4__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR, MCK_ImmThumbSR }, }, + { 517 /* lsr */, ARM::t2LSRrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 517 /* lsr */, ARM::t2LSRri, Convert__Reg1_2__Reg1_3__ImmThumbSR1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_ImmThumbSR }, }, + { 517 /* lsr */, ARM::LSRr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 517 /* lsr */, ARM::LSRi, Convert__Reg1_2__Reg1_3__Imm0_321_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_Imm0_32 }, }, + { 517 /* lsr */, ARM::t2LSRrr, Convert__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 517 /* lsr */, ARM::t2LSRri, Convert__Reg1_3__Reg1_4__ImmThumbSR1_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_ImmThumbSR }, }, + { 521 /* mcr */, ARM::MCR, Convert__CoprocNum1_1__Imm0_71_2__Reg1_3__CoprocReg1_4__CoprocReg1_5__imm_95_0__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_Imm0_7, MCK_GPR, MCK_CoprocReg, MCK_CoprocReg }, }, + { 521 /* mcr */, ARM::t2MCR, Convert__CoprocNum1_1__Imm0_71_2__Reg1_3__CoprocReg1_4__CoprocReg1_5__imm_95_0__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_Imm0_7, MCK_GPR, MCK_CoprocReg, MCK_CoprocReg }, }, + { 521 /* mcr */, ARM::MCR, Convert__CoprocNum1_1__Imm0_71_2__Reg1_3__CoprocReg1_4__CoprocReg1_5__Imm0_71_6__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_Imm0_7, MCK_GPR, MCK_CoprocReg, MCK_CoprocReg, MCK_Imm0_7 }, }, + { 521 /* mcr */, ARM::t2MCR, Convert__CoprocNum1_1__Imm0_71_2__Reg1_3__CoprocReg1_4__CoprocReg1_5__Imm0_71_6__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_Imm0_7, MCK_GPR, MCK_CoprocReg, MCK_CoprocReg, MCK_Imm0_7 }, }, + { 525 /* mcr2 */, ARM::MCR2, Convert__CoprocNum1_0__Imm0_71_1__Reg1_2__CoprocReg1_3__CoprocReg1_4__imm_95_0, Feature_IsARM, { MCK_CoprocNum, MCK_Imm0_7, MCK_GPR, MCK_CoprocReg, MCK_CoprocReg }, }, + { 525 /* mcr2 */, ARM::t2MCR2, Convert__CoprocNum1_1__Imm0_71_2__Reg1_3__CoprocReg1_4__CoprocReg1_5__imm_95_0__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_Imm0_7, MCK_GPR, MCK_CoprocReg, MCK_CoprocReg }, }, + { 525 /* mcr2 */, ARM::MCR2, Convert__CoprocNum1_0__Imm0_71_1__Reg1_2__CoprocReg1_3__CoprocReg1_4__Imm0_71_5, Feature_PreV8, { MCK_CoprocNum, MCK_Imm0_7, MCK_GPR, MCK_CoprocReg, MCK_CoprocReg, MCK_Imm0_7 }, }, + { 525 /* mcr2 */, ARM::t2MCR2, Convert__CoprocNum1_1__Imm0_71_2__Reg1_3__CoprocReg1_4__CoprocReg1_5__Imm0_71_6__CondCode2_0, Feature_IsThumb2|Feature_PreV8, { MCK_CondCode, MCK_CoprocNum, MCK_Imm0_7, MCK_GPR, MCK_CoprocReg, MCK_CoprocReg, MCK_Imm0_7 }, }, + { 530 /* mcrr */, ARM::MCRR, Convert__CoprocNum1_1__Imm0_151_2__Reg1_3__Reg1_4__CoprocReg1_5__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_Imm0_15, MCK_GPRnopc, MCK_GPRnopc, MCK_CoprocReg }, }, + { 530 /* mcrr */, ARM::t2MCRR, Convert__CoprocNum1_1__Imm0_151_2__Reg1_3__Reg1_4__CoprocReg1_5__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_Imm0_15, MCK_GPR, MCK_GPR, MCK_CoprocReg }, }, + { 535 /* mcrr2 */, ARM::MCRR2, Convert__CoprocNum1_0__Imm0_151_1__Reg1_2__Reg1_3__CoprocReg1_4, Feature_PreV8, { MCK_CoprocNum, MCK_Imm0_15, MCK_GPRnopc, MCK_GPRnopc, MCK_CoprocReg }, }, + { 535 /* mcrr2 */, ARM::t2MCRR2, Convert__CoprocNum1_1__Imm0_151_2__Reg1_3__Reg1_4__CoprocReg1_5__CondCode2_0, Feature_IsThumb2|Feature_PreV8, { MCK_CondCode, MCK_CoprocNum, MCK_Imm0_15, MCK_GPR, MCK_GPR, MCK_CoprocReg }, }, + { 541 /* mla */, ARM::t2MLA, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 541 /* mla */, ARM::MLA, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, Feature_IsARM|Feature_HasV6, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 541 /* mla */, ARM::MLA, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 545 /* mls */, ARM::t2MLS, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 545 /* mls */, ARM::MLS, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV6T2, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 549 /* mov */, ARM::MOVPCLR, Convert__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_PC, MCK_LR }, }, + { 549 /* mov */, ARM::t2MOVi16, Convert__Reg1_1__Imm256_65535Expr1_2__CondCode2_0, Feature_IsThumb|Feature_HasV8MBaseline, { MCK_CondCode, MCK_rGPR, MCK_Imm256_65535Expr }, }, + { 549 /* mov */, ARM::t2MOVsi, Convert__Reg1_1__RegShiftedImm2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_RegShiftedImm }, }, + { 549 /* mov */, ARM::t2MOVsr, Convert__Reg1_1__RegShiftedReg3_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_RegShiftedReg }, }, + { 549 /* mov */, ARM::t2MOVi, Convert__Reg1_1__T2SOImm1_2__CondCode2_0__reg0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_T2SOImm }, }, + { 549 /* mov */, ARM::t2MVNi, Convert__Reg1_1__T2SOImmNot1_2__CondCode2_0__reg0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_T2SOImmNot }, }, + { 549 /* mov */, ARM::tMOVr, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 549 /* mov */, ARM::MOVi16, Convert__Reg1_1__Imm0_65535Expr1_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_Imm0_65535Expr }, }, + { 549 /* mov */, ARM::MOVr_TC, Convert__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_tcGPR, MCK_tcGPR }, }, + { 549 /* mov */, ARM::tMOVi8, Convert__Reg1_2__CCOut1_0__Imm0_2551_3__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_Imm0_255 }, }, + { 549 /* mov */, ARM::MVNi, Convert__Reg1_2__ModImmNot1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_ModImmNot }, }, + { 549 /* mov */, ARM::MOVsr, Convert__Reg1_2__RegShiftedReg3_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_RegShiftedReg }, }, + { 549 /* mov */, ARM::MOVr, Convert__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 549 /* mov */, ARM::MOVi, Convert__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, }, + { 549 /* mov */, ARM::MOVsi, Convert__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_RegShiftedImm }, }, + { 549 /* mov */, ARM::t2MOVi, Convert__Reg1_2__T2SOImm1_3__CondCode2_0__reg0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_T2SOImm }, }, + { 549 /* mov */, ARM::t2MOVr, Convert__Reg1_2__Reg1_3__CondCode2_0__reg0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_GPR }, }, + { 549 /* mov */, ARM::t2MOVi, Convert__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_T2SOImm }, }, + { 549 /* mov */, ARM::t2MOVr, Convert__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_GPR }, }, + { 553 /* movs */, ARM::tMOVSr, Convert__Reg1_0__Reg1_1, Feature_IsThumb, { MCK_tGPR, MCK_tGPR }, }, + { 553 /* movs */, ARM::tMOVi8, Convert__Reg1_0__regCPSR__Imm0_2551_1__imm_95_14__imm_95_0, Feature_IsThumb, { MCK_tGPR, MCK_Imm0_255 }, }, + { 553 /* movs */, ARM::t2MOVSsi, Convert__Reg1_1__RegShiftedImm2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_RegShiftedImm }, }, + { 553 /* movs */, ARM::t2MOVSsr, Convert__Reg1_1__RegShiftedReg3_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_RegShiftedReg }, }, + { 553 /* movs */, ARM::t2MOVi, Convert__Reg1_1__T2SOImm1_2__CondCode2_0__regCPSR, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_T2SOImm }, }, + { 553 /* movs */, ARM::t2MOVr, Convert__Reg1_1__Reg1_2__CondCode2_0__regCPSR, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_GPR }, }, + { 553 /* movs */, ARM::t2MOVi, Convert__Reg1_2__T2SOImm1_3__CondCode2_0__regCPSR, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_T2SOImm }, }, + { 553 /* movs */, ARM::t2MOVr, Convert__Reg1_2__Reg1_3__CondCode2_0__regCPSR, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_GPR }, }, + { 558 /* movt */, ARM::t2MOVTi16, Convert__Reg1_1__Tie0__Imm0_65535Expr1_2__CondCode2_0, Feature_IsThumb|Feature_HasV8MBaseline, { MCK_CondCode, MCK_rGPR, MCK_Imm0_65535Expr }, }, + { 558 /* movt */, ARM::MOVTi16, Convert__Reg1_1__Tie0__Imm0_65535Expr1_2__CondCode2_0, Feature_IsARM|Feature_HasV6T2, { MCK_CondCode, MCK_GPRnopc, MCK_Imm0_65535Expr }, }, + { 563 /* movw */, ARM::t2MOVi16, Convert__Reg1_1__Imm0_65535Expr1_2__CondCode2_0, Feature_IsThumb|Feature_HasV8MBaseline, { MCK_CondCode, MCK_rGPR, MCK_Imm0_65535Expr }, }, + { 563 /* movw */, ARM::MOVi16, Convert__Reg1_1__Imm0_65535Expr1_2__CondCode2_0, Feature_IsARM|Feature_HasV6T2, { MCK_CondCode, MCK_GPR, MCK_Imm0_65535Expr }, }, + { 568 /* mrc */, ARM::MRC, Convert__Reg1_3__CoprocNum1_1__Imm0_71_2__CoprocReg1_4__CoprocReg1_5__imm_95_0__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_Imm0_7, MCK_GPRwithAPSR, MCK_CoprocReg, MCK_CoprocReg }, }, + { 568 /* mrc */, ARM::t2MRC, Convert__Reg1_3__CoprocNum1_1__Imm0_71_2__CoprocReg1_4__CoprocReg1_5__imm_95_0__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_Imm0_7, MCK_GPRwithAPSR, MCK_CoprocReg, MCK_CoprocReg }, }, + { 568 /* mrc */, ARM::MRC, Convert__Reg1_3__CoprocNum1_1__Imm0_71_2__CoprocReg1_4__CoprocReg1_5__Imm0_71_6__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_Imm0_7, MCK_GPRwithAPSR, MCK_CoprocReg, MCK_CoprocReg, MCK_Imm0_7 }, }, + { 568 /* mrc */, ARM::t2MRC, Convert__Reg1_3__CoprocNum1_1__Imm0_71_2__CoprocReg1_4__CoprocReg1_5__Imm0_71_6__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_Imm0_7, MCK_GPRwithAPSR, MCK_CoprocReg, MCK_CoprocReg, MCK_Imm0_7 }, }, + { 572 /* mrc2 */, ARM::MRC2, Convert__Reg1_2__CoprocNum1_0__Imm0_71_1__CoprocReg1_3__CoprocReg1_4__imm_95_0, Feature_IsARM, { MCK_CoprocNum, MCK_Imm0_7, MCK_GPRwithAPSR, MCK_CoprocReg, MCK_CoprocReg }, }, + { 572 /* mrc2 */, ARM::t2MRC2, Convert__Reg1_3__CoprocNum1_1__Imm0_71_2__CoprocReg1_4__CoprocReg1_5__imm_95_0__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_Imm0_7, MCK_GPRwithAPSR, MCK_CoprocReg, MCK_CoprocReg }, }, + { 572 /* mrc2 */, ARM::MRC2, Convert__Reg1_2__CoprocNum1_0__Imm0_71_1__CoprocReg1_3__CoprocReg1_4__Imm0_71_5, Feature_PreV8, { MCK_CoprocNum, MCK_Imm0_7, MCK_GPRwithAPSR, MCK_CoprocReg, MCK_CoprocReg, MCK_Imm0_7 }, }, + { 572 /* mrc2 */, ARM::t2MRC2, Convert__Reg1_3__CoprocNum1_1__Imm0_71_2__CoprocReg1_4__CoprocReg1_5__Imm0_71_6__CondCode2_0, Feature_IsThumb2|Feature_PreV8, { MCK_CondCode, MCK_CoprocNum, MCK_Imm0_7, MCK_GPRwithAPSR, MCK_CoprocReg, MCK_CoprocReg, MCK_Imm0_7 }, }, + { 577 /* mrrc */, ARM::MRRC, Convert__Reg1_3__Reg1_4__CoprocNum1_1__Imm0_151_2__CoprocReg1_5__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_Imm0_15, MCK_GPRnopc, MCK_GPRnopc, MCK_CoprocReg }, }, + { 577 /* mrrc */, ARM::t2MRRC, Convert__Reg1_3__Reg1_4__CoprocNum1_1__Imm0_151_2__CoprocReg1_5__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_Imm0_15, MCK_GPR, MCK_GPR, MCK_CoprocReg }, }, + { 582 /* mrrc2 */, ARM::MRRC2, Convert__CoprocNum1_0__Imm0_151_1__Reg1_2__Reg1_3__CoprocReg1_4, Feature_PreV8, { MCK_CoprocNum, MCK_Imm0_15, MCK_GPRnopc, MCK_GPRnopc, MCK_CoprocReg }, }, + { 582 /* mrrc2 */, ARM::t2MRRC2, Convert__Reg1_3__Reg1_4__CoprocNum1_1__Imm0_151_2__CoprocReg1_5__CondCode2_0, Feature_IsThumb2|Feature_PreV8, { MCK_CondCode, MCK_CoprocNum, MCK_Imm0_15, MCK_GPR, MCK_GPR, MCK_CoprocReg }, }, + { 588 /* mrs */, ARM::t2MRSbanked, Convert__Reg1_1__BankedReg1_2__CondCode2_0, Feature_IsThumb|Feature_HasVirtualization, { MCK_CondCode, MCK_rGPR, MCK_BankedReg }, }, + { 588 /* mrs */, ARM::t2MRS_M, Convert__Reg1_1__MSRMask1_2__CondCode2_0, Feature_IsThumb|Feature_IsMClass, { MCK_CondCode, MCK_rGPR, MCK_MSRMask }, }, + { 588 /* mrs */, ARM::MRS, Convert__Reg1_1__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_APSR }, }, + { 588 /* mrs */, ARM::MRS, Convert__Reg1_1__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_CCR }, }, + { 588 /* mrs */, ARM::MRSsys, Convert__Reg1_1__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_SPSR }, }, + { 588 /* mrs */, ARM::MRSbanked, Convert__Reg1_1__BankedReg1_2__CondCode2_0, Feature_IsARM|Feature_HasVirtualization, { MCK_CondCode, MCK_GPRnopc, MCK_BankedReg }, }, + { 588 /* mrs */, ARM::t2MRS_AR, Convert__Reg1_1__CondCode2_0, Feature_IsThumb2|Feature_IsNotMClass, { MCK_CondCode, MCK_GPR, MCK_APSR }, }, + { 588 /* mrs */, ARM::t2MRS_AR, Convert__Reg1_1__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_CCR }, }, + { 588 /* mrs */, ARM::t2MRSsys_AR, Convert__Reg1_1__CondCode2_0, Feature_IsThumb2|Feature_IsNotMClass, { MCK_CondCode, MCK_GPR, MCK_SPSR }, }, + { 592 /* msr */, ARM::t2MSRbanked, Convert__BankedReg1_1__Reg1_2__CondCode2_0, Feature_IsThumb|Feature_HasVirtualization, { MCK_CondCode, MCK_BankedReg, MCK_rGPR }, }, + { 592 /* msr */, ARM::MSRbanked, Convert__BankedReg1_1__Reg1_2__CondCode2_0, Feature_IsARM|Feature_HasVirtualization, { MCK_CondCode, MCK_BankedReg, MCK_GPRnopc }, }, + { 592 /* msr */, ARM::t2MSR_AR, Convert__MSRMask1_1__Reg1_2__CondCode2_0, Feature_IsThumb2|Feature_IsNotMClass, { MCK_CondCode, MCK_MSRMask, MCK_rGPR }, }, + { 592 /* msr */, ARM::t2MSR_M, Convert__MSRMask1_1__Reg1_2__CondCode2_0, Feature_IsThumb|Feature_IsMClass, { MCK_CondCode, MCK_MSRMask, MCK_rGPR }, }, + { 592 /* msr */, ARM::MSR, Convert__MSRMask1_1__Reg1_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_MSRMask, MCK_GPR }, }, + { 592 /* msr */, ARM::MSRi, Convert__MSRMask1_1__ModImm1_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_MSRMask, MCK_ModImm }, }, + { 596 /* mul */, ARM::t2MUL, Convert__Reg1_1__Reg1_2__Reg1_1__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 596 /* mul */, ARM::tMUL, ConvertCustom_cvtThumbMultiply, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR }, }, + { 596 /* mul */, ARM::MUL, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsARM|Feature_HasV6, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc }, }, + { 596 /* mul */, ARM::t2MUL, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 596 /* mul */, ARM::tMUL, ConvertCustom_cvtThumbMultiply, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR, MCK_tGPR }, }, + { 596 /* mul */, ARM::MUL, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsARM|Feature_HasV6, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 596 /* mul */, ARM::MUL, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 600 /* mvn */, ARM::t2MOVi, Convert__Reg1_1__T2SOImmNot1_2__CondCode2_0__reg0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_T2SOImmNot }, }, + { 600 /* mvn */, ARM::tMVN, Convert__Reg1_2__CCOut1_0__Reg1_3__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR }, }, + { 600 /* mvn */, ARM::t2MVNr, Convert__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 600 /* mvn */, ARM::MOVi, Convert__Reg1_2__ModImmNot1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_ModImmNot }, }, + { 600 /* mvn */, ARM::t2MVNs, Convert__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_RegShiftedImm }, }, + { 600 /* mvn */, ARM::t2MVNi, Convert__Reg1_2__T2SOImm1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_T2SOImm }, }, + { 600 /* mvn */, ARM::MVNr, Convert__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 600 /* mvn */, ARM::MVNi, Convert__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, }, + { 600 /* mvn */, ARM::MVNsi, Convert__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_RegShiftedImm }, }, + { 600 /* mvn */, ARM::MVNsr, Convert__Reg1_2__RegShiftedReg3_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_RegShiftedReg }, }, + { 600 /* mvn */, ARM::t2MVNr, Convert__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR }, }, + { 600 /* mvn */, ARM::t2MVNs, Convert__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_RegShiftedImm }, }, + { 600 /* mvn */, ARM::t2MVNi, Convert__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_T2SOImm }, }, + { 604 /* neg */, ARM::tRSB, Convert__Reg1_2__CCOut1_0__Reg1_3__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR }, }, + { 604 /* neg */, ARM::t2RSBri, Convert__Reg1_2__Reg1_3__imm_95_0__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 604 /* neg */, ARM::RSBri, Convert__Reg1_2__Reg1_3__imm_95_0__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 608 /* nop */, ARM::tMOVr, Convert__regR8__regR8__imm_95_14__imm_95_0, Feature_IsThumb, { }, }, + { 608 /* nop */, ARM::HINT, Convert__imm_95_0__CondCode2_0, Feature_IsARM|Feature_HasV6K, { MCK_CondCode }, }, + { 608 /* nop */, ARM::tHINT, Convert__imm_95_0__CondCode2_0, Feature_IsThumb|Feature_HasV6M, { MCK_CondCode }, }, + { 608 /* nop */, ARM::MOVr, Convert__regR0__regR0__CondCode2_0__reg0, Feature_IsARM, { MCK_CondCode }, }, + { 608 /* nop */, ARM::t2HINT, Convert__imm_95_0__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w }, }, + { 612 /* orn */, ARM::t2ORNrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 612 /* orn */, ARM::t2ORNrs, Convert__Reg1_2__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_RegShiftedImm }, }, + { 612 /* orn */, ARM::t2ORNri, Convert__Reg1_2__Reg1_2__T2SOImm1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_T2SOImm }, }, + { 612 /* orn */, ARM::t2ORNrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 612 /* orn */, ARM::t2ORNrs, Convert__Reg1_2__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_RegShiftedImm }, }, + { 612 /* orn */, ARM::t2ORNri, Convert__Reg1_2__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_T2SOImm }, }, + { 616 /* orr */, ARM::tORR, Convert__Reg1_2__CCOut1_0__Tie0__Reg1_3__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR }, }, + { 616 /* orr */, ARM::t2ORRrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 616 /* orr */, ARM::t2ORRrs, Convert__Reg1_2__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_RegShiftedImm }, }, + { 616 /* orr */, ARM::t2ORRri, Convert__Reg1_2__Reg1_2__T2SOImm1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_T2SOImm }, }, + { 616 /* orr */, ARM::ORRrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 616 /* orr */, ARM::ORRri, Convert__Reg1_2__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, }, + { 616 /* orr */, ARM::ORRrsi, Convert__Reg1_2__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_RegShiftedImm }, }, + { 616 /* orr */, ARM::ORRrsr, Convert__Reg1_2__Reg1_2__RegShiftedReg3_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_RegShiftedReg }, }, + { 616 /* orr */, ARM::t2ORRrr, Convert__Reg1_3__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR }, }, + { 616 /* orr */, ARM::t2ORRrs, Convert__Reg1_3__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_RegShiftedImm }, }, + { 616 /* orr */, ARM::t2ORRri, Convert__Reg1_3__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_T2SOImm }, }, + { 616 /* orr */, ARM::t2ORRrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 616 /* orr */, ARM::t2ORRrs, Convert__Reg1_2__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_RegShiftedImm }, }, + { 616 /* orr */, ARM::t2ORRri, Convert__Reg1_2__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_T2SOImm }, }, + { 616 /* orr */, ARM::ORRrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 616 /* orr */, ARM::ORRri, Convert__Reg1_2__Reg1_3__ModImm1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_ModImm }, }, + { 616 /* orr */, ARM::ORRrsi, Convert__Reg1_2__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_RegShiftedImm }, }, + { 616 /* orr */, ARM::ORRrsr, Convert__Reg1_2__Reg1_3__RegShiftedReg3_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_RegShiftedReg }, }, + { 616 /* orr */, ARM::t2ORRrr, Convert__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 616 /* orr */, ARM::t2ORRrs, Convert__Reg1_3__Reg1_4__RegShiftedImm2_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_RegShiftedImm }, }, + { 616 /* orr */, ARM::t2ORRri, Convert__Reg1_3__Reg1_4__T2SOImm1_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_T2SOImm }, }, + { 620 /* pkhbt */, ARM::t2PKHBT, Convert__Reg1_1__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, Feature_HasT2ExtractPack|Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 620 /* pkhbt */, ARM::PKHBT, Convert__Reg1_1__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 620 /* pkhbt */, ARM::t2PKHBT, Convert__Reg1_1__Reg1_2__Reg1_3__PKHLSLImm1_4__CondCode2_0, Feature_HasT2ExtractPack|Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_PKHLSLImm }, }, + { 620 /* pkhbt */, ARM::PKHBT, Convert__Reg1_1__Reg1_2__Reg1_3__PKHLSLImm1_4__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc, MCK_PKHLSLImm }, }, + { 626 /* pkhtb */, ARM::t2PKHBT, Convert__Reg1_1__Reg1_3__Reg1_2__imm_95_0__CondCode2_0, Feature_HasT2ExtractPack|Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 626 /* pkhtb */, ARM::PKHBT, Convert__Reg1_1__Reg1_3__Reg1_2__imm_95_0__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 626 /* pkhtb */, ARM::t2PKHTB, Convert__Reg1_1__Reg1_2__Reg1_3__PKHASRImm1_4__CondCode2_0, Feature_HasT2ExtractPack|Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_PKHASRImm }, }, + { 626 /* pkhtb */, ARM::PKHTB, Convert__Reg1_1__Reg1_2__Reg1_3__PKHASRImm1_4__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc, MCK_PKHASRImm }, }, + { 632 /* pld */, ARM::PLDi12, Convert__MemImm12Offset2_0, Feature_IsARM, { MCK_MemImm12Offset }, }, + { 632 /* pld */, ARM::PLDrs, Convert__MemRegOffset3_0, Feature_IsARM, { MCK_MemRegOffset }, }, + { 632 /* pld */, ARM::t2PLDpci, Convert__Imm1_1__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_Imm }, }, + { 632 /* pld */, ARM::t2PLDi8, Convert__MemNegImm8Offset2_1__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_MemNegImm8Offset }, }, + { 632 /* pld */, ARM::t2PLDi12, Convert__MemUImm12Offset2_1__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_MemUImm12Offset }, }, + { 632 /* pld */, ARM::t2PLDs, Convert__T2MemRegOffset3_1__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_T2MemRegOffset }, }, + { 632 /* pld */, ARM::t2PLDpci, Convert__MemPCRelImm121_1__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_MemPCRelImm12 }, }, + { 636 /* pldw */, ARM::PLDWi12, Convert__MemImm12Offset2_0, Feature_IsARM|Feature_HasV7|Feature_HasMP, { MCK_MemImm12Offset }, }, + { 636 /* pldw */, ARM::PLDWrs, Convert__MemRegOffset3_0, Feature_IsARM|Feature_HasV7|Feature_HasMP, { MCK_MemRegOffset }, }, + { 636 /* pldw */, ARM::t2PLDWi8, Convert__MemNegImm8Offset2_1__CondCode2_0, Feature_IsThumb2|Feature_HasV7|Feature_HasMP, { MCK_CondCode, MCK_MemNegImm8Offset }, }, + { 636 /* pldw */, ARM::t2PLDWi12, Convert__MemUImm12Offset2_1__CondCode2_0, Feature_IsThumb2|Feature_HasV7|Feature_HasMP, { MCK_CondCode, MCK_MemUImm12Offset }, }, + { 636 /* pldw */, ARM::t2PLDWs, Convert__T2MemRegOffset3_1__CondCode2_0, Feature_IsThumb2|Feature_HasV7|Feature_HasMP, { MCK_CondCode, MCK_T2MemRegOffset }, }, + { 641 /* pli */, ARM::PLIi12, Convert__MemImm12Offset2_0, Feature_IsARM|Feature_HasV7, { MCK_MemImm12Offset }, }, + { 641 /* pli */, ARM::PLIrs, Convert__MemRegOffset3_0, Feature_IsARM|Feature_HasV7, { MCK_MemRegOffset }, }, + { 641 /* pli */, ARM::t2PLIpci, Convert__Imm1_1__CondCode2_0, Feature_IsThumb2|Feature_HasV7, { MCK_CondCode, MCK_Imm }, }, + { 641 /* pli */, ARM::t2PLIi8, Convert__MemNegImm8Offset2_1__CondCode2_0, Feature_IsThumb2|Feature_HasV7, { MCK_CondCode, MCK_MemNegImm8Offset }, }, + { 641 /* pli */, ARM::t2PLIi12, Convert__MemUImm12Offset2_1__CondCode2_0, Feature_IsThumb2|Feature_HasV7, { MCK_CondCode, MCK_MemUImm12Offset }, }, + { 641 /* pli */, ARM::t2PLIs, Convert__T2MemRegOffset3_1__CondCode2_0, Feature_IsThumb2|Feature_HasV7, { MCK_CondCode, MCK_T2MemRegOffset }, }, + { 641 /* pli */, ARM::t2PLIpci, Convert__MemPCRelImm121_1__CondCode2_0, Feature_IsThumb2|Feature_HasV7, { MCK_CondCode, MCK_MemPCRelImm12 }, }, + { 645 /* pop */, ARM::tPOP, Convert__CondCode2_0__RegList1_1, Feature_IsThumb, { MCK_CondCode, MCK_RegList }, }, + { 645 /* pop */, ARM::t2LDMIA_UPD, Convert__regSP__Tie0__CondCode2_0__RegList1_1, Feature_IsThumb2, { MCK_CondCode, MCK_RegList }, }, + { 645 /* pop */, ARM::LDMIA_UPD, Convert__regSP__Tie0__CondCode2_0__RegList1_1, Feature_IsARM, { MCK_CondCode, MCK_RegList }, }, + { 645 /* pop */, ARM::t2LDMIA_UPD, Convert__regSP__Tie0__CondCode2_0__RegList1_2, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_RegList }, }, + { 649 /* push */, ARM::tPUSH, Convert__CondCode2_0__RegList1_1, Feature_IsThumb, { MCK_CondCode, MCK_RegList }, }, + { 649 /* push */, ARM::t2STMDB_UPD, Convert__regSP__Tie0__CondCode2_0__RegList1_1, Feature_IsThumb2, { MCK_CondCode, MCK_RegList }, }, + { 649 /* push */, ARM::STMDB_UPD, Convert__regSP__Tie0__CondCode2_0__RegList1_1, Feature_IsARM, { MCK_CondCode, MCK_RegList }, }, + { 649 /* push */, ARM::t2STMDB_UPD, Convert__regSP__Tie0__CondCode2_0__RegList1_2, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_RegList }, }, + { 654 /* qadd */, ARM::t2QADD, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 654 /* qadd */, ARM::QADD, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 659 /* qadd16 */, ARM::t2QADD16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 659 /* qadd16 */, ARM::QADD16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 666 /* qadd8 */, ARM::t2QADD8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 666 /* qadd8 */, ARM::QADD8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 672 /* qasx */, ARM::t2QASX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 672 /* qasx */, ARM::QASX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 677 /* qdadd */, ARM::t2QDADD, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 677 /* qdadd */, ARM::QDADD, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 683 /* qdsub */, ARM::t2QDSUB, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 683 /* qdsub */, ARM::QDSUB, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 689 /* qsax */, ARM::t2QSAX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 689 /* qsax */, ARM::QSAX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 694 /* qsub */, ARM::t2QSUB, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 694 /* qsub */, ARM::QSUB, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 699 /* qsub16 */, ARM::t2QSUB16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 699 /* qsub16 */, ARM::QSUB16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 706 /* qsub8 */, ARM::t2QSUB8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 706 /* qsub8 */, ARM::QSUB8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 712 /* rbit */, ARM::t2RBIT, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 712 /* rbit */, ARM::RBIT, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsARM|Feature_HasV6T2, { MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 717 /* rev */, ARM::tREV, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb|Feature_HasV6, { MCK_CondCode, MCK_tGPR, MCK_tGPR }, }, + { 717 /* rev */, ARM::t2REV, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 717 /* rev */, ARM::REV, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 717 /* rev */, ARM::t2REV, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR }, }, + { 721 /* rev16 */, ARM::tREV16, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb|Feature_HasV6, { MCK_CondCode, MCK_tGPR, MCK_tGPR }, }, + { 721 /* rev16 */, ARM::t2REV16, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 721 /* rev16 */, ARM::REV16, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 721 /* rev16 */, ARM::t2REV16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR }, }, + { 727 /* revsh */, ARM::tREVSH, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb|Feature_HasV6, { MCK_CondCode, MCK_tGPR, MCK_tGPR }, }, + { 727 /* revsh */, ARM::t2REVSH, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 727 /* revsh */, ARM::REVSH, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 727 /* revsh */, ARM::t2REVSH, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR }, }, + { 733 /* rfeda */, ARM::RFEDA, Convert__Reg1_0, Feature_IsARM, { MCK_GPR }, }, + { 733 /* rfeda */, ARM::RFEDA_UPD, Convert__Reg1_0, Feature_IsARM, { MCK_GPR, MCK__EXCLAIM_ }, }, + { 739 /* rfedb */, ARM::RFEDB, Convert__Reg1_0, Feature_IsARM, { MCK_GPR }, }, + { 739 /* rfedb */, ARM::RFEDB_UPD, Convert__Reg1_0, Feature_IsARM, { MCK_GPR, MCK__EXCLAIM_ }, }, + { 739 /* rfedb */, ARM::t2RFEDB, Convert__Reg1_1__CondCode2_0, Feature_IsThumb2|Feature_IsNotMClass, { MCK_CondCode, MCK_GPR }, }, + { 739 /* rfedb */, ARM::t2RFEDBW, Convert__Reg1_1__CondCode2_0, Feature_IsThumb2|Feature_IsNotMClass, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_ }, }, + { 745 /* rfeia */, ARM::RFEIA, Convert__Reg1_0, Feature_IsARM, { MCK_GPR }, }, + { 745 /* rfeia */, ARM::RFEIA_UPD, Convert__Reg1_0, Feature_IsARM, { MCK_GPR, MCK__EXCLAIM_ }, }, + { 745 /* rfeia */, ARM::t2RFEIA, Convert__Reg1_1__CondCode2_0, Feature_IsThumb2|Feature_IsNotMClass, { MCK_CondCode, MCK_GPR }, }, + { 745 /* rfeia */, ARM::t2RFEIAW, Convert__Reg1_1__CondCode2_0, Feature_IsThumb2|Feature_IsNotMClass, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_ }, }, + { 751 /* rfeib */, ARM::RFEIB, Convert__Reg1_0, Feature_IsARM, { MCK_GPR }, }, + { 751 /* rfeib */, ARM::RFEIB_UPD, Convert__Reg1_0, Feature_IsARM, { MCK_GPR, MCK__EXCLAIM_ }, }, + { 757 /* ror */, ARM::tROR, Convert__Reg1_2__CCOut1_0__Tie0__Reg1_3__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR }, }, + { 757 /* ror */, ARM::t2RORrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 757 /* ror */, ARM::t2RORri, Convert__Reg1_2__Reg1_2__Imm0_311_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_Imm0_31 }, }, + { 757 /* ror */, ARM::RORr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc }, }, + { 757 /* ror */, ARM::RORi, Convert__Reg1_2__Reg1_2__Imm0_311_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_Imm0_31 }, }, + { 757 /* ror */, ARM::t2RORrr, Convert__Reg1_3__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR }, }, + { 757 /* ror */, ARM::t2RORri, Convert__Reg1_3__Reg1_3__Imm0_311_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_Imm0_31 }, }, + { 757 /* ror */, ARM::t2RORrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 757 /* ror */, ARM::t2RORri, Convert__Reg1_2__Reg1_3__Imm0_311_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_Imm0_31 }, }, + { 757 /* ror */, ARM::RORr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 757 /* ror */, ARM::RORi, Convert__Reg1_2__Reg1_3__Imm0_311_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_Imm0_31 }, }, + { 757 /* ror */, ARM::t2RORrr, Convert__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 757 /* ror */, ARM::t2RORri, Convert__Reg1_3__Reg1_4__Imm0_311_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_Imm0_31 }, }, + { 761 /* rrx */, ARM::t2RRX, Convert__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 761 /* rrx */, ARM::RRXi, Convert__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 765 /* rsb */, ARM::t2RSBrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 765 /* rsb */, ARM::t2RSBrs, Convert__Reg1_2__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_RegShiftedImm }, }, + { 765 /* rsb */, ARM::t2RSBri, Convert__Reg1_2__Reg1_2__T2SOImm1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_T2SOImm }, }, + { 765 /* rsb */, ARM::RSBrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 765 /* rsb */, ARM::RSBri, Convert__Reg1_2__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, }, + { 765 /* rsb */, ARM::RSBrsi, Convert__Reg1_2__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_RegShiftedImm }, }, + { 765 /* rsb */, ARM::RSBrsr, Convert__Reg1_2__Reg1_2__RegShiftedReg3_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_RegShiftedReg }, }, + { 765 /* rsb */, ARM::tRSB, Convert__Reg1_2__CCOut1_0__Reg1_3__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR, MCK__35_0 }, }, + { 765 /* rsb */, ARM::t2RSBrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 765 /* rsb */, ARM::t2RSBrs, Convert__Reg1_2__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_RegShiftedImm }, }, + { 765 /* rsb */, ARM::t2RSBri, Convert__Reg1_2__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_T2SOImm }, }, + { 765 /* rsb */, ARM::RSBrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 765 /* rsb */, ARM::RSBri, Convert__Reg1_2__Reg1_3__ModImm1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_ModImm }, }, + { 765 /* rsb */, ARM::RSBrsi, Convert__Reg1_2__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_RegShiftedImm }, }, + { 765 /* rsb */, ARM::RSBrsr, Convert__Reg1_2__Reg1_3__RegShiftedReg3_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_RegShiftedReg }, }, + { 765 /* rsb */, ARM::t2RSBri, Convert__Reg1_3__Reg1_4__T2SOImm1_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_T2SOImm }, }, + { 769 /* rsc */, ARM::RSCrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 769 /* rsc */, ARM::RSCri, Convert__Reg1_2__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, }, + { 769 /* rsc */, ARM::RSCrsi, Convert__Reg1_2__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_RegShiftedImm }, }, + { 769 /* rsc */, ARM::RSCrsr, Convert__Reg1_2__Reg1_2__RegShiftedReg3_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_RegShiftedReg }, }, + { 769 /* rsc */, ARM::RSCrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 769 /* rsc */, ARM::RSCri, Convert__Reg1_2__Reg1_3__ModImm1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_ModImm }, }, + { 769 /* rsc */, ARM::RSCrsi, Convert__Reg1_2__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_RegShiftedImm }, }, + { 769 /* rsc */, ARM::RSCrsr, Convert__Reg1_2__Reg1_3__RegShiftedReg3_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_RegShiftedReg }, }, + { 773 /* sadd16 */, ARM::t2SADD16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 773 /* sadd16 */, ARM::SADD16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 780 /* sadd8 */, ARM::t2SADD8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 780 /* sadd8 */, ARM::SADD8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 786 /* sasx */, ARM::t2SASX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 786 /* sasx */, ARM::SASX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 791 /* sbc */, ARM::tSBC, Convert__Reg1_2__CCOut1_0__Tie0__Reg1_3__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR }, }, + { 791 /* sbc */, ARM::SBCrsr, Convert__Reg1_2__Reg1_2__RegShiftedReg3_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_RegShiftedReg }, }, + { 791 /* sbc */, ARM::SBCrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 791 /* sbc */, ARM::SBCri, Convert__Reg1_2__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, }, + { 791 /* sbc */, ARM::SBCrsi, Convert__Reg1_2__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_RegShiftedImm }, }, + { 791 /* sbc */, ARM::t2SBCrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 791 /* sbc */, ARM::t2SBCrs, Convert__Reg1_2__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_RegShiftedImm }, }, + { 791 /* sbc */, ARM::t2SBCri, Convert__Reg1_2__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_T2SOImm }, }, + { 791 /* sbc */, ARM::SBCrsr, Convert__Reg1_2__Reg1_3__RegShiftedReg3_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_RegShiftedReg }, }, + { 791 /* sbc */, ARM::SBCrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 791 /* sbc */, ARM::SBCri, Convert__Reg1_2__Reg1_3__ModImm1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_ModImm }, }, + { 791 /* sbc */, ARM::SBCrsi, Convert__Reg1_2__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_RegShiftedImm }, }, + { 791 /* sbc */, ARM::t2SBCrr, Convert__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 791 /* sbc */, ARM::t2SBCrs, Convert__Reg1_3__Reg1_4__RegShiftedImm2_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_RegShiftedImm }, }, + { 795 /* sbfx */, ARM::t2SBFX, Convert__Reg1_1__Reg1_2__Imm0_311_3__Imm1_321_4__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_Imm0_31, MCK_Imm1_32 }, }, + { 795 /* sbfx */, ARM::SBFX, Convert__Reg1_1__Reg1_2__Imm0_311_3__Imm1_321_4__CondCode2_0, Feature_IsARM|Feature_HasV6T2, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_Imm0_31, MCK_Imm1_32 }, }, + { 800 /* sdiv */, ARM::t2SDIV, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_HasDivide|Feature_IsThumb|Feature_HasV8MBaseline, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 800 /* sdiv */, ARM::SDIV, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM|Feature_HasDivideInARM, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 805 /* sel */, ARM::SEL, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 805 /* sel */, ARM::t2SEL, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 809 /* setend */, ARM::SETEND, Convert__SetEndImm1_0, Feature_IsARM, { MCK_SetEndImm }, }, + { 809 /* setend */, ARM::tSETEND, Convert__SetEndImm1_0, Feature_IsNotMClass, { MCK_SetEndImm }, }, + { 816 /* setpan */, ARM::SETPAN, Convert__Imm0_11_0, Feature_IsARM|Feature_HasV8|Feature_HasV8_1a, { MCK_Imm0_1 }, }, + { 816 /* setpan */, ARM::t2SETPAN, Convert__Imm0_11_0, Feature_IsThumb2|Feature_HasV8|Feature_HasV8_1a, { MCK_Imm0_1 }, }, + { 823 /* sev */, ARM::HINT, Convert__imm_95_4__CondCode2_0, Feature_IsARM|Feature_HasV6K, { MCK_CondCode }, }, + { 823 /* sev */, ARM::tHINT, Convert__imm_95_4__CondCode2_0, Feature_IsThumb|Feature_HasV6M, { MCK_CondCode }, }, + { 823 /* sev */, ARM::t2HINT, Convert__imm_95_4__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w }, }, + { 827 /* sevl */, ARM::HINT, Convert__imm_95_5__CondCode2_0, Feature_IsARM|Feature_HasV8, { MCK_CondCode }, }, + { 827 /* sevl */, ARM::tHINT, Convert__imm_95_5__CondCode2_0, Feature_IsThumb2|Feature_HasV8, { MCK_CondCode }, }, + { 827 /* sevl */, ARM::t2HINT, Convert__imm_95_5__CondCode2_0, Feature_IsThumb2|Feature_HasV8, { MCK_CondCode, MCK__DOT_w }, }, + { 832 /* sg */, ARM::t2SG, Convert__CondCode2_0, Feature_Has8MSecExt, { MCK_CondCode }, }, + { 835 /* sha1c */, ARM::SHA1C, Convert__Reg1_1__Tie0__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasCrypto, { MCK__DOT_32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 841 /* sha1h */, ARM::SHA1H, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasCrypto, { MCK__DOT_32, MCK_QPR, MCK_QPR }, }, + { 847 /* sha1m */, ARM::SHA1M, Convert__Reg1_1__Tie0__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasCrypto, { MCK__DOT_32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 853 /* sha1p */, ARM::SHA1P, Convert__Reg1_1__Tie0__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasCrypto, { MCK__DOT_32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 859 /* sha1su0 */, ARM::SHA1SU0, Convert__Reg1_1__Tie0__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasCrypto, { MCK__DOT_32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 867 /* sha1su1 */, ARM::SHA1SU1, Convert__Reg1_1__Tie0__Reg1_2, Feature_HasV8|Feature_HasCrypto, { MCK__DOT_32, MCK_QPR, MCK_QPR }, }, + { 875 /* sha256h */, ARM::SHA256H, Convert__Reg1_1__Tie0__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasCrypto, { MCK__DOT_32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 883 /* sha256h2 */, ARM::SHA256H2, Convert__Reg1_1__Tie0__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasCrypto, { MCK__DOT_32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 892 /* sha256su0 */, ARM::SHA256SU0, Convert__Reg1_1__Tie0__Reg1_2, Feature_HasV8|Feature_HasCrypto, { MCK__DOT_32, MCK_QPR, MCK_QPR }, }, + { 902 /* sha256su1 */, ARM::SHA256SU1, Convert__Reg1_1__Tie0__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasCrypto, { MCK__DOT_32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 912 /* shadd16 */, ARM::t2SHADD16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 912 /* shadd16 */, ARM::SHADD16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 920 /* shadd8 */, ARM::t2SHADD8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 920 /* shadd8 */, ARM::SHADD8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 927 /* shasx */, ARM::t2SHASX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 927 /* shasx */, ARM::SHASX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 933 /* shsax */, ARM::t2SHSAX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 933 /* shsax */, ARM::SHSAX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 939 /* shsub16 */, ARM::t2SHSUB16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 939 /* shsub16 */, ARM::SHSUB16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 947 /* shsub8 */, ARM::t2SHSUB8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 947 /* shsub8 */, ARM::SHSUB8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 954 /* smc */, ARM::SMC, Convert__Imm0_151_1__CondCode2_0, Feature_IsARM|Feature_HasTrustZone, { MCK_CondCode, MCK_Imm0_15 }, }, + { 954 /* smc */, ARM::t2SMC, Convert__Imm0_151_1__CondCode2_0, Feature_IsThumb2|Feature_HasTrustZone, { MCK_CondCode, MCK_Imm0_15 }, }, + { 958 /* smlabb */, ARM::t2SMLABB, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 958 /* smlabb */, ARM::SMLABB, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV5TE, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc, MCK_GPR }, }, + { 965 /* smlabt */, ARM::t2SMLABT, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 965 /* smlabt */, ARM::SMLABT, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV5TE, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc, MCK_GPR }, }, + { 972 /* smlad */, ARM::t2SMLAD, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 972 /* smlad */, ARM::SMLAD, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc, MCK_GPR }, }, + { 978 /* smladx */, ARM::t2SMLADX, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 978 /* smladx */, ARM::SMLADX, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc, MCK_GPR }, }, + { 985 /* smlal */, ARM::t2SMLAL, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__Tie0__Tie1__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 985 /* smlal */, ARM::SMLAL, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_5__Tie0__Tie1__CondCode2_1__CCOut1_0, Feature_IsARM|Feature_HasV6, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 985 /* smlal */, ARM::SMLAL, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_5__Tie0__Tie1__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 991 /* smlalbb */, ARM::t2SMLALBB, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 991 /* smlalbb */, ARM::SMLALBB, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV5TE, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 999 /* smlalbt */, ARM::t2SMLALBT, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 999 /* smlalbt */, ARM::SMLALBT, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV5TE, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1007 /* smlald */, ARM::t2SMLALD, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1007 /* smlald */, ARM::SMLALD, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1014 /* smlaldx */, ARM::t2SMLALDX, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1014 /* smlaldx */, ARM::SMLALDX, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1022 /* smlaltb */, ARM::t2SMLALTB, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1022 /* smlaltb */, ARM::SMLALTB, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV5TE, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1030 /* smlaltt */, ARM::t2SMLALTT, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1030 /* smlaltt */, ARM::SMLALTT, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV5TE, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1038 /* smlatb */, ARM::t2SMLATB, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1038 /* smlatb */, ARM::SMLATB, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV5TE, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc, MCK_GPR }, }, + { 1045 /* smlatt */, ARM::t2SMLATT, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1045 /* smlatt */, ARM::SMLATT, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV5TE, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc, MCK_GPR }, }, + { 1052 /* smlawb */, ARM::t2SMLAWB, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1052 /* smlawb */, ARM::SMLAWB, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV5TE, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc, MCK_GPR }, }, + { 1059 /* smlawt */, ARM::t2SMLAWT, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1059 /* smlawt */, ARM::SMLAWT, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV5TE, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc, MCK_GPR }, }, + { 1066 /* smlsd */, ARM::t2SMLSD, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1066 /* smlsd */, ARM::SMLSD, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc, MCK_GPR }, }, + { 1072 /* smlsdx */, ARM::t2SMLSDX, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1072 /* smlsdx */, ARM::SMLSDX, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc, MCK_GPR }, }, + { 1079 /* smlsld */, ARM::t2SMLSLD, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1079 /* smlsld */, ARM::SMLSLD, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1086 /* smlsldx */, ARM::t2SMLSLDX, Convert__Reg1_1__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1086 /* smlsldx */, ARM::SMLSLDX, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1094 /* smmla */, ARM::t2SMMLA, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1094 /* smmla */, ARM::SMMLA, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 1100 /* smmlar */, ARM::t2SMMLAR, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1100 /* smmlar */, ARM::SMMLAR, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 1107 /* smmls */, ARM::t2SMMLS, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1107 /* smmls */, ARM::SMMLS, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 1113 /* smmlsr */, ARM::t2SMMLSR, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1113 /* smmlsr */, ARM::SMMLSR, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 1120 /* smmul */, ARM::t2SMMUL, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1120 /* smmul */, ARM::SMMUL, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 1126 /* smmulr */, ARM::t2SMMULR, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1126 /* smmulr */, ARM::SMMULR, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 1133 /* smuad */, ARM::t2SMUAD, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1133 /* smuad */, ARM::SMUAD, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1139 /* smuadx */, ARM::t2SMUADX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1139 /* smuadx */, ARM::SMUADX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1146 /* smulbb */, ARM::t2SMULBB, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1146 /* smulbb */, ARM::SMULBB, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM|Feature_HasV5TE, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 1153 /* smulbt */, ARM::t2SMULBT, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1153 /* smulbt */, ARM::SMULBT, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM|Feature_HasV5TE, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 1160 /* smull */, ARM::t2SMULL, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1160 /* smull */, ARM::SMULL, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, Feature_IsARM|Feature_HasV6, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 1160 /* smull */, ARM::SMULL, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 1166 /* smultb */, ARM::t2SMULTB, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1166 /* smultb */, ARM::SMULTB, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM|Feature_HasV5TE, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 1173 /* smultt */, ARM::t2SMULTT, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1173 /* smultt */, ARM::SMULTT, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM|Feature_HasV5TE, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 1180 /* smulwb */, ARM::t2SMULWB, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1180 /* smulwb */, ARM::SMULWB, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM|Feature_HasV5TE, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 1187 /* smulwt */, ARM::t2SMULWT, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1187 /* smulwt */, ARM::SMULWT, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM|Feature_HasV5TE, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 1194 /* smusd */, ARM::t2SMUSD, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1194 /* smusd */, ARM::SMUSD, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1200 /* smusdx */, ARM::t2SMUSDX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1200 /* smusdx */, ARM::SMUSDX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1207 /* srsda */, ARM::SRSDA, Convert__Imm0_311_0, Feature_IsARM, { MCK_Imm0_31 }, }, + { 1207 /* srsda */, ARM::SRSDA, Convert__Imm0_311_1, Feature_IsARM, { MCK_GPRsp, MCK_Imm0_31 }, }, + { 1207 /* srsda */, ARM::SRSDA_UPD, Convert__Imm0_311_0, Feature_IsARM, { MCK_Imm0_31, MCK__EXCLAIM_ }, }, + { 1207 /* srsda */, ARM::SRSDA_UPD, Convert__Imm0_311_2, Feature_IsARM, { MCK_GPRsp, MCK__EXCLAIM_, MCK_Imm0_31 }, }, + { 1213 /* srsdb */, ARM::SRSDB, Convert__Imm0_311_0, Feature_IsARM, { MCK_Imm0_31 }, }, + { 1213 /* srsdb */, ARM::SRSDB, Convert__Imm0_311_1, Feature_IsARM, { MCK_GPRsp, MCK_Imm0_31 }, }, + { 1213 /* srsdb */, ARM::t2SRSDB, Convert__Imm0_311_1__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_Imm0_31 }, }, + { 1213 /* srsdb */, ARM::SRSDB_UPD, Convert__Imm0_311_0, Feature_IsARM, { MCK_Imm0_31, MCK__EXCLAIM_ }, }, + { 1213 /* srsdb */, ARM::SRSDB_UPD, Convert__Imm0_311_2, Feature_IsARM, { MCK_GPRsp, MCK__EXCLAIM_, MCK_Imm0_31 }, }, + { 1213 /* srsdb */, ARM::t2SRSDB, Convert__Imm0_311_2__CondCode2_0, Feature_IsThumb2|Feature_IsNotMClass, { MCK_CondCode, MCK_GPRsp, MCK_Imm0_31 }, }, + { 1213 /* srsdb */, ARM::t2SRSDB_UPD, Convert__Imm0_311_1__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_Imm0_31, MCK__EXCLAIM_ }, }, + { 1213 /* srsdb */, ARM::t2SRSDB_UPD, Convert__Imm0_311_3__CondCode2_0, Feature_IsThumb2|Feature_IsNotMClass, { MCK_CondCode, MCK_GPRsp, MCK__EXCLAIM_, MCK_Imm0_31 }, }, + { 1219 /* srsia */, ARM::SRSIA, Convert__Imm0_311_0, Feature_IsARM, { MCK_Imm0_31 }, }, + { 1219 /* srsia */, ARM::SRSIA, Convert__Imm0_311_1, Feature_IsARM, { MCK_GPRsp, MCK_Imm0_31 }, }, + { 1219 /* srsia */, ARM::t2SRSIA, Convert__Imm0_311_1__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_Imm0_31 }, }, + { 1219 /* srsia */, ARM::SRSIA_UPD, Convert__Imm0_311_0, Feature_IsARM, { MCK_Imm0_31, MCK__EXCLAIM_ }, }, + { 1219 /* srsia */, ARM::SRSIA_UPD, Convert__Imm0_311_2, Feature_IsARM, { MCK_GPRsp, MCK__EXCLAIM_, MCK_Imm0_31 }, }, + { 1219 /* srsia */, ARM::t2SRSIA, Convert__Imm0_311_2__CondCode2_0, Feature_IsThumb2|Feature_IsNotMClass, { MCK_CondCode, MCK_GPRsp, MCK_Imm0_31 }, }, + { 1219 /* srsia */, ARM::t2SRSIA_UPD, Convert__Imm0_311_1__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_Imm0_31, MCK__EXCLAIM_ }, }, + { 1219 /* srsia */, ARM::t2SRSIA_UPD, Convert__Imm0_311_3__CondCode2_0, Feature_IsThumb2|Feature_IsNotMClass, { MCK_CondCode, MCK_GPRsp, MCK__EXCLAIM_, MCK_Imm0_31 }, }, + { 1225 /* srsib */, ARM::SRSIB, Convert__Imm0_311_0, Feature_IsARM, { MCK_Imm0_31 }, }, + { 1225 /* srsib */, ARM::SRSIB, Convert__Imm0_311_1, Feature_IsARM, { MCK_GPRsp, MCK_Imm0_31 }, }, + { 1225 /* srsib */, ARM::SRSIB_UPD, Convert__Imm0_311_0, Feature_IsARM, { MCK_Imm0_31, MCK__EXCLAIM_ }, }, + { 1225 /* srsib */, ARM::SRSIB_UPD, Convert__Imm0_311_2, Feature_IsARM, { MCK_GPRsp, MCK__EXCLAIM_, MCK_Imm0_31 }, }, + { 1231 /* ssat */, ARM::t2SSAT, Convert__Reg1_1__Imm1_321_2__Reg1_3__imm_95_0__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_Imm1_32, MCK_rGPR }, }, + { 1231 /* ssat */, ARM::SSAT, Convert__Reg1_1__Imm1_321_2__Reg1_3__imm_95_0__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_Imm1_32, MCK_GPRnopc }, }, + { 1231 /* ssat */, ARM::t2SSAT, Convert__Reg1_1__Imm1_321_2__Reg1_3__ShifterImm1_4__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_Imm1_32, MCK_rGPR, MCK_ShifterImm }, }, + { 1231 /* ssat */, ARM::SSAT, Convert__Reg1_1__Imm1_321_2__Reg1_3__ShifterImm1_4__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_Imm1_32, MCK_GPRnopc, MCK_ShifterImm }, }, + { 1236 /* ssat16 */, ARM::t2SSAT16, Convert__Reg1_1__Imm1_161_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_Imm1_16, MCK_rGPR }, }, + { 1236 /* ssat16 */, ARM::SSAT16, Convert__Reg1_1__Imm1_161_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_Imm1_16, MCK_GPRnopc }, }, + { 1243 /* ssax */, ARM::t2SSAX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1243 /* ssax */, ARM::SSAX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1248 /* ssub16 */, ARM::t2SSUB16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1248 /* ssub16 */, ARM::SSUB16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1255 /* ssub8 */, ARM::t2SSUB8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1255 /* ssub8 */, ARM::SSUB8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1261 /* stc */, ARM::STC_OFFSET, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5 }, }, + { 1261 /* stc */, ARM::t2STC_OFFSET, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5 }, }, + { 1261 /* stc */, ARM::STC_PRE, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5, MCK__EXCLAIM_ }, }, + { 1261 /* stc */, ARM::t2STC_PRE, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5, MCK__EXCLAIM_ }, }, + { 1261 /* stc */, ARM::STC_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, }, + { 1261 /* stc */, ARM::t2STC_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, }, + { 1261 /* stc */, ARM::STC_POST, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__PostIdxImm8s41_4__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_PostIdxImm8s4 }, }, + { 1261 /* stc */, ARM::t2STC_POST, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__PostIdxImm8s41_4__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_PostIdxImm8s4 }, }, + { 1265 /* stc2 */, ARM::STC2_OFFSET, Convert__CoprocNum1_0__CoprocReg1_1__AddrMode52_2, Feature_PreV8, { MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5 }, }, + { 1265 /* stc2 */, ARM::t2STC2_OFFSET, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_PreV8|Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5 }, }, + { 1265 /* stc2 */, ARM::STC2_PRE, Convert__CoprocNum1_0__CoprocReg1_1__AddrMode52_2, Feature_PreV8, { MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5, MCK__EXCLAIM_ }, }, + { 1265 /* stc2 */, ARM::STC2_OPTION, Convert__CoprocNum1_0__CoprocReg1_1__MemNoOffset1_2__CoprocOption1_3, Feature_PreV8, { MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, }, + { 1265 /* stc2 */, ARM::STC2_POST, Convert__CoprocNum1_0__CoprocReg1_1__MemNoOffset1_2__PostIdxImm8s41_3, Feature_PreV8, { MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_PostIdxImm8s4 }, }, + { 1265 /* stc2 */, ARM::t2STC2_PRE, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_PreV8|Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5, MCK__EXCLAIM_ }, }, + { 1265 /* stc2 */, ARM::t2STC2_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, Feature_PreV8|Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, }, + { 1265 /* stc2 */, ARM::t2STC2_POST, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__PostIdxImm8s41_4__CondCode2_0, Feature_PreV8|Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_PostIdxImm8s4 }, }, + { 1270 /* stc2l */, ARM::STC2L_OFFSET, Convert__CoprocNum1_0__CoprocReg1_1__AddrMode52_2, Feature_PreV8, { MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5 }, }, + { 1270 /* stc2l */, ARM::t2STC2L_OFFSET, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_PreV8|Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5 }, }, + { 1270 /* stc2l */, ARM::STC2L_PRE, Convert__CoprocNum1_0__CoprocReg1_1__AddrMode52_2, Feature_PreV8, { MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5, MCK__EXCLAIM_ }, }, + { 1270 /* stc2l */, ARM::STC2L_OPTION, Convert__CoprocNum1_0__CoprocReg1_1__MemNoOffset1_2__CoprocOption1_3, Feature_PreV8, { MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, }, + { 1270 /* stc2l */, ARM::STC2L_POST, Convert__CoprocNum1_0__CoprocReg1_1__MemNoOffset1_2__PostIdxImm8s41_3, Feature_PreV8, { MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_PostIdxImm8s4 }, }, + { 1270 /* stc2l */, ARM::t2STC2L_PRE, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_PreV8|Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5, MCK__EXCLAIM_ }, }, + { 1270 /* stc2l */, ARM::t2STC2L_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, Feature_PreV8|Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, }, + { 1270 /* stc2l */, ARM::t2STC2L_POST, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__PostIdxImm8s41_4__CondCode2_0, Feature_PreV8|Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_PostIdxImm8s4 }, }, + { 1276 /* stcl */, ARM::STCL_OFFSET, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5 }, }, + { 1276 /* stcl */, ARM::t2STCL_OFFSET, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5 }, }, + { 1276 /* stcl */, ARM::STCL_PRE, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5, MCK__EXCLAIM_ }, }, + { 1276 /* stcl */, ARM::t2STCL_PRE, Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_AddrMode5, MCK__EXCLAIM_ }, }, + { 1276 /* stcl */, ARM::STCL_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, }, + { 1276 /* stcl */, ARM::t2STCL_OPTION, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_CoprocOption }, }, + { 1276 /* stcl */, ARM::STCL_POST, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__PostIdxImm8s41_4__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_PostIdxImm8s4 }, }, + { 1276 /* stcl */, ARM::t2STCL_POST, Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__PostIdxImm8s41_4__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_CoprocNum, MCK_CoprocReg, MCK_MemNoOffset, MCK_PostIdxImm8s4 }, }, + { 1281 /* stl */, ARM::t2STL, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsThumb|Feature_HasAcquireRelease, { MCK_CondCode, MCK_rGPR, MCK_MemNoOffset }, }, + { 1281 /* stl */, ARM::STL, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsARM|Feature_HasAcquireRelease, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset }, }, + { 1285 /* stlb */, ARM::t2STLB, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsThumb|Feature_HasAcquireRelease, { MCK_CondCode, MCK_rGPR, MCK_MemNoOffset }, }, + { 1285 /* stlb */, ARM::STLB, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsARM|Feature_HasAcquireRelease, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset }, }, + { 1290 /* stlex */, ARM::t2STLEX, Convert__Reg1_1__Reg1_2__MemNoOffset1_3__CondCode2_0, Feature_IsThumb|Feature_HasAcquireRelease|Feature_HasV7Clrex, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_MemNoOffset }, }, + { 1290 /* stlex */, ARM::STLEX, Convert__Reg1_1__Reg1_2__MemNoOffset1_3__CondCode2_0, Feature_IsARM|Feature_HasAcquireRelease|Feature_HasV7Clrex, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_MemNoOffset }, }, + { 1296 /* stlexb */, ARM::t2STLEXB, Convert__Reg1_1__Reg1_2__MemNoOffset1_3__CondCode2_0, Feature_IsThumb|Feature_HasAcquireRelease|Feature_HasV7Clrex, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_MemNoOffset }, }, + { 1296 /* stlexb */, ARM::STLEXB, Convert__Reg1_1__Reg1_2__MemNoOffset1_3__CondCode2_0, Feature_IsARM|Feature_HasAcquireRelease|Feature_HasV7Clrex, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_MemNoOffset }, }, + { 1303 /* stlexd */, ARM::STLEXD, Convert__Reg1_1__Reg1_2__MemNoOffset1_3__CondCode2_0, Feature_IsARM|Feature_HasAcquireRelease|Feature_HasV7Clrex, { MCK_CondCode, MCK_GPR, MCK_GPRPair, MCK_MemNoOffset }, }, + { 1303 /* stlexd */, ARM::t2STLEXD, Convert__Reg1_1__Reg1_2__Reg1_3__MemNoOffset1_4__CondCode2_0, Feature_IsThumb|Feature_HasAcquireRelease|Feature_HasV7Clrex|Feature_IsNotMClass, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_MemNoOffset }, }, + { 1310 /* stlexh */, ARM::t2STLEXH, Convert__Reg1_1__Reg1_2__MemNoOffset1_3__CondCode2_0, Feature_IsThumb|Feature_HasAcquireRelease|Feature_HasV7Clrex, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_MemNoOffset }, }, + { 1310 /* stlexh */, ARM::STLEXH, Convert__Reg1_1__Reg1_2__MemNoOffset1_3__CondCode2_0, Feature_IsARM|Feature_HasAcquireRelease|Feature_HasV7Clrex, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_MemNoOffset }, }, + { 1317 /* stlh */, ARM::t2STLH, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsThumb|Feature_HasAcquireRelease, { MCK_CondCode, MCK_rGPR, MCK_MemNoOffset }, }, + { 1317 /* stlh */, ARM::STLH, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsARM|Feature_HasAcquireRelease, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset }, }, + { 1322 /* stm */, ARM::STMIA, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_RegList }, }, + { 1322 /* stm */, ARM::t2STMIA, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_RegList }, }, + { 1322 /* stm */, ARM::t2STMIA, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_RegList }, }, + { 1322 /* stm */, ARM::t2STMIA, Convert__Reg1_2__CondCode2_0__RegList1_3, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPR, MCK_RegList }, }, + { 1322 /* stm */, ARM::tSTMIA_UPD, Convert__Reg1_1__Tie0__CondCode2_0__RegList1_3, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK__EXCLAIM_, MCK_RegList }, }, + { 1322 /* stm */, ARM::STMIA_UPD, Convert__Reg1_1__Tie0__CondCode2_0__RegList1_3, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_RegList }, }, + { 1322 /* stm */, ARM::t2STMIA_UPD, Convert__Reg1_1__Tie0__CondCode2_0__RegList1_3, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_RegList }, }, + { 1322 /* stm */, ARM::sysSTMIA, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_RegList, MCK__94_ }, }, + { 1322 /* stm */, ARM::t2STMIA_UPD, Convert__Reg1_2__Tie0__CondCode2_0__RegList1_4, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPR, MCK__EXCLAIM_, MCK_RegList }, }, + { 1322 /* stm */, ARM::sysSTMIA_UPD, Convert__Reg1_1__Tie0__CondCode2_0__RegList1_3, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_RegList, MCK__94_ }, }, + { 1326 /* stmda */, ARM::STMDA, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_RegList }, }, + { 1326 /* stmda */, ARM::STMDA_UPD, Convert__Reg1_1__Tie0__CondCode2_0__RegList1_3, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_RegList }, }, + { 1326 /* stmda */, ARM::sysSTMDA, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_RegList, MCK__94_ }, }, + { 1326 /* stmda */, ARM::sysSTMDA_UPD, Convert__Reg1_1__Tie0__CondCode2_0__RegList1_3, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_RegList, MCK__94_ }, }, + { 1332 /* stmdb */, ARM::STMDB, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_RegList }, }, + { 1332 /* stmdb */, ARM::t2STMDB, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_RegList }, }, + { 1332 /* stmdb */, ARM::t2STMDB, Convert__Reg1_2__CondCode2_0__RegList1_3, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPR, MCK_RegList }, }, + { 1332 /* stmdb */, ARM::STMDB_UPD, Convert__Reg1_1__Tie0__CondCode2_0__RegList1_3, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_RegList }, }, + { 1332 /* stmdb */, ARM::t2STMDB_UPD, Convert__Reg1_1__Tie0__CondCode2_0__RegList1_3, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_RegList }, }, + { 1332 /* stmdb */, ARM::sysSTMDB, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_RegList, MCK__94_ }, }, + { 1332 /* stmdb */, ARM::t2STMDB_UPD, Convert__Reg1_2__Tie0__CondCode2_0__RegList1_4, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPR, MCK__EXCLAIM_, MCK_RegList }, }, + { 1332 /* stmdb */, ARM::sysSTMDB_UPD, Convert__Reg1_1__Tie0__CondCode2_0__RegList1_3, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_RegList, MCK__94_ }, }, + { 1338 /* stmib */, ARM::STMIB, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_RegList }, }, + { 1338 /* stmib */, ARM::STMIB_UPD, Convert__Reg1_1__Tie0__CondCode2_0__RegList1_3, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_RegList }, }, + { 1338 /* stmib */, ARM::sysSTMIB, Convert__Reg1_1__CondCode2_0__RegList1_2, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_RegList, MCK__94_ }, }, + { 1338 /* stmib */, ARM::sysSTMIB_UPD, Convert__Reg1_1__Tie0__CondCode2_0__RegList1_3, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_RegList, MCK__94_ }, }, + { 1344 /* str */, ARM::tSTRi, Convert__Reg1_1__MemThumbRIs42_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_MemThumbRIs4 }, }, + { 1344 /* str */, ARM::tSTRr, Convert__Reg1_1__MemThumbRR2_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_MemThumbRR }, }, + { 1344 /* str */, ARM::tSTRspi, Convert__Reg1_1__MemThumbSPI2_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_MemThumbSPI }, }, + { 1344 /* str */, ARM::STRi12, Convert__Reg1_1__MemImm12Offset2_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemImm12Offset }, }, + { 1344 /* str */, ARM::t2STRi8, Convert__Reg1_1__MemNegImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_MemNegImm8Offset }, }, + { 1344 /* str */, ARM::STRrs, Convert__Reg1_1__MemRegOffset3_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemRegOffset }, }, + { 1344 /* str */, ARM::t2STRi12, Convert__Reg1_1__MemUImm12Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_MemUImm12Offset }, }, + { 1344 /* str */, ARM::t2STRs, Convert__Reg1_1__T2MemRegOffset3_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPR, MCK_T2MemRegOffset }, }, + { 1344 /* str */, ARM::t2STRi12, Convert__Reg1_2__MemUImm12Offset2_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPR, MCK_MemUImm12Offset }, }, + { 1344 /* str */, ARM::t2STRs, Convert__Reg1_2__T2MemRegOffset3_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPR, MCK_T2MemRegOffset }, }, + { 1344 /* str */, ARM::t2STR_PRE, Convert__imm_95_0__Reg1_1__MemImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_MemImm8Offset, MCK__EXCLAIM_ }, }, + { 1344 /* str */, ARM::t2STR_POST, Convert__MemNoOffset1_2__Reg1_1__Tie0__Imm1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_MemNoOffset, MCK_Imm }, }, + { 1344 /* str */, ARM::STR_PRE_IMM, Convert__imm_95_0__Reg1_1__MemImm12Offset2_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemImm12Offset, MCK__EXCLAIM_ }, }, + { 1344 /* str */, ARM::STR_POST_IMM, Convert__MemNoOffset1_2__Reg1_1__Tie0__AM2OffsetImm2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_AM2OffsetImm }, }, + { 1344 /* str */, ARM::STR_POST_REG, Convert__MemNoOffset1_2__Reg1_1__Tie0__PostIdxRegShifted2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_PostIdxRegShifted }, }, + { 1344 /* str */, ARM::STR_PRE_REG, Convert__imm_95_0__Reg1_1__MemRegOffset3_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemRegOffset, MCK__EXCLAIM_ }, }, + { 1348 /* strb */, ARM::tSTRBi, Convert__Reg1_1__MemThumbRIs12_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_MemThumbRIs1 }, }, + { 1348 /* strb */, ARM::tSTRBr, Convert__Reg1_1__MemThumbRR2_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_MemThumbRR }, }, + { 1348 /* strb */, ARM::t2STRBi8, Convert__Reg1_1__MemNegImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_MemNegImm8Offset }, }, + { 1348 /* strb */, ARM::t2STRBi12, Convert__Reg1_1__MemUImm12Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_MemUImm12Offset }, }, + { 1348 /* strb */, ARM::t2STRBs, Convert__Reg1_1__T2MemRegOffset3_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_T2MemRegOffset }, }, + { 1348 /* strb */, ARM::STRBi12, Convert__Reg1_1__MemImm12Offset2_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_MemImm12Offset }, }, + { 1348 /* strb */, ARM::STRBrs, Convert__Reg1_1__MemRegOffset3_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_MemRegOffset }, }, + { 1348 /* strb */, ARM::t2STRBi12, Convert__Reg1_2__MemUImm12Offset2_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_MemUImm12Offset }, }, + { 1348 /* strb */, ARM::t2STRBs, Convert__Reg1_2__T2MemRegOffset3_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_T2MemRegOffset }, }, + { 1348 /* strb */, ARM::t2STRB_PRE, Convert__imm_95_0__Reg1_1__MemImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_MemImm8Offset, MCK__EXCLAIM_ }, }, + { 1348 /* strb */, ARM::t2STRB_POST, Convert__MemNoOffset1_2__Reg1_1__Tie0__Imm1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_MemNoOffset, MCK_Imm }, }, + { 1348 /* strb */, ARM::STRB_PRE_IMM, Convert__imm_95_0__Reg1_1__MemImm12Offset2_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemImm12Offset, MCK__EXCLAIM_ }, }, + { 1348 /* strb */, ARM::STRB_POST_IMM, Convert__MemNoOffset1_2__Reg1_1__Tie0__AM2OffsetImm2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_AM2OffsetImm }, }, + { 1348 /* strb */, ARM::STRB_POST_REG, Convert__MemNoOffset1_2__Reg1_1__Tie0__PostIdxRegShifted2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_PostIdxRegShifted }, }, + { 1348 /* strb */, ARM::STRB_PRE_REG, Convert__imm_95_0__Reg1_1__MemRegOffset3_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemRegOffset, MCK__EXCLAIM_ }, }, + { 1353 /* strbt */, ARM::t2STRBT, Convert__Reg1_1__MemImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_MemImm8Offset }, }, + { 1353 /* strbt */, ARM::STRBT_POST, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset }, }, + { 1353 /* strbt */, ARM::STRBT_POST_IMM, Convert__MemNoOffset1_2__Reg1_1__Tie0__AM2OffsetImm2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_AM2OffsetImm }, }, + { 1353 /* strbt */, ARM::STRBT_POST_REG, Convert__MemNoOffset1_2__Reg1_1__Tie0__PostIdxRegShifted2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_PostIdxRegShifted }, }, + { 1359 /* strd */, ARM::t2STRDi8, Convert__Reg1_1__Reg1_2__MemImm8s4Offset2_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_MemImm8s4Offset }, }, + { 1359 /* strd */, ARM::STRD, Convert__Reg1_1__Reg1_2__AddrMode33_3__CondCode2_0, Feature_IsARM|Feature_HasV5TE, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_AddrMode3 }, }, + { 1359 /* strd */, ARM::t2STRD_PRE, Convert__imm_95_0__Reg1_1__Reg1_2__MemImm8s4Offset2_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_MemImm8s4Offset, MCK__EXCLAIM_ }, }, + { 1359 /* strd */, ARM::t2STRD_POST, Convert__MemNoOffset1_3__Reg1_1__Reg1_2__Tie0__Imm1_4__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_MemNoOffset, MCK_Imm }, }, + { 1359 /* strd */, ARM::STRD_PRE, Convert__imm_95_0__Reg1_1__Reg1_2__AddrMode33_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_AddrMode3, MCK__EXCLAIM_ }, }, + { 1359 /* strd */, ARM::STRD_POST, Convert__MemNoOffset1_3__Reg1_1__Reg1_2__Tie0__AM3Offset2_4__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_MemNoOffset, MCK_AM3Offset }, }, + { 1364 /* strex */, ARM::t2STREX, Convert__Reg1_1__Reg1_2__MemImm0_1020s4Offset2_3__CondCode2_0, Feature_IsThumb|Feature_HasV8MBaseline, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_MemImm0_1020s4Offset }, }, + { 1364 /* strex */, ARM::STREX, Convert__Reg1_1__Reg1_2__MemNoOffset1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_MemNoOffset }, }, + { 1370 /* strexb */, ARM::t2STREXB, Convert__Reg1_1__Reg1_2__MemNoOffset1_3__CondCode2_0, Feature_IsThumb|Feature_HasV8MBaseline, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_MemNoOffset }, }, + { 1370 /* strexb */, ARM::STREXB, Convert__Reg1_1__Reg1_2__MemNoOffset1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_MemNoOffset }, }, + { 1377 /* strexd */, ARM::STREXD, Convert__Reg1_1__Reg1_2__MemNoOffset1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_GPRPair, MCK_MemNoOffset }, }, + { 1377 /* strexd */, ARM::t2STREXD, Convert__Reg1_1__Reg1_2__Reg1_3__MemNoOffset1_4__CondCode2_0, Feature_IsThumb2|Feature_IsNotMClass, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_MemNoOffset }, }, + { 1384 /* strexh */, ARM::t2STREXH, Convert__Reg1_1__Reg1_2__MemNoOffset1_3__CondCode2_0, Feature_IsThumb|Feature_HasV8MBaseline, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_MemNoOffset }, }, + { 1384 /* strexh */, ARM::STREXH, Convert__Reg1_1__Reg1_2__MemNoOffset1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_MemNoOffset }, }, + { 1391 /* strh */, ARM::tSTRHi, Convert__Reg1_1__MemThumbRIs22_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_MemThumbRIs2 }, }, + { 1391 /* strh */, ARM::tSTRHr, Convert__Reg1_1__MemThumbRR2_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_MemThumbRR }, }, + { 1391 /* strh */, ARM::t2STRHi8, Convert__Reg1_1__MemNegImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_MemNegImm8Offset }, }, + { 1391 /* strh */, ARM::t2STRHi12, Convert__Reg1_1__MemUImm12Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_MemUImm12Offset }, }, + { 1391 /* strh */, ARM::t2STRHs, Convert__Reg1_1__T2MemRegOffset3_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_T2MemRegOffset }, }, + { 1391 /* strh */, ARM::STRH, Convert__Reg1_1__AddrMode33_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_AddrMode3 }, }, + { 1391 /* strh */, ARM::t2STRHi12, Convert__Reg1_2__MemUImm12Offset2_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_MemUImm12Offset }, }, + { 1391 /* strh */, ARM::t2STRHs, Convert__Reg1_2__T2MemRegOffset3_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_T2MemRegOffset }, }, + { 1391 /* strh */, ARM::t2STRH_PRE, Convert__imm_95_0__Reg1_1__MemImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_MemImm8Offset, MCK__EXCLAIM_ }, }, + { 1391 /* strh */, ARM::t2STRH_POST, Convert__MemNoOffset1_2__Reg1_1__Tie0__Imm1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_MemNoOffset, MCK_Imm }, }, + { 1391 /* strh */, ARM::STRH_PRE, Convert__imm_95_0__Reg1_1__AddrMode33_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_AddrMode3, MCK__EXCLAIM_ }, }, + { 1391 /* strh */, ARM::STRH_POST, Convert__MemNoOffset1_2__Reg1_1__Tie0__AM3Offset2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_AM3Offset }, }, + { 1396 /* strht */, ARM::t2STRHT, Convert__Reg1_1__MemImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_MemImm8Offset }, }, + { 1396 /* strht */, ARM::STRHTi, Convert__MemNoOffset1_2__Reg1_1__Tie0__PostIdxImm81_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_PostIdxImm8 }, }, + { 1396 /* strht */, ARM::STRHTr, Convert__MemNoOffset1_2__Reg1_1__Tie0__PostIdxReg2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_PostIdxReg }, }, + { 1402 /* strt */, ARM::t2STRT, Convert__Reg1_1__MemImm8Offset2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_MemImm8Offset }, }, + { 1402 /* strt */, ARM::STRT_POST, Convert__Reg1_1__MemNoOffset1_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset }, }, + { 1402 /* strt */, ARM::STRT_POST_IMM, Convert__MemNoOffset1_2__Reg1_1__Tie0__AM2OffsetImm2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_AM2OffsetImm }, }, + { 1402 /* strt */, ARM::STRT_POST_REG, Convert__MemNoOffset1_2__Reg1_1__Tie0__PostIdxRegShifted2_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_MemNoOffset, MCK_PostIdxRegShifted }, }, + { 1407 /* sub */, ARM::tSUBspi, Convert__Reg1_1__Tie0__Imm0_508s41_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_GPRsp, MCK_Imm0_508s4 }, }, + { 1407 /* sub */, ARM::t2SUBri12, Convert__Reg1_1__Reg1_1__Imm0_40951_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_Imm0_4095 }, }, + { 1407 /* sub */, ARM::tSUBi8, Convert__Reg1_2__CCOut1_0__Tie0__Imm0_2551_3__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_Imm0_255 }, }, + { 1407 /* sub */, ARM::t2SUBrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_rGPR }, }, + { 1407 /* sub */, ARM::t2SUBrs, Convert__Reg1_2__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_RegShiftedImm }, }, + { 1407 /* sub */, ARM::t2SUBri, Convert__Reg1_2__Reg1_2__T2SOImm1_3__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_T2SOImm }, }, + { 1407 /* sub */, ARM::SUBrr, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 1407 /* sub */, ARM::SUBri, Convert__Reg1_2__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_ModImm }, }, + { 1407 /* sub */, ARM::SUBrsi, Convert__Reg1_2__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_RegShiftedImm }, }, + { 1407 /* sub */, ARM::SUBrsr, Convert__Reg1_2__Reg1_2__RegShiftedReg3_3__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_RegShiftedReg }, }, + { 1407 /* sub */, ARM::tSUBspi, Convert__regSP__Tie0__Imm0_508s41_3__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_GPRsp, MCK_GPRsp, MCK_Imm0_508s4 }, }, + { 1407 /* sub */, ARM::t2SUBri12, Convert__Reg1_1__Reg1_2__Imm0_40951_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_GPR, MCK_Imm0_4095 }, }, + { 1407 /* sub */, ARM::t2SUBrr, Convert__Reg1_3__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_rGPR }, }, + { 1407 /* sub */, ARM::tSUBrr, Convert__Reg1_2__CCOut1_0__Reg1_3__Reg1_4__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR, MCK_tGPR }, }, + { 1407 /* sub */, ARM::tSUBi3, Convert__Reg1_2__CCOut1_0__Reg1_3__Imm0_71_4__CondCode2_1, Feature_IsThumb, { MCK_CCOut, MCK_CondCode, MCK_tGPR, MCK_tGPR, MCK_Imm0_7 }, }, + { 1407 /* sub */, ARM::t2SUBrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_rGPR }, }, + { 1407 /* sub */, ARM::t2SUBrs, Convert__Reg1_2__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_RegShiftedImm }, }, + { 1407 /* sub */, ARM::t2SUBri, Convert__Reg1_2__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_T2SOImm }, }, + { 1407 /* sub */, ARM::SUBrr, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 1407 /* sub */, ARM::SUBri, Convert__Reg1_2__Reg1_3__ModImm1_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_ModImm }, }, + { 1407 /* sub */, ARM::SUBrsi, Convert__Reg1_2__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_RegShiftedImm }, }, + { 1407 /* sub */, ARM::SUBrsr, Convert__Reg1_2__Reg1_3__RegShiftedReg3_4__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_RegShiftedReg }, }, + { 1407 /* sub */, ARM::t2SUBrr, Convert__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_GPRnopc, MCK_rGPR }, }, + { 1407 /* sub */, ARM::t2SUBrs, Convert__Reg1_3__Reg1_4__RegShiftedImm2_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_GPRnopc, MCK_RegShiftedImm }, }, + { 1407 /* sub */, ARM::t2SUBri, Convert__Reg1_3__Reg1_4__T2SOImm1_5__CondCode2_1__CCOut1_0, Feature_IsThumb2, { MCK_CCOut, MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_GPRnopc, MCK_T2SOImm }, }, + { 1411 /* subs */, ARM::t2SUBS_PC_LR, Convert__Imm0_2551_3__CondCode2_0, Feature_IsThumb2|Feature_IsNotMClass, { MCK_CondCode, MCK_PC, MCK_LR, MCK_Imm0_255 }, }, + { 1416 /* subw */, ARM::t2SUBri12, Convert__Reg1_1__Reg1_2__Imm0_40951_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_GPR, MCK_Imm0_4095 }, }, + { 1421 /* svc */, ARM::tSVC, Convert__Imm0_2551_1__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_Imm0_255 }, }, + { 1421 /* svc */, ARM::SVC, Convert__Imm24bit1_1__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_Imm24bit }, }, + { 1425 /* swp */, ARM::SWP, Convert__Reg1_1__Reg1_2__MemNoOffset1_3__CondCode2_0, Feature_PreV8, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_MemNoOffset }, }, + { 1429 /* swpb */, ARM::SWPB, Convert__Reg1_1__Reg1_2__MemNoOffset1_3__CondCode2_0, Feature_PreV8, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_MemNoOffset }, }, + { 1434 /* sxtab */, ARM::t2SXTAB, Convert__Reg1_1__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, Feature_HasT2ExtractPack|Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1434 /* sxtab */, ARM::SXTAB, Convert__Reg1_1__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPR, MCK_GPRnopc }, }, + { 1434 /* sxtab */, ARM::t2SXTAB, Convert__Reg1_1__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, Feature_HasT2ExtractPack|Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_RotImm }, }, + { 1434 /* sxtab */, ARM::SXTAB, Convert__Reg1_1__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPR, MCK_GPRnopc, MCK_RotImm }, }, + { 1440 /* sxtab16 */, ARM::t2SXTAB16, Convert__Reg1_1__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, Feature_HasT2ExtractPack|Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1440 /* sxtab16 */, ARM::SXTAB16, Convert__Reg1_1__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPR, MCK_GPRnopc }, }, + { 1440 /* sxtab16 */, ARM::t2SXTAB16, Convert__Reg1_1__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, Feature_HasT2ExtractPack|Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_RotImm }, }, + { 1440 /* sxtab16 */, ARM::SXTAB16, Convert__Reg1_1__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPR, MCK_GPRnopc, MCK_RotImm }, }, + { 1448 /* sxtah */, ARM::t2SXTAH, Convert__Reg1_1__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, Feature_HasT2ExtractPack|Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1448 /* sxtah */, ARM::SXTAH, Convert__Reg1_1__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPR, MCK_GPRnopc }, }, + { 1448 /* sxtah */, ARM::t2SXTAH, Convert__Reg1_1__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, Feature_HasT2ExtractPack|Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_RotImm }, }, + { 1448 /* sxtah */, ARM::SXTAH, Convert__Reg1_1__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPR, MCK_GPRnopc, MCK_RotImm }, }, + { 1454 /* sxtb */, ARM::tSXTB, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb|Feature_HasV6, { MCK_CondCode, MCK_tGPR, MCK_tGPR }, }, + { 1454 /* sxtb */, ARM::t2SXTB, Convert__Reg1_1__Reg1_2__imm_95_0__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 1454 /* sxtb */, ARM::SXTB, Convert__Reg1_1__Reg1_2__imm_95_0__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1454 /* sxtb */, ARM::t2SXTB, Convert__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR }, }, + { 1454 /* sxtb */, ARM::t2SXTB, Convert__Reg1_1__Reg1_2__RotImm1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_RotImm }, }, + { 1454 /* sxtb */, ARM::SXTB, Convert__Reg1_1__Reg1_2__RotImm1_3__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_RotImm }, }, + { 1454 /* sxtb */, ARM::t2SXTB, Convert__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_RotImm }, }, + { 1459 /* sxtb16 */, ARM::t2SXTB16, Convert__Reg1_1__Reg1_2__imm_95_0__CondCode2_0, Feature_HasT2ExtractPack|Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 1459 /* sxtb16 */, ARM::SXTB16, Convert__Reg1_1__Reg1_2__imm_95_0__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1459 /* sxtb16 */, ARM::t2SXTB16, Convert__Reg1_1__Reg1_2__RotImm1_3__CondCode2_0, Feature_IsThumb2|Feature_HasT2ExtractPack, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_RotImm }, }, + { 1459 /* sxtb16 */, ARM::t2SXTB16, Convert__Reg1_1__Reg1_2__RotImm1_3__CondCode2_0, Feature_HasT2ExtractPack|Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_RotImm }, }, + { 1459 /* sxtb16 */, ARM::SXTB16, Convert__Reg1_1__Reg1_2__RotImm1_3__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_RotImm }, }, + { 1466 /* sxth */, ARM::tSXTH, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb|Feature_HasV6, { MCK_CondCode, MCK_tGPR, MCK_tGPR }, }, + { 1466 /* sxth */, ARM::t2SXTH, Convert__Reg1_1__Reg1_2__imm_95_0__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 1466 /* sxth */, ARM::SXTH, Convert__Reg1_1__Reg1_2__imm_95_0__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1466 /* sxth */, ARM::t2SXTH, Convert__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR }, }, + { 1466 /* sxth */, ARM::t2SXTH, Convert__Reg1_1__Reg1_2__RotImm1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_RotImm }, }, + { 1466 /* sxth */, ARM::SXTH, Convert__Reg1_1__Reg1_2__RotImm1_3__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_RotImm }, }, + { 1466 /* sxth */, ARM::t2SXTH, Convert__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_RotImm }, }, + { 1471 /* tbb */, ARM::t2TBB, Convert__MemTBB2_1__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_MemTBB }, }, + { 1475 /* tbh */, ARM::t2TBH, Convert__MemTBH2_1__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_MemTBH }, }, + { 1479 /* teq */, ARM::t2TEQrr, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_rGPR }, }, + { 1479 /* teq */, ARM::t2TEQrs, Convert__Reg1_1__RegShiftedImm2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_RegShiftedImm }, }, + { 1479 /* teq */, ARM::TEQrsr, Convert__Reg1_1__RegShiftedReg3_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_RegShiftedReg }, }, + { 1479 /* teq */, ARM::t2TEQri, Convert__Reg1_1__T2SOImm1_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_T2SOImm }, }, + { 1479 /* teq */, ARM::TEQrr, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 1479 /* teq */, ARM::TEQri, Convert__Reg1_1__ModImm1_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_ModImm }, }, + { 1479 /* teq */, ARM::TEQrsi, Convert__Reg1_1__RegShiftedImm2_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_RegShiftedImm }, }, + { 1479 /* teq */, ARM::t2TEQrr, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_rGPR }, }, + { 1479 /* teq */, ARM::t2TEQrs, Convert__Reg1_2__RegShiftedImm2_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_RegShiftedImm }, }, + { 1479 /* teq */, ARM::t2TEQri, Convert__Reg1_2__T2SOImm1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_T2SOImm }, }, + { 1483 /* trap */, ARM::TRAPNaCl, Convert_NoOperands, Feature_IsARM|Feature_UseNaClTrap, { }, }, + { 1483 /* trap */, ARM::TRAP, Convert_NoOperands, Feature_IsARM, { }, }, + { 1483 /* trap */, ARM::tTRAP, Convert_NoOperands, Feature_IsThumb, { }, }, + { 1488 /* tst */, ARM::tTST, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb, { MCK_CondCode, MCK_tGPR, MCK_tGPR }, }, + { 1488 /* tst */, ARM::t2TSTrr, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_rGPR }, }, + { 1488 /* tst */, ARM::t2TSTrs, Convert__Reg1_1__RegShiftedImm2_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_RegShiftedImm }, }, + { 1488 /* tst */, ARM::TSTrsr, Convert__Reg1_1__RegShiftedReg3_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_RegShiftedReg }, }, + { 1488 /* tst */, ARM::t2TSTri, Convert__Reg1_1__T2SOImm1_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_GPRnopc, MCK_T2SOImm }, }, + { 1488 /* tst */, ARM::TSTrr, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_GPR }, }, + { 1488 /* tst */, ARM::TSTri, Convert__Reg1_1__ModImm1_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_ModImm }, }, + { 1488 /* tst */, ARM::TSTrsi, Convert__Reg1_1__RegShiftedImm2_2__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPR, MCK_RegShiftedImm }, }, + { 1488 /* tst */, ARM::t2TSTrr, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_rGPR }, }, + { 1488 /* tst */, ARM::t2TSTrs, Convert__Reg1_2__RegShiftedImm2_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_RegShiftedImm }, }, + { 1488 /* tst */, ARM::t2TSTri, Convert__Reg1_2__T2SOImm1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_GPRnopc, MCK_T2SOImm }, }, + { 1492 /* tt */, ARM::t2TT, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb|Feature_Has8MSecExt, { MCK_CondCode, MCK_rGPR, MCK_GPRnopc }, }, + { 1495 /* tta */, ARM::t2TTA, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb|Feature_Has8MSecExt, { MCK_CondCode, MCK_rGPR, MCK_GPRnopc }, }, + { 1499 /* ttat */, ARM::t2TTAT, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb|Feature_Has8MSecExt, { MCK_CondCode, MCK_rGPR, MCK_GPRnopc }, }, + { 1504 /* ttt */, ARM::t2TTT, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb|Feature_Has8MSecExt, { MCK_CondCode, MCK_rGPR, MCK_GPRnopc }, }, + { 1508 /* uadd16 */, ARM::t2UADD16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1508 /* uadd16 */, ARM::UADD16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1515 /* uadd8 */, ARM::t2UADD8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1515 /* uadd8 */, ARM::UADD8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1521 /* uasx */, ARM::t2UASX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1521 /* uasx */, ARM::UASX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1526 /* ubfx */, ARM::t2UBFX, Convert__Reg1_1__Reg1_2__Imm0_311_3__Imm1_321_4__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_Imm0_31, MCK_Imm1_32 }, }, + { 1526 /* ubfx */, ARM::UBFX, Convert__Reg1_1__Reg1_2__Imm0_311_3__Imm1_321_4__CondCode2_0, Feature_IsARM|Feature_HasV6T2, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_Imm0_31, MCK_Imm1_32 }, }, + { 1531 /* udf */, ARM::tUDF, Convert__Imm0_2551_0, Feature_IsThumb, { MCK_Imm0_255 }, }, + { 1531 /* udf */, ARM::UDF, Convert__Imm0_655351_0, Feature_IsARM, { MCK_Imm0_65535 }, }, + { 1531 /* udf */, ARM::t2UDF, Convert__Imm0_655351_1, Feature_IsThumb2, { MCK__DOT_w, MCK_Imm0_65535 }, }, + { 1535 /* udiv */, ARM::t2UDIV, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_HasDivide|Feature_IsThumb|Feature_HasV8MBaseline, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1535 /* udiv */, ARM::UDIV, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM|Feature_HasDivideInARM, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 1540 /* uhadd16 */, ARM::t2UHADD16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1540 /* uhadd16 */, ARM::UHADD16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1548 /* uhadd8 */, ARM::t2UHADD8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1548 /* uhadd8 */, ARM::UHADD8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1555 /* uhasx */, ARM::t2UHASX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1555 /* uhasx */, ARM::UHASX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1561 /* uhsax */, ARM::t2UHSAX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1561 /* uhsax */, ARM::UHSAX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1567 /* uhsub16 */, ARM::t2UHSUB16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1567 /* uhsub16 */, ARM::UHSUB16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1575 /* uhsub8 */, ARM::t2UHSUB8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1575 /* uhsub8 */, ARM::UHSUB8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1582 /* umaal */, ARM::t2UMAAL, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1582 /* umaal */, ARM::UMAAL, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 1588 /* umlal */, ARM::t2UMLAL, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__Tie0__Tie1__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1588 /* umlal */, ARM::UMLAL, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_5__Tie0__Tie1__CondCode2_1__CCOut1_0, Feature_IsARM|Feature_HasV6, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 1588 /* umlal */, ARM::UMLAL, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_5__Tie0__Tie1__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 1594 /* umull */, ARM::t2UMULL, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1594 /* umull */, ARM::UMULL, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, Feature_IsARM|Feature_HasV6, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 1594 /* umull */, ARM::UMULL, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0, Feature_IsARM, { MCK_CCOut, MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 1600 /* uqadd16 */, ARM::t2UQADD16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1600 /* uqadd16 */, ARM::UQADD16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1608 /* uqadd8 */, ARM::t2UQADD8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1608 /* uqadd8 */, ARM::UQADD8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1615 /* uqasx */, ARM::t2UQASX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1615 /* uqasx */, ARM::UQASX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1621 /* uqsax */, ARM::t2UQSAX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1621 /* uqsax */, ARM::UQSAX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1627 /* uqsub16 */, ARM::t2UQSUB16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1627 /* uqsub16 */, ARM::UQSUB16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1635 /* uqsub8 */, ARM::t2UQSUB8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1635 /* uqsub8 */, ARM::UQSUB8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1642 /* usad8 */, ARM::t2USAD8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1642 /* usad8 */, ARM::USAD8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 1648 /* usada8 */, ARM::t2USADA8, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1648 /* usada8 */, ARM::USADA8, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_GPR, MCK_GPR }, }, + { 1655 /* usat */, ARM::t2USAT, Convert__Reg1_1__Imm0_311_2__Reg1_3__imm_95_0__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_Imm0_31, MCK_rGPR }, }, + { 1655 /* usat */, ARM::USAT, Convert__Reg1_1__Imm0_311_2__Reg1_3__imm_95_0__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_Imm0_31, MCK_GPRnopc }, }, + { 1655 /* usat */, ARM::t2USAT, Convert__Reg1_1__Imm0_311_2__Reg1_3__ShifterImm1_4__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_Imm0_31, MCK_rGPR, MCK_ShifterImm }, }, + { 1655 /* usat */, ARM::USAT, Convert__Reg1_1__Imm0_311_2__Reg1_3__ShifterImm1_4__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_Imm0_31, MCK_GPRnopc, MCK_ShifterImm }, }, + { 1660 /* usat16 */, ARM::t2USAT16, Convert__Reg1_1__Imm0_151_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_Imm0_15, MCK_rGPR }, }, + { 1660 /* usat16 */, ARM::USAT16, Convert__Reg1_1__Imm0_151_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_Imm0_15, MCK_GPRnopc }, }, + { 1667 /* usax */, ARM::t2USAX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1667 /* usax */, ARM::USAX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1672 /* usub16 */, ARM::t2USUB16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1672 /* usub16 */, ARM::USUB16, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1679 /* usub8 */, ARM::t2USUB8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsThumb2|Feature_HasDSP, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1679 /* usub8 */, ARM::USUB8, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1685 /* uxtab */, ARM::t2UXTAB, Convert__Reg1_1__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, Feature_HasT2ExtractPack|Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1685 /* uxtab */, ARM::UXTAB, Convert__Reg1_1__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPR, MCK_GPRnopc }, }, + { 1685 /* uxtab */, ARM::t2UXTAB, Convert__Reg1_1__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, Feature_HasT2ExtractPack|Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_RotImm }, }, + { 1685 /* uxtab */, ARM::UXTAB, Convert__Reg1_1__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPR, MCK_GPRnopc, MCK_RotImm }, }, + { 1691 /* uxtab16 */, ARM::t2UXTAB16, Convert__Reg1_1__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, Feature_HasT2ExtractPack|Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1691 /* uxtab16 */, ARM::UXTAB16, Convert__Reg1_1__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPR, MCK_GPRnopc }, }, + { 1691 /* uxtab16 */, ARM::t2UXTAB16, Convert__Reg1_1__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, Feature_HasT2ExtractPack|Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_RotImm }, }, + { 1691 /* uxtab16 */, ARM::UXTAB16, Convert__Reg1_1__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPR, MCK_GPRnopc, MCK_RotImm }, }, + { 1699 /* uxtah */, ARM::t2UXTAH, Convert__Reg1_1__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, Feature_HasT2ExtractPack|Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR }, }, + { 1699 /* uxtah */, ARM::UXTAH, Convert__Reg1_1__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPR, MCK_GPRnopc }, }, + { 1699 /* uxtah */, ARM::t2UXTAH, Convert__Reg1_1__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, Feature_HasT2ExtractPack|Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_rGPR, MCK_RotImm }, }, + { 1699 /* uxtah */, ARM::UXTAH, Convert__Reg1_1__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPR, MCK_GPRnopc, MCK_RotImm }, }, + { 1705 /* uxtb */, ARM::tUXTB, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb|Feature_HasV6, { MCK_CondCode, MCK_tGPR, MCK_tGPR }, }, + { 1705 /* uxtb */, ARM::t2UXTB, Convert__Reg1_1__Reg1_2__imm_95_0__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 1705 /* uxtb */, ARM::UXTB, Convert__Reg1_1__Reg1_2__imm_95_0__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1705 /* uxtb */, ARM::t2UXTB, Convert__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR }, }, + { 1705 /* uxtb */, ARM::t2UXTB, Convert__Reg1_1__Reg1_2__RotImm1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_RotImm }, }, + { 1705 /* uxtb */, ARM::UXTB, Convert__Reg1_1__Reg1_2__RotImm1_3__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_RotImm }, }, + { 1705 /* uxtb */, ARM::t2UXTB, Convert__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_RotImm }, }, + { 1710 /* uxtb16 */, ARM::t2UXTB16, Convert__Reg1_1__Reg1_2__imm_95_0__CondCode2_0, Feature_HasT2ExtractPack|Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 1710 /* uxtb16 */, ARM::UXTB16, Convert__Reg1_1__Reg1_2__imm_95_0__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1710 /* uxtb16 */, ARM::t2UXTB16, Convert__Reg1_1__Reg1_2__RotImm1_3__CondCode2_0, Feature_HasT2ExtractPack|Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_RotImm }, }, + { 1710 /* uxtb16 */, ARM::t2UXTB16, Convert__Reg1_1__Reg1_2__RotImm1_3__CondCode2_0, Feature_HasT2ExtractPack|Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_RotImm }, }, + { 1710 /* uxtb16 */, ARM::UXTB16, Convert__Reg1_1__Reg1_2__RotImm1_3__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_RotImm }, }, + { 1717 /* uxth */, ARM::tUXTH, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_IsThumb|Feature_HasV6, { MCK_CondCode, MCK_tGPR, MCK_tGPR }, }, + { 1717 /* uxth */, ARM::t2UXTH, Convert__Reg1_1__Reg1_2__imm_95_0__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR }, }, + { 1717 /* uxth */, ARM::UXTH, Convert__Reg1_1__Reg1_2__imm_95_0__CondCode2_0, Feature_IsARM, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc }, }, + { 1717 /* uxth */, ARM::t2UXTH, Convert__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR }, }, + { 1717 /* uxth */, ARM::t2UXTH, Convert__Reg1_1__Reg1_2__RotImm1_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK_rGPR, MCK_rGPR, MCK_RotImm }, }, + { 1717 /* uxth */, ARM::UXTH, Convert__Reg1_1__Reg1_2__RotImm1_3__CondCode2_0, Feature_IsARM|Feature_HasV6, { MCK_CondCode, MCK_GPRnopc, MCK_GPRnopc, MCK_RotImm }, }, + { 1717 /* uxth */, ARM::t2UXTH, Convert__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w, MCK_rGPR, MCK_rGPR, MCK_RotImm }, }, + { 1722 /* vaba */, ARM::VABAsv8i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1722 /* vaba */, ARM::VABAsv4i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1722 /* vaba */, ARM::VABAsv4i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1722 /* vaba */, ARM::VABAsv2i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1722 /* vaba */, ARM::VABAsv16i8, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1722 /* vaba */, ARM::VABAsv8i8, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1722 /* vaba */, ARM::VABAuv8i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1722 /* vaba */, ARM::VABAuv4i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1722 /* vaba */, ARM::VABAuv4i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1722 /* vaba */, ARM::VABAuv2i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1722 /* vaba */, ARM::VABAuv16i8, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1722 /* vaba */, ARM::VABAuv8i8, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1727 /* vabal */, ARM::VABALsv4i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 1727 /* vabal */, ARM::VABALsv2i64, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 1727 /* vabal */, ARM::VABALsv8i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 1727 /* vabal */, ARM::VABALuv4i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 1727 /* vabal */, ARM::VABALuv2i64, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 1727 /* vabal */, ARM::VABALuv8i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 1733 /* vabd */, ARM::VABDsv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 1733 /* vabd */, ARM::VABDsv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 1733 /* vabd */, ARM::VABDsv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 1733 /* vabd */, ARM::VABDsv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 1733 /* vabd */, ARM::VABDsv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR }, }, + { 1733 /* vabd */, ARM::VABDsv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR }, }, + { 1733 /* vabd */, ARM::VABDuv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR }, }, + { 1733 /* vabd */, ARM::VABDuv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR }, }, + { 1733 /* vabd */, ARM::VABDuv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR }, }, + { 1733 /* vabd */, ARM::VABDuv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR }, }, + { 1733 /* vabd */, ARM::VABDuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, }, + { 1733 /* vabd */, ARM::VABDuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, }, + { 1733 /* vabd */, ARM::VABDfq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 1733 /* vabd */, ARM::VABDfd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 1733 /* vabd */, ARM::VABDhq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 1733 /* vabd */, ARM::VABDhd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 1733 /* vabd */, ARM::VABDsv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1733 /* vabd */, ARM::VABDsv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1733 /* vabd */, ARM::VABDsv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1733 /* vabd */, ARM::VABDsv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1733 /* vabd */, ARM::VABDsv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1733 /* vabd */, ARM::VABDsv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1733 /* vabd */, ARM::VABDuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1733 /* vabd */, ARM::VABDuv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1733 /* vabd */, ARM::VABDuv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1733 /* vabd */, ARM::VABDuv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1733 /* vabd */, ARM::VABDuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1733 /* vabd */, ARM::VABDuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1733 /* vabd */, ARM::VABDfq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1733 /* vabd */, ARM::VABDfd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1733 /* vabd */, ARM::VABDhq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1733 /* vabd */, ARM::VABDhd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1738 /* vabdl */, ARM::VABDLsv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 1738 /* vabdl */, ARM::VABDLsv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 1738 /* vabdl */, ARM::VABDLsv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 1738 /* vabdl */, ARM::VABDLuv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 1738 /* vabdl */, ARM::VABDLuv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 1738 /* vabdl */, ARM::VABDLuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 1744 /* vabs */, ARM::VABSv8i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 1744 /* vabs */, ARM::VABSv4i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 1744 /* vabs */, ARM::VABSv4i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 1744 /* vabs */, ARM::VABSv2i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 1744 /* vabs */, ARM::VABSv16i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR }, }, + { 1744 /* vabs */, ARM::VABSv8i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR }, }, + { 1744 /* vabs */, ARM::VABSfq, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 1744 /* vabs */, ARM::VABSfd, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 1744 /* vabs */, ARM::VABSS, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 1744 /* vabs */, ARM::VABSD, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 1744 /* vabs */, ARM::VABShq, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 1744 /* vabs */, ARM::VABShd, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 1744 /* vabs */, ARM::VABSH, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 1749 /* vacge */, ARM::VACGEfq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 1749 /* vacge */, ARM::VACGEfd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 1749 /* vacge */, ARM::VACGEhq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 1749 /* vacge */, ARM::VACGEhd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 1749 /* vacge */, ARM::VACGEfq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1749 /* vacge */, ARM::VACGEfd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1749 /* vacge */, ARM::VACGEhq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1749 /* vacge */, ARM::VACGEhd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1755 /* vacgt */, ARM::VACGTfq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 1755 /* vacgt */, ARM::VACGTfd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 1755 /* vacgt */, ARM::VACGThq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 1755 /* vacgt */, ARM::VACGThd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 1755 /* vacgt */, ARM::VACGTfq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1755 /* vacgt */, ARM::VACGTfd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1755 /* vacgt */, ARM::VACGThq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1755 /* vacgt */, ARM::VACGThd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1761 /* vacle */, ARM::VACGEfq, Convert__Reg1_2__Reg1_3__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 1761 /* vacle */, ARM::VACGEfd, Convert__Reg1_2__Reg1_3__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 1761 /* vacle */, ARM::VACGEhq, Convert__Reg1_2__Reg1_3__Reg1_2__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 1761 /* vacle */, ARM::VACGEhd, Convert__Reg1_2__Reg1_3__Reg1_2__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 1761 /* vacle */, ARM::VACGEfq, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1761 /* vacle */, ARM::VACGEfd, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1761 /* vacle */, ARM::VACGEhq, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1761 /* vacle */, ARM::VACGEhd, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1767 /* vaclt */, ARM::VACGTfq, Convert__Reg1_2__Reg1_3__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 1767 /* vaclt */, ARM::VACGTfd, Convert__Reg1_2__Reg1_3__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 1767 /* vaclt */, ARM::VACGThq, Convert__Reg1_2__Reg1_3__Reg1_2__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 1767 /* vaclt */, ARM::VACGThd, Convert__Reg1_2__Reg1_3__Reg1_2__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 1767 /* vaclt */, ARM::VACGTfq, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1767 /* vaclt */, ARM::VACGTfd, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1767 /* vaclt */, ARM::VACGThq, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1767 /* vaclt */, ARM::VACGThd, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1773 /* vadd */, ARM::VADDfq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 1773 /* vadd */, ARM::VADDfd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 1773 /* vadd */, ARM::VADDS, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 1773 /* vadd */, ARM::VADDD, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 1773 /* vadd */, ARM::VADDv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_QPR }, }, + { 1773 /* vadd */, ARM::VADDv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_DPR }, }, + { 1773 /* vadd */, ARM::VADDv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_QPR }, }, + { 1773 /* vadd */, ARM::VADDv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_DPR }, }, + { 1773 /* vadd */, ARM::VADDv2i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i64, MCK_QPR, MCK_QPR }, }, + { 1773 /* vadd */, ARM::VADDv1i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i64, MCK_DPR, MCK_DPR }, }, + { 1773 /* vadd */, ARM::VADDv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_QPR, MCK_QPR }, }, + { 1773 /* vadd */, ARM::VADDv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_DPR, MCK_DPR }, }, + { 1773 /* vadd */, ARM::VADDhq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 1773 /* vadd */, ARM::VADDhd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 1773 /* vadd */, ARM::VADDH, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 1773 /* vadd */, ARM::VADDfq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1773 /* vadd */, ARM::VADDfd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1773 /* vadd */, ARM::VADDS, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 1773 /* vadd */, ARM::VADDD, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1773 /* vadd */, ARM::VADDv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1773 /* vadd */, ARM::VADDv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1773 /* vadd */, ARM::VADDv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1773 /* vadd */, ARM::VADDv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1773 /* vadd */, ARM::VADDv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i64, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1773 /* vadd */, ARM::VADDv1i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1773 /* vadd */, ARM::VADDv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1773 /* vadd */, ARM::VADDv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1773 /* vadd */, ARM::VADDhq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1773 /* vadd */, ARM::VADDhd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1773 /* vadd */, ARM::VADDH, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 1778 /* vaddhn */, ARM::VADDHNv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_QPR, MCK_QPR }, }, + { 1778 /* vaddhn */, ARM::VADDHNv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_QPR, MCK_QPR }, }, + { 1778 /* vaddhn */, ARM::VADDHNv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i64, MCK_DPR, MCK_QPR, MCK_QPR }, }, + { 1785 /* vaddl */, ARM::VADDLsv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 1785 /* vaddl */, ARM::VADDLsv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 1785 /* vaddl */, ARM::VADDLsv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 1785 /* vaddl */, ARM::VADDLuv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 1785 /* vaddl */, ARM::VADDLuv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 1785 /* vaddl */, ARM::VADDLuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 1791 /* vaddw */, ARM::VADDWsv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_DPR }, }, + { 1791 /* vaddw */, ARM::VADDWsv2i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_DPR }, }, + { 1791 /* vaddw */, ARM::VADDWsv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_DPR }, }, + { 1791 /* vaddw */, ARM::VADDWuv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_DPR }, }, + { 1791 /* vaddw */, ARM::VADDWuv2i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_DPR }, }, + { 1791 /* vaddw */, ARM::VADDWuv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_DPR }, }, + { 1791 /* vaddw */, ARM::VADDWsv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_DPR }, }, + { 1791 /* vaddw */, ARM::VADDWsv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_DPR }, }, + { 1791 /* vaddw */, ARM::VADDWsv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_DPR }, }, + { 1791 /* vaddw */, ARM::VADDWuv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_DPR }, }, + { 1791 /* vaddw */, ARM::VADDWuv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_DPR }, }, + { 1791 /* vaddw */, ARM::VADDWuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_DPR }, }, + { 1797 /* vand */, ARM::VANDq, Convert__Reg1_1__Reg1_1__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_QPR, MCK_QPR }, }, + { 1797 /* vand */, ARM::VANDd, Convert__Reg1_1__Reg1_1__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_DPR, MCK_DPR }, }, + { 1797 /* vand */, ARM::VBICiv8i16, Convert__Reg1_2__NEONi16splatNot1_3__Tie0__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_NEONi16splatNot }, }, + { 1797 /* vand */, ARM::VBICiv4i16, Convert__Reg1_2__NEONi16splatNot1_3__Tie0__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_NEONi16splatNot }, }, + { 1797 /* vand */, ARM::VBICiv4i32, Convert__Reg1_2__NEONi32splatNot1_3__Tie0__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_NEONi32splatNot }, }, + { 1797 /* vand */, ARM::VBICiv2i32, Convert__Reg1_2__NEONi32splatNot1_3__Tie0__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_NEONi32splatNot }, }, + { 1797 /* vand */, ARM::VANDq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR }, }, + { 1797 /* vand */, ARM::VANDd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR }, }, + { 1797 /* vand */, ARM::VANDq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_QPR }, }, + { 1797 /* vand */, ARM::VANDd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR }, }, + { 1797 /* vand */, ARM::VANDq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_QPR, MCK_QPR }, }, + { 1797 /* vand */, ARM::VANDd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_DPR, MCK_DPR }, }, + { 1797 /* vand */, ARM::VANDq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR }, }, + { 1797 /* vand */, ARM::VANDd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR }, }, + { 1797 /* vand */, ARM::VANDq, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1797 /* vand */, ARM::VANDd, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1797 /* vand */, ARM::VANDq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1797 /* vand */, ARM::VANDd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1797 /* vand */, ARM::VANDq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1797 /* vand */, ARM::VANDd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1797 /* vand */, ARM::VANDq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1797 /* vand */, ARM::VANDd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1797 /* vand */, ARM::VANDq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1797 /* vand */, ARM::VANDd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1802 /* vbic */, ARM::VBICq, Convert__Reg1_1__Reg1_1__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_QPR, MCK_QPR }, }, + { 1802 /* vbic */, ARM::VBICd, Convert__Reg1_1__Reg1_1__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_DPR, MCK_DPR }, }, + { 1802 /* vbic */, ARM::VBICiv8i16, Convert__Reg1_2__NEONi16splat1_3__Tie0__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_NEONi16splat }, }, + { 1802 /* vbic */, ARM::VBICiv4i16, Convert__Reg1_2__NEONi16splat1_3__Tie0__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_NEONi16splat }, }, + { 1802 /* vbic */, ARM::VBICiv4i32, Convert__Reg1_2__NEONi32splat1_3__Tie0__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_NEONi32splat }, }, + { 1802 /* vbic */, ARM::VBICiv2i32, Convert__Reg1_2__NEONi32splat1_3__Tie0__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_NEONi32splat }, }, + { 1802 /* vbic */, ARM::VBICq, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1802 /* vbic */, ARM::VBICd, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1802 /* vbic */, ARM::VBICq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1802 /* vbic */, ARM::VBICd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1802 /* vbic */, ARM::VBICq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1802 /* vbic */, ARM::VBICd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1802 /* vbic */, ARM::VBICq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1802 /* vbic */, ARM::VBICd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1802 /* vbic */, ARM::VBICq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1802 /* vbic */, ARM::VBICd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1807 /* vbif */, ARM::VBIFq, Convert__Reg1_1__Tie0__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1807 /* vbif */, ARM::VBIFd, Convert__Reg1_1__Tie0__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1807 /* vbif */, ARM::VBIFq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1807 /* vbif */, ARM::VBIFd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1807 /* vbif */, ARM::VBIFq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1807 /* vbif */, ARM::VBIFd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1807 /* vbif */, ARM::VBIFq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1807 /* vbif */, ARM::VBIFd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1807 /* vbif */, ARM::VBIFq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1807 /* vbif */, ARM::VBIFd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1812 /* vbit */, ARM::VBITq, Convert__Reg1_1__Tie0__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1812 /* vbit */, ARM::VBITd, Convert__Reg1_1__Tie0__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1812 /* vbit */, ARM::VBITq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1812 /* vbit */, ARM::VBITd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1812 /* vbit */, ARM::VBITq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1812 /* vbit */, ARM::VBITd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1812 /* vbit */, ARM::VBITq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1812 /* vbit */, ARM::VBITd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1812 /* vbit */, ARM::VBITq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1812 /* vbit */, ARM::VBITd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1817 /* vbsl */, ARM::VBSLq, Convert__Reg1_1__Tie0__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1817 /* vbsl */, ARM::VBSLd, Convert__Reg1_1__Tie0__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1817 /* vbsl */, ARM::VBSLq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1817 /* vbsl */, ARM::VBSLd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1817 /* vbsl */, ARM::VBSLq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1817 /* vbsl */, ARM::VBSLd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1817 /* vbsl */, ARM::VBSLq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1817 /* vbsl */, ARM::VBSLd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1817 /* vbsl */, ARM::VBSLq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1817 /* vbsl */, ARM::VBSLd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1822 /* vceq */, ARM::VCEQzv4f32, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK__35_0 }, }, + { 1822 /* vceq */, ARM::VCEQfq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 1822 /* vceq */, ARM::VCEQzv2f32, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK__35_0 }, }, + { 1822 /* vceq */, ARM::VCEQfd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 1822 /* vceq */, ARM::VCEQzv8i16, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK__35_0 }, }, + { 1822 /* vceq */, ARM::VCEQv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_QPR }, }, + { 1822 /* vceq */, ARM::VCEQzv4i16, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK__35_0 }, }, + { 1822 /* vceq */, ARM::VCEQv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_DPR }, }, + { 1822 /* vceq */, ARM::VCEQzv4i32, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK__35_0 }, }, + { 1822 /* vceq */, ARM::VCEQv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_QPR }, }, + { 1822 /* vceq */, ARM::VCEQzv2i32, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK__35_0 }, }, + { 1822 /* vceq */, ARM::VCEQv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_DPR }, }, + { 1822 /* vceq */, ARM::VCEQzv16i8, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_QPR, MCK__35_0 }, }, + { 1822 /* vceq */, ARM::VCEQv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_QPR, MCK_QPR }, }, + { 1822 /* vceq */, ARM::VCEQzv8i8, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_DPR, MCK__35_0 }, }, + { 1822 /* vceq */, ARM::VCEQv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_DPR, MCK_DPR }, }, + { 1822 /* vceq */, ARM::VCEQzv8f16, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK__35_0 }, }, + { 1822 /* vceq */, ARM::VCEQhq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 1822 /* vceq */, ARM::VCEQzv4f16, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK__35_0 }, }, + { 1822 /* vceq */, ARM::VCEQhd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 1822 /* vceq */, ARM::VCEQzv4f32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1822 /* vceq */, ARM::VCEQfq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1822 /* vceq */, ARM::VCEQzv2f32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1822 /* vceq */, ARM::VCEQfd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1822 /* vceq */, ARM::VCEQzv8i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1822 /* vceq */, ARM::VCEQv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1822 /* vceq */, ARM::VCEQzv4i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1822 /* vceq */, ARM::VCEQv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1822 /* vceq */, ARM::VCEQzv4i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1822 /* vceq */, ARM::VCEQv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1822 /* vceq */, ARM::VCEQzv2i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1822 /* vceq */, ARM::VCEQv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1822 /* vceq */, ARM::VCEQzv16i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1822 /* vceq */, ARM::VCEQv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1822 /* vceq */, ARM::VCEQzv8i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1822 /* vceq */, ARM::VCEQv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1822 /* vceq */, ARM::VCEQzv8f16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1822 /* vceq */, ARM::VCEQhq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1822 /* vceq */, ARM::VCEQzv4f16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1822 /* vceq */, ARM::VCEQhd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1827 /* vcge */, ARM::VCGEzv8i16, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK__35_0 }, }, + { 1827 /* vcge */, ARM::VCGEsv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 1827 /* vcge */, ARM::VCGEzv4i16, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK__35_0 }, }, + { 1827 /* vcge */, ARM::VCGEsv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 1827 /* vcge */, ARM::VCGEzv4i32, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK__35_0 }, }, + { 1827 /* vcge */, ARM::VCGEsv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 1827 /* vcge */, ARM::VCGEzv2i32, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK__35_0 }, }, + { 1827 /* vcge */, ARM::VCGEsv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 1827 /* vcge */, ARM::VCGEzv16i8, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK__35_0 }, }, + { 1827 /* vcge */, ARM::VCGEsv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR }, }, + { 1827 /* vcge */, ARM::VCGEzv8i8, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK__35_0 }, }, + { 1827 /* vcge */, ARM::VCGEsv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR }, }, + { 1827 /* vcge */, ARM::VCGEuv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR }, }, + { 1827 /* vcge */, ARM::VCGEuv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR }, }, + { 1827 /* vcge */, ARM::VCGEuv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR }, }, + { 1827 /* vcge */, ARM::VCGEuv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR }, }, + { 1827 /* vcge */, ARM::VCGEuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, }, + { 1827 /* vcge */, ARM::VCGEuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, }, + { 1827 /* vcge */, ARM::VCGEzv4f32, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK__35_0 }, }, + { 1827 /* vcge */, ARM::VCGEfq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 1827 /* vcge */, ARM::VCGEzv2f32, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK__35_0 }, }, + { 1827 /* vcge */, ARM::VCGEfd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 1827 /* vcge */, ARM::VCGEzv8f16, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK__35_0 }, }, + { 1827 /* vcge */, ARM::VCGEhq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 1827 /* vcge */, ARM::VCGEzv4f16, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK__35_0 }, }, + { 1827 /* vcge */, ARM::VCGEhd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 1827 /* vcge */, ARM::VCGEzv8i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1827 /* vcge */, ARM::VCGEsv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1827 /* vcge */, ARM::VCGEzv4i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1827 /* vcge */, ARM::VCGEsv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1827 /* vcge */, ARM::VCGEzv4i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1827 /* vcge */, ARM::VCGEsv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1827 /* vcge */, ARM::VCGEzv2i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1827 /* vcge */, ARM::VCGEsv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1827 /* vcge */, ARM::VCGEzv16i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1827 /* vcge */, ARM::VCGEsv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1827 /* vcge */, ARM::VCGEzv8i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1827 /* vcge */, ARM::VCGEsv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1827 /* vcge */, ARM::VCGEuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1827 /* vcge */, ARM::VCGEuv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1827 /* vcge */, ARM::VCGEuv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1827 /* vcge */, ARM::VCGEuv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1827 /* vcge */, ARM::VCGEuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1827 /* vcge */, ARM::VCGEuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1827 /* vcge */, ARM::VCGEzv4f32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1827 /* vcge */, ARM::VCGEfq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1827 /* vcge */, ARM::VCGEzv2f32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1827 /* vcge */, ARM::VCGEfd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1827 /* vcge */, ARM::VCGEzv8f16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1827 /* vcge */, ARM::VCGEhq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1827 /* vcge */, ARM::VCGEzv4f16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1827 /* vcge */, ARM::VCGEhd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1832 /* vcgt */, ARM::VCGTzv8i16, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK__35_0 }, }, + { 1832 /* vcgt */, ARM::VCGTsv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 1832 /* vcgt */, ARM::VCGTzv4i16, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK__35_0 }, }, + { 1832 /* vcgt */, ARM::VCGTsv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 1832 /* vcgt */, ARM::VCGTzv4i32, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK__35_0 }, }, + { 1832 /* vcgt */, ARM::VCGTsv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 1832 /* vcgt */, ARM::VCGTzv2i32, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK__35_0 }, }, + { 1832 /* vcgt */, ARM::VCGTsv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 1832 /* vcgt */, ARM::VCGTzv16i8, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK__35_0 }, }, + { 1832 /* vcgt */, ARM::VCGTsv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR }, }, + { 1832 /* vcgt */, ARM::VCGTzv8i8, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK__35_0 }, }, + { 1832 /* vcgt */, ARM::VCGTsv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR }, }, + { 1832 /* vcgt */, ARM::VCGTuv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR }, }, + { 1832 /* vcgt */, ARM::VCGTuv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR }, }, + { 1832 /* vcgt */, ARM::VCGTuv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR }, }, + { 1832 /* vcgt */, ARM::VCGTuv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR }, }, + { 1832 /* vcgt */, ARM::VCGTuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, }, + { 1832 /* vcgt */, ARM::VCGTuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, }, + { 1832 /* vcgt */, ARM::VCGTzv4f32, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK__35_0 }, }, + { 1832 /* vcgt */, ARM::VCGTfq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 1832 /* vcgt */, ARM::VCGTzv2f32, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK__35_0 }, }, + { 1832 /* vcgt */, ARM::VCGTfd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 1832 /* vcgt */, ARM::VCGTzv8f16, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK__35_0 }, }, + { 1832 /* vcgt */, ARM::VCGThq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 1832 /* vcgt */, ARM::VCGTzv4f16, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK__35_0 }, }, + { 1832 /* vcgt */, ARM::VCGThd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 1832 /* vcgt */, ARM::VCGTzv8i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1832 /* vcgt */, ARM::VCGTsv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1832 /* vcgt */, ARM::VCGTzv4i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1832 /* vcgt */, ARM::VCGTsv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1832 /* vcgt */, ARM::VCGTzv4i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1832 /* vcgt */, ARM::VCGTsv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1832 /* vcgt */, ARM::VCGTzv2i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1832 /* vcgt */, ARM::VCGTsv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1832 /* vcgt */, ARM::VCGTzv16i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1832 /* vcgt */, ARM::VCGTsv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1832 /* vcgt */, ARM::VCGTzv8i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1832 /* vcgt */, ARM::VCGTsv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1832 /* vcgt */, ARM::VCGTuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1832 /* vcgt */, ARM::VCGTuv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1832 /* vcgt */, ARM::VCGTuv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1832 /* vcgt */, ARM::VCGTuv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1832 /* vcgt */, ARM::VCGTuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1832 /* vcgt */, ARM::VCGTuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1832 /* vcgt */, ARM::VCGTzv4f32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1832 /* vcgt */, ARM::VCGTfq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1832 /* vcgt */, ARM::VCGTzv2f32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1832 /* vcgt */, ARM::VCGTfd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1832 /* vcgt */, ARM::VCGTzv8f16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1832 /* vcgt */, ARM::VCGThq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1832 /* vcgt */, ARM::VCGTzv4f16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1832 /* vcgt */, ARM::VCGThd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1837 /* vcle */, ARM::VCLEzv8i16, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK__35_0 }, }, + { 1837 /* vcle */, ARM::VCLEzv4i16, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK__35_0 }, }, + { 1837 /* vcle */, ARM::VCLEzv4i32, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK__35_0 }, }, + { 1837 /* vcle */, ARM::VCLEzv2i32, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK__35_0 }, }, + { 1837 /* vcle */, ARM::VCLEzv16i8, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK__35_0 }, }, + { 1837 /* vcle */, ARM::VCLEzv8i8, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK__35_0 }, }, + { 1837 /* vcle */, ARM::VCLEzv4f32, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK__35_0 }, }, + { 1837 /* vcle */, ARM::VCLEzv2f32, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK__35_0 }, }, + { 1837 /* vcle */, ARM::VCLEzv8f16, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK__35_0 }, }, + { 1837 /* vcle */, ARM::VCLEzv4f16, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK__35_0 }, }, + { 1837 /* vcle */, ARM::VCLEzv8i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1837 /* vcle */, ARM::VCGEsv8i16, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1837 /* vcle */, ARM::VCLEzv4i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1837 /* vcle */, ARM::VCGEsv4i16, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1837 /* vcle */, ARM::VCLEzv4i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1837 /* vcle */, ARM::VCGEsv4i32, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1837 /* vcle */, ARM::VCLEzv2i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1837 /* vcle */, ARM::VCGEsv2i32, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1837 /* vcle */, ARM::VCLEzv16i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1837 /* vcle */, ARM::VCGEsv16i8, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1837 /* vcle */, ARM::VCLEzv8i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1837 /* vcle */, ARM::VCGEsv8i8, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1837 /* vcle */, ARM::VCGEuv8i16, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1837 /* vcle */, ARM::VCGEuv4i16, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1837 /* vcle */, ARM::VCGEuv4i32, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1837 /* vcle */, ARM::VCGEuv2i32, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1837 /* vcle */, ARM::VCGEuv16i8, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1837 /* vcle */, ARM::VCGEuv8i8, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1837 /* vcle */, ARM::VCLEzv4f32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1837 /* vcle */, ARM::VCGEfq, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1837 /* vcle */, ARM::VCLEzv2f32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1837 /* vcle */, ARM::VCGEfd, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1837 /* vcle */, ARM::VCLEzv8f16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1837 /* vcle */, ARM::VCGEhq, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1837 /* vcle */, ARM::VCLEzv4f16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1837 /* vcle */, ARM::VCGEhd, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1842 /* vcls */, ARM::VCLSv8i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 1842 /* vcls */, ARM::VCLSv4i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 1842 /* vcls */, ARM::VCLSv4i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 1842 /* vcls */, ARM::VCLSv2i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 1842 /* vcls */, ARM::VCLSv16i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR }, }, + { 1842 /* vcls */, ARM::VCLSv8i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR }, }, + { 1847 /* vclt */, ARM::VCLTzv8i16, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK__35_0 }, }, + { 1847 /* vclt */, ARM::VCLTzv4i16, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK__35_0 }, }, + { 1847 /* vclt */, ARM::VCLTzv4i32, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK__35_0 }, }, + { 1847 /* vclt */, ARM::VCLTzv2i32, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK__35_0 }, }, + { 1847 /* vclt */, ARM::VCLTzv16i8, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK__35_0 }, }, + { 1847 /* vclt */, ARM::VCLTzv8i8, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK__35_0 }, }, + { 1847 /* vclt */, ARM::VCLTzv4f32, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK__35_0 }, }, + { 1847 /* vclt */, ARM::VCLTzv2f32, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK__35_0 }, }, + { 1847 /* vclt */, ARM::VCLTzv8f16, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK__35_0 }, }, + { 1847 /* vclt */, ARM::VCLTzv4f16, Convert__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK__35_0 }, }, + { 1847 /* vclt */, ARM::VCLTzv8i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1847 /* vclt */, ARM::VCGTsv8i16, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1847 /* vclt */, ARM::VCLTzv4i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1847 /* vclt */, ARM::VCGTsv4i16, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1847 /* vclt */, ARM::VCLTzv4i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1847 /* vclt */, ARM::VCGTsv4i32, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1847 /* vclt */, ARM::VCLTzv2i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1847 /* vclt */, ARM::VCGTsv2i32, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1847 /* vclt */, ARM::VCLTzv16i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1847 /* vclt */, ARM::VCGTsv16i8, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1847 /* vclt */, ARM::VCLTzv8i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1847 /* vclt */, ARM::VCGTsv8i8, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1847 /* vclt */, ARM::VCGTuv8i16, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1847 /* vclt */, ARM::VCGTuv4i16, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1847 /* vclt */, ARM::VCGTuv4i32, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1847 /* vclt */, ARM::VCGTuv2i32, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1847 /* vclt */, ARM::VCGTuv16i8, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1847 /* vclt */, ARM::VCGTuv8i8, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1847 /* vclt */, ARM::VCLTzv4f32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1847 /* vclt */, ARM::VCGTfq, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1847 /* vclt */, ARM::VCLTzv2f32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1847 /* vclt */, ARM::VCGTfd, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1847 /* vclt */, ARM::VCLTzv8f16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1847 /* vclt */, ARM::VCGThq, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1847 /* vclt */, ARM::VCLTzv4f16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1847 /* vclt */, ARM::VCGThd, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1852 /* vclz */, ARM::VCLZv8i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_QPR }, }, + { 1852 /* vclz */, ARM::VCLZv4i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_DPR }, }, + { 1852 /* vclz */, ARM::VCLZv4i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_QPR }, }, + { 1852 /* vclz */, ARM::VCLZv2i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_DPR }, }, + { 1852 /* vclz */, ARM::VCLZv16i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_QPR, MCK_QPR }, }, + { 1852 /* vclz */, ARM::VCLZv8i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_DPR, MCK_DPR }, }, + { 1857 /* vcmp */, ARM::VCMPZS, Convert__Reg1_2__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK__35_0 }, }, + { 1857 /* vcmp */, ARM::VCMPS, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 1857 /* vcmp */, ARM::VCMPZD, Convert__Reg1_2__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK__35_0 }, }, + { 1857 /* vcmp */, ARM::VCMPD, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 1857 /* vcmp */, ARM::VCMPZH, Convert__Reg1_2__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK__35_0 }, }, + { 1857 /* vcmp */, ARM::VCMPH, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 1862 /* vcmpe */, ARM::VCMPEZS, Convert__Reg1_2__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK__35_0 }, }, + { 1862 /* vcmpe */, ARM::VCMPES, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 1862 /* vcmpe */, ARM::VCMPEZD, Convert__Reg1_2__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK__35_0 }, }, + { 1862 /* vcmpe */, ARM::VCMPED, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 1862 /* vcmpe */, ARM::VCMPEZH, Convert__Reg1_2__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK__35_0 }, }, + { 1862 /* vcmpe */, ARM::VCMPEH, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 1868 /* vcnt */, ARM::VCNTq, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR }, }, + { 1868 /* vcnt */, ARM::VCNTd, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR }, }, + { 1873 /* vcvt */, ARM::VCVTh2sq, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_s16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 1873 /* vcvt */, ARM::VCVTh2sd, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_s16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 1873 /* vcvt */, ARM::VCVTf2sq, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 1873 /* vcvt */, ARM::VCVTf2sd, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 1873 /* vcvt */, ARM::VTOSIZS, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_s32, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 1873 /* vcvt */, ARM::VTOSIZD, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_s32, MCK__DOT_f64, MCK_SPR, MCK_DPR }, }, + { 1873 /* vcvt */, ARM::VTOSIZH, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_s32, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 1873 /* vcvt */, ARM::VCVTh2uq, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_u16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 1873 /* vcvt */, ARM::VCVTh2ud, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_u16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 1873 /* vcvt */, ARM::VCVTf2uq, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 1873 /* vcvt */, ARM::VCVTf2ud, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 1873 /* vcvt */, ARM::VTOUIZS, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_u32, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 1873 /* vcvt */, ARM::VTOUIZD, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_u32, MCK__DOT_f64, MCK_SPR, MCK_DPR }, }, + { 1873 /* vcvt */, ARM::VTOUIZH, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_u32, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 1873 /* vcvt */, ARM::VCVTs2fq, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 1873 /* vcvt */, ARM::VCVTs2fd, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 1873 /* vcvt */, ARM::VSITOS, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_s32, MCK_SPR, MCK_SPR }, }, + { 1873 /* vcvt */, ARM::VCVTu2fq, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_u32, MCK_QPR, MCK_QPR }, }, + { 1873 /* vcvt */, ARM::VCVTu2fd, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_u32, MCK_DPR, MCK_DPR }, }, + { 1873 /* vcvt */, ARM::VUITOS, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_u32, MCK_SPR, MCK_SPR }, }, + { 1873 /* vcvt */, ARM::VCVTSD, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_f64, MCK_SPR, MCK_DPR }, }, + { 1873 /* vcvt */, ARM::VCVTh2f, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFP16, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_f16, MCK_QPR, MCK_DPR }, }, + { 1873 /* vcvt */, ARM::VSITOD, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK__DOT_s32, MCK_DPR, MCK_SPR }, }, + { 1873 /* vcvt */, ARM::VUITOD, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK__DOT_u32, MCK_DPR, MCK_SPR }, }, + { 1873 /* vcvt */, ARM::VCVTDS, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK__DOT_f32, MCK_DPR, MCK_SPR }, }, + { 1873 /* vcvt */, ARM::VCVTs2hq, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 1873 /* vcvt */, ARM::VCVTs2hd, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 1873 /* vcvt */, ARM::VSITOH, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_s32, MCK_SPR, MCK_SPR }, }, + { 1873 /* vcvt */, ARM::VCVTu2hq, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_u16, MCK_QPR, MCK_QPR }, }, + { 1873 /* vcvt */, ARM::VCVTu2hd, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_u16, MCK_DPR, MCK_DPR }, }, + { 1873 /* vcvt */, ARM::VUITOH, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_u32, MCK_SPR, MCK_SPR }, }, + { 1873 /* vcvt */, ARM::VCVTf2h, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFP16, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_f32, MCK_DPR, MCK_QPR }, }, + { 1873 /* vcvt */, ARM::VTOSHS, Convert__Reg1_3__Tie0__FBits161_5__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_s16, MCK__DOT_f32, MCK_SPR, MCK_SPR, MCK_FBits16 }, }, + { 1873 /* vcvt */, ARM::VTOSHD, Convert__Reg1_3__Tie0__FBits161_5__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_s16, MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_FBits16 }, }, + { 1873 /* vcvt */, ARM::VCVTh2sq, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1873 /* vcvt */, ARM::VCVTh2xsq, Convert__Reg1_3__Reg1_4__Imm1_5__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_s16, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 1873 /* vcvt */, ARM::VCVTh2sd, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1873 /* vcvt */, ARM::VCVTh2xsd, Convert__Reg1_3__Reg1_4__Imm1_5__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_s16, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 1873 /* vcvt */, ARM::VTOSHH, Convert__Reg1_3__Tie0__FBits161_5__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_s16, MCK__DOT_f16, MCK_SPR, MCK_SPR, MCK_FBits16 }, }, + { 1873 /* vcvt */, ARM::VCVTf2sq, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1873 /* vcvt */, ARM::VCVTf2xsq, Convert__Reg1_3__Reg1_4__Imm1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 1873 /* vcvt */, ARM::VCVTf2sd, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1873 /* vcvt */, ARM::VCVTf2xsd, Convert__Reg1_3__Reg1_4__Imm1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 1873 /* vcvt */, ARM::VTOSLS, Convert__Reg1_3__Tie0__FBits321_5__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_s32, MCK__DOT_f32, MCK_SPR, MCK_SPR, MCK_FBits32 }, }, + { 1873 /* vcvt */, ARM::VTOSLD, Convert__Reg1_3__Tie0__FBits321_5__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_s32, MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_FBits32 }, }, + { 1873 /* vcvt */, ARM::VTOSLH, Convert__Reg1_3__Tie0__FBits321_5__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_s32, MCK__DOT_f16, MCK_SPR, MCK_SPR, MCK_FBits32 }, }, + { 1873 /* vcvt */, ARM::VTOUHS, Convert__Reg1_3__Tie0__FBits161_5__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_u16, MCK__DOT_f32, MCK_SPR, MCK_SPR, MCK_FBits16 }, }, + { 1873 /* vcvt */, ARM::VTOUHD, Convert__Reg1_3__Tie0__FBits161_5__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_u16, MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_FBits16 }, }, + { 1873 /* vcvt */, ARM::VCVTh2uq, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1873 /* vcvt */, ARM::VCVTh2xuq, Convert__Reg1_3__Reg1_4__Imm1_5__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_u16, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 1873 /* vcvt */, ARM::VCVTh2ud, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1873 /* vcvt */, ARM::VCVTh2xud, Convert__Reg1_3__Reg1_4__Imm1_5__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_u16, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 1873 /* vcvt */, ARM::VTOUHH, Convert__Reg1_3__Tie0__FBits161_5__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_u16, MCK__DOT_f16, MCK_SPR, MCK_SPR, MCK_FBits16 }, }, + { 1873 /* vcvt */, ARM::VCVTf2uq, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1873 /* vcvt */, ARM::VCVTf2xuq, Convert__Reg1_3__Reg1_4__Imm1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 1873 /* vcvt */, ARM::VCVTf2ud, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1873 /* vcvt */, ARM::VCVTf2xud, Convert__Reg1_3__Reg1_4__Imm1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 1873 /* vcvt */, ARM::VTOULS, Convert__Reg1_3__Tie0__FBits321_5__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_u32, MCK__DOT_f32, MCK_SPR, MCK_SPR, MCK_FBits32 }, }, + { 1873 /* vcvt */, ARM::VTOULD, Convert__Reg1_3__Tie0__FBits321_5__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_u32, MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_FBits32 }, }, + { 1873 /* vcvt */, ARM::VTOULH, Convert__Reg1_3__Tie0__FBits321_5__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_u32, MCK__DOT_f16, MCK_SPR, MCK_SPR, MCK_FBits32 }, }, + { 1873 /* vcvt */, ARM::VSHTOS, Convert__Reg1_3__Tie0__FBits161_5__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_s16, MCK_SPR, MCK_SPR, MCK_FBits16 }, }, + { 1873 /* vcvt */, ARM::VCVTs2fq, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1873 /* vcvt */, ARM::VCVTxs2fq, Convert__Reg1_3__Reg1_4__Imm1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 1873 /* vcvt */, ARM::VCVTs2fd, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1873 /* vcvt */, ARM::VCVTxs2fd, Convert__Reg1_3__Reg1_4__Imm1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 1873 /* vcvt */, ARM::VSLTOS, Convert__Reg1_3__Tie0__FBits321_5__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_s32, MCK_SPR, MCK_SPR, MCK_FBits32 }, }, + { 1873 /* vcvt */, ARM::VUHTOS, Convert__Reg1_3__Tie0__FBits161_5__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_u16, MCK_SPR, MCK_SPR, MCK_FBits16 }, }, + { 1873 /* vcvt */, ARM::VCVTu2fq, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1873 /* vcvt */, ARM::VCVTxu2fq, Convert__Reg1_3__Reg1_4__Imm1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 1873 /* vcvt */, ARM::VCVTu2fd, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1873 /* vcvt */, ARM::VCVTxu2fd, Convert__Reg1_3__Reg1_4__Imm1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 1873 /* vcvt */, ARM::VULTOS, Convert__Reg1_3__Tie0__FBits321_5__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_u32, MCK_SPR, MCK_SPR, MCK_FBits32 }, }, + { 1873 /* vcvt */, ARM::VSHTOD, Convert__Reg1_3__Tie0__FBits161_5__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_FBits16 }, }, + { 1873 /* vcvt */, ARM::VSLTOD, Convert__Reg1_3__Tie0__FBits321_5__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_FBits32 }, }, + { 1873 /* vcvt */, ARM::VUHTOD, Convert__Reg1_3__Tie0__FBits161_5__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_FBits16 }, }, + { 1873 /* vcvt */, ARM::VULTOD, Convert__Reg1_3__Tie0__FBits321_5__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_FBits32 }, }, + { 1873 /* vcvt */, ARM::VCVTs2hq, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1873 /* vcvt */, ARM::VCVTxs2hq, Convert__Reg1_3__Reg1_4__Imm1_5__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 1873 /* vcvt */, ARM::VCVTs2hd, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1873 /* vcvt */, ARM::VCVTxs2hd, Convert__Reg1_3__Reg1_4__Imm1_5__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 1873 /* vcvt */, ARM::VSHTOH, Convert__Reg1_3__Tie0__FBits161_5__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_s16, MCK_SPR, MCK_SPR, MCK_FBits16 }, }, + { 1873 /* vcvt */, ARM::VSLTOH, Convert__Reg1_3__Tie0__FBits321_5__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_s32, MCK_SPR, MCK_SPR, MCK_FBits32 }, }, + { 1873 /* vcvt */, ARM::VCVTu2hq, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK__35_0 }, }, + { 1873 /* vcvt */, ARM::VCVTxu2hq, Convert__Reg1_3__Reg1_4__Imm1_5__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 1873 /* vcvt */, ARM::VCVTu2hd, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK__35_0 }, }, + { 1873 /* vcvt */, ARM::VCVTxu2hd, Convert__Reg1_3__Reg1_4__Imm1_5__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 1873 /* vcvt */, ARM::VUHTOH, Convert__Reg1_3__Tie0__FBits161_5__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_u16, MCK_SPR, MCK_SPR, MCK_FBits16 }, }, + { 1873 /* vcvt */, ARM::VULTOH, Convert__Reg1_3__Tie0__FBits321_5__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_u32, MCK_SPR, MCK_SPR, MCK_FBits32 }, }, + { 1878 /* vcvta */, ARM::VCVTANSQh, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_s16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 1878 /* vcvta */, ARM::VCVTANSDh, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_s16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 1878 /* vcvta */, ARM::VCVTANSQf, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON, { MCK__DOT_s32, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 1878 /* vcvta */, ARM::VCVTANSDf, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON, { MCK__DOT_s32, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 1878 /* vcvta */, ARM::VCVTASS, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK__DOT_s32, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 1878 /* vcvta */, ARM::VCVTASD, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK__DOT_s32, MCK__DOT_f64, MCK_SPR, MCK_DPR }, }, + { 1878 /* vcvta */, ARM::VCVTASH, Convert__Reg1_2__Reg1_3, Feature_HasFullFP16, { MCK__DOT_s32, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 1878 /* vcvta */, ARM::VCVTANUQh, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_u16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 1878 /* vcvta */, ARM::VCVTANUDh, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_u16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 1878 /* vcvta */, ARM::VCVTANUQf, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON, { MCK__DOT_u32, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 1878 /* vcvta */, ARM::VCVTANUDf, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON, { MCK__DOT_u32, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 1878 /* vcvta */, ARM::VCVTAUS, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK__DOT_u32, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 1878 /* vcvta */, ARM::VCVTAUD, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK__DOT_u32, MCK__DOT_f64, MCK_SPR, MCK_DPR }, }, + { 1878 /* vcvta */, ARM::VCVTAUH, Convert__Reg1_2__Reg1_3, Feature_HasFullFP16, { MCK__DOT_u32, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 1884 /* vcvtb */, ARM::VCVTBHS, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFP16, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 1884 /* vcvtb */, ARM::VCVTBHD, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK__DOT_f16, MCK_DPR, MCK_SPR }, }, + { 1884 /* vcvtb */, ARM::VCVTBSH, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFP16, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 1884 /* vcvtb */, ARM::VCVTBDH, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_f64, MCK_SPR, MCK_DPR }, }, + { 1890 /* vcvtm */, ARM::VCVTMNSQh, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_s16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 1890 /* vcvtm */, ARM::VCVTMNSDh, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_s16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 1890 /* vcvtm */, ARM::VCVTMNSQf, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON, { MCK__DOT_s32, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 1890 /* vcvtm */, ARM::VCVTMNSDf, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON, { MCK__DOT_s32, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 1890 /* vcvtm */, ARM::VCVTMSS, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK__DOT_s32, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 1890 /* vcvtm */, ARM::VCVTMSD, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK__DOT_s32, MCK__DOT_f64, MCK_SPR, MCK_DPR }, }, + { 1890 /* vcvtm */, ARM::VCVTMSH, Convert__Reg1_2__Reg1_3, Feature_HasFullFP16, { MCK__DOT_s32, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 1890 /* vcvtm */, ARM::VCVTMNUQh, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_u16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 1890 /* vcvtm */, ARM::VCVTMNUDh, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_u16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 1890 /* vcvtm */, ARM::VCVTMNUQf, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON, { MCK__DOT_u32, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 1890 /* vcvtm */, ARM::VCVTMNUDf, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON, { MCK__DOT_u32, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 1890 /* vcvtm */, ARM::VCVTMUS, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK__DOT_u32, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 1890 /* vcvtm */, ARM::VCVTMUD, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK__DOT_u32, MCK__DOT_f64, MCK_SPR, MCK_DPR }, }, + { 1890 /* vcvtm */, ARM::VCVTMUH, Convert__Reg1_2__Reg1_3, Feature_HasFullFP16, { MCK__DOT_u32, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 1896 /* vcvtn */, ARM::VCVTNNSQh, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_s16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 1896 /* vcvtn */, ARM::VCVTNNSDh, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_s16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 1896 /* vcvtn */, ARM::VCVTNNSQf, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON, { MCK__DOT_s32, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 1896 /* vcvtn */, ARM::VCVTNNSDf, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON, { MCK__DOT_s32, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 1896 /* vcvtn */, ARM::VCVTNSS, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK__DOT_s32, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 1896 /* vcvtn */, ARM::VCVTNSD, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK__DOT_s32, MCK__DOT_f64, MCK_SPR, MCK_DPR }, }, + { 1896 /* vcvtn */, ARM::VCVTNSH, Convert__Reg1_2__Reg1_3, Feature_HasFullFP16, { MCK__DOT_s32, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 1896 /* vcvtn */, ARM::VCVTNNUQh, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_u16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 1896 /* vcvtn */, ARM::VCVTNNUDh, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_u16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 1896 /* vcvtn */, ARM::VCVTNNUQf, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON, { MCK__DOT_u32, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 1896 /* vcvtn */, ARM::VCVTNNUDf, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON, { MCK__DOT_u32, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 1896 /* vcvtn */, ARM::VCVTNUS, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK__DOT_u32, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 1896 /* vcvtn */, ARM::VCVTNUD, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK__DOT_u32, MCK__DOT_f64, MCK_SPR, MCK_DPR }, }, + { 1896 /* vcvtn */, ARM::VCVTNUH, Convert__Reg1_2__Reg1_3, Feature_HasFullFP16, { MCK__DOT_u32, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 1902 /* vcvtp */, ARM::VCVTPNSQh, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_s16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 1902 /* vcvtp */, ARM::VCVTPNSDh, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_s16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 1902 /* vcvtp */, ARM::VCVTPNSQf, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON, { MCK__DOT_s32, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 1902 /* vcvtp */, ARM::VCVTPNSDf, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON, { MCK__DOT_s32, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 1902 /* vcvtp */, ARM::VCVTPSS, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK__DOT_s32, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 1902 /* vcvtp */, ARM::VCVTPSD, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK__DOT_s32, MCK__DOT_f64, MCK_SPR, MCK_DPR }, }, + { 1902 /* vcvtp */, ARM::VCVTPSH, Convert__Reg1_2__Reg1_3, Feature_HasFullFP16, { MCK__DOT_s32, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 1902 /* vcvtp */, ARM::VCVTPNUQh, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_u16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 1902 /* vcvtp */, ARM::VCVTPNUDh, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_u16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 1902 /* vcvtp */, ARM::VCVTPNUQf, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON, { MCK__DOT_u32, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 1902 /* vcvtp */, ARM::VCVTPNUDf, Convert__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON, { MCK__DOT_u32, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 1902 /* vcvtp */, ARM::VCVTPUS, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK__DOT_u32, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 1902 /* vcvtp */, ARM::VCVTPUD, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK__DOT_u32, MCK__DOT_f64, MCK_SPR, MCK_DPR }, }, + { 1902 /* vcvtp */, ARM::VCVTPUH, Convert__Reg1_2__Reg1_3, Feature_HasFullFP16, { MCK__DOT_u32, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 1908 /* vcvtr */, ARM::VTOSIRS, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_s32, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 1908 /* vcvtr */, ARM::VTOSIRD, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_s32, MCK__DOT_f64, MCK_SPR, MCK_DPR }, }, + { 1908 /* vcvtr */, ARM::VTOSIRH, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_s32, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 1908 /* vcvtr */, ARM::VTOUIRS, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_u32, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 1908 /* vcvtr */, ARM::VTOUIRD, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_u32, MCK__DOT_f64, MCK_SPR, MCK_DPR }, }, + { 1908 /* vcvtr */, ARM::VTOUIRH, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_u32, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 1914 /* vcvtt */, ARM::VCVTTHS, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFP16, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 1914 /* vcvtt */, ARM::VCVTTHD, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK__DOT_f16, MCK_DPR, MCK_SPR }, }, + { 1914 /* vcvtt */, ARM::VCVTTSH, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFP16, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 1914 /* vcvtt */, ARM::VCVTTDH, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_f64, MCK_SPR, MCK_DPR }, }, + { 1920 /* vdiv */, ARM::VDIVS, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 1920 /* vdiv */, ARM::VDIVD, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 1920 /* vdiv */, ARM::VDIVH, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 1920 /* vdiv */, ARM::VDIVS, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 1920 /* vdiv */, ARM::VDIVD, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1920 /* vdiv */, ARM::VDIVH, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 1925 /* vdup */, ARM::VDUP16q, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_GPR }, }, + { 1925 /* vdup */, ARM::VDUP16d, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_GPR }, }, + { 1925 /* vdup */, ARM::VDUP32q, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_GPR }, }, + { 1925 /* vdup */, ARM::VDUP32d, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_GPR }, }, + { 1925 /* vdup */, ARM::VDUP8q, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_GPR }, }, + { 1925 /* vdup */, ARM::VDUP8d, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_GPR }, }, + { 1925 /* vdup */, ARM::VDUPLN16q, Convert__Reg1_2__Reg1_3__VectorIndex161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_DPR, MCK_VectorIndex16 }, }, + { 1925 /* vdup */, ARM::VDUPLN16d, Convert__Reg1_2__Reg1_3__VectorIndex161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR, MCK_VectorIndex16 }, }, + { 1925 /* vdup */, ARM::VDUPLN32q, Convert__Reg1_2__Reg1_3__VectorIndex321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_DPR, MCK_VectorIndex32 }, }, + { 1925 /* vdup */, ARM::VDUPLN32d, Convert__Reg1_2__Reg1_3__VectorIndex321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR, MCK_VectorIndex32 }, }, + { 1925 /* vdup */, ARM::VDUPLN8q, Convert__Reg1_2__Reg1_3__VectorIndex81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_DPR, MCK_VectorIndex8 }, }, + { 1925 /* vdup */, ARM::VDUPLN8d, Convert__Reg1_2__Reg1_3__VectorIndex81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR, MCK_VectorIndex8 }, }, + { 1930 /* veor */, ARM::VEORq, Convert__Reg1_1__Reg1_1__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_QPR, MCK_QPR }, }, + { 1930 /* veor */, ARM::VEORd, Convert__Reg1_1__Reg1_1__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_DPR, MCK_DPR }, }, + { 1930 /* veor */, ARM::VEORq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR }, }, + { 1930 /* veor */, ARM::VEORd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR }, }, + { 1930 /* veor */, ARM::VEORq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_QPR }, }, + { 1930 /* veor */, ARM::VEORd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR }, }, + { 1930 /* veor */, ARM::VEORq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_QPR, MCK_QPR }, }, + { 1930 /* veor */, ARM::VEORd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_DPR, MCK_DPR }, }, + { 1930 /* veor */, ARM::VEORq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR }, }, + { 1930 /* veor */, ARM::VEORd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR }, }, + { 1930 /* veor */, ARM::VEORq, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1930 /* veor */, ARM::VEORd, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1930 /* veor */, ARM::VEORq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1930 /* veor */, ARM::VEORd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1930 /* veor */, ARM::VEORq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1930 /* veor */, ARM::VEORd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1930 /* veor */, ARM::VEORq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1930 /* veor */, ARM::VEORd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1930 /* veor */, ARM::VEORq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1930 /* veor */, ARM::VEORd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1935 /* vext */, ARM::VEXTq16, Convert__Reg1_2__Reg1_2__Reg1_3__Imm0_151_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR, MCK_Imm0_15 }, }, + { 1935 /* vext */, ARM::VEXTd16, Convert__Reg1_2__Reg1_2__Reg1_3__Imm0_31_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR, MCK_Imm0_3 }, }, + { 1935 /* vext */, ARM::VEXTq32, Convert__Reg1_2__Reg1_2__Reg1_3__Imm0_151_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_QPR, MCK_Imm0_15 }, }, + { 1935 /* vext */, ARM::VEXTd32, Convert__Reg1_2__Reg1_2__Reg1_3__Imm0_11_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR, MCK_Imm0_1 }, }, + { 1935 /* vext */, ARM::VEXTq64, Convert__Reg1_2__Reg1_2__Reg1_3__Imm0_151_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_QPR, MCK_QPR, MCK_Imm0_15 }, }, + { 1935 /* vext */, ARM::VEXTq8, Convert__Reg1_2__Reg1_2__Reg1_3__Imm0_151_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR, MCK_Imm0_15 }, }, + { 1935 /* vext */, ARM::VEXTd8, Convert__Reg1_2__Reg1_2__Reg1_3__Imm0_71_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR, MCK_Imm0_7 }, }, + { 1935 /* vext */, ARM::VEXTq16, Convert__Reg1_2__Reg1_3__Reg1_4__Imm0_151_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR, MCK_QPR, MCK_Imm0_15 }, }, + { 1935 /* vext */, ARM::VEXTd16, Convert__Reg1_2__Reg1_3__Reg1_4__Imm0_31_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR, MCK_DPR, MCK_Imm0_3 }, }, + { 1935 /* vext */, ARM::VEXTq32, Convert__Reg1_2__Reg1_3__Reg1_4__Imm0_151_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_QPR, MCK_QPR, MCK_Imm0_15 }, }, + { 1935 /* vext */, ARM::VEXTd32, Convert__Reg1_2__Reg1_3__Reg1_4__Imm0_11_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR, MCK_DPR, MCK_Imm0_1 }, }, + { 1935 /* vext */, ARM::VEXTq64, Convert__Reg1_2__Reg1_3__Reg1_4__Imm0_151_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_QPR, MCK_QPR, MCK_QPR, MCK_Imm0_15 }, }, + { 1935 /* vext */, ARM::VEXTq8, Convert__Reg1_2__Reg1_3__Reg1_4__Imm0_151_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR, MCK_QPR, MCK_Imm0_15 }, }, + { 1935 /* vext */, ARM::VEXTd8, Convert__Reg1_2__Reg1_3__Reg1_4__Imm0_71_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR, MCK_DPR, MCK_Imm0_7 }, }, + { 1940 /* vfma */, ARM::VFMAfq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasVFP4, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1940 /* vfma */, ARM::VFMAfd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasVFP4, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1940 /* vfma */, ARM::VFMAS, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP4, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 1940 /* vfma */, ARM::VFMAD, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP4|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1940 /* vfma */, ARM::VFMAhq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1940 /* vfma */, ARM::VFMAhd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1940 /* vfma */, ARM::VFMAH, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 1945 /* vfms */, ARM::VFMSfq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasVFP4, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1945 /* vfms */, ARM::VFMSfd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasVFP4, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1945 /* vfms */, ARM::VFMSS, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP4, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 1945 /* vfms */, ARM::VFMSD, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP4|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1945 /* vfms */, ARM::VFMShq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1945 /* vfms */, ARM::VFMShd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1945 /* vfms */, ARM::VFMSH, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 1950 /* vfnma */, ARM::VFNMAS, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP4, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 1950 /* vfnma */, ARM::VFNMAD, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP4|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1950 /* vfnma */, ARM::VFNMAH, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 1956 /* vfnms */, ARM::VFNMSS, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP4, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 1956 /* vfnms */, ARM::VFNMSD, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP4|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1956 /* vfnms */, ARM::VFNMSH, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 1962 /* vhadd */, ARM::VHADDsv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 1962 /* vhadd */, ARM::VHADDsv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 1962 /* vhadd */, ARM::VHADDsv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 1962 /* vhadd */, ARM::VHADDsv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 1962 /* vhadd */, ARM::VHADDsv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR }, }, + { 1962 /* vhadd */, ARM::VHADDsv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR }, }, + { 1962 /* vhadd */, ARM::VHADDuv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR }, }, + { 1962 /* vhadd */, ARM::VHADDuv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR }, }, + { 1962 /* vhadd */, ARM::VHADDuv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR }, }, + { 1962 /* vhadd */, ARM::VHADDuv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR }, }, + { 1962 /* vhadd */, ARM::VHADDuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, }, + { 1962 /* vhadd */, ARM::VHADDuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, }, + { 1962 /* vhadd */, ARM::VHADDsv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1962 /* vhadd */, ARM::VHADDsv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1962 /* vhadd */, ARM::VHADDsv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1962 /* vhadd */, ARM::VHADDsv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1962 /* vhadd */, ARM::VHADDsv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1962 /* vhadd */, ARM::VHADDsv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1962 /* vhadd */, ARM::VHADDuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1962 /* vhadd */, ARM::VHADDuv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1962 /* vhadd */, ARM::VHADDuv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1962 /* vhadd */, ARM::VHADDuv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1962 /* vhadd */, ARM::VHADDuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1962 /* vhadd */, ARM::VHADDuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1968 /* vhsub */, ARM::VHSUBsv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 1968 /* vhsub */, ARM::VHSUBsv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 1968 /* vhsub */, ARM::VHSUBsv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 1968 /* vhsub */, ARM::VHSUBsv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 1968 /* vhsub */, ARM::VHSUBsv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR }, }, + { 1968 /* vhsub */, ARM::VHSUBsv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR }, }, + { 1968 /* vhsub */, ARM::VHSUBuv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR }, }, + { 1968 /* vhsub */, ARM::VHSUBuv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR }, }, + { 1968 /* vhsub */, ARM::VHSUBuv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR }, }, + { 1968 /* vhsub */, ARM::VHSUBuv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR }, }, + { 1968 /* vhsub */, ARM::VHSUBuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, }, + { 1968 /* vhsub */, ARM::VHSUBuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, }, + { 1968 /* vhsub */, ARM::VHSUBsv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1968 /* vhsub */, ARM::VHSUBsv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1968 /* vhsub */, ARM::VHSUBsv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1968 /* vhsub */, ARM::VHSUBsv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1968 /* vhsub */, ARM::VHSUBsv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1968 /* vhsub */, ARM::VHSUBsv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1968 /* vhsub */, ARM::VHSUBuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1968 /* vhsub */, ARM::VHSUBuv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1968 /* vhsub */, ARM::VHSUBuv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1968 /* vhsub */, ARM::VHSUBuv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1968 /* vhsub */, ARM::VHSUBuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 1968 /* vhsub */, ARM::VHSUBuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 1974 /* vins */, ARM::VINSH, Convert__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 1979 /* vld1 */, ARM::VLD1DUPq16, Convert__VecListDPairAllLanes1_2__DupAlignedMemory162_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPairAllLanes, MCK_DupAlignedMemory16 }, }, + { 1979 /* vld1 */, ARM::VLD1q16, Convert__VecListDPair1_2__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPair, MCK_AlignedMemory64or128 }, }, + { 1979 /* vld1 */, ARM::VLD1d16Q, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourD, MCK_AlignedMemory64or128or256 }, }, + { 1979 /* vld1 */, ARM::VLD1DUPd16, Convert__VecListOneDAllLanes1_2__DupAlignedMemory162_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListOneDAllLanes, MCK_DupAlignedMemory16 }, }, + { 1979 /* vld1 */, ARM::VLD1d16, Convert__VecListOneD1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListOneD, MCK_AlignedMemory64 }, }, + { 1979 /* vld1 */, ARM::VLD1LNdAsm_16, Convert__VecListOneDHWordIndexed2_2__AlignedMemory162_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListOneDHWordIndexed, MCK_AlignedMemory16 }, }, + { 1979 /* vld1 */, ARM::VLD1d16T, Convert__VecListThreeD1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeD, MCK_AlignedMemory64 }, }, + { 1979 /* vld1 */, ARM::VLD1DUPq32, Convert__VecListDPairAllLanes1_2__DupAlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPairAllLanes, MCK_DupAlignedMemory32 }, }, + { 1979 /* vld1 */, ARM::VLD1q32, Convert__VecListDPair1_2__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPair, MCK_AlignedMemory64or128 }, }, + { 1979 /* vld1 */, ARM::VLD1d32Q, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourD, MCK_AlignedMemory64or128or256 }, }, + { 1979 /* vld1 */, ARM::VLD1DUPd32, Convert__VecListOneDAllLanes1_2__DupAlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListOneDAllLanes, MCK_DupAlignedMemory32 }, }, + { 1979 /* vld1 */, ARM::VLD1d32, Convert__VecListOneD1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListOneD, MCK_AlignedMemory64 }, }, + { 1979 /* vld1 */, ARM::VLD1LNdAsm_32, Convert__VecListOneDWordIndexed2_2__AlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListOneDWordIndexed, MCK_AlignedMemory32 }, }, + { 1979 /* vld1 */, ARM::VLD1d32T, Convert__VecListThreeD1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeD, MCK_AlignedMemory64 }, }, + { 1979 /* vld1 */, ARM::VLD1q64, Convert__VecListDPair1_2__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListDPair, MCK_AlignedMemory64or128 }, }, + { 1979 /* vld1 */, ARM::VLD1d64Q, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListFourD, MCK_AlignedMemory64or128or256 }, }, + { 1979 /* vld1 */, ARM::VLD1d64, Convert__VecListOneD1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListOneD, MCK_AlignedMemory64 }, }, + { 1979 /* vld1 */, ARM::VLD1d64T, Convert__VecListThreeD1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListThreeD, MCK_AlignedMemory64 }, }, + { 1979 /* vld1 */, ARM::VLD1DUPq8, Convert__VecListDPairAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPairAllLanes, MCK_DupAlignedMemoryNone }, }, + { 1979 /* vld1 */, ARM::VLD1q8, Convert__VecListDPair1_2__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPair, MCK_AlignedMemory64or128 }, }, + { 1979 /* vld1 */, ARM::VLD1d8Q, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourD, MCK_AlignedMemory64or128or256 }, }, + { 1979 /* vld1 */, ARM::VLD1DUPd8, Convert__VecListOneDAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListOneDAllLanes, MCK_DupAlignedMemoryNone }, }, + { 1979 /* vld1 */, ARM::VLD1d8, Convert__VecListOneD1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListOneD, MCK_AlignedMemory64 }, }, + { 1979 /* vld1 */, ARM::VLD1LNdAsm_8, Convert__VecListOneDByteIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListOneDByteIndexed, MCK_AlignedMemoryNone }, }, + { 1979 /* vld1 */, ARM::VLD1d8T, Convert__VecListThreeD1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeD, MCK_AlignedMemory64 }, }, + { 1979 /* vld1 */, ARM::VLD1DUPq16wb_fixed, Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemory162_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPairAllLanes, MCK_DupAlignedMemory16, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1DUPq16wb_register, Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemory162_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPairAllLanes, MCK_DupAlignedMemory16, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1q16wb_fixed, Convert__VecListDPair1_2__imm_95_0__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1q16wb_register, Convert__VecListDPair1_2__imm_95_0__AlignedMemory64or1282_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1d16Qwb_fixed, Convert__VecListFourD1_2__imm_95_0__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1d16Qwb_register, Convert__VecListFourD1_2__imm_95_0__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1DUPd16wb_fixed, Convert__VecListOneDAllLanes1_2__imm_95_0__DupAlignedMemory162_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListOneDAllLanes, MCK_DupAlignedMemory16, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1DUPd16wb_register, Convert__VecListOneDAllLanes1_2__imm_95_0__DupAlignedMemory162_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListOneDAllLanes, MCK_DupAlignedMemory16, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1d16wb_fixed, Convert__VecListOneD1_2__imm_95_0__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListOneD, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1d16wb_register, Convert__VecListOneD1_2__imm_95_0__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListOneD, MCK_AlignedMemory64, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1LNdWB_fixed_Asm_16, Convert__VecListOneDHWordIndexed2_2__AlignedMemory162_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListOneDHWordIndexed, MCK_AlignedMemory16, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1LNdWB_register_Asm_16, Convert__VecListOneDHWordIndexed2_2__AlignedMemory162_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListOneDHWordIndexed, MCK_AlignedMemory16, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1d16Twb_fixed, Convert__VecListThreeD1_2__imm_95_0__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeD, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1d16Twb_register, Convert__VecListThreeD1_2__imm_95_0__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeD, MCK_AlignedMemory64, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1DUPq32wb_fixed, Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPairAllLanes, MCK_DupAlignedMemory32, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1DUPq32wb_register, Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemory322_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPairAllLanes, MCK_DupAlignedMemory32, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1q32wb_fixed, Convert__VecListDPair1_2__imm_95_0__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1q32wb_register, Convert__VecListDPair1_2__imm_95_0__AlignedMemory64or1282_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1d32Qwb_fixed, Convert__VecListFourD1_2__imm_95_0__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1d32Qwb_register, Convert__VecListFourD1_2__imm_95_0__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1DUPd32wb_fixed, Convert__VecListOneDAllLanes1_2__imm_95_0__DupAlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListOneDAllLanes, MCK_DupAlignedMemory32, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1DUPd32wb_register, Convert__VecListOneDAllLanes1_2__imm_95_0__DupAlignedMemory322_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListOneDAllLanes, MCK_DupAlignedMemory32, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1d32wb_fixed, Convert__VecListOneD1_2__imm_95_0__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListOneD, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1d32wb_register, Convert__VecListOneD1_2__imm_95_0__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListOneD, MCK_AlignedMemory64, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1LNdWB_fixed_Asm_32, Convert__VecListOneDWordIndexed2_2__AlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListOneDWordIndexed, MCK_AlignedMemory32, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1LNdWB_register_Asm_32, Convert__VecListOneDWordIndexed2_2__AlignedMemory322_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListOneDWordIndexed, MCK_AlignedMemory32, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1d32Twb_fixed, Convert__VecListThreeD1_2__imm_95_0__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeD, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1d32Twb_register, Convert__VecListThreeD1_2__imm_95_0__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeD, MCK_AlignedMemory64, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1q64wb_fixed, Convert__VecListDPair1_2__imm_95_0__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1q64wb_register, Convert__VecListDPair1_2__imm_95_0__AlignedMemory64or1282_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1d64Qwb_fixed, Convert__VecListFourD1_2__imm_95_0__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1d64Qwb_register, Convert__VecListFourD1_2__imm_95_0__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1d64wb_fixed, Convert__VecListOneD1_2__imm_95_0__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListOneD, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1d64wb_register, Convert__VecListOneD1_2__imm_95_0__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListOneD, MCK_AlignedMemory64, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1d64Twb_fixed, Convert__VecListThreeD1_2__imm_95_0__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListThreeD, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1d64Twb_register, Convert__VecListThreeD1_2__imm_95_0__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListThreeD, MCK_AlignedMemory64, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1DUPq8wb_fixed, Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPairAllLanes, MCK_DupAlignedMemoryNone, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1DUPq8wb_register, Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemoryNone2_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPairAllLanes, MCK_DupAlignedMemoryNone, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1q8wb_fixed, Convert__VecListDPair1_2__imm_95_0__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1q8wb_register, Convert__VecListDPair1_2__imm_95_0__AlignedMemory64or1282_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1d8Qwb_fixed, Convert__VecListFourD1_2__imm_95_0__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1d8Qwb_register, Convert__VecListFourD1_2__imm_95_0__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1DUPd8wb_fixed, Convert__VecListOneDAllLanes1_2__imm_95_0__DupAlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListOneDAllLanes, MCK_DupAlignedMemoryNone, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1DUPd8wb_register, Convert__VecListOneDAllLanes1_2__imm_95_0__DupAlignedMemoryNone2_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListOneDAllLanes, MCK_DupAlignedMemoryNone, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1d8wb_fixed, Convert__VecListOneD1_2__imm_95_0__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListOneD, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1d8wb_register, Convert__VecListOneD1_2__imm_95_0__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListOneD, MCK_AlignedMemory64, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1LNdWB_fixed_Asm_8, Convert__VecListOneDByteIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListOneDByteIndexed, MCK_AlignedMemoryNone, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1LNdWB_register_Asm_8, Convert__VecListOneDByteIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListOneDByteIndexed, MCK_AlignedMemoryNone, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1d8Twb_fixed, Convert__VecListThreeD1_2__imm_95_0__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeD, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 1979 /* vld1 */, ARM::VLD1d8Twb_register, Convert__VecListThreeD1_2__imm_95_0__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeD, MCK_AlignedMemory64, MCK_rGPR }, }, + { 1979 /* vld1 */, ARM::VLD1LNd16, Convert__Reg1_3__AlignedMemory2_8__Tie0__Imm1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK__91_, MCK_Imm, MCK__93_, MCK__125_, MCK_AlignedMemory }, }, + { 1979 /* vld1 */, ARM::VLD1LNd8, Convert__Reg1_3__AlignedMemory2_8__Tie0__Imm1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK__91_, MCK_Imm, MCK__93_, MCK__125_, MCK_AlignedMemory }, }, + { 1979 /* vld1 */, ARM::VLD1LNd16_UPD, Convert__Reg1_3__imm_95_0__AlignedMemory2_8__Imm1_9__Tie0__Imm1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK__91_, MCK_Imm, MCK__93_, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 1979 /* vld1 */, ARM::VLD1LNd32, Convert__Reg1_3__Reg1_8__Imm1_9__Tie0__Imm1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK__91_, MCK_Imm, MCK__93_, MCK__125_, MCK_GPR, MCK_Imm }, }, + { 1979 /* vld1 */, ARM::VLD1LNd32_UPD, Convert__Reg1_3__imm_95_0__AlignedMemory2_8__Imm1_9__Tie0__Imm1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK__91_, MCK_Imm, MCK__93_, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 1979 /* vld1 */, ARM::VLD1LNd8_UPD, Convert__Reg1_3__imm_95_0__AlignedMemory2_8__Imm1_9__Tie0__Imm1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK__91_, MCK_Imm, MCK__93_, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 1984 /* vld2 */, ARM::VLD2DUPd16, Convert__VecListDPairAllLanes1_2__DupAlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPairAllLanes, MCK_DupAlignedMemory32 }, }, + { 1984 /* vld2 */, ARM::VLD2d16, Convert__VecListDPair1_2__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPair, MCK_AlignedMemory64or128 }, }, + { 1984 /* vld2 */, ARM::VLD2DUPd16x2, Convert__VecListDPairSpacedAllLanes1_2__DupAlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPairSpacedAllLanes, MCK_DupAlignedMemory32 }, }, + { 1984 /* vld2 */, ARM::VLD2b16, Convert__VecListDPairSpaced1_2__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPairSpaced, MCK_AlignedMemory64or128 }, }, + { 1984 /* vld2 */, ARM::VLD2q16, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourD, MCK_AlignedMemory64or128or256 }, }, + { 1984 /* vld2 */, ARM::VLD2LNdAsm_16, Convert__VecListTwoDHWordIndexed2_2__AlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListTwoDHWordIndexed, MCK_AlignedMemory32 }, }, + { 1984 /* vld2 */, ARM::VLD2LNqAsm_16, Convert__VecListTwoQHWordIndexed2_2__AlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListTwoQHWordIndexed, MCK_AlignedMemory32 }, }, + { 1984 /* vld2 */, ARM::VLD2DUPd32, Convert__VecListDPairAllLanes1_2__DupAlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPairAllLanes, MCK_DupAlignedMemory64 }, }, + { 1984 /* vld2 */, ARM::VLD2d32, Convert__VecListDPair1_2__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPair, MCK_AlignedMemory64or128 }, }, + { 1984 /* vld2 */, ARM::VLD2DUPd32x2, Convert__VecListDPairSpacedAllLanes1_2__DupAlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPairSpacedAllLanes, MCK_DupAlignedMemory64 }, }, + { 1984 /* vld2 */, ARM::VLD2b32, Convert__VecListDPairSpaced1_2__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPairSpaced, MCK_AlignedMemory64or128 }, }, + { 1984 /* vld2 */, ARM::VLD2q32, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourD, MCK_AlignedMemory64or128or256 }, }, + { 1984 /* vld2 */, ARM::VLD2LNdAsm_32, Convert__VecListTwoDWordIndexed2_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListTwoDWordIndexed, MCK_AlignedMemory64 }, }, + { 1984 /* vld2 */, ARM::VLD2LNqAsm_32, Convert__VecListTwoQWordIndexed2_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListTwoQWordIndexed, MCK_AlignedMemory64 }, }, + { 1984 /* vld2 */, ARM::VLD2DUPd8, Convert__VecListDPairAllLanes1_2__DupAlignedMemory162_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPairAllLanes, MCK_DupAlignedMemory16 }, }, + { 1984 /* vld2 */, ARM::VLD2d8, Convert__VecListDPair1_2__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPair, MCK_AlignedMemory64or128 }, }, + { 1984 /* vld2 */, ARM::VLD2DUPd8x2, Convert__VecListDPairSpacedAllLanes1_2__DupAlignedMemory162_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPairSpacedAllLanes, MCK_DupAlignedMemory16 }, }, + { 1984 /* vld2 */, ARM::VLD2b8, Convert__VecListDPairSpaced1_2__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPairSpaced, MCK_AlignedMemory64or128 }, }, + { 1984 /* vld2 */, ARM::VLD2q8, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourD, MCK_AlignedMemory64or128or256 }, }, + { 1984 /* vld2 */, ARM::VLD2LNdAsm_8, Convert__VecListTwoDByteIndexed2_2__AlignedMemory162_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListTwoDByteIndexed, MCK_AlignedMemory16 }, }, + { 1984 /* vld2 */, ARM::VLD2DUPd16wb_fixed, Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPairAllLanes, MCK_DupAlignedMemory32, MCK__EXCLAIM_ }, }, + { 1984 /* vld2 */, ARM::VLD2DUPd16wb_register, Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemory322_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPairAllLanes, MCK_DupAlignedMemory32, MCK_rGPR }, }, + { 1984 /* vld2 */, ARM::VLD2d16wb_fixed, Convert__VecListDPair1_2__imm_95_0__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 1984 /* vld2 */, ARM::VLD2d16wb_register, Convert__VecListDPair1_2__imm_95_0__AlignedMemory64or1282_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 1984 /* vld2 */, ARM::VLD2DUPd16x2wb_fixed, Convert__VecListDPairSpacedAllLanes1_2__imm_95_0__DupAlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPairSpacedAllLanes, MCK_DupAlignedMemory32, MCK__EXCLAIM_ }, }, + { 1984 /* vld2 */, ARM::VLD2DUPd16x2wb_register, Convert__VecListDPairSpacedAllLanes1_2__imm_95_0__DupAlignedMemory322_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPairSpacedAllLanes, MCK_DupAlignedMemory32, MCK_rGPR }, }, + { 1984 /* vld2 */, ARM::VLD2b16wb_fixed, Convert__VecListDPairSpaced1_2__imm_95_0__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPairSpaced, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 1984 /* vld2 */, ARM::VLD2b16wb_register, Convert__VecListDPairSpaced1_2__imm_95_0__AlignedMemory64or1282_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPairSpaced, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 1984 /* vld2 */, ARM::VLD2q16wb_fixed, Convert__VecListFourD1_2__imm_95_0__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 1984 /* vld2 */, ARM::VLD2q16wb_register, Convert__VecListFourD1_2__imm_95_0__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 1984 /* vld2 */, ARM::VLD2LNdWB_fixed_Asm_16, Convert__VecListTwoDHWordIndexed2_2__AlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListTwoDHWordIndexed, MCK_AlignedMemory32, MCK__EXCLAIM_ }, }, + { 1984 /* vld2 */, ARM::VLD2LNdWB_register_Asm_16, Convert__VecListTwoDHWordIndexed2_2__AlignedMemory322_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListTwoDHWordIndexed, MCK_AlignedMemory32, MCK_rGPR }, }, + { 1984 /* vld2 */, ARM::VLD2LNqWB_fixed_Asm_16, Convert__VecListTwoQHWordIndexed2_2__AlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListTwoQHWordIndexed, MCK_AlignedMemory32, MCK__EXCLAIM_ }, }, + { 1984 /* vld2 */, ARM::VLD2LNqWB_register_Asm_16, Convert__VecListTwoQHWordIndexed2_2__AlignedMemory322_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListTwoQHWordIndexed, MCK_AlignedMemory32, MCK_rGPR }, }, + { 1984 /* vld2 */, ARM::VLD2DUPd32wb_fixed, Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPairAllLanes, MCK_DupAlignedMemory64, MCK__EXCLAIM_ }, }, + { 1984 /* vld2 */, ARM::VLD2DUPd32wb_register, Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPairAllLanes, MCK_DupAlignedMemory64, MCK_rGPR }, }, + { 1984 /* vld2 */, ARM::VLD2d32wb_fixed, Convert__VecListDPair1_2__imm_95_0__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 1984 /* vld2 */, ARM::VLD2d32wb_register, Convert__VecListDPair1_2__imm_95_0__AlignedMemory64or1282_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 1984 /* vld2 */, ARM::VLD2DUPd32x2wb_fixed, Convert__VecListDPairSpacedAllLanes1_2__imm_95_0__DupAlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPairSpacedAllLanes, MCK_DupAlignedMemory64, MCK__EXCLAIM_ }, }, + { 1984 /* vld2 */, ARM::VLD2DUPd32x2wb_register, Convert__VecListDPairSpacedAllLanes1_2__imm_95_0__DupAlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPairSpacedAllLanes, MCK_DupAlignedMemory64, MCK_rGPR }, }, + { 1984 /* vld2 */, ARM::VLD2b32wb_fixed, Convert__VecListDPairSpaced1_2__imm_95_0__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPairSpaced, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 1984 /* vld2 */, ARM::VLD2b32wb_register, Convert__VecListDPairSpaced1_2__imm_95_0__AlignedMemory64or1282_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPairSpaced, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 1984 /* vld2 */, ARM::VLD2q32wb_fixed, Convert__VecListFourD1_2__imm_95_0__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 1984 /* vld2 */, ARM::VLD2q32wb_register, Convert__VecListFourD1_2__imm_95_0__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 1984 /* vld2 */, ARM::VLD2LNdWB_fixed_Asm_32, Convert__VecListTwoDWordIndexed2_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListTwoDWordIndexed, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 1984 /* vld2 */, ARM::VLD2LNdWB_register_Asm_32, Convert__VecListTwoDWordIndexed2_2__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListTwoDWordIndexed, MCK_AlignedMemory64, MCK_rGPR }, }, + { 1984 /* vld2 */, ARM::VLD2LNqWB_fixed_Asm_32, Convert__VecListTwoQWordIndexed2_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListTwoQWordIndexed, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 1984 /* vld2 */, ARM::VLD2LNqWB_register_Asm_32, Convert__VecListTwoQWordIndexed2_2__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListTwoQWordIndexed, MCK_AlignedMemory64, MCK_rGPR }, }, + { 1984 /* vld2 */, ARM::VLD2DUPd8wb_fixed, Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemory162_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPairAllLanes, MCK_DupAlignedMemory16, MCK__EXCLAIM_ }, }, + { 1984 /* vld2 */, ARM::VLD2DUPd8wb_register, Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedMemory162_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPairAllLanes, MCK_DupAlignedMemory16, MCK_rGPR }, }, + { 1984 /* vld2 */, ARM::VLD2d8wb_fixed, Convert__VecListDPair1_2__imm_95_0__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 1984 /* vld2 */, ARM::VLD2d8wb_register, Convert__VecListDPair1_2__imm_95_0__AlignedMemory64or1282_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 1984 /* vld2 */, ARM::VLD2DUPd8x2wb_fixed, Convert__VecListDPairSpacedAllLanes1_2__imm_95_0__DupAlignedMemory162_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPairSpacedAllLanes, MCK_DupAlignedMemory16, MCK__EXCLAIM_ }, }, + { 1984 /* vld2 */, ARM::VLD2DUPd8x2wb_register, Convert__VecListDPairSpacedAllLanes1_2__imm_95_0__DupAlignedMemory162_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPairSpacedAllLanes, MCK_DupAlignedMemory16, MCK_rGPR }, }, + { 1984 /* vld2 */, ARM::VLD2b8wb_fixed, Convert__VecListDPairSpaced1_2__imm_95_0__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPairSpaced, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 1984 /* vld2 */, ARM::VLD2b8wb_register, Convert__VecListDPairSpaced1_2__imm_95_0__AlignedMemory64or1282_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPairSpaced, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 1984 /* vld2 */, ARM::VLD2q8wb_fixed, Convert__VecListFourD1_2__imm_95_0__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 1984 /* vld2 */, ARM::VLD2q8wb_register, Convert__VecListFourD1_2__imm_95_0__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 1984 /* vld2 */, ARM::VLD2LNdWB_fixed_Asm_8, Convert__VecListTwoDByteIndexed2_2__AlignedMemory162_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListTwoDByteIndexed, MCK_AlignedMemory16, MCK__EXCLAIM_ }, }, + { 1984 /* vld2 */, ARM::VLD2LNdWB_register_Asm_8, Convert__VecListTwoDByteIndexed2_2__AlignedMemory162_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListTwoDByteIndexed, MCK_AlignedMemory16, MCK_rGPR }, }, + { 1989 /* vld3 */, ARM::VLD3DUPdAsm_16, Convert__VecListThreeDAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeDAllLanes, MCK_DupAlignedMemoryNone }, }, + { 1989 /* vld3 */, ARM::VLD3dAsm_16, Convert__VecListThreeD1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeD, MCK_AlignedMemory64 }, }, + { 1989 /* vld3 */, ARM::VLD3LNdAsm_16, Convert__VecListThreeDHWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeDHWordIndexed, MCK_AlignedMemoryNone }, }, + { 1989 /* vld3 */, ARM::VLD3DUPqAsm_16, Convert__VecListThreeQAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeQAllLanes, MCK_DupAlignedMemoryNone }, }, + { 1989 /* vld3 */, ARM::VLD3qAsm_16, Convert__VecListThreeQ1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeQ, MCK_AlignedMemory64 }, }, + { 1989 /* vld3 */, ARM::VLD3LNqAsm_16, Convert__VecListThreeQHWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeQHWordIndexed, MCK_AlignedMemoryNone }, }, + { 1989 /* vld3 */, ARM::VLD3DUPdAsm_32, Convert__VecListThreeDAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeDAllLanes, MCK_DupAlignedMemoryNone }, }, + { 1989 /* vld3 */, ARM::VLD3dAsm_32, Convert__VecListThreeD1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeD, MCK_AlignedMemory64 }, }, + { 1989 /* vld3 */, ARM::VLD3LNdAsm_32, Convert__VecListThreeDWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeDWordIndexed, MCK_AlignedMemoryNone }, }, + { 1989 /* vld3 */, ARM::VLD3DUPqAsm_32, Convert__VecListThreeQAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeQAllLanes, MCK_DupAlignedMemoryNone }, }, + { 1989 /* vld3 */, ARM::VLD3qAsm_32, Convert__VecListThreeQ1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeQ, MCK_AlignedMemory64 }, }, + { 1989 /* vld3 */, ARM::VLD3LNqAsm_32, Convert__VecListThreeQWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeQWordIndexed, MCK_AlignedMemoryNone }, }, + { 1989 /* vld3 */, ARM::VLD3DUPdAsm_8, Convert__VecListThreeDAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeDAllLanes, MCK_DupAlignedMemoryNone }, }, + { 1989 /* vld3 */, ARM::VLD3dAsm_8, Convert__VecListThreeD1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeD, MCK_AlignedMemory64 }, }, + { 1989 /* vld3 */, ARM::VLD3LNdAsm_8, Convert__VecListThreeDByteIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeDByteIndexed, MCK_AlignedMemoryNone }, }, + { 1989 /* vld3 */, ARM::VLD3DUPqAsm_8, Convert__VecListThreeQAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeQAllLanes, MCK_DupAlignedMemoryNone }, }, + { 1989 /* vld3 */, ARM::VLD3qAsm_8, Convert__VecListThreeQ1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeQ, MCK_AlignedMemory64 }, }, + { 1989 /* vld3 */, ARM::VLD3DUPdWB_fixed_Asm_16, Convert__VecListThreeDAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeDAllLanes, MCK_DupAlignedMemoryNone, MCK__EXCLAIM_ }, }, + { 1989 /* vld3 */, ARM::VLD3DUPdWB_register_Asm_16, Convert__VecListThreeDAllLanes1_2__DupAlignedMemoryNone2_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeDAllLanes, MCK_DupAlignedMemoryNone, MCK_rGPR }, }, + { 1989 /* vld3 */, ARM::VLD3dWB_fixed_Asm_16, Convert__VecListThreeD1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeD, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 1989 /* vld3 */, ARM::VLD3dWB_register_Asm_16, Convert__VecListThreeD1_2__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeD, MCK_AlignedMemory64, MCK_rGPR }, }, + { 1989 /* vld3 */, ARM::VLD3LNdWB_fixed_Asm_16, Convert__VecListThreeDHWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeDHWordIndexed, MCK_AlignedMemoryNone, MCK__EXCLAIM_ }, }, + { 1989 /* vld3 */, ARM::VLD3LNdWB_register_Asm_16, Convert__VecListThreeDHWordIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeDHWordIndexed, MCK_AlignedMemoryNone, MCK_rGPR }, }, + { 1989 /* vld3 */, ARM::VLD3DUPqWB_fixed_Asm_16, Convert__VecListThreeQAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeQAllLanes, MCK_DupAlignedMemoryNone, MCK__EXCLAIM_ }, }, + { 1989 /* vld3 */, ARM::VLD3DUPqWB_register_Asm_16, Convert__VecListThreeQAllLanes1_2__DupAlignedMemoryNone2_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeQAllLanes, MCK_DupAlignedMemoryNone, MCK_rGPR }, }, + { 1989 /* vld3 */, ARM::VLD3qWB_fixed_Asm_16, Convert__VecListThreeQ1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeQ, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 1989 /* vld3 */, ARM::VLD3qWB_register_Asm_16, Convert__VecListThreeQ1_2__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeQ, MCK_AlignedMemory64, MCK_rGPR }, }, + { 1989 /* vld3 */, ARM::VLD3LNqWB_fixed_Asm_16, Convert__VecListThreeQHWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeQHWordIndexed, MCK_AlignedMemoryNone, MCK__EXCLAIM_ }, }, + { 1989 /* vld3 */, ARM::VLD3LNqWB_register_Asm_16, Convert__VecListThreeQHWordIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeQHWordIndexed, MCK_AlignedMemoryNone, MCK_rGPR }, }, + { 1989 /* vld3 */, ARM::VLD3DUPdWB_fixed_Asm_32, Convert__VecListThreeDAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeDAllLanes, MCK_DupAlignedMemoryNone, MCK__EXCLAIM_ }, }, + { 1989 /* vld3 */, ARM::VLD3DUPdWB_register_Asm_32, Convert__VecListThreeDAllLanes1_2__DupAlignedMemoryNone2_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeDAllLanes, MCK_DupAlignedMemoryNone, MCK_rGPR }, }, + { 1989 /* vld3 */, ARM::VLD3dWB_fixed_Asm_32, Convert__VecListThreeD1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeD, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 1989 /* vld3 */, ARM::VLD3dWB_register_Asm_32, Convert__VecListThreeD1_2__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeD, MCK_AlignedMemory64, MCK_rGPR }, }, + { 1989 /* vld3 */, ARM::VLD3LNdWB_fixed_Asm_32, Convert__VecListThreeDWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeDWordIndexed, MCK_AlignedMemoryNone, MCK__EXCLAIM_ }, }, + { 1989 /* vld3 */, ARM::VLD3LNdWB_register_Asm_32, Convert__VecListThreeDWordIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeDWordIndexed, MCK_AlignedMemoryNone, MCK_rGPR }, }, + { 1989 /* vld3 */, ARM::VLD3DUPqWB_fixed_Asm_32, Convert__VecListThreeQAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeQAllLanes, MCK_DupAlignedMemoryNone, MCK__EXCLAIM_ }, }, + { 1989 /* vld3 */, ARM::VLD3DUPqWB_register_Asm_32, Convert__VecListThreeQAllLanes1_2__DupAlignedMemoryNone2_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeQAllLanes, MCK_DupAlignedMemoryNone, MCK_rGPR }, }, + { 1989 /* vld3 */, ARM::VLD3qWB_fixed_Asm_32, Convert__VecListThreeQ1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeQ, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 1989 /* vld3 */, ARM::VLD3qWB_register_Asm_32, Convert__VecListThreeQ1_2__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeQ, MCK_AlignedMemory64, MCK_rGPR }, }, + { 1989 /* vld3 */, ARM::VLD3LNqWB_fixed_Asm_32, Convert__VecListThreeQWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeQWordIndexed, MCK_AlignedMemoryNone, MCK__EXCLAIM_ }, }, + { 1989 /* vld3 */, ARM::VLD3LNqWB_register_Asm_32, Convert__VecListThreeQWordIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeQWordIndexed, MCK_AlignedMemoryNone, MCK_rGPR }, }, + { 1989 /* vld3 */, ARM::VLD3DUPdWB_fixed_Asm_8, Convert__VecListThreeDAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeDAllLanes, MCK_DupAlignedMemoryNone, MCK__EXCLAIM_ }, }, + { 1989 /* vld3 */, ARM::VLD3DUPdWB_register_Asm_8, Convert__VecListThreeDAllLanes1_2__DupAlignedMemoryNone2_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeDAllLanes, MCK_DupAlignedMemoryNone, MCK_rGPR }, }, + { 1989 /* vld3 */, ARM::VLD3dWB_fixed_Asm_8, Convert__VecListThreeD1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeD, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 1989 /* vld3 */, ARM::VLD3dWB_register_Asm_8, Convert__VecListThreeD1_2__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeD, MCK_AlignedMemory64, MCK_rGPR }, }, + { 1989 /* vld3 */, ARM::VLD3LNdWB_fixed_Asm_8, Convert__VecListThreeDByteIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeDByteIndexed, MCK_AlignedMemoryNone, MCK__EXCLAIM_ }, }, + { 1989 /* vld3 */, ARM::VLD3LNdWB_register_Asm_8, Convert__VecListThreeDByteIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeDByteIndexed, MCK_AlignedMemoryNone, MCK_rGPR }, }, + { 1989 /* vld3 */, ARM::VLD3DUPqWB_fixed_Asm_8, Convert__VecListThreeQAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeQAllLanes, MCK_DupAlignedMemoryNone, MCK__EXCLAIM_ }, }, + { 1989 /* vld3 */, ARM::VLD3DUPqWB_register_Asm_8, Convert__VecListThreeQAllLanes1_2__DupAlignedMemoryNone2_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeQAllLanes, MCK_DupAlignedMemoryNone, MCK_rGPR }, }, + { 1989 /* vld3 */, ARM::VLD3qWB_fixed_Asm_8, Convert__VecListThreeQ1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeQ, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 1989 /* vld3 */, ARM::VLD3qWB_register_Asm_8, Convert__VecListThreeQ1_2__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeQ, MCK_AlignedMemory64, MCK_rGPR }, }, + { 1989 /* vld3 */, ARM::VLD3d16, Convert__Reg1_3__Reg1_4__Reg1_5__AlignedMemory2_7__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 1989 /* vld3 */, ARM::VLD3q16, Convert__Reg1_3__Reg1_4__Reg1_5__AlignedMemory2_7__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 1989 /* vld3 */, ARM::VLD3d32, Convert__Reg1_3__Reg1_4__Reg1_5__AlignedMemory2_7__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 1989 /* vld3 */, ARM::VLD3q32, Convert__Reg1_3__Reg1_4__Reg1_5__AlignedMemory2_7__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 1989 /* vld3 */, ARM::VLD3d8, Convert__Reg1_3__Reg1_4__Reg1_5__AlignedMemory2_7__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 1989 /* vld3 */, ARM::VLD3q8, Convert__Reg1_3__Reg1_4__Reg1_5__AlignedMemory2_7__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 1989 /* vld3 */, ARM::VLD3d16_UPD, Convert__Reg1_3__Reg1_4__Reg1_5__imm_95_0__AlignedMemory2_7__Imm1_8__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 1989 /* vld3 */, ARM::VLD3q16_UPD, Convert__Reg1_3__Reg1_4__Reg1_5__imm_95_0__AlignedMemory2_7__Imm1_8__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 1989 /* vld3 */, ARM::VLD3d32_UPD, Convert__Reg1_3__Reg1_4__Reg1_5__imm_95_0__AlignedMemory2_7__Imm1_8__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 1989 /* vld3 */, ARM::VLD3q32_UPD, Convert__Reg1_3__Reg1_4__Reg1_5__imm_95_0__AlignedMemory2_7__Imm1_8__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 1989 /* vld3 */, ARM::VLD3d8_UPD, Convert__Reg1_3__Reg1_4__Reg1_5__imm_95_0__AlignedMemory2_7__Imm1_8__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 1989 /* vld3 */, ARM::VLD3q8_UPD, Convert__Reg1_3__Reg1_4__Reg1_5__imm_95_0__AlignedMemory2_7__Imm1_8__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 1989 /* vld3 */, ARM::VLD3DUPd16, Convert__Reg1_3__Reg1_6__Reg1_9__AlignedMemory2_13__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_AlignedMemory }, }, + { 1989 /* vld3 */, ARM::VLD3DUPq16, Convert__Reg1_3__Reg1_6__Reg1_9__AlignedMemory2_13__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_AlignedMemory }, }, + { 1989 /* vld3 */, ARM::VLD3DUPd32, Convert__Reg1_3__Reg1_6__Reg1_9__AlignedMemory2_13__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_AlignedMemory }, }, + { 1989 /* vld3 */, ARM::VLD3DUPq32, Convert__Reg1_3__Reg1_6__Reg1_9__AlignedMemory2_13__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_AlignedMemory }, }, + { 1989 /* vld3 */, ARM::VLD3DUPd8, Convert__Reg1_3__Reg1_6__Reg1_9__AlignedMemory2_13__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_AlignedMemory }, }, + { 1989 /* vld3 */, ARM::VLD3DUPq8, Convert__Reg1_3__Reg1_6__Reg1_9__AlignedMemory2_13__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_AlignedMemory }, }, + { 1989 /* vld3 */, ARM::VLD3DUPd16_UPD, Convert__Reg1_3__Reg1_6__Reg1_9__imm_95_0__DupAlignedMemory642_13__Imm1_14__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_DupAlignedMemory64, MCK_Imm }, }, + { 1989 /* vld3 */, ARM::VLD3DUPq16_UPD, Convert__Reg1_3__Reg1_6__Reg1_9__imm_95_0__DupAlignedMemory642_13__Imm1_14__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_DupAlignedMemory64, MCK_Imm }, }, + { 1989 /* vld3 */, ARM::VLD3DUPd32_UPD, Convert__Reg1_3__Reg1_6__Reg1_9__imm_95_0__DupAlignedMemory642_13__Imm1_14__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_DupAlignedMemory64, MCK_Imm }, }, + { 1989 /* vld3 */, ARM::VLD3DUPq32_UPD, Convert__Reg1_3__Reg1_6__Reg1_9__imm_95_0__DupAlignedMemory642_13__Imm1_14__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_DupAlignedMemory64, MCK_Imm }, }, + { 1989 /* vld3 */, ARM::VLD3DUPd8_UPD, Convert__Reg1_3__Reg1_6__Reg1_9__imm_95_0__DupAlignedMemory642_13__Imm1_14__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_DupAlignedMemory64, MCK_Imm }, }, + { 1989 /* vld3 */, ARM::VLD3DUPq8_UPD, Convert__Reg1_3__Reg1_6__Reg1_9__imm_95_0__DupAlignedMemory642_13__Imm1_14__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_DupAlignedMemory64, MCK_Imm }, }, + { 1994 /* vld4 */, ARM::VLD4DUPdAsm_16, Convert__VecListFourDAllLanes1_2__DupAlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourDAllLanes, MCK_DupAlignedMemory64 }, }, + { 1994 /* vld4 */, ARM::VLD4dAsm_16, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourD, MCK_AlignedMemory64or128or256 }, }, + { 1994 /* vld4 */, ARM::VLD4LNdAsm_16, Convert__VecListFourDHWordIndexed2_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourDHWordIndexed, MCK_AlignedMemory64 }, }, + { 1994 /* vld4 */, ARM::VLD4DUPqAsm_16, Convert__VecListFourQAllLanes1_2__DupAlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourQAllLanes, MCK_DupAlignedMemory64 }, }, + { 1994 /* vld4 */, ARM::VLD4qAsm_16, Convert__VecListFourQ1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourQ, MCK_AlignedMemory64or128or256 }, }, + { 1994 /* vld4 */, ARM::VLD4LNqAsm_16, Convert__VecListFourQHWordIndexed2_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourQHWordIndexed, MCK_AlignedMemory64 }, }, + { 1994 /* vld4 */, ARM::VLD4DUPdAsm_32, Convert__VecListFourDAllLanes1_2__DupAlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourDAllLanes, MCK_DupAlignedMemory64or128 }, }, + { 1994 /* vld4 */, ARM::VLD4dAsm_32, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourD, MCK_AlignedMemory64or128or256 }, }, + { 1994 /* vld4 */, ARM::VLD4LNdAsm_32, Convert__VecListFourDWordIndexed2_2__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourDWordIndexed, MCK_AlignedMemory64or128 }, }, + { 1994 /* vld4 */, ARM::VLD4DUPqAsm_32, Convert__VecListFourQAllLanes1_2__DupAlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourQAllLanes, MCK_DupAlignedMemory64or128 }, }, + { 1994 /* vld4 */, ARM::VLD4qAsm_32, Convert__VecListFourQ1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourQ, MCK_AlignedMemory64or128or256 }, }, + { 1994 /* vld4 */, ARM::VLD4LNqAsm_32, Convert__VecListFourQWordIndexed2_2__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourQWordIndexed, MCK_AlignedMemory64or128 }, }, + { 1994 /* vld4 */, ARM::VLD4DUPdAsm_8, Convert__VecListFourDAllLanes1_2__DupAlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourDAllLanes, MCK_DupAlignedMemory32 }, }, + { 1994 /* vld4 */, ARM::VLD4dAsm_8, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourD, MCK_AlignedMemory64or128or256 }, }, + { 1994 /* vld4 */, ARM::VLD4LNdAsm_8, Convert__VecListFourDByteIndexed2_2__AlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourDByteIndexed, MCK_AlignedMemory32 }, }, + { 1994 /* vld4 */, ARM::VLD4DUPqAsm_8, Convert__VecListFourQAllLanes1_2__DupAlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourQAllLanes, MCK_DupAlignedMemory32 }, }, + { 1994 /* vld4 */, ARM::VLD4qAsm_8, Convert__VecListFourQ1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourQ, MCK_AlignedMemory64or128or256 }, }, + { 1994 /* vld4 */, ARM::VLD4DUPdWB_fixed_Asm_16, Convert__VecListFourDAllLanes1_2__DupAlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourDAllLanes, MCK_DupAlignedMemory64, MCK__EXCLAIM_ }, }, + { 1994 /* vld4 */, ARM::VLD4DUPdWB_register_Asm_16, Convert__VecListFourDAllLanes1_2__DupAlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourDAllLanes, MCK_DupAlignedMemory64, MCK_rGPR }, }, + { 1994 /* vld4 */, ARM::VLD4dWB_fixed_Asm_16, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 1994 /* vld4 */, ARM::VLD4dWB_register_Asm_16, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 1994 /* vld4 */, ARM::VLD4LNdWB_fixed_Asm_16, Convert__VecListFourDHWordIndexed2_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourDHWordIndexed, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 1994 /* vld4 */, ARM::VLD4LNdWB_register_Asm_16, Convert__VecListFourDHWordIndexed2_2__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourDHWordIndexed, MCK_AlignedMemory64, MCK_rGPR }, }, + { 1994 /* vld4 */, ARM::VLD4DUPqWB_fixed_Asm_16, Convert__VecListFourQAllLanes1_2__DupAlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourQAllLanes, MCK_DupAlignedMemory64, MCK__EXCLAIM_ }, }, + { 1994 /* vld4 */, ARM::VLD4DUPqWB_register_Asm_16, Convert__VecListFourQAllLanes1_2__DupAlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourQAllLanes, MCK_DupAlignedMemory64, MCK_rGPR }, }, + { 1994 /* vld4 */, ARM::VLD4qWB_fixed_Asm_16, Convert__VecListFourQ1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourQ, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 1994 /* vld4 */, ARM::VLD4qWB_register_Asm_16, Convert__VecListFourQ1_2__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourQ, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 1994 /* vld4 */, ARM::VLD4LNqWB_fixed_Asm_16, Convert__VecListFourQHWordIndexed2_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourQHWordIndexed, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 1994 /* vld4 */, ARM::VLD4LNqWB_register_Asm_16, Convert__VecListFourQHWordIndexed2_2__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourQHWordIndexed, MCK_AlignedMemory64, MCK_rGPR }, }, + { 1994 /* vld4 */, ARM::VLD4DUPdWB_fixed_Asm_32, Convert__VecListFourDAllLanes1_2__DupAlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourDAllLanes, MCK_DupAlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 1994 /* vld4 */, ARM::VLD4DUPdWB_register_Asm_32, Convert__VecListFourDAllLanes1_2__DupAlignedMemory64or1282_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourDAllLanes, MCK_DupAlignedMemory64or128, MCK_rGPR }, }, + { 1994 /* vld4 */, ARM::VLD4dWB_fixed_Asm_32, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 1994 /* vld4 */, ARM::VLD4dWB_register_Asm_32, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 1994 /* vld4 */, ARM::VLD4LNdWB_fixed_Asm_32, Convert__VecListFourDWordIndexed2_2__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourDWordIndexed, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 1994 /* vld4 */, ARM::VLD4LNdWB_register_Asm_32, Convert__VecListFourDWordIndexed2_2__AlignedMemory64or1282_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourDWordIndexed, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 1994 /* vld4 */, ARM::VLD4DUPqWB_fixed_Asm_32, Convert__VecListFourQAllLanes1_2__DupAlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourQAllLanes, MCK_DupAlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 1994 /* vld4 */, ARM::VLD4DUPqWB_register_Asm_32, Convert__VecListFourQAllLanes1_2__DupAlignedMemory64or1282_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourQAllLanes, MCK_DupAlignedMemory64or128, MCK_rGPR }, }, + { 1994 /* vld4 */, ARM::VLD4qWB_fixed_Asm_32, Convert__VecListFourQ1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourQ, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 1994 /* vld4 */, ARM::VLD4qWB_register_Asm_32, Convert__VecListFourQ1_2__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourQ, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 1994 /* vld4 */, ARM::VLD4LNqWB_fixed_Asm_32, Convert__VecListFourQWordIndexed2_2__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourQWordIndexed, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 1994 /* vld4 */, ARM::VLD4LNqWB_register_Asm_32, Convert__VecListFourQWordIndexed2_2__AlignedMemory64or1282_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourQWordIndexed, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 1994 /* vld4 */, ARM::VLD4DUPdWB_fixed_Asm_8, Convert__VecListFourDAllLanes1_2__DupAlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourDAllLanes, MCK_DupAlignedMemory32, MCK__EXCLAIM_ }, }, + { 1994 /* vld4 */, ARM::VLD4DUPdWB_register_Asm_8, Convert__VecListFourDAllLanes1_2__DupAlignedMemory322_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourDAllLanes, MCK_DupAlignedMemory32, MCK_rGPR }, }, + { 1994 /* vld4 */, ARM::VLD4dWB_fixed_Asm_8, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 1994 /* vld4 */, ARM::VLD4dWB_register_Asm_8, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 1994 /* vld4 */, ARM::VLD4LNdWB_fixed_Asm_8, Convert__VecListFourDByteIndexed2_2__AlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourDByteIndexed, MCK_AlignedMemory32, MCK__EXCLAIM_ }, }, + { 1994 /* vld4 */, ARM::VLD4LNdWB_register_Asm_8, Convert__VecListFourDByteIndexed2_2__AlignedMemory322_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourDByteIndexed, MCK_AlignedMemory32, MCK_rGPR }, }, + { 1994 /* vld4 */, ARM::VLD4DUPqWB_fixed_Asm_8, Convert__VecListFourQAllLanes1_2__DupAlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourQAllLanes, MCK_DupAlignedMemory32, MCK__EXCLAIM_ }, }, + { 1994 /* vld4 */, ARM::VLD4DUPqWB_register_Asm_8, Convert__VecListFourQAllLanes1_2__DupAlignedMemory322_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourQAllLanes, MCK_DupAlignedMemory32, MCK_rGPR }, }, + { 1994 /* vld4 */, ARM::VLD4qWB_fixed_Asm_8, Convert__VecListFourQ1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourQ, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 1994 /* vld4 */, ARM::VLD4qWB_register_Asm_8, Convert__VecListFourQ1_2__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourQ, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 1994 /* vld4 */, ARM::VLD4d16, Convert__Reg1_3__Reg1_4__Reg1_5__Reg1_6__AlignedMemory2_8__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 1994 /* vld4 */, ARM::VLD4q16, Convert__Reg1_3__Reg1_4__Reg1_5__Reg1_6__AlignedMemory2_8__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 1994 /* vld4 */, ARM::VLD4d32, Convert__Reg1_3__Reg1_4__Reg1_5__Reg1_6__AlignedMemory2_8__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 1994 /* vld4 */, ARM::VLD4q32, Convert__Reg1_3__Reg1_4__Reg1_5__Reg1_6__AlignedMemory2_8__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 1994 /* vld4 */, ARM::VLD4d8, Convert__Reg1_3__Reg1_4__Reg1_5__Reg1_6__AlignedMemory2_8__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 1994 /* vld4 */, ARM::VLD4q8, Convert__Reg1_3__Reg1_4__Reg1_5__Reg1_6__AlignedMemory2_8__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 1994 /* vld4 */, ARM::VLD4d16_UPD, Convert__Reg1_3__Reg1_4__Reg1_5__Reg1_6__imm_95_0__AlignedMemory2_8__Imm1_9__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 1994 /* vld4 */, ARM::VLD4q16_UPD, Convert__Reg1_3__Reg1_4__Reg1_5__Reg1_6__imm_95_0__AlignedMemory2_8__Imm1_9__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 1994 /* vld4 */, ARM::VLD4d32_UPD, Convert__Reg1_3__Reg1_4__Reg1_5__Reg1_6__imm_95_0__AlignedMemory2_8__Imm1_9__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 1994 /* vld4 */, ARM::VLD4q32_UPD, Convert__Reg1_3__Reg1_4__Reg1_5__Reg1_6__imm_95_0__AlignedMemory2_8__Imm1_9__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 1994 /* vld4 */, ARM::VLD4d8_UPD, Convert__Reg1_3__Reg1_4__Reg1_5__Reg1_6__imm_95_0__AlignedMemory2_8__Imm1_9__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 1994 /* vld4 */, ARM::VLD4q8_UPD, Convert__Reg1_3__Reg1_4__Reg1_5__Reg1_6__imm_95_0__AlignedMemory2_8__Imm1_9__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 1994 /* vld4 */, ARM::VLD4DUPd16, Convert__Reg1_3__Reg1_6__Reg1_9__Reg1_12__AlignedMemory2_16__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_AlignedMemory }, }, + { 1994 /* vld4 */, ARM::VLD4DUPq16, Convert__Reg1_3__Reg1_6__Reg1_9__Reg1_12__AlignedMemory2_16__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_AlignedMemory }, }, + { 1994 /* vld4 */, ARM::VLD4DUPd32, Convert__Reg1_3__Reg1_6__Reg1_9__Reg1_12__AlignedMemory2_16__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_AlignedMemory }, }, + { 1994 /* vld4 */, ARM::VLD4DUPq32, Convert__Reg1_3__Reg1_6__Reg1_9__Reg1_12__AlignedMemory2_16__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_AlignedMemory }, }, + { 1994 /* vld4 */, ARM::VLD4DUPd8, Convert__Reg1_3__Reg1_6__Reg1_9__Reg1_12__AlignedMemory2_16__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_AlignedMemory }, }, + { 1994 /* vld4 */, ARM::VLD4DUPq8, Convert__Reg1_3__Reg1_6__Reg1_9__Reg1_12__AlignedMemory2_16__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_AlignedMemory }, }, + { 1994 /* vld4 */, ARM::VLD4DUPd16_UPD, Convert__Reg1_3__Reg1_6__Reg1_9__Reg1_12__imm_95_0__AlignedMemory2_16__Imm1_17__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 1994 /* vld4 */, ARM::VLD4DUPq16_UPD, Convert__Reg1_3__Reg1_6__Reg1_9__Reg1_12__imm_95_0__AlignedMemory2_16__Imm1_17__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 1994 /* vld4 */, ARM::VLD4DUPd32_UPD, Convert__Reg1_3__Reg1_6__Reg1_9__Reg1_12__imm_95_0__AlignedMemory2_16__Imm1_17__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 1994 /* vld4 */, ARM::VLD4DUPq32_UPD, Convert__Reg1_3__Reg1_6__Reg1_9__Reg1_12__imm_95_0__AlignedMemory2_16__Imm1_17__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 1994 /* vld4 */, ARM::VLD4DUPd8_UPD, Convert__Reg1_3__Reg1_6__Reg1_9__Reg1_12__imm_95_0__AlignedMemory2_16__Imm1_17__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 1994 /* vld4 */, ARM::VLD4DUPq8_UPD, Convert__Reg1_3__Reg1_6__Reg1_9__Reg1_12__imm_95_0__AlignedMemory2_16__Imm1_17__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK_DPR, MCK__91_, MCK__93_, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 1999 /* vldmdb */, ARM::VLDMDDB_UPD, Convert__Reg1_1__Tie0__CondCode2_0__DPRRegList1_3, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_DPRRegList }, }, + { 1999 /* vldmdb */, ARM::VLDMSDB_UPD, Convert__Reg1_1__Tie0__CondCode2_0__SPRRegList1_3, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_SPRRegList }, }, + { 2006 /* vldmia */, ARM::VLDMDIA, Convert__Reg1_1__CondCode2_0__DPRRegList1_2, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK_DPRRegList }, }, + { 2006 /* vldmia */, ARM::VLDMSIA, Convert__Reg1_1__CondCode2_0__SPRRegList1_2, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK_SPRRegList }, }, + { 2006 /* vldmia */, ARM::VLDMDIA_UPD, Convert__Reg1_1__Tie0__CondCode2_0__DPRRegList1_3, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_DPRRegList }, }, + { 2006 /* vldmia */, ARM::VLDMSIA_UPD, Convert__Reg1_1__Tie0__CondCode2_0__SPRRegList1_3, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_SPRRegList }, }, + { 2013 /* vldr */, ARM::VLDRD, Convert__Reg1_1__AddrMode52_2__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_DPR, MCK_AddrMode5 }, }, + { 2013 /* vldr */, ARM::VLDRS, Convert__Reg1_1__AddrMode52_2__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_SPR, MCK_AddrMode5 }, }, + { 2013 /* vldr */, ARM::VLDRH, Convert__Reg1_2__AddrMode5FP162_3__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_16, MCK_SPR, MCK_AddrMode5FP16 }, }, + { 2013 /* vldr */, ARM::VLDRS, Convert__Reg1_2__AddrMode52_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_32, MCK_SPR, MCK_AddrMode5 }, }, + { 2013 /* vldr */, ARM::VLDRD, Convert__Reg1_2__AddrMode52_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_64, MCK_DPR, MCK_AddrMode5 }, }, + { 2018 /* vlldm */, ARM::VLLDM, Convert__Reg1_1__CondCode2_0, Feature_HasV8MMainline|Feature_Has8MSecExt, { MCK_CondCode, MCK_GPRnopc }, }, + { 2024 /* vlstm */, ARM::VLSTM, Convert__Reg1_1__CondCode2_0, Feature_HasV8MMainline|Feature_Has8MSecExt, { MCK_CondCode, MCK_GPRnopc }, }, + { 2030 /* vmax */, ARM::VMAXsv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 2030 /* vmax */, ARM::VMAXsv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 2030 /* vmax */, ARM::VMAXsv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 2030 /* vmax */, ARM::VMAXsv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 2030 /* vmax */, ARM::VMAXsv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR }, }, + { 2030 /* vmax */, ARM::VMAXsv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR }, }, + { 2030 /* vmax */, ARM::VMAXuv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR }, }, + { 2030 /* vmax */, ARM::VMAXuv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR }, }, + { 2030 /* vmax */, ARM::VMAXuv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR }, }, + { 2030 /* vmax */, ARM::VMAXuv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR }, }, + { 2030 /* vmax */, ARM::VMAXuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, }, + { 2030 /* vmax */, ARM::VMAXuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, }, + { 2030 /* vmax */, ARM::VMAXfq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 2030 /* vmax */, ARM::VMAXfd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2030 /* vmax */, ARM::VMAXhq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 2030 /* vmax */, ARM::VMAXhd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2030 /* vmax */, ARM::VMAXsv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2030 /* vmax */, ARM::VMAXsv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2030 /* vmax */, ARM::VMAXsv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2030 /* vmax */, ARM::VMAXsv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2030 /* vmax */, ARM::VMAXsv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2030 /* vmax */, ARM::VMAXsv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2030 /* vmax */, ARM::VMAXuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2030 /* vmax */, ARM::VMAXuv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2030 /* vmax */, ARM::VMAXuv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2030 /* vmax */, ARM::VMAXuv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2030 /* vmax */, ARM::VMAXuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2030 /* vmax */, ARM::VMAXuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2030 /* vmax */, ARM::VMAXfq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2030 /* vmax */, ARM::VMAXfd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2030 /* vmax */, ARM::VMAXhq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2030 /* vmax */, ARM::VMAXhd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2035 /* vmaxnm */, ARM::VMAXNMNQf, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON, { MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2035 /* vmaxnm */, ARM::VMAXNMNDf, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON, { MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2035 /* vmaxnm */, ARM::VMAXNMS, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK__DOT_f32, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2035 /* vmaxnm */, ARM::VMAXNMD, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2035 /* vmaxnm */, ARM::VMAXNMNQh, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2035 /* vmaxnm */, ARM::VMAXNMNDh, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2035 /* vmaxnm */, ARM::VMAXNMH, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasFullFP16, { MCK__DOT_f16, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2042 /* vmin */, ARM::VMINsv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 2042 /* vmin */, ARM::VMINsv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 2042 /* vmin */, ARM::VMINsv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 2042 /* vmin */, ARM::VMINsv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 2042 /* vmin */, ARM::VMINsv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR }, }, + { 2042 /* vmin */, ARM::VMINsv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR }, }, + { 2042 /* vmin */, ARM::VMINuv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR }, }, + { 2042 /* vmin */, ARM::VMINuv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR }, }, + { 2042 /* vmin */, ARM::VMINuv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR }, }, + { 2042 /* vmin */, ARM::VMINuv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR }, }, + { 2042 /* vmin */, ARM::VMINuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, }, + { 2042 /* vmin */, ARM::VMINuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, }, + { 2042 /* vmin */, ARM::VMINfq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 2042 /* vmin */, ARM::VMINfd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2042 /* vmin */, ARM::VMINhq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 2042 /* vmin */, ARM::VMINhd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2042 /* vmin */, ARM::VMINsv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2042 /* vmin */, ARM::VMINsv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2042 /* vmin */, ARM::VMINsv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2042 /* vmin */, ARM::VMINsv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2042 /* vmin */, ARM::VMINsv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2042 /* vmin */, ARM::VMINsv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2042 /* vmin */, ARM::VMINuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2042 /* vmin */, ARM::VMINuv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2042 /* vmin */, ARM::VMINuv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2042 /* vmin */, ARM::VMINuv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2042 /* vmin */, ARM::VMINuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2042 /* vmin */, ARM::VMINuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2042 /* vmin */, ARM::VMINfq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2042 /* vmin */, ARM::VMINfd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2042 /* vmin */, ARM::VMINhq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2042 /* vmin */, ARM::VMINhd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2047 /* vminnm */, ARM::VMINNMNQf, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON, { MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2047 /* vminnm */, ARM::VMINNMNDf, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON, { MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2047 /* vminnm */, ARM::VMINNMS, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK__DOT_f32, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2047 /* vminnm */, ARM::VMINNMD, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2047 /* vminnm */, ARM::VMINNMNQh, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2047 /* vminnm */, ARM::VMINNMNDh, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2047 /* vminnm */, ARM::VMINNMH, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasFullFP16, { MCK__DOT_f16, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2054 /* vmla */, ARM::VMLAfq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2054 /* vmla */, ARM::VMLAfd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2054 /* vmla */, ARM::VMLAS, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2054 /* vmla */, ARM::VMLAD, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2054 /* vmla */, ARM::VMLAv8i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2054 /* vmla */, ARM::VMLAv4i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2054 /* vmla */, ARM::VMLAv4i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2054 /* vmla */, ARM::VMLAv2i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2054 /* vmla */, ARM::VMLAv16i8, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2054 /* vmla */, ARM::VMLAv8i8, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2054 /* vmla */, ARM::VMLAhq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2054 /* vmla */, ARM::VMLAhd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2054 /* vmla */, ARM::VMLAH, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2054 /* vmla */, ARM::VMLAslfq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2054 /* vmla */, ARM::VMLAslfd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2054 /* vmla */, ARM::VMLAslv8i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_QPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2054 /* vmla */, ARM::VMLAslv4i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_DPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2054 /* vmla */, ARM::VMLAslv4i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_QPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2054 /* vmla */, ARM::VMLAslv2i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_DPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2054 /* vmla */, ARM::VMLAslhq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2054 /* vmla */, ARM::VMLAslhd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2059 /* vmlal */, ARM::VMLALsv4i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2059 /* vmlal */, ARM::VMLALsv2i64, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2059 /* vmlal */, ARM::VMLALsv8i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2059 /* vmlal */, ARM::VMLALuv4i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2059 /* vmlal */, ARM::VMLALuv2i64, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2059 /* vmlal */, ARM::VMLALuv8i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2059 /* vmlal */, ARM::VMLALslsv4i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_DPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2059 /* vmlal */, ARM::VMLALslsv2i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_DPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2059 /* vmlal */, ARM::VMLALsluv4i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_DPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2059 /* vmlal */, ARM::VMLALsluv2i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_DPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2065 /* vmls */, ARM::VMLSfq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2065 /* vmls */, ARM::VMLSfd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2065 /* vmls */, ARM::VMLSS, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2065 /* vmls */, ARM::VMLSD, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2065 /* vmls */, ARM::VMLSv8i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2065 /* vmls */, ARM::VMLSv4i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2065 /* vmls */, ARM::VMLSv4i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2065 /* vmls */, ARM::VMLSv2i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2065 /* vmls */, ARM::VMLSv16i8, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2065 /* vmls */, ARM::VMLSv8i8, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2065 /* vmls */, ARM::VMLShq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2065 /* vmls */, ARM::VMLShd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2065 /* vmls */, ARM::VMLSH, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2065 /* vmls */, ARM::VMLSslfq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2065 /* vmls */, ARM::VMLSslfd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2065 /* vmls */, ARM::VMLSslv8i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_QPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2065 /* vmls */, ARM::VMLSslv4i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_DPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2065 /* vmls */, ARM::VMLSslv4i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_QPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2065 /* vmls */, ARM::VMLSslv2i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_DPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2065 /* vmls */, ARM::VMLSslhq, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2065 /* vmls */, ARM::VMLSslhd, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2070 /* vmlsl */, ARM::VMLSLsv4i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2070 /* vmlsl */, ARM::VMLSLsv2i64, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2070 /* vmlsl */, ARM::VMLSLsv8i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2070 /* vmlsl */, ARM::VMLSLuv4i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2070 /* vmlsl */, ARM::VMLSLuv2i64, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2070 /* vmlsl */, ARM::VMLSLuv8i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2070 /* vmlsl */, ARM::VMLSLslsv4i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_DPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2070 /* vmlsl */, ARM::VMLSLslsv2i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_DPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2070 /* vmlsl */, ARM::VMLSLsluv4i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_DPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2070 /* vmlsl */, ARM::VMLSLsluv2i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_DPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2076 /* vmov */, ARM::VMOVRS, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK_SPR }, }, + { 2076 /* vmov */, ARM::VORRq, Convert__Reg1_1__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_QPR, MCK_QPR }, }, + { 2076 /* vmov */, ARM::VORRd, Convert__Reg1_1__Reg1_2__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_DPR, MCK_DPR }, }, + { 2076 /* vmov */, ARM::VMOVSR, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_SPR, MCK_GPR }, }, + { 2076 /* vmov */, ARM::VMOVS, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_SPR, MCK_SPR }, }, + { 2076 /* vmov */, ARM::VMOVv4f32, Convert__Reg1_2__FPImm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_FPImm }, }, + { 2076 /* vmov */, ARM::VMOVv4i32, Convert__Reg1_2__NEONi32vmov1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_NEONi32vmov }, }, + { 2076 /* vmov */, ARM::VMOVv2f32, Convert__Reg1_2__FPImm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_FPImm }, }, + { 2076 /* vmov */, ARM::VMOVv2i32, Convert__Reg1_2__NEONi32vmov1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_NEONi32vmov }, }, + { 2076 /* vmov */, ARM::VMOVS, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 2076 /* vmov */, ARM::FCONSTS, Convert__Reg1_2__FPImm1_3__CondCode2_0, Feature_HasVFP3, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_FPImm }, }, + { 2076 /* vmov */, ARM::VMOVD, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 2076 /* vmov */, ARM::FCONSTD, Convert__Reg1_2__FPImm1_3__CondCode2_0, Feature_HasVFP3|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_FPImm }, }, + { 2076 /* vmov */, ARM::VMOVv8i16, Convert__Reg1_2__NEONi16splat1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_NEONi16splat }, }, + { 2076 /* vmov */, ARM::VMOVv16i8, Convert__Reg1_2__NEONi16vmovByteReplicate1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_NEONi16vmovByteReplicate }, }, + { 2076 /* vmov */, ARM::VMOVv4i16, Convert__Reg1_2__NEONi16splat1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_NEONi16splat }, }, + { 2076 /* vmov */, ARM::VMOVv8i8, Convert__Reg1_2__NEONi16vmovByteReplicate1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_NEONi16vmovByteReplicate }, }, + { 2076 /* vmov */, ARM::VMOVv4i32, Convert__Reg1_2__NEONi32vmov1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_NEONi32vmov }, }, + { 2076 /* vmov */, ARM::VMOVv16i8, Convert__Reg1_2__NEONi32vmovByteReplicate1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_NEONi32vmovByteReplicate }, }, + { 2076 /* vmov */, ARM::VMVNv4i32, Convert__Reg1_2__NEONi32vmovNeg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_NEONi32vmovNeg }, }, + { 2076 /* vmov */, ARM::VMOVv2i32, Convert__Reg1_2__NEONi32vmov1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_NEONi32vmov }, }, + { 2076 /* vmov */, ARM::VMOVv8i8, Convert__Reg1_2__NEONi32vmovByteReplicate1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_NEONi32vmovByteReplicate }, }, + { 2076 /* vmov */, ARM::VMVNv2i32, Convert__Reg1_2__NEONi32vmovNeg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_NEONi32vmovNeg }, }, + { 2076 /* vmov */, ARM::VMOVv2i64, Convert__Reg1_2__NEONi64splat1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i64, MCK_QPR, MCK_NEONi64splat }, }, + { 2076 /* vmov */, ARM::VMOVv1i64, Convert__Reg1_2__NEONi64splat1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i64, MCK_DPR, MCK_NEONi64splat }, }, + { 2076 /* vmov */, ARM::VMOVv16i8, Convert__Reg1_2__NEONi8splat1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_QPR, MCK_NEONi8splat }, }, + { 2076 /* vmov */, ARM::VMOVv8i8, Convert__Reg1_2__NEONi8splat1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_DPR, MCK_NEONi8splat }, }, + { 2076 /* vmov */, ARM::VMOVRS, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_16, MCK_GPR, MCK_SPR }, }, + { 2076 /* vmov */, ARM::VORRq, Convert__Reg1_2__Reg1_3__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR }, }, + { 2076 /* vmov */, ARM::VORRd, Convert__Reg1_2__Reg1_3__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR }, }, + { 2076 /* vmov */, ARM::VMOVSR, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_16, MCK_SPR, MCK_GPR }, }, + { 2076 /* vmov */, ARM::VMOVRS, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_32, MCK_GPR, MCK_SPR }, }, + { 2076 /* vmov */, ARM::VORRq, Convert__Reg1_2__Reg1_3__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_QPR }, }, + { 2076 /* vmov */, ARM::VORRd, Convert__Reg1_2__Reg1_3__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR }, }, + { 2076 /* vmov */, ARM::VMOVSR, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_32, MCK_SPR, MCK_GPR }, }, + { 2076 /* vmov */, ARM::VORRq, Convert__Reg1_2__Reg1_3__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_QPR, MCK_QPR }, }, + { 2076 /* vmov */, ARM::VORRd, Convert__Reg1_2__Reg1_3__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_DPR, MCK_DPR }, }, + { 2076 /* vmov */, ARM::VMOVRS, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_8, MCK_GPR, MCK_SPR }, }, + { 2076 /* vmov */, ARM::VORRq, Convert__Reg1_2__Reg1_3__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR }, }, + { 2076 /* vmov */, ARM::VORRd, Convert__Reg1_2__Reg1_3__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR }, }, + { 2076 /* vmov */, ARM::VMOVSR, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_8, MCK_SPR, MCK_GPR }, }, + { 2076 /* vmov */, ARM::VMOVRH, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_GPR, MCK_SPR }, }, + { 2076 /* vmov */, ARM::VMOVHR, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_GPR }, }, + { 2076 /* vmov */, ARM::FCONSTH, Convert__Reg1_2__FPImm1_3__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_FPImm }, }, + { 2076 /* vmov */, ARM::VMOVRRD, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_DPR }, }, + { 2076 /* vmov */, ARM::VMOVDRR, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_DPR, MCK_GPR, MCK_GPR }, }, + { 2076 /* vmov */, ARM::VGETLNs16, Convert__Reg1_2__Reg1_3__VectorIndex161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_GPR, MCK_DPR, MCK_VectorIndex16 }, }, + { 2076 /* vmov */, ARM::VGETLNs8, Convert__Reg1_2__Reg1_3__VectorIndex81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_GPR, MCK_DPR, MCK_VectorIndex8 }, }, + { 2076 /* vmov */, ARM::VGETLNu16, Convert__Reg1_2__Reg1_3__VectorIndex161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_GPR, MCK_DPR, MCK_VectorIndex16 }, }, + { 2076 /* vmov */, ARM::VGETLNu8, Convert__Reg1_2__Reg1_3__VectorIndex81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_GPR, MCK_DPR, MCK_VectorIndex8 }, }, + { 2076 /* vmov */, ARM::VMOVRRD, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f64, MCK_GPR, MCK_GPR, MCK_DPR }, }, + { 2076 /* vmov */, ARM::VMOVDRR, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_GPR, MCK_GPR }, }, + { 2076 /* vmov */, ARM::VSETLNi16, Convert__Reg1_2__Tie0__Reg1_4__VectorIndex161_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_VectorIndex16, MCK_GPR }, }, + { 2076 /* vmov */, ARM::VGETLNi32, Convert__Reg1_2__Reg1_3__VectorIndex321_4__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_32, MCK_GPR, MCK_DPR, MCK_VectorIndex32 }, }, + { 2076 /* vmov */, ARM::VSETLNi32, Convert__Reg1_2__Tie0__Reg1_4__VectorIndex321_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_VectorIndex32, MCK_GPR }, }, + { 2076 /* vmov */, ARM::VSETLNi8, Convert__Reg1_2__Tie0__Reg1_4__VectorIndex81_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_VectorIndex8, MCK_GPR }, }, + { 2076 /* vmov */, ARM::VMOVRRS, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK_GPR, MCK_SPR, MCK_SPR }, }, + { 2076 /* vmov */, ARM::VMOVSRR, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_SPR, MCK_SPR, MCK_GPR, MCK_GPR }, }, + { 2081 /* vmovl */, ARM::VMOVLsv4i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_DPR }, }, + { 2081 /* vmovl */, ARM::VMOVLsv2i64, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_DPR }, }, + { 2081 /* vmovl */, ARM::VMOVLsv8i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_DPR }, }, + { 2081 /* vmovl */, ARM::VMOVLuv4i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_DPR }, }, + { 2081 /* vmovl */, ARM::VMOVLuv2i64, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_DPR }, }, + { 2081 /* vmovl */, ARM::VMOVLuv8i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_DPR }, }, + { 2087 /* vmovn */, ARM::VMOVNv8i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_QPR }, }, + { 2087 /* vmovn */, ARM::VMOVNv4i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_QPR }, }, + { 2087 /* vmovn */, ARM::VMOVNv2i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i64, MCK_DPR, MCK_QPR }, }, + { 2093 /* vmovx */, ARM::VMOVH, Convert__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 2099 /* vmrs */, ARM::FMSTAT, Convert__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_APSR_NZCV, MCK_FPSCR }, }, + { 2099 /* vmrs */, ARM::VMRS_FPEXC, Convert__Reg1_1__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK_FPEXC }, }, + { 2099 /* vmrs */, ARM::VMRS_FPINST, Convert__Reg1_1__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK_FPINST }, }, + { 2099 /* vmrs */, ARM::VMRS_FPINST2, Convert__Reg1_1__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK_FPINST2 }, }, + { 2099 /* vmrs */, ARM::VMRS, Convert__Reg1_1__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK_FPSCR }, }, + { 2099 /* vmrs */, ARM::VMRS_FPSID, Convert__Reg1_1__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK_FPSID }, }, + { 2099 /* vmrs */, ARM::VMRS_MVFR0, Convert__Reg1_1__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK_MVFR0 }, }, + { 2099 /* vmrs */, ARM::VMRS_MVFR1, Convert__Reg1_1__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK_MVFR1 }, }, + { 2099 /* vmrs */, ARM::VMRS_MVFR2, Convert__Reg1_1__CondCode2_0, Feature_HasFPARMv8, { MCK_CondCode, MCK_GPR, MCK_MVFR2 }, }, + { 2104 /* vmsr */, ARM::VMSR_FPEXC, Convert__Reg1_2__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_FPEXC, MCK_GPR }, }, + { 2104 /* vmsr */, ARM::VMSR_FPINST, Convert__Reg1_2__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_FPINST, MCK_GPR }, }, + { 2104 /* vmsr */, ARM::VMSR_FPINST2, Convert__Reg1_2__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_FPINST2, MCK_GPR }, }, + { 2104 /* vmsr */, ARM::VMSR, Convert__Reg1_2__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_FPSCR, MCK_GPR }, }, + { 2104 /* vmsr */, ARM::VMSR_FPSID, Convert__Reg1_2__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_FPSID, MCK_GPR }, }, + { 2109 /* vmul */, ARM::VMULfq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 2109 /* vmul */, ARM::VMULfd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2109 /* vmul */, ARM::VMULS, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 2109 /* vmul */, ARM::VMULD, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 2109 /* vmul */, ARM::VMULv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_QPR }, }, + { 2109 /* vmul */, ARM::VMULv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_DPR }, }, + { 2109 /* vmul */, ARM::VMULv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_QPR }, }, + { 2109 /* vmul */, ARM::VMULv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_DPR }, }, + { 2109 /* vmul */, ARM::VMULv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_QPR, MCK_QPR }, }, + { 2109 /* vmul */, ARM::VMULv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_DPR, MCK_DPR }, }, + { 2109 /* vmul */, ARM::VMULpq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_p8, MCK_QPR, MCK_QPR }, }, + { 2109 /* vmul */, ARM::VMULpd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_p8, MCK_DPR, MCK_DPR }, }, + { 2109 /* vmul */, ARM::VMULhq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 2109 /* vmul */, ARM::VMULhd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2109 /* vmul */, ARM::VMULH, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 2109 /* vmul */, ARM::VMULslfq, Convert__Reg1_2__Reg1_2__Reg1_3__VectorIndex321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2109 /* vmul */, ARM::VMULfq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2109 /* vmul */, ARM::VMULslfd, Convert__Reg1_2__Reg1_2__Reg1_3__VectorIndex321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2109 /* vmul */, ARM::VMULfd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2109 /* vmul */, ARM::VMULS, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2109 /* vmul */, ARM::VMULD, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2109 /* vmul */, ARM::VMULslv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__VectorIndex161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2109 /* vmul */, ARM::VMULv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2109 /* vmul */, ARM::VMULslv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__VectorIndex161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2109 /* vmul */, ARM::VMULv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2109 /* vmul */, ARM::VMULslv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__VectorIndex321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2109 /* vmul */, ARM::VMULv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2109 /* vmul */, ARM::VMULslv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__VectorIndex321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2109 /* vmul */, ARM::VMULv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2109 /* vmul */, ARM::VMULv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2109 /* vmul */, ARM::VMULv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2109 /* vmul */, ARM::VMULpq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_p8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2109 /* vmul */, ARM::VMULpd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_p8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2109 /* vmul */, ARM::VMULslhq, Convert__Reg1_2__Reg1_2__Reg1_3__VectorIndex161_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2109 /* vmul */, ARM::VMULhq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2109 /* vmul */, ARM::VMULslhd, Convert__Reg1_2__Reg1_2__Reg1_3__VectorIndex161_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2109 /* vmul */, ARM::VMULhd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2109 /* vmul */, ARM::VMULH, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2109 /* vmul */, ARM::VMULslfq, Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2109 /* vmul */, ARM::VMULslfd, Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2109 /* vmul */, ARM::VMULslv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_QPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2109 /* vmul */, ARM::VMULslv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_DPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2109 /* vmul */, ARM::VMULslv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_QPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2109 /* vmul */, ARM::VMULslv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_DPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2109 /* vmul */, ARM::VMULslhq, Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2109 /* vmul */, ARM::VMULslhd, Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2114 /* vmull */, ARM::VMULLp64, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasV8|Feature_HasCrypto, { MCK__DOT_p64, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2114 /* vmull */, ARM::VMULLsv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2114 /* vmull */, ARM::VMULLsv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2114 /* vmull */, ARM::VMULLsv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2114 /* vmull */, ARM::VMULLuv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2114 /* vmull */, ARM::VMULLuv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2114 /* vmull */, ARM::VMULLuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2114 /* vmull */, ARM::VMULLp8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_p8, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2114 /* vmull */, ARM::VMULLslsv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_DPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2114 /* vmull */, ARM::VMULLslsv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_DPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2114 /* vmull */, ARM::VMULLsluv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_DPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2114 /* vmull */, ARM::VMULLsluv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_DPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2120 /* vmvn */, ARM::VMVNq, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_QPR, MCK_QPR }, }, + { 2120 /* vmvn */, ARM::VMVNd, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_DPR, MCK_DPR }, }, + { 2120 /* vmvn */, ARM::VMVNv8i16, Convert__Reg1_2__NEONi16splat1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_NEONi16splat }, }, + { 2120 /* vmvn */, ARM::VMOVv16i8, Convert__Reg1_2__NEONi16invByteReplicate1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_NEONi16invByteReplicate }, }, + { 2120 /* vmvn */, ARM::VMVNv4i16, Convert__Reg1_2__NEONi16splat1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_NEONi16splat }, }, + { 2120 /* vmvn */, ARM::VMOVv8i8, Convert__Reg1_2__NEONi16invByteReplicate1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_NEONi16invByteReplicate }, }, + { 2120 /* vmvn */, ARM::VMVNv4i32, Convert__Reg1_2__NEONi32vmov1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_NEONi32vmov }, }, + { 2120 /* vmvn */, ARM::VMOVv4i32, Convert__Reg1_2__NEONi32vmovNeg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_NEONi32vmovNeg }, }, + { 2120 /* vmvn */, ARM::VMOVv16i8, Convert__Reg1_2__NEONi32invByteReplicate1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_NEONi32invByteReplicate }, }, + { 2120 /* vmvn */, ARM::VMVNv2i32, Convert__Reg1_2__NEONi32vmov1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_NEONi32vmov }, }, + { 2120 /* vmvn */, ARM::VMOVv2i32, Convert__Reg1_2__NEONi32vmovNeg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_NEONi32vmovNeg }, }, + { 2120 /* vmvn */, ARM::VMOVv8i8, Convert__Reg1_2__NEONi32invByteReplicate1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_NEONi32invByteReplicate }, }, + { 2120 /* vmvn */, ARM::VMVNq, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR }, }, + { 2120 /* vmvn */, ARM::VMVNd, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR }, }, + { 2120 /* vmvn */, ARM::VMVNq, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_QPR }, }, + { 2120 /* vmvn */, ARM::VMVNd, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR }, }, + { 2120 /* vmvn */, ARM::VMVNq, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_QPR, MCK_QPR }, }, + { 2120 /* vmvn */, ARM::VMVNd, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_DPR, MCK_DPR }, }, + { 2120 /* vmvn */, ARM::VMVNq, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR }, }, + { 2120 /* vmvn */, ARM::VMVNd, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR }, }, + { 2125 /* vneg */, ARM::VNEGs16q, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 2125 /* vneg */, ARM::VNEGs16d, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 2125 /* vneg */, ARM::VNEGs32q, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 2125 /* vneg */, ARM::VNEGs32d, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 2125 /* vneg */, ARM::VNEGs8q, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR }, }, + { 2125 /* vneg */, ARM::VNEGs8d, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR }, }, + { 2125 /* vneg */, ARM::VNEGf32q, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 2125 /* vneg */, ARM::VNEGfd, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2125 /* vneg */, ARM::VNEGS, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 2125 /* vneg */, ARM::VNEGD, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 2125 /* vneg */, ARM::VNEGhq, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 2125 /* vneg */, ARM::VNEGhd, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2125 /* vneg */, ARM::VNEGH, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 2130 /* vnmla */, ARM::VNMLAS, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2130 /* vnmla */, ARM::VNMLAD, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2130 /* vnmla */, ARM::VNMLAH, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2136 /* vnmls */, ARM::VNMLSS, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2136 /* vnmls */, ARM::VNMLSD, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2136 /* vnmls */, ARM::VNMLSH, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2142 /* vnmul */, ARM::VNMULS, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2142 /* vnmul */, ARM::VNMULD, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2142 /* vnmul */, ARM::VNMULH, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2148 /* vorn */, ARM::VORNq, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2148 /* vorn */, ARM::VORNd, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2153 /* vorr */, ARM::VORRq, Convert__Reg1_1__Reg1_1__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_QPR, MCK_QPR }, }, + { 2153 /* vorr */, ARM::VORRd, Convert__Reg1_1__Reg1_1__Reg1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_DPR, MCK_DPR }, }, + { 2153 /* vorr */, ARM::VORRiv8i16, Convert__Reg1_2__NEONi16splat1_3__Tie0__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_NEONi16splat }, }, + { 2153 /* vorr */, ARM::VORRiv4i16, Convert__Reg1_2__NEONi16splat1_3__Tie0__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_NEONi16splat }, }, + { 2153 /* vorr */, ARM::VORRiv4i32, Convert__Reg1_2__NEONi32splat1_3__Tie0__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_NEONi32splat }, }, + { 2153 /* vorr */, ARM::VORRiv2i32, Convert__Reg1_2__NEONi32splat1_3__Tie0__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_NEONi32splat }, }, + { 2153 /* vorr */, ARM::VORRq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR }, }, + { 2153 /* vorr */, ARM::VORRd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR }, }, + { 2153 /* vorr */, ARM::VORRq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_QPR }, }, + { 2153 /* vorr */, ARM::VORRd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR }, }, + { 2153 /* vorr */, ARM::VORRq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_QPR, MCK_QPR }, }, + { 2153 /* vorr */, ARM::VORRd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_DPR, MCK_DPR }, }, + { 2153 /* vorr */, ARM::VORRq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR }, }, + { 2153 /* vorr */, ARM::VORRd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR }, }, + { 2153 /* vorr */, ARM::VORRq, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2153 /* vorr */, ARM::VORRd, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2153 /* vorr */, ARM::VORRq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2153 /* vorr */, ARM::VORRd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2153 /* vorr */, ARM::VORRq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2153 /* vorr */, ARM::VORRd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2153 /* vorr */, ARM::VORRq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2153 /* vorr */, ARM::VORRd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2153 /* vorr */, ARM::VORRq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2153 /* vorr */, ARM::VORRd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2158 /* vpadal */, ARM::VPADALsv8i16, Convert__Reg1_2__Tie0__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 2158 /* vpadal */, ARM::VPADALsv4i16, Convert__Reg1_2__Tie0__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 2158 /* vpadal */, ARM::VPADALsv4i32, Convert__Reg1_2__Tie0__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 2158 /* vpadal */, ARM::VPADALsv2i32, Convert__Reg1_2__Tie0__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 2158 /* vpadal */, ARM::VPADALsv16i8, Convert__Reg1_2__Tie0__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR }, }, + { 2158 /* vpadal */, ARM::VPADALsv8i8, Convert__Reg1_2__Tie0__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR }, }, + { 2158 /* vpadal */, ARM::VPADALuv8i16, Convert__Reg1_2__Tie0__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR }, }, + { 2158 /* vpadal */, ARM::VPADALuv4i16, Convert__Reg1_2__Tie0__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR }, }, + { 2158 /* vpadal */, ARM::VPADALuv4i32, Convert__Reg1_2__Tie0__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR }, }, + { 2158 /* vpadal */, ARM::VPADALuv2i32, Convert__Reg1_2__Tie0__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR }, }, + { 2158 /* vpadal */, ARM::VPADALuv16i8, Convert__Reg1_2__Tie0__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, }, + { 2158 /* vpadal */, ARM::VPADALuv8i8, Convert__Reg1_2__Tie0__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, }, + { 2165 /* vpadd */, ARM::VPADDf, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2165 /* vpadd */, ARM::VPADDi16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_DPR }, }, + { 2165 /* vpadd */, ARM::VPADDi32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_DPR }, }, + { 2165 /* vpadd */, ARM::VPADDi8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_DPR, MCK_DPR }, }, + { 2165 /* vpadd */, ARM::VPADDh, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2165 /* vpadd */, ARM::VPADDf, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2165 /* vpadd */, ARM::VPADDi16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2165 /* vpadd */, ARM::VPADDi32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2165 /* vpadd */, ARM::VPADDi8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2165 /* vpadd */, ARM::VPADDh, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2171 /* vpaddl */, ARM::VPADDLsv8i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 2171 /* vpaddl */, ARM::VPADDLsv4i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 2171 /* vpaddl */, ARM::VPADDLsv4i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 2171 /* vpaddl */, ARM::VPADDLsv2i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 2171 /* vpaddl */, ARM::VPADDLsv16i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR }, }, + { 2171 /* vpaddl */, ARM::VPADDLsv8i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR }, }, + { 2171 /* vpaddl */, ARM::VPADDLuv8i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR }, }, + { 2171 /* vpaddl */, ARM::VPADDLuv4i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR }, }, + { 2171 /* vpaddl */, ARM::VPADDLuv4i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR }, }, + { 2171 /* vpaddl */, ARM::VPADDLuv2i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR }, }, + { 2171 /* vpaddl */, ARM::VPADDLuv16i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, }, + { 2171 /* vpaddl */, ARM::VPADDLuv8i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, }, + { 2178 /* vpmax */, ARM::VPMAXs16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 2178 /* vpmax */, ARM::VPMAXs32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 2178 /* vpmax */, ARM::VPMAXs8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR }, }, + { 2178 /* vpmax */, ARM::VPMAXu16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR }, }, + { 2178 /* vpmax */, ARM::VPMAXu32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR }, }, + { 2178 /* vpmax */, ARM::VPMAXu8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, }, + { 2178 /* vpmax */, ARM::VPMAXf, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2178 /* vpmax */, ARM::VPMAXh, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2178 /* vpmax */, ARM::VPMAXs16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2178 /* vpmax */, ARM::VPMAXs32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2178 /* vpmax */, ARM::VPMAXs8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2178 /* vpmax */, ARM::VPMAXu16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2178 /* vpmax */, ARM::VPMAXu32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2178 /* vpmax */, ARM::VPMAXu8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2178 /* vpmax */, ARM::VPMAXf, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2178 /* vpmax */, ARM::VPMAXh, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2184 /* vpmin */, ARM::VPMINs16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 2184 /* vpmin */, ARM::VPMINs32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 2184 /* vpmin */, ARM::VPMINs8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR }, }, + { 2184 /* vpmin */, ARM::VPMINu16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR }, }, + { 2184 /* vpmin */, ARM::VPMINu32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR }, }, + { 2184 /* vpmin */, ARM::VPMINu8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, }, + { 2184 /* vpmin */, ARM::VPMINf, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2184 /* vpmin */, ARM::VPMINh, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2184 /* vpmin */, ARM::VPMINs16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2184 /* vpmin */, ARM::VPMINs32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2184 /* vpmin */, ARM::VPMINs8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2184 /* vpmin */, ARM::VPMINu16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2184 /* vpmin */, ARM::VPMINu32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2184 /* vpmin */, ARM::VPMINu8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2184 /* vpmin */, ARM::VPMINf, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2184 /* vpmin */, ARM::VPMINh, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2190 /* vpop */, ARM::VLDMDIA_UPD, Convert__regSP__Tie0__CondCode2_0__DPRRegList1_1, Feature_HasVFP2, { MCK_CondCode, MCK_DPRRegList }, }, + { 2190 /* vpop */, ARM::VLDMSIA_UPD, Convert__regSP__Tie0__CondCode2_0__SPRRegList1_1, Feature_HasVFP2, { MCK_CondCode, MCK_SPRRegList }, }, + { 2190 /* vpop */, ARM::VLDMDIA_UPD, Convert__regSP__Tie0__CondCode2_0__DPRRegList1_2, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_16, MCK_DPRRegList }, }, + { 2190 /* vpop */, ARM::VLDMSIA_UPD, Convert__regSP__Tie0__CondCode2_0__SPRRegList1_2, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_16, MCK_SPRRegList }, }, + { 2190 /* vpop */, ARM::VLDMDIA_UPD, Convert__regSP__Tie0__CondCode2_0__DPRRegList1_2, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_32, MCK_DPRRegList }, }, + { 2190 /* vpop */, ARM::VLDMSIA_UPD, Convert__regSP__Tie0__CondCode2_0__SPRRegList1_2, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_32, MCK_SPRRegList }, }, + { 2190 /* vpop */, ARM::VLDMDIA_UPD, Convert__regSP__Tie0__CondCode2_0__DPRRegList1_2, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_64, MCK_DPRRegList }, }, + { 2190 /* vpop */, ARM::VLDMSIA_UPD, Convert__regSP__Tie0__CondCode2_0__SPRRegList1_2, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_64, MCK_SPRRegList }, }, + { 2190 /* vpop */, ARM::VLDMDIA_UPD, Convert__regSP__Tie0__CondCode2_0__DPRRegList1_2, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_8, MCK_DPRRegList }, }, + { 2190 /* vpop */, ARM::VLDMSIA_UPD, Convert__regSP__Tie0__CondCode2_0__SPRRegList1_2, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_8, MCK_SPRRegList }, }, + { 2195 /* vpush */, ARM::VSTMDDB_UPD, Convert__regSP__Tie0__CondCode2_0__DPRRegList1_1, Feature_HasVFP2, { MCK_CondCode, MCK_DPRRegList }, }, + { 2195 /* vpush */, ARM::VSTMSDB_UPD, Convert__regSP__Tie0__CondCode2_0__SPRRegList1_1, Feature_HasVFP2, { MCK_CondCode, MCK_SPRRegList }, }, + { 2195 /* vpush */, ARM::VSTMDDB_UPD, Convert__regSP__Tie0__CondCode2_0__DPRRegList1_2, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_16, MCK_DPRRegList }, }, + { 2195 /* vpush */, ARM::VSTMSDB_UPD, Convert__regSP__Tie0__CondCode2_0__SPRRegList1_2, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_16, MCK_SPRRegList }, }, + { 2195 /* vpush */, ARM::VSTMDDB_UPD, Convert__regSP__Tie0__CondCode2_0__DPRRegList1_2, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_32, MCK_DPRRegList }, }, + { 2195 /* vpush */, ARM::VSTMSDB_UPD, Convert__regSP__Tie0__CondCode2_0__SPRRegList1_2, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_32, MCK_SPRRegList }, }, + { 2195 /* vpush */, ARM::VSTMDDB_UPD, Convert__regSP__Tie0__CondCode2_0__DPRRegList1_2, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_64, MCK_DPRRegList }, }, + { 2195 /* vpush */, ARM::VSTMSDB_UPD, Convert__regSP__Tie0__CondCode2_0__SPRRegList1_2, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_64, MCK_SPRRegList }, }, + { 2195 /* vpush */, ARM::VSTMDDB_UPD, Convert__regSP__Tie0__CondCode2_0__DPRRegList1_2, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_8, MCK_DPRRegList }, }, + { 2195 /* vpush */, ARM::VSTMSDB_UPD, Convert__regSP__Tie0__CondCode2_0__SPRRegList1_2, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_8, MCK_SPRRegList }, }, + { 2201 /* vqabs */, ARM::VQABSv8i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 2201 /* vqabs */, ARM::VQABSv4i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 2201 /* vqabs */, ARM::VQABSv4i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 2201 /* vqabs */, ARM::VQABSv2i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 2201 /* vqabs */, ARM::VQABSv16i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR }, }, + { 2201 /* vqabs */, ARM::VQABSv8i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR }, }, + { 2207 /* vqadd */, ARM::VQADDsv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 2207 /* vqadd */, ARM::VQADDsv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 2207 /* vqadd */, ARM::VQADDsv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 2207 /* vqadd */, ARM::VQADDsv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 2207 /* vqadd */, ARM::VQADDsv2i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_QPR }, }, + { 2207 /* vqadd */, ARM::VQADDsv1i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_DPR }, }, + { 2207 /* vqadd */, ARM::VQADDsv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR }, }, + { 2207 /* vqadd */, ARM::VQADDsv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR }, }, + { 2207 /* vqadd */, ARM::VQADDuv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR }, }, + { 2207 /* vqadd */, ARM::VQADDuv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR }, }, + { 2207 /* vqadd */, ARM::VQADDuv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR }, }, + { 2207 /* vqadd */, ARM::VQADDuv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR }, }, + { 2207 /* vqadd */, ARM::VQADDuv2i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_QPR, MCK_QPR }, }, + { 2207 /* vqadd */, ARM::VQADDuv1i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_DPR }, }, + { 2207 /* vqadd */, ARM::VQADDuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, }, + { 2207 /* vqadd */, ARM::VQADDuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, }, + { 2207 /* vqadd */, ARM::VQADDsv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2207 /* vqadd */, ARM::VQADDsv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2207 /* vqadd */, ARM::VQADDsv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2207 /* vqadd */, ARM::VQADDsv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2207 /* vqadd */, ARM::VQADDsv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2207 /* vqadd */, ARM::VQADDsv1i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2207 /* vqadd */, ARM::VQADDsv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2207 /* vqadd */, ARM::VQADDsv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2207 /* vqadd */, ARM::VQADDuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2207 /* vqadd */, ARM::VQADDuv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2207 /* vqadd */, ARM::VQADDuv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2207 /* vqadd */, ARM::VQADDuv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2207 /* vqadd */, ARM::VQADDuv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2207 /* vqadd */, ARM::VQADDuv1i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2207 /* vqadd */, ARM::VQADDuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2207 /* vqadd */, ARM::VQADDuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2213 /* vqdmlal */, ARM::VQDMLALv4i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2213 /* vqdmlal */, ARM::VQDMLALv2i64, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2213 /* vqdmlal */, ARM::VQDMLALslv4i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_DPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2213 /* vqdmlal */, ARM::VQDMLALslv2i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_DPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2221 /* vqdmlsl */, ARM::VQDMLSLv4i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2221 /* vqdmlsl */, ARM::VQDMLSLv2i64, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2221 /* vqdmlsl */, ARM::VQDMLSLslv4i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_DPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2221 /* vqdmlsl */, ARM::VQDMLSLslv2i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_DPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2229 /* vqdmulh */, ARM::VQDMULHv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 2229 /* vqdmulh */, ARM::VQDMULHv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 2229 /* vqdmulh */, ARM::VQDMULHv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 2229 /* vqdmulh */, ARM::VQDMULHv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 2229 /* vqdmulh */, ARM::VQDMULHv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2229 /* vqdmulh */, ARM::VQDMULHv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2229 /* vqdmulh */, ARM::VQDMULHv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2229 /* vqdmulh */, ARM::VQDMULHv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2229 /* vqdmulh */, ARM::VQDMULHslv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2229 /* vqdmulh */, ARM::VQDMULHslv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2229 /* vqdmulh */, ARM::VQDMULHslv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2229 /* vqdmulh */, ARM::VQDMULHslv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2237 /* vqdmull */, ARM::VQDMULLv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2237 /* vqdmull */, ARM::VQDMULLv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2237 /* vqdmull */, ARM::VQDMULLslv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_DPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2237 /* vqdmull */, ARM::VQDMULLslv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_DPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2245 /* vqmovn */, ARM::VQMOVNsv8i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_QPR }, }, + { 2245 /* vqmovn */, ARM::VQMOVNsv4i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_QPR }, }, + { 2245 /* vqmovn */, ARM::VQMOVNsv2i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_QPR }, }, + { 2245 /* vqmovn */, ARM::VQMOVNuv8i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_QPR }, }, + { 2245 /* vqmovn */, ARM::VQMOVNuv4i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_QPR }, }, + { 2245 /* vqmovn */, ARM::VQMOVNuv2i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_QPR }, }, + { 2252 /* vqmovun */, ARM::VQMOVNsuv8i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_QPR }, }, + { 2252 /* vqmovun */, ARM::VQMOVNsuv4i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_QPR }, }, + { 2252 /* vqmovun */, ARM::VQMOVNsuv2i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_QPR }, }, + { 2260 /* vqneg */, ARM::VQNEGv8i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 2260 /* vqneg */, ARM::VQNEGv4i16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 2260 /* vqneg */, ARM::VQNEGv4i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 2260 /* vqneg */, ARM::VQNEGv2i32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 2260 /* vqneg */, ARM::VQNEGv16i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR }, }, + { 2260 /* vqneg */, ARM::VQNEGv8i8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR }, }, + { 2266 /* vqrdmlah */, ARM::VQRDMLAHv8i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasV8_1a, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2266 /* vqrdmlah */, ARM::VQRDMLAHv4i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasV8_1a, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2266 /* vqrdmlah */, ARM::VQRDMLAHv4i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasV8_1a, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2266 /* vqrdmlah */, ARM::VQRDMLAHv2i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasV8_1a, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2266 /* vqrdmlah */, ARM::VQRDMLAHslv8i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON|Feature_HasV8_1a, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2266 /* vqrdmlah */, ARM::VQRDMLAHslv4i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON|Feature_HasV8_1a, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2266 /* vqrdmlah */, ARM::VQRDMLAHslv4i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON|Feature_HasV8_1a, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2266 /* vqrdmlah */, ARM::VQRDMLAHslv2i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON|Feature_HasV8_1a, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2275 /* vqrdmlsh */, ARM::VQRDMLSHv8i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasV8_1a, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2275 /* vqrdmlsh */, ARM::VQRDMLSHv4i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasV8_1a, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2275 /* vqrdmlsh */, ARM::VQRDMLSHv4i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasV8_1a, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2275 /* vqrdmlsh */, ARM::VQRDMLSHv2i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasV8_1a, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2275 /* vqrdmlsh */, ARM::VQRDMLSHslv8i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON|Feature_HasV8_1a, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2275 /* vqrdmlsh */, ARM::VQRDMLSHslv4i16, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON|Feature_HasV8_1a, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2275 /* vqrdmlsh */, ARM::VQRDMLSHslv4i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON|Feature_HasV8_1a, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2275 /* vqrdmlsh */, ARM::VQRDMLSHslv2i32, Convert__Reg1_2__Tie0__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON|Feature_HasV8_1a, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2284 /* vqrdmulh */, ARM::VQRDMULHv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 2284 /* vqrdmulh */, ARM::VQRDMULHv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 2284 /* vqrdmulh */, ARM::VQRDMULHv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 2284 /* vqrdmulh */, ARM::VQRDMULHv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 2284 /* vqrdmulh */, ARM::VQRDMULHv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2284 /* vqrdmulh */, ARM::VQRDMULHv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2284 /* vqrdmulh */, ARM::VQRDMULHv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2284 /* vqrdmulh */, ARM::VQRDMULHv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2284 /* vqrdmulh */, ARM::VQRDMULHslv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2284 /* vqrdmulh */, ARM::VQRDMULHslv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex161_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR_8, MCK_VectorIndex16 }, }, + { 2284 /* vqrdmulh */, ARM::VQRDMULHslv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2284 /* vqrdmulh */, ARM::VQRDMULHslv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__VectorIndex321_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR_VFP2, MCK_VectorIndex32 }, }, + { 2293 /* vqrshl */, ARM::VQRSHLsv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLsv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLsv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLsv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLsv2i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_QPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLsv1i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_DPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLsv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLsv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLuv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLuv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLuv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLuv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLuv2i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_QPR, MCK_QPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLuv1i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_DPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLsv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLsv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLsv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLsv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLsv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLsv1i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLsv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLsv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLuv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLuv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLuv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLuv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLuv1i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2293 /* vqrshl */, ARM::VQRSHLuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2300 /* vqrshrn */, ARM::VQRSHRNsv8i8, Convert__Reg1_2__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_QPR, MCK_ShrImm8 }, }, + { 2300 /* vqrshrn */, ARM::VQRSHRNsv4i16, Convert__Reg1_2__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_QPR, MCK_ShrImm16 }, }, + { 2300 /* vqrshrn */, ARM::VQRSHRNsv2i32, Convert__Reg1_2__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_QPR, MCK_ShrImm32 }, }, + { 2300 /* vqrshrn */, ARM::VQRSHRNuv8i8, Convert__Reg1_2__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_QPR, MCK_ShrImm8 }, }, + { 2300 /* vqrshrn */, ARM::VQRSHRNuv4i16, Convert__Reg1_2__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_QPR, MCK_ShrImm16 }, }, + { 2300 /* vqrshrn */, ARM::VQRSHRNuv2i32, Convert__Reg1_2__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_QPR, MCK_ShrImm32 }, }, + { 2308 /* vqrshrun */, ARM::VQRSHRUNv8i8, Convert__Reg1_2__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_QPR, MCK_ShrImm8 }, }, + { 2308 /* vqrshrun */, ARM::VQRSHRUNv4i16, Convert__Reg1_2__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_QPR, MCK_ShrImm16 }, }, + { 2308 /* vqrshrun */, ARM::VQRSHRUNv2i32, Convert__Reg1_2__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_QPR, MCK_ShrImm32 }, }, + { 2317 /* vqshl */, ARM::VQSHLsv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 2317 /* vqshl */, ARM::VQSHLsiv8i16, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLsv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 2317 /* vqshl */, ARM::VQSHLsiv4i16, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLsv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 2317 /* vqshl */, ARM::VQSHLsiv4i32, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLsv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 2317 /* vqshl */, ARM::VQSHLsiv2i32, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLsv2i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_QPR }, }, + { 2317 /* vqshl */, ARM::VQSHLsiv2i64, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLsv1i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_DPR }, }, + { 2317 /* vqshl */, ARM::VQSHLsiv1i64, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLsv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR }, }, + { 2317 /* vqshl */, ARM::VQSHLsiv16i8, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLsv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR }, }, + { 2317 /* vqshl */, ARM::VQSHLsiv8i8, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLuv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR }, }, + { 2317 /* vqshl */, ARM::VQSHLuiv8i16, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLuv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR }, }, + { 2317 /* vqshl */, ARM::VQSHLuiv4i16, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLuv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR }, }, + { 2317 /* vqshl */, ARM::VQSHLuiv4i32, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLuv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR }, }, + { 2317 /* vqshl */, ARM::VQSHLuiv2i32, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLuv2i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_QPR, MCK_QPR }, }, + { 2317 /* vqshl */, ARM::VQSHLuiv2i64, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_QPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLuv1i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_DPR }, }, + { 2317 /* vqshl */, ARM::VQSHLuiv1i64, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, }, + { 2317 /* vqshl */, ARM::VQSHLuiv16i8, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, }, + { 2317 /* vqshl */, ARM::VQSHLuiv8i8, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLsv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2317 /* vqshl */, ARM::VQSHLsiv8i16, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLsv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2317 /* vqshl */, ARM::VQSHLsiv4i16, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLsv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2317 /* vqshl */, ARM::VQSHLsiv4i32, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLsv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2317 /* vqshl */, ARM::VQSHLsiv2i32, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLsv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2317 /* vqshl */, ARM::VQSHLsiv2i64, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLsv1i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2317 /* vqshl */, ARM::VQSHLsiv1i64, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLsv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2317 /* vqshl */, ARM::VQSHLsiv16i8, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLsv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2317 /* vqshl */, ARM::VQSHLsiv8i8, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2317 /* vqshl */, ARM::VQSHLuiv8i16, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLuv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2317 /* vqshl */, ARM::VQSHLuiv4i16, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLuv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2317 /* vqshl */, ARM::VQSHLuiv4i32, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLuv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2317 /* vqshl */, ARM::VQSHLuiv2i32, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLuv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2317 /* vqshl */, ARM::VQSHLuiv2i64, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLuv1i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2317 /* vqshl */, ARM::VQSHLuiv1i64, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2317 /* vqshl */, ARM::VQSHLuiv16i8, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 2317 /* vqshl */, ARM::VQSHLuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2317 /* vqshl */, ARM::VQSHLuiv8i8, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 2323 /* vqshlu */, ARM::VQSHLsuv8i16, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_Imm }, }, + { 2323 /* vqshlu */, ARM::VQSHLsuv4i16, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_Imm }, }, + { 2323 /* vqshlu */, ARM::VQSHLsuv4i32, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_Imm }, }, + { 2323 /* vqshlu */, ARM::VQSHLsuv2i32, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_Imm }, }, + { 2323 /* vqshlu */, ARM::VQSHLsuv2i64, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_Imm }, }, + { 2323 /* vqshlu */, ARM::VQSHLsuv1i64, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_Imm }, }, + { 2323 /* vqshlu */, ARM::VQSHLsuv16i8, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_Imm }, }, + { 2323 /* vqshlu */, ARM::VQSHLsuv8i8, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_Imm }, }, + { 2323 /* vqshlu */, ARM::VQSHLsuv8i16, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 2323 /* vqshlu */, ARM::VQSHLsuv4i16, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 2323 /* vqshlu */, ARM::VQSHLsuv4i32, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 2323 /* vqshlu */, ARM::VQSHLsuv2i32, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 2323 /* vqshlu */, ARM::VQSHLsuv2i64, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 2323 /* vqshlu */, ARM::VQSHLsuv1i64, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 2323 /* vqshlu */, ARM::VQSHLsuv16i8, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 2323 /* vqshlu */, ARM::VQSHLsuv8i8, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 2330 /* vqshrn */, ARM::VQSHRNsv8i8, Convert__Reg1_2__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_QPR, MCK_ShrImm8 }, }, + { 2330 /* vqshrn */, ARM::VQSHRNsv4i16, Convert__Reg1_2__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_QPR, MCK_ShrImm16 }, }, + { 2330 /* vqshrn */, ARM::VQSHRNsv2i32, Convert__Reg1_2__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_QPR, MCK_ShrImm32 }, }, + { 2330 /* vqshrn */, ARM::VQSHRNuv8i8, Convert__Reg1_2__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_QPR, MCK_ShrImm8 }, }, + { 2330 /* vqshrn */, ARM::VQSHRNuv4i16, Convert__Reg1_2__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_QPR, MCK_ShrImm16 }, }, + { 2330 /* vqshrn */, ARM::VQSHRNuv2i32, Convert__Reg1_2__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_QPR, MCK_ShrImm32 }, }, + { 2337 /* vqshrun */, ARM::VQSHRUNv8i8, Convert__Reg1_2__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_QPR, MCK_ShrImm8 }, }, + { 2337 /* vqshrun */, ARM::VQSHRUNv4i16, Convert__Reg1_2__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_QPR, MCK_ShrImm16 }, }, + { 2337 /* vqshrun */, ARM::VQSHRUNv2i32, Convert__Reg1_2__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_QPR, MCK_ShrImm32 }, }, + { 2345 /* vqsub */, ARM::VQSUBsv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 2345 /* vqsub */, ARM::VQSUBsv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 2345 /* vqsub */, ARM::VQSUBsv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 2345 /* vqsub */, ARM::VQSUBsv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 2345 /* vqsub */, ARM::VQSUBsv2i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_QPR }, }, + { 2345 /* vqsub */, ARM::VQSUBsv1i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_DPR }, }, + { 2345 /* vqsub */, ARM::VQSUBsv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR }, }, + { 2345 /* vqsub */, ARM::VQSUBsv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR }, }, + { 2345 /* vqsub */, ARM::VQSUBuv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR }, }, + { 2345 /* vqsub */, ARM::VQSUBuv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR }, }, + { 2345 /* vqsub */, ARM::VQSUBuv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR }, }, + { 2345 /* vqsub */, ARM::VQSUBuv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR }, }, + { 2345 /* vqsub */, ARM::VQSUBuv2i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_QPR, MCK_QPR }, }, + { 2345 /* vqsub */, ARM::VQSUBuv1i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_DPR }, }, + { 2345 /* vqsub */, ARM::VQSUBuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, }, + { 2345 /* vqsub */, ARM::VQSUBuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, }, + { 2345 /* vqsub */, ARM::VQSUBsv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2345 /* vqsub */, ARM::VQSUBsv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2345 /* vqsub */, ARM::VQSUBsv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2345 /* vqsub */, ARM::VQSUBsv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2345 /* vqsub */, ARM::VQSUBsv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2345 /* vqsub */, ARM::VQSUBsv1i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2345 /* vqsub */, ARM::VQSUBsv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2345 /* vqsub */, ARM::VQSUBsv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2345 /* vqsub */, ARM::VQSUBuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2345 /* vqsub */, ARM::VQSUBuv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2345 /* vqsub */, ARM::VQSUBuv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2345 /* vqsub */, ARM::VQSUBuv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2345 /* vqsub */, ARM::VQSUBuv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2345 /* vqsub */, ARM::VQSUBuv1i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2345 /* vqsub */, ARM::VQSUBuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2345 /* vqsub */, ARM::VQSUBuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2351 /* vraddhn */, ARM::VRADDHNv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_QPR, MCK_QPR }, }, + { 2351 /* vraddhn */, ARM::VRADDHNv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_QPR, MCK_QPR }, }, + { 2351 /* vraddhn */, ARM::VRADDHNv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i64, MCK_DPR, MCK_QPR, MCK_QPR }, }, + { 2359 /* vrecpe */, ARM::VRECPEq, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR }, }, + { 2359 /* vrecpe */, ARM::VRECPEd, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR }, }, + { 2359 /* vrecpe */, ARM::VRECPEfq, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 2359 /* vrecpe */, ARM::VRECPEfd, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2359 /* vrecpe */, ARM::VRECPEhq, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 2359 /* vrecpe */, ARM::VRECPEhd, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2366 /* vrecps */, ARM::VRECPSfq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 2366 /* vrecps */, ARM::VRECPSfd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2366 /* vrecps */, ARM::VRECPShq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 2366 /* vrecps */, ARM::VRECPShd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2366 /* vrecps */, ARM::VRECPSfq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2366 /* vrecps */, ARM::VRECPSfd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2366 /* vrecps */, ARM::VRECPShq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2366 /* vrecps */, ARM::VRECPShd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2373 /* vrev16 */, ARM::VREV16q8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR }, }, + { 2373 /* vrev16 */, ARM::VREV16d8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR }, }, + { 2380 /* vrev32 */, ARM::VREV32q16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR }, }, + { 2380 /* vrev32 */, ARM::VREV32d16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR }, }, + { 2380 /* vrev32 */, ARM::VREV32q8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR }, }, + { 2380 /* vrev32 */, ARM::VREV32d8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR }, }, + { 2387 /* vrev64 */, ARM::VREV64q16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR }, }, + { 2387 /* vrev64 */, ARM::VREV64d16, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR }, }, + { 2387 /* vrev64 */, ARM::VREV64q32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_QPR }, }, + { 2387 /* vrev64 */, ARM::VREV64d32, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR }, }, + { 2387 /* vrev64 */, ARM::VREV64q8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR }, }, + { 2387 /* vrev64 */, ARM::VREV64d8, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDsv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDsv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDsv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDsv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDsv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDsv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDuv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDuv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDuv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDuv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDsv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDsv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDsv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDsv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDsv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDsv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDuv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDuv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDuv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2394 /* vrhadd */, ARM::VRHADDuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2401 /* vrinta */, ARM::VRINTANQf, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON, { MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 2401 /* vrinta */, ARM::VRINTANDf, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON, { MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2401 /* vrinta */, ARM::VRINTAS, Convert__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 2401 /* vrinta */, ARM::VRINTAD, Convert__Reg1_1__Reg1_2, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 2401 /* vrinta */, ARM::VRINTANQh, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 2401 /* vrinta */, ARM::VRINTANDh, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2401 /* vrinta */, ARM::VRINTAH, Convert__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 2401 /* vrinta */, ARM::VRINTANQf, Convert__Reg1_2__Reg1_3, Feature_HasNEON, { MCK__DOT_f32, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 2401 /* vrinta */, ARM::VRINTANDf, Convert__Reg1_2__Reg1_3, Feature_HasNEON, { MCK__DOT_f32, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2401 /* vrinta */, ARM::VRINTAS, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK__DOT_f32, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 2401 /* vrinta */, ARM::VRINTAD, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK__DOT_f64, MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 2401 /* vrinta */, ARM::VRINTANQh, Convert__Reg1_2__Reg1_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 2401 /* vrinta */, ARM::VRINTANDh, Convert__Reg1_2__Reg1_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2408 /* vrintm */, ARM::VRINTMNQf, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON, { MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 2408 /* vrintm */, ARM::VRINTMNDf, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON, { MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2408 /* vrintm */, ARM::VRINTMS, Convert__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 2408 /* vrintm */, ARM::VRINTMD, Convert__Reg1_1__Reg1_2, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 2408 /* vrintm */, ARM::VRINTMNQh, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 2408 /* vrintm */, ARM::VRINTMNDh, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2408 /* vrintm */, ARM::VRINTMH, Convert__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 2408 /* vrintm */, ARM::VRINTMNQf, Convert__Reg1_2__Reg1_3, Feature_HasNEON, { MCK__DOT_f32, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 2408 /* vrintm */, ARM::VRINTMNDf, Convert__Reg1_2__Reg1_3, Feature_HasNEON, { MCK__DOT_f32, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2408 /* vrintm */, ARM::VRINTMS, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK__DOT_f32, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 2408 /* vrintm */, ARM::VRINTMD, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK__DOT_f64, MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 2408 /* vrintm */, ARM::VRINTMNQh, Convert__Reg1_2__Reg1_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 2408 /* vrintm */, ARM::VRINTMNDh, Convert__Reg1_2__Reg1_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2415 /* vrintn */, ARM::VRINTNNQf, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON, { MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 2415 /* vrintn */, ARM::VRINTNNDf, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON, { MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2415 /* vrintn */, ARM::VRINTNS, Convert__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 2415 /* vrintn */, ARM::VRINTND, Convert__Reg1_1__Reg1_2, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 2415 /* vrintn */, ARM::VRINTNNQh, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 2415 /* vrintn */, ARM::VRINTNNDh, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2415 /* vrintn */, ARM::VRINTNH, Convert__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 2415 /* vrintn */, ARM::VRINTNNQf, Convert__Reg1_2__Reg1_3, Feature_HasNEON, { MCK__DOT_f32, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 2415 /* vrintn */, ARM::VRINTNNDf, Convert__Reg1_2__Reg1_3, Feature_HasNEON, { MCK__DOT_f32, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2415 /* vrintn */, ARM::VRINTNS, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK__DOT_f32, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 2415 /* vrintn */, ARM::VRINTND, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK__DOT_f64, MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 2415 /* vrintn */, ARM::VRINTNNQh, Convert__Reg1_2__Reg1_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 2415 /* vrintn */, ARM::VRINTNNDh, Convert__Reg1_2__Reg1_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2422 /* vrintp */, ARM::VRINTPNQf, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON, { MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 2422 /* vrintp */, ARM::VRINTPNDf, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON, { MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2422 /* vrintp */, ARM::VRINTPS, Convert__Reg1_1__Reg1_2, Feature_HasFPARMv8, { MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 2422 /* vrintp */, ARM::VRINTPD, Convert__Reg1_1__Reg1_2, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 2422 /* vrintp */, ARM::VRINTPNQh, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 2422 /* vrintp */, ARM::VRINTPNDh, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2422 /* vrintp */, ARM::VRINTPH, Convert__Reg1_1__Reg1_2, Feature_HasFullFP16, { MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 2422 /* vrintp */, ARM::VRINTPNQf, Convert__Reg1_2__Reg1_3, Feature_HasNEON, { MCK__DOT_f32, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 2422 /* vrintp */, ARM::VRINTPNDf, Convert__Reg1_2__Reg1_3, Feature_HasNEON, { MCK__DOT_f32, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2422 /* vrintp */, ARM::VRINTPS, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK__DOT_f32, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 2422 /* vrintp */, ARM::VRINTPD, Convert__Reg1_2__Reg1_3, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK__DOT_f64, MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 2422 /* vrintp */, ARM::VRINTPNQh, Convert__Reg1_2__Reg1_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 2422 /* vrintp */, ARM::VRINTPNDh, Convert__Reg1_2__Reg1_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2429 /* vrintr */, ARM::VRINTRS, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasFPARMv8, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 2429 /* vrintr */, ARM::VRINTRD, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 2429 /* vrintr */, ARM::VRINTRH, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 2429 /* vrintr */, ARM::VRINTRS, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFPARMv8, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 2429 /* vrintr */, ARM::VRINTRD, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 2429 /* vrintr */, ARM::VRINTRH, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 2436 /* vrintx */, ARM::VRINTXNQf, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON, { MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 2436 /* vrintx */, ARM::VRINTXNDf, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON, { MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2436 /* vrintx */, ARM::VRINTXNQh, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 2436 /* vrintx */, ARM::VRINTXNDh, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2436 /* vrintx */, ARM::VRINTXNQf, Convert__Reg1_2__Reg1_3, Feature_HasNEON, { MCK__DOT_f32, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 2436 /* vrintx */, ARM::VRINTXNDf, Convert__Reg1_2__Reg1_3, Feature_HasNEON, { MCK__DOT_f32, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2436 /* vrintx */, ARM::VRINTXNQh, Convert__Reg1_2__Reg1_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 2436 /* vrintx */, ARM::VRINTXNDh, Convert__Reg1_2__Reg1_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2436 /* vrintx */, ARM::VRINTXS, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasFPARMv8, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 2436 /* vrintx */, ARM::VRINTXD, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 2436 /* vrintx */, ARM::VRINTXH, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 2436 /* vrintx */, ARM::VRINTXS, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFPARMv8, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 2436 /* vrintx */, ARM::VRINTXD, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 2436 /* vrintx */, ARM::VRINTXH, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 2443 /* vrintz */, ARM::VRINTZNQf, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON, { MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 2443 /* vrintz */, ARM::VRINTZNDf, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON, { MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2443 /* vrintz */, ARM::VRINTZNQh, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 2443 /* vrintz */, ARM::VRINTZNDh, Convert__Reg1_1__Reg1_2, Feature_HasV8|Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2443 /* vrintz */, ARM::VRINTZNQf, Convert__Reg1_2__Reg1_3, Feature_HasNEON, { MCK__DOT_f32, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 2443 /* vrintz */, ARM::VRINTZNDf, Convert__Reg1_2__Reg1_3, Feature_HasNEON, { MCK__DOT_f32, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2443 /* vrintz */, ARM::VRINTZNQh, Convert__Reg1_2__Reg1_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 2443 /* vrintz */, ARM::VRINTZNDh, Convert__Reg1_2__Reg1_3, Feature_HasNEON|Feature_HasFullFP16, { MCK__DOT_f16, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2443 /* vrintz */, ARM::VRINTZS, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasFPARMv8, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 2443 /* vrintz */, ARM::VRINTZD, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 2443 /* vrintz */, ARM::VRINTZH, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 2443 /* vrintz */, ARM::VRINTZS, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFPARMv8, { MCK_CondCode, MCK__DOT_f32, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 2443 /* vrintz */, ARM::VRINTZD, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 2443 /* vrintz */, ARM::VRINTZH, Convert__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 2450 /* vrshl */, ARM::VRSHLsv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 2450 /* vrshl */, ARM::VRSHLsv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 2450 /* vrshl */, ARM::VRSHLsv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 2450 /* vrshl */, ARM::VRSHLsv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 2450 /* vrshl */, ARM::VRSHLsv2i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_QPR }, }, + { 2450 /* vrshl */, ARM::VRSHLsv1i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_DPR }, }, + { 2450 /* vrshl */, ARM::VRSHLsv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR }, }, + { 2450 /* vrshl */, ARM::VRSHLsv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR }, }, + { 2450 /* vrshl */, ARM::VRSHLuv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR }, }, + { 2450 /* vrshl */, ARM::VRSHLuv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR }, }, + { 2450 /* vrshl */, ARM::VRSHLuv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR }, }, + { 2450 /* vrshl */, ARM::VRSHLuv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR }, }, + { 2450 /* vrshl */, ARM::VRSHLuv2i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_QPR, MCK_QPR }, }, + { 2450 /* vrshl */, ARM::VRSHLuv1i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_DPR }, }, + { 2450 /* vrshl */, ARM::VRSHLuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, }, + { 2450 /* vrshl */, ARM::VRSHLuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, }, + { 2450 /* vrshl */, ARM::VRSHLsv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2450 /* vrshl */, ARM::VRSHLsv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2450 /* vrshl */, ARM::VRSHLsv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2450 /* vrshl */, ARM::VRSHLsv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2450 /* vrshl */, ARM::VRSHLsv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2450 /* vrshl */, ARM::VRSHLsv1i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2450 /* vrshl */, ARM::VRSHLsv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2450 /* vrshl */, ARM::VRSHLsv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2450 /* vrshl */, ARM::VRSHLuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2450 /* vrshl */, ARM::VRSHLuv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2450 /* vrshl */, ARM::VRSHLuv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2450 /* vrshl */, ARM::VRSHLuv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2450 /* vrshl */, ARM::VRSHLuv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2450 /* vrshl */, ARM::VRSHLuv1i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2450 /* vrshl */, ARM::VRSHLuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2450 /* vrshl */, ARM::VRSHLuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2456 /* vrshr */, ARM::VRSHRsv8i16, Convert__Reg1_2__Reg1_2__ShrImm161_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_ShrImm16 }, }, + { 2456 /* vrshr */, ARM::VRSHRsv4i16, Convert__Reg1_2__Reg1_2__ShrImm161_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_ShrImm16 }, }, + { 2456 /* vrshr */, ARM::VRSHRsv4i32, Convert__Reg1_2__Reg1_2__ShrImm321_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_ShrImm32 }, }, + { 2456 /* vrshr */, ARM::VRSHRsv2i32, Convert__Reg1_2__Reg1_2__ShrImm321_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_ShrImm32 }, }, + { 2456 /* vrshr */, ARM::VRSHRsv2i64, Convert__Reg1_2__Reg1_2__ShrImm641_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_ShrImm64 }, }, + { 2456 /* vrshr */, ARM::VRSHRsv1i64, Convert__Reg1_2__Reg1_2__ShrImm641_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_ShrImm64 }, }, + { 2456 /* vrshr */, ARM::VRSHRsv16i8, Convert__Reg1_2__Reg1_2__ShrImm81_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_ShrImm8 }, }, + { 2456 /* vrshr */, ARM::VRSHRsv8i8, Convert__Reg1_2__Reg1_2__ShrImm81_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_ShrImm8 }, }, + { 2456 /* vrshr */, ARM::VRSHRuv8i16, Convert__Reg1_2__Reg1_2__ShrImm161_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_ShrImm16 }, }, + { 2456 /* vrshr */, ARM::VRSHRuv4i16, Convert__Reg1_2__Reg1_2__ShrImm161_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_ShrImm16 }, }, + { 2456 /* vrshr */, ARM::VRSHRuv4i32, Convert__Reg1_2__Reg1_2__ShrImm321_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_ShrImm32 }, }, + { 2456 /* vrshr */, ARM::VRSHRuv2i32, Convert__Reg1_2__Reg1_2__ShrImm321_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_ShrImm32 }, }, + { 2456 /* vrshr */, ARM::VRSHRuv2i64, Convert__Reg1_2__Reg1_2__ShrImm641_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_QPR, MCK_ShrImm64 }, }, + { 2456 /* vrshr */, ARM::VRSHRuv1i64, Convert__Reg1_2__Reg1_2__ShrImm641_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_ShrImm64 }, }, + { 2456 /* vrshr */, ARM::VRSHRuv16i8, Convert__Reg1_2__Reg1_2__ShrImm81_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_ShrImm8 }, }, + { 2456 /* vrshr */, ARM::VRSHRuv8i8, Convert__Reg1_2__Reg1_2__ShrImm81_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_ShrImm8 }, }, + { 2456 /* vrshr */, ARM::VRSHRsv8i16, Convert__Reg1_2__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_ShrImm16 }, }, + { 2456 /* vrshr */, ARM::VRSHRsv4i16, Convert__Reg1_2__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_ShrImm16 }, }, + { 2456 /* vrshr */, ARM::VRSHRsv4i32, Convert__Reg1_2__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_ShrImm32 }, }, + { 2456 /* vrshr */, ARM::VRSHRsv2i32, Convert__Reg1_2__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_ShrImm32 }, }, + { 2456 /* vrshr */, ARM::VRSHRsv2i64, Convert__Reg1_2__Reg1_3__ShrImm641_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_QPR, MCK_ShrImm64 }, }, + { 2456 /* vrshr */, ARM::VRSHRsv1i64, Convert__Reg1_2__Reg1_3__ShrImm641_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_DPR, MCK_ShrImm64 }, }, + { 2456 /* vrshr */, ARM::VRSHRsv16i8, Convert__Reg1_2__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_ShrImm8 }, }, + { 2456 /* vrshr */, ARM::VRSHRsv8i8, Convert__Reg1_2__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_ShrImm8 }, }, + { 2456 /* vrshr */, ARM::VRSHRuv8i16, Convert__Reg1_2__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_ShrImm16 }, }, + { 2456 /* vrshr */, ARM::VRSHRuv4i16, Convert__Reg1_2__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_ShrImm16 }, }, + { 2456 /* vrshr */, ARM::VRSHRuv4i32, Convert__Reg1_2__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_ShrImm32 }, }, + { 2456 /* vrshr */, ARM::VRSHRuv2i32, Convert__Reg1_2__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_ShrImm32 }, }, + { 2456 /* vrshr */, ARM::VRSHRuv2i64, Convert__Reg1_2__Reg1_3__ShrImm641_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_QPR, MCK_QPR, MCK_ShrImm64 }, }, + { 2456 /* vrshr */, ARM::VRSHRuv1i64, Convert__Reg1_2__Reg1_3__ShrImm641_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_DPR, MCK_ShrImm64 }, }, + { 2456 /* vrshr */, ARM::VRSHRuv16i8, Convert__Reg1_2__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_ShrImm8 }, }, + { 2456 /* vrshr */, ARM::VRSHRuv8i8, Convert__Reg1_2__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_ShrImm8 }, }, + { 2462 /* vrshrn */, ARM::VRSHRNv8i8, Convert__Reg1_2__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_QPR, MCK_ShrImm8 }, }, + { 2462 /* vrshrn */, ARM::VRSHRNv4i16, Convert__Reg1_2__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_QPR, MCK_ShrImm16 }, }, + { 2462 /* vrshrn */, ARM::VRSHRNv2i32, Convert__Reg1_2__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i64, MCK_DPR, MCK_QPR, MCK_ShrImm32 }, }, + { 2469 /* vrsqrte */, ARM::VRSQRTEq, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR }, }, + { 2469 /* vrsqrte */, ARM::VRSQRTEd, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR }, }, + { 2469 /* vrsqrte */, ARM::VRSQRTEfq, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 2469 /* vrsqrte */, ARM::VRSQRTEfd, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2469 /* vrsqrte */, ARM::VRSQRTEhq, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 2469 /* vrsqrte */, ARM::VRSQRTEhd, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2477 /* vrsqrts */, ARM::VRSQRTSfq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 2477 /* vrsqrts */, ARM::VRSQRTSfd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2477 /* vrsqrts */, ARM::VRSQRTShq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 2477 /* vrsqrts */, ARM::VRSQRTShd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2477 /* vrsqrts */, ARM::VRSQRTSfq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2477 /* vrsqrts */, ARM::VRSQRTSfd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2477 /* vrsqrts */, ARM::VRSQRTShq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2477 /* vrsqrts */, ARM::VRSQRTShd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2485 /* vrsra */, ARM::VRSRAsv8i16, Convert__Reg1_2__Tie0__Reg1_2__ShrImm161_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_ShrImm16 }, }, + { 2485 /* vrsra */, ARM::VRSRAsv4i16, Convert__Reg1_2__Tie0__Reg1_2__ShrImm161_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_ShrImm16 }, }, + { 2485 /* vrsra */, ARM::VRSRAsv4i32, Convert__Reg1_2__Tie0__Reg1_2__ShrImm321_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_ShrImm32 }, }, + { 2485 /* vrsra */, ARM::VRSRAsv2i32, Convert__Reg1_2__Tie0__Reg1_2__ShrImm321_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_ShrImm32 }, }, + { 2485 /* vrsra */, ARM::VRSRAsv2i64, Convert__Reg1_2__Tie0__Reg1_2__ShrImm641_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_ShrImm64 }, }, + { 2485 /* vrsra */, ARM::VRSRAsv1i64, Convert__Reg1_2__Tie0__Reg1_2__ShrImm641_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_ShrImm64 }, }, + { 2485 /* vrsra */, ARM::VRSRAsv16i8, Convert__Reg1_2__Tie0__Reg1_2__ShrImm81_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_ShrImm8 }, }, + { 2485 /* vrsra */, ARM::VRSRAsv8i8, Convert__Reg1_2__Tie0__Reg1_2__ShrImm81_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_ShrImm8 }, }, + { 2485 /* vrsra */, ARM::VRSRAuv8i16, Convert__Reg1_2__Tie0__Reg1_2__ShrImm161_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_ShrImm16 }, }, + { 2485 /* vrsra */, ARM::VRSRAuv4i16, Convert__Reg1_2__Tie0__Reg1_2__ShrImm161_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_ShrImm16 }, }, + { 2485 /* vrsra */, ARM::VRSRAuv4i32, Convert__Reg1_2__Tie0__Reg1_2__ShrImm321_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_ShrImm32 }, }, + { 2485 /* vrsra */, ARM::VRSRAuv2i32, Convert__Reg1_2__Tie0__Reg1_2__ShrImm321_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_ShrImm32 }, }, + { 2485 /* vrsra */, ARM::VRSRAuv2i64, Convert__Reg1_2__Tie0__Reg1_2__ShrImm641_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_QPR, MCK_ShrImm64 }, }, + { 2485 /* vrsra */, ARM::VRSRAuv1i64, Convert__Reg1_2__Tie0__Reg1_2__ShrImm641_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_ShrImm64 }, }, + { 2485 /* vrsra */, ARM::VRSRAuv16i8, Convert__Reg1_2__Tie0__Reg1_2__ShrImm81_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_ShrImm8 }, }, + { 2485 /* vrsra */, ARM::VRSRAuv8i8, Convert__Reg1_2__Tie0__Reg1_2__ShrImm81_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_ShrImm8 }, }, + { 2485 /* vrsra */, ARM::VRSRAsv8i16, Convert__Reg1_2__Tie0__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_ShrImm16 }, }, + { 2485 /* vrsra */, ARM::VRSRAsv4i16, Convert__Reg1_2__Tie0__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_ShrImm16 }, }, + { 2485 /* vrsra */, ARM::VRSRAsv4i32, Convert__Reg1_2__Tie0__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_ShrImm32 }, }, + { 2485 /* vrsra */, ARM::VRSRAsv2i32, Convert__Reg1_2__Tie0__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_ShrImm32 }, }, + { 2485 /* vrsra */, ARM::VRSRAsv2i64, Convert__Reg1_2__Tie0__Reg1_3__ShrImm641_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_QPR, MCK_ShrImm64 }, }, + { 2485 /* vrsra */, ARM::VRSRAsv1i64, Convert__Reg1_2__Tie0__Reg1_3__ShrImm641_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_DPR, MCK_ShrImm64 }, }, + { 2485 /* vrsra */, ARM::VRSRAsv16i8, Convert__Reg1_2__Tie0__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_ShrImm8 }, }, + { 2485 /* vrsra */, ARM::VRSRAsv8i8, Convert__Reg1_2__Tie0__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_ShrImm8 }, }, + { 2485 /* vrsra */, ARM::VRSRAuv8i16, Convert__Reg1_2__Tie0__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_ShrImm16 }, }, + { 2485 /* vrsra */, ARM::VRSRAuv4i16, Convert__Reg1_2__Tie0__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_ShrImm16 }, }, + { 2485 /* vrsra */, ARM::VRSRAuv4i32, Convert__Reg1_2__Tie0__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_ShrImm32 }, }, + { 2485 /* vrsra */, ARM::VRSRAuv2i32, Convert__Reg1_2__Tie0__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_ShrImm32 }, }, + { 2485 /* vrsra */, ARM::VRSRAuv2i64, Convert__Reg1_2__Tie0__Reg1_3__ShrImm641_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_QPR, MCK_QPR, MCK_ShrImm64 }, }, + { 2485 /* vrsra */, ARM::VRSRAuv1i64, Convert__Reg1_2__Tie0__Reg1_3__ShrImm641_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_DPR, MCK_ShrImm64 }, }, + { 2485 /* vrsra */, ARM::VRSRAuv16i8, Convert__Reg1_2__Tie0__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_ShrImm8 }, }, + { 2485 /* vrsra */, ARM::VRSRAuv8i8, Convert__Reg1_2__Tie0__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_ShrImm8 }, }, + { 2491 /* vrsubhn */, ARM::VRSUBHNv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_QPR, MCK_QPR }, }, + { 2491 /* vrsubhn */, ARM::VRSUBHNv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_QPR, MCK_QPR }, }, + { 2491 /* vrsubhn */, ARM::VRSUBHNv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i64, MCK_DPR, MCK_QPR, MCK_QPR }, }, + { 2499 /* vseleq */, ARM::VSELEQS, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK__DOT_f32, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2499 /* vseleq */, ARM::VSELEQD, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2499 /* vseleq */, ARM::VSELEQH, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasFullFP16, { MCK__DOT_f16, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2506 /* vselge */, ARM::VSELGES, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK__DOT_f32, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2506 /* vselge */, ARM::VSELGED, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2506 /* vselge */, ARM::VSELGEH, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasFullFP16, { MCK__DOT_f16, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2513 /* vselgt */, ARM::VSELGTS, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK__DOT_f32, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2513 /* vselgt */, ARM::VSELGTD, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2513 /* vselgt */, ARM::VSELGTH, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasFullFP16, { MCK__DOT_f16, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2520 /* vselvs */, ARM::VSELVSS, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8, { MCK__DOT_f32, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2520 /* vselvs */, ARM::VSELVSD, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasFPARMv8|Feature_HasDPVFP, { MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2520 /* vselvs */, ARM::VSELVSH, Convert__Reg1_1__Reg1_2__Reg1_3, Feature_HasFullFP16, { MCK__DOT_f16, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2527 /* vshl */, ARM::VSHLsv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR }, }, + { 2527 /* vshl */, ARM::VSHLsv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR }, }, + { 2527 /* vshl */, ARM::VSHLsv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR }, }, + { 2527 /* vshl */, ARM::VSHLsv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR }, }, + { 2527 /* vshl */, ARM::VSHLsv2i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_QPR }, }, + { 2527 /* vshl */, ARM::VSHLsv1i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_DPR }, }, + { 2527 /* vshl */, ARM::VSHLsv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR }, }, + { 2527 /* vshl */, ARM::VSHLsv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR }, }, + { 2527 /* vshl */, ARM::VSHLuv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR }, }, + { 2527 /* vshl */, ARM::VSHLuv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR }, }, + { 2527 /* vshl */, ARM::VSHLuv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR }, }, + { 2527 /* vshl */, ARM::VSHLuv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR }, }, + { 2527 /* vshl */, ARM::VSHLuv2i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_QPR, MCK_QPR }, }, + { 2527 /* vshl */, ARM::VSHLuv1i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_DPR }, }, + { 2527 /* vshl */, ARM::VSHLuv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR }, }, + { 2527 /* vshl */, ARM::VSHLuv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR }, }, + { 2527 /* vshl */, ARM::VSHLiv8i16, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_Imm }, }, + { 2527 /* vshl */, ARM::VSHLiv4i16, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_Imm }, }, + { 2527 /* vshl */, ARM::VSHLiv4i32, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_Imm }, }, + { 2527 /* vshl */, ARM::VSHLiv2i32, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_Imm }, }, + { 2527 /* vshl */, ARM::VSHLiv2i64, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i64, MCK_QPR, MCK_Imm }, }, + { 2527 /* vshl */, ARM::VSHLiv1i64, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i64, MCK_DPR, MCK_Imm }, }, + { 2527 /* vshl */, ARM::VSHLiv16i8, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_QPR, MCK_Imm }, }, + { 2527 /* vshl */, ARM::VSHLiv8i8, Convert__Reg1_2__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_DPR, MCK_Imm }, }, + { 2527 /* vshl */, ARM::VSHLsv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2527 /* vshl */, ARM::VSHLsv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2527 /* vshl */, ARM::VSHLsv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2527 /* vshl */, ARM::VSHLsv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2527 /* vshl */, ARM::VSHLsv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2527 /* vshl */, ARM::VSHLsv1i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2527 /* vshl */, ARM::VSHLsv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2527 /* vshl */, ARM::VSHLsv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2527 /* vshl */, ARM::VSHLuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2527 /* vshl */, ARM::VSHLuv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2527 /* vshl */, ARM::VSHLuv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2527 /* vshl */, ARM::VSHLuv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2527 /* vshl */, ARM::VSHLuv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2527 /* vshl */, ARM::VSHLuv1i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2527 /* vshl */, ARM::VSHLuv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2527 /* vshl */, ARM::VSHLuv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2527 /* vshl */, ARM::VSHLiv8i16, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 2527 /* vshl */, ARM::VSHLiv4i16, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 2527 /* vshl */, ARM::VSHLiv4i32, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 2527 /* vshl */, ARM::VSHLiv2i32, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 2527 /* vshl */, ARM::VSHLiv2i64, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i64, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 2527 /* vshl */, ARM::VSHLiv1i64, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i64, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 2527 /* vshl */, ARM::VSHLiv16i8, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 2527 /* vshl */, ARM::VSHLiv8i8, Convert__Reg1_2__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 2532 /* vshll */, ARM::VSHLLsv4i32, Convert__Reg1_2__Reg1_3__Imm1_151_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_DPR, MCK_Imm1_15 }, }, + { 2532 /* vshll */, ARM::VSHLLsv2i64, Convert__Reg1_2__Reg1_3__Imm1_311_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_DPR, MCK_Imm1_31 }, }, + { 2532 /* vshll */, ARM::VSHLLsv8i16, Convert__Reg1_2__Reg1_3__Imm1_71_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_DPR, MCK_Imm1_7 }, }, + { 2532 /* vshll */, ARM::VSHLLuv4i32, Convert__Reg1_2__Reg1_3__Imm1_151_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_DPR, MCK_Imm1_15 }, }, + { 2532 /* vshll */, ARM::VSHLLuv2i64, Convert__Reg1_2__Reg1_3__Imm1_311_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_DPR, MCK_Imm1_31 }, }, + { 2532 /* vshll */, ARM::VSHLLuv8i16, Convert__Reg1_2__Reg1_3__Imm1_71_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_DPR, MCK_Imm1_7 }, }, + { 2532 /* vshll */, ARM::VSHLLi16, Convert__Reg1_2__Reg1_3__Imm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_DPR, MCK_Imm16 }, }, + { 2532 /* vshll */, ARM::VSHLLi32, Convert__Reg1_2__Reg1_3__Imm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_DPR, MCK_Imm32 }, }, + { 2532 /* vshll */, ARM::VSHLLi8, Convert__Reg1_2__Reg1_3__Imm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_QPR, MCK_DPR, MCK_Imm8 }, }, + { 2538 /* vshr */, ARM::VSHRsv8i16, Convert__Reg1_2__Reg1_2__ShrImm161_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_ShrImm16 }, }, + { 2538 /* vshr */, ARM::VSHRsv4i16, Convert__Reg1_2__Reg1_2__ShrImm161_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_ShrImm16 }, }, + { 2538 /* vshr */, ARM::VSHRsv4i32, Convert__Reg1_2__Reg1_2__ShrImm321_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_ShrImm32 }, }, + { 2538 /* vshr */, ARM::VSHRsv2i32, Convert__Reg1_2__Reg1_2__ShrImm321_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_ShrImm32 }, }, + { 2538 /* vshr */, ARM::VSHRsv2i64, Convert__Reg1_2__Reg1_2__ShrImm641_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_ShrImm64 }, }, + { 2538 /* vshr */, ARM::VSHRsv1i64, Convert__Reg1_2__Reg1_2__ShrImm641_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_ShrImm64 }, }, + { 2538 /* vshr */, ARM::VSHRsv16i8, Convert__Reg1_2__Reg1_2__ShrImm81_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_ShrImm8 }, }, + { 2538 /* vshr */, ARM::VSHRsv8i8, Convert__Reg1_2__Reg1_2__ShrImm81_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_ShrImm8 }, }, + { 2538 /* vshr */, ARM::VSHRuv8i16, Convert__Reg1_2__Reg1_2__ShrImm161_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_ShrImm16 }, }, + { 2538 /* vshr */, ARM::VSHRuv4i16, Convert__Reg1_2__Reg1_2__ShrImm161_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_ShrImm16 }, }, + { 2538 /* vshr */, ARM::VSHRuv4i32, Convert__Reg1_2__Reg1_2__ShrImm321_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_ShrImm32 }, }, + { 2538 /* vshr */, ARM::VSHRuv2i32, Convert__Reg1_2__Reg1_2__ShrImm321_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_ShrImm32 }, }, + { 2538 /* vshr */, ARM::VSHRuv2i64, Convert__Reg1_2__Reg1_2__ShrImm641_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_QPR, MCK_ShrImm64 }, }, + { 2538 /* vshr */, ARM::VSHRuv1i64, Convert__Reg1_2__Reg1_2__ShrImm641_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_ShrImm64 }, }, + { 2538 /* vshr */, ARM::VSHRuv16i8, Convert__Reg1_2__Reg1_2__ShrImm81_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_ShrImm8 }, }, + { 2538 /* vshr */, ARM::VSHRuv8i8, Convert__Reg1_2__Reg1_2__ShrImm81_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_ShrImm8 }, }, + { 2538 /* vshr */, ARM::VSHRsv8i16, Convert__Reg1_2__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_ShrImm16 }, }, + { 2538 /* vshr */, ARM::VSHRsv4i16, Convert__Reg1_2__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_ShrImm16 }, }, + { 2538 /* vshr */, ARM::VSHRsv4i32, Convert__Reg1_2__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_ShrImm32 }, }, + { 2538 /* vshr */, ARM::VSHRsv2i32, Convert__Reg1_2__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_ShrImm32 }, }, + { 2538 /* vshr */, ARM::VSHRsv2i64, Convert__Reg1_2__Reg1_3__ShrImm641_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_QPR, MCK_ShrImm64 }, }, + { 2538 /* vshr */, ARM::VSHRsv1i64, Convert__Reg1_2__Reg1_3__ShrImm641_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_DPR, MCK_ShrImm64 }, }, + { 2538 /* vshr */, ARM::VSHRsv16i8, Convert__Reg1_2__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_ShrImm8 }, }, + { 2538 /* vshr */, ARM::VSHRsv8i8, Convert__Reg1_2__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_ShrImm8 }, }, + { 2538 /* vshr */, ARM::VSHRuv8i16, Convert__Reg1_2__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_ShrImm16 }, }, + { 2538 /* vshr */, ARM::VSHRuv4i16, Convert__Reg1_2__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_ShrImm16 }, }, + { 2538 /* vshr */, ARM::VSHRuv4i32, Convert__Reg1_2__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_ShrImm32 }, }, + { 2538 /* vshr */, ARM::VSHRuv2i32, Convert__Reg1_2__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_ShrImm32 }, }, + { 2538 /* vshr */, ARM::VSHRuv2i64, Convert__Reg1_2__Reg1_3__ShrImm641_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_QPR, MCK_QPR, MCK_ShrImm64 }, }, + { 2538 /* vshr */, ARM::VSHRuv1i64, Convert__Reg1_2__Reg1_3__ShrImm641_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_DPR, MCK_ShrImm64 }, }, + { 2538 /* vshr */, ARM::VSHRuv16i8, Convert__Reg1_2__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_ShrImm8 }, }, + { 2538 /* vshr */, ARM::VSHRuv8i8, Convert__Reg1_2__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_ShrImm8 }, }, + { 2543 /* vshrn */, ARM::VSHRNv8i8, Convert__Reg1_2__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_QPR, MCK_ShrImm8 }, }, + { 2543 /* vshrn */, ARM::VSHRNv4i16, Convert__Reg1_2__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_QPR, MCK_ShrImm16 }, }, + { 2543 /* vshrn */, ARM::VSHRNv2i32, Convert__Reg1_2__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i64, MCK_DPR, MCK_QPR, MCK_ShrImm32 }, }, + { 2549 /* vsli */, ARM::VSLIv8i16, Convert__Reg1_2__Tie0__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_Imm }, }, + { 2549 /* vsli */, ARM::VSLIv4i16, Convert__Reg1_2__Tie0__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_Imm }, }, + { 2549 /* vsli */, ARM::VSLIv4i32, Convert__Reg1_2__Tie0__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_Imm }, }, + { 2549 /* vsli */, ARM::VSLIv2i32, Convert__Reg1_2__Tie0__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_Imm }, }, + { 2549 /* vsli */, ARM::VSLIv2i64, Convert__Reg1_2__Tie0__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_QPR, MCK_Imm }, }, + { 2549 /* vsli */, ARM::VSLIv1i64, Convert__Reg1_2__Tie0__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_DPR, MCK_Imm }, }, + { 2549 /* vsli */, ARM::VSLIv16i8, Convert__Reg1_2__Tie0__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_Imm }, }, + { 2549 /* vsli */, ARM::VSLIv8i8, Convert__Reg1_2__Tie0__Reg1_2__Imm1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_Imm }, }, + { 2549 /* vsli */, ARM::VSLIv8i16, Convert__Reg1_2__Tie0__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 2549 /* vsli */, ARM::VSLIv4i16, Convert__Reg1_2__Tie0__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 2549 /* vsli */, ARM::VSLIv4i32, Convert__Reg1_2__Tie0__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 2549 /* vsli */, ARM::VSLIv2i32, Convert__Reg1_2__Tie0__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 2549 /* vsli */, ARM::VSLIv2i64, Convert__Reg1_2__Tie0__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 2549 /* vsli */, ARM::VSLIv1i64, Convert__Reg1_2__Tie0__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 2549 /* vsli */, ARM::VSLIv16i8, Convert__Reg1_2__Tie0__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR, MCK_Imm }, }, + { 2549 /* vsli */, ARM::VSLIv8i8, Convert__Reg1_2__Tie0__Reg1_3__Imm1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR, MCK_Imm }, }, + { 2554 /* vsqrt */, ARM::VSQRTD, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK_DPR, MCK_DPR }, }, + { 2554 /* vsqrt */, ARM::VSQRTS, Convert__Reg1_1__Reg1_2__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_SPR, MCK_SPR }, }, + { 2554 /* vsqrt */, ARM::VSQRTS, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 2554 /* vsqrt */, ARM::VSQRTD, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 2554 /* vsqrt */, ARM::VSQRTH, Convert__Reg1_2__Reg1_3__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 2560 /* vsra */, ARM::VSRAsv8i16, Convert__Reg1_2__Tie0__Reg1_2__ShrImm161_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_ShrImm16 }, }, + { 2560 /* vsra */, ARM::VSRAsv4i16, Convert__Reg1_2__Tie0__Reg1_2__ShrImm161_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_ShrImm16 }, }, + { 2560 /* vsra */, ARM::VSRAsv4i32, Convert__Reg1_2__Tie0__Reg1_2__ShrImm321_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_ShrImm32 }, }, + { 2560 /* vsra */, ARM::VSRAsv2i32, Convert__Reg1_2__Tie0__Reg1_2__ShrImm321_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_ShrImm32 }, }, + { 2560 /* vsra */, ARM::VSRAsv2i64, Convert__Reg1_2__Tie0__Reg1_2__ShrImm641_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_ShrImm64 }, }, + { 2560 /* vsra */, ARM::VSRAsv1i64, Convert__Reg1_2__Tie0__Reg1_2__ShrImm641_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_ShrImm64 }, }, + { 2560 /* vsra */, ARM::VSRAsv16i8, Convert__Reg1_2__Tie0__Reg1_2__ShrImm81_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_ShrImm8 }, }, + { 2560 /* vsra */, ARM::VSRAsv8i8, Convert__Reg1_2__Tie0__Reg1_2__ShrImm81_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_ShrImm8 }, }, + { 2560 /* vsra */, ARM::VSRAuv8i16, Convert__Reg1_2__Tie0__Reg1_2__ShrImm161_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_ShrImm16 }, }, + { 2560 /* vsra */, ARM::VSRAuv4i16, Convert__Reg1_2__Tie0__Reg1_2__ShrImm161_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_ShrImm16 }, }, + { 2560 /* vsra */, ARM::VSRAuv4i32, Convert__Reg1_2__Tie0__Reg1_2__ShrImm321_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_ShrImm32 }, }, + { 2560 /* vsra */, ARM::VSRAuv2i32, Convert__Reg1_2__Tie0__Reg1_2__ShrImm321_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_ShrImm32 }, }, + { 2560 /* vsra */, ARM::VSRAuv2i64, Convert__Reg1_2__Tie0__Reg1_2__ShrImm641_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_QPR, MCK_ShrImm64 }, }, + { 2560 /* vsra */, ARM::VSRAuv1i64, Convert__Reg1_2__Tie0__Reg1_2__ShrImm641_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_ShrImm64 }, }, + { 2560 /* vsra */, ARM::VSRAuv16i8, Convert__Reg1_2__Tie0__Reg1_2__ShrImm81_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_ShrImm8 }, }, + { 2560 /* vsra */, ARM::VSRAuv8i8, Convert__Reg1_2__Tie0__Reg1_2__ShrImm81_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_ShrImm8 }, }, + { 2560 /* vsra */, ARM::VSRAsv8i16, Convert__Reg1_2__Tie0__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_ShrImm16 }, }, + { 2560 /* vsra */, ARM::VSRAsv4i16, Convert__Reg1_2__Tie0__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_DPR, MCK_DPR, MCK_ShrImm16 }, }, + { 2560 /* vsra */, ARM::VSRAsv4i32, Convert__Reg1_2__Tie0__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_ShrImm32 }, }, + { 2560 /* vsra */, ARM::VSRAsv2i32, Convert__Reg1_2__Tie0__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_DPR, MCK_DPR, MCK_ShrImm32 }, }, + { 2560 /* vsra */, ARM::VSRAsv2i64, Convert__Reg1_2__Tie0__Reg1_3__ShrImm641_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_QPR, MCK_QPR, MCK_ShrImm64 }, }, + { 2560 /* vsra */, ARM::VSRAsv1i64, Convert__Reg1_2__Tie0__Reg1_3__ShrImm641_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s64, MCK_DPR, MCK_DPR, MCK_ShrImm64 }, }, + { 2560 /* vsra */, ARM::VSRAsv16i8, Convert__Reg1_2__Tie0__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_ShrImm8 }, }, + { 2560 /* vsra */, ARM::VSRAsv8i8, Convert__Reg1_2__Tie0__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_DPR, MCK_DPR, MCK_ShrImm8 }, }, + { 2560 /* vsra */, ARM::VSRAuv8i16, Convert__Reg1_2__Tie0__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_ShrImm16 }, }, + { 2560 /* vsra */, ARM::VSRAuv4i16, Convert__Reg1_2__Tie0__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_DPR, MCK_DPR, MCK_ShrImm16 }, }, + { 2560 /* vsra */, ARM::VSRAuv4i32, Convert__Reg1_2__Tie0__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_ShrImm32 }, }, + { 2560 /* vsra */, ARM::VSRAuv2i32, Convert__Reg1_2__Tie0__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_DPR, MCK_DPR, MCK_ShrImm32 }, }, + { 2560 /* vsra */, ARM::VSRAuv2i64, Convert__Reg1_2__Tie0__Reg1_3__ShrImm641_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_QPR, MCK_QPR, MCK_ShrImm64 }, }, + { 2560 /* vsra */, ARM::VSRAuv1i64, Convert__Reg1_2__Tie0__Reg1_3__ShrImm641_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u64, MCK_DPR, MCK_DPR, MCK_ShrImm64 }, }, + { 2560 /* vsra */, ARM::VSRAuv16i8, Convert__Reg1_2__Tie0__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_ShrImm8 }, }, + { 2560 /* vsra */, ARM::VSRAuv8i8, Convert__Reg1_2__Tie0__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_DPR, MCK_DPR, MCK_ShrImm8 }, }, + { 2565 /* vsri */, ARM::VSRIv8i16, Convert__Reg1_2__Tie0__Reg1_2__ShrImm161_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_ShrImm16 }, }, + { 2565 /* vsri */, ARM::VSRIv4i16, Convert__Reg1_2__Tie0__Reg1_2__ShrImm161_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_ShrImm16 }, }, + { 2565 /* vsri */, ARM::VSRIv4i32, Convert__Reg1_2__Tie0__Reg1_2__ShrImm321_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_ShrImm32 }, }, + { 2565 /* vsri */, ARM::VSRIv2i32, Convert__Reg1_2__Tie0__Reg1_2__ShrImm321_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_ShrImm32 }, }, + { 2565 /* vsri */, ARM::VSRIv2i64, Convert__Reg1_2__Tie0__Reg1_2__ShrImm641_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_QPR, MCK_ShrImm64 }, }, + { 2565 /* vsri */, ARM::VSRIv1i64, Convert__Reg1_2__Tie0__Reg1_2__ShrImm641_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_DPR, MCK_ShrImm64 }, }, + { 2565 /* vsri */, ARM::VSRIv16i8, Convert__Reg1_2__Tie0__Reg1_2__ShrImm81_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_ShrImm8 }, }, + { 2565 /* vsri */, ARM::VSRIv8i8, Convert__Reg1_2__Tie0__Reg1_2__ShrImm81_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_ShrImm8 }, }, + { 2565 /* vsri */, ARM::VSRIv8i16, Convert__Reg1_2__Tie0__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR, MCK_ShrImm16 }, }, + { 2565 /* vsri */, ARM::VSRIv4i16, Convert__Reg1_2__Tie0__Reg1_3__ShrImm161_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR, MCK_ShrImm16 }, }, + { 2565 /* vsri */, ARM::VSRIv4i32, Convert__Reg1_2__Tie0__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_QPR, MCK_ShrImm32 }, }, + { 2565 /* vsri */, ARM::VSRIv2i32, Convert__Reg1_2__Tie0__Reg1_3__ShrImm321_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR, MCK_ShrImm32 }, }, + { 2565 /* vsri */, ARM::VSRIv2i64, Convert__Reg1_2__Tie0__Reg1_3__ShrImm641_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_QPR, MCK_QPR, MCK_ShrImm64 }, }, + { 2565 /* vsri */, ARM::VSRIv1i64, Convert__Reg1_2__Tie0__Reg1_3__ShrImm641_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_DPR, MCK_DPR, MCK_ShrImm64 }, }, + { 2565 /* vsri */, ARM::VSRIv16i8, Convert__Reg1_2__Tie0__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR, MCK_ShrImm8 }, }, + { 2565 /* vsri */, ARM::VSRIv8i8, Convert__Reg1_2__Tie0__Reg1_3__ShrImm81_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR, MCK_ShrImm8 }, }, + { 2570 /* vst1 */, ARM::VST1q16, Convert__AlignedMemory64or1282_3__VecListDPair1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPair, MCK_AlignedMemory64or128 }, }, + { 2570 /* vst1 */, ARM::VST1d16Q, Convert__AlignedMemory64or128or2562_3__VecListFourD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourD, MCK_AlignedMemory64or128or256 }, }, + { 2570 /* vst1 */, ARM::VST1d16, Convert__AlignedMemory642_3__VecListOneD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListOneD, MCK_AlignedMemory64 }, }, + { 2570 /* vst1 */, ARM::VST1LNdAsm_16, Convert__VecListOneDHWordIndexed2_2__AlignedMemory162_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListOneDHWordIndexed, MCK_AlignedMemory16 }, }, + { 2570 /* vst1 */, ARM::VST1d16T, Convert__AlignedMemory642_3__VecListThreeD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeD, MCK_AlignedMemory64 }, }, + { 2570 /* vst1 */, ARM::VST1q32, Convert__AlignedMemory64or1282_3__VecListDPair1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPair, MCK_AlignedMemory64or128 }, }, + { 2570 /* vst1 */, ARM::VST1d32Q, Convert__AlignedMemory64or128or2562_3__VecListFourD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourD, MCK_AlignedMemory64or128or256 }, }, + { 2570 /* vst1 */, ARM::VST1d32, Convert__AlignedMemory642_3__VecListOneD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListOneD, MCK_AlignedMemory64 }, }, + { 2570 /* vst1 */, ARM::VST1LNdAsm_32, Convert__VecListOneDWordIndexed2_2__AlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListOneDWordIndexed, MCK_AlignedMemory32 }, }, + { 2570 /* vst1 */, ARM::VST1d32T, Convert__AlignedMemory642_3__VecListThreeD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeD, MCK_AlignedMemory64 }, }, + { 2570 /* vst1 */, ARM::VST1q64, Convert__AlignedMemory64or1282_3__VecListDPair1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListDPair, MCK_AlignedMemory64or128 }, }, + { 2570 /* vst1 */, ARM::VST1d64Q, Convert__AlignedMemory64or128or2562_3__VecListFourD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListFourD, MCK_AlignedMemory64or128or256 }, }, + { 2570 /* vst1 */, ARM::VST1d64, Convert__AlignedMemory642_3__VecListOneD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListOneD, MCK_AlignedMemory64 }, }, + { 2570 /* vst1 */, ARM::VST1d64T, Convert__AlignedMemory642_3__VecListThreeD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListThreeD, MCK_AlignedMemory64 }, }, + { 2570 /* vst1 */, ARM::VST1q8, Convert__AlignedMemory64or1282_3__VecListDPair1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPair, MCK_AlignedMemory64or128 }, }, + { 2570 /* vst1 */, ARM::VST1d8Q, Convert__AlignedMemory64or128or2562_3__VecListFourD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourD, MCK_AlignedMemory64or128or256 }, }, + { 2570 /* vst1 */, ARM::VST1d8, Convert__AlignedMemory642_3__VecListOneD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListOneD, MCK_AlignedMemory64 }, }, + { 2570 /* vst1 */, ARM::VST1LNdAsm_8, Convert__VecListOneDByteIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListOneDByteIndexed, MCK_AlignedMemoryNone }, }, + { 2570 /* vst1 */, ARM::VST1d8T, Convert__AlignedMemory642_3__VecListThreeD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeD, MCK_AlignedMemory64 }, }, + { 2570 /* vst1 */, ARM::VST1q16wb_fixed, Convert__imm_95_0__AlignedMemory64or1282_3__VecListDPair1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 2570 /* vst1 */, ARM::VST1q16wb_register, Convert__imm_95_0__AlignedMemory64or1282_3__Reg1_4__VecListDPair1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 2570 /* vst1 */, ARM::VST1d16Qwb_fixed, Convert__imm_95_0__AlignedMemory64or128or2562_3__VecListFourD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 2570 /* vst1 */, ARM::VST1d16Qwb_register, Convert__imm_95_0__AlignedMemory64or128or2562_3__Reg1_4__VecListFourD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 2570 /* vst1 */, ARM::VST1d16wb_fixed, Convert__imm_95_0__AlignedMemory642_3__VecListOneD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListOneD, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 2570 /* vst1 */, ARM::VST1d16wb_register, Convert__imm_95_0__AlignedMemory642_3__Reg1_4__VecListOneD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListOneD, MCK_AlignedMemory64, MCK_rGPR }, }, + { 2570 /* vst1 */, ARM::VST1LNdWB_fixed_Asm_16, Convert__VecListOneDHWordIndexed2_2__AlignedMemory162_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListOneDHWordIndexed, MCK_AlignedMemory16, MCK__EXCLAIM_ }, }, + { 2570 /* vst1 */, ARM::VST1LNdWB_register_Asm_16, Convert__VecListOneDHWordIndexed2_2__AlignedMemory162_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListOneDHWordIndexed, MCK_AlignedMemory16, MCK_rGPR }, }, + { 2570 /* vst1 */, ARM::VST1d16Twb_fixed, Convert__imm_95_0__AlignedMemory642_3__VecListThreeD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeD, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 2570 /* vst1 */, ARM::VST1d16Twb_register, Convert__imm_95_0__AlignedMemory642_3__Reg1_4__VecListThreeD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeD, MCK_AlignedMemory64, MCK_rGPR }, }, + { 2570 /* vst1 */, ARM::VST1q32wb_fixed, Convert__imm_95_0__AlignedMemory64or1282_3__VecListDPair1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 2570 /* vst1 */, ARM::VST1q32wb_register, Convert__imm_95_0__AlignedMemory64or1282_3__Reg1_4__VecListDPair1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 2570 /* vst1 */, ARM::VST1d32Qwb_fixed, Convert__imm_95_0__AlignedMemory64or128or2562_3__VecListFourD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 2570 /* vst1 */, ARM::VST1d32Qwb_register, Convert__imm_95_0__AlignedMemory64or128or2562_3__Reg1_4__VecListFourD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 2570 /* vst1 */, ARM::VST1d32wb_fixed, Convert__imm_95_0__AlignedMemory642_3__VecListOneD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListOneD, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 2570 /* vst1 */, ARM::VST1d32wb_register, Convert__imm_95_0__AlignedMemory642_3__Reg1_4__VecListOneD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListOneD, MCK_AlignedMemory64, MCK_rGPR }, }, + { 2570 /* vst1 */, ARM::VST1LNdWB_fixed_Asm_32, Convert__VecListOneDWordIndexed2_2__AlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListOneDWordIndexed, MCK_AlignedMemory32, MCK__EXCLAIM_ }, }, + { 2570 /* vst1 */, ARM::VST1LNdWB_register_Asm_32, Convert__VecListOneDWordIndexed2_2__AlignedMemory322_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListOneDWordIndexed, MCK_AlignedMemory32, MCK_rGPR }, }, + { 2570 /* vst1 */, ARM::VST1d32Twb_fixed, Convert__imm_95_0__AlignedMemory642_3__VecListThreeD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeD, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 2570 /* vst1 */, ARM::VST1d32Twb_register, Convert__imm_95_0__AlignedMemory642_3__Reg1_4__VecListThreeD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeD, MCK_AlignedMemory64, MCK_rGPR }, }, + { 2570 /* vst1 */, ARM::VST1q64wb_fixed, Convert__imm_95_0__AlignedMemory64or1282_3__VecListDPair1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 2570 /* vst1 */, ARM::VST1q64wb_register, Convert__imm_95_0__AlignedMemory64or1282_3__Reg1_4__VecListDPair1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 2570 /* vst1 */, ARM::VST1d64Qwb_fixed, Convert__imm_95_0__AlignedMemory64or128or2562_3__VecListFourD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 2570 /* vst1 */, ARM::VST1d64Qwb_register, Convert__imm_95_0__AlignedMemory64or128or2562_3__Reg1_4__VecListFourD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 2570 /* vst1 */, ARM::VST1d64wb_fixed, Convert__imm_95_0__AlignedMemory642_3__VecListOneD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListOneD, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 2570 /* vst1 */, ARM::VST1d64wb_register, Convert__imm_95_0__AlignedMemory642_3__Reg1_4__VecListOneD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListOneD, MCK_AlignedMemory64, MCK_rGPR }, }, + { 2570 /* vst1 */, ARM::VST1d64Twb_fixed, Convert__imm_95_0__AlignedMemory642_3__VecListThreeD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListThreeD, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 2570 /* vst1 */, ARM::VST1d64Twb_register, Convert__imm_95_0__AlignedMemory642_3__Reg1_4__VecListThreeD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_VecListThreeD, MCK_AlignedMemory64, MCK_rGPR }, }, + { 2570 /* vst1 */, ARM::VST1q8wb_fixed, Convert__imm_95_0__AlignedMemory64or1282_3__VecListDPair1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 2570 /* vst1 */, ARM::VST1q8wb_register, Convert__imm_95_0__AlignedMemory64or1282_3__Reg1_4__VecListDPair1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 2570 /* vst1 */, ARM::VST1d8Qwb_fixed, Convert__imm_95_0__AlignedMemory64or128or2562_3__VecListFourD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 2570 /* vst1 */, ARM::VST1d8Qwb_register, Convert__imm_95_0__AlignedMemory64or128or2562_3__Reg1_4__VecListFourD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 2570 /* vst1 */, ARM::VST1d8wb_fixed, Convert__imm_95_0__AlignedMemory642_3__VecListOneD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListOneD, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 2570 /* vst1 */, ARM::VST1d8wb_register, Convert__imm_95_0__AlignedMemory642_3__Reg1_4__VecListOneD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListOneD, MCK_AlignedMemory64, MCK_rGPR }, }, + { 2570 /* vst1 */, ARM::VST1LNdWB_fixed_Asm_8, Convert__VecListOneDByteIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListOneDByteIndexed, MCK_AlignedMemoryNone, MCK__EXCLAIM_ }, }, + { 2570 /* vst1 */, ARM::VST1LNdWB_register_Asm_8, Convert__VecListOneDByteIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListOneDByteIndexed, MCK_AlignedMemoryNone, MCK_rGPR }, }, + { 2570 /* vst1 */, ARM::VST1d8Twb_fixed, Convert__imm_95_0__AlignedMemory642_3__VecListThreeD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeD, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 2570 /* vst1 */, ARM::VST1d8Twb_register, Convert__imm_95_0__AlignedMemory642_3__Reg1_4__VecListThreeD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeD, MCK_AlignedMemory64, MCK_rGPR }, }, + { 2570 /* vst1 */, ARM::VST1LNd16, Convert__AlignedMemory2_8__Reg1_3__Imm1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK__91_, MCK_Imm, MCK__93_, MCK__125_, MCK_AlignedMemory }, }, + { 2570 /* vst1 */, ARM::VST1LNd8, Convert__AlignedMemory2_8__Reg1_3__Imm1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK__91_, MCK_Imm, MCK__93_, MCK__125_, MCK_AlignedMemory }, }, + { 2570 /* vst1 */, ARM::VST1LNd16_UPD, Convert__imm_95_0__AlignedMemory2_8__Imm1_9__Reg1_3__Imm1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK__91_, MCK_Imm, MCK__93_, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 2570 /* vst1 */, ARM::VST1LNd32, Convert__Reg1_8__Imm1_9__Reg1_3__Imm1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK__91_, MCK_Imm, MCK__93_, MCK__125_, MCK_GPR, MCK_Imm }, }, + { 2570 /* vst1 */, ARM::VST1LNd8_UPD, Convert__imm_95_0__AlignedMemory2_8__Imm1_9__Reg1_3__Imm1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK__91_, MCK_Imm, MCK__93_, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 2570 /* vst1 */, ARM::VST1LNd32_UPD, Convert__imm_95_0__Reg1_8__Imm1_9__Imm1_10__Reg1_3__Imm1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK__91_, MCK_Imm, MCK__93_, MCK__125_, MCK_GPR, MCK_Imm, MCK_Imm }, }, + { 2575 /* vst2 */, ARM::VST2d16, Convert__AlignedMemory64or1282_3__VecListDPair1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPair, MCK_AlignedMemory64or128 }, }, + { 2575 /* vst2 */, ARM::VST2b16, Convert__AlignedMemory64or1282_3__VecListDPairSpaced1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPairSpaced, MCK_AlignedMemory64or128 }, }, + { 2575 /* vst2 */, ARM::VST2q16, Convert__AlignedMemory64or128or2562_3__VecListFourD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourD, MCK_AlignedMemory64or128or256 }, }, + { 2575 /* vst2 */, ARM::VST2LNdAsm_16, Convert__VecListTwoDHWordIndexed2_2__AlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListTwoDHWordIndexed, MCK_AlignedMemory32 }, }, + { 2575 /* vst2 */, ARM::VST2LNqAsm_16, Convert__VecListTwoQHWordIndexed2_2__AlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListTwoQHWordIndexed, MCK_AlignedMemory32 }, }, + { 2575 /* vst2 */, ARM::VST2d32, Convert__AlignedMemory64or1282_3__VecListDPair1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPair, MCK_AlignedMemory64or128 }, }, + { 2575 /* vst2 */, ARM::VST2b32, Convert__AlignedMemory64or1282_3__VecListDPairSpaced1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPairSpaced, MCK_AlignedMemory64or128 }, }, + { 2575 /* vst2 */, ARM::VST2q32, Convert__AlignedMemory64or128or2562_3__VecListFourD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourD, MCK_AlignedMemory64or128or256 }, }, + { 2575 /* vst2 */, ARM::VST2LNdAsm_32, Convert__VecListTwoDWordIndexed2_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListTwoDWordIndexed, MCK_AlignedMemory64 }, }, + { 2575 /* vst2 */, ARM::VST2LNqAsm_32, Convert__VecListTwoQWordIndexed2_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListTwoQWordIndexed, MCK_AlignedMemory64 }, }, + { 2575 /* vst2 */, ARM::VST2d8, Convert__AlignedMemory64or1282_3__VecListDPair1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPair, MCK_AlignedMemory64or128 }, }, + { 2575 /* vst2 */, ARM::VST2b8, Convert__AlignedMemory64or1282_3__VecListDPairSpaced1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPairSpaced, MCK_AlignedMemory64or128 }, }, + { 2575 /* vst2 */, ARM::VST2q8, Convert__AlignedMemory64or128or2562_3__VecListFourD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourD, MCK_AlignedMemory64or128or256 }, }, + { 2575 /* vst2 */, ARM::VST2LNdAsm_8, Convert__VecListTwoDByteIndexed2_2__AlignedMemory162_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListTwoDByteIndexed, MCK_AlignedMemory16 }, }, + { 2575 /* vst2 */, ARM::VST2d16wb_fixed, Convert__imm_95_0__AlignedMemory64or1282_3__VecListDPair1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 2575 /* vst2 */, ARM::VST2d16wb_register, Convert__imm_95_0__AlignedMemory64or1282_3__Reg1_4__VecListDPair1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 2575 /* vst2 */, ARM::VST2b16wb_fixed, Convert__imm_95_0__AlignedMemory64or1282_3__VecListDPairSpaced1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPairSpaced, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 2575 /* vst2 */, ARM::VST2b16wb_register, Convert__imm_95_0__AlignedMemory64or1282_3__Reg1_4__VecListDPairSpaced1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListDPairSpaced, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 2575 /* vst2 */, ARM::VST2q16wb_fixed, Convert__imm_95_0__AlignedMemory64or128or2562_3__VecListFourD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 2575 /* vst2 */, ARM::VST2q16wb_register, Convert__imm_95_0__AlignedMemory64or128or2562_3__Reg1_4__VecListFourD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 2575 /* vst2 */, ARM::VST2LNdWB_fixed_Asm_16, Convert__VecListTwoDHWordIndexed2_2__AlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListTwoDHWordIndexed, MCK_AlignedMemory32, MCK__EXCLAIM_ }, }, + { 2575 /* vst2 */, ARM::VST2LNdWB_register_Asm_16, Convert__VecListTwoDHWordIndexed2_2__AlignedMemory322_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListTwoDHWordIndexed, MCK_AlignedMemory32, MCK_rGPR }, }, + { 2575 /* vst2 */, ARM::VST2LNqWB_fixed_Asm_16, Convert__VecListTwoQHWordIndexed2_2__AlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListTwoQHWordIndexed, MCK_AlignedMemory32, MCK__EXCLAIM_ }, }, + { 2575 /* vst2 */, ARM::VST2LNqWB_register_Asm_16, Convert__VecListTwoQHWordIndexed2_2__AlignedMemory322_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListTwoQHWordIndexed, MCK_AlignedMemory32, MCK_rGPR }, }, + { 2575 /* vst2 */, ARM::VST2d32wb_fixed, Convert__imm_95_0__AlignedMemory64or1282_3__VecListDPair1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 2575 /* vst2 */, ARM::VST2d32wb_register, Convert__imm_95_0__AlignedMemory64or1282_3__Reg1_4__VecListDPair1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 2575 /* vst2 */, ARM::VST2b32wb_fixed, Convert__imm_95_0__AlignedMemory64or1282_3__VecListDPairSpaced1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPairSpaced, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 2575 /* vst2 */, ARM::VST2b32wb_register, Convert__imm_95_0__AlignedMemory64or1282_3__Reg1_4__VecListDPairSpaced1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListDPairSpaced, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 2575 /* vst2 */, ARM::VST2q32wb_fixed, Convert__imm_95_0__AlignedMemory64or128or2562_3__VecListFourD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 2575 /* vst2 */, ARM::VST2q32wb_register, Convert__imm_95_0__AlignedMemory64or128or2562_3__Reg1_4__VecListFourD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 2575 /* vst2 */, ARM::VST2LNdWB_fixed_Asm_32, Convert__VecListTwoDWordIndexed2_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListTwoDWordIndexed, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 2575 /* vst2 */, ARM::VST2LNdWB_register_Asm_32, Convert__VecListTwoDWordIndexed2_2__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListTwoDWordIndexed, MCK_AlignedMemory64, MCK_rGPR }, }, + { 2575 /* vst2 */, ARM::VST2LNqWB_fixed_Asm_32, Convert__VecListTwoQWordIndexed2_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListTwoQWordIndexed, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 2575 /* vst2 */, ARM::VST2LNqWB_register_Asm_32, Convert__VecListTwoQWordIndexed2_2__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListTwoQWordIndexed, MCK_AlignedMemory64, MCK_rGPR }, }, + { 2575 /* vst2 */, ARM::VST2d8wb_fixed, Convert__imm_95_0__AlignedMemory64or1282_3__VecListDPair1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 2575 /* vst2 */, ARM::VST2d8wb_register, Convert__imm_95_0__AlignedMemory64or1282_3__Reg1_4__VecListDPair1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPair, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 2575 /* vst2 */, ARM::VST2b8wb_fixed, Convert__imm_95_0__AlignedMemory64or1282_3__VecListDPairSpaced1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPairSpaced, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 2575 /* vst2 */, ARM::VST2b8wb_register, Convert__imm_95_0__AlignedMemory64or1282_3__Reg1_4__VecListDPairSpaced1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListDPairSpaced, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 2575 /* vst2 */, ARM::VST2q8wb_fixed, Convert__imm_95_0__AlignedMemory64or128or2562_3__VecListFourD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 2575 /* vst2 */, ARM::VST2q8wb_register, Convert__imm_95_0__AlignedMemory64or128or2562_3__Reg1_4__VecListFourD1_2__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 2575 /* vst2 */, ARM::VST2LNdWB_fixed_Asm_8, Convert__VecListTwoDByteIndexed2_2__AlignedMemory162_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListTwoDByteIndexed, MCK_AlignedMemory16, MCK__EXCLAIM_ }, }, + { 2575 /* vst2 */, ARM::VST2LNdWB_register_Asm_8, Convert__VecListTwoDByteIndexed2_2__AlignedMemory162_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListTwoDByteIndexed, MCK_AlignedMemory16, MCK_rGPR }, }, + { 2580 /* vst3 */, ARM::VST3dAsm_16, Convert__VecListThreeD1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeD, MCK_AlignedMemory64 }, }, + { 2580 /* vst3 */, ARM::VST3LNdAsm_16, Convert__VecListThreeDHWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeDHWordIndexed, MCK_AlignedMemoryNone }, }, + { 2580 /* vst3 */, ARM::VST3qAsm_16, Convert__VecListThreeQ1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeQ, MCK_AlignedMemory64 }, }, + { 2580 /* vst3 */, ARM::VST3LNqAsm_16, Convert__VecListThreeQHWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeQHWordIndexed, MCK_AlignedMemoryNone }, }, + { 2580 /* vst3 */, ARM::VST3dAsm_32, Convert__VecListThreeD1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeD, MCK_AlignedMemory64 }, }, + { 2580 /* vst3 */, ARM::VST3LNdAsm_32, Convert__VecListThreeDWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeDWordIndexed, MCK_AlignedMemoryNone }, }, + { 2580 /* vst3 */, ARM::VST3qAsm_32, Convert__VecListThreeQ1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeQ, MCK_AlignedMemory64 }, }, + { 2580 /* vst3 */, ARM::VST3LNqAsm_32, Convert__VecListThreeQWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeQWordIndexed, MCK_AlignedMemoryNone }, }, + { 2580 /* vst3 */, ARM::VST3dAsm_8, Convert__VecListThreeD1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeD, MCK_AlignedMemory64 }, }, + { 2580 /* vst3 */, ARM::VST3LNdAsm_8, Convert__VecListThreeDByteIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeDByteIndexed, MCK_AlignedMemoryNone }, }, + { 2580 /* vst3 */, ARM::VST3qAsm_8, Convert__VecListThreeQ1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeQ, MCK_AlignedMemory64 }, }, + { 2580 /* vst3 */, ARM::VST3dWB_fixed_Asm_16, Convert__VecListThreeD1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeD, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 2580 /* vst3 */, ARM::VST3dWB_register_Asm_16, Convert__VecListThreeD1_2__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeD, MCK_AlignedMemory64, MCK_rGPR }, }, + { 2580 /* vst3 */, ARM::VST3LNdWB_fixed_Asm_16, Convert__VecListThreeDHWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeDHWordIndexed, MCK_AlignedMemoryNone, MCK__EXCLAIM_ }, }, + { 2580 /* vst3 */, ARM::VST3LNdWB_register_Asm_16, Convert__VecListThreeDHWordIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeDHWordIndexed, MCK_AlignedMemoryNone, MCK_rGPR }, }, + { 2580 /* vst3 */, ARM::VST3qWB_fixed_Asm_16, Convert__VecListThreeQ1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeQ, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 2580 /* vst3 */, ARM::VST3qWB_register_Asm_16, Convert__VecListThreeQ1_2__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeQ, MCK_AlignedMemory64, MCK_rGPR }, }, + { 2580 /* vst3 */, ARM::VST3LNqWB_fixed_Asm_16, Convert__VecListThreeQHWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeQHWordIndexed, MCK_AlignedMemoryNone, MCK__EXCLAIM_ }, }, + { 2580 /* vst3 */, ARM::VST3LNqWB_register_Asm_16, Convert__VecListThreeQHWordIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListThreeQHWordIndexed, MCK_AlignedMemoryNone, MCK_rGPR }, }, + { 2580 /* vst3 */, ARM::VST3dWB_fixed_Asm_32, Convert__VecListThreeD1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeD, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 2580 /* vst3 */, ARM::VST3dWB_register_Asm_32, Convert__VecListThreeD1_2__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeD, MCK_AlignedMemory64, MCK_rGPR }, }, + { 2580 /* vst3 */, ARM::VST3LNdWB_fixed_Asm_32, Convert__VecListThreeDWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeDWordIndexed, MCK_AlignedMemoryNone, MCK__EXCLAIM_ }, }, + { 2580 /* vst3 */, ARM::VST3LNdWB_register_Asm_32, Convert__VecListThreeDWordIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeDWordIndexed, MCK_AlignedMemoryNone, MCK_rGPR }, }, + { 2580 /* vst3 */, ARM::VST3qWB_fixed_Asm_32, Convert__VecListThreeQ1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeQ, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 2580 /* vst3 */, ARM::VST3qWB_register_Asm_32, Convert__VecListThreeQ1_2__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeQ, MCK_AlignedMemory64, MCK_rGPR }, }, + { 2580 /* vst3 */, ARM::VST3LNqWB_fixed_Asm_32, Convert__VecListThreeQWordIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeQWordIndexed, MCK_AlignedMemoryNone, MCK__EXCLAIM_ }, }, + { 2580 /* vst3 */, ARM::VST3LNqWB_register_Asm_32, Convert__VecListThreeQWordIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListThreeQWordIndexed, MCK_AlignedMemoryNone, MCK_rGPR }, }, + { 2580 /* vst3 */, ARM::VST3dWB_fixed_Asm_8, Convert__VecListThreeD1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeD, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 2580 /* vst3 */, ARM::VST3dWB_register_Asm_8, Convert__VecListThreeD1_2__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeD, MCK_AlignedMemory64, MCK_rGPR }, }, + { 2580 /* vst3 */, ARM::VST3LNdWB_fixed_Asm_8, Convert__VecListThreeDByteIndexed2_2__AlignedMemoryNone2_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeDByteIndexed, MCK_AlignedMemoryNone, MCK__EXCLAIM_ }, }, + { 2580 /* vst3 */, ARM::VST3LNdWB_register_Asm_8, Convert__VecListThreeDByteIndexed2_2__AlignedMemoryNone2_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeDByteIndexed, MCK_AlignedMemoryNone, MCK_rGPR }, }, + { 2580 /* vst3 */, ARM::VST3qWB_fixed_Asm_8, Convert__VecListThreeQ1_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeQ, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 2580 /* vst3 */, ARM::VST3qWB_register_Asm_8, Convert__VecListThreeQ1_2__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListThreeQ, MCK_AlignedMemory64, MCK_rGPR }, }, + { 2580 /* vst3 */, ARM::VST3d16, Convert__AlignedMemory2_7__Reg1_3__Reg1_4__Reg1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 2580 /* vst3 */, ARM::VST3q16, Convert__AlignedMemory2_7__Reg1_3__Reg1_4__Reg1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 2580 /* vst3 */, ARM::VST3d32, Convert__AlignedMemory2_7__Reg1_3__Reg1_4__Reg1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 2580 /* vst3 */, ARM::VST3q32, Convert__AlignedMemory2_7__Reg1_3__Reg1_4__Reg1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 2580 /* vst3 */, ARM::VST3d8, Convert__AlignedMemory2_7__Reg1_3__Reg1_4__Reg1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 2580 /* vst3 */, ARM::VST3q8, Convert__AlignedMemory2_7__Reg1_3__Reg1_4__Reg1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 2580 /* vst3 */, ARM::VST3d16_UPD, Convert__imm_95_0__AlignedMemory2_7__Imm1_8__Reg1_3__Reg1_4__Reg1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 2580 /* vst3 */, ARM::VST3q16_UPD, Convert__imm_95_0__AlignedMemory2_7__Imm1_8__Reg1_3__Reg1_4__Reg1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 2580 /* vst3 */, ARM::VST3d32_UPD, Convert__imm_95_0__AlignedMemory2_7__Imm1_8__Reg1_3__Reg1_4__Reg1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 2580 /* vst3 */, ARM::VST3q32_UPD, Convert__imm_95_0__AlignedMemory2_7__Imm1_8__Reg1_3__Reg1_4__Reg1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 2580 /* vst3 */, ARM::VST3d8_UPD, Convert__imm_95_0__AlignedMemory2_7__Imm1_8__Reg1_3__Reg1_4__Reg1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 2580 /* vst3 */, ARM::VST3q8_UPD, Convert__imm_95_0__AlignedMemory2_7__Imm1_8__Reg1_3__Reg1_4__Reg1_5__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 2585 /* vst4 */, ARM::VST4dAsm_16, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourD, MCK_AlignedMemory64or128or256 }, }, + { 2585 /* vst4 */, ARM::VST4LNdAsm_16, Convert__VecListFourDHWordIndexed2_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourDHWordIndexed, MCK_AlignedMemory64 }, }, + { 2585 /* vst4 */, ARM::VST4qAsm_16, Convert__VecListFourQ1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourQ, MCK_AlignedMemory64or128or256 }, }, + { 2585 /* vst4 */, ARM::VST4LNqAsm_16, Convert__VecListFourQHWordIndexed2_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourQHWordIndexed, MCK_AlignedMemory64 }, }, + { 2585 /* vst4 */, ARM::VST4dAsm_32, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourD, MCK_AlignedMemory64or128or256 }, }, + { 2585 /* vst4 */, ARM::VST4LNdAsm_32, Convert__VecListFourDWordIndexed2_2__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourDWordIndexed, MCK_AlignedMemory64or128 }, }, + { 2585 /* vst4 */, ARM::VST4qAsm_32, Convert__VecListFourQ1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourQ, MCK_AlignedMemory64or128or256 }, }, + { 2585 /* vst4 */, ARM::VST4LNqAsm_32, Convert__VecListFourQWordIndexed2_2__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourQWordIndexed, MCK_AlignedMemory64or128 }, }, + { 2585 /* vst4 */, ARM::VST4dAsm_8, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourD, MCK_AlignedMemory64or128or256 }, }, + { 2585 /* vst4 */, ARM::VST4LNdAsm_8, Convert__VecListFourDByteIndexed2_2__AlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourDByteIndexed, MCK_AlignedMemory32 }, }, + { 2585 /* vst4 */, ARM::VST4qAsm_8, Convert__VecListFourQ1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourQ, MCK_AlignedMemory64or128or256 }, }, + { 2585 /* vst4 */, ARM::VST4dWB_fixed_Asm_16, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 2585 /* vst4 */, ARM::VST4dWB_register_Asm_16, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 2585 /* vst4 */, ARM::VST4LNdWB_fixed_Asm_16, Convert__VecListFourDHWordIndexed2_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourDHWordIndexed, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 2585 /* vst4 */, ARM::VST4LNdWB_register_Asm_16, Convert__VecListFourDHWordIndexed2_2__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourDHWordIndexed, MCK_AlignedMemory64, MCK_rGPR }, }, + { 2585 /* vst4 */, ARM::VST4qWB_fixed_Asm_16, Convert__VecListFourQ1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourQ, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 2585 /* vst4 */, ARM::VST4qWB_register_Asm_16, Convert__VecListFourQ1_2__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourQ, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 2585 /* vst4 */, ARM::VST4LNqWB_fixed_Asm_16, Convert__VecListFourQHWordIndexed2_2__AlignedMemory642_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourQHWordIndexed, MCK_AlignedMemory64, MCK__EXCLAIM_ }, }, + { 2585 /* vst4 */, ARM::VST4LNqWB_register_Asm_16, Convert__VecListFourQHWordIndexed2_2__AlignedMemory642_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_VecListFourQHWordIndexed, MCK_AlignedMemory64, MCK_rGPR }, }, + { 2585 /* vst4 */, ARM::VST4dWB_fixed_Asm_32, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 2585 /* vst4 */, ARM::VST4dWB_register_Asm_32, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 2585 /* vst4 */, ARM::VST4LNdWB_fixed_Asm_32, Convert__VecListFourDWordIndexed2_2__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourDWordIndexed, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 2585 /* vst4 */, ARM::VST4LNdWB_register_Asm_32, Convert__VecListFourDWordIndexed2_2__AlignedMemory64or1282_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourDWordIndexed, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 2585 /* vst4 */, ARM::VST4qWB_fixed_Asm_32, Convert__VecListFourQ1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourQ, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 2585 /* vst4 */, ARM::VST4qWB_register_Asm_32, Convert__VecListFourQ1_2__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourQ, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 2585 /* vst4 */, ARM::VST4LNqWB_fixed_Asm_32, Convert__VecListFourQWordIndexed2_2__AlignedMemory64or1282_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourQWordIndexed, MCK_AlignedMemory64or128, MCK__EXCLAIM_ }, }, + { 2585 /* vst4 */, ARM::VST4LNqWB_register_Asm_32, Convert__VecListFourQWordIndexed2_2__AlignedMemory64or1282_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_VecListFourQWordIndexed, MCK_AlignedMemory64or128, MCK_rGPR }, }, + { 2585 /* vst4 */, ARM::VST4dWB_fixed_Asm_8, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 2585 /* vst4 */, ARM::VST4dWB_register_Asm_8, Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourD, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 2585 /* vst4 */, ARM::VST4LNdWB_fixed_Asm_8, Convert__VecListFourDByteIndexed2_2__AlignedMemory322_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourDByteIndexed, MCK_AlignedMemory32, MCK__EXCLAIM_ }, }, + { 2585 /* vst4 */, ARM::VST4LNdWB_register_Asm_8, Convert__VecListFourDByteIndexed2_2__AlignedMemory322_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourDByteIndexed, MCK_AlignedMemory32, MCK_rGPR }, }, + { 2585 /* vst4 */, ARM::VST4qWB_fixed_Asm_8, Convert__VecListFourQ1_2__AlignedMemory64or128or2562_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourQ, MCK_AlignedMemory64or128or256, MCK__EXCLAIM_ }, }, + { 2585 /* vst4 */, ARM::VST4qWB_register_Asm_8, Convert__VecListFourQ1_2__AlignedMemory64or128or2562_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_VecListFourQ, MCK_AlignedMemory64or128or256, MCK_rGPR }, }, + { 2585 /* vst4 */, ARM::VST4d16, Convert__AlignedMemory2_8__Reg1_3__Reg1_4__Reg1_5__Reg1_6__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 2585 /* vst4 */, ARM::VST4q16, Convert__AlignedMemory2_8__Reg1_3__Reg1_4__Reg1_5__Reg1_6__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 2585 /* vst4 */, ARM::VST4d32, Convert__AlignedMemory2_8__Reg1_3__Reg1_4__Reg1_5__Reg1_6__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 2585 /* vst4 */, ARM::VST4q32, Convert__AlignedMemory2_8__Reg1_3__Reg1_4__Reg1_5__Reg1_6__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 2585 /* vst4 */, ARM::VST4d8, Convert__AlignedMemory2_8__Reg1_3__Reg1_4__Reg1_5__Reg1_6__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 2585 /* vst4 */, ARM::VST4q8, Convert__AlignedMemory2_8__Reg1_3__Reg1_4__Reg1_5__Reg1_6__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory }, }, + { 2585 /* vst4 */, ARM::VST4d16_UPD, Convert__imm_95_0__AlignedMemory2_8__Imm1_9__Reg1_3__Reg1_4__Reg1_5__Reg1_6__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 2585 /* vst4 */, ARM::VST4q16_UPD, Convert__imm_95_0__AlignedMemory2_8__Imm1_9__Reg1_3__Reg1_4__Reg1_5__Reg1_6__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 2585 /* vst4 */, ARM::VST4d32_UPD, Convert__imm_95_0__AlignedMemory2_8__Imm1_9__Reg1_3__Reg1_4__Reg1_5__Reg1_6__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 2585 /* vst4 */, ARM::VST4q32_UPD, Convert__imm_95_0__AlignedMemory2_8__Imm1_9__Reg1_3__Reg1_4__Reg1_5__Reg1_6__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 2585 /* vst4 */, ARM::VST4d8_UPD, Convert__imm_95_0__AlignedMemory2_8__Imm1_9__Reg1_3__Reg1_4__Reg1_5__Reg1_6__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 2585 /* vst4 */, ARM::VST4q8_UPD, Convert__imm_95_0__AlignedMemory2_8__Imm1_9__Reg1_3__Reg1_4__Reg1_5__Reg1_6__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK__123_, MCK_DPR, MCK_DPR, MCK_DPR, MCK_DPR, MCK__125_, MCK_AlignedMemory, MCK_Imm }, }, + { 2590 /* vstmdb */, ARM::VSTMDDB_UPD, Convert__Reg1_1__Tie0__CondCode2_0__DPRRegList1_3, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_DPRRegList }, }, + { 2590 /* vstmdb */, ARM::VSTMSDB_UPD, Convert__Reg1_1__Tie0__CondCode2_0__SPRRegList1_3, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_SPRRegList }, }, + { 2597 /* vstmia */, ARM::VSTMDIA, Convert__Reg1_1__CondCode2_0__DPRRegList1_2, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK_DPRRegList }, }, + { 2597 /* vstmia */, ARM::VSTMSIA, Convert__Reg1_1__CondCode2_0__SPRRegList1_2, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK_SPRRegList }, }, + { 2597 /* vstmia */, ARM::VSTMDIA_UPD, Convert__Reg1_1__Tie0__CondCode2_0__DPRRegList1_3, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_DPRRegList }, }, + { 2597 /* vstmia */, ARM::VSTMSIA_UPD, Convert__Reg1_1__Tie0__CondCode2_0__SPRRegList1_3, Feature_HasVFP2, { MCK_CondCode, MCK_GPR, MCK__EXCLAIM_, MCK_SPRRegList }, }, + { 2604 /* vstr */, ARM::VSTRD, Convert__Reg1_1__AddrMode52_2__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_DPR, MCK_AddrMode5 }, }, + { 2604 /* vstr */, ARM::VSTRS, Convert__Reg1_1__AddrMode52_2__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK_SPR, MCK_AddrMode5 }, }, + { 2604 /* vstr */, ARM::VSTRH, Convert__Reg1_2__AddrMode5FP162_3__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_16, MCK_SPR, MCK_AddrMode5FP16 }, }, + { 2604 /* vstr */, ARM::VSTRS, Convert__Reg1_2__AddrMode52_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_32, MCK_SPR, MCK_AddrMode5 }, }, + { 2604 /* vstr */, ARM::VSTRD, Convert__Reg1_2__AddrMode52_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_64, MCK_DPR, MCK_AddrMode5 }, }, + { 2609 /* vsub */, ARM::VSUBfq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR }, }, + { 2609 /* vsub */, ARM::VSUBfd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR }, }, + { 2609 /* vsub */, ARM::VSUBS, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR }, }, + { 2609 /* vsub */, ARM::VSUBD, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR }, }, + { 2609 /* vsub */, ARM::VSUBv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_QPR }, }, + { 2609 /* vsub */, ARM::VSUBv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_DPR }, }, + { 2609 /* vsub */, ARM::VSUBv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_QPR }, }, + { 2609 /* vsub */, ARM::VSUBv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_DPR }, }, + { 2609 /* vsub */, ARM::VSUBv2i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i64, MCK_QPR, MCK_QPR }, }, + { 2609 /* vsub */, ARM::VSUBv1i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i64, MCK_DPR, MCK_DPR }, }, + { 2609 /* vsub */, ARM::VSUBv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_QPR, MCK_QPR }, }, + { 2609 /* vsub */, ARM::VSUBv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_DPR, MCK_DPR }, }, + { 2609 /* vsub */, ARM::VSUBhq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR }, }, + { 2609 /* vsub */, ARM::VSUBhd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR }, }, + { 2609 /* vsub */, ARM::VSUBH, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR }, }, + { 2609 /* vsub */, ARM::VSUBfq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2609 /* vsub */, ARM::VSUBfd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_f32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2609 /* vsub */, ARM::VSUBS, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2, { MCK_CondCode, MCK__DOT_f32, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2609 /* vsub */, ARM::VSUBD, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasVFP2|Feature_HasDPVFP, { MCK_CondCode, MCK__DOT_f64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2609 /* vsub */, ARM::VSUBv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2609 /* vsub */, ARM::VSUBv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2609 /* vsub */, ARM::VSUBv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2609 /* vsub */, ARM::VSUBv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2609 /* vsub */, ARM::VSUBv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i64, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2609 /* vsub */, ARM::VSUBv1i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i64, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2609 /* vsub */, ARM::VSUBv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2609 /* vsub */, ARM::VSUBv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2609 /* vsub */, ARM::VSUBhq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2609 /* vsub */, ARM::VSUBhd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON|Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2609 /* vsub */, ARM::VSUBH, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasFullFP16, { MCK_CondCode, MCK__DOT_f16, MCK_SPR, MCK_SPR, MCK_SPR }, }, + { 2614 /* vsubhn */, ARM::VSUBHNv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i16, MCK_DPR, MCK_QPR, MCK_QPR }, }, + { 2614 /* vsubhn */, ARM::VSUBHNv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i32, MCK_DPR, MCK_QPR, MCK_QPR }, }, + { 2614 /* vsubhn */, ARM::VSUBHNv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_i64, MCK_DPR, MCK_QPR, MCK_QPR }, }, + { 2621 /* vsubl */, ARM::VSUBLsv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2621 /* vsubl */, ARM::VSUBLsv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2621 /* vsubl */, ARM::VSUBLsv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2621 /* vsubl */, ARM::VSUBLuv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2621 /* vsubl */, ARM::VSUBLuv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2621 /* vsubl */, ARM::VSUBLuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_DPR, MCK_DPR }, }, + { 2627 /* vsubw */, ARM::VSUBWsv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_DPR }, }, + { 2627 /* vsubw */, ARM::VSUBWsv2i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_DPR }, }, + { 2627 /* vsubw */, ARM::VSUBWsv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_DPR }, }, + { 2627 /* vsubw */, ARM::VSUBWuv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_DPR }, }, + { 2627 /* vsubw */, ARM::VSUBWuv2i64, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_DPR }, }, + { 2627 /* vsubw */, ARM::VSUBWuv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_DPR }, }, + { 2627 /* vsubw */, ARM::VSUBWsv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s16, MCK_QPR, MCK_QPR, MCK_DPR }, }, + { 2627 /* vsubw */, ARM::VSUBWsv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s32, MCK_QPR, MCK_QPR, MCK_DPR }, }, + { 2627 /* vsubw */, ARM::VSUBWsv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_s8, MCK_QPR, MCK_QPR, MCK_DPR }, }, + { 2627 /* vsubw */, ARM::VSUBWuv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u16, MCK_QPR, MCK_QPR, MCK_DPR }, }, + { 2627 /* vsubw */, ARM::VSUBWuv2i64, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u32, MCK_QPR, MCK_QPR, MCK_DPR }, }, + { 2627 /* vsubw */, ARM::VSUBWuv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_u8, MCK_QPR, MCK_QPR, MCK_DPR }, }, + { 2633 /* vswp */, ARM::VSWPq, Convert__Reg1_1__Reg1_2__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_QPR, MCK_QPR }, }, + { 2633 /* vswp */, ARM::VSWPd, Convert__Reg1_1__Reg1_2__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK_DPR, MCK_DPR }, }, + { 2633 /* vswp */, ARM::VSWPq, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR }, }, + { 2633 /* vswp */, ARM::VSWPd, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR }, }, + { 2633 /* vswp */, ARM::VSWPq, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_QPR }, }, + { 2633 /* vswp */, ARM::VSWPd, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR }, }, + { 2633 /* vswp */, ARM::VSWPq, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_QPR, MCK_QPR }, }, + { 2633 /* vswp */, ARM::VSWPd, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_64, MCK_DPR, MCK_DPR }, }, + { 2633 /* vswp */, ARM::VSWPq, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR }, }, + { 2633 /* vswp */, ARM::VSWPd, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR }, }, + { 2638 /* vtbl */, ARM::VTBL2, Convert__Reg1_2__VecListDPair1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_VecListDPair, MCK_DPR }, }, + { 2638 /* vtbl */, ARM::VTBL4, Convert__Reg1_2__VecListFourD1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_VecListFourD, MCK_DPR }, }, + { 2638 /* vtbl */, ARM::VTBL1, Convert__Reg1_2__VecListOneD1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_VecListOneD, MCK_DPR }, }, + { 2638 /* vtbl */, ARM::VTBL3, Convert__Reg1_2__VecListThreeD1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_VecListThreeD, MCK_DPR }, }, + { 2643 /* vtbx */, ARM::VTBX2, Convert__Reg1_2__Tie0__VecListDPair1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_VecListDPair, MCK_DPR }, }, + { 2643 /* vtbx */, ARM::VTBX4, Convert__Reg1_2__Tie0__VecListFourD1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_VecListFourD, MCK_DPR }, }, + { 2643 /* vtbx */, ARM::VTBX1, Convert__Reg1_2__Tie0__VecListOneD1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_VecListOneD, MCK_DPR }, }, + { 2643 /* vtbx */, ARM::VTBX3, Convert__Reg1_2__Tie0__VecListThreeD1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_VecListThreeD, MCK_DPR }, }, + { 2648 /* vtrn */, ARM::VTRNq16, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR }, }, + { 2648 /* vtrn */, ARM::VTRNd16, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR }, }, + { 2648 /* vtrn */, ARM::VTRNq32, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_QPR }, }, + { 2648 /* vtrn */, ARM::VTRNd32, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR }, }, + { 2648 /* vtrn */, ARM::VTRNq8, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR }, }, + { 2648 /* vtrn */, ARM::VTRNd8, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR }, }, + { 2653 /* vtst */, ARM::VTSTv8i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR }, }, + { 2653 /* vtst */, ARM::VTSTv4i16, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR }, }, + { 2653 /* vtst */, ARM::VTSTv4i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_QPR }, }, + { 2653 /* vtst */, ARM::VTSTv2i32, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR }, }, + { 2653 /* vtst */, ARM::VTSTv16i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR }, }, + { 2653 /* vtst */, ARM::VTSTv8i8, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR }, }, + { 2653 /* vtst */, ARM::VTSTv8i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2653 /* vtst */, ARM::VTSTv4i16, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2653 /* vtst */, ARM::VTSTv4i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2653 /* vtst */, ARM::VTSTv2i32, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2653 /* vtst */, ARM::VTSTv16i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR, MCK_QPR }, }, + { 2653 /* vtst */, ARM::VTSTv8i8, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR, MCK_DPR }, }, + { 2658 /* vuzp */, ARM::VUZPq16, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR }, }, + { 2658 /* vuzp */, ARM::VUZPd16, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR }, }, + { 2658 /* vuzp */, ARM::VUZPq32, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_QPR }, }, + { 2658 /* vuzp */, ARM::VTRNd32, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR }, }, + { 2658 /* vuzp */, ARM::VUZPq8, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR }, }, + { 2658 /* vuzp */, ARM::VUZPd8, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR }, }, + { 2663 /* vzip */, ARM::VZIPq16, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_QPR, MCK_QPR }, }, + { 2663 /* vzip */, ARM::VZIPd16, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_16, MCK_DPR, MCK_DPR }, }, + { 2663 /* vzip */, ARM::VZIPq32, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_QPR, MCK_QPR }, }, + { 2663 /* vzip */, ARM::VTRNd32, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_32, MCK_DPR, MCK_DPR }, }, + { 2663 /* vzip */, ARM::VZIPq8, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_QPR, MCK_QPR }, }, + { 2663 /* vzip */, ARM::VZIPd8, Convert__Reg1_2__Reg1_3__Tie0__Tie1__CondCode2_0, Feature_HasNEON, { MCK_CondCode, MCK__DOT_8, MCK_DPR, MCK_DPR }, }, + { 2668 /* wfe */, ARM::HINT, Convert__imm_95_2__CondCode2_0, Feature_IsARM|Feature_HasV6K, { MCK_CondCode }, }, + { 2668 /* wfe */, ARM::tHINT, Convert__imm_95_2__CondCode2_0, Feature_IsThumb|Feature_HasV6M, { MCK_CondCode }, }, + { 2668 /* wfe */, ARM::t2HINT, Convert__imm_95_2__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w }, }, + { 2672 /* wfi */, ARM::HINT, Convert__imm_95_3__CondCode2_0, Feature_IsARM|Feature_HasV6K, { MCK_CondCode }, }, + { 2672 /* wfi */, ARM::tHINT, Convert__imm_95_3__CondCode2_0, Feature_IsThumb|Feature_HasV6M, { MCK_CondCode }, }, + { 2672 /* wfi */, ARM::t2HINT, Convert__imm_95_3__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w }, }, + { 2676 /* yield */, ARM::HINT, Convert__imm_95_1__CondCode2_0, Feature_IsARM|Feature_HasV6K, { MCK_CondCode }, }, + { 2676 /* yield */, ARM::tHINT, Convert__imm_95_1__CondCode2_0, Feature_IsThumb|Feature_HasV6M, { MCK_CondCode }, }, + { 2676 /* yield */, ARM::t2HINT, Convert__imm_95_1__CondCode2_0, Feature_IsThumb2, { MCK_CondCode, MCK__DOT_w }, }, +}; + +unsigned ARMAsmParser:: +MatchInstructionImpl(const OperandVector &Operands, + MCInst &Inst, uint64_t &ErrorInfo, + bool matchingInlineAsm, unsigned VariantID) { + // Eliminate obvious mismatches. + if (Operands.size() > 19) { + ErrorInfo = 19; + return Match_InvalidOperand; + } + + // Get the current feature set. + uint64_t AvailableFeatures = getAvailableFeatures(); + + // Get the instruction mnemonic, which is the first token. + StringRef Mnemonic = ((ARMOperand&)*Operands[0]).getToken(); + + // Process all MnemonicAliases to remap the mnemonic. + applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID); + + // Some state to try to produce better error messages. + bool HadMatchOtherThanFeatures = false; + bool HadMatchOtherThanPredicate = false; + unsigned RetCode = Match_InvalidOperand; + uint64_t MissingFeatures = ~0ULL; + // Set ErrorInfo to the operand that mismatches if it is + // wrong for all instances of the instruction. + ErrorInfo = ~0ULL; + // Find the appropriate table for this asm variant. + const MatchEntry *Start, *End; + switch (VariantID) { + default: llvm_unreachable("invalid variant!"); + case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; + } + // Search the table. + auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode()); + + // Return a more specific error code if no mnemonics match. + if (MnemonicRange.first == MnemonicRange.second) + return Match_MnemonicFail; + + for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; + it != ie; ++it) { + // equal_range guarantees that instruction mnemonic matches. + assert(Mnemonic == it->getMnemonic()); + bool OperandsValid = true; + for (unsigned i = 0; i != 18; ++i) { + auto Formal = static_cast(it->Classes[i]); + if (i+1 >= Operands.size()) { + OperandsValid = (Formal == InvalidMatchClass); + if (!OperandsValid) ErrorInfo = i+1; + break; + } + MCParsedAsmOperand &Actual = *Operands[i+1]; + unsigned Diag = validateOperandClass(Actual, Formal); + if (Diag == Match_Success) + continue; + // If the generic handler indicates an invalid operand + // failure, check for a special case. + if (Diag == Match_InvalidOperand) { + Diag = validateTargetOperandClass(Actual, Formal); + if (Diag == Match_Success) + continue; + } + // If this operand is broken for all of the instances of this + // mnemonic, keep track of it so we can report loc info. + // If we already had a match that only failed due to a + // target predicate, that diagnostic is preferred. + if (!HadMatchOtherThanPredicate && + (it == MnemonicRange.first || ErrorInfo <= i+1)) { + ErrorInfo = i+1; + // InvalidOperand is the default. Prefer specificity. + if (Diag != Match_InvalidOperand) + RetCode = Diag; + } + // Otherwise, just reject this instance of the mnemonic. + OperandsValid = false; + break; + } + + if (!OperandsValid) continue; + if ((AvailableFeatures & it->RequiredFeatures) != it->RequiredFeatures) { + HadMatchOtherThanFeatures = true; + uint64_t NewMissingFeatures = it->RequiredFeatures & ~AvailableFeatures; + if (countPopulation(NewMissingFeatures) <= + countPopulation(MissingFeatures)) + MissingFeatures = NewMissingFeatures; + continue; + } + + Inst.clear(); + + if (matchingInlineAsm) { + Inst.setOpcode(it->Opcode); + convertToMapAndConstraints(it->ConvertFn, Operands); + return Match_Success; + } + + // We have selected a definite instruction, convert the parsed + // operands into the appropriate MCInst. + convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands); + + // We have a potential match. Check the target predicate to + // handle any context sensitive constraints. + unsigned MatchResult; + if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) { + Inst.clear(); + RetCode = MatchResult; + HadMatchOtherThanPredicate = true; + continue; + } + + std::string Info; + if (MII.get(Inst.getOpcode()).getDeprecatedInfo(Inst, getSTI(), Info)) { + SMLoc Loc = ((ARMOperand&)*Operands[0]).getStartLoc(); + getParser().Warning(Loc, Info, None); + } + return Match_Success; + } + + // Okay, we had no match. Try to return a useful error code. + if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures) + return RetCode; + + // Missing feature matches return which features were missing + ErrorInfo = MissingFeatures; + return Match_MissingFeature; +} + +namespace { + struct OperandMatchEntry { + uint64_t RequiredFeatures; + uint16_t Mnemonic; + uint16_t Class; + uint8_t OperandMask; + + StringRef getMnemonic() const { + return StringRef(MnemonicTable + Mnemonic + 1, + MnemonicTable[Mnemonic]); + } + }; + + // Predicate for searching for an opcode. + struct LessOpcodeOperand { + bool operator()(const OperandMatchEntry &LHS, StringRef RHS) { + return LHS.getMnemonic() < RHS; + } + bool operator()(StringRef LHS, const OperandMatchEntry &RHS) { + return LHS < RHS.getMnemonic(); + } + bool operator()(const OperandMatchEntry &LHS, const OperandMatchEntry &RHS) { + return LHS.getMnemonic() < RHS.getMnemonic(); + } + }; +} // end anonymous namespace. + +static const OperandMatchEntry OperandMatchTable[729] = { + /* Operand List Mask, Mnemonic, Operand Class, Features */ + { Feature_IsARM, 0 /* adc */, MCK_ModImm, 8 /* 3 */ }, + { Feature_IsARM, 0 /* adc */, MCK_ModImm, 16 /* 4 */ }, + { Feature_IsARM, 4 /* add */, MCK_ModImm, 8 /* 3 */ }, + { Feature_IsARM, 4 /* add */, MCK_ModImm, 16 /* 4 */ }, + { Feature_IsARM, 40 /* and */, MCK_ModImm, 8 /* 3 */ }, + { Feature_IsARM, 40 /* and */, MCK_ModImm, 16 /* 4 */ }, + { Feature_IsThumb2, 50 /* bfc */, MCK_Bitfield, 4 /* 2 */ }, + { Feature_IsARM|Feature_HasV6T2, 50 /* bfc */, MCK_Bitfield, 4 /* 2 */ }, + { Feature_IsThumb2, 54 /* bfi */, MCK_Bitfield, 8 /* 3 */ }, + { Feature_IsARM|Feature_HasV6T2, 54 /* bfi */, MCK_Bitfield, 8 /* 3 */ }, + { Feature_IsARM, 58 /* bic */, MCK_ModImm, 8 /* 3 */ }, + { Feature_IsARM, 58 /* bic */, MCK_ModImm, 16 /* 4 */ }, + { Feature_IsThumb2|Feature_PreV8, 101 /* cdp */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2|Feature_PreV8, 101 /* cdp */, MCK_CoprocReg, 56 /* 3, 4, 5 */ }, + { Feature_PreV8, 101 /* cdp */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_PreV8, 101 /* cdp */, MCK_CoprocReg, 56 /* 3, 4, 5 */ }, + { Feature_PreV8, 105 /* cdp2 */, MCK_CoprocNum, 1 /* 0 */ }, + { Feature_PreV8, 105 /* cdp2 */, MCK_CoprocReg, 28 /* 2, 3, 4 */ }, + { Feature_IsThumb2|Feature_PreV8, 105 /* cdp2 */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2|Feature_PreV8, 105 /* cdp2 */, MCK_CoprocReg, 56 /* 3, 4, 5 */ }, + { Feature_IsARM, 120 /* cmn */, MCK_ModImm, 4 /* 2 */ }, + { Feature_IsARM, 124 /* cmp */, MCK_ModImm, 4 /* 2 */ }, + { Feature_IsARM, 128 /* cps */, MCK_ProcIFlags, 2 /* 1 */ }, + { Feature_IsThumb, 128 /* cps */, MCK_ProcIFlags, 2 /* 1 */ }, + { Feature_IsThumb2|Feature_IsNotMClass, 128 /* cps */, MCK_ProcIFlags, 4 /* 2 */ }, + { Feature_IsARM, 128 /* cps */, MCK_ProcIFlags, 2 /* 1 */ }, + { Feature_IsThumb2|Feature_IsNotMClass, 128 /* cps */, MCK_ProcIFlags, 2 /* 1 */ }, + { Feature_IsThumb2, 128 /* cps */, MCK_ProcIFlags, 4 /* 2 */ }, + { Feature_IsARM|Feature_HasDB, 199 /* dmb */, MCK_MemBarrierOpt, 1 /* 0 */ }, + { Feature_IsThumb|Feature_HasDB, 199 /* dmb */, MCK_MemBarrierOpt, 2 /* 1 */ }, + { Feature_IsARM|Feature_HasDB, 203 /* dsb */, MCK_MemBarrierOpt, 1 /* 0 */ }, + { Feature_IsThumb|Feature_HasDB, 203 /* dsb */, MCK_MemBarrierOpt, 2 /* 1 */ }, + { Feature_IsARM, 207 /* eor */, MCK_ModImm, 8 /* 3 */ }, + { Feature_IsARM, 207 /* eor */, MCK_ModImm, 16 /* 4 */ }, + { Feature_HasVFP3, 242 /* fconstd */, MCK_FPImm, 4 /* 2 */ }, + { Feature_HasVFP3, 250 /* fconsts */, MCK_FPImm, 4 /* 2 */ }, + { Feature_IsARM|Feature_HasDB, 334 /* isb */, MCK_InstSyncBarrierOpt, 1 /* 0 */ }, + { Feature_IsThumb|Feature_HasDB, 334 /* isb */, MCK_InstSyncBarrierOpt, 2 /* 1 */ }, + { Feature_IsARM, 338 /* it */, MCK_ITCondCode, 2 /* 1 */ }, + { Feature_IsThumb2, 338 /* it */, MCK_ITCondCode, 2 /* 1 */ }, + { Feature_IsARM, 382 /* ldc */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsARM, 382 /* ldc */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsThumb2, 382 /* ldc */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 382 /* ldc */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsARM, 382 /* ldc */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsARM, 382 /* ldc */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsThumb2, 382 /* ldc */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 382 /* ldc */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsARM, 382 /* ldc */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsARM, 382 /* ldc */, MCK_CoprocOption, 16 /* 4 */ }, + { Feature_IsARM, 382 /* ldc */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsThumb2, 382 /* ldc */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 382 /* ldc */, MCK_CoprocOption, 16 /* 4 */ }, + { Feature_IsThumb2, 382 /* ldc */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsARM, 382 /* ldc */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsARM, 382 /* ldc */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsThumb2, 382 /* ldc */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 382 /* ldc */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_PreV8, 386 /* ldc2 */, MCK_CoprocNum, 1 /* 0 */ }, + { Feature_PreV8, 386 /* ldc2 */, MCK_CoprocReg, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 386 /* ldc2 */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 386 /* ldc2 */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_PreV8, 386 /* ldc2 */, MCK_CoprocNum, 1 /* 0 */ }, + { Feature_PreV8, 386 /* ldc2 */, MCK_CoprocReg, 2 /* 1 */ }, + { Feature_PreV8, 386 /* ldc2 */, MCK_CoprocNum, 1 /* 0 */ }, + { Feature_PreV8, 386 /* ldc2 */, MCK_CoprocOption, 8 /* 3 */ }, + { Feature_PreV8, 386 /* ldc2 */, MCK_CoprocReg, 2 /* 1 */ }, + { Feature_PreV8, 386 /* ldc2 */, MCK_CoprocNum, 1 /* 0 */ }, + { Feature_PreV8, 386 /* ldc2 */, MCK_CoprocReg, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 386 /* ldc2 */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 386 /* ldc2 */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_PreV8|Feature_IsThumb2, 386 /* ldc2 */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 386 /* ldc2 */, MCK_CoprocOption, 16 /* 4 */ }, + { Feature_PreV8|Feature_IsThumb2, 386 /* ldc2 */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_PreV8|Feature_IsThumb2, 386 /* ldc2 */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 386 /* ldc2 */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_PreV8, 391 /* ldc2l */, MCK_CoprocNum, 1 /* 0 */ }, + { Feature_PreV8, 391 /* ldc2l */, MCK_CoprocReg, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 391 /* ldc2l */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 391 /* ldc2l */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_PreV8, 391 /* ldc2l */, MCK_CoprocNum, 1 /* 0 */ }, + { Feature_PreV8, 391 /* ldc2l */, MCK_CoprocReg, 2 /* 1 */ }, + { Feature_PreV8, 391 /* ldc2l */, MCK_CoprocNum, 1 /* 0 */ }, + { Feature_PreV8, 391 /* ldc2l */, MCK_CoprocOption, 8 /* 3 */ }, + { Feature_PreV8, 391 /* ldc2l */, MCK_CoprocReg, 2 /* 1 */ }, + { Feature_PreV8, 391 /* ldc2l */, MCK_CoprocNum, 1 /* 0 */ }, + { Feature_PreV8, 391 /* ldc2l */, MCK_CoprocReg, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 391 /* ldc2l */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 391 /* ldc2l */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_PreV8|Feature_IsThumb2, 391 /* ldc2l */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 391 /* ldc2l */, MCK_CoprocOption, 16 /* 4 */ }, + { Feature_PreV8|Feature_IsThumb2, 391 /* ldc2l */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_PreV8|Feature_IsThumb2, 391 /* ldc2l */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 391 /* ldc2l */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsARM, 397 /* ldcl */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsARM, 397 /* ldcl */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsThumb2, 397 /* ldcl */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 397 /* ldcl */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsARM, 397 /* ldcl */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsARM, 397 /* ldcl */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsThumb2, 397 /* ldcl */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 397 /* ldcl */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsARM, 397 /* ldcl */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsARM, 397 /* ldcl */, MCK_CoprocOption, 16 /* 4 */ }, + { Feature_IsARM, 397 /* ldcl */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsThumb2, 397 /* ldcl */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 397 /* ldcl */, MCK_CoprocOption, 16 /* 4 */ }, + { Feature_IsThumb2, 397 /* ldcl */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsARM, 397 /* ldcl */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsARM, 397 /* ldcl */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsThumb2, 397 /* ldcl */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 397 /* ldcl */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsARM, 424 /* ldr */, MCK_PostIdxRegShifted, 8 /* 3 */ }, + { Feature_IsARM, 428 /* ldrb */, MCK_PostIdxRegShifted, 8 /* 3 */ }, + { Feature_IsARM, 433 /* ldrbt */, MCK_PostIdxRegShifted, 8 /* 3 */ }, + { Feature_IsARM, 439 /* ldrd */, MCK_AM3Offset, 16 /* 4 */ }, + { Feature_IsARM, 471 /* ldrh */, MCK_AM3Offset, 8 /* 3 */ }, + { Feature_IsARM, 476 /* ldrht */, MCK_PostIdxReg, 8 /* 3 */ }, + { Feature_IsARM, 482 /* ldrsb */, MCK_AM3Offset, 8 /* 3 */ }, + { Feature_IsARM, 488 /* ldrsbt */, MCK_PostIdxReg, 8 /* 3 */ }, + { Feature_IsARM, 495 /* ldrsh */, MCK_AM3Offset, 8 /* 3 */ }, + { Feature_IsARM, 501 /* ldrsht */, MCK_PostIdxReg, 8 /* 3 */ }, + { Feature_IsARM, 508 /* ldrt */, MCK_PostIdxRegShifted, 8 /* 3 */ }, + { Feature_IsARM, 521 /* mcr */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsARM, 521 /* mcr */, MCK_CoprocReg, 48 /* 4, 5 */ }, + { Feature_IsThumb2, 521 /* mcr */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 521 /* mcr */, MCK_CoprocReg, 48 /* 4, 5 */ }, + { Feature_IsARM, 521 /* mcr */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsARM, 521 /* mcr */, MCK_CoprocReg, 48 /* 4, 5 */ }, + { Feature_IsThumb2, 521 /* mcr */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 521 /* mcr */, MCK_CoprocReg, 48 /* 4, 5 */ }, + { Feature_IsARM, 525 /* mcr2 */, MCK_CoprocNum, 1 /* 0 */ }, + { Feature_IsARM, 525 /* mcr2 */, MCK_CoprocReg, 24 /* 3, 4 */ }, + { Feature_IsThumb2, 525 /* mcr2 */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 525 /* mcr2 */, MCK_CoprocReg, 48 /* 4, 5 */ }, + { Feature_PreV8, 525 /* mcr2 */, MCK_CoprocNum, 1 /* 0 */ }, + { Feature_PreV8, 525 /* mcr2 */, MCK_CoprocReg, 24 /* 3, 4 */ }, + { Feature_IsThumb2|Feature_PreV8, 525 /* mcr2 */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2|Feature_PreV8, 525 /* mcr2 */, MCK_CoprocReg, 48 /* 4, 5 */ }, + { Feature_IsARM, 530 /* mcrr */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsARM, 530 /* mcrr */, MCK_CoprocReg, 32 /* 5 */ }, + { Feature_IsThumb2, 530 /* mcrr */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 530 /* mcrr */, MCK_CoprocReg, 32 /* 5 */ }, + { Feature_PreV8, 535 /* mcrr2 */, MCK_CoprocNum, 1 /* 0 */ }, + { Feature_PreV8, 535 /* mcrr2 */, MCK_CoprocReg, 16 /* 4 */ }, + { Feature_IsThumb2|Feature_PreV8, 535 /* mcrr2 */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2|Feature_PreV8, 535 /* mcrr2 */, MCK_CoprocReg, 32 /* 5 */ }, + { Feature_IsARM, 549 /* mov */, MCK_ModImm, 8 /* 3 */ }, + { Feature_IsARM, 568 /* mrc */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsARM, 568 /* mrc */, MCK_CoprocReg, 48 /* 4, 5 */ }, + { Feature_IsThumb2, 568 /* mrc */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 568 /* mrc */, MCK_CoprocReg, 48 /* 4, 5 */ }, + { Feature_IsARM, 568 /* mrc */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsARM, 568 /* mrc */, MCK_CoprocReg, 48 /* 4, 5 */ }, + { Feature_IsThumb2, 568 /* mrc */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 568 /* mrc */, MCK_CoprocReg, 48 /* 4, 5 */ }, + { Feature_IsARM, 572 /* mrc2 */, MCK_CoprocNum, 1 /* 0 */ }, + { Feature_IsARM, 572 /* mrc2 */, MCK_CoprocReg, 24 /* 3, 4 */ }, + { Feature_IsThumb2, 572 /* mrc2 */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 572 /* mrc2 */, MCK_CoprocReg, 48 /* 4, 5 */ }, + { Feature_PreV8, 572 /* mrc2 */, MCK_CoprocNum, 1 /* 0 */ }, + { Feature_PreV8, 572 /* mrc2 */, MCK_CoprocReg, 24 /* 3, 4 */ }, + { Feature_IsThumb2|Feature_PreV8, 572 /* mrc2 */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2|Feature_PreV8, 572 /* mrc2 */, MCK_CoprocReg, 48 /* 4, 5 */ }, + { Feature_IsARM, 577 /* mrrc */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsARM, 577 /* mrrc */, MCK_CoprocReg, 32 /* 5 */ }, + { Feature_IsThumb2, 577 /* mrrc */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 577 /* mrrc */, MCK_CoprocReg, 32 /* 5 */ }, + { Feature_PreV8, 582 /* mrrc2 */, MCK_CoprocNum, 1 /* 0 */ }, + { Feature_PreV8, 582 /* mrrc2 */, MCK_CoprocReg, 16 /* 4 */ }, + { Feature_IsThumb2|Feature_PreV8, 582 /* mrrc2 */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2|Feature_PreV8, 582 /* mrrc2 */, MCK_CoprocReg, 32 /* 5 */ }, + { Feature_IsThumb|Feature_HasVirtualization, 588 /* mrs */, MCK_BankedReg, 4 /* 2 */ }, + { Feature_IsThumb|Feature_IsMClass, 588 /* mrs */, MCK_MSRMask, 4 /* 2 */ }, + { Feature_IsARM|Feature_HasVirtualization, 588 /* mrs */, MCK_BankedReg, 4 /* 2 */ }, + { Feature_IsThumb|Feature_HasVirtualization, 592 /* msr */, MCK_BankedReg, 2 /* 1 */ }, + { Feature_IsARM|Feature_HasVirtualization, 592 /* msr */, MCK_BankedReg, 2 /* 1 */ }, + { Feature_IsThumb2|Feature_IsNotMClass, 592 /* msr */, MCK_MSRMask, 2 /* 1 */ }, + { Feature_IsThumb|Feature_IsMClass, 592 /* msr */, MCK_MSRMask, 2 /* 1 */ }, + { Feature_IsARM, 592 /* msr */, MCK_MSRMask, 2 /* 1 */ }, + { Feature_IsARM, 592 /* msr */, MCK_MSRMask, 2 /* 1 */ }, + { Feature_IsARM, 592 /* msr */, MCK_ModImm, 4 /* 2 */ }, + { Feature_IsARM, 600 /* mvn */, MCK_ModImm, 8 /* 3 */ }, + { Feature_IsARM, 616 /* orr */, MCK_ModImm, 8 /* 3 */ }, + { Feature_IsARM, 616 /* orr */, MCK_ModImm, 16 /* 4 */ }, + { Feature_HasT2ExtractPack|Feature_IsThumb2, 620 /* pkhbt */, MCK_PKHLSLImm, 16 /* 4 */ }, + { Feature_IsARM|Feature_HasV6, 620 /* pkhbt */, MCK_PKHLSLImm, 16 /* 4 */ }, + { Feature_HasT2ExtractPack|Feature_IsThumb2, 626 /* pkhtb */, MCK_PKHASRImm, 16 /* 4 */ }, + { Feature_IsARM|Feature_HasV6, 626 /* pkhtb */, MCK_PKHASRImm, 16 /* 4 */ }, + { Feature_IsARM, 765 /* rsb */, MCK_ModImm, 8 /* 3 */ }, + { Feature_IsARM, 765 /* rsb */, MCK_ModImm, 16 /* 4 */ }, + { Feature_IsARM, 769 /* rsc */, MCK_ModImm, 8 /* 3 */ }, + { Feature_IsARM, 769 /* rsc */, MCK_ModImm, 16 /* 4 */ }, + { Feature_IsARM, 791 /* sbc */, MCK_ModImm, 8 /* 3 */ }, + { Feature_IsARM, 791 /* sbc */, MCK_ModImm, 16 /* 4 */ }, + { Feature_IsARM, 809 /* setend */, MCK_SetEndImm, 1 /* 0 */ }, + { Feature_IsNotMClass, 809 /* setend */, MCK_SetEndImm, 1 /* 0 */ }, + { Feature_IsThumb2, 1231 /* ssat */, MCK_ShifterImm, 16 /* 4 */ }, + { Feature_IsARM, 1231 /* ssat */, MCK_ShifterImm, 16 /* 4 */ }, + { Feature_IsARM, 1261 /* stc */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsARM, 1261 /* stc */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsThumb2, 1261 /* stc */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 1261 /* stc */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsARM, 1261 /* stc */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsARM, 1261 /* stc */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsThumb2, 1261 /* stc */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 1261 /* stc */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsARM, 1261 /* stc */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsARM, 1261 /* stc */, MCK_CoprocOption, 16 /* 4 */ }, + { Feature_IsARM, 1261 /* stc */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsThumb2, 1261 /* stc */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 1261 /* stc */, MCK_CoprocOption, 16 /* 4 */ }, + { Feature_IsThumb2, 1261 /* stc */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsARM, 1261 /* stc */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsARM, 1261 /* stc */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsThumb2, 1261 /* stc */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 1261 /* stc */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_PreV8, 1265 /* stc2 */, MCK_CoprocNum, 1 /* 0 */ }, + { Feature_PreV8, 1265 /* stc2 */, MCK_CoprocReg, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 1265 /* stc2 */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 1265 /* stc2 */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_PreV8, 1265 /* stc2 */, MCK_CoprocNum, 1 /* 0 */ }, + { Feature_PreV8, 1265 /* stc2 */, MCK_CoprocReg, 2 /* 1 */ }, + { Feature_PreV8, 1265 /* stc2 */, MCK_CoprocNum, 1 /* 0 */ }, + { Feature_PreV8, 1265 /* stc2 */, MCK_CoprocOption, 8 /* 3 */ }, + { Feature_PreV8, 1265 /* stc2 */, MCK_CoprocReg, 2 /* 1 */ }, + { Feature_PreV8, 1265 /* stc2 */, MCK_CoprocNum, 1 /* 0 */ }, + { Feature_PreV8, 1265 /* stc2 */, MCK_CoprocReg, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 1265 /* stc2 */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 1265 /* stc2 */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_PreV8|Feature_IsThumb2, 1265 /* stc2 */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 1265 /* stc2 */, MCK_CoprocOption, 16 /* 4 */ }, + { Feature_PreV8|Feature_IsThumb2, 1265 /* stc2 */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_PreV8|Feature_IsThumb2, 1265 /* stc2 */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 1265 /* stc2 */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_PreV8, 1270 /* stc2l */, MCK_CoprocNum, 1 /* 0 */ }, + { Feature_PreV8, 1270 /* stc2l */, MCK_CoprocReg, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 1270 /* stc2l */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 1270 /* stc2l */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_PreV8, 1270 /* stc2l */, MCK_CoprocNum, 1 /* 0 */ }, + { Feature_PreV8, 1270 /* stc2l */, MCK_CoprocReg, 2 /* 1 */ }, + { Feature_PreV8, 1270 /* stc2l */, MCK_CoprocNum, 1 /* 0 */ }, + { Feature_PreV8, 1270 /* stc2l */, MCK_CoprocOption, 8 /* 3 */ }, + { Feature_PreV8, 1270 /* stc2l */, MCK_CoprocReg, 2 /* 1 */ }, + { Feature_PreV8, 1270 /* stc2l */, MCK_CoprocNum, 1 /* 0 */ }, + { Feature_PreV8, 1270 /* stc2l */, MCK_CoprocReg, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 1270 /* stc2l */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 1270 /* stc2l */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_PreV8|Feature_IsThumb2, 1270 /* stc2l */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 1270 /* stc2l */, MCK_CoprocOption, 16 /* 4 */ }, + { Feature_PreV8|Feature_IsThumb2, 1270 /* stc2l */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_PreV8|Feature_IsThumb2, 1270 /* stc2l */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_PreV8|Feature_IsThumb2, 1270 /* stc2l */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsARM, 1276 /* stcl */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsARM, 1276 /* stcl */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsThumb2, 1276 /* stcl */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 1276 /* stcl */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsARM, 1276 /* stcl */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsARM, 1276 /* stcl */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsThumb2, 1276 /* stcl */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 1276 /* stcl */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsARM, 1276 /* stcl */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsARM, 1276 /* stcl */, MCK_CoprocOption, 16 /* 4 */ }, + { Feature_IsARM, 1276 /* stcl */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsThumb2, 1276 /* stcl */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 1276 /* stcl */, MCK_CoprocOption, 16 /* 4 */ }, + { Feature_IsThumb2, 1276 /* stcl */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsARM, 1276 /* stcl */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsARM, 1276 /* stcl */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsThumb2, 1276 /* stcl */, MCK_CoprocNum, 2 /* 1 */ }, + { Feature_IsThumb2, 1276 /* stcl */, MCK_CoprocReg, 4 /* 2 */ }, + { Feature_IsARM, 1344 /* str */, MCK_PostIdxRegShifted, 8 /* 3 */ }, + { Feature_IsARM, 1348 /* strb */, MCK_PostIdxRegShifted, 8 /* 3 */ }, + { Feature_IsARM, 1353 /* strbt */, MCK_PostIdxRegShifted, 8 /* 3 */ }, + { Feature_IsARM, 1359 /* strd */, MCK_AM3Offset, 16 /* 4 */ }, + { Feature_IsARM, 1391 /* strh */, MCK_AM3Offset, 8 /* 3 */ }, + { Feature_IsARM, 1396 /* strht */, MCK_PostIdxReg, 8 /* 3 */ }, + { Feature_IsARM, 1402 /* strt */, MCK_PostIdxRegShifted, 8 /* 3 */ }, + { Feature_IsARM, 1407 /* sub */, MCK_ModImm, 8 /* 3 */ }, + { Feature_IsARM, 1407 /* sub */, MCK_ModImm, 16 /* 4 */ }, + { Feature_HasT2ExtractPack|Feature_IsThumb2, 1434 /* sxtab */, MCK_RotImm, 16 /* 4 */ }, + { Feature_IsARM|Feature_HasV6, 1434 /* sxtab */, MCK_RotImm, 16 /* 4 */ }, + { Feature_HasT2ExtractPack|Feature_IsThumb2, 1440 /* sxtab16 */, MCK_RotImm, 16 /* 4 */ }, + { Feature_IsARM|Feature_HasV6, 1440 /* sxtab16 */, MCK_RotImm, 16 /* 4 */ }, + { Feature_HasT2ExtractPack|Feature_IsThumb2, 1448 /* sxtah */, MCK_RotImm, 16 /* 4 */ }, + { Feature_IsARM|Feature_HasV6, 1448 /* sxtah */, MCK_RotImm, 16 /* 4 */ }, + { Feature_IsThumb2, 1454 /* sxtb */, MCK_RotImm, 8 /* 3 */ }, + { Feature_IsARM|Feature_HasV6, 1454 /* sxtb */, MCK_RotImm, 8 /* 3 */ }, + { Feature_IsThumb2, 1454 /* sxtb */, MCK_RotImm, 16 /* 4 */ }, + { Feature_IsThumb2|Feature_HasT2ExtractPack, 1459 /* sxtb16 */, MCK_RotImm, 8 /* 3 */ }, + { Feature_HasT2ExtractPack|Feature_IsThumb2, 1459 /* sxtb16 */, MCK_RotImm, 8 /* 3 */ }, + { Feature_IsARM|Feature_HasV6, 1459 /* sxtb16 */, MCK_RotImm, 8 /* 3 */ }, + { Feature_IsThumb2, 1466 /* sxth */, MCK_RotImm, 8 /* 3 */ }, + { Feature_IsARM|Feature_HasV6, 1466 /* sxth */, MCK_RotImm, 8 /* 3 */ }, + { Feature_IsThumb2, 1466 /* sxth */, MCK_RotImm, 16 /* 4 */ }, + { Feature_IsARM, 1479 /* teq */, MCK_ModImm, 4 /* 2 */ }, + { Feature_IsARM, 1488 /* tst */, MCK_ModImm, 4 /* 2 */ }, + { Feature_IsThumb2, 1655 /* usat */, MCK_ShifterImm, 16 /* 4 */ }, + { Feature_IsARM, 1655 /* usat */, MCK_ShifterImm, 16 /* 4 */ }, + { Feature_HasT2ExtractPack|Feature_IsThumb2, 1685 /* uxtab */, MCK_RotImm, 16 /* 4 */ }, + { Feature_IsARM|Feature_HasV6, 1685 /* uxtab */, MCK_RotImm, 16 /* 4 */ }, + { Feature_HasT2ExtractPack|Feature_IsThumb2, 1691 /* uxtab16 */, MCK_RotImm, 16 /* 4 */ }, + { Feature_IsARM|Feature_HasV6, 1691 /* uxtab16 */, MCK_RotImm, 16 /* 4 */ }, + { Feature_HasT2ExtractPack|Feature_IsThumb2, 1699 /* uxtah */, MCK_RotImm, 16 /* 4 */ }, + { Feature_IsARM|Feature_HasV6, 1699 /* uxtah */, MCK_RotImm, 16 /* 4 */ }, + { Feature_IsThumb2, 1705 /* uxtb */, MCK_RotImm, 8 /* 3 */ }, + { Feature_IsARM|Feature_HasV6, 1705 /* uxtb */, MCK_RotImm, 8 /* 3 */ }, + { Feature_IsThumb2, 1705 /* uxtb */, MCK_RotImm, 16 /* 4 */ }, + { Feature_HasT2ExtractPack|Feature_IsThumb2, 1710 /* uxtb16 */, MCK_RotImm, 8 /* 3 */ }, + { Feature_HasT2ExtractPack|Feature_IsThumb2, 1710 /* uxtb16 */, MCK_RotImm, 8 /* 3 */ }, + { Feature_IsARM|Feature_HasV6, 1710 /* uxtb16 */, MCK_RotImm, 8 /* 3 */ }, + { Feature_IsThumb2, 1717 /* uxth */, MCK_RotImm, 8 /* 3 */ }, + { Feature_IsARM|Feature_HasV6, 1717 /* uxth */, MCK_RotImm, 8 /* 3 */ }, + { Feature_IsThumb2, 1717 /* uxth */, MCK_RotImm, 16 /* 4 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListDPairAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListDPairAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListDPairAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListDPairAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListDPairAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListDPairAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListDPairAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListDPairAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListDPairAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListOneDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 1979 /* vld1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairSpacedAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairSpaced, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListTwoDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListTwoQHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairSpacedAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairSpaced, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListTwoDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListTwoQWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairSpacedAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairSpaced, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListTwoDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairSpacedAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairSpacedAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairSpaced, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairSpaced, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListTwoDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListTwoDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListTwoQHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListTwoQHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairSpacedAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairSpacedAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairSpaced, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairSpaced, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListTwoDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListTwoDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListTwoQWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListTwoQWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairSpacedAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairSpacedAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairSpaced, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListDPairSpaced, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListTwoDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1984 /* vld2 */, MCK_VecListTwoDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQ, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQ, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQ, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQ, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQ, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQ, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQ, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQ, 4 /* 2 */ }, + { Feature_HasNEON, 1989 /* vld3 */, MCK_VecListThreeQ, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQ, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQ, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQ, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQ, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQ, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQ, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQ, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourDAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQAllLanes, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQ, 4 /* 2 */ }, + { Feature_HasNEON, 1994 /* vld4 */, MCK_VecListFourQ, 4 /* 2 */ }, + { Feature_HasNEON, 2076 /* vmov */, MCK_FPImm, 8 /* 3 */ }, + { Feature_HasNEON, 2076 /* vmov */, MCK_FPImm, 8 /* 3 */ }, + { Feature_HasVFP3, 2076 /* vmov */, MCK_FPImm, 8 /* 3 */ }, + { Feature_HasVFP3|Feature_HasDPVFP, 2076 /* vmov */, MCK_FPImm, 8 /* 3 */ }, + { Feature_HasFullFP16, 2076 /* vmov */, MCK_FPImm, 8 /* 3 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListOneDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListOneDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListOneDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListOneDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListOneDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListOneDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListOneDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListOneD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListOneDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListOneDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 2570 /* vst1 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListDPairSpaced, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListTwoDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListTwoQHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListDPairSpaced, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListTwoDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListTwoQWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListDPairSpaced, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListTwoDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListDPairSpaced, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListDPairSpaced, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListTwoDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListTwoDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListTwoQHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListTwoQHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListDPairSpaced, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListDPairSpaced, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListTwoDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListTwoDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListTwoQWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListTwoQWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListDPair, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListDPairSpaced, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListDPairSpaced, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListTwoDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2575 /* vst2 */, MCK_VecListTwoDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeQ, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeQHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeQ, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeQWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeQ, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeQ, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeQ, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeQHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeQHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeQ, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeQ, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeQWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeQWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeD, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeQ, 4 /* 2 */ }, + { Feature_HasNEON, 2580 /* vst3 */, MCK_VecListThreeQ, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourQ, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourQHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourQ, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourQWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourQ, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourDHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourQ, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourQ, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourQHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourQHWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourDWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourQ, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourQ, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourQWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourQWordIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourD, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourDByteIndexed, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourQ, 4 /* 2 */ }, + { Feature_HasNEON, 2585 /* vst4 */, MCK_VecListFourQ, 4 /* 2 */ }, + { Feature_HasNEON, 2638 /* vtbl */, MCK_VecListDPair, 8 /* 3 */ }, + { Feature_HasNEON, 2638 /* vtbl */, MCK_VecListFourD, 8 /* 3 */ }, + { Feature_HasNEON, 2638 /* vtbl */, MCK_VecListOneD, 8 /* 3 */ }, + { Feature_HasNEON, 2638 /* vtbl */, MCK_VecListThreeD, 8 /* 3 */ }, + { Feature_HasNEON, 2643 /* vtbx */, MCK_VecListDPair, 8 /* 3 */ }, + { Feature_HasNEON, 2643 /* vtbx */, MCK_VecListFourD, 8 /* 3 */ }, + { Feature_HasNEON, 2643 /* vtbx */, MCK_VecListOneD, 8 /* 3 */ }, + { Feature_HasNEON, 2643 /* vtbx */, MCK_VecListThreeD, 8 /* 3 */ }, +}; + +ARMAsmParser::OperandMatchResultTy ARMAsmParser:: +tryCustomParseOperand(OperandVector &Operands, + unsigned MCK, unsigned int &ErrorCode) { + + switch(MCK) { + case MCK_AM3Offset: + return parseAM3Offset(Operands, ErrorCode); + case MCK_BankedReg: + return parseBankedRegOperand(Operands, ErrorCode); + case MCK_Bitfield: + return parseBitfield(Operands, ErrorCode); + case MCK_CoprocNum: + return parseCoprocNumOperand(Operands, ErrorCode); + case MCK_CoprocOption: + return parseCoprocOptionOperand(Operands, ErrorCode); + case MCK_CoprocReg: + return parseCoprocRegOperand(Operands, ErrorCode); + case MCK_FPImm: + return parseFPImm(Operands, ErrorCode); + case MCK_InstSyncBarrierOpt: + return parseInstSyncBarrierOptOperand(Operands, ErrorCode); + case MCK_MSRMask: + return parseMSRMaskOperand(Operands, ErrorCode); + case MCK_MemBarrierOpt: + return parseMemBarrierOptOperand(Operands, ErrorCode); + case MCK_ModImm: + return parseModImm(Operands, ErrorCode); + case MCK_PKHASRImm: + return parsePKHASRImm(Operands, ErrorCode); + case MCK_PKHLSLImm: + return parsePKHLSLImm(Operands, ErrorCode); + case MCK_PostIdxReg: + return parsePostIdxReg(Operands, ErrorCode); + case MCK_PostIdxRegShifted: + return parsePostIdxReg(Operands, ErrorCode); + case MCK_ProcIFlags: + return parseProcIFlagsOperand(Operands, ErrorCode); + case MCK_RotImm: + return parseRotImm(Operands, ErrorCode); + case MCK_SetEndImm: + return parseSetEndImm(Operands, ErrorCode); + case MCK_ShifterImm: + return parseShifterImm(Operands, ErrorCode); + case MCK_VecListDPairAllLanes: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListDPair: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListDPairSpacedAllLanes: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListDPairSpaced: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListFourDAllLanes: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListFourD: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListFourDByteIndexed: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListFourDHWordIndexed: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListFourDWordIndexed: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListFourQAllLanes: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListFourQ: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListFourQHWordIndexed: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListFourQWordIndexed: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListOneDAllLanes: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListOneD: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListOneDByteIndexed: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListOneDHWordIndexed: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListOneDWordIndexed: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListThreeDAllLanes: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListThreeD: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListThreeDByteIndexed: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListThreeDHWordIndexed: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListThreeDWordIndexed: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListThreeQAllLanes: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListThreeQ: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListThreeQHWordIndexed: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListThreeQWordIndexed: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListTwoDByteIndexed: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListTwoDHWordIndexed: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListTwoDWordIndexed: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListTwoQHWordIndexed: + return parseVectorList(Operands, ErrorCode); + case MCK_VecListTwoQWordIndexed: + return parseVectorList(Operands, ErrorCode); + case MCK_ITCondCode: + return parseITCondCode(Operands, ErrorCode); + default: + return MatchOperand_NoMatch; + } + return MatchOperand_NoMatch; +} + +ARMAsmParser::OperandMatchResultTy ARMAsmParser:: +MatchOperandParserImpl(OperandVector &Operands, + StringRef Mnemonic, unsigned int &ErrorCode) { + // Get the current feature set. + uint64_t AvailableFeatures = getAvailableFeatures(); + + // Get the next operand index. + unsigned NextOpNum = Operands.size() - 1; + // Search the table. + auto MnemonicRange = + std::equal_range(std::begin(OperandMatchTable), std::end(OperandMatchTable), + Mnemonic, LessOpcodeOperand()); + + if (MnemonicRange.first == MnemonicRange.second) + return MatchOperand_NoMatch; + + for (const OperandMatchEntry *it = MnemonicRange.first, + *ie = MnemonicRange.second; it != ie; ++it) { + // equal_range guarantees that instruction mnemonic matches. + assert(Mnemonic == it->getMnemonic()); + + // check if the available features match + if ((AvailableFeatures & it->RequiredFeatures) != it->RequiredFeatures) { + continue; + } + + // check if the operand in question has a custom parser. + if (!(it->OperandMask & (1 << NextOpNum))) + continue; + + // call custom parse method to handle the operand + OperandMatchResultTy Result = tryCustomParseOperand(Operands, it->Class, ErrorCode); + if (Result != MatchOperand_NoMatch) + return Result; + } + + // Okay, we had no match. + return MatchOperand_NoMatch; +} + +#endif // GET_MATCHER_IMPLEMENTATION + diff --git a/llvm/lib/Target/ARM/ARMGenInstrInfo.inc b/llvm/lib/Target/ARM/ARMGenInstrInfo.inc new file mode 100644 index 0000000..a4560f0 --- /dev/null +++ b/llvm/lib/Target/ARM/ARMGenInstrInfo.inc @@ -0,0 +1,7298 @@ +/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ +|* *| +|* Target Instruction Enum Values *| +|* *| +|* Automatically generated file, do not edit! *| +|* *| +\*===----------------------------------------------------------------------===*/ + + +#ifdef GET_INSTRINFO_ENUM +#undef GET_INSTRINFO_ENUM +namespace llvm_ks { + +namespace ARM { + enum { + PHI = 0, + INLINEASM = 1, + CFI_INSTRUCTION = 2, + EH_LABEL = 3, + GC_LABEL = 4, + KILL = 5, + EXTRACT_SUBREG = 6, + INSERT_SUBREG = 7, + IMPLICIT_DEF = 8, + SUBREG_TO_REG = 9, + COPY_TO_REGCLASS = 10, + DBG_VALUE = 11, + REG_SEQUENCE = 12, + COPY = 13, + BUNDLE = 14, + LIFETIME_START = 15, + LIFETIME_END = 16, + STACKMAP = 17, + PATCHPOINT = 18, + LOAD_STACK_GUARD = 19, + STATEPOINT = 20, + LOCAL_ESCAPE = 21, + FAULTING_LOAD_OP = 22, + G_ADD = 23, + ABS = 24, + ADCri = 25, + ADCrr = 26, + ADCrsi = 27, + ADCrsr = 28, + ADDSri = 29, + ADDSrr = 30, + ADDSrsi = 31, + ADDSrsr = 32, + ADDri = 33, + ADDrr = 34, + ADDrsi = 35, + ADDrsr = 36, + ADJCALLSTACKDOWN = 37, + ADJCALLSTACKUP = 38, + ADR = 39, + AESD = 40, + AESE = 41, + AESIMC = 42, + AESMC = 43, + ANDri = 44, + ANDrr = 45, + ANDrsi = 46, + ANDrsr = 47, + ASRi = 48, + ASRr = 49, + B = 50, + BCCZi64 = 51, + BCCi64 = 52, + BFC = 53, + BFI = 54, + BICri = 55, + BICrr = 56, + BICrsi = 57, + BICrsr = 58, + BKPT = 59, + BL = 60, + BLX = 61, + BLX_pred = 62, + BLXi = 63, + BL_pred = 64, + BMOVPCB_CALL = 65, + BMOVPCRX_CALL = 66, + BR_JTadd = 67, + BR_JTm = 68, + BR_JTr = 69, + BX = 70, + BXJ = 71, + BX_CALL = 72, + BX_RET = 73, + BX_pred = 74, + Bcc = 75, + CDP = 76, + CDP2 = 77, + CLREX = 78, + CLZ = 79, + CMNri = 80, + CMNzrr = 81, + CMNzrsi = 82, + CMNzrsr = 83, + CMPri = 84, + CMPrr = 85, + CMPrsi = 86, + CMPrsr = 87, + CONSTPOOL_ENTRY = 88, + COPY_STRUCT_BYVAL_I32 = 89, + CPS1p = 90, + CPS2p = 91, + CPS3p = 92, + CRC32B = 93, + CRC32CB = 94, + CRC32CH = 95, + CRC32CW = 96, + CRC32H = 97, + CRC32W = 98, + DBG = 99, + DMB = 100, + DSB = 101, + EORri = 102, + EORrr = 103, + EORrsi = 104, + EORrsr = 105, + ERET = 106, + FCONSTD = 107, + FCONSTH = 108, + FCONSTS = 109, + FLDMXDB_UPD = 110, + FLDMXIA = 111, + FLDMXIA_UPD = 112, + FMSTAT = 113, + FSTMXDB_UPD = 114, + FSTMXIA = 115, + FSTMXIA_UPD = 116, + HINT = 117, + HLT = 118, + HVC = 119, + ISB = 120, + ITasm = 121, + Int_eh_sjlj_dispatchsetup = 122, + Int_eh_sjlj_longjmp = 123, + Int_eh_sjlj_setjmp = 124, + Int_eh_sjlj_setjmp_nofp = 125, + Int_eh_sjlj_setup_dispatch = 126, + JUMPTABLE_ADDRS = 127, + JUMPTABLE_INSTS = 128, + JUMPTABLE_TBB = 129, + JUMPTABLE_TBH = 130, + LDA = 131, + LDAB = 132, + LDAEX = 133, + LDAEXB = 134, + LDAEXD = 135, + LDAEXH = 136, + LDAH = 137, + LDC2L_OFFSET = 138, + LDC2L_OPTION = 139, + LDC2L_POST = 140, + LDC2L_PRE = 141, + LDC2_OFFSET = 142, + LDC2_OPTION = 143, + LDC2_POST = 144, + LDC2_PRE = 145, + LDCL_OFFSET = 146, + LDCL_OPTION = 147, + LDCL_POST = 148, + LDCL_PRE = 149, + LDC_OFFSET = 150, + LDC_OPTION = 151, + LDC_POST = 152, + LDC_PRE = 153, + LDMDA = 154, + LDMDA_UPD = 155, + LDMDB = 156, + LDMDB_UPD = 157, + LDMIA = 158, + LDMIA_RET = 159, + LDMIA_UPD = 160, + LDMIB = 161, + LDMIB_UPD = 162, + LDRBT_POST = 163, + LDRBT_POST_IMM = 164, + LDRBT_POST_REG = 165, + LDRB_POST_IMM = 166, + LDRB_POST_REG = 167, + LDRB_PRE_IMM = 168, + LDRB_PRE_REG = 169, + LDRBi12 = 170, + LDRBrs = 171, + LDRD = 172, + LDRD_POST = 173, + LDRD_PRE = 174, + LDREX = 175, + LDREXB = 176, + LDREXD = 177, + LDREXH = 178, + LDRH = 179, + LDRHTi = 180, + LDRHTr = 181, + LDRH_POST = 182, + LDRH_PRE = 183, + LDRLIT_ga_abs = 184, + LDRLIT_ga_pcrel = 185, + LDRLIT_ga_pcrel_ldr = 186, + LDRSB = 187, + LDRSBTi = 188, + LDRSBTr = 189, + LDRSB_POST = 190, + LDRSB_PRE = 191, + LDRSH = 192, + LDRSHTi = 193, + LDRSHTr = 194, + LDRSH_POST = 195, + LDRSH_PRE = 196, + LDRT_POST = 197, + LDRT_POST_IMM = 198, + LDRT_POST_REG = 199, + LDR_POST_IMM = 200, + LDR_POST_REG = 201, + LDR_PRE_IMM = 202, + LDR_PRE_REG = 203, + LDRcp = 204, + LDRi12 = 205, + LDRrs = 206, + LEApcrel = 207, + LEApcrelJT = 208, + LSLi = 209, + LSLr = 210, + LSRi = 211, + LSRr = 212, + MCR = 213, + MCR2 = 214, + MCRR = 215, + MCRR2 = 216, + MEMCPY = 217, + MLA = 218, + MLAv5 = 219, + MLS = 220, + MOVCCi = 221, + MOVCCi16 = 222, + MOVCCi32imm = 223, + MOVCCr = 224, + MOVCCsi = 225, + MOVCCsr = 226, + MOVPCLR = 227, + MOVPCRX = 228, + MOVTi16 = 229, + MOVTi16_ga_pcrel = 230, + MOV_ga_pcrel = 231, + MOV_ga_pcrel_ldr = 232, + MOVi = 233, + MOVi16 = 234, + MOVi16_ga_pcrel = 235, + MOVi32imm = 236, + MOVr = 237, + MOVr_TC = 238, + MOVsi = 239, + MOVsr = 240, + MOVsra_flag = 241, + MOVsrl_flag = 242, + MRC = 243, + MRC2 = 244, + MRRC = 245, + MRRC2 = 246, + MRS = 247, + MRSbanked = 248, + MRSsys = 249, + MSR = 250, + MSRbanked = 251, + MSRi = 252, + MUL = 253, + MULv5 = 254, + MVNCCi = 255, + MVNi = 256, + MVNr = 257, + MVNsi = 258, + MVNsr = 259, + ORRri = 260, + ORRrr = 261, + ORRrsi = 262, + ORRrsr = 263, + PICADD = 264, + PICLDR = 265, + PICLDRB = 266, + PICLDRH = 267, + PICLDRSB = 268, + PICLDRSH = 269, + PICSTR = 270, + PICSTRB = 271, + PICSTRH = 272, + PKHBT = 273, + PKHTB = 274, + PLDWi12 = 275, + PLDWrs = 276, + PLDi12 = 277, + PLDrs = 278, + PLIi12 = 279, + PLIrs = 280, + QADD = 281, + QADD16 = 282, + QADD8 = 283, + QASX = 284, + QDADD = 285, + QDSUB = 286, + QSAX = 287, + QSUB = 288, + QSUB16 = 289, + QSUB8 = 290, + RBIT = 291, + REV = 292, + REV16 = 293, + REVSH = 294, + RFEDA = 295, + RFEDA_UPD = 296, + RFEDB = 297, + RFEDB_UPD = 298, + RFEIA = 299, + RFEIA_UPD = 300, + RFEIB = 301, + RFEIB_UPD = 302, + RORi = 303, + RORr = 304, + RRX = 305, + RRXi = 306, + RSBSri = 307, + RSBSrsi = 308, + RSBSrsr = 309, + RSBri = 310, + RSBrr = 311, + RSBrsi = 312, + RSBrsr = 313, + RSCri = 314, + RSCrr = 315, + RSCrsi = 316, + RSCrsr = 317, + SADD16 = 318, + SADD8 = 319, + SASX = 320, + SBCri = 321, + SBCrr = 322, + SBCrsi = 323, + SBCrsr = 324, + SBFX = 325, + SDIV = 326, + SEL = 327, + SETEND = 328, + SETPAN = 329, + SHA1C = 330, + SHA1H = 331, + SHA1M = 332, + SHA1P = 333, + SHA1SU0 = 334, + SHA1SU1 = 335, + SHA256H = 336, + SHA256H2 = 337, + SHA256SU0 = 338, + SHA256SU1 = 339, + SHADD16 = 340, + SHADD8 = 341, + SHASX = 342, + SHSAX = 343, + SHSUB16 = 344, + SHSUB8 = 345, + SMC = 346, + SMLABB = 347, + SMLABT = 348, + SMLAD = 349, + SMLADX = 350, + SMLAL = 351, + SMLALBB = 352, + SMLALBT = 353, + SMLALD = 354, + SMLALDX = 355, + SMLALTB = 356, + SMLALTT = 357, + SMLALv5 = 358, + SMLATB = 359, + SMLATT = 360, + SMLAWB = 361, + SMLAWT = 362, + SMLSD = 363, + SMLSDX = 364, + SMLSLD = 365, + SMLSLDX = 366, + SMMLA = 367, + SMMLAR = 368, + SMMLS = 369, + SMMLSR = 370, + SMMUL = 371, + SMMULR = 372, + SMUAD = 373, + SMUADX = 374, + SMULBB = 375, + SMULBT = 376, + SMULL = 377, + SMULLv5 = 378, + SMULTB = 379, + SMULTT = 380, + SMULWB = 381, + SMULWT = 382, + SMUSD = 383, + SMUSDX = 384, + SPACE = 385, + SRSDA = 386, + SRSDA_UPD = 387, + SRSDB = 388, + SRSDB_UPD = 389, + SRSIA = 390, + SRSIA_UPD = 391, + SRSIB = 392, + SRSIB_UPD = 393, + SSAT = 394, + SSAT16 = 395, + SSAX = 396, + SSUB16 = 397, + SSUB8 = 398, + STC2L_OFFSET = 399, + STC2L_OPTION = 400, + STC2L_POST = 401, + STC2L_PRE = 402, + STC2_OFFSET = 403, + STC2_OPTION = 404, + STC2_POST = 405, + STC2_PRE = 406, + STCL_OFFSET = 407, + STCL_OPTION = 408, + STCL_POST = 409, + STCL_PRE = 410, + STC_OFFSET = 411, + STC_OPTION = 412, + STC_POST = 413, + STC_PRE = 414, + STL = 415, + STLB = 416, + STLEX = 417, + STLEXB = 418, + STLEXD = 419, + STLEXH = 420, + STLH = 421, + STMDA = 422, + STMDA_UPD = 423, + STMDB = 424, + STMDB_UPD = 425, + STMIA = 426, + STMIA_UPD = 427, + STMIB = 428, + STMIB_UPD = 429, + STRBT_POST = 430, + STRBT_POST_IMM = 431, + STRBT_POST_REG = 432, + STRB_POST_IMM = 433, + STRB_POST_REG = 434, + STRB_PRE_IMM = 435, + STRB_PRE_REG = 436, + STRBi12 = 437, + STRBi_preidx = 438, + STRBr_preidx = 439, + STRBrs = 440, + STRD = 441, + STRD_POST = 442, + STRD_PRE = 443, + STREX = 444, + STREXB = 445, + STREXD = 446, + STREXH = 447, + STRH = 448, + STRHTi = 449, + STRHTr = 450, + STRH_POST = 451, + STRH_PRE = 452, + STRH_preidx = 453, + STRT_POST = 454, + STRT_POST_IMM = 455, + STRT_POST_REG = 456, + STR_POST_IMM = 457, + STR_POST_REG = 458, + STR_PRE_IMM = 459, + STR_PRE_REG = 460, + STRi12 = 461, + STRi_preidx = 462, + STRr_preidx = 463, + STRrs = 464, + SUBS_PC_LR = 465, + SUBSri = 466, + SUBSrr = 467, + SUBSrsi = 468, + SUBSrsr = 469, + SUBri = 470, + SUBrr = 471, + SUBrsi = 472, + SUBrsr = 473, + SVC = 474, + SWP = 475, + SWPB = 476, + SXTAB = 477, + SXTAB16 = 478, + SXTAH = 479, + SXTB = 480, + SXTB16 = 481, + SXTH = 482, + TAILJMPd = 483, + TAILJMPr = 484, + TCRETURNdi = 485, + TCRETURNri = 486, + TEQri = 487, + TEQrr = 488, + TEQrsi = 489, + TEQrsr = 490, + TPsoft = 491, + TRAP = 492, + TRAPNaCl = 493, + TSTri = 494, + TSTrr = 495, + TSTrsi = 496, + TSTrsr = 497, + UADD16 = 498, + UADD8 = 499, + UASX = 500, + UBFX = 501, + UDF = 502, + UDIV = 503, + UHADD16 = 504, + UHADD8 = 505, + UHASX = 506, + UHSAX = 507, + UHSUB16 = 508, + UHSUB8 = 509, + UMAAL = 510, + UMLAL = 511, + UMLALv5 = 512, + UMULL = 513, + UMULLv5 = 514, + UQADD16 = 515, + UQADD8 = 516, + UQASX = 517, + UQSAX = 518, + UQSUB16 = 519, + UQSUB8 = 520, + USAD8 = 521, + USADA8 = 522, + USAT = 523, + USAT16 = 524, + USAX = 525, + USUB16 = 526, + USUB8 = 527, + UXTAB = 528, + UXTAB16 = 529, + UXTAH = 530, + UXTB = 531, + UXTB16 = 532, + UXTH = 533, + VABALsv2i64 = 534, + VABALsv4i32 = 535, + VABALsv8i16 = 536, + VABALuv2i64 = 537, + VABALuv4i32 = 538, + VABALuv8i16 = 539, + VABAsv16i8 = 540, + VABAsv2i32 = 541, + VABAsv4i16 = 542, + VABAsv4i32 = 543, + VABAsv8i16 = 544, + VABAsv8i8 = 545, + VABAuv16i8 = 546, + VABAuv2i32 = 547, + VABAuv4i16 = 548, + VABAuv4i32 = 549, + VABAuv8i16 = 550, + VABAuv8i8 = 551, + VABDLsv2i64 = 552, + VABDLsv4i32 = 553, + VABDLsv8i16 = 554, + VABDLuv2i64 = 555, + VABDLuv4i32 = 556, + VABDLuv8i16 = 557, + VABDfd = 558, + VABDfq = 559, + VABDhd = 560, + VABDhq = 561, + VABDsv16i8 = 562, + VABDsv2i32 = 563, + VABDsv4i16 = 564, + VABDsv4i32 = 565, + VABDsv8i16 = 566, + VABDsv8i8 = 567, + VABDuv16i8 = 568, + VABDuv2i32 = 569, + VABDuv4i16 = 570, + VABDuv4i32 = 571, + VABDuv8i16 = 572, + VABDuv8i8 = 573, + VABSD = 574, + VABSH = 575, + VABSS = 576, + VABSfd = 577, + VABSfq = 578, + VABShd = 579, + VABShq = 580, + VABSv16i8 = 581, + VABSv2i32 = 582, + VABSv4i16 = 583, + VABSv4i32 = 584, + VABSv8i16 = 585, + VABSv8i8 = 586, + VACGEfd = 587, + VACGEfq = 588, + VACGEhd = 589, + VACGEhq = 590, + VACGTfd = 591, + VACGTfq = 592, + VACGThd = 593, + VACGThq = 594, + VADDD = 595, + VADDH = 596, + VADDHNv2i32 = 597, + VADDHNv4i16 = 598, + VADDHNv8i8 = 599, + VADDLsv2i64 = 600, + VADDLsv4i32 = 601, + VADDLsv8i16 = 602, + VADDLuv2i64 = 603, + VADDLuv4i32 = 604, + VADDLuv8i16 = 605, + VADDS = 606, + VADDWsv2i64 = 607, + VADDWsv4i32 = 608, + VADDWsv8i16 = 609, + VADDWuv2i64 = 610, + VADDWuv4i32 = 611, + VADDWuv8i16 = 612, + VADDfd = 613, + VADDfq = 614, + VADDhd = 615, + VADDhq = 616, + VADDv16i8 = 617, + VADDv1i64 = 618, + VADDv2i32 = 619, + VADDv2i64 = 620, + VADDv4i16 = 621, + VADDv4i32 = 622, + VADDv8i16 = 623, + VADDv8i8 = 624, + VANDd = 625, + VANDq = 626, + VBICd = 627, + VBICiv2i32 = 628, + VBICiv4i16 = 629, + VBICiv4i32 = 630, + VBICiv8i16 = 631, + VBICq = 632, + VBIFd = 633, + VBIFq = 634, + VBITd = 635, + VBITq = 636, + VBSLd = 637, + VBSLq = 638, + VCEQfd = 639, + VCEQfq = 640, + VCEQhd = 641, + VCEQhq = 642, + VCEQv16i8 = 643, + VCEQv2i32 = 644, + VCEQv4i16 = 645, + VCEQv4i32 = 646, + VCEQv8i16 = 647, + VCEQv8i8 = 648, + VCEQzv16i8 = 649, + VCEQzv2f32 = 650, + VCEQzv2i32 = 651, + VCEQzv4f16 = 652, + VCEQzv4f32 = 653, + VCEQzv4i16 = 654, + VCEQzv4i32 = 655, + VCEQzv8f16 = 656, + VCEQzv8i16 = 657, + VCEQzv8i8 = 658, + VCGEfd = 659, + VCGEfq = 660, + VCGEhd = 661, + VCGEhq = 662, + VCGEsv16i8 = 663, + VCGEsv2i32 = 664, + VCGEsv4i16 = 665, + VCGEsv4i32 = 666, + VCGEsv8i16 = 667, + VCGEsv8i8 = 668, + VCGEuv16i8 = 669, + VCGEuv2i32 = 670, + VCGEuv4i16 = 671, + VCGEuv4i32 = 672, + VCGEuv8i16 = 673, + VCGEuv8i8 = 674, + VCGEzv16i8 = 675, + VCGEzv2f32 = 676, + VCGEzv2i32 = 677, + VCGEzv4f16 = 678, + VCGEzv4f32 = 679, + VCGEzv4i16 = 680, + VCGEzv4i32 = 681, + VCGEzv8f16 = 682, + VCGEzv8i16 = 683, + VCGEzv8i8 = 684, + VCGTfd = 685, + VCGTfq = 686, + VCGThd = 687, + VCGThq = 688, + VCGTsv16i8 = 689, + VCGTsv2i32 = 690, + VCGTsv4i16 = 691, + VCGTsv4i32 = 692, + VCGTsv8i16 = 693, + VCGTsv8i8 = 694, + VCGTuv16i8 = 695, + VCGTuv2i32 = 696, + VCGTuv4i16 = 697, + VCGTuv4i32 = 698, + VCGTuv8i16 = 699, + VCGTuv8i8 = 700, + VCGTzv16i8 = 701, + VCGTzv2f32 = 702, + VCGTzv2i32 = 703, + VCGTzv4f16 = 704, + VCGTzv4f32 = 705, + VCGTzv4i16 = 706, + VCGTzv4i32 = 707, + VCGTzv8f16 = 708, + VCGTzv8i16 = 709, + VCGTzv8i8 = 710, + VCLEzv16i8 = 711, + VCLEzv2f32 = 712, + VCLEzv2i32 = 713, + VCLEzv4f16 = 714, + VCLEzv4f32 = 715, + VCLEzv4i16 = 716, + VCLEzv4i32 = 717, + VCLEzv8f16 = 718, + VCLEzv8i16 = 719, + VCLEzv8i8 = 720, + VCLSv16i8 = 721, + VCLSv2i32 = 722, + VCLSv4i16 = 723, + VCLSv4i32 = 724, + VCLSv8i16 = 725, + VCLSv8i8 = 726, + VCLTzv16i8 = 727, + VCLTzv2f32 = 728, + VCLTzv2i32 = 729, + VCLTzv4f16 = 730, + VCLTzv4f32 = 731, + VCLTzv4i16 = 732, + VCLTzv4i32 = 733, + VCLTzv8f16 = 734, + VCLTzv8i16 = 735, + VCLTzv8i8 = 736, + VCLZv16i8 = 737, + VCLZv2i32 = 738, + VCLZv4i16 = 739, + VCLZv4i32 = 740, + VCLZv8i16 = 741, + VCLZv8i8 = 742, + VCMPD = 743, + VCMPED = 744, + VCMPEH = 745, + VCMPES = 746, + VCMPEZD = 747, + VCMPEZH = 748, + VCMPEZS = 749, + VCMPH = 750, + VCMPS = 751, + VCMPZD = 752, + VCMPZH = 753, + VCMPZS = 754, + VCNTd = 755, + VCNTq = 756, + VCVTANSDf = 757, + VCVTANSDh = 758, + VCVTANSQf = 759, + VCVTANSQh = 760, + VCVTANUDf = 761, + VCVTANUDh = 762, + VCVTANUQf = 763, + VCVTANUQh = 764, + VCVTASD = 765, + VCVTASH = 766, + VCVTASS = 767, + VCVTAUD = 768, + VCVTAUH = 769, + VCVTAUS = 770, + VCVTBDH = 771, + VCVTBHD = 772, + VCVTBHS = 773, + VCVTBSH = 774, + VCVTDS = 775, + VCVTMNSDf = 776, + VCVTMNSDh = 777, + VCVTMNSQf = 778, + VCVTMNSQh = 779, + VCVTMNUDf = 780, + VCVTMNUDh = 781, + VCVTMNUQf = 782, + VCVTMNUQh = 783, + VCVTMSD = 784, + VCVTMSH = 785, + VCVTMSS = 786, + VCVTMUD = 787, + VCVTMUH = 788, + VCVTMUS = 789, + VCVTNNSDf = 790, + VCVTNNSDh = 791, + VCVTNNSQf = 792, + VCVTNNSQh = 793, + VCVTNNUDf = 794, + VCVTNNUDh = 795, + VCVTNNUQf = 796, + VCVTNNUQh = 797, + VCVTNSD = 798, + VCVTNSH = 799, + VCVTNSS = 800, + VCVTNUD = 801, + VCVTNUH = 802, + VCVTNUS = 803, + VCVTPNSDf = 804, + VCVTPNSDh = 805, + VCVTPNSQf = 806, + VCVTPNSQh = 807, + VCVTPNUDf = 808, + VCVTPNUDh = 809, + VCVTPNUQf = 810, + VCVTPNUQh = 811, + VCVTPSD = 812, + VCVTPSH = 813, + VCVTPSS = 814, + VCVTPUD = 815, + VCVTPUH = 816, + VCVTPUS = 817, + VCVTSD = 818, + VCVTTDH = 819, + VCVTTHD = 820, + VCVTTHS = 821, + VCVTTSH = 822, + VCVTf2h = 823, + VCVTf2sd = 824, + VCVTf2sq = 825, + VCVTf2ud = 826, + VCVTf2uq = 827, + VCVTf2xsd = 828, + VCVTf2xsq = 829, + VCVTf2xud = 830, + VCVTf2xuq = 831, + VCVTh2f = 832, + VCVTh2sd = 833, + VCVTh2sq = 834, + VCVTh2ud = 835, + VCVTh2uq = 836, + VCVTh2xsd = 837, + VCVTh2xsq = 838, + VCVTh2xud = 839, + VCVTh2xuq = 840, + VCVTs2fd = 841, + VCVTs2fq = 842, + VCVTs2hd = 843, + VCVTs2hq = 844, + VCVTu2fd = 845, + VCVTu2fq = 846, + VCVTu2hd = 847, + VCVTu2hq = 848, + VCVTxs2fd = 849, + VCVTxs2fq = 850, + VCVTxs2hd = 851, + VCVTxs2hq = 852, + VCVTxu2fd = 853, + VCVTxu2fq = 854, + VCVTxu2hd = 855, + VCVTxu2hq = 856, + VDIVD = 857, + VDIVH = 858, + VDIVS = 859, + VDUP16d = 860, + VDUP16q = 861, + VDUP32d = 862, + VDUP32q = 863, + VDUP8d = 864, + VDUP8q = 865, + VDUPLN16d = 866, + VDUPLN16q = 867, + VDUPLN32d = 868, + VDUPLN32q = 869, + VDUPLN8d = 870, + VDUPLN8q = 871, + VEORd = 872, + VEORq = 873, + VEXTd16 = 874, + VEXTd32 = 875, + VEXTd8 = 876, + VEXTq16 = 877, + VEXTq32 = 878, + VEXTq64 = 879, + VEXTq8 = 880, + VFMAD = 881, + VFMAH = 882, + VFMAS = 883, + VFMAfd = 884, + VFMAfq = 885, + VFMAhd = 886, + VFMAhq = 887, + VFMSD = 888, + VFMSH = 889, + VFMSS = 890, + VFMSfd = 891, + VFMSfq = 892, + VFMShd = 893, + VFMShq = 894, + VFNMAD = 895, + VFNMAH = 896, + VFNMAS = 897, + VFNMSD = 898, + VFNMSH = 899, + VFNMSS = 900, + VGETLNi32 = 901, + VGETLNs16 = 902, + VGETLNs8 = 903, + VGETLNu16 = 904, + VGETLNu8 = 905, + VHADDsv16i8 = 906, + VHADDsv2i32 = 907, + VHADDsv4i16 = 908, + VHADDsv4i32 = 909, + VHADDsv8i16 = 910, + VHADDsv8i8 = 911, + VHADDuv16i8 = 912, + VHADDuv2i32 = 913, + VHADDuv4i16 = 914, + VHADDuv4i32 = 915, + VHADDuv8i16 = 916, + VHADDuv8i8 = 917, + VHSUBsv16i8 = 918, + VHSUBsv2i32 = 919, + VHSUBsv4i16 = 920, + VHSUBsv4i32 = 921, + VHSUBsv8i16 = 922, + VHSUBsv8i8 = 923, + VHSUBuv16i8 = 924, + VHSUBuv2i32 = 925, + VHSUBuv4i16 = 926, + VHSUBuv4i32 = 927, + VHSUBuv8i16 = 928, + VHSUBuv8i8 = 929, + VINSH = 930, + VLD1DUPd16 = 931, + VLD1DUPd16wb_fixed = 932, + VLD1DUPd16wb_register = 933, + VLD1DUPd32 = 934, + VLD1DUPd32wb_fixed = 935, + VLD1DUPd32wb_register = 936, + VLD1DUPd8 = 937, + VLD1DUPd8wb_fixed = 938, + VLD1DUPd8wb_register = 939, + VLD1DUPq16 = 940, + VLD1DUPq16wb_fixed = 941, + VLD1DUPq16wb_register = 942, + VLD1DUPq32 = 943, + VLD1DUPq32wb_fixed = 944, + VLD1DUPq32wb_register = 945, + VLD1DUPq8 = 946, + VLD1DUPq8wb_fixed = 947, + VLD1DUPq8wb_register = 948, + VLD1LNd16 = 949, + VLD1LNd16_UPD = 950, + VLD1LNd32 = 951, + VLD1LNd32_UPD = 952, + VLD1LNd8 = 953, + VLD1LNd8_UPD = 954, + VLD1LNdAsm_16 = 955, + VLD1LNdAsm_32 = 956, + VLD1LNdAsm_8 = 957, + VLD1LNdWB_fixed_Asm_16 = 958, + VLD1LNdWB_fixed_Asm_32 = 959, + VLD1LNdWB_fixed_Asm_8 = 960, + VLD1LNdWB_register_Asm_16 = 961, + VLD1LNdWB_register_Asm_32 = 962, + VLD1LNdWB_register_Asm_8 = 963, + VLD1LNq16Pseudo = 964, + VLD1LNq16Pseudo_UPD = 965, + VLD1LNq32Pseudo = 966, + VLD1LNq32Pseudo_UPD = 967, + VLD1LNq8Pseudo = 968, + VLD1LNq8Pseudo_UPD = 969, + VLD1d16 = 970, + VLD1d16Q = 971, + VLD1d16Qwb_fixed = 972, + VLD1d16Qwb_register = 973, + VLD1d16T = 974, + VLD1d16Twb_fixed = 975, + VLD1d16Twb_register = 976, + VLD1d16wb_fixed = 977, + VLD1d16wb_register = 978, + VLD1d32 = 979, + VLD1d32Q = 980, + VLD1d32Qwb_fixed = 981, + VLD1d32Qwb_register = 982, + VLD1d32T = 983, + VLD1d32Twb_fixed = 984, + VLD1d32Twb_register = 985, + VLD1d32wb_fixed = 986, + VLD1d32wb_register = 987, + VLD1d64 = 988, + VLD1d64Q = 989, + VLD1d64QPseudo = 990, + VLD1d64QPseudoWB_fixed = 991, + VLD1d64QPseudoWB_register = 992, + VLD1d64Qwb_fixed = 993, + VLD1d64Qwb_register = 994, + VLD1d64T = 995, + VLD1d64TPseudo = 996, + VLD1d64TPseudoWB_fixed = 997, + VLD1d64TPseudoWB_register = 998, + VLD1d64Twb_fixed = 999, + VLD1d64Twb_register = 1000, + VLD1d64wb_fixed = 1001, + VLD1d64wb_register = 1002, + VLD1d8 = 1003, + VLD1d8Q = 1004, + VLD1d8Qwb_fixed = 1005, + VLD1d8Qwb_register = 1006, + VLD1d8T = 1007, + VLD1d8Twb_fixed = 1008, + VLD1d8Twb_register = 1009, + VLD1d8wb_fixed = 1010, + VLD1d8wb_register = 1011, + VLD1q16 = 1012, + VLD1q16wb_fixed = 1013, + VLD1q16wb_register = 1014, + VLD1q32 = 1015, + VLD1q32wb_fixed = 1016, + VLD1q32wb_register = 1017, + VLD1q64 = 1018, + VLD1q64wb_fixed = 1019, + VLD1q64wb_register = 1020, + VLD1q8 = 1021, + VLD1q8wb_fixed = 1022, + VLD1q8wb_register = 1023, + VLD2DUPd16 = 1024, + VLD2DUPd16wb_fixed = 1025, + VLD2DUPd16wb_register = 1026, + VLD2DUPd16x2 = 1027, + VLD2DUPd16x2wb_fixed = 1028, + VLD2DUPd16x2wb_register = 1029, + VLD2DUPd32 = 1030, + VLD2DUPd32wb_fixed = 1031, + VLD2DUPd32wb_register = 1032, + VLD2DUPd32x2 = 1033, + VLD2DUPd32x2wb_fixed = 1034, + VLD2DUPd32x2wb_register = 1035, + VLD2DUPd8 = 1036, + VLD2DUPd8wb_fixed = 1037, + VLD2DUPd8wb_register = 1038, + VLD2DUPd8x2 = 1039, + VLD2DUPd8x2wb_fixed = 1040, + VLD2DUPd8x2wb_register = 1041, + VLD2LNd16 = 1042, + VLD2LNd16Pseudo = 1043, + VLD2LNd16Pseudo_UPD = 1044, + VLD2LNd16_UPD = 1045, + VLD2LNd32 = 1046, + VLD2LNd32Pseudo = 1047, + VLD2LNd32Pseudo_UPD = 1048, + VLD2LNd32_UPD = 1049, + VLD2LNd8 = 1050, + VLD2LNd8Pseudo = 1051, + VLD2LNd8Pseudo_UPD = 1052, + VLD2LNd8_UPD = 1053, + VLD2LNdAsm_16 = 1054, + VLD2LNdAsm_32 = 1055, + VLD2LNdAsm_8 = 1056, + VLD2LNdWB_fixed_Asm_16 = 1057, + VLD2LNdWB_fixed_Asm_32 = 1058, + VLD2LNdWB_fixed_Asm_8 = 1059, + VLD2LNdWB_register_Asm_16 = 1060, + VLD2LNdWB_register_Asm_32 = 1061, + VLD2LNdWB_register_Asm_8 = 1062, + VLD2LNq16 = 1063, + VLD2LNq16Pseudo = 1064, + VLD2LNq16Pseudo_UPD = 1065, + VLD2LNq16_UPD = 1066, + VLD2LNq32 = 1067, + VLD2LNq32Pseudo = 1068, + VLD2LNq32Pseudo_UPD = 1069, + VLD2LNq32_UPD = 1070, + VLD2LNqAsm_16 = 1071, + VLD2LNqAsm_32 = 1072, + VLD2LNqWB_fixed_Asm_16 = 1073, + VLD2LNqWB_fixed_Asm_32 = 1074, + VLD2LNqWB_register_Asm_16 = 1075, + VLD2LNqWB_register_Asm_32 = 1076, + VLD2b16 = 1077, + VLD2b16wb_fixed = 1078, + VLD2b16wb_register = 1079, + VLD2b32 = 1080, + VLD2b32wb_fixed = 1081, + VLD2b32wb_register = 1082, + VLD2b8 = 1083, + VLD2b8wb_fixed = 1084, + VLD2b8wb_register = 1085, + VLD2d16 = 1086, + VLD2d16wb_fixed = 1087, + VLD2d16wb_register = 1088, + VLD2d32 = 1089, + VLD2d32wb_fixed = 1090, + VLD2d32wb_register = 1091, + VLD2d8 = 1092, + VLD2d8wb_fixed = 1093, + VLD2d8wb_register = 1094, + VLD2q16 = 1095, + VLD2q16Pseudo = 1096, + VLD2q16PseudoWB_fixed = 1097, + VLD2q16PseudoWB_register = 1098, + VLD2q16wb_fixed = 1099, + VLD2q16wb_register = 1100, + VLD2q32 = 1101, + VLD2q32Pseudo = 1102, + VLD2q32PseudoWB_fixed = 1103, + VLD2q32PseudoWB_register = 1104, + VLD2q32wb_fixed = 1105, + VLD2q32wb_register = 1106, + VLD2q8 = 1107, + VLD2q8Pseudo = 1108, + VLD2q8PseudoWB_fixed = 1109, + VLD2q8PseudoWB_register = 1110, + VLD2q8wb_fixed = 1111, + VLD2q8wb_register = 1112, + VLD3DUPd16 = 1113, + VLD3DUPd16Pseudo = 1114, + VLD3DUPd16Pseudo_UPD = 1115, + VLD3DUPd16_UPD = 1116, + VLD3DUPd32 = 1117, + VLD3DUPd32Pseudo = 1118, + VLD3DUPd32Pseudo_UPD = 1119, + VLD3DUPd32_UPD = 1120, + VLD3DUPd8 = 1121, + VLD3DUPd8Pseudo = 1122, + VLD3DUPd8Pseudo_UPD = 1123, + VLD3DUPd8_UPD = 1124, + VLD3DUPdAsm_16 = 1125, + VLD3DUPdAsm_32 = 1126, + VLD3DUPdAsm_8 = 1127, + VLD3DUPdWB_fixed_Asm_16 = 1128, + VLD3DUPdWB_fixed_Asm_32 = 1129, + VLD3DUPdWB_fixed_Asm_8 = 1130, + VLD3DUPdWB_register_Asm_16 = 1131, + VLD3DUPdWB_register_Asm_32 = 1132, + VLD3DUPdWB_register_Asm_8 = 1133, + VLD3DUPq16 = 1134, + VLD3DUPq16_UPD = 1135, + VLD3DUPq32 = 1136, + VLD3DUPq32_UPD = 1137, + VLD3DUPq8 = 1138, + VLD3DUPq8_UPD = 1139, + VLD3DUPqAsm_16 = 1140, + VLD3DUPqAsm_32 = 1141, + VLD3DUPqAsm_8 = 1142, + VLD3DUPqWB_fixed_Asm_16 = 1143, + VLD3DUPqWB_fixed_Asm_32 = 1144, + VLD3DUPqWB_fixed_Asm_8 = 1145, + VLD3DUPqWB_register_Asm_16 = 1146, + VLD3DUPqWB_register_Asm_32 = 1147, + VLD3DUPqWB_register_Asm_8 = 1148, + VLD3LNd16 = 1149, + VLD3LNd16Pseudo = 1150, + VLD3LNd16Pseudo_UPD = 1151, + VLD3LNd16_UPD = 1152, + VLD3LNd32 = 1153, + VLD3LNd32Pseudo = 1154, + VLD3LNd32Pseudo_UPD = 1155, + VLD3LNd32_UPD = 1156, + VLD3LNd8 = 1157, + VLD3LNd8Pseudo = 1158, + VLD3LNd8Pseudo_UPD = 1159, + VLD3LNd8_UPD = 1160, + VLD3LNdAsm_16 = 1161, + VLD3LNdAsm_32 = 1162, + VLD3LNdAsm_8 = 1163, + VLD3LNdWB_fixed_Asm_16 = 1164, + VLD3LNdWB_fixed_Asm_32 = 1165, + VLD3LNdWB_fixed_Asm_8 = 1166, + VLD3LNdWB_register_Asm_16 = 1167, + VLD3LNdWB_register_Asm_32 = 1168, + VLD3LNdWB_register_Asm_8 = 1169, + VLD3LNq16 = 1170, + VLD3LNq16Pseudo = 1171, + VLD3LNq16Pseudo_UPD = 1172, + VLD3LNq16_UPD = 1173, + VLD3LNq32 = 1174, + VLD3LNq32Pseudo = 1175, + VLD3LNq32Pseudo_UPD = 1176, + VLD3LNq32_UPD = 1177, + VLD3LNqAsm_16 = 1178, + VLD3LNqAsm_32 = 1179, + VLD3LNqWB_fixed_Asm_16 = 1180, + VLD3LNqWB_fixed_Asm_32 = 1181, + VLD3LNqWB_register_Asm_16 = 1182, + VLD3LNqWB_register_Asm_32 = 1183, + VLD3d16 = 1184, + VLD3d16Pseudo = 1185, + VLD3d16Pseudo_UPD = 1186, + VLD3d16_UPD = 1187, + VLD3d32 = 1188, + VLD3d32Pseudo = 1189, + VLD3d32Pseudo_UPD = 1190, + VLD3d32_UPD = 1191, + VLD3d8 = 1192, + VLD3d8Pseudo = 1193, + VLD3d8Pseudo_UPD = 1194, + VLD3d8_UPD = 1195, + VLD3dAsm_16 = 1196, + VLD3dAsm_32 = 1197, + VLD3dAsm_8 = 1198, + VLD3dWB_fixed_Asm_16 = 1199, + VLD3dWB_fixed_Asm_32 = 1200, + VLD3dWB_fixed_Asm_8 = 1201, + VLD3dWB_register_Asm_16 = 1202, + VLD3dWB_register_Asm_32 = 1203, + VLD3dWB_register_Asm_8 = 1204, + VLD3q16 = 1205, + VLD3q16Pseudo_UPD = 1206, + VLD3q16_UPD = 1207, + VLD3q16oddPseudo = 1208, + VLD3q16oddPseudo_UPD = 1209, + VLD3q32 = 1210, + VLD3q32Pseudo_UPD = 1211, + VLD3q32_UPD = 1212, + VLD3q32oddPseudo = 1213, + VLD3q32oddPseudo_UPD = 1214, + VLD3q8 = 1215, + VLD3q8Pseudo_UPD = 1216, + VLD3q8_UPD = 1217, + VLD3q8oddPseudo = 1218, + VLD3q8oddPseudo_UPD = 1219, + VLD3qAsm_16 = 1220, + VLD3qAsm_32 = 1221, + VLD3qAsm_8 = 1222, + VLD3qWB_fixed_Asm_16 = 1223, + VLD3qWB_fixed_Asm_32 = 1224, + VLD3qWB_fixed_Asm_8 = 1225, + VLD3qWB_register_Asm_16 = 1226, + VLD3qWB_register_Asm_32 = 1227, + VLD3qWB_register_Asm_8 = 1228, + VLD4DUPd16 = 1229, + VLD4DUPd16Pseudo = 1230, + VLD4DUPd16Pseudo_UPD = 1231, + VLD4DUPd16_UPD = 1232, + VLD4DUPd32 = 1233, + VLD4DUPd32Pseudo = 1234, + VLD4DUPd32Pseudo_UPD = 1235, + VLD4DUPd32_UPD = 1236, + VLD4DUPd8 = 1237, + VLD4DUPd8Pseudo = 1238, + VLD4DUPd8Pseudo_UPD = 1239, + VLD4DUPd8_UPD = 1240, + VLD4DUPdAsm_16 = 1241, + VLD4DUPdAsm_32 = 1242, + VLD4DUPdAsm_8 = 1243, + VLD4DUPdWB_fixed_Asm_16 = 1244, + VLD4DUPdWB_fixed_Asm_32 = 1245, + VLD4DUPdWB_fixed_Asm_8 = 1246, + VLD4DUPdWB_register_Asm_16 = 1247, + VLD4DUPdWB_register_Asm_32 = 1248, + VLD4DUPdWB_register_Asm_8 = 1249, + VLD4DUPq16 = 1250, + VLD4DUPq16_UPD = 1251, + VLD4DUPq32 = 1252, + VLD4DUPq32_UPD = 1253, + VLD4DUPq8 = 1254, + VLD4DUPq8_UPD = 1255, + VLD4DUPqAsm_16 = 1256, + VLD4DUPqAsm_32 = 1257, + VLD4DUPqAsm_8 = 1258, + VLD4DUPqWB_fixed_Asm_16 = 1259, + VLD4DUPqWB_fixed_Asm_32 = 1260, + VLD4DUPqWB_fixed_Asm_8 = 1261, + VLD4DUPqWB_register_Asm_16 = 1262, + VLD4DUPqWB_register_Asm_32 = 1263, + VLD4DUPqWB_register_Asm_8 = 1264, + VLD4LNd16 = 1265, + VLD4LNd16Pseudo = 1266, + VLD4LNd16Pseudo_UPD = 1267, + VLD4LNd16_UPD = 1268, + VLD4LNd32 = 1269, + VLD4LNd32Pseudo = 1270, + VLD4LNd32Pseudo_UPD = 1271, + VLD4LNd32_UPD = 1272, + VLD4LNd8 = 1273, + VLD4LNd8Pseudo = 1274, + VLD4LNd8Pseudo_UPD = 1275, + VLD4LNd8_UPD = 1276, + VLD4LNdAsm_16 = 1277, + VLD4LNdAsm_32 = 1278, + VLD4LNdAsm_8 = 1279, + VLD4LNdWB_fixed_Asm_16 = 1280, + VLD4LNdWB_fixed_Asm_32 = 1281, + VLD4LNdWB_fixed_Asm_8 = 1282, + VLD4LNdWB_register_Asm_16 = 1283, + VLD4LNdWB_register_Asm_32 = 1284, + VLD4LNdWB_register_Asm_8 = 1285, + VLD4LNq16 = 1286, + VLD4LNq16Pseudo = 1287, + VLD4LNq16Pseudo_UPD = 1288, + VLD4LNq16_UPD = 1289, + VLD4LNq32 = 1290, + VLD4LNq32Pseudo = 1291, + VLD4LNq32Pseudo_UPD = 1292, + VLD4LNq32_UPD = 1293, + VLD4LNqAsm_16 = 1294, + VLD4LNqAsm_32 = 1295, + VLD4LNqWB_fixed_Asm_16 = 1296, + VLD4LNqWB_fixed_Asm_32 = 1297, + VLD4LNqWB_register_Asm_16 = 1298, + VLD4LNqWB_register_Asm_32 = 1299, + VLD4d16 = 1300, + VLD4d16Pseudo = 1301, + VLD4d16Pseudo_UPD = 1302, + VLD4d16_UPD = 1303, + VLD4d32 = 1304, + VLD4d32Pseudo = 1305, + VLD4d32Pseudo_UPD = 1306, + VLD4d32_UPD = 1307, + VLD4d8 = 1308, + VLD4d8Pseudo = 1309, + VLD4d8Pseudo_UPD = 1310, + VLD4d8_UPD = 1311, + VLD4dAsm_16 = 1312, + VLD4dAsm_32 = 1313, + VLD4dAsm_8 = 1314, + VLD4dWB_fixed_Asm_16 = 1315, + VLD4dWB_fixed_Asm_32 = 1316, + VLD4dWB_fixed_Asm_8 = 1317, + VLD4dWB_register_Asm_16 = 1318, + VLD4dWB_register_Asm_32 = 1319, + VLD4dWB_register_Asm_8 = 1320, + VLD4q16 = 1321, + VLD4q16Pseudo_UPD = 1322, + VLD4q16_UPD = 1323, + VLD4q16oddPseudo = 1324, + VLD4q16oddPseudo_UPD = 1325, + VLD4q32 = 1326, + VLD4q32Pseudo_UPD = 1327, + VLD4q32_UPD = 1328, + VLD4q32oddPseudo = 1329, + VLD4q32oddPseudo_UPD = 1330, + VLD4q8 = 1331, + VLD4q8Pseudo_UPD = 1332, + VLD4q8_UPD = 1333, + VLD4q8oddPseudo = 1334, + VLD4q8oddPseudo_UPD = 1335, + VLD4qAsm_16 = 1336, + VLD4qAsm_32 = 1337, + VLD4qAsm_8 = 1338, + VLD4qWB_fixed_Asm_16 = 1339, + VLD4qWB_fixed_Asm_32 = 1340, + VLD4qWB_fixed_Asm_8 = 1341, + VLD4qWB_register_Asm_16 = 1342, + VLD4qWB_register_Asm_32 = 1343, + VLD4qWB_register_Asm_8 = 1344, + VLDMDDB_UPD = 1345, + VLDMDIA = 1346, + VLDMDIA_UPD = 1347, + VLDMQIA = 1348, + VLDMSDB_UPD = 1349, + VLDMSIA = 1350, + VLDMSIA_UPD = 1351, + VLDRD = 1352, + VLDRH = 1353, + VLDRS = 1354, + VLLDM = 1355, + VLSTM = 1356, + VMAXNMD = 1357, + VMAXNMH = 1358, + VMAXNMNDf = 1359, + VMAXNMNDh = 1360, + VMAXNMNQf = 1361, + VMAXNMNQh = 1362, + VMAXNMS = 1363, + VMAXfd = 1364, + VMAXfq = 1365, + VMAXhd = 1366, + VMAXhq = 1367, + VMAXsv16i8 = 1368, + VMAXsv2i32 = 1369, + VMAXsv4i16 = 1370, + VMAXsv4i32 = 1371, + VMAXsv8i16 = 1372, + VMAXsv8i8 = 1373, + VMAXuv16i8 = 1374, + VMAXuv2i32 = 1375, + VMAXuv4i16 = 1376, + VMAXuv4i32 = 1377, + VMAXuv8i16 = 1378, + VMAXuv8i8 = 1379, + VMINNMD = 1380, + VMINNMH = 1381, + VMINNMNDf = 1382, + VMINNMNDh = 1383, + VMINNMNQf = 1384, + VMINNMNQh = 1385, + VMINNMS = 1386, + VMINfd = 1387, + VMINfq = 1388, + VMINhd = 1389, + VMINhq = 1390, + VMINsv16i8 = 1391, + VMINsv2i32 = 1392, + VMINsv4i16 = 1393, + VMINsv4i32 = 1394, + VMINsv8i16 = 1395, + VMINsv8i8 = 1396, + VMINuv16i8 = 1397, + VMINuv2i32 = 1398, + VMINuv4i16 = 1399, + VMINuv4i32 = 1400, + VMINuv8i16 = 1401, + VMINuv8i8 = 1402, + VMLAD = 1403, + VMLAH = 1404, + VMLALslsv2i32 = 1405, + VMLALslsv4i16 = 1406, + VMLALsluv2i32 = 1407, + VMLALsluv4i16 = 1408, + VMLALsv2i64 = 1409, + VMLALsv4i32 = 1410, + VMLALsv8i16 = 1411, + VMLALuv2i64 = 1412, + VMLALuv4i32 = 1413, + VMLALuv8i16 = 1414, + VMLAS = 1415, + VMLAfd = 1416, + VMLAfq = 1417, + VMLAhd = 1418, + VMLAhq = 1419, + VMLAslfd = 1420, + VMLAslfq = 1421, + VMLAslhd = 1422, + VMLAslhq = 1423, + VMLAslv2i32 = 1424, + VMLAslv4i16 = 1425, + VMLAslv4i32 = 1426, + VMLAslv8i16 = 1427, + VMLAv16i8 = 1428, + VMLAv2i32 = 1429, + VMLAv4i16 = 1430, + VMLAv4i32 = 1431, + VMLAv8i16 = 1432, + VMLAv8i8 = 1433, + VMLSD = 1434, + VMLSH = 1435, + VMLSLslsv2i32 = 1436, + VMLSLslsv4i16 = 1437, + VMLSLsluv2i32 = 1438, + VMLSLsluv4i16 = 1439, + VMLSLsv2i64 = 1440, + VMLSLsv4i32 = 1441, + VMLSLsv8i16 = 1442, + VMLSLuv2i64 = 1443, + VMLSLuv4i32 = 1444, + VMLSLuv8i16 = 1445, + VMLSS = 1446, + VMLSfd = 1447, + VMLSfq = 1448, + VMLShd = 1449, + VMLShq = 1450, + VMLSslfd = 1451, + VMLSslfq = 1452, + VMLSslhd = 1453, + VMLSslhq = 1454, + VMLSslv2i32 = 1455, + VMLSslv4i16 = 1456, + VMLSslv4i32 = 1457, + VMLSslv8i16 = 1458, + VMLSv16i8 = 1459, + VMLSv2i32 = 1460, + VMLSv4i16 = 1461, + VMLSv4i32 = 1462, + VMLSv8i16 = 1463, + VMLSv8i8 = 1464, + VMOVD = 1465, + VMOVD0 = 1466, + VMOVDRR = 1467, + VMOVDcc = 1468, + VMOVH = 1469, + VMOVHR = 1470, + VMOVLsv2i64 = 1471, + VMOVLsv4i32 = 1472, + VMOVLsv8i16 = 1473, + VMOVLuv2i64 = 1474, + VMOVLuv4i32 = 1475, + VMOVLuv8i16 = 1476, + VMOVNv2i32 = 1477, + VMOVNv4i16 = 1478, + VMOVNv8i8 = 1479, + VMOVQ0 = 1480, + VMOVRH = 1481, + VMOVRRD = 1482, + VMOVRRS = 1483, + VMOVRS = 1484, + VMOVS = 1485, + VMOVSR = 1486, + VMOVSRR = 1487, + VMOVScc = 1488, + VMOVv16i8 = 1489, + VMOVv1i64 = 1490, + VMOVv2f32 = 1491, + VMOVv2i32 = 1492, + VMOVv2i64 = 1493, + VMOVv4f32 = 1494, + VMOVv4i16 = 1495, + VMOVv4i32 = 1496, + VMOVv8i16 = 1497, + VMOVv8i8 = 1498, + VMRS = 1499, + VMRS_FPEXC = 1500, + VMRS_FPINST = 1501, + VMRS_FPINST2 = 1502, + VMRS_FPSID = 1503, + VMRS_MVFR0 = 1504, + VMRS_MVFR1 = 1505, + VMRS_MVFR2 = 1506, + VMSR = 1507, + VMSR_FPEXC = 1508, + VMSR_FPINST = 1509, + VMSR_FPINST2 = 1510, + VMSR_FPSID = 1511, + VMULD = 1512, + VMULH = 1513, + VMULLp64 = 1514, + VMULLp8 = 1515, + VMULLslsv2i32 = 1516, + VMULLslsv4i16 = 1517, + VMULLsluv2i32 = 1518, + VMULLsluv4i16 = 1519, + VMULLsv2i64 = 1520, + VMULLsv4i32 = 1521, + VMULLsv8i16 = 1522, + VMULLuv2i64 = 1523, + VMULLuv4i32 = 1524, + VMULLuv8i16 = 1525, + VMULS = 1526, + VMULfd = 1527, + VMULfq = 1528, + VMULhd = 1529, + VMULhq = 1530, + VMULpd = 1531, + VMULpq = 1532, + VMULslfd = 1533, + VMULslfq = 1534, + VMULslhd = 1535, + VMULslhq = 1536, + VMULslv2i32 = 1537, + VMULslv4i16 = 1538, + VMULslv4i32 = 1539, + VMULslv8i16 = 1540, + VMULv16i8 = 1541, + VMULv2i32 = 1542, + VMULv4i16 = 1543, + VMULv4i32 = 1544, + VMULv8i16 = 1545, + VMULv8i8 = 1546, + VMVNd = 1547, + VMVNq = 1548, + VMVNv2i32 = 1549, + VMVNv4i16 = 1550, + VMVNv4i32 = 1551, + VMVNv8i16 = 1552, + VNEGD = 1553, + VNEGH = 1554, + VNEGS = 1555, + VNEGf32q = 1556, + VNEGfd = 1557, + VNEGhd = 1558, + VNEGhq = 1559, + VNEGs16d = 1560, + VNEGs16q = 1561, + VNEGs32d = 1562, + VNEGs32q = 1563, + VNEGs8d = 1564, + VNEGs8q = 1565, + VNMLAD = 1566, + VNMLAH = 1567, + VNMLAS = 1568, + VNMLSD = 1569, + VNMLSH = 1570, + VNMLSS = 1571, + VNMULD = 1572, + VNMULH = 1573, + VNMULS = 1574, + VORNd = 1575, + VORNq = 1576, + VORRd = 1577, + VORRiv2i32 = 1578, + VORRiv4i16 = 1579, + VORRiv4i32 = 1580, + VORRiv8i16 = 1581, + VORRq = 1582, + VPADALsv16i8 = 1583, + VPADALsv2i32 = 1584, + VPADALsv4i16 = 1585, + VPADALsv4i32 = 1586, + VPADALsv8i16 = 1587, + VPADALsv8i8 = 1588, + VPADALuv16i8 = 1589, + VPADALuv2i32 = 1590, + VPADALuv4i16 = 1591, + VPADALuv4i32 = 1592, + VPADALuv8i16 = 1593, + VPADALuv8i8 = 1594, + VPADDLsv16i8 = 1595, + VPADDLsv2i32 = 1596, + VPADDLsv4i16 = 1597, + VPADDLsv4i32 = 1598, + VPADDLsv8i16 = 1599, + VPADDLsv8i8 = 1600, + VPADDLuv16i8 = 1601, + VPADDLuv2i32 = 1602, + VPADDLuv4i16 = 1603, + VPADDLuv4i32 = 1604, + VPADDLuv8i16 = 1605, + VPADDLuv8i8 = 1606, + VPADDf = 1607, + VPADDh = 1608, + VPADDi16 = 1609, + VPADDi32 = 1610, + VPADDi8 = 1611, + VPMAXf = 1612, + VPMAXh = 1613, + VPMAXs16 = 1614, + VPMAXs32 = 1615, + VPMAXs8 = 1616, + VPMAXu16 = 1617, + VPMAXu32 = 1618, + VPMAXu8 = 1619, + VPMINf = 1620, + VPMINh = 1621, + VPMINs16 = 1622, + VPMINs32 = 1623, + VPMINs8 = 1624, + VPMINu16 = 1625, + VPMINu32 = 1626, + VPMINu8 = 1627, + VQABSv16i8 = 1628, + VQABSv2i32 = 1629, + VQABSv4i16 = 1630, + VQABSv4i32 = 1631, + VQABSv8i16 = 1632, + VQABSv8i8 = 1633, + VQADDsv16i8 = 1634, + VQADDsv1i64 = 1635, + VQADDsv2i32 = 1636, + VQADDsv2i64 = 1637, + VQADDsv4i16 = 1638, + VQADDsv4i32 = 1639, + VQADDsv8i16 = 1640, + VQADDsv8i8 = 1641, + VQADDuv16i8 = 1642, + VQADDuv1i64 = 1643, + VQADDuv2i32 = 1644, + VQADDuv2i64 = 1645, + VQADDuv4i16 = 1646, + VQADDuv4i32 = 1647, + VQADDuv8i16 = 1648, + VQADDuv8i8 = 1649, + VQDMLALslv2i32 = 1650, + VQDMLALslv4i16 = 1651, + VQDMLALv2i64 = 1652, + VQDMLALv4i32 = 1653, + VQDMLSLslv2i32 = 1654, + VQDMLSLslv4i16 = 1655, + VQDMLSLv2i64 = 1656, + VQDMLSLv4i32 = 1657, + VQDMULHslv2i32 = 1658, + VQDMULHslv4i16 = 1659, + VQDMULHslv4i32 = 1660, + VQDMULHslv8i16 = 1661, + VQDMULHv2i32 = 1662, + VQDMULHv4i16 = 1663, + VQDMULHv4i32 = 1664, + VQDMULHv8i16 = 1665, + VQDMULLslv2i32 = 1666, + VQDMULLslv4i16 = 1667, + VQDMULLv2i64 = 1668, + VQDMULLv4i32 = 1669, + VQMOVNsuv2i32 = 1670, + VQMOVNsuv4i16 = 1671, + VQMOVNsuv8i8 = 1672, + VQMOVNsv2i32 = 1673, + VQMOVNsv4i16 = 1674, + VQMOVNsv8i8 = 1675, + VQMOVNuv2i32 = 1676, + VQMOVNuv4i16 = 1677, + VQMOVNuv8i8 = 1678, + VQNEGv16i8 = 1679, + VQNEGv2i32 = 1680, + VQNEGv4i16 = 1681, + VQNEGv4i32 = 1682, + VQNEGv8i16 = 1683, + VQNEGv8i8 = 1684, + VQRDMLAHslv2i32 = 1685, + VQRDMLAHslv4i16 = 1686, + VQRDMLAHslv4i32 = 1687, + VQRDMLAHslv8i16 = 1688, + VQRDMLAHv2i32 = 1689, + VQRDMLAHv4i16 = 1690, + VQRDMLAHv4i32 = 1691, + VQRDMLAHv8i16 = 1692, + VQRDMLSHslv2i32 = 1693, + VQRDMLSHslv4i16 = 1694, + VQRDMLSHslv4i32 = 1695, + VQRDMLSHslv8i16 = 1696, + VQRDMLSHv2i32 = 1697, + VQRDMLSHv4i16 = 1698, + VQRDMLSHv4i32 = 1699, + VQRDMLSHv8i16 = 1700, + VQRDMULHslv2i32 = 1701, + VQRDMULHslv4i16 = 1702, + VQRDMULHslv4i32 = 1703, + VQRDMULHslv8i16 = 1704, + VQRDMULHv2i32 = 1705, + VQRDMULHv4i16 = 1706, + VQRDMULHv4i32 = 1707, + VQRDMULHv8i16 = 1708, + VQRSHLsv16i8 = 1709, + VQRSHLsv1i64 = 1710, + VQRSHLsv2i32 = 1711, + VQRSHLsv2i64 = 1712, + VQRSHLsv4i16 = 1713, + VQRSHLsv4i32 = 1714, + VQRSHLsv8i16 = 1715, + VQRSHLsv8i8 = 1716, + VQRSHLuv16i8 = 1717, + VQRSHLuv1i64 = 1718, + VQRSHLuv2i32 = 1719, + VQRSHLuv2i64 = 1720, + VQRSHLuv4i16 = 1721, + VQRSHLuv4i32 = 1722, + VQRSHLuv8i16 = 1723, + VQRSHLuv8i8 = 1724, + VQRSHRNsv2i32 = 1725, + VQRSHRNsv4i16 = 1726, + VQRSHRNsv8i8 = 1727, + VQRSHRNuv2i32 = 1728, + VQRSHRNuv4i16 = 1729, + VQRSHRNuv8i8 = 1730, + VQRSHRUNv2i32 = 1731, + VQRSHRUNv4i16 = 1732, + VQRSHRUNv8i8 = 1733, + VQSHLsiv16i8 = 1734, + VQSHLsiv1i64 = 1735, + VQSHLsiv2i32 = 1736, + VQSHLsiv2i64 = 1737, + VQSHLsiv4i16 = 1738, + VQSHLsiv4i32 = 1739, + VQSHLsiv8i16 = 1740, + VQSHLsiv8i8 = 1741, + VQSHLsuv16i8 = 1742, + VQSHLsuv1i64 = 1743, + VQSHLsuv2i32 = 1744, + VQSHLsuv2i64 = 1745, + VQSHLsuv4i16 = 1746, + VQSHLsuv4i32 = 1747, + VQSHLsuv8i16 = 1748, + VQSHLsuv8i8 = 1749, + VQSHLsv16i8 = 1750, + VQSHLsv1i64 = 1751, + VQSHLsv2i32 = 1752, + VQSHLsv2i64 = 1753, + VQSHLsv4i16 = 1754, + VQSHLsv4i32 = 1755, + VQSHLsv8i16 = 1756, + VQSHLsv8i8 = 1757, + VQSHLuiv16i8 = 1758, + VQSHLuiv1i64 = 1759, + VQSHLuiv2i32 = 1760, + VQSHLuiv2i64 = 1761, + VQSHLuiv4i16 = 1762, + VQSHLuiv4i32 = 1763, + VQSHLuiv8i16 = 1764, + VQSHLuiv8i8 = 1765, + VQSHLuv16i8 = 1766, + VQSHLuv1i64 = 1767, + VQSHLuv2i32 = 1768, + VQSHLuv2i64 = 1769, + VQSHLuv4i16 = 1770, + VQSHLuv4i32 = 1771, + VQSHLuv8i16 = 1772, + VQSHLuv8i8 = 1773, + VQSHRNsv2i32 = 1774, + VQSHRNsv4i16 = 1775, + VQSHRNsv8i8 = 1776, + VQSHRNuv2i32 = 1777, + VQSHRNuv4i16 = 1778, + VQSHRNuv8i8 = 1779, + VQSHRUNv2i32 = 1780, + VQSHRUNv4i16 = 1781, + VQSHRUNv8i8 = 1782, + VQSUBsv16i8 = 1783, + VQSUBsv1i64 = 1784, + VQSUBsv2i32 = 1785, + VQSUBsv2i64 = 1786, + VQSUBsv4i16 = 1787, + VQSUBsv4i32 = 1788, + VQSUBsv8i16 = 1789, + VQSUBsv8i8 = 1790, + VQSUBuv16i8 = 1791, + VQSUBuv1i64 = 1792, + VQSUBuv2i32 = 1793, + VQSUBuv2i64 = 1794, + VQSUBuv4i16 = 1795, + VQSUBuv4i32 = 1796, + VQSUBuv8i16 = 1797, + VQSUBuv8i8 = 1798, + VRADDHNv2i32 = 1799, + VRADDHNv4i16 = 1800, + VRADDHNv8i8 = 1801, + VRECPEd = 1802, + VRECPEfd = 1803, + VRECPEfq = 1804, + VRECPEhd = 1805, + VRECPEhq = 1806, + VRECPEq = 1807, + VRECPSfd = 1808, + VRECPSfq = 1809, + VRECPShd = 1810, + VRECPShq = 1811, + VREV16d8 = 1812, + VREV16q8 = 1813, + VREV32d16 = 1814, + VREV32d8 = 1815, + VREV32q16 = 1816, + VREV32q8 = 1817, + VREV64d16 = 1818, + VREV64d32 = 1819, + VREV64d8 = 1820, + VREV64q16 = 1821, + VREV64q32 = 1822, + VREV64q8 = 1823, + VRHADDsv16i8 = 1824, + VRHADDsv2i32 = 1825, + VRHADDsv4i16 = 1826, + VRHADDsv4i32 = 1827, + VRHADDsv8i16 = 1828, + VRHADDsv8i8 = 1829, + VRHADDuv16i8 = 1830, + VRHADDuv2i32 = 1831, + VRHADDuv4i16 = 1832, + VRHADDuv4i32 = 1833, + VRHADDuv8i16 = 1834, + VRHADDuv8i8 = 1835, + VRINTAD = 1836, + VRINTAH = 1837, + VRINTANDf = 1838, + VRINTANDh = 1839, + VRINTANQf = 1840, + VRINTANQh = 1841, + VRINTAS = 1842, + VRINTMD = 1843, + VRINTMH = 1844, + VRINTMNDf = 1845, + VRINTMNDh = 1846, + VRINTMNQf = 1847, + VRINTMNQh = 1848, + VRINTMS = 1849, + VRINTND = 1850, + VRINTNH = 1851, + VRINTNNDf = 1852, + VRINTNNDh = 1853, + VRINTNNQf = 1854, + VRINTNNQh = 1855, + VRINTNS = 1856, + VRINTPD = 1857, + VRINTPH = 1858, + VRINTPNDf = 1859, + VRINTPNDh = 1860, + VRINTPNQf = 1861, + VRINTPNQh = 1862, + VRINTPS = 1863, + VRINTRD = 1864, + VRINTRH = 1865, + VRINTRS = 1866, + VRINTXD = 1867, + VRINTXH = 1868, + VRINTXNDf = 1869, + VRINTXNDh = 1870, + VRINTXNQf = 1871, + VRINTXNQh = 1872, + VRINTXS = 1873, + VRINTZD = 1874, + VRINTZH = 1875, + VRINTZNDf = 1876, + VRINTZNDh = 1877, + VRINTZNQf = 1878, + VRINTZNQh = 1879, + VRINTZS = 1880, + VRSHLsv16i8 = 1881, + VRSHLsv1i64 = 1882, + VRSHLsv2i32 = 1883, + VRSHLsv2i64 = 1884, + VRSHLsv4i16 = 1885, + VRSHLsv4i32 = 1886, + VRSHLsv8i16 = 1887, + VRSHLsv8i8 = 1888, + VRSHLuv16i8 = 1889, + VRSHLuv1i64 = 1890, + VRSHLuv2i32 = 1891, + VRSHLuv2i64 = 1892, + VRSHLuv4i16 = 1893, + VRSHLuv4i32 = 1894, + VRSHLuv8i16 = 1895, + VRSHLuv8i8 = 1896, + VRSHRNv2i32 = 1897, + VRSHRNv4i16 = 1898, + VRSHRNv8i8 = 1899, + VRSHRsv16i8 = 1900, + VRSHRsv1i64 = 1901, + VRSHRsv2i32 = 1902, + VRSHRsv2i64 = 1903, + VRSHRsv4i16 = 1904, + VRSHRsv4i32 = 1905, + VRSHRsv8i16 = 1906, + VRSHRsv8i8 = 1907, + VRSHRuv16i8 = 1908, + VRSHRuv1i64 = 1909, + VRSHRuv2i32 = 1910, + VRSHRuv2i64 = 1911, + VRSHRuv4i16 = 1912, + VRSHRuv4i32 = 1913, + VRSHRuv8i16 = 1914, + VRSHRuv8i8 = 1915, + VRSQRTEd = 1916, + VRSQRTEfd = 1917, + VRSQRTEfq = 1918, + VRSQRTEhd = 1919, + VRSQRTEhq = 1920, + VRSQRTEq = 1921, + VRSQRTSfd = 1922, + VRSQRTSfq = 1923, + VRSQRTShd = 1924, + VRSQRTShq = 1925, + VRSRAsv16i8 = 1926, + VRSRAsv1i64 = 1927, + VRSRAsv2i32 = 1928, + VRSRAsv2i64 = 1929, + VRSRAsv4i16 = 1930, + VRSRAsv4i32 = 1931, + VRSRAsv8i16 = 1932, + VRSRAsv8i8 = 1933, + VRSRAuv16i8 = 1934, + VRSRAuv1i64 = 1935, + VRSRAuv2i32 = 1936, + VRSRAuv2i64 = 1937, + VRSRAuv4i16 = 1938, + VRSRAuv4i32 = 1939, + VRSRAuv8i16 = 1940, + VRSRAuv8i8 = 1941, + VRSUBHNv2i32 = 1942, + VRSUBHNv4i16 = 1943, + VRSUBHNv8i8 = 1944, + VSELEQD = 1945, + VSELEQH = 1946, + VSELEQS = 1947, + VSELGED = 1948, + VSELGEH = 1949, + VSELGES = 1950, + VSELGTD = 1951, + VSELGTH = 1952, + VSELGTS = 1953, + VSELVSD = 1954, + VSELVSH = 1955, + VSELVSS = 1956, + VSETLNi16 = 1957, + VSETLNi32 = 1958, + VSETLNi8 = 1959, + VSHLLi16 = 1960, + VSHLLi32 = 1961, + VSHLLi8 = 1962, + VSHLLsv2i64 = 1963, + VSHLLsv4i32 = 1964, + VSHLLsv8i16 = 1965, + VSHLLuv2i64 = 1966, + VSHLLuv4i32 = 1967, + VSHLLuv8i16 = 1968, + VSHLiv16i8 = 1969, + VSHLiv1i64 = 1970, + VSHLiv2i32 = 1971, + VSHLiv2i64 = 1972, + VSHLiv4i16 = 1973, + VSHLiv4i32 = 1974, + VSHLiv8i16 = 1975, + VSHLiv8i8 = 1976, + VSHLsv16i8 = 1977, + VSHLsv1i64 = 1978, + VSHLsv2i32 = 1979, + VSHLsv2i64 = 1980, + VSHLsv4i16 = 1981, + VSHLsv4i32 = 1982, + VSHLsv8i16 = 1983, + VSHLsv8i8 = 1984, + VSHLuv16i8 = 1985, + VSHLuv1i64 = 1986, + VSHLuv2i32 = 1987, + VSHLuv2i64 = 1988, + VSHLuv4i16 = 1989, + VSHLuv4i32 = 1990, + VSHLuv8i16 = 1991, + VSHLuv8i8 = 1992, + VSHRNv2i32 = 1993, + VSHRNv4i16 = 1994, + VSHRNv8i8 = 1995, + VSHRsv16i8 = 1996, + VSHRsv1i64 = 1997, + VSHRsv2i32 = 1998, + VSHRsv2i64 = 1999, + VSHRsv4i16 = 2000, + VSHRsv4i32 = 2001, + VSHRsv8i16 = 2002, + VSHRsv8i8 = 2003, + VSHRuv16i8 = 2004, + VSHRuv1i64 = 2005, + VSHRuv2i32 = 2006, + VSHRuv2i64 = 2007, + VSHRuv4i16 = 2008, + VSHRuv4i32 = 2009, + VSHRuv8i16 = 2010, + VSHRuv8i8 = 2011, + VSHTOD = 2012, + VSHTOH = 2013, + VSHTOS = 2014, + VSITOD = 2015, + VSITOH = 2016, + VSITOS = 2017, + VSLIv16i8 = 2018, + VSLIv1i64 = 2019, + VSLIv2i32 = 2020, + VSLIv2i64 = 2021, + VSLIv4i16 = 2022, + VSLIv4i32 = 2023, + VSLIv8i16 = 2024, + VSLIv8i8 = 2025, + VSLTOD = 2026, + VSLTOH = 2027, + VSLTOS = 2028, + VSQRTD = 2029, + VSQRTH = 2030, + VSQRTS = 2031, + VSRAsv16i8 = 2032, + VSRAsv1i64 = 2033, + VSRAsv2i32 = 2034, + VSRAsv2i64 = 2035, + VSRAsv4i16 = 2036, + VSRAsv4i32 = 2037, + VSRAsv8i16 = 2038, + VSRAsv8i8 = 2039, + VSRAuv16i8 = 2040, + VSRAuv1i64 = 2041, + VSRAuv2i32 = 2042, + VSRAuv2i64 = 2043, + VSRAuv4i16 = 2044, + VSRAuv4i32 = 2045, + VSRAuv8i16 = 2046, + VSRAuv8i8 = 2047, + VSRIv16i8 = 2048, + VSRIv1i64 = 2049, + VSRIv2i32 = 2050, + VSRIv2i64 = 2051, + VSRIv4i16 = 2052, + VSRIv4i32 = 2053, + VSRIv8i16 = 2054, + VSRIv8i8 = 2055, + VST1LNd16 = 2056, + VST1LNd16_UPD = 2057, + VST1LNd32 = 2058, + VST1LNd32_UPD = 2059, + VST1LNd8 = 2060, + VST1LNd8_UPD = 2061, + VST1LNdAsm_16 = 2062, + VST1LNdAsm_32 = 2063, + VST1LNdAsm_8 = 2064, + VST1LNdWB_fixed_Asm_16 = 2065, + VST1LNdWB_fixed_Asm_32 = 2066, + VST1LNdWB_fixed_Asm_8 = 2067, + VST1LNdWB_register_Asm_16 = 2068, + VST1LNdWB_register_Asm_32 = 2069, + VST1LNdWB_register_Asm_8 = 2070, + VST1LNq16Pseudo = 2071, + VST1LNq16Pseudo_UPD = 2072, + VST1LNq32Pseudo = 2073, + VST1LNq32Pseudo_UPD = 2074, + VST1LNq8Pseudo = 2075, + VST1LNq8Pseudo_UPD = 2076, + VST1d16 = 2077, + VST1d16Q = 2078, + VST1d16Qwb_fixed = 2079, + VST1d16Qwb_register = 2080, + VST1d16T = 2081, + VST1d16Twb_fixed = 2082, + VST1d16Twb_register = 2083, + VST1d16wb_fixed = 2084, + VST1d16wb_register = 2085, + VST1d32 = 2086, + VST1d32Q = 2087, + VST1d32Qwb_fixed = 2088, + VST1d32Qwb_register = 2089, + VST1d32T = 2090, + VST1d32Twb_fixed = 2091, + VST1d32Twb_register = 2092, + VST1d32wb_fixed = 2093, + VST1d32wb_register = 2094, + VST1d64 = 2095, + VST1d64Q = 2096, + VST1d64QPseudo = 2097, + VST1d64QPseudoWB_fixed = 2098, + VST1d64QPseudoWB_register = 2099, + VST1d64Qwb_fixed = 2100, + VST1d64Qwb_register = 2101, + VST1d64T = 2102, + VST1d64TPseudo = 2103, + VST1d64TPseudoWB_fixed = 2104, + VST1d64TPseudoWB_register = 2105, + VST1d64Twb_fixed = 2106, + VST1d64Twb_register = 2107, + VST1d64wb_fixed = 2108, + VST1d64wb_register = 2109, + VST1d8 = 2110, + VST1d8Q = 2111, + VST1d8Qwb_fixed = 2112, + VST1d8Qwb_register = 2113, + VST1d8T = 2114, + VST1d8Twb_fixed = 2115, + VST1d8Twb_register = 2116, + VST1d8wb_fixed = 2117, + VST1d8wb_register = 2118, + VST1q16 = 2119, + VST1q16wb_fixed = 2120, + VST1q16wb_register = 2121, + VST1q32 = 2122, + VST1q32wb_fixed = 2123, + VST1q32wb_register = 2124, + VST1q64 = 2125, + VST1q64wb_fixed = 2126, + VST1q64wb_register = 2127, + VST1q8 = 2128, + VST1q8wb_fixed = 2129, + VST1q8wb_register = 2130, + VST2LNd16 = 2131, + VST2LNd16Pseudo = 2132, + VST2LNd16Pseudo_UPD = 2133, + VST2LNd16_UPD = 2134, + VST2LNd32 = 2135, + VST2LNd32Pseudo = 2136, + VST2LNd32Pseudo_UPD = 2137, + VST2LNd32_UPD = 2138, + VST2LNd8 = 2139, + VST2LNd8Pseudo = 2140, + VST2LNd8Pseudo_UPD = 2141, + VST2LNd8_UPD = 2142, + VST2LNdAsm_16 = 2143, + VST2LNdAsm_32 = 2144, + VST2LNdAsm_8 = 2145, + VST2LNdWB_fixed_Asm_16 = 2146, + VST2LNdWB_fixed_Asm_32 = 2147, + VST2LNdWB_fixed_Asm_8 = 2148, + VST2LNdWB_register_Asm_16 = 2149, + VST2LNdWB_register_Asm_32 = 2150, + VST2LNdWB_register_Asm_8 = 2151, + VST2LNq16 = 2152, + VST2LNq16Pseudo = 2153, + VST2LNq16Pseudo_UPD = 2154, + VST2LNq16_UPD = 2155, + VST2LNq32 = 2156, + VST2LNq32Pseudo = 2157, + VST2LNq32Pseudo_UPD = 2158, + VST2LNq32_UPD = 2159, + VST2LNqAsm_16 = 2160, + VST2LNqAsm_32 = 2161, + VST2LNqWB_fixed_Asm_16 = 2162, + VST2LNqWB_fixed_Asm_32 = 2163, + VST2LNqWB_register_Asm_16 = 2164, + VST2LNqWB_register_Asm_32 = 2165, + VST2b16 = 2166, + VST2b16wb_fixed = 2167, + VST2b16wb_register = 2168, + VST2b32 = 2169, + VST2b32wb_fixed = 2170, + VST2b32wb_register = 2171, + VST2b8 = 2172, + VST2b8wb_fixed = 2173, + VST2b8wb_register = 2174, + VST2d16 = 2175, + VST2d16wb_fixed = 2176, + VST2d16wb_register = 2177, + VST2d32 = 2178, + VST2d32wb_fixed = 2179, + VST2d32wb_register = 2180, + VST2d8 = 2181, + VST2d8wb_fixed = 2182, + VST2d8wb_register = 2183, + VST2q16 = 2184, + VST2q16Pseudo = 2185, + VST2q16PseudoWB_fixed = 2186, + VST2q16PseudoWB_register = 2187, + VST2q16wb_fixed = 2188, + VST2q16wb_register = 2189, + VST2q32 = 2190, + VST2q32Pseudo = 2191, + VST2q32PseudoWB_fixed = 2192, + VST2q32PseudoWB_register = 2193, + VST2q32wb_fixed = 2194, + VST2q32wb_register = 2195, + VST2q8 = 2196, + VST2q8Pseudo = 2197, + VST2q8PseudoWB_fixed = 2198, + VST2q8PseudoWB_register = 2199, + VST2q8wb_fixed = 2200, + VST2q8wb_register = 2201, + VST3LNd16 = 2202, + VST3LNd16Pseudo = 2203, + VST3LNd16Pseudo_UPD = 2204, + VST3LNd16_UPD = 2205, + VST3LNd32 = 2206, + VST3LNd32Pseudo = 2207, + VST3LNd32Pseudo_UPD = 2208, + VST3LNd32_UPD = 2209, + VST3LNd8 = 2210, + VST3LNd8Pseudo = 2211, + VST3LNd8Pseudo_UPD = 2212, + VST3LNd8_UPD = 2213, + VST3LNdAsm_16 = 2214, + VST3LNdAsm_32 = 2215, + VST3LNdAsm_8 = 2216, + VST3LNdWB_fixed_Asm_16 = 2217, + VST3LNdWB_fixed_Asm_32 = 2218, + VST3LNdWB_fixed_Asm_8 = 2219, + VST3LNdWB_register_Asm_16 = 2220, + VST3LNdWB_register_Asm_32 = 2221, + VST3LNdWB_register_Asm_8 = 2222, + VST3LNq16 = 2223, + VST3LNq16Pseudo = 2224, + VST3LNq16Pseudo_UPD = 2225, + VST3LNq16_UPD = 2226, + VST3LNq32 = 2227, + VST3LNq32Pseudo = 2228, + VST3LNq32Pseudo_UPD = 2229, + VST3LNq32_UPD = 2230, + VST3LNqAsm_16 = 2231, + VST3LNqAsm_32 = 2232, + VST3LNqWB_fixed_Asm_16 = 2233, + VST3LNqWB_fixed_Asm_32 = 2234, + VST3LNqWB_register_Asm_16 = 2235, + VST3LNqWB_register_Asm_32 = 2236, + VST3d16 = 2237, + VST3d16Pseudo = 2238, + VST3d16Pseudo_UPD = 2239, + VST3d16_UPD = 2240, + VST3d32 = 2241, + VST3d32Pseudo = 2242, + VST3d32Pseudo_UPD = 2243, + VST3d32_UPD = 2244, + VST3d8 = 2245, + VST3d8Pseudo = 2246, + VST3d8Pseudo_UPD = 2247, + VST3d8_UPD = 2248, + VST3dAsm_16 = 2249, + VST3dAsm_32 = 2250, + VST3dAsm_8 = 2251, + VST3dWB_fixed_Asm_16 = 2252, + VST3dWB_fixed_Asm_32 = 2253, + VST3dWB_fixed_Asm_8 = 2254, + VST3dWB_register_Asm_16 = 2255, + VST3dWB_register_Asm_32 = 2256, + VST3dWB_register_Asm_8 = 2257, + VST3q16 = 2258, + VST3q16Pseudo_UPD = 2259, + VST3q16_UPD = 2260, + VST3q16oddPseudo = 2261, + VST3q16oddPseudo_UPD = 2262, + VST3q32 = 2263, + VST3q32Pseudo_UPD = 2264, + VST3q32_UPD = 2265, + VST3q32oddPseudo = 2266, + VST3q32oddPseudo_UPD = 2267, + VST3q8 = 2268, + VST3q8Pseudo_UPD = 2269, + VST3q8_UPD = 2270, + VST3q8oddPseudo = 2271, + VST3q8oddPseudo_UPD = 2272, + VST3qAsm_16 = 2273, + VST3qAsm_32 = 2274, + VST3qAsm_8 = 2275, + VST3qWB_fixed_Asm_16 = 2276, + VST3qWB_fixed_Asm_32 = 2277, + VST3qWB_fixed_Asm_8 = 2278, + VST3qWB_register_Asm_16 = 2279, + VST3qWB_register_Asm_32 = 2280, + VST3qWB_register_Asm_8 = 2281, + VST4LNd16 = 2282, + VST4LNd16Pseudo = 2283, + VST4LNd16Pseudo_UPD = 2284, + VST4LNd16_UPD = 2285, + VST4LNd32 = 2286, + VST4LNd32Pseudo = 2287, + VST4LNd32Pseudo_UPD = 2288, + VST4LNd32_UPD = 2289, + VST4LNd8 = 2290, + VST4LNd8Pseudo = 2291, + VST4LNd8Pseudo_UPD = 2292, + VST4LNd8_UPD = 2293, + VST4LNdAsm_16 = 2294, + VST4LNdAsm_32 = 2295, + VST4LNdAsm_8 = 2296, + VST4LNdWB_fixed_Asm_16 = 2297, + VST4LNdWB_fixed_Asm_32 = 2298, + VST4LNdWB_fixed_Asm_8 = 2299, + VST4LNdWB_register_Asm_16 = 2300, + VST4LNdWB_register_Asm_32 = 2301, + VST4LNdWB_register_Asm_8 = 2302, + VST4LNq16 = 2303, + VST4LNq16Pseudo = 2304, + VST4LNq16Pseudo_UPD = 2305, + VST4LNq16_UPD = 2306, + VST4LNq32 = 2307, + VST4LNq32Pseudo = 2308, + VST4LNq32Pseudo_UPD = 2309, + VST4LNq32_UPD = 2310, + VST4LNqAsm_16 = 2311, + VST4LNqAsm_32 = 2312, + VST4LNqWB_fixed_Asm_16 = 2313, + VST4LNqWB_fixed_Asm_32 = 2314, + VST4LNqWB_register_Asm_16 = 2315, + VST4LNqWB_register_Asm_32 = 2316, + VST4d16 = 2317, + VST4d16Pseudo = 2318, + VST4d16Pseudo_UPD = 2319, + VST4d16_UPD = 2320, + VST4d32 = 2321, + VST4d32Pseudo = 2322, + VST4d32Pseudo_UPD = 2323, + VST4d32_UPD = 2324, + VST4d8 = 2325, + VST4d8Pseudo = 2326, + VST4d8Pseudo_UPD = 2327, + VST4d8_UPD = 2328, + VST4dAsm_16 = 2329, + VST4dAsm_32 = 2330, + VST4dAsm_8 = 2331, + VST4dWB_fixed_Asm_16 = 2332, + VST4dWB_fixed_Asm_32 = 2333, + VST4dWB_fixed_Asm_8 = 2334, + VST4dWB_register_Asm_16 = 2335, + VST4dWB_register_Asm_32 = 2336, + VST4dWB_register_Asm_8 = 2337, + VST4q16 = 2338, + VST4q16Pseudo_UPD = 2339, + VST4q16_UPD = 2340, + VST4q16oddPseudo = 2341, + VST4q16oddPseudo_UPD = 2342, + VST4q32 = 2343, + VST4q32Pseudo_UPD = 2344, + VST4q32_UPD = 2345, + VST4q32oddPseudo = 2346, + VST4q32oddPseudo_UPD = 2347, + VST4q8 = 2348, + VST4q8Pseudo_UPD = 2349, + VST4q8_UPD = 2350, + VST4q8oddPseudo = 2351, + VST4q8oddPseudo_UPD = 2352, + VST4qAsm_16 = 2353, + VST4qAsm_32 = 2354, + VST4qAsm_8 = 2355, + VST4qWB_fixed_Asm_16 = 2356, + VST4qWB_fixed_Asm_32 = 2357, + VST4qWB_fixed_Asm_8 = 2358, + VST4qWB_register_Asm_16 = 2359, + VST4qWB_register_Asm_32 = 2360, + VST4qWB_register_Asm_8 = 2361, + VSTMDDB_UPD = 2362, + VSTMDIA = 2363, + VSTMDIA_UPD = 2364, + VSTMQIA = 2365, + VSTMSDB_UPD = 2366, + VSTMSIA = 2367, + VSTMSIA_UPD = 2368, + VSTRD = 2369, + VSTRH = 2370, + VSTRS = 2371, + VSUBD = 2372, + VSUBH = 2373, + VSUBHNv2i32 = 2374, + VSUBHNv4i16 = 2375, + VSUBHNv8i8 = 2376, + VSUBLsv2i64 = 2377, + VSUBLsv4i32 = 2378, + VSUBLsv8i16 = 2379, + VSUBLuv2i64 = 2380, + VSUBLuv4i32 = 2381, + VSUBLuv8i16 = 2382, + VSUBS = 2383, + VSUBWsv2i64 = 2384, + VSUBWsv4i32 = 2385, + VSUBWsv8i16 = 2386, + VSUBWuv2i64 = 2387, + VSUBWuv4i32 = 2388, + VSUBWuv8i16 = 2389, + VSUBfd = 2390, + VSUBfq = 2391, + VSUBhd = 2392, + VSUBhq = 2393, + VSUBv16i8 = 2394, + VSUBv1i64 = 2395, + VSUBv2i32 = 2396, + VSUBv2i64 = 2397, + VSUBv4i16 = 2398, + VSUBv4i32 = 2399, + VSUBv8i16 = 2400, + VSUBv8i8 = 2401, + VSWPd = 2402, + VSWPq = 2403, + VTBL1 = 2404, + VTBL2 = 2405, + VTBL3 = 2406, + VTBL3Pseudo = 2407, + VTBL4 = 2408, + VTBL4Pseudo = 2409, + VTBX1 = 2410, + VTBX2 = 2411, + VTBX3 = 2412, + VTBX3Pseudo = 2413, + VTBX4 = 2414, + VTBX4Pseudo = 2415, + VTOSHD = 2416, + VTOSHH = 2417, + VTOSHS = 2418, + VTOSIRD = 2419, + VTOSIRH = 2420, + VTOSIRS = 2421, + VTOSIZD = 2422, + VTOSIZH = 2423, + VTOSIZS = 2424, + VTOSLD = 2425, + VTOSLH = 2426, + VTOSLS = 2427, + VTOUHD = 2428, + VTOUHH = 2429, + VTOUHS = 2430, + VTOUIRD = 2431, + VTOUIRH = 2432, + VTOUIRS = 2433, + VTOUIZD = 2434, + VTOUIZH = 2435, + VTOUIZS = 2436, + VTOULD = 2437, + VTOULH = 2438, + VTOULS = 2439, + VTRNd16 = 2440, + VTRNd32 = 2441, + VTRNd8 = 2442, + VTRNq16 = 2443, + VTRNq32 = 2444, + VTRNq8 = 2445, + VTSTv16i8 = 2446, + VTSTv2i32 = 2447, + VTSTv4i16 = 2448, + VTSTv4i32 = 2449, + VTSTv8i16 = 2450, + VTSTv8i8 = 2451, + VUHTOD = 2452, + VUHTOH = 2453, + VUHTOS = 2454, + VUITOD = 2455, + VUITOH = 2456, + VUITOS = 2457, + VULTOD = 2458, + VULTOH = 2459, + VULTOS = 2460, + VUZPd16 = 2461, + VUZPd8 = 2462, + VUZPq16 = 2463, + VUZPq32 = 2464, + VUZPq8 = 2465, + VZIPd16 = 2466, + VZIPd8 = 2467, + VZIPq16 = 2468, + VZIPq32 = 2469, + VZIPq8 = 2470, + WIN__CHKSTK = 2471, + WIN__DBZCHK = 2472, + sysLDMDA = 2473, + sysLDMDA_UPD = 2474, + sysLDMDB = 2475, + sysLDMDB_UPD = 2476, + sysLDMIA = 2477, + sysLDMIA_UPD = 2478, + sysLDMIB = 2479, + sysLDMIB_UPD = 2480, + sysSTMDA = 2481, + sysSTMDA_UPD = 2482, + sysSTMDB = 2483, + sysSTMDB_UPD = 2484, + sysSTMIA = 2485, + sysSTMIA_UPD = 2486, + sysSTMIB = 2487, + sysSTMIB_UPD = 2488, + t2ABS = 2489, + t2ADCri = 2490, + t2ADCrr = 2491, + t2ADCrs = 2492, + t2ADDSri = 2493, + t2ADDSrr = 2494, + t2ADDSrs = 2495, + t2ADDri = 2496, + t2ADDri12 = 2497, + t2ADDrr = 2498, + t2ADDrs = 2499, + t2ADR = 2500, + t2ANDri = 2501, + t2ANDrr = 2502, + t2ANDrs = 2503, + t2ASRri = 2504, + t2ASRrr = 2505, + t2B = 2506, + t2BFC = 2507, + t2BFI = 2508, + t2BICri = 2509, + t2BICrr = 2510, + t2BICrs = 2511, + t2BR_JT = 2512, + t2BXJ = 2513, + t2Bcc = 2514, + t2CDP = 2515, + t2CDP2 = 2516, + t2CLREX = 2517, + t2CLZ = 2518, + t2CMNri = 2519, + t2CMNzrr = 2520, + t2CMNzrs = 2521, + t2CMPri = 2522, + t2CMPrr = 2523, + t2CMPrs = 2524, + t2CPS1p = 2525, + t2CPS2p = 2526, + t2CPS3p = 2527, + t2CRC32B = 2528, + t2CRC32CB = 2529, + t2CRC32CH = 2530, + t2CRC32CW = 2531, + t2CRC32H = 2532, + t2CRC32W = 2533, + t2DBG = 2534, + t2DCPS1 = 2535, + t2DCPS2 = 2536, + t2DCPS3 = 2537, + t2DMB = 2538, + t2DSB = 2539, + t2EORri = 2540, + t2EORrr = 2541, + t2EORrs = 2542, + t2HINT = 2543, + t2HVC = 2544, + t2ISB = 2545, + t2IT = 2546, + t2Int_eh_sjlj_setjmp = 2547, + t2Int_eh_sjlj_setjmp_nofp = 2548, + t2LDA = 2549, + t2LDAB = 2550, + t2LDAEX = 2551, + t2LDAEXB = 2552, + t2LDAEXD = 2553, + t2LDAEXH = 2554, + t2LDAH = 2555, + t2LDC2L_OFFSET = 2556, + t2LDC2L_OPTION = 2557, + t2LDC2L_POST = 2558, + t2LDC2L_PRE = 2559, + t2LDC2_OFFSET = 2560, + t2LDC2_OPTION = 2561, + t2LDC2_POST = 2562, + t2LDC2_PRE = 2563, + t2LDCL_OFFSET = 2564, + t2LDCL_OPTION = 2565, + t2LDCL_POST = 2566, + t2LDCL_PRE = 2567, + t2LDC_OFFSET = 2568, + t2LDC_OPTION = 2569, + t2LDC_POST = 2570, + t2LDC_PRE = 2571, + t2LDMDB = 2572, + t2LDMDB_UPD = 2573, + t2LDMIA = 2574, + t2LDMIA_RET = 2575, + t2LDMIA_UPD = 2576, + t2LDRBT = 2577, + t2LDRB_POST = 2578, + t2LDRB_PRE = 2579, + t2LDRBi12 = 2580, + t2LDRBi8 = 2581, + t2LDRBpci = 2582, + t2LDRBpcrel = 2583, + t2LDRBs = 2584, + t2LDRD_POST = 2585, + t2LDRD_PRE = 2586, + t2LDRDi8 = 2587, + t2LDREX = 2588, + t2LDREXB = 2589, + t2LDREXD = 2590, + t2LDREXH = 2591, + t2LDRHT = 2592, + t2LDRH_POST = 2593, + t2LDRH_PRE = 2594, + t2LDRHi12 = 2595, + t2LDRHi8 = 2596, + t2LDRHpci = 2597, + t2LDRHpcrel = 2598, + t2LDRHs = 2599, + t2LDRSBT = 2600, + t2LDRSB_POST = 2601, + t2LDRSB_PRE = 2602, + t2LDRSBi12 = 2603, + t2LDRSBi8 = 2604, + t2LDRSBpci = 2605, + t2LDRSBpcrel = 2606, + t2LDRSBs = 2607, + t2LDRSHT = 2608, + t2LDRSH_POST = 2609, + t2LDRSH_PRE = 2610, + t2LDRSHi12 = 2611, + t2LDRSHi8 = 2612, + t2LDRSHpci = 2613, + t2LDRSHpcrel = 2614, + t2LDRSHs = 2615, + t2LDRT = 2616, + t2LDR_POST = 2617, + t2LDR_PRE = 2618, + t2LDRi12 = 2619, + t2LDRi8 = 2620, + t2LDRpci = 2621, + t2LDRpci_pic = 2622, + t2LDRpcrel = 2623, + t2LDRs = 2624, + t2LEApcrel = 2625, + t2LEApcrelJT = 2626, + t2LSLri = 2627, + t2LSLrr = 2628, + t2LSRri = 2629, + t2LSRrr = 2630, + t2MCR = 2631, + t2MCR2 = 2632, + t2MCRR = 2633, + t2MCRR2 = 2634, + t2MLA = 2635, + t2MLS = 2636, + t2MOVCCasr = 2637, + t2MOVCCi = 2638, + t2MOVCCi16 = 2639, + t2MOVCCi32imm = 2640, + t2MOVCClsl = 2641, + t2MOVCClsr = 2642, + t2MOVCCr = 2643, + t2MOVCCror = 2644, + t2MOVSsi = 2645, + t2MOVSsr = 2646, + t2MOVTi16 = 2647, + t2MOVTi16_ga_pcrel = 2648, + t2MOV_ga_pcrel = 2649, + t2MOVi = 2650, + t2MOVi16 = 2651, + t2MOVi16_ga_pcrel = 2652, + t2MOVi32imm = 2653, + t2MOVr = 2654, + t2MOVsi = 2655, + t2MOVsr = 2656, + t2MOVsra_flag = 2657, + t2MOVsrl_flag = 2658, + t2MRC = 2659, + t2MRC2 = 2660, + t2MRRC = 2661, + t2MRRC2 = 2662, + t2MRS_AR = 2663, + t2MRS_M = 2664, + t2MRSbanked = 2665, + t2MRSsys_AR = 2666, + t2MSR_AR = 2667, + t2MSR_M = 2668, + t2MSRbanked = 2669, + t2MUL = 2670, + t2MVNCCi = 2671, + t2MVNi = 2672, + t2MVNr = 2673, + t2MVNs = 2674, + t2ORNri = 2675, + t2ORNrr = 2676, + t2ORNrs = 2677, + t2ORRri = 2678, + t2ORRrr = 2679, + t2ORRrs = 2680, + t2PKHBT = 2681, + t2PKHTB = 2682, + t2PLDWi12 = 2683, + t2PLDWi8 = 2684, + t2PLDWs = 2685, + t2PLDi12 = 2686, + t2PLDi8 = 2687, + t2PLDpci = 2688, + t2PLDs = 2689, + t2PLIi12 = 2690, + t2PLIi8 = 2691, + t2PLIpci = 2692, + t2PLIs = 2693, + t2QADD = 2694, + t2QADD16 = 2695, + t2QADD8 = 2696, + t2QASX = 2697, + t2QDADD = 2698, + t2QDSUB = 2699, + t2QSAX = 2700, + t2QSUB = 2701, + t2QSUB16 = 2702, + t2QSUB8 = 2703, + t2RBIT = 2704, + t2REV = 2705, + t2REV16 = 2706, + t2REVSH = 2707, + t2RFEDB = 2708, + t2RFEDBW = 2709, + t2RFEIA = 2710, + t2RFEIAW = 2711, + t2RORri = 2712, + t2RORrr = 2713, + t2RRX = 2714, + t2RSBSri = 2715, + t2RSBSrs = 2716, + t2RSBri = 2717, + t2RSBrr = 2718, + t2RSBrs = 2719, + t2SADD16 = 2720, + t2SADD8 = 2721, + t2SASX = 2722, + t2SBCri = 2723, + t2SBCrr = 2724, + t2SBCrs = 2725, + t2SBFX = 2726, + t2SDIV = 2727, + t2SEL = 2728, + t2SETPAN = 2729, + t2SG = 2730, + t2SHADD16 = 2731, + t2SHADD8 = 2732, + t2SHASX = 2733, + t2SHSAX = 2734, + t2SHSUB16 = 2735, + t2SHSUB8 = 2736, + t2SMC = 2737, + t2SMLABB = 2738, + t2SMLABT = 2739, + t2SMLAD = 2740, + t2SMLADX = 2741, + t2SMLAL = 2742, + t2SMLALBB = 2743, + t2SMLALBT = 2744, + t2SMLALD = 2745, + t2SMLALDX = 2746, + t2SMLALTB = 2747, + t2SMLALTT = 2748, + t2SMLATB = 2749, + t2SMLATT = 2750, + t2SMLAWB = 2751, + t2SMLAWT = 2752, + t2SMLSD = 2753, + t2SMLSDX = 2754, + t2SMLSLD = 2755, + t2SMLSLDX = 2756, + t2SMMLA = 2757, + t2SMMLAR = 2758, + t2SMMLS = 2759, + t2SMMLSR = 2760, + t2SMMUL = 2761, + t2SMMULR = 2762, + t2SMUAD = 2763, + t2SMUADX = 2764, + t2SMULBB = 2765, + t2SMULBT = 2766, + t2SMULL = 2767, + t2SMULTB = 2768, + t2SMULTT = 2769, + t2SMULWB = 2770, + t2SMULWT = 2771, + t2SMUSD = 2772, + t2SMUSDX = 2773, + t2SRSDB = 2774, + t2SRSDB_UPD = 2775, + t2SRSIA = 2776, + t2SRSIA_UPD = 2777, + t2SSAT = 2778, + t2SSAT16 = 2779, + t2SSAX = 2780, + t2SSUB16 = 2781, + t2SSUB8 = 2782, + t2STC2L_OFFSET = 2783, + t2STC2L_OPTION = 2784, + t2STC2L_POST = 2785, + t2STC2L_PRE = 2786, + t2STC2_OFFSET = 2787, + t2STC2_OPTION = 2788, + t2STC2_POST = 2789, + t2STC2_PRE = 2790, + t2STCL_OFFSET = 2791, + t2STCL_OPTION = 2792, + t2STCL_POST = 2793, + t2STCL_PRE = 2794, + t2STC_OFFSET = 2795, + t2STC_OPTION = 2796, + t2STC_POST = 2797, + t2STC_PRE = 2798, + t2STL = 2799, + t2STLB = 2800, + t2STLEX = 2801, + t2STLEXB = 2802, + t2STLEXD = 2803, + t2STLEXH = 2804, + t2STLH = 2805, + t2STMDB = 2806, + t2STMDB_UPD = 2807, + t2STMIA = 2808, + t2STMIA_UPD = 2809, + t2STRBT = 2810, + t2STRB_POST = 2811, + t2STRB_PRE = 2812, + t2STRB_preidx = 2813, + t2STRBi12 = 2814, + t2STRBi8 = 2815, + t2STRBs = 2816, + t2STRD_POST = 2817, + t2STRD_PRE = 2818, + t2STRDi8 = 2819, + t2STREX = 2820, + t2STREXB = 2821, + t2STREXD = 2822, + t2STREXH = 2823, + t2STRHT = 2824, + t2STRH_POST = 2825, + t2STRH_PRE = 2826, + t2STRH_preidx = 2827, + t2STRHi12 = 2828, + t2STRHi8 = 2829, + t2STRHs = 2830, + t2STRT = 2831, + t2STR_POST = 2832, + t2STR_PRE = 2833, + t2STR_preidx = 2834, + t2STRi12 = 2835, + t2STRi8 = 2836, + t2STRs = 2837, + t2SUBS_PC_LR = 2838, + t2SUBSri = 2839, + t2SUBSrr = 2840, + t2SUBSrs = 2841, + t2SUBri = 2842, + t2SUBri12 = 2843, + t2SUBrr = 2844, + t2SUBrs = 2845, + t2SXTAB = 2846, + t2SXTAB16 = 2847, + t2SXTAH = 2848, + t2SXTB = 2849, + t2SXTB16 = 2850, + t2SXTH = 2851, + t2TBB = 2852, + t2TBB_JT = 2853, + t2TBH = 2854, + t2TBH_JT = 2855, + t2TEQri = 2856, + t2TEQrr = 2857, + t2TEQrs = 2858, + t2TSTri = 2859, + t2TSTrr = 2860, + t2TSTrs = 2861, + t2TT = 2862, + t2TTA = 2863, + t2TTAT = 2864, + t2TTT = 2865, + t2UADD16 = 2866, + t2UADD8 = 2867, + t2UASX = 2868, + t2UBFX = 2869, + t2UDF = 2870, + t2UDIV = 2871, + t2UHADD16 = 2872, + t2UHADD8 = 2873, + t2UHASX = 2874, + t2UHSAX = 2875, + t2UHSUB16 = 2876, + t2UHSUB8 = 2877, + t2UMAAL = 2878, + t2UMLAL = 2879, + t2UMULL = 2880, + t2UQADD16 = 2881, + t2UQADD8 = 2882, + t2UQASX = 2883, + t2UQSAX = 2884, + t2UQSUB16 = 2885, + t2UQSUB8 = 2886, + t2USAD8 = 2887, + t2USADA8 = 2888, + t2USAT = 2889, + t2USAT16 = 2890, + t2USAX = 2891, + t2USUB16 = 2892, + t2USUB8 = 2893, + t2UXTAB = 2894, + t2UXTAB16 = 2895, + t2UXTAH = 2896, + t2UXTB = 2897, + t2UXTB16 = 2898, + t2UXTH = 2899, + tADC = 2900, + tADDframe = 2901, + tADDhirr = 2902, + tADDi3 = 2903, + tADDi8 = 2904, + tADDrSP = 2905, + tADDrSPi = 2906, + tADDrr = 2907, + tADDspi = 2908, + tADDspr = 2909, + tADJCALLSTACKDOWN = 2910, + tADJCALLSTACKUP = 2911, + tADR = 2912, + tAND = 2913, + tASRri = 2914, + tASRrr = 2915, + tB = 2916, + tBIC = 2917, + tBKPT = 2918, + tBL = 2919, + tBLXNSr = 2920, + tBLXi = 2921, + tBLXr = 2922, + tBRIND = 2923, + tBR_JTr = 2924, + tBX = 2925, + tBXNS = 2926, + tBX_CALL = 2927, + tBX_RET = 2928, + tBX_RET_vararg = 2929, + tBcc = 2930, + tBfar = 2931, + tCBNZ = 2932, + tCBZ = 2933, + tCMNz = 2934, + tCMPhir = 2935, + tCMPi8 = 2936, + tCMPr = 2937, + tCPS = 2938, + tEOR = 2939, + tHINT = 2940, + tHLT = 2941, + tInt_eh_sjlj_longjmp = 2942, + tInt_eh_sjlj_setjmp = 2943, + tLDMIA = 2944, + tLDMIA_UPD = 2945, + tLDRBi = 2946, + tLDRBr = 2947, + tLDRHi = 2948, + tLDRHr = 2949, + tLDRLIT_ga_abs = 2950, + tLDRLIT_ga_pcrel = 2951, + tLDRSB = 2952, + tLDRSH = 2953, + tLDRi = 2954, + tLDRpci = 2955, + tLDRpci_pic = 2956, + tLDRr = 2957, + tLDRspi = 2958, + tLEApcrel = 2959, + tLEApcrelJT = 2960, + tLSLri = 2961, + tLSLrr = 2962, + tLSRri = 2963, + tLSRrr = 2964, + tMOVCCr_pseudo = 2965, + tMOVSr = 2966, + tMOVi8 = 2967, + tMOVr = 2968, + tMUL = 2969, + tMVN = 2970, + tORR = 2971, + tPICADD = 2972, + tPOP = 2973, + tPOP_RET = 2974, + tPUSH = 2975, + tREV = 2976, + tREV16 = 2977, + tREVSH = 2978, + tROR = 2979, + tRSB = 2980, + tSBC = 2981, + tSETEND = 2982, + tSTMIA_UPD = 2983, + tSTRBi = 2984, + tSTRBr = 2985, + tSTRHi = 2986, + tSTRHr = 2987, + tSTRi = 2988, + tSTRr = 2989, + tSTRspi = 2990, + tSUBi3 = 2991, + tSUBi8 = 2992, + tSUBrr = 2993, + tSUBspi = 2994, + tSVC = 2995, + tSXTB = 2996, + tSXTH = 2997, + tTAILJMPd = 2998, + tTAILJMPdND = 2999, + tTAILJMPr = 3000, + tTPsoft = 3001, + tTRAP = 3002, + tTST = 3003, + tUDF = 3004, + tUXTB = 3005, + tUXTH = 3006, + INSTRUCTION_LIST_END = 3007 + }; + +namespace Sched { + enum { + NoInstrModel = 0, + IIC_iALUi_WriteALU_ReadALU = 1, + IIC_iALUr_WriteALU_ReadALU_ReadALU = 2, + IIC_iALUsr_WriteALUsi_ReadALU = 3, + IIC_iALUsr_WriteALUsr_ReadALUsr = 4, + IIC_iALUsr_WriteALUSsr_ReadALUsr = 5, + IIC_iBITi_WriteALU_ReadALU = 6, + IIC_iBITr_WriteALU_ReadALU_ReadALU = 7, + IIC_iBITsr_WriteALUsi_ReadALU = 8, + IIC_iBITsr_WriteALUsr_ReadALUsr = 9, + IIC_Br_WriteBr = 10, + IIC_iUNAsi = 11, + IIC_Br_WriteBrL = 12, + WriteBrL = 13, + IIC_Br_WriteBrTbl = 14, + WriteBr = 15, + IIC_iUNAr_WriteALU = 16, + IIC_iCMPi_WriteCMP_ReadALU = 17, + IIC_iCMPr_WriteCMP_ReadALU_ReadALU = 18, + IIC_iCMPsr_WriteCMPsi_ReadALU = 19, + IIC_iCMPsr_WriteCMPsr_ReadALU = 20, + IIC_fpUNA64 = 21, + IIC_fpUNA16 = 22, + IIC_fpUNA32 = 23, + IIC_fpSTAT = 24, + IIC_iLoad_m = 25, + IIC_iLoad_mu = 26, + IIC_iLoad_mBr = 27, + IIC_iLoad_bh_ru = 28, + IIC_iLoad_bh_iu = 29, + IIC_iLoad_bh_r = 30, + IIC_iLoad_bh_si = 31, + IIC_iLoad_d_r = 32, + IIC_iLoad_d_ru = 33, + IIC_iLoad_i = 34, + IIC_iLoadiALU = 35, + IIC_iLoad_ru = 36, + IIC_iLoad_iu = 37, + IIC_iLoad_r = 38, + IIC_iLoad_si = 39, + IIC_iMAC32 = 40, + IIC_iCMOVi_WriteALU = 41, + IIC_iMOVi_WriteALU = 42, + IIC_iCMOVix2 = 43, + IIC_iCMOVr_WriteALU = 44, + IIC_iCMOVsr_WriteALU = 45, + IIC_iMOVix2addpc = 46, + IIC_iMOVix2ld = 47, + IIC_iMOVix2 = 48, + IIC_iMOVr_WriteALU = 49, + IIC_iMOVsr_WriteALU = 50, + IIC_iMOVsi_WriteALU = 51, + IIC_iMUL32 = 52, + IIC_iMVNi_WriteALU = 53, + IIC_iMVNr_WriteALU = 54, + IIC_iMVNsr_WriteALU = 55, + IIC_iALUr_WriteALU_ReadALU = 56, + IIC_iStore_r = 57, + IIC_iStore_bh_r = 58, + IIC_iALUsi_WriteALUsi_ReadALU = 59, + IIC_iBITsi_WriteALUsi_ReadALU = 60, + IIC_Preload_WritePreLd = 61, + IIC_iDIV = 62, + IIC_iMAC16 = 63, + IIC_iMAC64 = 64, + IIC_iMUL16 = 65, + IIC_iMUL64 = 66, + IIC_iStore_m = 67, + IIC_iStore_mu = 68, + IIC_iStore_bh_ru = 69, + IIC_iStore_bh_iu = 70, + IIC_iStore_ru = 71, + IIC_iStore_bh_si = 72, + IIC_iStore_d_r = 73, + IIC_iStore_d_ru = 74, + IIC_iStore_iu = 75, + IIC_iStore_si = 76, + IIC_Br = 77, + IIC_iEXTAr_WriteALUsr = 78, + IIC_iEXTr_WriteALUsi = 79, + IIC_iTSTi_WriteCMP_ReadALU = 80, + IIC_iTSTr_WriteCMP_ReadALU_ReadALU = 81, + IIC_iTSTsr_WriteCMPsi_ReadALU = 82, + IIC_iTSTsr_WriteCMPsr_ReadALU = 83, + WriteALU_ReadALU_ReadALU = 84, + IIC_VABAD = 85, + IIC_VABAQ = 86, + IIC_VSUBi4Q = 87, + IIC_VBIND = 88, + IIC_VBINQ = 89, + IIC_VSUBi4D = 90, + IIC_VUNAD = 91, + IIC_VUNAQ = 92, + IIC_VUNAiQ = 93, + IIC_VUNAiD = 94, + IIC_fpALU64 = 95, + IIC_fpALU16 = 96, + IIC_VBINi4D = 97, + IIC_VSHLiD = 98, + IIC_fpALU32 = 99, + IIC_VSUBiD = 100, + IIC_VBINiQ = 101, + IIC_VBINiD = 102, + IIC_VMOVImm = 103, + IIC_VCNTiD = 104, + IIC_VCNTiQ = 105, + IIC_fpCMP64 = 106, + IIC_fpCMP16 = 107, + IIC_fpCMP32 = 108, + IIC_fpCVTSH = 109, + IIC_fpCVTHS = 110, + IIC_fpCVTDS = 111, + IIC_fpCVTSD = 112, + IIC_fpDIV64 = 113, + IIC_fpDIV16 = 114, + IIC_fpDIV32 = 115, + IIC_VMOVIS = 116, + IIC_VMOVD = 117, + IIC_VMOVQ = 118, + IIC_VEXTD = 119, + IIC_VEXTQ = 120, + IIC_fpFMAC64 = 121, + IIC_fpFMAC16 = 122, + IIC_fpFMAC32 = 123, + IIC_VFMACD = 124, + IIC_VFMACQ = 125, + IIC_VMOVSI = 126, + IIC_VBINi4Q = 127, + IIC_VLD1dup = 128, + IIC_VLD1dupu = 129, + IIC_VLD1ln = 130, + IIC_VLD1lnu = 131, + IIC_VLD1 = 132, + IIC_VLD1x4 = 133, + IIC_VLD1x2u = 134, + IIC_VLD1x3 = 135, + IIC_VLD1u = 136, + IIC_VLD1x2 = 137, + IIC_VLD2dup = 138, + IIC_VLD2dupu = 139, + IIC_VLD2ln = 140, + IIC_VLD2lnu = 141, + IIC_VLD2 = 142, + IIC_VLD2u = 143, + IIC_VLD2x2 = 144, + IIC_VLD2x2u = 145, + IIC_VLD3dup = 146, + IIC_VLD3dupu = 147, + IIC_VLD3ln = 148, + IIC_VLD3lnu = 149, + IIC_VLD3 = 150, + IIC_VLD3u = 151, + IIC_VLD4dup = 152, + IIC_VLD4dupu = 153, + IIC_VLD4ln = 154, + IIC_VLD4lnu = 155, + IIC_VLD4 = 156, + IIC_VLD4u = 157, + IIC_fpLoad_mu = 158, + IIC_fpLoad_m = 159, + IIC_fpLoad64 = 160, + IIC_fpLoad16 = 161, + IIC_fpLoad32 = 162, + IIC_fpStore_m = 163, + IIC_fpMAC64 = 164, + IIC_fpMAC16 = 165, + IIC_VMACi32D = 166, + IIC_VMACi16D = 167, + IIC_fpMAC32 = 168, + IIC_VMACD = 169, + IIC_VMACQ = 170, + IIC_VMACi32Q = 171, + IIC_VMACi16Q = 172, + IIC_fpMOVID = 173, + IIC_fpMOVIS = 174, + IIC_VQUNAiD = 175, + IIC_VMOVN = 176, + IIC_fpMOVSI = 177, + IIC_fpMOVDI = 178, + IIC_fpMUL64 = 179, + IIC_fpMUL16 = 180, + IIC_VMULi16D = 181, + IIC_VMULi32D = 182, + IIC_fpMUL32 = 183, + IIC_VFMULD = 184, + IIC_VFMULQ = 185, + IIC_VMULi16Q = 186, + IIC_VMULi32Q = 187, + IIC_VSHLiQ = 188, + IIC_VPALiQ = 189, + IIC_VPALiD = 190, + IIC_VPBIND = 191, + IIC_VQUNAiQ = 192, + IIC_VSHLi4Q = 193, + IIC_VSHLi4D = 194, + IIC_VRECSD = 195, + IIC_VRECSQ = 196, + IIC_VMOVISL = 197, + IIC_fpCVTID_WriteCvtFP = 198, + IIC_fpCVTIH_WriteCvtFP = 199, + IIC_fpCVTIS_WriteCvtFP = 200, + IIC_fpCVTID = 201, + IIC_fpCVTIH = 202, + IIC_fpCVTIS = 203, + IIC_fpSQRT64 = 204, + IIC_fpSQRT16 = 205, + IIC_fpSQRT32 = 206, + IIC_VST1ln = 207, + IIC_VST1lnu = 208, + IIC_VST1 = 209, + IIC_VST1x4 = 210, + IIC_VLD1x4u = 211, + IIC_VST1x3 = 212, + IIC_VLD1x3u = 213, + IIC_VST1x4u = 214, + IIC_VST1x3u = 215, + IIC_VST1x2 = 216, + IIC_VST2ln = 217, + IIC_VST2lnu = 218, + IIC_VST2 = 219, + IIC_VST2x2 = 220, + IIC_VST2x2u = 221, + IIC_VST3ln = 222, + IIC_VST3lnu = 223, + IIC_VST3 = 224, + IIC_VST3u = 225, + IIC_VST4ln = 226, + IIC_VST4lnu = 227, + IIC_VST4 = 228, + IIC_VST4u = 229, + IIC_fpStore_mu = 230, + IIC_fpStore64 = 231, + IIC_fpStore16 = 232, + IIC_fpStore32 = 233, + IIC_VSUBiQ = 234, + IIC_VTB1 = 235, + IIC_VTB2 = 236, + IIC_VTB3 = 237, + IIC_VTB4 = 238, + IIC_VTBX1 = 239, + IIC_VTBX2 = 240, + IIC_VTBX3 = 241, + IIC_VTBX4 = 242, + IIC_fpCVTDI_WriteCvtFP = 243, + IIC_fpCVTHI_WriteCvtFP = 244, + IIC_fpCVTSI_WriteCvtFP = 245, + IIC_fpCVTDI = 246, + IIC_fpCVTHI = 247, + IIC_fpCVTSI = 248, + IIC_VPERMD = 249, + IIC_VPERMQ = 250, + IIC_VPERMQ3 = 251, + IIC_iALUsi_WriteALUsi_ReadALUsr = 252, + IIC_iBITi = 253, + IIC_iCMPsi_WriteCMPsi_ReadALU_ReadALU = 254, + IIC_iCMPi_WriteCMP = 255, + IIC_iCMPr_WriteCMP = 256, + IIC_iCMPsi_WriteCMPsi = 257, + IIC_iALUx = 258, + IIC_iLoad_bh_i = 259, + IIC_iLoad_d_i = 260, + IIC_iCMOVsi_WriteALU = 261, + IIC_iMOVi = 262, + IIC_iMVNsi_WriteALU = 263, + IIC_iALUsir_WriteALUsi_ReadALU = 264, + IIC_iStore_bh_i = 265, + IIC_iStore_i = 266, + IIC_iEXTAsr = 267, + IIC_iEXTr = 268, + IIC_iTSTi_WriteCMP = 269, + IIC_iTSTr_WriteCMP = 270, + IIC_iTSTsi_WriteCMPsi = 271, + IIC_iALUr_WriteALU = 272, + IIC_iALUi_WriteALU = 273, + IIC_iBITr_WriteALU = 274, + IIC_iPop = 275, + IIC_iPop_Br_WriteBrL = 276, + IIC_iTSTr_WriteALU = 277, + ANDri_BICri_EORri_ORRri = 278, + ANDrr_BICrr_EORrr_ORRrr = 279, + ANDrsi_BICrsi_EORrsi_ORRrsi = 280, + ANDrsr_BICrsr_EORrsr_ORRrsr = 281, + MOVCCsi_MOVCCsr = 282, + MOVsi_MOVsr = 283, + MOVsra_flag_MOVsrl_flag = 284, + MVNsr = 285, + MVNr = 286, + MOVCCi32imm = 287, + MOVi32imm = 288, + MOV_ga_pcrel = 289, + MOV_ga_pcrel_ldr = 290, + SEL = 291, + BFC_BFI_SBFX_UBFX = 292, + MLA_MLAv5_MLS_SMMLA_SMMLAR_SMMLS_SMMLSR = 293, + MUL_MULv5_SMMUL_SMMULR = 294, + SMLAL_SMLALBB_SMLALBT_SMLALTB_SMLALTT_SMLALv5_UMAAL_UMLAL_UMLALv5 = 295, + SMULL_SMULLv5_UMULL_UMULLv5 = 296, + SMLAD_SMLADX_SMLALD_SMLALDX_SMLSD_SMLSDX_SMLSLD_SMLSLDX_SMUAD_SMUADX_SMUSD_SMUSDX = 297, + SMULBB_SMULBT_SMULTB_SMULTT_SMULWB_SMULWT = 298, + SMLABB_SMLABT_SMLATB_SMLATT_SMLAWB_SMLAWT = 299, + LDRi12_PICLDR = 300, + LDRrs = 301, + LDRBi12_LDRH_LDRSB_LDRSH_PICLDRB_PICLDRH_PICLDRSB_PICLDRSH = 302, + LDRHTi_LDRHTr_LDRH_POST_LDRH_PRE_LDRSBTi_LDRSBTr_LDRSB_POST_LDRSB_PRE_LDRSHTi_LDRSHTr_LDRSH_POST_LDRSH_PRE = 303, + SXTB_SXTB16_SXTH_UXTB_UXTB16_UXTH = 304, + t2SXTB_t2SXTB16_t2SXTH_t2UXTB_t2UXTB16_t2UXTH = 305, + t2MOVCCi32imm = 306, + t2MOVi32imm = 307, + t2MOV_ga_pcrel = 308, + t2MOVi16_ga_pcrel = 309, + t2SEL = 310, + t2BFC_t2SBFX_t2UBFX = 311, + t2BFI = 312, + QADD_QADD16_QADD8_QASX_QDADD_QDSUB_QSAX_QSUB_QSUB16_QSUB8_UQADD16_UQADD8_UQASX_UQSAX_UQSUB16_UQSUB8 = 313, + SSAT_SSAT16_USAT_USAT16_t2QADD_t2QADD16_t2QADD8_t2QASX_t2QDADD_t2QDSUB_t2QSAX_t2QSUB_t2QSUB16_t2QSUB8_t2SSAT_t2SSAT16_t2UQADD16_t2UQADD8_t2UQASX_t2UQSAX_t2UQSUB16_t2UQSUB8_t2USAT_t2USAT16 = 314, + SADD16_SADD8_SASX_SSAX_SSUB16_SSUB8_UADD16_UADD8_UASX_USAX_USUB16_USUB8 = 315, + t2SADD16_t2SADD8_t2SASX_t2SSAX_t2SSUB16_t2SSUB8_t2UADD16_t2UADD8_t2UASX_t2USAX_t2USUB16_t2USUB8 = 316, + SHADD16_SHADD8_SHASX_SHSAX_SHSUB16_SHSUB8_UHADD16_UHADD8_UHASX_UHSAX_UHSUB16_UHSUB8 = 317, + SXTAB_SXTAB16_SXTAH_UXTAB_UXTAB16_UXTAH = 318, + t2SHADD16_t2SHADD8_t2SHASX_t2SHSAX_t2SHSUB16_t2SHSUB8_t2UHADD16_t2UHADD8_t2UHASX_t2UHSAX_t2UHSUB16_t2UHSUB8 = 319, + t2SXTAB_t2SXTAB16_t2SXTAH_t2UXTAB_t2UXTAB16_t2UXTAH = 320, + USAD8 = 321, + USADA8 = 322, + SMUSD_SMUSDX = 323, + t2MUL_t2SMMUL_t2SMMULR = 324, + t2SMULBB_t2SMULBT_t2SMULTB_t2SMULTT_t2SMULWB_t2SMULWT = 325, + t2SMUSD_t2SMUSDX = 326, + t2MLA_t2MLS_t2SMMLA_t2SMMLAR_t2SMMLS_t2SMMLSR = 327, + SMUAD_SMUADX = 328, + t2SMUAD_t2SMUADX = 329, + SMLSD_SMLSDX = 330, + t2SMLABB_t2SMLABT_t2SMLATB_t2SMLATT_t2SMLAWB_t2SMLAWT = 331, + t2SMLSD_t2SMLSDX = 332, + SMLAD_SMLADX = 333, + t2SMLAD_t2SMLADX = 334, + SMULL_UMULL = 335, + t2SMULL_t2UMULL = 336, + t2SMLAL_t2SMLALBB_t2SMLALBT_t2SMLALD_t2SMLALDX_t2SMLALTB_t2SMLALTT_t2SMLSLD_t2SMLSLDX_t2UMAAL_t2UMLAL = 337, + SDIV_UDIV_t2SDIV_t2UDIV = 338, + LDRBi12 = 339, + LDRBrs_t2LDRBs_t2LDRHs = 340, + LDREX_LDREXB_LDREXD_LDREXH_tLDRpci_pic = 341, + LDRi12 = 342, + t2LDRBi12_t2LDRBi8_t2LDRBpci_t2LDRHi12_t2LDRHi8_t2LDRHpci_tLDRBi_tLDRHi = 343, + t2LDRi12_t2LDRi8_t2LDRpci_tLDRi_tLDRpci_tLDRspi = 344, + t2LDRpci_pic = 345, + t2LDRs = 346, + tLDRBr_tLDRHr = 347, + tLDRr = 348, + LDRH_PICLDRB_PICLDRH = 349, + LDRcp = 350, + t2LDRSBi12_t2LDRSBi8_t2LDRSBpci_t2LDRSHi12_t2LDRSHi8_t2LDRSHpci = 351, + t2LDRSBpcrel_t2LDRSHpcrel = 352, + t2LDRSBs_t2LDRSHs = 353, + tLDRSB_tLDRSH = 354, + LDRBT_POST_IMM_LDRBT_POST_REG_LDRB_POST_REG_LDRB_PRE_REG = 355, + LDRB_POST_IMM_LDRB_PRE_IMM_t2LDRB_POST_t2LDRB_PRE_t2LDRH_POST_t2LDRH_PRE = 356, + LDRHTi_LDRHTr_LDRH_POST_LDRH_PRE = 357, + LDRT_POST_IMM_LDRT_POST_REG_LDR_POST_REG_LDR_PRE_REG = 358, + LDR_POST_IMM_LDR_PRE_IMM_t2LDR_POST_t2LDR_PRE = 359, + t2LDRBT_t2LDRHT = 360, + t2LDRT = 361, + t2LDRSBT_t2LDRSHT = 362, + t2LDRSB_POST_t2LDRSB_PRE_t2LDRSH_POST_t2LDRSH_PRE = 363, + LDRD = 364, + t2LDRDi8 = 365, + LDRD_POST_LDRD_PRE_t2LDRD_POST_t2LDRD_PRE = 366, + LDMDA_LDMDB_LDMIA_LDMIB_sysLDMDA_sysLDMDB_sysLDMIA_sysLDMIB_t2LDMDB_t2LDMIA_tLDMIA = 367, + LDMDA_UPD_LDMDB_UPD_LDMIA_UPD_LDMIB_UPD_sysLDMDA_UPD_sysLDMDB_UPD_sysLDMIA_UPD_sysLDMIB_UPD_t2LDMDB_UPD_t2LDMIA_UPD_tLDMIA_UPD = 368, + LDMIA_RET_t2LDMIA_RET = 369, + tPOP = 370, + tPOP_RET = 371, + PICSTR_STRi12_tSTRr = 372, + PICSTRB_PICSTRH_STRBi12_STRH_tSTRBr_tSTRHr = 373, + STRBrs_t2STRBs_t2STRHs = 374, + STREX_STREXB_STREXD_STREXH = 375, + STRrs_t2STRs = 376, + t2STRBi12_t2STRBi8_t2STRHi12_t2STRHi8_tSTRBi_tSTRHi = 377, + t2STRi12_t2STRi8_tSTRi_tSTRspi = 378, + STRBT_POST_STRT_POST = 379, + STRBT_POST_IMM_STRBT_POST_REG_STRB_POST_REG_STRB_PRE_REG_STRHTi_STRHTr_STRH_POST_STRH_PRE = 380, + STRB_POST_IMM_STRB_PRE_IMM_t2STRB_POST_t2STRB_PRE_t2STRH_POST = 381, + STRBi_preidx_STRBr_preidx_STRH_preidx_STRT_POST_IMM_STRT_POST_REG_STR_POST_REG_STR_PRE_REG_STRi_preidx_STRr_preidx_t2STRB_preidx_t2STRH_preidx_t2STR_preidx = 382, + STR_POST_IMM_STR_PRE_IMM_t2STRH_PRE_t2STR_POST_t2STR_PRE = 383, + t2STRBT_t2STRHT = 384, + t2STRT = 385, + STRD_t2STRDi8 = 386, + STRD_POST_STRD_PRE_t2STRD_POST_t2STRD_PRE = 387, + STMDA_STMDB_STMIA_STMIB_sysSTMDA_sysSTMDB_sysSTMIA_sysSTMIB_t2STMDB_t2STMIA = 388, + STMDA_UPD_STMDB_UPD_STMIA_UPD_STMIB_UPD_sysSTMDA_UPD_sysSTMDB_UPD_sysSTMIA_UPD_sysSTMIB_UPD_t2STMDB_UPD_t2STMIA_UPD_tSTMIA_UPD = 389, + tPUSH = 390, + LDRLIT_ga_abs_tLDRLIT_ga_abs = 391, + LDRLIT_ga_pcrel_tLDRLIT_ga_pcrel = 392, + LDRLIT_ga_pcrel_ldr = 393, + ITasm = 394, + t2IT = 395, + VADDLsv2i64_VADDLsv4i32_VADDLsv8i16_VADDLuv2i64_VADDLuv4i32_VADDLuv8i16_VNEGs16d_VNEGs32d_VNEGs8d_VPADDLsv16i8_VPADDLsv2i32_VPADDLsv4i16_VPADDLsv4i32_VPADDLsv8i16_VPADDLsv8i8_VPADDLuv16i8_VPADDLuv2i32_VPADDLuv4i16_VPADDLuv4i32_VPADDLuv8i16_VPADDLuv8i8_VPADDi16_VPADDi32_VPADDi8_VSHLLi16_VSHLLi32_VSHLLi8_VSHLLsv2i64_VSHLLsv4i32_VSHLLsv8i16_VSHLLuv2i64_VSHLLuv4i32_VSHLLuv8i16_VSHLiv16i8_VSHLiv1i64_VSHLiv2i32_VSHLiv2i64_VSHLiv4i16_VSHLiv4i32_VSHLiv8i16_VSHLiv8i8_VSHLsv1i64_VSHLsv2i32_VSHLsv4i16_VSHLsv8i8_VSHLuv1i64_VSHLuv2i32_VSHLuv4i16_VSHLuv8i8_VSHRsv16i8_VSHRsv1i64_VSHRsv2i32_VSHRsv2i64_VSHRsv4i16_VSHRsv4i32_VSHRsv8i16_VSHRsv8i8_VSHRuv16i8_VSHRuv1i64_VSHRuv2i32_VSHRuv2i64_VSHRuv4i16_VSHRuv4i32_VSHRuv8i16_VSHRuv8i8_VSLIv1i64_VSLIv2i32_VSLIv4i16_VSLIv8i8_VSRIv1i64_VSRIv2i32_VSRIv4i16_VSRIv8i8_VSUBLsv2i64_VSUBLsv4i32_VSUBLsv8i16_VSUBLuv2i64_VSUBLuv4i32_VSUBLuv8i16 = 396, + VADDWsv2i64_VADDWsv4i32_VADDWsv8i16_VADDWuv2i64_VADDWuv4i32_VADDWuv8i16_VSUBWsv2i64_VSUBWsv4i32_VSUBWsv8i16_VSUBWuv2i64_VSUBWuv4i32_VSUBWuv8i16_VSUBv1i64_VSUBv2i32_VSUBv4i16_VSUBv8i8 = 397, + VADDv16i8_VADDv2i64_VADDv4i32_VADDv8i16_VANDq_VBICq_VBIFq_VBITq_VEORq_VORNq_VORRq = 398, + VADDv1i64_VADDv2i32_VADDv4i16_VADDv8i8_VANDd_VBICd_VBIFd_VBITd_VEORd_VORNd_VORRd = 399, + VBICiv2i32_VBICiv4i16_VBICiv4i32_VBICiv8i16_VORRiv2i32_VORRiv4i16_VORRiv4i32_VORRiv8i16 = 400, + VBSLd_VCLSv2i32_VCLSv4i16_VCLSv8i8_VCLZv2i32_VCLZv4i16_VCLZv8i8_VCNTd = 401, + VBSLq_VCLSv16i8_VCLSv4i32_VCLSv8i16_VCLZv16i8_VCLZv4i32_VCLZv8i16_VCNTq = 402, + VHADDsv16i8_VHADDsv4i32_VHADDsv8i16_VHADDuv16i8_VHADDuv4i32_VHADDuv8i16_VRHADDsv16i8_VRHADDsv4i32_VRHADDsv8i16_VRHADDuv16i8_VRHADDuv4i32_VRHADDuv8i16_VTSTv16i8_VTSTv4i32_VTSTv8i16 = 403, + VHADDsv2i32_VHADDsv4i16_VHADDsv8i8_VHADDuv2i32_VHADDuv4i16_VHADDuv8i8_VRHADDsv2i32_VRHADDsv4i16_VRHADDsv8i8_VRHADDuv2i32_VRHADDuv4i16_VRHADDuv8i8_VTSTv2i32_VTSTv4i16_VTSTv8i8 = 404, + VHSUBsv16i8_VHSUBsv4i32_VHSUBsv8i16_VHSUBuv16i8_VHSUBuv4i32_VHSUBuv8i16 = 405, + VHSUBsv2i32_VHSUBsv4i16_VHSUBsv8i8_VHSUBuv2i32_VHSUBuv4i16_VHSUBuv8i8 = 406, + VNEGf32q = 407, + VNEGfd = 408, + VNEGs16q_VNEGs32q_VNEGs8q_VSHLsv16i8_VSHLsv2i64_VSHLsv4i32_VSHLsv8i16_VSHLuv16i8_VSHLuv2i64_VSHLuv4i32_VSHLuv8i16_VSLIv16i8_VSLIv2i64_VSLIv4i32_VSLIv8i16_VSRIv16i8_VSRIv2i64_VSRIv4i32_VSRIv8i16 = 409, + VQSHLsiv16i8_VQSHLsiv1i64_VQSHLsiv2i32_VQSHLsiv2i64_VQSHLsiv4i16_VQSHLsiv4i32_VQSHLsiv8i16_VQSHLsiv8i8_VQSHLsuv16i8_VQSHLsuv1i64_VQSHLsuv2i32_VQSHLsuv2i64_VQSHLsuv4i16_VQSHLsuv4i32_VQSHLsuv8i16_VQSHLsuv8i8_VQSHLsv1i64_VQSHLsv2i32_VQSHLsv4i16_VQSHLsv8i8_VQSHLuiv16i8_VQSHLuiv1i64_VQSHLuiv2i32_VQSHLuiv2i64_VQSHLuiv4i16_VQSHLuiv4i32_VQSHLuiv8i16_VQSHLuiv8i8_VQSHLuv1i64_VQSHLuv2i32_VQSHLuv4i16_VQSHLuv8i8 = 410, + VQSHLsv16i8_VQSHLsv2i64_VQSHLsv4i32_VQSHLsv8i16_VQSHLuv16i8_VQSHLuv2i64_VQSHLuv4i32_VQSHLuv8i16 = 411, + VSUBv16i8_VSUBv2i64_VSUBv4i32_VSUBv8i16 = 412, + VEXTd16_VEXTd32_VEXTd8 = 413, + VEXTq16_VEXTq32_VEXTq64_VEXTq8 = 414, + VREV16d8_VREV32d16_VREV32d8_VREV64d16_VREV64d32_VREV64d8 = 415, + VREV16q8_VREV32q16_VREV32q8_VREV64q16_VREV64q32_VREV64q8 = 416, + VABALsv2i64_VABALsv4i32_VABALsv8i16_VABALuv2i64_VABALuv4i32_VABALuv8i16_VABAsv2i32_VABAsv4i16_VABAsv8i8_VABAuv2i32_VABAuv4i16_VABAuv8i8 = 417, + VABAsv16i8_VABAsv4i32_VABAsv8i16_VABAuv16i8_VABAuv4i32_VABAuv8i16 = 418, + VABSfd = 419, + VABSfq = 420, + VABSv16i8_VABSv4i32_VABSv8i16 = 421, + VABSv2i32_VABSv4i16_VABSv8i8 = 422, + VACGEfd_VACGEhd_VACGTfd_VACGThd_VCEQfd_VCEQhd_VCGEfd_VCGEhd_VCGTfd_VCGThd = 423, + VACGEfq_VACGEhq_VACGTfq_VACGThq_VCEQfq_VCEQhq_VCGEfq_VCGEhq_VCGTfq_VCGThq = 424, + VCEQv16i8_VCEQv4i32_VCEQv8i16_VCGEsv16i8_VCGEsv4i32_VCGEsv8i16_VCGEuv16i8_VCGEuv4i32_VCGEuv8i16_VCGTsv16i8_VCGTsv4i32_VCGTsv8i16_VCGTuv16i8_VCGTuv4i32_VCGTuv8i16_VQSUBsv16i8_VQSUBsv2i64_VQSUBsv4i32_VQSUBsv8i16_VQSUBuv16i8_VQSUBuv2i64_VQSUBuv4i32_VQSUBuv8i16 = 425, + VCEQv2i32_VCEQv4i16_VCEQv8i8_VCGEsv2i32_VCGEsv4i16_VCGEsv8i8_VCGEuv2i32_VCGEuv4i16_VCGEuv8i8_VCGTsv2i32_VCGTsv4i16_VCGTsv8i8_VCGTuv2i32_VCGTuv4i16_VCGTuv8i8_VQSUBsv1i64_VQSUBsv2i32_VQSUBsv4i16_VQSUBsv8i8_VQSUBuv1i64_VQSUBuv2i32_VQSUBuv4i16_VQSUBuv8i8 = 426, + VCEQzv16i8_VCEQzv2f32_VCEQzv2i32_VCEQzv4f16_VCEQzv4f32_VCEQzv4i16_VCEQzv4i32_VCEQzv8f16_VCEQzv8i16_VCEQzv8i8_VCGEzv16i8_VCGEzv2f32_VCGEzv2i32_VCGEzv4f16_VCGEzv4f32_VCGEzv4i16_VCGEzv4i32_VCGEzv8f16_VCGEzv8i16_VCGEzv8i8_VCGTzv16i8_VCGTzv2f32_VCGTzv2i32_VCGTzv4f16_VCGTzv4f32_VCGTzv4i16_VCGTzv4i32_VCGTzv8f16_VCGTzv8i16_VCGTzv8i8_VCLEzv16i8_VCLEzv2f32_VCLEzv2i32_VCLEzv4f16_VCLEzv4f32_VCLEzv4i16_VCLEzv4i32_VCLEzv8f16_VCLEzv8i16_VCLEzv8i8_VCLTzv16i8_VCLTzv2f32_VCLTzv2i32_VCLTzv4f16_VCLTzv4f32_VCLTzv4i16_VCLTzv4i32_VCLTzv8f16_VCLTzv8i16_VCLTzv8i8 = 427, + VPADALsv16i8_VPADALsv4i32_VPADALsv8i16_VPADALuv16i8_VPADALuv4i32_VPADALuv8i16 = 428, + VPADALsv2i32_VPADALsv4i16_VPADALsv8i8_VPADALuv2i32_VPADALuv4i16_VPADALuv8i8_VRSRAsv16i8_VRSRAsv1i64_VRSRAsv2i32_VRSRAsv2i64_VRSRAsv4i16_VRSRAsv4i32_VRSRAsv8i16_VRSRAsv8i8_VRSRAuv16i8_VRSRAuv1i64_VRSRAuv2i32_VRSRAuv2i64_VRSRAuv4i16_VRSRAuv4i32_VRSRAuv8i16_VRSRAuv8i8_VSRAsv16i8_VSRAsv1i64_VSRAsv2i32_VSRAsv2i64_VSRAsv4i16_VSRAsv4i32_VSRAsv8i16_VSRAsv8i8_VSRAuv16i8_VSRAuv1i64_VSRAuv2i32_VSRAuv2i64_VSRAuv4i16_VSRAuv4i32_VSRAuv8i16_VSRAuv8i8 = 429, + VQABSv16i8_VQABSv4i32_VQABSv8i16_VQNEGv16i8_VQNEGv4i32_VQNEGv8i16 = 430, + VQABSv2i32_VQABSv4i16_VQABSv8i8_VQNEGv2i32_VQNEGv4i16_VQNEGv8i8 = 431, + VQADDsv16i8_VQADDsv2i64_VQADDsv4i32_VQADDsv8i16_VQADDuv16i8_VQADDuv2i64_VQADDuv4i32_VQADDuv8i16 = 432, + VQADDsv1i64_VQADDsv2i32_VQADDsv4i16_VQADDsv8i8_VQADDuv1i64_VQADDuv2i32_VQADDuv4i16_VQADDuv8i8 = 433, + VQRSHLsv16i8_VQRSHLsv2i64_VQRSHLsv4i32_VQRSHLsv8i16_VQRSHLuv16i8_VQRSHLuv2i64_VQRSHLuv4i32_VQRSHLuv8i16_VRSHLsv16i8_VRSHLsv2i64_VRSHLsv4i32_VRSHLsv8i16_VRSHLuv16i8_VRSHLuv2i64_VRSHLuv4i32_VRSHLuv8i16 = 434, + VQRSHLsv1i64_VQRSHLsv2i32_VQRSHLsv4i16_VQRSHLsv8i8_VQRSHLuv1i64_VQRSHLuv2i32_VQRSHLuv4i16_VQRSHLuv8i8_VRSHLsv1i64_VRSHLsv2i32_VRSHLsv4i16_VRSHLsv8i8_VRSHLuv1i64_VRSHLuv2i32_VRSHLuv4i16_VRSHLuv8i8_VRSHRsv16i8_VRSHRsv1i64_VRSHRsv2i32_VRSHRsv2i64_VRSHRsv4i16_VRSHRsv4i32_VRSHRsv8i16_VRSHRsv8i8_VRSHRuv16i8_VRSHRuv1i64_VRSHRuv2i32_VRSHRuv2i64_VRSHRuv4i16_VRSHRuv4i32_VRSHRuv8i16_VRSHRuv8i8 = 435, + VRECPEd_VRECPEfd_VRECPEhd_VRSQRTEd_VRSQRTEfd_VRSQRTEhd = 436, + VRECPEfq_VRECPEhq_VRECPEq_VRSQRTEfq_VRSQRTEhq_VRSQRTEq = 437, + VADDHNv2i32_VADDHNv4i16_VADDHNv8i8_VSUBHNv2i32_VSUBHNv4i16_VSUBHNv8i8 = 438, + VSHRNv2i32_VSHRNv4i16_VSHRNv8i8 = 439, + VQRSHRNsv2i32_VQRSHRNsv4i16_VQRSHRNsv8i8_VQRSHRNuv2i32_VQRSHRNuv4i16_VQRSHRNuv8i8_VQRSHRUNv2i32_VQRSHRUNv4i16_VQRSHRUNv8i8_VQSHRNsv2i32_VQSHRNsv4i16_VQSHRNsv8i8_VQSHRNuv2i32_VQSHRNuv4i16_VQSHRNuv8i8_VQSHRUNv2i32_VQSHRUNv4i16_VQSHRUNv8i8_VRSHRNv2i32_VRSHRNv4i16_VRSHRNv8i8 = 440, + VRADDHNv2i32_VRADDHNv4i16_VRADDHNv8i8_VRSUBHNv2i32_VRSUBHNv4i16_VRSUBHNv8i8 = 441, + VTBL1 = 442, + VTBX1 = 443, + VTBL2 = 444, + VTBX2 = 445, + VTBL3_VTBL3Pseudo = 446, + VTBX3_VTBX3Pseudo = 447, + VTBL4_VTBL4Pseudo = 448, + VTBX4_VTBX4Pseudo = 449, + VSWPd_VSWPq = 450, + VTRNd16_VTRNd32_VTRNd8_VUZPd16_VUZPd8_VZIPd16_VZIPd8 = 451, + VTRNq16_VTRNq32_VTRNq8 = 452, + VUZPq16_VUZPq32_VUZPq8_VZIPq16_VZIPq32_VZIPq8 = 453, + VABSD_VNEGD = 454, + VABSS_VNEGS = 455, + VCMPD_VCMPED_VCMPEZD_VCMPZD = 456, + VCMPES_VCMPEZS_VCMPS_VCMPZS = 457, + VABDLsv2i64_VABDLsv4i32_VABDLsv8i16_VABDLuv2i64_VABDLuv4i32_VABDLuv8i16_VABDsv16i8_VABDsv4i32_VABDsv8i16_VABDuv16i8_VABDuv4i32_VABDuv8i16_VMAXsv16i8_VMAXsv4i32_VMAXsv8i16_VMAXuv16i8_VMAXuv4i32_VMAXuv8i16_VMINsv16i8_VMINsv4i32_VMINsv8i16_VMINuv16i8_VMINuv4i32_VMINuv8i16 = 458, + VABDfd_VABDhd_VADDfd_VMAXfd_VMAXhd_VMINfd_VMINhd_VSUBfd = 459, + VABDfq_VABDhq_VADDfq_VMAXfq_VMAXhq_VMINfq_VMINhq_VSUBfq = 460, + VABDsv2i32_VABDsv4i16_VABDsv8i8_VABDuv2i32_VABDuv4i16_VABDuv8i8_VMAXsv2i32_VMAXsv4i16_VMAXsv8i8_VMAXuv2i32_VMAXuv4i16_VMAXuv8i8_VMINsv2i32_VMINsv4i16_VMINsv8i8_VMINuv2i32_VMINuv4i16_VMINuv8i8_VPMAXs16_VPMAXs32_VPMAXs8_VPMAXu16_VPMAXu32_VPMAXu8_VPMINs16_VPMINs32_VPMINs8_VPMINu16_VPMINu32_VPMINu8 = 461, + VADDS_VSUBS = 462, + VMAXNMD_VMAXNMH_VMAXNMNDf_VMAXNMNDh_VMAXNMNQf_VMAXNMNQh_VMAXNMS_VMINNMD_VMINNMH_VMINNMNDf_VMINNMNDh_VMINNMNQf_VMINNMNQh_VMINNMS = 463, + VPADDf_VPMAXf_VPMAXh_VPMINf_VPMINh = 464, + VADDD_VSUBD = 465, + VRECPSfd_VRECPShd_VRSQRTSfd_VRSQRTShd = 466, + VRECPSfq_VRECPShq_VRSQRTSfq_VRSQRTShq = 467, + VMULLp64 = 468, + VMULLp8_VMULLslsv2i32_VMULLslsv4i16_VMULLsluv2i32_VMULLsluv4i16_VMULLsv4i32_VMULLsv8i16_VMULLuv4i32_VMULLuv8i16_VMULpd_VMULslhd_VMULslv4i16_VMULv4i16_VMULv8i8_VQDMULHslv4i16_VQDMULHv4i16_VQDMULLslv2i32_VQDMULLslv4i16_VQDMULLv4i32_VQRDMULHslv4i16_VQRDMULHv4i16 = 469, + VMULLsv2i64_VMULLuv2i64_VMULslv2i32_VMULv2i32_VQDMULHslv2i32_VQDMULHv2i32_VQDMULLv2i64_VQRDMULHslv2i32_VQRDMULHv2i32 = 470, + VMULS_VNMULS = 471, + VMULfd = 472, + VMULfq = 473, + VMULpq_VMULslhq_VMULslv8i16_VMULv16i8_VMULv8i16_VQDMULHslv8i16_VQDMULHv8i16_VQRDMULHslv8i16_VQRDMULHv8i16 = 474, + VMULslfd = 475, + VMULslfq = 476, + VMULslv4i32_VMULv4i32_VQDMULHslv4i32_VQDMULHv4i32_VQRDMULHslv4i32_VQRDMULHv4i32 = 477, + VMULD_VNMULD = 478, + VFMAD_VFMSD_VFNMAD_VFNMSD = 479, + VFMAS_VFMSS_VFNMAS_VFNMSS = 480, + VFNMAH_VFNMSH = 481, + VMLAD_VMLSD_VNMLAD_VNMLSD = 482, + VMLAH_VMLSH_VNMLAH_VNMLSH = 483, + VMLALslsv2i32_VMLALsluv2i32_VMLALsv2i64_VMLALuv2i64_VMLAslv2i32_VMLAv2i32_VMLSLslsv2i32_VMLSLsluv2i32_VMLSLsv2i64_VMLSLuv2i64_VMLSslv2i32_VMLSv2i32_VQDMLALslv2i32_VQDMLALv2i64_VQDMLSLslv2i32_VQDMLSLv2i64 = 484, + VMLALslsv4i16_VMLALsluv4i16_VMLALsv4i32_VMLALsv8i16_VMLALuv4i32_VMLALuv8i16_VMLAslv4i16_VMLAv4i16_VMLAv8i8_VMLSLslsv4i16_VMLSLsluv4i16_VMLSLsv4i32_VMLSLsv8i16_VMLSLuv4i32_VMLSLuv8i16_VMLSslv4i16_VMLSv4i16_VMLSv8i8_VQDMLALslv4i16_VQDMLALv4i32_VQDMLSLslv4i16_VQDMLSLv4i32 = 485, + VMLAS_VMLSS_VNMLAS_VNMLSS = 486, + VMLAfd_VMLAhd_VMLAslfd_VMLAslhd_VMLSfd_VMLShd_VMLSslfd_VMLSslhd = 487, + VMLAfq_VMLAhq_VMLAslfq_VMLAslhq_VMLSfq_VMLShq_VMLSslfq_VMLSslhq = 488, + VMLAslv4i32_VMLAv4i32_VMLSslv4i32_VMLSv4i32 = 489, + VMLAslv8i16_VMLAv16i8_VMLAv8i16_VMLSslv8i16_VMLSv16i8_VMLSv8i16 = 490, + VFMAfd_VFMSfd = 491, + VFMAfq_VFMSfq = 492, + VCVTANSDf_VCVTANSDh_VCVTANSQf_VCVTANSQh_VCVTANUDf_VCVTANUDh_VCVTANUQf_VCVTANUQh_VCVTASD_VCVTASH_VCVTASS_VCVTAUD_VCVTAUH_VCVTAUS_VCVTBDH_VCVTBHD_VCVTMNSDf_VCVTMNSDh_VCVTMNSQf_VCVTMNSQh_VCVTMNUDf_VCVTMNUDh_VCVTMNUQf_VCVTMNUQh_VCVTMSD_VCVTMSH_VCVTMSS_VCVTMUD_VCVTMUH_VCVTMUS_VCVTNNSDf_VCVTNNSDh_VCVTNNSQf_VCVTNNSQh_VCVTNNUDf_VCVTNNUDh_VCVTNNUQf_VCVTNNUQh_VCVTNSD_VCVTNSH_VCVTNSS_VCVTNUD_VCVTNUH_VCVTNUS_VCVTPNSDf_VCVTPNSDh_VCVTPNSQf_VCVTPNSQh_VCVTPNUDf_VCVTPNUDh_VCVTPNUQf_VCVTPNUQh_VCVTPSD_VCVTPSH_VCVTPSS_VCVTPUD_VCVTPUH_VCVTPUS_VCVTTDH_VCVTTHD = 493, + VCVTBHS_VCVTTHS = 494, + VCVTBSH_VCVTTSH = 495, + VCVTDS = 496, + VCVTSD = 497, + VCVTf2h_VCVTf2sq_VCVTf2uq_VCVTf2xsq_VCVTf2xuq_VCVTh2f_VCVTh2sq_VCVTh2uq_VCVTh2xsq_VCVTh2xuq_VCVTs2fq_VCVTs2hq_VCVTu2fq_VCVTu2hq_VCVTxs2fq_VCVTxs2hq_VCVTxu2fq_VCVTxu2hq = 498, + VCVTf2sd_VCVTf2ud_VCVTf2xsd_VCVTf2xud_VCVTh2sd_VCVTh2ud_VCVTh2xsd_VCVTh2xud_VCVTs2fd_VCVTs2hd_VCVTu2fd_VCVTu2hd_VCVTxs2fd_VCVTxs2hd_VCVTxu2fd_VCVTxu2hd = 499, + VSITOD_VUITOD = 500, + VSITOH_VUITOH = 501, + VSITOS_VUITOS = 502, + VTOSHD_VTOSLD_VTOUHD_VTOULD = 503, + VTOSHH_VTOSLH_VTOUHH_VTOULH = 504, + VTOSHS_VTOSLS_VTOUHS_VTOULS = 505, + VTOSIRD_VTOSIZD_VTOUIRD_VTOUIZD = 506, + VTOSIRH_VTOSIZH_VTOUIRH_VTOUIZH = 507, + VTOSIRS_VTOSIZS_VTOUIRS_VTOUIZS = 508, + FCONSTD_VMOVD_VMOVDcc = 509, + FCONSTS_VMOVS_VMOVScc = 510, + VMOVv16i8_VMOVv1i64_VMOVv2f32_VMOVv2i32_VMOVv2i64_VMOVv4f32_VMOVv4i16_VMOVv4i32_VMOVv8i16_VMOVv8i8_VMVNv2i32_VMVNv4i16_VMVNv4i32_VMVNv8i16 = 511, + VMVNd_VMVNq = 512, + VMOVLsv2i64_VMOVLsv4i32_VMOVLsv8i16_VMOVLuv2i64_VMOVLuv4i32_VMOVLuv8i16 = 513, + VMOVNv2i32_VMOVNv4i16_VMOVNv8i8 = 514, + VQMOVNsuv2i32_VQMOVNsuv4i16_VQMOVNsuv8i8_VQMOVNsv2i32_VQMOVNsv4i16_VQMOVNsv8i8_VQMOVNuv2i32_VQMOVNuv4i16_VQMOVNuv8i8 = 515, + VDUPLN16d_VDUPLN32d_VDUPLN8d = 516, + VDUPLN16q_VDUPLN32q_VDUPLN8q = 517, + VDUP16d_VDUP16q_VDUP32d_VDUP32q_VDUP8d_VDUP8q = 518, + VMOVRS = 519, + VMOVSR = 520, + VSETLNi16_VSETLNi32_VSETLNi8 = 521, + VMOVRRD_VMOVRRS = 522, + VMOVDRR = 523, + VMOVSRR = 524, + VGETLNi32_VGETLNu16_VGETLNu8 = 525, + VGETLNs16_VGETLNs8 = 526, + VMRS_VMRS_FPEXC_VMRS_FPINST_VMRS_FPINST2_VMRS_FPSID_VMRS_MVFR0_VMRS_MVFR1_VMRS_MVFR2 = 527, + VMSR_VMSR_FPEXC_VMSR_FPINST_VMSR_FPINST2_VMSR_FPSID = 528, + FMSTAT = 529, + VLDRD = 530, + VLDRS = 531, + VSTRD = 532, + VSTRS = 533, + VLDMQIA = 534, + VSTMQIA = 535, + VLDMDIA_VLDMSIA = 536, + VLDMDDB_UPD_VLDMDIA_UPD_VLDMSDB_UPD_VLDMSIA_UPD = 537, + VSTMDIA_VSTMSIA = 538, + VSTMDDB_UPD_VSTMDIA_UPD_VSTMSDB_UPD_VSTMSIA_UPD = 539, + VLD1d16_VLD1d32_VLD1d64_VLD1d8 = 540, + VLD1q16_VLD1q32_VLD1q64_VLD1q8 = 541, + VLD1d16wb_fixed_VLD1d16wb_register_VLD1d32wb_fixed_VLD1d32wb_register_VLD1d64wb_fixed_VLD1d64wb_register_VLD1d8wb_fixed_VLD1d8wb_register = 542, + VLD1q16wb_fixed_VLD1q16wb_register_VLD1q32wb_fixed_VLD1q32wb_register_VLD1q64wb_fixed_VLD1q64wb_register_VLD1q8wb_fixed_VLD1q8wb_register = 543, + VLD1d16T_VLD1d32T_VLD1d64T_VLD1d64TPseudo_VLD1d64TPseudoWB_fixed_VLD1d64TPseudoWB_register_VLD1d8T = 544, + VLD1d16Twb_fixed_VLD1d16Twb_register_VLD1d32Twb_fixed_VLD1d32Twb_register_VLD1d64Twb_fixed_VLD1d64Twb_register_VLD1d8Twb_fixed_VLD1d8Twb_register = 545, + VLD1d16Q_VLD1d32Q_VLD1d64Q_VLD1d64QPseudo_VLD1d64QPseudoWB_fixed_VLD1d64QPseudoWB_register_VLD1d8Q = 546, + VLD1d16Qwb_fixed_VLD1d16Qwb_register_VLD1d32Qwb_fixed_VLD1d32Qwb_register_VLD1d64Qwb_fixed_VLD1d64Qwb_register_VLD1d8Qwb_fixed_VLD1d8Qwb_register = 547, + VLD2b16_VLD2b32_VLD2b8_VLD2d16_VLD2d32_VLD2d8 = 548, + VLD2q16_VLD2q16Pseudo_VLD2q32_VLD2q32Pseudo_VLD2q8_VLD2q8Pseudo = 549, + VLD2b16wb_fixed_VLD2b16wb_register_VLD2b32wb_fixed_VLD2b32wb_register_VLD2b8wb_fixed_VLD2b8wb_register_VLD2d16wb_fixed_VLD2d16wb_register_VLD2d32wb_fixed_VLD2d32wb_register_VLD2d8wb_fixed_VLD2d8wb_register = 550, + VLD2q16PseudoWB_fixed_VLD2q16PseudoWB_register_VLD2q16wb_fixed_VLD2q16wb_register_VLD2q32PseudoWB_fixed_VLD2q32PseudoWB_register_VLD2q32wb_fixed_VLD2q32wb_register_VLD2q8PseudoWB_fixed_VLD2q8PseudoWB_register_VLD2q8wb_fixed_VLD2q8wb_register = 551, + VLD3d16_VLD3d32_VLD3d8_VLD3q16_VLD3q32_VLD3q8 = 552, + VLD3d16Pseudo_VLD3d32Pseudo_VLD3d8Pseudo_VLD3q16oddPseudo_VLD3q32oddPseudo_VLD3q8oddPseudo = 553, + VLD3d16_UPD_VLD3d32_UPD_VLD3d8_UPD_VLD3q16_UPD_VLD3q32_UPD_VLD3q8_UPD = 554, + VLD3d16Pseudo_UPD_VLD3d32Pseudo_UPD_VLD3d8Pseudo_UPD_VLD3q16Pseudo_UPD_VLD3q16oddPseudo_UPD_VLD3q32Pseudo_UPD_VLD3q32oddPseudo_UPD_VLD3q8Pseudo_UPD_VLD3q8oddPseudo_UPD = 555, + VLD4d16_VLD4d32_VLD4d8_VLD4q16_VLD4q32_VLD4q8 = 556, + VLD4d16Pseudo_VLD4d32Pseudo_VLD4d8Pseudo_VLD4q16oddPseudo_VLD4q32oddPseudo_VLD4q8oddPseudo = 557, + VLD4d16_UPD_VLD4d32_UPD_VLD4d8_UPD_VLD4q16_UPD_VLD4q32_UPD_VLD4q8_UPD = 558, + VLD4d16Pseudo_UPD_VLD4d32Pseudo_UPD_VLD4d8Pseudo_UPD_VLD4q16Pseudo_UPD_VLD4q16oddPseudo_UPD_VLD4q32Pseudo_UPD_VLD4q32oddPseudo_UPD_VLD4q8Pseudo_UPD_VLD4q8oddPseudo_UPD = 559, + VLD1DUPd16_VLD1DUPd32_VLD1DUPd8_VLD1DUPq16_VLD1DUPq32_VLD1DUPq8 = 560, + VLD1LNd16_VLD1LNd32_VLD1LNd8_VLD1LNq16Pseudo_VLD1LNq32Pseudo_VLD1LNq8Pseudo = 561, + VLD1DUPd16wb_fixed_VLD1DUPd16wb_register_VLD1DUPd32wb_fixed_VLD1DUPd32wb_register_VLD1DUPd8wb_fixed_VLD1DUPd8wb_register_VLD1DUPq16wb_fixed_VLD1DUPq16wb_register_VLD1DUPq32wb_fixed_VLD1DUPq32wb_register_VLD1DUPq8wb_fixed_VLD1DUPq8wb_register = 562, + VLD1LNd16_UPD_VLD1LNd32_UPD_VLD1LNd8_UPD_VLD1LNq16Pseudo_UPD_VLD1LNq32Pseudo_UPD_VLD1LNq8Pseudo_UPD = 563, + VLD2DUPd16_VLD2DUPd16x2_VLD2DUPd32_VLD2DUPd32x2_VLD2DUPd8_VLD2DUPd8x2 = 564, + VLD2LNd16_VLD2LNd16Pseudo_VLD2LNd32_VLD2LNd32Pseudo_VLD2LNd8_VLD2LNd8Pseudo_VLD2LNq16_VLD2LNq16Pseudo_VLD2LNq32_VLD2LNq32Pseudo = 565, + VLD2LNd16_UPD_VLD2LNd32_UPD_VLD2LNd8_UPD_VLD2LNq16_UPD_VLD2LNq32_UPD = 566, + VLD2DUPd16wb_fixed_VLD2DUPd16wb_register_VLD2DUPd16x2wb_fixed_VLD2DUPd16x2wb_register_VLD2DUPd32wb_fixed_VLD2DUPd32wb_register_VLD2DUPd32x2wb_fixed_VLD2DUPd32x2wb_register_VLD2DUPd8wb_fixed_VLD2DUPd8wb_register_VLD2DUPd8x2wb_fixed_VLD2DUPd8x2wb_register = 567, + VLD2LNd16Pseudo_UPD_VLD2LNd32Pseudo_UPD_VLD2LNd8Pseudo_UPD_VLD2LNq16Pseudo_UPD_VLD2LNq32Pseudo_UPD = 568, + VLD3DUPd16_VLD3DUPd16Pseudo_VLD3DUPd32_VLD3DUPd32Pseudo_VLD3DUPd8_VLD3DUPd8Pseudo_VLD3DUPq16_VLD3DUPq32_VLD3DUPq8 = 569, + VLD3LNd16_VLD3LNd16Pseudo_VLD3LNd32_VLD3LNd32Pseudo_VLD3LNd8_VLD3LNd8Pseudo_VLD3LNq16_VLD3LNq16Pseudo_VLD3LNq32_VLD3LNq32Pseudo = 570, + VLD3DUPd16_UPD_VLD3DUPd32_UPD_VLD3DUPd8_UPD_VLD3DUPq16_UPD_VLD3DUPq32_UPD_VLD3DUPq8_UPD = 571, + VLD3LNd16_UPD_VLD3LNd32_UPD_VLD3LNd8_UPD_VLD3LNq16_UPD_VLD3LNq32_UPD = 572, + VLD3DUPd16Pseudo_UPD_VLD3DUPd32Pseudo_UPD_VLD3DUPd8Pseudo_UPD = 573, + VLD3LNd16Pseudo_UPD_VLD3LNd32Pseudo_UPD_VLD3LNd8Pseudo_UPD_VLD3LNq16Pseudo_UPD_VLD3LNq32Pseudo_UPD = 574, + VLD4DUPd16_VLD4DUPd16Pseudo_VLD4DUPd32_VLD4DUPd32Pseudo_VLD4DUPd8_VLD4DUPd8Pseudo_VLD4DUPq16_VLD4DUPq32_VLD4DUPq8 = 575, + VLD4LNd16_VLD4LNd16Pseudo_VLD4LNd32_VLD4LNd32Pseudo_VLD4LNd8_VLD4LNd8Pseudo_VLD4LNq16_VLD4LNq16Pseudo_VLD4LNq32_VLD4LNq32Pseudo = 576, + VLD4DUPd16_UPD_VLD4DUPd32_UPD_VLD4DUPd8_UPD_VLD4DUPq16_UPD_VLD4DUPq32_UPD_VLD4DUPq8_UPD = 577, + VLD4LNd16_UPD_VLD4LNd32_UPD_VLD4LNd8_UPD_VLD4LNq16_UPD_VLD4LNq32_UPD = 578, + VLD4DUPd16Pseudo_UPD_VLD4DUPd32Pseudo_UPD_VLD4DUPd8Pseudo_UPD = 579, + VLD4LNd16Pseudo_UPD_VLD4LNd32Pseudo_UPD_VLD4LNd8Pseudo_UPD_VLD4LNq16Pseudo_UPD_VLD4LNq32Pseudo_UPD = 580, + VST1d16_VST1d32_VST1d64_VST1d8 = 581, + VST1q16_VST1q32_VST1q64_VST1q8 = 582, + VST1d16wb_fixed_VST1d16wb_register_VST1d32wb_fixed_VST1d32wb_register_VST1d64wb_fixed_VST1d64wb_register_VST1d8wb_fixed_VST1d8wb_register = 583, + VST1q16wb_fixed_VST1q16wb_register_VST1q32wb_fixed_VST1q32wb_register_VST1q64wb_fixed_VST1q64wb_register_VST1q8wb_fixed_VST1q8wb_register = 584, + VST1d16T_VST1d32T_VST1d64T_VST1d64TPseudo_VST1d8T = 585, + VST1d16Twb_fixed_VST1d16Twb_register_VST1d32Twb_fixed_VST1d32Twb_register_VST1d64Twb_fixed_VST1d64Twb_register_VST1d8Twb_fixed_VST1d8Twb_register = 586, + VST1d64TPseudoWB_fixed_VST1d64TPseudoWB_register = 587, + VST1d16Q_VST1d32Q_VST1d64Q_VST1d64QPseudo_VST1d8Q = 588, + VST1d16Qwb_fixed_VST1d16Qwb_register_VST1d32Qwb_fixed_VST1d32Qwb_register_VST1d64Qwb_fixed_VST1d64Qwb_register_VST1d8Qwb_fixed_VST1d8Qwb_register = 589, + VST1d64QPseudoWB_fixed_VST1d64QPseudoWB_register = 590, + VST2b16_VST2b32_VST2b8_VST2d16_VST2d32_VST2d8 = 591, + VST2b16wb_fixed_VST2b16wb_register_VST2b32wb_fixed_VST2b32wb_register_VST2b8wb_fixed_VST2b8wb_register_VST2d16wb_fixed_VST2d16wb_register_VST2d32wb_fixed_VST2d32wb_register_VST2d8wb_fixed_VST2d8wb_register = 592, + VST2q16_VST2q16Pseudo_VST2q32_VST2q32Pseudo_VST2q8_VST2q8Pseudo = 593, + VST2q16PseudoWB_fixed_VST2q16PseudoWB_register_VST2q32PseudoWB_fixed_VST2q32PseudoWB_register_VST2q8PseudoWB_fixed_VST2q8PseudoWB_register = 594, + VST2q16wb_fixed_VST2q16wb_register_VST2q32wb_fixed_VST2q32wb_register_VST2q8wb_fixed_VST2q8wb_register = 595, + VST3d16_VST3d16Pseudo_VST3d32_VST3d32Pseudo_VST3d8_VST3d8Pseudo_VST3q16_VST3q16oddPseudo_VST3q32_VST3q32oddPseudo_VST3q8_VST3q8oddPseudo = 596, + VST3d16Pseudo_UPD_VST3d16_UPD_VST3d32Pseudo_UPD_VST3d32_UPD_VST3d8Pseudo_UPD_VST3d8_UPD_VST3q16Pseudo_UPD_VST3q16_UPD_VST3q16oddPseudo_UPD_VST3q32Pseudo_UPD_VST3q32_UPD_VST3q32oddPseudo_UPD_VST3q8Pseudo_UPD_VST3q8_UPD_VST3q8oddPseudo_UPD = 597, + VST4d16_VST4d16Pseudo_VST4d32_VST4d32Pseudo_VST4d8_VST4d8Pseudo_VST4q16_VST4q16oddPseudo_VST4q32_VST4q32oddPseudo_VST4q8_VST4q8oddPseudo = 598, + VST4d16Pseudo_UPD_VST4d16_UPD_VST4d32Pseudo_UPD_VST4d32_UPD_VST4d8Pseudo_UPD_VST4d8_UPD_VST4q16Pseudo_UPD_VST4q16_UPD_VST4q16oddPseudo_UPD_VST4q32Pseudo_UPD_VST4q32_UPD_VST4q32oddPseudo_UPD_VST4q8Pseudo_UPD_VST4q8_UPD_VST4q8oddPseudo_UPD = 599, + VST1LNd16_VST1LNd32_VST1LNd8_VST1LNq16Pseudo_VST1LNq32Pseudo_VST1LNq8Pseudo = 600, + VST1LNd16_UPD_VST1LNd32_UPD_VST1LNd8_UPD_VST1LNq16Pseudo_UPD_VST1LNq32Pseudo_UPD_VST1LNq8Pseudo_UPD = 601, + VST2LNd16_VST2LNd16Pseudo_VST2LNd32_VST2LNd32Pseudo_VST2LNd8_VST2LNd8Pseudo_VST2LNq16_VST2LNq16Pseudo_VST2LNq32_VST2LNq32Pseudo = 602, + VST2LNd16Pseudo_UPD_VST2LNd16_UPD_VST2LNd32Pseudo_UPD_VST2LNd32_UPD_VST2LNd8Pseudo_UPD_VST2LNd8_UPD_VST2LNq16Pseudo_UPD_VST2LNq16_UPD_VST2LNq32Pseudo_UPD_VST2LNq32_UPD = 603, + VST3LNd16_VST3LNd16Pseudo_VST3LNd32_VST3LNd32Pseudo_VST3LNd8_VST3LNd8Pseudo_VST3LNq16_VST3LNq16Pseudo_VST3LNq32_VST3LNq32Pseudo = 604, + VST3LNd16Pseudo_UPD_VST3LNd16_UPD_VST3LNd32Pseudo_UPD_VST3LNd32_UPD_VST3LNd8Pseudo_UPD_VST3LNd8_UPD_VST3LNq16Pseudo_UPD_VST3LNq16_UPD_VST3LNq32Pseudo_UPD_VST3LNq32_UPD = 605, + VST4LNd16_VST4LNd16Pseudo_VST4LNd32_VST4LNd32Pseudo_VST4LNd8_VST4LNd8Pseudo_VST4LNq16_VST4LNq16Pseudo_VST4LNq32_VST4LNq32Pseudo = 606, + VST4LNd16Pseudo_UPD_VST4LNd16_UPD_VST4LNd32Pseudo_UPD_VST4LNd32_UPD_VST4LNd8Pseudo_UPD_VST4LNd8_UPD_VST4LNq16Pseudo_UPD_VST4LNq16_UPD_VST4LNq32Pseudo_UPD_VST4LNq32_UPD = 607, + VDIVS = 608, + VSQRTS = 609, + VDIVD = 610, + VSQRTD = 611, + ABS = 612, + SCHED_LIST_END = 613 + }; +} // end Sched namespace +} // end ARM namespace +} // end llvm namespace +#endif // GET_INSTRINFO_ENUM + +/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ +|* *| +|* Target Instruction Descriptors *| +|* *| +|* Automatically generated file, do not edit! *| +|* *| +\*===----------------------------------------------------------------------===*/ + + +#ifdef GET_INSTRINFO_MC_DESC +#undef GET_INSTRINFO_MC_DESC +namespace llvm_ks { + +static const MCPhysReg ImplicitList1[] = { ARM::CPSR, 0 }; +static const MCPhysReg ImplicitList2[] = { ARM::SP, 0 }; +static const MCPhysReg ImplicitList3[] = { ARM::LR, 0 }; +static const MCPhysReg ImplicitList4[] = { ARM::PC, 0 }; +static const MCPhysReg ImplicitList5[] = { ARM::FPSCR_NZCV, 0 }; +static const MCPhysReg ImplicitList6[] = { ARM::R7, ARM::LR, ARM::SP, 0 }; +static const MCPhysReg ImplicitList7[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::CPSR, ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11, ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15, 0 }; +static const MCPhysReg ImplicitList8[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::CPSR, 0 }; +static const MCPhysReg ImplicitList9[] = { ARM::R0, ARM::R12, ARM::LR, ARM::CPSR, 0 }; +static const MCPhysReg ImplicitList10[] = { ARM::FPSCR, 0 }; +static const MCPhysReg ImplicitList11[] = { ARM::R4, 0 }; +static const MCPhysReg ImplicitList12[] = { ARM::R4, ARM::SP, 0 }; +static const MCPhysReg ImplicitList13[] = { ARM::ITSTATE, 0 }; +static const MCPhysReg ImplicitList14[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::CPSR, ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11, ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15, 0 }; +static const MCPhysReg ImplicitList15[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R12, ARM::CPSR, 0 }; + +static const MCOperandInfo OperandInfo2[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; +static const MCOperandInfo OperandInfo3[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; +static const MCOperandInfo OperandInfo4[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; +static const MCOperandInfo OperandInfo5[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, }; +static const MCOperandInfo OperandInfo6[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; +static const MCOperandInfo OperandInfo7[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, }; +static const MCOperandInfo OperandInfo8[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; +static const MCOperandInfo OperandInfo9[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; +static const MCOperandInfo OperandInfo10[] = { { 0, 0|(1<InitMCInstrInfo(ARMInsts, NULL, NULL, 3007); +} + +} // end llvm namespace +#endif // GET_INSTRINFO_MC_DESC + + +#ifdef GET_INSTRINFO_HEADER +#undef GET_INSTRINFO_HEADER +namespace llvm_ks { +struct ARMGenInstrInfo : public TargetInstrInfo { + explicit ARMGenInstrInfo(int CFSetupOpcode = -1, int CFDestroyOpcode = -1, int CatchRetOpcode = -1); + ~ARMGenInstrInfo() override {} +}; +} // end llvm namespace +#endif // GET_INSTRINFO_HEADER + + +#ifdef GET_INSTRINFO_OPERAND_ENUM +#undef GET_INSTRINFO_OPERAND_ENUM +namespace llvm_ks { +namespace ARM { +namespace OpName { +enum { +OPERAND_LAST +}; +} // end namespace OpName +} // end namespace ARM +} // end namespace llvm_ks +#endif //GET_INSTRINFO_OPERAND_ENUM +#ifdef GET_INSTRINFO_NAMED_OPS +#undef GET_INSTRINFO_NAMED_OPS +namespace llvm_ks { +namespace ARM { +LLVM_READONLY +int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx) { + return -1; +} +} // end namespace ARM +} // end namespace llvm_ks +#endif //GET_INSTRINFO_NAMED_OPS + +#ifdef GET_INSTRINFO_OPERAND_TYPES_ENUM +#undef GET_INSTRINFO_OPERAND_TYPES_ENUM +namespace llvm_ks { +namespace ARM { +namespace OpTypes { +enum OperandType { + VecListFourDByteIndexed = 0, + VecListFourDHWordIndexed = 1, + VecListFourDWordIndexed = 2, + VecListFourQHWordIndexed = 3, + VecListFourQWordIndexed = 4, + VecListOneDByteIndexed = 5, + VecListOneDHWordIndexed = 6, + VecListOneDWordIndexed = 7, + VecListThreeDByteIndexed = 8, + VecListThreeDHWordIndexed = 9, + VecListThreeDWordIndexed = 10, + VecListThreeQHWordIndexed = 11, + VecListThreeQWordIndexed = 12, + VecListTwoDByteIndexed = 13, + VecListTwoDHWordIndexed = 14, + VecListTwoDWordIndexed = 15, + VecListTwoQHWordIndexed = 16, + VecListTwoQWordIndexed = 17, + VectorIndex16 = 18, + VectorIndex32 = 19, + VectorIndex8 = 20, + addr_offset_none = 21, + addrmode2 = 22, + addrmode3 = 23, + addrmode3_pre = 24, + addrmode5 = 25, + addrmode5_pre = 26, + addrmode5fp16 = 27, + addrmode6 = 28, + addrmode6align16 = 29, + addrmode6align32 = 30, + addrmode6align64 = 31, + addrmode6align64or128 = 32, + addrmode6align64or128or256 = 33, + addrmode6alignNone = 34, + addrmode6dup = 35, + addrmode6dupalign16 = 36, + addrmode6dupalign32 = 37, + addrmode6dupalign64 = 38, + addrmode6dupalign64or128 = 39, + addrmode6dupalignNone = 40, + addrmode6oneL32 = 41, + addrmode_imm12 = 42, + addrmode_imm12_pre = 43, + addrmode_tbb = 44, + addrmode_tbh = 45, + addrmodepc = 46, + adrlabel = 47, + am2offset_imm = 48, + am2offset_reg = 49, + am3offset = 50, + am6offset = 51, + banked_reg = 52, + bf_inv_mask_imm = 53, + bl_target = 54, + bltarget = 55, + blx_target = 56, + br_target = 57, + brtarget = 58, + c_imm = 59, + cc_out = 60, + cmovpred = 61, + coproc_option_imm = 62, + cpinst_operand = 63, + dpr_reglist = 64, + f32imm = 65, + f64imm = 66, + fbits16 = 67, + fbits32 = 68, + i16imm = 69, + i1imm = 70, + i32imm = 71, + i64imm = 72, + i8imm = 73, + iflags_op = 74, + imm0_1 = 75, + imm0_15 = 76, + imm0_239 = 77, + imm0_255 = 78, + imm0_3 = 79, + imm0_31 = 80, + imm0_32 = 81, + imm0_4095 = 82, + imm0_4095_neg = 83, + imm0_63 = 84, + imm0_65535 = 85, + imm0_65535_expr = 86, + imm0_65535_neg = 87, + imm0_7 = 88, + imm16 = 89, + imm1_15 = 90, + imm1_16 = 91, + imm1_31 = 92, + imm1_32 = 93, + imm1_7 = 94, + imm24b = 95, + imm256_65535_expr = 96, + imm32 = 97, + imm8 = 98, + imm_sr = 99, + imod_op = 100, + instsyncb_opt = 101, + it_mask = 102, + it_pred = 103, + ldst_so_reg = 104, + ldstm_mode = 105, + memb_opt = 106, + mod_imm = 107, + mod_imm_neg = 108, + mod_imm_not = 109, + msr_mask = 110, + nImmSplatI16 = 111, + nImmSplatI32 = 112, + nImmSplatI64 = 113, + nImmSplatI8 = 114, + nImmSplatNotI16 = 115, + nImmSplatNotI32 = 116, + nImmVMOVF32 = 117, + nImmVMOVI16ByteReplicate = 118, + nImmVMOVI32 = 119, + nImmVMOVI32ByteReplicate = 120, + nImmVMOVI32Neg = 121, + nImmVMVNI16ByteReplicate = 122, + nImmVMVNI32ByteReplicate = 123, + nModImm = 124, + neon_vcvt_imm32 = 125, + nohash_imm = 126, + p_imm = 127, + pclabel = 128, + pkh_asr_amt = 129, + pkh_lsl_amt = 130, + postidx_imm8 = 131, + postidx_imm8s4 = 132, + postidx_reg = 133, + pred = 134, + reglist = 135, + rot_imm = 136, + s_cc_out = 137, + setend_op = 138, + shift_imm = 139, + shift_so_reg_imm = 140, + shift_so_reg_reg = 141, + shr_imm16 = 142, + shr_imm32 = 143, + shr_imm64 = 144, + shr_imm8 = 145, + so_reg_imm = 146, + so_reg_reg = 147, + spr_reglist = 148, + t2_shift_imm = 149, + t2_so_imm = 150, + t2_so_imm_neg = 151, + t2_so_imm_not = 152, + t2_so_imm_notSext = 153, + t2_so_reg = 154, + t2addrmode_imm0_1020s4 = 155, + t2addrmode_imm12 = 156, + t2addrmode_imm8 = 157, + t2addrmode_imm8_pre = 158, + t2addrmode_imm8s4 = 159, + t2addrmode_imm8s4_pre = 160, + t2addrmode_negimm8 = 161, + t2addrmode_posimm8 = 162, + t2addrmode_so_reg = 163, + t2adrlabel = 164, + t2am_imm8_offset = 165, + t2am_imm8s4_offset = 166, + t2ldr_pcrel_imm12 = 167, + t2ldrlabel = 168, + t_addrmode_is1 = 169, + t_addrmode_is2 = 170, + t_addrmode_is4 = 171, + t_addrmode_pc = 172, + t_addrmode_rr = 173, + t_addrmode_rrs1 = 174, + t_addrmode_rrs2 = 175, + t_addrmode_rrs4 = 176, + t_addrmode_sp = 177, + t_adrlabel = 178, + t_bcctarget = 179, + t_bltarget = 180, + t_blxtarget = 181, + t_brtarget = 182, + t_cbtarget = 183, + t_imm0_1020s4 = 184, + t_imm0_508s4 = 185, + t_imm0_508s4_neg = 186, + uncondbrtarget = 187, + vfp_f16imm = 188, + vfp_f32imm = 189, + vfp_f64imm = 190, + OPERAND_TYPE_LIST_END +}; +} // end namespace OpTypes +} // end namespace ARM +} // end namespace llvm_ks +#endif // GET_INSTRINFO_OPERAND_TYPES_ENUM diff --git a/llvm/lib/Target/ARM/ARMGenMCCodeEmitter.inc b/llvm/lib/Target/ARM/ARMGenMCCodeEmitter.inc new file mode 100644 index 0000000..c2c9b41 --- /dev/null +++ b/llvm/lib/Target/ARM/ARMGenMCCodeEmitter.inc @@ -0,0 +1,10685 @@ +/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ +|* *| +|* Machine Code Emitter *| +|* *| +|* Automatically generated file, do not edit! *| +|* *| +\*===----------------------------------------------------------------------===*/ + +uint64_t ARMMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI, + SmallVectorImpl &Fixups, + const MCSubtargetInfo &STI) const { + static const uint64_t InstBits[] = { + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(44040192), // ADCri + UINT64_C(10485760), // ADCrr + UINT64_C(10485760), // ADCrsi + UINT64_C(10485776), // ADCrsr + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(41943040), // ADDri + UINT64_C(8388608), // ADDrr + UINT64_C(8388608), // ADDrsi + UINT64_C(8388624), // ADDrsr + UINT64_C(0), + UINT64_C(0), + UINT64_C(34537472), // ADR + UINT64_C(4088398656), // AESD + UINT64_C(4088398592), // AESE + UINT64_C(4088398784), // AESIMC + UINT64_C(4088398720), // AESMC + UINT64_C(33554432), // ANDri + UINT64_C(0), // ANDrr + UINT64_C(0), // ANDrsi + UINT64_C(16), // ANDrsr + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(130023455), // BFC + UINT64_C(130023440), // BFI + UINT64_C(62914560), // BICri + UINT64_C(29360128), // BICrr + UINT64_C(29360128), // BICrsi + UINT64_C(29360144), // BICrsr + UINT64_C(3776970864), // BKPT + UINT64_C(3942645760), // BL + UINT64_C(3778019120), // BLX + UINT64_C(19922736), // BLX_pred + UINT64_C(4194304000), // BLXi + UINT64_C(184549376), // BL_pred + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(3778019088), // BX + UINT64_C(19922720), // BXJ + UINT64_C(0), + UINT64_C(19922718), // BX_RET + UINT64_C(19922704), // BX_pred + UINT64_C(167772160), // Bcc + UINT64_C(234881024), // CDP + UINT64_C(4261412864), // CDP2 + UINT64_C(4118802463), // CLREX + UINT64_C(24055568), // CLZ + UINT64_C(57671680), // CMNri + UINT64_C(24117248), // CMNzrr + UINT64_C(24117248), // CMNzrsi + UINT64_C(24117264), // CMNzrsr + UINT64_C(55574528), // CMPri + UINT64_C(22020096), // CMPrr + UINT64_C(22020096), // CMPrsi + UINT64_C(22020112), // CMPrsr + UINT64_C(0), + UINT64_C(0), + UINT64_C(4043440128), // CPS1p + UINT64_C(4043309056), // CPS2p + UINT64_C(4043440128), // CPS3p + UINT64_C(3774873664), // CRC32B + UINT64_C(3774874176), // CRC32CB + UINT64_C(3776971328), // CRC32CH + UINT64_C(3779068480), // CRC32CW + UINT64_C(3776970816), // CRC32H + UINT64_C(3779067968), // CRC32W + UINT64_C(52490480), // DBG + UINT64_C(4118802512), // DMB + UINT64_C(4118802496), // DSB + UINT64_C(35651584), // EORri + UINT64_C(2097152), // EORrr + UINT64_C(2097152), // EORrsi + UINT64_C(2097168), // EORrsr + UINT64_C(23068782), // ERET + UINT64_C(246418176), // FCONSTD + UINT64_C(246417664), // FCONSTH + UINT64_C(246417920), // FCONSTS + UINT64_C(221252353), // FLDMXDB_UPD + UINT64_C(210766593), // FLDMXIA + UINT64_C(212863745), // FLDMXIA_UPD + UINT64_C(250739216), // FMSTAT + UINT64_C(220203777), // FSTMXDB_UPD + UINT64_C(209718017), // FSTMXIA + UINT64_C(211815169), // FSTMXIA_UPD + UINT64_C(52490240), // HINT + UINT64_C(3774873712), // HLT + UINT64_C(3779068016), // HVC + UINT64_C(4118802528), // ISB + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(26217631), // LDA + UINT64_C(30411935), // LDAB + UINT64_C(26218143), // LDAEX + UINT64_C(30412447), // LDAEXB + UINT64_C(28315295), // LDAEXD + UINT64_C(32509599), // LDAEXH + UINT64_C(32509087), // LDAH + UINT64_C(4249878528), // LDC2L_OFFSET + UINT64_C(4241489920), // LDC2L_OPTION + UINT64_C(4235198464), // LDC2L_POST + UINT64_C(4251975680), // LDC2L_PRE + UINT64_C(4245684224), // LDC2_OFFSET + UINT64_C(4237295616), // LDC2_OPTION + UINT64_C(4231004160), // LDC2_POST + UINT64_C(4247781376), // LDC2_PRE + UINT64_C(223346688), // LDCL_OFFSET + UINT64_C(214958080), // LDCL_OPTION + UINT64_C(208666624), // LDCL_POST + UINT64_C(225443840), // LDCL_PRE + UINT64_C(219152384), // LDC_OFFSET + UINT64_C(210763776), // LDC_OPTION + UINT64_C(204472320), // LDC_POST + UINT64_C(221249536), // LDC_PRE + UINT64_C(135266304), // LDMDA + UINT64_C(137363456), // LDMDA_UPD + UINT64_C(152043520), // LDMDB + UINT64_C(154140672), // LDMDB_UPD + UINT64_C(143654912), // LDMIA + UINT64_C(0), + UINT64_C(145752064), // LDMIA_UPD + UINT64_C(160432128), // LDMIB + UINT64_C(162529280), // LDMIB_UPD + UINT64_C(0), + UINT64_C(74448896), // LDRBT_POST_IMM + UINT64_C(108003328), // LDRBT_POST_REG + UINT64_C(72351744), // LDRB_POST_IMM + UINT64_C(105906176), // LDRB_POST_REG + UINT64_C(91226112), // LDRB_PRE_IMM + UINT64_C(124780544), // LDRB_PRE_REG + UINT64_C(89128960), // LDRBi12 + UINT64_C(122683392), // LDRBrs + UINT64_C(16777424), // LDRD + UINT64_C(208), // LDRD_POST + UINT64_C(18874576), // LDRD_PRE + UINT64_C(26218399), // LDREX + UINT64_C(30412703), // LDREXB + UINT64_C(28315551), // LDREXD + UINT64_C(32509855), // LDREXH + UINT64_C(17825968), // LDRH + UINT64_C(7340208), // LDRHTi + UINT64_C(3145904), // LDRHTr + UINT64_C(1048752), // LDRH_POST + UINT64_C(19923120), // LDRH_PRE + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(17826000), // LDRSB + UINT64_C(7340240), // LDRSBTi + UINT64_C(3145936), // LDRSBTr + UINT64_C(1048784), // LDRSB_POST + UINT64_C(19923152), // LDRSB_PRE + UINT64_C(17826032), // LDRSH + UINT64_C(7340272), // LDRSHTi + UINT64_C(3145968), // LDRSHTr + UINT64_C(1048816), // LDRSH_POST + UINT64_C(19923184), // LDRSH_PRE + UINT64_C(0), + UINT64_C(70254592), // LDRT_POST_IMM + UINT64_C(103809024), // LDRT_POST_REG + UINT64_C(68157440), // LDR_POST_IMM + UINT64_C(101711872), // LDR_POST_REG + UINT64_C(87031808), // LDR_PRE_IMM + UINT64_C(120586240), // LDR_PRE_REG + UINT64_C(85917696), // LDRcp + UINT64_C(84934656), // LDRi12 + UINT64_C(118489088), // LDRrs + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(234881040), // MCR + UINT64_C(4261412880), // MCR2 + UINT64_C(205520896), // MCRR + UINT64_C(4232052736), // MCRR2 + UINT64_C(0), + UINT64_C(2097296), // MLA + UINT64_C(0), + UINT64_C(6291600), // MLS + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(27324430), // MOVPCLR + UINT64_C(0), + UINT64_C(54525952), // MOVTi16 + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(60817408), // MOVi + UINT64_C(50331648), // MOVi16 + UINT64_C(0), + UINT64_C(0), + UINT64_C(27262976), // MOVr + UINT64_C(27262976), // MOVr_TC + UINT64_C(27262976), // MOVsi + UINT64_C(27262992), // MOVsr + UINT64_C(0), + UINT64_C(0), + UINT64_C(235929616), // MRC + UINT64_C(4262461456), // MRC2 + UINT64_C(206569472), // MRRC + UINT64_C(4233101312), // MRRC2 + UINT64_C(17760256), // MRS + UINT64_C(16777728), // MRSbanked + UINT64_C(21954560), // MRSsys + UINT64_C(18935808), // MSR + UINT64_C(18936320), // MSRbanked + UINT64_C(52490240), // MSRi + UINT64_C(144), // MUL + UINT64_C(0), + UINT64_C(0), + UINT64_C(65011712), // MVNi + UINT64_C(31457280), // MVNr + UINT64_C(31457280), // MVNsi + UINT64_C(31457296), // MVNsr + UINT64_C(58720256), // ORRri + UINT64_C(25165824), // ORRrr + UINT64_C(25165824), // ORRrsi + UINT64_C(25165840), // ORRrsr + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(109051920), // PKHBT + UINT64_C(109051984), // PKHTB + UINT64_C(4111527936), // PLDWi12 + UINT64_C(4145082368), // PLDWrs + UINT64_C(4115722240), // PLDi12 + UINT64_C(4149276672), // PLDrs + UINT64_C(4098945024), // PLIi12 + UINT64_C(4132499456), // PLIrs + UINT64_C(16777296), // QADD + UINT64_C(102764304), // QADD16 + UINT64_C(102764432), // QADD8 + UINT64_C(102764336), // QASX + UINT64_C(20971600), // QDADD + UINT64_C(23068752), // QDSUB + UINT64_C(102764368), // QSAX + UINT64_C(18874448), // QSUB + UINT64_C(102764400), // QSUB16 + UINT64_C(102764528), // QSUB8 + UINT64_C(117378864), // RBIT + UINT64_C(113184560), // REV + UINT64_C(113184688), // REV16 + UINT64_C(117378992), // REVSH + UINT64_C(4161800704), // RFEDA + UINT64_C(4163897856), // RFEDA_UPD + UINT64_C(4178577920), // RFEDB + UINT64_C(4180675072), // RFEDB_UPD + UINT64_C(4170189312), // RFEIA + UINT64_C(4172286464), // RFEIA_UPD + UINT64_C(4186966528), // RFEIB + UINT64_C(4189063680), // RFEIB_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(39845888), // RSBri + UINT64_C(6291456), // RSBrr + UINT64_C(6291456), // RSBrsi + UINT64_C(6291472), // RSBrsr + UINT64_C(48234496), // RSCri + UINT64_C(14680064), // RSCrr + UINT64_C(14680064), // RSCrsi + UINT64_C(14680080), // RSCrsr + UINT64_C(101715728), // SADD16 + UINT64_C(101715856), // SADD8 + UINT64_C(101715760), // SASX + UINT64_C(46137344), // SBCri + UINT64_C(12582912), // SBCrr + UINT64_C(12582912), // SBCrsi + UINT64_C(12582928), // SBCrsr + UINT64_C(127926352), // SBFX + UINT64_C(118550544), // SDIV + UINT64_C(109055920), // SEL + UINT64_C(4043374592), // SETEND + UINT64_C(4044357632), // SETPAN + UINT64_C(4060089408), // SHA1C + UINT64_C(4088988352), // SHA1H + UINT64_C(4062186560), // SHA1M + UINT64_C(4061137984), // SHA1P + UINT64_C(4063235136), // SHA1SU0 + UINT64_C(4089054080), // SHA1SU1 + UINT64_C(4076866624), // SHA256H + UINT64_C(4077915200), // SHA256H2 + UINT64_C(4089054144), // SHA256SU0 + UINT64_C(4078963776), // SHA256SU1 + UINT64_C(103812880), // SHADD16 + UINT64_C(103813008), // SHADD8 + UINT64_C(103812912), // SHASX + UINT64_C(103812944), // SHSAX + UINT64_C(103812976), // SHSUB16 + UINT64_C(103813104), // SHSUB8 + UINT64_C(23068784), // SMC + UINT64_C(16777344), // SMLABB + UINT64_C(16777408), // SMLABT + UINT64_C(117440528), // SMLAD + UINT64_C(117440560), // SMLADX + UINT64_C(14680208), // SMLAL + UINT64_C(20971648), // SMLALBB + UINT64_C(20971712), // SMLALBT + UINT64_C(121634832), // SMLALD + UINT64_C(121634864), // SMLALDX + UINT64_C(20971680), // SMLALTB + UINT64_C(20971744), // SMLALTT + UINT64_C(0), + UINT64_C(16777376), // SMLATB + UINT64_C(16777440), // SMLATT + UINT64_C(18874496), // SMLAWB + UINT64_C(18874560), // SMLAWT + UINT64_C(117440592), // SMLSD + UINT64_C(117440624), // SMLSDX + UINT64_C(121634896), // SMLSLD + UINT64_C(121634928), // SMLSLDX + UINT64_C(122683408), // SMMLA + UINT64_C(122683440), // SMMLAR + UINT64_C(122683600), // SMMLS + UINT64_C(122683632), // SMMLSR + UINT64_C(122744848), // SMMUL + UINT64_C(122744880), // SMMULR + UINT64_C(117501968), // SMUAD + UINT64_C(117502000), // SMUADX + UINT64_C(23068800), // SMULBB + UINT64_C(23068864), // SMULBT + UINT64_C(12583056), // SMULL + UINT64_C(0), + UINT64_C(23068832), // SMULTB + UINT64_C(23068896), // SMULTT + UINT64_C(18874528), // SMULWB + UINT64_C(18874592), // SMULWT + UINT64_C(117502032), // SMUSD + UINT64_C(117502064), // SMUSDX + UINT64_C(0), + UINT64_C(4165797120), // SRSDA + UINT64_C(4167894272), // SRSDA_UPD + UINT64_C(4182574336), // SRSDB + UINT64_C(4184671488), // SRSDB_UPD + UINT64_C(4174185728), // SRSIA + UINT64_C(4176282880), // SRSIA_UPD + UINT64_C(4190962944), // SRSIB + UINT64_C(4193060096), // SRSIB_UPD + UINT64_C(111149072), // SSAT + UINT64_C(111152944), // SSAT16 + UINT64_C(101715792), // SSAX + UINT64_C(101715824), // SSUB16 + UINT64_C(101715952), // SSUB8 + UINT64_C(4248829952), // STC2L_OFFSET + UINT64_C(4240441344), // STC2L_OPTION + UINT64_C(4234149888), // STC2L_POST + UINT64_C(4250927104), // STC2L_PRE + UINT64_C(4244635648), // STC2_OFFSET + UINT64_C(4236247040), // STC2_OPTION + UINT64_C(4229955584), // STC2_POST + UINT64_C(4246732800), // STC2_PRE + UINT64_C(222298112), // STCL_OFFSET + UINT64_C(213909504), // STCL_OPTION + UINT64_C(207618048), // STCL_POST + UINT64_C(224395264), // STCL_PRE + UINT64_C(218103808), // STC_OFFSET + UINT64_C(209715200), // STC_OPTION + UINT64_C(203423744), // STC_POST + UINT64_C(220200960), // STC_PRE + UINT64_C(25230480), // STL + UINT64_C(29424784), // STLB + UINT64_C(25169552), // STLEX + UINT64_C(29363856), // STLEXB + UINT64_C(27266704), // STLEXD + UINT64_C(31461008), // STLEXH + UINT64_C(31521936), // STLH + UINT64_C(134217728), // STMDA + UINT64_C(136314880), // STMDA_UPD + UINT64_C(150994944), // STMDB + UINT64_C(153092096), // STMDB_UPD + UINT64_C(142606336), // STMIA + UINT64_C(144703488), // STMIA_UPD + UINT64_C(159383552), // STMIB + UINT64_C(161480704), // STMIB_UPD + UINT64_C(0), + UINT64_C(73400320), // STRBT_POST_IMM + UINT64_C(106954752), // STRBT_POST_REG + UINT64_C(71303168), // STRB_POST_IMM + UINT64_C(104857600), // STRB_POST_REG + UINT64_C(90177536), // STRB_PRE_IMM + UINT64_C(123731968), // STRB_PRE_REG + UINT64_C(88080384), // STRBi12 + UINT64_C(0), + UINT64_C(0), + UINT64_C(121634816), // STRBrs + UINT64_C(16777456), // STRD + UINT64_C(240), // STRD_POST + UINT64_C(18874608), // STRD_PRE + UINT64_C(25169808), // STREX + UINT64_C(29364112), // STREXB + UINT64_C(27266960), // STREXD + UINT64_C(31461264), // STREXH + UINT64_C(16777392), // STRH + UINT64_C(6291632), // STRHTi + UINT64_C(2097328), // STRHTr + UINT64_C(176), // STRH_POST + UINT64_C(18874544), // STRH_PRE + UINT64_C(0), + UINT64_C(0), + UINT64_C(69206016), // STRT_POST_IMM + UINT64_C(102760448), // STRT_POST_REG + UINT64_C(67108864), // STR_POST_IMM + UINT64_C(100663296), // STR_POST_REG + UINT64_C(85983232), // STR_PRE_IMM + UINT64_C(119537664), // STR_PRE_REG + UINT64_C(83886080), // STRi12 + UINT64_C(0), + UINT64_C(0), + UINT64_C(117440512), // STRrs + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(37748736), // SUBri + UINT64_C(4194304), // SUBrr + UINT64_C(4194304), // SUBrsi + UINT64_C(4194320), // SUBrsr + UINT64_C(251658240), // SVC + UINT64_C(16777360), // SWP + UINT64_C(20971664), // SWPB + UINT64_C(111149168), // SXTAB + UINT64_C(109052016), // SXTAB16 + UINT64_C(112197744), // SXTAH + UINT64_C(112132208), // SXTB + UINT64_C(110035056), // SXTB16 + UINT64_C(113180784), // SXTH + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(53477376), // TEQri + UINT64_C(19922944), // TEQrr + UINT64_C(19922944), // TEQrsi + UINT64_C(19922960), // TEQrsr + UINT64_C(0), + UINT64_C(3892305662), // TRAP + UINT64_C(3892240112), // TRAPNaCl + UINT64_C(51380224), // TSTri + UINT64_C(17825792), // TSTrr + UINT64_C(17825792), // TSTrsi + UINT64_C(17825808), // TSTrsr + UINT64_C(105910032), // UADD16 + UINT64_C(105910160), // UADD8 + UINT64_C(105910064), // UASX + UINT64_C(132120656), // UBFX + UINT64_C(3891265776), // UDF + UINT64_C(120647696), // UDIV + UINT64_C(108007184), // UHADD16 + UINT64_C(108007312), // UHADD8 + UINT64_C(108007216), // UHASX + UINT64_C(108007248), // UHSAX + UINT64_C(108007280), // UHSUB16 + UINT64_C(108007408), // UHSUB8 + UINT64_C(4194448), // UMAAL + UINT64_C(10485904), // UMLAL + UINT64_C(0), + UINT64_C(8388752), // UMULL + UINT64_C(0), + UINT64_C(106958608), // UQADD16 + UINT64_C(106958736), // UQADD8 + UINT64_C(106958640), // UQASX + UINT64_C(106958672), // UQSAX + UINT64_C(106958704), // UQSUB16 + UINT64_C(106958832), // UQSUB8 + UINT64_C(125890576), // USAD8 + UINT64_C(125829136), // USADA8 + UINT64_C(115343376), // USAT + UINT64_C(115347248), // USAT16 + UINT64_C(105910096), // USAX + UINT64_C(105910128), // USUB16 + UINT64_C(105910256), // USUB8 + UINT64_C(115343472), // UXTAB + UINT64_C(113246320), // UXTAB16 + UINT64_C(116392048), // UXTAH + UINT64_C(116326512), // UXTB + UINT64_C(114229360), // UXTB16 + UINT64_C(117375088), // UXTH + UINT64_C(4070573312), // VABALsv2i64 + UINT64_C(4069524736), // VABALsv4i32 + UINT64_C(4068476160), // VABALsv8i16 + UINT64_C(4087350528), // VABALuv2i64 + UINT64_C(4086301952), // VABALuv4i32 + UINT64_C(4085253376), // VABALuv8i16 + UINT64_C(4060088144), // VABAsv16i8 + UINT64_C(4062185232), // VABAsv2i32 + UINT64_C(4061136656), // VABAsv4i16 + UINT64_C(4062185296), // VABAsv4i32 + UINT64_C(4061136720), // VABAsv8i16 + UINT64_C(4060088080), // VABAsv8i8 + UINT64_C(4076865360), // VABAuv16i8 + UINT64_C(4078962448), // VABAuv2i32 + UINT64_C(4077913872), // VABAuv4i16 + UINT64_C(4078962512), // VABAuv4i32 + UINT64_C(4077913936), // VABAuv8i16 + UINT64_C(4076865296), // VABAuv8i8 + UINT64_C(4070573824), // VABDLsv2i64 + UINT64_C(4069525248), // VABDLsv4i32 + UINT64_C(4068476672), // VABDLsv8i16 + UINT64_C(4087351040), // VABDLuv2i64 + UINT64_C(4086302464), // VABDLuv4i32 + UINT64_C(4085253888), // VABDLuv8i16 + UINT64_C(4078963968), // VABDfd + UINT64_C(4078964032), // VABDfq + UINT64_C(4080012544), // VABDhd + UINT64_C(4080012608), // VABDhq + UINT64_C(4060088128), // VABDsv16i8 + UINT64_C(4062185216), // VABDsv2i32 + UINT64_C(4061136640), // VABDsv4i16 + UINT64_C(4062185280), // VABDsv4i32 + UINT64_C(4061136704), // VABDsv8i16 + UINT64_C(4060088064), // VABDsv8i8 + UINT64_C(4076865344), // VABDuv16i8 + UINT64_C(4078962432), // VABDuv2i32 + UINT64_C(4077913856), // VABDuv4i16 + UINT64_C(4078962496), // VABDuv4i32 + UINT64_C(4077913920), // VABDuv8i16 + UINT64_C(4076865280), // VABDuv8i8 + UINT64_C(246418368), // VABSD + UINT64_C(246417856), // VABSH + UINT64_C(246418112), // VABSS + UINT64_C(4088989440), // VABSfd + UINT64_C(4088989504), // VABSfq + UINT64_C(4088727296), // VABShd + UINT64_C(4088727360), // VABShq + UINT64_C(4088464192), // VABSv16i8 + UINT64_C(4088988416), // VABSv2i32 + UINT64_C(4088726272), // VABSv4i16 + UINT64_C(4088988480), // VABSv4i32 + UINT64_C(4088726336), // VABSv8i16 + UINT64_C(4088464128), // VABSv8i8 + UINT64_C(4076867088), // VACGEfd + UINT64_C(4076867152), // VACGEfq + UINT64_C(4077915664), // VACGEhd + UINT64_C(4077915728), // VACGEhq + UINT64_C(4078964240), // VACGTfd + UINT64_C(4078964304), // VACGTfq + UINT64_C(4080012816), // VACGThd + UINT64_C(4080012880), // VACGThq + UINT64_C(238029568), // VADDD + UINT64_C(238029056), // VADDH + UINT64_C(4070573056), // VADDHNv2i32 + UINT64_C(4069524480), // VADDHNv4i16 + UINT64_C(4068475904), // VADDHNv8i8 + UINT64_C(4070572032), // VADDLsv2i64 + UINT64_C(4069523456), // VADDLsv4i32 + UINT64_C(4068474880), // VADDLsv8i16 + UINT64_C(4087349248), // VADDLuv2i64 + UINT64_C(4086300672), // VADDLuv4i32 + UINT64_C(4085252096), // VADDLuv8i16 + UINT64_C(238029312), // VADDS + UINT64_C(4070572288), // VADDWsv2i64 + UINT64_C(4069523712), // VADDWsv4i32 + UINT64_C(4068475136), // VADDWsv8i16 + UINT64_C(4087349504), // VADDWuv2i64 + UINT64_C(4086300928), // VADDWuv4i32 + UINT64_C(4085252352), // VADDWuv8i16 + UINT64_C(4060089600), // VADDfd + UINT64_C(4060089664), // VADDfq + UINT64_C(4061138176), // VADDhd + UINT64_C(4061138240), // VADDhq + UINT64_C(4060088384), // VADDv16i8 + UINT64_C(4063234048), // VADDv1i64 + UINT64_C(4062185472), // VADDv2i32 + UINT64_C(4063234112), // VADDv2i64 + UINT64_C(4061136896), // VADDv4i16 + UINT64_C(4062185536), // VADDv4i32 + UINT64_C(4061136960), // VADDv8i16 + UINT64_C(4060088320), // VADDv8i8 + UINT64_C(4060086544), // VANDd + UINT64_C(4060086608), // VANDq + UINT64_C(4061135120), // VBICd + UINT64_C(4068475184), // VBICiv2i32 + UINT64_C(4068477232), // VBICiv4i16 + UINT64_C(4068475248), // VBICiv4i32 + UINT64_C(4068477296), // VBICiv8i16 + UINT64_C(4061135184), // VBICq + UINT64_C(4080009488), // VBIFd + UINT64_C(4080009552), // VBIFq + UINT64_C(4078960912), // VBITd + UINT64_C(4078960976), // VBITq + UINT64_C(4077912336), // VBSLd + UINT64_C(4077912400), // VBSLq + UINT64_C(4060089856), // VCEQfd + UINT64_C(4060089920), // VCEQfq + UINT64_C(4061138432), // VCEQhd + UINT64_C(4061138496), // VCEQhq + UINT64_C(4076865616), // VCEQv16i8 + UINT64_C(4078962704), // VCEQv2i32 + UINT64_C(4077914128), // VCEQv4i16 + UINT64_C(4078962768), // VCEQv4i32 + UINT64_C(4077914192), // VCEQv8i16 + UINT64_C(4076865552), // VCEQv8i8 + UINT64_C(4088463680), // VCEQzv16i8 + UINT64_C(4088988928), // VCEQzv2f32 + UINT64_C(4088987904), // VCEQzv2i32 + UINT64_C(4088726784), // VCEQzv4f16 + UINT64_C(4088988992), // VCEQzv4f32 + UINT64_C(4088725760), // VCEQzv4i16 + UINT64_C(4088987968), // VCEQzv4i32 + UINT64_C(4088726848), // VCEQzv8f16 + UINT64_C(4088725824), // VCEQzv8i16 + UINT64_C(4088463616), // VCEQzv8i8 + UINT64_C(4076867072), // VCGEfd + UINT64_C(4076867136), // VCGEfq + UINT64_C(4077915648), // VCGEhd + UINT64_C(4077915712), // VCGEhq + UINT64_C(4060087120), // VCGEsv16i8 + UINT64_C(4062184208), // VCGEsv2i32 + UINT64_C(4061135632), // VCGEsv4i16 + UINT64_C(4062184272), // VCGEsv4i32 + UINT64_C(4061135696), // VCGEsv8i16 + UINT64_C(4060087056), // VCGEsv8i8 + UINT64_C(4076864336), // VCGEuv16i8 + UINT64_C(4078961424), // VCGEuv2i32 + UINT64_C(4077912848), // VCGEuv4i16 + UINT64_C(4078961488), // VCGEuv4i32 + UINT64_C(4077912912), // VCGEuv8i16 + UINT64_C(4076864272), // VCGEuv8i8 + UINT64_C(4088463552), // VCGEzv16i8 + UINT64_C(4088988800), // VCGEzv2f32 + UINT64_C(4088987776), // VCGEzv2i32 + UINT64_C(4088726656), // VCGEzv4f16 + UINT64_C(4088988864), // VCGEzv4f32 + UINT64_C(4088725632), // VCGEzv4i16 + UINT64_C(4088987840), // VCGEzv4i32 + UINT64_C(4088726720), // VCGEzv8f16 + UINT64_C(4088725696), // VCGEzv8i16 + UINT64_C(4088463488), // VCGEzv8i8 + UINT64_C(4078964224), // VCGTfd + UINT64_C(4078964288), // VCGTfq + UINT64_C(4080012800), // VCGThd + UINT64_C(4080012864), // VCGThq + UINT64_C(4060087104), // VCGTsv16i8 + UINT64_C(4062184192), // VCGTsv2i32 + UINT64_C(4061135616), // VCGTsv4i16 + UINT64_C(4062184256), // VCGTsv4i32 + UINT64_C(4061135680), // VCGTsv8i16 + UINT64_C(4060087040), // VCGTsv8i8 + UINT64_C(4076864320), // VCGTuv16i8 + UINT64_C(4078961408), // VCGTuv2i32 + UINT64_C(4077912832), // VCGTuv4i16 + UINT64_C(4078961472), // VCGTuv4i32 + UINT64_C(4077912896), // VCGTuv8i16 + UINT64_C(4076864256), // VCGTuv8i8 + UINT64_C(4088463424), // VCGTzv16i8 + UINT64_C(4088988672), // VCGTzv2f32 + UINT64_C(4088987648), // VCGTzv2i32 + UINT64_C(4088726528), // VCGTzv4f16 + UINT64_C(4088988736), // VCGTzv4f32 + UINT64_C(4088725504), // VCGTzv4i16 + UINT64_C(4088987712), // VCGTzv4i32 + UINT64_C(4088726592), // VCGTzv8f16 + UINT64_C(4088725568), // VCGTzv8i16 + UINT64_C(4088463360), // VCGTzv8i8 + UINT64_C(4088463808), // VCLEzv16i8 + UINT64_C(4088989056), // VCLEzv2f32 + UINT64_C(4088988032), // VCLEzv2i32 + UINT64_C(4088726912), // VCLEzv4f16 + UINT64_C(4088989120), // VCLEzv4f32 + UINT64_C(4088725888), // VCLEzv4i16 + UINT64_C(4088988096), // VCLEzv4i32 + UINT64_C(4088726976), // VCLEzv8f16 + UINT64_C(4088725952), // VCLEzv8i16 + UINT64_C(4088463744), // VCLEzv8i8 + UINT64_C(4088398912), // VCLSv16i8 + UINT64_C(4088923136), // VCLSv2i32 + UINT64_C(4088660992), // VCLSv4i16 + UINT64_C(4088923200), // VCLSv4i32 + UINT64_C(4088661056), // VCLSv8i16 + UINT64_C(4088398848), // VCLSv8i8 + UINT64_C(4088463936), // VCLTzv16i8 + UINT64_C(4088989184), // VCLTzv2f32 + UINT64_C(4088988160), // VCLTzv2i32 + UINT64_C(4088727040), // VCLTzv4f16 + UINT64_C(4088989248), // VCLTzv4f32 + UINT64_C(4088726016), // VCLTzv4i16 + UINT64_C(4088988224), // VCLTzv4i32 + UINT64_C(4088727104), // VCLTzv8f16 + UINT64_C(4088726080), // VCLTzv8i16 + UINT64_C(4088463872), // VCLTzv8i8 + UINT64_C(4088399040), // VCLZv16i8 + UINT64_C(4088923264), // VCLZv2i32 + UINT64_C(4088661120), // VCLZv4i16 + UINT64_C(4088923328), // VCLZv4i32 + UINT64_C(4088661184), // VCLZv8i16 + UINT64_C(4088398976), // VCLZv8i8 + UINT64_C(246680384), // VCMPD + UINT64_C(246680512), // VCMPED + UINT64_C(246680000), // VCMPEH + UINT64_C(246680256), // VCMPES + UINT64_C(246746048), // VCMPEZD + UINT64_C(246745536), // VCMPEZH + UINT64_C(246745792), // VCMPEZS + UINT64_C(246679872), // VCMPH + UINT64_C(246680128), // VCMPS + UINT64_C(246745920), // VCMPZD + UINT64_C(246745408), // VCMPZH + UINT64_C(246745664), // VCMPZS + UINT64_C(4088399104), // VCNTd + UINT64_C(4088399168), // VCNTq + UINT64_C(4089118720), // VCVTANSDf + UINT64_C(4088856576), // VCVTANSDh + UINT64_C(4089118784), // VCVTANSQf + UINT64_C(4088856640), // VCVTANSQh + UINT64_C(4089118848), // VCVTANUDf + UINT64_C(4088856704), // VCVTANUDh + UINT64_C(4089118912), // VCVTANUQf + UINT64_C(4088856768), // VCVTANUQh + UINT64_C(4273736640), // VCVTASD + UINT64_C(4273736128), // VCVTASH + UINT64_C(4273736384), // VCVTASS + UINT64_C(4273736512), // VCVTAUD + UINT64_C(4273736000), // VCVTAUH + UINT64_C(4273736256), // VCVTAUS + UINT64_C(246614848), // VCVTBDH + UINT64_C(246549312), // VCVTBHD + UINT64_C(246549056), // VCVTBHS + UINT64_C(246614592), // VCVTBSH + UINT64_C(246876864), // VCVTDS + UINT64_C(4089119488), // VCVTMNSDf + UINT64_C(4088857344), // VCVTMNSDh + UINT64_C(4089119552), // VCVTMNSQf + UINT64_C(4088857408), // VCVTMNSQh + UINT64_C(4089119616), // VCVTMNUDf + UINT64_C(4088857472), // VCVTMNUDh + UINT64_C(4089119680), // VCVTMNUQf + UINT64_C(4088857536), // VCVTMNUQh + UINT64_C(4273933248), // VCVTMSD + UINT64_C(4273932736), // VCVTMSH + UINT64_C(4273932992), // VCVTMSS + UINT64_C(4273933120), // VCVTMUD + UINT64_C(4273932608), // VCVTMUH + UINT64_C(4273932864), // VCVTMUS + UINT64_C(4089118976), // VCVTNNSDf + UINT64_C(4088856832), // VCVTNNSDh + UINT64_C(4089119040), // VCVTNNSQf + UINT64_C(4088856896), // VCVTNNSQh + UINT64_C(4089119104), // VCVTNNUDf + UINT64_C(4088856960), // VCVTNNUDh + UINT64_C(4089119168), // VCVTNNUQf + UINT64_C(4088857024), // VCVTNNUQh + UINT64_C(4273802176), // VCVTNSD + UINT64_C(4273801664), // VCVTNSH + UINT64_C(4273801920), // VCVTNSS + UINT64_C(4273802048), // VCVTNUD + UINT64_C(4273801536), // VCVTNUH + UINT64_C(4273801792), // VCVTNUS + UINT64_C(4089119232), // VCVTPNSDf + UINT64_C(4088857088), // VCVTPNSDh + UINT64_C(4089119296), // VCVTPNSQf + UINT64_C(4088857152), // VCVTPNSQh + UINT64_C(4089119360), // VCVTPNUDf + UINT64_C(4088857216), // VCVTPNUDh + UINT64_C(4089119424), // VCVTPNUQf + UINT64_C(4088857280), // VCVTPNUQh + UINT64_C(4273867712), // VCVTPSD + UINT64_C(4273867200), // VCVTPSH + UINT64_C(4273867456), // VCVTPSS + UINT64_C(4273867584), // VCVTPUD + UINT64_C(4273867072), // VCVTPUH + UINT64_C(4273867328), // VCVTPUS + UINT64_C(246877120), // VCVTSD + UINT64_C(246614976), // VCVTTDH + UINT64_C(246549440), // VCVTTHD + UINT64_C(246549184), // VCVTTHS + UINT64_C(246614720), // VCVTTSH + UINT64_C(4088792576), // VCVTf2h + UINT64_C(4089120512), // VCVTf2sd + UINT64_C(4089120576), // VCVTf2sq + UINT64_C(4089120640), // VCVTf2ud + UINT64_C(4089120704), // VCVTf2uq + UINT64_C(4068478736), // VCVTf2xsd + UINT64_C(4068478800), // VCVTf2xsq + UINT64_C(4085255952), // VCVTf2xud + UINT64_C(4085256016), // VCVTf2xuq + UINT64_C(4088792832), // VCVTh2f + UINT64_C(4088858368), // VCVTh2sd + UINT64_C(4088858432), // VCVTh2sq + UINT64_C(4088858496), // VCVTh2ud + UINT64_C(4088858560), // VCVTh2uq + UINT64_C(4068478224), // VCVTh2xsd + UINT64_C(4068478288), // VCVTh2xsq + UINT64_C(4085255440), // VCVTh2xud + UINT64_C(4085255504), // VCVTh2xuq + UINT64_C(4089120256), // VCVTs2fd + UINT64_C(4089120320), // VCVTs2fq + UINT64_C(4088858112), // VCVTs2hd + UINT64_C(4088858176), // VCVTs2hq + UINT64_C(4089120384), // VCVTu2fd + UINT64_C(4089120448), // VCVTu2fq + UINT64_C(4088858240), // VCVTu2hd + UINT64_C(4088858304), // VCVTu2hq + UINT64_C(4068478480), // VCVTxs2fd + UINT64_C(4068478544), // VCVTxs2fq + UINT64_C(4068477968), // VCVTxs2hd + UINT64_C(4068478032), // VCVTxs2hq + UINT64_C(4085255696), // VCVTxu2fd + UINT64_C(4085255760), // VCVTxu2fq + UINT64_C(4085255184), // VCVTxu2hd + UINT64_C(4085255248), // VCVTxu2hq + UINT64_C(243272448), // VDIVD + UINT64_C(243271936), // VDIVH + UINT64_C(243272192), // VDIVS + UINT64_C(243272496), // VDUP16d + UINT64_C(245369648), // VDUP16q + UINT64_C(243272464), // VDUP32d + UINT64_C(245369616), // VDUP32q + UINT64_C(247466768), // VDUP8d + UINT64_C(249563920), // VDUP8q + UINT64_C(4088531968), // VDUPLN16d + UINT64_C(4088532032), // VDUPLN16q + UINT64_C(4088663040), // VDUPLN32d + UINT64_C(4088663104), // VDUPLN32q + UINT64_C(4088466432), // VDUPLN8d + UINT64_C(4088466496), // VDUPLN8q + UINT64_C(4076863760), // VEORd + UINT64_C(4076863824), // VEORq + UINT64_C(4071620608), // VEXTd16 + UINT64_C(4071620608), // VEXTd32 + UINT64_C(4071620608), // VEXTd8 + UINT64_C(4071620672), // VEXTq16 + UINT64_C(4071620672), // VEXTq32 + UINT64_C(4071620672), // VEXTq64 + UINT64_C(4071620672), // VEXTq8 + UINT64_C(245369600), // VFMAD + UINT64_C(245369088), // VFMAH + UINT64_C(245369344), // VFMAS + UINT64_C(4060089360), // VFMAfd + UINT64_C(4060089424), // VFMAfq + UINT64_C(4061137936), // VFMAhd + UINT64_C(4061138000), // VFMAhq + UINT64_C(245369664), // VFMSD + UINT64_C(245369152), // VFMSH + UINT64_C(245369408), // VFMSS + UINT64_C(4062186512), // VFMSfd + UINT64_C(4062186576), // VFMSfq + UINT64_C(4063235088), // VFMShd + UINT64_C(4063235152), // VFMShq + UINT64_C(244321088), // VFNMAD + UINT64_C(244320576), // VFNMAH + UINT64_C(244320832), // VFNMAS + UINT64_C(244321024), // VFNMSD + UINT64_C(244320512), // VFNMSH + UINT64_C(244320768), // VFNMSS + UINT64_C(235932432), // VGETLNi32 + UINT64_C(235932464), // VGETLNs16 + UINT64_C(240126736), // VGETLNs8 + UINT64_C(244321072), // VGETLNu16 + UINT64_C(248515344), // VGETLNu8 + UINT64_C(4060086336), // VHADDsv16i8 + UINT64_C(4062183424), // VHADDsv2i32 + UINT64_C(4061134848), // VHADDsv4i16 + UINT64_C(4062183488), // VHADDsv4i32 + UINT64_C(4061134912), // VHADDsv8i16 + UINT64_C(4060086272), // VHADDsv8i8 + UINT64_C(4076863552), // VHADDuv16i8 + UINT64_C(4078960640), // VHADDuv2i32 + UINT64_C(4077912064), // VHADDuv4i16 + UINT64_C(4078960704), // VHADDuv4i32 + UINT64_C(4077912128), // VHADDuv8i16 + UINT64_C(4076863488), // VHADDuv8i8 + UINT64_C(4060086848), // VHSUBsv16i8 + UINT64_C(4062183936), // VHSUBsv2i32 + UINT64_C(4061135360), // VHSUBsv4i16 + UINT64_C(4062184000), // VHSUBsv4i32 + UINT64_C(4061135424), // VHSUBsv8i16 + UINT64_C(4060086784), // VHSUBsv8i8 + UINT64_C(4076864064), // VHSUBuv16i8 + UINT64_C(4078961152), // VHSUBuv2i32 + UINT64_C(4077912576), // VHSUBuv4i16 + UINT64_C(4078961216), // VHSUBuv4i32 + UINT64_C(4077912640), // VHSUBuv8i16 + UINT64_C(4076864000), // VHSUBuv8i8 + UINT64_C(4272949952), // VINSH + UINT64_C(4104129615), // VLD1DUPd16 + UINT64_C(4104129613), // VLD1DUPd16wb_fixed + UINT64_C(4104129600), // VLD1DUPd16wb_register + UINT64_C(4104129679), // VLD1DUPd32 + UINT64_C(4104129677), // VLD1DUPd32wb_fixed + UINT64_C(4104129664), // VLD1DUPd32wb_register + UINT64_C(4104129551), // VLD1DUPd8 + UINT64_C(4104129549), // VLD1DUPd8wb_fixed + UINT64_C(4104129536), // VLD1DUPd8wb_register + UINT64_C(4104129647), // VLD1DUPq16 + UINT64_C(4104129645), // VLD1DUPq16wb_fixed + UINT64_C(4104129632), // VLD1DUPq16wb_register + UINT64_C(4104129711), // VLD1DUPq32 + UINT64_C(4104129709), // VLD1DUPq32wb_fixed + UINT64_C(4104129696), // VLD1DUPq32wb_register + UINT64_C(4104129583), // VLD1DUPq8 + UINT64_C(4104129581), // VLD1DUPq8wb_fixed + UINT64_C(4104129568), // VLD1DUPq8wb_register + UINT64_C(4104127503), // VLD1LNd16 + UINT64_C(4104127488), // VLD1LNd16_UPD + UINT64_C(4104128527), // VLD1LNd32 + UINT64_C(4104128512), // VLD1LNd32_UPD + UINT64_C(4104126479), // VLD1LNd8 + UINT64_C(4104126464), // VLD1LNd8_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), // VLD1LNq16Pseudo + UINT64_C(0), // VLD1LNq16Pseudo_UPD + UINT64_C(0), // VLD1LNq32Pseudo + UINT64_C(0), // VLD1LNq32Pseudo_UPD + UINT64_C(0), // VLD1LNq8Pseudo + UINT64_C(0), // VLD1LNq8Pseudo_UPD + UINT64_C(4095739727), // VLD1d16 + UINT64_C(4095738447), // VLD1d16Q + UINT64_C(4095738445), // VLD1d16Qwb_fixed + UINT64_C(4095738432), // VLD1d16Qwb_register + UINT64_C(4095739471), // VLD1d16T + UINT64_C(4095739469), // VLD1d16Twb_fixed + UINT64_C(4095739456), // VLD1d16Twb_register + UINT64_C(4095739725), // VLD1d16wb_fixed + UINT64_C(4095739712), // VLD1d16wb_register + UINT64_C(4095739791), // VLD1d32 + UINT64_C(4095738511), // VLD1d32Q + UINT64_C(4095738509), // VLD1d32Qwb_fixed + UINT64_C(4095738496), // VLD1d32Qwb_register + UINT64_C(4095739535), // VLD1d32T + UINT64_C(4095739533), // VLD1d32Twb_fixed + UINT64_C(4095739520), // VLD1d32Twb_register + UINT64_C(4095739789), // VLD1d32wb_fixed + UINT64_C(4095739776), // VLD1d32wb_register + UINT64_C(4095739855), // VLD1d64 + UINT64_C(4095738575), // VLD1d64Q + UINT64_C(0), // VLD1d64QPseudo + UINT64_C(0), // VLD1d64QPseudoWB_fixed + UINT64_C(0), // VLD1d64QPseudoWB_register + UINT64_C(4095738573), // VLD1d64Qwb_fixed + UINT64_C(4095738560), // VLD1d64Qwb_register + UINT64_C(4095739599), // VLD1d64T + UINT64_C(0), // VLD1d64TPseudo + UINT64_C(0), // VLD1d64TPseudoWB_fixed + UINT64_C(0), // VLD1d64TPseudoWB_register + UINT64_C(4095739597), // VLD1d64Twb_fixed + UINT64_C(4095739584), // VLD1d64Twb_register + UINT64_C(4095739853), // VLD1d64wb_fixed + UINT64_C(4095739840), // VLD1d64wb_register + UINT64_C(4095739663), // VLD1d8 + UINT64_C(4095738383), // VLD1d8Q + UINT64_C(4095738381), // VLD1d8Qwb_fixed + UINT64_C(4095738368), // VLD1d8Qwb_register + UINT64_C(4095739407), // VLD1d8T + UINT64_C(4095739405), // VLD1d8Twb_fixed + UINT64_C(4095739392), // VLD1d8Twb_register + UINT64_C(4095739661), // VLD1d8wb_fixed + UINT64_C(4095739648), // VLD1d8wb_register + UINT64_C(4095740495), // VLD1q16 + UINT64_C(4095740493), // VLD1q16wb_fixed + UINT64_C(4095740480), // VLD1q16wb_register + UINT64_C(4095740559), // VLD1q32 + UINT64_C(4095740557), // VLD1q32wb_fixed + UINT64_C(4095740544), // VLD1q32wb_register + UINT64_C(4095740623), // VLD1q64 + UINT64_C(4095740621), // VLD1q64wb_fixed + UINT64_C(4095740608), // VLD1q64wb_register + UINT64_C(4095740431), // VLD1q8 + UINT64_C(4095740429), // VLD1q8wb_fixed + UINT64_C(4095740416), // VLD1q8wb_register + UINT64_C(4104129871), // VLD2DUPd16 + UINT64_C(4104129869), // VLD2DUPd16wb_fixed + UINT64_C(4104129856), // VLD2DUPd16wb_register + UINT64_C(4104129903), // VLD2DUPd16x2 + UINT64_C(4104129901), // VLD2DUPd16x2wb_fixed + UINT64_C(4104129888), // VLD2DUPd16x2wb_register + UINT64_C(4104129935), // VLD2DUPd32 + UINT64_C(4104129933), // VLD2DUPd32wb_fixed + UINT64_C(4104129920), // VLD2DUPd32wb_register + UINT64_C(4104129967), // VLD2DUPd32x2 + UINT64_C(4104129965), // VLD2DUPd32x2wb_fixed + UINT64_C(4104129952), // VLD2DUPd32x2wb_register + UINT64_C(4104129807), // VLD2DUPd8 + UINT64_C(4104129805), // VLD2DUPd8wb_fixed + UINT64_C(4104129792), // VLD2DUPd8wb_register + UINT64_C(4104129839), // VLD2DUPd8x2 + UINT64_C(4104129837), // VLD2DUPd8x2wb_fixed + UINT64_C(4104129824), // VLD2DUPd8x2wb_register + UINT64_C(4104127759), // VLD2LNd16 + UINT64_C(0), // VLD2LNd16Pseudo + UINT64_C(0), // VLD2LNd16Pseudo_UPD + UINT64_C(4104127744), // VLD2LNd16_UPD + UINT64_C(4104128783), // VLD2LNd32 + UINT64_C(0), // VLD2LNd32Pseudo + UINT64_C(0), // VLD2LNd32Pseudo_UPD + UINT64_C(4104128768), // VLD2LNd32_UPD + UINT64_C(4104126735), // VLD2LNd8 + UINT64_C(0), // VLD2LNd8Pseudo + UINT64_C(0), // VLD2LNd8Pseudo_UPD + UINT64_C(4104126720), // VLD2LNd8_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4104127791), // VLD2LNq16 + UINT64_C(0), // VLD2LNq16Pseudo + UINT64_C(0), // VLD2LNq16Pseudo_UPD + UINT64_C(4104127776), // VLD2LNq16_UPD + UINT64_C(4104128847), // VLD2LNq32 + UINT64_C(0), // VLD2LNq32Pseudo + UINT64_C(0), // VLD2LNq32Pseudo_UPD + UINT64_C(4104128832), // VLD2LNq32_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4095740239), // VLD2b16 + UINT64_C(4095740237), // VLD2b16wb_fixed + UINT64_C(4095740224), // VLD2b16wb_register + UINT64_C(4095740303), // VLD2b32 + UINT64_C(4095740301), // VLD2b32wb_fixed + UINT64_C(4095740288), // VLD2b32wb_register + UINT64_C(4095740175), // VLD2b8 + UINT64_C(4095740173), // VLD2b8wb_fixed + UINT64_C(4095740160), // VLD2b8wb_register + UINT64_C(4095739983), // VLD2d16 + UINT64_C(4095739981), // VLD2d16wb_fixed + UINT64_C(4095739968), // VLD2d16wb_register + UINT64_C(4095740047), // VLD2d32 + UINT64_C(4095740045), // VLD2d32wb_fixed + UINT64_C(4095740032), // VLD2d32wb_register + UINT64_C(4095739919), // VLD2d8 + UINT64_C(4095739917), // VLD2d8wb_fixed + UINT64_C(4095739904), // VLD2d8wb_register + UINT64_C(4095738703), // VLD2q16 + UINT64_C(0), // VLD2q16Pseudo + UINT64_C(0), // VLD2q16PseudoWB_fixed + UINT64_C(0), // VLD2q16PseudoWB_register + UINT64_C(4095738701), // VLD2q16wb_fixed + UINT64_C(4095738688), // VLD2q16wb_register + UINT64_C(4095738767), // VLD2q32 + UINT64_C(0), // VLD2q32Pseudo + UINT64_C(0), // VLD2q32PseudoWB_fixed + UINT64_C(0), // VLD2q32PseudoWB_register + UINT64_C(4095738765), // VLD2q32wb_fixed + UINT64_C(4095738752), // VLD2q32wb_register + UINT64_C(4095738639), // VLD2q8 + UINT64_C(0), // VLD2q8Pseudo + UINT64_C(0), // VLD2q8PseudoWB_fixed + UINT64_C(0), // VLD2q8PseudoWB_register + UINT64_C(4095738637), // VLD2q8wb_fixed + UINT64_C(4095738624), // VLD2q8wb_register + UINT64_C(4104130127), // VLD3DUPd16 + UINT64_C(0), // VLD3DUPd16Pseudo + UINT64_C(0), // VLD3DUPd16Pseudo_UPD + UINT64_C(4104130112), // VLD3DUPd16_UPD + UINT64_C(4104130191), // VLD3DUPd32 + UINT64_C(0), // VLD3DUPd32Pseudo + UINT64_C(0), // VLD3DUPd32Pseudo_UPD + UINT64_C(4104130176), // VLD3DUPd32_UPD + UINT64_C(4104130063), // VLD3DUPd8 + UINT64_C(0), // VLD3DUPd8Pseudo + UINT64_C(0), // VLD3DUPd8Pseudo_UPD + UINT64_C(4104130048), // VLD3DUPd8_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4104130159), // VLD3DUPq16 + UINT64_C(4104130144), // VLD3DUPq16_UPD + UINT64_C(4104130223), // VLD3DUPq32 + UINT64_C(4104130208), // VLD3DUPq32_UPD + UINT64_C(4104130095), // VLD3DUPq8 + UINT64_C(4104130080), // VLD3DUPq8_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4104128015), // VLD3LNd16 + UINT64_C(0), // VLD3LNd16Pseudo + UINT64_C(0), // VLD3LNd16Pseudo_UPD + UINT64_C(4104128000), // VLD3LNd16_UPD + UINT64_C(4104129039), // VLD3LNd32 + UINT64_C(0), // VLD3LNd32Pseudo + UINT64_C(0), // VLD3LNd32Pseudo_UPD + UINT64_C(4104129024), // VLD3LNd32_UPD + UINT64_C(4104126991), // VLD3LNd8 + UINT64_C(0), // VLD3LNd8Pseudo + UINT64_C(0), // VLD3LNd8Pseudo_UPD + UINT64_C(4104126976), // VLD3LNd8_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4104128047), // VLD3LNq16 + UINT64_C(0), // VLD3LNq16Pseudo + UINT64_C(0), // VLD3LNq16Pseudo_UPD + UINT64_C(4104128032), // VLD3LNq16_UPD + UINT64_C(4104129103), // VLD3LNq32 + UINT64_C(0), // VLD3LNq32Pseudo + UINT64_C(0), // VLD3LNq32Pseudo_UPD + UINT64_C(4104129088), // VLD3LNq32_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4095738959), // VLD3d16 + UINT64_C(0), // VLD3d16Pseudo + UINT64_C(0), // VLD3d16Pseudo_UPD + UINT64_C(4095738944), // VLD3d16_UPD + UINT64_C(4095739023), // VLD3d32 + UINT64_C(0), // VLD3d32Pseudo + UINT64_C(0), // VLD3d32Pseudo_UPD + UINT64_C(4095739008), // VLD3d32_UPD + UINT64_C(4095738895), // VLD3d8 + UINT64_C(0), // VLD3d8Pseudo + UINT64_C(0), // VLD3d8Pseudo_UPD + UINT64_C(4095738880), // VLD3d8_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4095739215), // VLD3q16 + UINT64_C(0), // VLD3q16Pseudo_UPD + UINT64_C(4095739200), // VLD3q16_UPD + UINT64_C(0), // VLD3q16oddPseudo + UINT64_C(0), // VLD3q16oddPseudo_UPD + UINT64_C(4095739279), // VLD3q32 + UINT64_C(0), // VLD3q32Pseudo_UPD + UINT64_C(4095739264), // VLD3q32_UPD + UINT64_C(0), // VLD3q32oddPseudo + UINT64_C(0), // VLD3q32oddPseudo_UPD + UINT64_C(4095739151), // VLD3q8 + UINT64_C(0), // VLD3q8Pseudo_UPD + UINT64_C(4095739136), // VLD3q8_UPD + UINT64_C(0), // VLD3q8oddPseudo + UINT64_C(0), // VLD3q8oddPseudo_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4104130383), // VLD4DUPd16 + UINT64_C(0), // VLD4DUPd16Pseudo + UINT64_C(0), // VLD4DUPd16Pseudo_UPD + UINT64_C(4104130368), // VLD4DUPd16_UPD + UINT64_C(4104130447), // VLD4DUPd32 + UINT64_C(0), // VLD4DUPd32Pseudo + UINT64_C(0), // VLD4DUPd32Pseudo_UPD + UINT64_C(4104130432), // VLD4DUPd32_UPD + UINT64_C(4104130319), // VLD4DUPd8 + UINT64_C(0), // VLD4DUPd8Pseudo + UINT64_C(0), // VLD4DUPd8Pseudo_UPD + UINT64_C(4104130304), // VLD4DUPd8_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4104130415), // VLD4DUPq16 + UINT64_C(4104130400), // VLD4DUPq16_UPD + UINT64_C(4104130479), // VLD4DUPq32 + UINT64_C(4104130464), // VLD4DUPq32_UPD + UINT64_C(4104130351), // VLD4DUPq8 + UINT64_C(4104130336), // VLD4DUPq8_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4104128271), // VLD4LNd16 + UINT64_C(0), // VLD4LNd16Pseudo + UINT64_C(0), // VLD4LNd16Pseudo_UPD + UINT64_C(4104128256), // VLD4LNd16_UPD + UINT64_C(4104129295), // VLD4LNd32 + UINT64_C(0), // VLD4LNd32Pseudo + UINT64_C(0), // VLD4LNd32Pseudo_UPD + UINT64_C(4104129280), // VLD4LNd32_UPD + UINT64_C(4104127247), // VLD4LNd8 + UINT64_C(0), // VLD4LNd8Pseudo + UINT64_C(0), // VLD4LNd8Pseudo_UPD + UINT64_C(4104127232), // VLD4LNd8_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4104128303), // VLD4LNq16 + UINT64_C(0), // VLD4LNq16Pseudo + UINT64_C(0), // VLD4LNq16Pseudo_UPD + UINT64_C(4104128288), // VLD4LNq16_UPD + UINT64_C(4104129359), // VLD4LNq32 + UINT64_C(0), // VLD4LNq32Pseudo + UINT64_C(0), // VLD4LNq32Pseudo_UPD + UINT64_C(4104129344), // VLD4LNq32_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4095737935), // VLD4d16 + UINT64_C(0), // VLD4d16Pseudo + UINT64_C(0), // VLD4d16Pseudo_UPD + UINT64_C(4095737920), // VLD4d16_UPD + UINT64_C(4095737999), // VLD4d32 + UINT64_C(0), // VLD4d32Pseudo + UINT64_C(0), // VLD4d32Pseudo_UPD + UINT64_C(4095737984), // VLD4d32_UPD + UINT64_C(4095737871), // VLD4d8 + UINT64_C(0), // VLD4d8Pseudo + UINT64_C(0), // VLD4d8Pseudo_UPD + UINT64_C(4095737856), // VLD4d8_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4095738191), // VLD4q16 + UINT64_C(0), // VLD4q16Pseudo_UPD + UINT64_C(4095738176), // VLD4q16_UPD + UINT64_C(0), // VLD4q16oddPseudo + UINT64_C(0), // VLD4q16oddPseudo_UPD + UINT64_C(4095738255), // VLD4q32 + UINT64_C(0), // VLD4q32Pseudo_UPD + UINT64_C(4095738240), // VLD4q32_UPD + UINT64_C(0), // VLD4q32oddPseudo + UINT64_C(0), // VLD4q32oddPseudo_UPD + UINT64_C(4095738127), // VLD4q8 + UINT64_C(0), // VLD4q8Pseudo_UPD + UINT64_C(4095738112), // VLD4q8_UPD + UINT64_C(0), // VLD4q8oddPseudo + UINT64_C(0), // VLD4q8oddPseudo_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(221252352), // VLDMDDB_UPD + UINT64_C(210766592), // VLDMDIA + UINT64_C(212863744), // VLDMDIA_UPD + UINT64_C(0), // VLDMQIA + UINT64_C(221252096), // VLDMSDB_UPD + UINT64_C(210766336), // VLDMSIA + UINT64_C(212863488), // VLDMSIA_UPD + UINT64_C(219155200), // VLDRD + UINT64_C(219154688), // VLDRH + UINT64_C(219154944), // VLDRS + UINT64_C(204474880), // VLLDM + UINT64_C(203426304), // VLSTM + UINT64_C(4269804288), // VMAXNMD + UINT64_C(4269803776), // VMAXNMH + UINT64_C(4076867344), // VMAXNMNDf + UINT64_C(4077915920), // VMAXNMNDh + UINT64_C(4076867408), // VMAXNMNQf + UINT64_C(4077915984), // VMAXNMNQh + UINT64_C(4269804032), // VMAXNMS + UINT64_C(4060090112), // VMAXfd + UINT64_C(4060090176), // VMAXfq + UINT64_C(4061138688), // VMAXhd + UINT64_C(4061138752), // VMAXhq + UINT64_C(4060087872), // VMAXsv16i8 + UINT64_C(4062184960), // VMAXsv2i32 + UINT64_C(4061136384), // VMAXsv4i16 + UINT64_C(4062185024), // VMAXsv4i32 + UINT64_C(4061136448), // VMAXsv8i16 + UINT64_C(4060087808), // VMAXsv8i8 + UINT64_C(4076865088), // VMAXuv16i8 + UINT64_C(4078962176), // VMAXuv2i32 + UINT64_C(4077913600), // VMAXuv4i16 + UINT64_C(4078962240), // VMAXuv4i32 + UINT64_C(4077913664), // VMAXuv8i16 + UINT64_C(4076865024), // VMAXuv8i8 + UINT64_C(4269804352), // VMINNMD + UINT64_C(4269803840), // VMINNMH + UINT64_C(4078964496), // VMINNMNDf + UINT64_C(4080013072), // VMINNMNDh + UINT64_C(4078964560), // VMINNMNQf + UINT64_C(4080013136), // VMINNMNQh + UINT64_C(4269804096), // VMINNMS + UINT64_C(4062187264), // VMINfd + UINT64_C(4062187328), // VMINfq + UINT64_C(4063235840), // VMINhd + UINT64_C(4063235904), // VMINhq + UINT64_C(4060087888), // VMINsv16i8 + UINT64_C(4062184976), // VMINsv2i32 + UINT64_C(4061136400), // VMINsv4i16 + UINT64_C(4062185040), // VMINsv4i32 + UINT64_C(4061136464), // VMINsv8i16 + UINT64_C(4060087824), // VMINsv8i8 + UINT64_C(4076865104), // VMINuv16i8 + UINT64_C(4078962192), // VMINuv2i32 + UINT64_C(4077913616), // VMINuv4i16 + UINT64_C(4078962256), // VMINuv4i32 + UINT64_C(4077913680), // VMINuv8i16 + UINT64_C(4076865040), // VMINuv8i8 + UINT64_C(234883840), // VMLAD + UINT64_C(234883328), // VMLAH + UINT64_C(4070572608), // VMLALslsv2i32 + UINT64_C(4069524032), // VMLALslsv4i16 + UINT64_C(4087349824), // VMLALsluv2i32 + UINT64_C(4086301248), // VMLALsluv4i16 + UINT64_C(4070574080), // VMLALsv2i64 + UINT64_C(4069525504), // VMLALsv4i32 + UINT64_C(4068476928), // VMLALsv8i16 + UINT64_C(4087351296), // VMLALuv2i64 + UINT64_C(4086302720), // VMLALuv4i32 + UINT64_C(4085254144), // VMLALuv8i16 + UINT64_C(234883584), // VMLAS + UINT64_C(4060089616), // VMLAfd + UINT64_C(4060089680), // VMLAfq + UINT64_C(4061138192), // VMLAhd + UINT64_C(4061138256), // VMLAhq + UINT64_C(4070572352), // VMLAslfd + UINT64_C(4087349568), // VMLAslfq + UINT64_C(4069523776), // VMLAslhd + UINT64_C(4086300992), // VMLAslhq + UINT64_C(4070572096), // VMLAslv2i32 + UINT64_C(4069523520), // VMLAslv4i16 + UINT64_C(4087349312), // VMLAslv4i32 + UINT64_C(4086300736), // VMLAslv8i16 + UINT64_C(4060088640), // VMLAv16i8 + UINT64_C(4062185728), // VMLAv2i32 + UINT64_C(4061137152), // VMLAv4i16 + UINT64_C(4062185792), // VMLAv4i32 + UINT64_C(4061137216), // VMLAv8i16 + UINT64_C(4060088576), // VMLAv8i8 + UINT64_C(234883904), // VMLSD + UINT64_C(234883392), // VMLSH + UINT64_C(4070573632), // VMLSLslsv2i32 + UINT64_C(4069525056), // VMLSLslsv4i16 + UINT64_C(4087350848), // VMLSLsluv2i32 + UINT64_C(4086302272), // VMLSLsluv4i16 + UINT64_C(4070574592), // VMLSLsv2i64 + UINT64_C(4069526016), // VMLSLsv4i32 + UINT64_C(4068477440), // VMLSLsv8i16 + UINT64_C(4087351808), // VMLSLuv2i64 + UINT64_C(4086303232), // VMLSLuv4i32 + UINT64_C(4085254656), // VMLSLuv8i16 + UINT64_C(234883648), // VMLSS + UINT64_C(4062186768), // VMLSfd + UINT64_C(4062186832), // VMLSfq + UINT64_C(4063235344), // VMLShd + UINT64_C(4063235408), // VMLShq + UINT64_C(4070573376), // VMLSslfd + UINT64_C(4087350592), // VMLSslfq + UINT64_C(4069524800), // VMLSslhd + UINT64_C(4086302016), // VMLSslhq + UINT64_C(4070573120), // VMLSslv2i32 + UINT64_C(4069524544), // VMLSslv4i16 + UINT64_C(4087350336), // VMLSslv4i32 + UINT64_C(4086301760), // VMLSslv8i16 + UINT64_C(4076865856), // VMLSv16i8 + UINT64_C(4078962944), // VMLSv2i32 + UINT64_C(4077914368), // VMLSv4i16 + UINT64_C(4078963008), // VMLSv4i32 + UINT64_C(4077914432), // VMLSv8i16 + UINT64_C(4076865792), // VMLSv8i8 + UINT64_C(246418240), // VMOVD + UINT64_C(0), + UINT64_C(205523728), // VMOVDRR + UINT64_C(0), + UINT64_C(4272949824), // VMOVH + UINT64_C(234883344), // VMOVHR + UINT64_C(4070574608), // VMOVLsv2i64 + UINT64_C(4069526032), // VMOVLsv4i32 + UINT64_C(4069001744), // VMOVLsv8i16 + UINT64_C(4087351824), // VMOVLuv2i64 + UINT64_C(4086303248), // VMOVLuv4i32 + UINT64_C(4085778960), // VMOVLuv8i16 + UINT64_C(4089053696), // VMOVNv2i32 + UINT64_C(4088791552), // VMOVNv4i16 + UINT64_C(4088529408), // VMOVNv8i8 + UINT64_C(0), + UINT64_C(235931920), // VMOVRH + UINT64_C(206572304), // VMOVRRD + UINT64_C(206572048), // VMOVRRS + UINT64_C(235932176), // VMOVRS + UINT64_C(246417984), // VMOVS + UINT64_C(234883600), // VMOVSR + UINT64_C(205523472), // VMOVSRR + UINT64_C(0), + UINT64_C(4068478544), // VMOVv16i8 + UINT64_C(4068478512), // VMOVv1i64 + UINT64_C(4068478736), // VMOVv2f32 + UINT64_C(4068474896), // VMOVv2i32 + UINT64_C(4068478576), // VMOVv2i64 + UINT64_C(4068478800), // VMOVv4f32 + UINT64_C(4068476944), // VMOVv4i16 + UINT64_C(4068474960), // VMOVv4i32 + UINT64_C(4068477008), // VMOVv8i16 + UINT64_C(4068478480), // VMOVv8i8 + UINT64_C(250677776), // VMRS + UINT64_C(251136528), // VMRS_FPEXC + UINT64_C(251202064), // VMRS_FPINST + UINT64_C(251267600), // VMRS_FPINST2 + UINT64_C(250612240), // VMRS_FPSID + UINT64_C(251070992), // VMRS_MVFR0 + UINT64_C(251005456), // VMRS_MVFR1 + UINT64_C(250939920), // VMRS_MVFR2 + UINT64_C(249629200), // VMSR + UINT64_C(250087952), // VMSR_FPEXC + UINT64_C(250153488), // VMSR_FPINST + UINT64_C(250219024), // VMSR_FPINST2 + UINT64_C(249563664), // VMSR_FPSID + UINT64_C(236980992), // VMULD + UINT64_C(236980480), // VMULH + UINT64_C(4070575616), // VMULLp64 + UINT64_C(4068478464), // VMULLp8 + UINT64_C(4070574656), // VMULLslsv2i32 + UINT64_C(4069526080), // VMULLslsv4i16 + UINT64_C(4087351872), // VMULLsluv2i32 + UINT64_C(4086303296), // VMULLsluv4i16 + UINT64_C(4070575104), // VMULLsv2i64 + UINT64_C(4069526528), // VMULLsv4i32 + UINT64_C(4068477952), // VMULLsv8i16 + UINT64_C(4087352320), // VMULLuv2i64 + UINT64_C(4086303744), // VMULLuv4i32 + UINT64_C(4085255168), // VMULLuv8i16 + UINT64_C(236980736), // VMULS + UINT64_C(4076866832), // VMULfd + UINT64_C(4076866896), // VMULfq + UINT64_C(4077915408), // VMULhd + UINT64_C(4077915472), // VMULhq + UINT64_C(4076865808), // VMULpd + UINT64_C(4076865872), // VMULpq + UINT64_C(4070574400), // VMULslfd + UINT64_C(4087351616), // VMULslfq + UINT64_C(4069525824), // VMULslhd + UINT64_C(4086303040), // VMULslhq + UINT64_C(4070574144), // VMULslv2i32 + UINT64_C(4069525568), // VMULslv4i16 + UINT64_C(4087351360), // VMULslv4i32 + UINT64_C(4086302784), // VMULslv8i16 + UINT64_C(4060088656), // VMULv16i8 + UINT64_C(4062185744), // VMULv2i32 + UINT64_C(4061137168), // VMULv4i16 + UINT64_C(4062185808), // VMULv4i32 + UINT64_C(4061137232), // VMULv8i16 + UINT64_C(4060088592), // VMULv8i8 + UINT64_C(4088399232), // VMVNd + UINT64_C(4088399296), // VMVNq + UINT64_C(4068474928), // VMVNv2i32 + UINT64_C(4068476976), // VMVNv4i16 + UINT64_C(4068474992), // VMVNv4i32 + UINT64_C(4068477040), // VMVNv8i16 + UINT64_C(246483776), // VNEGD + UINT64_C(246483264), // VNEGH + UINT64_C(246483520), // VNEGS + UINT64_C(4088989632), // VNEGf32q + UINT64_C(4088989568), // VNEGfd + UINT64_C(4088727424), // VNEGhd + UINT64_C(4088727488), // VNEGhq + UINT64_C(4088726400), // VNEGs16d + UINT64_C(4088726464), // VNEGs16q + UINT64_C(4088988544), // VNEGs32d + UINT64_C(4088988608), // VNEGs32q + UINT64_C(4088464256), // VNEGs8d + UINT64_C(4088464320), // VNEGs8q + UINT64_C(235932480), // VNMLAD + UINT64_C(235931968), // VNMLAH + UINT64_C(235932224), // VNMLAS + UINT64_C(235932416), // VNMLSD + UINT64_C(235931904), // VNMLSH + UINT64_C(235932160), // VNMLSS + UINT64_C(236981056), // VNMULD + UINT64_C(236980544), // VNMULH + UINT64_C(236980800), // VNMULS + UINT64_C(4063232272), // VORNd + UINT64_C(4063232336), // VORNq + UINT64_C(4062183696), // VORRd + UINT64_C(4068475152), // VORRiv2i32 + UINT64_C(4068477200), // VORRiv4i16 + UINT64_C(4068475216), // VORRiv4i32 + UINT64_C(4068477264), // VORRiv8i16 + UINT64_C(4062183760), // VORRq + UINT64_C(4088399424), // VPADALsv16i8 + UINT64_C(4088923648), // VPADALsv2i32 + UINT64_C(4088661504), // VPADALsv4i16 + UINT64_C(4088923712), // VPADALsv4i32 + UINT64_C(4088661568), // VPADALsv8i16 + UINT64_C(4088399360), // VPADALsv8i8 + UINT64_C(4088399552), // VPADALuv16i8 + UINT64_C(4088923776), // VPADALuv2i32 + UINT64_C(4088661632), // VPADALuv4i16 + UINT64_C(4088923840), // VPADALuv4i32 + UINT64_C(4088661696), // VPADALuv8i16 + UINT64_C(4088399488), // VPADALuv8i8 + UINT64_C(4088398400), // VPADDLsv16i8 + UINT64_C(4088922624), // VPADDLsv2i32 + UINT64_C(4088660480), // VPADDLsv4i16 + UINT64_C(4088922688), // VPADDLsv4i32 + UINT64_C(4088660544), // VPADDLsv8i16 + UINT64_C(4088398336), // VPADDLsv8i8 + UINT64_C(4088398528), // VPADDLuv16i8 + UINT64_C(4088922752), // VPADDLuv2i32 + UINT64_C(4088660608), // VPADDLuv4i16 + UINT64_C(4088922816), // VPADDLuv4i32 + UINT64_C(4088660672), // VPADDLuv8i16 + UINT64_C(4088398464), // VPADDLuv8i8 + UINT64_C(4076866816), // VPADDf + UINT64_C(4077915392), // VPADDh + UINT64_C(4061137680), // VPADDi16 + UINT64_C(4062186256), // VPADDi32 + UINT64_C(4060089104), // VPADDi8 + UINT64_C(4076867328), // VPMAXf + UINT64_C(4077915904), // VPMAXh + UINT64_C(4061137408), // VPMAXs16 + UINT64_C(4062185984), // VPMAXs32 + UINT64_C(4060088832), // VPMAXs8 + UINT64_C(4077914624), // VPMAXu16 + UINT64_C(4078963200), // VPMAXu32 + UINT64_C(4076866048), // VPMAXu8 + UINT64_C(4078964480), // VPMINf + UINT64_C(4080013056), // VPMINh + UINT64_C(4061137424), // VPMINs16 + UINT64_C(4062186000), // VPMINs32 + UINT64_C(4060088848), // VPMINs8 + UINT64_C(4077914640), // VPMINu16 + UINT64_C(4078963216), // VPMINu32 + UINT64_C(4076866064), // VPMINu8 + UINT64_C(4088399680), // VQABSv16i8 + UINT64_C(4088923904), // VQABSv2i32 + UINT64_C(4088661760), // VQABSv4i16 + UINT64_C(4088923968), // VQABSv4i32 + UINT64_C(4088661824), // VQABSv8i16 + UINT64_C(4088399616), // VQABSv8i8 + UINT64_C(4060086352), // VQADDsv16i8 + UINT64_C(4063232016), // VQADDsv1i64 + UINT64_C(4062183440), // VQADDsv2i32 + UINT64_C(4063232080), // VQADDsv2i64 + UINT64_C(4061134864), // VQADDsv4i16 + UINT64_C(4062183504), // VQADDsv4i32 + UINT64_C(4061134928), // VQADDsv8i16 + UINT64_C(4060086288), // VQADDsv8i8 + UINT64_C(4076863568), // VQADDuv16i8 + UINT64_C(4080009232), // VQADDuv1i64 + UINT64_C(4078960656), // VQADDuv2i32 + UINT64_C(4080009296), // VQADDuv2i64 + UINT64_C(4077912080), // VQADDuv4i16 + UINT64_C(4078960720), // VQADDuv4i32 + UINT64_C(4077912144), // VQADDuv8i16 + UINT64_C(4076863504), // VQADDuv8i8 + UINT64_C(4070572864), // VQDMLALslv2i32 + UINT64_C(4069524288), // VQDMLALslv4i16 + UINT64_C(4070574336), // VQDMLALv2i64 + UINT64_C(4069525760), // VQDMLALv4i32 + UINT64_C(4070573888), // VQDMLSLslv2i32 + UINT64_C(4069525312), // VQDMLSLslv4i16 + UINT64_C(4070574848), // VQDMLSLv2i64 + UINT64_C(4069526272), // VQDMLSLv4i32 + UINT64_C(4070575168), // VQDMULHslv2i32 + UINT64_C(4069526592), // VQDMULHslv4i16 + UINT64_C(4087352384), // VQDMULHslv4i32 + UINT64_C(4086303808), // VQDMULHslv8i16 + UINT64_C(4062186240), // VQDMULHv2i32 + UINT64_C(4061137664), // VQDMULHv4i16 + UINT64_C(4062186304), // VQDMULHv4i32 + UINT64_C(4061137728), // VQDMULHv8i16 + UINT64_C(4070574912), // VQDMULLslv2i32 + UINT64_C(4069526336), // VQDMULLslv4i16 + UINT64_C(4070575360), // VQDMULLv2i64 + UINT64_C(4069526784), // VQDMULLv4i32 + UINT64_C(4089053760), // VQMOVNsuv2i32 + UINT64_C(4088791616), // VQMOVNsuv4i16 + UINT64_C(4088529472), // VQMOVNsuv8i8 + UINT64_C(4089053824), // VQMOVNsv2i32 + UINT64_C(4088791680), // VQMOVNsv4i16 + UINT64_C(4088529536), // VQMOVNsv8i8 + UINT64_C(4089053888), // VQMOVNuv2i32 + UINT64_C(4088791744), // VQMOVNuv4i16 + UINT64_C(4088529600), // VQMOVNuv8i8 + UINT64_C(4088399808), // VQNEGv16i8 + UINT64_C(4088924032), // VQNEGv2i32 + UINT64_C(4088661888), // VQNEGv4i16 + UINT64_C(4088924096), // VQNEGv4i32 + UINT64_C(4088661952), // VQNEGv8i16 + UINT64_C(4088399744), // VQNEGv8i8 + UINT64_C(4070575680), // VQRDMLAHslv2i32 + UINT64_C(4069527104), // VQRDMLAHslv4i16 + UINT64_C(4087352896), // VQRDMLAHslv4i32 + UINT64_C(4086304320), // VQRDMLAHslv8i16 + UINT64_C(4078963472), // VQRDMLAHv2i32 + UINT64_C(4077914896), // VQRDMLAHv4i16 + UINT64_C(4078963536), // VQRDMLAHv4i32 + UINT64_C(4077914960), // VQRDMLAHv8i16 + UINT64_C(4070575936), // VQRDMLSHslv2i32 + UINT64_C(4069527360), // VQRDMLSHslv4i16 + UINT64_C(4087353152), // VQRDMLSHslv4i32 + UINT64_C(4086304576), // VQRDMLSHslv8i16 + UINT64_C(4078963728), // VQRDMLSHv2i32 + UINT64_C(4077915152), // VQRDMLSHv4i16 + UINT64_C(4078963792), // VQRDMLSHv4i32 + UINT64_C(4077915216), // VQRDMLSHv8i16 + UINT64_C(4070575424), // VQRDMULHslv2i32 + UINT64_C(4069526848), // VQRDMULHslv4i16 + UINT64_C(4087352640), // VQRDMULHslv4i32 + UINT64_C(4086304064), // VQRDMULHslv8i16 + UINT64_C(4078963456), // VQRDMULHv2i32 + UINT64_C(4077914880), // VQRDMULHv4i16 + UINT64_C(4078963520), // VQRDMULHv4i32 + UINT64_C(4077914944), // VQRDMULHv8i16 + UINT64_C(4060087632), // VQRSHLsv16i8 + UINT64_C(4063233296), // VQRSHLsv1i64 + UINT64_C(4062184720), // VQRSHLsv2i32 + UINT64_C(4063233360), // VQRSHLsv2i64 + UINT64_C(4061136144), // VQRSHLsv4i16 + UINT64_C(4062184784), // VQRSHLsv4i32 + UINT64_C(4061136208), // VQRSHLsv8i16 + UINT64_C(4060087568), // VQRSHLsv8i8 + UINT64_C(4076864848), // VQRSHLuv16i8 + UINT64_C(4080010512), // VQRSHLuv1i64 + UINT64_C(4078961936), // VQRSHLuv2i32 + UINT64_C(4080010576), // VQRSHLuv2i64 + UINT64_C(4077913360), // VQRSHLuv4i16 + UINT64_C(4078962000), // VQRSHLuv4i32 + UINT64_C(4077913424), // VQRSHLuv8i16 + UINT64_C(4076864784), // VQRSHLuv8i8 + UINT64_C(4070574416), // VQRSHRNsv2i32 + UINT64_C(4069525840), // VQRSHRNsv4i16 + UINT64_C(4069001552), // VQRSHRNsv8i8 + UINT64_C(4087351632), // VQRSHRNuv2i32 + UINT64_C(4086303056), // VQRSHRNuv4i16 + UINT64_C(4085778768), // VQRSHRNuv8i8 + UINT64_C(4087351376), // VQRSHRUNv2i32 + UINT64_C(4086302800), // VQRSHRUNv4i16 + UINT64_C(4085778512), // VQRSHRUNv8i8 + UINT64_C(4069001040), // VQSHLsiv16i8 + UINT64_C(4068476816), // VQSHLsiv1i64 + UINT64_C(4070573840), // VQSHLsiv2i32 + UINT64_C(4068476880), // VQSHLsiv2i64 + UINT64_C(4069525264), // VQSHLsiv4i16 + UINT64_C(4070573904), // VQSHLsiv4i32 + UINT64_C(4069525328), // VQSHLsiv8i16 + UINT64_C(4069000976), // VQSHLsiv8i8 + UINT64_C(4085778000), // VQSHLsuv16i8 + UINT64_C(4085253776), // VQSHLsuv1i64 + UINT64_C(4087350800), // VQSHLsuv2i32 + UINT64_C(4085253840), // VQSHLsuv2i64 + UINT64_C(4086302224), // VQSHLsuv4i16 + UINT64_C(4087350864), // VQSHLsuv4i32 + UINT64_C(4086302288), // VQSHLsuv8i16 + UINT64_C(4085777936), // VQSHLsuv8i8 + UINT64_C(4060087376), // VQSHLsv16i8 + UINT64_C(4063233040), // VQSHLsv1i64 + UINT64_C(4062184464), // VQSHLsv2i32 + UINT64_C(4063233104), // VQSHLsv2i64 + UINT64_C(4061135888), // VQSHLsv4i16 + UINT64_C(4062184528), // VQSHLsv4i32 + UINT64_C(4061135952), // VQSHLsv8i16 + UINT64_C(4060087312), // VQSHLsv8i8 + UINT64_C(4085778256), // VQSHLuiv16i8 + UINT64_C(4085254032), // VQSHLuiv1i64 + UINT64_C(4087351056), // VQSHLuiv2i32 + UINT64_C(4085254096), // VQSHLuiv2i64 + UINT64_C(4086302480), // VQSHLuiv4i16 + UINT64_C(4087351120), // VQSHLuiv4i32 + UINT64_C(4086302544), // VQSHLuiv8i16 + UINT64_C(4085778192), // VQSHLuiv8i8 + UINT64_C(4076864592), // VQSHLuv16i8 + UINT64_C(4080010256), // VQSHLuv1i64 + UINT64_C(4078961680), // VQSHLuv2i32 + UINT64_C(4080010320), // VQSHLuv2i64 + UINT64_C(4077913104), // VQSHLuv4i16 + UINT64_C(4078961744), // VQSHLuv4i32 + UINT64_C(4077913168), // VQSHLuv8i16 + UINT64_C(4076864528), // VQSHLuv8i8 + UINT64_C(4070574352), // VQSHRNsv2i32 + UINT64_C(4069525776), // VQSHRNsv4i16 + UINT64_C(4069001488), // VQSHRNsv8i8 + UINT64_C(4087351568), // VQSHRNuv2i32 + UINT64_C(4086302992), // VQSHRNuv4i16 + UINT64_C(4085778704), // VQSHRNuv8i8 + UINT64_C(4087351312), // VQSHRUNv2i32 + UINT64_C(4086302736), // VQSHRUNv4i16 + UINT64_C(4085778448), // VQSHRUNv8i8 + UINT64_C(4060086864), // VQSUBsv16i8 + UINT64_C(4063232528), // VQSUBsv1i64 + UINT64_C(4062183952), // VQSUBsv2i32 + UINT64_C(4063232592), // VQSUBsv2i64 + UINT64_C(4061135376), // VQSUBsv4i16 + UINT64_C(4062184016), // VQSUBsv4i32 + UINT64_C(4061135440), // VQSUBsv8i16 + UINT64_C(4060086800), // VQSUBsv8i8 + UINT64_C(4076864080), // VQSUBuv16i8 + UINT64_C(4080009744), // VQSUBuv1i64 + UINT64_C(4078961168), // VQSUBuv2i32 + UINT64_C(4080009808), // VQSUBuv2i64 + UINT64_C(4077912592), // VQSUBuv4i16 + UINT64_C(4078961232), // VQSUBuv4i32 + UINT64_C(4077912656), // VQSUBuv8i16 + UINT64_C(4076864016), // VQSUBuv8i8 + UINT64_C(4087350272), // VRADDHNv2i32 + UINT64_C(4086301696), // VRADDHNv4i16 + UINT64_C(4085253120), // VRADDHNv8i8 + UINT64_C(4089119744), // VRECPEd + UINT64_C(4089120000), // VRECPEfd + UINT64_C(4089120064), // VRECPEfq + UINT64_C(4088857856), // VRECPEhd + UINT64_C(4088857920), // VRECPEhq + UINT64_C(4089119808), // VRECPEq + UINT64_C(4060090128), // VRECPSfd + UINT64_C(4060090192), // VRECPSfq + UINT64_C(4061138704), // VRECPShd + UINT64_C(4061138768), // VRECPShq + UINT64_C(4088398080), // VREV16d8 + UINT64_C(4088398144), // VREV16q8 + UINT64_C(4088660096), // VREV32d16 + UINT64_C(4088397952), // VREV32d8 + UINT64_C(4088660160), // VREV32q16 + UINT64_C(4088398016), // VREV32q8 + UINT64_C(4088659968), // VREV64d16 + UINT64_C(4088922112), // VREV64d32 + UINT64_C(4088397824), // VREV64d8 + UINT64_C(4088660032), // VREV64q16 + UINT64_C(4088922176), // VREV64q32 + UINT64_C(4088397888), // VREV64q8 + UINT64_C(4060086592), // VRHADDsv16i8 + UINT64_C(4062183680), // VRHADDsv2i32 + UINT64_C(4061135104), // VRHADDsv4i16 + UINT64_C(4062183744), // VRHADDsv4i32 + UINT64_C(4061135168), // VRHADDsv8i16 + UINT64_C(4060086528), // VRHADDsv8i8 + UINT64_C(4076863808), // VRHADDuv16i8 + UINT64_C(4078960896), // VRHADDuv2i32 + UINT64_C(4077912320), // VRHADDuv4i16 + UINT64_C(4078960960), // VRHADDuv4i32 + UINT64_C(4077912384), // VRHADDuv8i16 + UINT64_C(4076863744), // VRHADDuv8i8 + UINT64_C(4273474368), // VRINTAD + UINT64_C(4273473856), // VRINTAH + UINT64_C(4089054464), // VRINTANDf + UINT64_C(4088792320), // VRINTANDh + UINT64_C(4089054528), // VRINTANQf + UINT64_C(4088792384), // VRINTANQh + UINT64_C(4273474112), // VRINTAS + UINT64_C(4273670976), // VRINTMD + UINT64_C(4273670464), // VRINTMH + UINT64_C(4089054848), // VRINTMNDf + UINT64_C(4088792704), // VRINTMNDh + UINT64_C(4089054912), // VRINTMNQf + UINT64_C(4088792768), // VRINTMNQh + UINT64_C(4273670720), // VRINTMS + UINT64_C(4273539904), // VRINTND + UINT64_C(4273539392), // VRINTNH + UINT64_C(4089054208), // VRINTNNDf + UINT64_C(4088792064), // VRINTNNDh + UINT64_C(4089054272), // VRINTNNQf + UINT64_C(4088792128), // VRINTNNQh + UINT64_C(4273539648), // VRINTNS + UINT64_C(4273605440), // VRINTPD + UINT64_C(4273604928), // VRINTPH + UINT64_C(4089055104), // VRINTPNDf + UINT64_C(4088792960), // VRINTPNDh + UINT64_C(4089055168), // VRINTPNQf + UINT64_C(4088793024), // VRINTPNQh + UINT64_C(4273605184), // VRINTPS + UINT64_C(246811456), // VRINTRD + UINT64_C(246810944), // VRINTRH + UINT64_C(246811200), // VRINTRS + UINT64_C(246876992), // VRINTXD + UINT64_C(246876480), // VRINTXH + UINT64_C(4089054336), // VRINTXNDf + UINT64_C(4088792192), // VRINTXNDh + UINT64_C(4089054400), // VRINTXNQf + UINT64_C(4088792256), // VRINTXNQh + UINT64_C(246876736), // VRINTXS + UINT64_C(246811584), // VRINTZD + UINT64_C(246811072), // VRINTZH + UINT64_C(4089054592), // VRINTZNDf + UINT64_C(4088792448), // VRINTZNDh + UINT64_C(4089054656), // VRINTZNQf + UINT64_C(4088792512), // VRINTZNQh + UINT64_C(246811328), // VRINTZS + UINT64_C(4060087616), // VRSHLsv16i8 + UINT64_C(4063233280), // VRSHLsv1i64 + UINT64_C(4062184704), // VRSHLsv2i32 + UINT64_C(4063233344), // VRSHLsv2i64 + UINT64_C(4061136128), // VRSHLsv4i16 + UINT64_C(4062184768), // VRSHLsv4i32 + UINT64_C(4061136192), // VRSHLsv8i16 + UINT64_C(4060087552), // VRSHLsv8i8 + UINT64_C(4076864832), // VRSHLuv16i8 + UINT64_C(4080010496), // VRSHLuv1i64 + UINT64_C(4078961920), // VRSHLuv2i32 + UINT64_C(4080010560), // VRSHLuv2i64 + UINT64_C(4077913344), // VRSHLuv4i16 + UINT64_C(4078961984), // VRSHLuv4i32 + UINT64_C(4077913408), // VRSHLuv8i16 + UINT64_C(4076864768), // VRSHLuv8i8 + UINT64_C(4070574160), // VRSHRNv2i32 + UINT64_C(4069525584), // VRSHRNv4i16 + UINT64_C(4069001296), // VRSHRNv8i8 + UINT64_C(4068999760), // VRSHRsv16i8 + UINT64_C(4068475536), // VRSHRsv1i64 + UINT64_C(4070572560), // VRSHRsv2i32 + UINT64_C(4068475600), // VRSHRsv2i64 + UINT64_C(4069523984), // VRSHRsv4i16 + UINT64_C(4070572624), // VRSHRsv4i32 + UINT64_C(4069524048), // VRSHRsv8i16 + UINT64_C(4068999696), // VRSHRsv8i8 + UINT64_C(4085776976), // VRSHRuv16i8 + UINT64_C(4085252752), // VRSHRuv1i64 + UINT64_C(4087349776), // VRSHRuv2i32 + UINT64_C(4085252816), // VRSHRuv2i64 + UINT64_C(4086301200), // VRSHRuv4i16 + UINT64_C(4087349840), // VRSHRuv4i32 + UINT64_C(4086301264), // VRSHRuv8i16 + UINT64_C(4085776912), // VRSHRuv8i8 + UINT64_C(4089119872), // VRSQRTEd + UINT64_C(4089120128), // VRSQRTEfd + UINT64_C(4089120192), // VRSQRTEfq + UINT64_C(4088857984), // VRSQRTEhd + UINT64_C(4088858048), // VRSQRTEhq + UINT64_C(4089119936), // VRSQRTEq + UINT64_C(4062187280), // VRSQRTSfd + UINT64_C(4062187344), // VRSQRTSfq + UINT64_C(4063235856), // VRSQRTShd + UINT64_C(4063235920), // VRSQRTShq + UINT64_C(4069000016), // VRSRAsv16i8 + UINT64_C(4068475792), // VRSRAsv1i64 + UINT64_C(4070572816), // VRSRAsv2i32 + UINT64_C(4068475856), // VRSRAsv2i64 + UINT64_C(4069524240), // VRSRAsv4i16 + UINT64_C(4070572880), // VRSRAsv4i32 + UINT64_C(4069524304), // VRSRAsv8i16 + UINT64_C(4068999952), // VRSRAsv8i8 + UINT64_C(4085777232), // VRSRAuv16i8 + UINT64_C(4085253008), // VRSRAuv1i64 + UINT64_C(4087350032), // VRSRAuv2i32 + UINT64_C(4085253072), // VRSRAuv2i64 + UINT64_C(4086301456), // VRSRAuv4i16 + UINT64_C(4087350096), // VRSRAuv4i32 + UINT64_C(4086301520), // VRSRAuv8i16 + UINT64_C(4085777168), // VRSRAuv8i8 + UINT64_C(4087350784), // VRSUBHNv2i32 + UINT64_C(4086302208), // VRSUBHNv4i16 + UINT64_C(4085253632), // VRSUBHNv8i8 + UINT64_C(4261415680), // VSELEQD + UINT64_C(4261415168), // VSELEQH + UINT64_C(4261415424), // VSELEQS + UINT64_C(4263512832), // VSELGED + UINT64_C(4263512320), // VSELGEH + UINT64_C(4263512576), // VSELGES + UINT64_C(4264561408), // VSELGTD + UINT64_C(4264560896), // VSELGTH + UINT64_C(4264561152), // VSELGTS + UINT64_C(4262464256), // VSELVSD + UINT64_C(4262463744), // VSELVSH + UINT64_C(4262464000), // VSELVSS + UINT64_C(234883888), // VSETLNi16 + UINT64_C(234883856), // VSETLNi32 + UINT64_C(239078160), // VSETLNi8 + UINT64_C(4088791808), // VSHLLi16 + UINT64_C(4089053952), // VSHLLi32 + UINT64_C(4088529664), // VSHLLi8 + UINT64_C(4070574608), // VSHLLsv2i64 + UINT64_C(4069526032), // VSHLLsv4i32 + UINT64_C(4069001744), // VSHLLsv8i16 + UINT64_C(4087351824), // VSHLLuv2i64 + UINT64_C(4086303248), // VSHLLuv4i32 + UINT64_C(4085778960), // VSHLLuv8i16 + UINT64_C(4069000528), // VSHLiv16i8 + UINT64_C(4068476304), // VSHLiv1i64 + UINT64_C(4070573328), // VSHLiv2i32 + UINT64_C(4068476368), // VSHLiv2i64 + UINT64_C(4069524752), // VSHLiv4i16 + UINT64_C(4070573392), // VSHLiv4i32 + UINT64_C(4069524816), // VSHLiv8i16 + UINT64_C(4069000464), // VSHLiv8i8 + UINT64_C(4060087360), // VSHLsv16i8 + UINT64_C(4063233024), // VSHLsv1i64 + UINT64_C(4062184448), // VSHLsv2i32 + UINT64_C(4063233088), // VSHLsv2i64 + UINT64_C(4061135872), // VSHLsv4i16 + UINT64_C(4062184512), // VSHLsv4i32 + UINT64_C(4061135936), // VSHLsv8i16 + UINT64_C(4060087296), // VSHLsv8i8 + UINT64_C(4076864576), // VSHLuv16i8 + UINT64_C(4080010240), // VSHLuv1i64 + UINT64_C(4078961664), // VSHLuv2i32 + UINT64_C(4080010304), // VSHLuv2i64 + UINT64_C(4077913088), // VSHLuv4i16 + UINT64_C(4078961728), // VSHLuv4i32 + UINT64_C(4077913152), // VSHLuv8i16 + UINT64_C(4076864512), // VSHLuv8i8 + UINT64_C(4070574096), // VSHRNv2i32 + UINT64_C(4069525520), // VSHRNv4i16 + UINT64_C(4069001232), // VSHRNv8i8 + UINT64_C(4068999248), // VSHRsv16i8 + UINT64_C(4068475024), // VSHRsv1i64 + UINT64_C(4070572048), // VSHRsv2i32 + UINT64_C(4068475088), // VSHRsv2i64 + UINT64_C(4069523472), // VSHRsv4i16 + UINT64_C(4070572112), // VSHRsv4i32 + UINT64_C(4069523536), // VSHRsv8i16 + UINT64_C(4068999184), // VSHRsv8i8 + UINT64_C(4085776464), // VSHRuv16i8 + UINT64_C(4085252240), // VSHRuv1i64 + UINT64_C(4087349264), // VSHRuv2i32 + UINT64_C(4085252304), // VSHRuv2i64 + UINT64_C(4086300688), // VSHRuv4i16 + UINT64_C(4087349328), // VSHRuv4i32 + UINT64_C(4086300752), // VSHRuv8i16 + UINT64_C(4085776400), // VSHRuv8i8 + UINT64_C(247073600), // VSHTOD + UINT64_C(247073088), // VSHTOH + UINT64_C(247073344), // VSHTOS + UINT64_C(246942656), // VSITOD + UINT64_C(246942144), // VSITOH + UINT64_C(246942400), // VSITOS + UINT64_C(4085777744), // VSLIv16i8 + UINT64_C(4085253520), // VSLIv1i64 + UINT64_C(4087350544), // VSLIv2i32 + UINT64_C(4085253584), // VSLIv2i64 + UINT64_C(4086301968), // VSLIv4i16 + UINT64_C(4087350608), // VSLIv4i32 + UINT64_C(4086302032), // VSLIv8i16 + UINT64_C(4085777680), // VSLIv8i8 + UINT64_C(247073728), // VSLTOD + UINT64_C(247073216), // VSLTOH + UINT64_C(247073472), // VSLTOS + UINT64_C(246483904), // VSQRTD + UINT64_C(246483392), // VSQRTH + UINT64_C(246483648), // VSQRTS + UINT64_C(4068999504), // VSRAsv16i8 + UINT64_C(4068475280), // VSRAsv1i64 + UINT64_C(4070572304), // VSRAsv2i32 + UINT64_C(4068475344), // VSRAsv2i64 + UINT64_C(4069523728), // VSRAsv4i16 + UINT64_C(4070572368), // VSRAsv4i32 + UINT64_C(4069523792), // VSRAsv8i16 + UINT64_C(4068999440), // VSRAsv8i8 + UINT64_C(4085776720), // VSRAuv16i8 + UINT64_C(4085252496), // VSRAuv1i64 + UINT64_C(4087349520), // VSRAuv2i32 + UINT64_C(4085252560), // VSRAuv2i64 + UINT64_C(4086300944), // VSRAuv4i16 + UINT64_C(4087349584), // VSRAuv4i32 + UINT64_C(4086301008), // VSRAuv8i16 + UINT64_C(4085776656), // VSRAuv8i8 + UINT64_C(4085777488), // VSRIv16i8 + UINT64_C(4085253264), // VSRIv1i64 + UINT64_C(4087350288), // VSRIv2i32 + UINT64_C(4085253328), // VSRIv2i64 + UINT64_C(4086301712), // VSRIv4i16 + UINT64_C(4087350352), // VSRIv4i32 + UINT64_C(4086301776), // VSRIv8i16 + UINT64_C(4085777424), // VSRIv8i8 + UINT64_C(4102030351), // VST1LNd16 + UINT64_C(4102030336), // VST1LNd16_UPD + UINT64_C(4102031375), // VST1LNd32 + UINT64_C(4102031360), // VST1LNd32_UPD + UINT64_C(4102029327), // VST1LNd8 + UINT64_C(4102029312), // VST1LNd8_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), // VST1LNq16Pseudo + UINT64_C(0), // VST1LNq16Pseudo_UPD + UINT64_C(0), // VST1LNq32Pseudo + UINT64_C(0), // VST1LNq32Pseudo_UPD + UINT64_C(0), // VST1LNq8Pseudo + UINT64_C(0), // VST1LNq8Pseudo_UPD + UINT64_C(4093642575), // VST1d16 + UINT64_C(4093641295), // VST1d16Q + UINT64_C(4093641293), // VST1d16Qwb_fixed + UINT64_C(4093641280), // VST1d16Qwb_register + UINT64_C(4093642319), // VST1d16T + UINT64_C(4093642317), // VST1d16Twb_fixed + UINT64_C(4093642304), // VST1d16Twb_register + UINT64_C(4093642573), // VST1d16wb_fixed + UINT64_C(4093642560), // VST1d16wb_register + UINT64_C(4093642639), // VST1d32 + UINT64_C(4093641359), // VST1d32Q + UINT64_C(4093641357), // VST1d32Qwb_fixed + UINT64_C(4093641344), // VST1d32Qwb_register + UINT64_C(4093642383), // VST1d32T + UINT64_C(4093642381), // VST1d32Twb_fixed + UINT64_C(4093642368), // VST1d32Twb_register + UINT64_C(4093642637), // VST1d32wb_fixed + UINT64_C(4093642624), // VST1d32wb_register + UINT64_C(4093642703), // VST1d64 + UINT64_C(4093641423), // VST1d64Q + UINT64_C(0), // VST1d64QPseudo + UINT64_C(0), // VST1d64QPseudoWB_fixed + UINT64_C(0), // VST1d64QPseudoWB_register + UINT64_C(4093641421), // VST1d64Qwb_fixed + UINT64_C(4093641408), // VST1d64Qwb_register + UINT64_C(4093642447), // VST1d64T + UINT64_C(0), // VST1d64TPseudo + UINT64_C(0), // VST1d64TPseudoWB_fixed + UINT64_C(0), // VST1d64TPseudoWB_register + UINT64_C(4093642445), // VST1d64Twb_fixed + UINT64_C(4093642432), // VST1d64Twb_register + UINT64_C(4093642701), // VST1d64wb_fixed + UINT64_C(4093642688), // VST1d64wb_register + UINT64_C(4093642511), // VST1d8 + UINT64_C(4093641231), // VST1d8Q + UINT64_C(4093641229), // VST1d8Qwb_fixed + UINT64_C(4093641216), // VST1d8Qwb_register + UINT64_C(4093642255), // VST1d8T + UINT64_C(4093642253), // VST1d8Twb_fixed + UINT64_C(4093642240), // VST1d8Twb_register + UINT64_C(4093642509), // VST1d8wb_fixed + UINT64_C(4093642496), // VST1d8wb_register + UINT64_C(4093643343), // VST1q16 + UINT64_C(4093643341), // VST1q16wb_fixed + UINT64_C(4093643328), // VST1q16wb_register + UINT64_C(4093643407), // VST1q32 + UINT64_C(4093643405), // VST1q32wb_fixed + UINT64_C(4093643392), // VST1q32wb_register + UINT64_C(4093643471), // VST1q64 + UINT64_C(4093643469), // VST1q64wb_fixed + UINT64_C(4093643456), // VST1q64wb_register + UINT64_C(4093643279), // VST1q8 + UINT64_C(4093643277), // VST1q8wb_fixed + UINT64_C(4093643264), // VST1q8wb_register + UINT64_C(4102030607), // VST2LNd16 + UINT64_C(0), // VST2LNd16Pseudo + UINT64_C(0), // VST2LNd16Pseudo_UPD + UINT64_C(4102030592), // VST2LNd16_UPD + UINT64_C(4102031631), // VST2LNd32 + UINT64_C(0), // VST2LNd32Pseudo + UINT64_C(0), // VST2LNd32Pseudo_UPD + UINT64_C(4102031616), // VST2LNd32_UPD + UINT64_C(4102029583), // VST2LNd8 + UINT64_C(0), // VST2LNd8Pseudo + UINT64_C(0), // VST2LNd8Pseudo_UPD + UINT64_C(4102029568), // VST2LNd8_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4102030639), // VST2LNq16 + UINT64_C(0), // VST2LNq16Pseudo + UINT64_C(0), // VST2LNq16Pseudo_UPD + UINT64_C(4102030624), // VST2LNq16_UPD + UINT64_C(4102031695), // VST2LNq32 + UINT64_C(0), // VST2LNq32Pseudo + UINT64_C(0), // VST2LNq32Pseudo_UPD + UINT64_C(4102031680), // VST2LNq32_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4093643087), // VST2b16 + UINT64_C(4093643085), // VST2b16wb_fixed + UINT64_C(4093643072), // VST2b16wb_register + UINT64_C(4093643151), // VST2b32 + UINT64_C(4093643149), // VST2b32wb_fixed + UINT64_C(4093643136), // VST2b32wb_register + UINT64_C(4093643023), // VST2b8 + UINT64_C(4093643021), // VST2b8wb_fixed + UINT64_C(4093643008), // VST2b8wb_register + UINT64_C(4093642831), // VST2d16 + UINT64_C(4093642829), // VST2d16wb_fixed + UINT64_C(4093642816), // VST2d16wb_register + UINT64_C(4093642895), // VST2d32 + UINT64_C(4093642893), // VST2d32wb_fixed + UINT64_C(4093642880), // VST2d32wb_register + UINT64_C(4093642767), // VST2d8 + UINT64_C(4093642765), // VST2d8wb_fixed + UINT64_C(4093642752), // VST2d8wb_register + UINT64_C(4093641551), // VST2q16 + UINT64_C(0), // VST2q16Pseudo + UINT64_C(0), // VST2q16PseudoWB_fixed + UINT64_C(0), // VST2q16PseudoWB_register + UINT64_C(4093641549), // VST2q16wb_fixed + UINT64_C(4093641536), // VST2q16wb_register + UINT64_C(4093641615), // VST2q32 + UINT64_C(0), // VST2q32Pseudo + UINT64_C(0), // VST2q32PseudoWB_fixed + UINT64_C(0), // VST2q32PseudoWB_register + UINT64_C(4093641613), // VST2q32wb_fixed + UINT64_C(4093641600), // VST2q32wb_register + UINT64_C(4093641487), // VST2q8 + UINT64_C(0), // VST2q8Pseudo + UINT64_C(0), // VST2q8PseudoWB_fixed + UINT64_C(0), // VST2q8PseudoWB_register + UINT64_C(4093641485), // VST2q8wb_fixed + UINT64_C(4093641472), // VST2q8wb_register + UINT64_C(4102030863), // VST3LNd16 + UINT64_C(0), // VST3LNd16Pseudo + UINT64_C(0), // VST3LNd16Pseudo_UPD + UINT64_C(4102030848), // VST3LNd16_UPD + UINT64_C(4102031887), // VST3LNd32 + UINT64_C(0), // VST3LNd32Pseudo + UINT64_C(0), // VST3LNd32Pseudo_UPD + UINT64_C(4102031872), // VST3LNd32_UPD + UINT64_C(4102029839), // VST3LNd8 + UINT64_C(0), // VST3LNd8Pseudo + UINT64_C(0), // VST3LNd8Pseudo_UPD + UINT64_C(4102029824), // VST3LNd8_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4102030895), // VST3LNq16 + UINT64_C(0), // VST3LNq16Pseudo + UINT64_C(0), // VST3LNq16Pseudo_UPD + UINT64_C(4102030880), // VST3LNq16_UPD + UINT64_C(4102031951), // VST3LNq32 + UINT64_C(0), // VST3LNq32Pseudo + UINT64_C(0), // VST3LNq32Pseudo_UPD + UINT64_C(4102031936), // VST3LNq32_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4093641807), // VST3d16 + UINT64_C(0), // VST3d16Pseudo + UINT64_C(0), // VST3d16Pseudo_UPD + UINT64_C(4093641792), // VST3d16_UPD + UINT64_C(4093641871), // VST3d32 + UINT64_C(0), // VST3d32Pseudo + UINT64_C(0), // VST3d32Pseudo_UPD + UINT64_C(4093641856), // VST3d32_UPD + UINT64_C(4093641743), // VST3d8 + UINT64_C(0), // VST3d8Pseudo + UINT64_C(0), // VST3d8Pseudo_UPD + UINT64_C(4093641728), // VST3d8_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4093642063), // VST3q16 + UINT64_C(0), // VST3q16Pseudo_UPD + UINT64_C(4093642048), // VST3q16_UPD + UINT64_C(0), // VST3q16oddPseudo + UINT64_C(0), // VST3q16oddPseudo_UPD + UINT64_C(4093642127), // VST3q32 + UINT64_C(0), // VST3q32Pseudo_UPD + UINT64_C(4093642112), // VST3q32_UPD + UINT64_C(0), // VST3q32oddPseudo + UINT64_C(0), // VST3q32oddPseudo_UPD + UINT64_C(4093641999), // VST3q8 + UINT64_C(0), // VST3q8Pseudo_UPD + UINT64_C(4093641984), // VST3q8_UPD + UINT64_C(0), // VST3q8oddPseudo + UINT64_C(0), // VST3q8oddPseudo_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4102031119), // VST4LNd16 + UINT64_C(0), // VST4LNd16Pseudo + UINT64_C(0), // VST4LNd16Pseudo_UPD + UINT64_C(4102031104), // VST4LNd16_UPD + UINT64_C(4102032143), // VST4LNd32 + UINT64_C(0), // VST4LNd32Pseudo + UINT64_C(0), // VST4LNd32Pseudo_UPD + UINT64_C(4102032128), // VST4LNd32_UPD + UINT64_C(4102030095), // VST4LNd8 + UINT64_C(0), // VST4LNd8Pseudo + UINT64_C(0), // VST4LNd8Pseudo_UPD + UINT64_C(4102030080), // VST4LNd8_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4102031151), // VST4LNq16 + UINT64_C(0), // VST4LNq16Pseudo + UINT64_C(0), // VST4LNq16Pseudo_UPD + UINT64_C(4102031136), // VST4LNq16_UPD + UINT64_C(4102032207), // VST4LNq32 + UINT64_C(0), // VST4LNq32Pseudo + UINT64_C(0), // VST4LNq32Pseudo_UPD + UINT64_C(4102032192), // VST4LNq32_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4093640783), // VST4d16 + UINT64_C(0), // VST4d16Pseudo + UINT64_C(0), // VST4d16Pseudo_UPD + UINT64_C(4093640768), // VST4d16_UPD + UINT64_C(4093640847), // VST4d32 + UINT64_C(0), // VST4d32Pseudo + UINT64_C(0), // VST4d32Pseudo_UPD + UINT64_C(4093640832), // VST4d32_UPD + UINT64_C(4093640719), // VST4d8 + UINT64_C(0), // VST4d8Pseudo + UINT64_C(0), // VST4d8Pseudo_UPD + UINT64_C(4093640704), // VST4d8_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4093641039), // VST4q16 + UINT64_C(0), // VST4q16Pseudo_UPD + UINT64_C(4093641024), // VST4q16_UPD + UINT64_C(0), // VST4q16oddPseudo + UINT64_C(0), // VST4q16oddPseudo_UPD + UINT64_C(4093641103), // VST4q32 + UINT64_C(0), // VST4q32Pseudo_UPD + UINT64_C(4093641088), // VST4q32_UPD + UINT64_C(0), // VST4q32oddPseudo + UINT64_C(0), // VST4q32oddPseudo_UPD + UINT64_C(4093640975), // VST4q8 + UINT64_C(0), // VST4q8Pseudo_UPD + UINT64_C(4093640960), // VST4q8_UPD + UINT64_C(0), // VST4q8oddPseudo + UINT64_C(0), // VST4q8oddPseudo_UPD + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(220203776), // VSTMDDB_UPD + UINT64_C(209718016), // VSTMDIA + UINT64_C(211815168), // VSTMDIA_UPD + UINT64_C(0), // VSTMQIA + UINT64_C(220203520), // VSTMSDB_UPD + UINT64_C(209717760), // VSTMSIA + UINT64_C(211814912), // VSTMSIA_UPD + UINT64_C(218106624), // VSTRD + UINT64_C(218106112), // VSTRH + UINT64_C(218106368), // VSTRS + UINT64_C(238029632), // VSUBD + UINT64_C(238029120), // VSUBH + UINT64_C(4070573568), // VSUBHNv2i32 + UINT64_C(4069524992), // VSUBHNv4i16 + UINT64_C(4068476416), // VSUBHNv8i8 + UINT64_C(4070572544), // VSUBLsv2i64 + UINT64_C(4069523968), // VSUBLsv4i32 + UINT64_C(4068475392), // VSUBLsv8i16 + UINT64_C(4087349760), // VSUBLuv2i64 + UINT64_C(4086301184), // VSUBLuv4i32 + UINT64_C(4085252608), // VSUBLuv8i16 + UINT64_C(238029376), // VSUBS + UINT64_C(4070572800), // VSUBWsv2i64 + UINT64_C(4069524224), // VSUBWsv4i32 + UINT64_C(4068475648), // VSUBWsv8i16 + UINT64_C(4087350016), // VSUBWuv2i64 + UINT64_C(4086301440), // VSUBWuv4i32 + UINT64_C(4085252864), // VSUBWuv8i16 + UINT64_C(4062186752), // VSUBfd + UINT64_C(4062186816), // VSUBfq + UINT64_C(4063235328), // VSUBhd + UINT64_C(4063235392), // VSUBhq + UINT64_C(4076865600), // VSUBv16i8 + UINT64_C(4080011264), // VSUBv1i64 + UINT64_C(4078962688), // VSUBv2i32 + UINT64_C(4080011328), // VSUBv2i64 + UINT64_C(4077914112), // VSUBv4i16 + UINT64_C(4078962752), // VSUBv4i32 + UINT64_C(4077914176), // VSUBv8i16 + UINT64_C(4076865536), // VSUBv8i8 + UINT64_C(4088528896), // VSWPd + UINT64_C(4088528960), // VSWPq + UINT64_C(4088399872), // VTBL1 + UINT64_C(4088400128), // VTBL2 + UINT64_C(4088400384), // VTBL3 + UINT64_C(0), // VTBL3Pseudo + UINT64_C(4088400640), // VTBL4 + UINT64_C(0), // VTBL4Pseudo + UINT64_C(4088399936), // VTBX1 + UINT64_C(4088400192), // VTBX2 + UINT64_C(4088400448), // VTBX3 + UINT64_C(0), // VTBX3Pseudo + UINT64_C(4088400704), // VTBX4 + UINT64_C(0), // VTBX4Pseudo + UINT64_C(247335744), // VTOSHD + UINT64_C(247335232), // VTOSHH + UINT64_C(247335488), // VTOSHS + UINT64_C(247270208), // VTOSIRD + UINT64_C(247269696), // VTOSIRH + UINT64_C(247269952), // VTOSIRS + UINT64_C(247270336), // VTOSIZD + UINT64_C(247269824), // VTOSIZH + UINT64_C(247270080), // VTOSIZS + UINT64_C(247335872), // VTOSLD + UINT64_C(247335360), // VTOSLH + UINT64_C(247335616), // VTOSLS + UINT64_C(247401280), // VTOUHD + UINT64_C(247400768), // VTOUHH + UINT64_C(247401024), // VTOUHS + UINT64_C(247204672), // VTOUIRD + UINT64_C(247204160), // VTOUIRH + UINT64_C(247204416), // VTOUIRS + UINT64_C(247204800), // VTOUIZD + UINT64_C(247204288), // VTOUIZH + UINT64_C(247204544), // VTOUIZS + UINT64_C(247401408), // VTOULD + UINT64_C(247400896), // VTOULH + UINT64_C(247401152), // VTOULS + UINT64_C(4088791168), // VTRNd16 + UINT64_C(4089053312), // VTRNd32 + UINT64_C(4088529024), // VTRNd8 + UINT64_C(4088791232), // VTRNq16 + UINT64_C(4089053376), // VTRNq32 + UINT64_C(4088529088), // VTRNq8 + UINT64_C(4060088400), // VTSTv16i8 + UINT64_C(4062185488), // VTSTv2i32 + UINT64_C(4061136912), // VTSTv4i16 + UINT64_C(4062185552), // VTSTv4i32 + UINT64_C(4061136976), // VTSTv8i16 + UINT64_C(4060088336), // VTSTv8i8 + UINT64_C(247139136), // VUHTOD + UINT64_C(247138624), // VUHTOH + UINT64_C(247138880), // VUHTOS + UINT64_C(246942528), // VUITOD + UINT64_C(246942016), // VUITOH + UINT64_C(246942272), // VUITOS + UINT64_C(247139264), // VULTOD + UINT64_C(247138752), // VULTOH + UINT64_C(247139008), // VULTOS + UINT64_C(4088791296), // VUZPd16 + UINT64_C(4088529152), // VUZPd8 + UINT64_C(4088791360), // VUZPq16 + UINT64_C(4089053504), // VUZPq32 + UINT64_C(4088529216), // VUZPq8 + UINT64_C(4088791424), // VZIPd16 + UINT64_C(4088529280), // VZIPd8 + UINT64_C(4088791488), // VZIPq16 + UINT64_C(4089053632), // VZIPq32 + UINT64_C(4088529344), // VZIPq8 + UINT64_C(0), + UINT64_C(0), + UINT64_C(139460608), // sysLDMDA + UINT64_C(141557760), // sysLDMDA_UPD + UINT64_C(156237824), // sysLDMDB + UINT64_C(158334976), // sysLDMDB_UPD + UINT64_C(147849216), // sysLDMIA + UINT64_C(149946368), // sysLDMIA_UPD + UINT64_C(164626432), // sysLDMIB + UINT64_C(166723584), // sysLDMIB_UPD + UINT64_C(138412032), // sysSTMDA + UINT64_C(140509184), // sysSTMDA_UPD + UINT64_C(155189248), // sysSTMDB + UINT64_C(157286400), // sysSTMDB_UPD + UINT64_C(146800640), // sysSTMIA + UINT64_C(148897792), // sysSTMIA_UPD + UINT64_C(163577856), // sysSTMIB + UINT64_C(165675008), // sysSTMIB_UPD + UINT64_C(0), + UINT64_C(4047503360), // t2ADCri + UINT64_C(3946840064), // t2ADCrr + UINT64_C(3946840064), // t2ADCrs + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4043309056), // t2ADDri + UINT64_C(4060086272), // t2ADDri12 + UINT64_C(3942645760), // t2ADDrr + UINT64_C(3942645760), // t2ADDrs + UINT64_C(4061069312), // t2ADR + UINT64_C(4026531840), // t2ANDri + UINT64_C(3925868544), // t2ANDrr + UINT64_C(3925868544), // t2ANDrs + UINT64_C(3931045920), // t2ASRri + UINT64_C(4198559744), // t2ASRrr + UINT64_C(4026568704), // t2B + UINT64_C(4084137984), // t2BFC + UINT64_C(4083154944), // t2BFI + UINT64_C(4028628992), // t2BICri + UINT64_C(3927965696), // t2BICrr + UINT64_C(3927965696), // t2BICrs + UINT64_C(0), + UINT64_C(4089483008), // t2BXJ + UINT64_C(4026564608), // t2Bcc + UINT64_C(3992977408), // t2CDP + UINT64_C(4261412864), // t2CDP2 + UINT64_C(4089417519), // t2CLREX + UINT64_C(4205899904), // t2CLZ + UINT64_C(4044361472), // t2CMNri + UINT64_C(3943698176), // t2CMNzrr + UINT64_C(3943698176), // t2CMNzrs + UINT64_C(4054847232), // t2CMPri + UINT64_C(3954183936), // t2CMPrr + UINT64_C(3954183936), // t2CMPrs + UINT64_C(4088365312), // t2CPS1p + UINT64_C(4088365056), // t2CPS2p + UINT64_C(4088365312), // t2CPS3p + UINT64_C(4206948480), // t2CRC32B + UINT64_C(4207997056), // t2CRC32CB + UINT64_C(4207997072), // t2CRC32CH + UINT64_C(4207997088), // t2CRC32CW + UINT64_C(4206948496), // t2CRC32H + UINT64_C(4206948512), // t2CRC32W + UINT64_C(4088365296), // t2DBG + UINT64_C(4153376769), // t2DCPS1 + UINT64_C(4153376770), // t2DCPS2 + UINT64_C(4153376771), // t2DCPS3 + UINT64_C(4089417552), // t2DMB + UINT64_C(4089417536), // t2DSB + UINT64_C(4034920448), // t2EORri + UINT64_C(3934257152), // t2EORrr + UINT64_C(3934257152), // t2EORrs + UINT64_C(4088365056), // t2HINT + UINT64_C(4158685184), // t2HVC + UINT64_C(4089417568), // t2ISB + UINT64_C(48896), // t2IT + UINT64_C(0), // t2Int_eh_sjlj_setjmp + UINT64_C(0), // t2Int_eh_sjlj_setjmp_nofp + UINT64_C(3905949615), // t2LDA + UINT64_C(3905949583), // t2LDAB + UINT64_C(3905949679), // t2LDAEX + UINT64_C(3905949647), // t2LDAEXB + UINT64_C(3905945855), // t2LDAEXD + UINT64_C(3905949663), // t2LDAEXH + UINT64_C(3905949599), // t2LDAH + UINT64_C(4249878528), // t2LDC2L_OFFSET + UINT64_C(4241489920), // t2LDC2L_OPTION + UINT64_C(4235198464), // t2LDC2L_POST + UINT64_C(4251975680), // t2LDC2L_PRE + UINT64_C(4245684224), // t2LDC2_OFFSET + UINT64_C(4237295616), // t2LDC2_OPTION + UINT64_C(4231004160), // t2LDC2_POST + UINT64_C(4247781376), // t2LDC2_PRE + UINT64_C(3981443072), // t2LDCL_OFFSET + UINT64_C(3973054464), // t2LDCL_OPTION + UINT64_C(3966763008), // t2LDCL_POST + UINT64_C(3983540224), // t2LDCL_PRE + UINT64_C(3977248768), // t2LDC_OFFSET + UINT64_C(3968860160), // t2LDC_OPTION + UINT64_C(3962568704), // t2LDC_POST + UINT64_C(3979345920), // t2LDC_PRE + UINT64_C(3910139904), // t2LDMDB + UINT64_C(3912237056), // t2LDMDB_UPD + UINT64_C(3901751296), // t2LDMIA + UINT64_C(0), + UINT64_C(3903848448), // t2LDMIA_UPD + UINT64_C(4161801728), // t2LDRBT + UINT64_C(4161800448), // t2LDRB_POST + UINT64_C(4161801472), // t2LDRB_PRE + UINT64_C(4170186752), // t2LDRBi12 + UINT64_C(4161801216), // t2LDRBi8 + UINT64_C(4162781184), // t2LDRBpci + UINT64_C(0), + UINT64_C(4161798144), // t2LDRBs + UINT64_C(3899654144), // t2LDRD_POST + UINT64_C(3916431360), // t2LDRD_PRE + UINT64_C(3914334208), // t2LDRDi8 + UINT64_C(3897560832), // t2LDREX + UINT64_C(3905949519), // t2LDREXB + UINT64_C(3905945727), // t2LDREXD + UINT64_C(3905949535), // t2LDREXH + UINT64_C(4163898880), // t2LDRHT + UINT64_C(4163897600), // t2LDRH_POST + UINT64_C(4163898624), // t2LDRH_PRE + UINT64_C(4172283904), // t2LDRHi12 + UINT64_C(4163898368), // t2LDRHi8 + UINT64_C(4164878336), // t2LDRHpci + UINT64_C(0), + UINT64_C(4163895296), // t2LDRHs + UINT64_C(4178578944), // t2LDRSBT + UINT64_C(4178577664), // t2LDRSB_POST + UINT64_C(4178578688), // t2LDRSB_PRE + UINT64_C(4186963968), // t2LDRSBi12 + UINT64_C(4178578432), // t2LDRSBi8 + UINT64_C(4179558400), // t2LDRSBpci + UINT64_C(0), + UINT64_C(4178575360), // t2LDRSBs + UINT64_C(4180676096), // t2LDRSHT + UINT64_C(4180674816), // t2LDRSH_POST + UINT64_C(4180675840), // t2LDRSH_PRE + UINT64_C(4189061120), // t2LDRSHi12 + UINT64_C(4180675584), // t2LDRSHi8 + UINT64_C(4181655552), // t2LDRSHpci + UINT64_C(0), + UINT64_C(4180672512), // t2LDRSHs + UINT64_C(4165996032), // t2LDRT + UINT64_C(4165994752), // t2LDR_POST + UINT64_C(4165995776), // t2LDR_PRE + UINT64_C(4174381056), // t2LDRi12 + UINT64_C(4165995520), // t2LDRi8 + UINT64_C(4166975488), // t2LDRpci + UINT64_C(0), + UINT64_C(0), + UINT64_C(4165992448), // t2LDRs + UINT64_C(0), + UINT64_C(0), + UINT64_C(3931045888), // t2LSLri + UINT64_C(4194365440), // t2LSLrr + UINT64_C(3931045904), // t2LSRri + UINT64_C(4196462592), // t2LSRrr + UINT64_C(3992977424), // t2MCR + UINT64_C(4261412880), // t2MCR2 + UINT64_C(3963617280), // t2MCRR + UINT64_C(4232052736), // t2MCRR2 + UINT64_C(4211081216), // t2MLA + UINT64_C(4211081232), // t2MLS + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4072669184), // t2MOVTi16 + UINT64_C(0), + UINT64_C(0), + UINT64_C(4031709184), // t2MOVi + UINT64_C(4064280576), // t2MOVi16 + UINT64_C(0), + UINT64_C(0), + UINT64_C(3931045888), // t2MOVr + UINT64_C(0), + UINT64_C(0), + UINT64_C(3932094560), // t2MOVsra_flag + UINT64_C(3932094544), // t2MOVsrl_flag + UINT64_C(3994026000), // t2MRC + UINT64_C(4262461456), // t2MRC2 + UINT64_C(3964665856), // t2MRRC + UINT64_C(4233101312), // t2MRRC2 + UINT64_C(4092559360), // t2MRS_AR + UINT64_C(4092559360), // t2MRS_M + UINT64_C(4091576352), // t2MRSbanked + UINT64_C(4093607936), // t2MRSsys_AR + UINT64_C(4085284864), // t2MSR_AR + UINT64_C(4085284864), // t2MSR_M + UINT64_C(4085284896), // t2MSRbanked + UINT64_C(4211142656), // t2MUL + UINT64_C(0), + UINT64_C(4033806336), // t2MVNi + UINT64_C(3933143040), // t2MVNr + UINT64_C(3933143040), // t2MVNs + UINT64_C(4032823296), // t2ORNri + UINT64_C(3932160000), // t2ORNrr + UINT64_C(3932160000), // t2ORNrs + UINT64_C(4030726144), // t2ORRri + UINT64_C(3930062848), // t2ORRrr + UINT64_C(3930062848), // t2ORRrs + UINT64_C(3938451456), // t2PKHBT + UINT64_C(3938451488), // t2PKHTB + UINT64_C(4172345344), // t2PLDWi12 + UINT64_C(4163959808), // t2PLDWi8 + UINT64_C(4163956736), // t2PLDWs + UINT64_C(4170248192), // t2PLDi12 + UINT64_C(4161862656), // t2PLDi8 + UINT64_C(4162842624), // t2PLDpci + UINT64_C(4161859584), // t2PLDs + UINT64_C(4187025408), // t2PLIi12 + UINT64_C(4178639872), // t2PLIi8 + UINT64_C(4179619840), // t2PLIpci + UINT64_C(4178636800), // t2PLIs + UINT64_C(4202754176), // t2QADD + UINT64_C(4203802640), // t2QADD16 + UINT64_C(4202754064), // t2QADD8 + UINT64_C(4204851216), // t2QASX + UINT64_C(4202754192), // t2QDADD + UINT64_C(4202754224), // t2QDSUB + UINT64_C(4209045520), // t2QSAX + UINT64_C(4202754208), // t2QSUB + UINT64_C(4207996944), // t2QSUB16 + UINT64_C(4206948368), // t2QSUB8 + UINT64_C(4203802784), // t2RBIT + UINT64_C(4203802752), // t2REV + UINT64_C(4203802768), // t2REV16 + UINT64_C(4203802800), // t2REVSH + UINT64_C(3893411840), // t2RFEDB + UINT64_C(3895508992), // t2RFEDBW + UINT64_C(3918577664), // t2RFEIA + UINT64_C(3920674816), // t2RFEIAW + UINT64_C(3931045936), // t2RORri + UINT64_C(4200656896), // t2RORrr + UINT64_C(3931045936), // t2RRX + UINT64_C(0), + UINT64_C(0), + UINT64_C(4055891968), // t2RSBri + UINT64_C(3955228672), // t2RSBrr + UINT64_C(3955228672), // t2RSBrs + UINT64_C(4203802624), // t2SADD16 + UINT64_C(4202754048), // t2SADD8 + UINT64_C(4204851200), // t2SASX + UINT64_C(4049600512), // t2SBCri + UINT64_C(3948937216), // t2SBCrr + UINT64_C(3948937216), // t2SBCrs + UINT64_C(4081057792), // t2SBFX + UINT64_C(4220580080), // t2SDIV + UINT64_C(4204851328), // t2SEL + UINT64_C(46608), // t2SETPAN + UINT64_C(3917474175), // t2SG + UINT64_C(4203802656), // t2SHADD16 + UINT64_C(4202754080), // t2SHADD8 + UINT64_C(4204851232), // t2SHASX + UINT64_C(4209045536), // t2SHSAX + UINT64_C(4207996960), // t2SHSUB16 + UINT64_C(4206948384), // t2SHSUB8 + UINT64_C(4159733760), // t2SMC + UINT64_C(4212129792), // t2SMLABB + UINT64_C(4212129808), // t2SMLABT + UINT64_C(4213178368), // t2SMLAD + UINT64_C(4213178384), // t2SMLADX + UINT64_C(4223664128), // t2SMLAL + UINT64_C(4223664256), // t2SMLALBB + UINT64_C(4223664272), // t2SMLALBT + UINT64_C(4223664320), // t2SMLALD + UINT64_C(4223664336), // t2SMLALDX + UINT64_C(4223664288), // t2SMLALTB + UINT64_C(4223664304), // t2SMLALTT + UINT64_C(4212129824), // t2SMLATB + UINT64_C(4212129840), // t2SMLATT + UINT64_C(4214226944), // t2SMLAWB + UINT64_C(4214226960), // t2SMLAWT + UINT64_C(4215275520), // t2SMLSD + UINT64_C(4215275536), // t2SMLSDX + UINT64_C(4224712896), // t2SMLSLD + UINT64_C(4224712912), // t2SMLSLDX + UINT64_C(4216324096), // t2SMMLA + UINT64_C(4216324112), // t2SMMLAR + UINT64_C(4217372672), // t2SMMLS + UINT64_C(4217372688), // t2SMMLSR + UINT64_C(4216385536), // t2SMMUL + UINT64_C(4216385552), // t2SMMULR + UINT64_C(4213239808), // t2SMUAD + UINT64_C(4213239824), // t2SMUADX + UINT64_C(4212191232), // t2SMULBB + UINT64_C(4212191248), // t2SMULBT + UINT64_C(4219469824), // t2SMULL + UINT64_C(4212191264), // t2SMULTB + UINT64_C(4212191280), // t2SMULTT + UINT64_C(4214288384), // t2SMULWB + UINT64_C(4214288400), // t2SMULWT + UINT64_C(4215336960), // t2SMUSD + UINT64_C(4215336976), // t2SMUSDX + UINT64_C(3893215232), // t2SRSDB + UINT64_C(3895312384), // t2SRSDB_UPD + UINT64_C(3918381056), // t2SRSIA + UINT64_C(3920478208), // t2SRSIA_UPD + UINT64_C(4076863488), // t2SSAT + UINT64_C(4078960640), // t2SSAT16 + UINT64_C(4209045504), // t2SSAX + UINT64_C(4207996928), // t2SSUB16 + UINT64_C(4206948352), // t2SSUB8 + UINT64_C(4248829952), // t2STC2L_OFFSET + UINT64_C(4240441344), // t2STC2L_OPTION + UINT64_C(4234149888), // t2STC2L_POST + UINT64_C(4250927104), // t2STC2L_PRE + UINT64_C(4244635648), // t2STC2_OFFSET + UINT64_C(4236247040), // t2STC2_OPTION + UINT64_C(4229955584), // t2STC2_POST + UINT64_C(4246732800), // t2STC2_PRE + UINT64_C(3980394496), // t2STCL_OFFSET + UINT64_C(3972005888), // t2STCL_OPTION + UINT64_C(3965714432), // t2STCL_POST + UINT64_C(3982491648), // t2STCL_PRE + UINT64_C(3976200192), // t2STC_OFFSET + UINT64_C(3967811584), // t2STC_OPTION + UINT64_C(3961520128), // t2STC_POST + UINT64_C(3978297344), // t2STC_PRE + UINT64_C(3904901039), // t2STL + UINT64_C(3904901007), // t2STLB + UINT64_C(3904901088), // t2STLEX + UINT64_C(3904901056), // t2STLEXB + UINT64_C(3904897264), // t2STLEXD + UINT64_C(3904901072), // t2STLEXH + UINT64_C(3904901023), // t2STLH + UINT64_C(3909091328), // t2STMDB + UINT64_C(3911188480), // t2STMDB_UPD + UINT64_C(3900702720), // t2STMIA + UINT64_C(3902799872), // t2STMIA_UPD + UINT64_C(4160753152), // t2STRBT + UINT64_C(4160751872), // t2STRB_POST + UINT64_C(4160752896), // t2STRB_PRE + UINT64_C(0), + UINT64_C(4169138176), // t2STRBi12 + UINT64_C(4160752640), // t2STRBi8 + UINT64_C(4160749568), // t2STRBs + UINT64_C(3898605568), // t2STRD_POST + UINT64_C(3915382784), // t2STRD_PRE + UINT64_C(3913285632), // t2STRDi8 + UINT64_C(3896508416), // t2STREX + UINT64_C(3904900928), // t2STREXB + UINT64_C(3904897136), // t2STREXD + UINT64_C(3904900944), // t2STREXH + UINT64_C(4162850304), // t2STRHT + UINT64_C(4162849024), // t2STRH_POST + UINT64_C(4162850048), // t2STRH_PRE + UINT64_C(0), + UINT64_C(4171235328), // t2STRHi12 + UINT64_C(4162849792), // t2STRHi8 + UINT64_C(4162846720), // t2STRHs + UINT64_C(4164947456), // t2STRT + UINT64_C(4164946176), // t2STR_POST + UINT64_C(4164947200), // t2STR_PRE + UINT64_C(0), + UINT64_C(4173332480), // t2STRi12 + UINT64_C(4164946944), // t2STRi8 + UINT64_C(4164943872), // t2STRs + UINT64_C(4091449088), // t2SUBS_PC_LR + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(4053794816), // t2SUBri + UINT64_C(4070572032), // t2SUBri12 + UINT64_C(3953131520), // t2SUBrr + UINT64_C(3953131520), // t2SUBrs + UINT64_C(4198559872), // t2SXTAB + UINT64_C(4196462720), // t2SXTAB16 + UINT64_C(4194365568), // t2SXTAH + UINT64_C(4199542912), // t2SXTB + UINT64_C(4197445760), // t2SXTB16 + UINT64_C(4195348608), // t2SXTH + UINT64_C(3906007040), // t2TBB + UINT64_C(0), + UINT64_C(3906007056), // t2TBH + UINT64_C(0), + UINT64_C(4035972864), // t2TEQri + UINT64_C(3935309568), // t2TEQrr + UINT64_C(3935309568), // t2TEQrs + UINT64_C(4027584256), // t2TSTri + UINT64_C(3926920960), // t2TSTrr + UINT64_C(3926920960), // t2TSTrs + UINT64_C(3896569856), // t2TT + UINT64_C(3896569984), // t2TTA + UINT64_C(3896570048), // t2TTAT + UINT64_C(3896569920), // t2TTT + UINT64_C(4203802688), // t2UADD16 + UINT64_C(4202754112), // t2UADD8 + UINT64_C(4204851264), // t2UASX + UINT64_C(4089446400), // t2UBFX + UINT64_C(4159741952), // t2UDF + UINT64_C(4222677232), // t2UDIV + UINT64_C(4203802720), // t2UHADD16 + UINT64_C(4202754144), // t2UHADD8 + UINT64_C(4204851296), // t2UHASX + UINT64_C(4209045600), // t2UHSAX + UINT64_C(4207997024), // t2UHSUB16 + UINT64_C(4206948448), // t2UHSUB8 + UINT64_C(4225761376), // t2UMAAL + UINT64_C(4225761280), // t2UMLAL + UINT64_C(4221566976), // t2UMULL + UINT64_C(4203802704), // t2UQADD16 + UINT64_C(4202754128), // t2UQADD8 + UINT64_C(4204851280), // t2UQASX + UINT64_C(4209045584), // t2UQSAX + UINT64_C(4207997008), // t2UQSUB16 + UINT64_C(4206948432), // t2UQSUB8 + UINT64_C(4218482688), // t2USAD8 + UINT64_C(4218421248), // t2USADA8 + UINT64_C(4085252096), // t2USAT + UINT64_C(4087349248), // t2USAT16 + UINT64_C(4209045568), // t2USAX + UINT64_C(4207996992), // t2USUB16 + UINT64_C(4206948416), // t2USUB8 + UINT64_C(4199608448), // t2UXTAB + UINT64_C(4197511296), // t2UXTAB16 + UINT64_C(4195414144), // t2UXTAH + UINT64_C(4200591488), // t2UXTB + UINT64_C(4198494336), // t2UXTB16 + UINT64_C(4196397184), // t2UXTH + UINT64_C(16704), // tADC + UINT64_C(0), + UINT64_C(17408), // tADDhirr + UINT64_C(7168), // tADDi3 + UINT64_C(12288), // tADDi8 + UINT64_C(17512), // tADDrSP + UINT64_C(43008), // tADDrSPi + UINT64_C(6144), // tADDrr + UINT64_C(45056), // tADDspi + UINT64_C(17541), // tADDspr + UINT64_C(0), + UINT64_C(0), + UINT64_C(40960), // tADR + UINT64_C(16384), // tAND + UINT64_C(4096), // tASRri + UINT64_C(16640), // tASRrr + UINT64_C(57344), // tB + UINT64_C(17280), // tBIC + UINT64_C(48640), // tBKPT + UINT64_C(4026585088), // tBL + UINT64_C(18308), // tBLXNSr + UINT64_C(4026580992), // tBLXi + UINT64_C(18304), // tBLXr + UINT64_C(0), + UINT64_C(0), + UINT64_C(18176), // tBX + UINT64_C(18180), // tBXNS + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(53248), // tBcc + UINT64_C(0), + UINT64_C(47360), // tCBNZ + UINT64_C(45312), // tCBZ + UINT64_C(17088), // tCMNz + UINT64_C(17664), // tCMPhir + UINT64_C(10240), // tCMPi8 + UINT64_C(17024), // tCMPr + UINT64_C(46688), // tCPS + UINT64_C(16448), // tEOR + UINT64_C(48896), // tHINT + UINT64_C(47744), // tHLT + UINT64_C(0), // tInt_eh_sjlj_longjmp + UINT64_C(0), // tInt_eh_sjlj_setjmp + UINT64_C(51200), // tLDMIA + UINT64_C(0), + UINT64_C(30720), // tLDRBi + UINT64_C(23552), // tLDRBr + UINT64_C(34816), // tLDRHi + UINT64_C(23040), // tLDRHr + UINT64_C(0), + UINT64_C(0), + UINT64_C(22016), // tLDRSB + UINT64_C(24064), // tLDRSH + UINT64_C(26624), // tLDRi + UINT64_C(18432), // tLDRpci + UINT64_C(0), + UINT64_C(22528), // tLDRr + UINT64_C(38912), // tLDRspi + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), // tLSLri + UINT64_C(16512), // tLSLrr + UINT64_C(2048), // tLSRri + UINT64_C(16576), // tLSRrr + UINT64_C(0), + UINT64_C(0), // tMOVSr + UINT64_C(8192), // tMOVi8 + UINT64_C(17920), // tMOVr + UINT64_C(17216), // tMUL + UINT64_C(17344), // tMVN + UINT64_C(17152), // tORR + UINT64_C(17528), // tPICADD + UINT64_C(48128), // tPOP + UINT64_C(0), + UINT64_C(46080), // tPUSH + UINT64_C(47616), // tREV + UINT64_C(47680), // tREV16 + UINT64_C(47808), // tREVSH + UINT64_C(16832), // tROR + UINT64_C(16960), // tRSB + UINT64_C(16768), // tSBC + UINT64_C(46672), // tSETEND + UINT64_C(49152), // tSTMIA_UPD + UINT64_C(28672), // tSTRBi + UINT64_C(21504), // tSTRBr + UINT64_C(32768), // tSTRHi + UINT64_C(20992), // tSTRHr + UINT64_C(24576), // tSTRi + UINT64_C(20480), // tSTRr + UINT64_C(36864), // tSTRspi + UINT64_C(7680), // tSUBi3 + UINT64_C(14336), // tSUBi8 + UINT64_C(6656), // tSUBrr + UINT64_C(45184), // tSUBspi + UINT64_C(57088), // tSVC + UINT64_C(45632), // tSXTB + UINT64_C(45568), // tSXTH + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(0), + UINT64_C(57086), // tTRAP + UINT64_C(16896), // tTST + UINT64_C(56832), // tUDF + UINT64_C(45760), // tUXTB + UINT64_C(45696), // tUXTH + UINT64_C(0) + }; + const unsigned opcode = MI.getOpcode(); + uint64_t Value = InstBits[opcode]; + uint64_t op = 0; + (void)op; // suppress warning + switch (opcode) { + case ARM::CLREX: + case ARM::TRAP: + case ARM::TRAPNaCl: + case ARM::VLD1LNq16Pseudo: + case ARM::VLD1LNq16Pseudo_UPD: + case ARM::VLD1LNq32Pseudo: + case ARM::VLD1LNq32Pseudo_UPD: + case ARM::VLD1LNq8Pseudo: + case ARM::VLD1LNq8Pseudo_UPD: + case ARM::VLD1d64QPseudo: + case ARM::VLD1d64QPseudoWB_fixed: + case ARM::VLD1d64QPseudoWB_register: + case ARM::VLD1d64TPseudo: + case ARM::VLD1d64TPseudoWB_fixed: + case ARM::VLD1d64TPseudoWB_register: + case ARM::VLD2LNd16Pseudo: + case ARM::VLD2LNd16Pseudo_UPD: + case ARM::VLD2LNd32Pseudo: + case ARM::VLD2LNd32Pseudo_UPD: + case ARM::VLD2LNd8Pseudo: + case ARM::VLD2LNd8Pseudo_UPD: + case ARM::VLD2LNq16Pseudo: + case ARM::VLD2LNq16Pseudo_UPD: + case ARM::VLD2LNq32Pseudo: + case ARM::VLD2LNq32Pseudo_UPD: + case ARM::VLD2q16Pseudo: + case ARM::VLD2q16PseudoWB_fixed: + case ARM::VLD2q16PseudoWB_register: + case ARM::VLD2q32Pseudo: + case ARM::VLD2q32PseudoWB_fixed: + case ARM::VLD2q32PseudoWB_register: + case ARM::VLD2q8Pseudo: + case ARM::VLD2q8PseudoWB_fixed: + case ARM::VLD2q8PseudoWB_register: + case ARM::VLD3DUPd16Pseudo: + case ARM::VLD3DUPd16Pseudo_UPD: + case ARM::VLD3DUPd32Pseudo: + case ARM::VLD3DUPd32Pseudo_UPD: + case ARM::VLD3DUPd8Pseudo: + case ARM::VLD3DUPd8Pseudo_UPD: + case ARM::VLD3LNd16Pseudo: + case ARM::VLD3LNd16Pseudo_UPD: + case ARM::VLD3LNd32Pseudo: + case ARM::VLD3LNd32Pseudo_UPD: + case ARM::VLD3LNd8Pseudo: + case ARM::VLD3LNd8Pseudo_UPD: + case ARM::VLD3LNq16Pseudo: + case ARM::VLD3LNq16Pseudo_UPD: + case ARM::VLD3LNq32Pseudo: + case ARM::VLD3LNq32Pseudo_UPD: + case ARM::VLD3d16Pseudo: + case ARM::VLD3d16Pseudo_UPD: + case ARM::VLD3d32Pseudo: + case ARM::VLD3d32Pseudo_UPD: + case ARM::VLD3d8Pseudo: + case ARM::VLD3d8Pseudo_UPD: + case ARM::VLD3q16Pseudo_UPD: + case ARM::VLD3q16oddPseudo: + case ARM::VLD3q16oddPseudo_UPD: + case ARM::VLD3q32Pseudo_UPD: + case ARM::VLD3q32oddPseudo: + case ARM::VLD3q32oddPseudo_UPD: + case ARM::VLD3q8Pseudo_UPD: + case ARM::VLD3q8oddPseudo: + case ARM::VLD3q8oddPseudo_UPD: + case ARM::VLD4DUPd16Pseudo: + case ARM::VLD4DUPd16Pseudo_UPD: + case ARM::VLD4DUPd32Pseudo: + case ARM::VLD4DUPd32Pseudo_UPD: + case ARM::VLD4DUPd8Pseudo: + case ARM::VLD4DUPd8Pseudo_UPD: + case ARM::VLD4LNd16Pseudo: + case ARM::VLD4LNd16Pseudo_UPD: + case ARM::VLD4LNd32Pseudo: + case ARM::VLD4LNd32Pseudo_UPD: + case ARM::VLD4LNd8Pseudo: + case ARM::VLD4LNd8Pseudo_UPD: + case ARM::VLD4LNq16Pseudo: + case ARM::VLD4LNq16Pseudo_UPD: + case ARM::VLD4LNq32Pseudo: + case ARM::VLD4LNq32Pseudo_UPD: + case ARM::VLD4d16Pseudo: + case ARM::VLD4d16Pseudo_UPD: + case ARM::VLD4d32Pseudo: + case ARM::VLD4d32Pseudo_UPD: + case ARM::VLD4d8Pseudo: + case ARM::VLD4d8Pseudo_UPD: + case ARM::VLD4q16Pseudo_UPD: + case ARM::VLD4q16oddPseudo: + case ARM::VLD4q16oddPseudo_UPD: + case ARM::VLD4q32Pseudo_UPD: + case ARM::VLD4q32oddPseudo: + case ARM::VLD4q32oddPseudo_UPD: + case ARM::VLD4q8Pseudo_UPD: + case ARM::VLD4q8oddPseudo: + case ARM::VLD4q8oddPseudo_UPD: + case ARM::VLDMQIA: + case ARM::VST1LNq16Pseudo: + case ARM::VST1LNq16Pseudo_UPD: + case ARM::VST1LNq32Pseudo: + case ARM::VST1LNq32Pseudo_UPD: + case ARM::VST1LNq8Pseudo: + case ARM::VST1LNq8Pseudo_UPD: + case ARM::VST1d64QPseudo: + case ARM::VST1d64QPseudoWB_fixed: + case ARM::VST1d64QPseudoWB_register: + case ARM::VST1d64TPseudo: + case ARM::VST1d64TPseudoWB_fixed: + case ARM::VST1d64TPseudoWB_register: + case ARM::VST2LNd16Pseudo: + case ARM::VST2LNd16Pseudo_UPD: + case ARM::VST2LNd32Pseudo: + case ARM::VST2LNd32Pseudo_UPD: + case ARM::VST2LNd8Pseudo: + case ARM::VST2LNd8Pseudo_UPD: + case ARM::VST2LNq16Pseudo: + case ARM::VST2LNq16Pseudo_UPD: + case ARM::VST2LNq32Pseudo: + case ARM::VST2LNq32Pseudo_UPD: + case ARM::VST2q16Pseudo: + case ARM::VST2q16PseudoWB_fixed: + case ARM::VST2q16PseudoWB_register: + case ARM::VST2q32Pseudo: + case ARM::VST2q32PseudoWB_fixed: + case ARM::VST2q32PseudoWB_register: + case ARM::VST2q8Pseudo: + case ARM::VST2q8PseudoWB_fixed: + case ARM::VST2q8PseudoWB_register: + case ARM::VST3LNd16Pseudo: + case ARM::VST3LNd16Pseudo_UPD: + case ARM::VST3LNd32Pseudo: + case ARM::VST3LNd32Pseudo_UPD: + case ARM::VST3LNd8Pseudo: + case ARM::VST3LNd8Pseudo_UPD: + case ARM::VST3LNq16Pseudo: + case ARM::VST3LNq16Pseudo_UPD: + case ARM::VST3LNq32Pseudo: + case ARM::VST3LNq32Pseudo_UPD: + case ARM::VST3d16Pseudo: + case ARM::VST3d16Pseudo_UPD: + case ARM::VST3d32Pseudo: + case ARM::VST3d32Pseudo_UPD: + case ARM::VST3d8Pseudo: + case ARM::VST3d8Pseudo_UPD: + case ARM::VST3q16Pseudo_UPD: + case ARM::VST3q16oddPseudo: + case ARM::VST3q16oddPseudo_UPD: + case ARM::VST3q32Pseudo_UPD: + case ARM::VST3q32oddPseudo: + case ARM::VST3q32oddPseudo_UPD: + case ARM::VST3q8Pseudo_UPD: + case ARM::VST3q8oddPseudo: + case ARM::VST3q8oddPseudo_UPD: + case ARM::VST4LNd16Pseudo: + case ARM::VST4LNd16Pseudo_UPD: + case ARM::VST4LNd32Pseudo: + case ARM::VST4LNd32Pseudo_UPD: + case ARM::VST4LNd8Pseudo: + case ARM::VST4LNd8Pseudo_UPD: + case ARM::VST4LNq16Pseudo: + case ARM::VST4LNq16Pseudo_UPD: + case ARM::VST4LNq32Pseudo: + case ARM::VST4LNq32Pseudo_UPD: + case ARM::VST4d16Pseudo: + case ARM::VST4d16Pseudo_UPD: + case ARM::VST4d32Pseudo: + case ARM::VST4d32Pseudo_UPD: + case ARM::VST4d8Pseudo: + case ARM::VST4d8Pseudo_UPD: + case ARM::VST4q16Pseudo_UPD: + case ARM::VST4q16oddPseudo: + case ARM::VST4q16oddPseudo_UPD: + case ARM::VST4q32Pseudo_UPD: + case ARM::VST4q32oddPseudo: + case ARM::VST4q32oddPseudo_UPD: + case ARM::VST4q8Pseudo_UPD: + case ARM::VST4q8oddPseudo: + case ARM::VST4q8oddPseudo_UPD: + case ARM::VSTMQIA: + case ARM::VTBL3Pseudo: + case ARM::VTBL4Pseudo: + case ARM::VTBX3Pseudo: + case ARM::VTBX4Pseudo: + case ARM::t2CLREX: + case ARM::t2DCPS1: + case ARM::t2DCPS2: + case ARM::t2DCPS3: + case ARM::t2Int_eh_sjlj_setjmp: + case ARM::t2Int_eh_sjlj_setjmp_nofp: + case ARM::t2SG: + case ARM::tInt_eh_sjlj_longjmp: + case ARM::tInt_eh_sjlj_setjmp: + case ARM::tTRAP: { + break; + } + case ARM::VRINTAD: + case ARM::VRINTMD: + case ARM::VRINTND: + case ARM::VRINTPD: { + // op: Dd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Dm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + break; + } + case ARM::VMAXNMD: + case ARM::VMINNMD: + case ARM::VSELEQD: + case ARM::VSELGED: + case ARM::VSELGTD: + case ARM::VSELVSD: { + // op: Dd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Dn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: Dm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + break; + } + case ARM::CRC32B: + case ARM::CRC32CB: + case ARM::CRC32CH: + case ARM::CRC32CW: + case ARM::CRC32H: + case ARM::CRC32W: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::t2MRS_AR: + case ARM::t2MRSsys_AR: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + break; + } + case ARM::t2CLZ: + case ARM::t2RBIT: + case ARM::t2REV: + case ARM::t2REV16: + case ARM::t2REVSH: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(15); + break; + } + case ARM::t2MOVsra_flag: + case ARM::t2MOVsrl_flag: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::t2SXTB: + case ARM::t2SXTB16: + case ARM::t2SXTH: + case ARM::t2UXTB: + case ARM::t2UXTB16: + case ARM::t2UXTH: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + // op: rot + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(3)) << 4; + break; + } + case ARM::t2CRC32B: + case ARM::t2CRC32CB: + case ARM::t2CRC32CH: + case ARM::t2CRC32CW: + case ARM::t2CRC32H: + case ARM::t2CRC32W: + case ARM::t2MUL: + case ARM::t2QADD16: + case ARM::t2QADD8: + case ARM::t2QASX: + case ARM::t2QSAX: + case ARM::t2QSUB16: + case ARM::t2QSUB8: + case ARM::t2SADD16: + case ARM::t2SADD8: + case ARM::t2SASX: + case ARM::t2SDIV: + case ARM::t2SEL: + case ARM::t2SHADD16: + case ARM::t2SHADD8: + case ARM::t2SHASX: + case ARM::t2SHSAX: + case ARM::t2SHSUB16: + case ARM::t2SHSUB8: + case ARM::t2SMMUL: + case ARM::t2SMMULR: + case ARM::t2SMUAD: + case ARM::t2SMUADX: + case ARM::t2SMULBB: + case ARM::t2SMULBT: + case ARM::t2SMULTB: + case ARM::t2SMULTT: + case ARM::t2SMULWB: + case ARM::t2SMULWT: + case ARM::t2SMUSD: + case ARM::t2SMUSDX: + case ARM::t2SSAX: + case ARM::t2SSUB16: + case ARM::t2SSUB8: + case ARM::t2UADD16: + case ARM::t2UADD8: + case ARM::t2UASX: + case ARM::t2UDIV: + case ARM::t2UHADD16: + case ARM::t2UHADD8: + case ARM::t2UHASX: + case ARM::t2UHSAX: + case ARM::t2UHSUB16: + case ARM::t2UHSUB8: + case ARM::t2UQADD16: + case ARM::t2UQADD8: + case ARM::t2UQASX: + case ARM::t2UQSAX: + case ARM::t2UQSUB16: + case ARM::t2UQSUB8: + case ARM::t2USAD8: + case ARM::t2USAX: + case ARM::t2USUB16: + case ARM::t2USUB8: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::t2MLA: + case ARM::t2MLS: + case ARM::t2SMLABB: + case ARM::t2SMLABT: + case ARM::t2SMLAD: + case ARM::t2SMLADX: + case ARM::t2SMLATB: + case ARM::t2SMLATT: + case ARM::t2SMLAWB: + case ARM::t2SMLAWT: + case ARM::t2SMLSD: + case ARM::t2SMLSDX: + case ARM::t2SMMLA: + case ARM::t2SMMLAR: + case ARM::t2SMMLS: + case ARM::t2SMMLSR: + case ARM::t2USADA8: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(15); + // op: Ra + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + break; + } + case ARM::t2SXTAB: + case ARM::t2SXTAB16: + case ARM::t2SXTAH: + case ARM::t2UXTAB: + case ARM::t2UXTAB16: + case ARM::t2UXTAH: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(15); + // op: rot + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(3)) << 4; + break; + } + case ARM::t2PKHBT: + case ARM::t2PKHTB: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(15); + // op: sh + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(28)) << 10; + Value |= (op & UINT64_C(3)) << 6; + break; + } + case ARM::t2ADDri12: + case ARM::t2SUBri12: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: imm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(2048)) << 15; + Value |= (op & UINT64_C(1792)) << 4; + Value |= op & UINT64_C(255); + break; + } + case ARM::t2QADD: + case ARM::t2QDADD: + case ARM::t2QDSUB: + case ARM::t2QSUB: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::t2BFI: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: imm + op = getBitfieldInvertedMaskOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(28)) << 10; + Value |= (op & UINT64_C(3)) << 6; + Value |= (op & UINT64_C(992)) >> 5; + break; + } + case ARM::t2SSAT16: + case ARM::t2USAT16: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: sat_imm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::t2SSAT: + case ARM::t2USAT: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: sat_imm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(31); + // op: sh + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(32)) << 16; + Value |= (op & UINT64_C(28)) << 10; + Value |= (op & UINT64_C(3)) << 6; + break; + } + case ARM::t2STREX: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: addr + op = getT2AddrModeImm0_1020s4OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(3840)) << 8; + Value |= op & UINT64_C(255); + break; + } + case ARM::t2MRS_M: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: SYSm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(255); + break; + } + case ARM::t2ADR: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: addr + op = getT2AdrLabelOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(2048)) << 15; + Value |= (op & UINT64_C(4096)) << 11; + Value |= (op & UINT64_C(4096)) << 9; + Value |= (op & UINT64_C(1792)) << 4; + Value |= op & UINT64_C(255); + break; + } + case ARM::t2BFC: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: imm + op = getBitfieldInvertedMaskOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(28)) << 10; + Value |= (op & UINT64_C(3)) << 6; + Value |= (op & UINT64_C(992)) >> 5; + break; + } + case ARM::t2MOVi16: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: imm + op = getHiLo16ImmOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(2048)) << 15; + Value |= (op & UINT64_C(61440)) << 4; + Value |= (op & UINT64_C(1792)) << 4; + Value |= op & UINT64_C(255); + break; + } + case ARM::t2MOVTi16: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: imm + op = getHiLo16ImmOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(2048)) << 15; + Value |= (op & UINT64_C(61440)) << 4; + Value |= (op & UINT64_C(1792)) << 4; + Value |= op & UINT64_C(255); + break; + } + case ARM::t2SBFX: + case ARM::t2UBFX: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: msb + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= op & UINT64_C(31); + // op: lsb + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(28)) << 10; + Value |= (op & UINT64_C(3)) << 6; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::tADR: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(7)) << 8; + // op: addr + op = getThumbAdrLabelOpValue(MI, 1, Fixups, STI); + Value |= op & UINT64_C(255); + break; + } + case ARM::tMOVi8: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(7)) << 8; + // op: imm8 + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(255); + break; + } + case ARM::tMOVr: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(8)) << 4; + Value |= op & UINT64_C(7); + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 3; + break; + } + case ARM::t2STLEX: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(15); + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: addr + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::t2STLEXB: + case ARM::t2STLEXH: + case ARM::t2STREXB: + case ARM::t2STREXH: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(15); + // op: addr + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + break; + } + case ARM::t2STLEXD: + case ARM::t2STREXD: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(15); + // op: addr + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rt2 + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + break; + } + case ARM::tMOVSr: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(7); + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(7)) << 3; + break; + } + case ARM::tADDi3: + case ARM::tSUBi3: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(7); + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(7)) << 3; + // op: imm3 + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(7)) << 6; + break; + } + case ARM::tASRri: + case ARM::tLSLri: + case ARM::tLSRri: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(7); + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(7)) << 3; + // op: imm5 + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 6; + break; + } + case ARM::tMUL: + case ARM::tMVN: + case ARM::tRSB: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(7); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(7)) << 3; + break; + } + case ARM::t2SMLALBB: + case ARM::t2SMLALBT: + case ARM::t2SMLALD: + case ARM::t2SMLALDX: + case ARM::t2SMLALTB: + case ARM::t2SMLALTT: + case ARM::t2SMLSLD: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= op & UINT64_C(15); + // op: Ra + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + break; + } + case ARM::t2SMLSLDX: { + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(15); + // op: Ra + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + break; + } + case ARM::t2SMLAL: + case ARM::t2SMULL: + case ARM::t2UMAAL: + case ARM::t2UMLAL: + case ARM::t2UMULL: { + // op: RdLo + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: RdHi + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::tADDi8: + case ARM::tSUBi8: { + // op: Rdn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(7)) << 8; + // op: imm8 + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= op & UINT64_C(255); + break; + } + case ARM::tADDrSP: { + // op: Rdn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(8)) << 4; + Value |= op & UINT64_C(7); + break; + } + case ARM::tADDhirr: { + // op: Rdn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(8)) << 4; + Value |= op & UINT64_C(7); + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 3; + break; + } + case ARM::tADC: + case ARM::tAND: + case ARM::tASRrr: + case ARM::tBIC: + case ARM::tEOR: + case ARM::tLSLrr: + case ARM::tLSRrr: + case ARM::tORR: + case ARM::tROR: + case ARM::tSBC: { + // op: Rdn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(7); + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(7)) << 3; + break; + } + case ARM::tBX: + case ARM::tBXNS: { + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 3; + break; + } + case ARM::tCMPhir: { + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 3; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(8)) << 4; + Value |= op & UINT64_C(7); + break; + } + case ARM::tREV: + case ARM::tREV16: + case ARM::tREVSH: + case ARM::tSXTB: + case ARM::tSXTH: + case ARM::tUXTB: + case ARM::tUXTH: { + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(7)) << 3; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(7); + break; + } + case ARM::tCMNz: + case ARM::tCMPr: + case ARM::tTST: { + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(7)) << 3; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(7); + break; + } + case ARM::tADDspr: { + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 3; + break; + } + case ARM::tADDrr: + case ARM::tSUBrr: { + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(7)) << 6; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(7)) << 3; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(7); + break; + } + case ARM::RFEDA: + case ARM::RFEDA_UPD: + case ARM::RFEDB: + case ARM::RFEDB_UPD: + case ARM::RFEIA: + case ARM::RFEIA_UPD: + case ARM::RFEIB: + case ARM::RFEIB_UPD: + case ARM::t2RFEDB: + case ARM::t2RFEDBW: + case ARM::t2RFEIA: + case ARM::t2RFEIAW: { + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::t2CMNzrr: + case ARM::t2CMPrr: + case ARM::t2TBB: + case ARM::t2TBH: + case ARM::t2TEQrr: + case ARM::t2TSTrr: { + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::t2CMNzrs: + case ARM::t2CMPrs: + case ARM::t2TEQrs: + case ARM::t2TSTrs: { + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: ShiftedRm + op = getT2SORegOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(3584)) << 3; + Value |= (op & UINT64_C(480)) >> 1; + Value |= op & UINT64_C(15); + break; + } + case ARM::t2CMNri: + case ARM::t2CMPri: + case ARM::t2TEQri: + case ARM::t2TSTri: { + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: imm + op = getT2SOImmOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(2048)) << 15; + Value |= (op & UINT64_C(1792)) << 4; + Value |= op & UINT64_C(255); + break; + } + case ARM::t2STMDB: + case ARM::t2STMIA: { + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: regs + op = getRegisterListOpValue(MI, 3, Fixups, STI); + Value |= op & UINT64_C(16384); + Value |= op & UINT64_C(8191); + break; + } + case ARM::t2LDMDB: + case ARM::t2LDMIA: { + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: regs + op = getRegisterListOpValue(MI, 3, Fixups, STI); + Value |= op & UINT64_C(65535); + break; + } + case ARM::tCMPi8: { + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(7)) << 8; + // op: imm8 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(255); + break; + } + case ARM::tLDMIA: { + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(7)) << 8; + // op: regs + op = getRegisterListOpValue(MI, 3, Fixups, STI); + Value |= op & UINT64_C(255); + break; + } + case ARM::t2TT: + case ARM::t2TTA: + case ARM::t2TTAT: + case ARM::t2TTT: { + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + break; + } + case ARM::t2STMDB_UPD: + case ARM::t2STMIA_UPD: { + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: regs + op = getRegisterListOpValue(MI, 4, Fixups, STI); + Value |= op & UINT64_C(16384); + Value |= op & UINT64_C(8191); + break; + } + case ARM::t2LDMDB_UPD: + case ARM::t2LDMIA_UPD: { + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: regs + op = getRegisterListOpValue(MI, 4, Fixups, STI); + Value |= op & UINT64_C(65535); + break; + } + case ARM::tSTMIA_UPD: { + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(7)) << 8; + // op: regs + op = getRegisterListOpValue(MI, 4, Fixups, STI); + Value |= op & UINT64_C(255); + break; + } + case ARM::t2LDRB_POST: + case ARM::t2LDRH_POST: + case ARM::t2LDRSB_POST: + case ARM::t2LDRSH_POST: + case ARM::t2LDR_POST: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: offset + op = getT2AddrModeImm8OffsetOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(256)) << 1; + Value |= op & UINT64_C(255); + break; + } + case ARM::t2MRRC: + case ARM::t2MRRC2: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rt2 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: cop + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: opc1 + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 4; + // op: CRm + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::t2LDRD_POST: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rt2 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: addr + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: imm + op = getT2Imm8s4OpValue(MI, 4, Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= op & UINT64_C(255); + break; + } + case ARM::t2LDRDi8: + case ARM::t2STRDi8: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rt2 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: addr + op = getT2AddrModeImm8s4OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= (op & UINT64_C(7680)) << 7; + Value |= op & UINT64_C(255); + break; + } + case ARM::t2LDRD_PRE: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rt2 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: addr + op = getT2AddrModeImm8s4OpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= (op & UINT64_C(7680)) << 7; + Value |= op & UINT64_C(255); + break; + } + case ARM::t2LDRBi12: + case ARM::t2LDRHi12: + case ARM::t2LDRSBi12: + case ARM::t2LDRSHi12: + case ARM::t2LDRi12: + case ARM::t2STRBi12: + case ARM::t2STRHi12: + case ARM::t2STRi12: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: addr + op = getAddrModeImm12OpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(122880)) << 3; + Value |= op & UINT64_C(4095); + break; + } + case ARM::t2LDRBpci: + case ARM::t2LDRHpci: + case ARM::t2LDRSBpci: + case ARM::t2LDRSHpci: + case ARM::t2LDRpci: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: addr + op = getAddrModeImm12OpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(4096)) << 11; + Value |= op & UINT64_C(4095); + break; + } + case ARM::t2LDA: + case ARM::t2LDAB: + case ARM::t2LDAEX: + case ARM::t2LDAH: + case ARM::t2STL: + case ARM::t2STLB: + case ARM::t2STLH: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: addr + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::t2LDREX: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: addr + op = getT2AddrModeImm0_1020s4OpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(3840)) << 8; + Value |= op & UINT64_C(255); + break; + } + case ARM::t2LDRBi8: + case ARM::t2LDRHi8: + case ARM::t2LDRSBi8: + case ARM::t2LDRSHi8: + case ARM::t2LDRi8: + case ARM::t2STRBi8: + case ARM::t2STRHi8: + case ARM::t2STRi8: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: addr + op = getT2AddrModeImm8OpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(7680)) << 7; + Value |= (op & UINT64_C(256)) << 1; + Value |= op & UINT64_C(255); + break; + } + case ARM::t2LDRBT: + case ARM::t2LDRHT: + case ARM::t2LDRSBT: + case ARM::t2LDRSHT: + case ARM::t2LDRT: + case ARM::t2STRBT: + case ARM::t2STRHT: + case ARM::t2STRT: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: addr + op = getT2AddrModeImm8OpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(7680)) << 7; + Value |= op & UINT64_C(255); + break; + } + case ARM::t2LDRB_PRE: + case ARM::t2LDRH_PRE: + case ARM::t2LDRSB_PRE: + case ARM::t2LDRSH_PRE: + case ARM::t2LDR_PRE: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: addr + op = getT2AddrModeImm8OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(7680)) << 7; + Value |= (op & UINT64_C(256)) << 1; + Value |= op & UINT64_C(255); + break; + } + case ARM::t2LDRBs: + case ARM::t2LDRHs: + case ARM::t2LDRSBs: + case ARM::t2LDRSHs: + case ARM::t2LDRs: + case ARM::t2STRBs: + case ARM::t2STRHs: + case ARM::t2STRs: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: addr + op = getT2AddrModeSORegOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(960)) << 10; + Value |= (op & UINT64_C(3)) << 4; + Value |= (op & UINT64_C(60)) >> 2; + break; + } + case ARM::MRC2: + case ARM::t2MRC: + case ARM::t2MRC2: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: cop + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: opc1 + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(7)) << 21; + // op: opc2 + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + // op: CRm + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= op & UINT64_C(15); + // op: CRn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::tLDRpci: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(7)) << 8; + // op: addr + op = getAddrModePCOpValue(MI, 1, Fixups, STI); + Value |= op & UINT64_C(255); + break; + } + case ARM::tLDRspi: + case ARM::tSTRspi: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(7)) << 8; + // op: addr + op = getAddrModeThumbSPOpValue(MI, 1, Fixups, STI); + Value |= op & UINT64_C(255); + break; + } + case ARM::tLDRBi: + case ARM::tLDRHi: + case ARM::tLDRi: + case ARM::tSTRBi: + case ARM::tSTRHi: + case ARM::tSTRi: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(7); + // op: addr + op = getAddrModeISOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(255)) << 3; + break; + } + case ARM::tLDRBr: + case ARM::tLDRHr: + case ARM::tLDRSB: + case ARM::tLDRSH: + case ARM::tLDRr: + case ARM::tSTRBr: + case ARM::tSTRHr: + case ARM::tSTRr: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(7); + // op: addr + op = getThumbAddrModeRegRegOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(63)) << 3; + break; + } + case ARM::t2STRB_POST: + case ARM::t2STRH_POST: + case ARM::t2STR_POST: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: offset + op = getT2AddrModeImm8OffsetOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(256)) << 1; + Value |= op & UINT64_C(255); + break; + } + case ARM::t2STRD_POST: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rt2 + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: addr + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: imm + op = getT2Imm8s4OpValue(MI, 4, Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= op & UINT64_C(255); + break; + } + case ARM::t2STRD_PRE: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rt2 + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: addr + op = getT2AddrModeImm8s4OpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= (op & UINT64_C(7680)) << 7; + Value |= op & UINT64_C(255); + break; + } + case ARM::t2STRB_PRE: + case ARM::t2STRH_PRE: + case ARM::t2STR_PRE: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: addr + op = getT2AddrModeImm8OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(7680)) << 7; + Value |= (op & UINT64_C(256)) << 1; + Value |= op & UINT64_C(255); + break; + } + case ARM::MCRR2: + case ARM::MRRC2: + case ARM::t2MCRR: + case ARM::t2MCRR2: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rt2 + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: cop + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: opc1 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 4; + // op: CRm + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::MCR2: + case ARM::t2MCR: + case ARM::t2MCR2: { + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: cop + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: opc1 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(7)) << 21; + // op: opc2 + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + // op: CRm + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= op & UINT64_C(15); + // op: CRn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::t2MSR_M: { + // op: SYSm + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(3072); + Value |= op & UINT64_C(255); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::VCVTASD: + case ARM::VCVTAUD: + case ARM::VCVTMSD: + case ARM::VCVTMUD: + case ARM::VCVTNSD: + case ARM::VCVTNUD: + case ARM::VCVTPSD: + case ARM::VCVTPUD: { + // op: Sd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(1)) << 22; + Value |= (op & UINT64_C(30)) << 11; + // op: Dm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + break; + } + case ARM::VCVTASH: + case ARM::VCVTASS: + case ARM::VCVTAUH: + case ARM::VCVTAUS: + case ARM::VCVTMSH: + case ARM::VCVTMSS: + case ARM::VCVTMUH: + case ARM::VCVTMUS: + case ARM::VCVTNSH: + case ARM::VCVTNSS: + case ARM::VCVTNUH: + case ARM::VCVTNUS: + case ARM::VCVTPSH: + case ARM::VCVTPSS: + case ARM::VCVTPUH: + case ARM::VCVTPUS: + case ARM::VINSH: + case ARM::VMOVH: + case ARM::VRINTAH: + case ARM::VRINTAS: + case ARM::VRINTMH: + case ARM::VRINTMS: + case ARM::VRINTNH: + case ARM::VRINTNS: + case ARM::VRINTPH: + case ARM::VRINTPS: { + // op: Sd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(1)) << 22; + Value |= (op & UINT64_C(30)) << 11; + // op: Sm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(1)) << 5; + Value |= (op & UINT64_C(30)) >> 1; + break; + } + case ARM::VMAXNMH: + case ARM::VMAXNMS: + case ARM::VMINNMH: + case ARM::VMINNMS: + case ARM::VSELEQH: + case ARM::VSELEQS: + case ARM::VSELGEH: + case ARM::VSELGES: + case ARM::VSELGTH: + case ARM::VSELGTS: + case ARM::VSELVSH: + case ARM::VSELVSS: { + // op: Sd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(1)) << 22; + Value |= (op & UINT64_C(30)) << 11; + // op: Sn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(30)) << 15; + Value |= (op & UINT64_C(1)) << 7; + // op: Sm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(1)) << 5; + Value |= (op & UINT64_C(30)) >> 1; + break; + } + case ARM::VDUP16d: + case ARM::VDUP16q: + case ARM::VDUP32d: + case ARM::VDUP32q: + case ARM::VDUP8d: + case ARM::VDUP8q: { + // op: V + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: R + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + Value = NEONThumb2DupPostEncoder(MI, Value, STI); + break; + } + case ARM::VSETLNi32: { + // op: V + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: R + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: lane + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(1)) << 21; + Value = NEONThumb2DupPostEncoder(MI, Value, STI); + break; + } + case ARM::VSETLNi16: { + // op: V + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: R + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: lane + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(2)) << 20; + Value |= (op & UINT64_C(1)) << 6; + Value = NEONThumb2DupPostEncoder(MI, Value, STI); + break; + } + case ARM::VSETLNi8: { + // op: V + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: R + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: lane + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(4)) << 19; + Value |= (op & UINT64_C(3)) << 5; + Value = NEONThumb2DupPostEncoder(MI, Value, STI); + break; + } + case ARM::VGETLNi32: { + // op: V + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: R + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: lane + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(1)) << 21; + Value = NEONThumb2DupPostEncoder(MI, Value, STI); + break; + } + case ARM::VGETLNs16: + case ARM::VGETLNu16: { + // op: V + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: R + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: lane + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(2)) << 20; + Value |= (op & UINT64_C(1)) << 6; + Value = NEONThumb2DupPostEncoder(MI, Value, STI); + break; + } + case ARM::VGETLNs8: + case ARM::VGETLNu8: { + // op: V + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: R + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: lane + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(4)) << 19; + Value |= (op & UINT64_C(3)) << 5; + Value = NEONThumb2DupPostEncoder(MI, Value, STI); + break; + } + case ARM::VLD1LNd8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: lane + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD1d16: + case ARM::VLD1d16T: + case ARM::VLD1d32: + case ARM::VLD1d32T: + case ARM::VLD1d64: + case ARM::VLD1d64T: + case ARM::VLD1d8: + case ARM::VLD1d8T: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD1LNd16: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(48); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(3)) << 6; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD1d16Q: + case ARM::VLD1d32Q: + case ARM::VLD1d64Q: + case ARM::VLD1d8Q: + case ARM::VLD1q16: + case ARM::VLD1q32: + case ARM::VLD1q64: + case ARM::VLD1q8: + case ARM::VLD2b16: + case ARM::VLD2b32: + case ARM::VLD2b8: + case ARM::VLD2d16: + case ARM::VLD2d32: + case ARM::VLD2d8: + case ARM::VLD2q16: + case ARM::VLD2q32: + case ARM::VLD2q8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(48); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD1LNd8_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 4, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD1LNd32_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(16); + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 4, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); + Value |= (op & UINT64_C(1)) << 7; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD1LNd16_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 4, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); + Value |= (op & UINT64_C(3)) << 6; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD1d16Twb_register: + case ARM::VLD1d16wb_register: + case ARM::VLD1d32Twb_register: + case ARM::VLD1d32wb_register: + case ARM::VLD1d64Twb_register: + case ARM::VLD1d64wb_register: + case ARM::VLD1d8Twb_register: + case ARM::VLD1d8wb_register: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= op & UINT64_C(15); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD2LNd32: + case ARM::VLD2LNq32: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); + Value |= (op & UINT64_C(1)) << 7; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD2LNd16: + case ARM::VLD2LNq16: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); + Value |= (op & UINT64_C(3)) << 6; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD2LNd8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD1d16Twb_fixed: + case ARM::VLD1d16wb_fixed: + case ARM::VLD1d32Twb_fixed: + case ARM::VLD1d32wb_fixed: + case ARM::VLD1d64Twb_fixed: + case ARM::VLD1d64wb_fixed: + case ARM::VLD1d8Twb_fixed: + case ARM::VLD1d8wb_fixed: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD1d16Qwb_register: + case ARM::VLD1d32Qwb_register: + case ARM::VLD1d64Qwb_register: + case ARM::VLD1d8Qwb_register: + case ARM::VLD1q16wb_register: + case ARM::VLD1q32wb_register: + case ARM::VLD1q64wb_register: + case ARM::VLD1q8wb_register: + case ARM::VLD2b16wb_register: + case ARM::VLD2b32wb_register: + case ARM::VLD2b8wb_register: + case ARM::VLD2d16wb_register: + case ARM::VLD2d32wb_register: + case ARM::VLD2d8wb_register: + case ARM::VLD2q16wb_register: + case ARM::VLD2q32wb_register: + case ARM::VLD2q8wb_register: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(48); + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= op & UINT64_C(15); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD1d16Qwb_fixed: + case ARM::VLD1d32Qwb_fixed: + case ARM::VLD1d64Qwb_fixed: + case ARM::VLD1d8Qwb_fixed: + case ARM::VLD1q16wb_fixed: + case ARM::VLD1q32wb_fixed: + case ARM::VLD1q64wb_fixed: + case ARM::VLD1q8wb_fixed: + case ARM::VLD2b16wb_fixed: + case ARM::VLD2b32wb_fixed: + case ARM::VLD2b8wb_fixed: + case ARM::VLD2d16wb_fixed: + case ARM::VLD2d32wb_fixed: + case ARM::VLD2d8wb_fixed: + case ARM::VLD2q16wb_fixed: + case ARM::VLD2q32wb_fixed: + case ARM::VLD2q8wb_fixed: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(48); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD3LNd32: + case ARM::VLD3LNq32: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: lane + op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI); + Value |= (op & UINT64_C(1)) << 7; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD3LNd16: + case ARM::VLD3LNq16: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: lane + op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI); + Value |= (op & UINT64_C(3)) << 6; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD3LNd8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: lane + op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD2LNd32_UPD: + case ARM::VLD2LNq32_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 5, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI); + Value |= (op & UINT64_C(1)) << 7; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD2LNd16_UPD: + case ARM::VLD2LNq16_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 5, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI); + Value |= (op & UINT64_C(3)) << 6; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD2LNd8_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 5, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD3d16: + case ARM::VLD3d32: + case ARM::VLD3d8: + case ARM::VLD3q16: + case ARM::VLD3q32: + case ARM::VLD3q8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD3LNd32_UPD: + case ARM::VLD3LNq32_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 4, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 6, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI); + Value |= (op & UINT64_C(1)) << 7; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD3LNd16_UPD: + case ARM::VLD3LNq16_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 4, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 6, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI); + Value |= (op & UINT64_C(3)) << 6; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD3LNd8_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 4, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 6, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD3d16_UPD: + case ARM::VLD3d32_UPD: + case ARM::VLD3d8_UPD: + case ARM::VLD3q16_UPD: + case ARM::VLD3q32_UPD: + case ARM::VLD3q8_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 4, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 6, Fixups, STI); + Value |= op & UINT64_C(15); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD4LNd16: + case ARM::VLD4LNq16: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 4, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI); + Value |= (op & UINT64_C(3)) << 6; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD4LNd8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 4, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD4LNd32: + case ARM::VLD4LNq32: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 4, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(48); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI); + Value |= (op & UINT64_C(1)) << 7; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD4d16: + case ARM::VLD4d32: + case ARM::VLD4d8: + case ARM::VLD4q16: + case ARM::VLD4q32: + case ARM::VLD4q8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 4, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(48); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD4LNd16_UPD: + case ARM::VLD4LNq16_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 5, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 7, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(12), Fixups, STI); + Value |= (op & UINT64_C(3)) << 6; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD4LNd8_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 5, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 7, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(12), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD4LNd32_UPD: + case ARM::VLD4LNq32_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 5, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(48); + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 7, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(12), Fixups, STI); + Value |= (op & UINT64_C(1)) << 7; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD4d16_UPD: + case ARM::VLD4d32_UPD: + case ARM::VLD4d8_UPD: + case ARM::VLD4q16_UPD: + case ARM::VLD4q32_UPD: + case ARM::VLD4q8_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 5, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(48); + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 7, Fixups, STI); + Value |= op & UINT64_C(15); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD1DUPd16: + case ARM::VLD1DUPd32: + case ARM::VLD1DUPd8: + case ARM::VLD1DUPq16: + case ARM::VLD1DUPq32: + case ARM::VLD1DUPq8: + case ARM::VLD2DUPd16: + case ARM::VLD2DUPd16x2: + case ARM::VLD2DUPd32: + case ARM::VLD2DUPd32x2: + case ARM::VLD2DUPd8: + case ARM::VLD2DUPd8x2: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6DupAddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD1DUPd16wb_register: + case ARM::VLD1DUPd32wb_register: + case ARM::VLD1DUPd8wb_register: + case ARM::VLD1DUPq16wb_register: + case ARM::VLD1DUPq32wb_register: + case ARM::VLD1DUPq8wb_register: + case ARM::VLD2DUPd16wb_register: + case ARM::VLD2DUPd16x2wb_register: + case ARM::VLD2DUPd32wb_register: + case ARM::VLD2DUPd32x2wb_register: + case ARM::VLD2DUPd8wb_register: + case ARM::VLD2DUPd8x2wb_register: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6DupAddressOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= op & UINT64_C(15); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD1DUPd16wb_fixed: + case ARM::VLD1DUPd32wb_fixed: + case ARM::VLD1DUPd8wb_fixed: + case ARM::VLD1DUPq16wb_fixed: + case ARM::VLD1DUPq32wb_fixed: + case ARM::VLD1DUPq8wb_fixed: + case ARM::VLD2DUPd16wb_fixed: + case ARM::VLD2DUPd16x2wb_fixed: + case ARM::VLD2DUPd32wb_fixed: + case ARM::VLD2DUPd32x2wb_fixed: + case ARM::VLD2DUPd8wb_fixed: + case ARM::VLD2DUPd8x2wb_fixed: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6DupAddressOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD3DUPd16: + case ARM::VLD3DUPd32: + case ARM::VLD3DUPd8: + case ARM::VLD3DUPq16: + case ARM::VLD3DUPq32: + case ARM::VLD3DUPq8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6DupAddressOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD3DUPd16_UPD: + case ARM::VLD3DUPd32_UPD: + case ARM::VLD3DUPd8_UPD: + case ARM::VLD3DUPq16_UPD: + case ARM::VLD3DUPq32_UPD: + case ARM::VLD3DUPq8_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6DupAddressOpValue(MI, 4, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 6, Fixups, STI); + Value |= op & UINT64_C(15); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD4DUPd32: + case ARM::VLD4DUPq32: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6DupAddressOpValue(MI, 4, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(32)) << 1; + Value |= op & UINT64_C(16); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD4DUPd16: + case ARM::VLD4DUPd8: + case ARM::VLD4DUPq16: + case ARM::VLD4DUPq8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6DupAddressOpValue(MI, 4, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD4DUPd32_UPD: + case ARM::VLD4DUPq32_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6DupAddressOpValue(MI, 5, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(32)) << 1; + Value |= op & UINT64_C(16); + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 7, Fixups, STI); + Value |= op & UINT64_C(15); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD4DUPd16_UPD: + case ARM::VLD4DUPd8_UPD: + case ARM::VLD4DUPq16_UPD: + case ARM::VLD4DUPq8_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6DupAddressOpValue(MI, 5, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 7, Fixups, STI); + Value |= op & UINT64_C(15); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VLD1LNd32: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6OneLane32AddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(48); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(1)) << 7; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VMOVv16i8: + case ARM::VMOVv1i64: + case ARM::VMOVv2f32: + case ARM::VMOVv2i64: + case ARM::VMOVv4f32: + case ARM::VMOVv8i8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: SIMM + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(128)) << 17; + Value |= (op & UINT64_C(112)) << 12; + Value |= op & UINT64_C(15); + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VBICiv2i32: + case ARM::VBICiv4i32: + case ARM::VORRiv2i32: + case ARM::VORRiv4i32: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: SIMM + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(128)) << 17; + Value |= (op & UINT64_C(112)) << 12; + Value |= op & UINT64_C(1536); + Value |= op & UINT64_C(15); + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VMOVv2i32: + case ARM::VMOVv4i32: + case ARM::VMVNv2i32: + case ARM::VMVNv4i32: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: SIMM + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(128)) << 17; + Value |= (op & UINT64_C(112)) << 12; + Value |= op & UINT64_C(3840); + Value |= op & UINT64_C(15); + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VBICiv4i16: + case ARM::VBICiv8i16: + case ARM::VMOVv4i16: + case ARM::VMOVv8i16: + case ARM::VMVNv4i16: + case ARM::VMVNv8i16: + case ARM::VORRiv4i16: + case ARM::VORRiv8i16: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: SIMM + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(128)) << 17; + Value |= (op & UINT64_C(112)) << 12; + Value |= op & UINT64_C(512); + Value |= op & UINT64_C(15); + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VQSHLsiv4i16: + case ARM::VQSHLsiv8i16: + case ARM::VQSHLsuv4i16: + case ARM::VQSHLsuv8i16: + case ARM::VQSHLuiv4i16: + case ARM::VQSHLuiv8i16: + case ARM::VSHLLsv4i32: + case ARM::VSHLLuv4i32: + case ARM::VSHLiv4i16: + case ARM::VSHLiv8i16: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: SIMM + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VQSHLsiv2i32: + case ARM::VQSHLsiv4i32: + case ARM::VQSHLsuv2i32: + case ARM::VQSHLsuv4i32: + case ARM::VQSHLuiv2i32: + case ARM::VQSHLuiv4i32: + case ARM::VSHLLsv2i64: + case ARM::VSHLLuv2i64: + case ARM::VSHLiv2i32: + case ARM::VSHLiv4i32: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: SIMM + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VQSHLsiv1i64: + case ARM::VQSHLsiv2i64: + case ARM::VQSHLsuv1i64: + case ARM::VQSHLsuv2i64: + case ARM::VQSHLuiv1i64: + case ARM::VQSHLuiv2i64: + case ARM::VSHLiv1i64: + case ARM::VSHLiv2i64: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: SIMM + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(63)) << 16; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VQSHLsiv16i8: + case ARM::VQSHLsiv8i8: + case ARM::VQSHLsuv16i8: + case ARM::VQSHLsuv8i8: + case ARM::VQSHLuiv16i8: + case ARM::VQSHLuiv8i8: + case ARM::VSHLLsv8i16: + case ARM::VSHLLuv8i16: + case ARM::VSHLiv16i8: + case ARM::VSHLiv8i8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: SIMM + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(7)) << 16; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VCVTf2xsd: + case ARM::VCVTf2xsq: + case ARM::VCVTf2xud: + case ARM::VCVTf2xuq: + case ARM::VCVTh2xsd: + case ARM::VCVTh2xsq: + case ARM::VCVTh2xud: + case ARM::VCVTh2xuq: + case ARM::VCVTxs2fd: + case ARM::VCVTxs2fq: + case ARM::VCVTxs2hd: + case ARM::VCVTxs2hq: + case ARM::VCVTxu2fd: + case ARM::VCVTxu2fq: + case ARM::VCVTxu2hd: + case ARM::VCVTxu2hq: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: SIMM + op = getNEONVcvtImm32OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(63)) << 16; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VQRSHRNsv4i16: + case ARM::VQRSHRNuv4i16: + case ARM::VQRSHRUNv4i16: + case ARM::VQSHRNsv4i16: + case ARM::VQSHRNuv4i16: + case ARM::VQSHRUNv4i16: + case ARM::VRSHRNv4i16: + case ARM::VRSHRsv4i16: + case ARM::VRSHRsv8i16: + case ARM::VRSHRuv4i16: + case ARM::VRSHRuv8i16: + case ARM::VSHRNv4i16: + case ARM::VSHRsv4i16: + case ARM::VSHRsv8i16: + case ARM::VSHRuv4i16: + case ARM::VSHRuv8i16: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: SIMM + op = getShiftRight16Imm(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VQRSHRNsv2i32: + case ARM::VQRSHRNuv2i32: + case ARM::VQRSHRUNv2i32: + case ARM::VQSHRNsv2i32: + case ARM::VQSHRNuv2i32: + case ARM::VQSHRUNv2i32: + case ARM::VRSHRNv2i32: + case ARM::VRSHRsv2i32: + case ARM::VRSHRsv4i32: + case ARM::VRSHRuv2i32: + case ARM::VRSHRuv4i32: + case ARM::VSHRNv2i32: + case ARM::VSHRsv2i32: + case ARM::VSHRsv4i32: + case ARM::VSHRuv2i32: + case ARM::VSHRuv4i32: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: SIMM + op = getShiftRight32Imm(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VRSHRsv1i64: + case ARM::VRSHRsv2i64: + case ARM::VRSHRuv1i64: + case ARM::VRSHRuv2i64: + case ARM::VSHRsv1i64: + case ARM::VSHRsv2i64: + case ARM::VSHRuv1i64: + case ARM::VSHRuv2i64: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: SIMM + op = getShiftRight64Imm(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(63)) << 16; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VQRSHRNsv8i8: + case ARM::VQRSHRNuv8i8: + case ARM::VQRSHRUNv8i8: + case ARM::VQSHRNsv8i8: + case ARM::VQSHRNuv8i8: + case ARM::VQSHRUNv8i8: + case ARM::VRSHRNv8i8: + case ARM::VRSHRsv16i8: + case ARM::VRSHRsv8i8: + case ARM::VRSHRuv16i8: + case ARM::VRSHRuv8i8: + case ARM::VSHRNv8i8: + case ARM::VSHRsv16i8: + case ARM::VSHRsv8i8: + case ARM::VSHRuv16i8: + case ARM::VSHRuv8i8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: SIMM + op = getShiftRight8Imm(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(7)) << 16; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VDUPLN32d: + case ARM::VDUPLN32q: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(1)) << 19; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VDUPLN16d: + case ARM::VDUPLN16q: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(3)) << 18; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VDUPLN8d: + case ARM::VDUPLN8q: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(7)) << 17; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::AESIMC: + case ARM::AESMC: + case ARM::SHA1H: + case ARM::VABSfd: + case ARM::VABSfq: + case ARM::VABShd: + case ARM::VABShq: + case ARM::VABSv16i8: + case ARM::VABSv2i32: + case ARM::VABSv4i16: + case ARM::VABSv4i32: + case ARM::VABSv8i16: + case ARM::VABSv8i8: + case ARM::VCEQzv16i8: + case ARM::VCEQzv2f32: + case ARM::VCEQzv2i32: + case ARM::VCEQzv4f16: + case ARM::VCEQzv4f32: + case ARM::VCEQzv4i16: + case ARM::VCEQzv4i32: + case ARM::VCEQzv8f16: + case ARM::VCEQzv8i16: + case ARM::VCEQzv8i8: + case ARM::VCGEzv16i8: + case ARM::VCGEzv2f32: + case ARM::VCGEzv2i32: + case ARM::VCGEzv4f16: + case ARM::VCGEzv4f32: + case ARM::VCGEzv4i16: + case ARM::VCGEzv4i32: + case ARM::VCGEzv8f16: + case ARM::VCGEzv8i16: + case ARM::VCGEzv8i8: + case ARM::VCGTzv16i8: + case ARM::VCGTzv2f32: + case ARM::VCGTzv2i32: + case ARM::VCGTzv4f16: + case ARM::VCGTzv4f32: + case ARM::VCGTzv4i16: + case ARM::VCGTzv4i32: + case ARM::VCGTzv8f16: + case ARM::VCGTzv8i16: + case ARM::VCGTzv8i8: + case ARM::VCLEzv16i8: + case ARM::VCLEzv2f32: + case ARM::VCLEzv2i32: + case ARM::VCLEzv4f16: + case ARM::VCLEzv4f32: + case ARM::VCLEzv4i16: + case ARM::VCLEzv4i32: + case ARM::VCLEzv8f16: + case ARM::VCLEzv8i16: + case ARM::VCLEzv8i8: + case ARM::VCLSv16i8: + case ARM::VCLSv2i32: + case ARM::VCLSv4i16: + case ARM::VCLSv4i32: + case ARM::VCLSv8i16: + case ARM::VCLSv8i8: + case ARM::VCLTzv16i8: + case ARM::VCLTzv2f32: + case ARM::VCLTzv2i32: + case ARM::VCLTzv4f16: + case ARM::VCLTzv4f32: + case ARM::VCLTzv4i16: + case ARM::VCLTzv4i32: + case ARM::VCLTzv8f16: + case ARM::VCLTzv8i16: + case ARM::VCLTzv8i8: + case ARM::VCLZv16i8: + case ARM::VCLZv2i32: + case ARM::VCLZv4i16: + case ARM::VCLZv4i32: + case ARM::VCLZv8i16: + case ARM::VCLZv8i8: + case ARM::VCNTd: + case ARM::VCNTq: + case ARM::VCVTf2h: + case ARM::VCVTf2sd: + case ARM::VCVTf2sq: + case ARM::VCVTf2ud: + case ARM::VCVTf2uq: + case ARM::VCVTh2f: + case ARM::VCVTh2sd: + case ARM::VCVTh2sq: + case ARM::VCVTh2ud: + case ARM::VCVTh2uq: + case ARM::VCVTs2fd: + case ARM::VCVTs2fq: + case ARM::VCVTs2hd: + case ARM::VCVTs2hq: + case ARM::VCVTu2fd: + case ARM::VCVTu2fq: + case ARM::VCVTu2hd: + case ARM::VCVTu2hq: + case ARM::VMOVLsv2i64: + case ARM::VMOVLsv4i32: + case ARM::VMOVLsv8i16: + case ARM::VMOVLuv2i64: + case ARM::VMOVLuv4i32: + case ARM::VMOVLuv8i16: + case ARM::VMOVNv2i32: + case ARM::VMOVNv4i16: + case ARM::VMOVNv8i8: + case ARM::VMVNd: + case ARM::VMVNq: + case ARM::VNEGf32q: + case ARM::VNEGfd: + case ARM::VNEGhd: + case ARM::VNEGhq: + case ARM::VNEGs16d: + case ARM::VNEGs16q: + case ARM::VNEGs32d: + case ARM::VNEGs32q: + case ARM::VNEGs8d: + case ARM::VNEGs8q: + case ARM::VPADDLsv16i8: + case ARM::VPADDLsv2i32: + case ARM::VPADDLsv4i16: + case ARM::VPADDLsv4i32: + case ARM::VPADDLsv8i16: + case ARM::VPADDLsv8i8: + case ARM::VPADDLuv16i8: + case ARM::VPADDLuv2i32: + case ARM::VPADDLuv4i16: + case ARM::VPADDLuv4i32: + case ARM::VPADDLuv8i16: + case ARM::VPADDLuv8i8: + case ARM::VQABSv16i8: + case ARM::VQABSv2i32: + case ARM::VQABSv4i16: + case ARM::VQABSv4i32: + case ARM::VQABSv8i16: + case ARM::VQABSv8i8: + case ARM::VQMOVNsuv2i32: + case ARM::VQMOVNsuv4i16: + case ARM::VQMOVNsuv8i8: + case ARM::VQMOVNsv2i32: + case ARM::VQMOVNsv4i16: + case ARM::VQMOVNsv8i8: + case ARM::VQMOVNuv2i32: + case ARM::VQMOVNuv4i16: + case ARM::VQMOVNuv8i8: + case ARM::VQNEGv16i8: + case ARM::VQNEGv2i32: + case ARM::VQNEGv4i16: + case ARM::VQNEGv4i32: + case ARM::VQNEGv8i16: + case ARM::VQNEGv8i8: + case ARM::VRECPEd: + case ARM::VRECPEfd: + case ARM::VRECPEfq: + case ARM::VRECPEhd: + case ARM::VRECPEhq: + case ARM::VRECPEq: + case ARM::VREV16d8: + case ARM::VREV16q8: + case ARM::VREV32d16: + case ARM::VREV32d8: + case ARM::VREV32q16: + case ARM::VREV32q8: + case ARM::VREV64d16: + case ARM::VREV64d32: + case ARM::VREV64d8: + case ARM::VREV64q16: + case ARM::VREV64q32: + case ARM::VREV64q8: + case ARM::VRSQRTEd: + case ARM::VRSQRTEfd: + case ARM::VRSQRTEfq: + case ARM::VRSQRTEhd: + case ARM::VRSQRTEhq: + case ARM::VRSQRTEq: + case ARM::VSHLLi16: + case ARM::VSHLLi32: + case ARM::VSHLLi8: + case ARM::VSWPd: + case ARM::VSWPq: + case ARM::VTRNd16: + case ARM::VTRNd32: + case ARM::VTRNd8: + case ARM::VTRNq16: + case ARM::VTRNq32: + case ARM::VTRNq8: + case ARM::VUZPd16: + case ARM::VUZPd8: + case ARM::VUZPq16: + case ARM::VUZPq32: + case ARM::VUZPq8: + case ARM::VZIPd16: + case ARM::VZIPd8: + case ARM::VZIPq16: + case ARM::VZIPq32: + case ARM::VZIPq8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VCVTANSDf: + case ARM::VCVTANSDh: + case ARM::VCVTANSQf: + case ARM::VCVTANSQh: + case ARM::VCVTANUDf: + case ARM::VCVTANUDh: + case ARM::VCVTANUQf: + case ARM::VCVTANUQh: + case ARM::VCVTMNSDf: + case ARM::VCVTMNSDh: + case ARM::VCVTMNSQf: + case ARM::VCVTMNSQh: + case ARM::VCVTMNUDf: + case ARM::VCVTMNUDh: + case ARM::VCVTMNUQf: + case ARM::VCVTMNUQh: + case ARM::VCVTNNSDf: + case ARM::VCVTNNSDh: + case ARM::VCVTNNSQf: + case ARM::VCVTNNSQh: + case ARM::VCVTNNUDf: + case ARM::VCVTNNUDh: + case ARM::VCVTNNUQf: + case ARM::VCVTNNUQh: + case ARM::VCVTPNSDf: + case ARM::VCVTPNSDh: + case ARM::VCVTPNSQf: + case ARM::VCVTPNSQh: + case ARM::VCVTPNUDf: + case ARM::VCVTPNUDh: + case ARM::VCVTPNUQf: + case ARM::VCVTPNUQh: + case ARM::VRINTANDf: + case ARM::VRINTANDh: + case ARM::VRINTANQf: + case ARM::VRINTANQh: + case ARM::VRINTMNDf: + case ARM::VRINTMNDh: + case ARM::VRINTMNQf: + case ARM::VRINTMNQh: + case ARM::VRINTNNDf: + case ARM::VRINTNNDh: + case ARM::VRINTNNQf: + case ARM::VRINTNNQh: + case ARM::VRINTPNDf: + case ARM::VRINTPNDh: + case ARM::VRINTPNQf: + case ARM::VRINTPNQh: + case ARM::VRINTXNDf: + case ARM::VRINTXNDh: + case ARM::VRINTXNQf: + case ARM::VRINTXNQh: + case ARM::VRINTZNDf: + case ARM::VRINTZNDh: + case ARM::VRINTZNQf: + case ARM::VRINTZNQh: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + Value = NEONThumb2V8PostEncoder(MI, Value, STI); + break; + } + case ARM::VSLIv4i16: + case ARM::VSLIv8i16: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: SIMM + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VSLIv2i32: + case ARM::VSLIv4i32: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: SIMM + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VSLIv1i64: + case ARM::VSLIv2i64: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: SIMM + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(63)) << 16; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VSLIv16i8: + case ARM::VSLIv8i8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: SIMM + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(7)) << 16; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VRSRAsv4i16: + case ARM::VRSRAsv8i16: + case ARM::VRSRAuv4i16: + case ARM::VRSRAuv8i16: + case ARM::VSRAsv4i16: + case ARM::VSRAsv8i16: + case ARM::VSRAuv4i16: + case ARM::VSRAuv8i16: + case ARM::VSRIv4i16: + case ARM::VSRIv8i16: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: SIMM + op = getShiftRight16Imm(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VRSRAsv2i32: + case ARM::VRSRAsv4i32: + case ARM::VRSRAuv2i32: + case ARM::VRSRAuv4i32: + case ARM::VSRAsv2i32: + case ARM::VSRAsv4i32: + case ARM::VSRAuv2i32: + case ARM::VSRAuv4i32: + case ARM::VSRIv2i32: + case ARM::VSRIv4i32: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: SIMM + op = getShiftRight32Imm(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VRSRAsv1i64: + case ARM::VRSRAsv2i64: + case ARM::VRSRAuv1i64: + case ARM::VRSRAuv2i64: + case ARM::VSRAsv1i64: + case ARM::VSRAsv2i64: + case ARM::VSRAuv1i64: + case ARM::VSRAuv2i64: + case ARM::VSRIv1i64: + case ARM::VSRIv2i64: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: SIMM + op = getShiftRight64Imm(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(63)) << 16; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VRSRAsv16i8: + case ARM::VRSRAsv8i8: + case ARM::VRSRAuv16i8: + case ARM::VRSRAuv8i8: + case ARM::VSRAsv16i8: + case ARM::VSRAsv8i8: + case ARM::VSRAuv16i8: + case ARM::VSRAuv8i8: + case ARM::VSRIv16i8: + case ARM::VSRIv8i8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: SIMM + op = getShiftRight8Imm(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(7)) << 16; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::AESD: + case ARM::AESE: + case ARM::SHA1SU1: + case ARM::SHA256SU0: + case ARM::VPADALsv16i8: + case ARM::VPADALsv2i32: + case ARM::VPADALsv4i16: + case ARM::VPADALsv4i32: + case ARM::VPADALsv8i16: + case ARM::VPADALsv8i8: + case ARM::VPADALuv16i8: + case ARM::VPADALuv2i32: + case ARM::VPADALuv4i16: + case ARM::VPADALuv4i32: + case ARM::VPADALuv8i16: + case ARM::VPADALuv8i8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VEXTd32: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: index + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(1)) << 10; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VEXTq64: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: index + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(1)) << 11; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VEXTq8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: index + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VEXTq32: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: index + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(3)) << 10; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VEXTd16: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: index + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(3)) << 9; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VEXTd8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: index + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(7)) << 8; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VEXTq16: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: index + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(7)) << 9; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VABDLsv2i64: + case ARM::VABDLsv4i32: + case ARM::VABDLsv8i16: + case ARM::VABDLuv2i64: + case ARM::VABDLuv4i32: + case ARM::VABDLuv8i16: + case ARM::VABDfd: + case ARM::VABDfq: + case ARM::VABDhd: + case ARM::VABDhq: + case ARM::VABDsv16i8: + case ARM::VABDsv2i32: + case ARM::VABDsv4i16: + case ARM::VABDsv4i32: + case ARM::VABDsv8i16: + case ARM::VABDsv8i8: + case ARM::VABDuv16i8: + case ARM::VABDuv2i32: + case ARM::VABDuv4i16: + case ARM::VABDuv4i32: + case ARM::VABDuv8i16: + case ARM::VABDuv8i8: + case ARM::VACGEfd: + case ARM::VACGEfq: + case ARM::VACGEhd: + case ARM::VACGEhq: + case ARM::VACGTfd: + case ARM::VACGTfq: + case ARM::VACGThd: + case ARM::VACGThq: + case ARM::VADDHNv2i32: + case ARM::VADDHNv4i16: + case ARM::VADDHNv8i8: + case ARM::VADDLsv2i64: + case ARM::VADDLsv4i32: + case ARM::VADDLsv8i16: + case ARM::VADDLuv2i64: + case ARM::VADDLuv4i32: + case ARM::VADDLuv8i16: + case ARM::VADDWsv2i64: + case ARM::VADDWsv4i32: + case ARM::VADDWsv8i16: + case ARM::VADDWuv2i64: + case ARM::VADDWuv4i32: + case ARM::VADDWuv8i16: + case ARM::VADDfd: + case ARM::VADDfq: + case ARM::VADDhd: + case ARM::VADDhq: + case ARM::VADDv16i8: + case ARM::VADDv1i64: + case ARM::VADDv2i32: + case ARM::VADDv2i64: + case ARM::VADDv4i16: + case ARM::VADDv4i32: + case ARM::VADDv8i16: + case ARM::VADDv8i8: + case ARM::VANDd: + case ARM::VANDq: + case ARM::VBICd: + case ARM::VBICq: + case ARM::VCEQfd: + case ARM::VCEQfq: + case ARM::VCEQhd: + case ARM::VCEQhq: + case ARM::VCEQv16i8: + case ARM::VCEQv2i32: + case ARM::VCEQv4i16: + case ARM::VCEQv4i32: + case ARM::VCEQv8i16: + case ARM::VCEQv8i8: + case ARM::VCGEfd: + case ARM::VCGEfq: + case ARM::VCGEhd: + case ARM::VCGEhq: + case ARM::VCGEsv16i8: + case ARM::VCGEsv2i32: + case ARM::VCGEsv4i16: + case ARM::VCGEsv4i32: + case ARM::VCGEsv8i16: + case ARM::VCGEsv8i8: + case ARM::VCGEuv16i8: + case ARM::VCGEuv2i32: + case ARM::VCGEuv4i16: + case ARM::VCGEuv4i32: + case ARM::VCGEuv8i16: + case ARM::VCGEuv8i8: + case ARM::VCGTfd: + case ARM::VCGTfq: + case ARM::VCGThd: + case ARM::VCGThq: + case ARM::VCGTsv16i8: + case ARM::VCGTsv2i32: + case ARM::VCGTsv4i16: + case ARM::VCGTsv4i32: + case ARM::VCGTsv8i16: + case ARM::VCGTsv8i8: + case ARM::VCGTuv16i8: + case ARM::VCGTuv2i32: + case ARM::VCGTuv4i16: + case ARM::VCGTuv4i32: + case ARM::VCGTuv8i16: + case ARM::VCGTuv8i8: + case ARM::VEORd: + case ARM::VEORq: + case ARM::VHADDsv16i8: + case ARM::VHADDsv2i32: + case ARM::VHADDsv4i16: + case ARM::VHADDsv4i32: + case ARM::VHADDsv8i16: + case ARM::VHADDsv8i8: + case ARM::VHADDuv16i8: + case ARM::VHADDuv2i32: + case ARM::VHADDuv4i16: + case ARM::VHADDuv4i32: + case ARM::VHADDuv8i16: + case ARM::VHADDuv8i8: + case ARM::VHSUBsv16i8: + case ARM::VHSUBsv2i32: + case ARM::VHSUBsv4i16: + case ARM::VHSUBsv4i32: + case ARM::VHSUBsv8i16: + case ARM::VHSUBsv8i8: + case ARM::VHSUBuv16i8: + case ARM::VHSUBuv2i32: + case ARM::VHSUBuv4i16: + case ARM::VHSUBuv4i32: + case ARM::VHSUBuv8i16: + case ARM::VHSUBuv8i8: + case ARM::VMAXfd: + case ARM::VMAXfq: + case ARM::VMAXhd: + case ARM::VMAXhq: + case ARM::VMAXsv16i8: + case ARM::VMAXsv2i32: + case ARM::VMAXsv4i16: + case ARM::VMAXsv4i32: + case ARM::VMAXsv8i16: + case ARM::VMAXsv8i8: + case ARM::VMAXuv16i8: + case ARM::VMAXuv2i32: + case ARM::VMAXuv4i16: + case ARM::VMAXuv4i32: + case ARM::VMAXuv8i16: + case ARM::VMAXuv8i8: + case ARM::VMINfd: + case ARM::VMINfq: + case ARM::VMINhd: + case ARM::VMINhq: + case ARM::VMINsv16i8: + case ARM::VMINsv2i32: + case ARM::VMINsv4i16: + case ARM::VMINsv4i32: + case ARM::VMINsv8i16: + case ARM::VMINsv8i8: + case ARM::VMINuv16i8: + case ARM::VMINuv2i32: + case ARM::VMINuv4i16: + case ARM::VMINuv4i32: + case ARM::VMINuv8i16: + case ARM::VMINuv8i8: + case ARM::VMULLp64: + case ARM::VMULLp8: + case ARM::VMULLsv2i64: + case ARM::VMULLsv4i32: + case ARM::VMULLsv8i16: + case ARM::VMULLuv2i64: + case ARM::VMULLuv4i32: + case ARM::VMULLuv8i16: + case ARM::VMULfd: + case ARM::VMULfq: + case ARM::VMULhd: + case ARM::VMULhq: + case ARM::VMULpd: + case ARM::VMULpq: + case ARM::VMULv16i8: + case ARM::VMULv2i32: + case ARM::VMULv4i16: + case ARM::VMULv4i32: + case ARM::VMULv8i16: + case ARM::VMULv8i8: + case ARM::VORNd: + case ARM::VORNq: + case ARM::VORRd: + case ARM::VORRq: + case ARM::VPADDf: + case ARM::VPADDh: + case ARM::VPADDi16: + case ARM::VPADDi32: + case ARM::VPADDi8: + case ARM::VPMAXf: + case ARM::VPMAXh: + case ARM::VPMAXs16: + case ARM::VPMAXs32: + case ARM::VPMAXs8: + case ARM::VPMAXu16: + case ARM::VPMAXu32: + case ARM::VPMAXu8: + case ARM::VPMINf: + case ARM::VPMINh: + case ARM::VPMINs16: + case ARM::VPMINs32: + case ARM::VPMINs8: + case ARM::VPMINu16: + case ARM::VPMINu32: + case ARM::VPMINu8: + case ARM::VQADDsv16i8: + case ARM::VQADDsv1i64: + case ARM::VQADDsv2i32: + case ARM::VQADDsv2i64: + case ARM::VQADDsv4i16: + case ARM::VQADDsv4i32: + case ARM::VQADDsv8i16: + case ARM::VQADDsv8i8: + case ARM::VQADDuv16i8: + case ARM::VQADDuv1i64: + case ARM::VQADDuv2i32: + case ARM::VQADDuv2i64: + case ARM::VQADDuv4i16: + case ARM::VQADDuv4i32: + case ARM::VQADDuv8i16: + case ARM::VQADDuv8i8: + case ARM::VQDMULHv2i32: + case ARM::VQDMULHv4i16: + case ARM::VQDMULHv4i32: + case ARM::VQDMULHv8i16: + case ARM::VQDMULLv2i64: + case ARM::VQDMULLv4i32: + case ARM::VQRDMULHv2i32: + case ARM::VQRDMULHv4i16: + case ARM::VQRDMULHv4i32: + case ARM::VQRDMULHv8i16: + case ARM::VQSUBsv16i8: + case ARM::VQSUBsv1i64: + case ARM::VQSUBsv2i32: + case ARM::VQSUBsv2i64: + case ARM::VQSUBsv4i16: + case ARM::VQSUBsv4i32: + case ARM::VQSUBsv8i16: + case ARM::VQSUBsv8i8: + case ARM::VQSUBuv16i8: + case ARM::VQSUBuv1i64: + case ARM::VQSUBuv2i32: + case ARM::VQSUBuv2i64: + case ARM::VQSUBuv4i16: + case ARM::VQSUBuv4i32: + case ARM::VQSUBuv8i16: + case ARM::VQSUBuv8i8: + case ARM::VRADDHNv2i32: + case ARM::VRADDHNv4i16: + case ARM::VRADDHNv8i8: + case ARM::VRECPSfd: + case ARM::VRECPSfq: + case ARM::VRECPShd: + case ARM::VRECPShq: + case ARM::VRHADDsv16i8: + case ARM::VRHADDsv2i32: + case ARM::VRHADDsv4i16: + case ARM::VRHADDsv4i32: + case ARM::VRHADDsv8i16: + case ARM::VRHADDsv8i8: + case ARM::VRHADDuv16i8: + case ARM::VRHADDuv2i32: + case ARM::VRHADDuv4i16: + case ARM::VRHADDuv4i32: + case ARM::VRHADDuv8i16: + case ARM::VRHADDuv8i8: + case ARM::VRSQRTSfd: + case ARM::VRSQRTSfq: + case ARM::VRSQRTShd: + case ARM::VRSQRTShq: + case ARM::VRSUBHNv2i32: + case ARM::VRSUBHNv4i16: + case ARM::VRSUBHNv8i8: + case ARM::VSUBHNv2i32: + case ARM::VSUBHNv4i16: + case ARM::VSUBHNv8i8: + case ARM::VSUBLsv2i64: + case ARM::VSUBLsv4i32: + case ARM::VSUBLsv8i16: + case ARM::VSUBLuv2i64: + case ARM::VSUBLuv4i32: + case ARM::VSUBLuv8i16: + case ARM::VSUBWsv2i64: + case ARM::VSUBWsv4i32: + case ARM::VSUBWsv8i16: + case ARM::VSUBWuv2i64: + case ARM::VSUBWuv4i32: + case ARM::VSUBWuv8i16: + case ARM::VSUBfd: + case ARM::VSUBfq: + case ARM::VSUBhd: + case ARM::VSUBhq: + case ARM::VSUBv16i8: + case ARM::VSUBv1i64: + case ARM::VSUBv2i32: + case ARM::VSUBv2i64: + case ARM::VSUBv4i16: + case ARM::VSUBv4i32: + case ARM::VSUBv8i16: + case ARM::VSUBv8i8: + case ARM::VTBL1: + case ARM::VTBL2: + case ARM::VTBL3: + case ARM::VTBL4: + case ARM::VTSTv16i8: + case ARM::VTSTv2i32: + case ARM::VTSTv4i16: + case ARM::VTSTv4i32: + case ARM::VTSTv8i16: + case ARM::VTSTv8i8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VMAXNMNDf: + case ARM::VMAXNMNDh: + case ARM::VMAXNMNQf: + case ARM::VMAXNMNQh: + case ARM::VMINNMNDf: + case ARM::VMINNMNDh: + case ARM::VMINNMNQf: + case ARM::VMINNMNQh: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + Value = NEONThumb2V8PostEncoder(MI, Value, STI); + break; + } + case ARM::VMULLslsv2i32: + case ARM::VMULLsluv2i32: + case ARM::VMULslfd: + case ARM::VMULslfq: + case ARM::VMULslv2i32: + case ARM::VMULslv4i32: + case ARM::VQDMULHslv2i32: + case ARM::VQDMULHslv4i32: + case ARM::VQDMULLslv2i32: + case ARM::VQRDMULHslv2i32: + case ARM::VQRDMULHslv4i32: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(1)) << 5; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VMULLslsv4i16: + case ARM::VMULLsluv4i16: + case ARM::VMULslhd: + case ARM::VMULslhq: + case ARM::VMULslv4i16: + case ARM::VMULslv8i16: + case ARM::VQDMULHslv4i16: + case ARM::VQDMULHslv8i16: + case ARM::VQDMULLslv4i16: + case ARM::VQRDMULHslv4i16: + case ARM::VQRDMULHslv8i16: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(7); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(2)) << 4; + Value |= (op & UINT64_C(1)) << 3; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VQRSHLsv16i8: + case ARM::VQRSHLsv1i64: + case ARM::VQRSHLsv2i32: + case ARM::VQRSHLsv2i64: + case ARM::VQRSHLsv4i16: + case ARM::VQRSHLsv4i32: + case ARM::VQRSHLsv8i16: + case ARM::VQRSHLsv8i8: + case ARM::VQRSHLuv16i8: + case ARM::VQRSHLuv1i64: + case ARM::VQRSHLuv2i32: + case ARM::VQRSHLuv2i64: + case ARM::VQRSHLuv4i16: + case ARM::VQRSHLuv4i32: + case ARM::VQRSHLuv8i16: + case ARM::VQRSHLuv8i8: + case ARM::VQSHLsv16i8: + case ARM::VQSHLsv1i64: + case ARM::VQSHLsv2i32: + case ARM::VQSHLsv2i64: + case ARM::VQSHLsv4i16: + case ARM::VQSHLsv4i32: + case ARM::VQSHLsv8i16: + case ARM::VQSHLsv8i8: + case ARM::VQSHLuv16i8: + case ARM::VQSHLuv1i64: + case ARM::VQSHLuv2i32: + case ARM::VQSHLuv2i64: + case ARM::VQSHLuv4i16: + case ARM::VQSHLuv4i32: + case ARM::VQSHLuv8i16: + case ARM::VQSHLuv8i8: + case ARM::VRSHLsv16i8: + case ARM::VRSHLsv1i64: + case ARM::VRSHLsv2i32: + case ARM::VRSHLsv2i64: + case ARM::VRSHLsv4i16: + case ARM::VRSHLsv4i32: + case ARM::VRSHLsv8i16: + case ARM::VRSHLsv8i8: + case ARM::VRSHLuv16i8: + case ARM::VRSHLuv1i64: + case ARM::VRSHLuv2i32: + case ARM::VRSHLuv2i64: + case ARM::VRSHLuv4i16: + case ARM::VRSHLuv4i32: + case ARM::VRSHLuv8i16: + case ARM::VRSHLuv8i8: + case ARM::VSHLsv16i8: + case ARM::VSHLsv1i64: + case ARM::VSHLsv2i32: + case ARM::VSHLsv2i64: + case ARM::VSHLsv4i16: + case ARM::VSHLsv4i32: + case ARM::VSHLsv8i16: + case ARM::VSHLsv8i8: + case ARM::VSHLuv16i8: + case ARM::VSHLuv1i64: + case ARM::VSHLuv2i32: + case ARM::VSHLuv2i64: + case ARM::VSHLuv4i16: + case ARM::VSHLuv4i32: + case ARM::VSHLuv8i16: + case ARM::VSHLuv8i8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::SHA1C: + case ARM::SHA1M: + case ARM::SHA1P: + case ARM::SHA1SU0: + case ARM::SHA256H: + case ARM::SHA256H2: + case ARM::SHA256SU1: + case ARM::VABALsv2i64: + case ARM::VABALsv4i32: + case ARM::VABALsv8i16: + case ARM::VABALuv2i64: + case ARM::VABALuv4i32: + case ARM::VABALuv8i16: + case ARM::VABAsv16i8: + case ARM::VABAsv2i32: + case ARM::VABAsv4i16: + case ARM::VABAsv4i32: + case ARM::VABAsv8i16: + case ARM::VABAsv8i8: + case ARM::VABAuv16i8: + case ARM::VABAuv2i32: + case ARM::VABAuv4i16: + case ARM::VABAuv4i32: + case ARM::VABAuv8i16: + case ARM::VABAuv8i8: + case ARM::VBIFd: + case ARM::VBIFq: + case ARM::VBITd: + case ARM::VBITq: + case ARM::VBSLd: + case ARM::VBSLq: + case ARM::VFMAfd: + case ARM::VFMAfq: + case ARM::VFMAhd: + case ARM::VFMAhq: + case ARM::VFMSfd: + case ARM::VFMSfq: + case ARM::VFMShd: + case ARM::VFMShq: + case ARM::VMLALsv2i64: + case ARM::VMLALsv4i32: + case ARM::VMLALsv8i16: + case ARM::VMLALuv2i64: + case ARM::VMLALuv4i32: + case ARM::VMLALuv8i16: + case ARM::VMLAfd: + case ARM::VMLAfq: + case ARM::VMLAhd: + case ARM::VMLAhq: + case ARM::VMLAv16i8: + case ARM::VMLAv2i32: + case ARM::VMLAv4i16: + case ARM::VMLAv4i32: + case ARM::VMLAv8i16: + case ARM::VMLAv8i8: + case ARM::VMLSLsv2i64: + case ARM::VMLSLsv4i32: + case ARM::VMLSLsv8i16: + case ARM::VMLSLuv2i64: + case ARM::VMLSLuv4i32: + case ARM::VMLSLuv8i16: + case ARM::VMLSfd: + case ARM::VMLSfq: + case ARM::VMLShd: + case ARM::VMLShq: + case ARM::VMLSv16i8: + case ARM::VMLSv2i32: + case ARM::VMLSv4i16: + case ARM::VMLSv4i32: + case ARM::VMLSv8i16: + case ARM::VMLSv8i8: + case ARM::VQDMLALv2i64: + case ARM::VQDMLALv4i32: + case ARM::VQDMLSLv2i64: + case ARM::VQDMLSLv4i32: + case ARM::VQRDMLAHv2i32: + case ARM::VQRDMLAHv4i16: + case ARM::VQRDMLAHv4i32: + case ARM::VQRDMLAHv8i16: + case ARM::VQRDMLSHv2i32: + case ARM::VQRDMLSHv4i16: + case ARM::VQRDMLSHv4i32: + case ARM::VQRDMLSHv8i16: + case ARM::VTBX1: + case ARM::VTBX2: + case ARM::VTBX3: + case ARM::VTBX4: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VMLALslsv2i32: + case ARM::VMLALsluv2i32: + case ARM::VMLAslfd: + case ARM::VMLAslfq: + case ARM::VMLAslv2i32: + case ARM::VMLAslv4i32: + case ARM::VMLSLslsv2i32: + case ARM::VMLSLsluv2i32: + case ARM::VMLSslfd: + case ARM::VMLSslfq: + case ARM::VMLSslv2i32: + case ARM::VMLSslv4i32: + case ARM::VQDMLALslv2i32: + case ARM::VQDMLSLslv2i32: + case ARM::VQRDMLAHslv2i32: + case ARM::VQRDMLAHslv4i32: + case ARM::VQRDMLSHslv2i32: + case ARM::VQRDMLSHslv4i32: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(1)) << 5; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VMLALslsv4i16: + case ARM::VMLALsluv4i16: + case ARM::VMLAslhd: + case ARM::VMLAslhq: + case ARM::VMLAslv4i16: + case ARM::VMLAslv8i16: + case ARM::VMLSLslsv4i16: + case ARM::VMLSLsluv4i16: + case ARM::VMLSslhd: + case ARM::VMLSslhq: + case ARM::VMLSslv4i16: + case ARM::VMLSslv8i16: + case ARM::VQDMLALslv4i16: + case ARM::VQDMLSLslv4i16: + case ARM::VQRDMLAHslv4i16: + case ARM::VQRDMLAHslv8i16: + case ARM::VQRDMLSHslv4i16: + case ARM::VQRDMLSHslv8i16: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Vn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: Vm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= op & UINT64_C(7); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(2)) << 4; + Value |= (op & UINT64_C(1)) << 3; + Value = NEONThumb2DataIPostEncoder(MI, Value, STI); + break; + } + case ARM::VST1LNd8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 0, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: lane + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST3LNd32: + case ARM::VST3LNq32: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 0, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: lane + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(1)) << 7; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST3LNd16: + case ARM::VST3LNq16: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 0, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: lane + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(3)) << 6; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST3LNd8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 0, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: lane + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST1LNd16: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 0, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(3)) << 6; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST2LNd32: + case ARM::VST2LNq32: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 0, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(1)) << 7; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST2LNd16: + case ARM::VST2LNq16: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 0, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(3)) << 6; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST2LNd8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 0, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST4LNd16: + case ARM::VST4LNq16: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 0, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); + Value |= (op & UINT64_C(3)) << 6; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST4LNd8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 0, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST1d16: + case ARM::VST1d16T: + case ARM::VST1d32: + case ARM::VST1d32T: + case ARM::VST1d64: + case ARM::VST1d64T: + case ARM::VST1d8: + case ARM::VST1d8T: + case ARM::VST3d16: + case ARM::VST3d32: + case ARM::VST3d8: + case ARM::VST3q16: + case ARM::VST3q32: + case ARM::VST3q8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 0, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST4LNd32: + case ARM::VST4LNq32: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 0, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(48); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); + Value |= (op & UINT64_C(1)) << 7; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST1d16Q: + case ARM::VST1d32Q: + case ARM::VST1d64Q: + case ARM::VST1d8Q: + case ARM::VST1q16: + case ARM::VST1q32: + case ARM::VST1q64: + case ARM::VST1q8: + case ARM::VST2b16: + case ARM::VST2b32: + case ARM::VST2b8: + case ARM::VST2d16: + case ARM::VST2d32: + case ARM::VST2d8: + case ARM::VST2q16: + case ARM::VST2q32: + case ARM::VST2q8: + case ARM::VST4d16: + case ARM::VST4d32: + case ARM::VST4d8: + case ARM::VST4q16: + case ARM::VST4q32: + case ARM::VST4q8: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 0, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(48); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST1LNd32: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6OneLane32AddressOpValue(MI, 0, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(48); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(1)) << 7; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST1d16wb_fixed: + case ARM::VST1d32wb_fixed: + case ARM::VST1d64wb_fixed: + case ARM::VST1d8wb_fixed: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST1d16Qwb_fixed: + case ARM::VST1d16Twb_fixed: + case ARM::VST1d32Qwb_fixed: + case ARM::VST1d32Twb_fixed: + case ARM::VST1d64Qwb_fixed: + case ARM::VST1d64Twb_fixed: + case ARM::VST1d8Qwb_fixed: + case ARM::VST1d8Twb_fixed: + case ARM::VST1q16wb_fixed: + case ARM::VST1q32wb_fixed: + case ARM::VST1q64wb_fixed: + case ARM::VST1q8wb_fixed: + case ARM::VST2b16wb_fixed: + case ARM::VST2b32wb_fixed: + case ARM::VST2b8wb_fixed: + case ARM::VST2d16wb_fixed: + case ARM::VST2d32wb_fixed: + case ARM::VST2d8wb_fixed: + case ARM::VST2q16wb_fixed: + case ARM::VST2q32wb_fixed: + case ARM::VST2q8wb_fixed: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(48); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST1LNd8_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 3, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST3LNd32_UPD: + case ARM::VST3LNq32_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 3, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI); + Value |= (op & UINT64_C(1)) << 7; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST3LNd16_UPD: + case ARM::VST3LNq16_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 3, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI); + Value |= (op & UINT64_C(3)) << 6; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST3LNd8_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 3, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST1LNd16_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 3, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(3)) << 6; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST2LNd32_UPD: + case ARM::VST2LNq32_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 3, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); + Value |= (op & UINT64_C(1)) << 7; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST2LNd16_UPD: + case ARM::VST2LNq16_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 3, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); + Value |= (op & UINT64_C(3)) << 6; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST2LNd8_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 3, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST4LNd16_UPD: + case ARM::VST4LNq16_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 3, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI); + Value |= (op & UINT64_C(3)) << 6; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST4LNd8_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 3, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST3d16_UPD: + case ARM::VST3d32_UPD: + case ARM::VST3d8_UPD: + case ARM::VST3q16_UPD: + case ARM::VST3q32_UPD: + case ARM::VST3q8_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 3, Fixups, STI); + Value |= op & UINT64_C(15); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST1d16wb_register: + case ARM::VST1d32wb_register: + case ARM::VST1d64wb_register: + case ARM::VST1d8wb_register: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= op & UINT64_C(15); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST4LNd32_UPD: + case ARM::VST4LNq32_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(48); + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 3, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI); + Value |= (op & UINT64_C(1)) << 7; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST4d16_UPD: + case ARM::VST4d32_UPD: + case ARM::VST4d8_UPD: + case ARM::VST4q16_UPD: + case ARM::VST4q32_UPD: + case ARM::VST4q8_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(48); + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 3, Fixups, STI); + Value |= op & UINT64_C(15); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST1d16Qwb_register: + case ARM::VST1d16Twb_register: + case ARM::VST1d32Qwb_register: + case ARM::VST1d32Twb_register: + case ARM::VST1d64Qwb_register: + case ARM::VST1d64Twb_register: + case ARM::VST1d8Qwb_register: + case ARM::VST1d8Twb_register: + case ARM::VST1q16wb_register: + case ARM::VST1q32wb_register: + case ARM::VST1q64wb_register: + case ARM::VST1q8wb_register: + case ARM::VST2b16wb_register: + case ARM::VST2b32wb_register: + case ARM::VST2b8wb_register: + case ARM::VST2d16wb_register: + case ARM::VST2d32wb_register: + case ARM::VST2d8wb_register: + case ARM::VST2q16wb_register: + case ARM::VST2q32wb_register: + case ARM::VST2q8wb_register: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6AddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(48); + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= op & UINT64_C(15); + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::VST1LNd32_UPD: { + // op: Vd + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getAddrMode6OneLane32AddressOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(48); + // op: Rm + op = getAddrMode6OffsetOpValue(MI, 3, Fixups, STI); + Value |= op & UINT64_C(15); + // op: lane + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(1)) << 7; + Value = NEONThumb2LoadStorePostEncoder(MI, Value, STI); + break; + } + case ARM::LDC2L_OFFSET: + case ARM::LDC2L_PRE: + case ARM::LDC2_OFFSET: + case ARM::LDC2_PRE: + case ARM::STC2L_OFFSET: + case ARM::STC2L_PRE: + case ARM::STC2_OFFSET: + case ARM::STC2_PRE: + case ARM::t2LDC2L_OFFSET: + case ARM::t2LDC2L_PRE: + case ARM::t2LDC2_OFFSET: + case ARM::t2LDC2_PRE: + case ARM::t2LDCL_OFFSET: + case ARM::t2LDCL_PRE: + case ARM::t2LDC_OFFSET: + case ARM::t2LDC_PRE: + case ARM::t2STC2L_OFFSET: + case ARM::t2STC2L_PRE: + case ARM::t2STC2_OFFSET: + case ARM::t2STC2_PRE: + case ARM::t2STCL_OFFSET: + case ARM::t2STCL_PRE: + case ARM::t2STC_OFFSET: + case ARM::t2STC_PRE: { + // op: addr + op = getAddrMode5OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= (op & UINT64_C(7680)) << 7; + Value |= op & UINT64_C(255); + // op: cop + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: CRd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + break; + } + case ARM::t2PLDWi12: + case ARM::t2PLDi12: + case ARM::t2PLIi12: { + // op: addr + op = getAddrModeImm12OpValue(MI, 0, Fixups, STI); + Value |= (op & UINT64_C(122880)) << 3; + Value |= op & UINT64_C(4095); + break; + } + case ARM::PLDWi12: + case ARM::PLDi12: + case ARM::PLIi12: { + // op: addr + op = getAddrModeImm12OpValue(MI, 0, Fixups, STI); + Value |= (op & UINT64_C(4096)) << 11; + Value |= (op & UINT64_C(122880)) << 3; + Value |= op & UINT64_C(4095); + break; + } + case ARM::t2PLDpci: + case ARM::t2PLIpci: { + // op: addr + op = getAddrModeImm12OpValue(MI, 0, Fixups, STI); + Value |= (op & UINT64_C(4096)) << 11; + Value |= op & UINT64_C(4095); + break; + } + case ARM::t2LDAEXB: + case ARM::t2LDAEXH: + case ARM::t2LDREXB: + case ARM::t2LDREXH: { + // op: addr + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + break; + } + case ARM::t2LDAEXD: + case ARM::t2LDREXD: { + // op: addr + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rt2 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + break; + } + case ARM::t2PLDWi8: + case ARM::t2PLDi8: + case ARM::t2PLIi8: { + // op: addr + op = getT2AddrModeImm8OpValue(MI, 0, Fixups, STI); + Value |= (op & UINT64_C(7680)) << 7; + Value |= op & UINT64_C(255); + break; + } + case ARM::t2PLDWs: + case ARM::t2PLDs: + case ARM::t2PLIs: { + // op: addr + op = getT2AddrModeSORegOpValue(MI, 0, Fixups, STI); + Value |= (op & UINT64_C(960)) << 10; + Value |= (op & UINT64_C(3)) << 4; + Value |= (op & UINT64_C(60)) >> 2; + break; + } + case ARM::t2MSRbanked: { + // op: banked + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(32)) << 15; + Value |= (op & UINT64_C(15)) << 8; + Value |= op & UINT64_C(16); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::t2MRSbanked: { + // op: banked + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(32)) << 15; + Value |= (op & UINT64_C(15)) << 16; + Value |= op & UINT64_C(16); + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + break; + } + case ARM::t2IT: { + // op: cc + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 4; + // op: mask + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::tADDrSPi: { + // op: dst + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(7)) << 8; + // op: imm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(255); + break; + } + case ARM::BX: { + // op: dst + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::tPICADD: { + // op: dst + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(7); + break; + } + case ARM::tSETEND: { + // op: end + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(1)) << 3; + break; + } + case ARM::SETEND: { + // op: end + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(1)) << 9; + break; + } + case ARM::BL: { + // op: func + op = getARMBLTargetOpValue(MI, 0, Fixups, STI); + Value |= op & UINT64_C(16777215); + break; + } + case ARM::t2BXJ: { + // op: func + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::BLX: { + // op: func + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::tBLXNSr: + case ARM::tBLXr: { + // op: func + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 3; + break; + } + case ARM::tBL: { + // op: func + op = getThumbBLTargetOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(8388608)) << 3; + Value |= (op & UINT64_C(2095104)) << 5; + Value |= (op & UINT64_C(4194304)) >> 9; + Value |= (op & UINT64_C(2097152)) >> 10; + Value |= op & UINT64_C(2047); + break; + } + case ARM::tBLXi: { + // op: func + op = getThumbBLXTargetOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(8388608)) << 3; + Value |= (op & UINT64_C(2095104)) << 5; + Value |= (op & UINT64_C(4194304)) >> 9; + Value |= (op & UINT64_C(2097152)) >> 10; + Value |= op & UINT64_C(2046); + break; + } + case ARM::t2SETPAN: { + // op: imm + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(1)) << 3; + break; + } + case ARM::SETPAN: { + // op: imm + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(1)) << 9; + break; + } + case ARM::tHINT: { + // op: imm + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 4; + break; + } + case ARM::HVC: { + // op: imm + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(65520)) << 4; + Value |= op & UINT64_C(15); + break; + } + case ARM::t2HINT: + case ARM::t2SUBS_PC_LR: + case ARM::tSVC: { + // op: imm + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(255); + break; + } + case ARM::tADDspi: + case ARM::tSUBspi: { + // op: imm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(127); + break; + } + case ARM::t2HVC: + case ARM::t2UDF: { + // op: imm16 + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(61440)) << 4; + Value |= op & UINT64_C(4095); + break; + } + case ARM::UDF: { + // op: imm16 + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(65520)) << 4; + Value |= op & UINT64_C(15); + break; + } + case ARM::tUDF: { + // op: imm8 + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(255); + break; + } + case ARM::tCPS: { + // op: imod + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(1)) << 4; + // op: iflags + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(7); + break; + } + case ARM::CPS2p: { + // op: imod + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(3)) << 18; + // op: iflags + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(7)) << 6; + break; + } + case ARM::CPS3p: { + // op: imod + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(3)) << 18; + // op: iflags + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(7)) << 6; + // op: mode + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(31); + break; + } + case ARM::t2CPS2p: { + // op: imod + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(3)) << 9; + // op: iflags + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + break; + } + case ARM::t2CPS3p: { + // op: imod + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(3)) << 9; + // op: iflags + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + // op: mode + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(31); + break; + } + case ARM::t2MSR_AR: { + // op: mask + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 16; + Value |= (op & UINT64_C(15)) << 8; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::CPS1p: + case ARM::SRSDA: + case ARM::SRSDA_UPD: + case ARM::SRSDB: + case ARM::SRSDB_UPD: + case ARM::SRSIA: + case ARM::SRSIA_UPD: + case ARM::SRSIB: + case ARM::SRSIB_UPD: + case ARM::t2CPS1p: + case ARM::t2SRSDB: + case ARM::t2SRSDB_UPD: + case ARM::t2SRSIA: + case ARM::t2SRSIA_UPD: { + // op: mode + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(31); + break; + } + case ARM::LDC2L_POST: + case ARM::LDC2_POST: + case ARM::STC2L_POST: + case ARM::STC2_POST: + case ARM::t2LDC2L_POST: + case ARM::t2LDC2_POST: + case ARM::t2LDCL_POST: + case ARM::t2LDC_POST: + case ARM::t2STC2L_POST: + case ARM::t2STC2_POST: + case ARM::t2STCL_POST: + case ARM::t2STC_POST: { + // op: offset + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= op & UINT64_C(255); + // op: addr + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: cop + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: CRd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + break; + } + case ARM::CDP2: + case ARM::t2CDP: + case ARM::t2CDP2: { + // op: opc1 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 20; + // op: CRn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: CRd + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: cop + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: opc2 + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + // op: CRm + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::t2SMC: { + // op: opt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::DMB: + case ARM::DSB: + case ARM::ISB: + case ARM::t2DBG: + case ARM::t2DMB: + case ARM::t2DSB: + case ARM::t2ISB: { + // op: opt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::LDC2L_OPTION: + case ARM::LDC2_OPTION: + case ARM::STC2L_OPTION: + case ARM::STC2_OPTION: + case ARM::t2LDC2L_OPTION: + case ARM::t2LDC2_OPTION: + case ARM::t2LDCL_OPTION: + case ARM::t2LDC_OPTION: + case ARM::t2STC2L_OPTION: + case ARM::t2STC2_OPTION: + case ARM::t2STCL_OPTION: + case ARM::t2STC_OPTION: { + // op: option + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= op & UINT64_C(255); + // op: addr + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: cop + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: CRd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + break; + } + case ARM::BX_RET: + case ARM::ERET: + case ARM::MOVPCLR: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + break; + } + case ARM::FMSTAT: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::t2Bcc: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 22; + // op: target + op = getBranchTargetOpValue(MI, 0, Fixups, STI); + Value |= (op & UINT64_C(1048576)) << 6; + Value |= (op & UINT64_C(258048)) << 4; + Value |= (op & UINT64_C(262144)) >> 5; + Value |= (op & UINT64_C(524288)) >> 8; + Value |= (op & UINT64_C(4094)) >> 1; + break; + } + case ARM::VCMPEZD: + case ARM::VCMPZD: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Dd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::MRS: + case ARM::MRSsys: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + break; + } + case ARM::VLDMSIA: + case ARM::VSTMSIA: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: regs + op = getRegisterListOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(256)) << 14; + Value |= (op & UINT64_C(7680)) << 3; + Value |= op & UINT64_C(255); + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::FLDMXIA: + case ARM::FSTMXIA: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: regs + op = getRegisterListOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(3840)) << 4; + Value |= op & UINT64_C(254); + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::VLDMDIA: + case ARM::VSTMDIA: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: regs + op = getRegisterListOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(4096)) << 10; + Value |= (op & UINT64_C(3840)) << 4; + Value |= op & UINT64_C(254); + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::VLLDM: + case ARM::VLSTM: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::VMRS: + case ARM::VMRS_FPEXC: + case ARM::VMRS_FPINST: + case ARM::VMRS_FPINST2: + case ARM::VMRS_FPSID: + case ARM::VMRS_MVFR0: + case ARM::VMRS_MVFR1: + case ARM::VMRS_MVFR2: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::VCMPEZH: + case ARM::VCMPEZS: + case ARM::VCMPZH: + case ARM::VCMPZS: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Sd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(1)) << 22; + Value |= (op & UINT64_C(30)) << 11; + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::BX_pred: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: dst + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::BL_pred: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: func + op = getARMBLTargetOpValue(MI, 0, Fixups, STI); + Value |= op & UINT64_C(16777215); + break; + } + case ARM::BLX_pred: + case ARM::BXJ: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: func + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::HINT: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: imm + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(255); + break; + } + case ARM::DBG: + case ARM::SMC: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: opt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::LDMDA: + case ARM::LDMDB: + case ARM::LDMIA: + case ARM::LDMIB: + case ARM::STMDA: + case ARM::STMDB: + case ARM::STMIA: + case ARM::STMIB: + case ARM::sysLDMDA: + case ARM::sysLDMDB: + case ARM::sysLDMIA: + case ARM::sysLDMIB: + case ARM::sysSTMDA: + case ARM::sysSTMDB: + case ARM::sysSTMIA: + case ARM::sysSTMIB: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: regs + op = getRegisterListOpValue(MI, 3, Fixups, STI); + Value |= op & UINT64_C(65535); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::VMSR: + case ARM::VMSR_FPEXC: + case ARM::VMSR_FPINST: + case ARM::VMSR_FPINST2: + case ARM::VMSR_FPSID: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: src + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::SVC: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: svc + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(16777215); + break; + } + case ARM::Bcc: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: target + op = getARMBranchTargetOpValue(MI, 0, Fixups, STI); + Value |= op & UINT64_C(16777215); + break; + } + case ARM::tBcc: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: target + op = getThumbBCCTargetOpValue(MI, 0, Fixups, STI); + Value |= op & UINT64_C(255); + break; + } + case ARM::VABSD: + case ARM::VCMPD: + case ARM::VCMPED: + case ARM::VMOVD: + case ARM::VNEGD: + case ARM::VRINTRD: + case ARM::VRINTXD: + case ARM::VRINTZD: + case ARM::VSQRTD: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Dd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Dm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::VCVTBHD: + case ARM::VCVTTHD: + case ARM::VSITOD: + case ARM::VUITOD: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Dd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Sm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(1)) << 5; + Value |= (op & UINT64_C(30)) >> 1; + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::FCONSTD: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Dd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: imm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(240)) << 12; + Value |= op & UINT64_C(15); + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::VCVTBDH: + case ARM::VCVTTDH: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Dm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: Sd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(1)) << 22; + Value |= (op & UINT64_C(30)) << 11; + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::CLZ: + case ARM::RBIT: + case ARM::REV: + case ARM::REV16: + case ARM::REVSH: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::MOVi16: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: imm + op = getHiLo16ImmOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(61440)) << 4; + Value |= op & UINT64_C(4095); + break; + } + case ARM::ADR: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: label + op = getAdrLabelOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(12288)) << 10; + Value |= op & UINT64_C(4095); + break; + } + case ARM::CMNzrr: + case ARM::CMPrr: + case ARM::TEQrr: + case ARM::TSTrr: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::CMNri: + case ARM::CMPri: + case ARM::TEQri: + case ARM::TSTri: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: imm + op = getModImmOpValue(MI, 1, Fixups, STI); + Value |= op & UINT64_C(4095); + break; + } + case ARM::VLDMSDB_UPD: + case ARM::VLDMSIA_UPD: + case ARM::VSTMSDB_UPD: + case ARM::VSTMSIA_UPD: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: regs + op = getRegisterListOpValue(MI, 4, Fixups, STI); + Value |= (op & UINT64_C(256)) << 14; + Value |= (op & UINT64_C(7680)) << 3; + Value |= op & UINT64_C(255); + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::FLDMXDB_UPD: + case ARM::FLDMXIA_UPD: + case ARM::FSTMXDB_UPD: + case ARM::FSTMXIA_UPD: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: regs + op = getRegisterListOpValue(MI, 4, Fixups, STI); + Value |= (op & UINT64_C(3840)) << 4; + Value |= op & UINT64_C(254); + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::VLDMDDB_UPD: + case ARM::VLDMDIA_UPD: + case ARM::VSTMDDB_UPD: + case ARM::VSTMDIA_UPD: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: regs + op = getRegisterListOpValue(MI, 4, Fixups, STI); + Value |= (op & UINT64_C(4096)) << 10; + Value |= (op & UINT64_C(3840)) << 4; + Value |= op & UINT64_C(254); + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::VMOVRH: + case ARM::VMOVRS: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Sn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(30)) << 15; + Value |= (op & UINT64_C(1)) << 7; + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::LDA: + case ARM::LDAB: + case ARM::LDAEX: + case ARM::LDAEXB: + case ARM::LDAEXD: + case ARM::LDAEXH: + case ARM::LDAH: + case ARM::LDREX: + case ARM::LDREXB: + case ARM::LDREXD: + case ARM::LDREXH: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: addr + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::STL: + case ARM::STLB: + case ARM::STLH: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(15); + // op: addr + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::VCVTSD: + case ARM::VTOSIRD: + case ARM::VTOSIZD: + case ARM::VTOUIRD: + case ARM::VTOUIZD: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Sd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(1)) << 22; + Value |= (op & UINT64_C(30)) << 11; + // op: Dm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::VABSH: + case ARM::VABSS: + case ARM::VCMPEH: + case ARM::VCMPES: + case ARM::VCMPH: + case ARM::VCMPS: + case ARM::VCVTBHS: + case ARM::VCVTBSH: + case ARM::VCVTTHS: + case ARM::VCVTTSH: + case ARM::VMOVS: + case ARM::VNEGH: + case ARM::VNEGS: + case ARM::VRINTRH: + case ARM::VRINTRS: + case ARM::VRINTXH: + case ARM::VRINTXS: + case ARM::VRINTZH: + case ARM::VRINTZS: + case ARM::VSITOH: + case ARM::VSITOS: + case ARM::VSQRTH: + case ARM::VSQRTS: + case ARM::VTOSIRH: + case ARM::VTOSIRS: + case ARM::VTOSIZH: + case ARM::VTOSIZS: + case ARM::VTOUIRH: + case ARM::VTOUIRS: + case ARM::VTOUIZH: + case ARM::VTOUIZS: + case ARM::VUITOH: + case ARM::VUITOS: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Sd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(1)) << 22; + Value |= (op & UINT64_C(30)) << 11; + // op: Sm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(1)) << 5; + Value |= (op & UINT64_C(30)) >> 1; + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::FCONSTH: + case ARM::FCONSTS: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Sd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(1)) << 22; + Value |= (op & UINT64_C(30)) << 11; + // op: imm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(240)) << 12; + Value |= op & UINT64_C(15); + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::VCVTDS: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Sm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(1)) << 5; + Value |= (op & UINT64_C(30)) >> 1; + // op: Dd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::VMOVHR: + case ARM::VMOVSR: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Sn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(30)) << 15; + Value |= (op & UINT64_C(1)) << 7; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::MSRbanked: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: banked + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(32)) << 17; + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 4; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::MRSbanked: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: banked + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(32)) << 17; + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 4; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + break; + } + case ARM::MSR: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: mask + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 16; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::MSRi: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: mask + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 16; + // op: imm + op = getModImmOpValue(MI, 1, Fixups, STI); + Value |= op & UINT64_C(4095); + break; + } + case ARM::LDMDA_UPD: + case ARM::LDMDB_UPD: + case ARM::LDMIA_UPD: + case ARM::LDMIB_UPD: + case ARM::STMDA_UPD: + case ARM::STMDB_UPD: + case ARM::STMIA_UPD: + case ARM::STMIB_UPD: + case ARM::sysLDMDA_UPD: + case ARM::sysLDMDB_UPD: + case ARM::sysLDMIA_UPD: + case ARM::sysLDMIB_UPD: + case ARM::sysSTMDA_UPD: + case ARM::sysSTMDB_UPD: + case ARM::sysSTMIA_UPD: + case ARM::sysSTMIB_UPD: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: regs + op = getRegisterListOpValue(MI, 4, Fixups, STI); + Value |= op & UINT64_C(65535); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::MOVr: + case ARM::MOVr_TC: + case ARM::MVNr: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: s + op = getCCOutOpValue(MI, 4, Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::MOVi: + case ARM::MVNi: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: s + op = getCCOutOpValue(MI, 4, Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: imm + op = getModImmOpValue(MI, 1, Fixups, STI); + Value |= op & UINT64_C(4095); + break; + } + case ARM::VADDD: + case ARM::VDIVD: + case ARM::VMULD: + case ARM::VNMULD: + case ARM::VSUBD: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Dd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Dn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: Dm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::VLDRD: + case ARM::VSTRD: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Dd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: addr + op = getAddrMode5OpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= (op & UINT64_C(7680)) << 7; + Value |= op & UINT64_C(255); + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::VMOVDRR: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Dm + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rt2 + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::VMOVRRD: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Dm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rt2 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::SXTB: + case ARM::SXTB16: + case ARM::SXTH: + case ARM::UXTB: + case ARM::UXTB16: + case ARM::UXTH: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + // op: rot + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(3)) << 10; + break; + } + case ARM::SEL: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::BFC: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: imm + op = getBitfieldInvertedMaskOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(992)) << 11; + Value |= (op & UINT64_C(31)) << 7; + break; + } + case ARM::MOVTi16: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: imm + op = getHiLo16ImmOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(61440)) << 4; + Value |= op & UINT64_C(4095); + break; + } + case ARM::SSAT16: + case ARM::USAT16: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: sat_imm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::SDIV: + case ARM::SMMUL: + case ARM::SMMULR: + case ARM::UDIV: + case ARM::USAD8: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + break; + } + case ARM::CMNzrsi: + case ARM::CMPrsi: + case ARM::TEQrsi: + case ARM::TSTrsi: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: shift + op = getSORegImmOpValue(MI, 1, Fixups, STI); + Value |= op & UINT64_C(4064); + Value |= op & UINT64_C(15); + break; + } + case ARM::QADD16: + case ARM::QADD8: + case ARM::QASX: + case ARM::QSAX: + case ARM::QSUB16: + case ARM::QSUB8: + case ARM::SADD16: + case ARM::SADD8: + case ARM::SASX: + case ARM::SHADD16: + case ARM::SHADD8: + case ARM::SHASX: + case ARM::SHSAX: + case ARM::SHSUB16: + case ARM::SHSUB8: + case ARM::SSAX: + case ARM::SSUB16: + case ARM::SSUB8: + case ARM::UADD16: + case ARM::UADD8: + case ARM::UASX: + case ARM::UHADD16: + case ARM::UHADD8: + case ARM::UHASX: + case ARM::UHSAX: + case ARM::UHSUB16: + case ARM::UHSUB8: + case ARM::UQADD16: + case ARM::UQADD8: + case ARM::UQASX: + case ARM::UQSAX: + case ARM::UQSUB16: + case ARM::UQSUB8: + case ARM::USAX: + case ARM::USUB16: + case ARM::USUB8: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::SMUAD: + case ARM::SMUADX: + case ARM::SMULBB: + case ARM::SMULBT: + case ARM::SMULTB: + case ARM::SMULTT: + case ARM::SMULWB: + case ARM::SMULWT: + case ARM::SMUSD: + case ARM::SMUSDX: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::QADD: + case ARM::QDADD: + case ARM::QDSUB: + case ARM::QSUB: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::SWP: + case ARM::SWPB: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rt2 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + // op: addr + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::LDRBi12: + case ARM::LDRi12: + case ARM::STRBi12: + case ARM::STRi12: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: addr + op = getAddrModeImm12OpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(4096)) << 11; + Value |= (op & UINT64_C(122880)) << 3; + Value |= op & UINT64_C(4095); + break; + } + case ARM::LDRcp: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: addr + op = getAddrModeImm12OpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(4096)) << 11; + Value |= op & UINT64_C(4095); + break; + } + case ARM::STLEX: + case ARM::STLEXB: + case ARM::STLEXD: + case ARM::STLEXH: + case ARM::STREX: + case ARM::STREXB: + case ARM::STREXD: + case ARM::STREXH: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + // op: addr + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + break; + } + case ARM::VADDH: + case ARM::VADDS: + case ARM::VDIVH: + case ARM::VDIVS: + case ARM::VMULH: + case ARM::VMULS: + case ARM::VNMULH: + case ARM::VNMULS: + case ARM::VSUBH: + case ARM::VSUBS: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Sd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(1)) << 22; + Value |= (op & UINT64_C(30)) << 11; + // op: Sn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(30)) << 15; + Value |= (op & UINT64_C(1)) << 7; + // op: Sm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(1)) << 5; + Value |= (op & UINT64_C(30)) >> 1; + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::VLDRH: + case ARM::VSTRH: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Sd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(1)) << 22; + Value |= (op & UINT64_C(30)) << 11; + // op: addr + op = getAddrMode5FP16OpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= (op & UINT64_C(7680)) << 7; + Value |= op & UINT64_C(255); + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::VLDRS: + case ARM::VSTRS: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Sd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(1)) << 22; + Value |= (op & UINT64_C(30)) << 11; + // op: addr + op = getAddrMode5OpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= (op & UINT64_C(7680)) << 7; + Value |= op & UINT64_C(255); + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::VSHTOH: + case ARM::VSHTOS: + case ARM::VSLTOH: + case ARM::VSLTOS: + case ARM::VTOSHH: + case ARM::VTOSHS: + case ARM::VTOSLH: + case ARM::VTOSLS: + case ARM::VTOUHH: + case ARM::VTOUHS: + case ARM::VTOULH: + case ARM::VTOULS: + case ARM::VUHTOH: + case ARM::VUHTOS: + case ARM::VULTOH: + case ARM::VULTOS: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: fbits + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(1)) << 5; + Value |= (op & UINT64_C(30)) >> 1; + // op: dst + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(1)) << 22; + Value |= (op & UINT64_C(30)) << 11; + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::VSHTOD: + case ARM::VSLTOD: + case ARM::VTOSHD: + case ARM::VTOSLD: + case ARM::VTOUHD: + case ARM::VTOULD: + case ARM::VUHTOD: + case ARM::VULTOD: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: fbits + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(1)) << 5; + Value |= (op & UINT64_C(30)) >> 1; + // op: dst + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::ADCrr: + case ARM::ADDrr: + case ARM::ANDrr: + case ARM::BICrr: + case ARM::EORrr: + case ARM::ORRrr: + case ARM::RSBrr: + case ARM::RSCrr: + case ARM::SBCrr: + case ARM::SUBrr: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: s + op = getCCOutOpValue(MI, 5, Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::ADCri: + case ARM::ADDri: + case ARM::ANDri: + case ARM::BICri: + case ARM::EORri: + case ARM::ORRri: + case ARM::RSBri: + case ARM::RSCri: + case ARM::SBCri: + case ARM::SUBri: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: s + op = getCCOutOpValue(MI, 5, Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: imm + op = getModImmOpValue(MI, 2, Fixups, STI); + Value |= op & UINT64_C(4095); + break; + } + case ARM::MVNsi: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: s + op = getCCOutOpValue(MI, 5, Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: shift + op = getSORegImmOpValue(MI, 1, Fixups, STI); + Value |= op & UINT64_C(4064); + Value |= op & UINT64_C(15); + break; + } + case ARM::MOVsi: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: s + op = getCCOutOpValue(MI, 5, Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: src + op = getSORegImmOpValue(MI, 1, Fixups, STI); + Value |= op & UINT64_C(4064); + Value |= op & UINT64_C(15); + break; + } + case ARM::MUL: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: s + op = getCCOutOpValue(MI, 5, Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::VFMAD: + case ARM::VFMSD: + case ARM::VFNMAD: + case ARM::VFNMSD: + case ARM::VMLAD: + case ARM::VMLSD: + case ARM::VNMLAD: + case ARM::VNMLSD: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Dd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(16)) << 18; + Value |= (op & UINT64_C(15)) << 12; + // op: Dn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value |= (op & UINT64_C(16)) << 3; + // op: Dm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(16)) << 1; + Value |= op & UINT64_C(15); + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::SXTAB: + case ARM::SXTAB16: + case ARM::SXTAH: + case ARM::UXTAB: + case ARM::UXTAB16: + case ARM::UXTAH: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(15); + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: rot + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(3)) << 10; + break; + } + case ARM::PKHBT: + case ARM::PKHTB: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(15); + // op: sh + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 7; + break; + } + case ARM::SBFX: + case ARM::UBFX: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + // op: lsb + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(31)) << 7; + // op: width + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + break; + } + case ARM::BFI: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(15); + // op: imm + op = getBitfieldInvertedMaskOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(992)) << 11; + Value |= (op & UINT64_C(31)) << 7; + break; + } + case ARM::SSAT: + case ARM::USAT: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: sat_imm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(31)) << 16; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(15); + // op: sh + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(31)) << 7; + Value |= (op & UINT64_C(32)) << 1; + break; + } + case ARM::MLS: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + // op: Ra + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + break; + } + case ARM::SMMLA: + case ARM::SMMLAR: + case ARM::SMMLS: + case ARM::SMMLSR: + case ARM::USADA8: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Ra + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + break; + } + case ARM::UMAAL: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: RdLo + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: RdHi + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::CMNzrsr: + case ARM::CMPrsr: + case ARM::TEQrsr: + case ARM::TSTrsr: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: shift + op = getSORegRegOpValue(MI, 1, Fixups, STI); + Value |= op & UINT64_C(3840); + Value |= op & UINT64_C(96); + Value |= op & UINT64_C(15); + break; + } + case ARM::SMLAD: + case ARM::SMLADX: + case ARM::SMLSD: + case ARM::SMLSDX: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Ra + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::SMLABB: + case ARM::SMLABT: + case ARM::SMLATB: + case ARM::SMLATT: + case ARM::SMLAWB: + case ARM::SMLAWT: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Ra + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + break; + } + case ARM::SMLALBB: + case ARM::SMLALBT: + case ARM::SMLALD: + case ARM::SMLALDX: + case ARM::SMLALTB: + case ARM::SMLALTT: + case ARM::SMLSLD: + case ARM::SMLSLDX: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(15); + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: RdLo + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: RdHi + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::LDRB_PRE_IMM: + case ARM::LDR_PRE_IMM: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: addr + op = getAddrModeImm12OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(4096)) << 11; + Value |= (op & UINT64_C(122880)) << 3; + Value |= op & UINT64_C(4095); + break; + } + case ARM::LDRBrs: + case ARM::LDRrs: + case ARM::STRBrs: + case ARM::STRrs: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: shift + op = getLdStSORegOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(4096)) << 11; + Value |= (op & UINT64_C(122880)) << 3; + Value |= op & UINT64_C(4064); + Value |= op & UINT64_C(15); + break; + } + case ARM::STRB_PRE_IMM: + case ARM::STR_PRE_IMM: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: addr + op = getAddrModeImm12OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(4096)) << 11; + Value |= (op & UINT64_C(122880)) << 3; + Value |= op & UINT64_C(4095); + break; + } + case ARM::VFMAH: + case ARM::VFMAS: + case ARM::VFMSH: + case ARM::VFMSS: + case ARM::VFNMAH: + case ARM::VFNMAS: + case ARM::VFNMSH: + case ARM::VFNMSS: + case ARM::VMLAH: + case ARM::VMLAS: + case ARM::VMLSH: + case ARM::VMLSS: + case ARM::VNMLAH: + case ARM::VNMLAS: + case ARM::VNMLSH: + case ARM::VNMLSS: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Sd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(1)) << 22; + Value |= (op & UINT64_C(30)) << 11; + // op: Sn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(30)) << 15; + Value |= (op & UINT64_C(1)) << 7; + // op: Sm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(1)) << 5; + Value |= (op & UINT64_C(30)) >> 1; + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::LDRH: + case ARM::LDRSB: + case ARM::LDRSH: + case ARM::STRH: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: addr + op = getAddrMode3OpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= (op & UINT64_C(8192)) << 9; + Value |= (op & UINT64_C(7680)) << 7; + Value |= (op & UINT64_C(240)) << 4; + Value |= op & UINT64_C(15); + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + break; + } + case ARM::LDCL_OFFSET: + case ARM::LDCL_PRE: + case ARM::LDC_OFFSET: + case ARM::LDC_PRE: + case ARM::STCL_OFFSET: + case ARM::STCL_PRE: + case ARM::STC_OFFSET: + case ARM::STC_PRE: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: addr + op = getAddrMode5OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= (op & UINT64_C(7680)) << 7; + Value |= op & UINT64_C(255); + // op: cop + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: CRd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + break; + } + case ARM::LDRHTi: + case ARM::LDRSBTi: + case ARM::LDRSHTi: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: addr + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: offset + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= (op & UINT64_C(240)) << 4; + Value |= op & UINT64_C(15); + break; + } + case ARM::STRHTi: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: addr + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: offset + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= (op & UINT64_C(240)) << 4; + Value |= op & UINT64_C(15); + break; + } + case ARM::VMOVSRR: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: dst1 + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(1)) << 5; + Value |= (op & UINT64_C(30)) >> 1; + // op: src1 + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: src2 + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::LDCL_POST: + case ARM::LDC_POST: + case ARM::STCL_POST: + case ARM::STC_POST: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: offset + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= op & UINT64_C(255); + // op: addr + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: cop + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: CRd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + break; + } + case ARM::LDCL_OPTION: + case ARM::LDC_OPTION: + case ARM::STCL_OPTION: + case ARM::STC_OPTION: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: option + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= op & UINT64_C(255); + // op: addr + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: cop + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: CRd + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + break; + } + case ARM::ADCrsi: + case ARM::ADDrsi: + case ARM::ANDrsi: + case ARM::BICrsi: + case ARM::EORrsi: + case ARM::ORRrsi: + case ARM::RSBrsi: + case ARM::RSCrsi: + case ARM::SBCrsi: + case ARM::SUBrsi: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: s + op = getCCOutOpValue(MI, 6, Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: shift + op = getSORegImmOpValue(MI, 2, Fixups, STI); + Value |= op & UINT64_C(4064); + Value |= op & UINT64_C(15); + break; + } + case ARM::MVNsr: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: s + op = getCCOutOpValue(MI, 6, Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: shift + op = getSORegRegOpValue(MI, 1, Fixups, STI); + Value |= op & UINT64_C(3840); + Value |= op & UINT64_C(96); + Value |= op & UINT64_C(15); + break; + } + case ARM::MOVsr: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: s + op = getCCOutOpValue(MI, 6, Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: src + op = getSORegRegOpValue(MI, 1, Fixups, STI); + Value |= op & UINT64_C(3840); + Value |= op & UINT64_C(96); + Value |= op & UINT64_C(15); + break; + } + case ARM::MLA: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: s + op = getCCOutOpValue(MI, 6, Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + // op: Ra + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + break; + } + case ARM::SMULL: + case ARM::UMULL: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: s + op = getCCOutOpValue(MI, 6, Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + // op: RdLo + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: RdHi + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::VMOVRRS: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: src1 + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(1)) << 5; + Value |= (op & UINT64_C(30)) >> 1; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rt2 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + Value = VFPThumb2PostEncoder(MI, Value, STI); + break; + } + case ARM::MRRC: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rt2 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: cop + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: opc1 + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 4; + // op: CRm + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::LDRH_PRE: + case ARM::LDRSB_PRE: + case ARM::LDRSH_PRE: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: addr + op = getAddrMode3OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= (op & UINT64_C(8192)) << 9; + Value |= (op & UINT64_C(7680)) << 7; + Value |= (op & UINT64_C(240)) << 4; + Value |= op & UINT64_C(15); + break; + } + case ARM::LDRB_PRE_REG: + case ARM::LDR_PRE_REG: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: addr + op = getLdStSORegOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(4096)) << 11; + Value |= (op & UINT64_C(122880)) << 3; + Value |= op & UINT64_C(4064); + Value |= op & UINT64_C(15); + break; + } + case ARM::LDRBT_POST_REG: + case ARM::LDRB_POST_REG: + case ARM::LDRT_POST_REG: + case ARM::LDR_POST_REG: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: offset + op = getAddrMode2OffsetOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(4096)) << 11; + Value |= op & UINT64_C(4064); + Value |= op & UINT64_C(15); + // op: addr + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::LDRBT_POST_IMM: + case ARM::LDRB_POST_IMM: + case ARM::LDRT_POST_IMM: + case ARM::LDR_POST_IMM: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: offset + op = getAddrMode2OffsetOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(4096)) << 11; + Value |= op & UINT64_C(4095); + // op: addr + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::LDRH_POST: + case ARM::LDRSB_POST: + case ARM::LDRSH_POST: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: offset + op = getAddrMode3OffsetOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= (op & UINT64_C(512)) << 13; + Value |= (op & UINT64_C(240)) << 4; + Value |= op & UINT64_C(15); + // op: addr + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::STRH_PRE: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: addr + op = getAddrMode3OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= (op & UINT64_C(8192)) << 9; + Value |= (op & UINT64_C(7680)) << 7; + Value |= (op & UINT64_C(240)) << 4; + Value |= op & UINT64_C(15); + break; + } + case ARM::STRB_PRE_REG: + case ARM::STR_PRE_REG: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: addr + op = getLdStSORegOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(4096)) << 11; + Value |= (op & UINT64_C(122880)) << 3; + Value |= op & UINT64_C(4064); + Value |= op & UINT64_C(15); + break; + } + case ARM::STRBT_POST_REG: + case ARM::STRB_POST_REG: + case ARM::STRT_POST_REG: + case ARM::STR_POST_REG: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: offset + op = getAddrMode2OffsetOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(4096)) << 11; + Value |= op & UINT64_C(4064); + Value |= op & UINT64_C(15); + // op: addr + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::STRBT_POST_IMM: + case ARM::STRB_POST_IMM: + case ARM::STRT_POST_IMM: + case ARM::STR_POST_IMM: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: offset + op = getAddrMode2OffsetOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(4096)) << 11; + Value |= op & UINT64_C(4095); + // op: addr + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::STRH_POST: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: offset + op = getAddrMode3OffsetOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= (op & UINT64_C(512)) << 13; + Value |= (op & UINT64_C(240)) << 4; + Value |= op & UINT64_C(15); + // op: addr + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::MCRR: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rt2 + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: cop + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: opc1 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 4; + // op: CRm + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::LDRD: + case ARM::STRD: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: addr + op = getAddrMode3OpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= (op & UINT64_C(8192)) << 9; + Value |= (op & UINT64_C(7680)) << 7; + Value |= (op & UINT64_C(240)) << 4; + Value |= op & UINT64_C(15); + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + break; + } + case ARM::LDRHTr: + case ARM::LDRSBTr: + case ARM::LDRSHTr: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: addr + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rm + op = getPostIdxRegOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(16)) << 19; + Value |= op & UINT64_C(15); + break; + } + case ARM::STRHTr: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: addr + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rm + op = getPostIdxRegOpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(16)) << 19; + Value |= op & UINT64_C(15); + break; + } + case ARM::ADCrsr: + case ARM::ADDrsr: + case ARM::ANDrsr: + case ARM::BICrsr: + case ARM::EORrsr: + case ARM::ORRrsr: + case ARM::RSBrsr: + case ARM::RSCrsr: + case ARM::SBCrsr: + case ARM::SUBrsr: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: s + op = getCCOutOpValue(MI, 7, Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: shift + op = getSORegRegOpValue(MI, 2, Fixups, STI); + Value |= op & UINT64_C(3840); + Value |= op & UINT64_C(96); + Value |= op & UINT64_C(15); + break; + } + case ARM::LDRD_PRE: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: addr + op = getAddrMode3OpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= (op & UINT64_C(8192)) << 9; + Value |= (op & UINT64_C(7680)) << 7; + Value |= (op & UINT64_C(240)) << 4; + Value |= op & UINT64_C(15); + break; + } + case ARM::MRC: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: cop + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: opc1 + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(7)) << 21; + // op: opc2 + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + // op: CRm + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= op & UINT64_C(15); + // op: CRn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::LDRD_POST: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: offset + op = getAddrMode3OffsetOpValue(MI, 4, Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= (op & UINT64_C(512)) << 13; + Value |= (op & UINT64_C(240)) << 4; + Value |= op & UINT64_C(15); + // op: addr + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::STRD_PRE: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: addr + op = getAddrMode3OpValue(MI, 3, Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= (op & UINT64_C(8192)) << 9; + Value |= (op & UINT64_C(7680)) << 7; + Value |= (op & UINT64_C(240)) << 4; + Value |= op & UINT64_C(15); + break; + } + case ARM::STRD_POST: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: offset + op = getAddrMode3OffsetOpValue(MI, 4, Fixups, STI); + Value |= (op & UINT64_C(256)) << 15; + Value |= (op & UINT64_C(512)) << 13; + Value |= (op & UINT64_C(240)) << 4; + Value |= op & UINT64_C(15); + // op: addr + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::MCR: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: Rt + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: cop + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: opc1 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(7)) << 21; + // op: opc2 + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + // op: CRm + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= op & UINT64_C(15); + // op: CRn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + break; + } + case ARM::CDP: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: opc1 + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 20; + // op: CRn + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: CRd + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: cop + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: opc2 + op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); + Value |= (op & UINT64_C(7)) << 5; + // op: CRm + op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::SMLAL: + case ARM::UMLAL: { + // op: p + op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); + Value |= (op & UINT64_C(15)) << 28; + // op: s + op = getCCOutOpValue(MI, 8, Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + // op: RdLo + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 12; + // op: RdHi + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::tPUSH: { + // op: regs + op = getRegisterListOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(16384)) >> 6; + Value |= op & UINT64_C(255); + break; + } + case ARM::tPOP: { + // op: regs + op = getRegisterListOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(32768)) >> 7; + Value |= op & UINT64_C(255); + break; + } + case ARM::t2MOVr: + case ARM::t2MVNr: + case ARM::t2RRX: { + // op: s + op = getCCOutOpValue(MI, 4, Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::t2MOVi: + case ARM::t2MVNi: { + // op: s + op = getCCOutOpValue(MI, 4, Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: imm + op = getT2SOImmOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(2048)) << 15; + Value |= (op & UINT64_C(1792)) << 4; + Value |= op & UINT64_C(255); + break; + } + case ARM::t2ASRri: + case ARM::t2LSLri: + case ARM::t2LSRri: + case ARM::t2RORri: { + // op: s + op = getCCOutOpValue(MI, 5, Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= op & UINT64_C(15); + // op: imm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= (op & UINT64_C(28)) << 10; + Value |= (op & UINT64_C(3)) << 6; + break; + } + case ARM::t2ADCrr: + case ARM::t2ADDrr: + case ARM::t2ANDrr: + case ARM::t2ASRrr: + case ARM::t2BICrr: + case ARM::t2EORrr: + case ARM::t2LSLrr: + case ARM::t2LSRrr: + case ARM::t2ORNrr: + case ARM::t2ORRrr: + case ARM::t2RORrr: + case ARM::t2RSBrr: + case ARM::t2SBCrr: + case ARM::t2SUBrr: { + // op: s + op = getCCOutOpValue(MI, 5, Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: Rm + op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); + Value |= op & UINT64_C(15); + break; + } + case ARM::t2ADCri: + case ARM::t2ADDri: + case ARM::t2ANDri: + case ARM::t2BICri: + case ARM::t2EORri: + case ARM::t2ORNri: + case ARM::t2ORRri: + case ARM::t2RSBri: + case ARM::t2SBCri: + case ARM::t2SUBri: { + // op: s + op = getCCOutOpValue(MI, 5, Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: imm + op = getT2SOImmOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(2048)) << 15; + Value |= (op & UINT64_C(1792)) << 4; + Value |= op & UINT64_C(255); + break; + } + case ARM::t2MVNs: { + // op: s + op = getCCOutOpValue(MI, 5, Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: ShiftedRm + op = getT2SORegOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(3584)) << 3; + Value |= (op & UINT64_C(480)) >> 1; + Value |= op & UINT64_C(15); + break; + } + case ARM::t2ADCrs: + case ARM::t2ADDrs: + case ARM::t2ANDrs: + case ARM::t2BICrs: + case ARM::t2EORrs: + case ARM::t2ORNrs: + case ARM::t2ORRrs: + case ARM::t2RSBrs: + case ARM::t2SBCrs: + case ARM::t2SUBrs: { + // op: s + op = getCCOutOpValue(MI, 6, Fixups, STI); + Value |= (op & UINT64_C(1)) << 20; + // op: Rd + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(15)) << 8; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); + Value |= (op & UINT64_C(15)) << 16; + // op: ShiftedRm + op = getT2SORegOpValue(MI, 2, Fixups, STI); + Value |= (op & UINT64_C(3584)) << 3; + Value |= (op & UINT64_C(480)) >> 1; + Value |= op & UINT64_C(15); + break; + } + case ARM::PLDWrs: + case ARM::PLDrs: + case ARM::PLIrs: { + // op: shift + op = getLdStSORegOpValue(MI, 0, Fixups, STI); + Value |= (op & UINT64_C(4096)) << 11; + Value |= (op & UINT64_C(122880)) << 3; + Value |= op & UINT64_C(4064); + Value |= op & UINT64_C(15); + break; + } + case ARM::BLXi: { + // op: target + op = getARMBLXTargetOpValue(MI, 0, Fixups, STI); + Value |= (op & UINT64_C(1)) << 24; + Value |= (op & UINT64_C(33554430)) >> 1; + break; + } + case ARM::tB: { + // op: target + op = getThumbBRTargetOpValue(MI, 0, Fixups, STI); + Value |= op & UINT64_C(2047); + break; + } + case ARM::tCBNZ: + case ARM::tCBZ: { + // op: target + op = getThumbCBTargetOpValue(MI, 1, Fixups, STI); + Value |= (op & UINT64_C(32)) << 4; + Value |= (op & UINT64_C(31)) << 3; + // op: Rn + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(7); + break; + } + case ARM::t2B: { + // op: target + op = getUnconditionalBranchTargetOpValue(MI, 0, Fixups, STI); + Value |= (op & UINT64_C(8388608)) << 3; + Value |= (op & UINT64_C(2095104)) << 5; + Value |= (op & UINT64_C(4194304)) >> 9; + Value |= (op & UINT64_C(2097152)) >> 10; + Value |= op & UINT64_C(2047); + break; + } + case ARM::BKPT: + case ARM::HLT: { + // op: val + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= (op & UINT64_C(65520)) << 4; + Value |= op & UINT64_C(15); + break; + } + case ARM::tBKPT: { + // op: val + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(255); + break; + } + case ARM::tHLT: { + // op: val + op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); + Value |= op & UINT64_C(63); + break; + } + default: + std::string msg; + raw_string_ostream Msg(msg); + Msg << "Not supported instr: " << MI; + report_fatal_error(Msg.str()); + } + return Value; +} + diff --git a/llvm/lib/Target/ARM/ARMGenRegisterInfo.inc b/llvm/lib/Target/ARM/ARMGenRegisterInfo.inc new file mode 100644 index 0000000..31cad12 --- /dev/null +++ b/llvm/lib/Target/ARM/ARMGenRegisterInfo.inc @@ -0,0 +1,3230 @@ +/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ +|* *| +|* Target Register Enum Values *| +|* *| +|* Automatically generated file, do not edit! *| +|* *| +\*===----------------------------------------------------------------------===*/ + + +#ifdef GET_REGINFO_ENUM +#undef GET_REGINFO_ENUM +namespace llvm_ks { + +class MCRegisterClass; +extern const MCRegisterClass ARMMCRegisterClasses[]; + +namespace ARM { +enum { + NoRegister, + APSR = 1, + APSR_NZCV = 2, + CPSR = 3, + FPEXC = 4, + FPINST = 5, + FPSCR = 6, + FPSCR_NZCV = 7, + FPSID = 8, + ITSTATE = 9, + LR = 10, + PC = 11, + SP = 12, + SPSR = 13, + D0 = 14, + D1 = 15, + D2 = 16, + D3 = 17, + D4 = 18, + D5 = 19, + D6 = 20, + D7 = 21, + D8 = 22, + D9 = 23, + D10 = 24, + D11 = 25, + D12 = 26, + D13 = 27, + D14 = 28, + D15 = 29, + D16 = 30, + D17 = 31, + D18 = 32, + D19 = 33, + D20 = 34, + D21 = 35, + D22 = 36, + D23 = 37, + D24 = 38, + D25 = 39, + D26 = 40, + D27 = 41, + D28 = 42, + D29 = 43, + D30 = 44, + D31 = 45, + FPINST2 = 46, + MVFR0 = 47, + MVFR1 = 48, + MVFR2 = 49, + Q0 = 50, + Q1 = 51, + Q2 = 52, + Q3 = 53, + Q4 = 54, + Q5 = 55, + Q6 = 56, + Q7 = 57, + Q8 = 58, + Q9 = 59, + Q10 = 60, + Q11 = 61, + Q12 = 62, + Q13 = 63, + Q14 = 64, + Q15 = 65, + R0 = 66, + R1 = 67, + R2 = 68, + R3 = 69, + R4 = 70, + R5 = 71, + R6 = 72, + R7 = 73, + R8 = 74, + R9 = 75, + R10 = 76, + R11 = 77, + R12 = 78, + S0 = 79, + S1 = 80, + S2 = 81, + S3 = 82, + S4 = 83, + S5 = 84, + S6 = 85, + S7 = 86, + S8 = 87, + S9 = 88, + S10 = 89, + S11 = 90, + S12 = 91, + S13 = 92, + S14 = 93, + S15 = 94, + S16 = 95, + S17 = 96, + S18 = 97, + S19 = 98, + S20 = 99, + S21 = 100, + S22 = 101, + S23 = 102, + S24 = 103, + S25 = 104, + S26 = 105, + S27 = 106, + S28 = 107, + S29 = 108, + S30 = 109, + S31 = 110, + D0_D2 = 111, + D1_D3 = 112, + D2_D4 = 113, + D3_D5 = 114, + D4_D6 = 115, + D5_D7 = 116, + D6_D8 = 117, + D7_D9 = 118, + D8_D10 = 119, + D9_D11 = 120, + D10_D12 = 121, + D11_D13 = 122, + D12_D14 = 123, + D13_D15 = 124, + D14_D16 = 125, + D15_D17 = 126, + D16_D18 = 127, + D17_D19 = 128, + D18_D20 = 129, + D19_D21 = 130, + D20_D22 = 131, + D21_D23 = 132, + D22_D24 = 133, + D23_D25 = 134, + D24_D26 = 135, + D25_D27 = 136, + D26_D28 = 137, + D27_D29 = 138, + D28_D30 = 139, + D29_D31 = 140, + Q0_Q1 = 141, + Q1_Q2 = 142, + Q2_Q3 = 143, + Q3_Q4 = 144, + Q4_Q5 = 145, + Q5_Q6 = 146, + Q6_Q7 = 147, + Q7_Q8 = 148, + Q8_Q9 = 149, + Q9_Q10 = 150, + Q10_Q11 = 151, + Q11_Q12 = 152, + Q12_Q13 = 153, + Q13_Q14 = 154, + Q14_Q15 = 155, + Q0_Q1_Q2_Q3 = 156, + Q1_Q2_Q3_Q4 = 157, + Q2_Q3_Q4_Q5 = 158, + Q3_Q4_Q5_Q6 = 159, + Q4_Q5_Q6_Q7 = 160, + Q5_Q6_Q7_Q8 = 161, + Q6_Q7_Q8_Q9 = 162, + Q7_Q8_Q9_Q10 = 163, + Q8_Q9_Q10_Q11 = 164, + Q9_Q10_Q11_Q12 = 165, + Q10_Q11_Q12_Q13 = 166, + Q11_Q12_Q13_Q14 = 167, + Q12_Q13_Q14_Q15 = 168, + R12_SP = 169, + R0_R1 = 170, + R2_R3 = 171, + R4_R5 = 172, + R6_R7 = 173, + R8_R9 = 174, + R10_R11 = 175, + D0_D1_D2 = 176, + D1_D2_D3 = 177, + D2_D3_D4 = 178, + D3_D4_D5 = 179, + D4_D5_D6 = 180, + D5_D6_D7 = 181, + D6_D7_D8 = 182, + D7_D8_D9 = 183, + D8_D9_D10 = 184, + D9_D10_D11 = 185, + D10_D11_D12 = 186, + D11_D12_D13 = 187, + D12_D13_D14 = 188, + D13_D14_D15 = 189, + D14_D15_D16 = 190, + D15_D16_D17 = 191, + D16_D17_D18 = 192, + D17_D18_D19 = 193, + D18_D19_D20 = 194, + D19_D20_D21 = 195, + D20_D21_D22 = 196, + D21_D22_D23 = 197, + D22_D23_D24 = 198, + D23_D24_D25 = 199, + D24_D25_D26 = 200, + D25_D26_D27 = 201, + D26_D27_D28 = 202, + D27_D28_D29 = 203, + D28_D29_D30 = 204, + D29_D30_D31 = 205, + D0_D2_D4 = 206, + D1_D3_D5 = 207, + D2_D4_D6 = 208, + D3_D5_D7 = 209, + D4_D6_D8 = 210, + D5_D7_D9 = 211, + D6_D8_D10 = 212, + D7_D9_D11 = 213, + D8_D10_D12 = 214, + D9_D11_D13 = 215, + D10_D12_D14 = 216, + D11_D13_D15 = 217, + D12_D14_D16 = 218, + D13_D15_D17 = 219, + D14_D16_D18 = 220, + D15_D17_D19 = 221, + D16_D18_D20 = 222, + D17_D19_D21 = 223, + D18_D20_D22 = 224, + D19_D21_D23 = 225, + D20_D22_D24 = 226, + D21_D23_D25 = 227, + D22_D24_D26 = 228, + D23_D25_D27 = 229, + D24_D26_D28 = 230, + D25_D27_D29 = 231, + D26_D28_D30 = 232, + D27_D29_D31 = 233, + D0_D2_D4_D6 = 234, + D1_D3_D5_D7 = 235, + D2_D4_D6_D8 = 236, + D3_D5_D7_D9 = 237, + D4_D6_D8_D10 = 238, + D5_D7_D9_D11 = 239, + D6_D8_D10_D12 = 240, + D7_D9_D11_D13 = 241, + D8_D10_D12_D14 = 242, + D9_D11_D13_D15 = 243, + D10_D12_D14_D16 = 244, + D11_D13_D15_D17 = 245, + D12_D14_D16_D18 = 246, + D13_D15_D17_D19 = 247, + D14_D16_D18_D20 = 248, + D15_D17_D19_D21 = 249, + D16_D18_D20_D22 = 250, + D17_D19_D21_D23 = 251, + D18_D20_D22_D24 = 252, + D19_D21_D23_D25 = 253, + D20_D22_D24_D26 = 254, + D21_D23_D25_D27 = 255, + D22_D24_D26_D28 = 256, + D23_D25_D27_D29 = 257, + D24_D26_D28_D30 = 258, + D25_D27_D29_D31 = 259, + D1_D2 = 260, + D3_D4 = 261, + D5_D6 = 262, + D7_D8 = 263, + D9_D10 = 264, + D11_D12 = 265, + D13_D14 = 266, + D15_D16 = 267, + D17_D18 = 268, + D19_D20 = 269, + D21_D22 = 270, + D23_D24 = 271, + D25_D26 = 272, + D27_D28 = 273, + D29_D30 = 274, + D1_D2_D3_D4 = 275, + D3_D4_D5_D6 = 276, + D5_D6_D7_D8 = 277, + D7_D8_D9_D10 = 278, + D9_D10_D11_D12 = 279, + D11_D12_D13_D14 = 280, + D13_D14_D15_D16 = 281, + D15_D16_D17_D18 = 282, + D17_D18_D19_D20 = 283, + D19_D20_D21_D22 = 284, + D21_D22_D23_D24 = 285, + D23_D24_D25_D26 = 286, + D25_D26_D27_D28 = 287, + D27_D28_D29_D30 = 288, + NUM_TARGET_REGS // 289 +}; +} + +// Register classes +namespace ARM { +enum { + SPRRegClassID = 0, + GPRRegClassID = 1, + GPRwithAPSRRegClassID = 2, + SPR_8RegClassID = 3, + GPRnopcRegClassID = 4, + rGPRRegClassID = 5, + hGPRRegClassID = 6, + tGPRRegClassID = 7, + GPRnopc_and_hGPRRegClassID = 8, + hGPR_and_rGPRRegClassID = 9, + tcGPRRegClassID = 10, + tGPR_and_tcGPRRegClassID = 11, + CCRRegClassID = 12, + GPRspRegClassID = 13, + hGPR_and_tcGPRRegClassID = 14, + DPRRegClassID = 15, + DPR_VFP2RegClassID = 16, + DPR_8RegClassID = 17, + GPRPairRegClassID = 18, + GPRPair_with_gsub_1_in_rGPRRegClassID = 19, + GPRPair_with_gsub_0_in_tGPRRegClassID = 20, + GPRPair_with_gsub_0_in_hGPRRegClassID = 21, + GPRPair_with_gsub_0_in_tcGPRRegClassID = 22, + GPRPair_with_gsub_1_in_hGPR_and_rGPRRegClassID = 23, + GPRPair_with_gsub_1_in_tcGPRRegClassID = 24, + GPRPair_with_gsub_1_in_GPRspRegClassID = 25, + DPairSpcRegClassID = 26, + DPairSpc_with_ssub_0RegClassID = 27, + DPairSpc_with_dsub_2_then_ssub_0RegClassID = 28, + DPairSpc_with_dsub_0_in_DPR_8RegClassID = 29, + DPairSpc_with_dsub_2_in_DPR_8RegClassID = 30, + DPairRegClassID = 31, + DPair_with_ssub_0RegClassID = 32, + QPRRegClassID = 33, + DPair_with_ssub_2RegClassID = 34, + DPair_with_dsub_0_in_DPR_8RegClassID = 35, + QPR_VFP2RegClassID = 36, + DPair_with_dsub_1_in_DPR_8RegClassID = 37, + QPR_8RegClassID = 38, + DTripleRegClassID = 39, + DTripleSpcRegClassID = 40, + DTripleSpc_with_ssub_0RegClassID = 41, + DTriple_with_ssub_0RegClassID = 42, + DTriple_with_dsub_1_dsub_2_in_QPRRegClassID = 43, + DTriple_with_qsub_0_in_QPRRegClassID = 44, + DTriple_with_ssub_2RegClassID = 45, + DTripleSpc_with_dsub_2_then_ssub_0RegClassID = 46, + DTriple_with_dsub_2_then_ssub_0RegClassID = 47, + DTripleSpc_with_dsub_4_then_ssub_0RegClassID = 48, + DTripleSpc_with_dsub_0_in_DPR_8RegClassID = 49, + DTriple_with_dsub_0_in_DPR_8RegClassID = 50, + DTriple_with_qsub_0_in_QPR_VFP2RegClassID = 51, + DTriple_with_ssub_0_and_DTriple_with_dsub_1_dsub_2_in_QPRRegClassID = 52, + DTriple_with_dsub_1_dsub_2_in_QPR_VFP2RegClassID = 53, + DTriple_with_dsub_1_in_DPR_8RegClassID = 54, + DTriple_with_dsub_2_then_ssub_0_and_DTriple_with_qsub_0_in_QPRRegClassID = 55, + DTripleSpc_with_dsub_2_in_DPR_8RegClassID = 56, + DTriple_with_dsub_2_in_DPR_8RegClassID = 57, + DTripleSpc_with_dsub_4_in_DPR_8RegClassID = 58, + DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_dsub_1_dsub_2_in_QPRRegClassID = 59, + DTriple_with_qsub_0_in_QPR_8RegClassID = 60, + DTriple_with_dsub_1_dsub_2_in_QPR_8RegClassID = 61, + DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_QPRRegClassID = 62, + DQuadSpcRegClassID = 63, + DQuadSpc_with_ssub_0RegClassID = 64, + DQuadSpc_with_dsub_2_then_ssub_0RegClassID = 65, + DQuadSpc_with_dsub_4_then_ssub_0RegClassID = 66, + DQuadSpc_with_dsub_0_in_DPR_8RegClassID = 67, + DQuadSpc_with_dsub_2_in_DPR_8RegClassID = 68, + DQuadSpc_with_dsub_4_in_DPR_8RegClassID = 69, + DQuadRegClassID = 70, + DQuad_with_ssub_0RegClassID = 71, + DQuad_with_ssub_2RegClassID = 72, + QQPRRegClassID = 73, + DQuad_with_dsub_1_dsub_2_in_QPRRegClassID = 74, + DQuad_with_dsub_2_then_ssub_0RegClassID = 75, + DQuad_with_dsub_3_then_ssub_0RegClassID = 76, + DQuad_with_dsub_0_in_DPR_8RegClassID = 77, + DQuad_with_qsub_0_in_QPR_VFP2RegClassID = 78, + DQuad_with_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPRRegClassID = 79, + DQuad_with_dsub_1_dsub_2_in_QPR_VFP2RegClassID = 80, + DQuad_with_dsub_1_in_DPR_8RegClassID = 81, + DQuad_with_qsub_1_in_QPR_VFP2RegClassID = 82, + DQuad_with_dsub_2_in_DPR_8RegClassID = 83, + DQuad_with_dsub_3_then_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPRRegClassID = 84, + DQuad_with_dsub_3_in_DPR_8RegClassID = 85, + DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPRRegClassID = 86, + DQuad_with_qsub_0_in_QPR_8RegClassID = 87, + DQuad_with_dsub_1_dsub_2_in_QPR_8RegClassID = 88, + DQuad_with_qsub_1_in_QPR_8RegClassID = 89, + DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPRRegClassID = 90, + QQQQPRRegClassID = 91, + QQQQPR_with_ssub_0RegClassID = 92, + QQQQPR_with_dsub_2_then_ssub_0RegClassID = 93, + QQQQPR_with_dsub_5_then_ssub_0RegClassID = 94, + QQQQPR_with_dsub_7_then_ssub_0RegClassID = 95, + QQQQPR_with_dsub_0_in_DPR_8RegClassID = 96, + QQQQPR_with_dsub_2_in_DPR_8RegClassID = 97, + QQQQPR_with_dsub_4_in_DPR_8RegClassID = 98, + QQQQPR_with_dsub_6_in_DPR_8RegClassID = 99, + + }; +} + +// Subregister indices +namespace ARM { +enum { + NoSubRegister, + dsub_0, // 1 + dsub_1, // 2 + dsub_2, // 3 + dsub_3, // 4 + dsub_4, // 5 + dsub_5, // 6 + dsub_6, // 7 + dsub_7, // 8 + gsub_0, // 9 + gsub_1, // 10 + qqsub_0, // 11 + qqsub_1, // 12 + qsub_0, // 13 + qsub_1, // 14 + qsub_2, // 15 + qsub_3, // 16 + ssub_0, // 17 + ssub_1, // 18 + ssub_2, // 19 + ssub_3, // 20 + dsub_2_then_ssub_0, // 21 + dsub_2_then_ssub_1, // 22 + dsub_3_then_ssub_0, // 23 + dsub_3_then_ssub_1, // 24 + dsub_7_then_ssub_0, // 25 + dsub_7_then_ssub_1, // 26 + dsub_6_then_ssub_0, // 27 + dsub_6_then_ssub_1, // 28 + dsub_5_then_ssub_0, // 29 + dsub_5_then_ssub_1, // 30 + dsub_4_then_ssub_0, // 31 + dsub_4_then_ssub_1, // 32 + dsub_0_dsub_2, // 33 + dsub_0_dsub_1_dsub_2, // 34 + dsub_1_dsub_3, // 35 + dsub_1_dsub_2_dsub_3, // 36 + dsub_1_dsub_2, // 37 + dsub_0_dsub_2_dsub_4, // 38 + dsub_0_dsub_2_dsub_4_dsub_6, // 39 + dsub_1_dsub_3_dsub_5, // 40 + dsub_1_dsub_3_dsub_5_dsub_7, // 41 + dsub_1_dsub_2_dsub_3_dsub_4, // 42 + dsub_2_dsub_4, // 43 + dsub_2_dsub_3_dsub_4, // 44 + dsub_2_dsub_4_dsub_6, // 45 + dsub_3_dsub_5, // 46 + dsub_3_dsub_4_dsub_5, // 47 + dsub_3_dsub_5_dsub_7, // 48 + dsub_3_dsub_4, // 49 + dsub_3_dsub_4_dsub_5_dsub_6, // 50 + dsub_4_dsub_6, // 51 + dsub_4_dsub_5_dsub_6, // 52 + dsub_5_dsub_7, // 53 + dsub_5_dsub_6_dsub_7, // 54 + dsub_5_dsub_6, // 55 + qsub_1_qsub_2, // 56 + NUM_TARGET_SUBREGS +}; +} +} // End llvm namespace +#endif // GET_REGINFO_ENUM + +/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ +|* *| +|* MC Register Information *| +|* *| +|* Automatically generated file, do not edit! *| +|* *| +\*===----------------------------------------------------------------------===*/ + + +#ifdef GET_REGINFO_MC_DESC +#undef GET_REGINFO_MC_DESC +namespace llvm_ks { + +extern const MCPhysReg ARMRegDiffLists[] = { + /* 0 */ 64924, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, + /* 17 */ 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, + /* 32 */ 36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, + /* 45 */ 40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, + /* 56 */ 64450, 1, 1, 1, 1, 1, 1, 1, 0, + /* 65 */ 64984, 1, 1, 1, 1, 1, 1, 1, 0, + /* 74 */ 65252, 1, 1, 1, 1, 1, 1, 1, 0, + /* 83 */ 38, 1, 1, 1, 1, 1, 1, 0, + /* 91 */ 40, 1, 1, 1, 1, 1, 0, + /* 98 */ 65196, 1, 1, 1, 1, 1, 0, + /* 105 */ 40, 1, 1, 1, 1, 0, + /* 111 */ 42, 1, 1, 1, 1, 0, + /* 117 */ 42, 1, 1, 1, 0, + /* 122 */ 64510, 1, 1, 1, 0, + /* 127 */ 65015, 1, 1, 1, 0, + /* 132 */ 65282, 1, 1, 1, 0, + /* 137 */ 65348, 1, 1, 1, 0, + /* 142 */ 13, 1, 1, 0, + /* 146 */ 42, 1, 1, 0, + /* 150 */ 65388, 1, 1, 0, + /* 154 */ 137, 65489, 48, 65489, 12, 121, 65416, 1, 1, 0, + /* 164 */ 136, 65490, 47, 65490, 12, 121, 65416, 1, 1, 0, + /* 174 */ 135, 65491, 46, 65491, 12, 121, 65416, 1, 1, 0, + /* 184 */ 134, 65492, 45, 65492, 12, 121, 65416, 1, 1, 0, + /* 194 */ 133, 65493, 44, 65493, 12, 121, 65416, 1, 1, 0, + /* 204 */ 132, 65494, 43, 65494, 12, 121, 65416, 1, 1, 0, + /* 214 */ 131, 65495, 42, 65495, 12, 121, 65416, 1, 1, 0, + /* 224 */ 130, 65496, 41, 65496, 12, 121, 65416, 1, 1, 0, + /* 234 */ 129, 65497, 40, 65497, 12, 121, 65416, 1, 1, 0, + /* 244 */ 128, 65498, 39, 65498, 12, 121, 65416, 1, 1, 0, + /* 254 */ 65489, 133, 65416, 1, 1, 0, + /* 260 */ 65490, 133, 65416, 1, 1, 0, + /* 266 */ 65491, 133, 65416, 1, 1, 0, + /* 272 */ 65492, 133, 65416, 1, 1, 0, + /* 278 */ 65493, 133, 65416, 1, 1, 0, + /* 284 */ 65494, 133, 65416, 1, 1, 0, + /* 290 */ 65495, 133, 65416, 1, 1, 0, + /* 296 */ 65496, 133, 65416, 1, 1, 0, + /* 302 */ 65497, 133, 65416, 1, 1, 0, + /* 308 */ 65498, 133, 65416, 1, 1, 0, + /* 314 */ 127, 65499, 38, 65499, 133, 65416, 1, 1, 0, + /* 323 */ 65080, 1, 3, 1, 3, 1, 3, 1, 0, + /* 332 */ 65136, 1, 3, 1, 3, 1, 0, + /* 339 */ 65326, 1, 3, 1, 0, + /* 344 */ 13, 1, 0, + /* 347 */ 14, 1, 0, + /* 350 */ 65, 1, 0, + /* 353 */ 65500, 65, 1, 65471, 66, 1, 0, + /* 360 */ 65291, 66, 1, 65470, 67, 1, 0, + /* 367 */ 65439, 65, 1, 65472, 67, 1, 0, + /* 374 */ 65501, 67, 1, 65469, 68, 1, 0, + /* 381 */ 65439, 66, 1, 65471, 68, 1, 0, + /* 388 */ 65292, 68, 1, 65468, 69, 1, 0, + /* 395 */ 65439, 67, 1, 65470, 69, 1, 0, + /* 402 */ 65502, 69, 1, 65467, 70, 1, 0, + /* 409 */ 65439, 68, 1, 65469, 70, 1, 0, + /* 416 */ 65293, 70, 1, 65466, 71, 1, 0, + /* 423 */ 65439, 69, 1, 65468, 71, 1, 0, + /* 430 */ 65503, 71, 1, 65465, 72, 1, 0, + /* 437 */ 65439, 70, 1, 65467, 72, 1, 0, + /* 444 */ 65294, 72, 1, 65464, 73, 1, 0, + /* 451 */ 65439, 71, 1, 65466, 73, 1, 0, + /* 458 */ 65504, 73, 1, 65463, 74, 1, 0, + /* 465 */ 65439, 72, 1, 65465, 74, 1, 0, + /* 472 */ 65295, 74, 1, 65462, 75, 1, 0, + /* 479 */ 65439, 73, 1, 65464, 75, 1, 0, + /* 486 */ 65505, 75, 1, 65461, 76, 1, 0, + /* 493 */ 65439, 74, 1, 65463, 76, 1, 0, + /* 500 */ 65296, 76, 1, 65460, 77, 1, 0, + /* 507 */ 65439, 75, 1, 65462, 77, 1, 0, + /* 514 */ 65506, 77, 1, 65459, 78, 1, 0, + /* 521 */ 65439, 76, 1, 65461, 78, 1, 0, + /* 528 */ 65297, 78, 1, 65458, 79, 1, 0, + /* 535 */ 65439, 77, 1, 65460, 79, 1, 0, + /* 542 */ 65507, 79, 1, 65457, 80, 1, 0, + /* 549 */ 65439, 78, 1, 65459, 80, 1, 0, + /* 556 */ 65045, 1, 0, + /* 559 */ 65260, 1, 0, + /* 562 */ 65299, 1, 0, + /* 565 */ 65300, 1, 0, + /* 568 */ 65301, 1, 0, + /* 571 */ 65302, 1, 0, + /* 574 */ 65303, 1, 0, + /* 577 */ 65304, 1, 0, + /* 580 */ 65305, 1, 0, + /* 583 */ 65453, 1, 65499, 133, 1, 65416, 1, 0, + /* 591 */ 138, 65488, 49, 65488, 12, 121, 65416, 1, 0, + /* 600 */ 65488, 13, 121, 65416, 1, 0, + /* 606 */ 65489, 13, 121, 65416, 1, 0, + /* 612 */ 65490, 13, 121, 65416, 1, 0, + /* 618 */ 65491, 13, 121, 65416, 1, 0, + /* 624 */ 65492, 13, 121, 65416, 1, 0, + /* 630 */ 65493, 13, 121, 65416, 1, 0, + /* 636 */ 65494, 13, 121, 65416, 1, 0, + /* 642 */ 65495, 13, 121, 65416, 1, 0, + /* 648 */ 65496, 13, 121, 65416, 1, 0, + /* 654 */ 65497, 13, 121, 65416, 1, 0, + /* 660 */ 65498, 13, 121, 65416, 1, 0, + /* 666 */ 65464, 1, 65488, 133, 65416, 121, 65416, 1, 0, + /* 675 */ 65463, 1, 65489, 133, 65416, 121, 65416, 1, 0, + /* 684 */ 65462, 1, 65490, 133, 65416, 121, 65416, 1, 0, + /* 693 */ 65461, 1, 65491, 133, 65416, 121, 65416, 1, 0, + /* 702 */ 65460, 1, 65492, 133, 65416, 121, 65416, 1, 0, + /* 711 */ 65459, 1, 65493, 133, 65416, 121, 65416, 1, 0, + /* 720 */ 65458, 1, 65494, 133, 65416, 121, 65416, 1, 0, + /* 729 */ 65457, 1, 65495, 133, 65416, 121, 65416, 1, 0, + /* 738 */ 65456, 1, 65496, 133, 65416, 121, 65416, 1, 0, + /* 747 */ 65455, 1, 65497, 133, 65416, 121, 65416, 1, 0, + /* 756 */ 65454, 1, 65498, 133, 65416, 121, 65416, 1, 0, + /* 765 */ 65488, 133, 65416, 1, 0, + /* 770 */ 65499, 134, 65416, 1, 0, + /* 775 */ 126, 65500, 37, 65500, 133, 65417, 1, 0, + /* 783 */ 65432, 1, 0, + /* 786 */ 65433, 1, 0, + /* 789 */ 65434, 1, 0, + /* 792 */ 65435, 1, 0, + /* 795 */ 65436, 1, 0, + /* 798 */ 65437, 1, 0, + /* 801 */ 65464, 1, 0, + /* 804 */ 65508, 1, 0, + /* 807 */ 65509, 1, 0, + /* 810 */ 65510, 1, 0, + /* 813 */ 65511, 1, 0, + /* 816 */ 65512, 1, 0, + /* 819 */ 65513, 1, 0, + /* 822 */ 65514, 1, 0, + /* 825 */ 65515, 1, 0, + /* 828 */ 65520, 1, 0, + /* 831 */ 65080, 1, 3, 1, 3, 1, 2, 0, + /* 839 */ 65136, 1, 3, 1, 2, 0, + /* 845 */ 65326, 1, 2, 0, + /* 849 */ 65080, 1, 3, 1, 2, 2, 0, + /* 856 */ 65136, 1, 2, 2, 0, + /* 861 */ 65080, 1, 2, 2, 2, 0, + /* 867 */ 65330, 2, 2, 2, 0, + /* 872 */ 65080, 1, 3, 2, 2, 0, + /* 878 */ 65358, 2, 2, 0, + /* 882 */ 65080, 1, 3, 1, 3, 2, 0, + /* 889 */ 65136, 1, 3, 2, 0, + /* 894 */ 65344, 76, 1, 65461, 78, 1, 65459, 80, 1, 12, 2, 0, + /* 906 */ 65344, 75, 1, 65462, 77, 1, 65460, 79, 1, 13, 2, 0, + /* 918 */ 65344, 74, 1, 65463, 76, 1, 65461, 78, 1, 14, 2, 0, + /* 930 */ 65344, 73, 1, 65464, 75, 1, 65462, 77, 1, 15, 2, 0, + /* 942 */ 65344, 72, 1, 65465, 74, 1, 65463, 76, 1, 16, 2, 0, + /* 954 */ 65344, 71, 1, 65466, 73, 1, 65464, 75, 1, 17, 2, 0, + /* 966 */ 65344, 70, 1, 65467, 72, 1, 65465, 74, 1, 18, 2, 0, + /* 978 */ 65344, 69, 1, 65468, 71, 1, 65466, 73, 1, 19, 2, 0, + /* 990 */ 65344, 68, 1, 65469, 70, 1, 65467, 72, 1, 20, 2, 0, + /* 1002 */ 65344, 67, 1, 65470, 69, 1, 65468, 71, 1, 21, 2, 0, + /* 1014 */ 65344, 66, 1, 65471, 68, 1, 65469, 70, 1, 22, 2, 0, + /* 1026 */ 65344, 65, 1, 65472, 67, 1, 65470, 69, 1, 23, 2, 0, + /* 1038 */ 65344, 2, 2, 93, 2, 0, + /* 1044 */ 65344, 80, 1, 65457, 2, 93, 2, 0, + /* 1052 */ 65344, 79, 1, 65458, 2, 93, 2, 0, + /* 1060 */ 65344, 78, 1, 65459, 80, 1, 65457, 93, 2, 0, + /* 1070 */ 65344, 77, 1, 65460, 79, 1, 65458, 93, 2, 0, + /* 1080 */ 65439, 2, 0, + /* 1083 */ 65453, 2, 0, + /* 1086 */ 65080, 1, 3, 1, 3, 1, 3, 0, + /* 1094 */ 65136, 1, 3, 1, 3, 0, + /* 1100 */ 65326, 1, 3, 0, + /* 1104 */ 5, 0, + /* 1106 */ 140, 65486, 13, 0, + /* 1110 */ 14, 0, + /* 1112 */ 126, 65501, 15, 0, + /* 1116 */ 10, 66, 0, + /* 1119 */ 65445, 65514, 1, 22, 65515, 1, 94, 65, 65472, 65, 69, 0, + /* 1131 */ 65445, 65513, 1, 23, 65514, 1, 94, 65, 65472, 65, 70, 0, + /* 1143 */ 65445, 65512, 1, 24, 65513, 1, 94, 65, 65472, 65, 71, 0, + /* 1155 */ 65445, 65511, 1, 25, 65512, 1, 94, 65, 65472, 65, 72, 0, + /* 1167 */ 65445, 65510, 1, 26, 65511, 1, 94, 65, 65472, 65, 73, 0, + /* 1179 */ 65445, 65509, 1, 27, 65510, 1, 94, 65, 65472, 65, 74, 0, + /* 1191 */ 65445, 65508, 1, 28, 65509, 1, 94, 65, 65472, 65, 75, 0, + /* 1203 */ 65445, 65507, 79, 1, 65457, 80, 1, 65484, 65508, 1, 94, 65, 65472, 65, 76, 0, + /* 1219 */ 65445, 65506, 77, 1, 65459, 78, 1, 65487, 65507, 79, 1, 65457, 80, 1, 13, 65, 65472, 65, 77, 0, + /* 1239 */ 65445, 65505, 75, 1, 65461, 76, 1, 65490, 65506, 77, 1, 65459, 78, 1, 15, 65, 65472, 65, 78, 0, + /* 1259 */ 65445, 65504, 73, 1, 65463, 74, 1, 65493, 65505, 75, 1, 65461, 76, 1, 17, 65, 65472, 65, 79, 0, + /* 1279 */ 65445, 65503, 71, 1, 65465, 72, 1, 65496, 65504, 73, 1, 65463, 74, 1, 19, 65, 65472, 65, 80, 0, + /* 1299 */ 65445, 65502, 69, 1, 65467, 70, 1, 65499, 65503, 71, 1, 65465, 72, 1, 21, 65, 65472, 65, 81, 0, + /* 1319 */ 65445, 65501, 67, 1, 65469, 68, 1, 65502, 65502, 69, 1, 65467, 70, 1, 23, 65, 65472, 65, 82, 0, + /* 1339 */ 65445, 65500, 65, 1, 65471, 66, 1, 65505, 65501, 67, 1, 65469, 68, 1, 25, 65, 65472, 65, 83, 0, + /* 1359 */ 91, 0, + /* 1361 */ 98, 0, + /* 1363 */ 99, 0, + /* 1365 */ 100, 0, + /* 1367 */ 101, 0, + /* 1369 */ 102, 0, + /* 1371 */ 103, 0, + /* 1373 */ 104, 0, + /* 1375 */ 65374, 1, 1, 20, 75, 135, 0, + /* 1382 */ 65374, 1, 1, 21, 74, 136, 0, + /* 1389 */ 65374, 1, 1, 22, 73, 137, 0, + /* 1396 */ 65374, 1, 1, 23, 72, 138, 0, + /* 1403 */ 65374, 1, 1, 24, 71, 139, 0, + /* 1410 */ 65374, 1, 1, 25, 70, 140, 0, + /* 1417 */ 65374, 1, 1, 26, 69, 141, 0, + /* 1424 */ 65374, 79, 1, 65457, 80, 1, 65456, 27, 68, 142, 0, + /* 1435 */ 65374, 77, 1, 65459, 78, 1, 65458, 79, 1, 65484, 67, 143, 0, + /* 1448 */ 65374, 75, 1, 65461, 76, 1, 65460, 77, 1, 65487, 66, 144, 0, + /* 1461 */ 65374, 73, 1, 65463, 74, 1, 65462, 75, 1, 65490, 65, 145, 0, + /* 1474 */ 65374, 71, 1, 65465, 72, 1, 65464, 73, 1, 65493, 64, 146, 0, + /* 1487 */ 65374, 69, 1, 65467, 70, 1, 65466, 71, 1, 65496, 63, 147, 0, + /* 1500 */ 65374, 67, 1, 65469, 68, 1, 65468, 69, 1, 65499, 62, 148, 0, + /* 1513 */ 65374, 65, 1, 65471, 66, 1, 65470, 67, 1, 65502, 61, 149, 0, + /* 1526 */ 157, 0, + /* 1528 */ 65289, 1, 1, 1, 229, 1, 65400, 65, 65472, 65, 65396, 0, + /* 1540 */ 65288, 1, 1, 1, 230, 1, 65399, 65, 65472, 65, 65397, 0, + /* 1552 */ 65287, 1, 1, 1, 231, 1, 65398, 65, 65472, 65, 65398, 0, + /* 1564 */ 65286, 1, 1, 1, 232, 1, 65397, 65, 65472, 65, 65399, 0, + /* 1576 */ 65285, 1, 1, 1, 233, 1, 65396, 65, 65472, 65, 65400, 0, + /* 1588 */ 65284, 1, 1, 1, 234, 1, 65395, 65, 65472, 65, 65401, 0, + /* 1600 */ 65521, 65445, 65512, 1, 24, 65513, 1, 94, 65, 65472, 65, 71, 65419, 65445, 65514, 1, 22, 65515, 1, 94, 65, 65472, 65, 69, 65492, 28, 65509, 28, 28, 65386, 65, 30, 65442, 65, 30, 40, 15, 65402, 0, + /* 1639 */ 65521, 65445, 65511, 1, 25, 65512, 1, 94, 65, 65472, 65, 72, 65419, 65445, 65513, 1, 23, 65514, 1, 94, 65, 65472, 65, 70, 65491, 28, 65509, 28, 29, 65385, 65, 30, 65442, 65, 30, 41, 15, 65402, 0, + /* 1678 */ 65521, 65445, 65510, 1, 26, 65511, 1, 94, 65, 65472, 65, 73, 65419, 65445, 65512, 1, 24, 65513, 1, 94, 65, 65472, 65, 71, 65490, 28, 65509, 28, 30, 65384, 65, 30, 65442, 65, 30, 42, 15, 65402, 0, + /* 1717 */ 65521, 65445, 65509, 1, 27, 65510, 1, 94, 65, 65472, 65, 74, 65419, 65445, 65511, 1, 25, 65512, 1, 94, 65, 65472, 65, 72, 65489, 28, 65509, 28, 31, 65383, 65, 30, 65442, 65, 30, 43, 15, 65402, 0, + /* 1756 */ 65521, 65445, 65508, 1, 28, 65509, 1, 94, 65, 65472, 65, 75, 65419, 65445, 65510, 1, 26, 65511, 1, 94, 65, 65472, 65, 73, 65488, 28, 65509, 28, 32, 65382, 65, 30, 65442, 65, 30, 44, 15, 65402, 0, + /* 1795 */ 65521, 65445, 65507, 79, 1, 65457, 80, 1, 65484, 65508, 1, 94, 65, 65472, 65, 76, 65419, 65445, 65509, 1, 27, 65510, 1, 94, 65, 65472, 65, 74, 65487, 28, 65509, 28, 33, 65381, 65, 30, 65442, 65, 30, 45, 15, 65402, 0, + /* 1838 */ 65521, 65445, 65506, 77, 1, 65459, 78, 1, 65487, 65507, 79, 1, 65457, 80, 1, 13, 65, 65472, 65, 77, 65419, 65445, 65508, 1, 28, 65509, 1, 94, 65, 65472, 65, 75, 65486, 28, 65509, 28, 34, 65380, 65, 30, 65442, 65, 30, 46, 15, 65402, 0, + /* 1885 */ 65521, 65445, 65505, 75, 1, 65461, 76, 1, 65490, 65506, 77, 1, 65459, 78, 1, 15, 65, 65472, 65, 78, 65419, 65445, 65507, 79, 1, 65457, 80, 1, 65484, 65508, 1, 94, 65, 65472, 65, 76, 65485, 28, 65509, 28, 35, 65379, 65, 30, 65442, 65, 30, 47, 15, 65402, 0, + /* 1936 */ 65521, 65445, 65504, 73, 1, 65463, 74, 1, 65493, 65505, 75, 1, 65461, 76, 1, 17, 65, 65472, 65, 79, 65419, 65445, 65506, 77, 1, 65459, 78, 1, 65487, 65507, 79, 1, 65457, 80, 1, 13, 65, 65472, 65, 77, 65484, 28, 65509, 28, 36, 65378, 65, 30, 65442, 65, 30, 48, 15, 65402, 0, + /* 1991 */ 65521, 65445, 65503, 71, 1, 65465, 72, 1, 65496, 65504, 73, 1, 65463, 74, 1, 19, 65, 65472, 65, 80, 65419, 65445, 65505, 75, 1, 65461, 76, 1, 65490, 65506, 77, 1, 65459, 78, 1, 15, 65, 65472, 65, 78, 65483, 28, 65509, 28, 37, 65377, 65, 30, 65442, 65, 30, 49, 15, 65402, 0, + /* 2046 */ 65521, 65445, 65502, 69, 1, 65467, 70, 1, 65499, 65503, 71, 1, 65465, 72, 1, 21, 65, 65472, 65, 81, 65419, 65445, 65504, 73, 1, 65463, 74, 1, 65493, 65505, 75, 1, 65461, 76, 1, 17, 65, 65472, 65, 79, 65482, 28, 65509, 28, 38, 65376, 65, 30, 65442, 65, 30, 50, 15, 65402, 0, + /* 2101 */ 65521, 65445, 65501, 67, 1, 65469, 68, 1, 65502, 65502, 69, 1, 65467, 70, 1, 23, 65, 65472, 65, 82, 65419, 65445, 65503, 71, 1, 65465, 72, 1, 65496, 65504, 73, 1, 65463, 74, 1, 19, 65, 65472, 65, 80, 65481, 28, 65509, 28, 39, 65375, 65, 30, 65442, 65, 30, 51, 15, 65402, 0, + /* 2156 */ 65521, 65445, 65500, 65, 1, 65471, 66, 1, 65505, 65501, 67, 1, 65469, 68, 1, 25, 65, 65472, 65, 83, 65419, 65445, 65502, 69, 1, 65467, 70, 1, 65499, 65503, 71, 1, 65465, 72, 1, 21, 65, 65472, 65, 81, 65480, 28, 65509, 28, 40, 65374, 65, 30, 65442, 65, 30, 52, 15, 65402, 0, + /* 2211 */ 65283, 80, 1, 65456, 1, 1, 235, 1, 65394, 65, 65472, 65, 65402, 0, + /* 2225 */ 65282, 78, 1, 65458, 79, 1, 65457, 80, 1, 65456, 236, 1, 65393, 65, 65472, 65, 65403, 0, + /* 2243 */ 65281, 76, 1, 65460, 77, 1, 65459, 78, 1, 65458, 79, 1, 157, 1, 65392, 65, 65472, 65, 65404, 0, + /* 2263 */ 65280, 74, 1, 65462, 75, 1, 65461, 76, 1, 65460, 77, 1, 160, 1, 65391, 65, 65472, 65, 65405, 0, + /* 2283 */ 65279, 72, 1, 65464, 73, 1, 65463, 74, 1, 65462, 75, 1, 163, 1, 65390, 65, 65472, 65, 65406, 0, + /* 2303 */ 65278, 70, 1, 65466, 71, 1, 65465, 72, 1, 65464, 73, 1, 166, 1, 65389, 65, 65472, 65, 65407, 0, + /* 2323 */ 65277, 68, 1, 65468, 69, 1, 65467, 70, 1, 65466, 71, 1, 169, 1, 65388, 65, 65472, 65, 65408, 0, + /* 2343 */ 65276, 66, 1, 65470, 67, 1, 65469, 68, 1, 65468, 69, 1, 172, 1, 65387, 65, 65472, 65, 65409, 0, + /* 2363 */ 22, 73, 2, 63, 65488, 120, 65465, 1, 65487, 75, 26, 65447, 65, 26, 30, 65416, 66, 26, 29, 65416, 0, + /* 2384 */ 21, 74, 2, 63, 65487, 120, 65466, 1, 65486, 76, 26, 65446, 66, 26, 29, 65416, 0, + /* 2401 */ 65, 65487, 77, 26, 65446, 66, 26, 29, 65416, 0, + /* 2411 */ 22, 73, 2, 134, 65465, 1, 65487, 50, 65487, 75, 26, 31, 65416, 65, 26, 30, 65416, 0, + /* 2429 */ 21, 74, 135, 65466, 1, 65486, 77, 26, 30, 65416, 0, + /* 2440 */ 65, 65487, 77, 26, 30, 65416, 0, + /* 2447 */ 139, 65487, 50, 65487, 12, 121, 65416, 0, + /* 2455 */ 65487, 13, 121, 65416, 0, + /* 2460 */ 65465, 1, 65487, 133, 65416, 121, 65416, 0, + /* 2468 */ 65466, 1, 65486, 133, 65416, 0, + /* 2474 */ 65487, 133, 65416, 0, + /* 2478 */ 65469, 35, 62, 148, 65452, 1, 65500, 66, 28, 40, 65417, 0, + /* 2490 */ 65470, 35, 62, 148, 65452, 1, 65500, 66, 28, 40, 65417, 0, + /* 2502 */ 65, 65500, 66, 28, 40, 65417, 0, + /* 2509 */ 65452, 1, 65500, 134, 65417, 0, + /* 2515 */ 65316, 74, 1, 65463, 76, 1, 65461, 78, 1, 65459, 80, 1, 10, 95, 65443, 95, 65443, 0, + /* 2533 */ 65316, 73, 1, 65464, 75, 1, 65462, 77, 1, 65460, 79, 1, 11, 95, 65443, 95, 65443, 0, + /* 2551 */ 65316, 72, 1, 65465, 74, 1, 65463, 76, 1, 65461, 78, 1, 12, 95, 65443, 95, 65443, 0, + /* 2569 */ 65316, 71, 1, 65466, 73, 1, 65464, 75, 1, 65462, 77, 1, 13, 95, 65443, 95, 65443, 0, + /* 2587 */ 65316, 70, 1, 65467, 72, 1, 65465, 74, 1, 65463, 76, 1, 14, 95, 65443, 95, 65443, 0, + /* 2605 */ 65316, 69, 1, 65468, 71, 1, 65466, 73, 1, 65464, 75, 1, 15, 95, 65443, 95, 65443, 0, + /* 2623 */ 65316, 68, 1, 65469, 70, 1, 65467, 72, 1, 65465, 74, 1, 16, 95, 65443, 95, 65443, 0, + /* 2641 */ 65316, 67, 1, 65470, 69, 1, 65468, 71, 1, 65466, 73, 1, 17, 95, 65443, 95, 65443, 0, + /* 2659 */ 65316, 66, 1, 65471, 68, 1, 65469, 70, 1, 65467, 72, 1, 18, 95, 65443, 95, 65443, 0, + /* 2677 */ 65316, 65, 1, 65472, 67, 1, 65470, 69, 1, 65468, 71, 1, 19, 95, 65443, 95, 65443, 0, + /* 2695 */ 65316, 2, 2, 2, 91, 95, 65443, 95, 65443, 0, + /* 2705 */ 65316, 80, 1, 65457, 2, 2, 91, 95, 65443, 95, 65443, 0, + /* 2717 */ 65316, 79, 1, 65458, 2, 2, 91, 95, 65443, 95, 65443, 0, + /* 2729 */ 65316, 78, 1, 65459, 80, 1, 65457, 2, 91, 95, 65443, 95, 65443, 0, + /* 2743 */ 65316, 77, 1, 65460, 79, 1, 65458, 2, 91, 95, 65443, 95, 65443, 0, + /* 2757 */ 65316, 76, 1, 65461, 78, 1, 65459, 80, 1, 65457, 91, 95, 65443, 95, 65443, 0, + /* 2773 */ 65316, 75, 1, 65462, 77, 1, 65460, 79, 1, 65458, 91, 95, 65443, 95, 65443, 0, + /* 2789 */ 20, 75, 65, 65486, 78, 26, 65445, 0, + /* 2797 */ 23, 72, 2, 63, 65489, 120, 65464, 1, 65488, 74, 26, 65448, 64, 26, 31, 65416, 65, 26, 30, 65416, 92, 65445, 0, + /* 2820 */ 65, 65488, 76, 26, 65447, 65, 26, 30, 65416, 92, 65445, 0, + /* 2832 */ 26, 65446, 92, 65445, 0, + /* 2837 */ 23, 72, 2, 135, 65464, 1, 65488, 49, 65488, 74, 26, 32, 65416, 64, 26, 31, 65416, 65, 26, 65446, 0, + /* 2858 */ 65, 65488, 76, 26, 31, 65416, 65, 26, 65446, 0, + /* 2868 */ 24, 71, 2, 63, 65490, 120, 65463, 1, 65489, 73, 26, 65449, 63, 26, 32, 65416, 64, 26, 31, 65416, 91, 65446, 0, + /* 2891 */ 65, 65489, 75, 26, 65448, 64, 26, 31, 65416, 91, 65446, 0, + /* 2903 */ 24, 71, 2, 136, 65463, 1, 65489, 48, 65489, 73, 26, 33, 65416, 63, 26, 32, 65416, 64, 26, 65447, 91, 65446, 0, + /* 2926 */ 65, 65489, 75, 26, 32, 65416, 64, 26, 65447, 91, 65446, 0, + /* 2938 */ 25, 70, 2, 63, 65491, 120, 65462, 1, 65490, 72, 26, 65450, 62, 26, 33, 65416, 63, 26, 32, 65416, 90, 65447, 0, + /* 2961 */ 65, 65490, 74, 26, 65449, 63, 26, 32, 65416, 90, 65447, 0, + /* 2973 */ 25, 70, 2, 137, 65462, 1, 65490, 47, 65490, 72, 26, 34, 65416, 62, 26, 33, 65416, 63, 26, 65448, 90, 65447, 0, + /* 2996 */ 65, 65490, 74, 26, 33, 65416, 63, 26, 65448, 90, 65447, 0, + /* 3008 */ 26, 69, 2, 63, 65492, 120, 65461, 1, 65491, 71, 26, 65451, 61, 26, 34, 65416, 62, 26, 33, 65416, 89, 65448, 0, + /* 3031 */ 65, 65491, 73, 26, 65450, 62, 26, 33, 65416, 89, 65448, 0, + /* 3043 */ 26, 69, 2, 138, 65461, 1, 65491, 46, 65491, 71, 26, 35, 65416, 61, 26, 34, 65416, 62, 26, 65449, 89, 65448, 0, + /* 3066 */ 65, 65491, 73, 26, 34, 65416, 62, 26, 65449, 89, 65448, 0, + /* 3078 */ 27, 68, 2, 63, 65493, 120, 65460, 1, 65492, 70, 26, 65452, 60, 26, 35, 65416, 61, 26, 34, 65416, 88, 65449, 0, + /* 3101 */ 65, 65492, 72, 26, 65451, 61, 26, 34, 65416, 88, 65449, 0, + /* 3113 */ 27, 68, 2, 139, 65460, 1, 65492, 45, 65492, 70, 26, 36, 65416, 60, 26, 35, 65416, 61, 26, 65450, 88, 65449, 0, + /* 3136 */ 65, 65492, 72, 26, 35, 65416, 61, 26, 65450, 88, 65449, 0, + /* 3148 */ 65455, 28, 67, 2, 63, 65494, 120, 65459, 1, 65493, 69, 26, 65453, 59, 26, 36, 65416, 60, 26, 35, 65416, 87, 65450, 0, + /* 3172 */ 65456, 28, 67, 2, 63, 65494, 120, 65459, 1, 65493, 69, 26, 65453, 59, 26, 36, 65416, 60, 26, 35, 65416, 87, 65450, 0, + /* 3196 */ 65, 65493, 71, 26, 65452, 60, 26, 35, 65416, 87, 65450, 0, + /* 3208 */ 28, 67, 2, 140, 65459, 1, 65493, 44, 65493, 69, 26, 37, 65416, 59, 26, 36, 65416, 60, 26, 65451, 87, 65450, 0, + /* 3231 */ 65, 65493, 71, 26, 36, 65416, 60, 26, 65451, 87, 65450, 0, + /* 3243 */ 65457, 29, 66, 2, 63, 65495, 120, 65458, 1, 65494, 68, 26, 65454, 58, 26, 37, 65416, 59, 26, 36, 65416, 86, 65451, 0, + /* 3267 */ 65458, 29, 66, 2, 63, 65495, 120, 65458, 1, 65494, 68, 26, 65454, 58, 26, 37, 65416, 59, 26, 36, 65416, 86, 65451, 0, + /* 3291 */ 65, 65494, 70, 26, 65453, 59, 26, 36, 65416, 86, 65451, 0, + /* 3303 */ 65456, 29, 66, 2, 141, 65458, 1, 65494, 43, 65494, 68, 26, 38, 65416, 58, 26, 37, 65416, 59, 26, 65452, 86, 65451, 0, + /* 3327 */ 65457, 29, 66, 2, 141, 65458, 1, 65494, 43, 65494, 68, 26, 38, 65416, 58, 26, 37, 65416, 59, 26, 65452, 86, 65451, 0, + /* 3351 */ 65, 65494, 70, 26, 37, 65416, 59, 26, 65452, 86, 65451, 0, + /* 3363 */ 65459, 30, 65, 2, 63, 65496, 120, 65457, 1, 65495, 67, 26, 65455, 57, 26, 38, 65416, 58, 26, 37, 65416, 85, 65452, 0, + /* 3387 */ 65460, 30, 65, 2, 63, 65496, 120, 65457, 1, 65495, 67, 26, 65455, 57, 26, 38, 65416, 58, 26, 37, 65416, 85, 65452, 0, + /* 3411 */ 65, 65495, 69, 26, 65454, 58, 26, 37, 65416, 85, 65452, 0, + /* 3423 */ 65458, 30, 65, 2, 142, 65457, 1, 65495, 42, 65495, 67, 26, 39, 65416, 57, 26, 38, 65416, 58, 26, 65453, 85, 65452, 0, + /* 3447 */ 65459, 30, 65, 2, 142, 65457, 1, 65495, 42, 65495, 67, 26, 39, 65416, 57, 26, 38, 65416, 58, 26, 65453, 85, 65452, 0, + /* 3471 */ 65, 65495, 69, 26, 38, 65416, 58, 26, 65453, 85, 65452, 0, + /* 3483 */ 65461, 31, 64, 2, 63, 65497, 120, 65456, 1, 65496, 66, 26, 65456, 56, 26, 39, 65416, 57, 26, 38, 65416, 84, 65453, 0, + /* 3507 */ 65462, 31, 64, 2, 63, 65497, 120, 65456, 1, 65496, 66, 26, 65456, 56, 26, 39, 65416, 57, 26, 38, 65416, 84, 65453, 0, + /* 3531 */ 65, 65496, 68, 26, 65455, 57, 26, 38, 65416, 84, 65453, 0, + /* 3543 */ 65460, 31, 64, 2, 143, 65456, 1, 65496, 41, 65496, 66, 26, 40, 65416, 56, 26, 39, 65416, 57, 26, 65454, 84, 65453, 0, + /* 3567 */ 65461, 31, 64, 2, 143, 65456, 1, 65496, 41, 65496, 66, 26, 40, 65416, 56, 26, 39, 65416, 57, 26, 65454, 84, 65453, 0, + /* 3591 */ 65, 65496, 68, 26, 39, 65416, 57, 26, 65454, 84, 65453, 0, + /* 3603 */ 65463, 32, 63, 2, 63, 65498, 120, 65455, 1, 65497, 65, 26, 65457, 55, 26, 40, 65416, 56, 26, 39, 65416, 83, 65454, 0, + /* 3627 */ 65464, 32, 63, 2, 63, 65498, 120, 65455, 1, 65497, 65, 26, 65457, 55, 26, 40, 65416, 56, 26, 39, 65416, 83, 65454, 0, + /* 3651 */ 65, 65497, 67, 26, 65456, 56, 26, 39, 65416, 83, 65454, 0, + /* 3663 */ 65462, 32, 63, 2, 144, 65455, 1, 65497, 40, 65497, 65, 26, 41, 65416, 55, 26, 40, 65416, 56, 26, 65455, 83, 65454, 0, + /* 3687 */ 65463, 32, 63, 2, 144, 65455, 1, 65497, 40, 65497, 65, 26, 41, 65416, 55, 26, 40, 65416, 56, 26, 65455, 83, 65454, 0, + /* 3711 */ 65, 65497, 67, 26, 40, 65416, 56, 26, 65455, 83, 65454, 0, + /* 3723 */ 65465, 33, 62, 2, 63, 65499, 120, 65454, 1, 65498, 64, 2, 26, 41, 65416, 55, 26, 40, 65416, 82, 65455, 0, + /* 3745 */ 65466, 33, 62, 2, 63, 65499, 120, 65454, 1, 65498, 64, 2, 26, 41, 65416, 55, 26, 40, 65416, 82, 65455, 0, + /* 3767 */ 65, 65498, 66, 26, 65457, 55, 26, 40, 65416, 82, 65455, 0, + /* 3779 */ 65464, 33, 62, 2, 145, 65454, 1, 65498, 39, 65498, 64, 26, 42, 65416, 54, 26, 41, 65416, 55, 26, 65456, 82, 65455, 0, + /* 3803 */ 65465, 33, 62, 2, 145, 65454, 1, 65498, 39, 65498, 64, 26, 42, 65416, 54, 26, 41, 65416, 55, 26, 65456, 82, 65455, 0, + /* 3827 */ 65, 65498, 66, 26, 41, 65416, 55, 26, 65456, 82, 65455, 0, + /* 3839 */ 65298, 80, 1, 65456, 0, + /* 3844 */ 65467, 34, 61, 2, 63, 65500, 120, 65453, 1, 65499, 65, 2, 26, 40, 1, 65416, 81, 65456, 0, + /* 3863 */ 65468, 34, 61, 2, 63, 65500, 120, 65453, 1, 65499, 65, 2, 26, 40, 1, 65416, 81, 65456, 0, + /* 3882 */ 65, 65499, 65, 2, 26, 41, 65416, 81, 65456, 0, + /* 3892 */ 65466, 34, 61, 2, 146, 65453, 1, 65499, 38, 65499, 63, 2, 26, 41, 1, 65416, 54, 26, 65457, 81, 65456, 0, + /* 3914 */ 65467, 34, 61, 2, 146, 65453, 1, 65499, 38, 65499, 63, 2, 26, 41, 1, 65416, 54, 26, 65457, 81, 65456, 0, + /* 3936 */ 65, 65499, 65, 26, 42, 65416, 54, 26, 65457, 81, 65456, 0, + /* 3948 */ 65439, 80, 1, 65457, 0, + /* 3953 */ 28, 65457, 0, + /* 3956 */ 65468, 35, 60, 2, 147, 65452, 1, 65500, 37, 65500, 64, 2, 26, 41, 65417, 80, 65457, 0, + /* 3974 */ 65469, 35, 60, 2, 147, 65452, 1, 65500, 37, 65500, 64, 2, 26, 41, 65417, 80, 65457, 0, + /* 3992 */ 65, 65500, 64, 2, 26, 41, 65417, 80, 65457, 0, + /* 4002 */ 26, 65458, 80, 65457, 0, + /* 4007 */ 65439, 79, 1, 65458, 0, + /* 4012 */ 65470, 36, 61, 65, 65501, 65, 28, 65458, 0, + /* 4021 */ 65471, 36, 61, 65, 65501, 65, 28, 65458, 0, + /* 4030 */ 65374, 1, 1, 229, 65402, 65461, 0, + /* 4037 */ 65374, 1, 1, 230, 65401, 65462, 0, + /* 4044 */ 65374, 1, 1, 231, 65400, 65463, 0, + /* 4051 */ 65374, 1, 1, 232, 65399, 65464, 0, + /* 4058 */ 65374, 1, 1, 233, 65398, 65465, 0, + /* 4065 */ 65374, 1, 1, 234, 65397, 65466, 0, + /* 4072 */ 65374, 1, 1, 235, 65396, 65467, 0, + /* 4079 */ 65374, 80, 1, 65456, 1, 236, 65395, 65468, 0, + /* 4088 */ 65374, 78, 1, 65458, 79, 1, 65457, 80, 1, 156, 65394, 65469, 0, + /* 4101 */ 65374, 76, 1, 65460, 77, 1, 65459, 78, 1, 159, 65393, 65470, 0, + /* 4114 */ 65445, 65470, 0, + /* 4117 */ 65374, 74, 1, 65462, 75, 1, 65461, 76, 1, 162, 65392, 65471, 0, + /* 4130 */ 65374, 72, 1, 65464, 73, 1, 65463, 74, 1, 165, 65391, 65472, 0, + /* 4143 */ 65374, 70, 1, 65466, 71, 1, 65465, 72, 1, 168, 65390, 65473, 0, + /* 4156 */ 65374, 68, 1, 65468, 69, 1, 65467, 70, 1, 171, 65389, 65474, 0, + /* 4169 */ 65374, 66, 1, 65470, 67, 1, 65469, 68, 1, 174, 65388, 65475, 0, + /* 4182 */ 65534, 0, + /* 4184 */ 65535, 0, +}; + +extern const unsigned ARMLaneMaskLists[] = { + /* 0 */ 0x00000000, ~0u, + /* 2 */ 0x00000002, 0x00000001, ~0u, + /* 5 */ 0x00000001, 0x00000002, ~0u, + /* 8 */ 0x00000004, 0x00000008, ~0u, + /* 11 */ 0x00000004, 0x00000008, 0x00000010, 0x00000020, ~0u, + /* 16 */ 0x00000004, 0x00000008, 0x00000030, ~0u, + /* 20 */ 0x0000000C, 0x00000030, ~0u, + /* 23 */ 0x00000004, 0x00000008, 0x00000040, 0x00000080, ~0u, + /* 28 */ 0x00000004, 0x00000008, 0x00000010, 0x00000020, 0x00000040, 0x00000080, ~0u, + /* 35 */ 0x00000004, 0x00000008, 0x000000C0, ~0u, + /* 39 */ 0x0000000C, 0x000000C0, ~0u, + /* 42 */ 0x00000004, 0x00000008, 0x00000010, 0x00000020, 0x000000C0, ~0u, + /* 48 */ 0x00000004, 0x00000008, 0x00000030, 0x000000C0, ~0u, + /* 53 */ 0x0000000C, 0x00000030, 0x000000C0, ~0u, + /* 57 */ 0x00000004, 0x00000008, 0x00000010, 0x00000020, 0x00000040, 0x00000080, 0x00000100, 0x00000200, ~0u, + /* 66 */ 0x00000004, 0x00000008, 0x00000010, 0x00000020, 0x00000040, 0x00000080, 0x00000300, ~0u, + /* 74 */ 0x00000004, 0x00000008, 0x00000010, 0x00000020, 0x000000C0, 0x00000300, ~0u, + /* 81 */ 0x00000004, 0x00000008, 0x00000030, 0x000000C0, 0x00000300, ~0u, + /* 87 */ 0x0000000C, 0x00000030, 0x000000C0, 0x00000300, ~0u, + /* 92 */ 0x00000004, 0x00000008, 0x00000010, 0x00000020, 0x00000040, 0x00000080, 0x00000100, 0x00000200, 0x00010000, 0x00020000, 0x00004000, 0x00008000, 0x00001000, 0x00002000, 0x00000400, 0x00000800, ~0u, + /* 109 */ 0x00000004, 0x00000008, 0x00000010, 0x00000020, 0x00000040, 0x00000080, 0x00000100, 0x00000200, 0x00010000, 0x00020000, 0x00004000, 0x00008000, 0x00003000, 0x00000C00, ~0u, + /* 124 */ 0x00000004, 0x00000008, 0x00000010, 0x00000020, 0x00000040, 0x00000080, 0x00000100, 0x00000200, 0x00030000, 0x0000C000, 0x00003000, 0x00000C00, ~0u, + /* 137 */ 0x00000004, 0x00000008, 0x00000010, 0x00000020, 0x000000C0, 0x00000300, 0x00030000, 0x0000C000, 0x00003000, 0x00000C00, ~0u, + /* 148 */ 0x0000000C, 0x00000030, 0x000000C0, 0x00000300, 0x00030000, 0x0000C000, 0x00003000, 0x00000C00, ~0u, + /* 157 */ 0x00000004, 0x00000008, 0x00000040, 0x00000080, 0x00010000, 0x00020000, 0x00001000, 0x00002000, ~0u, + /* 166 */ 0x00000004, 0x00000008, 0x00000040, 0x00000080, 0x00010000, 0x00020000, 0x00003000, ~0u, + /* 174 */ 0x00000004, 0x00000008, 0x00000040, 0x00000080, 0x00030000, 0x00003000, ~0u, + /* 181 */ 0x00000004, 0x00000008, 0x000000C0, 0x00030000, 0x00003000, ~0u, + /* 187 */ 0x0000000C, 0x000000C0, 0x00030000, 0x00003000, ~0u, + /* 192 */ 0x00000004, 0x00000008, 0x00000040, 0x00000080, 0x00010000, 0x00020000, ~0u, + /* 199 */ 0x00000004, 0x00000008, 0x00000040, 0x00000080, 0x00030000, ~0u, + /* 205 */ 0x00000004, 0x00000008, 0x000000C0, 0x00030000, ~0u, + /* 210 */ 0x0000000C, 0x000000C0, 0x00030000, ~0u, +}; + +extern const uint16_t ARMSubRegIdxLists[] = { + /* 0 */ 1, 2, 0, + /* 3 */ 1, 17, 18, 2, 0, + /* 8 */ 1, 3, 0, + /* 11 */ 1, 17, 18, 3, 0, + /* 16 */ 9, 10, 0, + /* 19 */ 17, 18, 0, + /* 22 */ 1, 17, 18, 2, 19, 20, 0, + /* 29 */ 1, 17, 18, 3, 21, 22, 0, + /* 36 */ 1, 2, 3, 13, 33, 37, 0, + /* 43 */ 1, 17, 18, 2, 3, 13, 33, 37, 0, + /* 52 */ 1, 17, 18, 2, 19, 20, 3, 13, 33, 37, 0, + /* 63 */ 1, 17, 18, 2, 19, 20, 3, 21, 22, 13, 33, 37, 0, + /* 76 */ 13, 1, 2, 14, 3, 4, 33, 34, 35, 36, 37, 0, + /* 88 */ 13, 1, 17, 18, 2, 19, 20, 14, 3, 4, 33, 34, 35, 36, 37, 0, + /* 104 */ 1, 2, 3, 4, 13, 14, 33, 34, 35, 36, 37, 0, + /* 116 */ 1, 17, 18, 2, 3, 4, 13, 14, 33, 34, 35, 36, 37, 0, + /* 130 */ 1, 17, 18, 2, 19, 20, 3, 21, 22, 4, 13, 14, 33, 34, 35, 36, 37, 0, + /* 148 */ 1, 17, 18, 2, 19, 20, 3, 21, 22, 4, 23, 24, 13, 14, 33, 34, 35, 36, 37, 0, + /* 168 */ 13, 1, 17, 18, 2, 19, 20, 14, 3, 21, 22, 4, 23, 24, 33, 34, 35, 36, 37, 0, + /* 188 */ 1, 3, 5, 33, 43, 0, + /* 194 */ 1, 17, 18, 3, 5, 33, 43, 0, + /* 202 */ 1, 17, 18, 3, 21, 22, 5, 33, 43, 0, + /* 212 */ 1, 17, 18, 3, 21, 22, 5, 31, 32, 33, 43, 0, + /* 224 */ 1, 3, 5, 7, 33, 38, 43, 45, 51, 0, + /* 234 */ 1, 17, 18, 3, 5, 7, 33, 38, 43, 45, 51, 0, + /* 246 */ 1, 17, 18, 3, 21, 22, 5, 7, 33, 38, 43, 45, 51, 0, + /* 260 */ 1, 17, 18, 3, 21, 22, 5, 31, 32, 7, 33, 38, 43, 45, 51, 0, + /* 276 */ 1, 17, 18, 3, 21, 22, 5, 31, 32, 7, 27, 28, 33, 38, 43, 45, 51, 0, + /* 294 */ 11, 13, 1, 2, 14, 3, 4, 33, 34, 35, 36, 37, 12, 15, 5, 6, 16, 7, 8, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, 0, + /* 333 */ 11, 13, 1, 17, 18, 2, 19, 20, 14, 3, 4, 33, 34, 35, 36, 37, 12, 15, 5, 6, 16, 7, 8, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, 0, + /* 376 */ 11, 13, 1, 17, 18, 2, 19, 20, 14, 3, 21, 22, 4, 23, 24, 33, 34, 35, 36, 37, 12, 15, 5, 6, 16, 7, 8, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, 0, + /* 423 */ 11, 13, 1, 17, 18, 2, 19, 20, 14, 3, 21, 22, 4, 23, 24, 33, 34, 35, 36, 37, 12, 15, 5, 31, 32, 6, 29, 30, 16, 7, 8, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, 0, + /* 474 */ 11, 13, 1, 17, 18, 2, 19, 20, 14, 3, 21, 22, 4, 23, 24, 33, 34, 35, 36, 37, 12, 15, 5, 31, 32, 6, 29, 30, 16, 7, 27, 28, 8, 25, 26, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, 0, +}; + +extern const MCRegisterInfo::SubRegCoveredBits ARMSubRegIdxRanges[] = { + { 65535, 65535 }, + { 0, 64 }, // dsub_0 + { 64, 64 }, // dsub_1 + { 128, 64 }, // dsub_2 + { 192, 64 }, // dsub_3 + { 256, 64 }, // dsub_4 + { 320, 64 }, // dsub_5 + { 384, 64 }, // dsub_6 + { 448, 64 }, // dsub_7 + { 0, 32 }, // gsub_0 + { 32, 32 }, // gsub_1 + { 0, 256 }, // qqsub_0 + { 256, 256 }, // qqsub_1 + { 0, 128 }, // qsub_0 + { 128, 128 }, // qsub_1 + { 256, 128 }, // qsub_2 + { 384, 128 }, // qsub_3 + { 0, 32 }, // ssub_0 + { 32, 32 }, // ssub_1 + { 64, 32 }, // ssub_2 + { 96, 32 }, // ssub_3 + { 128, 32 }, // dsub_2_then_ssub_0 + { 160, 32 }, // dsub_2_then_ssub_1 + { 192, 32 }, // dsub_3_then_ssub_0 + { 224, 32 }, // dsub_3_then_ssub_1 + { 448, 32 }, // dsub_7_then_ssub_0 + { 480, 32 }, // dsub_7_then_ssub_1 + { 384, 32 }, // dsub_6_then_ssub_0 + { 416, 32 }, // dsub_6_then_ssub_1 + { 320, 32 }, // dsub_5_then_ssub_0 + { 352, 32 }, // dsub_5_then_ssub_1 + { 256, 32 }, // dsub_4_then_ssub_0 + { 288, 32 }, // dsub_4_then_ssub_1 + { 65535, 128 }, // dsub_0_dsub_2 + { 0, 192 }, // dsub_0_dsub_1_dsub_2 + { 65535, 128 }, // dsub_1_dsub_3 + { 64, 192 }, // dsub_1_dsub_2_dsub_3 + { 64, 128 }, // dsub_1_dsub_2 + { 65535, 192 }, // dsub_0_dsub_2_dsub_4 + { 65535, 256 }, // dsub_0_dsub_2_dsub_4_dsub_6 + { 65535, 192 }, // dsub_1_dsub_3_dsub_5 + { 65535, 256 }, // dsub_1_dsub_3_dsub_5_dsub_7 + { 64, 256 }, // dsub_1_dsub_2_dsub_3_dsub_4 + { 65535, 128 }, // dsub_2_dsub_4 + { 128, 192 }, // dsub_2_dsub_3_dsub_4 + { 65535, 192 }, // dsub_2_dsub_4_dsub_6 + { 65535, 128 }, // dsub_3_dsub_5 + { 192, 192 }, // dsub_3_dsub_4_dsub_5 + { 65535, 192 }, // dsub_3_dsub_5_dsub_7 + { 192, 128 }, // dsub_3_dsub_4 + { 192, 256 }, // dsub_3_dsub_4_dsub_5_dsub_6 + { 65535, 128 }, // dsub_4_dsub_6 + { 256, 192 }, // dsub_4_dsub_5_dsub_6 + { 65535, 128 }, // dsub_5_dsub_7 + { 320, 192 }, // dsub_5_dsub_6_dsub_7 + { 320, 128 }, // dsub_5_dsub_6 + { 128, 256 }, // qsub_1_qsub_2 +}; + +extern const char ARMRegStrings[] = { + /* 0 */ 'D', '4', '_', 'D', '6', '_', 'D', '8', '_', 'D', '1', '0', 0, + /* 13 */ 'D', '7', '_', 'D', '8', '_', 'D', '9', '_', 'D', '1', '0', 0, + /* 26 */ 'Q', '7', '_', 'Q', '8', '_', 'Q', '9', '_', 'Q', '1', '0', 0, + /* 39 */ 'R', '1', '0', 0, + /* 43 */ 'S', '1', '0', 0, + /* 47 */ 'D', '1', '4', '_', 'D', '1', '6', '_', 'D', '1', '8', '_', 'D', '2', '0', 0, + /* 63 */ 'D', '1', '7', '_', 'D', '1', '8', '_', 'D', '1', '9', '_', 'D', '2', '0', 0, + /* 79 */ 'S', '2', '0', 0, + /* 83 */ 'D', '2', '4', '_', 'D', '2', '6', '_', 'D', '2', '8', '_', 'D', '3', '0', 0, + /* 99 */ 'D', '2', '7', '_', 'D', '2', '8', '_', 'D', '2', '9', '_', 'D', '3', '0', 0, + /* 115 */ 'S', '3', '0', 0, + /* 119 */ 'D', '0', 0, + /* 122 */ 'Q', '0', 0, + /* 125 */ 'M', 'V', 'F', 'R', '0', 0, + /* 131 */ 'S', '0', 0, + /* 134 */ 'D', '9', '_', 'D', '1', '0', '_', 'D', '1', '1', 0, + /* 145 */ 'D', '5', '_', 'D', '7', '_', 'D', '9', '_', 'D', '1', '1', 0, + /* 158 */ 'Q', '8', '_', 'Q', '9', '_', 'Q', '1', '0', '_', 'Q', '1', '1', 0, + /* 172 */ 'R', '1', '0', '_', 'R', '1', '1', 0, + /* 180 */ 'S', '1', '1', 0, + /* 184 */ 'D', '1', '9', '_', 'D', '2', '0', '_', 'D', '2', '1', 0, + /* 196 */ 'D', '1', '5', '_', 'D', '1', '7', '_', 'D', '1', '9', '_', 'D', '2', '1', 0, + /* 212 */ 'S', '2', '1', 0, + /* 216 */ 'D', '2', '9', '_', 'D', '3', '0', '_', 'D', '3', '1', 0, + /* 228 */ 'D', '2', '5', '_', 'D', '2', '7', '_', 'D', '2', '9', '_', 'D', '3', '1', 0, + /* 244 */ 'S', '3', '1', 0, + /* 248 */ 'D', '1', 0, + /* 251 */ 'Q', '0', '_', 'Q', '1', 0, + /* 257 */ 'M', 'V', 'F', 'R', '1', 0, + /* 263 */ 'R', '0', '_', 'R', '1', 0, + /* 269 */ 'S', '1', 0, + /* 272 */ 'D', '6', '_', 'D', '8', '_', 'D', '1', '0', '_', 'D', '1', '2', 0, + /* 286 */ 'D', '9', '_', 'D', '1', '0', '_', 'D', '1', '1', '_', 'D', '1', '2', 0, + /* 301 */ 'Q', '9', '_', 'Q', '1', '0', '_', 'Q', '1', '1', '_', 'Q', '1', '2', 0, + /* 316 */ 'R', '1', '2', 0, + /* 320 */ 'S', '1', '2', 0, + /* 324 */ 'D', '1', '6', '_', 'D', '1', '8', '_', 'D', '2', '0', '_', 'D', '2', '2', 0, + /* 340 */ 'D', '1', '9', '_', 'D', '2', '0', '_', 'D', '2', '1', '_', 'D', '2', '2', 0, + /* 356 */ 'S', '2', '2', 0, + /* 360 */ 'D', '0', '_', 'D', '2', 0, + /* 366 */ 'D', '0', '_', 'D', '1', '_', 'D', '2', 0, + /* 375 */ 'Q', '1', '_', 'Q', '2', 0, + /* 381 */ 'M', 'V', 'F', 'R', '2', 0, + /* 387 */ 'S', '2', 0, + /* 390 */ 'F', 'P', 'I', 'N', 'S', 'T', '2', 0, + /* 398 */ 'D', '7', '_', 'D', '9', '_', 'D', '1', '1', '_', 'D', '1', '3', 0, + /* 412 */ 'D', '1', '1', '_', 'D', '1', '2', '_', 'D', '1', '3', 0, + /* 424 */ 'Q', '1', '0', '_', 'Q', '1', '1', '_', 'Q', '1', '2', '_', 'Q', '1', '3', 0, + /* 440 */ 'S', '1', '3', 0, + /* 444 */ 'D', '1', '7', '_', 'D', '1', '9', '_', 'D', '2', '1', '_', 'D', '2', '3', 0, + /* 460 */ 'D', '2', '1', '_', 'D', '2', '2', '_', 'D', '2', '3', 0, + /* 472 */ 'S', '2', '3', 0, + /* 476 */ 'D', '1', '_', 'D', '3', 0, + /* 482 */ 'D', '1', '_', 'D', '2', '_', 'D', '3', 0, + /* 491 */ 'Q', '0', '_', 'Q', '1', '_', 'Q', '2', '_', 'Q', '3', 0, + /* 503 */ 'R', '2', '_', 'R', '3', 0, + /* 509 */ 'S', '3', 0, + /* 512 */ 'D', '8', '_', 'D', '1', '0', '_', 'D', '1', '2', '_', 'D', '1', '4', 0, + /* 527 */ 'D', '1', '1', '_', 'D', '1', '2', '_', 'D', '1', '3', '_', 'D', '1', '4', 0, + /* 543 */ 'Q', '1', '1', '_', 'Q', '1', '2', '_', 'Q', '1', '3', '_', 'Q', '1', '4', 0, + /* 559 */ 'S', '1', '4', 0, + /* 563 */ 'D', '1', '8', '_', 'D', '2', '0', '_', 'D', '2', '2', '_', 'D', '2', '4', 0, + /* 579 */ 'D', '2', '1', '_', 'D', '2', '2', '_', 'D', '2', '3', '_', 'D', '2', '4', 0, + /* 595 */ 'S', '2', '4', 0, + /* 599 */ 'D', '0', '_', 'D', '2', '_', 'D', '4', 0, + /* 608 */ 'D', '1', '_', 'D', '2', '_', 'D', '3', '_', 'D', '4', 0, + /* 620 */ 'Q', '1', '_', 'Q', '2', '_', 'Q', '3', '_', 'Q', '4', 0, + /* 632 */ 'R', '4', 0, + /* 635 */ 'S', '4', 0, + /* 638 */ 'D', '9', '_', 'D', '1', '1', '_', 'D', '1', '3', '_', 'D', '1', '5', 0, + /* 653 */ 'D', '1', '3', '_', 'D', '1', '4', '_', 'D', '1', '5', 0, + /* 665 */ 'Q', '1', '2', '_', 'Q', '1', '3', '_', 'Q', '1', '4', '_', 'Q', '1', '5', 0, + /* 681 */ 'S', '1', '5', 0, + /* 685 */ 'D', '1', '9', '_', 'D', '2', '1', '_', 'D', '2', '3', '_', 'D', '2', '5', 0, + /* 701 */ 'D', '2', '3', '_', 'D', '2', '4', '_', 'D', '2', '5', 0, + /* 713 */ 'S', '2', '5', 0, + /* 717 */ 'D', '1', '_', 'D', '3', '_', 'D', '5', 0, + /* 726 */ 'D', '3', '_', 'D', '4', '_', 'D', '5', 0, + /* 735 */ 'Q', '2', '_', 'Q', '3', '_', 'Q', '4', '_', 'Q', '5', 0, + /* 747 */ 'R', '4', '_', 'R', '5', 0, + /* 753 */ 'S', '5', 0, + /* 756 */ 'D', '1', '0', '_', 'D', '1', '2', '_', 'D', '1', '4', '_', 'D', '1', '6', 0, + /* 772 */ 'D', '1', '3', '_', 'D', '1', '4', '_', 'D', '1', '5', '_', 'D', '1', '6', 0, + /* 788 */ 'S', '1', '6', 0, + /* 792 */ 'D', '2', '0', '_', 'D', '2', '2', '_', 'D', '2', '4', '_', 'D', '2', '6', 0, + /* 808 */ 'D', '2', '3', '_', 'D', '2', '4', '_', 'D', '2', '5', '_', 'D', '2', '6', 0, + /* 824 */ 'S', '2', '6', 0, + /* 828 */ 'D', '0', '_', 'D', '2', '_', 'D', '4', '_', 'D', '6', 0, + /* 840 */ 'D', '3', '_', 'D', '4', '_', 'D', '5', '_', 'D', '6', 0, + /* 852 */ 'Q', '3', '_', 'Q', '4', '_', 'Q', '5', '_', 'Q', '6', 0, + /* 864 */ 'R', '6', 0, + /* 867 */ 'S', '6', 0, + /* 870 */ 'D', '1', '1', '_', 'D', '1', '3', '_', 'D', '1', '5', '_', 'D', '1', '7', 0, + /* 886 */ 'D', '1', '5', '_', 'D', '1', '6', '_', 'D', '1', '7', 0, + /* 898 */ 'S', '1', '7', 0, + /* 902 */ 'D', '2', '1', '_', 'D', '2', '3', '_', 'D', '2', '5', '_', 'D', '2', '7', 0, + /* 918 */ 'D', '2', '5', '_', 'D', '2', '6', '_', 'D', '2', '7', 0, + /* 930 */ 'S', '2', '7', 0, + /* 934 */ 'D', '1', '_', 'D', '3', '_', 'D', '5', '_', 'D', '7', 0, + /* 946 */ 'D', '5', '_', 'D', '6', '_', 'D', '7', 0, + /* 955 */ 'Q', '4', '_', 'Q', '5', '_', 'Q', '6', '_', 'Q', '7', 0, + /* 967 */ 'R', '6', '_', 'R', '7', 0, + /* 973 */ 'S', '7', 0, + /* 976 */ 'D', '1', '2', '_', 'D', '1', '4', '_', 'D', '1', '6', '_', 'D', '1', '8', 0, + /* 992 */ 'D', '1', '5', '_', 'D', '1', '6', '_', 'D', '1', '7', '_', 'D', '1', '8', 0, + /* 1008 */ 'S', '1', '8', 0, + /* 1012 */ 'D', '2', '2', '_', 'D', '2', '4', '_', 'D', '2', '6', '_', 'D', '2', '8', 0, + /* 1028 */ 'D', '2', '5', '_', 'D', '2', '6', '_', 'D', '2', '7', '_', 'D', '2', '8', 0, + /* 1044 */ 'S', '2', '8', 0, + /* 1048 */ 'D', '2', '_', 'D', '4', '_', 'D', '6', '_', 'D', '8', 0, + /* 1060 */ 'D', '5', '_', 'D', '6', '_', 'D', '7', '_', 'D', '8', 0, + /* 1072 */ 'Q', '5', '_', 'Q', '6', '_', 'Q', '7', '_', 'Q', '8', 0, + /* 1084 */ 'R', '8', 0, + /* 1087 */ 'S', '8', 0, + /* 1090 */ 'D', '1', '3', '_', 'D', '1', '5', '_', 'D', '1', '7', '_', 'D', '1', '9', 0, + /* 1106 */ 'D', '1', '7', '_', 'D', '1', '8', '_', 'D', '1', '9', 0, + /* 1118 */ 'S', '1', '9', 0, + /* 1122 */ 'D', '2', '3', '_', 'D', '2', '5', '_', 'D', '2', '7', '_', 'D', '2', '9', 0, + /* 1138 */ 'D', '2', '7', '_', 'D', '2', '8', '_', 'D', '2', '9', 0, + /* 1150 */ 'S', '2', '9', 0, + /* 1154 */ 'D', '3', '_', 'D', '5', '_', 'D', '7', '_', 'D', '9', 0, + /* 1166 */ 'D', '7', '_', 'D', '8', '_', 'D', '9', 0, + /* 1175 */ 'Q', '6', '_', 'Q', '7', '_', 'Q', '8', '_', 'Q', '9', 0, + /* 1187 */ 'R', '8', '_', 'R', '9', 0, + /* 1193 */ 'S', '9', 0, + /* 1196 */ 'P', 'C', 0, + /* 1199 */ 'F', 'P', 'E', 'X', 'C', 0, + /* 1205 */ 'F', 'P', 'S', 'I', 'D', 0, + /* 1211 */ 'I', 'T', 'S', 'T', 'A', 'T', 'E', 0, + /* 1219 */ 'R', '1', '2', '_', 'S', 'P', 0, + /* 1226 */ 'F', 'P', 'S', 'C', 'R', 0, + /* 1232 */ 'L', 'R', 0, + /* 1235 */ 'A', 'P', 'S', 'R', 0, + /* 1240 */ 'C', 'P', 'S', 'R', 0, + /* 1245 */ 'S', 'P', 'S', 'R', 0, + /* 1250 */ 'F', 'P', 'I', 'N', 'S', 'T', 0, + /* 1257 */ 'F', 'P', 'S', 'C', 'R', '_', 'N', 'Z', 'C', 'V', 0, + /* 1268 */ 'A', 'P', 'S', 'R', '_', 'N', 'Z', 'C', 'V', 0, +}; + +extern const MCRegisterDesc ARMRegDesc[] = { // Descriptors + { 12, 0, 0, 0, 0, 0 }, + { 1235, 16, 16, 2, 66945, 0 }, + { 1268, 16, 16, 2, 66945, 0 }, + { 1240, 16, 16, 2, 66945, 0 }, + { 1199, 16, 16, 2, 66945, 0 }, + { 1250, 16, 16, 2, 66945, 0 }, + { 1226, 16, 16, 2, 17664, 0 }, + { 1257, 16, 16, 2, 17664, 0 }, + { 1205, 16, 16, 2, 66913, 0 }, + { 1211, 16, 16, 2, 66913, 0 }, + { 1232, 16, 16, 2, 66913, 0 }, + { 1196, 16, 16, 2, 66913, 0 }, + { 1223, 16, 1526, 2, 66913, 0 }, + { 1245, 16, 16, 2, 66913, 0 }, + { 119, 350, 4013, 19, 13250, 8 }, + { 248, 357, 2479, 19, 13250, 8 }, + { 363, 364, 3957, 19, 13250, 8 }, + { 479, 378, 3845, 19, 13250, 8 }, + { 605, 392, 3893, 19, 13250, 8 }, + { 723, 406, 3724, 19, 13250, 8 }, + { 837, 420, 3780, 19, 13250, 8 }, + { 943, 434, 3604, 19, 13250, 8 }, + { 1057, 448, 3664, 19, 13250, 8 }, + { 1163, 462, 3484, 19, 13250, 8 }, + { 9, 476, 3544, 19, 13250, 8 }, + { 141, 490, 3364, 19, 13250, 8 }, + { 282, 504, 3424, 19, 13250, 8 }, + { 408, 518, 3244, 19, 13250, 8 }, + { 523, 532, 3304, 19, 13250, 8 }, + { 649, 546, 3149, 19, 13250, 8 }, + { 768, 16, 3208, 2, 17761, 0 }, + { 882, 16, 3078, 2, 17761, 0 }, + { 988, 16, 3113, 2, 17761, 0 }, + { 1102, 16, 3008, 2, 17761, 0 }, + { 59, 16, 3043, 2, 17761, 0 }, + { 192, 16, 2938, 2, 17761, 0 }, + { 336, 16, 2973, 2, 17761, 0 }, + { 456, 16, 2868, 2, 17761, 0 }, + { 575, 16, 2903, 2, 17761, 0 }, + { 697, 16, 2797, 2, 17761, 0 }, + { 804, 16, 2837, 2, 17761, 0 }, + { 914, 16, 2363, 2, 17761, 0 }, + { 1024, 16, 2411, 2, 17761, 0 }, + { 1134, 16, 2384, 2, 17761, 0 }, + { 95, 16, 2429, 2, 17761, 0 }, + { 224, 16, 2789, 2, 17761, 0 }, + { 390, 16, 16, 2, 17761, 0 }, + { 125, 16, 16, 2, 17761, 0 }, + { 257, 16, 16, 2, 17761, 0 }, + { 381, 16, 16, 2, 17761, 0 }, + { 122, 353, 1112, 22, 2196, 11 }, + { 254, 374, 775, 22, 2196, 11 }, + { 378, 402, 314, 22, 2196, 11 }, + { 500, 430, 244, 22, 2196, 11 }, + { 629, 458, 234, 22, 2196, 11 }, + { 744, 486, 224, 22, 2196, 11 }, + { 861, 514, 214, 22, 2196, 11 }, + { 964, 542, 204, 22, 2196, 11 }, + { 1081, 804, 194, 0, 12818, 20 }, + { 1184, 807, 184, 0, 12818, 20 }, + { 35, 810, 174, 0, 12818, 20 }, + { 168, 813, 164, 0, 12818, 20 }, + { 312, 816, 154, 0, 12818, 20 }, + { 436, 819, 591, 0, 12818, 20 }, + { 555, 822, 2447, 0, 12818, 20 }, + { 677, 825, 1106, 0, 12818, 20 }, + { 128, 16, 1373, 2, 66913, 0 }, + { 260, 16, 1371, 2, 66913, 0 }, + { 384, 16, 1371, 2, 66913, 0 }, + { 506, 16, 1369, 2, 66913, 0 }, + { 632, 16, 1369, 2, 66913, 0 }, + { 750, 16, 1367, 2, 66913, 0 }, + { 864, 16, 1367, 2, 66913, 0 }, + { 970, 16, 1365, 2, 66913, 0 }, + { 1084, 16, 1365, 2, 66913, 0 }, + { 1190, 16, 1363, 2, 66913, 0 }, + { 39, 16, 1363, 2, 66913, 0 }, + { 176, 16, 1361, 2, 66913, 0 }, + { 316, 16, 1359, 2, 66913, 0 }, + { 131, 16, 4021, 2, 65585, 0 }, + { 269, 16, 4012, 2, 65585, 0 }, + { 387, 16, 2490, 2, 65585, 0 }, + { 509, 16, 2478, 2, 65585, 0 }, + { 635, 16, 3974, 2, 65585, 0 }, + { 753, 16, 3956, 2, 65585, 0 }, + { 867, 16, 3863, 2, 65585, 0 }, + { 973, 16, 3844, 2, 65585, 0 }, + { 1087, 16, 3914, 2, 65585, 0 }, + { 1193, 16, 3892, 2, 65585, 0 }, + { 43, 16, 3745, 2, 65585, 0 }, + { 180, 16, 3723, 2, 65585, 0 }, + { 320, 16, 3803, 2, 65585, 0 }, + { 440, 16, 3779, 2, 65585, 0 }, + { 559, 16, 3627, 2, 65585, 0 }, + { 681, 16, 3603, 2, 65585, 0 }, + { 788, 16, 3687, 2, 65585, 0 }, + { 898, 16, 3663, 2, 65585, 0 }, + { 1008, 16, 3507, 2, 65585, 0 }, + { 1118, 16, 3483, 2, 65585, 0 }, + { 79, 16, 3567, 2, 65585, 0 }, + { 212, 16, 3543, 2, 65585, 0 }, + { 356, 16, 3387, 2, 65585, 0 }, + { 472, 16, 3363, 2, 65585, 0 }, + { 595, 16, 3447, 2, 65585, 0 }, + { 713, 16, 3423, 2, 65585, 0 }, + { 824, 16, 3267, 2, 65585, 0 }, + { 930, 16, 3243, 2, 65585, 0 }, + { 1044, 16, 3327, 2, 65585, 0 }, + { 1150, 16, 3303, 2, 65585, 0 }, + { 115, 16, 3172, 2, 65585, 0 }, + { 244, 16, 3148, 2, 65585, 0 }, + { 360, 367, 4015, 29, 5426, 23 }, + { 476, 381, 2502, 29, 5426, 23 }, + { 602, 395, 3992, 29, 5426, 23 }, + { 720, 409, 3882, 29, 5426, 23 }, + { 834, 423, 3936, 29, 5426, 23 }, + { 940, 437, 3767, 29, 5426, 23 }, + { 1054, 451, 3827, 29, 5426, 23 }, + { 1160, 465, 3651, 29, 5426, 23 }, + { 6, 479, 3711, 29, 5426, 23 }, + { 151, 493, 3531, 29, 5426, 23 }, + { 278, 507, 3591, 29, 5426, 23 }, + { 404, 521, 3411, 29, 5426, 23 }, + { 519, 535, 3471, 29, 5426, 23 }, + { 645, 549, 3291, 29, 5426, 23 }, + { 764, 4007, 3351, 11, 17602, 35 }, + { 878, 3948, 3196, 11, 13522, 35 }, + { 984, 1080, 3231, 8, 17329, 39 }, + { 1098, 1080, 3101, 8, 17329, 39 }, + { 55, 1080, 3136, 8, 17329, 39 }, + { 204, 1080, 3031, 8, 17329, 39 }, + { 332, 1080, 3066, 8, 17329, 39 }, + { 452, 1080, 2961, 8, 17329, 39 }, + { 571, 1080, 2996, 8, 17329, 39 }, + { 693, 1080, 2891, 8, 17329, 39 }, + { 800, 1080, 2926, 8, 17329, 39 }, + { 910, 1080, 2820, 8, 17329, 39 }, + { 1020, 1080, 2858, 8, 17329, 39 }, + { 1130, 1080, 2401, 8, 17329, 39 }, + { 91, 1080, 2440, 8, 17329, 39 }, + { 236, 1080, 2791, 8, 17329, 39 }, + { 251, 1339, 1114, 168, 1044, 57 }, + { 375, 1319, 347, 168, 1044, 57 }, + { 497, 1299, 142, 168, 1044, 57 }, + { 626, 1279, 142, 168, 1044, 57 }, + { 741, 1259, 142, 168, 1044, 57 }, + { 858, 1239, 142, 168, 1044, 57 }, + { 961, 1219, 142, 168, 1044, 57 }, + { 1078, 1203, 142, 88, 1456, 74 }, + { 1181, 1191, 142, 76, 2114, 87 }, + { 32, 1179, 142, 76, 2114, 87 }, + { 164, 1167, 142, 76, 2114, 87 }, + { 308, 1155, 142, 76, 2114, 87 }, + { 432, 1143, 142, 76, 2114, 87 }, + { 551, 1131, 344, 76, 2114, 87 }, + { 673, 1119, 1108, 76, 2114, 87 }, + { 491, 2156, 16, 474, 4, 92 }, + { 620, 2101, 16, 474, 4, 92 }, + { 735, 2046, 16, 474, 4, 92 }, + { 852, 1991, 16, 474, 4, 92 }, + { 955, 1936, 16, 474, 4, 92 }, + { 1072, 1885, 16, 423, 272, 109 }, + { 1175, 1838, 16, 376, 512, 124 }, + { 26, 1795, 16, 333, 720, 137 }, + { 158, 1756, 16, 294, 1186, 148 }, + { 301, 1717, 16, 294, 1186, 148 }, + { 424, 1678, 16, 294, 1186, 148 }, + { 543, 1639, 16, 294, 1186, 148 }, + { 665, 1600, 16, 294, 1186, 148 }, + { 1219, 4114, 16, 16, 17856, 2 }, + { 263, 783, 16, 16, 8946, 5 }, + { 503, 786, 16, 16, 8946, 5 }, + { 747, 789, 16, 16, 8946, 5 }, + { 967, 792, 16, 16, 8946, 5 }, + { 1187, 795, 16, 16, 8946, 5 }, + { 172, 798, 16, 16, 8946, 5 }, + { 366, 1513, 1113, 63, 1570, 28 }, + { 482, 4169, 2511, 63, 1570, 28 }, + { 611, 1500, 778, 63, 1570, 28 }, + { 726, 4156, 770, 63, 1570, 28 }, + { 843, 1487, 317, 63, 1570, 28 }, + { 946, 4143, 660, 63, 1570, 28 }, + { 1063, 1474, 308, 63, 1570, 28 }, + { 1166, 4130, 654, 63, 1570, 28 }, + { 16, 1461, 302, 63, 1570, 28 }, + { 134, 4117, 648, 63, 1570, 28 }, + { 289, 1448, 296, 63, 1570, 28 }, + { 412, 4101, 642, 63, 1570, 28 }, + { 531, 1435, 290, 63, 1570, 28 }, + { 653, 4088, 636, 63, 1570, 28 }, + { 776, 1424, 284, 52, 1680, 42 }, + { 886, 4079, 630, 43, 1872, 48 }, + { 996, 1417, 278, 36, 2401, 53 }, + { 1106, 4072, 624, 36, 2401, 53 }, + { 67, 1410, 272, 36, 2401, 53 }, + { 184, 4065, 618, 36, 2401, 53 }, + { 344, 1403, 266, 36, 2401, 53 }, + { 460, 4058, 612, 36, 2401, 53 }, + { 583, 1396, 260, 36, 2401, 53 }, + { 701, 4051, 606, 36, 2401, 53 }, + { 812, 1389, 254, 36, 2401, 53 }, + { 918, 4044, 600, 36, 2401, 53 }, + { 1032, 1382, 765, 36, 2401, 53 }, + { 1138, 4037, 2455, 36, 2401, 53 }, + { 103, 1375, 2474, 36, 2401, 53 }, + { 216, 4030, 1107, 36, 2401, 53 }, + { 599, 1026, 4018, 212, 5314, 192 }, + { 717, 1014, 3953, 212, 5314, 192 }, + { 831, 1002, 4002, 212, 5314, 192 }, + { 937, 990, 3909, 212, 5314, 192 }, + { 1051, 978, 3909, 212, 5314, 192 }, + { 1157, 966, 3798, 212, 5314, 192 }, + { 3, 954, 3798, 212, 5314, 192 }, + { 148, 942, 3682, 212, 5314, 192 }, + { 275, 930, 3682, 212, 5314, 192 }, + { 401, 918, 3562, 212, 5314, 192 }, + { 515, 906, 3562, 212, 5314, 192 }, + { 641, 894, 3442, 212, 5314, 192 }, + { 760, 1070, 3442, 202, 17506, 199 }, + { 874, 1060, 3322, 202, 13426, 199 }, + { 980, 1052, 3322, 194, 14226, 205 }, + { 1094, 1044, 3226, 194, 13698, 205 }, + { 51, 1038, 3226, 188, 14049, 210 }, + { 200, 1038, 3131, 188, 14049, 210 }, + { 328, 1038, 3131, 188, 14049, 210 }, + { 448, 1038, 3061, 188, 14049, 210 }, + { 567, 1038, 3061, 188, 14049, 210 }, + { 689, 1038, 2991, 188, 14049, 210 }, + { 796, 1038, 2991, 188, 14049, 210 }, + { 906, 1038, 2921, 188, 14049, 210 }, + { 1016, 1038, 2921, 188, 14049, 210 }, + { 1126, 1038, 2832, 188, 14049, 210 }, + { 87, 1038, 2855, 188, 14049, 210 }, + { 232, 1038, 2794, 188, 14049, 210 }, + { 828, 2677, 4010, 276, 5170, 157 }, + { 934, 2659, 3951, 276, 5170, 157 }, + { 1048, 2641, 3951, 276, 5170, 157 }, + { 1154, 2623, 3842, 276, 5170, 157 }, + { 0, 2605, 3842, 276, 5170, 157 }, + { 145, 2587, 3743, 276, 5170, 157 }, + { 272, 2569, 3743, 276, 5170, 157 }, + { 398, 2551, 3625, 276, 5170, 157 }, + { 512, 2533, 3625, 276, 5170, 157 }, + { 638, 2515, 3505, 276, 5170, 157 }, + { 756, 2773, 3505, 260, 17378, 166 }, + { 870, 2757, 3385, 260, 13298, 166 }, + { 976, 2743, 3385, 246, 14114, 174 }, + { 1090, 2729, 3265, 246, 13586, 174 }, + { 47, 2717, 3265, 234, 13954, 181 }, + { 196, 2705, 3170, 234, 13778, 181 }, + { 324, 2695, 3170, 224, 13873, 187 }, + { 444, 2695, 3099, 224, 13873, 187 }, + { 563, 2695, 3099, 224, 13873, 187 }, + { 685, 2695, 3029, 224, 13873, 187 }, + { 792, 2695, 3029, 224, 13873, 187 }, + { 902, 2695, 2959, 224, 13873, 187 }, + { 1012, 2695, 2959, 224, 13873, 187 }, + { 1122, 2695, 2856, 224, 13873, 187 }, + { 83, 2695, 2856, 224, 13873, 187 }, + { 228, 2695, 2795, 224, 13873, 187 }, + { 369, 360, 2509, 22, 1956, 11 }, + { 614, 388, 583, 22, 1956, 11 }, + { 846, 416, 756, 22, 1956, 11 }, + { 1066, 444, 747, 22, 1956, 11 }, + { 19, 472, 738, 22, 1956, 11 }, + { 293, 500, 729, 22, 1956, 11 }, + { 535, 528, 720, 22, 1956, 11 }, + { 780, 3839, 711, 3, 2336, 16 }, + { 1000, 562, 702, 0, 8898, 20 }, + { 71, 565, 693, 0, 8898, 20 }, + { 348, 568, 684, 0, 8898, 20 }, + { 587, 571, 675, 0, 8898, 20 }, + { 816, 574, 666, 0, 8898, 20 }, + { 1036, 577, 2460, 0, 8898, 20 }, + { 107, 580, 2468, 0, 8898, 20 }, + { 608, 2343, 2488, 148, 900, 57 }, + { 840, 2323, 588, 148, 900, 57 }, + { 1060, 2303, 588, 148, 900, 57 }, + { 13, 2283, 588, 148, 900, 57 }, + { 286, 2263, 588, 148, 900, 57 }, + { 527, 2243, 588, 148, 900, 57 }, + { 772, 2225, 588, 130, 1328, 66 }, + { 992, 2211, 588, 116, 1776, 81 }, + { 63, 1588, 588, 104, 2034, 87 }, + { 340, 1576, 588, 104, 2034, 87 }, + { 579, 1564, 588, 104, 2034, 87 }, + { 808, 1552, 588, 104, 2034, 87 }, + { 1028, 1540, 588, 104, 2034, 87 }, + { 99, 1528, 2382, 104, 2034, 87 }, +}; + +extern const MCPhysReg ARMRegUnitRoots[][2] = { + { ARM::APSR }, + { ARM::APSR_NZCV }, + { ARM::CPSR }, + { ARM::FPEXC }, + { ARM::FPINST }, + { ARM::FPSCR, ARM::FPSCR_NZCV }, + { ARM::FPSID }, + { ARM::ITSTATE }, + { ARM::LR }, + { ARM::PC }, + { ARM::SP }, + { ARM::SPSR }, + { ARM::S0 }, + { ARM::S1 }, + { ARM::S2 }, + { ARM::S3 }, + { ARM::S4 }, + { ARM::S5 }, + { ARM::S6 }, + { ARM::S7 }, + { ARM::S8 }, + { ARM::S9 }, + { ARM::S10 }, + { ARM::S11 }, + { ARM::S12 }, + { ARM::S13 }, + { ARM::S14 }, + { ARM::S15 }, + { ARM::S16 }, + { ARM::S17 }, + { ARM::S18 }, + { ARM::S19 }, + { ARM::S20 }, + { ARM::S21 }, + { ARM::S22 }, + { ARM::S23 }, + { ARM::S24 }, + { ARM::S25 }, + { ARM::S26 }, + { ARM::S27 }, + { ARM::S28 }, + { ARM::S29 }, + { ARM::S30 }, + { ARM::S31 }, + { ARM::D16 }, + { ARM::D17 }, + { ARM::D18 }, + { ARM::D19 }, + { ARM::D20 }, + { ARM::D21 }, + { ARM::D22 }, + { ARM::D23 }, + { ARM::D24 }, + { ARM::D25 }, + { ARM::D26 }, + { ARM::D27 }, + { ARM::D28 }, + { ARM::D29 }, + { ARM::D30 }, + { ARM::D31 }, + { ARM::FPINST2 }, + { ARM::MVFR0 }, + { ARM::MVFR1 }, + { ARM::MVFR2 }, + { ARM::R0 }, + { ARM::R1 }, + { ARM::R2 }, + { ARM::R3 }, + { ARM::R4 }, + { ARM::R5 }, + { ARM::R6 }, + { ARM::R7 }, + { ARM::R8 }, + { ARM::R9 }, + { ARM::R10 }, + { ARM::R11 }, + { ARM::R12 }, +}; + +namespace { // Register classes... + // SPR Register Class... + const MCPhysReg SPR[] = { + ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15, ARM::S16, ARM::S17, ARM::S18, ARM::S19, ARM::S20, ARM::S21, ARM::S22, ARM::S23, ARM::S24, ARM::S25, ARM::S26, ARM::S27, ARM::S28, ARM::S29, ARM::S30, ARM::S31, + }; + + // SPR Bit set. + const uint8_t SPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x7f, + }; + + // GPR Register Class... + const MCPhysReg GPR[] = { + ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::LR, ARM::PC, + }; + + // GPR Bit set. + const uint8_t GPRBits[] = { + 0x00, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x7f, + }; + + // GPRwithAPSR Register Class... + const MCPhysReg GPRwithAPSR[] = { + ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::LR, ARM::APSR_NZCV, + }; + + // GPRwithAPSR Bit set. + const uint8_t GPRwithAPSRBits[] = { + 0x04, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x7f, + }; + + // SPR_8 Register Class... + const MCPhysReg SPR_8[] = { + ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15, + }; + + // SPR_8 Bit set. + const uint8_t SPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x7f, + }; + + // GPRnopc Register Class... + const MCPhysReg GPRnopc[] = { + ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::LR, + }; + + // GPRnopc Bit set. + const uint8_t GPRnopcBits[] = { + 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x7f, + }; + + // rGPR Register Class... + const MCPhysReg rGPR[] = { + ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, + }; + + // rGPR Bit set. + const uint8_t rGPRBits[] = { + 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x7f, + }; + + // hGPR Register Class... + const MCPhysReg hGPR[] = { + ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::LR, ARM::PC, + }; + + // hGPR Bit set. + const uint8_t hGPRBits[] = { + 0x00, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, + }; + + // tGPR Register Class... + const MCPhysReg tGPR[] = { + ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, + }; + + // tGPR Bit set. + const uint8_t tGPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, + }; + + // GPRnopc_and_hGPR Register Class... + const MCPhysReg GPRnopc_and_hGPR[] = { + ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::LR, + }; + + // GPRnopc_and_hGPR Bit set. + const uint8_t GPRnopc_and_hGPRBits[] = { + 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, + }; + + // hGPR_and_rGPR Register Class... + const MCPhysReg hGPR_and_rGPR[] = { + ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, + }; + + // hGPR_and_rGPR Bit set. + const uint8_t hGPR_and_rGPRBits[] = { + 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, + }; + + // tcGPR Register Class... + const MCPhysReg tcGPR[] = { + ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R12, + }; + + // tcGPR Bit set. + const uint8_t tcGPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x40, + }; + + // tGPR_and_tcGPR Register Class... + const MCPhysReg tGPR_and_tcGPR[] = { + ARM::R0, ARM::R1, ARM::R2, ARM::R3, + }; + + // tGPR_and_tcGPR Bit set. + const uint8_t tGPR_and_tcGPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, + }; + + // CCR Register Class... + const MCPhysReg CCR[] = { + ARM::CPSR, + }; + + // CCR Bit set. + const uint8_t CCRBits[] = { + 0x08, + }; + + // GPRsp Register Class... + const MCPhysReg GPRsp[] = { + ARM::SP, + }; + + // GPRsp Bit set. + const uint8_t GPRspBits[] = { + 0x00, 0x10, + }; + + // hGPR_and_tcGPR Register Class... + const MCPhysReg hGPR_and_tcGPR[] = { + ARM::R12, + }; + + // hGPR_and_tcGPR Bit set. + const uint8_t hGPR_and_tcGPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, + }; + + // DPR Register Class... + const MCPhysReg DPR[] = { + ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, ARM::D8, ARM::D9, ARM::D10, ARM::D11, ARM::D12, ARM::D13, ARM::D14, ARM::D15, ARM::D16, ARM::D17, ARM::D18, ARM::D19, ARM::D20, ARM::D21, ARM::D22, ARM::D23, ARM::D24, ARM::D25, ARM::D26, ARM::D27, ARM::D28, ARM::D29, ARM::D30, ARM::D31, + }; + + // DPR Bit set. + const uint8_t DPRBits[] = { + 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f, + }; + + // DPR_VFP2 Register Class... + const MCPhysReg DPR_VFP2[] = { + ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, ARM::D8, ARM::D9, ARM::D10, ARM::D11, ARM::D12, ARM::D13, ARM::D14, ARM::D15, + }; + + // DPR_VFP2 Bit set. + const uint8_t DPR_VFP2Bits[] = { + 0x00, 0xc0, 0xff, 0x3f, + }; + + // DPR_8 Register Class... + const MCPhysReg DPR_8[] = { + ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, + }; + + // DPR_8 Bit set. + const uint8_t DPR_8Bits[] = { + 0x00, 0xc0, 0x3f, + }; + + // GPRPair Register Class... + const MCPhysReg GPRPair[] = { + ARM::R0_R1, ARM::R2_R3, ARM::R4_R5, ARM::R6_R7, ARM::R8_R9, ARM::R10_R11, ARM::R12_SP, + }; + + // GPRPair Bit set. + const uint8_t GPRPairBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, + }; + + // GPRPair_with_gsub_1_in_rGPR Register Class... + const MCPhysReg GPRPair_with_gsub_1_in_rGPR[] = { + ARM::R0_R1, ARM::R2_R3, ARM::R4_R5, ARM::R6_R7, ARM::R8_R9, ARM::R10_R11, + }; + + // GPRPair_with_gsub_1_in_rGPR Bit set. + const uint8_t GPRPair_with_gsub_1_in_rGPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, + }; + + // GPRPair_with_gsub_0_in_tGPR Register Class... + const MCPhysReg GPRPair_with_gsub_0_in_tGPR[] = { + ARM::R0_R1, ARM::R2_R3, ARM::R4_R5, ARM::R6_R7, + }; + + // GPRPair_with_gsub_0_in_tGPR Bit set. + const uint8_t GPRPair_with_gsub_0_in_tGPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, + }; + + // GPRPair_with_gsub_0_in_hGPR Register Class... + const MCPhysReg GPRPair_with_gsub_0_in_hGPR[] = { + ARM::R8_R9, ARM::R10_R11, ARM::R12_SP, + }; + + // GPRPair_with_gsub_0_in_hGPR Bit set. + const uint8_t GPRPair_with_gsub_0_in_hGPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc2, + }; + + // GPRPair_with_gsub_0_in_tcGPR Register Class... + const MCPhysReg GPRPair_with_gsub_0_in_tcGPR[] = { + ARM::R0_R1, ARM::R2_R3, ARM::R12_SP, + }; + + // GPRPair_with_gsub_0_in_tcGPR Bit set. + const uint8_t GPRPair_with_gsub_0_in_tcGPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0e, + }; + + // GPRPair_with_gsub_1_in_hGPR_and_rGPR Register Class... + const MCPhysReg GPRPair_with_gsub_1_in_hGPR_and_rGPR[] = { + ARM::R8_R9, ARM::R10_R11, + }; + + // GPRPair_with_gsub_1_in_hGPR_and_rGPR Bit set. + const uint8_t GPRPair_with_gsub_1_in_hGPR_and_rGPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, + }; + + // GPRPair_with_gsub_1_in_tcGPR Register Class... + const MCPhysReg GPRPair_with_gsub_1_in_tcGPR[] = { + ARM::R0_R1, ARM::R2_R3, + }; + + // GPRPair_with_gsub_1_in_tcGPR Bit set. + const uint8_t GPRPair_with_gsub_1_in_tcGPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, + }; + + // GPRPair_with_gsub_1_in_GPRsp Register Class... + const MCPhysReg GPRPair_with_gsub_1_in_GPRsp[] = { + ARM::R12_SP, + }; + + // GPRPair_with_gsub_1_in_GPRsp Bit set. + const uint8_t GPRPair_with_gsub_1_in_GPRspBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, + }; + + // DPairSpc Register Class... + const MCPhysReg DPairSpc[] = { + ARM::D0_D2, ARM::D1_D3, ARM::D2_D4, ARM::D3_D5, ARM::D4_D6, ARM::D5_D7, ARM::D6_D8, ARM::D7_D9, ARM::D8_D10, ARM::D9_D11, ARM::D10_D12, ARM::D11_D13, ARM::D12_D14, ARM::D13_D15, ARM::D14_D16, ARM::D15_D17, ARM::D16_D18, ARM::D17_D19, ARM::D18_D20, ARM::D19_D21, ARM::D20_D22, ARM::D21_D23, ARM::D22_D24, ARM::D23_D25, ARM::D24_D26, ARM::D25_D27, ARM::D26_D28, ARM::D27_D29, ARM::D28_D30, ARM::D29_D31, + }; + + // DPairSpc Bit set. + const uint8_t DPairSpcBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x1f, + }; + + // DPairSpc_with_ssub_0 Register Class... + const MCPhysReg DPairSpc_with_ssub_0[] = { + ARM::D0_D2, ARM::D1_D3, ARM::D2_D4, ARM::D3_D5, ARM::D4_D6, ARM::D5_D7, ARM::D6_D8, ARM::D7_D9, ARM::D8_D10, ARM::D9_D11, ARM::D10_D12, ARM::D11_D13, ARM::D12_D14, ARM::D13_D15, ARM::D14_D16, ARM::D15_D17, + }; + + // DPairSpc_with_ssub_0 Bit set. + const uint8_t DPairSpc_with_ssub_0Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x7f, + }; + + // DPairSpc_with_dsub_2_then_ssub_0 Register Class... + const MCPhysReg DPairSpc_with_dsub_2_then_ssub_0[] = { + ARM::D0_D2, ARM::D1_D3, ARM::D2_D4, ARM::D3_D5, ARM::D4_D6, ARM::D5_D7, ARM::D6_D8, ARM::D7_D9, ARM::D8_D10, ARM::D9_D11, ARM::D10_D12, ARM::D11_D13, ARM::D12_D14, ARM::D13_D15, + }; + + // DPairSpc_with_dsub_2_then_ssub_0 Bit set. + const uint8_t DPairSpc_with_dsub_2_then_ssub_0Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x1f, + }; + + // DPairSpc_with_dsub_0_in_DPR_8 Register Class... + const MCPhysReg DPairSpc_with_dsub_0_in_DPR_8[] = { + ARM::D0_D2, ARM::D1_D3, ARM::D2_D4, ARM::D3_D5, ARM::D4_D6, ARM::D5_D7, ARM::D6_D8, ARM::D7_D9, + }; + + // DPairSpc_with_dsub_0_in_DPR_8 Bit set. + const uint8_t DPairSpc_with_dsub_0_in_DPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x7f, + }; + + // DPairSpc_with_dsub_2_in_DPR_8 Register Class... + const MCPhysReg DPairSpc_with_dsub_2_in_DPR_8[] = { + ARM::D0_D2, ARM::D1_D3, ARM::D2_D4, ARM::D3_D5, ARM::D4_D6, ARM::D5_D7, + }; + + // DPairSpc_with_dsub_2_in_DPR_8 Bit set. + const uint8_t DPairSpc_with_dsub_2_in_DPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x1f, + }; + + // DPair Register Class... + const MCPhysReg DPair[] = { + ARM::Q0, ARM::D1_D2, ARM::Q1, ARM::D3_D4, ARM::Q2, ARM::D5_D6, ARM::Q3, ARM::D7_D8, ARM::Q4, ARM::D9_D10, ARM::Q5, ARM::D11_D12, ARM::Q6, ARM::D13_D14, ARM::Q7, ARM::D15_D16, ARM::Q8, ARM::D17_D18, ARM::Q9, ARM::D19_D20, ARM::Q10, ARM::D21_D22, ARM::Q11, ARM::D23_D24, ARM::Q12, ARM::D25_D26, ARM::Q13, ARM::D27_D28, ARM::Q14, ARM::D29_D30, ARM::Q15, + }; + + // DPair Bit set. + const uint8_t DPairBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, + }; + + // DPair_with_ssub_0 Register Class... + const MCPhysReg DPair_with_ssub_0[] = { + ARM::Q0, ARM::D1_D2, ARM::Q1, ARM::D3_D4, ARM::Q2, ARM::D5_D6, ARM::Q3, ARM::D7_D8, ARM::Q4, ARM::D9_D10, ARM::Q5, ARM::D11_D12, ARM::Q6, ARM::D13_D14, ARM::Q7, ARM::D15_D16, + }; + + // DPair_with_ssub_0 Bit set. + const uint8_t DPair_with_ssub_0Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, + }; + + // QPR Register Class... + const MCPhysReg QPR[] = { + ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11, ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15, + }; + + // QPR Bit set. + const uint8_t QPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, + }; + + // DPair_with_ssub_2 Register Class... + const MCPhysReg DPair_with_ssub_2[] = { + ARM::Q0, ARM::D1_D2, ARM::Q1, ARM::D3_D4, ARM::Q2, ARM::D5_D6, ARM::Q3, ARM::D7_D8, ARM::Q4, ARM::D9_D10, ARM::Q5, ARM::D11_D12, ARM::Q6, ARM::D13_D14, ARM::Q7, + }; + + // DPair_with_ssub_2 Bit set. + const uint8_t DPair_with_ssub_2Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x07, + }; + + // DPair_with_dsub_0_in_DPR_8 Register Class... + const MCPhysReg DPair_with_dsub_0_in_DPR_8[] = { + ARM::Q0, ARM::D1_D2, ARM::Q1, ARM::D3_D4, ARM::Q2, ARM::D5_D6, ARM::Q3, ARM::D7_D8, + }; + + // DPair_with_dsub_0_in_DPR_8 Bit set. + const uint8_t DPair_with_dsub_0_in_DPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, + }; + + // QPR_VFP2 Register Class... + const MCPhysReg QPR_VFP2[] = { + ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, + }; + + // QPR_VFP2 Bit set. + const uint8_t QPR_VFP2Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, + }; + + // DPair_with_dsub_1_in_DPR_8 Register Class... + const MCPhysReg DPair_with_dsub_1_in_DPR_8[] = { + ARM::Q0, ARM::D1_D2, ARM::Q1, ARM::D3_D4, ARM::Q2, ARM::D5_D6, ARM::Q3, + }; + + // DPair_with_dsub_1_in_DPR_8 Bit set. + const uint8_t DPair_with_dsub_1_in_DPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, + }; + + // QPR_8 Register Class... + const MCPhysReg QPR_8[] = { + ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, + }; + + // QPR_8 Bit set. + const uint8_t QPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, + }; + + // DTriple Register Class... + const MCPhysReg DTriple[] = { + ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8, ARM::D7_D8_D9, ARM::D8_D9_D10, ARM::D9_D10_D11, ARM::D10_D11_D12, ARM::D11_D12_D13, ARM::D12_D13_D14, ARM::D13_D14_D15, ARM::D14_D15_D16, ARM::D15_D16_D17, ARM::D16_D17_D18, ARM::D17_D18_D19, ARM::D18_D19_D20, ARM::D19_D20_D21, ARM::D20_D21_D22, ARM::D21_D22_D23, ARM::D22_D23_D24, ARM::D23_D24_D25, ARM::D24_D25_D26, ARM::D25_D26_D27, ARM::D26_D27_D28, ARM::D27_D28_D29, ARM::D28_D29_D30, ARM::D29_D30_D31, + }; + + // DTriple Bit set. + const uint8_t DTripleBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x3f, + }; + + // DTripleSpc Register Class... + const MCPhysReg DTripleSpc[] = { + ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17, ARM::D14_D16_D18, ARM::D15_D17_D19, ARM::D16_D18_D20, ARM::D17_D19_D21, ARM::D18_D20_D22, ARM::D19_D21_D23, ARM::D20_D22_D24, ARM::D21_D23_D25, ARM::D22_D24_D26, ARM::D23_D25_D27, ARM::D24_D26_D28, ARM::D25_D27_D29, ARM::D26_D28_D30, ARM::D27_D29_D31, + }; + + // DTripleSpc Bit set. + const uint8_t DTripleSpcBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x03, + }; + + // DTripleSpc_with_ssub_0 Register Class... + const MCPhysReg DTripleSpc_with_ssub_0[] = { + ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17, ARM::D14_D16_D18, ARM::D15_D17_D19, + }; + + // DTripleSpc_with_ssub_0 Bit set. + const uint8_t DTripleSpc_with_ssub_0Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x3f, + }; + + // DTriple_with_ssub_0 Register Class... + const MCPhysReg DTriple_with_ssub_0[] = { + ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8, ARM::D7_D8_D9, ARM::D8_D9_D10, ARM::D9_D10_D11, ARM::D10_D11_D12, ARM::D11_D12_D13, ARM::D12_D13_D14, ARM::D13_D14_D15, ARM::D14_D15_D16, ARM::D15_D16_D17, + }; + + // DTriple_with_ssub_0 Bit set. + const uint8_t DTriple_with_ssub_0Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, + }; + + // DTriple_with_dsub_1_dsub_2_in_QPR Register Class... + const MCPhysReg DTriple_with_dsub_1_dsub_2_in_QPR[] = { + ARM::D1_D2_D3, ARM::D3_D4_D5, ARM::D5_D6_D7, ARM::D7_D8_D9, ARM::D9_D10_D11, ARM::D11_D12_D13, ARM::D13_D14_D15, ARM::D15_D16_D17, ARM::D17_D18_D19, ARM::D19_D20_D21, ARM::D21_D22_D23, ARM::D23_D24_D25, ARM::D25_D26_D27, ARM::D27_D28_D29, ARM::D29_D30_D31, + }; + + // DTriple_with_dsub_1_dsub_2_in_QPR Bit set. + const uint8_t DTriple_with_dsub_1_dsub_2_in_QPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xaa, 0xaa, 0xaa, 0x2a, + }; + + // DTriple_with_qsub_0_in_QPR Register Class... + const MCPhysReg DTriple_with_qsub_0_in_QPR[] = { + ARM::D0_D1_D2, ARM::D2_D3_D4, ARM::D4_D5_D6, ARM::D6_D7_D8, ARM::D8_D9_D10, ARM::D10_D11_D12, ARM::D12_D13_D14, ARM::D14_D15_D16, ARM::D16_D17_D18, ARM::D18_D19_D20, ARM::D20_D21_D22, ARM::D22_D23_D24, ARM::D24_D25_D26, ARM::D26_D27_D28, ARM::D28_D29_D30, + }; + + // DTriple_with_qsub_0_in_QPR Bit set. + const uint8_t DTriple_with_qsub_0_in_QPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, 0x55, 0x15, + }; + + // DTriple_with_ssub_2 Register Class... + const MCPhysReg DTriple_with_ssub_2[] = { + ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8, ARM::D7_D8_D9, ARM::D8_D9_D10, ARM::D9_D10_D11, ARM::D10_D11_D12, ARM::D11_D12_D13, ARM::D12_D13_D14, ARM::D13_D14_D15, ARM::D14_D15_D16, + }; + + // DTriple_with_ssub_2 Bit set. + const uint8_t DTriple_with_ssub_2Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x7f, + }; + + // DTripleSpc_with_dsub_2_then_ssub_0 Register Class... + const MCPhysReg DTripleSpc_with_dsub_2_then_ssub_0[] = { + ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17, + }; + + // DTripleSpc_with_dsub_2_then_ssub_0 Bit set. + const uint8_t DTripleSpc_with_dsub_2_then_ssub_0Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x0f, + }; + + // DTriple_with_dsub_2_then_ssub_0 Register Class... + const MCPhysReg DTriple_with_dsub_2_then_ssub_0[] = { + ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8, ARM::D7_D8_D9, ARM::D8_D9_D10, ARM::D9_D10_D11, ARM::D10_D11_D12, ARM::D11_D12_D13, ARM::D12_D13_D14, ARM::D13_D14_D15, + }; + + // DTriple_with_dsub_2_then_ssub_0 Bit set. + const uint8_t DTriple_with_dsub_2_then_ssub_0Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x3f, + }; + + // DTripleSpc_with_dsub_4_then_ssub_0 Register Class... + const MCPhysReg DTripleSpc_with_dsub_4_then_ssub_0[] = { + ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, + }; + + // DTripleSpc_with_dsub_4_then_ssub_0 Bit set. + const uint8_t DTripleSpc_with_dsub_4_then_ssub_0Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x03, + }; + + // DTripleSpc_with_dsub_0_in_DPR_8 Register Class... + const MCPhysReg DTripleSpc_with_dsub_0_in_DPR_8[] = { + ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, + }; + + // DTripleSpc_with_dsub_0_in_DPR_8 Bit set. + const uint8_t DTripleSpc_with_dsub_0_in_DPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x3f, + }; + + // DTriple_with_dsub_0_in_DPR_8 Register Class... + const MCPhysReg DTriple_with_dsub_0_in_DPR_8[] = { + ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8, ARM::D7_D8_D9, + }; + + // DTriple_with_dsub_0_in_DPR_8 Bit set. + const uint8_t DTriple_with_dsub_0_in_DPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, + }; + + // DTriple_with_qsub_0_in_QPR_VFP2 Register Class... + const MCPhysReg DTriple_with_qsub_0_in_QPR_VFP2[] = { + ARM::D0_D1_D2, ARM::D2_D3_D4, ARM::D4_D5_D6, ARM::D6_D7_D8, ARM::D8_D9_D10, ARM::D10_D11_D12, ARM::D12_D13_D14, ARM::D14_D15_D16, + }; + + // DTriple_with_qsub_0_in_QPR_VFP2 Bit set. + const uint8_t DTriple_with_qsub_0_in_QPR_VFP2Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, + }; + + // DTriple_with_ssub_0_and_DTriple_with_dsub_1_dsub_2_in_QPR Register Class... + const MCPhysReg DTriple_with_ssub_0_and_DTriple_with_dsub_1_dsub_2_in_QPR[] = { + ARM::D1_D2_D3, ARM::D3_D4_D5, ARM::D5_D6_D7, ARM::D7_D8_D9, ARM::D9_D10_D11, ARM::D11_D12_D13, ARM::D13_D14_D15, ARM::D15_D16_D17, + }; + + // DTriple_with_ssub_0_and_DTriple_with_dsub_1_dsub_2_in_QPR Bit set. + const uint8_t DTriple_with_ssub_0_and_DTriple_with_dsub_1_dsub_2_in_QPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xaa, 0xaa, + }; + + // DTriple_with_dsub_1_dsub_2_in_QPR_VFP2 Register Class... + const MCPhysReg DTriple_with_dsub_1_dsub_2_in_QPR_VFP2[] = { + ARM::D1_D2_D3, ARM::D3_D4_D5, ARM::D5_D6_D7, ARM::D7_D8_D9, ARM::D9_D10_D11, ARM::D11_D12_D13, ARM::D13_D14_D15, + }; + + // DTriple_with_dsub_1_dsub_2_in_QPR_VFP2 Bit set. + const uint8_t DTriple_with_dsub_1_dsub_2_in_QPR_VFP2Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xaa, 0x2a, + }; + + // DTriple_with_dsub_1_in_DPR_8 Register Class... + const MCPhysReg DTriple_with_dsub_1_in_DPR_8[] = { + ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8, + }; + + // DTriple_with_dsub_1_in_DPR_8 Bit set. + const uint8_t DTriple_with_dsub_1_in_DPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, + }; + + // DTriple_with_dsub_2_then_ssub_0_and_DTriple_with_qsub_0_in_QPR Register Class... + const MCPhysReg DTriple_with_dsub_2_then_ssub_0_and_DTriple_with_qsub_0_in_QPR[] = { + ARM::D0_D1_D2, ARM::D2_D3_D4, ARM::D4_D5_D6, ARM::D6_D7_D8, ARM::D8_D9_D10, ARM::D10_D11_D12, ARM::D12_D13_D14, + }; + + // DTriple_with_dsub_2_then_ssub_0_and_DTriple_with_qsub_0_in_QPR Bit set. + const uint8_t DTriple_with_dsub_2_then_ssub_0_and_DTriple_with_qsub_0_in_QPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x15, + }; + + // DTripleSpc_with_dsub_2_in_DPR_8 Register Class... + const MCPhysReg DTripleSpc_with_dsub_2_in_DPR_8[] = { + ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, + }; + + // DTripleSpc_with_dsub_2_in_DPR_8 Bit set. + const uint8_t DTripleSpc_with_dsub_2_in_DPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x0f, + }; + + // DTriple_with_dsub_2_in_DPR_8 Register Class... + const MCPhysReg DTriple_with_dsub_2_in_DPR_8[] = { + ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, + }; + + // DTriple_with_dsub_2_in_DPR_8 Bit set. + const uint8_t DTriple_with_dsub_2_in_DPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, + }; + + // DTripleSpc_with_dsub_4_in_DPR_8 Register Class... + const MCPhysReg DTripleSpc_with_dsub_4_in_DPR_8[] = { + ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, + }; + + // DTripleSpc_with_dsub_4_in_DPR_8 Bit set. + const uint8_t DTripleSpc_with_dsub_4_in_DPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x03, + }; + + // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_dsub_1_dsub_2_in_QPR Register Class... + const MCPhysReg DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_dsub_1_dsub_2_in_QPR[] = { + ARM::D1_D2_D3, ARM::D3_D4_D5, ARM::D5_D6_D7, ARM::D7_D8_D9, + }; + + // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_dsub_1_dsub_2_in_QPR Bit set. + const uint8_t DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_dsub_1_dsub_2_in_QPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xaa, + }; + + // DTriple_with_qsub_0_in_QPR_8 Register Class... + const MCPhysReg DTriple_with_qsub_0_in_QPR_8[] = { + ARM::D0_D1_D2, ARM::D2_D3_D4, ARM::D4_D5_D6, ARM::D6_D7_D8, + }; + + // DTriple_with_qsub_0_in_QPR_8 Bit set. + const uint8_t DTriple_with_qsub_0_in_QPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, + }; + + // DTriple_with_dsub_1_dsub_2_in_QPR_8 Register Class... + const MCPhysReg DTriple_with_dsub_1_dsub_2_in_QPR_8[] = { + ARM::D1_D2_D3, ARM::D3_D4_D5, ARM::D5_D6_D7, + }; + + // DTriple_with_dsub_1_dsub_2_in_QPR_8 Bit set. + const uint8_t DTriple_with_dsub_1_dsub_2_in_QPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2a, + }; + + // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_QPR Register Class... + const MCPhysReg DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_QPR[] = { + ARM::D0_D1_D2, ARM::D2_D3_D4, ARM::D4_D5_D6, + }; + + // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_QPR Bit set. + const uint8_t DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_QPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x15, + }; + + // DQuadSpc Register Class... + const MCPhysReg DQuadSpc[] = { + ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17, ARM::D14_D16_D18, ARM::D15_D17_D19, ARM::D16_D18_D20, ARM::D17_D19_D21, ARM::D18_D20_D22, ARM::D19_D21_D23, ARM::D20_D22_D24, ARM::D21_D23_D25, ARM::D22_D24_D26, ARM::D23_D25_D27, ARM::D24_D26_D28, ARM::D25_D27_D29, ARM::D26_D28_D30, ARM::D27_D29_D31, + }; + + // DQuadSpc Bit set. + const uint8_t DQuadSpcBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x03, + }; + + // DQuadSpc_with_ssub_0 Register Class... + const MCPhysReg DQuadSpc_with_ssub_0[] = { + ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17, ARM::D14_D16_D18, ARM::D15_D17_D19, + }; + + // DQuadSpc_with_ssub_0 Bit set. + const uint8_t DQuadSpc_with_ssub_0Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x3f, + }; + + // DQuadSpc_with_dsub_2_then_ssub_0 Register Class... + const MCPhysReg DQuadSpc_with_dsub_2_then_ssub_0[] = { + ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17, + }; + + // DQuadSpc_with_dsub_2_then_ssub_0 Bit set. + const uint8_t DQuadSpc_with_dsub_2_then_ssub_0Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x0f, + }; + + // DQuadSpc_with_dsub_4_then_ssub_0 Register Class... + const MCPhysReg DQuadSpc_with_dsub_4_then_ssub_0[] = { + ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, + }; + + // DQuadSpc_with_dsub_4_then_ssub_0 Bit set. + const uint8_t DQuadSpc_with_dsub_4_then_ssub_0Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x03, + }; + + // DQuadSpc_with_dsub_0_in_DPR_8 Register Class... + const MCPhysReg DQuadSpc_with_dsub_0_in_DPR_8[] = { + ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, + }; + + // DQuadSpc_with_dsub_0_in_DPR_8 Bit set. + const uint8_t DQuadSpc_with_dsub_0_in_DPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x3f, + }; + + // DQuadSpc_with_dsub_2_in_DPR_8 Register Class... + const MCPhysReg DQuadSpc_with_dsub_2_in_DPR_8[] = { + ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, + }; + + // DQuadSpc_with_dsub_2_in_DPR_8 Bit set. + const uint8_t DQuadSpc_with_dsub_2_in_DPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x0f, + }; + + // DQuadSpc_with_dsub_4_in_DPR_8 Register Class... + const MCPhysReg DQuadSpc_with_dsub_4_in_DPR_8[] = { + ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, + }; + + // DQuadSpc_with_dsub_4_in_DPR_8 Bit set. + const uint8_t DQuadSpc_with_dsub_4_in_DPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x03, + }; + + // DQuad Register Class... + const MCPhysReg DQuad[] = { + ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7, ARM::D13_D14_D15_D16, ARM::Q7_Q8, ARM::D15_D16_D17_D18, ARM::Q8_Q9, ARM::D17_D18_D19_D20, ARM::Q9_Q10, ARM::D19_D20_D21_D22, ARM::Q10_Q11, ARM::D21_D22_D23_D24, ARM::Q11_Q12, ARM::D23_D24_D25_D26, ARM::Q12_Q13, ARM::D25_D26_D27_D28, ARM::Q13_Q14, ARM::D27_D28_D29_D30, ARM::Q14_Q15, + }; + + // DQuad Bit set. + const uint8_t DQuadBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x01, + }; + + // DQuad_with_ssub_0 Register Class... + const MCPhysReg DQuad_with_ssub_0[] = { + ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7, ARM::D13_D14_D15_D16, ARM::Q7_Q8, ARM::D15_D16_D17_D18, + }; + + // DQuad_with_ssub_0 Bit set. + const uint8_t DQuad_with_ssub_0Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x07, + }; + + // DQuad_with_ssub_2 Register Class... + const MCPhysReg DQuad_with_ssub_2[] = { + ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7, ARM::D13_D14_D15_D16, ARM::Q7_Q8, + }; + + // DQuad_with_ssub_2 Bit set. + const uint8_t DQuad_with_ssub_2Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, + }; + + // QQPR Register Class... + const MCPhysReg QQPR[] = { + ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7, ARM::Q7_Q8, ARM::Q8_Q9, ARM::Q9_Q10, ARM::Q10_Q11, ARM::Q11_Q12, ARM::Q12_Q13, ARM::Q13_Q14, ARM::Q14_Q15, + }; + + // QQPR Bit set. + const uint8_t QQPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x0f, + }; + + // DQuad_with_dsub_1_dsub_2_in_QPR Register Class... + const MCPhysReg DQuad_with_dsub_1_dsub_2_in_QPR[] = { + ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8, ARM::D7_D8_D9_D10, ARM::D9_D10_D11_D12, ARM::D11_D12_D13_D14, ARM::D13_D14_D15_D16, ARM::D15_D16_D17_D18, ARM::D17_D18_D19_D20, ARM::D19_D20_D21_D22, ARM::D21_D22_D23_D24, ARM::D23_D24_D25_D26, ARM::D25_D26_D27_D28, ARM::D27_D28_D29_D30, + }; + + // DQuad_with_dsub_1_dsub_2_in_QPR Bit set. + const uint8_t DQuad_with_dsub_1_dsub_2_in_QPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x01, + }; + + // DQuad_with_dsub_2_then_ssub_0 Register Class... + const MCPhysReg DQuad_with_dsub_2_then_ssub_0[] = { + ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7, ARM::D13_D14_D15_D16, + }; + + // DQuad_with_dsub_2_then_ssub_0 Bit set. + const uint8_t DQuad_with_dsub_2_then_ssub_0Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, + }; + + // DQuad_with_dsub_3_then_ssub_0 Register Class... + const MCPhysReg DQuad_with_dsub_3_then_ssub_0[] = { + ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7, + }; + + // DQuad_with_dsub_3_then_ssub_0 Bit set. + const uint8_t DQuad_with_dsub_3_then_ssub_0Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x01, + }; + + // DQuad_with_dsub_0_in_DPR_8 Register Class... + const MCPhysReg DQuad_with_dsub_0_in_DPR_8[] = { + ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, + }; + + // DQuad_with_dsub_0_in_DPR_8 Bit set. + const uint8_t DQuad_with_dsub_0_in_DPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, + }; + + // DQuad_with_qsub_0_in_QPR_VFP2 Register Class... + const MCPhysReg DQuad_with_qsub_0_in_QPR_VFP2[] = { + ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7, ARM::Q7_Q8, + }; + + // DQuad_with_qsub_0_in_QPR_VFP2 Bit set. + const uint8_t DQuad_with_qsub_0_in_QPR_VFP2Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x1f, + }; + + // DQuad_with_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPR Register Class... + const MCPhysReg DQuad_with_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPR[] = { + ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8, ARM::D7_D8_D9_D10, ARM::D9_D10_D11_D12, ARM::D11_D12_D13_D14, ARM::D13_D14_D15_D16, ARM::D15_D16_D17_D18, + }; + + // DQuad_with_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPR Bit set. + const uint8_t DQuad_with_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x07, + }; + + // DQuad_with_dsub_1_dsub_2_in_QPR_VFP2 Register Class... + const MCPhysReg DQuad_with_dsub_1_dsub_2_in_QPR_VFP2[] = { + ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8, ARM::D7_D8_D9_D10, ARM::D9_D10_D11_D12, ARM::D11_D12_D13_D14, ARM::D13_D14_D15_D16, + }; + + // DQuad_with_dsub_1_dsub_2_in_QPR_VFP2 Bit set. + const uint8_t DQuad_with_dsub_1_dsub_2_in_QPR_VFP2Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, + }; + + // DQuad_with_dsub_1_in_DPR_8 Register Class... + const MCPhysReg DQuad_with_dsub_1_in_DPR_8[] = { + ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, + }; + + // DQuad_with_dsub_1_in_DPR_8 Bit set. + const uint8_t DQuad_with_dsub_1_in_DPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, + }; + + // DQuad_with_qsub_1_in_QPR_VFP2 Register Class... + const MCPhysReg DQuad_with_qsub_1_in_QPR_VFP2[] = { + ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7, + }; + + // DQuad_with_qsub_1_in_QPR_VFP2 Bit set. + const uint8_t DQuad_with_qsub_1_in_QPR_VFP2Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x0f, + }; + + // DQuad_with_dsub_2_in_DPR_8 Register Class... + const MCPhysReg DQuad_with_dsub_2_in_DPR_8[] = { + ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, + }; + + // DQuad_with_dsub_2_in_DPR_8 Bit set. + const uint8_t DQuad_with_dsub_2_in_DPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, + }; + + // DQuad_with_dsub_3_then_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPR Register Class... + const MCPhysReg DQuad_with_dsub_3_then_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPR[] = { + ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8, ARM::D7_D8_D9_D10, ARM::D9_D10_D11_D12, ARM::D11_D12_D13_D14, + }; + + // DQuad_with_dsub_3_then_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPR Bit set. + const uint8_t DQuad_with_dsub_3_then_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x01, + }; + + // DQuad_with_dsub_3_in_DPR_8 Register Class... + const MCPhysReg DQuad_with_dsub_3_in_DPR_8[] = { + ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, + }; + + // DQuad_with_dsub_3_in_DPR_8 Bit set. + const uint8_t DQuad_with_dsub_3_in_DPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, + }; + + // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPR Register Class... + const MCPhysReg DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPR[] = { + ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8, ARM::D7_D8_D9_D10, + }; + + // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPR Bit set. + const uint8_t DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, + }; + + // DQuad_with_qsub_0_in_QPR_8 Register Class... + const MCPhysReg DQuad_with_qsub_0_in_QPR_8[] = { + ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, + }; + + // DQuad_with_qsub_0_in_QPR_8 Bit set. + const uint8_t DQuad_with_qsub_0_in_QPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x01, + }; + + // DQuad_with_dsub_1_dsub_2_in_QPR_8 Register Class... + const MCPhysReg DQuad_with_dsub_1_dsub_2_in_QPR_8[] = { + ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8, + }; + + // DQuad_with_dsub_1_dsub_2_in_QPR_8 Bit set. + const uint8_t DQuad_with_dsub_1_dsub_2_in_QPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, + }; + + // DQuad_with_qsub_1_in_QPR_8 Register Class... + const MCPhysReg DQuad_with_qsub_1_in_QPR_8[] = { + ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, + }; + + // DQuad_with_qsub_1_in_QPR_8 Bit set. + const uint8_t DQuad_with_qsub_1_in_QPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, + }; + + // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPR Register Class... + const MCPhysReg DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPR[] = { + ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, + }; + + // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPR Bit set. + const uint8_t DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, + }; + + // QQQQPR Register Class... + const MCPhysReg QQQQPR[] = { + ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, ARM::Q6_Q7_Q8_Q9, ARM::Q7_Q8_Q9_Q10, ARM::Q8_Q9_Q10_Q11, ARM::Q9_Q10_Q11_Q12, ARM::Q10_Q11_Q12_Q13, ARM::Q11_Q12_Q13_Q14, ARM::Q12_Q13_Q14_Q15, + }; + + // QQQQPR Bit set. + const uint8_t QQQQPRBits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01, + }; + + // QQQQPR_with_ssub_0 Register Class... + const MCPhysReg QQQQPR_with_ssub_0[] = { + ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, ARM::Q6_Q7_Q8_Q9, ARM::Q7_Q8_Q9_Q10, + }; + + // QQQQPR_with_ssub_0 Bit set. + const uint8_t QQQQPR_with_ssub_0Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, + }; + + // QQQQPR_with_dsub_2_then_ssub_0 Register Class... + const MCPhysReg QQQQPR_with_dsub_2_then_ssub_0[] = { + ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, ARM::Q6_Q7_Q8_Q9, + }; + + // QQQQPR_with_dsub_2_then_ssub_0 Bit set. + const uint8_t QQQQPR_with_dsub_2_then_ssub_0Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x07, + }; + + // QQQQPR_with_dsub_5_then_ssub_0 Register Class... + const MCPhysReg QQQQPR_with_dsub_5_then_ssub_0[] = { + ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, + }; + + // QQQQPR_with_dsub_5_then_ssub_0 Bit set. + const uint8_t QQQQPR_with_dsub_5_then_ssub_0Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x03, + }; + + // QQQQPR_with_dsub_7_then_ssub_0 Register Class... + const MCPhysReg QQQQPR_with_dsub_7_then_ssub_0[] = { + ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, + }; + + // QQQQPR_with_dsub_7_then_ssub_0 Bit set. + const uint8_t QQQQPR_with_dsub_7_then_ssub_0Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x01, + }; + + // QQQQPR_with_dsub_0_in_DPR_8 Register Class... + const MCPhysReg QQQQPR_with_dsub_0_in_DPR_8[] = { + ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, + }; + + // QQQQPR_with_dsub_0_in_DPR_8 Bit set. + const uint8_t QQQQPR_with_dsub_0_in_DPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, + }; + + // QQQQPR_with_dsub_2_in_DPR_8 Register Class... + const MCPhysReg QQQQPR_with_dsub_2_in_DPR_8[] = { + ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, + }; + + // QQQQPR_with_dsub_2_in_DPR_8 Bit set. + const uint8_t QQQQPR_with_dsub_2_in_DPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, + }; + + // QQQQPR_with_dsub_4_in_DPR_8 Register Class... + const MCPhysReg QQQQPR_with_dsub_4_in_DPR_8[] = { + ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, + }; + + // QQQQPR_with_dsub_4_in_DPR_8 Bit set. + const uint8_t QQQQPR_with_dsub_4_in_DPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, + }; + + // QQQQPR_with_dsub_6_in_DPR_8 Register Class... + const MCPhysReg QQQQPR_with_dsub_6_in_DPR_8[] = { + ARM::Q0_Q1_Q2_Q3, + }; + + // QQQQPR_with_dsub_6_in_DPR_8 Bit set. + const uint8_t QQQQPR_with_dsub_6_in_DPR_8Bits[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, + }; + +} + +extern const char ARMRegClassStrings[] = { + /* 0 */ 'Q', 'Q', 'Q', 'Q', 'P', 'R', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '0', 0, + /* 19 */ 'D', 'Q', 'u', 'a', 'd', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '0', 0, + /* 40 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '0', 0, + /* 63 */ 'D', 'P', 'a', 'i', 'r', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '0', 0, + /* 84 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '0', 0, + /* 102 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '0', 0, + /* 122 */ 'D', 'P', 'a', 'i', 'r', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '0', 0, + /* 140 */ 'Q', 'Q', 'Q', 'Q', 'P', 'R', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '2', '_', 't', 'h', 'e', 'n', '_', 's', 's', 'u', 'b', '_', '0', 0, + /* 171 */ 'D', 'Q', 'u', 'a', 'd', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '2', '_', 't', 'h', 'e', 'n', '_', 's', 's', 'u', 'b', '_', '0', 0, + /* 204 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '2', '_', 't', 'h', 'e', 'n', '_', 's', 's', 'u', 'b', '_', '0', 0, + /* 239 */ 'D', 'P', 'a', 'i', 'r', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '2', '_', 't', 'h', 'e', 'n', '_', 's', 's', 'u', 'b', '_', '0', 0, + /* 272 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '2', '_', 't', 'h', 'e', 'n', '_', 's', 's', 'u', 'b', '_', '0', 0, + /* 302 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '2', '_', 't', 'h', 'e', 'n', '_', 's', 's', 'u', 'b', '_', '0', 0, + /* 334 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '3', '_', 't', 'h', 'e', 'n', '_', 's', 's', 'u', 'b', '_', '0', 0, + /* 364 */ 'D', 'Q', 'u', 'a', 'd', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '4', '_', 't', 'h', 'e', 'n', '_', 's', 's', 'u', 'b', '_', '0', 0, + /* 397 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '4', '_', 't', 'h', 'e', 'n', '_', 's', 's', 'u', 'b', '_', '0', 0, + /* 432 */ 'Q', 'Q', 'Q', 'Q', 'P', 'R', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '5', '_', 't', 'h', 'e', 'n', '_', 's', 's', 'u', 'b', '_', '0', 0, + /* 463 */ 'Q', 'Q', 'Q', 'Q', 'P', 'R', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '7', '_', 't', 'h', 'e', 'n', '_', 's', 's', 'u', 'b', '_', '0', 0, + /* 494 */ 'D', 'P', 'R', '_', 'V', 'F', 'P', '2', 0, + /* 503 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'Q', 'P', 'R', '_', 'V', 'F', 'P', '2', 0, + /* 533 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'Q', 'P', 'R', '_', 'V', 'F', 'P', '2', 0, + /* 565 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '_', '1', '_', 'i', 'n', '_', 'Q', 'P', 'R', '_', 'V', 'F', 'P', '2', 0, + /* 595 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '1', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'Q', 'P', 'R', '_', 'V', 'F', 'P', '2', 0, + /* 632 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '1', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'Q', 'P', 'R', '_', 'V', 'F', 'P', '2', 0, + /* 671 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '2', 0, + /* 689 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '2', 0, + /* 709 */ 'D', 'P', 'a', 'i', 'r', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '2', 0, + /* 727 */ 'Q', 'Q', 'Q', 'Q', 'P', 'R', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, + /* 755 */ 'D', 'Q', 'u', 'a', 'd', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, + /* 785 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, + /* 817 */ 'D', 'P', 'a', 'i', 'r', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, + /* 847 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, + /* 874 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, + /* 903 */ 'D', 'P', 'a', 'i', 'r', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, + /* 930 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '1', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, + /* 957 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '1', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, + /* 986 */ 'D', 'P', 'a', 'i', 'r', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '1', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, + /* 1013 */ 'Q', 'Q', 'Q', 'Q', 'P', 'R', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, + /* 1041 */ 'D', 'Q', 'u', 'a', 'd', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, + /* 1071 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, + /* 1103 */ 'D', 'P', 'a', 'i', 'r', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, + /* 1133 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, + /* 1160 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, + /* 1189 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '3', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, + /* 1216 */ 'Q', 'Q', 'Q', 'Q', 'P', 'R', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '4', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, + /* 1244 */ 'D', 'Q', 'u', 'a', 'd', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '4', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, + /* 1274 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '4', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, + /* 1306 */ 'Q', 'Q', 'Q', 'Q', 'P', 'R', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '6', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, + /* 1334 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'Q', 'P', 'R', '_', '8', 0, + /* 1361 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'Q', 'P', 'R', '_', '8', 0, + /* 1390 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '_', '1', '_', 'i', 'n', '_', 'Q', 'P', 'R', '_', '8', 0, + /* 1417 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '1', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'Q', 'P', 'R', '_', '8', 0, + /* 1451 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '1', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'Q', 'P', 'R', '_', '8', 0, + /* 1487 */ 'S', 'P', 'R', '_', '8', 0, + /* 1493 */ 'C', 'C', 'R', 0, + /* 1497 */ 'D', 'P', 'R', 0, + /* 1501 */ 'h', 'G', 'P', 'R', '_', 'a', 'n', 'd', '_', 't', 'c', 'G', 'P', 'R', 0, + /* 1516 */ 't', 'G', 'P', 'R', '_', 'a', 'n', 'd', '_', 't', 'c', 'G', 'P', 'R', 0, + /* 1531 */ 'G', 'P', 'R', 'P', 'a', 'i', 'r', '_', 'w', 'i', 't', 'h', '_', 'g', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 't', 'c', 'G', 'P', 'R', 0, + /* 1560 */ 'G', 'P', 'R', 'P', 'a', 'i', 'r', '_', 'w', 'i', 't', 'h', '_', 'g', 's', 'u', 'b', '_', '1', '_', 'i', 'n', '_', 't', 'c', 'G', 'P', 'R', 0, + /* 1589 */ 'G', 'P', 'R', 'n', 'o', 'p', 'c', '_', 'a', 'n', 'd', '_', 'h', 'G', 'P', 'R', 0, + /* 1606 */ 'G', 'P', 'R', 'P', 'a', 'i', 'r', '_', 'w', 'i', 't', 'h', '_', 'g', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'h', 'G', 'P', 'R', 0, + /* 1634 */ 'G', 'P', 'R', 'P', 'a', 'i', 'r', '_', 'w', 'i', 't', 'h', '_', 'g', 's', 'u', 'b', '_', '1', '_', 'i', 'n', '_', 'h', 'G', 'P', 'R', '_', 'a', 'n', 'd', '_', 'r', 'G', 'P', 'R', 0, + /* 1671 */ 'G', 'P', 'R', 'P', 'a', 'i', 'r', '_', 'w', 'i', 't', 'h', '_', 'g', 's', 'u', 'b', '_', '1', '_', 'i', 'n', '_', 'r', 'G', 'P', 'R', 0, + /* 1699 */ 'G', 'P', 'R', 'P', 'a', 'i', 'r', '_', 'w', 'i', 't', 'h', '_', 'g', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 't', 'G', 'P', 'R', 0, + /* 1727 */ 'Q', 'Q', 'Q', 'Q', 'P', 'R', 0, + /* 1734 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '2', '_', 't', 'h', 'e', 'n', '_', 's', 's', 'u', 'b', '_', '0', '_', 'a', 'n', 'd', '_', 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'Q', 'P', 'R', 0, + /* 1797 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', '_', 'a', 'n', 'd', '_', 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'Q', 'P', 'R', 0, + /* 1857 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '0', '_', 'a', 'n', 'd', '_', 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '1', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'Q', 'P', 'R', 0, + /* 1911 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '3', '_', 't', 'h', 'e', 'n', '_', 's', 's', 'u', 'b', '_', '0', '_', 'a', 'n', 'd', '_', 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '1', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'Q', 'P', 'R', 0, + /* 1977 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', '_', 'a', 'n', 'd', '_', 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '1', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'Q', 'P', 'R', 0, + /* 2040 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '3', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', '_', 'a', 'n', 'd', '_', 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '1', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'Q', 'P', 'R', 0, + /* 2103 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '0', '_', 'a', 'n', 'd', '_', 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '1', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'Q', 'P', 'R', 0, + /* 2161 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', '_', 'a', 'n', 'd', '_', 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '1', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'Q', 'P', 'R', 0, + /* 2228 */ 'S', 'P', 'R', 0, + /* 2232 */ 'G', 'P', 'R', 'w', 'i', 't', 'h', 'A', 'P', 'S', 'R', 0, + /* 2244 */ 'D', 'Q', 'u', 'a', 'd', 'S', 'p', 'c', 0, + /* 2253 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', 'S', 'p', 'c', 0, + /* 2264 */ 'D', 'P', 'a', 'i', 'r', 'S', 'p', 'c', 0, + /* 2273 */ 'G', 'P', 'R', 'n', 'o', 'p', 'c', 0, + /* 2281 */ 'D', 'Q', 'u', 'a', 'd', 0, + /* 2287 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', 0, + /* 2295 */ 'G', 'P', 'R', 'P', 'a', 'i', 'r', '_', 'w', 'i', 't', 'h', '_', 'g', 's', 'u', 'b', '_', '1', '_', 'i', 'n', '_', 'G', 'P', 'R', 's', 'p', 0, + /* 2324 */ 'D', 'P', 'a', 'i', 'r', 0, + /* 2330 */ 'G', 'P', 'R', 'P', 'a', 'i', 'r', 0, +}; + +extern const MCRegisterClass ARMMCRegisterClasses[] = { + { SPR, SPRBits, 2228, 32, sizeof(SPRBits), ARM::SPRRegClassID, 4, 4, 1, 1 }, + { GPR, GPRBits, 1512, 16, sizeof(GPRBits), ARM::GPRRegClassID, 4, 4, 1, 1 }, + { GPRwithAPSR, GPRwithAPSRBits, 2232, 16, sizeof(GPRwithAPSRBits), ARM::GPRwithAPSRRegClassID, 4, 4, 1, 1 }, + { SPR_8, SPR_8Bits, 1487, 16, sizeof(SPR_8Bits), ARM::SPR_8RegClassID, 4, 4, 1, 1 }, + { GPRnopc, GPRnopcBits, 2273, 15, sizeof(GPRnopcBits), ARM::GPRnopcRegClassID, 4, 4, 1, 1 }, + { rGPR, rGPRBits, 1666, 14, sizeof(rGPRBits), ARM::rGPRRegClassID, 4, 4, 1, 1 }, + { hGPR, hGPRBits, 1601, 8, sizeof(hGPRBits), ARM::hGPRRegClassID, 4, 4, 1, 1 }, + { tGPR, tGPRBits, 1722, 8, sizeof(tGPRBits), ARM::tGPRRegClassID, 4, 4, 1, 1 }, + { GPRnopc_and_hGPR, GPRnopc_and_hGPRBits, 1589, 7, sizeof(GPRnopc_and_hGPRBits), ARM::GPRnopc_and_hGPRRegClassID, 4, 4, 1, 1 }, + { hGPR_and_rGPR, hGPR_and_rGPRBits, 1657, 6, sizeof(hGPR_and_rGPRBits), ARM::hGPR_and_rGPRRegClassID, 4, 4, 1, 1 }, + { tcGPR, tcGPRBits, 1510, 5, sizeof(tcGPRBits), ARM::tcGPRRegClassID, 4, 4, 1, 1 }, + { tGPR_and_tcGPR, tGPR_and_tcGPRBits, 1516, 4, sizeof(tGPR_and_tcGPRBits), ARM::tGPR_and_tcGPRRegClassID, 4, 4, 1, 1 }, + { CCR, CCRBits, 1493, 1, sizeof(CCRBits), ARM::CCRRegClassID, 4, 4, -1, 0 }, + { GPRsp, GPRspBits, 2318, 1, sizeof(GPRspBits), ARM::GPRspRegClassID, 4, 4, 1, 1 }, + { hGPR_and_tcGPR, hGPR_and_tcGPRBits, 1501, 1, sizeof(hGPR_and_tcGPRBits), ARM::hGPR_and_tcGPRRegClassID, 4, 4, 1, 1 }, + { DPR, DPRBits, 1497, 32, sizeof(DPRBits), ARM::DPRRegClassID, 8, 8, 1, 1 }, + { DPR_VFP2, DPR_VFP2Bits, 494, 16, sizeof(DPR_VFP2Bits), ARM::DPR_VFP2RegClassID, 8, 8, 1, 1 }, + { DPR_8, DPR_8Bits, 749, 8, sizeof(DPR_8Bits), ARM::DPR_8RegClassID, 8, 8, 1, 1 }, + { GPRPair, GPRPairBits, 2330, 7, sizeof(GPRPairBits), ARM::GPRPairRegClassID, 8, 8, 1, 1 }, + { GPRPair_with_gsub_1_in_rGPR, GPRPair_with_gsub_1_in_rGPRBits, 1671, 6, sizeof(GPRPair_with_gsub_1_in_rGPRBits), ARM::GPRPair_with_gsub_1_in_rGPRRegClassID, 8, 8, 1, 1 }, + { GPRPair_with_gsub_0_in_tGPR, GPRPair_with_gsub_0_in_tGPRBits, 1699, 4, sizeof(GPRPair_with_gsub_0_in_tGPRBits), ARM::GPRPair_with_gsub_0_in_tGPRRegClassID, 8, 8, 1, 1 }, + { GPRPair_with_gsub_0_in_hGPR, GPRPair_with_gsub_0_in_hGPRBits, 1606, 3, sizeof(GPRPair_with_gsub_0_in_hGPRBits), ARM::GPRPair_with_gsub_0_in_hGPRRegClassID, 8, 8, 1, 1 }, + { GPRPair_with_gsub_0_in_tcGPR, GPRPair_with_gsub_0_in_tcGPRBits, 1531, 3, sizeof(GPRPair_with_gsub_0_in_tcGPRBits), ARM::GPRPair_with_gsub_0_in_tcGPRRegClassID, 8, 8, 1, 1 }, + { GPRPair_with_gsub_1_in_hGPR_and_rGPR, GPRPair_with_gsub_1_in_hGPR_and_rGPRBits, 1634, 2, sizeof(GPRPair_with_gsub_1_in_hGPR_and_rGPRBits), ARM::GPRPair_with_gsub_1_in_hGPR_and_rGPRRegClassID, 8, 8, 1, 1 }, + { GPRPair_with_gsub_1_in_tcGPR, GPRPair_with_gsub_1_in_tcGPRBits, 1560, 2, sizeof(GPRPair_with_gsub_1_in_tcGPRBits), ARM::GPRPair_with_gsub_1_in_tcGPRRegClassID, 8, 8, 1, 1 }, + { GPRPair_with_gsub_1_in_GPRsp, GPRPair_with_gsub_1_in_GPRspBits, 2295, 1, sizeof(GPRPair_with_gsub_1_in_GPRspBits), ARM::GPRPair_with_gsub_1_in_GPRspRegClassID, 8, 8, 1, 1 }, + { DPairSpc, DPairSpcBits, 2264, 30, sizeof(DPairSpcBits), ARM::DPairSpcRegClassID, 16, 8, 1, 1 }, + { DPairSpc_with_ssub_0, DPairSpc_with_ssub_0Bits, 63, 16, sizeof(DPairSpc_with_ssub_0Bits), ARM::DPairSpc_with_ssub_0RegClassID, 16, 8, 1, 1 }, + { DPairSpc_with_dsub_2_then_ssub_0, DPairSpc_with_dsub_2_then_ssub_0Bits, 239, 14, sizeof(DPairSpc_with_dsub_2_then_ssub_0Bits), ARM::DPairSpc_with_dsub_2_then_ssub_0RegClassID, 16, 8, 1, 1 }, + { DPairSpc_with_dsub_0_in_DPR_8, DPairSpc_with_dsub_0_in_DPR_8Bits, 817, 8, sizeof(DPairSpc_with_dsub_0_in_DPR_8Bits), ARM::DPairSpc_with_dsub_0_in_DPR_8RegClassID, 16, 8, 1, 1 }, + { DPairSpc_with_dsub_2_in_DPR_8, DPairSpc_with_dsub_2_in_DPR_8Bits, 1103, 6, sizeof(DPairSpc_with_dsub_2_in_DPR_8Bits), ARM::DPairSpc_with_dsub_2_in_DPR_8RegClassID, 16, 8, 1, 1 }, + { DPair, DPairBits, 2324, 31, sizeof(DPairBits), ARM::DPairRegClassID, 16, 16, 1, 1 }, + { DPair_with_ssub_0, DPair_with_ssub_0Bits, 122, 16, sizeof(DPair_with_ssub_0Bits), ARM::DPair_with_ssub_0RegClassID, 16, 16, 1, 1 }, + { QPR, QPRBits, 1730, 16, sizeof(QPRBits), ARM::QPRRegClassID, 16, 16, 1, 1 }, + { DPair_with_ssub_2, DPair_with_ssub_2Bits, 709, 15, sizeof(DPair_with_ssub_2Bits), ARM::DPair_with_ssub_2RegClassID, 16, 16, 1, 1 }, + { DPair_with_dsub_0_in_DPR_8, DPair_with_dsub_0_in_DPR_8Bits, 903, 8, sizeof(DPair_with_dsub_0_in_DPR_8Bits), ARM::DPair_with_dsub_0_in_DPR_8RegClassID, 16, 16, 1, 1 }, + { QPR_VFP2, QPR_VFP2Bits, 524, 8, sizeof(QPR_VFP2Bits), ARM::QPR_VFP2RegClassID, 16, 16, 1, 1 }, + { DPair_with_dsub_1_in_DPR_8, DPair_with_dsub_1_in_DPR_8Bits, 986, 7, sizeof(DPair_with_dsub_1_in_DPR_8Bits), ARM::DPair_with_dsub_1_in_DPR_8RegClassID, 16, 16, 1, 1 }, + { QPR_8, QPR_8Bits, 1355, 4, sizeof(QPR_8Bits), ARM::QPR_8RegClassID, 16, 16, 1, 1 }, + { DTriple, DTripleBits, 2287, 30, sizeof(DTripleBits), ARM::DTripleRegClassID, 24, 8, 1, 1 }, + { DTripleSpc, DTripleSpcBits, 2253, 28, sizeof(DTripleSpcBits), ARM::DTripleSpcRegClassID, 24, 8, 1, 1 }, + { DTripleSpc_with_ssub_0, DTripleSpc_with_ssub_0Bits, 40, 16, sizeof(DTripleSpc_with_ssub_0Bits), ARM::DTripleSpc_with_ssub_0RegClassID, 24, 8, 1, 1 }, + { DTriple_with_ssub_0, DTriple_with_ssub_0Bits, 102, 16, sizeof(DTriple_with_ssub_0Bits), ARM::DTriple_with_ssub_0RegClassID, 24, 8, 1, 1 }, + { DTriple_with_dsub_1_dsub_2_in_QPR, DTriple_with_dsub_1_dsub_2_in_QPRBits, 2127, 15, sizeof(DTriple_with_dsub_1_dsub_2_in_QPRBits), ARM::DTriple_with_dsub_1_dsub_2_in_QPRRegClassID, 24, 8, 1, 1 }, + { DTriple_with_qsub_0_in_QPR, DTriple_with_qsub_0_in_QPRBits, 1770, 15, sizeof(DTriple_with_qsub_0_in_QPRBits), ARM::DTriple_with_qsub_0_in_QPRRegClassID, 24, 8, 1, 1 }, + { DTriple_with_ssub_2, DTriple_with_ssub_2Bits, 689, 15, sizeof(DTriple_with_ssub_2Bits), ARM::DTriple_with_ssub_2RegClassID, 24, 8, 1, 1 }, + { DTripleSpc_with_dsub_2_then_ssub_0, DTripleSpc_with_dsub_2_then_ssub_0Bits, 204, 14, sizeof(DTripleSpc_with_dsub_2_then_ssub_0Bits), ARM::DTripleSpc_with_dsub_2_then_ssub_0RegClassID, 24, 8, 1, 1 }, + { DTriple_with_dsub_2_then_ssub_0, DTriple_with_dsub_2_then_ssub_0Bits, 302, 14, sizeof(DTriple_with_dsub_2_then_ssub_0Bits), ARM::DTriple_with_dsub_2_then_ssub_0RegClassID, 24, 8, 1, 1 }, + { DTripleSpc_with_dsub_4_then_ssub_0, DTripleSpc_with_dsub_4_then_ssub_0Bits, 397, 12, sizeof(DTripleSpc_with_dsub_4_then_ssub_0Bits), ARM::DTripleSpc_with_dsub_4_then_ssub_0RegClassID, 24, 8, 1, 1 }, + { DTripleSpc_with_dsub_0_in_DPR_8, DTripleSpc_with_dsub_0_in_DPR_8Bits, 785, 8, sizeof(DTripleSpc_with_dsub_0_in_DPR_8Bits), ARM::DTripleSpc_with_dsub_0_in_DPR_8RegClassID, 24, 8, 1, 1 }, + { DTriple_with_dsub_0_in_DPR_8, DTriple_with_dsub_0_in_DPR_8Bits, 874, 8, sizeof(DTriple_with_dsub_0_in_DPR_8Bits), ARM::DTriple_with_dsub_0_in_DPR_8RegClassID, 24, 8, 1, 1 }, + { DTriple_with_qsub_0_in_QPR_VFP2, DTriple_with_qsub_0_in_QPR_VFP2Bits, 533, 8, sizeof(DTriple_with_qsub_0_in_QPR_VFP2Bits), ARM::DTriple_with_qsub_0_in_QPR_VFP2RegClassID, 24, 8, 1, 1 }, + { DTriple_with_ssub_0_and_DTriple_with_dsub_1_dsub_2_in_QPR, DTriple_with_ssub_0_and_DTriple_with_dsub_1_dsub_2_in_QPRBits, 2103, 8, sizeof(DTriple_with_ssub_0_and_DTriple_with_dsub_1_dsub_2_in_QPRBits), ARM::DTriple_with_ssub_0_and_DTriple_with_dsub_1_dsub_2_in_QPRRegClassID, 24, 8, 1, 1 }, + { DTriple_with_dsub_1_dsub_2_in_QPR_VFP2, DTriple_with_dsub_1_dsub_2_in_QPR_VFP2Bits, 632, 7, sizeof(DTriple_with_dsub_1_dsub_2_in_QPR_VFP2Bits), ARM::DTriple_with_dsub_1_dsub_2_in_QPR_VFP2RegClassID, 24, 8, 1, 1 }, + { DTriple_with_dsub_1_in_DPR_8, DTriple_with_dsub_1_in_DPR_8Bits, 957, 7, sizeof(DTriple_with_dsub_1_in_DPR_8Bits), ARM::DTriple_with_dsub_1_in_DPR_8RegClassID, 24, 8, 1, 1 }, + { DTriple_with_dsub_2_then_ssub_0_and_DTriple_with_qsub_0_in_QPR, DTriple_with_dsub_2_then_ssub_0_and_DTriple_with_qsub_0_in_QPRBits, 1734, 7, sizeof(DTriple_with_dsub_2_then_ssub_0_and_DTriple_with_qsub_0_in_QPRBits), ARM::DTriple_with_dsub_2_then_ssub_0_and_DTriple_with_qsub_0_in_QPRRegClassID, 24, 8, 1, 1 }, + { DTripleSpc_with_dsub_2_in_DPR_8, DTripleSpc_with_dsub_2_in_DPR_8Bits, 1071, 6, sizeof(DTripleSpc_with_dsub_2_in_DPR_8Bits), ARM::DTripleSpc_with_dsub_2_in_DPR_8RegClassID, 24, 8, 1, 1 }, + { DTriple_with_dsub_2_in_DPR_8, DTriple_with_dsub_2_in_DPR_8Bits, 1160, 6, sizeof(DTriple_with_dsub_2_in_DPR_8Bits), ARM::DTriple_with_dsub_2_in_DPR_8RegClassID, 24, 8, 1, 1 }, + { DTripleSpc_with_dsub_4_in_DPR_8, DTripleSpc_with_dsub_4_in_DPR_8Bits, 1274, 4, sizeof(DTripleSpc_with_dsub_4_in_DPR_8Bits), ARM::DTripleSpc_with_dsub_4_in_DPR_8RegClassID, 24, 8, 1, 1 }, + { DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_dsub_1_dsub_2_in_QPR, DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_dsub_1_dsub_2_in_QPRBits, 2161, 4, sizeof(DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_dsub_1_dsub_2_in_QPRBits), ARM::DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_dsub_1_dsub_2_in_QPRRegClassID, 24, 8, 1, 1 }, + { DTriple_with_qsub_0_in_QPR_8, DTriple_with_qsub_0_in_QPR_8Bits, 1361, 4, sizeof(DTriple_with_qsub_0_in_QPR_8Bits), ARM::DTriple_with_qsub_0_in_QPR_8RegClassID, 24, 8, 1, 1 }, + { DTriple_with_dsub_1_dsub_2_in_QPR_8, DTriple_with_dsub_1_dsub_2_in_QPR_8Bits, 1451, 3, sizeof(DTriple_with_dsub_1_dsub_2_in_QPR_8Bits), ARM::DTriple_with_dsub_1_dsub_2_in_QPR_8RegClassID, 24, 8, 1, 1 }, + { DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_QPR, DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_QPRBits, 1797, 3, sizeof(DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_QPRBits), ARM::DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_QPRRegClassID, 24, 8, 1, 1 }, + { DQuadSpc, DQuadSpcBits, 2244, 28, sizeof(DQuadSpcBits), ARM::DQuadSpcRegClassID, 32, 8, 1, 1 }, + { DQuadSpc_with_ssub_0, DQuadSpc_with_ssub_0Bits, 19, 16, sizeof(DQuadSpc_with_ssub_0Bits), ARM::DQuadSpc_with_ssub_0RegClassID, 32, 8, 1, 1 }, + { DQuadSpc_with_dsub_2_then_ssub_0, DQuadSpc_with_dsub_2_then_ssub_0Bits, 171, 14, sizeof(DQuadSpc_with_dsub_2_then_ssub_0Bits), ARM::DQuadSpc_with_dsub_2_then_ssub_0RegClassID, 32, 8, 1, 1 }, + { DQuadSpc_with_dsub_4_then_ssub_0, DQuadSpc_with_dsub_4_then_ssub_0Bits, 364, 12, sizeof(DQuadSpc_with_dsub_4_then_ssub_0Bits), ARM::DQuadSpc_with_dsub_4_then_ssub_0RegClassID, 32, 8, 1, 1 }, + { DQuadSpc_with_dsub_0_in_DPR_8, DQuadSpc_with_dsub_0_in_DPR_8Bits, 755, 8, sizeof(DQuadSpc_with_dsub_0_in_DPR_8Bits), ARM::DQuadSpc_with_dsub_0_in_DPR_8RegClassID, 32, 8, 1, 1 }, + { DQuadSpc_with_dsub_2_in_DPR_8, DQuadSpc_with_dsub_2_in_DPR_8Bits, 1041, 6, sizeof(DQuadSpc_with_dsub_2_in_DPR_8Bits), ARM::DQuadSpc_with_dsub_2_in_DPR_8RegClassID, 32, 8, 1, 1 }, + { DQuadSpc_with_dsub_4_in_DPR_8, DQuadSpc_with_dsub_4_in_DPR_8Bits, 1244, 4, sizeof(DQuadSpc_with_dsub_4_in_DPR_8Bits), ARM::DQuadSpc_with_dsub_4_in_DPR_8RegClassID, 32, 8, 1, 1 }, + { DQuad, DQuadBits, 2281, 29, sizeof(DQuadBits), ARM::DQuadRegClassID, 32, 32, 1, 1 }, + { DQuad_with_ssub_0, DQuad_with_ssub_0Bits, 84, 16, sizeof(DQuad_with_ssub_0Bits), ARM::DQuad_with_ssub_0RegClassID, 32, 32, 1, 1 }, + { DQuad_with_ssub_2, DQuad_with_ssub_2Bits, 671, 15, sizeof(DQuad_with_ssub_2Bits), ARM::DQuad_with_ssub_2RegClassID, 32, 32, 1, 1 }, + { QQPR, QQPRBits, 1729, 15, sizeof(QQPRBits), ARM::QQPRRegClassID, 32, 32, 1, 1 }, + { DQuad_with_dsub_1_dsub_2_in_QPR, DQuad_with_dsub_1_dsub_2_in_QPRBits, 1879, 14, sizeof(DQuad_with_dsub_1_dsub_2_in_QPRBits), ARM::DQuad_with_dsub_1_dsub_2_in_QPRRegClassID, 32, 32, 1, 1 }, + { DQuad_with_dsub_2_then_ssub_0, DQuad_with_dsub_2_then_ssub_0Bits, 272, 14, sizeof(DQuad_with_dsub_2_then_ssub_0Bits), ARM::DQuad_with_dsub_2_then_ssub_0RegClassID, 32, 32, 1, 1 }, + { DQuad_with_dsub_3_then_ssub_0, DQuad_with_dsub_3_then_ssub_0Bits, 334, 13, sizeof(DQuad_with_dsub_3_then_ssub_0Bits), ARM::DQuad_with_dsub_3_then_ssub_0RegClassID, 32, 32, 1, 1 }, + { DQuad_with_dsub_0_in_DPR_8, DQuad_with_dsub_0_in_DPR_8Bits, 847, 8, sizeof(DQuad_with_dsub_0_in_DPR_8Bits), ARM::DQuad_with_dsub_0_in_DPR_8RegClassID, 32, 32, 1, 1 }, + { DQuad_with_qsub_0_in_QPR_VFP2, DQuad_with_qsub_0_in_QPR_VFP2Bits, 503, 8, sizeof(DQuad_with_qsub_0_in_QPR_VFP2Bits), ARM::DQuad_with_qsub_0_in_QPR_VFP2RegClassID, 32, 32, 1, 1 }, + { DQuad_with_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPR, DQuad_with_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPRBits, 1857, 8, sizeof(DQuad_with_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPRBits), ARM::DQuad_with_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPRRegClassID, 32, 32, 1, 1 }, + { DQuad_with_dsub_1_dsub_2_in_QPR_VFP2, DQuad_with_dsub_1_dsub_2_in_QPR_VFP2Bits, 595, 7, sizeof(DQuad_with_dsub_1_dsub_2_in_QPR_VFP2Bits), ARM::DQuad_with_dsub_1_dsub_2_in_QPR_VFP2RegClassID, 32, 32, 1, 1 }, + { DQuad_with_dsub_1_in_DPR_8, DQuad_with_dsub_1_in_DPR_8Bits, 930, 7, sizeof(DQuad_with_dsub_1_in_DPR_8Bits), ARM::DQuad_with_dsub_1_in_DPR_8RegClassID, 32, 32, 1, 1 }, + { DQuad_with_qsub_1_in_QPR_VFP2, DQuad_with_qsub_1_in_QPR_VFP2Bits, 565, 7, sizeof(DQuad_with_qsub_1_in_QPR_VFP2Bits), ARM::DQuad_with_qsub_1_in_QPR_VFP2RegClassID, 32, 32, 1, 1 }, + { DQuad_with_dsub_2_in_DPR_8, DQuad_with_dsub_2_in_DPR_8Bits, 1133, 6, sizeof(DQuad_with_dsub_2_in_DPR_8Bits), ARM::DQuad_with_dsub_2_in_DPR_8RegClassID, 32, 32, 1, 1 }, + { DQuad_with_dsub_3_then_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPR, DQuad_with_dsub_3_then_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPRBits, 1911, 6, sizeof(DQuad_with_dsub_3_then_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPRBits), ARM::DQuad_with_dsub_3_then_ssub_0_and_DQuad_with_dsub_1_dsub_2_in_QPRRegClassID, 32, 32, 1, 1 }, + { DQuad_with_dsub_3_in_DPR_8, DQuad_with_dsub_3_in_DPR_8Bits, 1189, 5, sizeof(DQuad_with_dsub_3_in_DPR_8Bits), ARM::DQuad_with_dsub_3_in_DPR_8RegClassID, 32, 32, 1, 1 }, + { DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPR, DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPRBits, 1977, 4, sizeof(DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPRBits), ARM::DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPRRegClassID, 32, 32, 1, 1 }, + { DQuad_with_qsub_0_in_QPR_8, DQuad_with_qsub_0_in_QPR_8Bits, 1334, 4, sizeof(DQuad_with_qsub_0_in_QPR_8Bits), ARM::DQuad_with_qsub_0_in_QPR_8RegClassID, 32, 32, 1, 1 }, + { DQuad_with_dsub_1_dsub_2_in_QPR_8, DQuad_with_dsub_1_dsub_2_in_QPR_8Bits, 1417, 3, sizeof(DQuad_with_dsub_1_dsub_2_in_QPR_8Bits), ARM::DQuad_with_dsub_1_dsub_2_in_QPR_8RegClassID, 32, 32, 1, 1 }, + { DQuad_with_qsub_1_in_QPR_8, DQuad_with_qsub_1_in_QPR_8Bits, 1390, 3, sizeof(DQuad_with_qsub_1_in_QPR_8Bits), ARM::DQuad_with_qsub_1_in_QPR_8RegClassID, 32, 32, 1, 1 }, + { DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPR, DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPRBits, 2040, 2, sizeof(DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPRBits), ARM::DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_dsub_1_dsub_2_in_QPRRegClassID, 32, 32, 1, 1 }, + { QQQQPR, QQQQPRBits, 1727, 13, sizeof(QQQQPRBits), ARM::QQQQPRRegClassID, 64, 32, 1, 1 }, + { QQQQPR_with_ssub_0, QQQQPR_with_ssub_0Bits, 0, 8, sizeof(QQQQPR_with_ssub_0Bits), ARM::QQQQPR_with_ssub_0RegClassID, 64, 32, 1, 1 }, + { QQQQPR_with_dsub_2_then_ssub_0, QQQQPR_with_dsub_2_then_ssub_0Bits, 140, 7, sizeof(QQQQPR_with_dsub_2_then_ssub_0Bits), ARM::QQQQPR_with_dsub_2_then_ssub_0RegClassID, 64, 32, 1, 1 }, + { QQQQPR_with_dsub_5_then_ssub_0, QQQQPR_with_dsub_5_then_ssub_0Bits, 432, 6, sizeof(QQQQPR_with_dsub_5_then_ssub_0Bits), ARM::QQQQPR_with_dsub_5_then_ssub_0RegClassID, 64, 32, 1, 1 }, + { QQQQPR_with_dsub_7_then_ssub_0, QQQQPR_with_dsub_7_then_ssub_0Bits, 463, 5, sizeof(QQQQPR_with_dsub_7_then_ssub_0Bits), ARM::QQQQPR_with_dsub_7_then_ssub_0RegClassID, 64, 32, 1, 1 }, + { QQQQPR_with_dsub_0_in_DPR_8, QQQQPR_with_dsub_0_in_DPR_8Bits, 727, 4, sizeof(QQQQPR_with_dsub_0_in_DPR_8Bits), ARM::QQQQPR_with_dsub_0_in_DPR_8RegClassID, 64, 32, 1, 1 }, + { QQQQPR_with_dsub_2_in_DPR_8, QQQQPR_with_dsub_2_in_DPR_8Bits, 1013, 3, sizeof(QQQQPR_with_dsub_2_in_DPR_8Bits), ARM::QQQQPR_with_dsub_2_in_DPR_8RegClassID, 64, 32, 1, 1 }, + { QQQQPR_with_dsub_4_in_DPR_8, QQQQPR_with_dsub_4_in_DPR_8Bits, 1216, 2, sizeof(QQQQPR_with_dsub_4_in_DPR_8Bits), ARM::QQQQPR_with_dsub_4_in_DPR_8RegClassID, 64, 32, 1, 1 }, + { QQQQPR_with_dsub_6_in_DPR_8, QQQQPR_with_dsub_6_in_DPR_8Bits, 1306, 1, sizeof(QQQQPR_with_dsub_6_in_DPR_8Bits), ARM::QQQQPR_with_dsub_6_in_DPR_8RegClassID, 64, 32, 1, 1 }, +}; + +// ARM Dwarf<->LLVM register mappings. +extern const MCRegisterInfo::DwarfLLVMRegPair ARMDwarfFlavour0Dwarf2L[] = { + { 0U, ARM::R0 }, + { 1U, ARM::R1 }, + { 2U, ARM::R2 }, + { 3U, ARM::R3 }, + { 4U, ARM::R4 }, + { 5U, ARM::R5 }, + { 6U, ARM::R6 }, + { 7U, ARM::R7 }, + { 8U, ARM::R8 }, + { 9U, ARM::R9 }, + { 10U, ARM::R10 }, + { 11U, ARM::R11 }, + { 12U, ARM::R12 }, + { 13U, ARM::SP }, + { 14U, ARM::LR }, + { 15U, ARM::PC }, + { 256U, ARM::D0 }, + { 257U, ARM::D1 }, + { 258U, ARM::D2 }, + { 259U, ARM::D3 }, + { 260U, ARM::D4 }, + { 261U, ARM::D5 }, + { 262U, ARM::D6 }, + { 263U, ARM::D7 }, + { 264U, ARM::D8 }, + { 265U, ARM::D9 }, + { 266U, ARM::D10 }, + { 267U, ARM::D11 }, + { 268U, ARM::D12 }, + { 269U, ARM::D13 }, + { 270U, ARM::D14 }, + { 271U, ARM::D15 }, + { 272U, ARM::D16 }, + { 273U, ARM::D17 }, + { 274U, ARM::D18 }, + { 275U, ARM::D19 }, + { 276U, ARM::D20 }, + { 277U, ARM::D21 }, + { 278U, ARM::D22 }, + { 279U, ARM::D23 }, + { 280U, ARM::D24 }, + { 281U, ARM::D25 }, + { 282U, ARM::D26 }, + { 283U, ARM::D27 }, + { 284U, ARM::D28 }, + { 285U, ARM::D29 }, + { 286U, ARM::D30 }, + { 287U, ARM::D31 }, +}; +extern const unsigned ARMDwarfFlavour0Dwarf2LSize = array_lengthof(ARMDwarfFlavour0Dwarf2L); + +extern const MCRegisterInfo::DwarfLLVMRegPair ARMEHFlavour0Dwarf2L[] = { + { 0U, ARM::R0 }, + { 1U, ARM::R1 }, + { 2U, ARM::R2 }, + { 3U, ARM::R3 }, + { 4U, ARM::R4 }, + { 5U, ARM::R5 }, + { 6U, ARM::R6 }, + { 7U, ARM::R7 }, + { 8U, ARM::R8 }, + { 9U, ARM::R9 }, + { 10U, ARM::R10 }, + { 11U, ARM::R11 }, + { 12U, ARM::R12 }, + { 13U, ARM::SP }, + { 14U, ARM::LR }, + { 15U, ARM::PC }, + { 256U, ARM::D0 }, + { 257U, ARM::D1 }, + { 258U, ARM::D2 }, + { 259U, ARM::D3 }, + { 260U, ARM::D4 }, + { 261U, ARM::D5 }, + { 262U, ARM::D6 }, + { 263U, ARM::D7 }, + { 264U, ARM::D8 }, + { 265U, ARM::D9 }, + { 266U, ARM::D10 }, + { 267U, ARM::D11 }, + { 268U, ARM::D12 }, + { 269U, ARM::D13 }, + { 270U, ARM::D14 }, + { 271U, ARM::D15 }, + { 272U, ARM::D16 }, + { 273U, ARM::D17 }, + { 274U, ARM::D18 }, + { 275U, ARM::D19 }, + { 276U, ARM::D20 }, + { 277U, ARM::D21 }, + { 278U, ARM::D22 }, + { 279U, ARM::D23 }, + { 280U, ARM::D24 }, + { 281U, ARM::D25 }, + { 282U, ARM::D26 }, + { 283U, ARM::D27 }, + { 284U, ARM::D28 }, + { 285U, ARM::D29 }, + { 286U, ARM::D30 }, + { 287U, ARM::D31 }, +}; +extern const unsigned ARMEHFlavour0Dwarf2LSize = array_lengthof(ARMEHFlavour0Dwarf2L); + +extern const MCRegisterInfo::DwarfLLVMRegPair ARMDwarfFlavour0L2Dwarf[] = { + { ARM::LR, 14U }, + { ARM::PC, 15U }, + { ARM::SP, 13U }, + { ARM::D0, 256U }, + { ARM::D1, 257U }, + { ARM::D2, 258U }, + { ARM::D3, 259U }, + { ARM::D4, 260U }, + { ARM::D5, 261U }, + { ARM::D6, 262U }, + { ARM::D7, 263U }, + { ARM::D8, 264U }, + { ARM::D9, 265U }, + { ARM::D10, 266U }, + { ARM::D11, 267U }, + { ARM::D12, 268U }, + { ARM::D13, 269U }, + { ARM::D14, 270U }, + { ARM::D15, 271U }, + { ARM::D16, 272U }, + { ARM::D17, 273U }, + { ARM::D18, 274U }, + { ARM::D19, 275U }, + { ARM::D20, 276U }, + { ARM::D21, 277U }, + { ARM::D22, 278U }, + { ARM::D23, 279U }, + { ARM::D24, 280U }, + { ARM::D25, 281U }, + { ARM::D26, 282U }, + { ARM::D27, 283U }, + { ARM::D28, 284U }, + { ARM::D29, 285U }, + { ARM::D30, 286U }, + { ARM::D31, 287U }, + { ARM::R0, 0U }, + { ARM::R1, 1U }, + { ARM::R2, 2U }, + { ARM::R3, 3U }, + { ARM::R4, 4U }, + { ARM::R5, 5U }, + { ARM::R6, 6U }, + { ARM::R7, 7U }, + { ARM::R8, 8U }, + { ARM::R9, 9U }, + { ARM::R10, 10U }, + { ARM::R11, 11U }, + { ARM::R12, 12U }, +}; +extern const unsigned ARMDwarfFlavour0L2DwarfSize = array_lengthof(ARMDwarfFlavour0L2Dwarf); + +extern const MCRegisterInfo::DwarfLLVMRegPair ARMEHFlavour0L2Dwarf[] = { + { ARM::LR, 14U }, + { ARM::PC, 15U }, + { ARM::SP, 13U }, + { ARM::D0, 256U }, + { ARM::D1, 257U }, + { ARM::D2, 258U }, + { ARM::D3, 259U }, + { ARM::D4, 260U }, + { ARM::D5, 261U }, + { ARM::D6, 262U }, + { ARM::D7, 263U }, + { ARM::D8, 264U }, + { ARM::D9, 265U }, + { ARM::D10, 266U }, + { ARM::D11, 267U }, + { ARM::D12, 268U }, + { ARM::D13, 269U }, + { ARM::D14, 270U }, + { ARM::D15, 271U }, + { ARM::D16, 272U }, + { ARM::D17, 273U }, + { ARM::D18, 274U }, + { ARM::D19, 275U }, + { ARM::D20, 276U }, + { ARM::D21, 277U }, + { ARM::D22, 278U }, + { ARM::D23, 279U }, + { ARM::D24, 280U }, + { ARM::D25, 281U }, + { ARM::D26, 282U }, + { ARM::D27, 283U }, + { ARM::D28, 284U }, + { ARM::D29, 285U }, + { ARM::D30, 286U }, + { ARM::D31, 287U }, + { ARM::R0, 0U }, + { ARM::R1, 1U }, + { ARM::R2, 2U }, + { ARM::R3, 3U }, + { ARM::R4, 4U }, + { ARM::R5, 5U }, + { ARM::R6, 6U }, + { ARM::R7, 7U }, + { ARM::R8, 8U }, + { ARM::R9, 9U }, + { ARM::R10, 10U }, + { ARM::R11, 11U }, + { ARM::R12, 12U }, +}; +extern const unsigned ARMEHFlavour0L2DwarfSize = array_lengthof(ARMEHFlavour0L2Dwarf); + +extern const uint16_t ARMRegEncodingTable[] = { + 0, + 1, + 15, + 0, + 8, + 9, + 3, + 3, + 0, + 4, + 14, + 15, + 13, + 2, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 13, + 14, + 15, + 16, + 17, + 18, + 19, + 20, + 21, + 22, + 23, + 24, + 25, + 26, + 27, + 28, + 29, + 30, + 31, + 10, + 7, + 6, + 5, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 13, + 14, + 15, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 13, + 14, + 15, + 16, + 17, + 18, + 19, + 20, + 21, + 22, + 23, + 24, + 25, + 26, + 27, + 28, + 29, + 30, + 31, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 13, + 14, + 15, + 16, + 17, + 18, + 19, + 20, + 21, + 22, + 23, + 24, + 25, + 26, + 27, + 28, + 29, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 13, + 14, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 12, + 0, + 2, + 4, + 6, + 8, + 10, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 13, + 14, + 15, + 16, + 17, + 18, + 19, + 20, + 21, + 22, + 23, + 24, + 25, + 26, + 27, + 28, + 29, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 13, + 14, + 15, + 16, + 17, + 18, + 19, + 20, + 21, + 22, + 23, + 24, + 25, + 26, + 27, + 0, + 1, + 2, + 3, + 4, + 5, + 6, + 7, + 8, + 9, + 10, + 11, + 12, + 13, + 14, + 15, + 16, + 17, + 18, + 19, + 20, + 21, + 22, + 23, + 24, + 25, + 1, + 3, + 5, + 7, + 9, + 11, + 13, + 15, + 17, + 19, + 21, + 23, + 25, + 27, + 29, + 1, + 3, + 5, + 7, + 9, + 11, + 13, + 15, + 17, + 19, + 21, + 23, + 25, + 27, +}; +static inline void InitARMMCRegisterInfo(MCRegisterInfo *RI, unsigned RA, unsigned DwarfFlavour = 0, unsigned EHFlavour = 0, unsigned PC = 0) { + RI->InitMCRegisterInfo(ARMRegDesc, 289, RA, PC, ARMMCRegisterClasses, 100, ARMRegUnitRoots, 77, ARMRegDiffLists, ARMLaneMaskLists, ARMRegStrings, ARMRegClassStrings, ARMSubRegIdxLists, 57, +ARMSubRegIdxRanges, ARMRegEncodingTable); + + switch (DwarfFlavour) { + default: + llvm_unreachable("Unknown DWARF flavour"); + case 0: + RI->mapDwarfRegsToLLVMRegs(ARMDwarfFlavour0Dwarf2L, ARMDwarfFlavour0Dwarf2LSize, false); + break; + } + switch (EHFlavour) { + default: + llvm_unreachable("Unknown DWARF flavour"); + case 0: + RI->mapDwarfRegsToLLVMRegs(ARMEHFlavour0Dwarf2L, ARMEHFlavour0Dwarf2LSize, true); + break; + } + switch (DwarfFlavour) { + default: + llvm_unreachable("Unknown DWARF flavour"); + case 0: + RI->mapLLVMRegsToDwarfRegs(ARMDwarfFlavour0L2Dwarf, ARMDwarfFlavour0L2DwarfSize, false); + break; + } + switch (EHFlavour) { + default: + llvm_unreachable("Unknown DWARF flavour"); + case 0: + RI->mapLLVMRegsToDwarfRegs(ARMEHFlavour0L2Dwarf, ARMEHFlavour0L2DwarfSize, true); + break; + } +} + +} // End llvm namespace +#endif // GET_REGINFO_MC_DESC diff --git a/llvm/lib/Target/ARM/ARMGenSubtargetInfo.inc b/llvm/lib/Target/ARM/ARMGenSubtargetInfo.inc new file mode 100644 index 0000000..c0d0b8a --- /dev/null +++ b/llvm/lib/Target/ARM/ARMGenSubtargetInfo.inc @@ -0,0 +1,463 @@ +/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ +|* *| +|* Subtarget Enumeration Source Fragment *| +|* *| +|* Automatically generated file, do not edit! *| +|* *| +\*===----------------------------------------------------------------------===*/ + + +#ifdef GET_SUBTARGETINFO_ENUM +#undef GET_SUBTARGETINFO_ENUM +namespace llvm_ks { +namespace ARM { +enum : uint64_t { + ARMv2 = 0, + ARMv2a = 1, + ARMv3 = 2, + ARMv3m = 3, + ARMv4 = 4, + ARMv4t = 5, + ARMv5t = 6, + ARMv5te = 7, + ARMv5tej = 8, + ARMv6 = 9, + ARMv6j = 10, + ARMv6k = 11, + ARMv6kz = 12, + ARMv6m = 13, + ARMv6sm = 14, + ARMv6t2 = 15, + ARMv7a = 16, + ARMv7em = 17, + ARMv7k = 18, + ARMv7m = 19, + ARMv7r = 20, + ARMv7s = 21, + ARMv8a = 22, + ARMv8mBaseline = 23, + ARMv8mMainline = 24, + ARMv81a = 25, + ARMv82a = 26, + Feature8MSecExt = 27, + FeatureAClass = 28, + FeatureAcquireRelease = 29, + FeatureAvoidMOVsShOp = 30, + FeatureAvoidPartialCPSR = 31, + FeatureCRC = 32, + FeatureCrypto = 33, + FeatureD16 = 34, + FeatureDB = 35, + FeatureDSP = 36, + FeatureFP16 = 37, + FeatureFPARMv8 = 38, + FeatureFullFP16 = 39, + FeatureHWDiv = 40, + FeatureHWDivARM = 41, + FeatureHasRAS = 42, + FeatureHasSlowFPVMLx = 43, + FeatureLongCalls = 44, + FeatureMClass = 45, + FeatureMP = 46, + FeatureNEON = 47, + FeatureNEONForFP = 48, + FeatureNaClTrap = 49, + FeatureNoARM = 50, + FeatureNoMovt = 51, + FeaturePerfMon = 52, + FeaturePref32BitThumb = 53, + FeatureRClass = 54, + FeatureReserveR9 = 55, + FeatureSlowFPBrcc = 56, + FeatureStrictAlign = 57, + FeatureT2XtPk = 58, + FeatureThumb2 = 59, + FeatureTrustZone = 60, + FeatureV7Clrex = 61, + FeatureVFP2 = 62, + FeatureVFP3 = 63, + FeatureVFP4 = 64, + FeatureVFPOnlySP = 65, + FeatureVMLxForwarding = 66, + FeatureVirtualization = 67, + FeatureZCZeroing = 68, + HasV4TOps = 69, + HasV5TEOps = 70, + HasV5TOps = 71, + HasV6KOps = 72, + HasV6MOps = 73, + HasV6Ops = 74, + HasV6T2Ops = 75, + HasV7Ops = 76, + HasV8MBaselineOps = 77, + HasV8MMainlineOps = 78, + HasV8Ops = 79, + HasV8_1aOps = 80, + HasV8_2aOps = 81, + IWMMXT = 82, + IWMMXT2 = 83, + ModeSoftFloat = 84, + ModeThumb = 85, + ProcA5 = 86, + ProcA7 = 87, + ProcA8 = 88, + ProcA9 = 89, + ProcA12 = 90, + ProcA15 = 91, + ProcA17 = 92, + ProcA35 = 93, + ProcA53 = 94, + ProcA57 = 95, + ProcA72 = 96, + ProcExynosM1 = 97, + ProcKrait = 98, + ProcR4 = 99, + ProcR5 = 100, + ProcR7 = 101, + ProcSwift = 102, + XScale = 103 +}; +} +} // end llvm namespace +#endif // GET_SUBTARGETINFO_ENUM + + +#ifdef GET_SUBTARGETINFO_MC_DESC +#undef GET_SUBTARGETINFO_MC_DESC +namespace llvm_ks { +// Sorted (by key) array of values for CPU features. +extern const llvm_ks::SubtargetFeatureKV ARMFeatureKV[] = { + { "32bit", "Prefer 32-bit Thumb instrs", { ARM::FeaturePref32BitThumb }, { } }, + { "8msecext", "Enable support for ARMv8-M Security Extensions", { ARM::Feature8MSecExt }, { } }, + { "a12", "Cortex-A12 ARM processors", { ARM::ProcA12 }, { } }, + { "a15", "Cortex-A15 ARM processors", { ARM::ProcA15 }, { } }, + { "a17", "Cortex-A17 ARM processors", { ARM::ProcA17 }, { } }, + { "a35", "Cortex-A35 ARM processors", { ARM::ProcA35 }, { } }, + { "a5", "Cortex-A5 ARM processors", { ARM::ProcA5 }, { } }, + { "a53", "Cortex-A53 ARM processors", { ARM::ProcA53 }, { } }, + { "a57", "Cortex-A57 ARM processors", { ARM::ProcA57 }, { } }, + { "a7", "Cortex-A7 ARM processors", { ARM::ProcA7 }, { } }, + { "a72", "Cortex-A72 ARM processors", { ARM::ProcA72 }, { } }, + { "a8", "Cortex-A8 ARM processors", { ARM::ProcA8 }, { } }, + { "a9", "Cortex-A9 ARM processors", { ARM::ProcA9 }, { } }, + { "aclass", "Is application profile ('A' series)", { ARM::FeatureAClass }, { } }, + { "acquire-release", "Has v8 acquire/release (lda/ldaex etc) instructions", { ARM::FeatureAcquireRelease }, { } }, + { "armv2", "ARMv2 architecture", { ARM::ARMv2 }, { } }, + { "armv2a", "ARMv2a architecture", { ARM::ARMv2a }, { } }, + { "armv3", "ARMv3 architecture", { ARM::ARMv3 }, { } }, + { "armv3m", "ARMv3m architecture", { ARM::ARMv3m }, { } }, + { "armv4", "ARMv4 architecture", { ARM::ARMv4 }, { } }, + { "armv4t", "ARMv4t architecture", { ARM::ARMv4t }, { ARM::HasV4TOps } }, + { "armv5t", "ARMv5t architecture", { ARM::ARMv5t }, { ARM::HasV5TOps } }, + { "armv5te", "ARMv5te architecture", { ARM::ARMv5te }, { ARM::HasV5TEOps } }, + { "armv5tej", "ARMv5tej architecture", { ARM::ARMv5tej }, { ARM::HasV5TEOps } }, + { "armv6", "ARMv6 architecture", { ARM::ARMv6 }, { ARM::HasV6Ops } }, + { "armv6-m", "ARMv6m architecture", { ARM::ARMv6m }, { ARM::HasV6MOps, ARM::FeatureNoARM, ARM::FeatureDB, ARM::FeatureMClass } }, + { "armv6j", "ARMv7a architecture", { ARM::ARMv6j }, { ARM::ARMv6 } }, + { "armv6k", "ARMv6k architecture", { ARM::ARMv6k }, { ARM::HasV6KOps } }, + { "armv6kz", "ARMv6kz architecture", { ARM::ARMv6kz }, { ARM::HasV6KOps, ARM::FeatureTrustZone } }, + { "armv6s-m", "ARMv6sm architecture", { ARM::ARMv6sm }, { ARM::HasV6MOps, ARM::FeatureNoARM, ARM::FeatureDB, ARM::FeatureMClass } }, + { "armv6t2", "ARMv6t2 architecture", { ARM::ARMv6t2 }, { ARM::HasV6T2Ops, ARM::FeatureDSP } }, + { "armv7-a", "ARMv7a architecture", { ARM::ARMv7a }, { ARM::HasV7Ops, ARM::FeatureNEON, ARM::FeatureDB, ARM::FeatureDSP, ARM::FeatureAClass } }, + { "armv7-m", "ARMv7m architecture", { ARM::ARMv7m }, { ARM::HasV7Ops, ARM::FeatureThumb2, ARM::FeatureNoARM, ARM::FeatureDB, ARM::FeatureHWDiv, ARM::FeatureMClass } }, + { "armv7-r", "ARMv7r architecture", { ARM::ARMv7r }, { ARM::HasV7Ops, ARM::FeatureDB, ARM::FeatureDSP, ARM::FeatureHWDiv, ARM::FeatureRClass } }, + { "armv7e-m", "ARMv7em architecture", { ARM::ARMv7em }, { ARM::HasV7Ops, ARM::FeatureThumb2, ARM::FeatureNoARM, ARM::FeatureDB, ARM::FeatureHWDiv, ARM::FeatureMClass, ARM::FeatureDSP, ARM::FeatureT2XtPk } }, + { "armv7k", "ARMv7a architecture", { ARM::ARMv7k }, { ARM::ARMv7a } }, + { "armv7s", "ARMv7a architecture", { ARM::ARMv7s }, { ARM::ARMv7a } }, + { "armv8-a", "ARMv8a architecture", { ARM::ARMv8a }, { ARM::HasV8Ops, ARM::FeatureAClass, ARM::FeatureDB, ARM::FeatureFPARMv8, ARM::FeatureNEON, ARM::FeatureDSP, ARM::FeatureTrustZone, ARM::FeatureMP, ARM::FeatureVirtualization, ARM::FeatureCrypto, ARM::FeatureCRC } }, + { "armv8-m.base", "ARMv8mBaseline architecture", { ARM::ARMv8mBaseline }, { ARM::HasV8MBaselineOps, ARM::FeatureNoARM, ARM::FeatureDB, ARM::FeatureHWDiv, ARM::FeatureV7Clrex, ARM::Feature8MSecExt, ARM::FeatureAcquireRelease, ARM::FeatureMClass } }, + { "armv8-m.main", "ARMv8mMainline architecture", { ARM::ARMv8mMainline }, { ARM::HasV8MMainlineOps, ARM::FeatureNoARM, ARM::FeatureDB, ARM::FeatureHWDiv, ARM::Feature8MSecExt, ARM::FeatureAcquireRelease, ARM::FeatureMClass } }, + { "armv8.1-a", "ARMv81a architecture", { ARM::ARMv81a }, { ARM::HasV8_1aOps, ARM::FeatureAClass, ARM::FeatureDB, ARM::FeatureFPARMv8, ARM::FeatureNEON, ARM::FeatureDSP, ARM::FeatureTrustZone, ARM::FeatureMP, ARM::FeatureVirtualization, ARM::FeatureCrypto, ARM::FeatureCRC } }, + { "armv8.2-a", "ARMv82a architecture", { ARM::ARMv82a }, { ARM::HasV8_2aOps, ARM::FeatureAClass, ARM::FeatureDB, ARM::FeatureFPARMv8, ARM::FeatureNEON, ARM::FeatureDSP, ARM::FeatureTrustZone, ARM::FeatureMP, ARM::FeatureVirtualization, ARM::FeatureCrypto, ARM::FeatureCRC } }, + { "avoid-movs-shop", "Avoid movs instructions with shifter operand", { ARM::FeatureAvoidMOVsShOp }, { } }, + { "avoid-partial-cpsr", "Avoid CPSR partial update for OOO execution", { ARM::FeatureAvoidPartialCPSR }, { } }, + { "crc", "Enable support for CRC instructions", { ARM::FeatureCRC }, { } }, + { "crypto", "Enable support for Cryptography extensions", { ARM::FeatureCrypto }, { ARM::FeatureNEON } }, + { "d16", "Restrict FP to 16 double registers", { ARM::FeatureD16 }, { } }, + { "db", "Has data barrier (dmb / dsb) instructions", { ARM::FeatureDB }, { } }, + { "dsp", "Supports DSP instructions in ARM and/or Thumb2", { ARM::FeatureDSP }, { } }, + { "exynosm1", "Samsung Exynos-M1 processors", { ARM::ProcExynosM1 }, { } }, + { "fp-armv8", "Enable ARMv8 FP", { ARM::FeatureFPARMv8 }, { ARM::FeatureVFP4 } }, + { "fp-only-sp", "Floating point unit supports single precision only", { ARM::FeatureVFPOnlySP }, { } }, + { "fp16", "Enable half-precision floating point", { ARM::FeatureFP16 }, { } }, + { "fullfp16", "Enable full half-precision floating point", { ARM::FeatureFullFP16 }, { ARM::FeatureFPARMv8 } }, + { "hwdiv", "Enable divide instructions", { ARM::FeatureHWDiv }, { } }, + { "hwdiv-arm", "Enable divide instructions in ARM mode", { ARM::FeatureHWDivARM }, { } }, + { "iwmmxt", "ARMv5te architecture", { ARM::IWMMXT }, { ARM::ARMv5te } }, + { "iwmmxt2", "ARMv5te architecture", { ARM::IWMMXT2 }, { ARM::ARMv5te } }, + { "krait", "Qualcomm ARM processors", { ARM::ProcKrait }, { } }, + { "long-calls", "Generate calls via indirect call instructions", { ARM::FeatureLongCalls }, { } }, + { "mclass", "Is microcontroller profile ('M' series)", { ARM::FeatureMClass }, { } }, + { "mp", "Supports Multiprocessing extension", { ARM::FeatureMP }, { } }, + { "nacl-trap", "NaCl trap", { ARM::FeatureNaClTrap }, { } }, + { "neon", "Enable NEON instructions", { ARM::FeatureNEON }, { ARM::FeatureVFP3 } }, + { "neonfp", "Use NEON for single precision FP", { ARM::FeatureNEONForFP }, { } }, + { "no-movt", "Don't use movt/movw pairs for 32-bit imms", { ARM::FeatureNoMovt }, { } }, + { "noarm", "Does not support ARM mode execution", { ARM::FeatureNoARM }, { ARM::ModeThumb } }, + { "perfmon", "Enable support for Performance Monitor extensions", { ARM::FeaturePerfMon }, { } }, + { "r4", "Cortex-R4 ARM processors", { ARM::ProcR4 }, { } }, + { "r5", "Cortex-R5 ARM processors", { ARM::ProcR5 }, { } }, + { "r7", "Cortex-R7 ARM processors", { ARM::ProcR7 }, { } }, + { "ras", "Has return address stack", { ARM::FeatureHasRAS }, { } }, + { "rclass", "Is realtime profile ('R' series)", { ARM::FeatureRClass }, { } }, + { "reserve-r9", "Reserve R9, making it unavailable as GPR", { ARM::FeatureReserveR9 }, { } }, + { "slow-fp-brcc", "FP compare + branch is slow", { ARM::FeatureSlowFPBrcc }, { } }, + { "slowfpvmlx", "Disable VFP / NEON MAC instructions", { ARM::FeatureHasSlowFPVMLx }, { } }, + { "soft-float", "Use software floating point features.", { ARM::ModeSoftFloat }, { } }, + { "strict-align", "Disallow all unaligned memory access", { ARM::FeatureStrictAlign }, { } }, + { "swift", "Swift ARM processors", { ARM::ProcSwift }, { } }, + { "t2xtpk", "Enable Thumb2 extract and pack instructions", { ARM::FeatureT2XtPk }, { } }, + { "thumb-mode", "Thumb mode", { ARM::ModeThumb }, { } }, + { "thumb2", "Enable Thumb2 instructions", { ARM::FeatureThumb2 }, { } }, + { "trustzone", "Enable support for TrustZone security extensions", { ARM::FeatureTrustZone }, { } }, + { "v4t", "Support ARM v4T instructions", { ARM::HasV4TOps }, { } }, + { "v5t", "Support ARM v5T instructions", { ARM::HasV5TOps }, { ARM::HasV4TOps } }, + { "v5te", "Support ARM v5TE, v5TEj, and v5TExp instructions", { ARM::HasV5TEOps }, { ARM::HasV5TOps } }, + { "v6", "Support ARM v6 instructions", { ARM::HasV6Ops }, { ARM::HasV5TEOps } }, + { "v6k", "Support ARM v6k instructions", { ARM::HasV6KOps }, { ARM::HasV6Ops } }, + { "v6m", "Support ARM v6M instructions", { ARM::HasV6MOps }, { ARM::HasV6Ops } }, + { "v6t2", "Support ARM v6t2 instructions", { ARM::HasV6T2Ops }, { ARM::HasV8MBaselineOps, ARM::HasV6KOps, ARM::FeatureThumb2 } }, + { "v7", "Support ARM v7 instructions", { ARM::HasV7Ops }, { ARM::HasV6T2Ops, ARM::FeaturePerfMon, ARM::FeatureV7Clrex } }, + { "v7clrex", "Has v7 clrex instruction", { ARM::FeatureV7Clrex }, { } }, + { "v8", "Support ARM v8 instructions", { ARM::HasV8Ops }, { ARM::HasV7Ops, ARM::FeatureAcquireRelease } }, + { "v8.1a", "Support ARM v8.1a instructions", { ARM::HasV8_1aOps }, { ARM::HasV8Ops } }, + { "v8.2a", "Support ARM v8.2a instructions", { ARM::HasV8_2aOps }, { ARM::HasV8_1aOps } }, + { "v8m", "Support ARM v8M Baseline instructions", { ARM::HasV8MBaselineOps }, { ARM::HasV6MOps } }, + { "v8m.main", "Support ARM v8M Mainline instructions", { ARM::HasV8MMainlineOps }, { ARM::HasV7Ops } }, + { "vfp2", "Enable VFP2 instructions", { ARM::FeatureVFP2 }, { } }, + { "vfp3", "Enable VFP3 instructions", { ARM::FeatureVFP3 }, { ARM::FeatureVFP2 } }, + { "vfp4", "Enable VFP4 instructions", { ARM::FeatureVFP4 }, { ARM::FeatureVFP3, ARM::FeatureFP16 } }, + { "virtualization", "Supports Virtualization extension", { ARM::FeatureVirtualization }, { ARM::FeatureHWDiv, ARM::FeatureHWDivARM } }, + { "vmlx-forwarding", "Has multiplier accumulator forwarding", { ARM::FeatureVMLxForwarding }, { } }, + { "xscale", "ARMv5te architecture", { ARM::XScale }, { ARM::ARMv5te } }, + { "zcz", "Has zero-cycle zeroing instructions", { ARM::FeatureZCZeroing }, { } } +}; + +// Sorted (by key) array of values for CPU subtype. +extern const llvm_ks::SubtargetFeatureKV ARMSubTypeKV[] = { + { "arm1020e", "Select the arm1020e processor", { ARM::ARMv5te }, { } }, + { "arm1020t", "Select the arm1020t processor", { ARM::ARMv5t }, { } }, + { "arm1022e", "Select the arm1022e processor", { ARM::ARMv5te }, { } }, + { "arm10e", "Select the arm10e processor", { ARM::ARMv5te }, { } }, + { "arm10tdmi", "Select the arm10tdmi processor", { ARM::ARMv5t }, { } }, + { "arm1136j-s", "Select the arm1136j-s processor", { ARM::ARMv6 }, { } }, + { "arm1136jf-s", "Select the arm1136jf-s processor", { ARM::ARMv6, ARM::FeatureVFP2, ARM::FeatureHasSlowFPVMLx }, { } }, + { "arm1156t2-s", "Select the arm1156t2-s processor", { ARM::ARMv6t2 }, { } }, + { "arm1156t2f-s", "Select the arm1156t2f-s processor", { ARM::ARMv6t2, ARM::FeatureVFP2, ARM::FeatureHasSlowFPVMLx }, { } }, + { "arm1176jz-s", "Select the arm1176jz-s processor", { ARM::ARMv6kz }, { } }, + { "arm1176jzf-s", "Select the arm1176jzf-s processor", { ARM::ARMv6kz, ARM::FeatureVFP2, ARM::FeatureHasSlowFPVMLx }, { } }, + { "arm710t", "Select the arm710t processor", { ARM::ARMv4t }, { } }, + { "arm720t", "Select the arm720t processor", { ARM::ARMv4t }, { } }, + { "arm7tdmi", "Select the arm7tdmi processor", { ARM::ARMv4t }, { } }, + { "arm7tdmi-s", "Select the arm7tdmi-s processor", { ARM::ARMv4t }, { } }, + { "arm8", "Select the arm8 processor", { ARM::ARMv4 }, { } }, + { "arm810", "Select the arm810 processor", { ARM::ARMv4 }, { } }, + { "arm9", "Select the arm9 processor", { ARM::ARMv4t }, { } }, + { "arm920", "Select the arm920 processor", { ARM::ARMv4t }, { } }, + { "arm920t", "Select the arm920t processor", { ARM::ARMv4t }, { } }, + { "arm922t", "Select the arm922t processor", { ARM::ARMv4t }, { } }, + { "arm926ej-s", "Select the arm926ej-s processor", { ARM::ARMv5te }, { } }, + { "arm940t", "Select the arm940t processor", { ARM::ARMv4t }, { } }, + { "arm946e-s", "Select the arm946e-s processor", { ARM::ARMv5te }, { } }, + { "arm966e-s", "Select the arm966e-s processor", { ARM::ARMv5te }, { } }, + { "arm968e-s", "Select the arm968e-s processor", { ARM::ARMv5te }, { } }, + { "arm9e", "Select the arm9e processor", { ARM::ARMv5te }, { } }, + { "arm9tdmi", "Select the arm9tdmi processor", { ARM::ARMv4t }, { } }, + { "cortex-a12", "Select the cortex-a12 processor", { ARM::ARMv7a, ARM::ProcA12, ARM::FeatureHasRAS, ARM::FeatureTrustZone, ARM::FeatureVMLxForwarding, ARM::FeatureT2XtPk, ARM::FeatureVFP4, ARM::FeatureHWDiv, ARM::FeatureHWDivARM, ARM::FeatureAvoidPartialCPSR, ARM::FeatureVirtualization, ARM::FeatureMP }, { } }, + { "cortex-a15", "Select the cortex-a15 processor", { ARM::ARMv7a, ARM::ProcA15, ARM::FeatureHasRAS, ARM::FeatureTrustZone, ARM::FeatureT2XtPk, ARM::FeatureVFP4, ARM::FeatureMP, ARM::FeatureHWDiv, ARM::FeatureHWDivARM, ARM::FeatureAvoidPartialCPSR, ARM::FeatureVirtualization }, { } }, + { "cortex-a17", "Select the cortex-a17 processor", { ARM::ARMv7a, ARM::ProcA17, ARM::FeatureHasRAS, ARM::FeatureTrustZone, ARM::FeatureMP, ARM::FeatureVMLxForwarding, ARM::FeatureT2XtPk, ARM::FeatureVFP4, ARM::FeatureHWDiv, ARM::FeatureHWDivARM, ARM::FeatureAvoidPartialCPSR, ARM::FeatureVirtualization }, { } }, + { "cortex-a35", "Select the cortex-a35 processor", { ARM::ARMv8a, ARM::ProcA35, ARM::FeatureHWDiv, ARM::FeatureHWDivARM, ARM::FeatureT2XtPk, ARM::FeatureCrypto, ARM::FeatureCRC }, { } }, + { "cortex-a5", "Select the cortex-a5 processor", { ARM::ARMv7a, ARM::ProcA5, ARM::FeatureHasRAS, ARM::FeatureTrustZone, ARM::FeatureSlowFPBrcc, ARM::FeatureHasSlowFPVMLx, ARM::FeatureVMLxForwarding, ARM::FeatureT2XtPk, ARM::FeatureMP, ARM::FeatureVFP4 }, { } }, + { "cortex-a53", "Select the cortex-a53 processor", { ARM::ARMv8a, ARM::ProcA53, ARM::FeatureHWDiv, ARM::FeatureHWDivARM, ARM::FeatureT2XtPk, ARM::FeatureCrypto, ARM::FeatureCRC }, { } }, + { "cortex-a57", "Select the cortex-a57 processor", { ARM::ARMv8a, ARM::ProcA57, ARM::FeatureHWDiv, ARM::FeatureHWDivARM, ARM::FeatureT2XtPk, ARM::FeatureCrypto, ARM::FeatureCRC }, { } }, + { "cortex-a7", "Select the cortex-a7 processor", { ARM::ARMv7a, ARM::ProcA7, ARM::FeatureHasRAS, ARM::FeatureTrustZone, ARM::FeatureSlowFPBrcc, ARM::FeatureHasSlowFPVMLx, ARM::FeatureVMLxForwarding, ARM::FeatureT2XtPk, ARM::FeatureMP, ARM::FeatureVFP4, ARM::FeatureHWDiv, ARM::FeatureHWDivARM, ARM::FeatureVirtualization }, { } }, + { "cortex-a72", "Select the cortex-a72 processor", { ARM::ARMv8a, ARM::ProcA72, ARM::FeatureHWDiv, ARM::FeatureHWDivARM, ARM::FeatureT2XtPk, ARM::FeatureCrypto, ARM::FeatureCRC }, { } }, + { "cortex-a8", "Select the cortex-a8 processor", { ARM::ARMv7a, ARM::ProcA8, ARM::FeatureHasRAS, ARM::FeatureTrustZone, ARM::FeatureSlowFPBrcc, ARM::FeatureHasSlowFPVMLx, ARM::FeatureVMLxForwarding, ARM::FeatureT2XtPk }, { } }, + { "cortex-a9", "Select the cortex-a9 processor", { ARM::ARMv7a, ARM::ProcA9, ARM::FeatureHasRAS, ARM::FeatureTrustZone, ARM::FeatureVMLxForwarding, ARM::FeatureT2XtPk, ARM::FeatureFP16, ARM::FeatureAvoidPartialCPSR, ARM::FeatureMP }, { } }, + { "cortex-m0", "Select the cortex-m0 processor", { ARM::ARMv6m }, { } }, + { "cortex-m0plus", "Select the cortex-m0plus processor", { ARM::ARMv6m }, { } }, + { "cortex-m1", "Select the cortex-m1 processor", { ARM::ARMv6m }, { } }, + { "cortex-m3", "Select the cortex-m3 processor", { ARM::ARMv7m }, { } }, + { "cortex-m4", "Select the cortex-m4 processor", { ARM::ARMv7em, ARM::FeatureVFP4, ARM::FeatureVFPOnlySP, ARM::FeatureD16 }, { } }, + { "cortex-m7", "Select the cortex-m7 processor", { ARM::ARMv7em, ARM::FeatureFPARMv8, ARM::FeatureD16 }, { } }, + { "cortex-r4", "Select the cortex-r4 processor", { ARM::ARMv7r, ARM::ProcR4, ARM::FeatureHasRAS, ARM::FeatureAvoidPartialCPSR, ARM::FeatureT2XtPk }, { } }, + { "cortex-r4f", "Select the cortex-r4f processor", { ARM::ARMv7r, ARM::ProcR4, ARM::FeatureHasRAS, ARM::FeatureSlowFPBrcc, ARM::FeatureHasSlowFPVMLx, ARM::FeatureVFP3, ARM::FeatureD16, ARM::FeatureAvoidPartialCPSR, ARM::FeatureT2XtPk }, { } }, + { "cortex-r5", "Select the cortex-r5 processor", { ARM::ARMv7r, ARM::ProcR5, ARM::FeatureHasRAS, ARM::FeatureVFP3, ARM::FeatureD16, ARM::FeatureSlowFPBrcc, ARM::FeatureHWDivARM, ARM::FeatureHasSlowFPVMLx, ARM::FeatureAvoidPartialCPSR, ARM::FeatureT2XtPk }, { } }, + { "cortex-r7", "Select the cortex-r7 processor", { ARM::ARMv7r, ARM::ProcR7, ARM::FeatureHasRAS, ARM::FeatureVFP3, ARM::FeatureD16, ARM::FeatureFP16, ARM::FeatureMP, ARM::FeatureSlowFPBrcc, ARM::FeatureHWDivARM, ARM::FeatureHasSlowFPVMLx, ARM::FeatureAvoidPartialCPSR, ARM::FeatureT2XtPk }, { } }, + { "cyclone", "Select the cyclone processor", { ARM::ARMv8a, ARM::ProcSwift, ARM::FeatureHasRAS, ARM::FeatureNEONForFP, ARM::FeatureT2XtPk, ARM::FeatureVFP4, ARM::FeatureMP, ARM::FeatureHWDiv, ARM::FeatureHWDivARM, ARM::FeatureAvoidPartialCPSR, ARM::FeatureAvoidMOVsShOp, ARM::FeatureHasSlowFPVMLx, ARM::FeatureCrypto, ARM::FeatureZCZeroing }, { } }, + { "ep9312", "Select the ep9312 processor", { ARM::ARMv4t }, { } }, + { "exynos-m1", "Select the exynos-m1 processor", { ARM::ARMv8a, ARM::ProcExynosM1, ARM::FeatureHWDiv, ARM::FeatureHWDivARM, ARM::FeatureT2XtPk, ARM::FeatureCrypto, ARM::FeatureCRC }, { } }, + { "generic", "Select the generic processor", { }, { } }, + { "iwmmxt", "Select the iwmmxt processor", { ARM::ARMv5te }, { } }, + { "krait", "Select the krait processor", { ARM::ARMv7a, ARM::ProcKrait, ARM::FeatureHasRAS, ARM::FeatureVMLxForwarding, ARM::FeatureT2XtPk, ARM::FeatureFP16, ARM::FeatureAvoidPartialCPSR, ARM::FeatureVFP4, ARM::FeatureHWDiv, ARM::FeatureHWDivARM }, { } }, + { "mpcore", "Select the mpcore processor", { ARM::ARMv6k, ARM::FeatureVFP2, ARM::FeatureHasSlowFPVMLx }, { } }, + { "mpcorenovfp", "Select the mpcorenovfp processor", { ARM::ARMv6k }, { } }, + { "sc000", "Select the sc000 processor", { ARM::ARMv6m }, { } }, + { "sc300", "Select the sc300 processor", { ARM::ARMv7m }, { } }, + { "strongarm", "Select the strongarm processor", { ARM::ARMv4 }, { } }, + { "strongarm110", "Select the strongarm110 processor", { ARM::ARMv4 }, { } }, + { "strongarm1100", "Select the strongarm1100 processor", { ARM::ARMv4 }, { } }, + { "strongarm1110", "Select the strongarm1110 processor", { ARM::ARMv4 }, { } }, + { "swift", "Select the swift processor", { ARM::ARMv7a, ARM::ProcSwift, ARM::FeatureHasRAS, ARM::FeatureNEONForFP, ARM::FeatureT2XtPk, ARM::FeatureVFP4, ARM::FeatureMP, ARM::FeatureHWDiv, ARM::FeatureHWDivARM, ARM::FeatureAvoidPartialCPSR, ARM::FeatureAvoidMOVsShOp, ARM::FeatureHasSlowFPVMLx }, { } }, + { "xscale", "Select the xscale processor", { ARM::ARMv5te }, { } } +}; + +#ifdef DBGFIELD +#error "GenSubtargetInfo.inc requires a DBGFIELD macro" +#endif +#ifndef NDEBUG +#define DBGFIELD(x) x, +#else +#define DBGFIELD(x) +#endif + +// Functional units for "ARMV6Itineraries" +namespace ARMV6ItinerariesFU { + const unsigned V6_Pipe = 1 << 0; +} + +// Functional units for "CortexA9Itineraries" +namespace CortexA9ItinerariesFU { + const unsigned A9_Issue0 = 1 << 0; + const unsigned A9_Issue1 = 1 << 1; + const unsigned A9_Branch = 1 << 2; + const unsigned A9_ALU0 = 1 << 3; + const unsigned A9_ALU1 = 1 << 4; + const unsigned A9_AGU = 1 << 5; + const unsigned A9_NPipe = 1 << 6; + const unsigned A9_MUX0 = 1 << 7; + const unsigned A9_LSUnit = 1 << 8; + const unsigned A9_DRegsVFP = 1 << 9; + const unsigned A9_DRegsN = 1 << 10; +} + +// =============================================================== +// Data tables for the new per-operand machine model. + + +#undef DBGFIELD +static inline MCSubtargetInfo *createARMMCSubtargetInfoImpl(const Triple &TT, StringRef CPU, StringRef FS) { + return new MCSubtargetInfo(TT, CPU, FS, ARMFeatureKV, ARMSubTypeKV, NULL); +} + +} // end llvm namespace +#endif // GET_SUBTARGETINFO_MC_DESC + + +#ifdef GET_SUBTARGETINFO_TARGET_DESC +#undef GET_SUBTARGETINFO_TARGET_DESC +#include "llvm/Support/Debug.h" +#include "llvm/Support/raw_ostream.h" +// ParseSubtargetFeatures - Parses features string setting specified +// subtarget options. +void llvm_ks::ARMSubtarget::ParseSubtargetFeatures(StringRef CPU, StringRef FS) { + DEBUG(dbgs() << "\nFeatures:" << FS); + DEBUG(dbgs() << "\nCPU:" << CPU << "\n\n"); + InitMCProcessorInfo(CPU, FS); + const FeatureBitset& Bits = getFeatureBits(); + if (Bits[ARM::ARMv2] && ARMArch < ARMv2) ARMArch = ARMv2; + if (Bits[ARM::ARMv2a] && ARMArch < ARMv2a) ARMArch = ARMv2a; + if (Bits[ARM::ARMv3] && ARMArch < ARMv3) ARMArch = ARMv3; + if (Bits[ARM::ARMv3m] && ARMArch < ARMv3m) ARMArch = ARMv3m; + if (Bits[ARM::ARMv4] && ARMArch < ARMv4) ARMArch = ARMv4; + if (Bits[ARM::ARMv4t] && ARMArch < ARMv4t) ARMArch = ARMv4t; + if (Bits[ARM::ARMv5t] && ARMArch < ARMv5t) ARMArch = ARMv5t; + if (Bits[ARM::ARMv5te] && ARMArch < ARMv5te) ARMArch = ARMv5te; + if (Bits[ARM::ARMv5tej] && ARMArch < ARMv5tej) ARMArch = ARMv5tej; + if (Bits[ARM::ARMv6] && ARMArch < ARMv6) ARMArch = ARMv6; + if (Bits[ARM::ARMv6j] && ARMArch < ARMv7a) ARMArch = ARMv7a; + if (Bits[ARM::ARMv6k] && ARMArch < ARMv6k) ARMArch = ARMv6k; + if (Bits[ARM::ARMv6kz] && ARMArch < ARMv6kz) ARMArch = ARMv6kz; + if (Bits[ARM::ARMv6m] && ARMArch < ARMv6m) ARMArch = ARMv6m; + if (Bits[ARM::ARMv6sm] && ARMArch < ARMv6sm) ARMArch = ARMv6sm; + if (Bits[ARM::ARMv6t2] && ARMArch < ARMv6t2) ARMArch = ARMv6t2; + if (Bits[ARM::ARMv7a] && ARMArch < ARMv7a) ARMArch = ARMv7a; + if (Bits[ARM::ARMv7em] && ARMArch < ARMv7em) ARMArch = ARMv7em; + if (Bits[ARM::ARMv7k] && ARMArch < ARMv7a) ARMArch = ARMv7a; + if (Bits[ARM::ARMv7m] && ARMArch < ARMv7m) ARMArch = ARMv7m; + if (Bits[ARM::ARMv7r] && ARMArch < ARMv7r) ARMArch = ARMv7r; + if (Bits[ARM::ARMv7s] && ARMArch < ARMv7a) ARMArch = ARMv7a; + if (Bits[ARM::ARMv8a] && ARMArch < ARMv8a) ARMArch = ARMv8a; + if (Bits[ARM::ARMv8mBaseline] && ARMArch < ARMv8mBaseline) ARMArch = ARMv8mBaseline; + if (Bits[ARM::ARMv8mMainline] && ARMArch < ARMv8mMainline) ARMArch = ARMv8mMainline; + if (Bits[ARM::ARMv81a] && ARMArch < ARMv81a) ARMArch = ARMv81a; + if (Bits[ARM::ARMv82a] && ARMArch < ARMv82a) ARMArch = ARMv82a; + if (Bits[ARM::Feature8MSecExt]) Has8MSecExt = true; + if (Bits[ARM::FeatureAClass] && ARMProcClass < AClass) ARMProcClass = AClass; + if (Bits[ARM::FeatureAcquireRelease]) HasAcquireRelease = true; + if (Bits[ARM::FeatureAvoidMOVsShOp]) AvoidMOVsShifterOperand = true; + if (Bits[ARM::FeatureAvoidPartialCPSR]) AvoidCPSRPartialUpdate = true; + if (Bits[ARM::FeatureCRC]) HasCRC = true; + if (Bits[ARM::FeatureCrypto]) HasCrypto = true; + if (Bits[ARM::FeatureD16]) HasD16 = true; + if (Bits[ARM::FeatureDB]) HasDataBarrier = true; + if (Bits[ARM::FeatureDSP]) HasDSP = true; + if (Bits[ARM::FeatureFP16]) HasFP16 = true; + if (Bits[ARM::FeatureFPARMv8]) HasFPARMv8 = true; + if (Bits[ARM::FeatureFullFP16]) HasFullFP16 = true; + if (Bits[ARM::FeatureHWDiv]) HasHardwareDivide = true; + if (Bits[ARM::FeatureHWDivARM]) HasHardwareDivideInARM = true; + if (Bits[ARM::FeatureHasRAS]) HasRAS = true; + if (Bits[ARM::FeatureHasSlowFPVMLx]) SlowFPVMLx = true; + if (Bits[ARM::FeatureLongCalls]) GenLongCalls = true; + if (Bits[ARM::FeatureMClass] && ARMProcClass < MClass) ARMProcClass = MClass; + if (Bits[ARM::FeatureMP]) HasMPExtension = true; + if (Bits[ARM::FeatureNEON]) HasNEON = true; + if (Bits[ARM::FeatureNEONForFP]) UseNEONForSinglePrecisionFP = true; + if (Bits[ARM::FeatureNaClTrap]) UseNaClTrap = true; + if (Bits[ARM::FeatureNoARM]) NoARM = true; + if (Bits[ARM::FeatureNoMovt]) NoMovt = true; + if (Bits[ARM::FeaturePerfMon]) HasPerfMon = true; + if (Bits[ARM::FeaturePref32BitThumb]) Pref32BitThumb = true; + if (Bits[ARM::FeatureRClass] && ARMProcClass < RClass) ARMProcClass = RClass; + if (Bits[ARM::FeatureReserveR9]) ReserveR9 = true; + if (Bits[ARM::FeatureSlowFPBrcc]) SlowFPBrcc = true; + if (Bits[ARM::FeatureStrictAlign]) StrictAlign = true; + if (Bits[ARM::FeatureT2XtPk]) HasT2ExtractPack = true; + if (Bits[ARM::FeatureThumb2]) HasThumb2 = true; + if (Bits[ARM::FeatureTrustZone]) HasTrustZone = true; + if (Bits[ARM::FeatureV7Clrex]) HasV7Clrex = true; + if (Bits[ARM::FeatureVFP2]) HasVFPv2 = true; + if (Bits[ARM::FeatureVFP3]) HasVFPv3 = true; + if (Bits[ARM::FeatureVFP4]) HasVFPv4 = true; + if (Bits[ARM::FeatureVFPOnlySP]) FPOnlySP = true; + if (Bits[ARM::FeatureVMLxForwarding]) HasVMLxForwarding = true; + if (Bits[ARM::FeatureVirtualization]) HasVirtualization = true; + if (Bits[ARM::FeatureZCZeroing]) HasZeroCycleZeroing = true; + if (Bits[ARM::HasV4TOps]) HasV4TOps = true; + if (Bits[ARM::HasV5TEOps]) HasV5TEOps = true; + if (Bits[ARM::HasV5TOps]) HasV5TOps = true; + if (Bits[ARM::HasV6KOps]) HasV6KOps = true; + if (Bits[ARM::HasV6MOps]) HasV6MOps = true; + if (Bits[ARM::HasV6Ops]) HasV6Ops = true; + if (Bits[ARM::HasV6T2Ops]) HasV6T2Ops = true; + if (Bits[ARM::HasV7Ops]) HasV7Ops = true; + if (Bits[ARM::HasV8MBaselineOps]) HasV8MBaselineOps = true; + if (Bits[ARM::HasV8MMainlineOps]) HasV8MMainlineOps = true; + if (Bits[ARM::HasV8Ops]) HasV8Ops = true; + if (Bits[ARM::HasV8_1aOps]) HasV8_1aOps = true; + if (Bits[ARM::HasV8_2aOps]) HasV8_2aOps = true; + if (Bits[ARM::IWMMXT] && ARMArch < ARMv5te) ARMArch = ARMv5te; + if (Bits[ARM::IWMMXT2] && ARMArch < ARMv5te) ARMArch = ARMv5te; + if (Bits[ARM::ModeSoftFloat]) UseSoftFloat = true; + if (Bits[ARM::ModeThumb]) InThumbMode = true; + if (Bits[ARM::ProcA5] && ARMProcFamily < CortexA5) ARMProcFamily = CortexA5; + if (Bits[ARM::ProcA7] && ARMProcFamily < CortexA7) ARMProcFamily = CortexA7; + if (Bits[ARM::ProcA8] && ARMProcFamily < CortexA8) ARMProcFamily = CortexA8; + if (Bits[ARM::ProcA9] && ARMProcFamily < CortexA9) ARMProcFamily = CortexA9; + if (Bits[ARM::ProcA12] && ARMProcFamily < CortexA12) ARMProcFamily = CortexA12; + if (Bits[ARM::ProcA15] && ARMProcFamily < CortexA15) ARMProcFamily = CortexA15; + if (Bits[ARM::ProcA17] && ARMProcFamily < CortexA17) ARMProcFamily = CortexA17; + if (Bits[ARM::ProcA35] && ARMProcFamily < CortexA35) ARMProcFamily = CortexA35; + if (Bits[ARM::ProcA53] && ARMProcFamily < CortexA53) ARMProcFamily = CortexA53; + if (Bits[ARM::ProcA57] && ARMProcFamily < CortexA57) ARMProcFamily = CortexA57; + if (Bits[ARM::ProcA72] && ARMProcFamily < CortexA72) ARMProcFamily = CortexA72; + if (Bits[ARM::ProcExynosM1] && ARMProcFamily < ExynosM1) ARMProcFamily = ExynosM1; + if (Bits[ARM::ProcKrait] && ARMProcFamily < Krait) ARMProcFamily = Krait; + if (Bits[ARM::ProcR4] && ARMProcFamily < CortexR4) ARMProcFamily = CortexR4; + if (Bits[ARM::ProcR5] && ARMProcFamily < CortexR5) ARMProcFamily = CortexR5; + if (Bits[ARM::ProcR7] && ARMProcFamily < CortexR7) ARMProcFamily = CortexR7; + if (Bits[ARM::ProcSwift] && ARMProcFamily < Swift) ARMProcFamily = Swift; + if (Bits[ARM::XScale] && ARMArch < ARMv5te) ARMArch = ARMv5te; +} +#endif // GET_SUBTARGETINFO_TARGET_DESC diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp new file mode 100644 index 0000000..4ed749f --- /dev/null +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -0,0 +1,10344 @@ +//===-- ARMAsmParser.cpp - Parse ARM assembly to MCInst instructions ------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "ARMFeatures.h" +#include "MCTargetDesc/ARMAddressingModes.h" +#include "MCTargetDesc/ARMBaseInfo.h" +#include "MCTargetDesc/ARMMCExpr.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/StringExtras.h" +#include "llvm/ADT/StringSwitch.h" +#include "llvm/ADT/Triple.h" +#include "llvm/ADT/Twine.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCAssembler.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCELFStreamer.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCInst.h" +#include "llvm/MC/MCInstrDesc.h" +#include "llvm/MC/MCInstrInfo.h" +#include "llvm/MC/MCObjectFileInfo.h" +#include "llvm/MC/MCParser/MCAsmLexer.h" +#include "llvm/MC/MCParser/MCAsmParser.h" +#include "llvm/MC/MCParser/MCAsmParserUtils.h" +#include "llvm/MC/MCParser/MCParsedAsmOperand.h" +#include "llvm/MC/MCParser/MCTargetAsmParser.h" +#include "llvm/MC/MCRegisterInfo.h" +#include "llvm/MC/MCSection.h" +#include "llvm/MC/MCStreamer.h" +#include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/Support/ARMBuildAttributes.h" +#include "llvm/Support/ARMEHABI.h" +#include "llvm/Support/COFF.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/ELF.h" +#include "llvm/Support/MathExtras.h" +#include "llvm/Support/SourceMgr.h" +#include "llvm/Support/TargetParser.h" +#include "llvm/Support/TargetRegistry.h" +#include "llvm/Support/raw_ostream.h" + +#include "keystone/arm.h" + +using namespace llvm_ks; + +namespace { + +class ARMOperand; + +enum VectorLaneTy { NoLanes, AllLanes, IndexedLane }; + +class UnwindContext { + MCAsmParser &Parser; + + typedef SmallVector Locs; + + Locs FnStartLocs; + Locs CantUnwindLocs; + Locs PersonalityLocs; + Locs PersonalityIndexLocs; + Locs HandlerDataLocs; + int FPReg; + +public: + UnwindContext(MCAsmParser &P) : Parser(P), FPReg(ARM::SP) {} + + bool hasFnStart() const { return !FnStartLocs.empty(); } + bool cantUnwind() const { return !CantUnwindLocs.empty(); } + bool hasHandlerData() const { return !HandlerDataLocs.empty(); } + bool hasPersonality() const { + return !(PersonalityLocs.empty() && PersonalityIndexLocs.empty()); + } + + void recordFnStart(SMLoc L) { FnStartLocs.push_back(L); } + void recordCantUnwind(SMLoc L) { CantUnwindLocs.push_back(L); } + void recordPersonality(SMLoc L) { PersonalityLocs.push_back(L); } + void recordHandlerData(SMLoc L) { HandlerDataLocs.push_back(L); } + void recordPersonalityIndex(SMLoc L) { PersonalityIndexLocs.push_back(L); } + + void saveFPReg(int Reg) { FPReg = Reg; } + int getFPReg() const { return FPReg; } + + void emitFnStartLocNotes() const { + for (Locs::const_iterator FI = FnStartLocs.begin(), FE = FnStartLocs.end(); + FI != FE; ++FI) + Parser.Note(*FI, ".fnstart was specified here"); + } + void emitCantUnwindLocNotes() const { + for (Locs::const_iterator UI = CantUnwindLocs.begin(), + UE = CantUnwindLocs.end(); UI != UE; ++UI) + Parser.Note(*UI, ".cantunwind was specified here"); + } + void emitHandlerDataLocNotes() const { + for (Locs::const_iterator HI = HandlerDataLocs.begin(), + HE = HandlerDataLocs.end(); HI != HE; ++HI) + Parser.Note(*HI, ".handlerdata was specified here"); + } + void emitPersonalityLocNotes() const { + for (Locs::const_iterator PI = PersonalityLocs.begin(), + PE = PersonalityLocs.end(), + PII = PersonalityIndexLocs.begin(), + PIE = PersonalityIndexLocs.end(); + PI != PE || PII != PIE;) { + if (PI != PE && (PII == PIE || PI->getPointer() < PII->getPointer())) + Parser.Note(*PI++, ".personality was specified here"); + else if (PII != PIE && (PI == PE || PII->getPointer() < PI->getPointer())) + Parser.Note(*PII++, ".personalityindex was specified here"); + else + llvm_unreachable(".personality and .personalityindex cannot be " + "at the same location"); + } + } + + void reset() { + FnStartLocs = Locs(); + CantUnwindLocs = Locs(); + PersonalityLocs = Locs(); + HandlerDataLocs = Locs(); + PersonalityIndexLocs = Locs(); + FPReg = ARM::SP; + } +}; + +class ARMAsmParser : public MCTargetAsmParser { + const MCInstrInfo &MII; + const MCRegisterInfo *MRI; + UnwindContext UC; + + ARMTargetStreamer &getTargetStreamer() { + assert(getParser().getStreamer().getTargetStreamer() && + "do not have a target streamer"); + MCTargetStreamer &TS = *getParser().getStreamer().getTargetStreamer(); + return static_cast(TS); + } + + // Map of register aliases registers via the .req directive. + StringMap RegisterReqs; + + bool NextSymbolIsThumb; + + struct { + ARMCC::CondCodes Cond; // Condition for IT block. + unsigned Mask:4; // Condition mask for instructions. + // Starting at first 1 (from lsb). + // '1' condition as indicated in IT. + // '0' inverse of condition (else). + // Count of instructions in IT block is + // 4 - trailingzeroes(mask) + + bool FirstCond; // Explicit flag for when we're parsing the + // First instruction in the IT block. It's + // implied in the mask, so needs special + // handling. + + unsigned CurPosition; // Current position in parsing of IT + // block. In range [0,3]. Initialized + // according to count of instructions in block. + // ~0U if no active IT block. + } ITState; + bool inITBlock() { return ITState.CurPosition != ~0U; } + bool lastInITBlock() { + return ITState.CurPosition == 4 - countTrailingZeros(ITState.Mask); + } + void forwardITPosition() { + if (!inITBlock()) return; + // Move to the next instruction in the IT block, if there is one. If not, + // mark the block as done. + unsigned TZ = countTrailingZeros(ITState.Mask); + if (++ITState.CurPosition == 5 - TZ) + ITState.CurPosition = ~0U; // Done with the IT block after this. + } + + void Note(SMLoc L, const Twine &Msg, ArrayRef Ranges = None) { + return getParser().Note(L, Msg, Ranges); + } + bool Warning(SMLoc L, const Twine &Msg, + ArrayRef Ranges = None) { + return getParser().Warning(L, Msg, Ranges); + } + //bool Error(SMLoc L, const Twine &Msg, + // ArrayRef Ranges = None) { + // return getParser().Error(L, Msg, Ranges); + //} + + bool validatetLDMRegList(const MCInst &Inst, const OperandVector &Operands, + unsigned ListNo, bool IsARPop = false); + bool validatetSTMRegList(const MCInst &Inst, const OperandVector &Operands, + unsigned ListNo); + + int tryParseRegister(); + bool tryParseRegisterWithWriteBack(OperandVector &); + int tryParseShiftRegister(OperandVector &); + bool parseRegisterList(OperandVector &); + bool parseMemory(OperandVector &); + bool parseOperand(OperandVector &, StringRef Mnemonic, unsigned int &ErrorCode); + bool parsePrefix(ARMMCExpr::VariantKind &RefKind); + bool parseMemRegOffsetShift(ARM_AM::ShiftOpc &ShiftType, + unsigned &ShiftAmount); + bool parseLiteralValues(unsigned Size, SMLoc L); + bool parseDirectiveThumb(SMLoc L); + bool parseDirectiveARM(SMLoc L); + bool parseDirectiveThumbFunc(SMLoc L); + bool parseDirectiveCode(SMLoc L); + bool parseDirectiveSyntax(SMLoc L); + bool parseDirectiveReq(StringRef Name, SMLoc L); + bool parseDirectiveUnreq(SMLoc L); + bool parseDirectiveArch(SMLoc L); + bool parseDirectiveEabiAttr(SMLoc L); + bool parseDirectiveCPU(SMLoc L); + bool parseDirectiveFPU(SMLoc L); + bool parseDirectiveFnStart(SMLoc L); + bool parseDirectiveFnEnd(SMLoc L); + bool parseDirectiveCantUnwind(SMLoc L); + bool parseDirectivePersonality(SMLoc L); + bool parseDirectiveHandlerData(SMLoc L); + bool parseDirectiveSetFP(SMLoc L); + bool parseDirectivePad(SMLoc L); + bool parseDirectiveRegSave(SMLoc L, bool IsVector); + bool parseDirectiveInst(SMLoc L, char Suffix = '\0'); + bool parseDirectiveLtorg(SMLoc L); + bool parseDirectiveEven(SMLoc L); + bool parseDirectivePersonalityIndex(SMLoc L); + bool parseDirectiveUnwindRaw(SMLoc L); + bool parseDirectiveTLSDescSeq(SMLoc L); + bool parseDirectiveMovSP(SMLoc L); + bool parseDirectiveObjectArch(SMLoc L); + bool parseDirectiveArchExtension(SMLoc L); + bool parseDirectiveAlign(SMLoc L); + bool parseDirectiveThumbSet(SMLoc L); + + StringRef splitMnemonic(StringRef Mnemonic, unsigned &PredicationCode, + bool &CarrySetting, unsigned &ProcessorIMod, + StringRef &ITMask); + void getMnemonicAcceptInfo(StringRef Mnemonic, StringRef FullInst, + bool &CanAcceptCarrySet, + bool &CanAcceptPredicationCode); + + void tryConvertingToTwoOperandForm(StringRef Mnemonic, bool CarrySetting, + OperandVector &Operands); + bool isThumb() const { + // FIXME: Can tablegen auto-generate this? + return getSTI().getFeatureBits()[ARM::ModeThumb]; + } + bool isThumbOne() const { + return isThumb() && !getSTI().getFeatureBits()[ARM::FeatureThumb2]; + } + bool isThumbTwo() const { + return isThumb() && getSTI().getFeatureBits()[ARM::FeatureThumb2]; + } + bool hasThumb() const { + return getSTI().getFeatureBits()[ARM::HasV4TOps]; + } + bool hasV6Ops() const { + return getSTI().getFeatureBits()[ARM::HasV6Ops]; + } + bool hasV6MOps() const { + return getSTI().getFeatureBits()[ARM::HasV6MOps]; + } + bool hasV7Ops() const { + return getSTI().getFeatureBits()[ARM::HasV7Ops]; + } + bool hasV8Ops() const { + return getSTI().getFeatureBits()[ARM::HasV8Ops]; + } + bool hasV8MBaseline() const { + return getSTI().getFeatureBits()[ARM::HasV8MBaselineOps]; + } + bool hasV8MMainline() const { + return getSTI().getFeatureBits()[ARM::HasV8MMainlineOps]; + } + bool has8MSecExt() const { + return getSTI().getFeatureBits()[ARM::Feature8MSecExt]; + } + bool hasARM() const { + return !getSTI().getFeatureBits()[ARM::FeatureNoARM]; + } + bool hasDSP() const { + return getSTI().getFeatureBits()[ARM::FeatureDSP]; + } + bool hasD16() const { + return getSTI().getFeatureBits()[ARM::FeatureD16]; + } + bool hasV8_1aOps() const { + return getSTI().getFeatureBits()[ARM::HasV8_1aOps]; + } + + void SwitchMode() { + MCSubtargetInfo &STI = copySTI(); + uint64_t FB = ComputeAvailableFeatures(STI.ToggleFeature(ARM::ModeThumb)); + setAvailableFeatures(FB); + } + bool isMClass() const { + return getSTI().getFeatureBits()[ARM::FeatureMClass]; + } + + /// @name Auto-generated Match Functions + /// { + +#define GET_ASSEMBLER_HEADER +#include "ARMGenAsmMatcher.inc" + + /// } + + OperandMatchResultTy parseITCondCode(OperandVector &, unsigned int &ErrorCode); + OperandMatchResultTy parseCoprocNumOperand(OperandVector &, unsigned int &ErrorCode); + OperandMatchResultTy parseCoprocRegOperand(OperandVector &, unsigned int &ErrorCode); + OperandMatchResultTy parseCoprocOptionOperand(OperandVector &, unsigned int &ErrorCode); + OperandMatchResultTy parseMemBarrierOptOperand(OperandVector &, unsigned int &ErrorCode); + OperandMatchResultTy parseInstSyncBarrierOptOperand(OperandVector &, unsigned int &ErrorCode); + OperandMatchResultTy parseProcIFlagsOperand(OperandVector &, unsigned int &ErrorCode); + OperandMatchResultTy parseMSRMaskOperand(OperandVector &, unsigned int &ErrorCode); + OperandMatchResultTy parseBankedRegOperand(OperandVector &, unsigned int &ErrorCode); + OperandMatchResultTy parsePKHImm(OperandVector &O, StringRef Op, int Low, + int High, unsigned int &ErrorCode); + OperandMatchResultTy parsePKHLSLImm(OperandVector &O, unsigned int &ErrorCode) { + return parsePKHImm(O, "lsl", 0, 31, ErrorCode); + } + OperandMatchResultTy parsePKHASRImm(OperandVector &O, unsigned int &ErrorCode) { + return parsePKHImm(O, "asr", 1, 32, ErrorCode); + } + OperandMatchResultTy parseSetEndImm(OperandVector &, unsigned int &ErrorCode); + OperandMatchResultTy parseShifterImm(OperandVector &, unsigned int &ErrorCode); + OperandMatchResultTy parseRotImm(OperandVector &, unsigned int &ErrorCode); + OperandMatchResultTy parseModImm(OperandVector &, unsigned int &ErrorCode); + OperandMatchResultTy parseBitfield(OperandVector &, unsigned int &ErrorCode); + OperandMatchResultTy parsePostIdxReg(OperandVector &, unsigned int &ErrorCode); + OperandMatchResultTy parseAM3Offset(OperandVector &, unsigned int &ErrorCode); + OperandMatchResultTy parseFPImm(OperandVector &, unsigned int &ErrorCode); + OperandMatchResultTy parseVectorList(OperandVector &, unsigned int &ErrorCode); + OperandMatchResultTy parseVectorLane(VectorLaneTy &LaneKind, unsigned &Index, + SMLoc &EndLoc, unsigned int &ErrorCode); + + // Asm Match Converter Methods + void cvtThumbMultiply(MCInst &Inst, const OperandVector &); + void cvtThumbBranches(MCInst &Inst, const OperandVector &); + + bool validateInstruction(MCInst &Inst, const OperandVector &Ops); + bool processInstruction(MCInst &Inst, const OperandVector &Ops, MCStreamer &Out); + bool shouldOmitCCOutOperand(StringRef Mnemonic, OperandVector &Operands); + bool shouldOmitPredicateOperand(StringRef Mnemonic, OperandVector &Operands); + +public: + enum ARMMatchResultTy { + Match_RequiresITBlock = FIRST_TARGET_MATCH_RESULT_TY, + Match_RequiresNotITBlock, + Match_RequiresV6, + Match_RequiresThumb2, + Match_RequiresV8, +#define GET_OPERAND_DIAGNOSTIC_TYPES +#include "ARMGenAsmMatcher.inc" + + }; + + ARMAsmParser(const MCSubtargetInfo &STI, MCAsmParser &Parser, + const MCInstrInfo &MII, const MCTargetOptions &Options) + : MCTargetAsmParser(Options, STI), MII(MII), UC(Parser) { + MCAsmParserExtension::Initialize(Parser); + + MCStreamer &S = getParser().getStreamer(); + if (S.getTargetStreamer() == nullptr) + new ARMTargetStreamer(S); + + // Cache the MCRegisterInfo. + MRI = getContext().getRegisterInfo(); + + // Initialize the set of available features. + setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits())); + + // Not in an ITBlock to start with. + ITState.CurPosition = ~0U; + + NextSymbolIsThumb = false; + } + + // Implementation of the MCTargetAsmParser interface: + bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc, unsigned int &ErrorCode) override; + bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, + SMLoc NameLoc, OperandVector &Operands, unsigned int &ErrorCode) override; + bool ParseDirective(AsmToken DirectiveID) override; + + unsigned validateTargetOperandClass(MCParsedAsmOperand &Op, + unsigned Kind) override; + unsigned checkTargetMatchPredicate(MCInst &Inst) override; + + bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, + OperandVector &Operands, MCStreamer &Out, + uint64_t &ErrorInfo, + bool MatchingInlineAsm, unsigned int &ErrorCode, uint64_t &Address) override; + void onLabelParsed(MCSymbol *Symbol) override; +}; +} // end anonymous namespace + +namespace { + +/// ARMOperand - Instances of this class represent a parsed ARM machine +/// operand. +class ARMOperand : public MCParsedAsmOperand { + enum KindTy { + k_CondCode, + k_CCOut, + k_ITCondMask, + k_CoprocNum, + k_CoprocReg, + k_CoprocOption, + k_Immediate, + k_MemBarrierOpt, + k_InstSyncBarrierOpt, + k_Memory, + k_PostIndexRegister, + k_MSRMask, + k_BankedReg, + k_ProcIFlags, + k_VectorIndex, + k_Register, + k_RegisterList, + k_DPRRegisterList, + k_SPRRegisterList, + k_VectorList, + k_VectorListAllLanes, + k_VectorListIndexed, + k_ShiftedRegister, + k_ShiftedImmediate, + k_ShifterImmediate, + k_RotateImmediate, + k_ModifiedImmediate, + k_BitfieldDescriptor, + k_Token + } Kind; + + SMLoc StartLoc, EndLoc, AlignmentLoc; + SmallVector Registers; + + struct CCOp { + ARMCC::CondCodes Val; + }; + + struct CopOp { + unsigned Val; + }; + + struct CoprocOptionOp { + unsigned Val; + }; + + struct ITMaskOp { + unsigned Mask:4; + }; + + struct MBOptOp { + ARM_MB::MemBOpt Val; + }; + + struct ISBOptOp { + ARM_ISB::InstSyncBOpt Val; + }; + + struct IFlagsOp { + ARM_PROC::IFlags Val; + }; + + struct MMaskOp { + unsigned Val; + }; + + struct BankedRegOp { + unsigned Val; + }; + + struct TokOp { + const char *Data; + unsigned Length; + }; + + struct RegOp { + unsigned RegNum; + }; + + // A vector register list is a sequential list of 1 to 4 registers. + struct VectorListOp { + unsigned RegNum; + unsigned Count; + unsigned LaneIndex; + bool isDoubleSpaced; + }; + + struct VectorIndexOp { + unsigned Val; + }; + + struct ImmOp { + const MCExpr *Val; + }; + + /// Combined record for all forms of ARM address expressions. + struct MemoryOp { + unsigned BaseRegNum; + // Offset is in OffsetReg or OffsetImm. If both are zero, no offset + // was specified. + const MCConstantExpr *OffsetImm; // Offset immediate value + unsigned OffsetRegNum; // Offset register num, when OffsetImm == NULL + ARM_AM::ShiftOpc ShiftType; // Shift type for OffsetReg + unsigned ShiftImm; // shift for OffsetReg. + unsigned Alignment; // 0 = no alignment specified + // n = alignment in bytes (2, 4, 8, 16, or 32) + unsigned isNegative : 1; // Negated OffsetReg? (~'U' bit) + }; + + struct PostIdxRegOp { + unsigned RegNum; + bool isAdd; + ARM_AM::ShiftOpc ShiftTy; + unsigned ShiftImm; + }; + + struct ShifterImmOp { + bool isASR; + unsigned Imm; + }; + + struct RegShiftedRegOp { + ARM_AM::ShiftOpc ShiftTy; + unsigned SrcReg; + unsigned ShiftReg; + unsigned ShiftImm; + }; + + struct RegShiftedImmOp { + ARM_AM::ShiftOpc ShiftTy; + unsigned SrcReg; + unsigned ShiftImm; + }; + + struct RotImmOp { + unsigned Imm; + }; + + struct ModImmOp { + unsigned Bits; + unsigned Rot; + }; + + struct BitfieldOp { + unsigned LSB; + unsigned Width; + }; + + union { + struct CCOp CC; + struct CopOp Cop; + struct CoprocOptionOp CoprocOption; + struct MBOptOp MBOpt; + struct ISBOptOp ISBOpt; + struct ITMaskOp ITMask; + struct IFlagsOp IFlags; + struct MMaskOp MMask; + struct BankedRegOp BankedReg; + struct TokOp Tok; + struct RegOp Reg; + struct VectorListOp VectorList; + struct VectorIndexOp VectorIndex; + struct ImmOp Imm; + struct MemoryOp Memory; + struct PostIdxRegOp PostIdxReg; + struct ShifterImmOp ShifterImm; + struct RegShiftedRegOp RegShiftedReg; + struct RegShiftedImmOp RegShiftedImm; + struct RotImmOp RotImm; + struct ModImmOp ModImm; + struct BitfieldOp Bitfield; + }; + +public: + ARMOperand(KindTy K) : MCParsedAsmOperand(), Kind(K) {} + + /// getStartLoc - Get the location of the first token of this operand. + SMLoc getStartLoc() const override { return StartLoc; } + /// getEndLoc - Get the location of the last token of this operand. + SMLoc getEndLoc() const override { return EndLoc; } + /// getLocRange - Get the range between the first and last token of this + /// operand. + SMRange getLocRange() const { return SMRange(StartLoc, EndLoc); } + + /// getAlignmentLoc - Get the location of the Alignment token of this operand. + SMLoc getAlignmentLoc() const { + assert(Kind == k_Memory && "Invalid access!"); + return AlignmentLoc; + } + + ARMCC::CondCodes getCondCode() const { + assert(Kind == k_CondCode && "Invalid access!"); + return CC.Val; + } + + unsigned getCoproc() const { + assert((Kind == k_CoprocNum || Kind == k_CoprocReg) && "Invalid access!"); + return Cop.Val; + } + + StringRef getToken() const { + assert(Kind == k_Token && "Invalid access!"); + return StringRef(Tok.Data, Tok.Length); + } + + unsigned getReg() const override { + assert((Kind == k_Register || Kind == k_CCOut) && "Invalid access!"); + return Reg.RegNum; + } + + const SmallVectorImpl &getRegList() const { + assert((Kind == k_RegisterList || Kind == k_DPRRegisterList || + Kind == k_SPRRegisterList) && "Invalid access!"); + return Registers; + } + + const MCExpr *getImm() const { + assert(isImm() && "Invalid access!"); + return Imm.Val; + } + + unsigned getVectorIndex() const { + assert(Kind == k_VectorIndex && "Invalid access!"); + return VectorIndex.Val; + } + + ARM_MB::MemBOpt getMemBarrierOpt() const { + assert(Kind == k_MemBarrierOpt && "Invalid access!"); + return MBOpt.Val; + } + + ARM_ISB::InstSyncBOpt getInstSyncBarrierOpt() const { + assert(Kind == k_InstSyncBarrierOpt && "Invalid access!"); + return ISBOpt.Val; + } + + ARM_PROC::IFlags getProcIFlags() const { + assert(Kind == k_ProcIFlags && "Invalid access!"); + return IFlags.Val; + } + + unsigned getMSRMask() const { + assert(Kind == k_MSRMask && "Invalid access!"); + return MMask.Val; + } + + unsigned getBankedReg() const { + assert(Kind == k_BankedReg && "Invalid access!"); + return BankedReg.Val; + } + + bool isCoprocNum() const { return Kind == k_CoprocNum; } + bool isCoprocReg() const { return Kind == k_CoprocReg; } + bool isCoprocOption() const { return Kind == k_CoprocOption; } + bool isCondCode() const { return Kind == k_CondCode; } + bool isCCOut() const { return Kind == k_CCOut; } + bool isITMask() const { return Kind == k_ITCondMask; } + bool isITCondCode() const { return Kind == k_CondCode; } + bool isImm() const override { return Kind == k_Immediate; } + // checks whether this operand is an unsigned offset which fits is a field + // of specified width and scaled by a specific number of bits + template + bool isUnsignedOffset() const { + if (!isImm()) return false; + if (isa(Imm.Val)) return true; + if (const MCConstantExpr *CE = dyn_cast(Imm.Val)) { + int64_t Val = CE->getValue(); + int64_t Align = 1LL << scale; + int64_t Max = Align * ((1LL << width) - 1); + return ((Val % Align) == 0) && (Val >= 0) && (Val <= Max); + } + return false; + } + // checks whether this operand is an signed offset which fits is a field + // of specified width and scaled by a specific number of bits + template + bool isSignedOffset() const { + if (!isImm()) return false; + if (isa(Imm.Val)) return true; + if (const MCConstantExpr *CE = dyn_cast(Imm.Val)) { + int64_t Val = CE->getValue(); + int64_t Align = 1LL << scale; + int64_t Max = Align * ((1LL << (width-1)) - 1); + int64_t Min = -Align * (1LL << (width-1)); + return ((Val % Align) == 0) && (Val >= Min) && (Val <= Max); + } + return false; + } + // checks whether this operand is an signed offset relative to an address + // which fits is a field of specified width and scaled by a specific number + // of bits + template + bool isSignedOffsetRel(int64_t Addr) const { + if (!isImm()) return false; + if (isa(Imm.Val)) return true; + if (const MCConstantExpr *CE = dyn_cast(Imm.Val)) { + int64_t Val = CE->getValue() - Addr; + int64_t Align = 1LL << scale; + int64_t Max = Align * ((1LL << (width-1)) - 1); + int64_t Min = -Align * (1LL << (width-1)); + return ((Val % Align) == 0) && (Val >= Min) && (Val <= Max); + } + return false; + } + + // checks whether this operand is a memory operand computed as an offset + // applied to PC. the offset may have 8 bits of magnitude and is represented + // with two bits of shift. textually it may be either [pc, #imm], #imm or + // relocable expression... + bool isThumbMemPC() const { + int64_t Val = 0; + if (isImm()) { + if (isa(Imm.Val)) return true; + const MCConstantExpr *CE = dyn_cast(Imm.Val); + if (!CE) return false; + Val = CE->getValue(); + } + else if (isMem()) { + if(!Memory.OffsetImm || Memory.OffsetRegNum) return false; + if(Memory.BaseRegNum != ARM::PC) return false; + Val = Memory.OffsetImm->getValue(); + } + else return false; + return ((Val % 4) == 0) && (Val >= 0) && (Val <= 1020); + } + bool isFPImm() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int Val = ARM_AM::getFP32Imm(APInt(32, CE->getValue())); + return Val != -1; + } + bool isFBits16() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value >= 0 && Value <= 16; + } + bool isFBits32() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value >= 1 && Value <= 32; + } + bool isImm8s4() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return ((Value & 3) == 0) && Value >= -1020 && Value <= 1020; + } + bool isImm0_1020s4() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return ((Value & 3) == 0) && Value >= 0 && Value <= 1020; + } + bool isImm0_508s4() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return ((Value & 3) == 0) && Value >= 0 && Value <= 508; + } + bool isImm0_508s4Neg() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = -CE->getValue(); + // explicitly exclude zero. we want that to use the normal 0_508 version. + return ((Value & 3) == 0) && Value > 0 && Value <= 508; + } + bool isImm0_239() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value >= 0 && Value < 240; + } + bool isImm0_255() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value >= 0 && Value < 256; + } + bool isImm0_4095() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value >= 0 && Value < 4096; + } + bool isImm0_4095Neg() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = -CE->getValue(); + return Value > 0 && Value < 4096; + } + bool isImm0_1() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value >= 0 && Value < 2; + } + bool isImm0_3() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value >= 0 && Value < 4; + } + bool isImm0_7() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value >= 0 && Value < 8; + } + bool isImm0_15() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value >= 0 && Value < 16; + } + bool isImm0_31() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value >= 0 && Value < 32; + } + bool isImm0_63() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value >= 0 && Value < 64; + } + bool isImm8() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value == 8; + } + bool isImm16() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value == 16; + } + bool isImm32() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value == 32; + } + bool isShrImm8() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value > 0 && Value <= 8; + } + bool isShrImm16() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value > 0 && Value <= 16; + } + bool isShrImm32() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value > 0 && Value <= 32; + } + bool isShrImm64() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value > 0 && Value <= 64; + } + bool isImm1_7() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value > 0 && Value < 8; + } + bool isImm1_15() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value > 0 && Value < 16; + } + bool isImm1_31() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value > 0 && Value < 32; + } + bool isImm1_16() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value > 0 && Value < 17; + } + bool isImm1_32() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value > 0 && Value < 33; + } + bool isImm0_32() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value >= 0 && Value < 33; + } + bool isImm0_65535() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value >= 0 && Value < 65536; + } + bool isImm256_65535Expr() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + // If it's not a constant expression, it'll generate a fixup and be + // handled later. + if (!CE) return true; + int64_t Value = CE->getValue(); + return Value >= 256 && Value < 65536; + } + bool isImm0_65535Expr() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + // If it's not a constant expression, it'll generate a fixup and be + // handled later. + if (!CE) return true; + int64_t Value = CE->getValue(); + return Value >= 0 && Value < 65536; + } + bool isImm24bit() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value >= 0 && Value <= 0xffffff; + } + bool isImmThumbSR() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value > 0 && Value < 33; + } + bool isPKHLSLImm() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value >= 0 && Value < 32; + } + bool isPKHASRImm() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value > 0 && Value <= 32; + } + bool isAdrLabel() const { + // If we have an immediate that's not a constant, treat it as a label + // reference needing a fixup. + if (isImm() && !isa(getImm())) + return true; + + // If it is a constant, it must fit into a modified immediate encoding. + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return (ARM_AM::getSOImmVal(Value) != -1 || + ARM_AM::getSOImmVal(-Value) != -1); + } + bool isT2SOImm() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return ARM_AM::getT2SOImmVal(Value) != -1; + } + bool isT2SOImmNot() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return ARM_AM::getT2SOImmVal(Value) == -1 && + ARM_AM::getT2SOImmVal(~Value) != -1; + } + bool isT2SOImmNeg() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + // Only use this when not representable as a plain so_imm. + return ARM_AM::getT2SOImmVal(Value) == -1 && + ARM_AM::getT2SOImmVal(-Value) != -1; + } + bool isSetEndImm() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return Value == 1 || Value == 0; + } + bool isReg() const override { return Kind == k_Register; } + bool isRegList() const { return Kind == k_RegisterList; } + bool isDPRRegList() const { return Kind == k_DPRRegisterList; } + bool isSPRRegList() const { return Kind == k_SPRRegisterList; } + bool isToken() const override { return Kind == k_Token; } + bool isMemBarrierOpt() const { return Kind == k_MemBarrierOpt; } + bool isInstSyncBarrierOpt() const { return Kind == k_InstSyncBarrierOpt; } + bool isMem() const override { return Kind == k_Memory; } + bool isShifterImm() const { return Kind == k_ShifterImmediate; } + bool isRegShiftedReg() const { return Kind == k_ShiftedRegister; } + bool isRegShiftedImm() const { return Kind == k_ShiftedImmediate; } + bool isRotImm() const { return Kind == k_RotateImmediate; } + bool isModImm() const { return Kind == k_ModifiedImmediate; } + bool isModImmNot() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return ARM_AM::getSOImmVal(~Value) != -1; + } + bool isModImmNeg() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Value = CE->getValue(); + return ARM_AM::getSOImmVal(Value) == -1 && + ARM_AM::getSOImmVal(-Value) != -1; + } + bool isBitfield() const { return Kind == k_BitfieldDescriptor; } + bool isPostIdxRegShifted() const { return Kind == k_PostIndexRegister; } + bool isPostIdxReg() const { + return Kind == k_PostIndexRegister && PostIdxReg.ShiftTy ==ARM_AM::no_shift; + } + bool isMemNoOffset(bool alignOK = false, unsigned Alignment = 0) const { + if (!isMem()) + return false; + // No offset of any kind. + return Memory.OffsetRegNum == 0 && Memory.OffsetImm == nullptr && + (alignOK || Memory.Alignment == Alignment); + } + bool isMemPCRelImm12() const { + if (!isMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0) + return false; + // Base register must be PC. + if (Memory.BaseRegNum != ARM::PC) + return false; + // Immediate offset in range [-4095, 4095]. + if (!Memory.OffsetImm) return true; + int64_t Val = Memory.OffsetImm->getValue(); + return (Val > -4096 && Val < 4096) || (Val == INT32_MIN); + } + bool isAlignedMemory() const { + return isMemNoOffset(true); + } + bool isAlignedMemoryNone() const { + return isMemNoOffset(false, 0); + } + bool isDupAlignedMemoryNone() const { + return isMemNoOffset(false, 0); + } + bool isAlignedMemory16() const { + if (isMemNoOffset(false, 2)) // alignment in bytes for 16-bits is 2. + return true; + return isMemNoOffset(false, 0); + } + bool isDupAlignedMemory16() const { + if (isMemNoOffset(false, 2)) // alignment in bytes for 16-bits is 2. + return true; + return isMemNoOffset(false, 0); + } + bool isAlignedMemory32() const { + if (isMemNoOffset(false, 4)) // alignment in bytes for 32-bits is 4. + return true; + return isMemNoOffset(false, 0); + } + bool isDupAlignedMemory32() const { + if (isMemNoOffset(false, 4)) // alignment in bytes for 32-bits is 4. + return true; + return isMemNoOffset(false, 0); + } + bool isAlignedMemory64() const { + if (isMemNoOffset(false, 8)) // alignment in bytes for 64-bits is 8. + return true; + return isMemNoOffset(false, 0); + } + bool isDupAlignedMemory64() const { + if (isMemNoOffset(false, 8)) // alignment in bytes for 64-bits is 8. + return true; + return isMemNoOffset(false, 0); + } + bool isAlignedMemory64or128() const { + if (isMemNoOffset(false, 8)) // alignment in bytes for 64-bits is 8. + return true; + if (isMemNoOffset(false, 16)) // alignment in bytes for 128-bits is 16. + return true; + return isMemNoOffset(false, 0); + } + bool isDupAlignedMemory64or128() const { + if (isMemNoOffset(false, 8)) // alignment in bytes for 64-bits is 8. + return true; + if (isMemNoOffset(false, 16)) // alignment in bytes for 128-bits is 16. + return true; + return isMemNoOffset(false, 0); + } + bool isAlignedMemory64or128or256() const { + if (isMemNoOffset(false, 8)) // alignment in bytes for 64-bits is 8. + return true; + if (isMemNoOffset(false, 16)) // alignment in bytes for 128-bits is 16. + return true; + if (isMemNoOffset(false, 32)) // alignment in bytes for 256-bits is 32. + return true; + return isMemNoOffset(false, 0); + } + bool isAddrMode2() const { + if (!isMem() || Memory.Alignment != 0) return false; + // Check for register offset. + if (Memory.OffsetRegNum) return true; + // Immediate offset in range [-4095, 4095]. + if (!Memory.OffsetImm) return true; + int64_t Val = Memory.OffsetImm->getValue(); + return Val > -4096 && Val < 4096; + } + bool isAM2OffsetImm() const { + if (!isImm()) return false; + // Immediate offset in range [-4095, 4095]. + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Val = CE->getValue(); + return (Val == INT32_MIN) || (Val > -4096 && Val < 4096); + } + bool isAddrMode3() const { + // If we have an immediate that's not a constant, treat it as a label + // reference needing a fixup. If it is a constant, it's something else + // and we reject it. + if (isImm() && !isa(getImm())) + return true; + if (!isMem() || Memory.Alignment != 0) return false; + // No shifts are legal for AM3. + if (Memory.ShiftType != ARM_AM::no_shift) return false; + // Check for register offset. + if (Memory.OffsetRegNum) return true; + // Immediate offset in range [-255, 255]. + if (!Memory.OffsetImm) return true; + int64_t Val = Memory.OffsetImm->getValue(); + // The #-0 offset is encoded as INT32_MIN, and we have to check + // for this too. + return (Val > -256 && Val < 256) || Val == INT32_MIN; + } + bool isAM3Offset() const { + if (Kind != k_Immediate && Kind != k_PostIndexRegister) + return false; + if (Kind == k_PostIndexRegister) + return PostIdxReg.ShiftTy == ARM_AM::no_shift; + // Immediate offset in range [-255, 255]. + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Val = CE->getValue(); + // Special case, #-0 is INT32_MIN. + return (Val > -256 && Val < 256) || Val == INT32_MIN; + } + bool isAddrMode5() const { + // If we have an immediate that's not a constant, treat it as a label + // reference needing a fixup. If it is a constant, it's something else + // and we reject it. + if (isImm() && !isa(getImm())) + return true; + if (!isMem() || Memory.Alignment != 0) return false; + // Check for register offset. + if (Memory.OffsetRegNum) return false; + // Immediate offset in range [-1020, 1020] and a multiple of 4. + if (!Memory.OffsetImm) return true; + int64_t Val = Memory.OffsetImm->getValue(); + return (Val >= -1020 && Val <= 1020 && ((Val & 3) == 0)) || + Val == INT32_MIN; + } + bool isAddrMode5FP16() const { + // If we have an immediate that's not a constant, treat it as a label + // reference needing a fixup. If it is a constant, it's something else + // and we reject it. + if (isImm() && !isa(getImm())) + return true; + if (!isMem() || Memory.Alignment != 0) return false; + // Check for register offset. + if (Memory.OffsetRegNum) return false; + // Immediate offset in range [-510, 510] and a multiple of 2. + if (!Memory.OffsetImm) return true; + int64_t Val = Memory.OffsetImm->getValue(); + return (Val >= -510 && Val <= 510 && ((Val & 1) == 0)) || Val == INT32_MIN; + } + bool isMemTBB() const { + if (!isMem() || !Memory.OffsetRegNum || Memory.isNegative || + Memory.ShiftType != ARM_AM::no_shift || Memory.Alignment != 0) + return false; + return true; + } + bool isMemTBH() const { + if (!isMem() || !Memory.OffsetRegNum || Memory.isNegative || + Memory.ShiftType != ARM_AM::lsl || Memory.ShiftImm != 1 || + Memory.Alignment != 0 ) + return false; + return true; + } + bool isMemRegOffset() const { + if (!isMem() || !Memory.OffsetRegNum || Memory.Alignment != 0) + return false; + return true; + } + bool isT2MemRegOffset() const { + if (!isMem() || !Memory.OffsetRegNum || Memory.isNegative || + Memory.Alignment != 0) + return false; + // Only lsl #{0, 1, 2, 3} allowed. + if (Memory.ShiftType == ARM_AM::no_shift) + return true; + if (Memory.ShiftType != ARM_AM::lsl || Memory.ShiftImm > 3) + return false; + return true; + } + bool isMemThumbRR() const { + // Thumb reg+reg addressing is simple. Just two registers, a base and + // an offset. No shifts, negations or any other complicating factors. + if (!isMem() || !Memory.OffsetRegNum || Memory.isNegative || + Memory.ShiftType != ARM_AM::no_shift || Memory.Alignment != 0) + return false; + return isARMLowRegister(Memory.BaseRegNum) && + (!Memory.OffsetRegNum || isARMLowRegister(Memory.OffsetRegNum)); + } + bool isMemThumbRIs4() const { + if (!isMem() || Memory.OffsetRegNum != 0 || + !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0) + return false; + // Immediate offset, multiple of 4 in range [0, 124]. + if (!Memory.OffsetImm) return true; + int64_t Val = Memory.OffsetImm->getValue(); + return Val >= 0 && Val <= 124 && (Val % 4) == 0; + } + bool isMemThumbRIs2() const { + if (!isMem() || Memory.OffsetRegNum != 0 || + !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0) + return false; + // Immediate offset, multiple of 4 in range [0, 62]. + if (!Memory.OffsetImm) return true; + int64_t Val = Memory.OffsetImm->getValue(); + return Val >= 0 && Val <= 62 && (Val % 2) == 0; + } + bool isMemThumbRIs1() const { + if (!isMem() || Memory.OffsetRegNum != 0 || + !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0) + return false; + // Immediate offset in range [0, 31]. + if (!Memory.OffsetImm) return true; + int64_t Val = Memory.OffsetImm->getValue(); + return Val >= 0 && Val <= 31; + } + bool isMemThumbSPI() const { + if (!isMem() || Memory.OffsetRegNum != 0 || + Memory.BaseRegNum != ARM::SP || Memory.Alignment != 0) + return false; + // Immediate offset, multiple of 4 in range [0, 1020]. + if (!Memory.OffsetImm) return true; + int64_t Val = Memory.OffsetImm->getValue(); + return Val >= 0 && Val <= 1020 && (Val % 4) == 0; + } + bool isMemImm8s4Offset() const { + // If we have an immediate that's not a constant, treat it as a label + // reference needing a fixup. If it is a constant, it's something else + // and we reject it. + if (isImm() && !isa(getImm())) + return true; + if (!isMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0) + return false; + // Immediate offset a multiple of 4 in range [-1020, 1020]. + if (!Memory.OffsetImm) return true; + int64_t Val = Memory.OffsetImm->getValue(); + // Special case, #-0 is INT32_MIN. + return (Val >= -1020 && Val <= 1020 && (Val & 3) == 0) || Val == INT32_MIN; + } + bool isMemImm0_1020s4Offset() const { + if (!isMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0) + return false; + // Immediate offset a multiple of 4 in range [0, 1020]. + if (!Memory.OffsetImm) return true; + int64_t Val = Memory.OffsetImm->getValue(); + return Val >= 0 && Val <= 1020 && (Val & 3) == 0; + } + bool isMemImm8Offset() const { + if (!isMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0) + return false; + // Base reg of PC isn't allowed for these encodings. + if (Memory.BaseRegNum == ARM::PC) return false; + // Immediate offset in range [-255, 255]. + if (!Memory.OffsetImm) return true; + int64_t Val = Memory.OffsetImm->getValue(); + return (Val == INT32_MIN) || (Val > -256 && Val < 256); + } + bool isMemPosImm8Offset() const { + if (!isMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0) + return false; + // Immediate offset in range [0, 255]. + if (!Memory.OffsetImm) return true; + int64_t Val = Memory.OffsetImm->getValue(); + return Val >= 0 && Val < 256; + } + bool isMemNegImm8Offset() const { + if (!isMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0) + return false; + // Base reg of PC isn't allowed for these encodings. + if (Memory.BaseRegNum == ARM::PC) return false; + // Immediate offset in range [-255, -1]. + if (!Memory.OffsetImm) return false; + int64_t Val = Memory.OffsetImm->getValue(); + return (Val == INT32_MIN) || (Val > -256 && Val < 0); + } + bool isMemUImm12Offset() const { + if (!isMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0) + return false; + // Immediate offset in range [0, 4095]. + if (!Memory.OffsetImm) return true; + int64_t Val = Memory.OffsetImm->getValue(); + return (Val >= 0 && Val < 4096); + } + bool isMemImm12Offset() const { + // If we have an immediate that's not a constant, treat it as a label + // reference needing a fixup. If it is a constant, it's something else + // and we reject it. + if (isImm() && !isa(getImm())) + return true; + + if (!isMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0) + return false; + // Immediate offset in range [-4095, 4095]. + if (!Memory.OffsetImm) return true; + int64_t Val = Memory.OffsetImm->getValue(); + return (Val > -4096 && Val < 4096) || (Val == INT32_MIN); + } + bool isPostIdxImm8() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Val = CE->getValue(); + return (Val > -256 && Val < 256) || (Val == INT32_MIN); + } + bool isPostIdxImm8s4() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + if (!CE) return false; + int64_t Val = CE->getValue(); + return ((Val & 3) == 0 && Val >= -1020 && Val <= 1020) || + (Val == INT32_MIN); + } + + bool isMSRMask() const { return Kind == k_MSRMask; } + bool isBankedReg() const { return Kind == k_BankedReg; } + bool isProcIFlags() const { return Kind == k_ProcIFlags; } + + // NEON operands. + bool isSingleSpacedVectorList() const { + return Kind == k_VectorList && !VectorList.isDoubleSpaced; + } + bool isDoubleSpacedVectorList() const { + return Kind == k_VectorList && VectorList.isDoubleSpaced; + } + bool isVecListOneD() const { + if (!isSingleSpacedVectorList()) return false; + return VectorList.Count == 1; + } + + bool isVecListDPair() const { + if (!isSingleSpacedVectorList()) return false; + return (ARMMCRegisterClasses[ARM::DPairRegClassID] + .contains(VectorList.RegNum)); + } + + bool isVecListThreeD() const { + if (!isSingleSpacedVectorList()) return false; + return VectorList.Count == 3; + } + + bool isVecListFourD() const { + if (!isSingleSpacedVectorList()) return false; + return VectorList.Count == 4; + } + + bool isVecListDPairSpaced() const { + if (Kind != k_VectorList) return false; + if (isSingleSpacedVectorList()) return false; + return (ARMMCRegisterClasses[ARM::DPairSpcRegClassID] + .contains(VectorList.RegNum)); + } + + bool isVecListThreeQ() const { + if (!isDoubleSpacedVectorList()) return false; + return VectorList.Count == 3; + } + + bool isVecListFourQ() const { + if (!isDoubleSpacedVectorList()) return false; + return VectorList.Count == 4; + } + + bool isSingleSpacedVectorAllLanes() const { + return Kind == k_VectorListAllLanes && !VectorList.isDoubleSpaced; + } + bool isDoubleSpacedVectorAllLanes() const { + return Kind == k_VectorListAllLanes && VectorList.isDoubleSpaced; + } + bool isVecListOneDAllLanes() const { + if (!isSingleSpacedVectorAllLanes()) return false; + return VectorList.Count == 1; + } + + bool isVecListDPairAllLanes() const { + if (!isSingleSpacedVectorAllLanes()) return false; + return (ARMMCRegisterClasses[ARM::DPairRegClassID] + .contains(VectorList.RegNum)); + } + + bool isVecListDPairSpacedAllLanes() const { + if (!isDoubleSpacedVectorAllLanes()) return false; + return VectorList.Count == 2; + } + + bool isVecListThreeDAllLanes() const { + if (!isSingleSpacedVectorAllLanes()) return false; + return VectorList.Count == 3; + } + + bool isVecListThreeQAllLanes() const { + if (!isDoubleSpacedVectorAllLanes()) return false; + return VectorList.Count == 3; + } + + bool isVecListFourDAllLanes() const { + if (!isSingleSpacedVectorAllLanes()) return false; + return VectorList.Count == 4; + } + + bool isVecListFourQAllLanes() const { + if (!isDoubleSpacedVectorAllLanes()) return false; + return VectorList.Count == 4; + } + + bool isSingleSpacedVectorIndexed() const { + return Kind == k_VectorListIndexed && !VectorList.isDoubleSpaced; + } + bool isDoubleSpacedVectorIndexed() const { + return Kind == k_VectorListIndexed && VectorList.isDoubleSpaced; + } + bool isVecListOneDByteIndexed() const { + if (!isSingleSpacedVectorIndexed()) return false; + return VectorList.Count == 1 && VectorList.LaneIndex <= 7; + } + + bool isVecListOneDHWordIndexed() const { + if (!isSingleSpacedVectorIndexed()) return false; + return VectorList.Count == 1 && VectorList.LaneIndex <= 3; + } + + bool isVecListOneDWordIndexed() const { + if (!isSingleSpacedVectorIndexed()) return false; + return VectorList.Count == 1 && VectorList.LaneIndex <= 1; + } + + bool isVecListTwoDByteIndexed() const { + if (!isSingleSpacedVectorIndexed()) return false; + return VectorList.Count == 2 && VectorList.LaneIndex <= 7; + } + + bool isVecListTwoDHWordIndexed() const { + if (!isSingleSpacedVectorIndexed()) return false; + return VectorList.Count == 2 && VectorList.LaneIndex <= 3; + } + + bool isVecListTwoQWordIndexed() const { + if (!isDoubleSpacedVectorIndexed()) return false; + return VectorList.Count == 2 && VectorList.LaneIndex <= 1; + } + + bool isVecListTwoQHWordIndexed() const { + if (!isDoubleSpacedVectorIndexed()) return false; + return VectorList.Count == 2 && VectorList.LaneIndex <= 3; + } + + bool isVecListTwoDWordIndexed() const { + if (!isSingleSpacedVectorIndexed()) return false; + return VectorList.Count == 2 && VectorList.LaneIndex <= 1; + } + + bool isVecListThreeDByteIndexed() const { + if (!isSingleSpacedVectorIndexed()) return false; + return VectorList.Count == 3 && VectorList.LaneIndex <= 7; + } + + bool isVecListThreeDHWordIndexed() const { + if (!isSingleSpacedVectorIndexed()) return false; + return VectorList.Count == 3 && VectorList.LaneIndex <= 3; + } + + bool isVecListThreeQWordIndexed() const { + if (!isDoubleSpacedVectorIndexed()) return false; + return VectorList.Count == 3 && VectorList.LaneIndex <= 1; + } + + bool isVecListThreeQHWordIndexed() const { + if (!isDoubleSpacedVectorIndexed()) return false; + return VectorList.Count == 3 && VectorList.LaneIndex <= 3; + } + + bool isVecListThreeDWordIndexed() const { + if (!isSingleSpacedVectorIndexed()) return false; + return VectorList.Count == 3 && VectorList.LaneIndex <= 1; + } + + bool isVecListFourDByteIndexed() const { + if (!isSingleSpacedVectorIndexed()) return false; + return VectorList.Count == 4 && VectorList.LaneIndex <= 7; + } + + bool isVecListFourDHWordIndexed() const { + if (!isSingleSpacedVectorIndexed()) return false; + return VectorList.Count == 4 && VectorList.LaneIndex <= 3; + } + + bool isVecListFourQWordIndexed() const { + if (!isDoubleSpacedVectorIndexed()) return false; + return VectorList.Count == 4 && VectorList.LaneIndex <= 1; + } + + bool isVecListFourQHWordIndexed() const { + if (!isDoubleSpacedVectorIndexed()) return false; + return VectorList.Count == 4 && VectorList.LaneIndex <= 3; + } + + bool isVecListFourDWordIndexed() const { + if (!isSingleSpacedVectorIndexed()) return false; + return VectorList.Count == 4 && VectorList.LaneIndex <= 1; + } + + bool isVectorIndex8() const { + if (Kind != k_VectorIndex) return false; + return VectorIndex.Val < 8; + } + bool isVectorIndex16() const { + if (Kind != k_VectorIndex) return false; + return VectorIndex.Val < 4; + } + bool isVectorIndex32() const { + if (Kind != k_VectorIndex) return false; + return VectorIndex.Val < 2; + } + + bool isNEONi8splat() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + // Must be a constant. + if (!CE) return false; + int64_t Value = CE->getValue(); + // i8 value splatted across 8 bytes. The immediate is just the 8 byte + // value. + return Value >= 0 && Value < 256; + } + + bool isNEONi16splat() const { + if (isNEONByteReplicate(2)) + return false; // Leave that for bytes replication and forbid by default. + if (!isImm()) + return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + // Must be a constant. + if (!CE) return false; + unsigned Value = CE->getValue(); + return ARM_AM::isNEONi16splat(Value); + } + + bool isNEONi16splatNot() const { + if (!isImm()) + return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + // Must be a constant. + if (!CE) return false; + unsigned Value = CE->getValue(); + return ARM_AM::isNEONi16splat(~Value & 0xffff); + } + + bool isNEONi32splat() const { + if (isNEONByteReplicate(4)) + return false; // Leave that for bytes replication and forbid by default. + if (!isImm()) + return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + // Must be a constant. + if (!CE) return false; + unsigned Value = CE->getValue(); + return ARM_AM::isNEONi32splat(Value); + } + + bool isNEONi32splatNot() const { + if (!isImm()) + return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + // Must be a constant. + if (!CE) return false; + unsigned Value = CE->getValue(); + return ARM_AM::isNEONi32splat(~Value); + } + + bool isNEONByteReplicate(unsigned NumBytes) const { + if (!isImm()) + return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + // Must be a constant. + if (!CE) + return false; + int64_t Value = CE->getValue(); + if (!Value) + return false; // Don't bother with zero. + + unsigned char B = Value & 0xff; + for (unsigned i = 1; i < NumBytes; ++i) { + Value >>= 8; + if ((Value & 0xff) != B) + return false; + } + return true; + } + bool isNEONi16ByteReplicate() const { return isNEONByteReplicate(2); } + bool isNEONi32ByteReplicate() const { return isNEONByteReplicate(4); } + bool isNEONi32vmov() const { + if (isNEONByteReplicate(4)) + return false; // Let it to be classified as byte-replicate case. + if (!isImm()) + return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + // Must be a constant. + if (!CE) + return false; + int64_t Value = CE->getValue(); + // i32 value with set bits only in one byte X000, 0X00, 00X0, or 000X, + // for VMOV/VMVN only, 00Xf or 0Xff are also accepted. + // FIXME: This is probably wrong and a copy and paste from previous example + return (Value >= 0 && Value < 256) || + (Value >= 0x0100 && Value <= 0xff00) || + (Value >= 0x010000 && Value <= 0xff0000) || + (Value >= 0x01000000 && Value <= 0xff000000) || + (Value >= 0x01ff && Value <= 0xffff && (Value & 0xff) == 0xff) || + (Value >= 0x01ffff && Value <= 0xffffff && (Value & 0xffff) == 0xffff); + } + bool isNEONi32vmovNeg() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + // Must be a constant. + if (!CE) return false; + int64_t Value = ~CE->getValue(); + // i32 value with set bits only in one byte X000, 0X00, 00X0, or 000X, + // for VMOV/VMVN only, 00Xf or 0Xff are also accepted. + // FIXME: This is probably wrong and a copy and paste from previous example + return (Value >= 0 && Value < 256) || + (Value >= 0x0100 && Value <= 0xff00) || + (Value >= 0x010000 && Value <= 0xff0000) || + (Value >= 0x01000000 && Value <= 0xff000000) || + (Value >= 0x01ff && Value <= 0xffff && (Value & 0xff) == 0xff) || + (Value >= 0x01ffff && Value <= 0xffffff && (Value & 0xffff) == 0xffff); + } + + bool isNEONi64splat() const { + if (!isImm()) return false; + const MCConstantExpr *CE = dyn_cast(getImm()); + // Must be a constant. + if (!CE) return false; + uint64_t Value = CE->getValue(); + // i64 value with each byte being either 0 or 0xff. + for (unsigned i = 0; i < 8; ++i) + if ((Value & 0xff) != 0 && (Value & 0xff) != 0xff) return false; + return true; + } + + void addExpr(MCInst &Inst, const MCExpr *Expr) const { + // Add as immediates when possible. Null MCExpr = 0. + if (!Expr) + Inst.addOperand(MCOperand::createImm(0)); + else if (const MCConstantExpr *CE = dyn_cast(Expr)) + Inst.addOperand(MCOperand::createImm(CE->getValue())); + else + Inst.addOperand(MCOperand::createExpr(Expr)); + } + + void addCondCodeOperands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(unsigned(getCondCode()))); + unsigned RegNum = getCondCode() == ARMCC::AL ? 0: ARM::CPSR; + Inst.addOperand(MCOperand::createReg(RegNum)); + } + + void addCoprocNumOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(getCoproc())); + } + + void addCoprocRegOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(getCoproc())); + } + + void addCoprocOptionOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(CoprocOption.Val)); + } + + void addITMaskOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(ITMask.Mask)); + } + + void addITCondCodeOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(unsigned(getCondCode()))); + } + + void addCCOutOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createReg(getReg())); + } + + void addRegOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createReg(getReg())); + } + + void addRegShiftedRegOperands(MCInst &Inst, unsigned N) const { + assert(N == 3 && "Invalid number of operands!"); + assert(isRegShiftedReg() && + "addRegShiftedRegOperands() on non-RegShiftedReg!"); + Inst.addOperand(MCOperand::createReg(RegShiftedReg.SrcReg)); + Inst.addOperand(MCOperand::createReg(RegShiftedReg.ShiftReg)); + Inst.addOperand(MCOperand::createImm( + ARM_AM::getSORegOpc(RegShiftedReg.ShiftTy, RegShiftedReg.ShiftImm))); + } + + void addRegShiftedImmOperands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + assert(isRegShiftedImm() && + "addRegShiftedImmOperands() on non-RegShiftedImm!"); + Inst.addOperand(MCOperand::createReg(RegShiftedImm.SrcReg)); + // Shift of #32 is encoded as 0 where permitted + unsigned Imm = (RegShiftedImm.ShiftImm == 32 ? 0 : RegShiftedImm.ShiftImm); + Inst.addOperand(MCOperand::createImm( + ARM_AM::getSORegOpc(RegShiftedImm.ShiftTy, Imm))); + } + + void addShifterImmOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm((ShifterImm.isASR << 5) | + ShifterImm.Imm)); + } + + void addRegListOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const SmallVectorImpl &RegList = getRegList(); + for (SmallVectorImpl::const_iterator + I = RegList.begin(), E = RegList.end(); I != E; ++I) + Inst.addOperand(MCOperand::createReg(*I)); + } + + void addDPRRegListOperands(MCInst &Inst, unsigned N) const { + addRegListOperands(Inst, N); + } + + void addSPRRegListOperands(MCInst &Inst, unsigned N) const { + addRegListOperands(Inst, N); + } + + void addRotImmOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // Encoded as val>>3. The printer handles display as 8, 16, 24. + Inst.addOperand(MCOperand::createImm(RotImm.Imm >> 3)); + } + + void addModImmOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + + // Support for fixups (MCFixup) + if (isImm()) + return addImmOperands(Inst, N); + + Inst.addOperand(MCOperand::createImm(ModImm.Bits | (ModImm.Rot << 7))); + } + + void addModImmNotOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *CE = dyn_cast(getImm()); + uint32_t Enc = ARM_AM::getSOImmVal(~CE->getValue()); + Inst.addOperand(MCOperand::createImm(Enc)); + } + + void addModImmNegOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *CE = dyn_cast(getImm()); + uint32_t Enc = ARM_AM::getSOImmVal(-CE->getValue()); + Inst.addOperand(MCOperand::createImm(Enc)); + } + + void addBitfieldOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // Munge the lsb/width into a bitfield mask. + unsigned lsb = Bitfield.LSB; + unsigned width = Bitfield.Width; + // Make a 32-bit mask w/ the referenced bits clear and all other bits set. + uint32_t Mask = ~(((uint32_t)0xffffffff >> lsb) << (32 - width) >> + (32 - (lsb + width))); + Inst.addOperand(MCOperand::createImm(Mask)); + } + + void addImmOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + addExpr(Inst, getImm()); + } + + void addFBits16Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *CE = dyn_cast(getImm()); + Inst.addOperand(MCOperand::createImm(16 - CE->getValue())); + } + + void addFBits32Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *CE = dyn_cast(getImm()); + Inst.addOperand(MCOperand::createImm(32 - CE->getValue())); + } + + void addFPImmOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *CE = dyn_cast(getImm()); + int Val = ARM_AM::getFP32Imm(APInt(32, CE->getValue())); + Inst.addOperand(MCOperand::createImm(Val)); + } + + void addImm8s4Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // FIXME: We really want to scale the value here, but the LDRD/STRD + // instruction don't encode operands that way yet. + const MCConstantExpr *CE = dyn_cast(getImm()); + Inst.addOperand(MCOperand::createImm(CE->getValue())); + } + + void addImm0_1020s4Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // The immediate is scaled by four in the encoding and is stored + // in the MCInst as such. Lop off the low two bits here. + const MCConstantExpr *CE = dyn_cast(getImm()); + Inst.addOperand(MCOperand::createImm(CE->getValue() / 4)); + } + + void addImm0_508s4NegOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // The immediate is scaled by four in the encoding and is stored + // in the MCInst as such. Lop off the low two bits here. + const MCConstantExpr *CE = dyn_cast(getImm()); + Inst.addOperand(MCOperand::createImm(-(CE->getValue() / 4))); + } + + void addImm0_508s4Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // The immediate is scaled by four in the encoding and is stored + // in the MCInst as such. Lop off the low two bits here. + const MCConstantExpr *CE = dyn_cast(getImm()); + Inst.addOperand(MCOperand::createImm(CE->getValue() / 4)); + } + + void addImm1_16Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // The constant encodes as the immediate-1, and we store in the instruction + // the bits as encoded, so subtract off one here. + const MCConstantExpr *CE = dyn_cast(getImm()); + Inst.addOperand(MCOperand::createImm(CE->getValue() - 1)); + } + + void addImm1_32Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // The constant encodes as the immediate-1, and we store in the instruction + // the bits as encoded, so subtract off one here. + const MCConstantExpr *CE = dyn_cast(getImm()); + Inst.addOperand(MCOperand::createImm(CE->getValue() - 1)); + } + + void addImmThumbSROperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // The constant encodes as the immediate, except for 32, which encodes as + // zero. + const MCConstantExpr *CE = dyn_cast(getImm()); + unsigned Imm = CE->getValue(); + Inst.addOperand(MCOperand::createImm((Imm == 32 ? 0 : Imm))); + } + + void addPKHASRImmOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // An ASR value of 32 encodes as 0, so that's how we want to add it to + // the instruction as well. + const MCConstantExpr *CE = dyn_cast(getImm()); + int Val = CE->getValue(); + Inst.addOperand(MCOperand::createImm(Val == 32 ? 0 : Val)); + } + + void addT2SOImmNotOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // The operand is actually a t2_so_imm, but we have its bitwise + // negation in the assembly source, so twiddle it here. + const MCConstantExpr *CE = dyn_cast(getImm()); + Inst.addOperand(MCOperand::createImm(~CE->getValue())); + } + + void addT2SOImmNegOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // The operand is actually a t2_so_imm, but we have its + // negation in the assembly source, so twiddle it here. + const MCConstantExpr *CE = dyn_cast(getImm()); + Inst.addOperand(MCOperand::createImm(-CE->getValue())); + } + + void addImm0_4095NegOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // The operand is actually an imm0_4095, but we have its + // negation in the assembly source, so twiddle it here. + const MCConstantExpr *CE = dyn_cast(getImm()); + Inst.addOperand(MCOperand::createImm(-CE->getValue())); + } + + void addUnsignedOffset_b8s2Operands(MCInst &Inst, unsigned N) const { + if(const MCConstantExpr *CE = dyn_cast(getImm())) { + Inst.addOperand(MCOperand::createImm(CE->getValue() >> 2)); + return; + } + + const MCSymbolRefExpr *SR = dyn_cast(Imm.Val); + assert(SR && "Unknown value type!"); + Inst.addOperand(MCOperand::createExpr(SR)); + } + + void addThumbMemPCOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + if (isImm()) { + const MCConstantExpr *CE = dyn_cast(getImm()); + if (CE) { + Inst.addOperand(MCOperand::createImm(CE->getValue())); + return; + } + + const MCSymbolRefExpr *SR = dyn_cast(Imm.Val); + assert(SR && "Unknown value type!"); + Inst.addOperand(MCOperand::createExpr(SR)); + return; + } + + assert(isMem() && "Unknown value type!"); + assert(isa(Memory.OffsetImm) && "Unknown value type!"); + Inst.addOperand(MCOperand::createImm(Memory.OffsetImm->getValue())); + } + + void addMemBarrierOptOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(unsigned(getMemBarrierOpt()))); + } + + void addInstSyncBarrierOptOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(unsigned(getInstSyncBarrierOpt()))); + } + + void addMemNoOffsetOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); + } + + void addMemPCRelImm12Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + int32_t Imm = Memory.OffsetImm->getValue(); + Inst.addOperand(MCOperand::createImm(Imm)); + } + + void addAdrLabelOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + assert(isImm() && "Not an immediate!"); + + // If we have an immediate that's not a constant, treat it as a label + // reference needing a fixup. + if (!isa(getImm())) { + Inst.addOperand(MCOperand::createExpr(getImm())); + return; + } + + const MCConstantExpr *CE = dyn_cast(getImm()); + int Val = CE->getValue(); + Inst.addOperand(MCOperand::createImm(Val)); + } + + void addAlignedMemoryOperands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); + Inst.addOperand(MCOperand::createImm(Memory.Alignment)); + } + + void addDupAlignedMemoryNoneOperands(MCInst &Inst, unsigned N) const { + addAlignedMemoryOperands(Inst, N); + } + + void addAlignedMemoryNoneOperands(MCInst &Inst, unsigned N) const { + addAlignedMemoryOperands(Inst, N); + } + + void addAlignedMemory16Operands(MCInst &Inst, unsigned N) const { + addAlignedMemoryOperands(Inst, N); + } + + void addDupAlignedMemory16Operands(MCInst &Inst, unsigned N) const { + addAlignedMemoryOperands(Inst, N); + } + + void addAlignedMemory32Operands(MCInst &Inst, unsigned N) const { + addAlignedMemoryOperands(Inst, N); + } + + void addDupAlignedMemory32Operands(MCInst &Inst, unsigned N) const { + addAlignedMemoryOperands(Inst, N); + } + + void addAlignedMemory64Operands(MCInst &Inst, unsigned N) const { + addAlignedMemoryOperands(Inst, N); + } + + void addDupAlignedMemory64Operands(MCInst &Inst, unsigned N) const { + addAlignedMemoryOperands(Inst, N); + } + + void addAlignedMemory64or128Operands(MCInst &Inst, unsigned N) const { + addAlignedMemoryOperands(Inst, N); + } + + void addDupAlignedMemory64or128Operands(MCInst &Inst, unsigned N) const { + addAlignedMemoryOperands(Inst, N); + } + + void addAlignedMemory64or128or256Operands(MCInst &Inst, unsigned N) const { + addAlignedMemoryOperands(Inst, N); + } + + void addAddrMode2Operands(MCInst &Inst, unsigned N) const { + assert(N == 3 && "Invalid number of operands!"); + int32_t Val = Memory.OffsetImm ? Memory.OffsetImm->getValue() : 0; + if (!Memory.OffsetRegNum) { + ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; + // Special case for #-0 + if (Val == INT32_MIN) Val = 0; + if (Val < 0) Val = -Val; + Val = ARM_AM::getAM2Opc(AddSub, Val, ARM_AM::no_shift); + } else { + // For register offset, we encode the shift type and negation flag + // here. + Val = ARM_AM::getAM2Opc(Memory.isNegative ? ARM_AM::sub : ARM_AM::add, + Memory.ShiftImm, Memory.ShiftType); + } + Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); + Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum)); + Inst.addOperand(MCOperand::createImm(Val)); + } + + void addAM2OffsetImmOperands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + const MCConstantExpr *CE = dyn_cast(getImm()); + assert(CE && "non-constant AM2OffsetImm operand!"); + int32_t Val = CE->getValue(); + ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; + // Special case for #-0 + if (Val == INT32_MIN) Val = 0; + if (Val < 0) Val = -Val; + Val = ARM_AM::getAM2Opc(AddSub, Val, ARM_AM::no_shift); + Inst.addOperand(MCOperand::createReg(0)); + Inst.addOperand(MCOperand::createImm(Val)); + } + + void addAddrMode3Operands(MCInst &Inst, unsigned N) const { + assert(N == 3 && "Invalid number of operands!"); + // If we have an immediate that's not a constant, treat it as a label + // reference needing a fixup. If it is a constant, it's something else + // and we reject it. + if (isImm()) { + Inst.addOperand(MCOperand::createExpr(getImm())); + Inst.addOperand(MCOperand::createReg(0)); + Inst.addOperand(MCOperand::createImm(0)); + return; + } + + int32_t Val = Memory.OffsetImm ? Memory.OffsetImm->getValue() : 0; + if (!Memory.OffsetRegNum) { + ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; + // Special case for #-0 + if (Val == INT32_MIN) Val = 0; + if (Val < 0) Val = -Val; + Val = ARM_AM::getAM3Opc(AddSub, Val); + } else { + // For register offset, we encode the shift type and negation flag + // here. + Val = ARM_AM::getAM3Opc(Memory.isNegative ? ARM_AM::sub : ARM_AM::add, 0); + } + Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); + Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum)); + Inst.addOperand(MCOperand::createImm(Val)); + } + + void addAM3OffsetOperands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + if (Kind == k_PostIndexRegister) { + int32_t Val = + ARM_AM::getAM3Opc(PostIdxReg.isAdd ? ARM_AM::add : ARM_AM::sub, 0); + Inst.addOperand(MCOperand::createReg(PostIdxReg.RegNum)); + Inst.addOperand(MCOperand::createImm(Val)); + return; + } + + // Constant offset. + const MCConstantExpr *CE = static_cast(getImm()); + int32_t Val = CE->getValue(); + ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; + // Special case for #-0 + if (Val == INT32_MIN) Val = 0; + if (Val < 0) Val = -Val; + Val = ARM_AM::getAM3Opc(AddSub, Val); + Inst.addOperand(MCOperand::createReg(0)); + Inst.addOperand(MCOperand::createImm(Val)); + } + + void addAddrMode5Operands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + // If we have an immediate that's not a constant, treat it as a label + // reference needing a fixup. If it is a constant, it's something else + // and we reject it. + if (isImm()) { + Inst.addOperand(MCOperand::createExpr(getImm())); + Inst.addOperand(MCOperand::createImm(0)); + return; + } + + // The lower two bits are always zero and as such are not encoded. + int32_t Val = Memory.OffsetImm ? Memory.OffsetImm->getValue() / 4 : 0; + ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; + // Special case for #-0 + if (Val == INT32_MIN) Val = 0; + if (Val < 0) Val = -Val; + Val = ARM_AM::getAM5Opc(AddSub, Val); + Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); + Inst.addOperand(MCOperand::createImm(Val)); + } + + void addAddrMode5FP16Operands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + // If we have an immediate that's not a constant, treat it as a label + // reference needing a fixup. If it is a constant, it's something else + // and we reject it. + if (isImm()) { + Inst.addOperand(MCOperand::createExpr(getImm())); + Inst.addOperand(MCOperand::createImm(0)); + return; + } + + // The lower bit is always zero and as such is not encoded. + int32_t Val = Memory.OffsetImm ? Memory.OffsetImm->getValue() / 2 : 0; + ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; + // Special case for #-0 + if (Val == INT32_MIN) Val = 0; + if (Val < 0) Val = -Val; + Val = ARM_AM::getAM5FP16Opc(AddSub, Val); + Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); + Inst.addOperand(MCOperand::createImm(Val)); + } + + void addMemImm8s4OffsetOperands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + // If we have an immediate that's not a constant, treat it as a label + // reference needing a fixup. If it is a constant, it's something else + // and we reject it. + if (isImm()) { + Inst.addOperand(MCOperand::createExpr(getImm())); + Inst.addOperand(MCOperand::createImm(0)); + return; + } + + int64_t Val = Memory.OffsetImm ? Memory.OffsetImm->getValue() : 0; + Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); + Inst.addOperand(MCOperand::createImm(Val)); + } + + void addMemImm0_1020s4OffsetOperands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + // The lower two bits are always zero and as such are not encoded. + int32_t Val = Memory.OffsetImm ? Memory.OffsetImm->getValue() / 4 : 0; + Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); + Inst.addOperand(MCOperand::createImm(Val)); + } + + void addMemImm8OffsetOperands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + int64_t Val = Memory.OffsetImm ? Memory.OffsetImm->getValue() : 0; + Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); + Inst.addOperand(MCOperand::createImm(Val)); + } + + void addMemPosImm8OffsetOperands(MCInst &Inst, unsigned N) const { + addMemImm8OffsetOperands(Inst, N); + } + + void addMemNegImm8OffsetOperands(MCInst &Inst, unsigned N) const { + addMemImm8OffsetOperands(Inst, N); + } + + void addMemUImm12OffsetOperands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + // If this is an immediate, it's a label reference. + if (isImm()) { + addExpr(Inst, getImm()); + Inst.addOperand(MCOperand::createImm(0)); + return; + } + + // Otherwise, it's a normal memory reg+offset. + int64_t Val = Memory.OffsetImm ? Memory.OffsetImm->getValue() : 0; + Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); + Inst.addOperand(MCOperand::createImm(Val)); + } + + void addMemImm12OffsetOperands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + // If this is an immediate, it's a label reference. + if (isImm()) { + addExpr(Inst, getImm()); + Inst.addOperand(MCOperand::createImm(0)); + return; + } + + // Otherwise, it's a normal memory reg+offset. + int64_t Val = Memory.OffsetImm ? Memory.OffsetImm->getValue() : 0; + Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); + Inst.addOperand(MCOperand::createImm(Val)); + } + + void addMemTBBOperands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); + Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum)); + } + + void addMemTBHOperands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); + Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum)); + } + + void addMemRegOffsetOperands(MCInst &Inst, unsigned N) const { + assert(N == 3 && "Invalid number of operands!"); + unsigned Val = + ARM_AM::getAM2Opc(Memory.isNegative ? ARM_AM::sub : ARM_AM::add, + Memory.ShiftImm, Memory.ShiftType); + Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); + Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum)); + Inst.addOperand(MCOperand::createImm(Val)); + } + + void addT2MemRegOffsetOperands(MCInst &Inst, unsigned N) const { + assert(N == 3 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); + Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum)); + Inst.addOperand(MCOperand::createImm(Memory.ShiftImm)); + } + + void addMemThumbRROperands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); + Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum)); + } + + void addMemThumbRIs4Operands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + int64_t Val = Memory.OffsetImm ? (Memory.OffsetImm->getValue() / 4) : 0; + Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); + Inst.addOperand(MCOperand::createImm(Val)); + } + + void addMemThumbRIs2Operands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + int64_t Val = Memory.OffsetImm ? (Memory.OffsetImm->getValue() / 2) : 0; + Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); + Inst.addOperand(MCOperand::createImm(Val)); + } + + void addMemThumbRIs1Operands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + int64_t Val = Memory.OffsetImm ? (Memory.OffsetImm->getValue()) : 0; + Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); + Inst.addOperand(MCOperand::createImm(Val)); + } + + void addMemThumbSPIOperands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + int64_t Val = Memory.OffsetImm ? (Memory.OffsetImm->getValue() / 4) : 0; + Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum)); + Inst.addOperand(MCOperand::createImm(Val)); + } + + void addPostIdxImm8Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *CE = dyn_cast(getImm()); + assert(CE && "non-constant post-idx-imm8 operand!"); + int Imm = CE->getValue(); + bool isAdd = Imm >= 0; + if (Imm == INT32_MIN) Imm = 0; + Imm = (Imm < 0 ? -Imm : Imm) | (int)isAdd << 8; + Inst.addOperand(MCOperand::createImm(Imm)); + } + + void addPostIdxImm8s4Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + const MCConstantExpr *CE = dyn_cast(getImm()); + assert(CE && "non-constant post-idx-imm8s4 operand!"); + int Imm = CE->getValue(); + bool isAdd = Imm >= 0; + if (Imm == INT32_MIN) Imm = 0; + // Immediate is scaled by 4. + Imm = ((Imm < 0 ? -Imm : Imm) / 4) | (int)isAdd << 8; + Inst.addOperand(MCOperand::createImm(Imm)); + } + + void addPostIdxRegOperands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createReg(PostIdxReg.RegNum)); + Inst.addOperand(MCOperand::createImm(PostIdxReg.isAdd)); + } + + void addPostIdxRegShiftedOperands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createReg(PostIdxReg.RegNum)); + // The sign, shift type, and shift amount are encoded in a single operand + // using the AM2 encoding helpers. + ARM_AM::AddrOpc opc = PostIdxReg.isAdd ? ARM_AM::add : ARM_AM::sub; + unsigned Imm = ARM_AM::getAM2Opc(opc, PostIdxReg.ShiftImm, + PostIdxReg.ShiftTy); + Inst.addOperand(MCOperand::createImm(Imm)); + } + + void addMSRMaskOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(unsigned(getMSRMask()))); + } + + void addBankedRegOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(unsigned(getBankedReg()))); + } + + void addProcIFlagsOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(unsigned(getProcIFlags()))); + } + + void addVecListOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createReg(VectorList.RegNum)); + } + + void addVecListIndexedOperands(MCInst &Inst, unsigned N) const { + assert(N == 2 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createReg(VectorList.RegNum)); + Inst.addOperand(MCOperand::createImm(VectorList.LaneIndex)); + } + + void addVectorIndex8Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(getVectorIndex())); + } + + void addVectorIndex16Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(getVectorIndex())); + } + + void addVectorIndex32Operands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createImm(getVectorIndex())); + } + + void addNEONi8splatOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // The immediate encodes the type of constant as well as the value. + // Mask in that this is an i8 splat. + const MCConstantExpr *CE = dyn_cast(getImm()); + Inst.addOperand(MCOperand::createImm(CE->getValue() | 0xe00)); + } + + void addNEONi16splatOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // The immediate encodes the type of constant as well as the value. + const MCConstantExpr *CE = dyn_cast(getImm()); + unsigned Value = CE->getValue(); + Value = ARM_AM::encodeNEONi16splat(Value); + Inst.addOperand(MCOperand::createImm(Value)); + } + + void addNEONi16splatNotOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // The immediate encodes the type of constant as well as the value. + const MCConstantExpr *CE = dyn_cast(getImm()); + unsigned Value = CE->getValue(); + Value = ARM_AM::encodeNEONi16splat(~Value & 0xffff); + Inst.addOperand(MCOperand::createImm(Value)); + } + + void addNEONi32splatOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // The immediate encodes the type of constant as well as the value. + const MCConstantExpr *CE = dyn_cast(getImm()); + unsigned Value = CE->getValue(); + Value = ARM_AM::encodeNEONi32splat(Value); + Inst.addOperand(MCOperand::createImm(Value)); + } + + void addNEONi32splatNotOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // The immediate encodes the type of constant as well as the value. + const MCConstantExpr *CE = dyn_cast(getImm()); + unsigned Value = CE->getValue(); + Value = ARM_AM::encodeNEONi32splat(~Value); + Inst.addOperand(MCOperand::createImm(Value)); + } + + void addNEONinvByteReplicateOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // The immediate encodes the type of constant as well as the value. + const MCConstantExpr *CE = dyn_cast(getImm()); + unsigned Value = CE->getValue(); + assert((Inst.getOpcode() == ARM::VMOVv8i8 || + Inst.getOpcode() == ARM::VMOVv16i8) && + "All vmvn instructions that wants to replicate non-zero byte " + "always must be replaced with VMOVv8i8 or VMOVv16i8."); + unsigned B = ((~Value) & 0xff); + B |= 0xe00; // cmode = 0b1110 + Inst.addOperand(MCOperand::createImm(B)); + } + void addNEONi32vmovOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // The immediate encodes the type of constant as well as the value. + const MCConstantExpr *CE = dyn_cast(getImm()); + unsigned Value = CE->getValue(); + if (Value >= 256 && Value <= 0xffff) + Value = (Value >> 8) | ((Value & 0xff) ? 0xc00 : 0x200); + else if (Value > 0xffff && Value <= 0xffffff) + Value = (Value >> 16) | ((Value & 0xff) ? 0xd00 : 0x400); + else if (Value > 0xffffff) + Value = (Value >> 24) | 0x600; + Inst.addOperand(MCOperand::createImm(Value)); + } + + void addNEONvmovByteReplicateOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // The immediate encodes the type of constant as well as the value. + const MCConstantExpr *CE = dyn_cast(getImm()); + unsigned Value = CE->getValue(); + assert((Inst.getOpcode() == ARM::VMOVv8i8 || + Inst.getOpcode() == ARM::VMOVv16i8) && + "All instructions that wants to replicate non-zero byte " + "always must be replaced with VMOVv8i8 or VMOVv16i8."); + unsigned B = Value & 0xff; + B |= 0xe00; // cmode = 0b1110 + Inst.addOperand(MCOperand::createImm(B)); + } + void addNEONi32vmovNegOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // The immediate encodes the type of constant as well as the value. + const MCConstantExpr *CE = dyn_cast(getImm()); + unsigned Value = ~CE->getValue(); + if (Value >= 256 && Value <= 0xffff) + Value = (Value >> 8) | ((Value & 0xff) ? 0xc00 : 0x200); + else if (Value > 0xffff && Value <= 0xffffff) + Value = (Value >> 16) | ((Value & 0xff) ? 0xd00 : 0x400); + else if (Value > 0xffffff) + Value = (Value >> 24) | 0x600; + Inst.addOperand(MCOperand::createImm(Value)); + } + + void addNEONi64splatOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + // The immediate encodes the type of constant as well as the value. + const MCConstantExpr *CE = dyn_cast(getImm()); + uint64_t Value = CE->getValue(); + unsigned Imm = 0; + for (unsigned i = 0; i < 8; ++i, Value >>= 8) { + Imm |= (Value & 1) << i; + } + Inst.addOperand(MCOperand::createImm(Imm | 0x1e00)); + } + + void print(raw_ostream &OS) const override; + + static std::unique_ptr CreateITMask(unsigned Mask, SMLoc S) { + auto Op = make_unique(k_ITCondMask); + Op->ITMask.Mask = Mask; + Op->StartLoc = S; + Op->EndLoc = S; + return Op; + } + + static std::unique_ptr CreateCondCode(ARMCC::CondCodes CC, + SMLoc S) { + auto Op = make_unique(k_CondCode); + Op->CC.Val = CC; + Op->StartLoc = S; + Op->EndLoc = S; + return Op; + } + + static std::unique_ptr CreateCoprocNum(unsigned CopVal, SMLoc S) { + auto Op = make_unique(k_CoprocNum); + Op->Cop.Val = CopVal; + Op->StartLoc = S; + Op->EndLoc = S; + return Op; + } + + static std::unique_ptr CreateCoprocReg(unsigned CopVal, SMLoc S) { + auto Op = make_unique(k_CoprocReg); + Op->Cop.Val = CopVal; + Op->StartLoc = S; + Op->EndLoc = S; + return Op; + } + + static std::unique_ptr CreateCoprocOption(unsigned Val, SMLoc S, + SMLoc E) { + auto Op = make_unique(k_CoprocOption); + Op->Cop.Val = Val; + Op->StartLoc = S; + Op->EndLoc = E; + return Op; + } + + static std::unique_ptr CreateCCOut(unsigned RegNum, SMLoc S) { + auto Op = make_unique(k_CCOut); + Op->Reg.RegNum = RegNum; + Op->StartLoc = S; + Op->EndLoc = S; + return Op; + } + + static std::unique_ptr CreateToken(StringRef Str, SMLoc S) { + auto Op = make_unique(k_Token); + Op->Tok.Data = Str.data(); + Op->Tok.Length = Str.size(); + Op->StartLoc = S; + Op->EndLoc = S; + return Op; + } + + static std::unique_ptr CreateReg(unsigned RegNum, SMLoc S, + SMLoc E) { + auto Op = make_unique(k_Register); + Op->Reg.RegNum = RegNum; + Op->StartLoc = S; + Op->EndLoc = E; + return Op; + } + + static std::unique_ptr + CreateShiftedRegister(ARM_AM::ShiftOpc ShTy, unsigned SrcReg, + unsigned ShiftReg, unsigned ShiftImm, SMLoc S, + SMLoc E) { + auto Op = make_unique(k_ShiftedRegister); + Op->RegShiftedReg.ShiftTy = ShTy; + Op->RegShiftedReg.SrcReg = SrcReg; + Op->RegShiftedReg.ShiftReg = ShiftReg; + Op->RegShiftedReg.ShiftImm = ShiftImm; + Op->StartLoc = S; + Op->EndLoc = E; + return Op; + } + + static std::unique_ptr + CreateShiftedImmediate(ARM_AM::ShiftOpc ShTy, unsigned SrcReg, + unsigned ShiftImm, SMLoc S, SMLoc E) { + auto Op = make_unique(k_ShiftedImmediate); + Op->RegShiftedImm.ShiftTy = ShTy; + Op->RegShiftedImm.SrcReg = SrcReg; + Op->RegShiftedImm.ShiftImm = ShiftImm; + Op->StartLoc = S; + Op->EndLoc = E; + return Op; + } + + static std::unique_ptr CreateShifterImm(bool isASR, unsigned Imm, + SMLoc S, SMLoc E) { + auto Op = make_unique(k_ShifterImmediate); + Op->ShifterImm.isASR = isASR; + Op->ShifterImm.Imm = Imm; + Op->StartLoc = S; + Op->EndLoc = E; + return Op; + } + + static std::unique_ptr CreateRotImm(unsigned Imm, SMLoc S, + SMLoc E) { + auto Op = make_unique(k_RotateImmediate); + Op->RotImm.Imm = Imm; + Op->StartLoc = S; + Op->EndLoc = E; + return Op; + } + + static std::unique_ptr CreateModImm(unsigned Bits, unsigned Rot, + SMLoc S, SMLoc E) { + auto Op = make_unique(k_ModifiedImmediate); + Op->ModImm.Bits = Bits; + Op->ModImm.Rot = Rot; + Op->StartLoc = S; + Op->EndLoc = E; + return Op; + } + + static std::unique_ptr + CreateBitfield(unsigned LSB, unsigned Width, SMLoc S, SMLoc E) { + auto Op = make_unique(k_BitfieldDescriptor); + Op->Bitfield.LSB = LSB; + Op->Bitfield.Width = Width; + Op->StartLoc = S; + Op->EndLoc = E; + return Op; + } + + static std::unique_ptr + CreateRegList(SmallVectorImpl> &Regs, + SMLoc StartLoc, SMLoc EndLoc) { + assert (Regs.size() > 0 && "RegList contains no registers?"); + KindTy Kind = k_RegisterList; + + if (ARMMCRegisterClasses[ARM::DPRRegClassID].contains(Regs.front().second)) + Kind = k_DPRRegisterList; + else if (ARMMCRegisterClasses[ARM::SPRRegClassID]. + contains(Regs.front().second)) + Kind = k_SPRRegisterList; + + // Sort based on the register encoding values. + array_pod_sort(Regs.begin(), Regs.end()); + + auto Op = make_unique(Kind); + for (SmallVectorImpl >::const_iterator + I = Regs.begin(), E = Regs.end(); I != E; ++I) + Op->Registers.push_back(I->second); + Op->StartLoc = StartLoc; + Op->EndLoc = EndLoc; + return Op; + } + + static std::unique_ptr CreateVectorList(unsigned RegNum, + unsigned Count, + bool isDoubleSpaced, + SMLoc S, SMLoc E) { + auto Op = make_unique(k_VectorList); + Op->VectorList.RegNum = RegNum; + Op->VectorList.Count = Count; + Op->VectorList.isDoubleSpaced = isDoubleSpaced; + Op->StartLoc = S; + Op->EndLoc = E; + return Op; + } + + static std::unique_ptr + CreateVectorListAllLanes(unsigned RegNum, unsigned Count, bool isDoubleSpaced, + SMLoc S, SMLoc E) { + auto Op = make_unique(k_VectorListAllLanes); + Op->VectorList.RegNum = RegNum; + Op->VectorList.Count = Count; + Op->VectorList.isDoubleSpaced = isDoubleSpaced; + Op->StartLoc = S; + Op->EndLoc = E; + return Op; + } + + static std::unique_ptr + CreateVectorListIndexed(unsigned RegNum, unsigned Count, unsigned Index, + bool isDoubleSpaced, SMLoc S, SMLoc E) { + auto Op = make_unique(k_VectorListIndexed); + Op->VectorList.RegNum = RegNum; + Op->VectorList.Count = Count; + Op->VectorList.LaneIndex = Index; + Op->VectorList.isDoubleSpaced = isDoubleSpaced; + Op->StartLoc = S; + Op->EndLoc = E; + return Op; + } + + static std::unique_ptr + CreateVectorIndex(unsigned Idx, SMLoc S, SMLoc E, MCContext &Ctx) { + auto Op = make_unique(k_VectorIndex); + Op->VectorIndex.Val = Idx; + Op->StartLoc = S; + Op->EndLoc = E; + return Op; + } + + static std::unique_ptr CreateImm(const MCExpr *Val, SMLoc S, + SMLoc E) { + auto Op = make_unique(k_Immediate); + Op->Imm.Val = Val; + Op->StartLoc = S; + Op->EndLoc = E; + return Op; + } + + static std::unique_ptr + CreateMem(unsigned BaseRegNum, const MCConstantExpr *OffsetImm, + unsigned OffsetRegNum, ARM_AM::ShiftOpc ShiftType, + unsigned ShiftImm, unsigned Alignment, bool isNegative, SMLoc S, + SMLoc E, SMLoc AlignmentLoc = SMLoc()) { + auto Op = make_unique(k_Memory); + Op->Memory.BaseRegNum = BaseRegNum; + Op->Memory.OffsetImm = OffsetImm; + Op->Memory.OffsetRegNum = OffsetRegNum; + Op->Memory.ShiftType = ShiftType; + Op->Memory.ShiftImm = ShiftImm; + Op->Memory.Alignment = Alignment; + Op->Memory.isNegative = isNegative; + Op->StartLoc = S; + Op->EndLoc = E; + Op->AlignmentLoc = AlignmentLoc; + return Op; + } + + static std::unique_ptr + CreatePostIdxReg(unsigned RegNum, bool isAdd, ARM_AM::ShiftOpc ShiftTy, + unsigned ShiftImm, SMLoc S, SMLoc E) { + auto Op = make_unique(k_PostIndexRegister); + Op->PostIdxReg.RegNum = RegNum; + Op->PostIdxReg.isAdd = isAdd; + Op->PostIdxReg.ShiftTy = ShiftTy; + Op->PostIdxReg.ShiftImm = ShiftImm; + Op->StartLoc = S; + Op->EndLoc = E; + return Op; + } + + static std::unique_ptr CreateMemBarrierOpt(ARM_MB::MemBOpt Opt, + SMLoc S) { + auto Op = make_unique(k_MemBarrierOpt); + Op->MBOpt.Val = Opt; + Op->StartLoc = S; + Op->EndLoc = S; + return Op; + } + + static std::unique_ptr + CreateInstSyncBarrierOpt(ARM_ISB::InstSyncBOpt Opt, SMLoc S) { + auto Op = make_unique(k_InstSyncBarrierOpt); + Op->ISBOpt.Val = Opt; + Op->StartLoc = S; + Op->EndLoc = S; + return Op; + } + + static std::unique_ptr CreateProcIFlags(ARM_PROC::IFlags IFlags, + SMLoc S) { + auto Op = make_unique(k_ProcIFlags); + Op->IFlags.Val = IFlags; + Op->StartLoc = S; + Op->EndLoc = S; + return Op; + } + + static std::unique_ptr CreateMSRMask(unsigned MMask, SMLoc S) { + auto Op = make_unique(k_MSRMask); + Op->MMask.Val = MMask; + Op->StartLoc = S; + Op->EndLoc = S; + return Op; + } + + static std::unique_ptr CreateBankedReg(unsigned Reg, SMLoc S) { + auto Op = make_unique(k_BankedReg); + Op->BankedReg.Val = Reg; + Op->StartLoc = S; + Op->EndLoc = S; + return Op; + } +}; + +} // end anonymous namespace. + +void ARMOperand::print(raw_ostream &OS) const { + switch (Kind) { + case k_CondCode: + OS << ""; + break; + case k_CCOut: + OS << ""; + break; + case k_ITCondMask: { + static const char *const MaskStr[] = { + "()", "(t)", "(e)", "(tt)", "(et)", "(te)", "(ee)", "(ttt)", "(ett)", + "(tet)", "(eet)", "(tte)", "(ete)", "(tee)", "(eee)" + }; + assert((ITMask.Mask & 0xf) == ITMask.Mask); + OS << ""; + break; + } + case k_CoprocNum: + OS << ""; + break; + case k_CoprocReg: + OS << ""; + break; + case k_CoprocOption: + OS << ""; + break; + case k_MSRMask: + OS << ""; + break; + case k_BankedReg: + OS << ""; + break; + case k_Immediate: + OS << *getImm(); + break; + case k_MemBarrierOpt: + OS << ""; + break; + case k_InstSyncBarrierOpt: + OS << ""; + break; + case k_Memory: + OS << ""; + break; + case k_PostIndexRegister: + OS << "post-idx register " << (PostIdxReg.isAdd ? "" : "-") + << PostIdxReg.RegNum; + if (PostIdxReg.ShiftTy != ARM_AM::no_shift) + OS << ARM_AM::getShiftOpcStr(PostIdxReg.ShiftTy) << " " + << PostIdxReg.ShiftImm; + OS << ">"; + break; + case k_ProcIFlags: { + OS << "= 0; --i) + if (IFlags & (1 << i)) + OS << ARM_PROC::IFlagsToString(1 << i); + OS << ">"; + break; + } + case k_Register: + OS << ""; + break; + case k_ShifterImmediate: + OS << ""; + break; + case k_ShiftedRegister: + OS << ""; + break; + case k_ShiftedImmediate: + OS << ""; + break; + case k_RotateImmediate: + OS << ""; + break; + case k_ModifiedImmediate: + OS << ""; + break; + case k_BitfieldDescriptor: + OS << ""; + break; + case k_RegisterList: + case k_DPRRegisterList: + case k_SPRRegisterList: { + OS << " &RegList = getRegList(); + for (SmallVectorImpl::const_iterator + I = RegList.begin(), E = RegList.end(); I != E; ) { + OS << *I; + if (++I < E) OS << ", "; + } + + OS << ">"; + break; + } + case k_VectorList: + OS << ""; + break; + case k_VectorListAllLanes: + OS << ""; + break; + case k_VectorListIndexed: + OS << ""; + break; + case k_Token: + OS << "'" << getToken() << "'"; + break; + case k_VectorIndex: + OS << ""; + break; + } +} + +/// @name Auto-generated Match Functions +/// { + +static unsigned MatchRegisterName(StringRef Name); + +/// } + +bool ARMAsmParser::ParseRegister(unsigned &RegNo, + SMLoc &StartLoc, SMLoc &EndLoc, unsigned int &ErrorCode) { + const AsmToken &Tok = getParser().getTok(); + StartLoc = Tok.getLoc(); + EndLoc = Tok.getEndLoc(); + RegNo = tryParseRegister(); + + return (RegNo == (unsigned)-1); +} + +/// Try to parse a register name. The token must be an Identifier when called, +/// and if it is a register name the token is eaten and the register number is +/// returned. Otherwise return -1. +/// +int ARMAsmParser::tryParseRegister() { + MCAsmParser &Parser = getParser(); + const AsmToken &Tok = Parser.getTok(); + if (Tok.isNot(AsmToken::Identifier)) return -1; + + std::string lowerCase = Tok.getString().lower(); + unsigned RegNum = MatchRegisterName(lowerCase); + if (!RegNum) { + RegNum = StringSwitch(lowerCase) + .Case("r13", ARM::SP) + .Case("r14", ARM::LR) + .Case("r15", ARM::PC) + .Case("ip", ARM::R12) + // Additional register name aliases for 'gas' compatibility. + .Case("a1", ARM::R0) + .Case("a2", ARM::R1) + .Case("a3", ARM::R2) + .Case("a4", ARM::R3) + .Case("v1", ARM::R4) + .Case("v2", ARM::R5) + .Case("v3", ARM::R6) + .Case("v4", ARM::R7) + .Case("v5", ARM::R8) + .Case("v6", ARM::R9) + .Case("v7", ARM::R10) + .Case("v8", ARM::R11) + .Case("sb", ARM::R9) + .Case("sl", ARM::R10) + .Case("fp", ARM::R11) + .Default(0); + } + if (!RegNum) { + // Check for aliases registered via .req. Canonicalize to lower case. + // That's more consistent since register names are case insensitive, and + // it's how the original entry was passed in from MC/MCParser/AsmParser. + StringMap::const_iterator Entry = RegisterReqs.find(lowerCase); + // If no match, return failure. + if (Entry == RegisterReqs.end()) + return -1; + Parser.Lex(); // Eat identifier token. + return Entry->getValue(); + } + + // Some FPUs only have 16 D registers, so D16-D31 are invalid + if (hasD16() && RegNum >= ARM::D16 && RegNum <= ARM::D31) + return -1; + + Parser.Lex(); // Eat identifier token. + + return RegNum; +} + +// Try to parse a shifter (e.g., "lsl "). On success, return 0. +// If a recoverable error occurs, return 1. If an irrecoverable error +// occurs, return -1. An irrecoverable error is one where tokens have been +// consumed in the process of trying to parse the shifter (i.e., when it is +// indeed a shifter operand, but malformed). +int ARMAsmParser::tryParseShiftRegister(OperandVector &Operands) +{ + MCAsmParser &Parser = getParser(); + SMLoc S = Parser.getTok().getLoc(); + const AsmToken &Tok = Parser.getTok(); + if (Tok.isNot(AsmToken::Identifier)) + return -1; + + std::string lowerCase = Tok.getString().lower(); + ARM_AM::ShiftOpc ShiftTy = StringSwitch(lowerCase) + .Case("asl", ARM_AM::lsl) + .Case("lsl", ARM_AM::lsl) + .Case("lsr", ARM_AM::lsr) + .Case("asr", ARM_AM::asr) + .Case("ror", ARM_AM::ror) + .Case("rrx", ARM_AM::rrx) + .Default(ARM_AM::no_shift); + + if (ShiftTy == ARM_AM::no_shift) + return 1; + + Parser.Lex(); // Eat the operator. + + // The source register for the shift has already been added to the + // operand list, so we need to pop it off and combine it into the shifted + // register operand instead. + std::unique_ptr PrevOp( + (ARMOperand *)Operands.pop_back_val().release()); + if (!PrevOp->isReg()) + //return Error(PrevOp->getStartLoc(), "shift must be of a register"); + return -1; + int SrcReg = PrevOp->getReg(); + + SMLoc EndLoc; + int64_t Imm = 0; + int ShiftReg = 0; + if (ShiftTy == ARM_AM::rrx) { + // RRX Doesn't have an explicit shift amount. The encoder expects + // the shift register to be the same as the source register. Seems odd, + // but OK. + ShiftReg = SrcReg; + } else { + // Figure out if this is shifted by a constant or a register (for non-RRX). + if (Parser.getTok().is(AsmToken::Hash) || + Parser.getTok().is(AsmToken::Dollar)) { + Parser.Lex(); // Eat hash. + //SMLoc ImmLoc = Parser.getTok().getLoc(); + const MCExpr *ShiftExpr = nullptr; + if (getParser().parseExpression(ShiftExpr, EndLoc)) { + //Error(ImmLoc, "invalid immediate shift value"); + return -1; + } + // The expression must be evaluatable as an immediate. + const MCConstantExpr *CE = dyn_cast(ShiftExpr); + if (!CE) { + //Error(ImmLoc, "invalid immediate shift value"); + return -1; + } + // Range check the immediate. + // lsl, ror: 0 <= imm <= 31 + // lsr, asr: 0 <= imm <= 32 + Imm = CE->getValue(); + if (Imm < 0 || + ((ShiftTy == ARM_AM::lsl || ShiftTy == ARM_AM::ror) && Imm > 31) || + ((ShiftTy == ARM_AM::lsr || ShiftTy == ARM_AM::asr) && Imm > 32)) { + //Error(ImmLoc, "immediate shift value out of range"); + return -1; + } + // shift by zero is a nop. Always send it through as lsl. + // ('as' compatibility) + if (Imm == 0) + ShiftTy = ARM_AM::lsl; + } else if (Parser.getTok().is(AsmToken::Identifier)) { + //SMLoc L = Parser.getTok().getLoc(); + EndLoc = Parser.getTok().getEndLoc(); + ShiftReg = tryParseRegister(); + if (ShiftReg == -1) { + //Error(L, "expected immediate or register in shift operand"); + return -1; + } + } else { + //Error(Parser.getTok().getLoc(), + // "expected immediate or register in shift operand"); + return -1; + } + } + + if (ShiftReg && ShiftTy != ARM_AM::rrx) + Operands.push_back(ARMOperand::CreateShiftedRegister(ShiftTy, SrcReg, + ShiftReg, Imm, + S, EndLoc)); + else + Operands.push_back(ARMOperand::CreateShiftedImmediate(ShiftTy, SrcReg, Imm, + S, EndLoc)); + + return 0; +} + + +/// Try to parse a register name. The token must be an Identifier when called. +/// If it's a register, an AsmOperand is created. Another AsmOperand is created +/// if there is a "writeback". 'true' if it's not a register. +/// +/// TODO this is likely to change to allow different register types and or to +/// parse for a specific register type. +bool ARMAsmParser::tryParseRegisterWithWriteBack(OperandVector &Operands) +{ + MCAsmParser &Parser = getParser(); + const AsmToken &RegTok = Parser.getTok(); + int RegNo = tryParseRegister(); + if (RegNo == -1) + return true; + + Operands.push_back(ARMOperand::CreateReg(RegNo, RegTok.getLoc(), + RegTok.getEndLoc())); + + const AsmToken &ExclaimTok = Parser.getTok(); + if (ExclaimTok.is(AsmToken::Exclaim)) { + Operands.push_back(ARMOperand::CreateToken(ExclaimTok.getString(), + ExclaimTok.getLoc())); + Parser.Lex(); // Eat exclaim token + return false; + } + + // Also check for an index operand. This is only legal for vector registers, + // but that'll get caught OK in operand matching, so we don't need to + // explicitly filter everything else out here. + if (Parser.getTok().is(AsmToken::LBrac)) { + SMLoc SIdx = Parser.getTok().getLoc(); + Parser.Lex(); // Eat left bracket token. + + const MCExpr *ImmVal; + if (getParser().parseExpression(ImmVal)) + return true; + const MCConstantExpr *MCE = dyn_cast(ImmVal); + if (!MCE) + //return TokError("immediate value expected for vector index"); + return true; + + if (Parser.getTok().isNot(AsmToken::RBrac)) + //return Error(Parser.getTok().getLoc(), "']' expected"); + return true; + + SMLoc E = Parser.getTok().getEndLoc(); + Parser.Lex(); // Eat right bracket token. + + Operands.push_back(ARMOperand::CreateVectorIndex(MCE->getValue(), + SIdx, E, + getContext())); + } + + return false; +} + +/// MatchCoprocessorOperandName - Try to parse an coprocessor related +/// instruction with a symbolic operand name. +/// We accept "crN" syntax for GAS compatibility. +/// ::= +/// If CoprocOp is 'c', then: +/// ::= c | cr +/// If CoprocOp is 'p', then : +/// ::= p +/// ::= integer in range [0, 15] +static int MatchCoprocessorOperandName(StringRef Name, char CoprocOp) { + // Use the same layout as the tablegen'erated register name matcher. Ugly, + // but efficient. + if (Name.size() < 2 || Name[0] != CoprocOp) + return -1; + Name = (Name[1] == 'r') ? Name.drop_front(2) : Name.drop_front(); + + switch (Name.size()) { + default: return -1; + case 1: + switch (Name[0]) { + default: return -1; + case '0': return 0; + case '1': return 1; + case '2': return 2; + case '3': return 3; + case '4': return 4; + case '5': return 5; + case '6': return 6; + case '7': return 7; + case '8': return 8; + case '9': return 9; + } + case 2: + if (Name[0] != '1') + return -1; + switch (Name[1]) { + default: return -1; + // CP10 and CP11 are VFP/NEON and so vector instructions should be used. + // However, old cores (v5/v6) did use them in that way. + case '0': return 10; + case '1': return 11; + case '2': return 12; + case '3': return 13; + case '4': return 14; + case '5': return 15; + } + } +} + +/// parseITCondCode - Try to parse a condition code for an IT instruction. +ARMAsmParser::OperandMatchResultTy +ARMAsmParser::parseITCondCode(OperandVector &Operands, unsigned int &ErrorCode) { + MCAsmParser &Parser = getParser(); + SMLoc S = Parser.getTok().getLoc(); + const AsmToken &Tok = Parser.getTok(); + if (!Tok.is(AsmToken::Identifier)) + return MatchOperand_NoMatch; + unsigned CC = StringSwitch(Tok.getString().lower()) + .Case("eq", ARMCC::EQ) + .Case("ne", ARMCC::NE) + .Case("hs", ARMCC::HS) + .Case("cs", ARMCC::HS) + .Case("lo", ARMCC::LO) + .Case("cc", ARMCC::LO) + .Case("mi", ARMCC::MI) + .Case("pl", ARMCC::PL) + .Case("vs", ARMCC::VS) + .Case("vc", ARMCC::VC) + .Case("hi", ARMCC::HI) + .Case("ls", ARMCC::LS) + .Case("ge", ARMCC::GE) + .Case("lt", ARMCC::LT) + .Case("gt", ARMCC::GT) + .Case("le", ARMCC::LE) + .Case("al", ARMCC::AL) + .Default(~0U); + if (CC == ~0U) + return MatchOperand_NoMatch; + Parser.Lex(); // Eat the token. + + Operands.push_back(ARMOperand::CreateCondCode(ARMCC::CondCodes(CC), S)); + + return MatchOperand_Success; +} + +/// parseCoprocNumOperand - Try to parse an coprocessor number operand. The +/// token must be an Identifier when called, and if it is a coprocessor +/// number, the token is eaten and the operand is added to the operand list. +ARMAsmParser::OperandMatchResultTy +ARMAsmParser::parseCoprocNumOperand(OperandVector &Operands, unsigned int &ErrorCode) { + MCAsmParser &Parser = getParser(); + SMLoc S = Parser.getTok().getLoc(); + const AsmToken &Tok = Parser.getTok(); + if (Tok.isNot(AsmToken::Identifier)) + return MatchOperand_NoMatch; + + int Num = MatchCoprocessorOperandName(Tok.getString(), 'p'); + if (Num == -1) + return MatchOperand_NoMatch; + // ARMv7 and v8 don't allow cp10/cp11 due to VFP/NEON specific instructions + if ((hasV7Ops() || hasV8Ops()) && (Num == 10 || Num == 11)) + return MatchOperand_NoMatch; + + Parser.Lex(); // Eat identifier token. + Operands.push_back(ARMOperand::CreateCoprocNum(Num, S)); + return MatchOperand_Success; +} + +/// parseCoprocRegOperand - Try to parse an coprocessor register operand. The +/// token must be an Identifier when called, and if it is a coprocessor +/// number, the token is eaten and the operand is added to the operand list. +ARMAsmParser::OperandMatchResultTy +ARMAsmParser::parseCoprocRegOperand(OperandVector &Operands, unsigned int &ErrorCode) { + MCAsmParser &Parser = getParser(); + SMLoc S = Parser.getTok().getLoc(); + const AsmToken &Tok = Parser.getTok(); + if (Tok.isNot(AsmToken::Identifier)) + return MatchOperand_NoMatch; + + int Reg = MatchCoprocessorOperandName(Tok.getString(), 'c'); + if (Reg == -1) + return MatchOperand_NoMatch; + + Parser.Lex(); // Eat identifier token. + Operands.push_back(ARMOperand::CreateCoprocReg(Reg, S)); + return MatchOperand_Success; +} + +/// parseCoprocOptionOperand - Try to parse an coprocessor option operand. +/// coproc_option : '{' imm0_255 '}' +ARMAsmParser::OperandMatchResultTy +ARMAsmParser::parseCoprocOptionOperand(OperandVector &Operands, unsigned int &ErrorCode) +{ + MCAsmParser &Parser = getParser(); + SMLoc S = Parser.getTok().getLoc(); + + // If this isn't a '{', this isn't a coprocessor immediate operand. + if (Parser.getTok().isNot(AsmToken::LCurly)) + return MatchOperand_NoMatch; + Parser.Lex(); // Eat the '{' + + const MCExpr *Expr; + //SMLoc Loc = Parser.getTok().getLoc(); + if (getParser().parseExpression(Expr)) { + //Error(Loc, "illegal expression"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + const MCConstantExpr *CE = dyn_cast(Expr); + if (!CE || CE->getValue() < 0 || CE->getValue() > 255) { + //Error(Loc, "coprocessor option must be an immediate in range [0, 255]"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + int Val = CE->getValue(); + + // Check for and consume the closing '}' + if (Parser.getTok().isNot(AsmToken::RCurly)) + return MatchOperand_ParseFail; + SMLoc E = Parser.getTok().getEndLoc(); + Parser.Lex(); // Eat the '}' + + Operands.push_back(ARMOperand::CreateCoprocOption(Val, S, E)); + return MatchOperand_Success; +} + +// For register list parsing, we need to map from raw GPR register numbering +// to the enumeration values. The enumeration values aren't sorted by +// register number due to our using "sp", "lr" and "pc" as canonical names. +static unsigned getNextRegister(unsigned Reg) { + // If this is a GPR, we need to do it manually, otherwise we can rely + // on the sort ordering of the enumeration since the other reg-classes + // are sane. + if (!ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Reg)) + return Reg + 1; + switch(Reg) { + default: llvm_unreachable("Invalid GPR number!"); + case ARM::R0: return ARM::R1; case ARM::R1: return ARM::R2; + case ARM::R2: return ARM::R3; case ARM::R3: return ARM::R4; + case ARM::R4: return ARM::R5; case ARM::R5: return ARM::R6; + case ARM::R6: return ARM::R7; case ARM::R7: return ARM::R8; + case ARM::R8: return ARM::R9; case ARM::R9: return ARM::R10; + case ARM::R10: return ARM::R11; case ARM::R11: return ARM::R12; + case ARM::R12: return ARM::SP; case ARM::SP: return ARM::LR; + case ARM::LR: return ARM::PC; case ARM::PC: return ARM::R0; + } +} + +// Return the low-subreg of a given Q register. +static unsigned getDRegFromQReg(unsigned QReg) { + switch (QReg) { + default: llvm_unreachable("expected a Q register!"); + case ARM::Q0: return ARM::D0; + case ARM::Q1: return ARM::D2; + case ARM::Q2: return ARM::D4; + case ARM::Q3: return ARM::D6; + case ARM::Q4: return ARM::D8; + case ARM::Q5: return ARM::D10; + case ARM::Q6: return ARM::D12; + case ARM::Q7: return ARM::D14; + case ARM::Q8: return ARM::D16; + case ARM::Q9: return ARM::D18; + case ARM::Q10: return ARM::D20; + case ARM::Q11: return ARM::D22; + case ARM::Q12: return ARM::D24; + case ARM::Q13: return ARM::D26; + case ARM::Q14: return ARM::D28; + case ARM::Q15: return ARM::D30; + } +} + +/// Parse a register list. +bool ARMAsmParser::parseRegisterList(OperandVector &Operands) +{ + MCAsmParser &Parser = getParser(); + assert(Parser.getTok().is(AsmToken::LCurly) && + "Token is not a Left Curly Brace"); + SMLoc S = Parser.getTok().getLoc(); + Parser.Lex(); // Eat '{' token. + SMLoc RegLoc = Parser.getTok().getLoc(); + + // Check the first register in the list to see what register class + // this is a list of. + int Reg = tryParseRegister(); + if (Reg == -1) + //return Error(RegLoc, "register expected"); + return true; + + // The reglist instructions have at most 16 registers, so reserve + // space for that many. + int EReg = 0; + SmallVector, 16> Registers; + + // Allow Q regs and just interpret them as the two D sub-registers. + if (ARMMCRegisterClasses[ARM::QPRRegClassID].contains(Reg)) { + Reg = getDRegFromQReg(Reg); + EReg = MRI->getEncodingValue(Reg); + Registers.push_back(std::pair(EReg, Reg)); + ++Reg; + } + const MCRegisterClass *RC; + if (ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Reg)) + RC = &ARMMCRegisterClasses[ARM::GPRRegClassID]; + else if (ARMMCRegisterClasses[ARM::DPRRegClassID].contains(Reg)) + RC = &ARMMCRegisterClasses[ARM::DPRRegClassID]; + else if (ARMMCRegisterClasses[ARM::SPRRegClassID].contains(Reg)) + RC = &ARMMCRegisterClasses[ARM::SPRRegClassID]; + else + //return Error(RegLoc, "invalid register in register list"); + return true; + + // Store the register. + EReg = MRI->getEncodingValue(Reg); + Registers.push_back(std::pair(EReg, Reg)); + + // This starts immediately after the first register token in the list, + // so we can see either a comma or a minus (range separator) as a legal + // next token. + while (Parser.getTok().is(AsmToken::Comma) || + Parser.getTok().is(AsmToken::Minus)) { + if (Parser.getTok().is(AsmToken::Minus)) { + Parser.Lex(); // Eat the minus. + //SMLoc AfterMinusLoc = Parser.getTok().getLoc(); + int EndReg = tryParseRegister(); + if (EndReg == -1) + //return Error(AfterMinusLoc, "register expected"); + return true; + // Allow Q regs and just interpret them as the two D sub-registers. + if (ARMMCRegisterClasses[ARM::QPRRegClassID].contains(EndReg)) + EndReg = getDRegFromQReg(EndReg) + 1; + // If the register is the same as the start reg, there's nothing + // more to do. + if (Reg == EndReg) + continue; + // The register must be in the same register class as the first. + if (!RC->contains(EndReg)) + //return Error(AfterMinusLoc, "invalid register in register list"); + return true; + // Ranges must go from low to high. + if (MRI->getEncodingValue(Reg) > MRI->getEncodingValue(EndReg)) + //return Error(AfterMinusLoc, "bad range in register list"); + return true; + + // Add all the registers in the range to the register list. + while (Reg != EndReg) { + Reg = getNextRegister(Reg); + EReg = MRI->getEncodingValue(Reg); + Registers.push_back(std::pair(EReg, Reg)); + } + continue; + } + Parser.Lex(); // Eat the comma. + RegLoc = Parser.getTok().getLoc(); + int OldReg = Reg; + const AsmToken RegTok = Parser.getTok(); + Reg = tryParseRegister(); + if (Reg == -1) + //return Error(RegLoc, "register expected"); + return true; + // Allow Q regs and just interpret them as the two D sub-registers. + bool isQReg = false; + if (ARMMCRegisterClasses[ARM::QPRRegClassID].contains(Reg)) { + Reg = getDRegFromQReg(Reg); + isQReg = true; + } + // The register must be in the same register class as the first. + if (!RC->contains(Reg)) + //return Error(RegLoc, "invalid register in register list"); + return true; + // List must be monotonically increasing. + if (MRI->getEncodingValue(Reg) < MRI->getEncodingValue(OldReg)) { + if (ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Reg)) + Warning(RegLoc, "register list not in ascending order"); + else + //return Error(RegLoc, "register list not in ascending order"); + return true; + } + if (MRI->getEncodingValue(Reg) == MRI->getEncodingValue(OldReg)) { + Warning(RegLoc, "duplicated register (" + RegTok.getString() + + ") in register list"); + continue; + } + // VFP register lists must also be contiguous. + if (RC != &ARMMCRegisterClasses[ARM::GPRRegClassID] && + Reg != OldReg + 1) + //return Error(RegLoc, "non-contiguous register range"); + return true; + EReg = MRI->getEncodingValue(Reg); + Registers.push_back(std::pair(EReg, Reg)); + if (isQReg) { + EReg = MRI->getEncodingValue(++Reg); + Registers.push_back(std::pair(EReg, Reg)); + } + } + + if (Parser.getTok().isNot(AsmToken::RCurly)) + //return Error(Parser.getTok().getLoc(), "'}' expected"); + return true; + SMLoc E = Parser.getTok().getEndLoc(); + Parser.Lex(); // Eat '}' token. + + // Push the register list operand. + Operands.push_back(ARMOperand::CreateRegList(Registers, S, E)); + + // The ARM system instruction variants for LDM/STM have a '^' token here. + if (Parser.getTok().is(AsmToken::Caret)) { + Operands.push_back(ARMOperand::CreateToken("^",Parser.getTok().getLoc())); + Parser.Lex(); // Eat '^' token. + } + + return false; +} + +// Helper function to parse the lane index for vector lists. +ARMAsmParser::OperandMatchResultTy ARMAsmParser:: +parseVectorLane(VectorLaneTy &LaneKind, unsigned &Index, SMLoc &EndLoc, unsigned int &ErrorCode) +{ + MCAsmParser &Parser = getParser(); + Index = 0; // Always return a defined index value. + if (Parser.getTok().is(AsmToken::LBrac)) { + Parser.Lex(); // Eat the '['. + if (Parser.getTok().is(AsmToken::RBrac)) { + // "Dn[]" is the 'all lanes' syntax. + LaneKind = AllLanes; + EndLoc = Parser.getTok().getEndLoc(); + Parser.Lex(); // Eat the ']'. + return MatchOperand_Success; + } + + // There's an optional '#' token here. Normally there wouldn't be, but + // inline assemble puts one in, and it's friendly to accept that. + if (Parser.getTok().is(AsmToken::Hash)) + Parser.Lex(); // Eat '#' or '$'. + + const MCExpr *LaneIndex; + //SMLoc Loc = Parser.getTok().getLoc(); + if (getParser().parseExpression(LaneIndex)) { + //Error(Loc, "illegal expression"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + const MCConstantExpr *CE = dyn_cast(LaneIndex); + if (!CE) { + //Error(Loc, "lane index must be empty or an integer"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + if (Parser.getTok().isNot(AsmToken::RBrac)) { + //Error(Parser.getTok().getLoc(), "']' expected"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + EndLoc = Parser.getTok().getEndLoc(); + Parser.Lex(); // Eat the ']'. + int64_t Val = CE->getValue(); + + // FIXME: Make this range check context sensitive for .8, .16, .32. + if (Val < 0 || Val > 7) { + //Error(Parser.getTok().getLoc(), "lane index out of range"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + Index = Val; + LaneKind = IndexedLane; + return MatchOperand_Success; + } + LaneKind = NoLanes; + return MatchOperand_Success; +} + +// parse a vector register list +ARMAsmParser::OperandMatchResultTy +ARMAsmParser::parseVectorList(OperandVector &Operands, unsigned int &ErrorCode) +{ + MCAsmParser &Parser = getParser(); + VectorLaneTy LaneKind; + unsigned LaneIndex; + SMLoc S = Parser.getTok().getLoc(); + // As an extension (to match gas), support a plain D register or Q register + // (without encosing curly braces) as a single or double entry list, + // respectively. + if (Parser.getTok().is(AsmToken::Identifier)) { + SMLoc E = Parser.getTok().getEndLoc(); + int Reg = tryParseRegister(); + if (Reg == -1) + return MatchOperand_NoMatch; + if (ARMMCRegisterClasses[ARM::DPRRegClassID].contains(Reg)) { + OperandMatchResultTy Res = parseVectorLane(LaneKind, LaneIndex, E, ErrorCode); + if (Res != MatchOperand_Success) + return Res; + switch (LaneKind) { + case NoLanes: + Operands.push_back(ARMOperand::CreateVectorList(Reg, 1, false, S, E)); + break; + case AllLanes: + Operands.push_back(ARMOperand::CreateVectorListAllLanes(Reg, 1, false, + S, E)); + break; + case IndexedLane: + Operands.push_back(ARMOperand::CreateVectorListIndexed(Reg, 1, + LaneIndex, + false, S, E)); + break; + } + return MatchOperand_Success; + } + if (ARMMCRegisterClasses[ARM::QPRRegClassID].contains(Reg)) { + Reg = getDRegFromQReg(Reg); + OperandMatchResultTy Res = parseVectorLane(LaneKind, LaneIndex, E, ErrorCode); + if (Res != MatchOperand_Success) + return Res; + switch (LaneKind) { + case NoLanes: + Reg = MRI->getMatchingSuperReg(Reg, ARM::dsub_0, + &ARMMCRegisterClasses[ARM::DPairRegClassID]); + Operands.push_back(ARMOperand::CreateVectorList(Reg, 2, false, S, E)); + break; + case AllLanes: + Reg = MRI->getMatchingSuperReg(Reg, ARM::dsub_0, + &ARMMCRegisterClasses[ARM::DPairRegClassID]); + Operands.push_back(ARMOperand::CreateVectorListAllLanes(Reg, 2, false, + S, E)); + break; + case IndexedLane: + Operands.push_back(ARMOperand::CreateVectorListIndexed(Reg, 2, + LaneIndex, + false, S, E)); + break; + } + return MatchOperand_Success; + } + //Error(S, "vector register expected"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + + if (Parser.getTok().isNot(AsmToken::LCurly)) + return MatchOperand_NoMatch; + + Parser.Lex(); // Eat '{' token. + SMLoc RegLoc = Parser.getTok().getLoc(); + + int Reg = tryParseRegister(); + if (Reg == -1) { + //Error(RegLoc, "register expected"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + unsigned Count = 1; + int Spacing = 0; + unsigned FirstReg = Reg; + // The list is of D registers, but we also allow Q regs and just interpret + // them as the two D sub-registers. + if (ARMMCRegisterClasses[ARM::QPRRegClassID].contains(Reg)) { + FirstReg = Reg = getDRegFromQReg(Reg); + Spacing = 1; // double-spacing requires explicit D registers, otherwise + // it's ambiguous with four-register single spaced. + ++Reg; + ++Count; + } + + SMLoc E; + if (parseVectorLane(LaneKind, LaneIndex, E, ErrorCode) != MatchOperand_Success) + return MatchOperand_ParseFail; + + while (Parser.getTok().is(AsmToken::Comma) || + Parser.getTok().is(AsmToken::Minus)) { + if (Parser.getTok().is(AsmToken::Minus)) { + if (!Spacing) + Spacing = 1; // Register range implies a single spaced list. + else if (Spacing == 2) { + //Error(Parser.getTok().getLoc(), + // "sequential registers in double spaced list"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + Parser.Lex(); // Eat the minus. + //SMLoc AfterMinusLoc = Parser.getTok().getLoc(); + int EndReg = tryParseRegister(); + if (EndReg == -1) { + //Error(AfterMinusLoc, "register expected"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + // Allow Q regs and just interpret them as the two D sub-registers. + if (ARMMCRegisterClasses[ARM::QPRRegClassID].contains(EndReg)) + EndReg = getDRegFromQReg(EndReg) + 1; + // If the register is the same as the start reg, there's nothing + // more to do. + if (Reg == EndReg) + continue; + // The register must be in the same register class as the first. + if (!ARMMCRegisterClasses[ARM::DPRRegClassID].contains(EndReg)) { + //Error(AfterMinusLoc, "invalid register in register list"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + // Ranges must go from low to high. + if (Reg > EndReg) { + //Error(AfterMinusLoc, "bad range in register list"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + // Parse the lane specifier if present. + VectorLaneTy NextLaneKind; + unsigned NextLaneIndex; + if (parseVectorLane(NextLaneKind, NextLaneIndex, E, ErrorCode) != + MatchOperand_Success) + return MatchOperand_ParseFail; + if (NextLaneKind != LaneKind || LaneIndex != NextLaneIndex) { + //Error(AfterMinusLoc, "mismatched lane index in register list"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + + // Add all the registers in the range to the register list. + Count += EndReg - Reg; + Reg = EndReg; + continue; + } + Parser.Lex(); // Eat the comma. + RegLoc = Parser.getTok().getLoc(); + int OldReg = Reg; + Reg = tryParseRegister(); + if (Reg == -1) { + //Error(RegLoc, "register expected"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + // vector register lists must be contiguous. + // It's OK to use the enumeration values directly here rather, as the + // VFP register classes have the enum sorted properly. + // + // The list is of D registers, but we also allow Q regs and just interpret + // them as the two D sub-registers. + if (ARMMCRegisterClasses[ARM::QPRRegClassID].contains(Reg)) { + if (!Spacing) + Spacing = 1; // Register range implies a single spaced list. + else if (Spacing == 2) { + //Error(RegLoc, + // "invalid register in double-spaced list (must be 'D' register')"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + Reg = getDRegFromQReg(Reg); + if (Reg != OldReg + 1) { + //Error(RegLoc, "non-contiguous register range"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + ++Reg; + Count += 2; + // Parse the lane specifier if present. + VectorLaneTy NextLaneKind; + unsigned NextLaneIndex; + //SMLoc LaneLoc = Parser.getTok().getLoc(); + if (parseVectorLane(NextLaneKind, NextLaneIndex, E, ErrorCode) != + MatchOperand_Success) + return MatchOperand_ParseFail; + if (NextLaneKind != LaneKind || LaneIndex != NextLaneIndex) { + //Error(LaneLoc, "mismatched lane index in register list"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + continue; + } + // Normal D register. + // Figure out the register spacing (single or double) of the list if + // we don't know it already. + if (!Spacing) + Spacing = 1 + (Reg == OldReg + 2); + + // Just check that it's contiguous and keep going. + if (Reg != OldReg + Spacing) { + //Error(RegLoc, "non-contiguous register range"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + ++Count; + // Parse the lane specifier if present. + VectorLaneTy NextLaneKind; + unsigned NextLaneIndex; + //SMLoc EndLoc = Parser.getTok().getLoc(); + if (parseVectorLane(NextLaneKind, NextLaneIndex, E, ErrorCode) != MatchOperand_Success) + return MatchOperand_ParseFail; + if (NextLaneKind != LaneKind || LaneIndex != NextLaneIndex) { + //Error(EndLoc, "mismatched lane index in register list"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + } + + if (Parser.getTok().isNot(AsmToken::RCurly)) { + //Error(Parser.getTok().getLoc(), "'}' expected"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + E = Parser.getTok().getEndLoc(); + Parser.Lex(); // Eat '}' token. + + switch (LaneKind) { + case NoLanes: + // Two-register operands have been converted to the + // composite register classes. + if (Count == 2) { + const MCRegisterClass *RC = (Spacing == 1) ? + &ARMMCRegisterClasses[ARM::DPairRegClassID] : + &ARMMCRegisterClasses[ARM::DPairSpcRegClassID]; + FirstReg = MRI->getMatchingSuperReg(FirstReg, ARM::dsub_0, RC); + } + + Operands.push_back(ARMOperand::CreateVectorList(FirstReg, Count, + (Spacing == 2), S, E)); + break; + case AllLanes: + // Two-register operands have been converted to the + // composite register classes. + if (Count == 2) { + const MCRegisterClass *RC = (Spacing == 1) ? + &ARMMCRegisterClasses[ARM::DPairRegClassID] : + &ARMMCRegisterClasses[ARM::DPairSpcRegClassID]; + FirstReg = MRI->getMatchingSuperReg(FirstReg, ARM::dsub_0, RC); + } + Operands.push_back(ARMOperand::CreateVectorListAllLanes(FirstReg, Count, + (Spacing == 2), + S, E)); + break; + case IndexedLane: + Operands.push_back(ARMOperand::CreateVectorListIndexed(FirstReg, Count, + LaneIndex, + (Spacing == 2), + S, E)); + break; + } + return MatchOperand_Success; +} + +/// parseMemBarrierOptOperand - Try to parse DSB/DMB data barrier options. +ARMAsmParser::OperandMatchResultTy +ARMAsmParser::parseMemBarrierOptOperand(OperandVector &Operands, unsigned int &ErrorCode) { + MCAsmParser &Parser = getParser(); + SMLoc S = Parser.getTok().getLoc(); + const AsmToken &Tok = Parser.getTok(); + unsigned Opt; + + if (Tok.is(AsmToken::Identifier)) { + StringRef OptStr = Tok.getString(); + + Opt = StringSwitch(OptStr.slice(0, OptStr.size()).lower()) + .Case("sy", ARM_MB::SY) + .Case("st", ARM_MB::ST) + .Case("ld", ARM_MB::LD) + .Case("sh", ARM_MB::ISH) + .Case("ish", ARM_MB::ISH) + .Case("shst", ARM_MB::ISHST) + .Case("ishst", ARM_MB::ISHST) + .Case("ishld", ARM_MB::ISHLD) + .Case("nsh", ARM_MB::NSH) + .Case("un", ARM_MB::NSH) + .Case("nshst", ARM_MB::NSHST) + .Case("nshld", ARM_MB::NSHLD) + .Case("unst", ARM_MB::NSHST) + .Case("osh", ARM_MB::OSH) + .Case("oshst", ARM_MB::OSHST) + .Case("oshld", ARM_MB::OSHLD) + .Default(~0U); + + // ishld, oshld, nshld and ld are only available from ARMv8. + if (!hasV8Ops() && (Opt == ARM_MB::ISHLD || Opt == ARM_MB::OSHLD || + Opt == ARM_MB::NSHLD || Opt == ARM_MB::LD)) + Opt = ~0U; + + if (Opt == ~0U) + return MatchOperand_NoMatch; + + Parser.Lex(); // Eat identifier token. + } else if (Tok.is(AsmToken::Hash) || + Tok.is(AsmToken::Dollar) || + Tok.is(AsmToken::Integer)) { + if (Parser.getTok().isNot(AsmToken::Integer)) + Parser.Lex(); // Eat '#' or '$'. + + //SMLoc Loc = Parser.getTok().getLoc(); + + const MCExpr *MemBarrierID; + if (getParser().parseExpression(MemBarrierID)) { + //Error(Loc, "illegal expression"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + + const MCConstantExpr *CE = dyn_cast(MemBarrierID); + if (!CE) { + //Error(Loc, "constant expression expected"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + + int Val = CE->getValue(); + if (Val & ~0xf) { + //Error(Loc, "immediate value out of range"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + + Opt = ARM_MB::RESERVED_0 + Val; + } else + return MatchOperand_ParseFail; + + Operands.push_back(ARMOperand::CreateMemBarrierOpt((ARM_MB::MemBOpt)Opt, S)); + return MatchOperand_Success; +} + +/// parseInstSyncBarrierOptOperand - Try to parse ISB inst sync barrier options. +ARMAsmParser::OperandMatchResultTy +ARMAsmParser::parseInstSyncBarrierOptOperand(OperandVector &Operands, unsigned int &ErrorCode) { + MCAsmParser &Parser = getParser(); + SMLoc S = Parser.getTok().getLoc(); + const AsmToken &Tok = Parser.getTok(); + unsigned Opt; + + if (Tok.is(AsmToken::Identifier)) { + StringRef OptStr = Tok.getString(); + + if (OptStr.equals_lower("sy")) + Opt = ARM_ISB::SY; + else + return MatchOperand_NoMatch; + + Parser.Lex(); // Eat identifier token. + } else if (Tok.is(AsmToken::Hash) || + Tok.is(AsmToken::Dollar) || + Tok.is(AsmToken::Integer)) { + if (Parser.getTok().isNot(AsmToken::Integer)) + Parser.Lex(); // Eat '#' or '$'. + + //SMLoc Loc = Parser.getTok().getLoc(); + + const MCExpr *ISBarrierID; + if (getParser().parseExpression(ISBarrierID)) { + //Error(Loc, "illegal expression"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + + const MCConstantExpr *CE = dyn_cast(ISBarrierID); + if (!CE) { + //Error(Loc, "constant expression expected"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + + int Val = CE->getValue(); + if (Val & ~0xf) { + //Error(Loc, "immediate value out of range"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + + Opt = ARM_ISB::RESERVED_0 + Val; + } else + return MatchOperand_ParseFail; + + Operands.push_back(ARMOperand::CreateInstSyncBarrierOpt( + (ARM_ISB::InstSyncBOpt)Opt, S)); + return MatchOperand_Success; +} + + +/// parseProcIFlagsOperand - Try to parse iflags from CPS instruction. +ARMAsmParser::OperandMatchResultTy +ARMAsmParser::parseProcIFlagsOperand(OperandVector &Operands, unsigned int &ErrorCode) { + MCAsmParser &Parser = getParser(); + SMLoc S = Parser.getTok().getLoc(); + const AsmToken &Tok = Parser.getTok(); + if (!Tok.is(AsmToken::Identifier)) + return MatchOperand_NoMatch; + StringRef IFlagsStr = Tok.getString(); + + // An iflags string of "none" is interpreted to mean that none of the AIF + // bits are set. Not a terribly useful instruction, but a valid encoding. + unsigned IFlags = 0; + if (IFlagsStr != "none") { + for (int i = 0, e = IFlagsStr.size(); i != e; ++i) { + unsigned Flag = StringSwitch(IFlagsStr.substr(i, 1)) + .Case("a", ARM_PROC::A) + .Case("i", ARM_PROC::I) + .Case("f", ARM_PROC::F) + .Default(~0U); + + // If some specific iflag is already set, it means that some letter is + // present more than once, this is not acceptable. + if (Flag == ~0U || (IFlags & Flag)) + return MatchOperand_NoMatch; + + IFlags |= Flag; + } + } + + Parser.Lex(); // Eat identifier token. + Operands.push_back(ARMOperand::CreateProcIFlags((ARM_PROC::IFlags)IFlags, S)); + return MatchOperand_Success; +} + +/// parseMSRMaskOperand - Try to parse mask flags from MSR instruction. +ARMAsmParser::OperandMatchResultTy +ARMAsmParser::parseMSRMaskOperand(OperandVector &Operands, unsigned int &ErrorCode) { + MCAsmParser &Parser = getParser(); + SMLoc S = Parser.getTok().getLoc(); + const AsmToken &Tok = Parser.getTok(); + if (!Tok.is(AsmToken::Identifier)) + return MatchOperand_NoMatch; + StringRef Mask = Tok.getString(); + + if (isMClass()) { + // See ARMv6-M 10.1.1 + std::string Name = Mask.lower(); + unsigned FlagsVal = StringSwitch(Name) + // Note: in the documentation: + // ARM deprecates using MSR APSR without a _ qualifier as an alias + // for MSR APSR_nzcvq. + // but we do make it an alias here. This is so to get the "mask encoding" + // bits correct on MSR APSR writes. + // + // FIXME: Note the 0xc00 "mask encoding" bits version of the registers + // should really only be allowed when writing a special register. Note + // they get dropped in the MRS instruction reading a special register as + // the SYSm field is only 8 bits. + .Case("apsr", 0x800) + .Case("apsr_nzcvq", 0x800) + .Case("apsr_g", 0x400) + .Case("apsr_nzcvqg", 0xc00) + .Case("iapsr", 0x801) + .Case("iapsr_nzcvq", 0x801) + .Case("iapsr_g", 0x401) + .Case("iapsr_nzcvqg", 0xc01) + .Case("eapsr", 0x802) + .Case("eapsr_nzcvq", 0x802) + .Case("eapsr_g", 0x402) + .Case("eapsr_nzcvqg", 0xc02) + .Case("xpsr", 0x803) + .Case("xpsr_nzcvq", 0x803) + .Case("xpsr_g", 0x403) + .Case("xpsr_nzcvqg", 0xc03) + .Case("ipsr", 0x805) + .Case("epsr", 0x806) + .Case("iepsr", 0x807) + .Case("msp", 0x808) + .Case("psp", 0x809) + .Case("primask", 0x810) + .Case("basepri", 0x811) + .Case("basepri_max", 0x812) + .Case("faultmask", 0x813) + .Case("control", 0x814) + .Case("msplim", 0x80a) + .Case("psplim", 0x80b) + .Case("msp_ns", 0x888) + .Case("psp_ns", 0x889) + .Case("msplim_ns", 0x88a) + .Case("psplim_ns", 0x88b) + .Case("primask_ns", 0x890) + .Case("basepri_ns", 0x891) + .Case("basepri_max_ns", 0x892) + .Case("faultmask_ns", 0x893) + .Case("control_ns", 0x894) + .Case("sp_ns", 0x898) + .Default(~0U); + + if (FlagsVal == ~0U) + return MatchOperand_NoMatch; + + if (!hasDSP() && (FlagsVal & 0x400)) + // The _g and _nzcvqg versions are only valid if the DSP extension is + // available. + return MatchOperand_NoMatch; + + if (!hasV7Ops() && FlagsVal >= 0x811 && FlagsVal <= 0x813) + // basepri, basepri_max and faultmask only valid for V7m. + return MatchOperand_NoMatch; + + if (!has8MSecExt() && (FlagsVal == 0x80a || FlagsVal == 0x80b || + (FlagsVal > 0x814 && FlagsVal < 0xc00))) + return MatchOperand_NoMatch; + + if (!hasV8MMainline() && (FlagsVal == 0x88a || FlagsVal == 0x88b || + (FlagsVal > 0x890 && FlagsVal <= 0x893))) + return MatchOperand_NoMatch; + + Parser.Lex(); // Eat identifier token. + Operands.push_back(ARMOperand::CreateMSRMask(FlagsVal, S)); + return MatchOperand_Success; + } + + // Split spec_reg from flag, example: CPSR_sxf => "CPSR" and "sxf" + size_t Start = 0, Next = Mask.find('_'); + StringRef Flags = ""; + std::string SpecReg = Mask.slice(Start, Next).lower(); + if (Next != StringRef::npos) + Flags = Mask.slice(Next+1, Mask.size()); + + // FlagsVal contains the complete mask: + // 3-0: Mask + // 4: Special Reg (cpsr, apsr => 0; spsr => 1) + unsigned FlagsVal = 0; + + if (SpecReg == "apsr") { + FlagsVal = StringSwitch(Flags) + .Case("nzcvq", 0x8) // same as CPSR_f + .Case("g", 0x4) // same as CPSR_s + .Case("nzcvqg", 0xc) // same as CPSR_fs + .Default(~0U); + + if (FlagsVal == ~0U) { + if (!Flags.empty()) + return MatchOperand_NoMatch; + else + FlagsVal = 8; // No flag + } + } else if (SpecReg == "cpsr" || SpecReg == "spsr") { + // cpsr_all is an alias for cpsr_fc, as is plain cpsr. + if (Flags == "all" || Flags == "") + Flags = "fc"; + for (int i = 0, e = Flags.size(); i != e; ++i) { + unsigned Flag = StringSwitch(Flags.substr(i, 1)) + .Case("c", 1) + .Case("x", 2) + .Case("s", 4) + .Case("f", 8) + .Default(~0U); + + // If some specific flag is already set, it means that some letter is + // present more than once, this is not acceptable. + if (FlagsVal == ~0U || (FlagsVal & Flag)) + return MatchOperand_NoMatch; + FlagsVal |= Flag; + } + } else // No match for special register. + return MatchOperand_NoMatch; + + // Special register without flags is NOT equivalent to "fc" flags. + // NOTE: This is a divergence from gas' behavior. Uncommenting the following + // two lines would enable gas compatibility at the expense of breaking + // round-tripping. + // + // if (!FlagsVal) + // FlagsVal = 0x9; + + // Bit 4: Special Reg (cpsr, apsr => 0; spsr => 1) + if (SpecReg == "spsr") + FlagsVal |= 16; + + Parser.Lex(); // Eat identifier token. + Operands.push_back(ARMOperand::CreateMSRMask(FlagsVal, S)); + return MatchOperand_Success; +} + +/// parseBankedRegOperand - Try to parse a banked register (e.g. "lr_irq") for +/// use in the MRS/MSR instructions added to support virtualization. +ARMAsmParser::OperandMatchResultTy +ARMAsmParser::parseBankedRegOperand(OperandVector &Operands, unsigned int &ErrorCode) { + MCAsmParser &Parser = getParser(); + SMLoc S = Parser.getTok().getLoc(); + const AsmToken &Tok = Parser.getTok(); + if (!Tok.is(AsmToken::Identifier)) + return MatchOperand_NoMatch; + StringRef RegName = Tok.getString(); + + // The values here come from B9.2.3 of the ARM ARM, where bits 4-0 are SysM + // and bit 5 is R. + unsigned Encoding = StringSwitch(RegName.lower()) + .Case("r8_usr", 0x00) + .Case("r9_usr", 0x01) + .Case("r10_usr", 0x02) + .Case("r11_usr", 0x03) + .Case("r12_usr", 0x04) + .Case("sp_usr", 0x05) + .Case("lr_usr", 0x06) + .Case("r8_fiq", 0x08) + .Case("r9_fiq", 0x09) + .Case("r10_fiq", 0x0a) + .Case("r11_fiq", 0x0b) + .Case("r12_fiq", 0x0c) + .Case("sp_fiq", 0x0d) + .Case("lr_fiq", 0x0e) + .Case("lr_irq", 0x10) + .Case("sp_irq", 0x11) + .Case("lr_svc", 0x12) + .Case("sp_svc", 0x13) + .Case("lr_abt", 0x14) + .Case("sp_abt", 0x15) + .Case("lr_und", 0x16) + .Case("sp_und", 0x17) + .Case("lr_mon", 0x1c) + .Case("sp_mon", 0x1d) + .Case("elr_hyp", 0x1e) + .Case("sp_hyp", 0x1f) + .Case("spsr_fiq", 0x2e) + .Case("spsr_irq", 0x30) + .Case("spsr_svc", 0x32) + .Case("spsr_abt", 0x34) + .Case("spsr_und", 0x36) + .Case("spsr_mon", 0x3c) + .Case("spsr_hyp", 0x3e) + .Default(~0U); + + if (Encoding == ~0U) + return MatchOperand_NoMatch; + + Parser.Lex(); // Eat identifier token. + Operands.push_back(ARMOperand::CreateBankedReg(Encoding, S)); + return MatchOperand_Success; +} + +ARMAsmParser::OperandMatchResultTy +ARMAsmParser::parsePKHImm(OperandVector &Operands, StringRef Op, int Low, + int High, unsigned int &ErrorCode) +{ + MCAsmParser &Parser = getParser(); + const AsmToken &Tok = Parser.getTok(); + if (Tok.isNot(AsmToken::Identifier)) { + //Error(Parser.getTok().getLoc(), Op + " operand expected."); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + StringRef ShiftName = Tok.getString(); + std::string LowerOp = Op.lower(); + std::string UpperOp = Op.upper(); + if (ShiftName != LowerOp && ShiftName != UpperOp) { + //Error(Parser.getTok().getLoc(), Op + " operand expected."); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + Parser.Lex(); // Eat shift type token. + + // There must be a '#' and a shift amount. + if (Parser.getTok().isNot(AsmToken::Hash) && + Parser.getTok().isNot(AsmToken::Dollar)) { + //Error(Parser.getTok().getLoc(), "'#' expected"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + Parser.Lex(); // Eat hash token. + + const MCExpr *ShiftAmount; + SMLoc Loc = Parser.getTok().getLoc(); + SMLoc EndLoc; + if (getParser().parseExpression(ShiftAmount, EndLoc)) { + //Error(Loc, "illegal expression"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + const MCConstantExpr *CE = dyn_cast(ShiftAmount); + if (!CE) { + //Error(Loc, "constant expression expected"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + int Val = CE->getValue(); + if (Val < Low || Val > High) { + //Error(Loc, "immediate value out of range"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + + Operands.push_back(ARMOperand::CreateImm(CE, Loc, EndLoc)); + + return MatchOperand_Success; +} + +ARMAsmParser::OperandMatchResultTy +ARMAsmParser::parseSetEndImm(OperandVector &Operands, unsigned int &ErrorCode) +{ + MCAsmParser &Parser = getParser(); + const AsmToken &Tok = Parser.getTok(); + SMLoc S = Tok.getLoc(); + if (Tok.isNot(AsmToken::Identifier)) { + //Error(S, "'be' or 'le' operand expected"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + int Val = StringSwitch(Tok.getString().lower()) + .Case("be", 1) + .Case("le", 0) + .Default(-1); + Parser.Lex(); // Eat the token. + + if (Val == -1) { + //Error(S, "'be' or 'le' operand expected"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + Operands.push_back(ARMOperand::CreateImm(MCConstantExpr::create(Val, + getContext()), + S, Tok.getEndLoc())); + return MatchOperand_Success; +} + +/// parseShifterImm - Parse the shifter immediate operand for SSAT/USAT +/// instructions. Legal values are: +/// lsl #n 'n' in [0,31] +/// asr #n 'n' in [1,32] +/// n == 32 encoded as n == 0. +ARMAsmParser::OperandMatchResultTy +ARMAsmParser::parseShifterImm(OperandVector &Operands, unsigned int &ErrorCode) +{ + MCAsmParser &Parser = getParser(); + const AsmToken &Tok = Parser.getTok(); + SMLoc S = Tok.getLoc(); + if (Tok.isNot(AsmToken::Identifier)) { + //Error(S, "shift operator 'asr' or 'lsl' expected"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + StringRef ShiftName = Tok.getString(); + bool isASR; + if (ShiftName == "lsl" || ShiftName == "LSL") + isASR = false; + else if (ShiftName == "asr" || ShiftName == "ASR") + isASR = true; + else { + //Error(S, "shift operator 'asr' or 'lsl' expected"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + Parser.Lex(); // Eat the operator. + + // A '#' and a shift amount. + if (Parser.getTok().isNot(AsmToken::Hash) && + Parser.getTok().isNot(AsmToken::Dollar)) { + //Error(Parser.getTok().getLoc(), "'#' expected"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + Parser.Lex(); // Eat hash token. + //SMLoc ExLoc = Parser.getTok().getLoc(); + + const MCExpr *ShiftAmount; + SMLoc EndLoc; + if (getParser().parseExpression(ShiftAmount, EndLoc)) { + //Error(ExLoc, "malformed shift expression"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + const MCConstantExpr *CE = dyn_cast(ShiftAmount); + if (!CE) { + //Error(ExLoc, "shift amount must be an immediate"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + + int64_t Val = CE->getValue(); + if (isASR) { + // Shift amount must be in [1,32] + if (Val < 1 || Val > 32) { + //Error(ExLoc, "'asr' shift amount must be in range [1,32]"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + // asr #32 encoded as asr #0, but is not allowed in Thumb2 mode. + if (isThumb() && Val == 32) { + //Error(ExLoc, "'asr #32' shift amount not allowed in Thumb mode"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + if (Val == 32) Val = 0; + } else { + // Shift amount must be in [1,32] + if (Val < 0 || Val > 31) { + //Error(ExLoc, "'lsr' shift amount must be in range [0,31]"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + } + + Operands.push_back(ARMOperand::CreateShifterImm(isASR, Val, S, EndLoc)); + + return MatchOperand_Success; +} + +/// parseRotImm - Parse the shifter immediate operand for SXTB/UXTB family +/// of instructions. Legal values are: +/// ror #n 'n' in {0, 8, 16, 24} +ARMAsmParser::OperandMatchResultTy +ARMAsmParser::parseRotImm(OperandVector &Operands, unsigned int &ErrorCode) { + MCAsmParser &Parser = getParser(); + const AsmToken &Tok = Parser.getTok(); + SMLoc S = Tok.getLoc(); + if (Tok.isNot(AsmToken::Identifier)) + return MatchOperand_NoMatch; + StringRef ShiftName = Tok.getString(); + if (ShiftName != "ror" && ShiftName != "ROR") + return MatchOperand_NoMatch; + Parser.Lex(); // Eat the operator. + + // A '#' and a rotate amount. + if (Parser.getTok().isNot(AsmToken::Hash) && + Parser.getTok().isNot(AsmToken::Dollar)) { + //Error(Parser.getTok().getLoc(), "'#' expected"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + Parser.Lex(); // Eat hash token. + //SMLoc ExLoc = Parser.getTok().getLoc(); + + const MCExpr *ShiftAmount; + SMLoc EndLoc; + if (getParser().parseExpression(ShiftAmount, EndLoc)) { + //Error(ExLoc, "malformed rotate expression"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + const MCConstantExpr *CE = dyn_cast(ShiftAmount); + if (!CE) { + //Error(ExLoc, "rotate amount must be an immediate"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + + int64_t Val = CE->getValue(); + // Shift amount must be in {0, 8, 16, 24} (0 is undocumented extension) + // normally, zero is represented in asm by omitting the rotate operand + // entirely. + if (Val != 8 && Val != 16 && Val != 24 && Val != 0) { + //Error(ExLoc, "'ror' rotate amount must be 8, 16, or 24"); + ErrorCode = KS_ERR_ASM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + + Operands.push_back(ARMOperand::CreateRotImm(Val, S, EndLoc)); + + return MatchOperand_Success; +} + +ARMAsmParser::OperandMatchResultTy +ARMAsmParser::parseModImm(OperandVector &Operands, unsigned int &ErrorCode) +{ + MCAsmParser &Parser = getParser(); + MCAsmLexer &Lexer = getLexer(); + int64_t Imm1, Imm2; + + SMLoc S = Parser.getTok().getLoc(); + + // 1) A mod_imm operand can appear in the place of a register name: + // add r0, #mod_imm + // add r0, r0, #mod_imm + // to correctly handle the latter, we bail out as soon as we see an + // identifier. + // + // 2) Similarly, we do not want to parse into complex operands: + // mov r0, #mod_imm + // mov r0, :lower16:(_foo) + if (Parser.getTok().is(AsmToken::Identifier) || + Parser.getTok().is(AsmToken::Colon)) + return MatchOperand_NoMatch; + + // Hash (dollar) is optional as per the ARMARM + if (Parser.getTok().is(AsmToken::Hash) || + Parser.getTok().is(AsmToken::Dollar)) { + // Avoid parsing into complex operands (#:) + if (Lexer.peekTok().is(AsmToken::Colon)) + return MatchOperand_NoMatch; + + // Eat the hash (dollar) + Parser.Lex(); + } + + SMLoc Sx1, Ex1; + Sx1 = Parser.getTok().getLoc(); + const MCExpr *Imm1Exp; + if (getParser().parseExpression(Imm1Exp, Ex1)) { + //Error(Sx1, "malformed expression"); + ErrorCode = KS_ERR_ASM_ARM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + + const MCConstantExpr *CE = dyn_cast(Imm1Exp); + + if (CE) { + // Immediate must fit within 32-bits + Imm1 = CE->getValue(); + int Enc = ARM_AM::getSOImmVal(Imm1); + if (Enc != -1 && Parser.getTok().is(AsmToken::EndOfStatement)) { + // We have a match! + Operands.push_back(ARMOperand::CreateModImm((Enc & 0xFF), + (Enc & 0xF00) >> 7, + Sx1, Ex1)); + return MatchOperand_Success; + } + + // We have parsed an immediate which is not for us, fallback to a plain + // immediate. This can happen for instruction aliases. For an example, + // ARMInstrInfo.td defines the alias [mov <-> mvn] which can transform + // a mov (mvn) with a mod_imm_neg/mod_imm_not operand into the opposite + // instruction with a mod_imm operand. The alias is defined such that the + // parser method is shared, that's why we have to do this here. + if (Parser.getTok().is(AsmToken::EndOfStatement)) { + Operands.push_back(ARMOperand::CreateImm(Imm1Exp, Sx1, Ex1)); + return MatchOperand_Success; + } + } else { + // Operands like #(l1 - l2) can only be evaluated at a later stage (via an + // MCFixup). Fallback to a plain immediate. + Operands.push_back(ARMOperand::CreateImm(Imm1Exp, Sx1, Ex1)); + return MatchOperand_Success; + } + + // From this point onward, we expect the input to be a (#bits, #rot) pair + if (Parser.getTok().isNot(AsmToken::Comma)) { + //Error(Sx1, "expected modified immediate operand: #[0, 255], #even[0-30]"); + ErrorCode = KS_ERR_ASM_ARM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + + if (Imm1 & ~0xFF) { + // Error(Sx1, "immediate operand must a number in the range [0, 255]"); + ErrorCode = KS_ERR_ASM_ARM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + + // Eat the comma + Parser.Lex(); + + // Repeat for #rot + SMLoc Sx2, Ex2; + Sx2 = Parser.getTok().getLoc(); + + // Eat the optional hash (dollar) + if (Parser.getTok().is(AsmToken::Hash) || + Parser.getTok().is(AsmToken::Dollar)) + Parser.Lex(); + + const MCExpr *Imm2Exp; + if (getParser().parseExpression(Imm2Exp, Ex2)) { + // Error(Sx2, "malformed expression"); + ErrorCode = KS_ERR_ASM_ARM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + + CE = dyn_cast(Imm2Exp); + + if (CE) { + Imm2 = CE->getValue(); + if (!(Imm2 & ~0x1E)) { + // We have a match! + Operands.push_back(ARMOperand::CreateModImm(Imm1, Imm2, S, Ex2)); + return MatchOperand_Success; + } + // Error(Sx2, "immediate operand must an even number in the range [0, 30]"); + ErrorCode = KS_ERR_ASM_ARM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } else { + // Error(Sx2, "constant expression expected"); + ErrorCode = KS_ERR_ASM_ARM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } +} + +ARMAsmParser::OperandMatchResultTy +ARMAsmParser::parseBitfield(OperandVector &Operands, unsigned int &ErrorCode) +{ + MCAsmParser &Parser = getParser(); + SMLoc S = Parser.getTok().getLoc(); + // The bitfield descriptor is really two operands, the LSB and the width. + if (Parser.getTok().isNot(AsmToken::Hash) && + Parser.getTok().isNot(AsmToken::Dollar)) { + // Error(Parser.getTok().getLoc(), "'#' expected"); + ErrorCode = KS_ERR_ASM_ARM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + Parser.Lex(); // Eat hash token. + + const MCExpr *LSBExpr; + SMLoc E = Parser.getTok().getLoc(); + if (getParser().parseExpression(LSBExpr)) { + // Error(E, "malformed immediate expression"); + ErrorCode = KS_ERR_ASM_ARM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + const MCConstantExpr *CE = dyn_cast(LSBExpr); + if (!CE) { + // Error(E, "'lsb' operand must be an immediate"); + ErrorCode = KS_ERR_ASM_ARM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + + int64_t LSB = CE->getValue(); + // The LSB must be in the range [0,31] + if (LSB < 0 || LSB > 31) { + // Error(E, "'lsb' operand must be in the range [0,31]"); + ErrorCode = KS_ERR_ASM_ARM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + E = Parser.getTok().getLoc(); + + // Expect another immediate operand. + if (Parser.getTok().isNot(AsmToken::Comma)) { + // Error(Parser.getTok().getLoc(), "too few operands"); + ErrorCode = KS_ERR_ASM_ARM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + Parser.Lex(); // Eat hash token. + if (Parser.getTok().isNot(AsmToken::Hash) && + Parser.getTok().isNot(AsmToken::Dollar)) { + // Error(Parser.getTok().getLoc(), "'#' expected"); + ErrorCode = KS_ERR_ASM_ARM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + Parser.Lex(); // Eat hash token. + + const MCExpr *WidthExpr; + SMLoc EndLoc; + if (getParser().parseExpression(WidthExpr, EndLoc)) { + // Error(E, "malformed immediate expression"); + ErrorCode = KS_ERR_ASM_ARM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + CE = dyn_cast(WidthExpr); + if (!CE) { + // Error(E, "'width' operand must be an immediate"); + ErrorCode = KS_ERR_ASM_ARM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + + int64_t Width = CE->getValue(); + // The LSB must be in the range [1,32-lsb] + if (Width < 1 || Width > 32 - LSB) { + // Error(E, "'width' operand must be in the range [1,32-lsb]"); + ErrorCode = KS_ERR_ASM_ARM_INVALIDOPERAND; + return MatchOperand_ParseFail; + } + + Operands.push_back(ARMOperand::CreateBitfield(LSB, Width, S, EndLoc)); + + return MatchOperand_Success; +} + +ARMAsmParser::OperandMatchResultTy +ARMAsmParser::parsePostIdxReg(OperandVector &Operands, unsigned int &ErrorCode) { + // Check for a post-index addressing register operand. Specifically: + // postidx_reg := '+' register {, shift} + // | '-' register {, shift} + // | register {, shift} + + // This method must return MatchOperand_NoMatch without consuming any tokens + // in the case where there is no match, as other alternatives take other + // parse methods. + MCAsmParser &Parser = getParser(); + AsmToken Tok = Parser.getTok(); + SMLoc S = Tok.getLoc(); + bool haveEaten = false; + bool isAdd = true; + if (Tok.is(AsmToken::Plus)) { + Parser.Lex(); // Eat the '+' token. + haveEaten = true; + } else if (Tok.is(AsmToken::Minus)) { + Parser.Lex(); // Eat the '-' token. + isAdd = false; + haveEaten = true; + } + + SMLoc E = Parser.getTok().getEndLoc(); + int Reg = tryParseRegister(); + if (Reg == -1) { + if (!haveEaten) + return MatchOperand_NoMatch; + //Error(Parser.getTok().getLoc(), "register expected"); + return MatchOperand_ParseFail; + } + + ARM_AM::ShiftOpc ShiftTy = ARM_AM::no_shift; + unsigned ShiftImm = 0; + if (Parser.getTok().is(AsmToken::Comma)) { + Parser.Lex(); // Eat the ','. + if (parseMemRegOffsetShift(ShiftTy, ShiftImm)) + return MatchOperand_ParseFail; + + // FIXME: Only approximates end...may include intervening whitespace. + E = Parser.getTok().getLoc(); + } + + Operands.push_back(ARMOperand::CreatePostIdxReg(Reg, isAdd, ShiftTy, + ShiftImm, S, E)); + + return MatchOperand_Success; +} + +ARMAsmParser::OperandMatchResultTy +ARMAsmParser::parseAM3Offset(OperandVector &Operands, unsigned int &ErrorCode) { + // Check for a post-index addressing register operand. Specifically: + // am3offset := '+' register + // | '-' register + // | register + // | # imm + // | # + imm + // | # - imm + + // This method must return MatchOperand_NoMatch without consuming any tokens + // in the case where there is no match, as other alternatives take other + // parse methods. + MCAsmParser &Parser = getParser(); + AsmToken Tok = Parser.getTok(); + SMLoc S = Tok.getLoc(); + + // Do immediates first, as we always parse those if we have a '#'. + if (Parser.getTok().is(AsmToken::Hash) || + Parser.getTok().is(AsmToken::Dollar)) { + Parser.Lex(); // Eat '#' or '$'. + // Explicitly look for a '-', as we need to encode negative zero + // differently. + bool isNegative = Parser.getTok().is(AsmToken::Minus); + const MCExpr *Offset; + SMLoc E; + if (getParser().parseExpression(Offset, E)) + return MatchOperand_ParseFail; + const MCConstantExpr *CE = dyn_cast(Offset); + if (!CE) { + //Error(S, "constant expression expected"); + return MatchOperand_ParseFail; + } + // Negative zero is encoded as the flag value INT32_MIN. + int32_t Val = CE->getValue(); + if (isNegative && Val == 0) + Val = INT32_MIN; + + Operands.push_back( + ARMOperand::CreateImm(MCConstantExpr::create(Val, getContext()), S, E)); + + return MatchOperand_Success; + } + + + bool haveEaten = false; + bool isAdd = true; + if (Tok.is(AsmToken::Plus)) { + Parser.Lex(); // Eat the '+' token. + haveEaten = true; + } else if (Tok.is(AsmToken::Minus)) { + Parser.Lex(); // Eat the '-' token. + isAdd = false; + haveEaten = true; + } + + Tok = Parser.getTok(); + int Reg = tryParseRegister(); + if (Reg == -1) { + if (!haveEaten) + return MatchOperand_NoMatch; + //Error(Tok.getLoc(), "register expected"); + return MatchOperand_ParseFail; + } + + Operands.push_back(ARMOperand::CreatePostIdxReg(Reg, isAdd, ARM_AM::no_shift, + 0, S, Tok.getEndLoc())); + + return MatchOperand_Success; +} + +/// Convert parsed operands to MCInst. Needed here because this instruction +/// only has two register operands, but multiplication is commutative so +/// assemblers should accept both "mul rD, rN, rD" and "mul rD, rD, rN". +void ARMAsmParser::cvtThumbMultiply(MCInst &Inst, + const OperandVector &Operands) { + ((ARMOperand &)*Operands[3]).addRegOperands(Inst, 1); + ((ARMOperand &)*Operands[1]).addCCOutOperands(Inst, 1); + // If we have a three-operand form, make sure to set Rn to be the operand + // that isn't the same as Rd. + unsigned RegOp = 4; + if (Operands.size() == 6 && + ((ARMOperand &)*Operands[4]).getReg() == + ((ARMOperand &)*Operands[3]).getReg()) + RegOp = 5; + ((ARMOperand &)*Operands[RegOp]).addRegOperands(Inst, 1); + Inst.addOperand(Inst.getOperand(0)); + ((ARMOperand &)*Operands[2]).addCondCodeOperands(Inst, 2); +} + +void ARMAsmParser::cvtThumbBranches(MCInst &Inst, + const OperandVector &Operands) { + int CondOp = -1, ImmOp = -1; + switch(Inst.getOpcode()) { + case ARM::tB: + case ARM::tBcc: CondOp = 1; ImmOp = 2; break; + + case ARM::t2B: + case ARM::t2Bcc: CondOp = 1; ImmOp = 3; break; + + default: llvm_unreachable("Unexpected instruction in cvtThumbBranches"); + } + // first decide whether or not the branch should be conditional + // by looking at it's location relative to an IT block + if(inITBlock()) { + // inside an IT block we cannot have any conditional branches. any + // such instructions needs to be converted to unconditional form + switch(Inst.getOpcode()) { + case ARM::tBcc: Inst.setOpcode(ARM::tB); break; + case ARM::t2Bcc: Inst.setOpcode(ARM::t2B); break; + } + } else { + // outside IT blocks we can only have unconditional branches with AL + // condition code or conditional branches with non-AL condition code + unsigned Cond = static_cast(*Operands[CondOp]).getCondCode(); + switch(Inst.getOpcode()) { + case ARM::tB: + case ARM::tBcc: + Inst.setOpcode(Cond == ARMCC::AL ? ARM::tB : ARM::tBcc); + break; + case ARM::t2B: + case ARM::t2Bcc: + Inst.setOpcode(Cond == ARMCC::AL ? ARM::t2B : ARM::t2Bcc); + break; + } + } + + // now decide on encoding size based on branch target range + switch(Inst.getOpcode()) { + // classify tB as either t2B or t1B based on range of immediate operand + case ARM::tB: { + ARMOperand &op = static_cast(*Operands[ImmOp]); + if (!op.isSignedOffsetRel<11, 1>(Inst.getAddress()) && isThumb() && hasV8MBaseline()) + Inst.setOpcode(ARM::t2B); + break; + } + // classify tBcc as either t2Bcc or t1Bcc based on range of immediate operand + case ARM::tBcc: { + ARMOperand &op = static_cast(*Operands[ImmOp]); + if (!op.isSignedOffsetRel<8, 1>(Inst.getAddress()) && isThumb() && hasV8MBaseline()) + Inst.setOpcode(ARM::t2Bcc); + break; + } + } + ((ARMOperand &)*Operands[ImmOp]).addImmOperands(Inst, 1); + ((ARMOperand &)*Operands[CondOp]).addCondCodeOperands(Inst, 2); +} + +/// Parse an ARM memory expression, return false if successful else return true +/// or an error. The first token must be a '[' when called. +bool ARMAsmParser::parseMemory(OperandVector &Operands) +{ + MCAsmParser &Parser = getParser(); + SMLoc S, E; + assert(Parser.getTok().is(AsmToken::LBrac) && + "Token is not a Left Bracket"); + S = Parser.getTok().getLoc(); + Parser.Lex(); // Eat left bracket token. + + //const AsmToken &BaseRegTok = Parser.getTok(); + int BaseRegNum = tryParseRegister(); + if (BaseRegNum == -1) + //return Error(BaseRegTok.getLoc(), "register expected"); + return true; + + // The next token must either be a comma, a colon or a closing bracket. + const AsmToken &Tok = Parser.getTok(); + if (!Tok.is(AsmToken::Colon) && !Tok.is(AsmToken::Comma) && + !Tok.is(AsmToken::RBrac)) + //return Error(Tok.getLoc(), "malformed memory operand"); + return true; + + if (Tok.is(AsmToken::RBrac)) { + E = Tok.getEndLoc(); + Parser.Lex(); // Eat right bracket token. + + Operands.push_back(ARMOperand::CreateMem(BaseRegNum, nullptr, 0, + ARM_AM::no_shift, 0, 0, false, + S, E)); + + // If there's a pre-indexing writeback marker, '!', just add it as a token + // operand. It's rather odd, but syntactically valid. + if (Parser.getTok().is(AsmToken::Exclaim)) { + Operands.push_back(ARMOperand::CreateToken("!",Parser.getTok().getLoc())); + Parser.Lex(); // Eat the '!'. + } + + return false; + } + + assert((Tok.is(AsmToken::Colon) || Tok.is(AsmToken::Comma)) && + "Lost colon or comma in memory operand?!"); + if (Tok.is(AsmToken::Comma)) { + Parser.Lex(); // Eat the comma. + } + + // If we have a ':', it's an alignment specifier. + if (Parser.getTok().is(AsmToken::Colon)) { + Parser.Lex(); // Eat the ':'. + E = Parser.getTok().getLoc(); + SMLoc AlignmentLoc = Tok.getLoc(); + + const MCExpr *Expr; + if (getParser().parseExpression(Expr)) + return true; + + // The expression has to be a constant. Memory references with relocations + // don't come through here, as they use the
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