added imul and nor handlers...

CMakeLists.txt

@@ -54,6 +54,7 @@ list(APPEND vmprofiler_SOURCES
 	"src/vminstrs.cpp"
 	"src/vmlocate.cpp"
 	"src/vmprofiles/add.cpp"
+	"src/vmprofiles/imul.cpp"
 	"src/vmprofiles/jmp.cpp"
 	"src/vmprofiles/lconst.cpp"
 	"src/vmprofiles/lreg.cpp"

include/vminstrs.hpp

@@ -17,6 +17,7 @@ enum class mnemonic_t {
   mul,
   imul,
   nand,
+  nor,
   read,
   write,
   shl,
@@ -144,14 +145,17 @@ extern profiler_t add;
 extern profiler_t lvsp;
 extern profiler_t svsp;
 extern profiler_t nand;
+extern profiler_t nor;
 extern profiler_t read;
 extern profiler_t write;
+extern profiler_t imul;
 
 /// <summary>
 /// unsorted vector of profiles... they get sorted once at runtime...
 /// </summary>
-inline std::vector<profiler_t*> profiles = {
-    &write, &svsp, &read, &nand, &lvsp, &add, &jmp, &sreg, &lreg, &lconst};
+inline std::vector<profiler_t*> profiles = {&imul, &nor,  &write, &svsp,
+                                            &read, &nand, &lvsp,  &add,
+                                            &jmp,  &sreg, &lreg,  &lconst};
 
 /// <summary>
 /// no i did not make this by hand, you cannot clown upon me!

src/vmprofiles/imul.cpp

@@ -0,0 +1,67 @@
+#include <vminstrs.hpp>
+
+namespace vm::instrs {
+profiler_t imul = {
+    "IMUL",
+    mnemonic_t::imul,
+    {{// MOV REG, [VSP]
+      LOAD_VALUE,
+      // MOV REG, [VSP+OFFSET]
+      [&](const zydis_reg_t vip,
+          const zydis_reg_t vsp,
+          const zydis_decoded_instr_t& instr) -> bool {
+        return instr.mnemonic == ZYDIS_MNEMONIC_MOV &&
+               instr.operands[0].type == ZYDIS_OPERAND_TYPE_REGISTER &&
+               instr.operands[1].type == ZYDIS_OPERAND_TYPE_MEMORY &&
+               instr.operands[1].mem.base == vsp &&
+               instr.operands[1].mem.disp.has_displacement;
+      },
+      // IMUL REG
+      [&](const zydis_reg_t vip,
+          const zydis_reg_t vsp,
+          const zydis_decoded_instr_t& instr) -> bool {
+        return instr.mnemonic == ZYDIS_MNEMONIC_IMUL &&
+               instr.operands[0].type == ZYDIS_OPERAND_TYPE_REGISTER;
+      },
+      // MOV [VSP+OFFSET], REG
+      [&](const zydis_reg_t vip,
+          const zydis_reg_t vsp,
+          const zydis_decoded_instr_t& instr) -> bool {
+        return instr.mnemonic == ZYDIS_MNEMONIC_MOV &&
+               instr.operands[0].type == ZYDIS_OPERAND_TYPE_MEMORY &&
+               instr.operands[0].mem.base == vsp &&
+               instr.operands[0].mem.disp.has_displacement &&
+               instr.operands[1].type == ZYDIS_OPERAND_TYPE_REGISTER;
+      },
+      // PUSHFQ
+      [&](const zydis_reg_t vip,
+          const zydis_reg_t vsp,
+          const zydis_decoded_instr_t& instr) -> bool {
+        return instr.mnemonic == ZYDIS_MNEMONIC_PUSHFQ;
+      },
+      // POP [VSP]
+      [&](const zydis_reg_t vip,
+          const zydis_reg_t vsp,
+          const zydis_decoded_instr_t& instr) -> bool {
+        return instr.mnemonic == ZYDIS_MNEMONIC_POP &&
+               instr.operands[0].type == ZYDIS_OPERAND_TYPE_MEMORY &&
+               instr.operands[0].mem.base == vsp;
+      }}},
+    [&](zydis_reg_t& vip,
+        zydis_reg_t& vsp,
+        hndlr_trace_t& hndlr) -> std::optional<vinstr_t> {
+      vinstr_t res{mnemonic_t::imul};
+      res.imm.has_imm = false;
+
+      const auto imul_reg = std::find_if(
+          hndlr.m_instrs.begin(), hndlr.m_instrs.end(),
+          [&](emu_instr_t& instr) -> bool {
+            const auto& i = instr.m_instr;
+            return i.mnemonic == ZYDIS_MNEMONIC_IMUL &&
+                   i.operands[0].type == ZYDIS_OPERAND_TYPE_REGISTER;
+          });
+
+      res.stack_size = imul_reg->m_instr.operands[0].size;
+      return res;
+    }};
+}

src/vmprofiles/nor.cpp

@@ -0,0 +1,79 @@
+#include <vminstrs.hpp>
+
+namespace vm::instrs {
+profiler_t nor = {
+    "NOR",
+    mnemonic_t::nor,
+    {{// MOV REG, [VSP]
+      LOAD_VALUE,
+      // MOV REG, [VSP+OFFSET]
+      [&](const zydis_reg_t vip,
+          const zydis_reg_t vsp,
+          const zydis_decoded_instr_t& instr) -> bool {
+        return instr.mnemonic == ZYDIS_MNEMONIC_MOV &&
+               instr.operands[0].type == ZYDIS_OPERAND_TYPE_REGISTER &&
+               instr.operands[1].type == ZYDIS_OPERAND_TYPE_MEMORY &&
+               instr.operands[1].mem.base == vsp &&
+               instr.operands[1].mem.disp.has_displacement;
+      },
+      // NOT REG
+      [&](const zydis_reg_t vip,
+          const zydis_reg_t vsp,
+          const zydis_decoded_instr_t& instr) -> bool {
+        return instr.mnemonic == ZYDIS_MNEMONIC_NOT &&
+               instr.operands[0].type == ZYDIS_OPERAND_TYPE_REGISTER;
+      },
+      // OR REG, REG
+      [&](const zydis_reg_t vip,
+          const zydis_reg_t vsp,
+          const zydis_decoded_instr_t& instr) -> bool {
+        return instr.mnemonic == ZYDIS_MNEMONIC_OR &&
+               instr.operands[0].type == ZYDIS_OPERAND_TYPE_REGISTER &&
+               instr.operands[1].type == ZYDIS_OPERAND_TYPE_REGISTER;
+      },
+      // MOV [VSP+OFFSET], REG
+      [&](const zydis_reg_t vip,
+          const zydis_reg_t vsp,
+          const zydis_decoded_instr_t& instr) -> bool {
+        return instr.mnemonic == ZYDIS_MNEMONIC_MOV &&
+               instr.operands[0].type == ZYDIS_OPERAND_TYPE_MEMORY &&
+               instr.operands[0].mem.base == vsp &&
+               instr.operands[0].mem.disp.has_displacement &&
+               instr.operands[1].type == ZYDIS_OPERAND_TYPE_REGISTER;
+      },
+      // PUSHFQ
+      [&](const zydis_reg_t vip,
+          const zydis_reg_t vsp,
+          const zydis_decoded_instr_t& instr) -> bool {
+        return instr.mnemonic == ZYDIS_MNEMONIC_PUSHFQ;
+      },
+      // POP [VSP]
+      [&](const zydis_reg_t vip,
+          const zydis_reg_t vsp,
+          const zydis_decoded_instr_t& instr) -> bool {
+        return instr.mnemonic == ZYDIS_MNEMONIC_POP &&
+               instr.operands[0].type == ZYDIS_OPERAND_TYPE_MEMORY &&
+               instr.operands[0].mem.base == vsp;
+      }}},
+    [&](zydis_reg_t& vip,
+        zydis_reg_t& vsp,
+        hndlr_trace_t& hndlr) -> std::optional<vinstr_t> {
+      vinstr_t res{mnemonic_t::nand};
+      res.imm.has_imm = false;
+
+      // MOV [VSP+OFFSET], REG
+      const auto mov_vsp_reg = std::find_if(
+          hndlr.m_instrs.begin(), hndlr.m_instrs.end(),
+          [&](emu_instr_t& instr) -> bool {
+            const auto& i = instr.m_instr;
+            return i.mnemonic == ZYDIS_MNEMONIC_MOV &&
+                   i.operands[0].type == ZYDIS_OPERAND_TYPE_MEMORY &&
+                   i.operands[0].mem.base == vsp &&
+                   i.operands[0].mem.disp.has_displacement &&
+                   i.operands[1].type == ZYDIS_OPERAND_TYPE_REGISTER;
+          });
+
+      res.stack_size = mov_vsp_reg->m_instr.operands[1].size;
+      return res;
+    }};
+}