James 3 years ago
parent 3bacefeb79
commit 9a8738840a

@ -100,6 +100,15 @@ PUCHAR VmHandlerEpilogue(UINT InstructionSize, PUINT OutSize, XED_REG_ENUM Vip,
return XedEncodeInstructions(InstList, 3, OutSize); return XedEncodeInstructions(InstList, 3, OutSize);
} }
PUCHAR VmHandlerEnter(PUINT OutSize)
{
}
PUCHAR VmHandlerExit(PUINT OutSize)
{
}
PUCHAR VmHandlerIRegMem_B(VM_IREG_ENUM IReg, VM_OPERAND_SIZE_ENUM OperandSize, BOOL Load, PUINT OutSize, XED_REG_ENUM XReg1) PUCHAR VmHandlerIRegMem_B(VM_IREG_ENUM IReg, VM_OPERAND_SIZE_ENUM OperandSize, BOOL Load, PUINT OutSize, XED_REG_ENUM XReg1)
{ {
/* /*

@ -37,6 +37,9 @@ PUCHAR VmHandlerEpilogue(UINT InstructionSize, PUINT OutSize, XED_REG_ENUM Vip =
CONST CHAR* VmIClassToString(VM_ICLASS_ENUM IClass); CONST CHAR* VmIClassToString(VM_ICLASS_ENUM IClass);
PUCHAR VmHandlerEnter(PUINT OutSize);
PUCHAR VmHandlerExit(PUINT OutSize);
//Internal register(IReg) store/load //Internal register(IReg) store/load
PUCHAR VmHandlerIRegMem_B(VM_IREG_ENUM IReg, VM_OPERAND_SIZE_ENUM OperandSize, BOOL Load, PUINT OutSize, XED_REG_ENUM XReg1 = XED_REG_R8); PUCHAR VmHandlerIRegMem_B(VM_IREG_ENUM IReg, VM_OPERAND_SIZE_ENUM OperandSize, BOOL Load, PUINT OutSize, XED_REG_ENUM XReg1 = XED_REG_R8);
PUCHAR VmHandlerIRegMem_BD(VM_IREG_ENUM IReg, VM_OPERAND_SIZE_ENUM OperandSize, BOOL Load, PUINT OutSize, XED_REG_ENUM XReg1 = XED_REG_R8, XED_REG_ENUM XReg2 = XED_REG_R9); PUCHAR VmHandlerIRegMem_BD(VM_IREG_ENUM IReg, VM_OPERAND_SIZE_ENUM OperandSize, BOOL Load, PUINT OutSize, XED_REG_ENUM XReg1 = XED_REG_R8, XED_REG_ENUM XReg2 = XED_REG_R9);

@ -195,9 +195,6 @@ BOOL ViVirtualizeInst(PVIRTUALIZER Virt, XED_DECODED_INST* DecodedInst, PVM_CODE
case 3: Desc->Data = VmHandlerEncode3(IClass, OpSize[0], OpSize[1], OpSize[2], &Desc->DataSize); break; case 3: Desc->Data = VmHandlerEncode3(IClass, OpSize[0], OpSize[1], OpSize[2], &Desc->DataSize); break;
} }
} }
#ifdef VM_DEBUG_INFO
Link->Debug.NativeOp.OpCount = Operands.size();
#endif
VcAppendToBlock(&Prologue, Link); VcAppendToBlock(&Prologue, Link);
} }

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