minor fixes

master
xtremegamer1 2 years ago
parent 8d124ec828
commit 0c1b62b2ca

@ -11,7 +11,7 @@ uc_err uct_context_alloc(uc_engine *uc, uc_context **context)
} }
uc_err uct_context_free(uc_context *context) uc_err uct_context_free(uc_context *context)
{ {
+g_allocation_tracker--; --g_allocation_tracker;
//std::printf("Allocations: %p\n", g_allocation_tracker); //std::printf("Allocations: %p\n", g_allocation_tracker);
return uc_context_free(context); return uc_context_free(context);
} }

@ -1,19 +1,21 @@
#include <vminstrs.hpp> #include <vminstrs.hpp>
// Loads an address and value from the stack, ands the derefed address with the value
namespace vm::instrs { namespace vm::instrs {
profiler_t _and = { profiler_t _and = {
"AND", "AND",
mnemonic_t::_and, mnemonic_t::_and,
{{// MOV REG, [VSP] {{// MOV REG, [VSP] This is the address
LOAD_VALUE, LOAD_VALUE,
// MOV REG, [VSP+OFFSET] // MOV REG, [VSP+8]
[](const zydis_reg_t vip, const zydis_reg_t vsp, [](const zydis_reg_t vip, const zydis_reg_t vsp,
const zydis_decoded_instr_t& instr) -> bool { const zydis_decoded_instr_t& instr) -> bool {
return instr.mnemonic == ZYDIS_MNEMONIC_MOV && return instr.mnemonic == ZYDIS_MNEMONIC_MOV &&
instr.operands[0].type == ZYDIS_OPERAND_TYPE_REGISTER && instr.operands[0].type == ZYDIS_OPERAND_TYPE_REGISTER &&
instr.operands[1].type == ZYDIS_OPERAND_TYPE_MEMORY && instr.operands[1].type == ZYDIS_OPERAND_TYPE_MEMORY &&
instr.operands[1].mem.base == vsp && instr.operands[1].mem.base == vsp &&
instr.operands[1].mem.disp.has_displacement; instr.operands[1].mem.disp.has_displacement,
instr.operands[1].mem.disp.value == 8;
}, },
// AND [REG], REG // AND [REG], REG
[](const zydis_reg_t vip, const zydis_reg_t vsp, [](const zydis_reg_t vip, const zydis_reg_t vsp,

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