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210 lines
7.5 KiB
210 lines
7.5 KiB
/** @file
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ACPI IO Remapping Table (IORT) as specified in ARM spec DEN0049D
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http://infocenter.arm.com/help/topic/com.arm.doc.den0049d/DEN0049D_IO_Remapping_Table.pdf
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Copyright (c) 2017, Linaro Limited. All rights reserved.<BR>
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Copyright (c) 2018, ARM Limited. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef __IO_REMAPPING_TABLE_H__
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#define __IO_REMAPPING_TABLE_H__
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#include <IndustryStandard/Acpi.h>
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#define EFI_ACPI_IO_REMAPPING_TABLE_REVISION 0x0
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#define EFI_ACPI_IORT_TYPE_ITS_GROUP 0x0
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#define EFI_ACPI_IORT_TYPE_NAMED_COMP 0x1
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#define EFI_ACPI_IORT_TYPE_ROOT_COMPLEX 0x2
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#define EFI_ACPI_IORT_TYPE_SMMUv1v2 0x3
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#define EFI_ACPI_IORT_TYPE_SMMUv3 0x4
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#define EFI_ACPI_IORT_TYPE_PMCG 0x5
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#define EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA BIT0
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#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_TR BIT0
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#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_WA BIT1
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#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_RA BIT2
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#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_AHO BIT3
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#define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_CPM BIT0
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#define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_DACS BIT1
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#define EFI_ACPI_IORT_SMMUv1v2_MODEL_v1 0x0
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#define EFI_ACPI_IORT_SMMUv1v2_MODEL_v2 0x1
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#define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU400 0x2
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#define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU500 0x3
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#define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU401 0x4
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#define EFI_ACPI_IORT_SMMUv1v2_MODEL_CAVIUM_THX_v2 0x5
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#define EFI_ACPI_IORT_SMMUv1v2_FLAG_DVM BIT0
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#define EFI_ACPI_IORT_SMMUv1v2_FLAG_COH_WALK BIT1
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#define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL 0x0
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#define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_EDGE 0x1
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#define EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDE BIT0
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#define EFI_ACPI_IORT_SMMUv3_FLAG_HTTU_OVERRIDE BIT1
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#define EFI_ACPI_IORT_SMMUv3_FLAG_PROXIMITY_DOMAIN BIT3
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#define EFI_ACPI_IORT_SMMUv3_MODEL_GENERIC 0x0
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#define EFI_ACPI_IORT_SMMUv3_MODEL_HISILICON_HI161X 0x1
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#define EFI_ACPI_IORT_SMMUv3_MODEL_CAVIUM_CN99XX 0x2
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#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED 0x0
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#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED 0x1
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#define EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE BIT0
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#pragma pack(1)
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///
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/// Table header
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///
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typedef struct {
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EFI_ACPI_DESCRIPTION_HEADER Header;
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UINT32 NumNodes;
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UINT32 NodeOffset;
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UINT32 Reserved;
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} EFI_ACPI_6_0_IO_REMAPPING_TABLE;
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///
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/// Definition for ID mapping table shared by all node types
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///
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typedef struct {
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UINT32 InputBase;
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UINT32 NumIds;
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UINT32 OutputBase;
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UINT32 OutputReference;
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UINT32 Flags;
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} EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE;
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///
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/// Node header definition shared by all node types
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///
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typedef struct {
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UINT8 Type;
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UINT16 Length;
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UINT8 Revision;
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UINT32 Reserved;
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UINT32 NumIdMappings;
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UINT32 IdReference;
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} EFI_ACPI_6_0_IO_REMAPPING_NODE;
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///
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/// Node type 0: ITS node
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///
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typedef struct {
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EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
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UINT32 NumItsIdentifiers;
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//UINT32 ItsIdentifiers[NumItsIdentifiers];
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} EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE;
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///
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/// Node type 1: root complex node
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///
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typedef struct {
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EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
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UINT32 CacheCoherent;
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UINT8 AllocationHints;
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UINT16 Reserved;
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UINT8 MemoryAccessFlags;
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UINT32 AtsAttribute;
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UINT32 PciSegmentNumber;
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UINT8 MemoryAddressSize;
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UINT8 Reserved1[3];
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} EFI_ACPI_6_0_IO_REMAPPING_RC_NODE;
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///
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/// Node type 2: named component node
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///
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typedef struct {
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EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
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UINT32 Flags;
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UINT32 CacheCoherent;
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UINT8 AllocationHints;
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UINT16 Reserved;
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UINT8 MemoryAccessFlags;
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UINT8 AddressSizeLimit;
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//UINT8 ObjectName[];
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} EFI_ACPI_6_0_IO_REMAPPING_NAMED_COMP_NODE;
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///
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/// Node type 3: SMMUv1 or SMMUv2 node
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///
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typedef struct {
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UINT32 Interrupt;
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UINT32 InterruptFlags;
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} EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT;
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typedef struct {
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EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
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UINT64 Base;
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UINT64 Span;
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UINT32 Model;
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UINT32 Flags;
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UINT32 GlobalInterruptArrayRef;
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UINT32 NumContextInterrupts;
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UINT32 ContextInterruptArrayRef;
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UINT32 NumPmuInterrupts;
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UINT32 PmuInterruptArrayRef;
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UINT32 SMMU_NSgIrpt;
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UINT32 SMMU_NSgIrptFlags;
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UINT32 SMMU_NSgCfgIrpt;
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UINT32 SMMU_NSgCfgIrptFlags;
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//EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT ContextInterrupt[NumContextInterrupts];
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//EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT PmuInterrupt[NumPmuInterrupts];
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} EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE;
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///
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/// Node type 4: SMMUv3 node
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///
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typedef struct {
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EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
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UINT64 Base;
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UINT32 Flags;
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UINT32 Reserved;
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UINT64 VatosAddress;
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UINT32 Model;
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UINT32 Event;
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UINT32 Pri;
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UINT32 Gerr;
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UINT32 Sync;
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UINT32 ProximityDomain;
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UINT32 DeviceIdMappingIndex;
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} EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE;
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///
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/// Node type 5: PMCG node
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///
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typedef struct {
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EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
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UINT64 Base;
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UINT32 OverflowInterruptGsiv;
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UINT32 NodeReference;
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UINT64 Page1Base;
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//EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE OverflowInterruptMsiMapping[1];
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} EFI_ACPI_6_0_IO_REMAPPING_PMCG_NODE;
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#pragma pack()
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#endif
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