parent
300eed7a62
commit
ade6b0fdd7
@ -1,24 +1,36 @@
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#pragma once
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#include <Zydis/Zydis.h>
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#include <nt/image.hpp>
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#include <vmprofiler.hpp>
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#define ABS_TO_IMG( addr, mod_base, img_base ) ( addr - mod_base ) + img_base
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#define LEA_R12_SIG "\x4C\x8D\x25\x00\x00\x00\x00"
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#define LEA_R12_MASK "xxx????"
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#define PUSH_4B_IMM "\x68\x00\x00\x00\x00"
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#define PUSH_4B_MASK "x????"
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namespace vm::locate
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{
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struct vm_handler_table_info_t
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{
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std::uint32_t rva, lea_r12_rva;
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zydis_decoded_instr_t lea_r12_instr;
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namespace vm::locate {
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inline bool find(const zydis_routine_t &rtn,
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std::function<bool(const zydis_instr_t &)> callback) {
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auto res = std::find_if(rtn.begin(), rtn.end(), callback);
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return res != rtn.end();
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}
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struct vm_enter_t {
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std::uint32_t rva;
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std::uint32_t encrypted_rva;
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struct {
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std::uint32_t hndlr_tbl_rva;
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zydis_instr_t lea_r12_instr;
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} hndlr_tble;
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};
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std::vector< vm_handler_table_info_t > all_handler_tables( std::uintptr_t module_base );
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std::vector< std::pair< std::uint32_t, std::uint32_t > > all_vm_enters(
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std::uintptr_t module_base, std::vector< vm_handler_table_info_t > &vm_handler_tables );
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std::uintptr_t sigscan(void *base, std::uint32_t size, const char *pattern,
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const char *mask);
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// this routine will search the entire binary for all vm entries. It will apply
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// all known axioms/constants/signatures which are detailed here:
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// https://back.engineering/17/05/2021/#vm_entry
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std::vector<vm_enter_t> get_vm_entries(std::uintptr_t module_base,
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std::uint32_t module_size);
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} // namespace vm::locate
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@ -1,15 +1,211 @@
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#include <vmlocate.hpp>
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namespace vm::locate
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{
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std::vector< vm_handler_table_info_t > all_handler_tables( std::uintptr_t module_base )
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{
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return {};
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namespace vm::locate {
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std::uintptr_t sigscan(void* base, std::uint32_t size, const char* pattern,
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const char* mask) {
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static const auto check_mask = [&](const char* base, const char* pattern,
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const char* mask) -> bool {
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for (; *mask; ++base, ++pattern, ++mask)
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if (*mask == 'x' && *base != *pattern) return false;
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return true;
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};
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size -= std::strlen(mask);
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for (auto i = 0; i <= size; ++i) {
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void* addr = (void*)&(((char*)base)[i]);
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if (check_mask((char*)addr, pattern, mask))
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return reinterpret_cast<std::uintptr_t>(addr);
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}
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std::vector< std::pair< std::uint32_t, std::uint32_t > > all_vm_enters(
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std::uintptr_t module_base, std::vector< vm_handler_table_info_t > &vm_handler_tables )
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{
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return {};
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}
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std::vector<vm_enter_t> get_vm_entries(std::uintptr_t module_base,
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std::uint32_t module_size) {
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std::uintptr_t result = module_base;
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std::vector<vm_enter_t> entries;
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static const auto push_regs = [&](const zydis_routine_t& rtn) -> bool {
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for (unsigned reg = ZYDIS_REGISTER_RAX; reg < ZYDIS_REGISTER_R15; ++reg) {
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auto res = std::find_if(
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rtn.begin(), rtn.end(), [&](const zydis_instr_t& instr) -> bool {
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return instr.instr.mnemonic == ZYDIS_MNEMONIC_PUSH &&
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instr.instr.operands[0].type ==
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ZYDIS_OPERAND_TYPE_REGISTER &&
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instr.instr.operands[0].reg.value == reg;
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});
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// skip RSP push...
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if (res == rtn.end() && reg != ZYDIS_REGISTER_RSP) return false;
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}
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return true;
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};
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do {
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result = sigscan((void*)++result, module_size - (result - module_base),
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PUSH_4B_IMM, PUSH_4B_MASK);
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zydis_routine_t rtn;
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if (!scn::executable(module_base, result)) continue;
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if (!vm::util::flatten(rtn, result, false, 500, module_base)) continue;
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// the last instruction in the stream should be a JMP (RCX OR RDX)
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const auto& last_instr = rtn[rtn.size() - 1];
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if (!(last_instr.instr.mnemonic == ZYDIS_MNEMONIC_JMP &&
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last_instr.instr.operands[0].type == ZYDIS_OPERAND_TYPE_REGISTER &&
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(last_instr.instr.operands[0].reg.value == ZYDIS_REGISTER_RDX ||
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last_instr.instr.operands[0].reg.value == ZYDIS_REGISTER_RCX)))
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continue;
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std::uint8_t num_pushs = 0u;
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std::for_each(rtn.begin(), rtn.end(), [&](const zydis_instr_t& instr) {
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if (instr.instr.mnemonic == ZYDIS_MNEMONIC_PUSH &&
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instr.instr.operands[0].type == ZYDIS_OPERAND_TYPE_IMMEDIATE)
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++num_pushs;
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});
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/*
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only two legit imm pushes for every vm entry...
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> 0x822c : push 0xFFFFFFFF890001FA <---
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> 0x7fc9 : push 0x45D3BF1F <---
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> 0x48e4 : push r13
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> 0x4690 : push rsi
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> 0x4e53 : push r14
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> 0x74fb : push rcx
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> 0x607c : push rsp
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> 0x4926 : pushfq
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> 0x4dc2 : push rbp
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> 0x5c8c : push r12
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> 0x52ac : push r10
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> 0x51a5 : push r9
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> 0x5189 : push rdx
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> 0x7d5f : push r8
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> 0x4505 : push rdi
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> 0x4745 : push r11
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> 0x478b : push rax
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> 0x7a53 : push rbx
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> 0x500d : push r15
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*/
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if (num_pushs > 2) continue;
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// check for a pushfq...
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// > 0x4926 : pushfq <---
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if (!vm::locate::find(rtn, [&](const zydis_instr_t& instr) -> bool {
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return instr.instr.mnemonic == ZYDIS_MNEMONIC_PUSHFQ;
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}))
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continue;
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/*
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check to see if we push all of these registers...
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> 0x48e4 : push r13
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> 0x4690 : push rsi
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> 0x4e53 : push r14
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> 0x74fb : push rcx
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> 0x607c : push rsp
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> 0x4926 : pushfq
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> 0x4dc2 : push rbp
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> 0x5c8c : push r12
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> 0x52ac : push r10
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> 0x51a5 : push r9
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> 0x5189 : push rdx
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> 0x7d5f : push r8
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> 0x4505 : push rdi
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> 0x4745 : push r11
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> 0x478b : push rax
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> 0x7a53 : push rbx
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> 0x500d : push r15
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*/
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if (!push_regs(rtn)) continue;
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// check for a mov rax, 0ull
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if (!vm::locate::find(rtn, [&](const zydis_instr_t& instr) -> bool {
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return instr.instr.mnemonic == ZYDIS_MNEMONIC_MOV &&
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instr.instr.operands[0].type == ZYDIS_OPERAND_TYPE_REGISTER &&
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instr.instr.operands[0].reg.value == ZYDIS_REGISTER_RAX &&
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instr.instr.operands[1].type == ZYDIS_OPERAND_TYPE_IMMEDIATE &&
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instr.instr.operands[1].size == 64 &&
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instr.instr.operands[1].imm.value.u == 0ull;
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}))
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continue;
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// check for a mov r13, rax...
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if (!vm::locate::find(rtn, [&](const zydis_instr_t& instr) -> bool {
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return instr.instr.mnemonic == ZYDIS_MNEMONIC_MOV &&
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instr.instr.operands[0].type == ZYDIS_OPERAND_TYPE_REGISTER &&
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instr.instr.operands[0].reg.value == ZYDIS_REGISTER_R13 &&
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instr.instr.operands[1].type == ZYDIS_OPERAND_TYPE_REGISTER &&
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instr.instr.operands[1].reg.value == ZYDIS_REGISTER_RAX;
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}))
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continue;
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// check for a mov rbp, rsp
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if (!vm::locate::find(rtn, [&](const zydis_instr_t& instr) -> bool {
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return instr.instr.mnemonic == ZYDIS_MNEMONIC_MOV &&
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instr.instr.operands[0].type == ZYDIS_OPERAND_TYPE_REGISTER &&
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instr.instr.operands[0].reg.value == ZYDIS_REGISTER_RBP &&
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instr.instr.operands[1].type == ZYDIS_OPERAND_TYPE_REGISTER &&
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instr.instr.operands[1].reg.value == ZYDIS_REGISTER_RSP;
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}))
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continue;
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// check for a mov rdi, rsp
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if (!vm::locate::find(rtn, [&](const zydis_instr_t& instr) -> bool {
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return instr.instr.mnemonic == ZYDIS_MNEMONIC_MOV &&
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instr.instr.operands[0].type == ZYDIS_OPERAND_TYPE_REGISTER &&
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instr.instr.operands[0].reg.value == ZYDIS_REGISTER_RDI &&
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instr.instr.operands[1].type == ZYDIS_OPERAND_TYPE_REGISTER &&
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instr.instr.operands[1].reg.value == ZYDIS_REGISTER_RSP;
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}))
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continue;
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// check for a mov esi, [rsp+0xA0]
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if (!vm::locate::find(rtn, [&](const zydis_instr_t& instr) -> bool {
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return instr.instr.mnemonic == ZYDIS_MNEMONIC_MOV &&
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instr.instr.operands[0].reg.value == ZYDIS_REGISTER_ESI &&
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instr.instr.operands[1].type == ZYDIS_OPERAND_TYPE_MEMORY &&
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instr.instr.operands[1].mem.base == ZYDIS_REGISTER_RSP &&
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instr.instr.operands[1].mem.disp.value == 0xA0;
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}))
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continue;
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// check for a lea r12, [vm_handler_table]
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if (!vm::locate::find(rtn, [&](const zydis_instr_t& instr) -> bool {
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return instr.instr.mnemonic == ZYDIS_MNEMONIC_LEA &&
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instr.instr.operands[0].type == ZYDIS_OPERAND_TYPE_REGISTER &&
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instr.instr.operands[0].reg.value == ZYDIS_REGISTER_R12 &&
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instr.instr.raw.sib.base == ZYDIS_REGISTER_NONE;
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}))
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continue;
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// if code execution gets to here then we can assume this is a legit vm
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// entry... its time to build a vm_enter_t... first we check to see if an
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// existing entry already exits...
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auto push_val = (std::uint32_t)rtn[0].instr.operands[0].imm.value.u;
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if (std::find_if(entries.begin(), entries.end(),
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[&](const vm_enter_t& vm_enter) -> bool {
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return vm_enter.encrypted_rva == push_val;
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}) != entries.end())
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continue;
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auto hndlr_tbl = std::find_if(
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rtn.begin(), rtn.end(), [&](const zydis_instr_t& instr) -> bool {
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return instr.instr.mnemonic == ZYDIS_MNEMONIC_LEA &&
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instr.instr.operands[0].type == ZYDIS_OPERAND_TYPE_REGISTER &&
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instr.instr.operands[0].reg.value == ZYDIS_REGISTER_R12 &&
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instr.instr.operands[1].type == ZYDIS_OPERAND_TYPE_MEMORY &&
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instr.instr.operands[1].mem.base == ZYDIS_REGISTER_NONE;
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});
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vm_enter_t entry{(std::uint32_t)(result - module_base), push_val};
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entry.hndlr_tble.lea_r12_instr = *hndlr_tbl;
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entry.hndlr_tble.hndlr_tbl_rva =
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(hndlr_tbl->instr.operands[1].mem.disp.value + result +
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hndlr_tbl->instr.length) -
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module_base;
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entries.push_back(entry);
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} while (result);
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return entries;
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}
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} // namespace vm::locate
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