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@ -21,10 +21,10 @@ profiler_t nor = {
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return instr.mnemonic == ZYDIS_MNEMONIC_NOT &&
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return instr.mnemonic == ZYDIS_MNEMONIC_NOT &&
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instr.operands[0].type == ZYDIS_OPERAND_TYPE_REGISTER;
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instr.operands[0].type == ZYDIS_OPERAND_TYPE_REGISTER;
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},
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},
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// OR REG, REG
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// AND REG, REG
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[](const zydis_reg_t vip, const zydis_reg_t vsp,
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[](const zydis_reg_t vip, const zydis_reg_t vsp,
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const zydis_decoded_instr_t& instr) -> bool {
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const zydis_decoded_instr_t& instr) -> bool {
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return instr.mnemonic == ZYDIS_MNEMONIC_OR &&
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return instr.mnemonic == ZYDIS_MNEMONIC_AND &&
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instr.operands[0].type == ZYDIS_OPERAND_TYPE_REGISTER &&
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instr.operands[0].type == ZYDIS_OPERAND_TYPE_REGISTER &&
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instr.operands[1].type == ZYDIS_OPERAND_TYPE_REGISTER;
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instr.operands[1].type == ZYDIS_OPERAND_TYPE_REGISTER;
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},
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},
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@ -51,7 +51,7 @@ profiler_t nor = {
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}}},
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}}},
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[](zydis_reg_t& vip, zydis_reg_t& vsp,
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[](zydis_reg_t& vip, zydis_reg_t& vsp,
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hndlr_trace_t& hndlr) -> std::optional<vinstr_t> {
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hndlr_trace_t& hndlr) -> std::optional<vinstr_t> {
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vinstr_t res{mnemonic_t::nand};
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vinstr_t res{mnemonic_t::nor};
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res.imm.has_imm = false;
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res.imm.has_imm = false;
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// MOV [VSP+OFFSET], REG
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// MOV [VSP+OFFSET], REG
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