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@ -43,9 +43,9 @@ guest cr4: 0x00000000000026F8 0b0010 0110 1111 1000
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##### Checks on Guest MSRs
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* If the “load debug controls” VM-entry control is 1, bits reserved in the IA32_DEBUGCTL MSR must be 0 in the
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field for that register. The first processors to support the virtual-machine extensions supported only the 1-
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setting of this control and thus performed this check unconditionally.
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field for that register. (this is not set in vm entry control fields in my vmcs...) :white_check_mark:
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#### 26.3.1.2 Checks on Guest Segment Registers
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This section specifies the checks on the fields for CS, SS, DS, ES, FS, GS, TR, and LDTR.
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