fedw

awfawd

CodeVirtualizer/Jit.cpp

@@ -212,6 +212,7 @@ PNATIVE_CODE_BLOCK JitEmitPostRipMov(PNATIVE_CODE_LINK Link, INT32 Delta)
 		RipDelta += (FourByte - (Count - 1)) * DWORD_MOV_INST_LENGTH;
 		RipDelta *= (-1);
 		RipDelta += Delta;
+		ZeroValue = rand();
 		if (!JitEmitRipRelativeMovD(Block, RipDelta, (PUCHAR)&ZeroValue))
 		{
 			NcDeleteBlock(Block);
@@ -228,6 +229,7 @@ PNATIVE_CODE_BLOCK JitEmitPostRipMov(PNATIVE_CODE_LINK Link, INT32 Delta)
 		RipDelta += WORD_MOV_INST_LENGTH;
 		RipDelta *= (-1);
 		RipDelta += Delta;
+		ZeroValue = rand();
 		if (!JitEmitRipRelativeMovW(Block, RipDelta, (PUCHAR)&ZeroValue))
 		{
 			NcDeleteBlock(Block);
@@ -244,6 +246,7 @@ PNATIVE_CODE_BLOCK JitEmitPostRipMov(PNATIVE_CODE_LINK Link, INT32 Delta)
 		RipDelta += BYTE_MOV_INST_LENGTH;
 		RipDelta *= (-1);
 		RipDelta += Delta;
+		ZeroValue = rand();
 		if (!JitEmitRipRelativeMovB(Block, RipDelta, (PUCHAR)&ZeroValue))
 		{
 			NcDeleteBlock(Block);

CodeVirtualizer/NativeCode.cpp

@@ -138,6 +138,7 @@ ULONG NcGenUnusedLabelId(PNATIVE_CODE_BLOCK Block)
 	ULONG ReturnLabelId = rand();
 	while (StdFind(Block->LabelIds.begin(), Block->LabelIds.end(), ReturnLabelId) != Block->LabelIds.end())
 		ReturnLabelId = rand();
+	Block->LabelIds.push_back(ReturnLabelId);
 	return ReturnLabelId;
 }
 
@@ -156,9 +157,7 @@ VOID NcFixLabelsForBlocks(PNATIVE_CODE_BLOCK Block1, PNATIVE_CODE_BLOCK Block2)
 	{
 		if ((T->Flags & CODE_FLAG_IS_LABEL) && StdFind(Block1->LabelIds.begin(), Block1->LabelIds.end(), T->Label) != Block1->LabelIds.end())
 		{
-			ULONG Lid = NcGenUnusedLabelId(Block1);
+			NcChangeLabelId(Block2, T->Label, NcGenUnusedLabelId(Block1));
-			NcChangeLabelId(Block2, T->Label, Lid);
-			Block1->LabelIds.push_back(Lid);
 		}
 	}
 }

CodeVirtualizer/build/obj/DEC-ERR.txt

@@ -0,0 +1,2 @@
+[WARNING] isa_set referenced by chip model hierarchy, but not used by any instructions: 3DNOW_PREFETCH
+[WARNING] isa_set referenced by chip model hierarchy, but not used by any instructions: PREFETCHW

CodeVirtualizer/build/obj/DECGEN-OUTPUT-FILES.txt

@@ -0,0 +1,128 @@
+obj/xed-operand-ctype-enum.h
+obj/xed-operand-ctype-map.h
+obj/xed-reg-enum.h
+obj/xed-reg-class-enum.h
+obj/xed-operand-width-enum.h
+obj/xed-operand-element-type-enum.h
+obj/xed-operand-element-xtype-enum.h
+obj/xed-init-pointer-names.h
+obj/xed-iclass-enum.h
+obj/xed-iform-enum.h
+obj/xed-iformfl-enum.h
+obj/xed-exception-enum.h
+obj/xed-nonterminal-enum.h
+obj/xed-operand-enum.h
+obj/xed-operand-type-enum.h
+obj/xed-attribute-enum.h
+obj/xed-category-enum.h
+obj/xed-extension-enum.h
+obj/xed-address-width-enum.h
+obj/xed-error-enum.h
+obj/xed-flag-action-enum.h
+obj/xed-flag-enum.h
+obj/xed-machine-mode-enum.h
+obj/xed-operand-action-enum.h
+obj/xed-operand-visibility-enum.h
+obj/xed-reg-role-enum.h
+obj/xed-syntax-enum.h
+obj/xed-gen-table-defs.h
+obj/xed-chip-enum.h
+obj/xed-isa-set-enum.h
+obj\include-private/xed-chip-features-table.h
+obj/include-private/xed-ild-modrm.h
+obj/include-private/xed-ild-eosz.h
+obj/include-private/xed-ild-eosz-getters.h
+obj/include-private/xed-ild-easz.h
+obj/include-private/xed-ild-easz-getters.h
+obj/include-private/xed-ild-imm-l3.h
+obj/include-private/xed-ild-imm-l2.h
+obj/include-private/xed-ild-imm-l1.h
+obj/include-private/xed-ild-imm-bytes.h
+obj/include-private/xed-ild-disp-l3.h
+obj/include-private/xed-ild-disp-l2.h
+obj/include-private/xed-ild-disp-l1.h
+obj/include-private/xed-ild-disp-bytes.h
+obj/include-private/xed3-phash-vv0.h
+obj/include-private/xed3-phash-lu-vv0.h
+obj/include-private/xed3-phash-vv1.h
+obj/include-private/xed3-phash-lu-vv1.h
+obj/include-private/xed3-phash-vv2.h
+obj/include-private/xed3-phash-lu-vv2.h
+obj/include-private/xed3-phash-vv3.h
+obj/include-private/xed3-phash-lu-vv3.h
+obj/include-private/xed3-operand-lu.h
+obj/include-private/xed3-phash.h
+obj/include-private/xed3-nt-capture.h
+obj/include-private/xed3-chain-capture.h
+obj/include-private/xed3-op-chain-capture.h
+obj/include-private/xed3-dynamic-part1-capture.h
+obj/xed-ild-enum.h
+obj/xed-mapu-enum.h
+obj\include-private/xed-map-feature-tables.h
+obj/xed-cpuid-bit-enum.h
+obj/xed-operand-ctype-enum.c
+obj/xed-operand-ctype-map.c
+obj/xed-reg-enum.c
+obj/xed-reg-class-enum.c
+obj/xed-init-reg-class.c
+obj/xed-operand-width-enum.c
+obj/xed-init-width.c
+obj/xed-operand-element-type-enum.c
+obj/xed-operand-element-xtype-enum.c
+obj/xed-init-operand-type-mappings.c
+obj/xed-init-pointer-names.c
+obj/xed-iclass-enum.c
+obj/xed-rep-map.c
+obj/xed-iform-enum.c
+obj/xed-iformfl-enum.c
+obj/xed-iform-max.c
+obj/xed-exception-enum.c
+obj/xed-init-inst-table-data.c
+obj/xed-init-operand-data.c
+obj/xed-init-operand-sequences.c
+obj/xed-attributes-list.c
+obj/xed-nonterminal-enum.c
+obj/xed-operand-enum.c
+obj/xed-operand-type-enum.c
+obj/xed-attribute-enum.c
+obj/xed-category-enum.c
+obj/xed-extension-enum.c
+obj/xed-address-width-enum.c
+obj/xed-error-enum.c
+obj/xed-flag-action-enum.c
+obj/xed-flag-enum.c
+obj/xed-machine-mode-enum.c
+obj/xed-operand-action-enum.c
+obj/xed-operand-visibility-enum.c
+obj/xed-reg-role-enum.c
+obj/xed-syntax-enum.c
+obj/xed-init-inst-table.c
+obj/xed-flags-simple.c
+obj/xed-flags-complex.c
+obj/xed-flags-actions.c
+obj/xed-operand-convert-init.c
+obj/xed-iclass-string.c
+obj/xed-iform-map-init.c
+obj/xed-init-inst-table-0.c
+obj/cdata.txt
+obj/xed-chip-enum.c
+obj/xed-isa-set-enum.c
+obj/xed-chip-features-table.c
+obj/xed-classifiers.c
+obj/ild_eosz_debug.txt
+obj/ild_eosz_debug_header.txt
+obj/xed-ild-eosz.c
+obj/ild_easz_debug.txt
+obj/ild_easz_debug_header.txt
+obj/xed-ild-easz.c
+obj/xed-ild-imm-l3.c
+obj/xed-ild-disp-l3.c
+obj/xed3-phash-lu-vv0.c
+obj/xed3-phash-lu-vv1.c
+obj/xed3-phash-lu-vv2.c
+obj/xed3-phash-lu-vv3.c
+obj/xed3-operand-lu.c
+obj/xed-ild-enum.c
+obj/xed-mapu-enum.c
+obj/xed-cpuid-bit-enum.c
+obj/xed-cpuid-tables.c

CodeVirtualizer/build/obj/ENC-OUT.txt

@@ -0,0 +1,83 @@
+LER: Comparing YMM0 and ZMM0 for XMM0
+	taking new wider version
+LER: Comparing YMM1 and ZMM1 for XMM1
+	taking new wider version
+LER: Comparing YMM2 and ZMM2 for XMM2
+	taking new wider version
+LER: Comparing YMM3 and ZMM3 for XMM3
+	taking new wider version
+LER: Comparing YMM4 and ZMM4 for XMM4
+	taking new wider version
+LER: Comparing YMM5 and ZMM5 for XMM5
+	taking new wider version
+LER: Comparing YMM6 and ZMM6 for XMM6
+	taking new wider version
+LER: Comparing YMM7 and ZMM7 for XMM7
+	taking new wider version
+LER: Comparing YMM8 and ZMM8 for XMM8
+	taking new wider version
+LER: Comparing YMM9 and ZMM9 for XMM9
+	taking new wider version
+LER: Comparing YMM10 and ZMM10 for XMM10
+	taking new wider version
+LER: Comparing YMM11 and ZMM11 for XMM11
+	taking new wider version
+LER: Comparing YMM12 and ZMM12 for XMM12
+	taking new wider version
+LER: Comparing YMM13 and ZMM13 for XMM13
+	taking new wider version
+LER: Comparing YMM14 and ZMM14 for XMM14
+	taking new wider version
+LER: Comparing YMM15 and ZMM15 for XMM15
+	taking new wider version
+LER: Comparing YMM0 and ZMM0 for YMM0
+	taking new wider version
+LER: Comparing YMM1 and ZMM1 for YMM1
+	taking new wider version
+LER: Comparing YMM2 and ZMM2 for YMM2
+	taking new wider version
+LER: Comparing YMM3 and ZMM3 for YMM3
+	taking new wider version
+LER: Comparing YMM4 and ZMM4 for YMM4
+	taking new wider version
+LER: Comparing YMM5 and ZMM5 for YMM5
+	taking new wider version
+LER: Comparing YMM6 and ZMM6 for YMM6
+	taking new wider version
+LER: Comparing YMM7 and ZMM7 for YMM7
+	taking new wider version
+LER: Comparing YMM8 and ZMM8 for YMM8
+	taking new wider version
+LER: Comparing YMM9 and ZMM9 for YMM9
+	taking new wider version
+LER: Comparing YMM10 and ZMM10 for YMM10
+	taking new wider version
+LER: Comparing YMM11 and ZMM11 for YMM11
+	taking new wider version
+LER: Comparing YMM12 and ZMM12 for YMM12
+	taking new wider version
+LER: Comparing YMM13 and ZMM13 for YMM13
+	taking new wider version
+LER: Comparing YMM14 and ZMM14 for YMM14
+	taking new wider version
+LER: Comparing YMM15 and ZMM15 for YMM15
+	taking new wider version
+[RGROUPS] ['BNDCFG', 'BNDSTAT', 'BOUND', 'CR', 'DR', 'FLAGS', 'GPR16', 'GPR32', 'GPR64', 'GPR8', 'GPR8h', 'INVALID', 'IP', 'MASK', 'MMX', 'MSR', 'MXCSR', 'PSEUDO', 'PSEUDOX87', 'SR', 'TMP', 'TREG', 'UIF', 'X87', 'XCR', 'XMM', 'YMM', 'ZMM']
+FE:EMIT_FILE obj/xed-enc-operand-lu.c
+FE:EMIT_FILE obj\include-private/xed-enc-operand-lu.h
+FE:EMIT_FILE obj/xed-encoder-order-init.c
+FE:EMIT_FILE obj/xed-enc-groups.c
+FE:EMIT_FILE obj\include-private/xed-enc-groups.h
+FE:EMIT_FILE obj/xed-enc-patterns.c
+FE:EMIT_FILE obj\include-private/xed-enc-patterns.h
+FE:EMIT_FILE obj/xed-encoder-pattern-lu.c
+FE:EMIT_FILE obj/xed-encoder-iforms-init.c
+FE:EMIT_FILE obj/xed-encoder-init.c
+FE:EMIT_FILE obj/xed-encoder-0.c
+FE:EMIT_FILE obj/xed-encoder-1.c
+FE:EMIT_FILE obj/xed-encoder-2.c
+FE:EMIT_FILE obj/xed-encoder-3.c
+FE:EMIT_FILE obj/xed-encoder-4.c
+FE:EMIT_FILE obj\include-private/xed-encoder.h
+FE:EMIT_FILE obj/xed-encoder-iforms.h
+FE:EMIT_FILE obj/xed-encoder-gen-defs.h

CodeVirtualizer/build/obj/ENCGEN-OUTPUT-FILES.txt

@@ -0,0 +1,18 @@
+obj\include-private/xed-enc-operand-lu.h
+obj/xed-enc-operand-lu.c
+obj/xed-encoder-order-init.c
+obj\include-private/xed-enc-groups.h
+obj/xed-enc-groups.c
+obj\include-private/xed-enc-patterns.h
+obj/xed-enc-patterns.c
+obj/xed-encoder-pattern-lu.c
+obj/xed-encoder-iforms-init.c
+obj/xed-encoder-init.c
+obj\include-private/xed-encoder.h
+obj/xed-encoder-0.c
+obj/xed-encoder-1.c
+obj/xed-encoder-2.c
+obj/xed-encoder-3.c
+obj/xed-encoder-4.c
+obj/xed-encoder-iforms.h
+obj/xed-encoder-gen-defs.h

CodeVirtualizer/build/obj/cdata.txt

@@ -0,0 +1,849 @@
+#BEGIN_LEGAL
+#
+#Copyright (c) 2021 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#  
+#END_LEGAL
+I86 :
+	I86	LAHF
+I86FP :
+	I86	LAHF	X87
+I186 :
+	I186	I86	LAHF
+I186FP :
+	I186	I86	LAHF	X87
+I286REAL :
+	I186	I286REAL	I86	LAHF
+	X87
+I286 :
+	I186	I286PROTECTED	I286REAL	I86
+	LAHF	X87
+I2186FP :
+	I186	I286PROTECTED	I286REAL	I86
+	LAHF	X87
+I386REAL :
+	I186	I286REAL	I86	LAHF
+	X87
+I386 :
+	I186	I286PROTECTED	I286REAL	I386
+	I86	LAHF	X87
+I386FP :
+	I186	I286PROTECTED	I286REAL	I386
+	I86	LAHF	X87
+I486REAL :
+	I186	I286REAL	I486REAL	I86
+	LAHF	X87
+I486 :
+	I186	I286PROTECTED	I286REAL	I386
+	I486	I486REAL	I86	LAHF
+	X87
+PENTIUMREAL :
+	I186	I286REAL	I486REAL	I86
+	LAHF	PENTIUMREAL	X87
+PENTIUM :
+	I186	I286PROTECTED	I286REAL	I386
+	I486	I486REAL	I86	LAHF
+	PENTIUMREAL	X87
+QUARK :
+	I186	I286PROTECTED	I286REAL	I386
+	I486	I486REAL	I86	LAHF
+	PENTIUMREAL	X87
+PENTIUMMMXREAL :
+	I186	I286REAL	I486REAL	I86
+	LAHF	PENTIUMREAL	RDPMC	X87
+PENTIUMMMX :
+	I186	I286PROTECTED	I286REAL	I386
+	I486	I486REAL	I86	LAHF
+	PENTIUMMMX	PENTIUMREAL	RDPMC	X87
+ALLREAL :
+	I186	I286REAL	I486REAL	I86
+	LAHF	PENTIUMREAL	RDPMC	X87
+PENTIUMPRO :
+	CMOV	FAT_NOP	FCMOV	I186
+	I286PROTECTED	I286REAL	I386	I486
+	I486REAL	I86	LAHF	PENTIUMREAL
+	PPRO	PPRO_UD0_SHORT	PREFETCH_NOP	RDPMC
+	X87
+PENTIUM2 :
+	CMOV	FAT_NOP	FCMOV	FXSAVE
+	I186	I286PROTECTED	I286REAL	I386
+	I486	I486REAL	I86	LAHF
+	PENTIUMMMX	PENTIUMREAL	PPRO	PREFETCH_NOP
+	RDPMC	X87
+PENTIUM3 :
+	CMOV	FAT_NOP	FCMOV	FXSAVE
+	I186	I286PROTECTED	I286REAL	I386
+	I486	I486REAL	I86	LAHF
+	PENTIUMMMX	PENTIUMREAL	PPRO	PREFETCH_NOP
+	RDPMC	SSE	SSEMXCSR	SSE_PREFETCH
+	X87
+PENTIUM4 :
+	CLFSH	CMOV	FAT_NOP	FCMOV
+	FXSAVE	I186	I286PROTECTED	I286REAL
+	I386	I486	I486REAL	I86
+	LAHF	PAUSE	PENTIUMMMX	PENTIUMREAL
+	PPRO	PPRO_UD0_LONG	PREFETCH_NOP	RDPMC
+	SSE	SSE2	SSE2MMX	SSEMXCSR
+	SSE_PREFETCH	X87
+P4PRESCOTT :
+	CLFSH	CMOV	CMPXCHG16B	FAT_NOP
+	FCMOV	FXSAVE	FXSAVE64	I186
+	I286PROTECTED	I286REAL	I386	I486
+	I486REAL	I86	LAHF	LONGMODE
+	MONITOR	PAUSE	PENTIUMMMX	PENTIUMREAL
+	PPRO	PPRO_UD0_LONG	PREFETCH_NOP	RDPMC
+	SSE	SSE2	SSE2MMX	SSE3
+	SSE3X87	SSEMXCSR	SSE_PREFETCH	X87
+P4PRESCOTT_NOLAHF :
+	CLFSH	CMOV	CMPXCHG16B	FAT_NOP
+	FCMOV	FXSAVE	FXSAVE64	I186
+	I286PROTECTED	I286REAL	I386	I486
+	I486REAL	I86	LONGMODE	MONITOR
+	PAUSE	PENTIUMMMX	PENTIUMREAL	PPRO
+	PPRO_UD0_LONG	PREFETCH_NOP	RDPMC	SSE
+	SSE2	SSE2MMX	SSE3	SSE3X87
+	SSEMXCSR	SSE_PREFETCH	X87
+P4PRESCOTT_VTX :
+	CLFSH	CMOV	CMPXCHG16B	FAT_NOP
+	FCMOV	FXSAVE	FXSAVE64	I186
+	I286PROTECTED	I286REAL	I386	I486
+	I486REAL	I86	LAHF	LONGMODE
+	MONITOR	PAUSE	PENTIUMMMX	PENTIUMREAL
+	PPRO	PPRO_UD0_LONG	PREFETCH_NOP	RDPMC
+	SSE	SSE2	SSE2MMX	SSE3
+	SSE3X87	SSEMXCSR	SSE_PREFETCH	VTX
+	X87
+MEROM :
+	3DNOW_PREFETCH	CLFSH	CMOV	CMPXCHG16B
+	FAT_NOP	FCMOV	FXSAVE	FXSAVE64
+	I186	I286PROTECTED	I286REAL	I386
+	I486	I486REAL	I86	LAHF
+	LONGMODE	MONITOR	PAUSE	PENTIUMMMX
+	PENTIUMREAL	PPRO	PPRO_UD0_LONG	PREFETCH_NOP
+	RDPMC	SMX	SSE	SSE2
+	SSE2MMX	SSE3	SSE3X87	SSEMXCSR
+	SSE_PREFETCH	SSSE3	SSSE3MMX	VTX
+	X87
+PENRYN :
+	3DNOW_PREFETCH	CLFSH	CMOV	CMPXCHG16B
+	FAT_NOP	FCMOV	FXSAVE	FXSAVE64
+	I186	I286PROTECTED	I286REAL	I386
+	I486	I486REAL	I86	LAHF
+	LONGMODE	MONITOR	PAUSE	PENTIUMMMX
+	PENTIUMREAL	PPRO	PPRO_UD0_LONG	PREFETCH_NOP
+	RDPMC	SMX	SSE	SSE2
+	SSE2MMX	SSE3	SSE3X87	SSE4
+	SSEMXCSR	SSE_PREFETCH	SSSE3	SSSE3MMX
+	VTX	X87
+PENRYN_E :
+	3DNOW_PREFETCH	CLFSH	CMOV	CMPXCHG16B
+	FAT_NOP	FCMOV	FXSAVE	FXSAVE64
+	I186	I286PROTECTED	I286REAL	I386
+	I486	I486REAL	I86	LAHF
+	LONGMODE	MONITOR	PAUSE	PENTIUMMMX
+	PENTIUMREAL	PPRO	PPRO_UD0_LONG	PREFETCH_NOP
+	RDPMC	SMX	SSE	SSE2
+	SSE2MMX	SSE3	SSE3X87	SSE4
+	SSEMXCSR	SSE_PREFETCH	SSSE3	SSSE3MMX
+	VTX	X87	XSAVE
+NEHALEM :
+	3DNOW_PREFETCH	CLFSH	CMOV	CMPXCHG16B
+	FAT_NOP	FCMOV	FXSAVE	FXSAVE64
+	I186	I286PROTECTED	I286REAL	I386
+	I486	I486REAL	I86	LAHF
+	LONGMODE	MONITOR	PAUSE	PENTIUMMMX
+	PENTIUMREAL	POPCNT	PPRO	PPRO_UD0_LONG
+	PREFETCH_NOP	RDPMC	RDTSCP	SMX
+	SSE	SSE2	SSE2MMX	SSE3
+	SSE3X87	SSE4	SSE42	SSEMXCSR
+	SSE_PREFETCH	SSSE3	SSSE3MMX	VTX
+	X87
+WESTMERE :
+	3DNOW_PREFETCH	AES	CLFSH	CMOV
+	CMPXCHG16B	FAT_NOP	FCMOV	FXSAVE
+	FXSAVE64	I186	I286PROTECTED	I286REAL
+	I386	I486	I486REAL	I86
+	LAHF	LONGMODE	MONITOR	PAUSE
+	PCLMULQDQ	PENTIUMMMX	PENTIUMREAL	POPCNT
+	PPRO	PPRO_UD0_LONG	PREFETCH_NOP	RDPMC
+	RDTSCP	SMX	SSE	SSE2
+	SSE2MMX	SSE3	SSE3X87	SSE4
+	SSE42	SSEMXCSR	SSE_PREFETCH	SSSE3
+	SSSE3MMX	VTX	X87
+BONNELL :
+	3DNOW_PREFETCH	CLFSH	CMOV	CMPXCHG16B
+	FAT_NOP	FCMOV	FXSAVE	FXSAVE64
+	I186	I286PROTECTED	I286REAL	I386
+	I486	I486REAL	I86	LAHF
+	LONGMODE	MONITOR	MOVBE	PAUSE
+	PENTIUMMMX	PENTIUMREAL	PPRO	PPRO_UD0_SHORT
+	PREFETCH_NOP	RDPMC	SSE	SSE2
+	SSE2MMX	SSE3	SSE3X87	SSEMXCSR
+	SSE_PREFETCH	SSSE3	SSSE3MMX	VTX
+	X87
+SALTWELL :
+	3DNOW_PREFETCH	CLFSH	CMOV	CMPXCHG16B
+	FAT_NOP	FCMOV	FXSAVE	FXSAVE64
+	I186	I286PROTECTED	I286REAL	I386
+	I486	I486REAL	I86	LAHF
+	LONGMODE	MONITOR	MOVBE	PAUSE
+	PENTIUMMMX	PENTIUMREAL	PPRO	PPRO_UD0_SHORT
+	PREFETCH_NOP	RDPMC	SSE	SSE2
+	SSE2MMX	SSE3	SSE3X87	SSEMXCSR
+	SSE_PREFETCH	SSSE3	SSSE3MMX	VTX
+	X87
+SILVERMONT :
+	3DNOW_PREFETCH	AES	CLFSH	CMOV
+	CMPXCHG16B	FAT_NOP	FCMOV	FXSAVE
+	FXSAVE64	I186	I286PROTECTED	I286REAL
+	I386	I486	I486REAL	I86
+	LAHF	LONGMODE	MONITOR	MOVBE
+	PAUSE	PCLMULQDQ	PENTIUMMMX	PENTIUMREAL
+	POPCNT	PPRO	PPRO_UD0_SHORT	PREFETCHW
+	PREFETCH_NOP	RDPMC	RDRAND	RDTSCP
+	SMX	SSE	SSE2	SSE2MMX
+	SSE3	SSE3X87	SSE4	SSE42
+	SSEMXCSR	SSE_PREFETCH	SSSE3	SSSE3MMX
+	VMFUNC	VTX	X87
+VIA :
+	VIA_PADLOCK_AES	VIA_PADLOCK_MONTMUL	VIA_PADLOCK_RNG	VIA_PADLOCK_SHA
+AMD_K10 :
+	3DNOW	3DNOW_PREFETCH	AES	AMD
+	CLFSH	CMOV	CMPXCHG16B	FAT_NOP
+	FCMOV	FXSAVE	FXSAVE64	I186
+	I286PROTECTED	I286REAL	I386	I486
+	I486REAL	I86	LAHF	LONGMODE
+	LZCNT	MONITOR	PAUSE	PCLMULQDQ
+	PENTIUMMMX	PENTIUMREAL	POPCNT	PPRO
+	PPRO_UD0_LONG	PREFETCHW	PREFETCH_NOP	RDPMC
+	RDTSCP	SMX	SSE	SSE2
+	SSE2MMX	SSE3	SSE3X87	SSE4
+	SSE42	SSE4A	SSEMXCSR	SSE_PREFETCH
+	SSSE3	SSSE3MMX	SVM	VTX
+	X87
+AMD_BULLDOZER :
+	3DNOW_PREFETCH	AES	AMD	AVX
+	AVXAES	CLFSH	CMOV	CMPXCHG16B
+	F16C	FAT_NOP	FCMOV	FMA4
+	FXSAVE	FXSAVE64	I186	I286PROTECTED
+	I286REAL	I386	I486	I486REAL
+	I86	LAHF	LONGMODE	LWP
+	LZCNT	MONITOR	PAUSE	PCLMULQDQ
+	PENTIUMMMX	PENTIUMREAL	POPCNT	PPRO
+	PPRO_UD0_LONG	PREFETCHW	PREFETCH_NOP	RDPMC
+	RDTSCP	RDWRFSGS	SMX	SSE
+	SSE2	SSE2MMX	SSE3	SSE3X87
+	SSE4	SSE42	SSE4A	SSEMXCSR
+	SSE_PREFETCH	SSSE3	SSSE3MMX	SVM
+	VTX	X87	XOP	XSAVE
+	XSAVEOPT
+AMD_PILEDRIVER :
+	3DNOW_PREFETCH	AES	AMD	AVX
+	AVXAES	CLFSH	CMOV	CMPXCHG16B
+	F16C	FAT_NOP	FCMOV	FMA
+	FMA4	FXSAVE	FXSAVE64	I186
+	I286PROTECTED	I286REAL	I386	I486
+	I486REAL	I86	LAHF	LONGMODE
+	LWP	LZCNT	MONITOR	PAUSE
+	PCLMULQDQ	PENTIUMMMX	PENTIUMREAL	POPCNT
+	PPRO	PPRO_UD0_LONG	PREFETCHW	PREFETCH_NOP
+	RDPMC	RDTSCP	RDWRFSGS	SMX
+	SSE	SSE2	SSE2MMX	SSE3
+	SSE3X87	SSE4	SSE42	SSE4A
+	SSEMXCSR	SSE_PREFETCH	SSSE3	SSSE3MMX
+	SVM	TBM	VTX	X87
+	XOP	XSAVE	XSAVEOPT
+AMD_ZEN :
+	3DNOW_PREFETCH	ADOX_ADCX	AES	AMD
+	AVX	AVX2	AVX2GATHER	AVXAES
+	BMI2	CLFLUSHOPT	CLFSH	CLZERO
+	CMOV	CMPXCHG16B	F16C	FAT_NOP
+	FCMOV	FMA	FXSAVE	FXSAVE64
+	I186	I286PROTECTED	I286REAL	I386
+	I486	I486REAL	I86	LAHF
+	LONGMODE	LZCNT	MONITOR	MOVBE
+	PAUSE	PCLMULQDQ	PENTIUMMMX	PENTIUMREAL
+	POPCNT	PPRO	PPRO_UD0_LONG	PREFETCHW
+	PREFETCH_NOP	RDPMC	RDRAND	RDSEED
+	RDTSCP	RDWRFSGS	SHA	SMAP
+	SMX	SSE	SSE2	SSE2MMX
+	SSE3	SSE3X87	SSE4	SSE42
+	SSE4A	SSEMXCSR	SSE_PREFETCH	SSSE3
+	SSSE3MMX	SVM	TBM	VTX
+	X87	XSAVE	XSAVEC	XSAVEOPT
+	XSAVES
+AMD_ZENPLUS :
+	3DNOW_PREFETCH	ADOX_ADCX	AES	AMD
+	AVX	AVX2	AVX2GATHER	AVXAES
+	BMI2	CLFLUSHOPT	CLFSH	CLZERO
+	CMOV	CMPXCHG16B	F16C	FAT_NOP
+	FCMOV	FMA	FXSAVE	FXSAVE64
+	I186	I286PROTECTED	I286REAL	I386
+	I486	I486REAL	I86	LAHF
+	LONGMODE	LZCNT	MONITOR	MOVBE
+	PAUSE	PCLMULQDQ	PENTIUMMMX	PENTIUMREAL
+	POPCNT	PPRO	PPRO_UD0_LONG	PREFETCHW
+	PREFETCH_NOP	RDPMC	RDRAND	RDSEED
+	RDTSCP	RDWRFSGS	SHA	SMAP
+	SMX	SSE	SSE2	SSE2MMX
+	SSE3	SSE3X87	SSE4	SSE42
+	SSE4A	SSEMXCSR	SSE_PREFETCH	SSSE3
+	SSSE3MMX	SVM	TBM	VTX
+	X87	XSAVE	XSAVEC	XSAVEOPT
+	XSAVES
+AMD_ZEN2 :
+	3DNOW_PREFETCH	ADOX_ADCX	AES	AMD
+	AVX	AVX2	AVX2GATHER	AVXAES
+	BMI2	CLFLUSHOPT	CLFSH	CLWB
+	CLZERO	CMOV	CMPXCHG16B	F16C
+	FAT_NOP	FCMOV	FMA	FXSAVE
+	FXSAVE64	I186	I286PROTECTED	I286REAL
+	I386	I486	I486REAL	I86
+	LAHF	LONGMODE	LZCNT	MCOMMIT
+	MONITOR	MONITORX	MOVBE	PAUSE
+	PCLMULQDQ	PENTIUMMMX	PENTIUMREAL	POPCNT
+	PPRO	PPRO_UD0_LONG	PREFETCHW	PREFETCH_NOP
+	RDPID	RDPMC	RDPRU	RDRAND
+	RDSEED	RDTSCP	RDWRFSGS	SHA
+	SMAP	SMX	SSE	SSE2
+	SSE2MMX	SSE3	SSE3X87	SSE4
+	SSE42	SSE4A	SSEMXCSR	SSE_PREFETCH
+	SSSE3	SSSE3MMX	SVM	TBM
+	VTX	WBNOINVD	X87	XSAVE
+	XSAVEC	XSAVEOPT	XSAVES
+AMD_FUTURE :
+	3DNOW_PREFETCH	ADOX_ADCX	AES	AMD
+	AMD_INVLPGB	AVX	AVX2	AVX2GATHER
+	AVXAES	BMI2	CLFLUSHOPT	CLFSH
+	CLWB	CLZERO	CMOV	CMPXCHG16B
+	F16C	FAT_NOP	FCMOV	FMA
+	FXSAVE	FXSAVE64	I186	I286PROTECTED
+	I286REAL	I386	I486	I486REAL
+	I86	LAHF	LONGMODE	LZCNT
+	MCOMMIT	MONITOR	MONITORX	MOVBE
+	PAUSE	PCLMULQDQ	PENTIUMMMX	PENTIUMREAL
+	POPCNT	PPRO	PPRO_UD0_LONG	PREFETCHW
+	PREFETCH_NOP	RDPID	RDPMC	RDPRU
+	RDRAND	RDSEED	RDTSCP	RDWRFSGS
+	SHA	SMAP	SMX	SNP
+	SSE	SSE2	SSE2MMX	SSE3
+	SSE3X87	SSE4	SSE42	SSE4A
+	SSEMXCSR	SSE_PREFETCH	SSSE3	SSSE3MMX
+	SVM	TBM	VTX	WBNOINVD
+	X87	XSAVE	XSAVEC	XSAVEOPT
+	XSAVES
+GOLDMONT :
+	3DNOW_PREFETCH	AES	CLFLUSHOPT	CLFSH
+	CMOV	CMPXCHG16B	FAT_NOP	FCMOV
+	FXSAVE	FXSAVE64	I186	I286PROTECTED
+	I286REAL	I386	I486	I486REAL
+	I86	LAHF	LONGMODE	MONITOR
+	MOVBE	MPX	PAUSE	PCLMULQDQ
+	PENTIUMMMX	PENTIUMREAL	POPCNT	PPRO
+	PPRO_UD0_SHORT	PREFETCHW	PREFETCH_NOP	RDPMC
+	RDRAND	RDSEED	RDTSCP	RDWRFSGS
+	SHA	SMAP	SMX	SSE
+	SSE2	SSE2MMX	SSE3	SSE3X87
+	SSE4	SSE42	SSEMXCSR	SSE_PREFETCH
+	SSSE3	SSSE3MMX	VMFUNC	VTX
+	X87	XSAVE	XSAVEC	XSAVEOPT
+	XSAVES
+GOLDMONT_PLUS :
+	3DNOW_PREFETCH	AES	CLFLUSHOPT	CLFSH
+	CMOV	CMPXCHG16B	FAT_NOP	FCMOV
+	FXSAVE	FXSAVE64	I186	I286PROTECTED
+	I286REAL	I386	I486	I486REAL
+	I86	LAHF	LONGMODE	MONITOR
+	MOVBE	MPX	PAUSE	PCLMULQDQ
+	PENTIUMMMX	PENTIUMREAL	POPCNT	PPRO
+	PPRO_UD0_SHORT	PREFETCHW	PREFETCH_NOP	PTWRITE
+	RDPID	RDPMC	RDRAND	RDSEED
+	RDTSCP	RDWRFSGS	SGX	SHA
+	SMAP	SMX	SSE	SSE2
+	SSE2MMX	SSE3	SSE3X87	SSE4
+	SSE42	SSEMXCSR	SSE_PREFETCH	SSSE3
+	SSSE3MMX	VMFUNC	VTX	X87
+	XSAVE	XSAVEC	XSAVEOPT	XSAVES
+TREMONT :
+	3DNOW_PREFETCH	AES	CLFLUSHOPT	CLFSH
+	CLWB	CMOV	CMPXCHG16B	FAT_NOP
+	FCMOV	FXSAVE	FXSAVE64	GFNI
+	I186	I286PROTECTED	I286REAL	I386
+	I486	I486REAL	I86	LAHF
+	LONGMODE	MONITOR	MOVBE	MPX
+	PAUSE	PCLMULQDQ	PENTIUMMMX	PENTIUMREAL
+	POPCNT	PPRO	PPRO_UD0_SHORT	PREFETCHW
+	PREFETCH_NOP	PTWRITE	RDPID	RDPMC
+	RDRAND	RDSEED	RDTSCP	RDWRFSGS
+	SHA	SMAP	SMX	SSE
+	SSE2	SSE2MMX	SSE3	SSE3X87
+	SSE4	SSE42	SSEMXCSR	SSE_PREFETCH
+	SSSE3	SSSE3MMX	VMFUNC	VTX
+	X87	XSAVE	XSAVEC	XSAVEOPT
+	XSAVES
+SNOW_RIDGE :
+	3DNOW_PREFETCH	AES	CLDEMOTE	CLFLUSHOPT
+	CLFSH	CLWB	CMOV	CMPXCHG16B
+	FAT_NOP	FCMOV	FXSAVE	FXSAVE64
+	GFNI	I186	I286PROTECTED	I286REAL
+	I386	I486	I486REAL	I86
+	LAHF	LONGMODE	MONITOR	MOVBE
+	MOVDIR	MPX	PAUSE	PCLMULQDQ
+	PENTIUMMMX	PENTIUMREAL	POPCNT	PPRO
+	PPRO_UD0_SHORT	PREFETCHW	PREFETCH_NOP	PTWRITE
+	RDPID	RDPMC	RDRAND	RDSEED
+	RDTSCP	RDWRFSGS	SHA	SMAP
+	SMX	SSE	SSE2	SSE2MMX
+	SSE3	SSE3X87	SSE4	SSE42
+	SSEMXCSR	SSE_PREFETCH	SSSE3	SSSE3MMX
+	VMFUNC	VTX	WAITPKG	X87
+	XSAVE	XSAVEC	XSAVEOPT	XSAVES
+SANDYBRIDGE :
+	3DNOW_PREFETCH	AES	AVX	AVXAES
+	CLFSH	CMOV	CMPXCHG16B	FAT_NOP
+	FCMOV	FXSAVE	FXSAVE64	I186
+	I286PROTECTED	I286REAL	I386	I486
+	I486REAL	I86	LAHF	LONGMODE
+	MONITOR	PAUSE	PCLMULQDQ	PENTIUMMMX
+	PENTIUMREAL	POPCNT	PPRO	PPRO_UD0_LONG
+	PREFETCH_NOP	RDPMC	RDTSCP	SMX
+	SSE	SSE2	SSE2MMX	SSE3
+	SSE3X87	SSE4	SSE42	SSEMXCSR
+	SSE_PREFETCH	SSSE3	SSSE3MMX	VTX
+	X87	XSAVE	XSAVEOPT
+IVYBRIDGE :
+	3DNOW_PREFETCH	AES	AVX	AVXAES
+	CLFSH	CMOV	CMPXCHG16B	F16C
+	FAT_NOP	FCMOV	FXSAVE	FXSAVE64
+	I186	I286PROTECTED	I286REAL	I386
+	I486	I486REAL	I86	LAHF
+	LONGMODE	MONITOR	PAUSE	PCLMULQDQ
+	PENTIUMMMX	PENTIUMREAL	POPCNT	PPRO
+	PPRO_UD0_LONG	PREFETCH_NOP	RDPMC	RDRAND
+	RDTSCP	RDWRFSGS	SMX	SSE
+	SSE2	SSE2MMX	SSE3	SSE3X87
+	SSE4	SSE42	SSEMXCSR	SSE_PREFETCH
+	SSSE3	SSSE3MMX	VTX	X87
+	XSAVE	XSAVEOPT
+HASWELL :
+	3DNOW_PREFETCH	AES	AVX	AVX2
+	AVX2GATHER	AVXAES	BMI1	BMI2
+	CLFSH	CMOV	CMPXCHG16B	F16C
+	FAT_NOP	FCMOV	FMA	FXSAVE
+	FXSAVE64	I186	I286PROTECTED	I286REAL
+	I386	I486	I486REAL	I86
+	INVPCID	LAHF	LONGMODE	LZCNT
+	MONITOR	MOVBE	PAUSE	PCLMULQDQ
+	PENTIUMMMX	PENTIUMREAL	POPCNT	PPRO
+	PPRO_UD0_LONG	PREFETCH_NOP	RDPMC	RDRAND
+	RDTSCP	RDWRFSGS	RTM	SMX
+	SSE	SSE2	SSE2MMX	SSE3
+	SSE3X87	SSE4	SSE42	SSEMXCSR
+	SSE_PREFETCH	SSSE3	SSSE3MMX	VMFUNC
+	VTX	X87	XSAVE	XSAVEOPT
+BROADWELL :
+	3DNOW_PREFETCH	ADOX_ADCX	AES	AVX
+	AVX2	AVX2GATHER	AVXAES	BMI1
+	BMI2	CLFSH	CMOV	CMPXCHG16B
+	F16C	FAT_NOP	FCMOV	FMA
+	FXSAVE	FXSAVE64	I186	I286PROTECTED
+	I286REAL	I386	I486	I486REAL
+	I86	INVPCID	LAHF	LONGMODE
+	LZCNT	MONITOR	MOVBE	PAUSE
+	PCLMULQDQ	PENTIUMMMX	PENTIUMREAL	POPCNT
+	PPRO	PPRO_UD0_LONG	PREFETCHW	PREFETCH_NOP
+	RDPMC	RDRAND	RDSEED	RDTSCP
+	RDWRFSGS	RTM	SMAP	SMX
+	SSE	SSE2	SSE2MMX	SSE3
+	SSE3X87	SSE4	SSE42	SSEMXCSR
+	SSE_PREFETCH	SSSE3	SSSE3MMX	VMFUNC
+	VTX	X87	XSAVE	XSAVEOPT
+SKYLAKE :
+	3DNOW_PREFETCH	ADOX_ADCX	AES	AVX
+	AVX2	AVX2GATHER	AVXAES	BMI1
+	BMI2	CLFLUSHOPT	CLFSH	CMOV
+	CMPXCHG16B	F16C	FAT_NOP	FCMOV
+	FMA	FXSAVE	FXSAVE64	I186
+	I286PROTECTED	I286REAL	I386	I486
+	I486REAL	I86	INVPCID	LAHF
+	LONGMODE	LZCNT	MONITOR	MOVBE
+	MPX	PAUSE	PCLMULQDQ	PENTIUMMMX
+	PENTIUMREAL	POPCNT	PPRO	PPRO_UD0_LONG
+	PREFETCHW	PREFETCH_NOP	RDPMC	RDRAND
+	RDSEED	RDTSCP	RDWRFSGS	RTM
+	SGX	SMAP	SMX	SSE
+	SSE2	SSE2MMX	SSE3	SSE3X87
+	SSE4	SSE42	SSEMXCSR	SSE_PREFETCH
+	SSSE3	SSSE3MMX	VMFUNC	VTX
+	X87	XSAVE	XSAVEC	XSAVEOPT
+	XSAVES
+COMET_LAKE :
+	3DNOW_PREFETCH	ADOX_ADCX	AES	AVX
+	AVX2	AVX2GATHER	AVXAES	BMI1
+	BMI2	CLFLUSHOPT	CLFSH	CMOV
+	CMPXCHG16B	F16C	FAT_NOP	FCMOV
+	FMA	FXSAVE	FXSAVE64	I186
+	I286PROTECTED	I286REAL	I386	I486
+	I486REAL	I86	INVPCID	LAHF
+	LONGMODE	LZCNT	MONITOR	MOVBE
+	MPX	PAUSE	PCLMULQDQ	PENTIUMMMX
+	PENTIUMREAL	PKU	POPCNT	PPRO
+	PPRO_UD0_LONG	PREFETCHW	PREFETCH_NOP	RDPMC
+	RDRAND	RDSEED	RDTSCP	RDWRFSGS
+	RTM	SGX	SMAP	SMX
+	SSE	SSE2	SSE2MMX	SSE3
+	SSE3X87	SSE4	SSE42	SSEMXCSR
+	SSE_PREFETCH	SSSE3	SSSE3MMX	VMFUNC
+	VTX	X87	XSAVE	XSAVEC
+	XSAVEOPT	XSAVES
+SKYLAKE_SERVER :
+	3DNOW_PREFETCH	ADOX_ADCX	AES	AVX
+	AVX2	AVX2GATHER	AVX512BW_128	AVX512BW_128N
+	AVX512BW_256	AVX512BW_512	AVX512BW_KOP	AVX512CD_128
+	AVX512CD_256	AVX512CD_512	AVX512DQ_128	AVX512DQ_128N
+	AVX512DQ_256	AVX512DQ_512	AVX512DQ_KOP	AVX512DQ_SCALAR
+	AVX512F_128	AVX512F_128N	AVX512F_256	AVX512F_512
+	AVX512F_KOP	AVX512F_SCALAR	AVXAES	BMI1
+	BMI2	CLFLUSHOPT	CLFSH	CLWB
+	CMOV	CMPXCHG16B	F16C	FAT_NOP
+	FCMOV	FMA	FXSAVE	FXSAVE64
+	I186	I286PROTECTED	I286REAL	I386
+	I486	I486REAL	I86	INVPCID
+	LAHF	LONGMODE	LZCNT	MONITOR
+	MOVBE	MPX	PAUSE	PCLMULQDQ
+	PENTIUMMMX	PENTIUMREAL	PKU	POPCNT
+	PPRO	PPRO_UD0_LONG	PREFETCHW	PREFETCH_NOP
+	RDPMC	RDRAND	RDSEED	RDTSCP
+	RDWRFSGS	RTM	SGX	SMAP
+	SMX	SSE	SSE2	SSE2MMX
+	SSE3	SSE3X87	SSE4	SSE42
+	SSEMXCSR	SSE_PREFETCH	SSSE3	SSSE3MMX
+	VMFUNC	VTX	X87	XSAVE
+	XSAVEC	XSAVEOPT	XSAVES
+CASCADE_LAKE :
+	3DNOW_PREFETCH	ADOX_ADCX	AES	AVX
+	AVX2	AVX2GATHER	AVX512BW_128	AVX512BW_128N
+	AVX512BW_256	AVX512BW_512	AVX512BW_KOP	AVX512CD_128
+	AVX512CD_256	AVX512CD_512	AVX512DQ_128	AVX512DQ_128N
+	AVX512DQ_256	AVX512DQ_512	AVX512DQ_KOP	AVX512DQ_SCALAR
+	AVX512F_128	AVX512F_128N	AVX512F_256	AVX512F_512
+	AVX512F_KOP	AVX512F_SCALAR	AVX512_VNNI_128	AVX512_VNNI_256
+	AVX512_VNNI_512	AVXAES	BMI1	BMI2
+	CLFLUSHOPT	CLFSH	CLWB	CMOV
+	CMPXCHG16B	F16C	FAT_NOP	FCMOV
+	FMA	FXSAVE	FXSAVE64	I186
+	I286PROTECTED	I286REAL	I386	I486
+	I486REAL	I86	INVPCID	LAHF
+	LONGMODE	LZCNT	MONITOR	MOVBE
+	MPX	PAUSE	PCLMULQDQ	PENTIUMMMX
+	PENTIUMREAL	PKU	POPCNT	PPRO
+	PPRO_UD0_LONG	PREFETCHW	PREFETCH_NOP	RDPMC
+	RDRAND	RDSEED	RDTSCP	RDWRFSGS
+	RTM	SGX	SMAP	SMX
+	SSE	SSE2	SSE2MMX	SSE3
+	SSE3X87	SSE4	SSE42	SSEMXCSR
+	SSE_PREFETCH	SSSE3	SSSE3MMX	VMFUNC
+	VTX	X87	XSAVE	XSAVEC
+	XSAVEOPT	XSAVES
+COOPER_LAKE :
+	3DNOW_PREFETCH	ADOX_ADCX	AES	AVX
+	AVX2	AVX2GATHER	AVX512BW_128	AVX512BW_128N
+	AVX512BW_256	AVX512BW_512	AVX512BW_KOP	AVX512CD_128
+	AVX512CD_256	AVX512CD_512	AVX512DQ_128	AVX512DQ_128N
+	AVX512DQ_256	AVX512DQ_512	AVX512DQ_KOP	AVX512DQ_SCALAR
+	AVX512F_128	AVX512F_128N	AVX512F_256	AVX512F_512
+	AVX512F_KOP	AVX512F_SCALAR	AVX512_BF16_128	AVX512_BF16_256
+	AVX512_BF16_512	AVX512_VNNI_128	AVX512_VNNI_256	AVX512_VNNI_512
+	AVXAES	BMI1	BMI2	CLFLUSHOPT
+	CLFSH	CLWB	CMOV	CMPXCHG16B
+	F16C	FAT_NOP	FCMOV	FMA
+	FXSAVE	FXSAVE64	I186	I286PROTECTED
+	I286REAL	I386	I486	I486REAL
+	I86	INVPCID	LAHF	LONGMODE
+	LZCNT	MONITOR	MOVBE	MPX
+	PAUSE	PCLMULQDQ	PENTIUMMMX	PENTIUMREAL
+	PKU	POPCNT	PPRO	PPRO_UD0_LONG
+	PREFETCHW	PREFETCH_NOP	RDPMC	RDRAND
+	RDSEED	RDTSCP	RDWRFSGS	RTM
+	SGX	SMAP	SMX	SSE
+	SSE2	SSE2MMX	SSE3	SSE3X87
+	SSE4	SSE42	SSEMXCSR	SSE_PREFETCH
+	SSSE3	SSSE3MMX	VMFUNC	VTX
+	X87	XSAVE	XSAVEC	XSAVEOPT
+	XSAVES
+KNL :
+	3DNOW_PREFETCH	ADOX_ADCX	AES	AVX
+	AVX2	AVX2GATHER	AVX512CD_512	AVX512ER_512
+	AVX512ER_SCALAR	AVX512F_128N	AVX512F_512	AVX512F_KOP
+	AVX512F_SCALAR	AVX512PF_512	AVXAES	BMI1
+	BMI2	CLFSH	CMOV	CMPXCHG16B
+	F16C	FAT_NOP	FCMOV	FMA
+	FXSAVE	FXSAVE64	I186	I286PROTECTED
+	I286REAL	I386	I486	I486REAL
+	I86	LAHF	LONGMODE	LZCNT
+	MONITOR	MOVBE	PAUSE	PCLMULQDQ
+	PENTIUMMMX	PENTIUMREAL	POPCNT	PPRO
+	PPRO_UD0_LONG	PREFETCHWT1	PREFETCH_NOP	RDPMC
+	RDRAND	RDSEED	RDTSCP	RDWRFSGS
+	SMX	SSE	SSE2	SSE2MMX
+	SSE3	SSE3X87	SSE4	SSE42
+	SSEMXCSR	SSE_PREFETCH	SSSE3	SSSE3MMX
+	VTX	X87	XSAVE	XSAVEOPT
+KNM :
+	3DNOW_PREFETCH	ADOX_ADCX	AES	AVX
+	AVX2	AVX2GATHER	AVX512CD_512	AVX512ER_512
+	AVX512ER_SCALAR	AVX512F_128N	AVX512F_512	AVX512F_KOP
+	AVX512F_SCALAR	AVX512PF_512	AVX512_4FMAPS_512	AVX512_4FMAPS_SCALAR
+	AVX512_4VNNIW_512	AVX512_VPOPCNTDQ_512	AVXAES	BMI1
+	BMI2	CLFSH	CMOV	CMPXCHG16B
+	F16C	FAT_NOP	FCMOV	FMA
+	FXSAVE	FXSAVE64	I186	I286PROTECTED
+	I286REAL	I386	I486	I486REAL
+	I86	LAHF	LONGMODE	LZCNT
+	MONITOR	MOVBE	PAUSE	PCLMULQDQ
+	PENTIUMMMX	PENTIUMREAL	POPCNT	PPRO
+	PPRO_UD0_LONG	PREFETCHWT1	PREFETCH_NOP	RDPMC
+	RDRAND	RDSEED	RDTSCP	RDWRFSGS
+	SMX	SSE	SSE2	SSE2MMX
+	SSE3	SSE3X87	SSE4	SSE42
+	SSEMXCSR	SSE_PREFETCH	SSSE3	SSSE3MMX
+	VMFUNC	VTX	X87	XSAVE
+	XSAVEOPT
+CANNONLAKE :
+	3DNOW_PREFETCH	ADOX_ADCX	AES	AVX
+	AVX2	AVX2GATHER	AVX512BW_128	AVX512BW_128N
+	AVX512BW_256	AVX512BW_512	AVX512BW_KOP	AVX512CD_128
+	AVX512CD_256	AVX512CD_512	AVX512DQ_128	AVX512DQ_128N
+	AVX512DQ_256	AVX512DQ_512	AVX512DQ_KOP	AVX512DQ_SCALAR
+	AVX512F_128	AVX512F_128N	AVX512F_256	AVX512F_512
+	AVX512F_KOP	AVX512F_SCALAR	AVX512_IFMA_128	AVX512_IFMA_256
+	AVX512_IFMA_512	AVX512_VBMI_128	AVX512_VBMI_256	AVX512_VBMI_512
+	AVXAES	BMI1	BMI2	CLFLUSHOPT
+	CLFSH	CMOV	CMPXCHG16B	F16C
+	FAT_NOP	FCMOV	FMA	FXSAVE
+	FXSAVE64	I186	I286PROTECTED	I286REAL
+	I386	I486	I486REAL	I86
+	INVPCID	LAHF	LONGMODE	LZCNT
+	MONITOR	MOVBE	MPX	PAUSE
+	PCLMULQDQ	PENTIUMMMX	PENTIUMREAL	PKU
+	POPCNT	PPRO	PPRO_UD0_LONG	PREFETCHW
+	PREFETCH_NOP	RDPMC	RDRAND	RDSEED
+	RDTSCP	RDWRFSGS	RTM	SGX
+	SHA	SMAP	SMX	SSE
+	SSE2	SSE2MMX	SSE3	SSE3X87
+	SSE4	SSE42	SSEMXCSR	SSE_PREFETCH
+	SSSE3	SSSE3MMX	VMFUNC	VTX
+	X87	XSAVE	XSAVEC	XSAVEOPT
+	XSAVES
+ICE_LAKE :
+	3DNOW_PREFETCH	ADOX_ADCX	AES	AVX
+	AVX2	AVX2GATHER	AVX512BW_128	AVX512BW_128N
+	AVX512BW_256	AVX512BW_512	AVX512BW_KOP	AVX512CD_128
+	AVX512CD_256	AVX512CD_512	AVX512DQ_128	AVX512DQ_128N
+	AVX512DQ_256	AVX512DQ_512	AVX512DQ_KOP	AVX512DQ_SCALAR
+	AVX512F_128	AVX512F_128N	AVX512F_256	AVX512F_512
+	AVX512F_KOP	AVX512F_SCALAR	AVX512_BITALG_128	AVX512_BITALG_256
+	AVX512_BITALG_512	AVX512_GFNI_128	AVX512_GFNI_256	AVX512_GFNI_512
+	AVX512_IFMA_128	AVX512_IFMA_256	AVX512_IFMA_512	AVX512_VAES_128
+	AVX512_VAES_256	AVX512_VAES_512	AVX512_VBMI2_128	AVX512_VBMI2_256
+	AVX512_VBMI2_512	AVX512_VBMI_128	AVX512_VBMI_256	AVX512_VBMI_512
+	AVX512_VNNI_128	AVX512_VNNI_256	AVX512_VNNI_512	AVX512_VPCLMULQDQ_128
+	AVX512_VPCLMULQDQ_256	AVX512_VPCLMULQDQ_512	AVX512_VPOPCNTDQ_128	AVX512_VPOPCNTDQ_256
+	AVX512_VPOPCNTDQ_512	AVXAES	AVX_GFNI	BMI1
+	BMI2	CLFLUSHOPT	CLFSH	CMOV
+	CMPXCHG16B	F16C	FAT_NOP	FCMOV
+	FMA	FXSAVE	FXSAVE64	GFNI
+	I186	I286PROTECTED	I286REAL	I386
+	I486	I486REAL	I86	INVPCID
+	LAHF	LONGMODE	LZCNT	MONITOR
+	MOVBE	PAUSE	PCLMULQDQ	PENTIUMMMX
+	PENTIUMREAL	PKU	POPCNT	PPRO
+	PPRO_UD0_LONG	PREFETCHW	PREFETCH_NOP	RDPID
+	RDPMC	RDRAND	RDSEED	RDTSCP
+	RDWRFSGS	RTM	SGX	SHA
+	SMAP	SMX	SSE	SSE2
+	SSE2MMX	SSE3	SSE3X87	SSE4
+	SSE42	SSEMXCSR	SSE_PREFETCH	SSSE3
+	SSSE3MMX	VAES	VMFUNC	VPCLMULQDQ
+	VTX	X87	XSAVE	XSAVEC
+	XSAVEOPT	XSAVES
+ICE_LAKE_SERVER :
+	3DNOW_PREFETCH	ADOX_ADCX	AES	AVX
+	AVX2	AVX2GATHER	AVX512BW_128	AVX512BW_128N
+	AVX512BW_256	AVX512BW_512	AVX512BW_KOP	AVX512CD_128
+	AVX512CD_256	AVX512CD_512	AVX512DQ_128	AVX512DQ_128N
+	AVX512DQ_256	AVX512DQ_512	AVX512DQ_KOP	AVX512DQ_SCALAR
+	AVX512F_128	AVX512F_128N	AVX512F_256	AVX512F_512
+	AVX512F_KOP	AVX512F_SCALAR	AVX512_BITALG_128	AVX512_BITALG_256
+	AVX512_BITALG_512	AVX512_GFNI_128	AVX512_GFNI_256	AVX512_GFNI_512
+	AVX512_IFMA_128	AVX512_IFMA_256	AVX512_IFMA_512	AVX512_VAES_128
+	AVX512_VAES_256	AVX512_VAES_512	AVX512_VBMI2_128	AVX512_VBMI2_256
+	AVX512_VBMI2_512	AVX512_VBMI_128	AVX512_VBMI_256	AVX512_VBMI_512
+	AVX512_VNNI_128	AVX512_VNNI_256	AVX512_VNNI_512	AVX512_VPCLMULQDQ_128
+	AVX512_VPCLMULQDQ_256	AVX512_VPCLMULQDQ_512	AVX512_VPOPCNTDQ_128	AVX512_VPOPCNTDQ_256
+	AVX512_VPOPCNTDQ_512	AVXAES	AVX_GFNI	BMI1
+	BMI2	CLFLUSHOPT	CLFSH	CLWB
+	CMOV	CMPXCHG16B	F16C	FAT_NOP
+	FCMOV	FMA	FXSAVE	FXSAVE64
+	GFNI	I186	I286PROTECTED	I286REAL
+	I386	I486	I486REAL	I86
+	INVPCID	LAHF	LONGMODE	LZCNT
+	MONITOR	MOVBE	PAUSE	PCLMULQDQ
+	PCONFIG	PENTIUMMMX	PENTIUMREAL	PKU
+	POPCNT	PPRO	PPRO_UD0_LONG	PREFETCHW
+	PREFETCH_NOP	RDPID	RDPMC	RDRAND
+	RDSEED	RDTSCP	RDWRFSGS	RTM
+	SGX	SGX_ENCLV	SHA	SMAP
+	SMX	SSE	SSE2	SSE2MMX
+	SSE3	SSE3X87	SSE4	SSE42
+	SSEMXCSR	SSE_PREFETCH	SSSE3	SSSE3MMX
+	VAES	VMFUNC	VPCLMULQDQ	VTX
+	WBNOINVD	X87	XSAVE	XSAVEC
+	XSAVEOPT	XSAVES
+TIGER_LAKE :
+	3DNOW_PREFETCH	ADOX_ADCX	AES	AVX
+	AVX2	AVX2GATHER	AVX512BW_128	AVX512BW_128N
+	AVX512BW_256	AVX512BW_512	AVX512BW_KOP	AVX512CD_128
+	AVX512CD_256	AVX512CD_512	AVX512DQ_128	AVX512DQ_128N
+	AVX512DQ_256	AVX512DQ_512	AVX512DQ_KOP	AVX512DQ_SCALAR
+	AVX512F_128	AVX512F_128N	AVX512F_256	AVX512F_512
+	AVX512F_KOP	AVX512F_SCALAR	AVX512_BITALG_128	AVX512_BITALG_256
+	AVX512_BITALG_512	AVX512_GFNI_128	AVX512_GFNI_256	AVX512_GFNI_512
+	AVX512_IFMA_128	AVX512_IFMA_256	AVX512_IFMA_512	AVX512_VAES_128
+	AVX512_VAES_256	AVX512_VAES_512	AVX512_VBMI2_128	AVX512_VBMI2_256
+	AVX512_VBMI2_512	AVX512_VBMI_128	AVX512_VBMI_256	AVX512_VBMI_512
+	AVX512_VNNI_128	AVX512_VNNI_256	AVX512_VNNI_512	AVX512_VP2INTERSECT_128
+	AVX512_VP2INTERSECT_256	AVX512_VP2INTERSECT_512	AVX512_VPCLMULQDQ_128	AVX512_VPCLMULQDQ_256
+	AVX512_VPCLMULQDQ_512	AVX512_VPOPCNTDQ_128	AVX512_VPOPCNTDQ_256	AVX512_VPOPCNTDQ_512
+	AVXAES	AVX_GFNI	BMI1	BMI2
+	CET	CLFLUSHOPT	CLFSH	CLWB
+	CMOV	CMPXCHG16B	F16C	FAT_NOP
+	FCMOV	FMA	FXSAVE	FXSAVE64
+	GFNI	I186	I286PROTECTED	I286REAL
+	I386	I486	I486REAL	I86
+	INVPCID	KEYLOCKER	KEYLOCKER_WIDE	LAHF
+	LONGMODE	LZCNT	MONITOR	MOVBE
+	MOVDIR	PAUSE	PCLMULQDQ	PCONFIG
+	PENTIUMMMX	PENTIUMREAL	PKU	POPCNT
+	PPRO	PPRO_UD0_LONG	PREFETCHW	PREFETCH_NOP
+	RDPID	RDPMC	RDRAND	RDSEED
+	RDTSCP	RDWRFSGS	RTM	SGX
+	SGX_ENCLV	SHA	SMAP	SMX
+	SSE	SSE2	SSE2MMX	SSE3
+	SSE3X87	SSE4	SSE42	SSEMXCSR
+	SSE_PREFETCH	SSSE3	SSSE3MMX	VAES
+	VMFUNC	VPCLMULQDQ	VTX	WBNOINVD
+	X87	XSAVE	XSAVEC	XSAVEOPT
+	XSAVES
+ALDER_LAKE :
+	3DNOW_PREFETCH	ADOX_ADCX	AES	AVX
+	AVX2	AVX2GATHER	AVXAES	AVX_GFNI
+	AVX_VNNI	BMI1	BMI2	CET
+	CLDEMOTE	CLFLUSHOPT	CLFSH	CLWB
+	CMOV	CMPXCHG16B	F16C	FAT_NOP
+	FCMOV	FMA	FXSAVE	FXSAVE64
+	GFNI	HRESET	I186	I286PROTECTED
+	I286REAL	I386	I486	I486REAL
+	I86	INVPCID	KEYLOCKER	KEYLOCKER_WIDE
+	LAHF	LONGMODE	LZCNT	MONITOR
+	MOVBE	MOVDIR	PAUSE	PCLMULQDQ
+	PCONFIG	PENTIUMMMX	PENTIUMREAL	PKU
+	POPCNT	PPRO	PPRO_UD0_SHORT	PREFETCHW
+	PREFETCH_NOP	PTWRITE	RDPID	RDPMC
+	RDRAND	RDSEED	RDTSCP	RDWRFSGS
+	SERIALIZE	SHA	SMAP	SMX
+	SSE	SSE2	SSE2MMX	SSE3
+	SSE3X87	SSE4	SSE42	SSEMXCSR
+	SSE_PREFETCH	SSSE3	SSSE3MMX	VAES
+	VMFUNC	VPCLMULQDQ	VTX	WAITPKG
+	WBNOINVD	X87	XSAVE	XSAVEC
+	XSAVEOPT	XSAVES
+SAPPHIRE_RAPIDS :
+	3DNOW_PREFETCH	ADOX_ADCX	AES	AMX_BF16
+	AMX_INT8	AMX_TILE	AVX	AVX2
+	AVX2GATHER	AVX512BW_128	AVX512BW_128N	AVX512BW_256
+	AVX512BW_512	AVX512BW_KOP	AVX512CD_128	AVX512CD_256
+	AVX512CD_512	AVX512DQ_128	AVX512DQ_128N	AVX512DQ_256
+	AVX512DQ_512	AVX512DQ_KOP	AVX512DQ_SCALAR	AVX512F_128
+	AVX512F_128N	AVX512F_256	AVX512F_512	AVX512F_KOP
+	AVX512F_SCALAR	AVX512_BF16_128	AVX512_BF16_256	AVX512_BF16_512
+	AVX512_BITALG_128	AVX512_BITALG_256	AVX512_BITALG_512	AVX512_FP16_128
+	AVX512_FP16_128N	AVX512_FP16_256	AVX512_FP16_512	AVX512_FP16_SCALAR
+	AVX512_GFNI_128	AVX512_GFNI_256	AVX512_GFNI_512	AVX512_IFMA_128
+	AVX512_IFMA_256	AVX512_IFMA_512	AVX512_VAES_128	AVX512_VAES_256
+	AVX512_VAES_512	AVX512_VBMI2_128	AVX512_VBMI2_256	AVX512_VBMI2_512
+	AVX512_VBMI_128	AVX512_VBMI_256	AVX512_VBMI_512	AVX512_VNNI_128
+	AVX512_VNNI_256	AVX512_VNNI_512	AVX512_VP2INTERSECT_128	AVX512_VP2INTERSECT_256
+	AVX512_VP2INTERSECT_512	AVX512_VPCLMULQDQ_128	AVX512_VPCLMULQDQ_256	AVX512_VPCLMULQDQ_512
+	AVX512_VPOPCNTDQ_128	AVX512_VPOPCNTDQ_256	AVX512_VPOPCNTDQ_512	AVXAES
+	AVX_GFNI	AVX_VNNI	BMI1	BMI2
+	CET	CLDEMOTE	CLFLUSHOPT	CLFSH
+	CLWB	CMOV	CMPXCHG16B	ENQCMD
+	F16C	FAT_NOP	FCMOV	FMA
+	FXSAVE	FXSAVE64	GFNI	I186
+	I286PROTECTED	I286REAL	I386	I486
+	I486REAL	I86	INVPCID	LAHF
+	LONGMODE	LZCNT	MONITOR	MOVBE
+	MOVDIR	PAUSE	PCLMULQDQ	PCONFIG
+	PENTIUMMMX	PENTIUMREAL	PKU	POPCNT
+	PPRO	PPRO_UD0_LONG	PREFETCHW	PREFETCH_NOP
+	PTWRITE	RDPID	RDPMC	RDRAND
+	RDSEED	RDTSCP	RDWRFSGS	RTM
+	SERIALIZE	SGX	SGX_ENCLV	SHA
+	SMAP	SMX	SSE	SSE2
+	SSE2MMX	SSE3	SSE3X87	SSE4
+	SSE42	SSEMXCSR	SSE_PREFETCH	SSSE3
+	SSSE3MMX	TDX	TSX_LDTRK	UINTR
+	VAES	VMFUNC	VPCLMULQDQ	VTX
+	WAITPKG	WBNOINVD	X87	XSAVE
+	XSAVEC	XSAVEOPT	XSAVES
+FUTURE :
+	3DNOW_PREFETCH	ADOX_ADCX	AES	AMX_BF16
+	AMX_INT8	AMX_TILE	AVX	AVX2
+	AVX2GATHER	AVX512BW_128	AVX512BW_128N	AVX512BW_256
+	AVX512BW_512	AVX512BW_KOP	AVX512CD_128	AVX512CD_256
+	AVX512CD_512	AVX512DQ_128	AVX512DQ_128N	AVX512DQ_256
+	AVX512DQ_512	AVX512DQ_KOP	AVX512DQ_SCALAR	AVX512F_128
+	AVX512F_128N	AVX512F_256	AVX512F_512	AVX512F_KOP
+	AVX512F_SCALAR	AVX512_BF16_128	AVX512_BF16_256	AVX512_BF16_512
+	AVX512_BITALG_128	AVX512_BITALG_256	AVX512_BITALG_512	AVX512_FP16_128
+	AVX512_FP16_128N	AVX512_FP16_256	AVX512_FP16_512	AVX512_FP16_SCALAR
+	AVX512_GFNI_128	AVX512_GFNI_256	AVX512_GFNI_512	AVX512_IFMA_128
+	AVX512_IFMA_256	AVX512_IFMA_512	AVX512_VAES_128	AVX512_VAES_256
+	AVX512_VAES_512	AVX512_VBMI2_128	AVX512_VBMI2_256	AVX512_VBMI2_512
+	AVX512_VBMI_128	AVX512_VBMI_256	AVX512_VBMI_512	AVX512_VNNI_128
+	AVX512_VNNI_256	AVX512_VNNI_512	AVX512_VP2INTERSECT_128	AVX512_VP2INTERSECT_256
+	AVX512_VP2INTERSECT_512	AVX512_VPCLMULQDQ_128	AVX512_VPCLMULQDQ_256	AVX512_VPCLMULQDQ_512
+	AVX512_VPOPCNTDQ_128	AVX512_VPOPCNTDQ_256	AVX512_VPOPCNTDQ_512	AVXAES
+	AVX_GFNI	AVX_VNNI	BMI1	BMI2
+	CET	CLDEMOTE	CLFLUSHOPT	CLFSH
+	CLWB	CMOV	CMPXCHG16B	ENQCMD
+	F16C	FAT_NOP	FCMOV	FMA
+	FXSAVE	FXSAVE64	GFNI	I186
+	I286PROTECTED	I286REAL	I386	I486
+	I486REAL	I86	INVPCID	LAHF
+	LONGMODE	LZCNT	MONITOR	MOVBE
+	MOVDIR	PAUSE	PCLMULQDQ	PCONFIG
+	PENTIUMMMX	PENTIUMREAL	PKU	POPCNT
+	PPRO	PPRO_UD0_LONG	PREFETCHW	PREFETCH_NOP
+	PTWRITE	RDPID	RDPMC	RDRAND
+	RDSEED	RDTSCP	RDWRFSGS	RTM
+	SERIALIZE	SGX	SGX_ENCLV	SHA
+	SMAP	SMX	SSE	SSE2
+	SSE2MMX	SSE3	SSE3X87	SSE4
+	SSE42	SSEMXCSR	SSE_PREFETCH	SSSE3
+	SSSE3MMX	TDX	TSX_LDTRK	UINTR
+	VAES	VMFUNC	VPCLMULQDQ	VTX
+	WAITPKG	WBNOINVD	X87	XSAVE
+	XSAVEC	XSAVEOPT	XSAVES

CodeVirtualizer/build/obj/dgen/all-chip-models.txt

@@ -0,0 +1,817 @@
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/xed-chips.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+# This file is for defining sets of extensions implemented by various chips
+#
+# The first column is a chip name. It will become the source for the enum xed_chip_t XED_CHIP_*
+# The rest of the columns are ISA extensions that that CHIP implements
+# ALL_OF(x) is a macro that refers to the set defined previously for some chip x.
+# NOT(y) is a macro that removes a specific ISA extension (processed last)
+
+I86:       I86 LAHF
+I86FP:     I86 LAHF      X87
+
+I186:      ALL_OF(I86)  I186
+     # BOUND, ENTER, INS/INSB/INSW, LEAVE, OUTS/OUTSB/OUTSW, POPA, PUSHA
+I186FP:   ALL_OF(I186)   X87
+
+I286REAL:  ALL_OF(I186)     I286REAL X87
+I286:      ALL_OF(I286REAL) I286PROTECTED
+     # ARPL, CLTS, LAR, LGDT, LIDT, LLDT, LMSW,
+     #  LOADALL(undoc), LSL, LTR, SGDT, SIDT,SLDT, SMSW, STR,VERR,VERW
+I2186FP:   ALL_OF(I286) X87
+
+# 386 did not add any instr  to real mode
+I386REAL:  ALL_OF(I286REAL)
+I386:      ALL_OF(I386REAL)  ALL_OF(I286) I386
+     # BSF, BSR, BT, BTC, BTR,BTS, CDQ, CMPSD,CWDE, INSD, IRET*, JECXZ,
+     # LFS, LGS,LSS, LOADALL(undoc), LODSD, LOOP, MOVSD
+     # MOVSX, OUTSD, POPAD POPFD, PUSHAD PUSHD PUSHFD, SCASD
+     # SETcc* SHLD, SHRD, STOSD
+I386FP:    ALL_OF(I386)  X87
+
+I486REAL:  ALL_OF(I386REAL)  I486REAL             # BSWAP, CMPXCHG, CPUID, INVD, INVLPG, RSM,WBINVD,XADD
+I486:      ALL_OF(I486REAL)  ALL_OF(I386) I486     X87         # RSM
+
+PENTIUMREAL:    ALL_OF(I486REAL)     PENTIUMREAL  # CMPXCHG8B, RDMSR, RDTSC, WRMSR
+PENTIUM:        ALL_OF(PENTIUMREAL) ALL_OF(I486)
+# Quark is PENTIUM ISA, but not Pentium implementation.
+QUARK:          ALL_OF(PENTIUM)
+
+PENTIUMMMXREAL: ALL_OF(PENTIUMREAL)    RDPMC     # P55C++  RDPMC
+PENTIUMMMX:     ALL_OF(PENTIUMMMXREAL) ALL_OF(PENTIUM) PENTIUMMMX   # P55C++
+
+ALLREAL:  ALL_OF(PENTIUMMMXREAL)
+
+# P6, PentiumPro, PPRO:
+# The SSE_PREFETCH were on P6 as fat NOPs, but XED only recognizes them on >=PENTIUM3
+PENTIUMPRO: ALL_OF(PENTIUM) PPRO PPRO_UD0_SHORT CMOV FCMOV RDPMC FAT_NOP PREFETCH_NOP     # NO MMX (Orig P6)
+    # FCMOV*, CMOV*, RDPMC, SYSCALL, SYSENTER, SYSEXIT,SYSRET, UD2, F[U]COMI[P]
+    # note conflict with PENTIUM2 addition of SYSENTER/SYSEXIT
+
+
+PENTIUM2:   ALL_OF(PENTIUM)  PENTIUMMMX  PPRO CMOV FCMOV FAT_NOP RDPMC PREFETCH_NOP FXSAVE
+    # FXSAVE/FXRSTOR, SYSENTER,SYSEXIT P6
+
+# we keep SSEMXCSR separate from SSE to accommodate chip-check for KNC
+#  which only implements LDMXCSR/STMXCSR from SSE.
+# The SSE_PREFETCH came in as NOPs on P6/PPRO.  innaccuracy...
+PENTIUM3:   ALL_OF(PENTIUM2)  SSE  SSEMXCSR SSE_PREFETCH   # SSE(incl. ldmxcsr/stmxcsr) (KNI)
+
+# SSE2MMX is a several purely mmx instructions that came with SSE2 (PADDQ, PSUBQ, PMULUDQ).
+# They are really part of SSE2.
+PENTIUM4:     ALL_OF(PENTIUM3) NOT(PPRO_UD0_SHORT) PPRO_UD0_LONG SSE2 SSE2MMX CLFSH PAUSE
+
+# MONITOR is (MONITOR and MWAIT) instructions
+# SSE3X87 is two x87 instructions that came with SSE3.
+P4PRESCOTT:   ALL_OF(PENTIUM4) SSE3 SSE3X87 MONITOR LONGMODE CMPXCHG16B  FXSAVE64
+
+# Made a chip for the P4's that omit LAHF in 64b mode
+P4PRESCOTT_NOLAHF:  ALL_OF(P4PRESCOTT)  NOT(LAHF)
+
+P4PRESCOTT_VTX:  ALL_OF(P4PRESCOTT)  VTX
+
+# SSSE3MMX is a a bunch of purely mmx instructions that came with SSSE3.
+# They are really part of SSSE3. The 3DNOW_PREFETCH instr were nops.
+# previously listed as CORE2
+MEROM:       ALL_OF(P4PRESCOTT)  VTX SSSE3 SSSE3MMX SMX 3DNOW_PREFETCH
+
+PENRYN:      ALL_OF(MEROM)     SSE4
+PENRYN_E:    ALL_OF(PENRYN)    XSAVE
+NEHALEM:     ALL_OF(PENRYN)    SSE42 POPCNT RDTSCP
+WESTMERE:    ALL_OF(NEHALEM)    AES PCLMULQDQ
+
+# ATOM
+BONNELL:  ALL_OF(MEROM)     MOVBE  NOT(SMX) NOT(PPRO_UD0_LONG) PPRO_UD0_SHORT
+SALTWELL: ALL_OF(BONNELL)
+
+# PREFETCHW semantics added to PREFETCHW opcode but not subject
+# to chip-check because of prior implementation as NOP.
+SILVERMONT:    ALL_OF(WESTMERE)  MOVBE RDRAND PREFETCHW VMFUNC NOT(PPRO_UD0_LONG) PPRO_UD0_SHORT
+
+
+
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/via/xed-via-chips.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+#  VIA CENTAUR CHIPS???
+#VIA:  ALL_OF(P4PRESCOTT) VIA_PADLOCK_RNG VIA_PADLOCK_AES VIA_PADLOCK_SHA
+VIA:  VIA_PADLOCK_RNG VIA_PADLOCK_AES VIA_PADLOCK_SHA VIA_PADLOCK_MONTMUL
+
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd-chips.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2020 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+
+# This is based mostly on my read of the wikpedia page:
+#  https://en.wikipedia.org/wiki/Template:AMD_x86_CPU_features
+
+# FIXME: need a proper baseline for AMD_K10 as a starting point. I
+#  used WESTMERE to avoid TSX/RTM.
+
+# FIXME: not sure when LZCNT entered the picture
+
+# FIXME: guessing about F16C and RDWRFSGS
+
+AMD_K10: ALL_OF(WESTMERE) PREFETCHW 3DNOW 3DNOW_PREFETCH SSE4A AMD SVM PREFETCH_NOP LZCNT
+
+
+AMD_BULLDOZER: ALL_OF(AMD_K10) \
+    NOT(3DNOW)   \
+    FMA4 LWP XOP \
+    AVX AVXAES XSAVE XSAVEOPT F16C RDWRFSGS
+
+AMD_PILEDRIVER: ALL_OF(AMD_BULLDOZER) TBM FMA
+
+AMD_ZEN: ALL_OF(AMD_PILEDRIVER) \
+    NOT(FMA4) \
+    NOT(LWP) \
+    NOT(XOP) \
+    AVX2 AVX2GATHER \
+    BMI2 MOVBE ADOX_ADCX  SHA \
+    RDRAND RDSEED \
+    SMAP XSAVEC XSAVES CLFLUSHOPT CLZERO
+
+AMD_ZENPLUS: ALL_OF(AMD_ZEN)
+
+# Guessing about MONITORX
+AMD_ZEN2: ALL_OF(AMD_ZENPLUS) \
+ WBNOINVD CLWB RDPID RDPRU MCOMMIT \
+ MONITORX
+
+# Guessing
+AMD_FUTURE: ALL_OF(AMD_ZEN2) \
+    SNP \
+    AMD_INVLPGB
+
+
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/glm/glm-chips.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+
+GOLDMONT:  ALL_OF(SILVERMONT) MPX SHA RDSEED RDWRFSGS \
+                              XSAVE XSAVEOPT XSAVEC XSAVES SMAP \
+                              CLFLUSHOPT
+
+GOLDMONT_PLUS:  ALL_OF(GOLDMONT) PTWRITE RDPID SGX
+# and UMIP but not instr for that
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/tremont/tremont-chips.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2020 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+TREMONT: ALL_OF(GOLDMONT_PLUS)  CLWB GFNI  NOT(SGX)
+
+SNOW_RIDGE: ALL_OF(TREMONT) WAITPKG MOVDIR CLDEMOTE NOT(SGX)
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/avx/avx-chips.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+SANDYBRIDGE: ALL_OF(WESTMERE)      AVX AVXAES XSAVE XSAVEOPT
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/ivbavx/ivb-chips.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+IVYBRIDGE: ALL_OF(SANDYBRIDGE)  RDRAND F16C RDWRFSGS
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/hsw/hsw-chips.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+HASWELL: ALL_OF(IVYBRIDGE)   FMA BMI1 BMI2 LZCNT AVX2 AVX2GATHER INVPCID MOVBE VMFUNC RTM
+
+
+
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/bdw/bdw-chips.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+# PREFETCHW semantics added to PREFETCHW opcode but not subject
+# to chip-check because of prior implementation as NOP
+BROADWELL: ALL_OF(HASWELL)  ADOX_ADCX RDSEED SMAP PREFETCHW
+
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/skl/skl-chips.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+SKYLAKE:   ALL_OF(BROADWELL)  MPX XSAVEC XSAVES SGX CLFLUSHOPT
+
+COMET_LAKE: ALL_OF(SKYLAKE) PKU
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/skx/skx-chips.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+
+SKYLAKE_SERVER: ALL_OF(SKYLAKE)  PKU \
+              CLWB \
+              AVX512F_512        \
+              AVX512F_128        \
+              AVX512F_128N       \
+              AVX512F_256        \
+              AVX512F_KOP        \
+              AVX512F_SCALAR     \
+              AVX512BW_128       \
+              AVX512BW_128N      \
+              AVX512BW_256       \
+              AVX512BW_512       \
+              AVX512BW_KOP       \
+              AVX512CD_128       \
+              AVX512CD_256       \
+              AVX512CD_512       \
+              AVX512DQ_128       \
+              AVX512DQ_128N      \
+              AVX512DQ_256       \
+              AVX512DQ_512       \
+              AVX512DQ_KOP       \
+              AVX512DQ_SCALAR
+
+
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/clx/clx-chips.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+# Cascade Lake (CLX) based on Coffee Lake CPU.
+#    Coffee Lake has same ISA as SKX.
+
+CASCADE_LAKE: ALL_OF(SKYLAKE_SERVER) \
+         AVX512_VNNI_128 \
+         AVX512_VNNI_256 \
+         AVX512_VNNI_512
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/cpx/cooper-lake-chips.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+
+
+COOPER_LAKE: ALL_OF(CASCADE_LAKE) \
+         AVX512_BF16_128 \
+         AVX512_BF16_256 \
+         AVX512_BF16_512
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/knl/knl-chips.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+# No HSW INVPCID, RTM, VMFUNC
+# No BDW SMAP
+KNL: ALL_OF(IVYBRIDGE) \
+       AVX512F_SCALAR  \
+       AVX512F_KOP     \
+       AVX512F_512     \
+       AVX512F_128N    \
+       AVX512CD_512    \
+       AVX512ER_512    \
+       AVX512ER_SCALAR \
+       AVX512PF_512    \
+       PREFETCHWT1     \
+       ADOX_ADCX RDSEED FMA BMI1 BMI2 LZCNT AVX2 AVX2GATHER  MOVBE
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/knm/knm-chips.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+# VMFUNC was partially implmented on KNL but VMX was disabled.
+KNM: ALL_OF(KNL)   VMFUNC \
+        AVX512_4VNNIW_512 \
+        AVX512_4FMAPS_512 \
+        AVX512_4FMAPS_SCALAR \
+        AVX512_VPOPCNTDQ_512
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/cnl/cnl-chips.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+
+# CANNONLAKE does not have CLWB
+CANNONLAKE: ALL_OF(SKYLAKE_SERVER) SHA    \
+            NOT(CLWB) \
+            AVX512_IFMA_128 \
+            AVX512_IFMA_256 \
+            AVX512_IFMA_512 \
+            AVX512_VBMI_128 \
+            AVX512_VBMI_256 \
+            AVX512_VBMI_512
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/icl/icl-chips.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+# NOT(HLE) but no HLE instr support.
+ICE_LAKE: \
+         ALL_OF(SKYLAKE_SERVER) \
+         NOT(CLWB)              \
+         NOT(MPX)               \
+         RDPID                  \
+         SHA                    \
+         AVX512_IFMA_128        \
+         AVX512_IFMA_256        \
+         AVX512_IFMA_512        \
+         AVX512_VBMI_128        \
+         AVX512_VBMI_256        \
+         AVX512_VBMI_512        \
+         AVX512_VBMI2_128       \
+         AVX512_VBMI2_256       \
+         AVX512_VBMI2_512       \
+         AVX512_BITALG_512      \
+         AVX512_BITALG_256      \
+         AVX512_BITALG_128      \
+         AVX512_VPOPCNTDQ_128   \
+         AVX512_VPOPCNTDQ_256   \
+         AVX512_VPOPCNTDQ_512   \
+         AVX512_GFNI_128        \
+         AVX512_GFNI_256        \
+         AVX512_GFNI_512        \
+         AVX_GFNI               \
+         GFNI                   \
+         AVX512_VAES_128        \
+         AVX512_VAES_256        \
+         AVX512_VAES_512        \
+         VAES                   \
+         AVX512_VPCLMULQDQ_128  \
+         AVX512_VPCLMULQDQ_256  \
+         AVX512_VPCLMULQDQ_512  \
+         VPCLMULQDQ             \
+         AVX512_VNNI_128        \
+         AVX512_VNNI_256        \
+         AVX512_VNNI_512
+
+
+ICE_LAKE_SERVER:          \
+         ALL_OF(ICE_LAKE) \
+         CLWB             \
+         SGX_ENCLV        \
+         PCONFIG          \
+         WBNOINVD
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/tgl/tgl-chips.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2020 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+TIGER_LAKE:                  \
+     ALL_OF(ICE_LAKE_SERVER) \
+     KEYLOCKER               \
+     KEYLOCKER_WIDE          \
+     CET                     \
+     MOVDIR                  \
+     AVX512_VP2INTERSECT_128 \
+     AVX512_VP2INTERSECT_256 \
+     AVX512_VP2INTERSECT_512
+
+
+
+
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/adl/adl-chips.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2020 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+
+# MKTME has no new instr
+ALDER_LAKE:             \
+     ALL_OF(SNOW_RIDGE) \
+     NOT(SGX_ENCLV)     \
+     NOT(MPX)           \
+     KEYLOCKER          \
+     KEYLOCKER_WIDE     \
+     CET                \
+     PCONFIG            \
+     INVPCID            \
+     SERIALIZE          \
+     AVX                \
+     AVX_VNNI           \
+     VPCLMULQDQ         \
+     VAES               \
+     F16C               \
+     AVXAES             \
+     PKU                \
+     FMA                \
+     BMI1               \
+     BMI2               \
+     AVX2               \
+     AVX_GFNI           \
+     AVX2GATHER         \
+     ADOX_ADCX          \
+     LZCNT              \
+     WBNOINVD           \
+     HRESET
+
+
+
+
+
+
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/spr/spr-chips.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2020 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+
+SAPPHIRE_RAPIDS:         \
+     ALL_OF(TIGER_LAKE)  \
+     NOT(KEYLOCKER)      \
+     NOT(KEYLOCKER_WIDE) \
+     UINTR               \
+     PTWRITE             \
+     CLDEMOTE            \
+     ENQCMD              \
+     SERIALIZE           \
+     TSX_LDTRK           \
+     WAITPKG             \
+     AVX512_BF16_128     \
+     AVX512_BF16_256     \
+     AVX512_BF16_512     \
+     AVX_VNNI            \
+     AMX_TILE            \
+     AMX_INT8            \
+     AMX_BF16            \
+     TDX                 \
+     AVX512_BF16_128     \
+     AVX512_BF16_256     \
+     AVX512_BF16_512     \
+     AVX512_FP16_128N    \
+     AVX512_FP16_128     \
+     AVX512_FP16_256     \
+     AVX512_FP16_512     \
+     AVX512_FP16_SCALAR
+
+
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/future/future-chips.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+# This is intentionally *completely* inaccurate but Intel is not
+# saying which chips will have these instructions publicly at this
+# time and I had to put the new instructions on some chip so I made
+# somethign up.
+
+FUTURE:                    \
+   ALL_OF(SAPPHIRE_RAPIDS) \
+   TDX

CodeVirtualizer/build/obj/dgen/all-conversion-table.txt

@@ -0,0 +1,90 @@
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/xed-convert.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+# empty file
+
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-strings.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+ZEROSTR(XED_OPERAND_ZEROING)::
+0 -> ''
+1 -> '{z}'
+
+SAESTR(XED_OPERAND_SAE)::
+0 -> ''
+1 -> '{sae}'
+
+# AVX512 only has rounding with implied SAE
+ROUNDC(XED_OPERAND_ROUNDC)::
+0  -> ''
+1  -> '{rne-sae}'
+2  -> '{rd-sae}'
+3  -> '{ru-sae}'
+4  -> '{rz-sae}'
+
+
+BCASTSTR(XED_OPERAND_BCAST)::
+0 -> ''
+1 -> '{1to16}'
+2 -> '{4to16}'
+3 -> '{1to8}'
+4 -> '{4to8}'
+5 -> '{1to8}'
+6 -> '{4to8}'
+7 -> '{2to16}'
+8 -> '{2to8}'
+9 -> '{8to16}'
+10 -> '{1to4}'
+11 -> '{1to2}'
+12 -> '{2to4}'
+13 -> '{1to4}'
+14 -> '{1to8}'
+15 -> '{1to16}'
+16 -> '{1to32}'
+17 -> '{1to16}'
+18 -> '{1to32}'
+19 -> '{1to64}'
+20 -> '{2to4}'
+21 -> '{2to8}'
+22 -> '{1to2}'
+23 -> '{1to2}'
+24 -> '{1to4}'
+25 -> '{1to8}'
+26 -> '{1to2}'
+27 -> '{1to4}'

CodeVirtualizer/build/obj/dgen/all-dec-spine.txt

@@ -0,0 +1,25 @@
+
+
+###FILE: C:\$Fanta\IntelXED\xed\datafiles\knc\uisa-spine.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+ISA()::
+PREFIXES() OSZ_NONTERM() ASZ_NONTERM() EVEX_SPLITTER() |
+
+

CodeVirtualizer/build/obj/dgen/all-element-type-base.txt

@@ -0,0 +1,84 @@
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/xed-operand-element-type-enum-base.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+namespace XED
+hfn xed-operand-element-type-enum.h
+cfn xed-operand-element-type-enum.c
+prefix XED_OPERAND_ELEMENT_TYPE_
+typename xed_operand_element_type_enum_t
+stream_ifdef XED_PRINT
+proto_prefix XED_DLL_EXPORT
+extra_header xed-common-hdrs.h
+INVALID
+UINT        ///< Unsigned integer
+INT         ///< Signed integer
+SINGLE      ///< 32b FP single precision
+DOUBLE      ///< 64b FP double precision
+LONGDOUBLE  ///< 80b FP x87
+LONGBCD     ///< 80b decimal BCD
+STRUCT      ///< a structure of various fields
+VARIABLE    ///< depends on other fields in the instruction
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/ivbavx/fp16-element-type-enum.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+FLOAT16  ///< 16b floating point
+
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/avx512-bf16/bf16-element-type-enum.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2021 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+BFLOAT16  ///< bfloat16 floating point
+

CodeVirtualizer/build/obj/dgen/all-element-types.txt

@@ -0,0 +1,116 @@
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/xed-operand-types.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+#
+#
+#XTYPE       TYPE   BITS-PER-ELEM
+#
+var      VARIABLE    0  # instruction must set NELEM and  ELEMENT_SIZE
+struct     STRUCT    0  # many elements of different widths
+int           INT    0  # one element, all the bits, width varies
+uint         UINT    0  # one element, all the bits, width varies
+#
+i1            INT    1
+i8            INT    8
+i16           INT   16
+i32           INT   32
+i64           INT   64
+u8           UINT    8
+u16          UINT   16
+u32          UINT   32
+u64          UINT   64
+u128         UINT  128
+u256         UINT  256
+f32        SINGLE   32
+f64        DOUBLE   64
+f80    LONGDOUBLE   80
+b80       LONGBCD   80
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/ivbavx/fp16-operand-types.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+#XTYPE       TYPE   BITS-PER-ELEM
+f16        FLOAT16  16
+
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/avx512-bf16/bf16-element-types.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2021 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+#
+bf16        BFLOAT16   16
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/avx512-fp16/operand-types.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2021 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+#XTYPE      TYPE    BITS-PER-ELEM
+2f16       FLOAT16  32
+

CodeVirtualizer/build/obj/dgen/all-extra-widths.txt

@@ -0,0 +1,119 @@
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/oc2-extras.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+#
+# ssz, asz are new oc2 widths
+# pseudo is a new oc2 width
+#
+# col0: reg or nt
+# col1: regname or nt name
+# col2: oc2 width
+#
+#
+imm_const AGEN pseudo
+reg AH b
+reg AL b
+reg AX w
+reg CL b
+reg CR0 y
+reg CS w
+reg DS w
+reg DX w
+reg EAX d
+reg EBX d
+reg ECX d
+reg EDX d
+reg EIP d
+reg ES w
+reg FS w
+reg GDTR pseudo
+reg GS w
+reg IDTR pseudo
+reg LDTR pseudo
+reg MSRS pseudo
+reg MXCSR d
+reg RAX q
+reg RBX q
+reg RCX q
+reg RDX q
+reg R11 q
+reg RIP q
+reg XCR0 q
+reg SS w
+reg TR pseudo
+reg TSC pseudo
+reg TSCAUX pseudo
+reg X87CONTROL pseudo
+reg X87POP pseudo
+reg X87POP2 pseudo
+reg X87PUSH pseudo
+reg X87STATUS pseudo
+reg X87TAG pseudo
+reg X87TOP pseudo
+#
+nt ArBP  asz
+nt ArAX  asz
+nt ArBX  asz
+nt ArCX  asz
+nt ArDI  asz
+nt ArSI  asz
+nt CR_R  y
+nt DR_R  y
+nt GPR16_B w
+nt GPR16_R w
+nt GPR32_B d
+nt GPR32_R d
+nt GPR64_B q
+nt GPR64_R q
+nt GPR8_B b
+nt GPR8_R b
+nt GPRv_B v
+nt GPRv_R v
+nt GPRy_B y
+nt GPRy_R y
+nt GPRz_B z
+nt GPRz_R z
+nt GPRv_SB v
+nt GPRv_SR v
+nt GPR64_SB q
+nt GPR64_SR q
+nt GPR32_SB d
+nt GPR32_SR d
+nt GPR16_SB w
+nt GPR16_SR w
+nt GPR8_SB b
+nt GPR8_SR b
+nt OeAX v
+nt OeBP v
+nt OeBX v
+nt OeCX v
+nt OeDI v
+nt OeDX v
+nt OeSI v
+nt OeSP v
+nt OrAX v
+nt OrBP v
+nt OrDX v
+nt OrSP v
+nt SEG  w
+nt SrSP ssz
+nt rFLAGS y
+nt rIP y

CodeVirtualizer/build/obj/dgen/all-fields.txt

@@ -0,0 +1,442 @@
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/xed-fields.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+# @file xed-fields.txt
+
+
+# visibilities are one of [EXPLICIT|IMPLICIT|SUPPRESSED]
+
+# Major properties of the fields are determined by the columns with
+#  the content {EI,EO} or {DI,DO,DS}. EI is encoder inputs and EO is
+#  for encoder outputs.  DI is decoder inputs, DO is decoder
+#  outputs. And DS means "decoder skip" and is used for fields that
+#  show up in instruction pattern constraints but should be completely
+#  ignored by the decoder.
+
+
+# INTERNAL means that the field is excluded from the instructions'
+#  operands array template.
+
+
+
+# ====  ======   ====   =========     ==========
+#       scalar                         default
+# name  array    type   bit-width     visibility
+# ====  ======   ====   =========     ==========
+SEG_OVD        SCALAR     xed_bits_t 3       SUPPRESSED   NOPRINT INTERNAL DO EO # FIXME: DO_EO? always an output
+
+# HINT: 0=no hint,
+#       1=CS PREFIX OBSERVED (NOT TAKEN)
+#       2=DS PREFIX OBSERVED (TAKEN)
+#       3=NOT TAKEN HINT VALIDATED for a BRANCH
+#       4=TAKEN HINT VALIDATED for a BRANCH
+HINT           SCALAR     xed_bits_t 3       SUPPRESSED   NOPRINT PUBLIC   DO EI
+# do not do encoder chip checking for the encode request
+ENCODE_FORCE   SCALAR     xed_bits_t 1       SUPPRESSED   NOPRINT INTERNAL  DO EI
+
+LOCK           SCALAR     xed_bits_t 1       SUPPRESSED   PRINT   PUBLIC   DO EO
+
+NEED_MEMDISP   SCALAR     xed_bits_t 6        SUPPRESSED   NOPRINT   INTERNAL DO EO
+
+DISP           SCALAR     xed_int64_t    64   SUPPRESSED   NOPRINT   INTERNAL   DO EI # MEMORY DISPLACEMENT
+
+DISP_WIDTH     SCALAR     xed_uint8_t     8  SUPPRESSED   NOPRINT PUBLIC   DO EI # in bytes FIXME: could use log2
+
+BRDISP_WIDTH   SCALAR     xed_uint8_t     8  SUPPRESSED   NOPRINT   INTERNAL   DO EI # in bytes FIXME: could use log2
+
+# DF32 is for MOV_CR & CR_WIDTH() NTs
+DF32           SCALAR     xed_bits_t 1        SUPPRESSED   NOPRINT INTERNAL DO EO
+DF64           SCALAR     xed_bits_t 1        SUPPRESSED   NOPRINT INTERNAL DO EO
+
+# NOREX is an unfortunate thing. It is only required to prevent
+# encoding illegal instructions that have REX prefixes and use the
+# AH/BH/CH/DH registers. It was not used for decoding
+
+NOREX          SCALAR     xed_bits_t 1        SUPPRESSED   NOPRINT INTERNAL DO EO
+NEEDREX        SCALAR     xed_bits_t 1        SUPPRESSED   NOPRINT INTERNAL DO EO
+
+REX            SCALAR     xed_bits_t 1        SUPPRESSED   NOPRINT INTERNAL DO EO
+REXW           SCALAR     xed_bits_t 1        SUPPRESSED   NOPRINT INTERNAL DO EO
+REXR           SCALAR     xed_bits_t 1        SUPPRESSED   NOPRINT INTERNAL DO EO
+REXX           SCALAR     xed_bits_t 1        SUPPRESSED   NOPRINT INTERNAL DO EO
+REXB           SCALAR     xed_bits_t 1        SUPPRESSED   NOPRINT INTERNAL DO EO
+
+# refining must be used to interpret the REP output of decode
+REP            SCALAR     xed_bits_t 2       SUPPRESSED  PRINT   PUBLIC   DO EO # 0=no-rep, 2=F2, 3=F3
+OSZ            SCALAR     xed_bits_t 1       SUPPRESSED  NOPRINT INTERNAL DO EO
+PREFIX66       SCALAR     xed_bits_t 1       SUPPRESSED  NOPRINT INTERNAL DO EO
+ASZ            SCALAR     xed_bits_t 1       SUPPRESSED  NOPRINT INTERNAL DO EO
+
+# effective operand size and address size
+EOSZ           SCALAR     xed_bits_t 2             SUPPRESSED  NOPRINT PUBLIC DO EI
+EASZ           SCALAR     xed_bits_t 2             SUPPRESSED  NOPRINT PUBLIC DO EI
+
+
+
+#MODRM fields
+MOD            SCALAR     xed_bits_t 2             SUPPRESSED  NOPRINT INTERNAL DO EO
+REG            SCALAR     xed_bits_t 3             SUPPRESSED  NOPRINT INTERNAL DO EO
+# SRM is for partial-byte opcodes that capture a RM-like field.
+SRM            SCALAR     xed_bits_t 3             SUPPRESSED  NOPRINT INTERNAL DO EO
+RM             SCALAR     xed_bits_t 3             SUPPRESSED  NOPRINT INTERNAL DO EO
+
+# Machine mode, addressing mode , stack addressing mode
+
+REALMODE       SCALAR     xed_bits_t 1              SUPPRESSED  NOPRINT PUBLIC   DI EI
+CHIP           SCALAR     xed_chip_enum_t 16        SUPPRESSED  NOPRINT PUBLIC   DI EI
+MODE           SCALAR     xed_bits_t 2              SUPPRESSED  NOPRINT PUBLIC   DI EI
+SMODE          SCALAR     xed_bits_t 2              SUPPRESSED  NOPRINT PUBLIC   DI EI
+MODEP5         SCALAR     xed_bits_t 1              SUPPRESSED  NOPRINT PUBLIC   DI EI
+# P55C introduced MMX - FIXME: unfinished support for MODEP55C
+MODEP55C       SCALAR     xed_bits_t 1              SUPPRESSED  NOPRINT PUBLIC   DI EI
+
+# for PAUSE vs F3 NOP
+P4             SCALAR     xed_bits_t 1              SUPPRESSED  NOPRINT PUBLIC   DI EO
+
+# for LZCNT/F3+BSR and TZCNT/F3+BSF
+LZCNT          SCALAR     xed_bits_t 1              SUPPRESSED  NOPRINT PUBLIC   DI EO
+TZCNT          SCALAR     xed_bits_t 1              SUPPRESSED  NOPRINT PUBLIC   DI EO
+
+MODE_FIRST_PREFIX SCALAR  xed_bits_t 1              SUPPRESSED  NOPRINT PUBLIC   DI EI
+MODE_SHORT_UD0    SCALAR  xed_bits_t 1              SUPPRESSED  NOPRINT PUBLIC   DI EI
+
+IMM0           SCALAR     xed_bits_t 1             EXPLICIT    PRINT   PUBLIC   DO EI # Indicator
+IMM1           SCALAR     xed_bits_t 1             EXPLICIT    PRINT   PUBLIC   DO EI # Indicator  ENTER instruction
+IMM0SIGNED     SCALAR     xed_bits_t 1             EXPLICIT    NOPRINT PUBLIC   DO EO # Decode information only
+
+UIMM0          SCALAR     xed_uint64_t 64           SUPPRESSED  NOPRINT   INTERNAL   DO EI
+UIMM1          SCALAR     xed_uint8_t 8             SUPPRESSED  NOPRINT   INTERNAL   DO EI # for ENTER's 2nd immediate, always 8b
+IMM_WIDTH      SCALAR     xed_uint8_t 8             SUPPRESSED  NOPRINT   INTERNAL   DO EI # in bits
+
+
+# These two are decode outputs that tell us when there was an overridden segment
+# selector that was not the default segment selector.
+
+USING_DEFAULT_SEGMENT0  SCALAR  xed_bits_t    1     SUPPRESSED  NOPRINT INTERNAL DO EO
+USING_DEFAULT_SEGMENT1  SCALAR  xed_bits_t    1     SUPPRESSED  NOPRINT INTERNAL DO EO
+
+
+
+#  MODRM/SIB field processing
+DEFAULT_SEG    SCALAR     xed_bits_t      2     SUPPRESSED  NOPRINT INTERNAL DO EO # ENCODER INTERNAL
+SEG0           SCALAR     xed_reg_enum_t 16     EXPLICIT    PRINT   INTERNAL   DO EI
+
+# BASE0 & BASE1 must be PUBLIC because the string ops conditionally update them so users need the rw code
+
+BASE0          SCALAR     xed_reg_enum_t 16     EXPLICIT    PRINT   PUBLIC   DO EI
+INDEX          SCALAR     xed_reg_enum_t 16     EXPLICIT    PRINT   INTERNAL   DO EI
+SCALE          SCALAR     xed_bits_t 4              EXPLICIT    PRINT   INTERNAL   DO EI #1/2/4/8
+
+# NEED_SIB is variable used by encoder to control emitting fa sib byte. not used by decoder
+NEED_SIB       SCALAR     xed_bits_t 1              SUPPRESSED  NOPRINT INTERNAL DO EO
+
+# raw values of the SIB fields:
+SIBSCALE       SCALAR     xed_bits_t 2              SUPPRESSED  NOPRINT INTERNAL DO EO
+SIBBASE        SCALAR     xed_bits_t 3              SUPPRESSED  NOPRINT INTERNAL DO EO
+SIBINDEX       SCALAR     xed_bits_t 3              SUPPRESSED  NOPRINT INTERNAL DO EO
+
+#  For the string ops:
+SEG1           SCALAR     xed_reg_enum_t 16     EXPLICIT    PRINT   INTERNAL   DO EI
+BASE1          SCALAR     xed_reg_enum_t 16     EXPLICIT    PRINT   PUBLIC   DO EI
+
+#  Things that tell us to look at other fields
+MEM0           SCALAR     xed_bits_t 1             EXPLICIT    PRINT   PUBLIC   DO EI
+MEM1           SCALAR     xed_bits_t 1             EXPLICIT    PRINT   PUBLIC   DO EI
+# MEM_WIDTH is not really a decoder-output; it is purely an encoder input. (see also ICLASS)
+MEM_WIDTH      SCALAR     xed_uint16_t 16          SUPPRESSED  NOPRINT PUBLIC   DO EI    # in bytes
+
+AGEN           SCALAR     xed_bits_t 1             EXPLICIT    PRINT   PUBLIC   DO EI
+
+# RELBR is used as a decode operand, but it is not required for encode
+RELBR          SCALAR     xed_bits_t 1             EXPLICIT    PRINT   PUBLIC   DO EI
+#  for CALL_FAR & JMP_FAR. Note UIM0 is also set by these
+PTR            SCALAR     xed_bits_t 1             EXPLICIT    PRINT   PUBLIC   DO EI
+
+# NOTE: The arrays are experimental
+#
+#REGN           ARRAY     xed_reg_enum_t 16    EXPLICIT    PRINT   PUBLIC   DO EI
+#
+REG0           SCALAR     xed_reg_enum_t 16    EXPLICIT    PRINT   PUBLIC   DO EI
+REG1           SCALAR     xed_reg_enum_t 16    EXPLICIT    PRINT   PUBLIC   DO EI
+REG2           SCALAR     xed_reg_enum_t 16    EXPLICIT    PRINT   PUBLIC   DO EI
+REG3           SCALAR     xed_reg_enum_t 16    EXPLICIT    PRINT   PUBLIC   DO EI
+REG4           SCALAR     xed_reg_enum_t 16    EXPLICIT    PRINT   PUBLIC   DO EI
+REG5           SCALAR     xed_reg_enum_t 16    EXPLICIT    PRINT   PUBLIC   DO EI
+REG6           SCALAR     xed_reg_enum_t 16    EXPLICIT    PRINT   PUBLIC   DO EI
+REG7           SCALAR     xed_reg_enum_t 16    EXPLICIT    PRINT   PUBLIC   DO EI
+REG8           SCALAR     xed_reg_enum_t 16    EXPLICIT    PRINT   PUBLIC   DO EI
+REG9           SCALAR     xed_reg_enum_t 16    EXPLICIT    PRINT   PUBLIC   DO EI
+
+OUTREG         SCALAR     xed_reg_enum_t 16    SUPPRESSED NOPRINT INTERNAL DO EI  #  output for lookup-functions
+ENCODER_PREFERRED SCALAR  xed_bits_t 1         SUPPRESSED NOPRINT INTERNAL DO EI # encoder preference when underdetermined.
+ERROR          SCALAR     xed_error_enum_t 8    SUPPRESSED NOPRINT INTERNAL DO EO # an error occurred
+
+# ICLASS is not really a decoder-output; it is purely an encoder input. (see also MEM_WIDTH)
+ICLASS         SCALAR     xed_iclass_enum_t 16  SUPPRESSED NOPRINT PUBLIC   DO EI # the instruction class
+
+NELEM          SCALAR     xed_bits_t      4     SUPPRESSED NOPRINT INTERNAL DO EO
+ELEMENT_SIZE   SCALAR     xed_bits_t      9     SUPPRESSED NOPRINT INTERNAL DO EO
+
+#ILD-spesific operands
+MAP            SCALAR     xed_bits_t      4    SUPPRESSED NOPRINT INTERNAL DO EO
+OUT_OF_BYTES   SCALAR     xed_bits_t      1    SUPPRESSED NOPRINT INTERNAL DO EI
+FIRST_F2F3     SCALAR     xed_bits_t      2    SUPPRESSED NOPRINT INTERNAL DO EI
+LAST_F2F3      SCALAR     xed_bits_t      2    SUPPRESSED NOPRINT INTERNAL DO EI
+ILD_F2         SCALAR     xed_bits_t      1    SUPPRESSED NOPRINT INTERNAL DO EI
+ILD_F3         SCALAR     xed_bits_t      1    SUPPRESSED NOPRINT INTERNAL DO EI
+MAX_BYTES      SCALAR     xed_bits_t      8    SUPPRESSED NOPRINT INTERNAL DO EI
+ILD_SEG        SCALAR     xed_bits_t      8    SUPPRESSED NOPRINT INTERNAL DO EI
+NSEG_PREFIXES  SCALAR     xed_bits_t      8    SUPPRESSED NOPRINT INTERNAL DO EI
+NREXES         SCALAR     xed_bits_t      8    SUPPRESSED NOPRINT INTERNAL DO EI
+NPREFIXES      SCALAR     xed_bits_t      8    SUPPRESSED NOPRINT INTERNAL DO EI
+NOMINAL_OPCODE SCALAR     xed_bits_t      8    SUPPRESSED NOPRINT INTERNAL DO EI
+POS_NOMINAL_OPCODE SCALAR     xed_bits_t      8    SUPPRESSED NOPRINT INTERNAL DO EI
+# HAS_MODRM: 0=no, 1=yes, 2=yes, but ignore MOD, 3=undefined
+HAS_MODRM      SCALAR     xed_bits_t      2    SUPPRESSED NOPRINT INTERNAL DO EI
+HAS_SIB        SCALAR     xed_bits_t      1    SUPPRESSED NOPRINT INTERNAL DO EI
+POS_MODRM      SCALAR     xed_bits_t      8    SUPPRESSED NOPRINT INTERNAL DO EI
+POS_SIB        SCALAR     xed_bits_t      8    SUPPRESSED NOPRINT INTERNAL DO EI
+POS_DISP       SCALAR     xed_bits_t      8    SUPPRESSED NOPRINT INTERNAL DO EI
+POS_IMM        SCALAR     xed_bits_t      8    SUPPRESSED NOPRINT INTERNAL DO EI
+POS_IMM1       SCALAR     xed_bits_t      8    SUPPRESSED NOPRINT INTERNAL DO EI
+IMM1_BYTES     SCALAR     xed_bits_t      8    SUPPRESSED NOPRINT INTERNAL DO EI
+MODRM_BYTE     SCALAR     xed_bits_t      8    SUPPRESSED NOPRINT INTERNAL DO EI
+ESRC           SCALAR     xed_bits_t      4    SUPPRESSED NOPRINT INTERNAL DO EO
+VEXVALID       SCALAR     xed_bits_t      3    SUPPRESSED NOPRINT INTERNAL DO EO
+DUMMY          SCALAR     xed_bits_t      1    SUPPRESSED NOPRINT INTERNAL DO EI
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd3dnow-fields.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2020 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+# @file xed-fields.txt
+
+
+# visibilities are one of [EXPLICIT|IMPLICIT|SUPPRESSED]
+
+# Major properties of the fields are determined by the columns with
+#  the content {EI,EO} or {DI,DO,DS}. EI is encoder inputs and EO is
+#  for encoder outputs.  DI is decoder inputs, DO is decoder
+#  outputs. And DS means "decoder skip" and is used for fields that
+#  show up in instruction pattern constraints but should be completely
+#  ignored by the decoder.
+
+
+# INTERNAL means that the field is excluded from the instructions'
+#  operands array template.
+
+
+
+# ====  ======   ====   =========     ==========
+#       scalar                         default
+# name  array    type   bit-width     visibility
+# ====  ======   ====   =========     ==========
+AMD3DNOW       SCALAR     xed_bits_t      1    SUPPRESSED NOPRINT INTERNAL DO EI
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/mpx/mpx-fields.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+
+MPXMODE        SCALAR     xed_bits_t 1       SUPPRESSED   NOPRINT PUBLIC   DI EI
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/cet/cet-fields.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+CET           SCALAR     xed_bits_t 1              SUPPRESSED  NOPRINT PUBLIC   DI EO
+
+
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/cldemote/cldemote-fields.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+#       scalar
+# name  array        type   bit-width
+# ====  ======       ====   =========
+CLDEMOTE SCALAR     xed_bits_t  1 SUPPRESSED NOPRINT INTERNAL DO EO
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/avx/avx-fields.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+# ====     ====  =========               ==========    ==============
+#                                        default
+# name     type  bit-width               visibility    behavior
+# ====     ====  =========               ==========    ==============
+VEXDEST3   SCALAR xed_bits_t 1           SUPPRESSED    NOPRINT INTERNAL DO EO
+VEXDEST210 SCALAR xed_bits_t 3           SUPPRESSED    NOPRINT INTERNAL DO EO
+VL         SCALAR xed_bits_t 2           SUPPRESSED    NOPRINT INTERNAL DO EI
+
+VEX_PREFIX SCALAR xed_bits_t 2           SUPPRESSED    NOPRINT INTERNAL DO EO # VEX.PP
+VEX_C4     SCALAR xed_bits_t 1           SUPPRESSED    NOPRINT INTERNAL DO EO # ENCONLY
+BCAST      SCALAR xed_bits_t 5           SUPPRESSED    NOPRINT INTERNAL DO EO
+
+MUST_USE_EVEX  SCALAR     xed_bits_t      1    SUPPRESSED NOPRINT INTERNAL DO EI
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-fields.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+#
+ZEROING      SCALAR xed_bits_t 1         SUPPRESSED    NOPRINT INTERNAL DO EO
+LLRC         SCALAR xed_bits_t 2         SUPPRESSED    NOPRINT INTERNAL DO EO
+BCRC         SCALAR xed_bits_t 1         SUPPRESSED    NOPRINT INTERNAL DO EO
+
+REXRR      SCALAR xed_bits_t 1           SUPPRESSED    NOPRINT INTERNAL DO EO
+VEXDEST4    SCALAR xed_bits_t 1           SUPPRESSED    NOPRINT INTERNAL DO EO
+
+MASK       SCALAR xed_bits_t 3           SUPPRESSED    NOPRINT INTERNAL DO EO
+
+ROUNDC        SCALAR xed_bits_t  3       SUPPRESSED NOPRINT INTERNAL DO EI
+SAE           SCALAR xed_bits_t  1       SUPPRESSED NOPRINT INTERNAL DO EI
+
+# this is required for KNC's disp8 C-code override file
+#  (for their unaligned memop support).
+NO_SCALE_DISP8 SCALAR xed_bits_t 1       SUPPRESSED NOPRINT INTERNAL DO EO
+
+UBIT          SCALAR xed_bits_t 1         SUPPRESSED    NOPRINT INTERNAL DO EO
+
+
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/wbnoinvd/wbnoinvd-fields.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+#       scalar
+# name  array        type   bit-width
+# ====  ======       ====   =========
+WBNOINVD SCALAR     xed_bits_t  1 SUPPRESSED NOPRINT INTERNAL DO EO

CodeVirtualizer/build/obj/dgen/all-map-descriptions.txt

@@ -0,0 +1,154 @@
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/xed-base-maps.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+#  name     space   esc  mapopc mapno modrm disp imm   opcpos  2pattern
+legacy-map0  legacy  N/A  N/A    0     var  var  var   0       ''
+legacy-map1  legacy  0x0F N/A    1     var  var  var   1       '0x0F'
+legacy-map2  legacy  0x0F 0x38   2     yes  no   0     2       '0x0F 0x38'
+legacy-map3  legacy  0x0F 0x3A   3     yes  no   1     2       '0x0F 0x3A'
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/amd/amd-3dnow-maps.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+#  name     space   esc  mapopc mapno     modrm disp imm opcpos pattern
+amd-3dnow    legacy  0x0F 0x0F  AMD3DNOW   yes   no  1   -1     '0x0F 0x0F'
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/amd/amdxop/amd-xop-maps.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+#  name     space   esc  mapopc mapno modrm disp imm  opcpos pattern
+amd-xop8     xop     N/A  N/A    8     yes  no   1    1      'XMAP8'
+amd-xop9     xop     N/A  N/A    9     yes  no   0    1      'XMAP9'
+amd-xopA     xop     N/A  N/A    0xA   yes  no   4    1      'XMAPA'
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/avx/vex-maps.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+#  name     space   esc  mapopc mapno modrm disp  imm  opcpos pattern
+vex-map1     vex     N/A  N/A    1     var  no    var  1       'V0F'
+vex-map2     vex     N/A  N/A    2     yes  no    0    1       'V0F38'
+vex-map3     vex     N/A  N/A    3     yes  no    1    1       'V0F3A'
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/avx512f/evex-maps.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+#  name     space   esc  mapopc mapno modrm disp imm   opcpos pattern
+evex-map1    evex    N/A  N/A    1     yes  no    var  1      'V0F'
+evex-map2    evex    N/A  N/A    2     yes  no    0    1      'V0F38'
+evex-map3    evex    N/A  N/A    3     yes  no    1    1      'V0F3A'
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/evex-map5-6/evex-map5-6.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2021 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+#  name     space   esc  mapopc mapno modrm disp  imm  opcpos pattern
+evex-map5    evex    N/A  N/A    5     yes   no   0    1      'MAP5'
+evex-map6    evex    N/A  N/A    6     yes   no   0    1      'MAP6'
+

CodeVirtualizer/build/obj/dgen/all-pointer-names.txt

@@ -0,0 +1,71 @@
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/xed-pointer-width.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+1  byte     b
+2  word     w
+4  dword    l
+8  qword    q
+16 xmmword  x
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/avx/avx-pointer-width.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+32  ymmword y
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-pointer-width.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+64 zmmword z
+

CodeVirtualizer/build/obj/dgen/all-registers.txt

@@ -0,0 +1,637 @@
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/xed-regs.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+############################################################################
+# file: xed-regs.txt
+############################################################################
+
+# h is for the "h" byte regs
+
+#name class width max-enclosing-reg-64b/32b-mode regid [h]
+INVALID INVALID 0
+ERROR   INVALID 0 # used to denote errors in lookup functions
+
+RAX gpr  64  RAX     0
+EAX gpr  32  RAX/EAX 0
+AX  gpr  16  RAX/EAX 0
+AH  gpr  8   RAX/EAX 4  h
+AL  gpr  8   RAX/EAX 0
+
+RCX gpr  64  RCX     1
+ECX gpr  32  RCX/ECX 1
+CX  gpr  16  RCX/ECX 1
+CH  gpr  8   RCX/ECX 5 h
+CL  gpr  8   RCX/ECX 1
+
+RDX gpr  64  RDX       2
+EDX gpr  32  RDX/EDX   2
+DX  gpr  16  RDX/EDX   2
+DH  gpr  8   RDX/EDX   6 h
+DL  gpr  8   RDX/EDX   2
+
+RBX gpr  64  RBX       3
+EBX gpr  32  RBX/EBX   3
+BX  gpr  16  RBX/EBX   3
+BH  gpr  8   RBX/EBX   7 h
+BL  gpr  8   RBX/EBX   3
+
+RSP gpr  64  RSP       4
+ESP gpr  32  RSP/ESP   4
+SP  gpr  16  RSP/ESP   4
+SPL gpr  8   RSP/ESP   4
+
+RBP gpr  64  RBP       5
+EBP gpr  32  RBP/EBP   5
+BP  gpr  16  RBP/EBP   5
+BPL gpr  8   RBP/EBP   5
+
+RSI gpr  64  RSI       6
+ESI gpr  32  RSI/ESI   6
+SI  gpr  16  RSI/ESI   6
+SIL gpr  8   RSI/ESI   6
+
+RDI gpr  64  RDI       7
+EDI gpr  32  RDI/EDI   7
+DI  gpr  16  RDI/EDI   7
+DIL gpr  8   RDI/EDI   7
+
+
+R8  gpr  64  R8        8
+R8D gpr  32  R8/R8D    8
+R8W gpr  16  R8/R8D    8
+R8B gpr  8   R8/R8D    8
+
+R9  gpr  64  R9        9
+R9D gpr  32  R9/R9D    9
+R9W gpr  16  R9/R9D    9
+R9B gpr  8   R9/R9D    9
+
+R10  gpr 64  R10       10
+R10D gpr 32  R10/R10D  10
+R10W gpr 16  R10/R10D  10
+R10B gpr 8   R10/R10D  10
+
+R11  gpr 64  R11       11
+R11D gpr 32  R11/R11D  11
+R11W gpr 16  R11/R11D  11
+R11B gpr 8   R11/R11D  11
+
+R12  gpr 64  R12       12
+R12D gpr 32  R12/R12D  12
+R12W gpr 16  R12/R12D  12
+R12B gpr 8   R12/R12D  12
+
+R13  gpr 64  R13       13
+R13D gpr 32  R13/R13D  13
+R13W gpr 16  R13/R13D  13
+R13B gpr 8   R13/R13D  13
+
+R14  gpr 64  R14       14
+R14D gpr 32  R14/R14D  14
+R14W gpr 16  R14/R14D  14
+R14B gpr 8   R14/R14D  14
+
+R15  gpr 64  R15       15
+R15D gpr 32  R15/R15D  15
+R15W gpr 16  R15/R15D  15
+R15B gpr 8   R15/R15D  15
+
+
+RIP  ip    64  RIP
+EIP  ip    32  RIP/EIP
+IP   ip    16  RIP/EIP
+
+FLAGS   flags 16 RFLAGS/EFLAGS
+EFLAGS  flags 32 RFLAGS/EFLAGS
+RFLAGS  flags 64 RFLAGS
+
+# natural order for the seg regs. See SEG() nonterminal
+ES   sr    16 ES
+CS   sr    16 CS
+SS   sr    16 SS
+DS   sr    16 DS
+FS   sr    16 FS
+GS   sr    16 GS
+
+
+MMX0  mmx 64  MMX0  0 - mm0
+MMX1  mmx 64  MMX1  1 - mm1
+MMX2  mmx 64  MMX2  2 - mm2
+MMX3  mmx 64  MMX3  3 - mm3
+
+MMX4  mmx 64  MMX4  4 - mm4
+MMX5  mmx 64  MMX5  5 - mm5
+MMX6  mmx 64  MMX6  6 - mm6
+MMX7  mmx 64  MMX7  7 - mm7
+
+
+ST0   x87 80  ST0  0 - st(0)
+ST1   x87 80  ST1  1 - st(1)
+ST2   x87 80  ST2  2 - st(2)
+ST3   x87 80  ST3  3 - st(3)
+ST4   x87 80  ST4  4 - st(4)
+ST5   x87 80  ST5  5 - st(5)
+ST6   x87 80  ST6  6 - st(6)
+ST7   x87 80  ST7  7 - st(7)
+
+CR0 cr 32/64  CR0  0
+CR1 cr 32/64  CR1  1
+CR2 cr 32/64  CR2  2
+CR3 cr 32/64  CR3  3
+CR4 cr 32/64  CR4  4
+CR5 cr 32/64  CR5  5
+CR6 cr 32/64  CR6  6
+CR7 cr 32/64  CR7  7
+CR8 cr 32/64  CR8  8
+CR9 cr 32/64  CR9  9
+CR10 cr 32/64 CR10  10
+CR11 cr 32/64 CR11  11
+CR12 cr 32/64 CR12  12
+CR13 cr 32/64 CR13  13
+CR14 cr 32/64 CR14  14
+CR15 cr 32/64 CR15  15
+
+DR0 dr  32/64  DR0  0
+DR1 dr  32/64  DR1  1
+DR2 dr  32/64  DR2  2
+DR3 dr  32/64  DR3  3
+DR4 dr  32/64  DR4  4
+DR5 dr  32/64  DR5  5
+DR6 dr  32/64  DR6  6
+DR7 dr  32/64  DR7  7
+
+STACKPUSH   pseudo NA
+STACKPOP    pseudo NA
+GDTR        pseudo 80
+LDTR        pseudo 80
+IDTR        pseudo 80
+TR          pseudo 80
+TSC         pseudo 32
+# TSC_AUX was added in 3.10 version of AMD's manual
+TSCAUX      pseudo 32
+MSRS        pseudo NA
+
+X87CONTROL  pseudox87 16
+X87STATUS   pseudox87 16 # includes TOP field for x87 stack
+X87TAG      pseudox87 16
+X87PUSH     pseudox87 NA
+X87POP      pseudox87 NA
+X87POP2     pseudox87 NA
+
+X87OPCODE   pseudox87 11 # These 5 are not used by XED
+X87LASTCS   pseudox87 16
+X87LASTIP   pseudox87 32/64 # 16b mode is wrong
+X87LASTDS   pseudox87 16
+X87LASTDP   pseudox87 32/64 # 16b mode is wrong
+
+XCR0        xcr    64 # previously known as XFEM
+
+MXCSR       mxcsr  32
+
+# Some dummy registers for someone to play with if they ever want to
+TMP0 tmp  NA  TMP0 0
+TMP1 tmp  NA  TMP1 1
+TMP2 tmp  NA  TMP2  2
+TMP3 tmp  NA  TMP3  3
+TMP4 tmp  NA  TMP4  4
+TMP5 tmp  NA  TMP5  5
+TMP6 tmp  NA  TMP6  6
+TMP7 tmp  NA  TMP7  7
+TMP8 tmp  NA  TMP8  8
+TMP9 tmp  NA  TMP9  9
+TMP10 tmp NA  TMP10 10
+TMP11 tmp NA  TMP11 11
+TMP12 tmp NA  TMP12 12
+TMP13 tmp NA  TMP13 13
+TMP14 tmp NA  TMP14 14
+TMP15 tmp NA  TMP15 15
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/knc-kregs.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+K0 mask 16 K0 0
+K1 mask 16 K1 1
+K2 mask 16 K2 2
+K3 mask 16 K3 3
+K4 mask 16 K4 4
+K5 mask 16 K5 5
+K6 mask 16 K6 6
+K7 mask 16 K7 7
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/mpx/mpx-regs.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+BND0        bound   128 BND0        0
+BND1        bound   128 BND1        1
+BND2        bound   128 BND2        2
+BND3        bound   128 BND3        3
+BNDCFGU     bndcfg   64 BNDCFGU     0
+BNDSTATUS   bndstat  64 BNDSTATUS   0
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/cet/cet-regs.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+SSP          MSR 32/64
+IA32_U_CET   MSR NA
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/fsgsbase/fsgsbase-regs.xed.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+FSBASE  pseudo NA
+GSBASE  pseudo NA
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/avx/avx-regs.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+XMM0  xmm  128 YMM0  0
+XMM1  xmm  128 YMM1  1
+XMM2  xmm  128 YMM2  2
+XMM3  xmm  128 YMM3  3
+
+XMM4  xmm  128 YMM4  4
+XMM5  xmm  128 YMM5  5
+XMM6  xmm  128 YMM6  6
+XMM7  xmm  128 YMM7  7
+
+XMM8  xmm  128 YMM8  8
+XMM9  xmm  128 YMM9  9
+XMM10 xmm  128 YMM10 10
+XMM11 xmm  128 YMM11 11
+
+XMM12 xmm  128 YMM12 12
+XMM13 xmm  128 YMM13 13
+XMM14 xmm  128 YMM14 14
+XMM15 xmm  128 YMM15 15
+
+YMM0 ymm  256   YMM0   0
+YMM1 ymm  256   YMM1   1
+YMM2 ymm  256   YMM2   2
+YMM3 ymm  256   YMM3   3
+YMM4 ymm  256   YMM4   4
+YMM5 ymm  256   YMM5   5
+YMM6 ymm  256   YMM6   6
+YMM7 ymm  256   YMM7   7
+YMM8 ymm  256   YMM8   8
+YMM9 ymm  256   YMM9   9
+YMM10 ymm 256   YMM10 10
+YMM11 ymm 256   YMM11 11
+YMM12 ymm 256   YMM12 12
+YMM13 ymm 256   YMM13 13
+YMM14 ymm 256   YMM14 14
+YMM15 ymm 256   YMM15 15
+
+
+
+
+
+
+
+###FILE: C:\$Fanta\IntelXED\xed\datafiles\knc\lrb2-regs.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+ZMM0 zmm 512 ZMM0  0
+ZMM1 zmm 512 ZMM1  1
+ZMM2 zmm 512 ZMM2  2
+ZMM3 zmm 512 ZMM3  3
+ZMM4 zmm 512 ZMM4  4
+ZMM5 zmm 512 ZMM5  5
+ZMM6 zmm 512 ZMM6  6
+ZMM7 zmm 512 ZMM7  7
+ZMM8 zmm 512 ZMM8  8
+ZMM9 zmm 512 ZMM9  9
+ZMM10 zmm 512 ZMM10 10
+ZMM11 zmm 512 ZMM11 11
+ZMM12 zmm 512 ZMM12 12
+ZMM13 zmm 512 ZMM13 13
+ZMM14 zmm 512 ZMM14 14
+ZMM15 zmm 512 ZMM15 15
+ZMM16 zmm 512 ZMM16 16
+ZMM17 zmm 512 ZMM17 17
+ZMM18 zmm 512 ZMM18 18
+ZMM19 zmm 512 ZMM19 19
+ZMM20 zmm 512 ZMM20 20
+ZMM21 zmm 512 ZMM21 21
+ZMM22 zmm 512 ZMM22 22
+ZMM23 zmm 512 ZMM23 23
+ZMM24 zmm 512 ZMM24 24
+ZMM25 zmm 512 ZMM25 25
+ZMM26 zmm 512 ZMM26 26
+ZMM27 zmm 512 ZMM27 27
+ZMM28 zmm 512 ZMM28 28
+ZMM29 zmm 512 ZMM29 29
+ZMM30 zmm 512 ZMM30 30
+ZMM31 zmm 512 ZMM31 31
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-regs.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+XMM0  xmm  128 ZMM0  0
+XMM1  xmm  128 ZMM1  1
+XMM2  xmm  128 ZMM2  2
+XMM3  xmm  128 ZMM3  3
+XMM4  xmm  128 ZMM4  4
+XMM5  xmm  128 ZMM5  5
+XMM6  xmm  128 ZMM6  6
+XMM7  xmm  128 ZMM7  7
+
+XMM8  xmm  128 ZMM8  8
+XMM9  xmm  128 ZMM9  9
+XMM10 xmm  128 ZMM10 10
+XMM11 xmm  128 ZMM11 11
+XMM12 xmm  128 ZMM12 12
+XMM13 xmm  128 ZMM13 13
+XMM14 xmm  128 ZMM14 14
+XMM15 xmm  128 ZMM15 15
+
+XMM16 xmm 128  ZMM16 16
+XMM17 xmm 128  ZMM17 17
+XMM18 xmm 128  ZMM18 18
+XMM19 xmm 128  ZMM19 19
+XMM20 xmm 128  ZMM20 20
+XMM21 xmm 128  ZMM21 21
+XMM22 xmm 128  ZMM22 22
+XMM23 xmm 128  ZMM23 23
+XMM24 xmm 128  ZMM24 24
+XMM25 xmm 128  ZMM25 25
+XMM26 xmm 128  ZMM26 26
+XMM27 xmm 128  ZMM27 27
+XMM28 xmm 128  ZMM28 28
+XMM29 xmm 128  ZMM29 29
+XMM30 xmm 128  ZMM30 30
+XMM31 xmm 128  ZMM31 31
+
+YMM0 ymm  256   ZMM0   0
+YMM1 ymm  256   ZMM1   1
+YMM2 ymm  256   ZMM2   2
+YMM3 ymm  256   ZMM3   3
+YMM4 ymm  256   ZMM4   4
+YMM5 ymm  256   ZMM5   5
+YMM6 ymm  256   ZMM6   6
+YMM7 ymm  256   ZMM7   7
+YMM8 ymm  256   ZMM8   8
+YMM9 ymm  256   ZMM9   9
+YMM10 ymm 256   ZMM10 10
+YMM11 ymm 256   ZMM11 11
+YMM12 ymm 256   ZMM12 12
+YMM13 ymm 256   ZMM13 13
+YMM14 ymm 256   ZMM14 14
+YMM15 ymm 256   ZMM15 15
+
+YMM16 ymm 256  ZMM16 16
+YMM17 ymm 256  ZMM17 17
+YMM18 ymm 256  ZMM18 18
+YMM19 ymm 256  ZMM19 19
+YMM20 ymm 256  ZMM20 20
+YMM21 ymm 256  ZMM21 21
+YMM22 ymm 256  ZMM22 22
+YMM23 ymm 256  ZMM23 23
+YMM24 ymm 256  ZMM24 24
+YMM25 ymm 256  ZMM25 25
+YMM26 ymm 256  ZMM26 26
+YMM27 ymm 256  ZMM27 27
+YMM28 ymm 256  ZMM28 28
+YMM29 ymm 256  ZMM29 29
+YMM30 ymm 256  ZMM30 30
+YMM31 ymm 256  ZMM31 31
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-kregs.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+K0 mask 64 K0 0
+K1 mask 64 K1 1
+K2 mask 64 K2 2
+K3 mask 64 K3 3
+K4 mask 64 K4 4
+K5 mask 64 K5 5
+K6 mask 64 K6 6
+K7 mask 64 K7 7
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/uintr/uintr-regs.xed.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2020 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+UIF UIF  1
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/amx-spr/amx-regs.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2020 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+# 1KB = 8192 bits
+
+TMM0  treg 8192 TMM0  0
+TMM1  treg 8192 TMM1  1
+TMM2  treg 8192 TMM2  2
+TMM3  treg 8192 TMM3  3
+TMM4  treg 8192 TMM4  4
+TMM5  treg 8192 TMM5  5
+TMM6  treg 8192 TMM6  6
+TMM7  treg 8192 TMM7  7
+
+
+TILECONFIG  pseudo 512

CodeVirtualizer/build/obj/dgen/all-state.txt

@@ -0,0 +1,370 @@
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/xed-state-bits.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+###########################################################################
+## file: xed-state-bits.txt
+###########################################################################
+
+# These are just shorthand for some conditions or captures.
+# Simple macro replacement
+#all_modes             ALL_MODES=1
+not64                  MODE!=2
+mode64                 MODE=2
+mode32                 MODE=1
+mode16                 MODE=0
+
+# effective addressing mode
+eanot16               EASZ!=1
+eamode16              EASZ=1
+eamode32              EASZ=2
+eamode64              EASZ=3
+
+# stack addressing mode
+smode16               SMODE=0
+smode32               SMODE=1
+smode64               SMODE=2
+
+eosz8                 EOSZ=0
+eosz16                EOSZ=1
+not_eosz16            EOSZ!=1
+eosz32                EOSZ=2
+eosz64                EOSZ=3
+eosznot64             EOSZ!=3
+
+
+# for OD expansion in graph partitioning FIXME
+mod0                MOD=0
+mod1                MOD=1
+mod2                MOD=2
+mod3                MOD=3
+
+rex_reqd                REX=1
+no_rex                  REX=0
+reset_rex              REX=0 REXW=0 REXB=0 REXR=0 REXX=0
+
+rexb_prefix             REXB=1
+rexx_prefix             REXX=1
+rexr_prefix             REXR=1
+
+# 2013-09-25 FIXME: we were inconsistent. some things use W0/W1, some
+# use the more verbose form. We should converge on W0/W1.
+
+rexw_prefix            REXW=1
+norexw_prefix          REXW=0
+W1                     REXW=1
+W0                     REXW=0
+
+norexb_prefix             REXB=0
+norexx_prefix             REXX=0
+norexr_prefix             REXR=0
+############################################################3333
+f2_prefix              REP=2  # REPNZ, REPNE
+f3_prefix              REP=3  # REPZ,  REPE
+repne                  REP=2
+repe                   REP=3
+norep                  REP=0
+66_prefix              OSZ=1
+nof3_prefix            REP!=3
+no66_prefix            OSZ=0
+not_refining           REP=0
+refining_f2            REP=2
+refining_f3            REP=3
+not_refining_f3        REP!=3 # for pause vs xchg
+no_refining_prefix     REP=0 OSZ=0  # critical:REP must  be first for decoding partitioning
+osz_refining_prefix    REP=0 OSZ=1
+f2_refining_prefix     REP=2
+f3_refining_prefix     REP=3
+
+no67_prefix             ASZ=0
+67_prefix               ASZ=1
+
+lock_prefix             LOCK=1
+nolock_prefix           LOCK=0
+
+default_ds              DEFAULT_SEG=0
+default_ss              DEFAULT_SEG=1
+default_es              DEFAULT_SEG=2 # for string ops
+no_seg_prefix           SEG_OVD=0
+some_seg_prefix         SEG_OVD!=0
+cs_prefix               SEG_OVD=1
+ds_prefix               SEG_OVD=2
+es_prefix               SEG_OVD=3
+fs_prefix               SEG_OVD=4
+gs_prefix               SEG_OVD=5
+ss_prefix               SEG_OVD=6
+
+# default (or not) to 64b width in 64b mode
+nrmw                   DF64=0
+df64                   DF64=1
+
+# default choice for encoder when there are multiple choices for a
+# nonterminal. The ISA is not uniquely determined for encoding so we
+# must express preferences for certain forms!
+enc                    ENCODER_PREFERRED=1
+
+# for the legacy prefix encoder, tell it to keep trying rules and not
+# return after successfully finding one that applies
+no_return              NO_RETURN=1
+
+# indicate an encoding or decoding error occurred
+error                  ERROR=XED_ERROR_GENERAL_ERROR
+
+# dummy constraint which always satisfies
+true                   DUMMY=0
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/amd/amdxop/xop-state-bits.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+XMAP8  MAP=8
+XMAP9  MAP=9
+XMAPA  MAP=10
+
+XOPV   VEXVALID=3
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/avx/avx-state-bits.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+VL128  VL=0
+VL256  VL=1
+
+VV1    VEXVALID=1
+VV0    VEXVALID=0
+
+VMAP0  MAP=0
+V0F    MAP=1
+V0F38  MAP=2
+V0F3A  MAP=3
+
+VNP    VEX_PREFIX=0
+V66    VEX_PREFIX=1
+VF2    VEX_PREFIX=2
+VF3    VEX_PREFIX=3
+
+# No VEX-SPECIFIED-REGISTER
+NOVSR  VEXDEST3=0b1 VEXDEST210=0b111
+
+EMX_BROADCAST_1TO4_32  BCAST=10   #     128
+EMX_BROADCAST_1TO4_64  BCAST=13   #     256
+EMX_BROADCAST_1TO8_32  BCAST=3    #     256
+EMX_BROADCAST_2TO4_64  BCAST=20   #     256
+
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/hswavx/hsw-state-bits.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+
+EMX_BROADCAST_1TO2_64  BCAST=11   #         128
+EMX_BROADCAST_1TO8_16   BCAST=14  #         128
+EMX_BROADCAST_1TO16_16  BCAST=15  #     256
+EMX_BROADCAST_1TO16_8   BCAST=17  #         128
+EMX_BROADCAST_1TO32_8   BCAST=18  #     256
+
+
+
+
+###FILE: C:\$Fanta\IntelXED\xed\datafiles\knc\uisa-state-bits.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+VL512 VL=2
+VLBAD VL=3 # unused VL setting to cause things not to decode.
+
+# KNC EVEX is KVV
+#
+KVV   VEXVALID=4
+
+# No VEX-SPECIFIED-REGISTER
+NOEVSR  VEXDEST3=0b1 VEXDEST210=0b111 VEXDEST4=0b0
+
+# No VEX-SPECIFIED-REGISTER for GATHERS/SCATTERS -- index reg 5th bit is VEXTDEST4
+NO_SPARSE_EVSR  VEXDEST3=0b1 VEXDEST210=0b111
+
+# These conflict w/another chip ... so if you ever build a combo
+#  model you'll have to remove these somehow.
+#
+EMX_BROADCAST_1TO16_32 BCAST=1      # 512
+EMX_BROADCAST_4TO16_32 BCAST=2      # 512
+EMX_BROADCAST_1TO8_64  BCAST=5      # 512
+EMX_BROADCAST_4TO8_64  BCAST=6      # 512
+
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-state-bits.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+EVV VEXVALID=2
+
+EMX_BROADCAST_1TO16_32 BCAST=1      # 512
+EMX_BROADCAST_4TO16_32 BCAST=2      # 512
+EMX_BROADCAST_1TO8_64  BCAST=5      # 512
+EMX_BROADCAST_4TO8_64  BCAST=6      # 512
+EMX_BROADCAST_2TO16_32 BCAST=7      # 512
+EMX_BROADCAST_2TO8_64  BCAST=8      # 512
+EMX_BROADCAST_8TO16_32 BCAST=9      # 512
+EMX_BROADCAST_1TO32_16  BCAST=16  # 512
+EMX_BROADCAST_1TO64_8   BCAST=19  # 512
+# these do not show up on earlier processors
+EMX_BROADCAST_4TO8_32  BCAST=4      #     256
+EMX_BROADCAST_2TO4_32  BCAST=12   #         128
+EMX_BROADCAST_2TO8_32  BCAST=21   #     256
+EMX_BROADCAST_1TO2_32  BCAST=22   #     128
+
+# REXRR is EVEX.RR stored inverted.  EVEX.RR=0 (or REXRR=1) implies
+# #UD in 64b mode and gpr encoded in modrm.reg.
+EVEXRR_ONE REXRR=0
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/avx512-skx/skx-state-bits.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+EMX_BROADCAST_1TO2_8   BCAST=23
+EMX_BROADCAST_1TO4_8   BCAST=24
+EMX_BROADCAST_1TO8_8   BCAST=25
+
+EMX_BROADCAST_1TO2_16   BCAST=26
+EMX_BROADCAST_1TO4_16   BCAST=27
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/avx512-fp16/state-bits.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2021 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+MAP5   MAP=5
+MAP6   MAP=6
+

CodeVirtualizer/build/obj/dgen/all-widths.txt

@@ -0,0 +1,356 @@
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/xed-operand-width.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+# @file xed-operand-width.txt
+
+# the default xtype can be overridden in each operand using a ":" followed by an explicit xtype
+##
+## the width defaults to bytes. But it can be bits if it has a "bits" suffix
+##
+#
+#            default
+#oc2-code    XTYPE     width16 width32 width64 (if only one width is shown, it is for all widths)
+#
+INVALID     INVALID   0
+#
+#  3 strange things:
+#
+asz         int       2 4 8  # varies with the effective address width
+ssz         int       2 4 8  # varies with the stack address width
+pseudo      struct    0      # these are for unusual registers
+pseudox87   struct    0      # these are for unusual registers
+#
+#
+#
+#1          i1        1 # FIXME: this is not used...
+a16         i16       4  # bound
+a32         i32       8  # bound
+b           u8        1
+d           i32       4
+#
+i8          i8        1
+u8          u8        1
+i16         i16       2
+u16         u16       2
+i32         i32       4
+u32         u32       4
+i64         i64       8
+u64         u64       8
+f16         f16       2  # IVB converts
+f32         f32       4
+f64         f64       8
+#
+dq          i32      16
+#
+xub        u8        16
+xuw        u16       16
+xud        u32       16
+xuq        u64       16
+x128       u128      16
+#
+xb          i8       16
+xw          i16      16
+xd          i32      16
+xq          i64      16
+
+# relocated from AVX512 for use with other instructions
+zb         i8       512bits
+zw         i16      512bits
+zd         i32      512bits
+zq         i64      512bits
+
+
+mb          i8        8
+mw          i16       8
+md          i32       8
+mq          i64       8
+#
+m64int      i64       8
+m64real     f64       8
+mem108      struct  108
+mem14       struct   14
+mem16       struct    2
+mem16int    i16       2
+mem28       struct   28
+mem32int    i32       4
+mem32real   f32       4
+mem80dec    b80      10
+mem80real   f80      10
+f80         f80      10 # for X87 registers:
+mem94       struct   94
+mfpxenv     struct  512
+mxsave      struct  576
+mprefetch   i64      64 # made up width for prefetches
+p           struct    4    6   6
+p2          struct    4    6  10
+pd          f64      16
+ps          f32      16
+pi          i32       8
+q           i64       8
+s           struct    6    6  10
+s64         struct   10
+sd          f64       8
+si          i32       4
+ss          f32       4
+v           int       2    4   8
+y           int       4    4   8
+w           i16       2
+z           int       2    4   4
+spw8        int      16   32   0  # varies (64b invalid)         STACK POINTER WIDTH
+spw         int       2    4   8  # varies                       STACK POINTER WIDTH
+spw5        int      10   20  40  # varies (IRET approx)         STACK POINTER WIDTH
+spw3        int       6   12  24  # varies (IRET approx)         STACK POINTER WIDTH
+spw2        int       4    8  16  # varies (FAR call/ret approx) STACK POINTER WIDTH
+i1          int   1bits
+i2          int   2bits
+i3          int   3bits
+i4          int   4bits
+i5          int   5bits
+i6          int   6bits
+i7          int   7bits
+i8          int   8bits
+var         var      0  # relies on NELEM * ELEMENT_SIZE to get the number of bits.
+bnd32       u32     12  # MPX 32b BNDLDX/BNDSTX memop 3x4B
+bnd64       u64     24  # MPX 32b BNDLDX/BNDSTX memop 3x8B
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/via/xed-via-operand-widths.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+#oc2-code    XTYPE     widths...
+pmmsz16     struct       14
+pmmsz32     struct       24
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/avx/avx-operand-width.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+#
+#code      XTYPE     width16 width32 width64 (if only one width is presented, it is for all widths)
+#
+qq          i32     32
+yub         u8      32
+yuw         u16     32
+yud         u32     32
+yuq         u64     32
+y128        u128    32
+
+yb          i8      32
+yw          i16     32
+yd          i32     32
+yq          i64     32
+
+yps         f32     32
+ypd         f64     32
+
+
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/avx512-bf16/bf16-opnd-widths.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+#
+#code      XTYPE     width16 width32 width64 (if only one width is presented, it is for all widths)
+#
+
+zbf16      bf16      512bits
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-operand-widths.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2019 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+#
+#code      XTYPE     width16 width32 width64 (if only one width is presented, it is for all widths)
+#
+vv          var      0 # relies on nelem * elem_size
+zv          var      0 # relies on nelem * elem_size
+
+wrd         u16     16bits
+mskw        i1      64bits # FIXME: bad name
+
+zmskw       i1      512bits
+
+zf32       f32      512bits
+zf64       f64      512bits
+
+zub         u8       512bits
+zuw         u16      512bits
+zud         u32      512bits
+zuq         u64      512bits
+
+# alternative names...
+zi8         i8       512bits
+zi16        i16      512bits
+zi32        i32      512bits
+zi64        i64      512bits
+
+zu8         u8       512bits
+zu16        u16      512bits
+zu32        u32      512bits
+zu64        u64      512bits
+zu128       u128     512bits
+
+
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/keylocker/widths.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2020 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+
+m384 struct  48 # bytes
+m512 struct  64 # bytes
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/amx-spr/amx-operand-widths.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2020 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+#
+#code      XTYPE     width16 width32 width64 (if only one width is presented, it is for all widths)
+#
+
+ptr         u8      0
+tmemrow     u8      0
+tmemcol     u8      0
+
+# tiles are variable width based on palette so hard to really specify an overall width.
+tv          u8      0
+
+
+###FILE: C:/$Fanta/IntelXED/xed/datafiles/avx512-fp16/widths.txt
+
+#BEGIN_LEGAL
+#
+#Copyright (c) 2021 Intel Corporation
+#
+#  Licensed under the Apache License, Version 2.0 (the "License");
+#  you may not use this file except in compliance with the License.
+#  You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+#  Unless required by applicable law or agreed to in writing, software
+#  distributed under the License is distributed on an "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#  See the License for the specific language governing permissions and
+#  limitations under the License.
+#
+#END_LEGAL
+#
+
+zf16       f16      512bits
+z2f16      2f16     512bits

CodeVirtualizer/build/obj/ild_debug.txt

@@ -0,0 +1,229 @@
+state_space:
+ {'MODE': [0, 1, 2], 'EASZ': [1, 2, 3], 'SMODE': [0, 1, 2], 'EOSZ': [0, 1, 2, 3], 'MOD': [0, 1, 2, 3], 'REX': [0, 1], 'REXW': [0, 1], 'REXB': [0, 1], 'REXR': [0, 1], 'REXX': [0, 1], 'REP': [0, 2, 3], 'OSZ': [0, 1], 'ASZ': [0, 1], 'LOCK': [0, 1], 'DEFAULT_SEG': [0, 1, 2], 'SEG_OVD': [0, 1, 2, 3, 4, 5, 6], 'DF64': [0, 1], 'ENCODER_PREFERRED': [1], 'NO_RETURN': [1], 'DUMMY': [0], 'MAP': [0, 1, 2, 3, 5, 6, 8, 9, 10], 'VEXVALID': [0, 1, 2, 3, 4], 'VL': [0, 1, 2, 3], 'VEX_PREFIX': [0, 1, 2, 3], 'VEXDEST3': [1], 'VEXDEST210': [7], 'BCAST': [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27], 'VEXDEST4': [0], 'REXRR': [0]}EOSZ NTS:
+IMMUNE66_LOOP64
+IMMUNE66
+DF64
+IGNORE66
+IMMUNE_REXW
+CR_WIDTH
+FORCE64
+OSZ_NONTERM
+REFINING66
+
+EASZ NTS:
+ASZ_NONTERM
+
+IMMNTS:
+UIMM16
+UIMM32
+UIMMv
+SE_IMM8
+SIMMz
+UIMM8
+SIMM8
+
+DISP NTS:
+MEMDISPv
+MEMDISP16
+MEMDISP32
+MEMDISP
+MEMDISP8
+SIB_BASE0
+
+BRDISP NTS:
+BRDISP32
+BRDISPz
+BRDISP8
+
+NESTED NTS:
+GPRz_B
+VSIB_YMM
+VGPRy_N
+SIB
+MODRM32
+AVX_SPLITTER
+XMM_B3
+UISA_VSIB_ZMM
+XMM_N
+YMM_R3
+VGPR32_N
+ZMM_R3
+UISA_VMODRM_YMM
+FINAL_SSEG
+GPRy_B
+ISA
+YMM_R
+VGPRy_R
+GPRz_R
+XMM_R3
+XMM_R
+MASK_N
+MODRM16
+A_GPR_R
+VGPRy_B
+VSIB_XMM
+A_GPR_B
+XMM_SE
+YMM_N
+VGPR32_B
+GPRv_R
+VMODRM_YMM
+UISA_VMODRM_XMM
+YMM_B3
+YMM_B
+VGPR32_R
+FINAL_DSEG
+FINAL_DSEG1
+MODRM
+XMM_B
+EVEX_SPLITTER
+UISA_VSIB_BASE
+VSIB_BASE
+ZMM_N3
+UISA_VSIB_XMM
+YMM_N3
+GPRv_B
+XMM_N3
+UISA_VMODRM_ZMM
+GPRy_R
+VMODRM_XMM
+UISA_VSIB_YMM
+MODRM64alt32
+YMM_SE
+GPRv_SB
+ZMM_B3
+SIB_BASE0
+ALL_STATE_SPACE:
+MODE: {0: True, 1: True, 2: True}
+MODE_FIRST_PREFIX: {0: True, 1: True}
+REP: {0: True, 3: True, 2: True}
+HINT: {0: True, 1: True, 2: True, 3: True, 4: True, 5: True}
+EASZ: {1: True, 2: True, 3: True}
+SMODE: {0: True, 1: True, 2: True}
+EOSZ: {1: True, 2: True, 3: True}
+REG: {0: True, 1: True, 2: True, 3: True, 4: True, 5: True, 6: True, 7: True}
+RM: {0: True, 1: True, 2: True, 3: True, 4: True, 5: True, 6: True, 7: True}
+REXR: {0: True, 1: True}
+REXB: {0: True, 1: True}
+SRM: {0: True, 1: True, 2: True, 3: True, 4: True, 5: True, 6: True, 7: True}
+REXX: {0: True, 1: True}
+SIBINDEX: {0: True, 1: True, 2: True, 3: True, 4: True, 5: True, 6: True, 7: True}
+SEG_OVD: {0: True, 1: True, 2: True, 3: True, 4: True, 5: True, 6: True}
+REX: {0: True, 1: True}
+OSZ: {0: True, 1: True}
+REXW: {0: True, 1: True}
+ASZ: {0: True, 1: True}
+NEED_MEMDISP: {0: True, 8: True, 16: True, 32: True}
+MOD: {0: True, 1: True, 2: True, 3: True}
+SIBSCALE: {0: True, 1: True, 2: True, 3: True}
+SIBBASE: {0: True, 1: True, 2: True, 3: True, 4: True, 5: True, 6: True, 7: True}
+VEXVALID: {3: True, 0: True, 1: True, 2: True}
+ESRC: {0: True, 1: True, 2: True, 3: True, 4: True, 5: True, 6: True, 7: True, 8: True, 9: True, 10: True, 11: True, 12: True, 13: True, 14: True, 15: True}
+VEXDEST210: {7: True, 6: True, 5: True, 4: True, 3: True, 2: True, 1: True, 0: True}
+VEXDEST3: {1: True, 0: True}
+VL: {0: True, 1: True, 2: True, 3: True}
+LLRC: {0: True, 1: True, 2: True, 3: True}
+BCRC: {1: True, 0: True}
+ELEMENT_SIZE: {64: True, 1: True, 2: True, 4: True, 8: True, 16: True, 32: True, 128: True, 256: True, 512: True}
+VEXDEST4: {0: True, 1: True}
+MASK: {0: True, 1: True, 2: True, 3: True, 4: True, 5: True, 6: True, 7: True}
+REXRR: {0: True, 1: True}
+LOCK: {1: True, 0: True}
+P4: {0: True, 1: True}
+MPXMODE: {1: True, 0: True}
+CET: {0: True, 1: True}
+CLDEMOTE: {0: True, 1: True}
+MODEP5: {1: True, 0: True}
+MODE_SHORT_UD0: {1: True, 0: True}
+TZCNT: {1: True, 0: True}
+LZCNT: {1: True, 0: True}
+WBNOINVD: {0: True, 1: True}
+VEX_PREFIX: {0: True, 1: True, 2: True, 3: True}
+MAP: {8: True, 9: True, 10: True, 3: True, 1: True, 2: True, 5: True, 6: True}
+ZEROING: {0: True, 1: True}
+ALL_OPS_WIDTHS:
+MODE: 2
+MODE_FIRST_PREFIX: 1
+REP: 2
+HINT: 3
+EASZ: 2
+SMODE: 2
+EOSZ: 2
+REG: 3
+RM: 3
+REXR: 1
+REXB: 1
+SRM: 3
+REXX: 1
+SIBINDEX: 3
+SEG_OVD: 3
+REX: 1
+OSZ: 1
+REXW: 1
+ASZ: 1
+NEED_MEMDISP: 6
+MOD: 2
+SIBSCALE: 2
+SIBBASE: 3
+VEXVALID: 3
+ESRC: 4
+VEXDEST210: 3
+VEXDEST3: 1
+VL: 2
+LLRC: 2
+BCRC: 1
+ELEMENT_SIZE: 9
+VEXDEST4: 1
+MASK: 3
+REXRR: 1
+LOCK: 1
+P4: 1
+MPXMODE: 1
+CET: 1
+CLDEMOTE: 1
+MODEP5: 1
+MODE_SHORT_UD0: 1
+TZCNT: 1
+LZCNT: 1
+WBNOINVD: 1
+VEX_PREFIX: 2
+MAP: 4
+ZEROING: 1
+MOD3: 1
+VEXDEST210_7: 1
+RM4: 1
+MASK_NOT0: 1
+MASK_ZERO: 1
+UIMM0: 8
+incomplete opcode for iclass POP, pttrn 0b0101_1 SRM[rrr] DF64()
+Expanding opcode for POP
+incomplete opcode for iclass INC, pttrn 0b0100_0 SRM[rrr] not64
+Expanding opcode for INC
+incomplete opcode for iclass DEC, pttrn 0b0100_1 SRM[rrr] not64
+Expanding opcode for DEC
+incomplete opcode for iclass PUSH, pttrn 0b0101_0 SRM[rrr] DF64()
+Expanding opcode for PUSH
+incomplete opcode for iclass MOV, pttrn 0b1011_0 SRM[rrr] UIMM8()
+Expanding opcode for MOV
+incomplete opcode for iclass MOV, pttrn 0b1011_1 SRM[rrr] UIMMv()
+Expanding opcode for MOV
+incomplete opcode for iclass NOP, pttrn 0b1001_0 SRM[0b000] SRM=0  not_refining_f3 norexb_prefix
+incomplete opcode for iclass NOP, pttrn 0b1001_0 SRM[0b000] SRM=0  refining_f3 P4=0
+incomplete opcode for iclass XCHG, pttrn 0b1001_0 SRM[rrr] SRM!=0
+Expanding opcode for XCHG
+incomplete opcode for iclass XCHG, pttrn 0b1001_0 SRM[rrr] SRM=0 not_refining_f3 rexb_prefix
+Expanding opcode for XCHG
+incomplete opcode for iclass PAUSE, pttrn 0b1001_0 SRM[0b000] SRM=0  refining_f3 P4=1
+incomplete opcode for iclass BSWAP, pttrn 0x0F 0b1100_1 SRM[rrr]
+Expanding opcode for BSWAP
+EOSZ SEQS: [['OSZ_NONTERM', 'REFINING66'], ['OSZ_NONTERM', 'DF64', 'FORCE64'], ['OSZ_NONTERM', 'IGNORE66'], ['OSZ_NONTERM', 'REFINING66', 'CR_WIDTH'], ['OSZ_NONTERM', 'DF64', 'IMMUNE66_LOOP64'], ['OSZ_NONTERM', 'CR_WIDTH'], ['OSZ_NONTERM'], ['OSZ_NONTERM', 'IMMUNE_REXW'], ['OSZ_NONTERM', 'IMMUNE66'], ['OSZ_NONTERM', 'DF64'], ['OSZ_NONTERM', 'FORCE64']]
+EASZ SEQS: [['ASZ_NONTERM']]
+IMM SEQS: [['SIMMz'], ['SIMM8'], ['UIMM16', 'UIMM8_1'], ['UIMMv'], ['SE_IMM8'], ['UIMM32'], [], ['UIMM16'], ['UIMM8', 'UIMM8_1'], ['UIMM8']]
+DISP SEQS: [['MEMDISPv'], ['BRDISP32'], ['BRDISPz'], [], ['BRDISP8']]
+DISP NTs: ['MEMDISPv']
+BRDISP NTs: ['BRDISP32', 'BRDISPz', 'BRDISP8']
+vv0 cnames: {'MOD3', 'MODE_SHORT_UD0', 'OSZ', 'SRM', 'CET', 'REP', 'MOD', 'P4', 'MODEP5', 'WBNOINVD', 'EASZ', 'RM', 'MPXMODE', 'CLDEMOTE', 'MODE', 'LOCK', 'LZCNT', 'REG', 'REXB', 'TZCNT', 'REXW'}
+vv1 cnames: {'EASZ', 'RM', 'MODE', 'MOD3', 'VL', 'VEXDEST3', 'REG', 'VEX_PREFIX', 'VEXDEST210_7', 'REXW', 'RM4'}
+vv2 cnames: {'REXRR', 'ZEROING', 'MOD3', 'VL', 'VEXDEST210_7', 'VEXDEST4', 'EASZ', 'BCRC', 'MODE', 'MASK_ZERO', 'VEXDEST3', 'REG', 'VEX_PREFIX', 'REXW', 'RM4'}
+vv3 cnames: {'MODE', 'MOD3', 'VL', 'VEXDEST3', 'REG', 'VEX_PREFIX', 'VEXDEST210_7', 'REXW'}
+all cnames: {'REXRR', 'ZEROING', 'VL', 'MODE_SHORT_UD0', 'SRM', 'CET', 'VEXDEST210_7', 'VEXDEST4', 'WBNOINVD', 'RM', 'BCRC', 'MASK_ZERO', 'LOCK', 'LZCNT', 'REG', 'REXB', 'MODEP5', 'RM4', 'MOD3', 'OSZ', 'REP', 'MOD', 'P4', 'EASZ', 'MPXMODE', 'CLDEMOTE', 'MODE', 'VEXDEST3', 'VEX_PREFIX', 'TZCNT', 'REXW'}

CodeVirtualizer/build/obj/ild_easz_debug.txt

@@ -0,0 +1,36 @@
+/// @file ild_easz_debug.txt
+
+// This file was automatically generated.
+// Do not edit this file.
+
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+/*Array declaration*/
+xed_bits_t xed_lookup_ASZ_NONTERM_EASZ[3][2];
+
+/*Array initialization*/
+void xed_lookup_function_init_ASZ_NONTERM_EASZ(void)
+{
+xed_lookup_ASZ_NONTERM_EASZ[0][0]=0x1;
+xed_lookup_ASZ_NONTERM_EASZ[0][1]=0x2;
+xed_lookup_ASZ_NONTERM_EASZ[1][0]=0x2;
+xed_lookup_ASZ_NONTERM_EASZ[1][1]=0x1;
+xed_lookup_ASZ_NONTERM_EASZ[2][0]=0x3;
+xed_lookup_ASZ_NONTERM_EASZ[2][1]=0x2;
+}

CodeVirtualizer/build/obj/ild_easz_debug_header.txt

@@ -0,0 +1,37 @@
+/// @file ild_easz_debug_header.txt
+
+// This file was automatically generated.
+// Do not edit this file.
+
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+void xed_lookup_function_init_ASZ_NONTERM_EASZ(void);
+
+/*Array declaration*/
+extern xed_bits_t xed_lookup_ASZ_NONTERM_EASZ[3][2];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_ASZ_NONTERM_EASZ(xed_bits_t arg_MODE, xed_bits_t arg_ASZ)
+{
+xed_bits_t _v;
+xed_assert(arg_MODE>=0 && arg_MODE<3);
+xed_assert(arg_ASZ>=0 && arg_ASZ<2);
+_v=xed_lookup_ASZ_NONTERM_EASZ[arg_MODE][arg_ASZ];
+return _v;
+}

CodeVirtualizer/build/obj/ild_eosz_debug.txt

@@ -0,0 +1,113 @@
+/// @file ild_eosz_debug.txt
+
+// This file was automatically generated.
+// Do not edit this file.
+
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+/*Array declaration*/
+xed_bits_t xed_lookup_IMMUNE66_EOSZ[3][2];
+
+/*Array initialization*/
+void xed_lookup_function_init_IMMUNE66_EOSZ(void)
+{
+xed_lookup_IMMUNE66_EOSZ[0][0]=0x2;
+xed_lookup_IMMUNE66_EOSZ[0][1]=0x2;
+xed_lookup_IMMUNE66_EOSZ[1][0]=0x2;
+xed_lookup_IMMUNE66_EOSZ[1][1]=0x2;
+xed_lookup_IMMUNE66_EOSZ[2][0]=0x2;
+xed_lookup_IMMUNE66_EOSZ[2][1]=0x3;
+}
+/*Array declaration*/
+xed_bits_t xed_lookup_DF64_EOSZ[3][2][2];
+
+/*Array initialization*/
+void xed_lookup_function_init_DF64_EOSZ(void)
+{
+xed_lookup_DF64_EOSZ[2][1][0]=0x1;
+xed_lookup_DF64_EOSZ[2][0][0]=0x3;
+xed_lookup_DF64_EOSZ[2][1][1]=0x3;
+xed_lookup_DF64_EOSZ[2][0][1]=0x3;
+}
+/*Array declaration*/
+xed_bits_t xed_lookup_IGNORE66_EOSZ[3][2];
+
+/*Array initialization*/
+void xed_lookup_function_init_IGNORE66_EOSZ(void)
+{
+xed_lookup_IGNORE66_EOSZ[0][0]=0x1;
+xed_lookup_IGNORE66_EOSZ[0][1]=0x1;
+xed_lookup_IGNORE66_EOSZ[1][0]=0x2;
+xed_lookup_IGNORE66_EOSZ[1][1]=0x2;
+xed_lookup_IGNORE66_EOSZ[2][0]=0x2;
+xed_lookup_IGNORE66_EOSZ[2][1]=0x3;
+}
+/*Array declaration*/
+xed_bits_t xed_lookup_IMMUNE_REXW_EOSZ[3][2][2];
+
+/*Array initialization*/
+void xed_lookup_function_init_IMMUNE_REXW_EOSZ(void)
+{
+xed_lookup_IMMUNE_REXW_EOSZ[2][0][1]=0x2;
+xed_lookup_IMMUNE_REXW_EOSZ[2][0][0]=0x2;
+xed_lookup_IMMUNE_REXW_EOSZ[2][1][1]=0x2;
+xed_lookup_IMMUNE_REXW_EOSZ[2][1][0]=0x1;
+}
+/*Array declaration*/
+xed_bits_t xed_lookup_CR_WIDTH_EOSZ[3];
+
+/*Array initialization*/
+void xed_lookup_function_init_CR_WIDTH_EOSZ(void)
+{
+xed_lookup_CR_WIDTH_EOSZ[0]=0x2;
+xed_lookup_CR_WIDTH_EOSZ[1]=0x2;
+xed_lookup_CR_WIDTH_EOSZ[2]=0x3;
+}
+/*Array declaration*/
+xed_bits_t xed_lookup_OSZ_NONTERM_EOSZ[3][2][2];
+
+/*Array initialization*/
+void xed_lookup_function_init_OSZ_NONTERM_EOSZ(void)
+{
+xed_lookup_OSZ_NONTERM_EOSZ[0][0][0]=0x1;
+xed_lookup_OSZ_NONTERM_EOSZ[0][0][1]=0x1;
+xed_lookup_OSZ_NONTERM_EOSZ[0][1][0]=0x2;
+xed_lookup_OSZ_NONTERM_EOSZ[0][1][1]=0x2;
+xed_lookup_OSZ_NONTERM_EOSZ[1][1][0]=0x1;
+xed_lookup_OSZ_NONTERM_EOSZ[1][1][1]=0x1;
+xed_lookup_OSZ_NONTERM_EOSZ[1][0][0]=0x2;
+xed_lookup_OSZ_NONTERM_EOSZ[1][0][1]=0x2;
+xed_lookup_OSZ_NONTERM_EOSZ[2][1][0]=0x1;
+xed_lookup_OSZ_NONTERM_EOSZ[2][0][0]=0x2;
+xed_lookup_OSZ_NONTERM_EOSZ[2][1][1]=0x3;
+xed_lookup_OSZ_NONTERM_EOSZ[2][0][1]=0x3;
+}
+/*Array declaration*/
+xed_bits_t xed_lookup_REFINING66_EOSZ[3][2];
+
+/*Array initialization*/
+void xed_lookup_function_init_REFINING66_EOSZ(void)
+{
+xed_lookup_REFINING66_EOSZ[0][0]=0x1;
+xed_lookup_REFINING66_EOSZ[0][1]=0x1;
+xed_lookup_REFINING66_EOSZ[1][0]=0x2;
+xed_lookup_REFINING66_EOSZ[1][1]=0x2;
+xed_lookup_REFINING66_EOSZ[2][0]=0x2;
+xed_lookup_REFINING66_EOSZ[2][1]=0x3;
+}

CodeVirtualizer/build/obj/ild_eosz_debug_header.txt

@@ -0,0 +1,135 @@
+/// @file ild_eosz_debug_header.txt
+
+// This file was automatically generated.
+// Do not edit this file.
+
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+void xed_lookup_function_init_IMMUNE66_EOSZ(void);
+
+void xed_lookup_function_init_DF64_EOSZ(void);
+
+void xed_lookup_function_init_IGNORE66_EOSZ(void);
+
+void xed_lookup_function_init_IMMUNE_REXW_EOSZ(void);
+
+void xed_lookup_function_init_CR_WIDTH_EOSZ(void);
+
+void xed_lookup_function_init_OSZ_NONTERM_EOSZ(void);
+
+void xed_lookup_function_init_REFINING66_EOSZ(void);
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_IMMUNE66_LOOP64_EOSZ(void)
+{
+/*Constant function*/
+return 0x3;
+}
+/*Array declaration*/
+extern xed_bits_t xed_lookup_IMMUNE66_EOSZ[3][2];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_IMMUNE66_EOSZ(xed_bits_t arg_MODE, xed_bits_t arg_REXW)
+{
+xed_bits_t _v;
+xed_assert(arg_MODE>=0 && arg_MODE<3);
+xed_assert(arg_REXW>=0 && arg_REXW<2);
+_v=xed_lookup_IMMUNE66_EOSZ[arg_MODE][arg_REXW];
+return _v;
+}
+/*Array declaration*/
+extern xed_bits_t xed_lookup_DF64_EOSZ[3][2][2];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_DF64_EOSZ(xed_bits_t arg_MODE, xed_bits_t arg_OSZ, xed_bits_t arg_REXW)
+{
+xed_bits_t _v;
+xed_assert(arg_MODE>=0 && arg_MODE<3);
+xed_assert(arg_OSZ>=0 && arg_OSZ<2);
+xed_assert(arg_REXW>=0 && arg_REXW<2);
+_v=xed_lookup_DF64_EOSZ[arg_MODE][arg_OSZ][arg_REXW];
+return _v;
+}
+/*Array declaration*/
+extern xed_bits_t xed_lookup_IGNORE66_EOSZ[3][2];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_IGNORE66_EOSZ(xed_bits_t arg_MODE, xed_bits_t arg_REXW)
+{
+xed_bits_t _v;
+xed_assert(arg_MODE>=0 && arg_MODE<3);
+xed_assert(arg_REXW>=0 && arg_REXW<2);
+_v=xed_lookup_IGNORE66_EOSZ[arg_MODE][arg_REXW];
+return _v;
+}
+/*Array declaration*/
+extern xed_bits_t xed_lookup_IMMUNE_REXW_EOSZ[3][2][2];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_IMMUNE_REXW_EOSZ(xed_bits_t arg_MODE, xed_bits_t arg_OSZ, xed_bits_t arg_REXW)
+{
+xed_bits_t _v;
+xed_assert(arg_MODE>=0 && arg_MODE<3);
+xed_assert(arg_OSZ>=0 && arg_OSZ<2);
+xed_assert(arg_REXW>=0 && arg_REXW<2);
+_v=xed_lookup_IMMUNE_REXW_EOSZ[arg_MODE][arg_OSZ][arg_REXW];
+return _v;
+}
+/*Array declaration*/
+extern xed_bits_t xed_lookup_CR_WIDTH_EOSZ[3];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_CR_WIDTH_EOSZ(xed_bits_t arg_MODE)
+{
+xed_bits_t _v;
+xed_assert(arg_MODE>=0 && arg_MODE<3);
+_v=xed_lookup_CR_WIDTH_EOSZ[arg_MODE];
+return _v;
+}
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_FORCE64_EOSZ(void)
+{
+/*Constant function*/
+return 0x3;
+}
+/*Array declaration*/
+extern xed_bits_t xed_lookup_OSZ_NONTERM_EOSZ[3][2][2];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_EOSZ(xed_bits_t arg_MODE, xed_bits_t arg_OSZ, xed_bits_t arg_REXW)
+{
+xed_bits_t _v;
+xed_assert(arg_MODE>=0 && arg_MODE<3);
+xed_assert(arg_OSZ>=0 && arg_OSZ<2);
+xed_assert(arg_REXW>=0 && arg_REXW<2);
+_v=xed_lookup_OSZ_NONTERM_EOSZ[arg_MODE][arg_OSZ][arg_REXW];
+return _v;
+}
+/*Array declaration*/
+extern xed_bits_t xed_lookup_REFINING66_EOSZ[3][2];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_REFINING66_EOSZ(xed_bits_t arg_MODE, xed_bits_t arg_REXW)
+{
+xed_bits_t _v;
+xed_assert(arg_MODE>=0 && arg_MODE<3);
+xed_assert(arg_REXW>=0 && arg_REXW<2);
+_v=xed_lookup_REFINING66_EOSZ[arg_MODE][arg_REXW];
+return _v;
+}

CodeVirtualizer/build/obj/include-private/xed-chip-features-table.h

@@ -0,0 +1,31 @@
+/// @file xed-chip-features-table.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(XED_CHIP_FEATURES_TABLE_H)
+# define XED_CHIP_FEATURES_TABLE_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+#include "xed-isa-set-enum.h"
+#include "xed-chip-enum.h"
+extern xed_uint64_t xed_chip_features[XED_CHIP_LAST][5];
+extern xed_bool_t xed_chip_supports_avx512[XED_CHIP_LAST];
+void xed_init_chip_model_info(void);
+#endif

CodeVirtualizer/build/obj/include-private/xed-enc-groups.h

@@ -0,0 +1,561 @@
+/// @file xed-enc-groups.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(XED_ENC_GROUPS_H)
+# define XED_ENC_GROUPS_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+xed_bool_t xed_encode_group_0(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_1(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_2(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_3(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_4(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_5(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_6(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_7(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_8(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_9(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_10(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_11(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_12(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_13(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_14(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_15(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_16(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_17(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_18(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_19(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_20(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_21(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_22(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_23(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_24(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_25(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_26(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_27(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_28(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_29(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_30(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_31(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_32(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_33(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_34(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_35(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_36(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_37(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_38(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_39(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_40(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_41(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_42(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_43(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_44(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_45(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_46(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_47(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_48(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_49(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_50(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_51(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_52(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_53(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_54(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_55(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_56(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_57(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_58(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_59(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_60(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_61(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_62(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_63(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_64(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_65(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_66(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_67(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_68(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_69(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_70(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_71(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_72(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_73(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_74(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_75(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_76(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_77(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_78(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_79(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_80(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_81(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_82(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_83(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_84(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_85(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_86(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_87(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_88(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_89(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_90(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_91(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_92(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_93(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_94(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_95(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_96(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_97(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_98(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_99(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_100(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_101(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_102(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_103(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_104(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_105(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_106(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_107(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_108(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_109(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_110(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_111(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_112(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_113(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_114(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_115(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_116(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_117(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_118(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_119(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_120(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_121(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_122(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_123(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_124(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_125(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_126(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_127(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_128(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_129(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_130(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_131(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_132(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_133(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_134(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_135(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_136(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_137(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_138(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_139(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_140(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_141(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_142(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_143(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_144(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_145(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_146(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_147(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_148(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_149(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_150(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_151(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_152(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_153(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_154(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_155(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_156(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_157(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_158(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_159(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_160(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_161(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_162(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_163(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_164(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_165(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_166(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_167(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_168(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_169(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_170(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_171(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_172(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_173(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_174(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_175(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_176(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_177(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_178(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_179(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_180(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_181(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_182(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_183(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_184(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_185(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_186(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_187(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_188(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_189(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_190(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_191(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_192(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_193(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_194(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_195(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_196(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_197(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_198(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_199(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_200(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_201(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_202(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_203(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_204(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_205(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_206(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_207(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_208(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_209(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_210(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_211(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_212(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_213(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_214(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_215(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_216(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_217(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_218(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_219(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_220(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_221(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_222(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_223(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_224(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_225(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_226(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_227(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_228(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_229(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_230(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_231(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_232(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_233(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_234(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_235(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_236(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_237(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_238(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_239(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_240(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_241(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_242(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_243(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_244(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_245(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_246(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_247(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_248(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_249(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_250(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_251(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_252(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_253(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_254(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_255(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_256(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_257(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_258(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_259(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_260(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_261(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_262(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_263(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_264(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_265(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_266(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_267(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_268(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_269(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_270(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_271(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_272(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_273(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_274(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_275(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_276(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_277(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_278(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_279(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_280(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_281(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_282(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_283(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_284(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_285(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_286(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_287(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_288(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_289(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_290(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_291(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_292(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_293(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_294(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_295(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_296(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_297(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_298(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_299(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_300(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_301(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_302(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_303(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_304(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_305(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_306(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_307(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_308(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_309(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_310(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_311(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_312(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_313(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_314(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_315(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_316(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_317(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_318(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_319(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_320(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_321(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_322(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_323(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_324(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_325(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_326(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_327(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_328(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_329(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_330(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_331(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_332(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_333(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_334(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_335(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_336(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_337(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_338(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_339(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_340(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_341(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_342(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_343(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_344(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_345(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_346(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_347(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_348(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_349(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_350(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_351(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_352(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_353(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_354(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_355(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_356(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_357(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_358(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_359(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_360(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_361(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_362(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_363(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_364(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_365(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_366(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_367(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_368(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_369(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_370(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_371(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_372(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_373(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_374(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_375(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_376(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_377(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_378(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_379(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_380(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_381(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_382(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_383(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_384(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_385(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_386(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_387(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_388(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_389(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_390(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_391(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_392(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_393(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_394(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_395(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_396(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_397(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_398(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_399(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_400(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_401(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_402(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_403(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_404(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_405(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_406(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_407(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_408(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_409(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_410(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_411(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_412(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_413(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_414(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_415(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_416(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_417(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_418(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_419(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_420(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_421(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_422(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_423(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_424(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_425(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_426(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_427(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_428(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_429(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_430(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_431(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_432(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_433(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_434(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_435(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_436(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_437(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_438(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_439(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_440(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_441(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_442(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_443(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_444(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_445(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_446(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_447(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_448(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_449(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_450(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_451(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_452(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_453(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_454(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_455(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_456(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_457(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_458(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_459(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_460(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_461(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_462(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_463(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_464(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_465(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_466(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_467(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_468(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_469(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_470(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_471(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_472(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_473(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_474(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_475(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_476(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_477(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_478(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_479(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_480(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_481(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_482(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_483(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_484(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_485(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_486(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_487(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_488(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_489(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_490(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_491(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_492(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_493(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_494(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_495(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_496(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_497(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_498(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_499(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_500(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_501(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_502(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_503(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_504(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_505(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_506(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_507(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_508(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_509(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_510(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_511(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_512(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_513(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_514(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_515(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_516(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_517(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_518(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_519(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_520(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_521(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_522(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_523(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_524(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_525(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_526(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_527(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_528(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_529(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_530(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_531(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_532(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_533(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_group_534(xed_encoder_request_t* xes);
+#endif

CodeVirtualizer/build/obj/include-private/xed-enc-operand-lu.h

@@ -0,0 +1,78 @@
+/// @file xed-enc-operand-lu.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(XED_ENC_OPERAND_LU_H)
+# define XED_ENC_OPERAND_LU_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+XED_NOINLINE xed_uint64_t xed_enc_lu_BASE0_EASZ(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_DEFAULT_SEG_SEG0(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_NEED_SIB(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_EASZ_INDEX(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_NEED_SIB_SCALE(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_DISP_WIDTH_EASZ(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_BASE0_INDEX(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_BASE0_MODE(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_BASE0_EASZ_MODE(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_BASE0(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_EASZ_NEED_SIB(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_DISP_WIDTH(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_EOSZ_MODE(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_EASZ_MODE(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_MODE_SMODE(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_AGEN(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_SEG0(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_SEG1(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_MODE(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_DF32_DF64_EOSZ_MODE_VEXVALID(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_VEXVALID(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_MAP(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_MODE_REXB_REXX(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_REG_REXR(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_REXB_RM(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_MODE_REXR(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_MODE_REXB_REXX_VEX_C4(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_MAP_VEX_C4(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_VEX_PREFIX_VL(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_DUMMY(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_SCALE(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_INDEX(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_MODE_REXX(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_MODE_REXB(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_MODE_REXRR(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_VEX_PREFIX(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_ROUNDC_SAE_VL(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_VEXDEST4(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_ROUNDC(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_SAE(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_BCAST(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_IMM_WIDTH_MODE_UIMM0_1(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_EOSZ_IMM_WIDTH(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_IMM_WIDTH(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_BRDISP_WIDTH(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_BRDISP_WIDTH_EOSZ(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_OUTREG(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_MODE_OUTREG(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_EASZ_OUTREG(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_OUTREG_SMODE(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_EOSZ_OUTREG(xed_encoder_request_t* xes);
+XED_NOINLINE xed_uint64_t xed_enc_lu_EOSZ(xed_encoder_request_t* xes);
+#endif

CodeVirtualizer/build/obj/include-private/xed-enc-patterns.h

@@ -0,0 +1,346 @@
+/// @file xed-enc-patterns.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(XED_ENC_PATTERNS_H)
+# define XED_ENC_PATTERNS_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+void xed_encode_instruction_fb_pattern_0(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_1(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_2(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_3(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_4(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_5(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_6(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_7(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_8(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_9(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_10(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_11(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_12(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_13(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_14(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_15(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_16(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_17(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_18(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_19(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_20(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_21(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_22(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_23(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_24(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_25(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_26(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_27(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_28(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_29(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_30(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_31(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_32(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_33(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_34(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_35(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_36(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_37(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_38(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_39(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_40(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_41(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_42(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_43(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_44(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_45(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_46(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_47(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_48(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_49(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_50(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_51(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_52(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_53(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_54(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_55(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_56(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_57(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_58(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_59(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_60(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_61(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_62(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_63(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_64(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_65(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_66(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_67(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_68(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_69(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_70(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_71(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_72(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_73(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_74(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_75(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_76(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_77(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_78(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_79(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_80(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_81(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_82(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_83(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_84(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_85(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_86(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_87(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_88(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_89(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_90(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_91(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_92(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_93(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_94(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_95(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_96(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_97(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_98(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_99(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_100(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_101(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_102(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_103(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_104(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_105(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_106(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_107(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_108(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_109(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_110(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_111(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_112(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_113(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_114(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_115(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_116(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_117(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_118(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_119(xed_encoder_request_t* xes);
+void xed_encode_instruction_fb_pattern_120(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_0(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_1(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_2(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_3(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_4(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_5(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_6(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_7(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_8(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_9(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_10(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_11(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_12(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_13(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_14(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_15(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_16(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_17(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_18(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_19(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_20(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_21(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_22(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_23(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_24(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_25(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_26(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_27(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_28(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_29(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_30(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_31(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_32(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_33(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_34(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_35(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_36(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_37(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_38(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_39(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_40(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_41(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_42(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_43(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_44(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_45(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_46(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_47(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_48(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_49(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_50(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_51(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_52(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_53(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_54(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_55(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_56(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_57(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_58(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_59(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_60(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_61(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_62(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_63(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_64(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_65(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_66(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_67(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_68(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_69(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_70(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_71(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_72(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_73(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_74(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_75(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_76(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_77(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_78(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_79(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_80(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_81(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_82(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_83(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_84(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_85(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_86(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_87(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_88(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_89(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_90(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_91(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_92(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_93(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_94(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_95(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_96(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_97(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_98(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_99(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_100(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_101(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_102(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_103(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_104(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_105(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_106(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_107(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_108(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_109(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_110(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_111(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_112(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_113(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_114(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_115(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_116(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_117(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_118(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_119(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_120(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_121(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_122(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_123(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_124(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_125(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_126(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_127(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_128(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_129(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_130(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_131(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_132(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_133(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_134(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_135(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_136(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_137(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_138(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_139(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_140(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_141(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_142(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_143(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_144(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_145(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_146(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_147(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_148(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_149(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_150(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_151(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_152(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_153(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_154(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_155(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_156(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_157(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_158(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_159(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_160(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_161(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_162(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_163(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_164(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_165(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_166(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_167(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_168(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_169(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_170(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_171(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_172(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_173(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_174(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_175(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_176(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_177(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_178(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_179(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_180(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_181(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_182(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_183(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_184(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_185(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_186(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_187(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_188(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_189(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_190(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_191(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_192(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_193(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_194(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_195(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_196(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_197(xed_encoder_request_t* xes);
+void xed_encode_instruction_emit_pattern_198(xed_encoder_request_t* xes);
+#endif

CodeVirtualizer/build/obj/include-private/xed-encoder.h

@@ -0,0 +1,491 @@
+/// @file xed-encoder.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(XED_ENCODER_H)
+# define XED_ENCODER_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+xed_bool_t xed_encode_nonterminal_MODRM_BIND(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_nonterminal_MODRM_EMIT(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_nonterminal_ISA_ENCODE(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_nonterminal_ISA_BINDINGS(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_nonterminal_ISA_EMIT(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_nonterminal_XOP_ENC_BIND(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_nonterminal_XOP_ENC_EMIT(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_nonterminal_NEWVEX_ENC_BIND(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_nonterminal_NEWVEX_ENC_EMIT(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_nonterminal_VMODRM_XMM_BIND(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_nonterminal_VMODRM_YMM_BIND(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_nonterminal_VMODRM_XMM_EMIT(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_nonterminal_VMODRM_YMM_EMIT(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_nonterminal_EVEX_ENC_BIND(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_nonterminal_EVEX_ENC_EMIT(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_nonterminal_NEWVEX3_ENC_BIND(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_nonterminal_NEWVEX3_ENC_EMIT(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_nonterminal_UISA_VMODRM_ZMM_BIND(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_nonterminal_UISA_VMODRM_YMM_BIND(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_nonterminal_UISA_VMODRM_XMM_BIND(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_nonterminal_UISA_VMODRM_ZMM_EMIT(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_nonterminal_UISA_VMODRM_YMM_EMIT(xed_encoder_request_t* xes);
+xed_bool_t xed_encode_nonterminal_UISA_VMODRM_XMM_EMIT(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_SEGMENT_DEFAULT_ENCODE_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_SEGMENT_ENCODE_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_SIBBASE_ENCODE_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_SIBBASE_ENCODE_SIB1_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_SIBINDEX_ENCODE_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_SIBINDEX_ENCODE_SIB1_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_SIBSCALE_ENCODE_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_MODRM_MOD_ENCODE_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_MODRM_MOD_EA16_DISP0_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_MODRM_MOD_EA16_DISP8_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_MODRM_MOD_EA16_DISP16_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_MODRM_MOD_EA32_DISP0_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_MODRM_MOD_EA32_DISP8_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_MODRM_MOD_EA32_DISP32_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_MODRM_MOD_EA64_DISP0_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_MODRM_MOD_EA64_DISP8_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_MODRM_MOD_EA64_DISP32_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_MODRM_RM_ENCODE_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_MODRM_RM_ENCODE_EA16_SIB0_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_MODRM_RM_ENCODE_EA64_SIB0_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_MODRM_RM_ENCODE_EA32_SIB0_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_MODRM_RM_ENCODE_EANOT16_SIB1_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_SIB_NT_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_DISP_NT_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_ERROR_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_DISP_WIDTH_0_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_DISP_WIDTH_8_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_DISP_WIDTH_16_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_DISP_WIDTH_32_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_DISP_WIDTH_0_8_16_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_DISP_WIDTH_0_8_32_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_FIXUP_EOSZ_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_FIXUP_EASZ_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_FIXUP_SMODE_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_REMOVE_SEGMENT_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_REMOVE_SEGMENT_AGEN1_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_OVERRIDE_SEG0_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_OVERRIDE_SEG1_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_DF64_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_OSZ_NONTERM_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_REFINING66_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_IGNORE66_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_IMMUNE66_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_IMMUNE66_LOOP64_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_IMMUNE_REXW_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_CR_WIDTH_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_FORCE64_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_BRANCH_HINT_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_CET_NO_TRACK_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_VEXED_REX_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_XOP_TYPE_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_XOP_MAP_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_XOP_REXXB_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_BND_R_CHECK_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_BND_B_CHECK_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_VEX_REXR_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_VEX_REXXB_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_VEX_MAP_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_VEX_REG_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_VEX_ESCVL_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_SE_IMM8_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_VSIB_ENC_BASE_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_VSIB_ENC_SCALE_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_VSIB_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_VSIB_ENC_INDEX_XMM_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_VSIB_ENC_INDEX_YMM_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_DISP_WIDTH_8_32_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_TUPLE1_4X_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_EVEX_62_REXR_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_EVEX_REXX_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_EVEX_REXB_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_EVEX_REXRR_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_EVEX_MAP_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_EVEX_REXW_VVVV_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_EVEX_UPP_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_EVEX_LL_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_AVX512_EVEX_BYTE3_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_AVX512_ROUND_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_SAE_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_ESIZE_128_BITS_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_ESIZE_64_BITS_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_ESIZE_32_BITS_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_ESIZE_16_BITS_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_ESIZE_8_BITS_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_ESIZE_4_BITS_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_ESIZE_2_BITS_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_ESIZE_1_BITS_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_MOVDDUP_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_FULLMEM_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_HALFMEM_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_QUARTERMEM_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_EIGHTHMEM_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_GPR_READER_BYTE_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_GPR_READER_WORD_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_GPR_WRITER_LDOP_D_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_GPR_WRITER_LDOP_Q_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_GPR_WRITER_STORE_BYTE_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_GPR_WRITER_STORE_WORD_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_TUPLE1_BYTE_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_TUPLE1_WORD_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_SCALAR_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_TUPLE1_SUBDWORD_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_GPR_READER_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_GPR_READER_SUBDWORD_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_GPR_WRITER_LDOP_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_GPR_WRITER_STORE_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_GPR_WRITER_STORE_SUBDWORD_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_MEM128_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_TUPLE1_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_GSCAT_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_TUPLE2_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_TUPLE4_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_TUPLE8_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_FULL_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_HALF_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_FIX_ROUND_LEN512_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_FIX_ROUND_LEN128_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_UISA_ENC_INDEX_ZMM_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_UISA_ENC_INDEX_YMM_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_UISA_ENC_INDEX_XMM_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_NELEM_QUARTER_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_ASZ_NONTERM_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_ONE_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_UIMMv_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_SIMMz_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_SIMM8_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_UIMM8_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_UIMM8_1_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_UIMM16_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_UIMM32_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_BRDISP8_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_BRDISP32_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_BRDISPz_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_MEMDISPv_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_MEMDISP32_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_MEMDISP16_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_MEMDISP8_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_nonterminal_MEMDISP_BIND(xed_encoder_request_t* xes);
+xed_uint32_t xed_encode_ntluf_GPR8_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPR8_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPR8_SB(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_SEGe(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPR16e(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPR32e(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPR32e_m32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPR32e_m64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPR64e(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_ArAX(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_ArBX(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_ArCX(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_ArDX(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_ArSI(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_ArDI(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_ArSP(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_ArBP(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_SrSP(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_SrBP(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_Ar8(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_Ar9(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_Ar10(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_Ar11(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_Ar12(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_Ar13(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_Ar14(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_Ar15(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_rIP(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_rIPa(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_OeAX(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_OrAX(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_OrDX(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_OrCX(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_OrBX(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_OrSP(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_OrBP(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_rFLAGS(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_MMX_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_MMX_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPRv_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPRv_SB(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPRz_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPRv_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPRz_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPRy_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPRy_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPR64_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPR64_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPR64_SB(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPR64_X(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPR32_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPR32_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPR32_SB(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPR32_X(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPR16_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPR16_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_GPR16_SB(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_CR_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_CR_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_DR_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_X87(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_SEG(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_SEG_MOV(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_FINAL_DSEG(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_FINAL_DSEG_NOT64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_FINAL_DSEG_MODE64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_FINAL_DSEG1(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_FINAL_DSEG1_NOT64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_FINAL_DSEG1_MODE64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_FINAL_ESEG(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_FINAL_ESEG1(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_FINAL_SSEG1(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_FINAL_SSEG0(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_FINAL_SSEG(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_FINAL_SSEG_NOT64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_FINAL_SSEG_MODE64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_XMM_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_XMM_R_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_XMM_R_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_XMM_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_XMM_B_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_XMM_B_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_BND_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_BND_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_A_GPR_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_A_GPR_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_XMM_SE(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_XMM_SE64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_XMM_SE32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_YMM_SE(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_YMM_SE64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_YMM_SE32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_XMM_N(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_XMM_N_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_XMM_N_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_YMM_N(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_YMM_N_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_YMM_N_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_YMM_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_YMM_R_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_YMM_R_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_YMM_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_YMM_B_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_YMM_B_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_VGPRy_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_VGPRy_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_VGPRy_N(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_VGPR32_N(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_VGPR32_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_VGPR32_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_VGPR32_N_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_VGPR32_N_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_VGPR64_N(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_VGPR32_R_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_VGPR32_R_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_VGPR64_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_VGPR32_B_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_VGPR32_B_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_VGPR64_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_MASK1(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_MASKNOT0(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_MASK_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_MASK_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_MASK_N(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_MASK_N64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_MASK_N32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_XMM_R3(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_XMM_R3_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_XMM_R3_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_YMM_R3(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_YMM_R3_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_YMM_R3_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_ZMM_R3(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_ZMM_R3_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_ZMM_R3_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_XMM_B3(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_XMM_B3_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_XMM_B3_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_YMM_B3(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_YMM_B3_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_YMM_B3_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_ZMM_B3(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_ZMM_B3_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_ZMM_B3_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_XMM_N3(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_XMM_N3_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_XMM_N3_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_YMM_N3(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_YMM_N3_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_YMM_N3_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_ZMM_N3(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_ZMM_N3_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_ZMM_N3_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_TMM_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_TMM_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint32_t xed_encode_ntluf_TMM_N(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg);
+xed_uint_t xed_encode_nonterminal_SEGMENT_DEFAULT_ENCODE_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_SEGMENT_ENCODE_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_SIB_REQUIRED_ENCODE_BIND(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_SIB_REQUIRED_ENCODE_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_SIBBASE_ENCODE_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_SIBBASE_ENCODE_SIB1_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_SIBINDEX_ENCODE_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_SIBINDEX_ENCODE_SIB1_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_SIBSCALE_ENCODE_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_MODRM_MOD_ENCODE_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_MODRM_MOD_EA16_DISP0_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_MODRM_MOD_EA16_DISP8_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_MODRM_MOD_EA16_DISP16_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_MODRM_MOD_EA32_DISP0_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_MODRM_MOD_EA32_DISP8_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_MODRM_MOD_EA32_DISP32_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_MODRM_MOD_EA64_DISP0_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_MODRM_MOD_EA64_DISP8_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_MODRM_MOD_EA64_DISP32_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_MODRM_RM_ENCODE_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_MODRM_RM_ENCODE_EA16_SIB0_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_MODRM_RM_ENCODE_EA64_SIB0_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_MODRM_RM_ENCODE_EA32_SIB0_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_MODRM_RM_ENCODE_EANOT16_SIB1_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_SIB_NT_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_DISP_NT_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_ERROR_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_DISP_WIDTH_0_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_DISP_WIDTH_8_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_DISP_WIDTH_16_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_DISP_WIDTH_32_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_DISP_WIDTH_0_8_16_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_DISP_WIDTH_0_8_32_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_FIXUP_EOSZ_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_FIXUP_EASZ_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_FIXUP_SMODE_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_REMOVE_SEGMENT_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_REMOVE_SEGMENT_AGEN1_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_OVERRIDE_SEG0_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_OVERRIDE_SEG1_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_REX_PREFIX_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_REX_PREFIX_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_PREFIX_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_PREFIX_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_DF64_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_OSZ_NONTERM_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_REFINING66_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_IGNORE66_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_IMMUNE66_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_IMMUNE66_LOOP64_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_IMMUNE_REXW_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_CR_WIDTH_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_FORCE64_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_BRANCH_HINT_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_CET_NO_TRACK_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_VEXED_REX_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_XOP_TYPE_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_XOP_MAP_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_XOP_REXXB_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_BND_R_CHECK_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_BND_B_CHECK_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_VEX_TYPE_ENC_BIND(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_VEX_TYPE_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_VEX_REXR_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_VEX_REXXB_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_VEX_MAP_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_VEX_REG_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_VEX_ESCVL_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_SE_IMM8_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_VMODRM_MOD_ENCODE_BIND(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_VMODRM_MOD_ENCODE_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_VSIB_ENC_BASE_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_VSIB_ENC_SCALE_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_VSIB_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_VSIB_ENC_INDEX_XMM_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_VSIB_ENC_INDEX_YMM_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_DISP_WIDTH_8_32_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_TUPLE1_4X_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_EVEX_62_REXR_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_EVEX_REXX_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_EVEX_REXB_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_EVEX_REXRR_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_EVEX_MAP_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_EVEX_REXW_VVVV_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_EVEX_UPP_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_EVEX_LL_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_AVX512_EVEX_BYTE3_ENC_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_AVX512_ROUND_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_SAE_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_ESIZE_128_BITS_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_ESIZE_64_BITS_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_ESIZE_32_BITS_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_ESIZE_16_BITS_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_ESIZE_8_BITS_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_ESIZE_4_BITS_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_ESIZE_2_BITS_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_ESIZE_1_BITS_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_MOVDDUP_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_FULLMEM_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_HALFMEM_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_QUARTERMEM_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_EIGHTHMEM_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_GPR_READER_BYTE_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_GPR_READER_WORD_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_GPR_WRITER_LDOP_D_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_GPR_WRITER_LDOP_Q_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_GPR_WRITER_STORE_BYTE_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_GPR_WRITER_STORE_WORD_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_TUPLE1_BYTE_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_TUPLE1_WORD_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_SCALAR_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_TUPLE1_SUBDWORD_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_GPR_READER_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_GPR_READER_SUBDWORD_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_GPR_WRITER_LDOP_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_GPR_WRITER_STORE_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_GPR_WRITER_STORE_SUBDWORD_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_MEM128_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_TUPLE1_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_GSCAT_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_TUPLE2_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_TUPLE4_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_TUPLE8_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_FULL_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_HALF_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_FIX_ROUND_LEN512_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_FIX_ROUND_LEN128_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_UISA_ENC_INDEX_ZMM_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_UISA_ENC_INDEX_YMM_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_UISA_ENC_INDEX_XMM_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_NELEM_QUARTER_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_ASZ_NONTERM_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_ONE_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_UIMMv_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_SIMMz_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_SIMM8_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_UIMM8_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_UIMM8_1_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_UIMM16_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_UIMM32_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_BRDISP8_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_BRDISP32_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_BRDISPz_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_MEMDISPv_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_MEMDISP32_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_MEMDISP16_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_MEMDISP8_EMIT(xed_encoder_request_t* xes);
+xed_uint_t xed_encode_nonterminal_MEMDISP_EMIT(xed_encoder_request_t* xes);
+#endif

CodeVirtualizer/build/obj/include-private/xed-ild-disp-bytes.h

@@ -0,0 +1,545 @@
+/// @file include-private/xed-ild-disp-bytes.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(INCLUDE_PRIVATE_XED_ILD_DISP_BYTES_H)
+# define INCLUDE_PRIVATE_XED_ILD_DISP_BYTES_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+#include "xed-ild-disp-l1.h"
+#include "xed-ild-private.h"
+#include "xed-operand-accessors.h"
+const xed_ild_l1_func_t disp_width_map_legacy_map0[256] = {
+/*opcode 0x0*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x1*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x2*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x3*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x4*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x5*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x6*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x7*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x8*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x9*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xa*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xb*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xc*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xd*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xe*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xf*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x10*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x11*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x12*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x13*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x14*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x15*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x16*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x17*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x18*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x19*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x1a*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x1b*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x1c*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x1d*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x1e*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x1f*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x20*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x21*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x22*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x23*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x24*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x25*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x26*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x27*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x28*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x29*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x2a*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x2b*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x2c*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x2d*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x2e*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x2f*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x30*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x31*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x32*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x33*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x34*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x35*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x36*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x37*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x38*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x39*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x3a*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x3b*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x3c*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x3d*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x3e*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x3f*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x40*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x41*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x42*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x43*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x44*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x45*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x46*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x47*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x48*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x49*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x4a*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x4b*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x4c*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x4d*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x4e*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x4f*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x50*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x51*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x52*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x53*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x54*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x55*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x56*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x57*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x58*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x59*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x5a*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x5b*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x5c*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x5d*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x5e*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x5f*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x60*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x61*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x62*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x63*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x64*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x65*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x66*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x67*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x68*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x69*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x6a*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x6b*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x6c*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x6d*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x6e*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x6f*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x70*/ xed_lookup_function_BRDISP8_BRDISP_WIDTH_CONST_l2,
+/*opcode 0x71*/ xed_lookup_function_BRDISP8_BRDISP_WIDTH_CONST_l2,
+/*opcode 0x72*/ xed_lookup_function_BRDISP8_BRDISP_WIDTH_CONST_l2,
+/*opcode 0x73*/ xed_lookup_function_BRDISP8_BRDISP_WIDTH_CONST_l2,
+/*opcode 0x74*/ xed_lookup_function_BRDISP8_BRDISP_WIDTH_CONST_l2,
+/*opcode 0x75*/ xed_lookup_function_BRDISP8_BRDISP_WIDTH_CONST_l2,
+/*opcode 0x76*/ xed_lookup_function_BRDISP8_BRDISP_WIDTH_CONST_l2,
+/*opcode 0x77*/ xed_lookup_function_BRDISP8_BRDISP_WIDTH_CONST_l2,
+/*opcode 0x78*/ xed_lookup_function_BRDISP8_BRDISP_WIDTH_CONST_l2,
+/*opcode 0x79*/ xed_lookup_function_BRDISP8_BRDISP_WIDTH_CONST_l2,
+/*opcode 0x7a*/ xed_lookup_function_BRDISP8_BRDISP_WIDTH_CONST_l2,
+/*opcode 0x7b*/ xed_lookup_function_BRDISP8_BRDISP_WIDTH_CONST_l2,
+/*opcode 0x7c*/ xed_lookup_function_BRDISP8_BRDISP_WIDTH_CONST_l2,
+/*opcode 0x7d*/ xed_lookup_function_BRDISP8_BRDISP_WIDTH_CONST_l2,
+/*opcode 0x7e*/ xed_lookup_function_BRDISP8_BRDISP_WIDTH_CONST_l2,
+/*opcode 0x7f*/ xed_lookup_function_BRDISP8_BRDISP_WIDTH_CONST_l2,
+/*opcode 0x80*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x81*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x82*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x83*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x84*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x85*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x86*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x87*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x88*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x89*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x8a*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x8b*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x8c*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x8d*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x8e*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x8f*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x90*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x91*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x92*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x93*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x94*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x95*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x96*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x97*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x98*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x99*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x9a*/ xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_EOSZ_l2,
+/*opcode 0x9b*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x9c*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x9d*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x9e*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x9f*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xa0*/ xed_lookup_function_MEMDISPv_DISP_WIDTH_ASZ_NONTERM_EASZ_l2,
+/*opcode 0xa1*/ xed_lookup_function_MEMDISPv_DISP_WIDTH_ASZ_NONTERM_EASZ_l2,
+/*opcode 0xa2*/ xed_lookup_function_MEMDISPv_DISP_WIDTH_ASZ_NONTERM_EASZ_l2,
+/*opcode 0xa3*/ xed_lookup_function_MEMDISPv_DISP_WIDTH_ASZ_NONTERM_EASZ_l2,
+/*opcode 0xa4*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xa5*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xa6*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xa7*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xa8*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xa9*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xaa*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xab*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xac*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xad*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xae*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xaf*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xb0*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xb1*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xb2*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xb3*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xb4*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xb5*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xb6*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xb7*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xb8*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xb9*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xba*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xbb*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xbc*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xbd*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xbe*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xbf*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xc0*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xc1*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xc2*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xc3*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xc4*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xc5*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xc6*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xc7*/ xed_lookup_function_RESOLVE_BYREG_DISP_maplegacy_map0_op0xc7_l1,
+/*opcode 0xc8*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xc9*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xca*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xcb*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xcc*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xcd*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xce*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xcf*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xd0*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xd1*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xd2*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xd3*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xd4*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xd5*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xd6*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xd7*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xd8*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xd9*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xda*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xdb*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xdc*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xdd*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xde*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xdf*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xe0*/ xed_lookup_function_BRDISP8_BRDISP_WIDTH_CONST_l2,
+/*opcode 0xe1*/ xed_lookup_function_BRDISP8_BRDISP_WIDTH_CONST_l2,
+/*opcode 0xe2*/ xed_lookup_function_BRDISP8_BRDISP_WIDTH_CONST_l2,
+/*opcode 0xe3*/ xed_lookup_function_BRDISP8_BRDISP_WIDTH_CONST_l2,
+/*opcode 0xe4*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xe5*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xe6*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xe7*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xe8*/ xed_lookup_function_DISP_BUCKET_0_l1,
+/*opcode 0xe9*/ xed_lookup_function_DISP_BUCKET_0_l1,
+/*opcode 0xea*/ xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_EOSZ_l2,
+/*opcode 0xeb*/ xed_lookup_function_BRDISP8_BRDISP_WIDTH_CONST_l2,
+/*opcode 0xec*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xed*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xee*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xef*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xf0*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xf1*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xf2*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xf3*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xf4*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xf5*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xf6*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xf7*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xf8*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xf9*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xfa*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xfb*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xfc*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xfd*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xfe*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xff*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+};
+const xed_ild_l1_func_t disp_width_map_legacy_map1[256] = {
+/*opcode 0x0*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x1*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x2*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x3*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x4*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x5*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x6*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x7*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x8*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x9*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xa*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xb*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xc*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xd*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xe*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xf*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x10*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x11*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x12*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x13*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x14*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x15*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x16*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x17*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x18*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x19*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x1a*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x1b*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x1c*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x1d*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x1e*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x1f*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x20*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x21*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x22*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x23*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x24*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x25*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x26*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x27*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x28*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x29*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x2a*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x2b*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x2c*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x2d*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x2e*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x2f*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x30*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x31*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x32*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x33*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x34*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x35*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x36*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x37*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x38*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x39*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x3a*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x3b*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x3c*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x3d*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x3e*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x3f*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x40*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x41*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x42*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x43*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x44*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x45*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x46*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x47*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x48*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x49*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x4a*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x4b*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x4c*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x4d*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x4e*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x4f*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x50*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x51*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x52*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x53*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x54*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x55*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x56*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x57*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x58*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x59*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x5a*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x5b*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x5c*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x5d*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x5e*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x5f*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x60*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x61*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x62*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x63*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x64*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x65*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x66*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x67*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x68*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x69*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x6a*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x6b*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x6c*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x6d*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x6e*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x6f*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x70*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x71*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x72*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x73*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x74*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x75*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x76*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x77*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x78*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x79*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x7a*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x7b*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x7c*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x7d*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x7e*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x7f*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x80*/ xed_lookup_function_DISP_BUCKET_0_l1,
+/*opcode 0x81*/ xed_lookup_function_DISP_BUCKET_0_l1,
+/*opcode 0x82*/ xed_lookup_function_DISP_BUCKET_0_l1,
+/*opcode 0x83*/ xed_lookup_function_DISP_BUCKET_0_l1,
+/*opcode 0x84*/ xed_lookup_function_DISP_BUCKET_0_l1,
+/*opcode 0x85*/ xed_lookup_function_DISP_BUCKET_0_l1,
+/*opcode 0x86*/ xed_lookup_function_DISP_BUCKET_0_l1,
+/*opcode 0x87*/ xed_lookup_function_DISP_BUCKET_0_l1,
+/*opcode 0x88*/ xed_lookup_function_DISP_BUCKET_0_l1,
+/*opcode 0x89*/ xed_lookup_function_DISP_BUCKET_0_l1,
+/*opcode 0x8a*/ xed_lookup_function_DISP_BUCKET_0_l1,
+/*opcode 0x8b*/ xed_lookup_function_DISP_BUCKET_0_l1,
+/*opcode 0x8c*/ xed_lookup_function_DISP_BUCKET_0_l1,
+/*opcode 0x8d*/ xed_lookup_function_DISP_BUCKET_0_l1,
+/*opcode 0x8e*/ xed_lookup_function_DISP_BUCKET_0_l1,
+/*opcode 0x8f*/ xed_lookup_function_DISP_BUCKET_0_l1,
+/*opcode 0x90*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x91*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x92*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x93*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x94*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x95*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x96*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x97*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x98*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x99*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x9a*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x9b*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x9c*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x9d*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x9e*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0x9f*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xa0*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xa1*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xa2*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xa3*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xa4*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xa5*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xa6*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xa7*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xa8*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xa9*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xaa*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xab*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xac*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xad*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xae*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xaf*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xb0*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xb1*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xb2*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xb3*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xb4*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xb5*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xb6*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xb7*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xb8*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xb9*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xba*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xbb*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xbc*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xbd*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xbe*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xbf*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xc0*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xc1*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xc2*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xc3*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xc4*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xc5*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xc6*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xc7*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xc8*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xc9*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xca*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xcb*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xcc*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xcd*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xce*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xcf*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xd0*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xd1*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xd2*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xd3*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xd4*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xd5*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xd6*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xd7*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xd8*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xd9*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xda*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xdb*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xdc*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xdd*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xde*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xdf*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xe0*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xe1*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xe2*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xe3*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xe4*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xe5*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xe6*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xe7*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xe8*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xe9*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xea*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xeb*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xec*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xed*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xee*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xef*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xf0*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xf1*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xf2*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xf3*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xf4*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xf5*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xf6*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xf7*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xf8*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xf9*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xfa*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xfb*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xfc*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xfd*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xfe*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+/*opcode 0xff*/ xed_lookup_function_EMPTY_DISP_CONST_l2,
+};
+#endif

CodeVirtualizer/build/obj/include-private/xed-ild-disp-l1.h

@@ -0,0 +1,59 @@
+/// @file include-private/xed-ild-disp-l1.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(INCLUDE_PRIVATE_XED_ILD_DISP_L1_H)
+# define INCLUDE_PRIVATE_XED_ILD_DISP_L1_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+#include "xed-ild-disp-l2.h"
+static XED_INLINE void xed_lookup_function_DISP_BUCKET_0_l1(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_RESOLVE_BYREG_DISP_maplegacy_map0_op0xc7_l1(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_DISP_BUCKET_0_l1(xed_decoded_inst_t* x)
+{
+xed_bits_t _mode;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+if(_mode <= 1) {
+xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_EOSZ_l2(x);
+return;
+}
+else if(2 == _mode) {
+xed_lookup_function_BRDISP32_BRDISP_WIDTH_CONST_l2(x);
+return;
+}
+}
+static XED_INLINE void xed_lookup_function_RESOLVE_BYREG_DISP_maplegacy_map0_op0xc7_l1(xed_decoded_inst_t* x)
+{
+xed_uint8_t _reg;
+_reg = xed3_operand_get_reg(x);
+switch(_reg) {
+case 0:
+xed_lookup_function_EMPTY_DISP_CONST_l2(x);
+break;
+case 7:
+xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_EOSZ_l2(x);
+break;
+/*We should only get here for #UDs and those have no defined architectural length*/
+default: ;
+}
+}
+#endif

CodeVirtualizer/build/obj/include-private/xed-ild-disp-l2.h

@@ -0,0 +1,248 @@
+/// @file include-private/xed-ild-disp-l2.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(INCLUDE_PRIVATE_XED_ILD_DISP_L2_H)
+# define INCLUDE_PRIVATE_XED_ILD_DISP_L2_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+#include "xed-ild-eosz.h"
+#include "xed-ild-easz.h"
+#include "xed-ild-disp-l3.h"
+#include "xed-ild-private.h"
+#include "xed-operand-accessors.h"
+static XED_INLINE void xed_lookup_function_MEMDISPv_DISP_WIDTH_ASZ_NONTERM_EASZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_BRDISP32_BRDISP_WIDTH_CONST_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_BRDISP8_BRDISP_WIDTH_CONST_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_CR_WIDTH_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_DF64_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_DF64_FORCE64_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_DF64_IMMUNE66_LOOP64_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_FORCE64_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_IGNORE66_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_IMMUNE66_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_IMMUNE_REXW_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_REFINING66_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_REFINING66_CR_WIDTH_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_EMPTY_DISP_CONST_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_MEMDISPv_DISP_WIDTH_ASZ_NONTERM_EASZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _easz;
+xed_bits_t _disp_width;
+xed_bits_t _mode;
+xed_bits_t _asz;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_asz = (xed_bits_t)xed3_operand_get_asz(x);
+_easz = xed_lookup_function_ASZ_NONTERM_EASZ(_mode, _asz);
+_disp_width = (xed_bits_t)xed_lookup_function_MEMDISPv_DISP_WIDTH_l3(_easz);
+xed3_operand_set_disp_width(x, _disp_width);
+}
+static XED_INLINE void xed_lookup_function_BRDISP32_BRDISP_WIDTH_CONST_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _disp_width;
+_disp_width = (xed_bits_t)xed_lookup_function_BRDISP32_BRDISP_WIDTH_l3();
+xed3_operand_set_disp_width(x, _disp_width);
+}
+static XED_INLINE void xed_lookup_function_BRDISP8_BRDISP_WIDTH_CONST_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _disp_width;
+_disp_width = (xed_bits_t)xed_lookup_function_BRDISP8_BRDISP_WIDTH_l3();
+xed3_operand_set_disp_width(x, _disp_width);
+}
+static XED_INLINE void xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _disp_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_EOSZ(_mode, _osz, _rexw);
+_disp_width = (xed_bits_t)xed_lookup_function_BRDISPz_BRDISP_WIDTH_l3(_eosz);
+xed3_operand_set_disp_width(x, _disp_width);
+}
+static XED_INLINE void xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_CR_WIDTH_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _disp_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_CR_WIDTH_EOSZ(_mode, _osz, _rexw);
+_disp_width = (xed_bits_t)xed_lookup_function_BRDISPz_BRDISP_WIDTH_l3(_eosz);
+xed3_operand_set_disp_width(x, _disp_width);
+}
+static XED_INLINE void xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_DF64_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _disp_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_DF64_EOSZ(_mode, _osz, _rexw);
+_disp_width = (xed_bits_t)xed_lookup_function_BRDISPz_BRDISP_WIDTH_l3(_eosz);
+xed3_operand_set_disp_width(x, _disp_width);
+}
+static XED_INLINE void xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_DF64_FORCE64_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _disp_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_DF64_FORCE64_EOSZ(_mode, _osz, _rexw);
+_disp_width = (xed_bits_t)xed_lookup_function_BRDISPz_BRDISP_WIDTH_l3(_eosz);
+xed3_operand_set_disp_width(x, _disp_width);
+}
+static XED_INLINE void xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_DF64_IMMUNE66_LOOP64_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _disp_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_DF64_IMMUNE66_LOOP64_EOSZ(_mode, _osz, _rexw);
+_disp_width = (xed_bits_t)xed_lookup_function_BRDISPz_BRDISP_WIDTH_l3(_eosz);
+xed3_operand_set_disp_width(x, _disp_width);
+}
+static XED_INLINE void xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_FORCE64_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _disp_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_FORCE64_EOSZ(_mode, _osz, _rexw);
+_disp_width = (xed_bits_t)xed_lookup_function_BRDISPz_BRDISP_WIDTH_l3(_eosz);
+xed3_operand_set_disp_width(x, _disp_width);
+}
+static XED_INLINE void xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_IGNORE66_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _disp_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_IGNORE66_EOSZ(_mode, _osz, _rexw);
+_disp_width = (xed_bits_t)xed_lookup_function_BRDISPz_BRDISP_WIDTH_l3(_eosz);
+xed3_operand_set_disp_width(x, _disp_width);
+}
+static XED_INLINE void xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_IMMUNE66_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _disp_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_IMMUNE66_EOSZ(_mode, _osz, _rexw);
+_disp_width = (xed_bits_t)xed_lookup_function_BRDISPz_BRDISP_WIDTH_l3(_eosz);
+xed3_operand_set_disp_width(x, _disp_width);
+}
+static XED_INLINE void xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_IMMUNE_REXW_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _disp_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_IMMUNE_REXW_EOSZ(_mode, _osz, _rexw);
+_disp_width = (xed_bits_t)xed_lookup_function_BRDISPz_BRDISP_WIDTH_l3(_eosz);
+xed3_operand_set_disp_width(x, _disp_width);
+}
+static XED_INLINE void xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_REFINING66_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _disp_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_REFINING66_EOSZ(_mode, _osz, _rexw);
+_disp_width = (xed_bits_t)xed_lookup_function_BRDISPz_BRDISP_WIDTH_l3(_eosz);
+xed3_operand_set_disp_width(x, _disp_width);
+}
+static XED_INLINE void xed_lookup_function_BRDISPz_BRDISP_WIDTH_OSZ_NONTERM_REFINING66_CR_WIDTH_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _disp_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_REFINING66_CR_WIDTH_EOSZ(_mode, _osz, _rexw);
+_disp_width = (xed_bits_t)xed_lookup_function_BRDISPz_BRDISP_WIDTH_l3(_eosz);
+xed3_operand_set_disp_width(x, _disp_width);
+}
+static XED_INLINE void xed_lookup_function_EMPTY_DISP_CONST_l2(xed_decoded_inst_t* x)
+{
+/*This function does nothing for map-opcodes whose
+disp_bytes value is set earlier in xed-ild.c
+(regular displacement resolution by modrm/sib)*/
+
+/*pacify the compiler*/
+(void)x;
+}
+#endif

CodeVirtualizer/build/obj/include-private/xed-ild-disp-l3.h

@@ -0,0 +1,66 @@
+/// @file include-private/xed-ild-disp-l3.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(INCLUDE_PRIVATE_XED_ILD_DISP_L3_H)
+# define INCLUDE_PRIVATE_XED_ILD_DISP_L3_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+void xed_lookup_function_init_BRDISPz_BRDISP_WIDTH(void);
+
+void xed_lookup_function_init_MEMDISPv_DISP_WIDTH(void);
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_BRDISP32_BRDISP_WIDTH_l3(void)
+{
+/*Constant function*/
+return 0x20;
+}
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_BRDISP8_BRDISP_WIDTH_l3(void)
+{
+/*Constant function*/
+return 0x8;
+}
+/*Array declaration*/
+extern xed_bits_t xed_lookup_BRDISPz_BRDISP_WIDTH[4];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_BRDISPz_BRDISP_WIDTH_l3(xed_bits_t arg_EOSZ)
+{
+xed_bits_t _v;
+xed_assert(arg_EOSZ>=1 && arg_EOSZ<4);
+_v=xed_lookup_BRDISPz_BRDISP_WIDTH[arg_EOSZ];
+return _v;
+}
+/*Array declaration*/
+extern xed_bits_t xed_lookup_MEMDISPv_DISP_WIDTH[4];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_MEMDISPv_DISP_WIDTH_l3(xed_bits_t arg_EASZ)
+{
+xed_bits_t _v;
+xed_assert(arg_EASZ>=1 && arg_EASZ<4);
+_v=xed_lookup_MEMDISPv_DISP_WIDTH[arg_EASZ];
+return _v;
+}
+void xed_ild_disp_l3_init(void);
+
+#endif

CodeVirtualizer/build/obj/include-private/xed-ild-easz-getters.h

@@ -0,0 +1,39 @@
+/// @file include-private/xed-ild-easz-getters.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(INCLUDE_PRIVATE_XED_ILD_EASZ_GETTERS_H)
+# define INCLUDE_PRIVATE_XED_ILD_EASZ_GETTERS_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+#include "xed-ild-private.h"
+#include "xed-ild-easz.h"
+#include "xed-operand-accessors.h"
+static XED_INLINE xed_bits_t xed_lookup_function_ASZ_NONTERM_EASZ_getter(const xed_decoded_inst_t* x);
+
+static XED_INLINE xed_bits_t xed_lookup_function_ASZ_NONTERM_EASZ_getter(const xed_decoded_inst_t* x)
+{
+xed_bits_t _mode;
+xed_bits_t _asz;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_asz = (xed_bits_t)xed3_operand_get_asz(x);
+return xed_lookup_function_ASZ_NONTERM_EASZ(_mode, _asz);
+}
+#endif

CodeVirtualizer/build/obj/include-private/xed-ild-easz.h

@@ -0,0 +1,42 @@
+/// @file include-private/xed-ild-easz.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(INCLUDE_PRIVATE_XED_ILD_EASZ_H)
+# define INCLUDE_PRIVATE_XED_ILD_EASZ_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+void xed_lookup_function_init_ASZ_NONTERM_EASZ(void);
+
+/*Array declaration*/
+extern xed_bits_t xed_lookup_ASZ_NONTERM_EASZ[3][2];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_ASZ_NONTERM_EASZ(xed_bits_t arg_MODE, xed_bits_t arg_ASZ)
+{
+xed_bits_t _v;
+xed_assert(arg_MODE>=0 && arg_MODE<3);
+xed_assert(arg_ASZ>=0 && arg_ASZ<2);
+_v=xed_lookup_ASZ_NONTERM_EASZ[arg_MODE][arg_ASZ];
+return _v;
+}
+void xed_ild_easz_init(void);
+
+#endif

CodeVirtualizer/build/obj/include-private/xed-ild-eosz-getters.h

@@ -0,0 +1,161 @@
+/// @file include-private/xed-ild-eosz-getters.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(INCLUDE_PRIVATE_XED_ILD_EOSZ_GETTERS_H)
+# define INCLUDE_PRIVATE_XED_ILD_EOSZ_GETTERS_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+#include "xed-ild-private.h"
+#include "xed-ild-eosz.h"
+#include "xed-operand-accessors.h"
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_REFINING66_EOSZ_getter(const xed_decoded_inst_t* x);
+
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_DF64_FORCE64_EOSZ_getter(const xed_decoded_inst_t* x);
+
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_IGNORE66_EOSZ_getter(const xed_decoded_inst_t* x);
+
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_REFINING66_CR_WIDTH_EOSZ_getter(const xed_decoded_inst_t* x);
+
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_DF64_IMMUNE66_LOOP64_EOSZ_getter(const xed_decoded_inst_t* x);
+
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_CR_WIDTH_EOSZ_getter(const xed_decoded_inst_t* x);
+
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_EOSZ_getter(const xed_decoded_inst_t* x);
+
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_IMMUNE_REXW_EOSZ_getter(const xed_decoded_inst_t* x);
+
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_IMMUNE66_EOSZ_getter(const xed_decoded_inst_t* x);
+
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_DF64_EOSZ_getter(const xed_decoded_inst_t* x);
+
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_FORCE64_EOSZ_getter(const xed_decoded_inst_t* x);
+
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_REFINING66_EOSZ_getter(const xed_decoded_inst_t* x)
+{
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+return xed_lookup_function_OSZ_NONTERM_REFINING66_EOSZ(_mode, _osz, _rexw);
+}
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_DF64_FORCE64_EOSZ_getter(const xed_decoded_inst_t* x)
+{
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+return xed_lookup_function_OSZ_NONTERM_DF64_FORCE64_EOSZ(_mode, _osz, _rexw);
+}
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_IGNORE66_EOSZ_getter(const xed_decoded_inst_t* x)
+{
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+return xed_lookup_function_OSZ_NONTERM_IGNORE66_EOSZ(_mode, _osz, _rexw);
+}
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_REFINING66_CR_WIDTH_EOSZ_getter(const xed_decoded_inst_t* x)
+{
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+return xed_lookup_function_OSZ_NONTERM_REFINING66_CR_WIDTH_EOSZ(_mode, _osz, _rexw);
+}
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_DF64_IMMUNE66_LOOP64_EOSZ_getter(const xed_decoded_inst_t* x)
+{
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+return xed_lookup_function_OSZ_NONTERM_DF64_IMMUNE66_LOOP64_EOSZ(_mode, _osz, _rexw);
+}
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_CR_WIDTH_EOSZ_getter(const xed_decoded_inst_t* x)
+{
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+return xed_lookup_function_OSZ_NONTERM_CR_WIDTH_EOSZ(_mode, _osz, _rexw);
+}
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_EOSZ_getter(const xed_decoded_inst_t* x)
+{
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+return xed_lookup_function_OSZ_NONTERM_EOSZ(_mode, _osz, _rexw);
+}
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_IMMUNE_REXW_EOSZ_getter(const xed_decoded_inst_t* x)
+{
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+return xed_lookup_function_OSZ_NONTERM_IMMUNE_REXW_EOSZ(_mode, _osz, _rexw);
+}
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_IMMUNE66_EOSZ_getter(const xed_decoded_inst_t* x)
+{
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+return xed_lookup_function_OSZ_NONTERM_IMMUNE66_EOSZ(_mode, _osz, _rexw);
+}
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_DF64_EOSZ_getter(const xed_decoded_inst_t* x)
+{
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+return xed_lookup_function_OSZ_NONTERM_DF64_EOSZ(_mode, _osz, _rexw);
+}
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_FORCE64_EOSZ_getter(const xed_decoded_inst_t* x)
+{
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+return xed_lookup_function_OSZ_NONTERM_FORCE64_EOSZ(_mode, _osz, _rexw);
+}
+#endif

CodeVirtualizer/build/obj/include-private/xed-ild-eosz.h

@@ -0,0 +1,193 @@
+/// @file include-private/xed-ild-eosz.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(INCLUDE_PRIVATE_XED_ILD_EOSZ_H)
+# define INCLUDE_PRIVATE_XED_ILD_EOSZ_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+void xed_lookup_function_init_OSZ_NONTERM_EOSZ(void);
+
+void xed_lookup_function_init_OSZ_NONTERM_CR_WIDTH_EOSZ(void);
+
+void xed_lookup_function_init_OSZ_NONTERM_DF64_EOSZ(void);
+
+void xed_lookup_function_init_OSZ_NONTERM_DF64_FORCE64_EOSZ(void);
+
+void xed_lookup_function_init_OSZ_NONTERM_DF64_IMMUNE66_LOOP64_EOSZ(void);
+
+void xed_lookup_function_init_OSZ_NONTERM_FORCE64_EOSZ(void);
+
+void xed_lookup_function_init_OSZ_NONTERM_IGNORE66_EOSZ(void);
+
+void xed_lookup_function_init_OSZ_NONTERM_IMMUNE66_EOSZ(void);
+
+void xed_lookup_function_init_OSZ_NONTERM_IMMUNE_REXW_EOSZ(void);
+
+void xed_lookup_function_init_OSZ_NONTERM_REFINING66_EOSZ(void);
+
+void xed_lookup_function_init_OSZ_NONTERM_REFINING66_CR_WIDTH_EOSZ(void);
+
+/*Array declaration*/
+extern xed_bits_t xed_lookup_OSZ_NONTERM_EOSZ[3][2][2];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_EOSZ(xed_bits_t arg_MODE, xed_bits_t arg_OSZ, xed_bits_t arg_REXW)
+{
+xed_bits_t _v;
+xed_assert(arg_MODE>=0 && arg_MODE<3);
+xed_assert(arg_OSZ>=0 && arg_OSZ<2);
+xed_assert(arg_REXW>=0 && arg_REXW<2);
+_v=xed_lookup_OSZ_NONTERM_EOSZ[arg_MODE][arg_OSZ][arg_REXW];
+return _v;
+}
+/*Array declaration*/
+extern xed_bits_t xed_lookup_OSZ_NONTERM_CR_WIDTH_EOSZ[3][2][2];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_CR_WIDTH_EOSZ(xed_bits_t arg_MODE, xed_bits_t arg_OSZ, xed_bits_t arg_REXW)
+{
+xed_bits_t _v;
+xed_assert(arg_MODE>=0 && arg_MODE<3);
+xed_assert(arg_OSZ>=0 && arg_OSZ<2);
+xed_assert(arg_REXW>=0 && arg_REXW<2);
+_v=xed_lookup_OSZ_NONTERM_CR_WIDTH_EOSZ[arg_MODE][arg_OSZ][arg_REXW];
+return _v;
+}
+/*Array declaration*/
+extern xed_bits_t xed_lookup_OSZ_NONTERM_DF64_EOSZ[3][2][2];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_DF64_EOSZ(xed_bits_t arg_MODE, xed_bits_t arg_OSZ, xed_bits_t arg_REXW)
+{
+xed_bits_t _v;
+xed_assert(arg_MODE>=0 && arg_MODE<3);
+xed_assert(arg_OSZ>=0 && arg_OSZ<2);
+xed_assert(arg_REXW>=0 && arg_REXW<2);
+_v=xed_lookup_OSZ_NONTERM_DF64_EOSZ[arg_MODE][arg_OSZ][arg_REXW];
+return _v;
+}
+/*Array declaration*/
+extern xed_bits_t xed_lookup_OSZ_NONTERM_DF64_FORCE64_EOSZ[3][2][2];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_DF64_FORCE64_EOSZ(xed_bits_t arg_MODE, xed_bits_t arg_OSZ, xed_bits_t arg_REXW)
+{
+xed_bits_t _v;
+xed_assert(arg_MODE>=0 && arg_MODE<3);
+xed_assert(arg_OSZ>=0 && arg_OSZ<2);
+xed_assert(arg_REXW>=0 && arg_REXW<2);
+_v=xed_lookup_OSZ_NONTERM_DF64_FORCE64_EOSZ[arg_MODE][arg_OSZ][arg_REXW];
+return _v;
+}
+/*Array declaration*/
+extern xed_bits_t xed_lookup_OSZ_NONTERM_DF64_IMMUNE66_LOOP64_EOSZ[3][2][2];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_DF64_IMMUNE66_LOOP64_EOSZ(xed_bits_t arg_MODE, xed_bits_t arg_OSZ, xed_bits_t arg_REXW)
+{
+xed_bits_t _v;
+xed_assert(arg_MODE>=0 && arg_MODE<3);
+xed_assert(arg_OSZ>=0 && arg_OSZ<2);
+xed_assert(arg_REXW>=0 && arg_REXW<2);
+_v=xed_lookup_OSZ_NONTERM_DF64_IMMUNE66_LOOP64_EOSZ[arg_MODE][arg_OSZ][arg_REXW];
+return _v;
+}
+/*Array declaration*/
+extern xed_bits_t xed_lookup_OSZ_NONTERM_FORCE64_EOSZ[3][2][2];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_FORCE64_EOSZ(xed_bits_t arg_MODE, xed_bits_t arg_OSZ, xed_bits_t arg_REXW)
+{
+xed_bits_t _v;
+xed_assert(arg_MODE>=0 && arg_MODE<3);
+xed_assert(arg_OSZ>=0 && arg_OSZ<2);
+xed_assert(arg_REXW>=0 && arg_REXW<2);
+_v=xed_lookup_OSZ_NONTERM_FORCE64_EOSZ[arg_MODE][arg_OSZ][arg_REXW];
+return _v;
+}
+/*Array declaration*/
+extern xed_bits_t xed_lookup_OSZ_NONTERM_IGNORE66_EOSZ[3][2][2];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_IGNORE66_EOSZ(xed_bits_t arg_MODE, xed_bits_t arg_OSZ, xed_bits_t arg_REXW)
+{
+xed_bits_t _v;
+xed_assert(arg_MODE>=0 && arg_MODE<3);
+xed_assert(arg_OSZ>=0 && arg_OSZ<2);
+xed_assert(arg_REXW>=0 && arg_REXW<2);
+_v=xed_lookup_OSZ_NONTERM_IGNORE66_EOSZ[arg_MODE][arg_OSZ][arg_REXW];
+return _v;
+}
+/*Array declaration*/
+extern xed_bits_t xed_lookup_OSZ_NONTERM_IMMUNE66_EOSZ[3][2][2];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_IMMUNE66_EOSZ(xed_bits_t arg_MODE, xed_bits_t arg_OSZ, xed_bits_t arg_REXW)
+{
+xed_bits_t _v;
+xed_assert(arg_MODE>=0 && arg_MODE<3);
+xed_assert(arg_OSZ>=0 && arg_OSZ<2);
+xed_assert(arg_REXW>=0 && arg_REXW<2);
+_v=xed_lookup_OSZ_NONTERM_IMMUNE66_EOSZ[arg_MODE][arg_OSZ][arg_REXW];
+return _v;
+}
+/*Array declaration*/
+extern xed_bits_t xed_lookup_OSZ_NONTERM_IMMUNE_REXW_EOSZ[3][2][2];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_IMMUNE_REXW_EOSZ(xed_bits_t arg_MODE, xed_bits_t arg_OSZ, xed_bits_t arg_REXW)
+{
+xed_bits_t _v;
+xed_assert(arg_MODE>=0 && arg_MODE<3);
+xed_assert(arg_OSZ>=0 && arg_OSZ<2);
+xed_assert(arg_REXW>=0 && arg_REXW<2);
+_v=xed_lookup_OSZ_NONTERM_IMMUNE_REXW_EOSZ[arg_MODE][arg_OSZ][arg_REXW];
+return _v;
+}
+/*Array declaration*/
+extern xed_bits_t xed_lookup_OSZ_NONTERM_REFINING66_EOSZ[3][2][2];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_REFINING66_EOSZ(xed_bits_t arg_MODE, xed_bits_t arg_OSZ, xed_bits_t arg_REXW)
+{
+xed_bits_t _v;
+xed_assert(arg_MODE>=0 && arg_MODE<3);
+xed_assert(arg_OSZ>=0 && arg_OSZ<2);
+xed_assert(arg_REXW>=0 && arg_REXW<2);
+_v=xed_lookup_OSZ_NONTERM_REFINING66_EOSZ[arg_MODE][arg_OSZ][arg_REXW];
+return _v;
+}
+/*Array declaration*/
+extern xed_bits_t xed_lookup_OSZ_NONTERM_REFINING66_CR_WIDTH_EOSZ[3][2][2];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_OSZ_NONTERM_REFINING66_CR_WIDTH_EOSZ(xed_bits_t arg_MODE, xed_bits_t arg_OSZ, xed_bits_t arg_REXW)
+{
+xed_bits_t _v;
+xed_assert(arg_MODE>=0 && arg_MODE<3);
+xed_assert(arg_OSZ>=0 && arg_OSZ<2);
+xed_assert(arg_REXW>=0 && arg_REXW<2);
+_v=xed_lookup_OSZ_NONTERM_REFINING66_CR_WIDTH_EOSZ[arg_MODE][arg_OSZ][arg_REXW];
+return _v;
+}
+void xed_ild_eosz_init(void);
+
+#endif

CodeVirtualizer/build/obj/include-private/xed-ild-imm-l1.h

@@ -0,0 +1,74 @@
+/// @file include-private/xed-ild-imm-l1.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(INCLUDE_PRIVATE_XED_ILD_IMM_L1_H)
+# define INCLUDE_PRIVATE_XED_ILD_IMM_L1_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+#include "xed-ild-imm-l2.h"
+static XED_INLINE void xed_lookup_function_RESOLVE_BYREG_IMM_WIDTH_maplegacy_map0_op0xc7_l1(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_RESOLVE_BYREG_IMM_WIDTH_maplegacy_map0_op0xf6_l1(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_RESOLVE_BYREG_IMM_WIDTH_maplegacy_map0_op0xf7_l1(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_RESOLVE_BYREG_IMM_WIDTH_maplegacy_map0_op0xc7_l1(xed_decoded_inst_t* x)
+{
+xed_uint8_t _reg;
+_reg = xed3_operand_get_reg(x);
+switch(_reg) {
+case 0:
+xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_EOSZ_l2(x);
+break;
+case 7:
+xed_lookup_function_0_IMM_WIDTH_CONST_l2(x);
+break;
+/*We should only get here for #UDs and those have no defined architectural length*/
+default: ;
+}
+}
+static XED_INLINE void xed_lookup_function_RESOLVE_BYREG_IMM_WIDTH_maplegacy_map0_op0xf6_l1(xed_decoded_inst_t* x)
+{
+xed_uint8_t _reg;
+_reg = xed3_operand_get_reg(x);
+if(_reg <= 1) {
+xed_lookup_function_SIMM8_IMM_WIDTH_CONST_l2(x);
+return;
+}
+else if((2 <= _reg) && (_reg <= 7)) {
+xed_lookup_function_0_IMM_WIDTH_CONST_l2(x);
+return;
+}
+}
+static XED_INLINE void xed_lookup_function_RESOLVE_BYREG_IMM_WIDTH_maplegacy_map0_op0xf7_l1(xed_decoded_inst_t* x)
+{
+xed_uint8_t _reg;
+_reg = xed3_operand_get_reg(x);
+if(_reg <= 1) {
+xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_EOSZ_l2(x);
+return;
+}
+else if((2 <= _reg) && (_reg <= 7)) {
+xed_lookup_function_0_IMM_WIDTH_CONST_l2(x);
+return;
+}
+}
+#endif

CodeVirtualizer/build/obj/include-private/xed-ild-imm-l2.h

@@ -0,0 +1,428 @@
+/// @file include-private/xed-ild-imm-l2.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(INCLUDE_PRIVATE_XED_ILD_IMM_L2_H)
+# define INCLUDE_PRIVATE_XED_ILD_IMM_L2_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+#include "xed-ild-eosz.h"
+#include "xed-ild-imm-l3.h"
+#include "xed-ild.h"
+#include "xed-operand-accessors.h"
+static XED_INLINE void xed_lookup_function_SE_IMM8_IMM_WIDTH_CONST_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_SIMM8_IMM_WIDTH_CONST_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_CR_WIDTH_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_DF64_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_DF64_FORCE64_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_DF64_IMMUNE66_LOOP64_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_FORCE64_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_IGNORE66_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_IMMUNE66_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_IMMUNE_REXW_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_REFINING66_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_REFINING66_CR_WIDTH_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_UIMM16_IMM_WIDTH_CONST_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_UIMM32_IMM_WIDTH_CONST_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_UIMM8_IMM_WIDTH_CONST_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_UIMMv_IMM_WIDTH_OSZ_NONTERM_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_UIMMv_IMM_WIDTH_OSZ_NONTERM_CR_WIDTH_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_UIMMv_IMM_WIDTH_OSZ_NONTERM_DF64_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_UIMMv_IMM_WIDTH_OSZ_NONTERM_DF64_FORCE64_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_UIMMv_IMM_WIDTH_OSZ_NONTERM_DF64_IMMUNE66_LOOP64_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_UIMMv_IMM_WIDTH_OSZ_NONTERM_FORCE64_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_UIMMv_IMM_WIDTH_OSZ_NONTERM_IGNORE66_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_UIMMv_IMM_WIDTH_OSZ_NONTERM_IMMUNE66_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_UIMMv_IMM_WIDTH_OSZ_NONTERM_IMMUNE_REXW_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_UIMMv_IMM_WIDTH_OSZ_NONTERM_REFINING66_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_UIMMv_IMM_WIDTH_OSZ_NONTERM_REFINING66_CR_WIDTH_EOSZ_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_0_IMM_WIDTH_CONST_l2(xed_decoded_inst_t* x);
+
+static XED_INLINE void xed_lookup_function_SE_IMM8_IMM_WIDTH_CONST_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _imm_width;
+_imm_width = (xed_bits_t)xed_lookup_function_SE_IMM8_IMM_WIDTH_l3();
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_SIMM8_IMM_WIDTH_CONST_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _imm_width;
+_imm_width = (xed_bits_t)xed_lookup_function_SIMM8_IMM_WIDTH_l3();
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _imm_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_EOSZ(_mode, _osz, _rexw);
+_imm_width = (xed_bits_t)xed_lookup_function_SIMMz_IMM_WIDTH_l3(_eosz);
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_CR_WIDTH_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _imm_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_CR_WIDTH_EOSZ(_mode, _osz, _rexw);
+_imm_width = (xed_bits_t)xed_lookup_function_SIMMz_IMM_WIDTH_l3(_eosz);
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_DF64_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _imm_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_DF64_EOSZ(_mode, _osz, _rexw);
+_imm_width = (xed_bits_t)xed_lookup_function_SIMMz_IMM_WIDTH_l3(_eosz);
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_DF64_FORCE64_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _imm_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_DF64_FORCE64_EOSZ(_mode, _osz, _rexw);
+_imm_width = (xed_bits_t)xed_lookup_function_SIMMz_IMM_WIDTH_l3(_eosz);
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_DF64_IMMUNE66_LOOP64_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _imm_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_DF64_IMMUNE66_LOOP64_EOSZ(_mode, _osz, _rexw);
+_imm_width = (xed_bits_t)xed_lookup_function_SIMMz_IMM_WIDTH_l3(_eosz);
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_FORCE64_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _imm_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_FORCE64_EOSZ(_mode, _osz, _rexw);
+_imm_width = (xed_bits_t)xed_lookup_function_SIMMz_IMM_WIDTH_l3(_eosz);
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_IGNORE66_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _imm_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_IGNORE66_EOSZ(_mode, _osz, _rexw);
+_imm_width = (xed_bits_t)xed_lookup_function_SIMMz_IMM_WIDTH_l3(_eosz);
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_IMMUNE66_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _imm_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_IMMUNE66_EOSZ(_mode, _osz, _rexw);
+_imm_width = (xed_bits_t)xed_lookup_function_SIMMz_IMM_WIDTH_l3(_eosz);
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_IMMUNE_REXW_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _imm_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_IMMUNE_REXW_EOSZ(_mode, _osz, _rexw);
+_imm_width = (xed_bits_t)xed_lookup_function_SIMMz_IMM_WIDTH_l3(_eosz);
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_REFINING66_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _imm_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_REFINING66_EOSZ(_mode, _osz, _rexw);
+_imm_width = (xed_bits_t)xed_lookup_function_SIMMz_IMM_WIDTH_l3(_eosz);
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_SIMMz_IMM_WIDTH_OSZ_NONTERM_REFINING66_CR_WIDTH_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _imm_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_REFINING66_CR_WIDTH_EOSZ(_mode, _osz, _rexw);
+_imm_width = (xed_bits_t)xed_lookup_function_SIMMz_IMM_WIDTH_l3(_eosz);
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_UIMM16_IMM_WIDTH_CONST_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _imm_width;
+_imm_width = (xed_bits_t)xed_lookup_function_UIMM16_IMM_WIDTH_l3();
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_UIMM32_IMM_WIDTH_CONST_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _imm_width;
+_imm_width = (xed_bits_t)xed_lookup_function_UIMM32_IMM_WIDTH_l3();
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_UIMM8_IMM_WIDTH_CONST_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _imm_width;
+_imm_width = (xed_bits_t)xed_lookup_function_UIMM8_IMM_WIDTH_l3();
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_UIMMv_IMM_WIDTH_OSZ_NONTERM_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _imm_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_EOSZ(_mode, _osz, _rexw);
+_imm_width = (xed_bits_t)xed_lookup_function_UIMMv_IMM_WIDTH_l3(_eosz);
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_UIMMv_IMM_WIDTH_OSZ_NONTERM_CR_WIDTH_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _imm_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_CR_WIDTH_EOSZ(_mode, _osz, _rexw);
+_imm_width = (xed_bits_t)xed_lookup_function_UIMMv_IMM_WIDTH_l3(_eosz);
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_UIMMv_IMM_WIDTH_OSZ_NONTERM_DF64_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _imm_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_DF64_EOSZ(_mode, _osz, _rexw);
+_imm_width = (xed_bits_t)xed_lookup_function_UIMMv_IMM_WIDTH_l3(_eosz);
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_UIMMv_IMM_WIDTH_OSZ_NONTERM_DF64_FORCE64_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _imm_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_DF64_FORCE64_EOSZ(_mode, _osz, _rexw);
+_imm_width = (xed_bits_t)xed_lookup_function_UIMMv_IMM_WIDTH_l3(_eosz);
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_UIMMv_IMM_WIDTH_OSZ_NONTERM_DF64_IMMUNE66_LOOP64_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _imm_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_DF64_IMMUNE66_LOOP64_EOSZ(_mode, _osz, _rexw);
+_imm_width = (xed_bits_t)xed_lookup_function_UIMMv_IMM_WIDTH_l3(_eosz);
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_UIMMv_IMM_WIDTH_OSZ_NONTERM_FORCE64_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _imm_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_FORCE64_EOSZ(_mode, _osz, _rexw);
+_imm_width = (xed_bits_t)xed_lookup_function_UIMMv_IMM_WIDTH_l3(_eosz);
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_UIMMv_IMM_WIDTH_OSZ_NONTERM_IGNORE66_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _imm_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_IGNORE66_EOSZ(_mode, _osz, _rexw);
+_imm_width = (xed_bits_t)xed_lookup_function_UIMMv_IMM_WIDTH_l3(_eosz);
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_UIMMv_IMM_WIDTH_OSZ_NONTERM_IMMUNE66_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _imm_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_IMMUNE66_EOSZ(_mode, _osz, _rexw);
+_imm_width = (xed_bits_t)xed_lookup_function_UIMMv_IMM_WIDTH_l3(_eosz);
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_UIMMv_IMM_WIDTH_OSZ_NONTERM_IMMUNE_REXW_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _imm_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_IMMUNE_REXW_EOSZ(_mode, _osz, _rexw);
+_imm_width = (xed_bits_t)xed_lookup_function_UIMMv_IMM_WIDTH_l3(_eosz);
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_UIMMv_IMM_WIDTH_OSZ_NONTERM_REFINING66_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _imm_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_REFINING66_EOSZ(_mode, _osz, _rexw);
+_imm_width = (xed_bits_t)xed_lookup_function_UIMMv_IMM_WIDTH_l3(_eosz);
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_UIMMv_IMM_WIDTH_OSZ_NONTERM_REFINING66_CR_WIDTH_EOSZ_l2(xed_decoded_inst_t* x)
+{
+xed_bits_t _eosz;
+xed_bits_t _imm_width;
+xed_bits_t _mode;
+xed_bits_t _osz;
+xed_bits_t _rexw;
+_mode = (xed_bits_t)xed3_operand_get_mode(x);
+_osz = (xed_bits_t)xed3_operand_get_osz(x);
+_rexw = (xed_bits_t)xed3_operand_get_rexw(x);
+_eosz = xed_lookup_function_OSZ_NONTERM_REFINING66_CR_WIDTH_EOSZ(_mode, _osz, _rexw);
+_imm_width = (xed_bits_t)xed_lookup_function_UIMMv_IMM_WIDTH_l3(_eosz);
+xed3_operand_set_imm_width(x, _imm_width);
+}
+static XED_INLINE void xed_lookup_function_0_IMM_WIDTH_CONST_l2(xed_decoded_inst_t* x)
+{
+xed3_operand_set_imm_width(x, 0);
+}
+#endif

CodeVirtualizer/build/obj/include-private/xed-ild-imm-l3.h

@@ -0,0 +1,84 @@
+/// @file include-private/xed-ild-imm-l3.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(INCLUDE_PRIVATE_XED_ILD_IMM_L3_H)
+# define INCLUDE_PRIVATE_XED_ILD_IMM_L3_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+void xed_lookup_function_init_SIMMz_IMM_WIDTH(void);
+
+void xed_lookup_function_init_UIMMv_IMM_WIDTH(void);
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_SE_IMM8_IMM_WIDTH_l3(void)
+{
+/*Constant function*/
+return 0x8;
+}
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_SIMM8_IMM_WIDTH_l3(void)
+{
+/*Constant function*/
+return 0x8;
+}
+/*Array declaration*/
+extern xed_bits_t xed_lookup_SIMMz_IMM_WIDTH[4];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_SIMMz_IMM_WIDTH_l3(xed_bits_t arg_EOSZ)
+{
+xed_bits_t _v;
+xed_assert(arg_EOSZ>=1 && arg_EOSZ<4);
+_v=xed_lookup_SIMMz_IMM_WIDTH[arg_EOSZ];
+return _v;
+}
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_UIMM16_IMM_WIDTH_l3(void)
+{
+/*Constant function*/
+return 0x10;
+}
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_UIMM32_IMM_WIDTH_l3(void)
+{
+/*Constant function*/
+return 0x20;
+}
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_UIMM8_IMM_WIDTH_l3(void)
+{
+/*Constant function*/
+return 0x8;
+}
+/*Array declaration*/
+extern xed_bits_t xed_lookup_UIMMv_IMM_WIDTH[4];
+
+/*Lookup function*/
+static XED_INLINE xed_bits_t xed_lookup_function_UIMMv_IMM_WIDTH_l3(xed_bits_t arg_EOSZ)
+{
+xed_bits_t _v;
+xed_assert(arg_EOSZ>=1 && arg_EOSZ<4);
+_v=xed_lookup_UIMMv_IMM_WIDTH[arg_EOSZ];
+return _v;
+}
+void xed_ild_imm_l3_init(void);
+
+#endif

CodeVirtualizer/build/obj/include-private/xed-ild-modrm.h

@@ -0,0 +1,824 @@
+/// @file include-private/xed-ild-modrm.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(INCLUDE_PRIVATE_XED_ILD_MODRM_H)
+# define INCLUDE_PRIVATE_XED_ILD_MODRM_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+#define XED_ILD_HASMODRM_FALSE 0
+
+#define XED_ILD_HASMODRM_IGNORE_MOD 2
+
+#define XED_ILD_HASMODRM_TRUE 1
+
+#define XED_ILD_HASMODRM_UD0 4
+
+#define XED_ILD_HASMODRM_UNDEF 3
+
+
+
+const xed_uint8_t has_modrm_map_legacy_map0[256] = {
+/*opcode 0x0*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x1*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x2*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x3*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x4*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x5*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x6*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x7*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x8*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x9*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xa*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xb*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xd*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xe*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xf*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x10*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x11*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x12*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x13*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x14*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x15*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x16*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x17*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x18*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x19*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x1a*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x1b*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x1c*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x1d*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x1e*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x1f*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x20*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x21*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x22*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x23*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x24*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x25*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x26*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x27*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x28*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x29*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x2a*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x2b*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x2c*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x2d*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x2e*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x2f*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x30*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x31*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x32*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x33*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x34*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x35*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x36*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x37*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x38*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x39*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x3a*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x3b*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x3c*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x3d*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x3e*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x3f*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x40*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x41*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x42*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x43*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x44*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x45*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x46*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x47*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x48*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x49*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x4a*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x4b*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x4c*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x4d*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x4e*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x4f*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x50*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x51*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x52*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x53*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x54*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x55*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x56*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x57*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x58*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x59*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x5a*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x5b*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x5c*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x5d*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x5e*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x5f*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x60*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x61*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x62*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x63*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x64*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x65*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x66*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x67*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x68*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x69*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x6a*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x6b*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x6c*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x6d*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x6e*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x6f*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x70*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x71*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x72*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x73*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x74*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x75*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x76*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x77*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x78*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x79*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x7a*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x7b*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x7c*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x7d*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x7e*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x7f*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x80*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x81*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x82*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x83*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x84*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x85*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x86*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x87*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x88*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x89*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x8a*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x8b*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x8c*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x8d*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x8e*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x8f*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x90*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x91*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x92*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x93*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x94*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x95*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x96*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x97*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x98*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x99*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x9a*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x9b*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x9c*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x9d*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x9e*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x9f*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xa0*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xa1*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xa2*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xa3*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xa4*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xa5*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xa6*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xa7*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xa8*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xa9*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xaa*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xab*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xac*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xad*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xae*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xaf*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xb0*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xb1*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xb2*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xb3*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xb4*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xb5*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xb6*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xb7*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xb8*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xb9*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xba*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xbb*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xbc*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xbd*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xbe*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xbf*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xc0*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc1*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc2*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xc3*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xc4*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc5*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc6*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc7*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc8*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xc9*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xca*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xcb*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xcc*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xcd*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xce*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xcf*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xd0*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xd1*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xd2*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xd3*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xd4*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xd5*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xd6*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xd7*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xd8*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xd9*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xda*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xdb*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xdc*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xdd*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xde*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xdf*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xe0*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xe1*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xe2*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xe3*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xe4*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xe5*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xe6*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xe7*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xe8*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xe9*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xea*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xeb*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xec*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xed*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xee*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xef*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xf0*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0xf1*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xf2*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0xf3*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0xf4*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xf5*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xf6*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xf7*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xf8*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xf9*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xfa*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xfb*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xfc*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xfd*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xfe*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xff*/ XED_ILD_HASMODRM_TRUE,
+};
+const xed_uint8_t has_modrm_map_legacy_map1[256] = {
+/*opcode 0x0*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x1*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x2*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x3*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x4*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x5*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x6*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x7*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x8*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x9*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xa*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0xb*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xc*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0xd*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xe*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xf*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x10*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x11*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x12*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x13*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x14*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x15*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x16*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x17*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x18*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x19*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x1a*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x1b*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x1c*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x1d*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x1e*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x1f*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x20*/ XED_ILD_HASMODRM_IGNORE_MOD,
+/*opcode 0x21*/ XED_ILD_HASMODRM_IGNORE_MOD,
+/*opcode 0x22*/ XED_ILD_HASMODRM_IGNORE_MOD,
+/*opcode 0x23*/ XED_ILD_HASMODRM_IGNORE_MOD,
+/*opcode 0x24*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x25*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x26*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x27*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x28*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x29*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x2a*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x2b*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x2c*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x2d*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x2e*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x2f*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x30*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x31*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x32*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x33*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x34*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x35*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x36*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x37*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x38*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x39*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x3a*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x3b*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x3c*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x3d*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x3e*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x3f*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x40*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x41*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x42*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x43*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x44*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x45*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x46*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x47*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x48*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x49*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x4a*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x4b*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x4c*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x4d*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x4e*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x4f*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x50*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x51*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x52*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x53*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x54*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x55*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x56*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x57*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x58*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x59*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x5a*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x5b*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x5c*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x5d*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x5e*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x5f*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x60*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x61*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x62*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x63*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x64*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x65*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x66*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x67*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x68*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x69*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x6a*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x6b*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x6c*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x6d*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x6e*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x6f*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x70*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x71*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x72*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x73*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x74*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x75*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x76*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x77*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x78*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x79*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x7a*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x7b*/ XED_ILD_HASMODRM_UNDEF,
+/*opcode 0x7c*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x7d*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x7e*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x7f*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x80*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x81*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x82*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x83*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x84*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x85*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x86*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x87*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x88*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x89*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x8a*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x8b*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x8c*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x8d*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x8e*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x8f*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x90*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x91*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x92*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x93*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x94*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x95*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x96*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x97*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x98*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x99*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x9a*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x9b*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x9c*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x9d*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x9e*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x9f*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xa0*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xa1*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xa2*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xa3*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xa4*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xa5*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xa6*/ XED_ILD_HASMODRM_IGNORE_MOD,
+/*opcode 0xa7*/ XED_ILD_HASMODRM_IGNORE_MOD,
+/*opcode 0xa8*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xa9*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xaa*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xab*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xac*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xad*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xae*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xaf*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xb0*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xb1*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xb2*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xb3*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xb4*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xb5*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xb6*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xb7*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xb8*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xb9*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xba*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xbb*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xbc*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xbd*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xbe*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xbf*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc0*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc1*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc2*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc3*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc4*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc5*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc6*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc7*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc8*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xc9*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xca*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xcb*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xcc*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xcd*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xce*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xcf*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xd0*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xd1*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xd2*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xd3*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xd4*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xd5*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xd6*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xd7*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xd8*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xd9*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xda*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xdb*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xdc*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xdd*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xde*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xdf*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xe0*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xe1*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xe2*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xe3*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xe4*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xe5*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xe6*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xe7*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xe8*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xe9*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xea*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xeb*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xec*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xed*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xee*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xef*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xf0*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xf1*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xf2*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xf3*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xf4*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xf5*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xf6*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xf7*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xf8*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xf9*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xfa*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xfb*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xfc*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xfd*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xfe*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xff*/ XED_ILD_HASMODRM_UD0,
+};
+const xed_uint8_t has_modrm_map_vex_map1[256] = {
+/*opcode 0x0*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x1*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x2*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x3*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x4*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x5*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x6*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x7*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x8*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x9*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xa*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xb*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xc*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xd*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xe*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xf*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x10*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x11*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x12*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x13*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x14*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x15*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x16*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x17*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x18*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x19*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x1a*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x1b*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x1c*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x1d*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x1e*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x1f*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x20*/ XED_ILD_HASMODRM_IGNORE_MOD,
+/*opcode 0x21*/ XED_ILD_HASMODRM_IGNORE_MOD,
+/*opcode 0x22*/ XED_ILD_HASMODRM_IGNORE_MOD,
+/*opcode 0x23*/ XED_ILD_HASMODRM_IGNORE_MOD,
+/*opcode 0x24*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x25*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x26*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x27*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x28*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x29*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x2a*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x2b*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x2c*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x2d*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x2e*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x2f*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x30*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x31*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x32*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x33*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x34*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x35*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x36*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x37*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x38*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x39*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x3a*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x3b*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x3c*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x3d*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x3e*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x3f*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x40*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x41*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x42*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x43*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x44*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x45*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x46*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x47*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x48*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x49*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x4a*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x4b*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x4c*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x4d*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x4e*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x4f*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x50*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x51*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x52*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x53*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x54*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x55*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x56*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x57*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x58*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x59*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x5a*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x5b*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x5c*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x5d*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x5e*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x5f*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x60*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x61*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x62*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x63*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x64*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x65*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x66*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x67*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x68*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x69*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x6a*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x6b*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x6c*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x6d*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x6e*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x6f*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x70*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x71*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x72*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x73*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x74*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x75*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x76*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x77*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x78*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x79*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x7a*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x7b*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x7c*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x7d*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x7e*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x7f*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x80*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x81*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x82*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x83*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x84*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x85*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x86*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x87*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x88*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x89*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x8a*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x8b*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x8c*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x8d*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x8e*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x8f*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0x90*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x91*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x92*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x93*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x94*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x95*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x96*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x97*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x98*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x99*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x9a*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x9b*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x9c*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x9d*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x9e*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0x9f*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xa0*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xa1*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xa2*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xa3*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xa4*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xa5*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xa6*/ XED_ILD_HASMODRM_IGNORE_MOD,
+/*opcode 0xa7*/ XED_ILD_HASMODRM_IGNORE_MOD,
+/*opcode 0xa8*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xa9*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xaa*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xab*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xac*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xad*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xae*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xaf*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xb0*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xb1*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xb2*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xb3*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xb4*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xb5*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xb6*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xb7*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xb8*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xb9*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xba*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xbb*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xbc*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xbd*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xbe*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xbf*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc0*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc1*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc2*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc3*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc4*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc5*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc6*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc7*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xc8*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xc9*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xca*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xcb*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xcc*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xcd*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xce*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xcf*/ XED_ILD_HASMODRM_FALSE,
+/*opcode 0xd0*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xd1*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xd2*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xd3*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xd4*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xd5*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xd6*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xd7*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xd8*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xd9*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xda*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xdb*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xdc*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xdd*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xde*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xdf*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xe0*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xe1*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xe2*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xe3*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xe4*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xe5*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xe6*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xe7*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xe8*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xe9*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xea*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xeb*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xec*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xed*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xee*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xef*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xf0*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xf1*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xf2*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xf3*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xf4*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xf5*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xf6*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xf7*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xf8*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xf9*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xfa*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xfb*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xfc*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xfd*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xfe*/ XED_ILD_HASMODRM_TRUE,
+/*opcode 0xff*/ XED_ILD_HASMODRM_UD0,
+};
+#if !defined(XED_MAP_ROW_LIMIT)
+# define XED_MAP_ROW_LIMIT 11
+#endif
+#if !defined(XED_VEXVALID_LIMIT)
+# define XED_VEXVALID_LIMIT 4
+#endif
+const xed_uint8_t* xed_ild_has_modrm_table[XED_VEXVALID_LIMIT][XED_MAP_ROW_LIMIT] = {
+{ has_modrm_map_legacy_map0, has_modrm_map_legacy_map1, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+{ 0, has_modrm_map_vex_map1, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+};
+#endif

CodeVirtualizer/build/obj/include-private/xed-map-feature-tables.h

@@ -0,0 +1,204 @@
+/// @file xed-map-feature-tables.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(XED_MAP_FEATURE_TABLES_H)
+# define XED_MAP_FEATURE_TABLES_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+#include "xed-map-info.h"
+static XED_INLINE xed_bool_t xed_ild_has_modrm_legacy(xed_uint_t m)
+{
+   /* [2, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0] */
+   const xed_uint64_t data_const = 0x15aULL;
+   return (xed_bool_t)((data_const >> (2*m)) & 3);
+}
+static XED_INLINE xed_bool_t xed_ild_has_disp_legacy(xed_uint_t m)
+{
+   /* [2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0] */
+   const xed_uint64_t data_const = 0xaULL;
+   return (xed_bool_t)((data_const >> (2*m)) & 3);
+}
+static XED_INLINE xed_bool_t xed_ild_has_imm_legacy(xed_uint_t m)
+{
+   /* [7, 7, 0, 1, 1, 0, 0, 0, 0, 0, 0] */
+   const xed_uint64_t data_const = 0x11077ULL;
+   return (xed_bool_t)((data_const >> (4*m)) & 15);
+}
+static XED_INLINE xed_bool_t xed_ild_has_modrm_vex(xed_uint_t m)
+{
+   /* [0, 2, 1, 1, 0, 0, 0, 0, 0, 0, 0] */
+   const xed_uint64_t data_const = 0x58ULL;
+   return (xed_bool_t)((data_const >> (2*m)) & 3);
+}
+static XED_INLINE xed_bool_t xed_ild_has_disp_vex(xed_uint_t m)
+{
+   /* [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] */
+   return 0;
+   (void)m;
+}
+static XED_INLINE xed_bool_t xed_ild_has_imm_vex(xed_uint_t m)
+{
+   /* [0, 7, 0, 1, 0, 0, 0, 0, 0, 0, 0] */
+   const xed_uint64_t data_const = 0x1070ULL;
+   return (xed_bool_t)((data_const >> (4*m)) & 15);
+}
+static XED_INLINE xed_bool_t xed_ild_has_modrm_evex(xed_uint_t m)
+{
+   /* [0, 1, 1, 1, 0, 1, 1, 0, 0, 0, 0] */
+   const xed_uint64_t data_const = 0x1454ULL;
+   return (xed_bool_t)((data_const >> (2*m)) & 3);
+}
+static XED_INLINE xed_bool_t xed_ild_has_disp_evex(xed_uint_t m)
+{
+   /* [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] */
+   return 0;
+   (void)m;
+}
+static XED_INLINE xed_bool_t xed_ild_has_imm_evex(xed_uint_t m)
+{
+   /* [0, 7, 0, 1, 0, 0, 0, 0, 0, 0, 0] */
+   const xed_uint64_t data_const = 0x1070ULL;
+   return (xed_bool_t)((data_const >> (4*m)) & 15);
+}
+static XED_INLINE xed_bool_t xed_ild_has_modrm_xop(xed_uint_t m)
+{
+   /* [0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1] */
+   const xed_uint64_t data_const = 0x150000ULL;
+   return (xed_bool_t)((data_const >> (2*m)) & 3);
+}
+static XED_INLINE xed_bool_t xed_ild_has_disp_xop(xed_uint_t m)
+{
+   /* [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] */
+   return 0;
+   (void)m;
+}
+static XED_INLINE xed_bool_t xed_ild_has_imm_xop(xed_uint_t m)
+{
+   /* [0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 4] */
+   const xed_uint64_t data_const = 0x40100000000ULL;
+   return (xed_bool_t)((data_const >> (4*m)) & 15);
+}
+static XED_INLINE xed_bool_t xed_ild_has_modrm_knc(xed_uint_t m)
+{
+   /* [0] */
+   return 0;
+   (void)m;
+}
+static XED_INLINE xed_bool_t xed_ild_has_disp_knc(xed_uint_t m)
+{
+   /* [0] */
+   return 0;
+   (void)m;
+}
+static XED_INLINE xed_bool_t xed_ild_has_imm_knc(xed_uint_t m)
+{
+   /* [0] */
+   return 0;
+   (void)m;
+}
+static XED_INLINE xed_bool_t xed_ild_has_modrm(xed_uint_t vv, xed_uint_t m)
+{
+   const xed_uint64_t data_const[5] = {
+   /* [2, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0] legacy */
+    0x15aULL,
+   /* [0, 2, 1, 1, 0, 0, 0, 0, 0, 0, 0] vex */
+    0x58ULL,
+   /* [0, 1, 1, 1, 0, 1, 1, 0, 0, 0, 0] evex */
+    0x1454ULL,
+   /* [0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1] xop */
+    0x150000ULL,
+   /* [0] knc */
+    0x0ULL,
+   };
+   xed_assert(vv < 5);
+   return (xed_bool_t)((data_const[vv] >> (2*m)) & 3);
+}
+static XED_INLINE xed_bool_t xed_ild_has_disp(xed_uint_t vv, xed_uint_t m)
+{
+   const xed_uint64_t data_const[5] = {
+   /* [2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0] legacy */
+    0xaULL,
+   /* [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] vex */
+    0x0ULL,
+   /* [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] evex */
+    0x0ULL,
+   /* [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] xop */
+    0x0ULL,
+   /* [0] knc */
+    0x0ULL,
+   };
+   xed_assert(vv < 5);
+   return (xed_bool_t)((data_const[vv] >> (2*m)) & 3);
+}
+static XED_INLINE xed_bool_t xed_ild_has_imm(xed_uint_t vv, xed_uint_t m)
+{
+   const xed_uint64_t data_const[5] = {
+   /* [7, 7, 0, 1, 1, 0, 0, 0, 0, 0, 0] legacy */
+    0x11077ULL,
+   /* [0, 7, 0, 1, 0, 0, 0, 0, 0, 0, 0] vex */
+    0x1070ULL,
+   /* [0, 7, 0, 1, 0, 0, 0, 0, 0, 0, 0] evex */
+    0x1070ULL,
+   /* [0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 4] xop */
+    0x40100000000ULL,
+   /* [0] knc */
+    0x0ULL,
+   };
+   xed_assert(vv < 5);
+   return (xed_bool_t)((data_const[vv] >> (4*m)) & 15);
+}
+static XED_INLINE xed_bool_t xed_ild_map_valid_legacy(xed_uint_t m)
+{
+   /* [1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0] */
+   const xed_uint64_t data_const = 0x1fULL;
+   return (xed_bool_t)((data_const >> m) & 1);
+}
+static XED_INLINE xed_bool_t xed_ild_map_valid_vex(xed_uint_t m)
+{
+   /* [0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0] */
+   const xed_uint64_t data_const = 0xeULL;
+   return (xed_bool_t)((data_const >> m) & 1);
+}
+static XED_INLINE xed_bool_t xed_ild_map_valid_evex(xed_uint_t m)
+{
+   /* [0, 1, 1, 1, 0, 1, 1, 0, 0, 0, 0] */
+   const xed_uint64_t data_const = 0x6eULL;
+   return (xed_bool_t)((data_const >> m) & 1);
+}
+static XED_INLINE xed_bool_t xed_ild_map_valid_xop(xed_uint_t m)
+{
+   /* [0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1] */
+   const xed_uint64_t data_const = 0x700ULL;
+   return (xed_bool_t)((data_const >> m) & 1);
+}
+static XED_INLINE xed_bool_t xed_ild_map_valid_knc(xed_uint_t m)
+{
+   /* [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0] */
+   const xed_uint64_t data_const = 0x0ULL;
+   return (xed_bool_t)((data_const >> m) & 1);
+}
+const xed_map_info_t xed_legacy_maps[] = {
+{ 0x0F, 1, 0x38, 2, 2 },
+{ 0x0F, 1, 0x3A, 3, 2 },
+{ 0x0F, 1, 0x0F, 4, -1 },
+{ 0x0F, 0, 0, 1, 1 },
+};
+#endif

CodeVirtualizer/build/obj/include-private/xed3-dynamic-part1-capture.h

@@ -0,0 +1,41 @@
+/// @file include-private/xed3-dynamic-part1-capture.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(INCLUDE_PRIVATE_XED3_DYNAMIC_PART1_CAPTURE_H)
+# define INCLUDE_PRIVATE_XED3_DYNAMIC_PART1_CAPTURE_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+#include "xed3-nt-capture.h"
+static XED_INLINE xed_error_enum_t xed3_dynamic_decode_part1(xed_decoded_inst_t* d);
+
+static XED_INLINE xed_error_enum_t xed3_dynamic_decode_part1(xed_decoded_inst_t* d)
+{
+xed3_capture_nt_OSZ_NONTERM(d);
+if (xed3_operand_get_error(d)) {
+return xed3_operand_get_error(d);
+}
+xed3_capture_nt_ASZ_NONTERM(d);
+if (xed3_operand_get_error(d)) {
+return xed3_operand_get_error(d);
+}
+return XED_ERROR_NONE;
+}
+#endif

CodeVirtualizer/build/obj/include-private/xed3-operand-lu.h

@@ -0,0 +1,208 @@
+/// @file include-private/xed3-operand-lu.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(INCLUDE_PRIVATE_XED3_OPERAND_LU_H)
+# define INCLUDE_PRIVATE_XED3_OPERAND_LU_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+#include "xed-ild-eosz-getters.h"
+#include "xed-ild-easz-getters.h"
+#include "xed-internal-header.h"
+#include "xed-ild-private.h"
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_OSZ_REP(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_MODE_OSZ_REP(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_REG_REP(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_REP(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_MODE_OSZ_REP_REXW(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_REG_REP_RM(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_REG(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_ASZ_NONTERM_EASZ_MOD3_MODE_OSZ_REG_REP_RM(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MODE(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MODE_REXW(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_REP_WBNOINVD(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_ASZ_NONTERM_EASZ_MOD_MODE_MPXMODE_OSZ_REP(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_CLDEMOTE_MOD3_OSZ_REG_REP(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_CET_MOD3_MODE_OSZ_REG_REP_REXW_RM(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_OSZ_REP_REXW(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_OSZ_REP(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_OSZ_REG_REP(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_MODE_OSZ_REG_REP(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_ASZ_NONTERM_EASZ_MOD_REG_REP_RM(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD_REG_REP_RM(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_LOCK_MOD3(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_MODE_OSZ_REG_REP_REXW(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_LOCK_MOD3_REG(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_REP_TZCNT(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_LZCNT_MOD3_REP(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_LOCK_MOD3_MODE_OSZ_REG_REP_REXW(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD_MODE_SHORT_UD0(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MODE_OSZ(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_MODE_OSZ(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_MODE(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_REP(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MODE_OSZ_REP_REXW(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_LOCK_MOD3_MODE_REG(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_P4_REP_REXB_SRM(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_REP_REXB_SRM(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MODE_OSZ_REXW(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_REG_RM(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_MODE_OSZ_REG_REXW_RM(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_MODE_OSZ_REG_REXW(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MODEP5_REP(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_ASZ_NONTERM_EASZ_MODE(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_VEX_PREFIX_VL(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_REXW_VEX_PREFIX_VL(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_MODE_REG_REXW_RM_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_MODE_REXW_RM4_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_MODE_REXW_VEX_PREFIX_VL(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_ASZ_NONTERM_EASZ_MOD3_REXW_RM4_VEX_PREFIX_VL(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_REXW_VEX_PREFIX(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_MODE_REG_REXW_VEX_PREFIX_VL(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_VEX_PREFIX(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_MODE_REXW_VEX_PREFIX(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEX_PREFIX(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_VEXDEST210_7_VEXDEST3_VEX_PREFIX(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_REG_VEX_PREFIX_VL(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_REG_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MOD3_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX_VL_ZEROING(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MOD3_REXW_VEX_PREFIX(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEX_PREFIX_VL_ZEROING(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_ASZ_NONTERM_EASZ_MOD3_REXW_RM4_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL_ZEROING(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_ASZ_NONTERM_EASZ_MOD3_REG_REXW_RM4_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL_ZEROING(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEX_PREFIX_VL_ZEROING(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MASK_ZERO_MOD3_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEX_PREFIX_VL_ZEROING(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_ZEROING(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXW_VEX_PREFIX_ZEROING(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_ZEROING(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MASK_ZERO_MOD3_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_ZEROING(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_REXW_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MOD3_VEX_PREFIX_VL_ZEROING(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MOD3_REG_VEX_PREFIX_VL(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MOD3_REG_REXW_VEX_PREFIX_VL(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MASK_ZERO_MOD3_REG_REXW_VEX_PREFIX_VL_ZEROING(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_BCRC_MASK_ZERO_MOD3_MODE_REXRR_VEXDEST210_7_VEXDEST3_VEXDEST4_VEX_PREFIX_VL_ZEROING(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_MODE_REG_VEX_PREFIX_VL(const xed_decoded_inst_t* d);
+
+XED_NOINLINE xed_uint64_t xed_dec_lu_MOD3_MODE_VEXDEST210_7_VEXDEST3_VEX_PREFIX_VL(const xed_decoded_inst_t* d);
+
+#endif

CodeVirtualizer/build/obj/include-private/xed3-phash-lu-vv0.h

@@ -0,0 +1,31 @@
+/// @file include-private/xed3-phash-lu-vv0.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(INCLUDE_PRIVATE_XED3_PHASH_LU_VV0_H)
+# define INCLUDE_PRIVATE_XED3_PHASH_LU_VV0_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+extern const xed3_find_func_t xed3_phash_vv0_map_amd_3dnow[256];
+extern const xed3_find_func_t xed3_phash_vv0_map_legacy_map0[256];
+extern const xed3_find_func_t xed3_phash_vv0_map_legacy_map1[256];
+extern const xed3_find_func_t xed3_phash_vv0_map_legacy_map2[256];
+extern const xed3_find_func_t xed3_phash_vv0_map_legacy_map3[256];
+#endif

CodeVirtualizer/build/obj/include-private/xed3-phash-lu-vv1.h

@@ -0,0 +1,29 @@
+/// @file include-private/xed3-phash-lu-vv1.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(INCLUDE_PRIVATE_XED3_PHASH_LU_VV1_H)
+# define INCLUDE_PRIVATE_XED3_PHASH_LU_VV1_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+extern const xed3_find_func_t xed3_phash_vv1_map_vex_map1[256];
+extern const xed3_find_func_t xed3_phash_vv1_map_vex_map2[256];
+extern const xed3_find_func_t xed3_phash_vv1_map_vex_map3[256];
+#endif

CodeVirtualizer/build/obj/include-private/xed3-phash-lu-vv2.h

@@ -0,0 +1,31 @@
+/// @file include-private/xed3-phash-lu-vv2.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(INCLUDE_PRIVATE_XED3_PHASH_LU_VV2_H)
+# define INCLUDE_PRIVATE_XED3_PHASH_LU_VV2_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+extern const xed3_find_func_t xed3_phash_vv2_map_evex_map1[256];
+extern const xed3_find_func_t xed3_phash_vv2_map_evex_map2[256];
+extern const xed3_find_func_t xed3_phash_vv2_map_evex_map3[256];
+extern const xed3_find_func_t xed3_phash_vv2_map_evex_map5[256];
+extern const xed3_find_func_t xed3_phash_vv2_map_evex_map6[256];
+#endif

CodeVirtualizer/build/obj/include-private/xed3-phash-lu-vv3.h

@@ -0,0 +1,29 @@
+/// @file include-private/xed3-phash-lu-vv3.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(INCLUDE_PRIVATE_XED3_PHASH_LU_VV3_H)
+# define INCLUDE_PRIVATE_XED3_PHASH_LU_VV3_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+extern const xed3_find_func_t xed3_phash_vv3_map_amd_xop8[256];
+extern const xed3_find_func_t xed3_phash_vv3_map_amd_xop9[256];
+extern const xed3_find_func_t xed3_phash_vv3_map_amd_xopA[256];
+#endif

CodeVirtualizer/build/obj/include-private/xed3-phash.h

@@ -0,0 +1,37 @@
+/// @file include-private/xed3-phash.h
+
+// This file was automatically generated.
+// Do not edit this file.
+
+#if !defined(INCLUDE_PRIVATE_XED3_PHASH_H)
+# define INCLUDE_PRIVATE_XED3_PHASH_H
+/*BEGIN_LEGAL
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "xed-internal-header.h"
+#include "xed3-phash-lu-vv0.h"
+#include "xed3-phash-lu-vv1.h"
+#include "xed3-phash-lu-vv2.h"
+#include "xed3-phash-lu-vv3.h"
+#define XED_PHASH_MAP_LIMIT 11
+const xed3_find_func_t* xed3_phash_lu[4][XED_PHASH_MAP_LIMIT] = {
+{ xed3_phash_vv0_map_legacy_map0, xed3_phash_vv0_map_legacy_map1, xed3_phash_vv0_map_legacy_map2, xed3_phash_vv0_map_legacy_map3, xed3_phash_vv0_map_amd_3dnow, 0, 0, 0, 0, 0, 0 },
+{ 0, xed3_phash_vv1_map_vex_map1, xed3_phash_vv1_map_vex_map2, xed3_phash_vv1_map_vex_map3, 0, 0, 0, 0, 0, 0, 0 },
+{ 0, xed3_phash_vv2_map_evex_map1, xed3_phash_vv2_map_evex_map2, xed3_phash_vv2_map_evex_map3, 0, xed3_phash_vv2_map_evex_map5, xed3_phash_vv2_map_evex_map6, 0, 0, 0, 0 },
+{ 0, 0, 0, 0, 0, 0, 0, 0, xed3_phash_vv3_map_amd_xop8, xed3_phash_vv3_map_amd_xop9, xed3_phash_vv3_map_amd_xopA },
+};
+#endif

CodeVirtualizer/build/obj/prep-inputs

@@ -0,0 +1,370 @@
+C:/$Fanta/IntelXED/xed/datafiles/4fmaps-512/4fmaps-512-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/4fmaps-512/4fmaps-512-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/4fmaps-512/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/4vnniw-512/4vnniw-512-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/4vnniw-512/4vnniw-512-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/4vnniw-512/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/adl/adl-chips.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/amd-3dnow-maps.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/amdxop/amd-fma4-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/amdxop/amd-fma4-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/amdxop/amd-vpermil2-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/amdxop/amd-vpermil2-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/amdxop/amd-xop-dec.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/amdxop/amd-xop-enc.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/amdxop/amd-xop-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/amdxop/amd-xop-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/amdxop/amd-xop-maps.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/amdxop/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/amdxop/xop-state-bits.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/cpuid-amd.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd-3dnow.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd-3dnow.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd-base.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd-base.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd-chips.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd-clzero.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd-clzero.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd-invlpgb.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd-invlpgb.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd-mcommit.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd-mcommit.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd-monitorx.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd-monitorx.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd-rdpru.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd-rdpru.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd-snp.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd-snp.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd-sse4a.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd-sse4a.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd-svm.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd-svm.txt
+C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd3dnow-fields.txt
+C:/$Fanta/IntelXED/xed/datafiles/amx-spr/amx-operand-widths.txt
+C:/$Fanta/IntelXED/xed/datafiles/amx-spr/amx-reg-tables.txt
+C:/$Fanta/IntelXED/xed/datafiles/amx-spr/amx-reg-tables.txt
+C:/$Fanta/IntelXED/xed/datafiles/amx-spr/amx-regs.txt
+C:/$Fanta/IntelXED/xed/datafiles/amx-spr/amx-spr-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/amx-spr/amx-spr-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/amx-spr/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx-vnni/avx-vnni-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx-vnni/avx-vnni-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx-vnni/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx/avx-aes-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx/avx-aes-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx/avx-chips.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx/avx-fields.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx/avx-imm-enc.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx/avx-imm.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx/avx-isa-supp.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx/avx-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx/avx-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx/avx-movnt-store.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx/avx-movnt-store.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx/avx-operand-width.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx/avx-pclmul-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx/avx-pclmul-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx/avx-pointer-width.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx/avx-reg-table.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx/avx-reg-table.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx/avx-regs.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx/avx-state-bits.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx/avx-vex-enc.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx/avx-vex.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx/vex-maps.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512-bf16/bf16-element-type-enum.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512-bf16/bf16-element-types.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512-bf16/bf16-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512-bf16/bf16-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512-bf16/bf16-opnd-widths.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512-bf16/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512-fp16/avx512-evex-disp8-enc-fp16.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512-fp16/avx512-evex-disp8-fp16.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512-fp16/avx512-evex-enc-map5-and-6.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512-fp16/avx512-fp16-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512-fp16/avx512-fp16-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512-fp16/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512-fp16/operand-types.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512-fp16/state-bits.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512-fp16/widths.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512-skx/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512-skx/skx-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512-skx/skx-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512-skx/skx-state-bits.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512cd/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512cd/vconflict-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512cd/vconflict-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-addressing-dec.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-addressing-enc.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-disp8-enc.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-disp8.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-evex-dec.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-evex-enc.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-fields.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-foundation-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-foundation-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-kregs.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-operand-widths.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-pointer-width.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-reg-table-mask.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-reg-table-mask.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-reg-tables-b3.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-reg-tables-b3.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-reg-tables-n3.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-reg-tables-n3.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-reg-tables-r3.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-reg-tables-r3.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-regs.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-state-bits.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/avx512-strings.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512f/evex-maps.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512ifma/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512ifma/ifma-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512ifma/ifma-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512vbmi/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512vbmi/vbmi-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/avx512vbmi/vbmi-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/bdw/adox-adcx-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/bdw/adox-adcx-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/bdw/bdw-chips.txt
+C:/$Fanta/IntelXED/xed/datafiles/bdw/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/bitalg/bitalg-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/bitalg/bitalg-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/bitalg/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/cet/cet-fields.txt
+C:/$Fanta/IntelXED/xed/datafiles/cet/cet-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/cet/cet-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/cet/cet-nop-remove.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/cet/cet-nop-remove.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/cet/cet-regs.txt
+C:/$Fanta/IntelXED/xed/datafiles/cet/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/cldemote/cldemote-fields.txt
+C:/$Fanta/IntelXED/xed/datafiles/cldemote/cldemote-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/cldemote/cldemote-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/cldemote/cldemote-nop-mod.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/cldemote/cldemote-nop-mod.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/cldemote/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/clflushopt/clflushopt.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/clflushopt/clflushopt.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/clflushopt/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/clwb/clwb.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/clwb/clwb.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/clwb/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/clx/clx-chips.txt
+C:/$Fanta/IntelXED/xed/datafiles/cnl/cnl-chips.txt
+C:/$Fanta/IntelXED/xed/datafiles/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/cpx/cooper-lake-chips.txt
+C:/$Fanta/IntelXED/xed/datafiles/enqcmd/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/enqcmd/enqcmd-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/enqcmd/enqcmd-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/evex-map5-6/evex-map5-6.txt
+C:/$Fanta/IntelXED/xed/datafiles/fsgsbase/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/fsgsbase/fsgsbase-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/fsgsbase/fsgsbase-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/fsgsbase/fsgsbase-regs.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/future/future-chips.txt
+C:/$Fanta/IntelXED/xed/datafiles/gfni-vaes-vpcl/cpuid-sse.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/gfni-vaes-vpcl/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/gfni-vaes-vpcl/gfni-evex-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/gfni-vaes-vpcl/gfni-evex-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/gfni-vaes-vpcl/gfni-sse-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/gfni-vaes-vpcl/gfni-sse-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/gfni-vaes-vpcl/gfni-vex-isa.xed.txt
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+C:/$Fanta/IntelXED/xed/datafiles/gfni-vaes-vpcl/vaes-evex-isa.xed.txt
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+C:/$Fanta/IntelXED/xed/datafiles/hreset/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/hreset/hreset-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/hreset/hreset-isa.xed.txt
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+C:/$Fanta/IntelXED/xed/datafiles/hsw/hsw-chips.txt
+C:/$Fanta/IntelXED/xed/datafiles/hsw/invpcid-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/hsw/invpcid-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/hsw/lzcnt-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/hsw/lzcnt-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/hsw/rtm-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/hsw/rtm-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/hsw/vmfunc-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/hsw/vmfunc-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/hswavx/avx-fma-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/hswavx/avx-fma-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/hswavx/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/hswavx/gather-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/hswavx/gather-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/hswavx/hsw-int256-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/hswavx/hsw-int256-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/hswavx/hsw-state-bits.txt
+C:/$Fanta/IntelXED/xed/datafiles/hswavx/hsw-vshift-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/hswavx/hsw-vshift-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/hswavx/movnt-load-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/hswavx/movnt-load-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/hswavx/vsib-addressing-dec.txt
+C:/$Fanta/IntelXED/xed/datafiles/hswavx/vsib-addressing-enc.txt
+C:/$Fanta/IntelXED/xed/datafiles/hswbmi/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/hswbmi/hsw-bmi-vex-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/hswbmi/hsw-bmi-vex-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/hswbmi/hsw-reg-table.txt
+C:/$Fanta/IntelXED/xed/datafiles/hswbmi/hsw-reg-table.txt
+C:/$Fanta/IntelXED/xed/datafiles/hswbmi/tzcnt-isa.xed.txt
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+C:/$Fanta/IntelXED/xed/datafiles/icl/icl-chips.txt
+C:/$Fanta/IntelXED/xed/datafiles/ivbavx/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/ivbavx/fp16-element-type-enum.txt
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+C:/$Fanta/IntelXED/xed/datafiles/ivbavx/fp16-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/ivbavx/fp16-operand-types.txt
+C:/$Fanta/IntelXED/xed/datafiles/ivbavx/ivb-chips.txt
+C:/$Fanta/IntelXED/xed/datafiles/keylocker/cpuid.xed.txt
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+C:/$Fanta/IntelXED/xed/datafiles/keylocker/keylocker-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/keylocker/widths.txt
+C:/$Fanta/IntelXED/xed/datafiles/knc-kregs.txt
+C:/$Fanta/IntelXED/xed/datafiles/knl/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/knl/knl-chips.txt
+C:/$Fanta/IntelXED/xed/datafiles/knl/knl-fixup.txt
+C:/$Fanta/IntelXED/xed/datafiles/knl/knl-fixup.txt
+C:/$Fanta/IntelXED/xed/datafiles/knl/knl-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/knl/knl-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/knm/knm-chips.txt
+C:/$Fanta/IntelXED/xed/datafiles/knm/knm-disp8-enc.txt
+C:/$Fanta/IntelXED/xed/datafiles/knm/knm-disp8.txt
+C:/$Fanta/IntelXED/xed/datafiles/movdir/asize-reg-table.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/movdir/asize-reg-table.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/movdir/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/movdir/movdir-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/movdir/movdir-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/mpx/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/mpx/mpx-fields.txt
+C:/$Fanta/IntelXED/xed/datafiles/mpx/mpx-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/mpx/mpx-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/mpx/mpx-reg-check-enc.txt
+C:/$Fanta/IntelXED/xed/datafiles/mpx/mpx-reg-check.txt
+C:/$Fanta/IntelXED/xed/datafiles/mpx/mpx-reg-tables.txt
+C:/$Fanta/IntelXED/xed/datafiles/mpx/mpx-reg-tables.txt
+C:/$Fanta/IntelXED/xed/datafiles/mpx/mpx-regs.txt
+C:/$Fanta/IntelXED/xed/datafiles/oc2-extras.txt
+C:/$Fanta/IntelXED/xed/datafiles/pconfig/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/pconfig/pconfig-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/pconfig/pconfig-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/pku/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/pku/pku-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/pku/pku-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/pt/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/pt/intelpt-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/pt/intelpt-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/rdpid/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/rdpid/rdpid-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/rdpid/rdpid-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/rdrand/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/rdrand/rdrand-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/rdrand/rdrand-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/rdseed/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/rdseed/rdseed-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/rdseed/rdseed-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/serialize/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/serialize/serialize-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/serialize/serialize-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/sgx-enclv/sgx-enclv-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/sgx-enclv/sgx-enclv-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/sgx/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/sgx/sgx-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/sgx/sgx-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/sha/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/sha/sha-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/sha/sha-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/skl/skl-chips.txt
+C:/$Fanta/IntelXED/xed/datafiles/skx/skx-chips.txt
+C:/$Fanta/IntelXED/xed/datafiles/smap/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/smap/smap-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/smap/smap-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/spr/spr-chips.txt
+C:/$Fanta/IntelXED/xed/datafiles/tdx/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/tdx/tdx-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/tdx/tdx-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/tgl/tgl-chips.txt
+C:/$Fanta/IntelXED/xed/datafiles/tremont/tremont-chips.txt
+C:/$Fanta/IntelXED/xed/datafiles/tsx-ldtrk/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/tsx-ldtrk/tsx-ldtrk-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/tsx-ldtrk/tsx-ldtrk-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/uintr/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/uintr/uintr-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/uintr/uintr-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/uintr/uintr-regs.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/vbmi2/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/vbmi2/vbmi2-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/vbmi2/vbmi2-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/via/cpuid-via-padlock.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/via/via-padlock-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/via/via-padlock-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/via/xed-via-chips.txt
+C:/$Fanta/IntelXED/xed/datafiles/via/xed-via-operand-widths.txt
+C:/$Fanta/IntelXED/xed/datafiles/vnni/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/vnni/vnni-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/vnni/vnni-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/vp2intersect/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/vp2intersect/vp2intersect-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/vp2intersect/vp2intersect-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/vpopcntdq-512/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/vpopcntdq-512/vpopcntdq-512-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/vpopcntdq-512/vpopcntdq-512-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/vpopcntdq-vl/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/vpopcntdq-vl/vpopcntdq-vl-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/vpopcntdq-vl/vpopcntdq-vl-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/waitpkg/asize-rm-table.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/waitpkg/asize-rm-table.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/waitpkg/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/waitpkg/waitpkg-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/waitpkg/waitpkg-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/wbnoinvd/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/wbnoinvd/wbnoinvd-fields.txt
+C:/$Fanta/IntelXED/xed/datafiles/wbnoinvd/wbnoinvd-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/wbnoinvd/wbnoinvd-isa.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-addressing-modes-new.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-amd-prefetch.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-amd-prefetch.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-base-maps.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-chips.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-convert.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-eASZ.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-eASZ.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-eOSZ.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-fields.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-gpr8-dec-reg-table.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-gpr8-enc-reg-table.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-immediates.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-immediates.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-modrm-encode.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-nops.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-operand-element-type-enum-base.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-operand-types.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-operand-width.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-pointer-width.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-prefixes-encode.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-prefixes.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-reg-tables-xmm.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-reg-tables-xmm.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-reg-tables.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-reg-tables.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-regs-enc.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-regs.txt
+C:/$Fanta/IntelXED/xed/datafiles/xed-state-bits.txt
+C:/$Fanta/IntelXED/xed/datafiles/xsavec/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/xsavec/xsavec-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/xsavec/xsavec-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/xsaveopt/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/xsaveopt/xsaveopt-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/xsaveopt/xsaveopt-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/xsaves/cpuid.xed.txt
+C:/$Fanta/IntelXED/xed/datafiles/xsaves/xsaves-isa.txt
+C:/$Fanta/IntelXED/xed/datafiles/xsaves/xsaves-isa.txt
+C:\$Fanta\IntelXED\xed\datafiles\knc\lrb2-regs.txt
+C:\$Fanta\IntelXED\xed\datafiles\knc\uisa-spine.txt
+C:\$Fanta\IntelXED\xed\datafiles\knc\uisa-splitter.txt
+C:\$Fanta\IntelXED\xed\datafiles\knc\uisa-state-bits.txt

CodeVirtualizer/build/obj/wkit/LICENSE

@@ -0,0 +1,178 @@
+
+                                Apache License
+                          Version 2.0, January 2004
+                       http://www.apache.org/licenses/
+
+  TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+
+  1. Definitions.
+
+     "License" shall mean the terms and conditions for use, reproduction,
+     and distribution as defined by Sections 1 through 9 of this document.
+
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+
+     "Legal Entity" shall mean the union of the acting entity and all
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+     direction or management of such entity, whether by contract or
+     otherwise, or (ii) ownership of fifty percent (50%) or more of the
+     outstanding shares, or (iii) beneficial ownership of such entity.
+
+     "You" (or "Your") shall mean an individual or Legal Entity
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+         of the NOTICE file are for informational purposes only and
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+         notices within Derivative Works that You distribute, alongside
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+     the conditions stated in this License.
+
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+     any Contribution intentionally submitted for inclusion in the Work
+     by You to the Licensor shall be under the terms and conditions of
+     this License, without any additional terms or conditions.
+     Notwithstanding the above, nothing herein shall supersede or modify
+     the terms of any separate license agreement you may have executed
+     with Licensor regarding such Contributions.
+
+  6. Trademarks. This License does not grant permission to use the trade
+     names, trademarks, service marks, or product names of the Licensor,
+     except as required for reasonable and customary use in describing the
+     origin of the Work and reproducing the content of the NOTICE file.
+
+  7. Disclaimer of Warranty. Unless required by applicable law or
+     agreed to in writing, Licensor provides the Work (and each
+     Contributor provides its Contributions) on an "AS IS" BASIS,
+     WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+     implied, including, without limitation, any warranties or conditions
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+     PARTICULAR PURPOSE. You are solely responsible for determining the
+     appropriateness of using or redistributing the Work and assume any
+     risks associated with Your exercise of permissions under this License.
+
+  8. Limitation of Liability. In no event and under no legal theory,
+     whether in tort (including negligence), contract, or otherwise,
+     unless required by applicable law (such as deliberate and grossly
+     negligent acts) or agreed to in writing, shall any Contributor be
+     liable to You for damages, including any direct, indirect, special,
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+     of your accepting any such warranty or additional liability.
+
+  END OF TERMS AND CONDITIONS
+  

CodeVirtualizer/build/obj/wkit/README.md

@@ -0,0 +1,60 @@
+# Intel X86 Encoder Decoder  (Intel XED)
+
+![.github/workflows/ci.yml](https://github.com/intelxed/xed/workflows/.github/workflows/ci.yml/badge.svg)
+
+## Doxygen API manual and source build manual:
+
+https://intelxed.github.io
+
+## Bugs:
+
+https://github.com/intelxed/xed/issues/new
+       
+
+## Abbreviated *GITHUB* building instructions:
+
+```shell
+git clone https://github.com/intelxed/xed.git xed
+git clone https://github.com/intelxed/mbuild.git mbuild
+cd xed
+./mfile.py
+```
+
+then get your libxed.a from the obj directory.
+Add " --shared" if you want a shared object build.
+Add " install" if you want the headers & libraries put in to a kit in the "kits" directory.
+Add "C:/python3/python " before "./mfile.py" if on windows.
+
+## How to build the examples:
+
+There are two options:
+
+1) When building libxed you can also build the examples, from the main directory (above examples):
+
+```shell
+./mfile.py examples
+```
+
+and the compiled examples will be in obj/examples.
+    
+2) Build a compiled "kit" and the build the examples from within the kit:
+
+```shell
+./mfile.py install
+cd kits
+cd <whatever the kit is called>
+cd examples
+./mfile.py
+```
+    
+
+See source build documentation for more information.
+
+## Binary size?
+
+Concerned about large libraries or binaries? There are several options:
+ 
+1. Consider building with "--limit-strings"
+2. Strip the binaries
+3. Consider doing an encoder-only or decoder-only build if you only need one or the other.
+

CodeVirtualizer/build/obj/wkit/examples/README.txt

@@ -0,0 +1,49 @@
+# BEGIN_LEGAL
+# 
+# Copyright (c) 2021 Intel Corporation
+# 
+#   Licensed under the Apache License, Version 2.0 (the "License");
+#   you may not use this file except in compliance with the License.
+#   You may obtain a copy of the License at
+# 
+#       http://www.apache.org/licenses/LICENSE-2.0
+# 
+#   Unless required by applicable law or agreed to in writing, software
+#   distributed under the License is distributed on an "AS IS" BASIS,
+#   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#   See the License for the specific language governing permissions and
+#   limitations under the License.
+#   
+# END_LEGAL
+
+
+To build the examples, a relatively recent version of python 2.7 is required.
+
+================================
+STATIC LIBRARY XED BUILD:
+================================
+
+  Linux or Mac:
+
+    % ./mfile.py
+
+  Windows:
+
+   % C:/python27/python mfile.py
+
+================================
+DYNAMIC  LIBRARY XED BUILD:
+================================
+
+If you have a a shared-object (or DLL build on windows) you must also include
+"--shared" on the command line:
+
+  Linux or Mac:
+
+    % ./mfile.py --shared
+
+  Windows:
+
+   % C:/python27/python mfile.py --shared
+ 
+Add "--help" (no quotes) for more build options.

CodeVirtualizer/build/obj/wkit/examples/avltree.c

@@ -0,0 +1,400 @@
+/* BEGIN_LEGAL 
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+
+#include "avltree.h"
+#include <stdlib.h>
+#include <stdio.h>
+#include <stdint.h>
+#include <assert.h>
+
+typedef struct avl_node_s {
+    avl_key_t key;
+    void* data;
+    int32_t balance_factor;
+    uint32_t height;
+    struct avl_node_s* left;
+    struct avl_node_s* right;
+} avl_node_t;
+
+static void pad(int d) {
+    int i;
+    for(i=0;i<d;i++)
+        fputs("  ", stdout);
+}
+static void print_node(avl_node_t* n, int cur_depth) // recursive
+{
+
+    pad(cur_depth);
+    if (n) {
+#if defined(__GNUC__) && defined(__LP64__) && !defined(__APPLE__)
+# define AVL_FMT_LU "%lu"
+#else
+# define AVL_FMT_LU "%llu"
+#endif
+        fprintf(stdout, "H%u B%d (" AVL_FMT_LU ", %p)\n",
+                n->height,
+                n->balance_factor,
+                (uint64_t) n->key,
+                n->data);
+        print_node(n->left, cur_depth+1);
+        print_node(n->right, cur_depth+1);
+    }
+    else 
+        fprintf(stdout, "*empty*\n");
+    
+}
+#if 0
+static void print_tree(avl_tree_t* tree) {
+    printf("=============\n");
+    if (tree->top)
+        print_node(tree->top, 0);
+    else
+        fprintf(stdout, "*empty tree*\n");
+    printf("=============\n");
+}
+#endif
+
+void  avl_tree_init(avl_tree_t* tree)
+{
+    tree->top = 0;
+}
+
+static void clear(avl_node_t* n, int free_data) // recursive
+{
+    if (n->left) 
+        clear(n->left, free_data);
+    if (n->right) 
+        clear(n->right, free_data);
+    if (free_data && n->data)
+        free((void*)n->data);
+    free((void*)n);
+}
+void  avl_tree_clear(avl_tree_t* tree, int free_data)
+{
+    if (tree->top) {
+        clear(tree->top, free_data);
+    }
+    tree->top = 0;
+}
+
+static avl_node_t* find_node(avl_node_t* n, avl_key_t key) //recursive
+{
+    if (n->key == key)
+        return n;
+    else if (n->key > key && n->left)
+        return find_node(n->left, key);
+    else if (n->right)
+        return find_node(n->right, key);
+    return 0;
+}
+
+static void* find(avl_node_t* n, avl_key_t key) //recursive
+{
+    if (n)
+    {
+        avl_node_t* x = find_node(n,key);
+        if (x)
+            return x->data;
+    }
+    return 0;
+}
+
+void* avl_find  (avl_tree_t* tree, avl_key_t key)
+{
+    return find(tree->top, key);
+}
+
+
+
+
+
+
+
+
+
+
+static avl_node_t* find_node_lower_bound(avl_node_t* n, avl_key_t key,
+                                         avl_node_t** lb) //recursive
+{
+    //printf("NODE KEY=%lld\n", n->key);
+    if (n->key == key){
+        *lb = n;
+        return n;
+    }
+    else if (n->key > key && n->left) {
+        //printf("\tGO LEFT\n");
+        return find_node_lower_bound(n->left, key, lb);
+    }
+
+    if (n->key < key) {
+        // store the max lower bound we encounter when node key is < search
+        // key.
+        if (*lb  && (*lb)->key < n->key)
+            *lb = n;
+        else if (*lb == 0) 
+            *lb = n;
+    }
+    
+    if (n->right) {
+        //printf("\tGO RIGHT\n");
+        return find_node_lower_bound(n->right, key, lb);
+    }
+    return *lb;
+}
+
+static void* find_lower_bound(avl_node_t* n, avl_key_t key,
+                              avl_key_t* lbkey) // output
+{
+    avl_node_t* lbound = 0;
+    if (n)
+    {
+        (void) find_node_lower_bound(n,key, &lbound);
+        if (lbound) {
+            *lbkey = lbound->key;
+            return lbound->data;
+        }
+    }
+    return 0;
+}
+void* avl_find_lower_bound  (avl_tree_t* tree, avl_key_t key,
+                             avl_key_t* lbkey) // output
+{
+    return find_lower_bound(tree->top, key, lbkey);
+}
+
+
+
+
+
+
+static avl_node_t* make_node(avl_key_t key, void* value)
+{
+    avl_node_t* n = (avl_node_t*) malloc(sizeof(avl_node_t));
+    assert(n != 0);
+    n->key = key;
+    n->data = value;
+    n->balance_factor = 0;
+    n->height = 1;
+    n->left = n->right = 0;
+    return n;
+}
+
+static uint32_t mmax(uint32_t a, uint32_t b) {
+    return (a>b)?a:b;
+}
+
+static uint32_t update_height(avl_node_t* n)
+{
+    avl_node_t* a = n->left;
+    avl_node_t* b = n->right;
+    return 1 + mmax((a?a->height:0), (b?b->height:0));
+}
+static int32_t update_balance(avl_node_t* n)
+{
+    avl_node_t* a = n->left;
+    avl_node_t* b = n->right;
+    return (int32_t)(a?a->height:0) - (int32_t)(b?b->height:0);
+}
+static void update_height_and_balance(avl_node_t* n)
+{
+    n->height = update_height(n);
+    n->balance_factor = update_balance(n);
+}
+static avl_node_t* left_left(avl_node_t* n) // changes top node
+{
+    // knock the tree over to the right, making n->left in to the new top node.
+    // juggle subtrees
+
+    avl_node_t* new_top = n->left;
+    avl_node_t* old_top = n;
+    old_top->left = new_top->right;
+    new_top->right = old_top;
+    update_height_and_balance(old_top);
+    update_height_and_balance(new_top);
+    return new_top;
+}
+static avl_node_t* left_right(avl_node_t* n)
+{
+    // replace n->left with n->left->right, juggle subtrees
+    avl_node_t* l_node = n->left;
+    avl_node_t* lr_node = n->left->right;
+    n->left = lr_node;
+    l_node->right = lr_node->left;
+    lr_node->left = l_node;
+    update_height_and_balance(l_node);
+    update_height_and_balance(lr_node);
+    return n;
+}
+static avl_node_t* right_left(avl_node_t* n)
+{
+    // replace n->right with n->right->left, juggle subtrees
+    avl_node_t* r_node = n->right;
+    avl_node_t* rl_node = n->right->left;
+    n->right = rl_node;
+    r_node->left = rl_node->right;
+    rl_node->right = r_node;
+    update_height_and_balance(r_node);
+    update_height_and_balance(rl_node);
+    return n;
+}
+static avl_node_t* right_right(avl_node_t* n) // changes top node
+{
+    // knock the tree over to the left, making n->right in to the new top node.
+    // juggle subtrees
+    avl_node_t* new_top = n->right;
+    avl_node_t* old_top = n;
+    old_top->right = new_top->left;
+    new_top->left = old_top;
+    update_height_and_balance(old_top);
+    update_height_and_balance(new_top);
+    return new_top;
+}
+
+static avl_node_t* insert(avl_node_t* n,
+                          avl_key_t key, void* value, int free_data)
+{
+    if (n->key == key) {
+        if (n->data && free_data)
+            free((void*)n->data);
+        n->data = value;
+    }
+    else if (n->key > key) {
+        if (n->left) {
+            n->left = insert(n->left, key, value, free_data);
+            update_height_and_balance(n);
+        }
+        else  {
+            n->left = make_node(key,value);
+            update_height_and_balance(n);
+        }
+    }
+    else if (n->key < key) {
+        if (n->right) {
+            n->right = insert(n->right, key, value, free_data);
+            update_height_and_balance(n);
+        }
+        else {
+            n->right = make_node(key,value);
+            update_height_and_balance(n);
+        }
+    }
+    // rebalancing might change the current node
+    if (n->balance_factor >= 2) // heavy on the left
+    {
+        if (n->left->balance_factor == -1) {
+            // subtree is heavy right, make it heavy left, then knock it over
+            n = left_right(n);
+            n = left_left(n);
+        }
+        else if (n->left->balance_factor == 1) {
+            // subtree is heavy left, knock it over
+            n = left_left(n);
+        }
+    }
+    else if (n->balance_factor <= -2) // heavy on the right
+    {
+        if (n->right->balance_factor == 1) {
+            // subtree is heavy left, make it heavy right, then knock it over
+            n = right_left(n);
+            n = right_right(n);
+        }
+        else if (n->right->balance_factor == -1) {
+            // subtree is heavy right, knock it over
+            n = right_right(n);
+        }
+    }
+    update_height_and_balance(n); // FIXME: redundant, remove this
+    if  (n->balance_factor <= -2 || n->balance_factor >= 2) {
+        printf("FAIL\n");
+        print_node(n, 0);
+        assert (n->balance_factor < 2 && n->balance_factor > -2);
+    }
+    return n;
+}
+
+void  avl_insert(avl_tree_t* tree, avl_key_t key, void* value, int free_data)
+{
+    //rebalancing can change what the 'tree' points to as its top node.
+    if (tree->top)
+        tree->top = insert(tree->top, key, value, free_data);
+    else
+        tree->top = make_node(key,value);
+    //print_tree(tree);
+}
+
+
+typedef struct avl_link_node_s {
+    avl_node_t* node;
+    struct avl_link_node_s* next;
+} avl_link_node_t;
+
+void avl_iter_begin( avl_iter_t* iter, avl_tree_t* tree)
+{
+    iter->head = 0;
+    iter->tail = 0;
+    if (tree->top) {
+        avl_link_node_t* n = (avl_link_node_t*)malloc(sizeof(avl_link_node_t));
+        assert(n != 0);
+        n->node = tree->top;
+        n->next = 0;
+        iter->head = n;
+        iter->tail = n;
+    }
+    
+}
+
+void* avl_iter_current(avl_iter_t* iter)
+{
+    return iter->head->node->data;
+}
+
+static void add_link_node(avl_iter_t* iter, avl_node_t* anode)
+{
+    if (anode)
+    {
+        avl_link_node_t* n = (avl_link_node_t*)malloc(sizeof(avl_link_node_t));
+        assert(n != 0);
+        n->next = 0;
+        n->node = anode;
+        iter->tail->next = n;
+        iter->tail = n;
+    }
+ }
+void avl_iter_increment(avl_iter_t* iter)
+{
+    avl_link_node_t* p;
+    add_link_node(iter, iter->head->node->left);
+    add_link_node(iter, iter->head->node->right);
+    p = iter->head;
+    iter->head = p->next;
+    free(p);
+}
+int avl_iter_done(avl_iter_t* iter)
+{
+    return (iter->head == 0);
+}
+
+void avl_iter_cleanup(avl_iter_t* iter) // call if end iteration early
+{
+    struct avl_link_node_s* p = iter->head;
+    while(p) {
+        struct avl_link_node_s* t = p;
+        p = t->next;
+        free(t);
+    }
+}

CodeVirtualizer/build/obj/wkit/examples/avltree.h

@@ -0,0 +1,74 @@
+/* BEGIN_LEGAL 
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+
+
+#if !defined(_AVL_TREE_H_)
+# define _AVL_TREE_H_
+            
+#include <stdint.h>
+#if defined(AVL_KEY_32_BIT)
+typedef uint32_t avl_key_t;
+#else
+typedef uint64_t avl_key_t;
+#endif
+
+
+struct avl_node_s; // fwd decl
+
+typedef struct {
+    struct avl_node_s* top;
+} avl_tree_t;
+
+void  avl_tree_init(avl_tree_t* tree);
+
+// clear removes the tree nodes, not the data
+void  avl_tree_clear(avl_tree_t* tree, int free_data);
+
+void* avl_find(avl_tree_t* tree, avl_key_t key);
+
+// find the node with a key <= the given key. Returns found key value in
+// lbkey and the data payoad as a return value.
+void* avl_find_lower_bound(avl_tree_t* tree, avl_key_t key,
+                           avl_key_t* lbkey); // output
+
+
+// insert notices  key collisions and will free the associated data if
+// free_data is nonzero.
+void  avl_insert(avl_tree_t* tree, avl_key_t key, void* value, int free_data);
+
+#if 0 // DELETE not done yet.
+// return 1 on failure, 0 on success
+int   avl_delete(avl_tree_t* tree, avl_key_t key, int free_data);
+#endif
+
+
+struct avl_link_node_s; // fwd decl
+
+typedef struct avl_iter_s {
+    struct avl_link_node_s* head;
+    struct avl_link_node_s* tail;    
+} avl_iter_t;
+
+
+void avl_iter_begin( avl_iter_t* iter,avl_tree_t* tree);
+void* avl_iter_current(avl_iter_t* iter);
+void avl_iter_increment(avl_iter_t* iter);
+int avl_iter_done(avl_iter_t* iter);
+void avl_iter_cleanup(avl_iter_t* iter); // call if end iteration early
+
+#endif

CodeVirtualizer/build/obj/wkit/examples/mfile.py

@@ -0,0 +1,91 @@
+#!/usr/bin/env python
+# -*- python -*-
+# BEGIN_LEGAL
+# 
+# Copyright (c) 2021 Intel Corporation
+# 
+#   Licensed under the Apache License, Version 2.0 (the "License");
+#   you may not use this file except in compliance with the License.
+#   You may obtain a copy of the License at
+# 
+#       http://www.apache.org/licenses/LICENSE-2.0
+# 
+#   Unless required by applicable law or agreed to in writing, software
+#   distributed under the License is distributed on an "AS IS" BASIS,
+#   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+#   See the License for the specific language governing permissions and
+#   limitations under the License.
+#   
+# END_LEGAL
+
+import sys
+import os
+
+def _find_dir(d):
+    dir = os.getcwd()
+    last = ''
+    while dir != last:
+        target_dir = os.path.join(dir,d)
+        if os.path.exists(target_dir):
+            return target_dir
+        last = dir
+        (dir,tail) = os.path.split(dir)
+    return None
+
+def _fatal(m):
+    sys.stderr.write("\n\nXED build error: %s\n\n" % (m) )
+    sys.exit(1)
+
+def _try_mbuild_import():
+    try:
+        import mbuild
+        return True
+    except:
+        return False
+    
+def _find_add_import(d):
+    p = _find_dir(d)
+    if p and os.path.exists(p):
+        sys.path = [p] + sys.path
+        return
+    _fatal("Could not find {} directory".format(d))
+    
+def _find_mbuild_import():
+    if _try_mbuild_import():
+        return
+    _find_add_import('mbuild')
+    
+    
+def _find_common():
+    p = os.path.dirname(_find_dir('xed_build_common.py'))
+    if p and os.path.exists(p):
+        sys.path = [p] + sys.path
+        return
+    _fatal("Could not find xed_build_common.py")
+
+def setup():
+    if sys.version_info[0] == 3 and sys.version_info[1] < 4:        
+        _fatal("Need python version 3.4 or later.")
+    elif sys.version_info[0] == 2 and sys.version_info[1] < 7:        
+        _fatal("Need python version 2.7 or later.")
+    _find_mbuild_import()
+    # when building in the source tree the xed_build_common.py file is
+    # in the parent directory of the examples. When building in the
+    # kit that file is in the example source directory.
+    _find_common() 
+
+    
+def work():
+    import xed_build_common
+    import xed_examples_mbuild
+    try:
+        retval = xed_examples_mbuild.execute()
+    except Exception as e:
+        xed_build_common.handle_exception_and_die(e)
+    return retval
+    
+if __name__ == "__main__":
+    setup()
+    retval = work()
+    sys.exit(retval)
+ 

CodeVirtualizer/build/obj/wkit/examples/udhelp.H

@@ -0,0 +1,80 @@
+/* BEGIN_LEGAL 
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#if !defined(_UDHELP_H_)
+#define _UDHELP_H_
+
+#if defined(_MSC_VER)  && defined(XED_DBGHELP)
+// only try to use dbghelp on MSVS8 (2005) or later versions.
+# if _MSC_VER >= 1400
+#  define XED_USING_DEBUG_HELP
+# endif
+#endif
+
+#if defined(XED_USING_DEBUG_HELP)
+#include <windows.h>
+#include <dbghelp.h>
+extern "C" {
+#include "xed-symbol-table.h"
+}
+class dbg_help_client_t {
+
+    DWORD  error;
+    HANDLE hProcess;
+    DWORD  processId;
+
+    DWORD64 gBaseOfDll;
+    DWORD64 actual_base;
+    char* gModule;
+
+    bool initialized;
+
+    static BOOL CALLBACK enum_modules(
+        LPSTR   ModuleName, 
+        DWORD64 BaseOfDll,  
+        PVOID   UserContext );
+    
+    static BOOL CALLBACK dbg_help_client_t::enum_sym( 
+        PSYMBOL_INFO pSymInfo,   
+        ULONG SymbolSize,      
+        PVOID UserContext);
+
+    public:
+
+    xed_symbol_table_t sym_tab; // EXPOSED
+
+    dbg_help_client_t();
+
+    // returns 1 on success and 0 on failure. sets "initialized" to true on
+    // success
+    int init(char const* const fpath,
+             char const* const search_path);
+    bool valid() const  { return initialized; }
+
+    // if offset is nonzero, it will return best-fit symbols. If offset=0
+    // then only exact symbols are returned.
+    bool get_symbol(DWORD64 address, char* symbol_name, 
+                    int sym_name_buflen, DWORD64* offset=0);
+    
+    xed_bool_t get_file_and_line(xed_uint64_t address,
+                                 char** filename,
+                                 xed_uint32_t* line,
+                                 xed_uint32_t* column);
+    bool cleanup();
+};
+#endif
+#endif

CodeVirtualizer/build/obj/wkit/examples/udhelp.cpp

@@ -0,0 +1,323 @@
+/* BEGIN_LEGAL 
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+#include "udhelp.H"
+#include <stdio.h>
+extern "C" {
+#include "xed/xed-interface.h"
+#include "xed-examples-util.h" // xed_strdup
+}
+#include <process.h>
+#include <windows.h>
+#include <io.h>
+#include <cstring>
+#include <cstdio>
+#include <cassert>
+
+#if defined(XED_USING_DEBUG_HELP) && defined(XED_DECODER)
+BOOL CALLBACK dbg_help_client_t::enum_modules(
+    LPSTR   ModuleName, 
+    DWORD64 BaseOfDll,  
+    PVOID   UserContext )
+{
+    dbg_help_client_t* pthis = (dbg_help_client_t*)UserContext;
+    pthis->gBaseOfDll = BaseOfDll;
+    pthis->gModule=ModuleName;
+    return TRUE;
+}
+
+
+
+
+BOOL CALLBACK dbg_help_client_t::enum_sym( 
+    PSYMBOL_INFO pSymInfo,   
+    ULONG SymbolSize,      
+    PVOID UserContext)
+{
+    dbg_help_client_t* pthis = (dbg_help_client_t*)UserContext;
+    xed_uint64_t addr = static_cast<xed_uint64_t>(pSymInfo->Address);
+    
+    xst_add_global_symbol(&pthis->sym_tab,
+                          addr,
+                          xed_strdup(pSymInfo->Name));
+    return TRUE;
+    (void)SymbolSize; //pacify compiler warning about unused param
+}
+
+
+dbg_help_client_t::dbg_help_client_t() {
+    xed_symbol_table_init(&sym_tab);
+    initialized=false;
+}
+
+
+char* find_base_path(char* driver_name) {
+    char* x;
+    char* path = xed_strdup(driver_name);
+    x = strrchr(path,'\\');
+    if (x) {
+        *x = 0;
+    }
+    else {
+        x = strrchr(path,'/');
+        if (x) {
+            *x = 0;
+        }
+        else { 
+            /* FIXME */
+        }
+    }
+    return path;
+}
+
+static char* append3(const char* s1, const char* s2, const char* s3) {
+    xed_uint_t  n = 1;
+    char* p = 0;
+    assert(s1 != 0);
+    n += xed_strlen(s1);
+    if (s2)    n += xed_strlen(s2);
+    if (s3)    n += xed_strlen(s3);
+    p = (char*) malloc(sizeof(char)*n);
+    n=xed_strncpy(p,s1,n);
+    if (s2) n=xed_strncat(p,s2,n);
+    if (s3) n=xed_strncat(p,s3,n);
+    return p;
+}
+
+
+
+
+typedef union {
+  short a[2];
+  int   i;
+} union16_t;
+
+void get_dll_version(char* file_name, short u[4]) {
+    VS_FIXEDFILEINFO* vsf;
+    DWORD verlen, error, handle;
+    UINT len;
+    BOOL ret;
+    char* ver;
+
+    verlen = GetFileVersionInfoSize(file_name,&handle);
+    if (verlen == 0)  {
+        error = GetLastError();
+        fprintf(stderr,"GetFileVersionInfoSize: error code was %u (0x%x)\n", 
+               error, error);
+        exit(1);
+    }
+
+    ver = new char[verlen];
+    ret = GetFileVersionInfo(file_name,handle,verlen,ver);
+    if (!ret)  {
+        error = GetLastError();
+        fprintf(stderr,
+                "GetFileVersionInfo: error code was %u (0x%x)\n", error, error);
+        exit(1);
+    }
+   
+    // get a pointer to a location in ver stored in vsf
+    ret = VerQueryValue(ver,"\\",(LPVOID*)&vsf,&len);
+    if (!ret)  {
+        error = GetLastError();
+        fprintf(stderr,
+                "VerQueryValue: error code was %u (0x%x)\n", error, error);
+        exit(1);
+    }
+    assert(len == sizeof(VS_FIXEDFILEINFO));
+
+    union16_t upper,lower;
+    upper.i = vsf->dwFileVersionMS;
+    lower.i = vsf->dwFileVersionLS;
+    u[0] = upper.a[1];
+    u[1] = upper.a[0];
+    u[2] = lower.a[1];
+    u[3] = lower.a[0];
+
+    delete[] ver;
+}
+
+ 
+
+int dbg_help_client_t::init(char const* const path,
+                            char const* const search_path)
+{
+    DWORD64 dwBaseAddr=0;
+
+    int chars;
+    char exe_path[MAX_PATH];
+    chars = GetModuleFileName(NULL, exe_path, MAX_PATH);
+    if (chars == 0) { 
+        fprintf(stderr,"Could not find base path for XED executable\n");
+        fflush(stderr);
+        exit(1);
+    }
+
+    char* dir = find_base_path(exe_path);
+
+    char* dbghelp = append3(dir,"\\","dbghelp.dll");
+#if defined(PIN_CRT)
+    if (access(dbghelp,4) != 0)
+#else
+    if (_access_s(dbghelp,4) != 0)
+#endif
+    {
+        return 0;
+    }
+
+    SymSetOptions(SYMOPT_UNDNAME | SYMOPT_LOAD_LINES );
+    hProcess = GetCurrentProcess();
+    
+    if (SymInitialize(hProcess, NULL, FALSE))     {
+        // nothing
+    }
+    else    {
+        error = GetLastError();
+        fprintf(stderr,"SymInitialize returned error : %u 0x%x\n",
+                error, error);
+        fflush(stderr);
+        return 0;
+    }
+
+    if (search_path)
+    {
+        if (SymSetSearchPath(hProcess, search_path))   {
+            // nothing
+        }
+        else    {
+            error = GetLastError();
+            fprintf(stderr,"SymSetSearchPath returned error : %u 0x%x\n",
+                    error, error);
+            fflush(stderr);
+            return 0;
+        }
+    }
+    
+    actual_base = SymLoadModuleEx(hProcess, NULL, path, NULL, 
+                                  dwBaseAddr, 0, NULL, 0);
+    if (actual_base) {
+        // nothing
+    }
+    else    {
+        error = GetLastError();
+        fprintf(stderr,"SymLoadModuleEx returned error : %u 0x%x\n", 
+                error, error);
+        fflush(stderr);
+        return 0;
+    }
+
+
+    if (SymEnumerateModules64(hProcess, 
+                        (PSYM_ENUMMODULES_CALLBACK64)enum_modules, this)) {
+        // nothing
+    }
+    else    {
+        error = GetLastError();
+        fprintf(stderr,"SymEnumerateModules64 returned error : %d 0x%x\n",
+               error, error);
+        fflush(stderr);
+        return 0;
+    }
+
+    if (SymEnumSymbols(hProcess, actual_base, 0, enum_sym, this))    {
+        // nothing
+    }
+    else    {
+        error = GetLastError();
+        fprintf(stderr,"SymEnumSymbols failed: %d 0x%x\n", error, error);
+        fflush(stderr);
+        return 0;
+    }
+
+    initialized = true;
+    return 1;
+}
+
+bool dbg_help_client_t::get_symbol(DWORD64 address, char* symbol_name, 
+                                   int sym_name_buflen, DWORD64* offset) 
+{
+    DWORD64  displacement;
+    ULONG64 n = (sizeof(SYMBOL_INFO) +
+                 sym_name_buflen*sizeof(TCHAR) +
+                 sizeof(ULONG64) - 1) / sizeof(ULONG64);
+    ULONG64* buffer = new ULONG64[n];
+    PSYMBOL_INFO pSymbol = (PSYMBOL_INFO)buffer;
+            
+    pSymbol->SizeOfStruct = sizeof(SYMBOL_INFO);
+    pSymbol->MaxNameLen = sym_name_buflen;
+    
+    if (SymFromAddr(hProcess, address, &displacement, pSymbol))    {
+        if (offset)
+            *offset = displacement;
+        if (offset  || displacement == 0) {
+            xed_strncpy(symbol_name, pSymbol->Name, sym_name_buflen);
+            // force a null. WINDOWS doesn't have strlcpy()
+            symbol_name[sym_name_buflen-1] = 0;
+            delete [] buffer;
+            return 0;
+        }
+        else {
+            /* not at the beginning of a symbol and no offset was supplied */
+            delete [] buffer;
+            return 1;
+        }
+    }
+    else    {
+        error = GetLastError();
+        fprintf(stderr,
+                "SymFromAddr returned error : %d 0x%x for address %llx\n", 
+                error, error, address);
+        delete [] buffer;
+        return 1;
+    }
+
+
+}
+
+bool dbg_help_client_t::cleanup() {
+    if (SymCleanup(hProcess))    {
+        return 0;
+    }
+    else    {
+        error = GetLastError();
+        fprintf(stderr,
+                "SymCleanup returned error : %d 0x%x\n", error,error);
+        return 1;
+    }
+}
+
+xed_bool_t dbg_help_client_t::get_file_and_line(xed_uint64_t address,
+                                                char** filename,
+                                                xed_uint32_t* line,
+                                                xed_uint32_t* column)
+{
+    DWORD dw_column;
+    IMAGEHLP_LINE64 imgline;
+    imgline.SizeOfStruct = sizeof(IMAGEHLP_LINE64);
+    if (SymGetLineFromAddr64(hProcess, address, &dw_column, &imgline))
+    {
+        xed_uint32_t len = xed_strlen(imgline.FileName);
+        *column = dw_column;
+        *line = imgline.LineNumber;
+        *filename =(char*) malloc(len+1);
+        xed_strncpy(*filename, imgline.FileName, len+1);
+        return 1; //success
+    }
+    return 0; //failed
+}
+
+#endif

CodeVirtualizer/build/obj/wkit/examples/xed-asmparse.h

@@ -0,0 +1,101 @@
+/* BEGIN_LEGAL 
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+
+#include <stdint.h>
+#include <stdarg.h>
+
+#include "xed/xed-interface.h"
+
+typedef struct slist_s {
+    char* s;
+    struct slist_s* next;
+} slist_t;
+
+typedef enum {
+    OPND_INVALID,
+    OPND_REG,
+    OPND_IMM, /* Literal that corresponds to immediate or displacement */
+    OPND_MEM,
+    OPND_DECORATOR,
+    OPND_FARPTR
+} opnd_type_t;
+
+typedef struct {
+    unsigned int len;
+    char* seg;
+    char* base;
+    char* index;
+    char* disp;
+    int64_t ndisp; // disp converted to a number
+    char* scale;
+    unsigned int nscale; // 0(invalid), 1,2,4,8
+    int minus;
+    char const* mem_size;  // NOT allocated; do not free. Pointer to static string
+    uint32_t mem_bits;  // mem_size converted to bits
+} memparse_rec_t;
+
+typedef struct {
+    char* seg;
+    char* offset;
+    int64_t seg_value;
+    int64_t offset_value;
+} farptr_rec_t;
+
+typedef struct opnd_list_s {
+    char* s;
+    opnd_type_t type;
+    memparse_rec_t mem;
+    farptr_rec_t farptr;
+    slist_t* decorators;
+    int64_t imm;
+    xed_reg_enum_t reg;
+    struct opnd_list_s* next;
+} opnd_list_t;
+
+
+typedef struct {
+    char* input;
+    int valid;
+    int mode; // 16/32/64
+    char* iclass_str;
+    xed_iclass_enum_t iclass_e;
+    slist_t* prefixes; // reversed
+    slist_t* operands; // reversed
+    opnd_list_t* opnds;
+
+    /* parsing state used to resolve ambiguous cases */
+    xed_bool_t seen_repe;
+    xed_bool_t seen_repne;
+    xed_bool_t seen_lock;
+    xed_bool_t seen_cr;
+    xed_bool_t seen_dr;
+    xed_bool_t seen_far_ptr;
+    int deduced_vector_length;
+} xed_enc_line_parsed_t;
+
+void asp_set_verbosity(int v);
+void asp_error_printf(const char* format, ...);
+void asp_printf(const char* format, ...);
+void asp_dbg_printf(const char* format, ...);
+
+xed_enc_line_parsed_t* asp_get_xed_enc_node(void);
+void asp_delete_xed_enc_line_parsed_t(xed_enc_line_parsed_t* v);
+void asp_parse_line(xed_enc_line_parsed_t* v);
+void asp_print_parsed_line(xed_enc_line_parsed_t* v);
+
+

CodeVirtualizer/build/obj/wkit/examples/xed-dec-print.c

@@ -0,0 +1,62 @@
+/* BEGIN_LEGAL 
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+/// @file xed-dec-print.c
+// decode and print
+
+#include "xed/xed-interface.h"
+#include "xed-examples-util.h"
+#include <stdio.h>
+
+int main(int argc, char** argv);
+
+int 
+main(int argc, char** argv)
+{
+    xed_error_enum_t xed_error;
+    xed_decoded_inst_t xedd;
+#define BUFLEN  1000
+    char buffer[BUFLEN];
+    xed_bool_t ok;
+    xed_machine_mode_enum_t mmode;
+    xed_address_width_enum_t stack_addr_width;
+
+    // example instructions
+    xed_uint_t   bytes = 2;
+    xed_uint8_t  itext[XED_MAX_INSTRUCTION_BYTES] = { 0x00, 0x00 };
+
+    xed_tables_init();
+    
+    mmode=XED_MACHINE_MODE_LEGACY_32;
+    stack_addr_width =XED_ADDRESS_WIDTH_32b;
+    xed_decoded_inst_zero(&xedd);
+    xed_decoded_inst_set_mode(&xedd, mmode, stack_addr_width);
+    xed_error = xed_decode(&xedd, itext,bytes);
+    if (xed_error == XED_ERROR_NONE)
+    {
+        ok = xed_format_context(XED_SYNTAX_ATT, &xedd, buffer, BUFLEN, 0, 0, 0);
+        if (ok) {
+            printf("%s\n", buffer);
+            return 0;
+        }
+        printf("Error disassembling\n");
+        return 1;
+    }
+    printf("Decoding error\n");
+    return 1;
+    (void) argv; (void)argc;
+}

CodeVirtualizer/build/obj/wkit/examples/xed-disas-elf.c

@@ -0,0 +1,773 @@
+/* BEGIN_LEGAL 
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+
+#include "xed-disas-elf.h"  // early, to get defines
+
+#if defined(XED_DECODER) && defined(XED_ELF_READER)
+
+////////////////////////////////////////////////////////////////////////////
+
+
+#include "xed-disas-elf.h"
+#if defined(XED_PRECOMPILED_ELF_DWARF)
+# include <libelf.h>
+#else  // system version
+# include <elf.h>
+# if defined(XED_DWARF)
+#   include <libelf.h>
+# endif
+#endif
+#if defined(XED_DWARF)
+# include <dwarf.h>
+# include <libdwarf.h>
+#endif
+
+#include "xed/xed-interface.h"
+#include "xed-examples-util.h"
+#include "xed-symbol-table.h"
+#include "avltree.h"
+
+#include <string.h>
+#include <stdlib.h>
+#include <stdio.h>
+
+////////////////////////////////////////////////////////////////////////////
+
+
+// DWARF HANDLING
+
+#if defined(XED_DWARF)
+static void dwarf_handler(Dwarf_Error err, Dwarf_Ptr errarg)
+{
+    (void)err;
+    (void)errarg;
+}
+
+/* file 0 does not exist */
+typedef struct {
+    xed_uint32_t line;
+    xed_uint32_t file;
+} line_number_entry_t;
+
+void line_number_entry_init(line_number_entry_t*p,
+                            xed_uint32_t a_line,
+                            xed_uint32_t a_file)
+{
+    p->line=a_line;
+    p->file=a_file;
+}
+
+/* addresses  -> line_number_entry_t values */
+static avl_tree_t line_number_table; //xed_uint64_t -> line_number_entry_t*
+
+/* start at 1, 0 means no file */
+static xed_uint32_t global_file_num = 1;
+
+/* global file num -> string */
+static avl_tree_t global_file_name_table; // xed_uint64_t -> char*
+
+/* local file num -> global file num. This one is restarted for each
+ * compilation unit. */
+static avl_tree_t file_name_table; // xed_uint64_t -> xed_uint64_t
+
+static char const* unknown = "Unknown";
+
+static int find_line_number(xed_uint64_t addr,
+                            char** file,
+                            xed_uint32_t* line)
+{
+    line_number_entry_t* p =
+        (line_number_entry_t*) avl_find(&line_number_table,
+                                        addr);
+    if (!p)
+        return 0;
+
+    char *q = (char*) avl_find(&global_file_name_table,p->file);
+    if (q)
+        *file = q;
+    else
+        *file = (char*)unknown;
+    *line = p->line;
+    return 1;
+}
+
+//external interface, called indirectly
+void find_line_number_info(xed_uint64_t addr)
+{
+    char* file_name;
+    xed_uint32_t line_number;
+    if (find_line_number(addr,
+                         &file_name,
+                         &line_number))
+    {
+        printf("  # %s:%d", file_name, line_number);
+    }
+}
+
+
+static void read_dwarf_line_numbers(void* region,
+                                    unsigned int region_bytes)
+{
+    int dres;
+    Dwarf_Debug dbg;
+    Dwarf_Unsigned next_cu_offset;;
+    
+    elf_version(EV_CURRENT);
+
+    Elf* elf = elf_memory(XED_STATIC_CAST(char*,region), region_bytes);
+    dres = dwarf_elf_init(elf, DW_DLC_READ, dwarf_handler, 0, &dbg, 0);
+    if (dres != DW_DLV_OK) 
+        return;
+
+    avl_tree_init(&line_number_table);
+    avl_tree_init(&global_file_name_table);
+    avl_tree_init(&file_name_table);
+
+    while (1)
+    {
+        int i;
+        Dwarf_Die cu_die;
+        Dwarf_Half tag;
+        Dwarf_Line* line_buf;
+        Dwarf_Signed line_count;
+
+        dres = dwarf_next_cu_header(dbg, 0, 0, 0, 0, &next_cu_offset, 0);
+        if (dres != DW_DLV_OK) 
+            break;
+        // Doc says first die is compilation unit
+        if (dwarf_siblingof(dbg, 0, &cu_die, 0) != DW_DLV_OK)
+            continue;
+        if ( (dwarf_tag(cu_die, &tag, 0) != DW_DLV_OK) ||
+             (tag != DW_TAG_compile_unit))
+        {
+            dwarf_dealloc(dbg, cu_die, DW_DLA_DIE);
+            continue;
+        }
+        dres = dwarf_srclines(cu_die, &line_buf, &line_count, 0);
+        if (dres != DW_DLV_OK)
+        {
+            dwarf_dealloc(dbg, cu_die, DW_DLA_DIE);
+            continue;
+        }
+        for (i = 0; i < line_count; i++)
+        {
+            Dwarf_Addr line_addr;
+            Dwarf_Unsigned line_num, file_num;
+            Dwarf_Signed line_off;
+            Dwarf_Bool line_end;
+            char* file_name;
+            
+            dwarf_lineaddr(line_buf[i], &line_addr, 0);
+            dwarf_lineno(line_buf[i], &line_num, 0);
+            dwarf_line_srcfileno(line_buf[i], &file_num, 0);
+            dwarf_lineoff(line_buf[i], &line_off, 0);
+            dwarf_lineendsequence(line_buf[i], &line_end, 0);
+
+            if (file_num)
+            {
+                dres = dwarf_linesrc(line_buf[i], &file_name, 0);
+                if (dres == DW_DLV_OK) {
+                    
+                    if ( avl_find(&file_name_table, file_num) == 0)
+                    {
+                        avl_insert(&file_name_table,
+                                   file_num,
+                                   (void*)(xed_addr_t)global_file_num,0);
+                        
+                        avl_insert(&global_file_name_table,
+                                   global_file_num,
+                                   xed_strdup(file_name),1);
+                        global_file_num++;
+                    }
+                    dwarf_dealloc(dbg, file_name, DW_DLA_STRING);
+                }
+            }
+            xed_uint32_t gfn = (xed_uint32_t) (xed_addr_t) avl_find(
+                                                  &file_name_table, file_num);
+            line_number_entry_t* p =
+                 (line_number_entry_t*)malloc(sizeof(line_number_entry_t));
+            line_number_entry_init(p, line_num, gfn);
+            avl_insert(&line_number_table, line_addr, p, 1);
+
+        } /* for */
+        avl_tree_clear(&file_name_table,0);
+        dwarf_srclines_dealloc(dbg, line_buf, line_count);
+        dwarf_dealloc(dbg, cu_die, DW_DLA_DIE);
+    }  /* while */
+    dwarf_finish(dbg, 0);
+    elf_end(elf);
+}
+
+#endif
+////////////////////////////////////////////////////////////////////////////
+
+
+char* 
+lookup32(Elf32_Word stoffset,
+         void* start,
+         unsigned int len,
+         Elf32_Off offset)
+{
+    char* p = (char*)start + offset;
+    char* q = p + stoffset;
+    if ((unsigned char*)q >= (unsigned char*)start+len)
+        return 0;
+    if ((unsigned char*)q < (unsigned char*)start)
+      return 0;
+    return q;
+}
+
+char* 
+lookup64(Elf64_Word stoffset,
+	 void* start,
+         unsigned int len,
+	 Elf64_Off offset)
+{
+  char* p = (char*)start + offset;
+  char* q = p + stoffset;
+  if ((unsigned char*)q >= (unsigned char*)start+len)
+      return 0;
+  if ((unsigned char*)q < (unsigned char*)start)
+      return 0;
+  return q;
+}
+
+void xed_disas_elf_init(void) {
+    xed_register_disassembly_callback(xed_disassembly_callback_function);
+}
+
+
+
+void
+disas_test32(xed_disas_info_t* fi,
+	     void* start,
+             unsigned int length,
+	     Elf32_Off offset,
+	     Elf32_Word size, 
+             Elf32_Addr runtime_vaddr,
+             xed_symbol_table_t* symbol_table)
+{
+  unsigned char* hard_limit = (unsigned char*)start + length;
+
+  fi->s =  (unsigned char*)start;
+  fi->a = (unsigned char*)start + offset;
+  if (fi->a >  hard_limit)
+      fi->a = hard_limit;
+  if ((void*)(fi->a) < start) {
+      fprintf(stderr,"# malformed region limit. stopping\n");
+      exit(1);
+  }
+  fi->q = fi->a + size; // end of region
+  if (fi->q > hard_limit)
+      fi->q = hard_limit;
+
+  fi->runtime_vaddr = runtime_vaddr + fi->fake_base;
+  fi->runtime_vaddr_disas_start = fi->addr_start;
+  fi->runtime_vaddr_disas_end = fi->addr_end;
+  fi->symfn = get_symbol;
+  fi->caller_symbol_data = symbol_table;
+  fi->line_number_info_fn = 0;
+#if defined(XED_DWARF)
+  fi->line_number_info_fn = find_line_number_info;
+#endif
+  // pass in a function to retrieve valid symbol names
+  xed_disas_test(fi);
+}
+
+static void
+disas_test64(xed_disas_info_t* fi,
+	     void* start,
+             unsigned int length,
+	     Elf64_Off offset,
+	     Elf64_Xword size,
+             Elf64_Addr runtime_vaddr,
+             xed_symbol_table_t* symbol_table)
+{
+  unsigned char* hard_limit = (unsigned char*)start + length;
+  fi->s =  (unsigned char*)start;
+
+  fi->a = (unsigned char*)start + offset;
+  if (fi->a >  hard_limit)
+      fi->a = hard_limit;
+  if ((void*)(fi->a) < start) {
+      fprintf(stderr,"# malformed region limit. stopping\n");
+      exit(1);
+  }
+  
+  fi->q = fi->a + size; // end of region
+  if (fi->q > hard_limit)
+      fi->q = hard_limit;
+  
+  fi->runtime_vaddr = runtime_vaddr + fi->fake_base;
+  fi->runtime_vaddr_disas_start = fi->addr_start;
+  fi->runtime_vaddr_disas_end = fi->addr_end;
+  fi->symfn = get_symbol;
+  fi->caller_symbol_data = symbol_table;
+
+  fi->line_number_info_fn = 0;
+#if defined(XED_DWARF)
+  fi->line_number_info_fn = find_line_number_info;
+#endif
+  // pass in a function to retrieve valid symbol names
+  xed_disas_test(fi);
+}
+
+#if !defined(EM_IAMCU)  
+# define EM_IAMCU 3
+#endif
+
+static int check_binary_32b(void* start) {
+    Elf32_Ehdr* elf_hdr = (Elf32_Ehdr*) start;
+    if ( elf_hdr->e_machine == EM_386   ||
+         elf_hdr->e_machine == EM_IAMCU )  
+        return 1;
+    return 0;
+}
+
+static int range_check(void* p, unsigned int esize, void* start, void* end)  {
+    if (p < start || (unsigned char*)p+esize > (unsigned char*)end)
+        return 1;
+    return 0;
+}
+
+void
+process_elf32(xed_disas_info_t* fi,
+              void* start,
+	      unsigned int length,
+              xed_symbol_table_t* symbol_table)
+{
+    Elf32_Ehdr* elf_hdr = (Elf32_Ehdr*) start;
+    Elf32_Off shoff = elf_hdr->e_shoff;  // section hdr table offset
+    Elf32_Shdr* shp = (Elf32_Shdr*) ((char*)start + shoff);
+    int sect_strings  = elf_hdr->e_shstrndx;
+    xed_uint_t nsect = elf_hdr->e_shnum;
+    xed_uint_t i;
+    unsigned char* hard_limit = (unsigned char*)start + length;
+
+    if ((void*)shp < start)
+        return;
+            
+    for(i=0;i<nsect;i++) {
+        char* name;
+        xed_bool_t text = 0;
+        
+        if (range_check(shp+i, sizeof(Elf32_Shdr), start, hard_limit))
+            break;
+        if (range_check(shp+sect_strings, sizeof(Elf32_Shdr), start, hard_limit))
+            break;
+                
+        name = lookup32(shp[i].sh_name, start,  length,
+                        shp[sect_strings].sh_offset);
+
+        if (shp[i].sh_type == SHT_PROGBITS) {
+            if (fi->target_section) {
+                if (name && strcmp(fi->target_section, name)==0) 
+                    text = 1;
+            }
+            else if (shp[i].sh_flags & SHF_EXECINSTR)
+                text = 1;
+        }
+
+        if (text && name) {
+            if (fi->xml_format == 0) {
+                printf("# SECTION " XED_FMT_D " ", i);
+                printf("%25s ", name);
+                printf("addr " XED_FMT_LX " ",
+                       XED_STATIC_CAST(xed_uint64_t,shp[i].sh_addr)); 
+                printf("offset " XED_FMT_LX " ",
+                       XED_STATIC_CAST(xed_uint64_t,shp[i].sh_offset));
+                printf("size " XED_FMT_LU " ", 
+                       XED_STATIC_CAST(xed_uint64_t,shp[i].sh_size));
+                printf("type " XED_FMT_LU "\n", 
+                       XED_STATIC_CAST(xed_uint64_t,shp[i].sh_type));
+            }
+
+            xst_set_current_table(symbol_table,i);
+            disas_test32(fi,
+                         start, length,  shp[i].sh_offset, shp[i].sh_size,
+                         shp[i].sh_addr,
+                         symbol_table);
+
+	}
+
+    }
+}
+
+/*-----------------------------------------------------------------*/
+
+int check_binary_64b(void* start) {
+#if !defined(EM_X86_64)  /* EM_X86_64 is not present on android */
+# define EM_X86_64 62
+#endif
+#if !defined(EM_L1OM) /* Oh, not zero */
+# define EM_L1OM  180
+#endif
+#if !defined(EM_K1OM) /* Oh, not zero */
+# define EM_K1OM  181
+#endif
+
+    Elf64_Ehdr* elf_hdr = (Elf64_Ehdr*) start;
+    if (elf_hdr->e_machine == EM_X86_64 ||
+        elf_hdr->e_machine == EM_L1OM ||
+        elf_hdr->e_machine == EM_K1OM) 
+        return 1;
+    return 0;
+}
+
+
+/*-----------------------------------------------------------------*/
+void
+process_elf64(xed_disas_info_t* fi,
+              void* start,
+	      unsigned int length,
+              xed_symbol_table_t* symbol_table)
+{
+    Elf64_Ehdr* elf_hdr = (Elf64_Ehdr*) start;
+    Elf64_Off shoff = elf_hdr->e_shoff;  // section hdr table offset
+    Elf64_Shdr* shp = (Elf64_Shdr*) ((char*)start + shoff);
+    Elf64_Half sect_strings  = elf_hdr->e_shstrndx;
+    Elf64_Half nsect = elf_hdr->e_shnum;
+    unsigned char* hard_limit = (unsigned char*)start + length;
+    unsigned int i;
+    xed_bool_t text = 0;
+
+    if (CLIENT_VERBOSE1) 
+        printf("# sections %d\n" , nsect);
+    
+    if ((void*)shp < start)
+        return;
+
+    for( i=0;i<nsect;i++)  {
+        char* name = 0;
+        
+        if (range_check(shp+i,sizeof(Elf64_Shdr), start, hard_limit))
+            break;
+        if (range_check(shp+sect_strings,sizeof(Elf64_Shdr), start, hard_limit))
+            break;
+        
+        name = lookup64(shp[i].sh_name, start, length,
+                        shp[sect_strings].sh_offset);
+        
+        text = 0;
+        if (shp[i].sh_type == SHT_PROGBITS) {
+            if (fi->target_section) {
+                if (name && strcmp(fi->target_section, name)==0) 
+                    text = 1;
+            }
+            else if (shp[i].sh_flags & SHF_EXECINSTR)
+                text = 1;
+        }
+
+        if (text && name) {
+            if (fi->xml_format == 0) {
+                printf("# SECTION " XED_FMT_U " ", i);
+                printf("%25s ", name);
+                printf("addr " XED_FMT_LX " ",
+                       XED_STATIC_CAST(xed_uint64_t,shp[i].sh_addr)); 
+                printf("offset " XED_FMT_LX " ",
+                       XED_STATIC_CAST(xed_uint64_t,shp[i].sh_offset));
+                printf("size " XED_FMT_LU "\n", 
+                       XED_STATIC_CAST(xed_uint64_t,shp[i].sh_size));
+            }
+            xst_set_current_table(symbol_table,i);
+            disas_test64(fi, 
+                         start, length, shp[i].sh_offset, shp[i].sh_size, 
+                         shp[i].sh_addr, symbol_table);
+        }
+    }
+}
+
+
+void read_symbols64(void* start,
+                    unsigned int len,
+                    Elf64_Off offset,
+                    Elf64_Xword size,
+                    Elf64_Off string_table_offset,
+                    xed_symbol_table_t* symtab)
+{
+    char* a = XED_STATIC_CAST(char*,start);
+    Elf64_Sym* p = XED_STATIC_CAST(Elf64_Sym*,a + offset);
+    Elf64_Sym* q = XED_STATIC_CAST(Elf64_Sym*,a + offset + size);
+    unsigned char* hard_limit = (unsigned char*)start + len;
+    if ((void*)p < start)
+        return;
+    if ((unsigned char*) p + sizeof(Elf64_Sym) > hard_limit)
+        p =  (Elf64_Sym*)hard_limit;
+    if ((unsigned char*) q > hard_limit)
+        q =  (Elf64_Sym*)hard_limit;
+    while(p<q) {
+        if (ELF64_ST_TYPE(p->st_info) == STT_FUNC) {
+            char* name = lookup64(p->st_name, start, len, string_table_offset);
+            if (name && xed_strlen(name) > 0) {
+                xst_add_local_symbol(
+                    symtab,
+                    XED_STATIC_CAST(xed_uint64_t,p->st_value), 
+                    name, p->st_shndx);
+            }
+        }
+        p++; 
+    }
+}
+
+
+/*-----------------------------------------------------------------*/
+
+static void print_comment64(unsigned int i, Elf64_Shdr* shp, char const* const s)
+{
+    fprintf(stdout,"# Found %s: %u",s, i);
+    // NOTE: casts required here because android gcc4.8.0 uses long long
+    // int for 64b integer and android-5 gcc490 uses long int.
+    fprintf(stdout," offset " XED_FMT_LX, (xed_uint64_t) shp[i].sh_offset);
+    fprintf(stdout," size " XED_FMT_LX "\n", (xed_uint64_t) shp[i].sh_size);
+}
+static void print_comment32(unsigned int i, Elf32_Shdr* shp, char const* const s)
+{
+    fprintf(stdout,"# Found %s: %u",s,i);
+    fprintf(stdout," offset %u",shp[i].sh_offset);
+    fprintf(stdout," size %u\n", shp[i].sh_size);
+}
+
+
+
+static void
+symbols_elf64(xed_disas_info_t* fi, 
+              void* start,
+              unsigned int len,
+              xed_symbol_table_t* symtab) {
+    Elf64_Ehdr* elf_hdr = (Elf64_Ehdr*) start;
+    Elf64_Off shoff = elf_hdr->e_shoff;  // section hdr table offset
+    Elf64_Shdr* shp = (Elf64_Shdr*) ((char*)start + shoff);
+    Elf64_Half nsect = elf_hdr->e_shnum;
+    if (CLIENT_VERBOSE1) 
+        printf("# sections %d\n" , nsect);
+    unsigned int i;
+    Elf64_Half sect_strings  = elf_hdr->e_shstrndx;
+    Elf64_Off string_table_offset=0;
+    Elf64_Off dynamic_string_table_offset=0;
+    unsigned char* hard_limit = (unsigned char*)start + len;
+
+    /* find the string_table_offset and the dynamic_string_table_offset */
+    if ((void*)shp < start)
+        return;
+    
+    for( i=0;i<nsect;i++)  {
+        if (range_check(shp+i, sizeof(Elf64_Shdr), start, hard_limit)) {
+            break;
+        }
+        if (shp[i].sh_type == SHT_STRTAB) {
+            if (range_check(shp+sect_strings, sizeof(Elf64_Shdr),
+                            start, hard_limit)) {
+                break;
+            }
+            char* name = lookup64(shp[i].sh_name, start, len,
+                                  shp[sect_strings].sh_offset);
+            if (name)
+            {
+                if (strcmp(name,".strtab")==0) {
+                    if (fi->xml_format == 0) {
+                        print_comment64(i,shp, "strtab");
+                    }
+                    string_table_offset = shp[i].sh_offset;
+                }
+                if (strcmp(name,".dynstr")==0) {
+                    if (fi->xml_format == 0) {
+                        print_comment64(i,shp, "dynamic strtab");
+                    }
+                    dynamic_string_table_offset = shp[i].sh_offset;
+                }
+            }
+        }
+    }
+    /* now read the symbols */
+    for( i=0;i<nsect;i++)  {
+        if (range_check(shp+i, sizeof(Elf64_Shdr), start, hard_limit))
+            break;
+
+        if (shp[i].sh_type == SHT_SYMTAB && string_table_offset) {
+            if (fi->xml_format == 0) {
+                print_comment64(i,shp, "symtab");
+            }
+            read_symbols64(start, len, shp[i].sh_offset, shp[i].sh_size, 
+                           string_table_offset,symtab);
+        }
+        else if (shp[i].sh_type == SHT_DYNSYM && dynamic_string_table_offset) {
+            if (fi->xml_format == 0) {
+                print_comment64(i,shp, "dynamic symtab");
+            }
+            read_symbols64(start, len, shp[i].sh_offset, shp[i].sh_size,
+                           dynamic_string_table_offset, symtab);
+        }
+    }
+}
+
+
+
+static void
+read_symbols32(void* start,
+               unsigned int len,
+                    Elf32_Off offset,
+                    Elf32_Word size,
+                    Elf32_Off string_table_offset,
+                    xed_symbol_table_t* symtab) {
+    char* a = XED_STATIC_CAST(char*,start);
+    Elf32_Sym* p = XED_STATIC_CAST(Elf32_Sym*,a + offset);
+    Elf32_Sym* q = XED_STATIC_CAST(Elf32_Sym*,a + offset + size);
+    
+    unsigned char* hard_limit = (unsigned char*)start + len;
+    if ((void*)p < start)
+        return;
+    
+    if ((unsigned char*) p + sizeof(Elf32_Sym) > hard_limit)
+        p =  (Elf32_Sym*)hard_limit;
+    if ((unsigned char*) q > hard_limit)
+        q =  (Elf32_Sym*)hard_limit;
+
+    while(p<q) {
+        if (ELF32_ST_TYPE(p->st_info) == STT_FUNC) {
+            char* name = lookup32(p->st_name, start, len, string_table_offset);
+            if (name && xed_strlen(name) > 0) {
+                xst_add_local_symbol(
+                    symtab,
+                    XED_STATIC_CAST(xed_uint64_t,p->st_value), 
+                    name, p->st_shndx);
+            }
+        }
+        p++; 
+    }
+}
+
+
+
+static void
+symbols_elf32(xed_disas_info_t* fi, 
+              void* start,
+              unsigned int len,
+              xed_symbol_table_t* symtab)
+{
+    Elf32_Ehdr* elf_hdr = (Elf32_Ehdr*) start;
+    Elf32_Off shoff = elf_hdr->e_shoff;  // section hdr table offset
+    Elf32_Shdr* shp = (Elf32_Shdr*) ((char*)start + shoff);
+    Elf32_Half nsect = elf_hdr->e_shnum;
+    if (CLIENT_VERBOSE1) 
+        printf("# sections %d\n" , nsect);
+    unsigned int i;
+    Elf32_Off string_table_offset=0;
+    Elf32_Off dynamic_string_table_offset=0;
+    int sect_strings  = elf_hdr->e_shstrndx;
+    unsigned char* hard_limit = (unsigned char*)start + len;
+
+    if ((void*)shp < start)
+        return;
+
+    /* find the string_table_offset and the dynamic_string_table_offset */
+    for( i=0;i<nsect;i++)  {
+        if (range_check(shp+i, sizeof(Elf32_Shdr), start, hard_limit))
+            break;
+        if (shp[i].sh_type == SHT_STRTAB) {
+            if (range_check(shp+sect_strings, sizeof(Elf32_Shdr),
+                            start, hard_limit))
+                break;
+            char* name = lookup32(shp[i].sh_name, start,  len,
+                                  shp[sect_strings].sh_offset);
+            if (name)
+            {
+                if (strcmp(name,".strtab")==0) {
+                    if (fi->xml_format == 0) {
+                        print_comment32(i,shp, "strtab");
+                    }
+                    string_table_offset = shp[i].sh_offset;
+                }
+                if (strcmp(name,".dynstr")==0) {
+                    if (fi->xml_format == 0) {
+                        print_comment32(i,shp, "dynamic strtab");
+                    }
+                    dynamic_string_table_offset = shp[i].sh_offset;
+                }
+            }
+        }
+    }
+
+    /* now read the symbols */
+    for( i=0;i<nsect;i++)  {
+        if (range_check(shp+i, sizeof(Elf32_Shdr), start, hard_limit))
+            break;
+        
+        if (shp[i].sh_type == SHT_SYMTAB && string_table_offset) {
+            if (fi->xml_format == 0) {
+                print_comment32(i,shp, "symtab");
+            }
+            read_symbols32(start, len, shp[i].sh_offset, shp[i].sh_size, 
+                           string_table_offset, symtab);
+        } 
+        else if (shp[i].sh_type == SHT_DYNSYM && dynamic_string_table_offset)
+        {
+            if (fi->xml_format == 0) {
+                print_comment32(i,shp, "dynamic symtab");
+            }
+            read_symbols32(start, len, shp[i].sh_offset, shp[i].sh_size,
+                           dynamic_string_table_offset, symtab);
+        }
+    }
+}
+
+
+void
+xed_disas_elf(xed_disas_info_t* fi) 
+{
+    void* region = 0;
+    unsigned int len = 0;
+    xed_symbol_table_t symbol_table;
+    
+    xed_disas_elf_init();
+    xed_map_region(fi->input_file_name, &region, &len);
+    xed_symbol_table_init(&symbol_table);
+
+#if defined(XED_DWARF)
+    if (fi->line_numbers)
+        read_dwarf_line_numbers(region,len);
+#endif
+    
+    if (check_binary_64b(region)) {
+        if (fi->sixty_four_bit == 0 && fi->use_binary_mode) {
+            /* modify the default dstate values because we were not expecting a
+             * 64b binary */
+            fi->dstate.mmode =  XED_MACHINE_MODE_LONG_64;
+        }
+
+        symbols_elf64(fi,region, len,  &symbol_table);
+        process_elf64(fi, region, len, &symbol_table);
+    }
+    else if (check_binary_32b(region)) {
+        symbols_elf32(fi, region, len,  &symbol_table);
+        process_elf32(fi, region, len, &symbol_table);
+    }
+    else {
+        fprintf(stderr,"Not a recognized 32b or 64b ELF binary.\n");
+        exit(1);
+    }
+    if (fi->xml_format == 0){
+        xed_print_decode_stats(fi);
+        xed_print_encode_stats(fi);
+    }
+}
+ 
+
+
+#endif
+////////////////////////////////////////////////////////////////////////////
+

CodeVirtualizer/build/obj/wkit/examples/xed-disas-elf.h

@@ -0,0 +1,34 @@
+/* BEGIN_LEGAL 
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+/// @file xed-disas-elf.h
+
+#if !defined(XED_DISAS_ELF_H)
+# define XED_DISAS_ELF_H
+#if defined(__linux) || defined(__linux__) || defined(__FreeBSD__) || defined(__NetBSD__)
+# define XED_ELF_READER
+#endif
+# if defined(XED_ELF_READER)
+
+
+#include "xed/xed-interface.h"
+#include "xed-examples-util.h"
+
+void xed_disas_elf(xed_disas_info_t* fi);
+
+# endif
+#endif

CodeVirtualizer/build/obj/wkit/examples/xed-disas-filter.c

@@ -0,0 +1,105 @@
+/* BEGIN_LEGAL 
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <ctype.h>
+#include <string.h>
+
+#include <xed/xed-interface.h>
+#include "xed-examples-util.h"
+#include "xed-disas-filter.h"
+#include "xed-symbol-table.h"
+#include "xed-nm-symtab.h"
+
+#define IMAX 32
+#define LINELEN 1024
+
+static int len_hex(char *s)
+{
+    char *p = s;
+    while (isxdigit(*p))
+	p++;
+    return (int)(p - s);
+}
+
+static unsigned long get_ip(char *line)
+{
+    char *num;
+    for (num = line; *num; num++) {
+	int l;
+	if (isxdigit(*num) && (l = len_hex(num)) >= 8 && isspace(num[l])) {
+	    return strtoul(num, NULL, 16);
+	}
+    }
+    return 0;
+}
+
+/* Decode fields in lines of the form
+
+   prefix hexbytes ...
+
+   and replace it in the output with the decoded instruction. Each line
+   is assumed to be a single instruction for now.
+
+   Optionally we look for a another hex address before prefix that gives
+   the IP. */
+
+xed_uint_t disas_filter(xed_decoded_inst_t *inst, char *prefix, xed_disas_info_t *di)
+{
+    char line[LINELEN];
+
+    di->symfn = get_symbol;
+    xed_register_disassembly_callback(xed_disassembly_callback_function);
+    while (fgets(line, LINELEN, stdin)) {
+	xed_error_enum_t err;
+	char *insn = strstr(line, prefix), *ip;
+	xed_uint_t ilen;
+	char out[256];
+	unsigned long val;
+	char *endp;
+	xed_uint8_t insnbuf[IMAX];
+
+	if (!insn) {
+	    fputs(line, stdout);
+	    continue;
+	}
+
+	ip = insn + strlen(prefix);
+	ilen = 0;
+	do {
+	    val = strtoul(ip, &endp, 16);
+	    if (insn == endp)
+		    break;
+	    insnbuf[ilen++] = (xed_uint8_t)val;
+	    ip = endp;
+	} while (ilen < IMAX);
+	xed_state_t state;
+	xed_state_zero(&state);
+	xed_state_set_machine_mode(&state, di->dstate.mmode);
+	xed_decoded_inst_zero_set_mode(inst, &state);
+	if ((err = xed_decode(inst, insnbuf, ilen)) != XED_ERROR_NONE) {
+	    snprintf(out, sizeof out, "%s" , xed_error_enum_t2str(err));
+	} else {
+	    disassemble(di, out, sizeof out, inst, get_ip(line),
+			    nm_symtab_init ? &nm_symtab : NULL);
+	}
+	printf("%.*s\t\t%s%s", (int)(insn - line), line, out, endp);
+    }
+    return 0;
+}

CodeVirtualizer/build/obj/wkit/examples/xed-disas-filter.h

@@ -0,0 +1,19 @@
+/* BEGIN_LEGAL 
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+
+xed_uint_t disas_filter(xed_decoded_inst_t *inst, char *prefix, xed_disas_info_t *di);

CodeVirtualizer/build/obj/wkit/examples/xed-disas-hex.c

@@ -0,0 +1,110 @@
+/* BEGIN_LEGAL 
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+
+// to avoid empty compilation unit on no-decoder compiles
+#include "xed/xed-interface.h" 
+
+#if defined(XED_DECODER)
+#include "xed-examples-util.h"
+#include "xed-disas-hex.h"
+
+#include <stdlib.h>
+#include <assert.h>
+
+
+
+static FILE*
+open_file(char const* const  path, char const* const mode)
+{
+    FILE* f;
+#if defined(XED_MSVC8_OR_LATER) && !defined(PIN_CRT)
+    errno_t err;
+    err = fopen_s(&f,path, mode);
+#else
+    int err=0;
+    f = fopen(path, mode);
+    err = (f==0);
+#endif
+    if (err) {
+       fprintf(stderr, "Could not open file: %s\n", path);
+       exit(1);
+    }
+    return f;
+}
+
+static int read_byte(FILE* f, xed_uint8_t* b) {
+    int  r;
+    unsigned int i;
+#if defined(_WIN32) && !defined(PIN_CRT)
+    r = fscanf_s(f,"%2x", &i);
+#else
+    r = fscanf(f,"%2x", &i);
+#endif
+    if (b)
+        *b = (xed_uint8_t)i;
+    return r;
+}
+
+void
+xed_disas_hex(xed_disas_info_t* fi)
+{
+    xed_uint8_t* region = 0;
+    unsigned int len = 0;
+    unsigned int i = 0;
+    xed_uint8_t b = 0;
+    FILE* f = 0;
+
+    // read file once to get length
+    f = open_file(fi->input_file_name, "r");
+    while (read_byte(f,0) != -1)
+    {
+        len++;
+    }
+    fclose(f);
+
+    region = (xed_uint8_t*) malloc(len);
+    if (region == 0) {
+        fprintf(stderr,"ERROR: Could not malloc region for hex file\n");
+        exit(1);
+    }
+
+    // read file again to read the bytes
+    f = open_file(fi->input_file_name, "r");
+    while (read_byte(f,&b) != -1)
+    {
+       assert(i < len);
+       region[i++] = b;
+    }
+    fclose(f);
+    assert(i==len);
+
+    fi->s =  (unsigned char*)region;
+    fi->a = (unsigned char*)region;
+    fi->q = (unsigned char*)(region) + len; // end of region
+    fi->runtime_vaddr = 0;
+    fi->runtime_vaddr_disas_start = 0;
+    fi->runtime_vaddr_disas_end = 0;
+    fi->symfn = 0;
+    fi->caller_symbol_data = 0;
+    fi->line_number_info_fn = 0;
+    xed_disas_test(fi);
+    if (fi->xml_format == 0)
+        xed_print_decode_stats(fi);
+}
+ 
+#endif

CodeVirtualizer/build/obj/wkit/examples/xed-disas-hex.h

@@ -0,0 +1,30 @@
+/* BEGIN_LEGAL 
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+
+#if !defined(XED_DISAS_HEX_H)
+# define XED_DISAS_HEX_H
+
+
+#include "xed/xed-interface.h"
+#include "xed-examples-util.h"
+
+void
+xed_disas_hex(xed_disas_info_t* fi);
+
+
+#endif

CodeVirtualizer/build/obj/wkit/examples/xed-disas-macho.c

@@ -0,0 +1,463 @@
+/* BEGIN_LEGAL 
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+/// @file xed-disas-macho.cpp
+
+#include "xed/xed-interface.h" // to get defines
+#if defined(__APPLE__) && defined(XED_DECODER)
+
+// mac specific headers
+#include <mach-o/fat.h>
+#include <mach-o/loader.h>
+#include <mach-o/stab.h>
+#include <mach-o/nlist.h>
+
+#include "xed-disas-macho.h"
+#include "xed-examples-util.h"
+#include "xed-symbol-table.h"
+
+#include <string.h>
+
+////////////////////////////////////////////////////////////////////////////
+
+xed_uint32_t 
+swap_endian(xed_uint32_t x)
+{
+    xed_uint32_t r = 0;
+    xed_uint32_t t = x;
+    xed_uint_t i; 
+    for(i=0;i<4;i++)
+    {
+        xed_uint8_t b = (xed_uint8_t) (t&0xFF);
+        r =(r << 8)  | b;
+        t = t >> 8;
+    }
+    return r;
+}
+
+xed_uint32_t
+read_fat_header_narch(xed_uint8_t const* const current_position)
+{
+    struct fat_header* fh =
+        XED_CAST(struct fat_header*,current_position);
+    
+    // we are little endian looking at big endian data
+    if (fh->magic == FAT_CIGAM)
+    {
+        xed_uint32_t narch = swap_endian(fh->nfat_arch);
+        return narch;
+    }
+    return 0;
+}
+
+xed_bool_t
+read_fat_header(xed_uint8_t const* const current_position,
+                xed_uint32_t fat_arch_slot,
+                xed_uint32_t* offset,
+                xed_uint32_t* size)
+{
+    struct fat_header* fh =
+        XED_CAST(struct fat_header*,current_position);
+    
+    // we are little endian looking at big endian data
+    if (fh->magic == FAT_CIGAM)
+    {
+        struct fat_arch* fa = 
+            XED_CAST(struct fat_arch*,current_position + 
+                                 sizeof(struct fat_header) + 
+                                 fat_arch_slot*sizeof(struct fat_arch) );
+        const cpu_type_t cpu_type = (cpu_type_t) swap_endian((xed_uint32_t)fa->cputype);
+        
+        if ((cpu_type & CPU_TYPE_I386) != 0)
+        {
+            if ((cpu_type & CPU_ARCH_ABI64) != 0)
+                printf ("# x86 64b\n");
+            else
+                printf ("# x86 32b\n");
+            *offset = swap_endian(fa->offset);   
+            *size   = swap_endian(fa->size);   
+            return 1;
+        }
+    }
+    return 0;
+}
+
+
+static xed_bool_t 
+executable(xed_uint32_t flags)
+{
+    return ( (flags & S_ATTR_PURE_INSTRUCTIONS) !=0  || 
+             (flags & S_ATTR_SOME_INSTRUCTIONS) !=0  );
+}
+
+void
+process_segment32( xed_uint_t* sectoff,
+                   xed_disas_info_t* decode_info,
+                   xed_uint8_t* start,
+                   xed_uint8_t* segment_position,
+                   unsigned int bytes,
+                   xed_symbol_table_t* symbol_table,
+                   xed_uint64_t vmaddr)
+{
+    struct segment_command* sc =
+        XED_CAST(struct segment_command*,segment_position);
+    xed_uint8_t* start_of_section_data =
+        segment_position + sizeof(struct segment_command);
+    unsigned int i;
+    // look through the array of section headers for this segment.
+    for( i=0; i< sc->nsects;i++)
+    {
+        struct section* sp = 
+            XED_CAST(struct section*,
+                         start_of_section_data + i *sizeof(struct section));
+        
+        if (executable(sp->flags))
+        {
+            // this section is executable. Go get it and process it.
+            xed_uint8_t* section_text = start + sp->offset;
+            xed_uint32_t runtime_vaddr = sp->addr;
+
+          decode_info->s = start;
+          decode_info->a = section_text;
+          decode_info->q = section_text + sp->size;
+          decode_info->runtime_vaddr = runtime_vaddr + decode_info->fake_base;
+          decode_info->runtime_vaddr_disas_start = (xed_uint64_t)decode_info->addr_start;
+          decode_info->runtime_vaddr_disas_end = (xed_uint64_t)decode_info->addr_end;
+          decode_info->symfn = get_symbol;
+          decode_info->caller_symbol_data = symbol_table;
+          decode_info->input_file_name   = decode_info->input_file_name;
+          decode_info->line_number_info_fn = 0;
+          xst_set_current_table(symbol_table,i+1 + *sectoff);
+          xed_disas_test(decode_info);
+
+        }
+    }
+    *sectoff += sc->nsects;
+    (void) bytes; (void) vmaddr;
+}
+
+
+void
+process_segment64( xed_uint_t* sectoff,
+                   xed_disas_info_t* decode_info,
+                   xed_uint8_t* start,
+                   xed_uint8_t* segment_position,
+                   unsigned int bytes,
+                   xed_symbol_table_t* symbol_table,
+                   xed_uint64_t vmaddr)
+{
+    struct segment_command_64* sc = 
+        XED_CAST(struct segment_command_64*,segment_position);
+    xed_uint8_t* start_of_section_data = 
+        segment_position + sizeof(struct segment_command_64);
+    unsigned int i;
+    /* modify the default dstate values because we were not expecting a
+     * 64b binary */
+    decode_info->dstate.mmode = XED_MACHINE_MODE_LONG_64;
+    // look through the array of section headers for this segment.
+    for( i=0; i< sc->nsects;i++)
+    {
+        struct section_64* sp = 
+            XED_CAST(struct section_64*,
+                    start_of_section_data + i *sizeof(struct section_64));
+        if (executable(sp->flags))
+        {
+
+            // this section is executable. Go get it and process it.
+            xed_uint8_t* section_text = start + sp->offset;
+            xed_uint64_t runtime_vaddr = sp->addr;
+
+          decode_info->s = start;
+          decode_info->a = section_text;
+          decode_info->q = section_text + sp->size;
+          decode_info->runtime_vaddr = runtime_vaddr + decode_info->fake_base;
+          decode_info->runtime_vaddr_disas_start = (xed_uint64_t)decode_info->addr_start;
+          decode_info->runtime_vaddr_disas_end = (xed_uint64_t)decode_info->addr_end;
+          decode_info->symfn = get_symbol;
+          decode_info->caller_symbol_data = symbol_table;
+          decode_info->input_file_name   = decode_info->input_file_name;
+          decode_info->line_number_info_fn = 0;
+          xst_set_current_table(symbol_table,i + 1 + *sectoff);
+          xed_disas_test(decode_info);
+
+        }
+
+    }
+    *sectoff += sc->nsects;
+    (void) bytes; (void) vmaddr;
+}
+
+////////////////////////////////////////////////////////////////////////////
+
+
+void process_symbols32(xed_disas_info_t* decode_info,
+		       xed_uint8_t* pos,
+                       xed_uint8_t* current_position,
+                       xed_symbol_table_t* symbol_table) {
+    struct symtab_command* symtab  =
+        XED_CAST(struct symtab_command*,current_position);
+    /* symbols */
+    xed_uint32_t nsyms = symtab->nsyms;
+    xed_uint8_t* symoff = pos + symtab->symoff;
+    /* strings table */
+    xed_uint8_t* stroff = pos + symtab->stroff;
+    /* xed_uint8_t* stroff_end = stroff + symtab->strsize; */
+    xed_uint32_t i;
+    struct nlist* p;
+    p = XED_CAST(struct nlist*, symoff);
+    for(i=0;i<nsyms;i++) {
+        if ((p->n_type & N_STAB) == 0 &&
+            (p->n_type & N_TYPE) == N_SECT)
+        {
+            char* str=0;
+            str = XED_CAST(char*,stroff + p->n_un.n_strx);
+
+            xst_add_local_symbol(
+                symbol_table,
+                XED_CAST(xed_uint64_t,p->n_value), 
+                str,
+                p->n_sect);
+        }
+        p++;
+    }
+    (void)decode_info;
+}
+
+void process_symbols64(xed_disas_info_t* decode_info,
+		       xed_uint8_t* pos,
+                       xed_uint8_t* current_position,
+                       xed_symbol_table_t* symbol_table) {
+    struct symtab_command* symtab  =
+        XED_CAST(struct symtab_command*,current_position);
+    /* symbols */
+    xed_uint32_t nsyms = symtab->nsyms;
+    xed_uint8_t* symoff = pos + symtab->symoff;
+    /* strings table */
+    xed_uint8_t* stroff = pos + symtab->stroff;
+    xed_uint32_t i;
+    struct nlist_64* p;
+    
+    p = XED_CAST(struct nlist_64*, symoff);
+    for(i=0;i<nsyms;i++)
+    {
+        if ((p->n_type & N_STAB) == 0 &&
+            (p->n_type & N_TYPE) == N_SECT)
+        {
+            char* str=0;
+            str = XED_CAST(char*,stroff + p->n_un.n_strx);
+
+            xst_add_local_symbol(
+                symbol_table,
+                XED_CAST(xed_uint64_t,p->n_value), 
+                str,
+                p->n_sect);
+        }
+        p++;
+    }
+    (void)decode_info;
+}
+
+
+void process32(xed_disas_info_t* decode_info,
+               xed_uint8_t* current_position,
+               struct mach_header* mh,
+               xed_uint8_t* pos)
+{
+    xed_symbol_table_t symbol_table;
+    xed_uint_t i, sectoff=0;
+    if (CLIENT_VERBOSE2)
+        printf("Number of load command sections = %d\n", mh->ncmds);
+    // load commands point to segments which contain sections.
+    decode_info->dstate.mmode = XED_MACHINE_MODE_LEGACY_32;
+    xed_uint8_t* tmp_current_position = current_position;
+    xed_symbol_table_init(&symbol_table);
+
+    for( i=0;i< mh->ncmds; i++)    {
+        struct load_command* lc = 
+            XED_CAST(struct load_command*,tmp_current_position);
+        // FIXME: not handling LD_DYSYMTAB
+        if (lc->cmd == LC_SYMTAB) {
+            process_symbols32(decode_info,
+                              pos,
+                              tmp_current_position,
+                              &symbol_table);
+        }
+        tmp_current_position += lc->cmdsize;
+    }
+
+    for(i=0;i< mh->ncmds; i++)    {
+        struct load_command* lc = 
+            XED_CAST(struct load_command*,current_position);
+
+        if (CLIENT_VERBOSE2)
+            printf("load command %d\n", i);
+        if (lc->cmd == LC_SEGMENT)    {
+            if (CLIENT_VERBOSE2)
+                printf("\tload command %d is a LC_SEGMENT\n", i);
+            // we add the FAT offset to the start pointer to get to the
+            // relative start point.
+            struct segment_command* sc =
+                XED_CAST(struct segment_command*,lc);
+            process_segment32( &sectoff,
+                               decode_info,
+                               pos,
+                               current_position,
+                               lc->cmdsize ,
+                               &symbol_table,
+                               sc->vmaddr);
+        }
+        current_position += lc->cmdsize;
+    }
+}
+void process64(xed_disas_info_t* decode_info,
+               xed_uint8_t* current_position,
+               struct mach_header_64* mh,
+               xed_uint8_t* pos)
+{
+
+    xed_uint_t i, sectoff=0;
+    xed_symbol_table_t symbol_table;
+    if (CLIENT_VERBOSE2)
+        printf("Number of load command sections = %d\n", mh->ncmds);
+    // load commands point to segments which contain sections.
+    xed_uint8_t* tmp_current_position = current_position;
+    xed_symbol_table_init(&symbol_table);
+
+    for( i=0;i< mh->ncmds; i++)    {
+        struct load_command* lc = 
+            XED_CAST(struct load_command*,tmp_current_position);
+        // FIXME: not handling LD_DYSYMTAB
+        if ( lc->cmd == LC_SYMTAB ) {
+            process_symbols64(decode_info,
+                              pos,
+                              tmp_current_position,
+                              &symbol_table);
+        }
+        tmp_current_position += lc->cmdsize;
+    }
+
+    for( i=0;i< mh->ncmds; i++)  {
+        struct load_command* lc = 
+            XED_CAST(struct load_command*,current_position);
+        
+        if (CLIENT_VERBOSE2)
+            printf("load command %x\n", i);
+        if (lc->cmd == LC_SEGMENT_64)    {
+            if (CLIENT_VERBOSE2)
+                printf("\tload command %d is a LC_SEGMENT\n", i);
+            // we add the FAT offset to the start pointer to get to the
+            // relative start point.
+            struct segment_command_64* sc =
+                XED_CAST(struct segment_command_64*,lc);
+            process_segment64( &sectoff,
+                               decode_info,
+                               pos,
+                               current_position,
+                               lc->cmdsize,
+                               &symbol_table,
+                               sc->vmaddr );
+        }
+        current_position += lc->cmdsize;
+    }
+}
+
+
+void
+process_macho(xed_uint8_t* start,
+              unsigned int length, // FIXME: Use this! Trusting internal consistency of headers
+              xed_disas_info_t* decode_info)
+
+{
+    xed_uint8_t* base_pos  = start;
+    xed_uint32_t narch = read_fat_header_narch(base_pos);
+    xed_uint32_t fat_arch_slot=0;
+
+    xed_uint32_t lim = 1;
+    
+    // we have one section if not a fat binary.
+    if (narch > lim)
+        lim = narch;
+
+    for (fat_arch_slot = 0; fat_arch_slot < lim; fat_arch_slot++)
+    {
+        xed_uint32_t offset=0;
+        xed_uint32_t size;
+        xed_bool_t okay = 0;
+
+        if (narch)  // for fat binaries
+            okay = read_fat_header(base_pos, fat_arch_slot, &offset, &size);
+
+        if (CLIENT_VERBOSE2 && !okay)
+            if (decode_info->xml_format == 0)
+                xedex_dwarn("Could not find x86 section of fat binary "
+                            "-- checking for mach header");
+        if (CLIENT_VERBOSE2)
+            printf("Offset of load sections = %x\n", offset);
+
+        xed_uint8_t* current_position = base_pos + offset;
+
+        if (narch > 0) 
+            printf("# FAT ARCH SECTION = %d\n", fat_arch_slot);
+        struct mach_header* mh =
+            XED_CAST(struct mach_header*,current_position);
+        struct mach_header_64* mh64 =
+            XED_CAST(struct mach_header_64*,current_position);
+        if (mh->magic == MH_MAGIC) {
+            current_position += sizeof(struct mach_header);
+            process32(decode_info,
+                      current_position,
+                      mh,
+                      start+offset);
+        }
+        else if (mh64->magic == MH_MAGIC_64) {
+            current_position += sizeof(struct mach_header_64);
+            process64(decode_info,
+                      current_position,
+                      mh64,
+                      start+offset);
+        }
+        else   
+            xedex_derror("Could not find mach header");
+      } // for
+
+    (void) length;
+}
+
+void xed_disas_macho_init(void) {
+    xed_register_disassembly_callback(xed_disassembly_callback_function);
+}
+
+
+void
+xed_disas_macho(xed_disas_info_t* fi)
+{
+    xed_uint8_t* region = 0;
+    void* vregion = 0;
+    unsigned int len = 0;
+
+    xed_disas_macho_init();
+    xed_map_region(fi->input_file_name, &vregion, &len);
+
+    region = XED_CAST(xed_uint8_t*,vregion);
+    process_macho(region, len, fi); 
+    if (fi->xml_format == 0)
+        xed_print_decode_stats(fi);
+}
+ 
+
+
+#endif

CodeVirtualizer/build/obj/wkit/examples/xed-disas-macho.h

@@ -0,0 +1,29 @@
+/* BEGIN_LEGAL 
+
+Copyright (c) 2021 Intel Corporation
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+      http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+  
+END_LEGAL */
+/// @file xed-disas-macho.H
+#if !defined(XED_DISAS_MACHO_H)
+# define XED_DISAS_MACHO_H
+
+# if defined(__APPLE__)
+#  include "xed/xed-interface.h" 
+#  include "xed-examples-util.h" 
+
+void
+xed_disas_macho(xed_disas_info_t* fi);
+# endif
+#endif